diff options
author | Gabor Juhos <juhosg@openwrt.org> | 2013-02-15 08:38:16 -0500 |
---|---|---|
committer | John Crispin <blogic@openwrt.org> | 2013-02-19 03:36:24 -0500 |
commit | 2e6c91e392fd7be2ef0ba1e9a20e0ebe8ab79cf3 (patch) | |
tree | 0cb70c58b13339005f08a31141ca3e57ee58f039 /arch/mips/include | |
parent | 908987797076b848f01b32c21d61d0e152efc236 (diff) |
MIPS: ath79: add SoC detection code for the QCA955X SoCs
Also add 'soc_is_qca955[68x]' helper functions
and a Kconfig symbol for the SoC family.
Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4943/
Signed-off-by: John Crispin <blogic@openwrt.org>
Diffstat (limited to 'arch/mips/include')
-rw-r--r-- | arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 2 | ||||
-rw-r--r-- | arch/mips/include/asm/mach-ath79/ath79.h | 17 |
2 files changed, 19 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h index d02c2d4e600e..63a9f2b600b8 100644 --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h | |||
@@ -392,6 +392,8 @@ | |||
392 | 392 | ||
393 | #define AR934X_REV_ID_REVISION_MASK 0xf | 393 | #define AR934X_REV_ID_REVISION_MASK 0xf |
394 | 394 | ||
395 | #define QCA955X_REV_ID_REVISION_MASK 0xf | ||
396 | |||
395 | /* | 397 | /* |
396 | * SPI block | 398 | * SPI block |
397 | */ | 399 | */ |
diff --git a/arch/mips/include/asm/mach-ath79/ath79.h b/arch/mips/include/asm/mach-ath79/ath79.h index 4f248c3d7b23..1557934aaca9 100644 --- a/arch/mips/include/asm/mach-ath79/ath79.h +++ b/arch/mips/include/asm/mach-ath79/ath79.h | |||
@@ -32,6 +32,8 @@ enum ath79_soc_type { | |||
32 | ATH79_SOC_AR9341, | 32 | ATH79_SOC_AR9341, |
33 | ATH79_SOC_AR9342, | 33 | ATH79_SOC_AR9342, |
34 | ATH79_SOC_AR9344, | 34 | ATH79_SOC_AR9344, |
35 | ATH79_SOC_QCA9556, | ||
36 | ATH79_SOC_QCA9558, | ||
35 | }; | 37 | }; |
36 | 38 | ||
37 | extern enum ath79_soc_type ath79_soc; | 39 | extern enum ath79_soc_type ath79_soc; |
@@ -98,6 +100,21 @@ static inline int soc_is_ar934x(void) | |||
98 | return soc_is_ar9341() || soc_is_ar9342() || soc_is_ar9344(); | 100 | return soc_is_ar9341() || soc_is_ar9342() || soc_is_ar9344(); |
99 | } | 101 | } |
100 | 102 | ||
103 | static inline int soc_is_qca9556(void) | ||
104 | { | ||
105 | return ath79_soc == ATH79_SOC_QCA9556; | ||
106 | } | ||
107 | |||
108 | static inline int soc_is_qca9558(void) | ||
109 | { | ||
110 | return ath79_soc == ATH79_SOC_QCA9558; | ||
111 | } | ||
112 | |||
113 | static inline int soc_is_qca955x(void) | ||
114 | { | ||
115 | return soc_is_qca9556() || soc_is_qca9558(); | ||
116 | } | ||
117 | |||
101 | extern void __iomem *ath79_ddr_base; | 118 | extern void __iomem *ath79_ddr_base; |
102 | extern void __iomem *ath79_pll_base; | 119 | extern void __iomem *ath79_pll_base; |
103 | extern void __iomem *ath79_reset_base; | 120 | extern void __iomem *ath79_reset_base; |