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path: root/arch/mips/include/asm/mach-cavium-octeon/irq.h
Commit message (Expand)AuthorAge
* MIPS: Octeon: Add twsi interrupt initialization for OCTEON 3XXX, 5XXX, 63XXEunbong Song2014-06-04
* MIPS: Whitespace cleanup.Ralf Baechle2013-02-01
* MIPS/OCTEON/ata: Convert pata_octeon_cf.c to use device tree.David Daney2012-12-13
* MIPS: OCTEON: Add OCTEON_IRQ_* definitions for cn68XX chips.David Daney2012-08-31
* MIPS: Octeon: Fix broken interrupt controller code.David Daney2012-08-17
* MIPS: OCTEON: Remove unneeded OCTEON_IRQ_* defines.David Daney2012-07-23
* MIPS: Octeon: Remove use of OCTEON_IRQ_RST.David Daney2012-07-23
* MIPS: Octeon: Rewrite interrupt handling code.David Daney2011-03-29
* MIPS: Octeon: Support 256 MSI on PCIeDavid Daney2010-08-05
* MIPS: Octeon: Get rid of a bunch of MSI IRQ number definitions.David Daney2010-08-05
* MIPS: Add Cavium OCTEON processor support files to arch/mips/cavium-octeon.David Daney2009-01-11