MIPS: Octeon: Fix broken interrupt controller code.

Since 3.6.0-rc1,  We are getting many messages like:

WARNING: at kernel/irq/irqdomain.c:444 irq_domain_associate_many+0x23c/0x260()
Modules linked in:
Call Trace:
[<ffffffff814cb698>] dump_stack+0x8/0x34
[<ffffffff81133d00>] warn_slowpath_common+0x78/0xa8
[<ffffffff81187e44>] irq_domain_associate_many+0x23c/0x260
[<ffffffff81187f38>] irq_create_mapping+0xd0/0x220
[<ffffffff81188104>] irq_create_of_mapping+0x7c/0x158
[<ffffffff813e5f08>] irq_of_parse_and_map+0x28/0x40
.
.
.

Both the CIU and GPIO interrupt domains were somewhat screwed up.

For the CIU domain, we need to call irq_domain_associate() for each of
the preassigned irq numbers.  For the GPIO domain, we were applying
the register bit offset in octeon_irq_gpio_xlat, but it should be done
in octeon_irq_gpio_map instead.

Also: Reserve all 8 'core' irqs for the 'core' irq_chip so that they
don't get used by the other domains.  Remove unused OCTEON_IRQ_*
symbols.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/4190/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

1 files changed, 1 insertions, 9 deletions

diff --git a/arch/mips/include/asm/mach-cavium-octeon/irq.h b/arch/mips/include/asm/mach-cavium-octeon/irq.h
index 418992042f6f..c22a3078bf11 100644
--- a/arch/mips/include/asm/mach-cavium-octeon/irq.h
+++ b/arch/mips/include/asm/mach-cavium-octeon/irq.h
@@ -21,14 +21,10 @@ enum octeon_irq {
         OCTEON_IRQ_TIMER,
 /* sources in CIU_INTX_EN0 */
         OCTEON_IRQ_WORKQ0,
-        OCTEON_IRQ_GPIO0 = OCTEON_IRQ_WORKQ0 + 16,
-        OCTEON_IRQ_WDOG0 = OCTEON_IRQ_GPIO0 + 16,
+        OCTEON_IRQ_WDOG0 = OCTEON_IRQ_WORKQ0 + 16,
         OCTEON_IRQ_WDOG15 = OCTEON_IRQ_WDOG0 + 15,
         OCTEON_IRQ_MBOX0 = OCTEON_IRQ_WDOG0 + 16,
         OCTEON_IRQ_MBOX1,
-        OCTEON_IRQ_UART0,
-        OCTEON_IRQ_UART1,
-        OCTEON_IRQ_UART2,
         OCTEON_IRQ_PCI_INT0,
         OCTEON_IRQ_PCI_INT1,
         OCTEON_IRQ_PCI_INT2,
@@ -38,8 +34,6 @@ enum octeon_irq {
         OCTEON_IRQ_PCI_MSI2,
         OCTEON_IRQ_PCI_MSI3,
 
-        OCTEON_IRQ_TWSI,
-        OCTEON_IRQ_TWSI2,
         OCTEON_IRQ_RML,
         OCTEON_IRQ_TIMER0,
         OCTEON_IRQ_TIMER1,
@@ -47,8 +41,6 @@ enum octeon_irq {
         OCTEON_IRQ_TIMER3,
         OCTEON_IRQ_USB0,
         OCTEON_IRQ_USB1,
-        OCTEON_IRQ_MII0,
-        OCTEON_IRQ_MII1,
         OCTEON_IRQ_BOOTDMA,
 #ifndef CONFIG_PCI_MSI
         OCTEON_IRQ_LAST = 127