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* ARM: dts: add device tree source for imx6sl SoCShawn Guo2013-06-17
| | | | | | Add SoC level device tree source for imx6sl. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: i.MX6: configure L2 cache data and tag latencyDirk Behme2013-06-17
| | | | | | | | | | | | | | | | | | | | | Configure the data and tag latency for the L2 cache. This improves the system performance. This configuration is taken from Freescale's kernel patch "ENGR00153601 [MX6]Adjust L2 cache parameter" [1] which does writel(0x132, IO_ADDRESS(L2_BASE_ADDR + L2X0_TAG_LATENCY_CTRL)); writel(0x132, IO_ADDRESS(L2_BASE_ADDR + L2X0_DATA_LATENCY_CTRL)); In this patch we are doing the same via the device tree. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> [1] http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/commit/arch/arm/mach-mx6/mm.c?h=imx_3.0.35_12.09.01&id=814656410b40c67a10b25300e51b0477b2bb96d1
* ARM: dts: add SPI/NOR for mx6q{dl}-sabreauto boardsHuang Shijie2013-06-17
| | | | | | | | Since the SPI/NOR has pin conflict with the WEIM NOR, we disable the spi/nor by default. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx6q: add a gpio for hogHuang Shijie2013-06-17
| | | | | | | | The SPI/NOR needs this gpio for CS. So add this gpio in the hog pinctrl. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx6dl: add a gpio for hogHuang Shijie2013-06-17
| | | | | | | | The SPI/NOR needs this gpio for CS. So add this gpio in the hog pinctrl. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx6dl: add a pinctrl for eCSPI1Huang Shijie2013-06-17
| | | | | Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: enable the gpmi-nand for imx6q{dl}-sabreauto boardsHuang Shijie2013-06-17
| | | | | | | enable the gpmi-nand for imx6q-sabreauto and imx6qdl-sabreauto boards. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx6dl: add pinctrl for gpmi-nandHuang Shijie2013-06-17
| | | | | | | add the pinctrl item for gpmi-nand. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx6q: remove the unused pins for gpmi-nandHuang Shijie2013-06-17
| | | | | | | | | | The gpmi does not use the MX6Q_PAD_NANDF_CS2__NAND_CE2_B and MX6Q_PAD_NANDF_CS3__NAND_CE3_B. Just remove them. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: Add SPI support for i.MX27 Phytec PCM038 moduleAlexander Shiyan2013-06-17
| | | | | | | | Added SPI node and PMIC MC13783 (spi0.0) to imx27-phytec-phycore DT file. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: Add aliases for i.MX27 SPI controllerAlexander Shiyan2013-06-17
| | | | | | | Add aliases to determine the proper SPI bus number. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: add Ka-Ro tx53 devicetreeSteffen Trumtrar2013-06-17
| | | | | | | | This adds support for the Ka-Ro TX53 System-On-Module. As a baseboard is needed to operate it, only a *.dtsi and no Makefile entry. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: i.MX53: add uart2 pinctrlSteffen Trumtrar2013-06-17
| | | | | | | Add a group to the uart2 pinctrl. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: i.MX53: add uart1 pinctrlSteffen Trumtrar2013-06-17
| | | | | | | Add a group to the uart1 pinctrl. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: i.MX53: add pwm2 pinctrlSteffen Trumtrar2013-06-17
| | | | | | | Add pinctrl for pwm2. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: i.MX53: add ecspi pinctrlSteffen Trumtrar2013-06-17
| | | | | | | Add a group to the ecspi pinctrl. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: i.MX53: add csi pinctrlSteffen Trumtrar2013-06-17
| | | | | | | Add a group to the csi pinctrl. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: i.MX53: add audmux pinctrlSteffen Trumtrar2013-06-17
| | | | | | | Add a group to the audmux pinctrl. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: mx5: Add support for DENX M53EVKMarek Vasut2013-06-17
| | | | | | | | | This patch adds support for the DENX M53EVK board. The board currently supports NAND, Ethernet, UART, CAN, I2C. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: imx: move imx53-qsb audio codec clk lookup into DTShawn Guo2013-06-17
| | | | | | | | | | | With device tree clk lookup support in place, we can move audio codec clk lookup for ssi_ext1 into device tree now, so that imx53_qsb_init() can be saved. Since ssi_ext2 lookup is used nowhere, it gets removed together with ssi_ext1 lookup from clk driver. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: mx5: Add PWM1 pinctrl dataMarek Vasut2013-06-17
| | | | | | | This patch adds pinctrl data for PWM1 on MX53. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: mx5: Add LCD IPU pinctrl dataMarek Vasut2013-06-17
| | | | | | | This patch adds pinmux for IPU LCD 1 and IPU LVDS. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: mx5: Add NAND pinctrl dataMarek Vasut2013-06-17
| | | | | | | | This patch adds pinctrl data for NAND on MX53. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: mx5: Add I2C2 pinctrl dataMarek Vasut2013-06-17
| | | | | | | | This patch adds pinctrl data for different mux of I2C2 on MX53. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: mx5: Add I2C1 pinctrl dataMarek Vasut2013-06-17
| | | | | | | | This patch adds pinctrl data for different mux of I2C1 on MX53. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: mx5: Add CAN1 pinctrl dataMarek Vasut2013-06-17
| | | | | | | | This patch adds pinctrl data for different mux of CAN1 on MX53. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: mx5: Add AUDMUX4 pinctrl dataMarek Vasut2013-06-17
| | | | | | | | This patch adds pinctrl data for the AUDMUX4 on MX53. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM i.MX53: dts: add i2c aliasesPhilipp Zabel2013-06-17
| | | | | | | | | | This allows to order the i2c character devices correctly, so that /dev/i2c-0 corresponds to i2c1, /dev/i2c-1 corresponds to i2c2, and so on. Currently they are ordered by register address. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: imx27: Add PWM0 to device treeGwenhael Goavec-Merou2013-06-17
| | | | | | Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx: imx53-qsb.dts: enable usbotg and usbh1Michael Grzeschik2013-06-17
| | | | | Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx: use usb-nop-xceiv usbphy entries for imx5xMichael Grzeschik2013-06-17
| | | | | Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx: add imx5x usb clock DT lookupsMichael Grzeschik2013-06-17
| | | | | Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx: add imx5x usbmisc entriesMichael Grzeschik2013-06-17
| | | | | Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* Merge tag 'imx-soc-3.11' into imx/dtShawn Guo2013-06-17
|\ | | | | | | | | | | | | | | | | | | | | | | imx soc changes for 3.11: * New SoCs i.MX6 Sololite and Vybrid VF610 support * imx5 and imx6 clock fixes and additions * Update clock driver to use of_clk_init() function * Refactor restart routine mxc_restart() to get it work for DT boot as well * Clean up mxc specific ulpi access ops * imx defconfig updates
| * ARM: imx_v6_v7_defconfig: Enable Vybrid VF610Fabio Estevam2013-06-17
| | | | | | | | | | | | | | Let VF610 SoC support be built by default. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * ARM: imx_v6_v7_defconfig: Enable imx-wm8962 by defaultNicolin Chen2013-06-17
| | | | | | | | | | | | | | Enable imx-wm8962 and PM_RUNTIME, essential for WM8962 CODEC driver. Signed-off-by: Nicolin Chen <b42378@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * ARM: clk-imx6qdl: Add clko1 configuration for imx6qdl-sabresdNicolin Chen2013-06-17
| | | | | | | | | | | | | | WM8962 needs 24MHz clock for its MCLK, so choose PLL4 as the parent of clko1. Signed-off-by: Nicolin Chen <b42378@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * ARM: imx_v6_v7_defconfig: Enable PWM and backlight optionsFabio Estevam2013-06-17
| | | | | | | | | | | | | | These options are useful for controlling backlight contrast via PWM. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * ARM: imx: Remove mxc specific ulpi access opsMarkus Pargmann2013-06-17
| | | | | | | | | | | | | | | | | | | | | | | | | | There are ulpi access ops implemented in drivers/usb/phy/phy-ulpi.c. mxc access ops implement the same access operations within mach-imx. This patch removes the mxc ulpi file and uses phy-ulpi instead for imx_otg_ulpi_create. phy-ulpi successfully tested with i.MX27 Phytec phyCARD-S (pca100). Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * ARM: imx: add initial support for VF610Jingchang Lu2013-06-17
| | | | | | | | | | | | | | Add initial support for Freescale Vybrid VF610 SoC. Signed-off-by: Jingchang Lu <b35083@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * ARM: imx: add VF610 clock supportJingchang Lu2013-06-17
| | | | | | | | | | | | | | | | | | Add clock support for Vybrid VF610. It uses dtc macro support to define all clock IDs in vf610-clock.h to keep clock IDs coherence between kernel and DT. Signed-off-by: Jingchang Lu <b35083@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * ARM: imx_v6_v7_defconfig: enable parallel displayRogerio Pimentel2013-06-17
| | | | | | | | | | | | | | | | Enable paralell display by default Signed-off-by: Rogerio Pimentel <rogerio.pimentel@freescale.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * ARM: imx: clk: No need to initialize phandle structFabio Estevam2013-06-17
| | | | | | | | | | | | | | | | | | | | | | | | | | commit 84344b43c (ARM: i.MX5: Allow DT clock providers) introduce the following sparse warning: arch/arm/mach-imx/clk.c:12:43: warning: Using plain integer as NULL pointer There is no need to initialize phandle, so remove it. Cc: Martin Fuzzey <mfuzzey@parkeon.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * ARM: imx: irq-common: Include header to avoid sparse warningFabio Estevam2013-06-17
| | | | | | | | | | | | | | | | | | Fix the following sparse warning: arch/arm/mach-imx/irq-common.c:24:5: warning: symbol 'mxc_set_irq_fiq' was not declared. Should it be static? Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * ARM: imx: Enable mx6 solo-lite supportFabio Estevam2013-06-17
| | | | | | | | | | Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * ARM: imx6: use common of_clk_init() call to initialize clocksShawn Guo2013-06-17
| | | | | | | | | | | | | | | | Instead of explicitly calling clock initialization functions, we can declare the functions with CLK_OF_DECLARE() and then call common of_clk_init() to have them invoked properly. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * ARM: imx6q: call of_clk_init() to register fixed rate clocksShawn Guo2013-06-17
| | | | | | | | | | | | | | As the fixed rate clocks are defined in device tree, we can just call of_clk_init() to register them. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * ARM: imx: imx_v6_v7_defconfig: Select CONFIG_DRM_IMX_TVEFabio Estevam2013-06-17
| | | | | | | | | | | | | | Let the mx53 TVE driver be built by default. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * ARM: i.MX6: clk: add different DualLite MLB clock configDirk Behme2013-06-17
| | | | | | | | | | | | | | | | | | | | | | | | The CCM_CBCMR register (address 0x02C4018) has different meaning between the i.MX6 Quad/Dual and the i.MX6 Solo/DualLite. Compared to the i.MX6 Quad/Dual, the CCM_CBCMR register in the i.MX6 Solo/DualLite reuses the gpu2d_core bits for the MLB clock configuration. Signed-off-by: Dirk Behme <dirk.behme@gmail.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * ARM i.MX5: Add S/PDIF clocksPhilipp Zabel2013-06-17
| | | | | | | | | | | | | | | | | | This patch adds the S/PDIF clocks for i.MX51 and i.MX53. Tested on i.MX53. The i.MX51 has a second set of spdif_root clock dividers, and on i.MX53 there is an additional input to the spdif_xtal mux. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>