diff options
author | Huang Shijie <b32955@freescale.com> | 2013-05-08 23:29:00 -0400 |
---|---|---|
committer | Shawn Guo <shawn.guo@linaro.org> | 2013-06-17 04:04:19 -0400 |
commit | 32d77d114c5f334419e8ccb5e61baa3236f6a586 (patch) | |
tree | 8cf550386a152109df4ab6153d15e0d03829855c | |
parent | 827269318ca2d40ce316aef25ea82157c8bcf99c (diff) |
ARM: dts: imx6dl: add a pinctrl for eCSPI1
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-rw-r--r-- | arch/arm/boot/dts/imx6dl.dtsi | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi index 24544ed93d8a..4b134542c000 100644 --- a/arch/arm/boot/dts/imx6dl.dtsi +++ b/arch/arm/boot/dts/imx6dl.dtsi | |||
@@ -35,6 +35,16 @@ | |||
35 | compatible = "fsl,imx6dl-iomuxc"; | 35 | compatible = "fsl,imx6dl-iomuxc"; |
36 | reg = <0x020e0000 0x4000>; | 36 | reg = <0x020e0000 0x4000>; |
37 | 37 | ||
38 | ecspi1 { | ||
39 | pinctrl_ecspi1_1: ecspi1grp-1 { | ||
40 | fsl,pins = < | ||
41 | MX6DL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 | ||
42 | MX6DL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 | ||
43 | MX6DL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 | ||
44 | >; | ||
45 | }; | ||
46 | }; | ||
47 | |||
38 | enet { | 48 | enet { |
39 | pinctrl_enet_1: enetgrp-1 { | 49 | pinctrl_enet_1: enetgrp-1 { |
40 | fsl,pins = < | 50 | fsl,pins = < |