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* MIPS: Alchemy: Single kernel for DB1200/1300/1550Manuel Lauss2012-10-11
| | | | | | | | | | | | Combine support for the DB1200/PB1200, DB1300 and DB1550 boards into a single kernel image. defconfig-generated image verified on DB1200, DB1300 and DB1550. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4335/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Optimize TLB refill for RI/XI configurations.David Daney2012-10-11
| | | | | | | | | | We don't have to do a separate shift to eliminate the software bits, just rotate them into the fill and they will be ignored. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4294/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: proc: Cleanup printing of ASEs.Ralf Baechle2012-10-11
| | | | | | The number of %s was just getting ridiculous. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Hardwire detection of DSP ASE Rev 2 for systems, as required.Ralf Baechle2012-10-11
| | | | | | | | Most supported systems currently hardwire cpu_has_dsp to 0, so we also can disable support for cpu_has_dsp2 resulting in a slightly smaller kernel. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Add detection of DSP ASE Revision 2.Steven J. Hill2012-10-11
| | | | | | | | | | | [ralf@linux-mips.org: This patch really only detects the ASE and passes its existence on to userland via /proc/cpuinfo. The DSP ASE Rev 2. adds new resources but no resources that would need management by the kernel.] Signed-off-by: Steven J. Hill <sjhill@mips.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4165/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Optimize pgd_init and pmd_initDavid Daney2012-10-11
| | | | | | | | | | | | On a dual issue processor GCC generates code that saves a couple of clock cycles per loop if we rearrange things slightly. Checking for p != end saves a SLTU per loop, moving the increment to the middle can let it dual issue on multi-issue processors. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4249/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: perf: Add perf functionality for BMIPS5000Al Cooper2012-10-11
| | | | | | | | | | | | | Add hardware performance counter support to kernel "perf" code for BMIPS5000. The BMIPS5000 performance counters are similar to MIPS MTI cores, so the changes were mostly made in perf_event_mipsxx.c which is typically for MTI cores. Signed-off-by: Al Cooper <alcooperx@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/4109/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: perf: Split the Kconfig option CONFIG_MIPS_MT_SMPAl Cooper2012-10-11
| | | | | | | | | | | | | Split the Kconfig option CONFIG_MIPS_MT_SMP into CONFIG_MIPS_MT_SMP and CONFIG_MIPS_PERF_SHARED_TC_COUNTERS so some of the code used for performance counters that are shared between threads can be used for MIPS cores that are not MT_SMP. Signed-off-by: Al Cooper <alcooperx@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/4108/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: perf: Remove unnecessary #ifdefAl Cooper2012-10-11
| | | | | | | | | | | | | | | The #ifdef for CONFIG_HW_PERF_EVENTS is not needed because the Makefile will only compile the module if this config option is set. This means that the code under #else would never be compiled. This may have been done to leave the original broken code around for reference, but the FIXME comment above the code already shows the broken code. Signed-off-by: Al Cooper <alcooperx@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/4107/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: perf: Add cpu feature bit for PCI (performance counter interrupt)Al Cooper2012-10-11
| | | | | | | | | | | | | The PCI (Program Counter Interrupt) bit in the "cause" register is mandatory for MIPS32R2 cores, but has also been added to some R1 cores (BMIPS5000). This change adds a cpu feature bit to make it easier to check for and use this feature. Signed-off-by: Al Cooper <alcooperx@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/4106/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: perf: Change the "mips_perf_event" table unsupported indicator.Al Cooper2012-10-11
| | | | | | | | | | | | | | | | Change the indicator from 0xffffffff in the "event_id" member to zero in the "cntr_mask" member. This removes the need to initialize entries that are unsupported. This also solves a problem where the number of entries in the table was increased based on a globel enum used for all platforms, but the new unsupported entries were not added for mips. This was leaving new table entries of all zeros that we not marked UNSUPPORTED. Signed-off-by: Al Cooper <alcooperx@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/4110/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Align swapper_pg_dir to 64K for better TLB Refill code.David Daney2012-10-11
| | | | | | | | | | | | | | | | | | | | | | | We can save an instruction in the TLB Refill path for kernel mappings by aligning swapper_pg_dir on a 64K boundary. The address of swapper_pg_dir can be generated with a single LUI instead of LUI/{D}ADDUI. The alignment of __init_end is bumped up to 64K so there are no holes between it and swapper_pg_dir, which is placed at the very beginning of .bss. The alignment of invalid_pmd_table and invalid_pte_table can be relaxed to PAGE_SIZE. We do this by using __page_aligned_bss, which has the added benefit of eliminating alignment holes in .bss. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: linux-arch@vger.kernel.org, Cc: linux-kernel@vger.kernel.org Acked-by: Arnd Bergmann <arnd@arndb.de> Patchwork: https://patchwork.linux-mips.org/patch/4220/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* vmlinux.lds.h: Allow architectures to add sections to the front of .bssDavid Daney2012-10-11
| | | | | | | | | | | | | | | | Follow-on MIPS patch will put an object here that needs 64K alignment to minimize padding. For those architectures that don't define BSS_FIRST_SECTIONS, there is no change. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: linux-arch@vger.kernel.org, Cc: linux-kernel@vger.kernel.org Acked-by: Arnd Bergmann <arnd@arndb.de> Patchwork: https://patchwork.linux-mips.org/patch/4221/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Improve atomic.h robustnessJoshua Kinard2012-10-11
| | | | | | | | | | | | | | | | | | | | | | | | | I've maintained this patch, originally from Thiemo Seufer in 2004, for a really long time, but I think it's time for it to get a look at for possible inclusion. I have had no problems with it across various SGI systems over the years. To quote the post here: http://www.linux-mips.org/archives/linux-mips/2004-12/msg00000.html "the atomic functions use so far memory references for the inline assembler to access the semaphore. This can lead to additional instructions in the ll/sc loop, because newer compilers don't expand the memory reference any more but leave it to the assembler. The appended patch uses registers instead, and makes the ll/sc arguments more explicit. In some cases it will lead also to better register scheduling because the register isn't bound to an output any more." Signed-off-by: Joshua Kinard <kumba@gentoo.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4029/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Merge branch 'i2c-embedded/for-next' of git://git.pengutronix.de/git/wsa/linuxLinus Torvalds2012-10-10
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull i2c-embedded changes from Wolfram Sang: "The changes for i2c-embedded include: - massive rework of the omap driver - massive rework of the at91 driver. In fact, the old driver gets removed; I am okay with this approach since the old driver was depending on BROKEN and its limitations made it practically unusable, so people used bitbanging instead. But even if there are users, there is no platform_data or module parameter which would need to be converted. It is just another driver doing I2C transfers, just way better. Modifications of arch/arm/at91 related files have proper acks from the maintainer. - new driver for R-Car I2C - devicetree and generic_clock conversions and fixes - usual driver fixes and changes. The rework patches have come a long way and lots of people have been involved in creating/testing them. Most patches have been in linux-next at least since 3.6-rc5. A few have been added in the last week, I have to admit. An unexpected (but welcome :)) peak in private life is the cause for that. The "late" patches shouldn't cause any merge conflicts and I will have a special eye on them during the stabilization phase. This is an exception and I want to have the patches in place properly in time again for the next kernels." * 'i2c-embedded/for-next' of git://git.pengutronix.de/git/wsa/linux: (44 commits) MXS: Implement DMA support into mxs-i2c i2c: add Renesas R-Car I2C driver i2c: s3c2410: use clk_prepare_enable and clk_disable_unprepare ARM: OMAP: convert I2C driver to PM QoS for MPU latency constraints i2c: nomadik: Add Device Tree support to the Nomadik I2C driver i2c: algo: pca: Fix chip reset function for PCA9665 i2c: mpc: Wait for STOP to hit the bus i2c: davinci: preparation for switch to common clock framework omap-i2c: fix incorrect log message when using a device tree i2c: omap: sanitize exit path i2c: omap: switch over to autosuspend API i2c: omap: remove unnecessary pm_runtime_suspended check i2c: omap: switch to threaded IRQ support i2c: omap: remove redundant status read i2c: omap: get rid of the "complete" label i2c: omap: resize fifos before each message i2c: omap: simplify IRQ exit path i2c: omap: always return IRQ_HANDLED i2c: omap: simplify errata check i2c: omap: bus: add a receiver flag ...
| * MXS: Implement DMA support into mxs-i2cMarek Vasut2012-10-08
| | | | | | | | | | | | | | | | | | | | | | | | This patch implements DMA support into mxs-i2c. DMA transfers are now enabled via DT. The DMA operation is enabled by default. Signed-off-by: Marek Vasut <marex@denx.de> Tested-by: Fabio Estevam <fabio.estevam@freescale.com> [wsa: rebased to 3.6-rc7] Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
| * Merge tag 'v3.6-rc7' into i2c-embedded/for-nextWolfram Sang2012-10-08
| |\ | | | | | | | | | | | | | | | Linux 3.6-rc7 Needed to get updates from i2c-embedded/for-current into i2c-embedded/for-next
| * | i2c: add Renesas R-Car I2C driverKuninori Morimoto2012-10-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | R-Car I2C is similar with SH7760 I2C. But the SH7760 I2C driver had many workaround operations, since H/W had bugs. Thus, it was pointless to keep compatible between SH7760 and R-Car I2C drivers. This patch creates new Renesas R-Car I2C driver. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
| * | i2c: s3c2410: use clk_prepare_enable and clk_disable_unprepareThomas Abraham2012-10-06
| | | | | | | | | | | | | | | | | | | | | | | | Convert clk_enable/clk_disable to clk_prepare_enable/clk_disable_unprepare calls as required by common clock framework. Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
| * | ARM: OMAP: convert I2C driver to PM QoS for MPU latency constraintsJean Pihet2012-10-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the driver from the outdated omap_pm_set_max_mpu_wakeup_lat API to the new PM QoS API. Since the constraint is on the MPU subsystem, use the PM_QOS_CPU_DMA_LATENCY class of PM QoS. The resulting MPU constraints are used by cpuidle to decide the next power state of the MPU subsystem. The I2C device latency timing is derived from the FIFO size and the clock speed and so is applicable to all OMAP SoCs. Signed-off-by: Jean Pihet <j-pihet@ti.com> Acked-by: Shubhrajyoti D <shubhrajyoti@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
| * | i2c: nomadik: Add Device Tree support to the Nomadik I2C driverLee Jones2012-10-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | Here we apply the bindings required for successful Device Tree probing of the i2c-nomadik driver. Signed-off-by: Lee Jones <lee.jones@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
| * | i2c: algo: pca: Fix chip reset function for PCA9665Thomas Kavanagh2012-10-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The parameter passed to pca9665_reset is adap->data (which is bus driver specific), not i2c_algp_pca_data *adap. pca9665_reset expects it to be i2c_algp_pca_data *adap. All other wrappers from the algo call back to the bus driver, which knows to handle its custom data. Only pca9665_reset resides inside the algorithm code and does not know how to handle a custom data structure. This can result in a kernel crash. Fix by re-factoring pca_reset() from a macro to a function handling chip specific code, and only call adap->reset_chip() if the chip is not PCA9665. Signed-off-by: Thomas Kavanagh <tkavanagh@juniper.net> Signed-off-by: Guenter Roeck <groeck@juniper.net> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
| * | i2c: mpc: Wait for STOP to hit the busJoakim Tjernlund2012-09-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mpc_i2c_stop() only initiates STOP but does not wait for it to hit the I2C bus. This is a problem when using I2C devices which uses fairly long clock stretching just before STOP if you also have an i2c-mux which may switch to another bus before STOP has been processed. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
| * | i2c: davinci: preparation for switch to common clock frameworkMurali Karicheri2012-09-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As a first step towards migrating davinci platforms to use common clock framework, replace all instances of clk_enable() with clk_prepare_enable() and clk_disable() with clk_disable_unprepare(). Until the platform is switched to use the CONFIG_HAVE_CLK_PREPARE Kconfig variable, this just adds a might_sleep() call and would work without any issues. This will make it easy later to switch to common clk based implementation of clk driver from DaVinci specific driver. Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
| * | omap-i2c: fix incorrect log message when using a device treeFlorian Vaussard2012-09-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When booting using a device tree, the adapter number is dynamically assigned after the log message is sent. This patch modifies the log message to get a correct adapter id. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Tested-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Shubhrajyoti D <shubhrajyoti@ti.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
| * | i2c: omap: sanitize exit pathFelipe Balbi2012-09-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | move the goto out label one line down, so that it can be used when stat is read as zero. All other exits, can be done with a break statement. While at that, also break out as soon as we complete draining IRQ, since at that time we know we transferred everything there was to be transferred. Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
| * | i2c: omap: switch over to autosuspend APIFelipe Balbi2012-09-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | this helps us reduce unnecessary pm transitions in case we have another i2c message starting soon. Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
| * | i2c: omap: remove unnecessary pm_runtime_suspended checkFelipe Balbi2012-09-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | before starting any messages we call pm_runtime_get_sync() which will make sure that by the time we program a transfer and our IRQ handler gets called, we're not suspended anymore. Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
| * | i2c: omap: switch to threaded IRQ supportFelipe Balbi2012-09-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | for OMAP2, we can easily switch over to threaded IRQs on the I2C driver. This will allow us to spend less time in hardirq context. Signed-off-by: Felipe Balbi <balbi@ti.com> [Trivial formating changes] Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
| * | i2c: omap: remove redundant status readShubhrajyoti D2012-09-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | Currently omap_i2c_ack_stat doesn't use the stat variable. After the read of the I2C_STAT_REG it is not used. Remove the redundant read of the status register. Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
| * | i2c: omap: get rid of the "complete" labelFelipe Balbi2012-09-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | we can ack stat and complete the command from the errata handling itself. Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
| * | i2c: omap: resize fifos before each messageFelipe Balbi2012-09-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch will try to avoid the usage of draining feature by reconfiguring the FIFO the start condition of each message based on the message's size. By doing that, we will be better utilizing the FIFO when doing big transfers. While at that also drop the now unneeded check for dev->buf_len as we always know the amount of data to be transmitted. Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
| * | i2c: omap: simplify IRQ exit pathFelipe Balbi2012-09-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | instead of having multiple return points, use a goto statement to make that clearer. Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
| * | i2c: omap: always return IRQ_HANDLEDFelipe Balbi2012-09-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Always return IRQ_HANDLED otherwise we could get our IRQ line disabled due to many spurious IRQs. Signed-off-by: Felipe Balbi <balbi@ti.com> [Trivial changes to commitlogs] Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
| * | i2c: omap: simplify errata checkFelipe Balbi2012-09-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | omap_i2c_dev is allocated with kzalloc(), so we need not initialize b_hw to zero. Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
| * | i2c: omap: bus: add a receiver flagFelipe Balbi2012-09-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | that way we can ignore TX IRQs while in receiver mode and ignore RX IRQs while in transmitter mode. Signed-off-by: Felipe Balbi <balbi@ti.com> [Remove unnecessary braces] Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
| * | i2c: omap: switch to platform_get_irq()Felipe Balbi2012-09-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | that's a nice helper from drivers core which will give us the exact IRQ number, instead of a pointer to an IRQ resource. Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
| * | i2c: omap: ack IRQ in partsFelipe Balbi2012-09-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to flow diagrams on OMAP TRMs, we should ACK the IRQ as they happen. Signed-off-by: Felipe Balbi <balbi@ti.com> [Ack the stat OMAP_I2C_STAT_AL in case of arbitration lost] Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
| * | i2c: omap: switch over to do {} while loopFelipe Balbi2012-09-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | this will make sure that we execute at least once. No functional changes otherwise. Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
| * | i2c: omap: re-factor receive/transmit data loopFelipe Balbi2012-09-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | re-factor the common parts to a separate function, so that code is easier to read and understand. No functional changes. Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
| * | i2c: omap: improve i462 errata handlingFelipe Balbi2012-09-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make it not depend on ISR's local variables in order to make it easier to re-factor the transmit data loop. Also since we are waiting for XUDF(Transmitter underflow) just before writing data lets not flag the underflow. This is anyways going to go once we write the data. Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
| * | i2c: omap: split out [XR]DR and [XR]RDYFelipe Balbi2012-09-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While they do pretty much the same thing, there are a few peculiarities. Specially WRT erratas, it's best to split those out and re-factor the read/write loop to another function which both cases call. This last part will be done on another patch. While at that, also avoid an unncessary register read since dev->fifo_len will always contain the correct amount of data to be transferred. Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
| * | i2c: omap: simplify omap_i2c_ack_stat()Felipe Balbi2012-09-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | stat & BIT(1) is the same as BIT(1), so let's simplify things a bit by removing "stat &" from all omap_i2c_ack_stat() calls. Code snippet (extremely simplified): if (stat & NACK) { ... omap_i2c_ack_stat(dev, stat & NACK); } if (stat & RDR) { ... omap_i2c_ack_stat(dev, stat & RDR); } and so on. The tricky place is only WRT errata handling, for example: if (*stat & (NACK | AL)) { omap_i2c_ack_stat(dev, *stat & (XRDY | XDR)); ... } but in this case, the errata says we must clear XRDY and XDR if that errata triggers, so if they just got enabled or not, it doesn't matter. Another tricky place is RDR | RRDY (likewise for XDR | XRDY): if (stat & (RDR | RRDY)) { ... omap_i2c_ack_stat(dev, stat & (RDR | RRDY)); } again here there will be no issues because those IRQs never fire simultaneously and one will only after after we have handled the previous, that's because the same FIFO is used anyway and we won't shift data into FIFO until we tell the IP "hey, I'm done with the FIFO, you can shift more data" Signed-off-by: Felipe Balbi <balbi@ti.com> Reviewed-by : Santosh Shilimkar <santosh.shilimkar@ti.com> [Added the explaination from the discurssion to the commit logs] Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
| * | i2c: omap: add blank linesFelipe Balbi2012-09-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | trivial patch to aid readability. No functional changes. Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
| * | i2c: omap: decrease indentation level on data handlingFelipe Balbi2012-09-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch intends to decrease the indentation level on the data handling by using the fact that else of if (dev->buf_len) is same as if (!dev->buf_len) if (dev->buf_len) { aaa; } else { bbb; break; } to if (!dev->buf_len) { bbb; break; } aaa; Hence no functional changes. Signed-off-by: Felipe Balbi <balbi@ti.com> Reviewed-by : Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
| * | i2c: omap: simplify num_bytes handlingFelipe Balbi2012-09-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | trivial patch, no functional changes If the fifo is disabled or fifo_size is 0 the num_bytes is set to 1. Else it is set to fifo_size or in case of a draining interrupt the remaining bytes in the buff stat. So the zero check is redundant and can be safely optimised. Signed-off-by: Felipe Balbi <balbi@ti.com> Reviewed-by : Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
| * | i2c: omap: switch to devm_* APIFelipe Balbi2012-09-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | that helps deleting some boiler plate code and lets driver-core manage our resources for us. Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
| * | ARM: dts: add twi nodes for atmel boardsLudovic Desroches2012-09-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | Still use i2c-gpio on boards which have a SoC with a TWI IP which doesn't have clock stretching in transmission mode. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
| * | ARM: dts: add twi nodes for atmel SoCsLudovic Desroches2012-09-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add TWI nodes for atmel SoCs but keep i2c-gpio ones in order to let the choice to the user in dts files. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
| * | ARM: at91: add clocks for I2C DT entriesLudovic Desroches2012-09-12
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Acked-by: Nikolaus Voss <n.voss@weinmann.de> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
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