aboutsummaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAge
* Merge tag 'for_3.14/samsung-clk' of ↵Mike Turquette2014-01-08
|\ | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tfiga/samsung-clk into clk-next-samsung (A bit late) first round of Samsung clock patches for v3.14.
| * ARM: dts: exynos5420: add input clocks to audss clock controllerAndrew Bresticker2014-01-08
| | | | | | | | | | | | | | | | | | | | Specify the remaining input clocks (pll_ref, pll_in, and sclk_pcm_in) for the AudioSS clock controller. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Acked-by: Mike Turquette <mturquette@linaro.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
| * clk: exynos-audss: add support for Exynos 5420Andrew Bresticker2014-01-08
| | | | | | | | | | | | | | | | | | | | The AudioSS block on Exynos 5420 has an additional clock gate for the ADMA bus clock. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Acked-by: Mike Turquette <mturquette@linaro.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
| * ARM: dts: exynos5250: add input clocks to audss clock controllerAndrew Bresticker2014-01-08
| | | | | | | | | | | | | | | | | | | | Specify pll_ref, pll_in, sclk_audio, and sclk_pcm_in for the AudioSS clock controller. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Acked-by: Mike Turquette <mturquette@linaro.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
| * clk: exynos5250: add clock ID for div_pcm0Andrew Bresticker2014-01-08
| | | | | | | | | | | | | | | | | | | | | | | | There is no gate for the PCM clock input to the AudioSS block, so the parent of sclk_pcm is div_pcm0. Add a clock ID for it so that we can reference it in device trees. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Mike Turquette <mturquette@linaro.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
| * clk: exynos-audss: allow input clocks to be specified in device treeAndrew Bresticker2014-01-08
| | | | | | | | | | | | | | | | | | | | | | This allows the input clocks to the Exynos AudioSS block to be specified via device-tree bindings. Default names will be used when an input clock is not given. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Acked-by: Mike Turquette <mturquette@linaro.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
| * clk: exynos-audss: convert to platform deviceAndrew Bresticker2014-01-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Exynos AudioSS clock controller will later be modified to allow input clocks to be specified via device-tree in order to support multiple Exynos SoCs. This will introduce a dependency on the core SoC clock controller being initialized first so that the AudioSS driver can look up its input clocks, but the order in which clock providers are probed in of_clk_init() is not guaranteed. Since deferred probing is not supported in of_clk_init() and the AudioSS block is not the core controller, we can initialize it later as a platform device. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Acked-by: Tomasz Figa <t.figa@samsung.com> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Acked-by: Mike Turquette <mturquette@linaro.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
| * clk: exynos5440: replace clock ID private enums with IDs from DT headerAndrzej Hajda2014-01-08
| | | | | | | | | | | | | | | | | | | | | | The patch replaces private enum clock IDs in the driver with macros provided by the DT header. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Mike Turquette <mturquette@linaro.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
| * ARM: exynos5440: create a DT header defining CLK IDsAndrzej Hajda2014-01-08
| | | | | | | | | | | | | | | | | | | | | | The patch adds header file defining clock IDs. This allows to use macros instead of magic numbers in DT bindings. Signed-off-by: Andrzej Hajda <a.hajda-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org> Signed-off-by: Kyungmin Park <kyungmin.park-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org> Acked-by: Mike Turquette <mturquette@linaro.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
| * clk: exynos5420: replace clock ID private enums with IDs from DT headerAndrzej Hajda2014-01-08
| | | | | | | | | | | | | | | | | | | | | | The patch replaces private enum clock IDs in the driver with macros provided by the DT header. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Mike Turquette <mturquette@linaro.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
| * ARM: exynos5420: create a DT header defining CLK IDsAndrzej Hajda2014-01-08
| | | | | | | | | | | | | | | | | | | | | | The patch adds header file defining clock IDs. This allows to use macros instead of magic numbers in DT bindings. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Mike Turquette <mturquette@linaro.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
| * clk: exynos5250: replace clock ID private enums with IDs from DT headerAndrzej Hajda2014-01-08
| | | | | | | | | | | | | | | | | | | | | | The patch replaces private enum clock IDs in the driver with macros provided by the DT header. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Mike Turquette <mturquette@linaro.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
| * ARM: exynos5250: create a DT header defining CLK IDsAndrzej Hajda2014-01-08
| | | | | | | | | | | | | | | | | | | | | | The patch adds header file defining clock IDs. This allows to use macros instead of magic numbers in DT bindings. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Mike Turquette <mturquette@linaro.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
| * clk: exynos4: replace clock ID private enums with IDs from DT headerAndrzej Hajda2014-01-08
| | | | | | | | | | | | | | | | | | | | | | The patch replaces private enum clock IDs in the driver with macros provided by the DT header. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Mike Turquette <mturquette@linaro.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
| * ARM: exynos4: create a DT header defining CLK IDsAndrzej Hajda2014-01-08
| | | | | | | | | | | | | | | | | | | | | | The patch adds header file defining clock IDs. This allows to use macros instead of magic numbers in DT bindings. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Mike Turquette <mturquette@linaro.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
| * clk: exynos5250: register APLL rate tableAndrew Bresticker2014-01-08
| | | | | | | | | | | | | | | | | | Register the APLL rate table so that we can set the APLL rate from the cpufreq driver. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
| * clk: exynos5250: Add CLK_SET_RATE_PARENT flag to mout_apllSachin Kamat2013-12-30
| | | | | | | | | | | | | | | | | | Add CLK_SET_RATE_PARENT flag to mout_apll clock. This will let us set the clock rate in the cpufreq driver. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
| * clk: samsung: exynos5250: Fix parents of gate clocks from MFC domainTomasz Figa2013-12-30
| | | | | | | | | | | | | | | | | | This patch adds mout_aclk333_sub mux clock and updates gate clocks from MFC domain to have it as their parent as specified in SoC documentation. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Tested-by: Tomasz Figa <t.figa@samsung.com>
| * clk: samsung: exynos5250: Correct parent list of audio muxesTomasz Figa2013-12-30
| | | | | | | | | | | | | | | | | | | | According to SoC documentation, input 5 of mout_audio muxes is connected to xxti (named fin_pll in the driver). This patch corrects defined parent arrays to match SoC documentation. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Tested-by: Tomasz Figa <t.figa@samsung.com>
| * clk: samsung: exynos5250: Add missing unpopulated mux parentsTomasz Figa2013-12-30
| | | | | | | | | | | | | | | | | | | | | | This patch updates mux parent arrays with unpopulated mux inputs, as all inputs need to be specified in parent arrays passed to clk_register_mux(), otherwise clk_set_parent() can generate out of bound accesses to the array. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Tested-by: Tomasz Figa <t.figa@samsung.com>
| * clk: samsung: exynos5250: Fix parent of gate clocks from DISP1 domainTomasz Figa2013-12-30
| | | | | | | | | | | | | | | | | | This patch adds mux_aclk_200_disp1_sub mux clock, which according to SoC documentation is the correct parent of DISP1 gate clocks. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Tested-by: Tomasz Figa <t.figa@samsung.com>
| * clk: samsung: exynos5250: Fix parents of gate clocks from GSCL domainTomasz Figa2013-12-30
| | | | | | | | | | | | | | | | | | | | This patch adds mout_aclk266_gscl_sub mux clock and adjusts definitions of GSCL domain gate clocks to use it as their parent, as specified in SoC documentation. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Tested-by: Tomasz Figa <t.figa@samsung.com>
| * clk: samsung: exynos5250: Make names of mux and div clocks consistentTomasz Figa2013-12-30
| | | | | | | | | | | | | | | | | | | | This patch renames all mux clocks to start with mout_ prefix and all div clocks to start with div_ prefix for consistency with other clocks already defined this way. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Tested-by: Tomasz Figa <t.figa@samsung.com>
| * clk: samsung: exynos5250: Sort definitions by registers and bitfieldTomasz Figa2013-12-30
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch reorders clock definitions, so they are sorted by register addresses and bitfield shifts. When at it, blank lines are added to separate definitions of clocks from different registers. Overall this should make the driver more readable and reduce the number of potential conflicts when adding new entries. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Tested-by: Tomasz Figa <t.figa@samsung.com>
| * Merge branch 'samsung-fixes' into samsung-next-baseTomasz Figa2013-12-30
| |\
| | * clk: exynos: File scope reg_save array should depend on PM_SLEEPKrzysztof Kozlowski2013-12-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move reg_save[] into CONFIG_PM_SLEEP dependency block as it is used only by suspend and resume functions. This fixes the warning on CONFIG_PM_SLEEP=n: drivers/clk/samsung/clk-exynos-audss.c:29:22: warning: ‘reg_save’ defined but not used [-Wunused-variable] Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
| | * clk: samsung: exynos5250: Add CLK_IGNORE_UNUSED flag for the sysreg clockAbhilash Kesavan2013-12-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The sysreg (system register) generates control signals for various blocks like disp1blk, i2c, mipi, usb etc. However, it gets disabled as an unused clock at boot-up. This can lead to failures in operation of above blocks, because they can not be configured properly if this clock is disabled. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Acked-by: Mike Turquette <mturquette@linaro.org> [t.figa: Updated patch description.] Signed-off-by: Tomasz Figa <t.figa@samsung.com>
| | * ARM: dts: exynos5250: Fix MDMA0 clock numberAbhilash Kesavan2013-12-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Due to incorrect clock specified in MDMA0 node, using MDMA0 controller could cause system failures, due to wrong clock being controlled. This patch fixes this by specifying correct clock. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Acked-by: Mike Turquette <mturquette@linaro.org> [t.figa: Corrected commit message and description.] Signed-off-by: Tomasz Figa <t.figa@samsung.com>
| | * clk: samsung: exynos5250: Add MDMA0 clocksAbhilash Kesavan2013-12-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds gate clock for MDMA0 on Exynos5250 SoC. This is needed to ensure that the clock is enabled when MDMA0 is used on systems on which firmware gates the clockby default. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Acked-by: Mike Turquette <mturquette@linaro.org> [t.figa: Updated patch description.] Signed-off-by: Tomasz Figa <t.figa@samsung.com>
| | * clk: samsung: exynos5250: Fix ACP gate register offsetAbhilash Kesavan2013-12-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The CLK_GATE_IP_ACP register offset is incorrectly listed making definition of g2d clock incorrect, which may lead to system failures when trying to use G2D on systems on which firmware gates this clock by default. Fix this and the register ordering as well. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Acked-by: Mike Turquette <mturquette@linaro.org> [t.figa: Updated patch description.] Signed-off-by: Tomasz Figa <t.figa@samsung.com>
| | * clk: exynos5250: fix sysmmu_mfc{l,r} gate clocksAndrew Bresticker2013-12-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The gate clocks for the MFC sysmmus appear to be flipped, i.e. GATE_IP_MFC[2] gates sysmmu_mfcl and GATE_IP_MFC[1] gates sysmmu_mfcr. Fix this so that the MFC will start up. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
| | * clk: samsung: exynos4: Correct SRC_MFC registerSeung-Woo Kim2013-12-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SRC_MFC register offset was incorrect, which could cause have caused wrong calculation of rate of sclk_mfc clock, that could in turn lead to incorrect operation of MFC. This patch corrects it. Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com> Acked-by: Mike Turquette <mturquette@linaro.org> [t.figa: Updated patch description] Signed-off-by: Tomasz Figa <t.figa@samsung.com>
* | | ARM: dts: Add clock provider specific properties to max77686 nodeTomasz Figa2014-01-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a label and #clock-cells property to device node of max77686 PMIC to allow using it as a clock provider. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
* | | clk: max77686: Register OF clock providerTomasz Figa2014-01-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If max77686 chip is instantiated from device tree, it is desirable to have an OF clock provider to allow device tree based look-up of clocks. This patch adds OF clock provider registration to the clk-max77686 driver. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
* | | clk: max77686: Refactor driver data handlingTomasz Figa2014-01-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As a prerequisite for further patch adding OF clock provider support to the driver, this patch changes the driver to store an array of struct clk * as driver data. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
* | | clk: max77686: Fix clean-up in error and remove pathsTomasz Figa2014-01-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes invalid kfree() and adds missing call to clk_unregister() in error and remove paths in max77686_clk_probe(). While at it, error handling is also cleaned up. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
* | | clk: max77686: Make max77686_clk_register() return struct clk *Tomasz Figa2014-01-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As a preparation for further patches, this patch modifies the clock registration helper function to return a pointer to the newly registered clock. No functional change is done to the driver. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
* | | clk: max77686: Refactor successful exit of probe functionTomasz Figa2014-01-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The function can simply return 0, without jumping to a separate label, which does exactly the same. This patch does not introduce any functional change, just a clean-up. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
* | | clk: max77686: Provide .recalc_rate() operationTomasz Figa2014-01-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | It is usually nice to know frequency of a clock, so this patch adds a .recalc_rate() callback returning rates of provided clocks. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
* | | clk: max77686: Correct callback used for checking clock statusTomasz Figa2014-01-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Changing status of clock gates in max77686 requires i2c transfers, which can sleep, so this is done in prepare and unprepare callbacks. Due to this, checking whether whether the clock is ungated must be done in is_prepared() callback as well, for consistency. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
* | | MAINTAINERS: Add entry for Samsung SoC clock driversTomasz Figa2014-01-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds an entry for Samsung SoC clock drivers located under drivers/clk/samsung/ directory, with me taking the maintainer role. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Mike Turquette <mturquette@linaro.org> Acked-by: Sachin Kamat <sachin.kamat@linaro.org> Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Acked-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
* | | Merge branch 'clk-next-unregister' into clk-nextMike Turquette2013-12-31
|\ \ \ | | | | | | | | | | | | | | | | Conflicts: drivers/clk/clk.c
| * \ \ Merge branch 'clk/clk-unregister' of git://linuxtv.org/snawrocki/samsung ↵Mike Turquette2013-12-04
| |\ \ \ | | | | | | | | | | | | | | | into clk-next-unregister
| | * | | clk: Implement clk_unregisterSylwester Nawrocki2013-12-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk_unregister() is currently not implemented and it is required when a clock provider module needs to be unloaded. Normally the clock supplier module is prevented to be unloaded by taking reference on the module in clk_get(). For cases when the clock supplier module deinitializes despite the consumers of its clocks holding a reference on the module, e.g. when the driver is unbound through "unbind" sysfs attribute, there are empty clock ops added. These ops are assigned temporarily to struct clk and used until all consumers release the clock, to avoid invoking callbacks from the module which just got removed. Signed-off-by: Jiada Wang <jiada_wang@mentor.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
| | * | | clk: Add common __clk_get(), __clk_put() implementationsSylwester Nawrocki2013-12-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds common __clk_get(), __clk_put() clkdev helpers that replace their platform specific counterparts when the common clock API is used. The owner module pointer field is added to struct clk so a reference to the clock supplier module can be taken by the clock consumers. The owner module is assigned while the clock is being registered, in functions _clk_register() and __clk_register(). Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | | clkdev: Fix race condition in clock lookup from device treeSylwester Nawrocki2013-12-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is currently a race condition in the device tree part of clk_get() function, since the pointer returned from of_clk_get_by_name() may become invalid before __clk_get() call. E.g. due to the clock provider driver remove() callback being called in between of_clk_get_by_name() and __clk_get(). Fix this by doing both the look up and __clk_get() operations with the clock providers list mutex held. This ensures that the clock pointer returned from __of_clk_get_from_provider() call and passed to __clk_get() is valid, as long as the clock supplier module first removes its clock provider instance and then does clk_unregister() on the corresponding clocks. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Mike Turquette <mturquette@linaro.org> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | | clk: Provide not locked variant of of_clk_get_from_provider()Sylwester Nawrocki2013-12-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add helper functions for the of_clk_providers list locking and an unlocked variant of of_clk_get_from_provider(). These functions are intended to be used in the clkdev to avoid race condition in the device tree based clock look up in clk_get(). Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | | omap3isp: Modify clocks registration to avoid circular referencesSylwester Nawrocki2013-12-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The clock core code is going to be modified so clk_get() takes reference on the clock provider module. Until the potential circular reference issue is properly addressed, we pass NULL as the first argument to clk_register(), in order to disallow sub-devices taking a reference on the ISP module back trough clk_get(). This should prevent locking the modules in memory. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
* | | | | Merge branch 'for_3.14/keystone-clk' of ↵Mike Turquette2013-12-30
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into clk-next-keystone
| * | | | | clk: keystone: gate: fix error handling on initGrygorii Strashko2013-12-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes Keystone gate control clock driver initialization path: 1) clk_register_psc() returns error code and not a pure pointer, hence its return value need to be checked using IS_ERR(clk) macro. 2) Mapped IO memory isn't unmapped in case of errors, hence fix it. Cc: Mike Turquette <mturquette@linaro.org Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-08 06:02:53 -0400