diff options
author | Tomasz Figa <t.figa@samsung.com> | 2013-10-15 13:41:19 -0400 |
---|---|---|
committer | Tomasz Figa <t.figa@samsung.com> | 2013-12-30 12:15:48 -0500 |
commit | 256dd646a30fb7bc6720b636e8b9098cd492e603 (patch) | |
tree | 2d6283636c7c44f25248abb28e127949e4d00901 | |
parent | 3818f11740bbf87ad76f4f502f6739c8d62e5c17 (diff) |
clk: samsung: exynos5250: Add missing unpopulated mux parents
This patch updates mux parent arrays with unpopulated mux inputs, as all
inputs need to be specified in parent arrays passed to
clk_register_mux(), otherwise clk_set_parent() can generate out of bound
accesses to the array.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Tested-by: Tomasz Figa <t.figa@samsung.com>
-rw-r--r-- | drivers/clk/samsung/clk-exynos5250.c | 16 |
1 files changed, 12 insertions, 4 deletions
diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c index d29faabd2150..73334b8d9f66 100644 --- a/drivers/clk/samsung/clk-exynos5250.c +++ b/drivers/clk/samsung/clk-exynos5250.c | |||
@@ -204,19 +204,27 @@ PNAME(mout_usb3_p) = { "mout_mpll_user", "mout_cpll" }; | |||
204 | PNAME(mout_group1_p) = { "fin_pll", "fin_pll", "sclk_hdmi27m", | 204 | PNAME(mout_group1_p) = { "fin_pll", "fin_pll", "sclk_hdmi27m", |
205 | "sclk_dptxphy", "sclk_uhostphy", "sclk_hdmiphy", | 205 | "sclk_dptxphy", "sclk_uhostphy", "sclk_hdmiphy", |
206 | "mout_mpll_user", "mout_epll", "mout_vpll", | 206 | "mout_mpll_user", "mout_epll", "mout_vpll", |
207 | "mout_cpll" }; | 207 | "mout_cpll", "none", "none", |
208 | "none", "none", "none", | ||
209 | "none" }; | ||
208 | PNAME(mout_audio0_p) = { "cdclk0", "fin_pll", "sclk_hdmi27m", "sclk_dptxphy", | 210 | PNAME(mout_audio0_p) = { "cdclk0", "fin_pll", "sclk_hdmi27m", "sclk_dptxphy", |
209 | "sclk_uhostphy", "sclk_hdmiphy", | 211 | "sclk_uhostphy", "sclk_hdmiphy", |
210 | "mout_mpll_user", "mout_epll", "mout_vpll", | 212 | "mout_mpll_user", "mout_epll", "mout_vpll", |
211 | "mout_cpll" }; | 213 | "mout_cpll", "none", "none", |
214 | "none", "none", "none", | ||
215 | "none" }; | ||
212 | PNAME(mout_audio1_p) = { "cdclk1", "fin_pll", "sclk_hdmi27m", "sclk_dptxphy", | 216 | PNAME(mout_audio1_p) = { "cdclk1", "fin_pll", "sclk_hdmi27m", "sclk_dptxphy", |
213 | "sclk_uhostphy", "sclk_hdmiphy", | 217 | "sclk_uhostphy", "sclk_hdmiphy", |
214 | "mout_mpll_user", "mout_epll", "mout_vpll", | 218 | "mout_mpll_user", "mout_epll", "mout_vpll", |
215 | "mout_cpll" }; | 219 | "mout_cpll", "none", "none", |
220 | "none", "none", "none", | ||
221 | "none" }; | ||
216 | PNAME(mout_audio2_p) = { "cdclk2", "fin_pll", "sclk_hdmi27m", "sclk_dptxphy", | 222 | PNAME(mout_audio2_p) = { "cdclk2", "fin_pll", "sclk_hdmi27m", "sclk_dptxphy", |
217 | "sclk_uhostphy", "sclk_hdmiphy", | 223 | "sclk_uhostphy", "sclk_hdmiphy", |
218 | "mout_mpll_user", "mout_epll", "mout_vpll", | 224 | "mout_mpll_user", "mout_epll", "mout_vpll", |
219 | "mout_cpll" }; | 225 | "mout_cpll", "none", "none", |
226 | "none", "none", "none", | ||
227 | "none" }; | ||
220 | PNAME(mout_spdif_p) = { "sclk_audio0", "sclk_audio1", "sclk_audio2", | 228 | PNAME(mout_spdif_p) = { "sclk_audio0", "sclk_audio1", "sclk_audio2", |
221 | "spdif_extclk" }; | 229 | "spdif_extclk" }; |
222 | 230 | ||