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* drm/i915: Use the LLC mode on gen6 for everything but display.Eric Anholt2011-06-10
| | | | | | | | | | | | | Improves full-screen openarena on my laptop 20.3% +/- 4.0% (n=3) Improves 800x600 nexuiz on my laptop 12.3% +/- 0.1% (n=3) We have more room to improve with doing LLC caching for display using GFDT, and in doing LLC+MLC caching, but this was an easy performance win and incremental improvement toward those two. Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915: Use the uncached domain for the display planesEric Anholt2011-06-10
| | | | | | | | | | | | | | | | | | The simplest and common method for ensuring scanout coherency on all chipsets is to mark the scanout buffers as uncached (and for userspace to remember to flush the render cache every so often). We can improve upon this for later generations by marking scanout objects as GFDT and only flush those cachelines when required. However, we start simple. [v2: Move the set to uncached above the clflush. Otherwise, we'd skip the clflush and try to scan out data that was still sitting in the cache.] Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915: Combine pinning with setting to the display planeChris Wilson2011-06-10
| | | | | | | | | | | | | We need to perform a few operations in order to move the object into the display plane (where it can be accessed coherently by the display engine) that are important for future safety to forbid whilst pinned. As a result, we want to need to perform some of the operations before pinning, but some are required once we have been bound into the GTT. So combine the pinning performed by all the callers with set_to_display_plane(), so this complication is contained within the single function. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915: Mark the cursor and the overlay as being part of the display planesChris Wilson2011-06-10
| | | | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Eric Anholt <eric@anholt.net> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915: Add an interface to dynamically change the cache levelChris Wilson2011-06-10
| | | | | | | | | | | | | [anholt v2: Don't forget that when going from cached to uncached, we haven't been tracking the write domain from the CPU perspective, since we haven't needed it for GPU coherency.] [ickle v3: We also need to make sure we relinquish any fences on older chipsets and clear the GTT for sane domain tracking.] Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Eric Anholt <eric@anholt.net> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915/gtt: Split out i915_gem_gtt_rebind_object()Chris Wilson2011-06-10
| | | | | | | | ... in preparation for changing the cache level (and thus the flags upon the PTEs) dynamically. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915: Introduce i915_gem_object_finish_gtt()Chris Wilson2011-06-10
| | | | | | | | | | | | | | | | | Like its siblings finish_gpu(), this function clears the object from the GTT domain forcing it to be trigger a domain invalidation should we ever need to use via the GTT again. Note that the most important side-effect of finishing the GTT domain (aside from clearing the tracking read/write domains) is that it imposes an memory barrier so that all accesses are complete before it returns, which is important if you intend to be modifying translation tables shortly afterwards. The second most important side-effect is that it tears down the GTT mappings forcing a page-fault and invalidation on next user access to the object. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915: Introduce i915_gem_object_finish_gpu()Chris Wilson2011-06-09
| | | | | | | | | | ... reincarnated from i915_gem_object_flush_gpu(). The semantic difference is that after calling finish_gpu() the object no longer resides in any GPU domain, and so will cause the GPU caches to be invalidated if it is ever used again. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915: Call intel_enable_plane from i9xx_crtc_mode_set (again)Keith Packard2011-06-09
| | | | | | | This change got placed in the ironlake path instead of the 9xx path during a recent code shuffle. Signed-off-by: Keith Packard <keithp@keithp.com>
* Merge branch 'drm-fixes' of ↵Linus Torvalds2011-06-07
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6 * 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: drm/nv40: fall back to paged dma object for the moment drm/nouveau: fix leak of gart mm node drm/nouveau: fix vram page mapping when crossing page table boundaries drm/nv17-nv40: Fix modesetting failure when pitch == 4096px (fdo bug 35901). drm/nouveau: don't create accel engine objects when noaccel=1 drm/nvc0: recognise 0xdX chipsets as NV_C0 drm/i915: Add a no lvds quirk for the Asus EeeBox PC EB1007 drm/i915: Share the common force-audio property between connectors drm/i915: Remove unused enum "chip_family" drm/915: fix relaxed tiling on gen2: tile height drm/i915/crt: Explicitly return false if connected to a digital monitor drm/i915: Replace ironlake_compute_wm0 with g4x_compute_wm0 drm/i915: Only print out the actual number of fences for i915_error_state drm/i915: s/addr & ~PAGE_MASK/offset_in_page(addr)/ drm: i915: correct return status in intel_hdmi_mode_valid() drm/i915: fix regression after clock gating init split drm/i915: fix if statement in ivybridge irq handler
| * Merge remote branch 'nouveau/drm-nouveau-fixes' of /ssd/git/drm-nouveau-next ↵Dave Airlie2011-06-06
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into drm-fixes * 'nouveau/drm-nouveau-fixes' of /ssd/git/drm-nouveau-next: drm/nv40: fall back to paged dma object for the moment drm/nouveau: fix leak of gart mm node drm/nouveau: fix vram page mapping when crossing page table boundaries drm/nv17-nv40: Fix modesetting failure when pitch == 4096px (fdo bug 35901). drm/nouveau: don't create accel engine objects when noaccel=1 drm/nvc0: recognise 0xdX chipsets as NV_C0
| | * drm/nv40: fall back to paged dma object for the momentBen Skeggs2011-06-06
| | | | | | | | | | | | | | | | | | | | | PCI(E)GART isn't quite stable it seems, fall back to old method until I get the time to sort it out properly. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * drm/nouveau: fix leak of gart mm nodeBen Skeggs2011-06-06
| | | | | | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * drm/nouveau: fix vram page mapping when crossing page table boundariesBen Skeggs2011-06-06
| | | | | | | | | | | | | | | | | | Hopefully the cause of nvc0 "page jumping" issue. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * drm/nv17-nv40: Fix modesetting failure when pitch == 4096px (fdo bug 35901).Francisco Jerez2011-06-06
| | | | | | | | | | | | | | | | | | | | | Reported-by: Mario Bachmann <grafgrimm77@gmx.de> Tested-by: Greg Turner <gmturner007@ameritech.net> Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * drm/nouveau: don't create accel engine objects when noaccel=1Ben Skeggs2011-06-06
| | | | | | | | | | | | | | | | | | Fixes various potential oopses. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * drm/nvc0: recognise 0xdX chipsets as NV_C0Ben Skeggs2011-06-06
| | | | | | | | | | | | | | | | | | | | | Should hopefully get modesetting at least from this, it appears these are GF119 chipsets. Accel will come eventually, once I order a board. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * | Merge remote branch 'keithp/drm-intel-fixes' of /ssd/git/drm-next into drm-fixesDave Airlie2011-06-06
| |\ \ | | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'keithp/drm-intel-fixes' of /ssd/git/drm-next: drm/i915: Add a no lvds quirk for the Asus EeeBox PC EB1007 drm/i915: Share the common force-audio property between connectors drm/i915: Remove unused enum "chip_family" drm/915: fix relaxed tiling on gen2: tile height drm/i915/crt: Explicitly return false if connected to a digital monitor drm/i915: Replace ironlake_compute_wm0 with g4x_compute_wm0 drm/i915: Only print out the actual number of fences for i915_error_state drm/i915: s/addr & ~PAGE_MASK/offset_in_page(addr)/ drm: i915: correct return status in intel_hdmi_mode_valid() drm/i915: fix regression after clock gating init split drm/i915: fix if statement in ivybridge irq handler
| | * drm/i915: Add a no lvds quirk for the Asus EeeBox PC EB1007Hans de Goede2011-06-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I found this while figuring out why gnome-shell would not run on my Asus EeeBox PC EB1007. As a standalone "pc" this device cleary does not have an internal panel, yet it claims it does. Add a quirk to fix this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Keith Packard <keithp@keithp.com> cc: stable@kernel.org Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: Share the common force-audio property between connectorsChris Wilson2011-06-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | Make the audio property creation routine common and share the single property between the connectors. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Keith Packard <keithp@keithp.com> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: Remove unused enum "chip_family"Chris Wilson2011-06-04
| | | | | | | | | | | | | | | | | | | | | | | | Superseded by the tracking the render generation in the chipset capabiltiies struct. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/915: fix relaxed tiling on gen2: tile heightDaniel Vetter2011-06-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A tile on gen2 has a size of 2kb, stride of 128 bytes and 16 rows. Userspace was broken and assumed 8 rows. Chris Wilson noted that the kernel unfortunately can't reliable check that because libdrm rounds up the size to the next bucket. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915/crt: Explicitly return false if connected to a digital monitorChris Wilson2011-06-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than proceed on and silently return false by default, mention why we rejected the presence of an EDID as implying the presence of a VGA monitor. (The question arises whether there is a broken EDID which falsely reports a digital connection when attached by VGA.) Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Keith Packard <keithp@keithp.com> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: Replace ironlake_compute_wm0 with g4x_compute_wm0Chris Wilson2011-06-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The computation of the first-level watermarks for g4x and gen5+ are based on the same algorithm, so we can refactor those code paths to use a single function. Note that g4x_compute_wm0 takes a 'plane' argument while ironlake_compute_wm0 took a 'pipe' argument. Both should have used a 'plane' argument, so this patch fixes that as well (not that it caused a problem; ironlake always uses pipe == plane). Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Keith Packard <keithp@keithp.com> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: Only print out the actual number of fences for i915_error_stateDaniel Vetter2011-06-04
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Keith Packard <keithp@keithp.com> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: s/addr & ~PAGE_MASK/offset_in_page(addr)/Chris Wilson2011-06-04
| | | | | | | | | | | | | | | | | | | | | | | | Convert our open coded offset_in_page() to the common macro. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Keith Packard <keithp@keithp.com> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm: i915: correct return status in intel_hdmi_mode_valid()Nicolas Kaiser2011-06-04
| | | | | | | | | | | | | | | | | | Signed-off-by: Nicolas Kaiser <nikai@nikai.net> Reviewed-by: Keith Packard <keithp@keithp.com> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: fix regression after clock gating init splitJason Stubbs2011-06-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | During the refactoring in revision 6067aaeadb5b3df26f27ac827256b1ef01e674f5, the intel_enable_clock_gating was split up into several functions that are then called indirectly. However, which function to call was not specified for the IS_PINEVIEW() case. This patch specifies the correct gating function. Signed-off-by: Jason Stubbs <jasonbstubbs@gmail.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: fix if statement in ivybridge irq handlerDan Carpenter2011-06-04
| | | | | | | | | | | | | | | | | | | | | | | | The extra semicolon was not intended. Signed-off-by: Dan Carpenter <error27@gmail.com> Reviewed-by: Keith Packard <keithp@keithp.com> Signed-off-by: Keith Packard <keithp@keithp.com>
* | | Merge branch 'drm-radeon-fixes' of ↵Linus Torvalds2011-06-07
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6 * 'drm-radeon-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: drm/radeon/kms/atom: fix PHY init drm/radeon/kms: add missing Evergreen texture formats to the CS parser drm/radeon/kms: viewport height has to be even drm/radeon/kms: remove duplicate reg from r600 safe regs drm/radeon/kms: add support for Llano Fusion APUs drm/radeon/kms: add llano pci ids drm/radeon/kms: fill in asic struct for llano drm/radeon/kms: add family ids for llano APUs drm/radeon: fix oops in ttm reserve when pageflipping (v2) drm/radeon/kms: clean up the radeon kms Kconfig drm/radeon/kms: fix thermal sensor reading on juniper drm/radeon/kms: add missing case for cayman thermal sensor drm/radeon/kms: add blit support for cayman (v2) drm/radeon/kms/blit: workaround some hw issues on evergreen+
| * | | drm/radeon/kms/atom: fix PHY initAlex Deucher2011-06-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PHY was not initialized correctly after ac89af1e1010640db072416c786f97391b85790f since the function bailed early as an encoder was not assigned. The encoder isn't necessary for PHY init so just assign to 0 for init so that the table is executed. Reported-by: Ari Savolainen <ari.m.savolainen@gmail.com> Tested-by: Ari Savolainen <ari.m.savolainen@gmail.com> Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | | drm/radeon/kms: add missing Evergreen texture formats to the CS parserMarek Olšák2011-06-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BC6 and BC7 are described in ARB_texture_compression_bptc. No idea what FMT_32_AS_32_32_32_32 is good for. Signed-off-by: Marek Olšák <maraeo@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | | drm/radeon/kms: viewport height has to be evenAlex Deucher2011-06-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Otherwise, no vblank interrupts. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=37522 Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Cc: stable@kernel.org Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | | drm/radeon/kms: remove duplicate reg from r600 safe regsAlex Deucher2011-06-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | It got added twice by accident. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | | drm/radeon/kms: add support for Llano Fusion APUsAlex Deucher2011-06-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - add gpu init support - add blit support - add ucode loader Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | | drm/radeon/kms: add llano pci idsAlex Deucher2011-06-01
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | | drm/radeon/kms: fill in asic struct for llanoAlex Deucher2011-06-01
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | | drm/radeon/kms: add family ids for llano APUsAlex Deucher2011-06-01
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | | drm/radeon: fix oops in ttm reserve when pageflipping (v2)Dave Airlie2011-06-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We need to take a reference to this object, pinning doesn't take a reference so if userspace deletes the object it can disappear even if pinned. v2: fix error paths to unreference properly also. should fix: https://bugzilla.kernel.org/show_bug.cgi?id=32402 and https://bugzilla.redhat.com/show_bug.cgi?id=680651 Acked-By: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | | drm/radeon/kms: clean up the radeon kms KconfigAlex Deucher2011-05-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - no longer in staging - all radeons supported Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | | drm/radeon/kms: fix thermal sensor reading on juniperAlex Deucher2011-05-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Uses a different method than other evergreen asics. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | | drm/radeon/kms: add missing case for cayman thermal sensorAlex Deucher2011-05-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The rest of the code is already in place. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | | drm/radeon/kms: add blit support for cayman (v2)Alex Deucher2011-05-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allows us to use the 3D engine for memory management and allows us to use vram beyond the BAR aperture. v2: fix copy paste typo Reported-by: Nils Wallménius <nils.wallmenius@gmail.com> Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | | drm/radeon/kms/blit: workaround some hw issues on evergreen+Alex Deucher2011-05-25
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | | | Merge branch 'timers-fixes-for-linus' of ↵Linus Torvalds2011-06-07
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'timers-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: timers: Consider slack value in mod_timer() clockevents: Handle empty cpumask gracefully
| * | | | timers: Consider slack value in mod_timer()Sebastian Andrzej Siewior2011-06-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is an optimization which does not update the timer if the timer was pending and the expiration time was unchanged. Since commit 3bbb9ec9 ("timers: Introduce the concept of timer slack for legacy timers") this optimization is no longer applied for timers where the expiration time got extended due to the slack value. So we need to check again after the expiration time might have been updated. [ tglx: Made it a single check by applying slack first and sorting out the slack = 0 value (all timeouts < 256 jiffies) early ] Signed-off-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc> Link: http://lkml.kernel.org/r/20110521105828.GA29442@Chamillionaire.breakpoint.cc Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
| * | | | clockevents: Handle empty cpumask gracefullyThomas Gleixner2011-06-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For UP it's stupid to request an initialized cpumask for the clock event devices. Though we need the mask set even on UP to avoid a horrible ifdeffery especially in the broadcast code. For SMP we can at least try to survive with a warning and set the cpumask of the cpu we're running on. That gives a decent chance to bring the machine up and retrieve the debug info. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Linus Walleij <linus.walleij@linaro.org Cc: Lee Jones <lee.jones@linaro.org> Cc: Russell King - ARM Linux <linux@arm.linux.org.uk> Cc: Stephen Boyd <sboyd@codeaurora.org>
* | | | | Merge branch 'kvm-updates/3.0' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds2011-06-07
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'kvm-updates/3.0' of git://git.kernel.org/pub/scm/virt/kvm/kvm: KVM: Initialize kvm before registering the mmu notifier KVM: x86: use proper port value when checking io instruction permission KVM: add missing void __user * cast to access_ok() call
| * | | | | KVM: Initialize kvm before registering the mmu notifierMike Waychison2011-06-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It doesn't make sense to ever see a half-initialized kvm structure on mmu notifier callbacks. Previously, 85722cda changed the ordering to ensure that the mmu_lock was initialized before mmu notifier registration, but there is still a race where the mmu notifier could come in and try accessing other portions of struct kvm before they are intialized. Solve this by moving the mmu notifier registration to occur after the structure is completely initialized. Google-Bug-Id: 452199 Signed-off-by: Mike Waychison <mikew@google.com> Signed-off-by: Avi Kivity <avi@redhat.com>
| * | | | | KVM: x86: use proper port value when checking io instruction permissionMarcelo Tosatti2011-06-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit f6511935f42 moved the permission check for io instructions to the ->check_perm callback. It failed to copy the port value from RDX register for string and "in,out ax,dx" instructions. Fix it by reading RDX register at decode stage when appropriate. Fixes FC8.32 installation. Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
generated by cgit v1.2.2 (git 2.25.0) at 2024-09-22 20:15:38 -0400