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* Merge tag 'drm/for-3.14-rc1' of git://anongit.freedesktop.org/tegra/linux ↵Dave Airlie2013-12-22
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into drm-next drm/tegra: Changes for v3.14-rc1 This series of changes brings DRM panel support as well as initial code to register DSI hosts and peripherals and bind them to DSI drivers. The panel and DSI code are both used by the simple panel driver. The Tegra-specific changes build on top of this work to add support for various panels found on Tegra boards. New drivers enable the DSI host found on Tegra114 and a special hardware block that calibrates the pads used for DSI and CSI. The host1x and the display controller drivers gain basic Tegra124 support. To round of the new features, the DRM driver now sports a very simple PRIME implementation. In addition there are various improvements such as the host1x API being exported so that client drivers (like the Tegra DRM driver) can be built as modules. HDMI now does better power management and legacy FBDEV can now be disabled via Kconfig (though it's still enabled by default). A few sparse warnings have been squashed and various parts of the code have become more robust. * tag 'drm/for-3.14-rc1' of git://anongit.freedesktop.org/tegra/linux: (121 commits) drm/tegra: fix compile w/ CONFIG_DYNAMIC_DEBUG drm/tegra: Add PRIME support drm/tegra: Relocate some output-specific code drm/tegra: Add Tegra124 DC support drm/tegra: Fix small leak on error in tegra_fb_alloc() drm/tegra: Make legacy fbdev support optional drm/tegra: Sort reverse-dependencies alphabetically drm/tegra: Fix return value check drm/tegra: Add DSI support drm/tegra: Disable outputs for power-saving drm/tegra: Track HDMI enable state drm/tegra: Fix HDMI audio frequency typo drm/tegra: Do not export tegra_bo_ops drm/tegra: Remove spurious blank line drm/tegra: Increase compile test coverage drm/tegra: Allow the driver to be built as a module gpu: host1x: Add Tegra124 support gpu: host1x: clk_round_rate() can return a zero upon error gpu: host1x: Fix build warnings gpu: host1x: Increase compile test coverage ...
| * drm/tegra: fix compile w/ CONFIG_DYNAMIC_DEBUGStephen Warren2013-12-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | With CONFIG_DYNAMIC_DEBUG=y, the following compile error occurs: drivers/gpu/drm/tegra/mipi-phy.c: In function ‘mipi_dphy_timing_validate’: drivers/gpu/drm/tegra/mipi-phy.c:69:11: error: ‘EINVAL’ undeclared (first use in this function) drivers/gpu/drm/tegra/mipi-phy.c:69:11: note: each undeclared identifier is reported only once for each function it appears in Fix this by directly including the header that defines EINVAL. Fixes: dec727399a4b ("drm/tegra: Add DSI support") Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| * drm/tegra: Add PRIME supportThierry Reding2013-12-20
| | | | | | | | | | | | | | | | Implement very basic PRIME support. This currently only works with buffers that are contiguous in memory and will refuse to import any physically non-contiguous buffers. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * drm/tegra: Relocate some output-specific codeThierry Reding2013-12-20
| | | | | | | | | | | | | | | | Some of the code in the CRTC's mode setting code is specific to the RGB output or needs to be called slightly differently depending on the type of output. Push that code down into the output drivers. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * drm/tegra: Add Tegra124 DC supportThierry Reding2013-12-20
| | | | | | | | | | | | | | | | Tegra124 and later support interlacing, but the driver doesn't support it yet. Make sure interlacing stays disabled on hardware that supports it. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * drm/tegra: Fix small leak on error in tegra_fb_alloc()Dan Carpenter2013-12-20
| | | | | | | | | | | | | | If we don't have enough memory for ->planes then we leak "fb". Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| * drm/tegra: Make legacy fbdev support optionalThierry Reding2013-12-20
| | | | | | | | | | | | | | | | | | | | | | A lot of the modern userspace is capable of working without the legacy fbdev support. kmscon can be used as a replacement for the framebuffer console, and KMS X drivers create their own framebuffers. Most people don't have a system where all of this works yet, though, so leave support enabled by default. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * drm/tegra: Sort reverse-dependencies alphabeticallyThierry Reding2013-12-20
| | | | | | | | | | | | | | Move the TEGRA_HOST1X and DRM_KMS_HELPER entries around to keep the list sorted. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * drm/tegra: Fix return value checkWei Yongjun2013-12-20
| | | | | | | | | | | | | | | | | | In case of error, the devm_ioremap_resource() function returns ERR_PTR() and never NULL. The NULL test in the return value check should therefore be replaced with IS_ERR(). Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Thierry Reding <treding@nvidia.com>
| * drm/tegra: Add DSI supportThierry Reding2013-12-20
| | | | | | | | | | | | | | | | | | | | | | This commit adds support for both DSI outputs found on Tegra. Only very minimal functionality is implemented, so advanced features like ganged mode won't work. Due to the lack of other test hardware, some sections of the driver are hardcoded to work with Dalmore. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * drm/tegra: Disable outputs for power-savingThierry Reding2013-12-19
| | | | | | | | | | | | | | | | | | | | | | | | | | When an output is disabled, its DPMS mode is usually set to off. Instead of only disabling the panel (if one is attached), turn the output off entirely to save more power. HDMI doesn't have any panels attached, so it previously didn't save any power at all. With this commit, however, the complete HDMI interface will be turned off, therefore allowing an attached monitor to go into a standby mode. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * drm/tegra: Track HDMI enable stateThierry Reding2013-12-19
| | | | | | | | | | | | | | | | | | The DRM core doesn't track enable and disable state of encoders and/or connectors, so calls to the output's .enable() and .disable() are not guaranteed to be balanced. Track the enable state internally so that calls to regulator and clock frameworks remain balanced. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * drm/tegra: Fix HDMI audio frequency typoThierry Reding2013-12-19
| | | | | | | | | | | | The correct check is for 48 kHz, not 480 kHz. Found by Coverity. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * drm/tegra: Do not export tegra_bo_opsThierry Reding2013-12-19
| | | | | | | | | | | | | | These buffer object operations are never used outside of the GEM implementation so there is no use in exporting them. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * drm/tegra: Remove spurious blank lineThierry Reding2013-12-19
| | | | | | | | Signed-off-by: Thierry Reding <treding@nvidia.com>
| * drm/tegra: Increase compile test coverageThierry Reding2013-12-19
| | | | | | | | | | | | | | | | | | | | The ARCH_MULTIPLATFORM dependency was introduced back when Tegra didn't support multiplatform yet as a means to allow the driver to be easily compile-tested along with other DRM drivers. In the meantime, the new COMPILE_TEST Kconfig option has been introduced for exactly that purpose, so use that instead to clarify the intention. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * drm/tegra: Allow the driver to be built as a moduleThierry Reding2013-12-19
| | | | | | | | | | | | | | All APIs that the driver uses are exported, so the driver can now be built as a module. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * gpu: host1x: Add Tegra124 supportThierry Reding2013-12-19
| | | | | | | | | | | | | | | | Tegra124 has 192 syncpoints whereas its predecessors had 32 syncpoints. This required changes to the hardware register layout. Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| * gpu: host1x: clk_round_rate() can return a zero upon errorPaul Walmsley2013-12-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Treat both negative and zero return values from clk_round_rate() as errors. This is needed since subsequent patches will convert clk_round_rate()'s return value to be an unsigned type, rather than a signed type, since some clock sources can generate rates higher than (2^31)-1 Hz. Eventually, when calling clk_round_rate(), only a return value of zero will be considered a error. All other values will be considered valid rates. The comparison against values less than 0 is kept to preserve the correct behavior in the meantime. Signed-off-by: Paul Walmsley <pwalmsley@nvidia.com> Cc: Mikko Perttunen <mperttunen@nvidia.com> Cc: Arto Merilainen <amerilainen@nvidia.com> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Terje Bergström <tbergstrom@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| * gpu: host1x: Fix build warningsThierry Reding2013-12-19
| | | | | | | | | | | | | | | | | | | | | | When debugfs support isn't enabled, gcc complains about some variables being unused. To avoid further #ifdefery, move debugfs specific setup code into static functions and use IS_ENABLED(CONFIG_DEBUG_FS) to have the compiler, rather than the preprocessor, discard them when unused. The advantage of doing it this way is that all the code will be compile-tested whether or not debugfs support is enabled. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * gpu: host1x: Increase compile test coverageThierry Reding2013-12-19
| | | | | | | | | | | | | | | | | | | | The ARCH_MULTIPLATFORM dependency was introduced back when Tegra didn't support multiplatform yet as a means to allow the driver to be easily compile-tested along with other DRM drivers. In the meantime, the new COMPILE_TEST Kconfig option has been introduced for exactly that purpose, so use that instead to clarify the intention. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * gpu: host1x: Fix more sparse warningsThierry Reding2013-12-19
| | | | | | | | | | | | | | | | Include the linux/host1x.h and dev.h headers so that function prototypes are visible to keep sparse from suggesting that their implementations be made static. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * gpu: host1x: Use the correct HW headers for host1x02Thierry Reding2013-12-19
| | | | | | | | | | | | | | An earlier patch added a subset of the required HW specific header files but didn't actually include the right ones when compiling for host1x02. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * gpu: host1x: Export public APIThierry Reding2013-12-19
| | | | | | | | | | | | | | Make the public API symbols visible so that depending drivers can be built as a module. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * gpu: host1x: Add MIPI pad calibration supportThierry Reding2013-12-19
| | | | | | | | | | | | | | This driver adds support to perform calibration of the MIPI pads for CSI and DSI. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * gpu: host1x: Add MIPI pad calibration DT bindingsThierry Reding2013-12-17
| | | | | | | | | | | | | | | | Introduce device tree bindings for the MIPI pad calibration controller found on Tegra SoCs. The controller can be used to perform calibration of pads used for DSI and CSI peripherals. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * gpu: host1x: Update host1x device tree exampleThierry Reding2013-12-17
| | | | | | | | | | | | | | The display controller primary clock was recently renamed to "dc", so update the example to reflect that. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * drm/tegra: Implement panel supportThierry Reding2013-12-17
| | | | | | | | | | | | | | | | | | Use the DRM panel framework to attach a panel to an output. If the panel attached to a connector supports supports the backlight brightness accessors, a property will be available to allow the brightness to be modified from userspace. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * drm/panel: Add support for Panasonic VVX10F004B0Thierry Reding2013-12-17
| | | | | | | | | | | | | | The Panasonic VVX10F004B0 is a 10.1" WUXGA TFT LCD panel connected using four DSI lanes. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * drm/panel: Add simple panel supportThierry Reding2013-12-17
| | | | | | | | | | | | | | | | | | | | | | | | | | Add a driver for simple panels. Such panels can have a regulator that provides the supply voltage and a separate GPIO to enable the panel. Optionally the panels can have a backlight associated with them so it can be enabled or disabled according to the panel's power management mode. Support is added for two panels: An AU Optronics 10.1" WSVGA and a Chunghwa Picture Tubes 10.1" WXGA panel. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * drm: Add panel supportThierry Reding2013-12-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a very simple framework to register and lookup panels. Panel drivers can initialize a DRM panel and register it with the framework, allowing them to be retrieved and used by display drivers. Currently only support for DPMS and obtaining panel modes is provided. However it should be sufficient to enable a large number of panels. The framework should also be easily extensible to support more sophisticated kinds of panels such as DSI. The framework hasn't been tied into the DRM core, even though it should be easily possible to do so if that's what we want. In the current implementation, display drivers can simple make use of it to retrieve a panel, obtain its modes and control its DPMS mode. Note that this is currently only tested on systems that boot from a device tree. No glue code has been written yet for systems that use platform data, but it should be easy to add. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * drm: Add MIPI DSI bus supportAndrzej Hajda2013-12-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MIPI DSI bus allows to model DSI hosts and DSI peripherals using the Linux driver model. DSI hosts are registered by the DSI host drivers. During registration DSI peripherals will be created from the children of the DSI host's device tree node. Support for registration from board-setup code will be added later when needed. DSI hosts expose operations which can be used by DSI peripheral drivers to access associated devices. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| * of: Add simple panel device tree bindingThierry Reding2013-12-17
| | | | | | | | | | | | | | | | | | | | | | This binding specifies a set of common properties for display panels. It can be used as a basis by bindings for specific panels. Bindings for three specific panels are provided to show how the simple panel binding can be used. Acked-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| * of: Add MIPI DSI bus device tree bindingsThierry Reding2013-12-17
| | | | | | | | | | | | | | | | Document the device tree bindings for the MIPI DSI bus. The MIPI Display Serial Interface specifies a serial bus and a protocol for communication between a host and up to four peripherals. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * Merge tag 'tegra-for-3.14-powergate' into drm/for-nextThierry Reding2013-12-17
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ARM: tegra: powergate driver changes This branch includes all the changes to Tegra's powergate driver for 3.14. These are separate out, since the Tegra DRM changes for 3.14 rely on the new APIs introduced here. A few cleanups and fixes are included, plus additions of Tegra124 SoC support, and a new API for manipulating Tegra's IO rail deep power down states. This branch is based on tag tegra-for-3.14-dmas-resets-rework, in order to avoid conflicts with the addition of common reset controller support to the powergate driver.
| | * ARM: tegra: Add IO rail supportThierry Reding2013-12-16
| | | | | | | | | | | | | | | | | | | | | | | | Add tegra_io_rail_power_off() and tegra_io_rail_power_on() functions to put IO rails into or out of deep powerdown mode, respectively. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
| | * ARM: tegra: Special-case the 3D clamps on Tegra124Thierry Reding2013-12-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | A separate register is used to remove the clamps for the GPU on Tegra124. In order to be able to use the same API, special-case this particular partition. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
| | * ARM: tegra: Add Tegra124 powergate supportThierry Reding2013-12-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | Three new gates have been added for Tegra124: SOR, VIC and IRAM. In addition, PCIe and SATA gates are again supported, like on Tegra20 and Tegra30. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
| | * ARM: tegra: Export tegra_powergate_remove_clamping()Thierry Reding2013-12-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | Drivers can use the tegra_powergate_remove_clamping() API during initialization. In order to allow such drivers to be built as modules, export the symbol. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
| | * ARM: tegra: Export tegra_powergate_power_off()Thierry Reding2013-12-16
| | | | | | | | | | | | | | | | | | | | | | | | This function can be used by drivers, which in turn may be built as modules. Export the symbol so it is available to modules. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
| | * ARM: tegra: Rename cpu0 powergate to crailThierry Reding2013-12-16
| | | | | | | | | | | | | | | | | | | | | This matches the name of the powergate as listed in the TRM. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
| | * ARM: tegra: Fix some whitespace odditiesThierry Reding2013-12-16
| | | | | | | | | | | | | | | | | | | | | | | | Some of the powergate code uses unusual spacing around == and has a tab instead of a space before an opening parenthesis. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * | Merge tag 'tegra-for-3.14-dmas-resets-rework' into drm/for-nextThierry Reding2013-12-17
| |\| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ARM: tegra: implement common DMA and resets DT bindings This series converts the Tegra DTs and drivers to use the common/ standard DMA and reset bindings, rather than custom bindings. It also adds complete documentation for the Tegra clock bindings without actually changing any binding definitions. This conversion relies on a few sets of patches in branches from outside the Tegra tree: 1) A patch to add an DMA channel request API which allows deferred probe to be implemented. 2) A patch to implement a common part of the of_xlate function for DMA controllers. 3) Some ASoC patches (which in turn rely on (1) above), which support deferred probe during DMA channel allocation. 4) The Tegra clock driver changes for 3.14. Consequently, this branch is based on a merge of all of those external branches. In turn, this branch is or will be pulled into a few places that either rely on features introduced here, or would otherwise conflict with the patches: a) Tegra's own for-3.14/powergate and for-4.14/dt branches, to avoid conflicts. b) The DRM tree, which introduces new code that relies on the reset controller framework introduced in this branch, and to avoid conflicts.
| | * spi: tegra: checking for ERR_PTR instead of NULLDan Carpenter2013-12-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dma_request_slave_channel() returns NULL on error and not ERR_PTRs. I've fixed this by using dma_request_slave_channel_reason() which does return ERR_PTRs. Fixes: a915d150f68d ('spi: tegra: convert to standard DMA DT bindings') Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
| | * ASoC: tegra: update module reset list for Tegra124Stephen Warren2013-12-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra124 adds a number of extra modules into the configlink bus, which must be taken out of reset before the bus is used. Update the AHUB driver to know about these extra modules (the AHUB HW module hosts the configlink bus). Based-on-work-by: Arun Shamanna Lakshmi <aruns@nvidia.com> Based-on-work-by: Songhee Baek <sbaek@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Mark Brown <broonie@linaro.org> --- This patch depends on "ASoC: tegra: use reset framework" to compile, which is ack'd and slated to go through a (large) topic branch in the Tegra tree. So, we can either: a) Merge that Tegra topic branch into the ASoC tree, then apply this. Note that I haven't created the topic branch yet, since I'm still waiting for DMA dependencies to be applied. b) Apply this change to the Tegra tree too. This change isn't directly related to the changes in the Tegra tree; it just makes use of the new reset controller feature that's introduced there.
| | * clk: tegra: remove bogus PCIE_XCLKStephen Warren2013-12-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The "pcie_xclk" clock is not actually a clock at all, but rather a reset domain. Now that the custom Tegra module reset API has been removed, we can remove the definition of any "clocks" that existed solely to support it. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com>
| | * clk: tegra: remove legacy reset APIsStephen Warren2013-12-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | Now that no code uses the custom Tegra module reset API, we can remove its implementation. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com>
| | * ARM: tegra: remove legacy DMA entries from DTStephen Warren2013-12-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | Now that all Tegra drivers have been converted to use DMA APIs which retrieve DMA channel information from standard DMA DT properties, we can remove all the legacy DT DMA-related properties. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com>
| | * ARM: tegra: remove legacy clock entries from DTStephen Warren2013-12-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | Now that all Tegra drivers have been converted to use the common reset framework, we can remove all the legacy DT clocks/clock-names entries for "clocks" that were only used with the old custom Tegra module reset API. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com>
| | * USB: EHCI: tegra: use reset frameworkStephen Warren2013-12-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra's clock driver now provides an implementation of the common reset API (include/linux/reset.h). Use this instead of the old Tegra- specific API; that will soon be removed. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Alan Stern <stern@rowland.harvard.edu> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by: Thierry Reding <treding@nvidia.com>
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