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* drm/i915: Fix unload after failed initialisationChris Wilson2010-11-08
* drm/i915: POSTING_READs are simply flushes and so irrelevant to tracingChris Wilson2010-11-08
* drm/i915: filter out the read/write of GPIO registers from debug tracingYuanhan Liu2010-11-08
* drm/i915: Add untraced register read/write interfaceYuanhan Liu2010-11-08
* drm/i915: trace down all the register write and readYuanhan Liu2010-11-08
* drm/i915: Apply display workaround required according to the B-Spec.Eric Anholt2010-11-08
* drm/i915: Apply B-spec mandated workaround for read flushes on Ironlake.Eric Anholt2010-11-08
* drm/i915/ringbuffer: Ignore failure to setup the ring on SandybridgeChris Wilson2010-11-07
* drm/i915/ringbuffer: Be consistent in use of ring->size when initialisingChris Wilson2010-11-07
* drm/i915: Handle GPU hangs during fault gracefully.Chris Wilson2010-11-07
* drm/i915: kill mappable/fenceable disdinctionDaniel Vetter2010-11-04
* drm/i915: revert pageflip/mappable related abi breakageDaniel Vetter2010-11-04
* Merge branch 'drm-intel-fixes' into drm-intel-nextChris Wilson2010-11-04
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| * agp/intel: fix cache control for sandybridgeZhenyu Wang2010-11-04
| * agp/intel: restore cache behavior on sandybridgeZhenyu Wang2010-11-04
| * drm/i915; Don't apply Ironlake FDI clock workaround to SandybridgeZhenyu Wang2010-11-04
| * drm/i915: Fix KMS regression on Sandybridge/CPTZhenyu Wang2010-11-04
| * i915: reprogram power monitoring registers on resumeKyle McMartin2010-11-03
* | drm/i915: Ensure that if we ever try to pin+fence it is mappable.Chris Wilson2010-11-03
* | drm/i915: Drop the iomem accessors when writing to the kmapped blt batchChris Wilson2010-11-02
* | Merge branch 'drm-intel-fixes' into drm-intel-nextChris Wilson2010-11-02
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| * drm/i915: SNB BLT workaroundChris Wilson2010-11-02
| * drm/i915: Fix the graphics frequency clamping at init and when IPS is active.Jesse Barnes2010-11-02
| * drm/i915: Allow powersave modparam to be adjusted at runtime.Chris Wilson2010-11-02
* | drm/i915: SNB BLT workaroundZou Nan hai2010-11-02
* | agp/intel: restore cache behavior on sandybridgeZhenyu Wang2010-11-02
* | agp/intel: fix cache control for sandybridgeZhenyu Wang2010-11-02
* | Revert "drm/i915: add MMIO debug output"Chris Wilson2010-11-02
* | Merge branch 'drm-intel-fixes' into drm-intel-nextChris Wilson2010-11-01
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| * drm/i915: Apply big hammer to serialise buffer access between ringsChris Wilson2010-11-01
| * drm/i915: opregion_setup: iounmap correct addressChristoph Fritz2010-11-01
| * drm/i915: Flush read-only buffers from the active list upon idle as wellChris Wilson2010-10-28
| * i915: signedness bug in check_overlay_src()Dan Carpenter2010-10-27
* | drm/i915: Move the invalidate|flush information out of the device structChris Wilson2010-11-01
* | drm/i915: Apply big hammer to serialise buffer access between ringsChris Wilson2010-11-01
* | drm/i915/debugfs: Report ring in error stateChris Wilson2010-11-01
* | agp/intel: the GMCH is always enabled for integrated processor graphicsChris Wilson2010-10-31
* | drm/i915: Evict just the purgeable GTT entries on the first passChris Wilson2010-10-31
* | drm/i915: Fix typo from e5281ccd in i915_gem_attach_phys_object()Chris Wilson2010-10-30
* | drm/i915: Record BSD engine error stateChris Wilson2010-10-29
* | drm/i915/ringbuffer: Use the HEAD auto-reporting mechanismChris Wilson2010-10-29
* | drm/i915: Check if the GPU hung whilst waiting for the ring to clearChris Wilson2010-10-29
* | drm/i915: Switch to using pci_iounmap in conjunction with pci_iomapChris Wilson2010-10-29
* | drm/i915/debugfs: Display the contents of the BLT and BSD status pagesChris Wilson2010-10-29
* | agp/intel: Sandybridge doesn't require GMCH enablingChris Wilson2010-10-29
* | drm/i915/ringbuffer: Remove duplicate initialisation of ring controlChris Wilson2010-10-29
* | drm/i915: Record BLT engine error stateChris Wilson2010-10-29
* | drm/i915/ringbuffer: Disable the ringbuffer on cleanup.Chris Wilson2010-10-29
* | drm/i915: Remove the duplicate domain-change tracepoint for GPU flushChris Wilson2010-10-29
* | drm/i915: Only enforce fence limits inside the GTT.Chris Wilson2010-10-29