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The LITMUS^RT kernel.
Bjoern Brandenburg
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Commit message (
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Author
Age
*
drm/i915: Fix unload after failed initialisation
Chris Wilson
2010-11-08
*
drm/i915: POSTING_READs are simply flushes and so irrelevant to tracing
Chris Wilson
2010-11-08
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drm/i915: filter out the read/write of GPIO registers from debug tracing
Yuanhan Liu
2010-11-08
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drm/i915: Add untraced register read/write interface
Yuanhan Liu
2010-11-08
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drm/i915: trace down all the register write and read
Yuanhan Liu
2010-11-08
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drm/i915: Apply display workaround required according to the B-Spec.
Eric Anholt
2010-11-08
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drm/i915: Apply B-spec mandated workaround for read flushes on Ironlake.
Eric Anholt
2010-11-08
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drm/i915/ringbuffer: Ignore failure to setup the ring on Sandybridge
Chris Wilson
2010-11-07
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drm/i915/ringbuffer: Be consistent in use of ring->size when initialising
Chris Wilson
2010-11-07
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drm/i915: Handle GPU hangs during fault gracefully.
Chris Wilson
2010-11-07
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drm/i915: kill mappable/fenceable disdinction
Daniel Vetter
2010-11-04
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drm/i915: revert pageflip/mappable related abi breakage
Daniel Vetter
2010-11-04
*
Merge branch 'drm-intel-fixes' into drm-intel-next
Chris Wilson
2010-11-04
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\
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*
agp/intel: fix cache control for sandybridge
Zhenyu Wang
2010-11-04
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*
agp/intel: restore cache behavior on sandybridge
Zhenyu Wang
2010-11-04
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*
drm/i915; Don't apply Ironlake FDI clock workaround to Sandybridge
Zhenyu Wang
2010-11-04
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*
drm/i915: Fix KMS regression on Sandybridge/CPT
Zhenyu Wang
2010-11-04
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*
i915: reprogram power monitoring registers on resume
Kyle McMartin
2010-11-03
*
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drm/i915: Ensure that if we ever try to pin+fence it is mappable.
Chris Wilson
2010-11-03
*
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drm/i915: Drop the iomem accessors when writing to the kmapped blt batch
Chris Wilson
2010-11-02
*
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Merge branch 'drm-intel-fixes' into drm-intel-next
Chris Wilson
2010-11-02
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\
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*
drm/i915: SNB BLT workaround
Chris Wilson
2010-11-02
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*
drm/i915: Fix the graphics frequency clamping at init and when IPS is active.
Jesse Barnes
2010-11-02
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*
drm/i915: Allow powersave modparam to be adjusted at runtime.
Chris Wilson
2010-11-02
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drm/i915: SNB BLT workaround
Zou Nan hai
2010-11-02
*
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agp/intel: restore cache behavior on sandybridge
Zhenyu Wang
2010-11-02
*
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agp/intel: fix cache control for sandybridge
Zhenyu Wang
2010-11-02
*
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Revert "drm/i915: add MMIO debug output"
Chris Wilson
2010-11-02
*
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Merge branch 'drm-intel-fixes' into drm-intel-next
Chris Wilson
2010-11-01
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\
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*
drm/i915: Apply big hammer to serialise buffer access between rings
Chris Wilson
2010-11-01
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*
drm/i915: opregion_setup: iounmap correct address
Christoph Fritz
2010-11-01
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*
drm/i915: Flush read-only buffers from the active list upon idle as well
Chris Wilson
2010-10-28
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*
i915: signedness bug in check_overlay_src()
Dan Carpenter
2010-10-27
*
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drm/i915: Move the invalidate|flush information out of the device struct
Chris Wilson
2010-11-01
*
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drm/i915: Apply big hammer to serialise buffer access between rings
Chris Wilson
2010-11-01
*
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drm/i915/debugfs: Report ring in error state
Chris Wilson
2010-11-01
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agp/intel: the GMCH is always enabled for integrated processor graphics
Chris Wilson
2010-10-31
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drm/i915: Evict just the purgeable GTT entries on the first pass
Chris Wilson
2010-10-31
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drm/i915: Fix typo from e5281ccd in i915_gem_attach_phys_object()
Chris Wilson
2010-10-30
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drm/i915: Record BSD engine error state
Chris Wilson
2010-10-29
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drm/i915/ringbuffer: Use the HEAD auto-reporting mechanism
Chris Wilson
2010-10-29
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drm/i915: Check if the GPU hung whilst waiting for the ring to clear
Chris Wilson
2010-10-29
*
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drm/i915: Switch to using pci_iounmap in conjunction with pci_iomap
Chris Wilson
2010-10-29
*
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drm/i915/debugfs: Display the contents of the BLT and BSD status pages
Chris Wilson
2010-10-29
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agp/intel: Sandybridge doesn't require GMCH enabling
Chris Wilson
2010-10-29
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drm/i915/ringbuffer: Remove duplicate initialisation of ring control
Chris Wilson
2010-10-29
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drm/i915: Record BLT engine error state
Chris Wilson
2010-10-29
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drm/i915/ringbuffer: Disable the ringbuffer on cleanup.
Chris Wilson
2010-10-29
*
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drm/i915: Remove the duplicate domain-change tracepoint for GPU flush
Chris Wilson
2010-10-29
*
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drm/i915: Only enforce fence limits inside the GTT.
Chris Wilson
2010-10-29
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