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authorChris Wilson <chris@chris-wilson.co.uk>2010-10-28 18:43:30 -0400
committerChris Wilson <chris@chris-wilson.co.uk>2010-10-29 06:15:54 -0400
commit872d860c85e30cdc97e7c91723257f4fcf04d5e9 (patch)
tree8965019eb5b37db12a0d205731ff53a52998163c
parenta00b10c360b35d6431a94cbf130a4e162870d661 (diff)
drm/i915: Remove the duplicate domain-change tracepoint for GPU flush
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-rw-r--r--drivers/gpu/drm/i915/i915_gem.c6
1 files changed, 0 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 07ad1e354084..936ddd83f8a2 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2847,22 +2847,16 @@ i915_gem_object_flush_gpu_write_domain(struct drm_gem_object *obj,
2847 bool pipelined) 2847 bool pipelined)
2848{ 2848{
2849 struct drm_device *dev = obj->dev; 2849 struct drm_device *dev = obj->dev;
2850 uint32_t old_write_domain;
2851 2850
2852 if ((obj->write_domain & I915_GEM_GPU_DOMAINS) == 0) 2851 if ((obj->write_domain & I915_GEM_GPU_DOMAINS) == 0)
2853 return 0; 2852 return 0;
2854 2853
2855 /* Queue the GPU write cache flushing we need. */ 2854 /* Queue the GPU write cache flushing we need. */
2856 old_write_domain = obj->write_domain;
2857 i915_gem_flush_ring(dev, NULL, 2855 i915_gem_flush_ring(dev, NULL,
2858 to_intel_bo(obj)->ring, 2856 to_intel_bo(obj)->ring,
2859 0, obj->write_domain); 2857 0, obj->write_domain);
2860 BUG_ON(obj->write_domain); 2858 BUG_ON(obj->write_domain);
2861 2859
2862 trace_i915_gem_object_change_domain(obj,
2863 obj->read_domains,
2864 old_write_domain);
2865
2866 if (pipelined) 2860 if (pipelined)
2867 return 0; 2861 return 0;
2868 2862