diff options
author | Yuanhan Liu <yuanhan.liu@linux.intel.com> | 2010-11-08 04:09:41 -0500 |
---|---|---|
committer | Chris Wilson <chris@chris-wilson.co.uk> | 2010-11-08 04:36:48 -0500 |
commit | ba4f01a30480cdcd516b782f77a6e0951b83df1c (patch) | |
tree | f8e77233ebb4912a918f1e47c411b5208b94964b | |
parent | 67e92af01cb6f7e9a5fd5c930c43cd6f6ef45929 (diff) |
drm/i915: trace down all the register write and read
Add two tracepoints at I915_WRITE/READ for tracing down all the
register write and read.
Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 61 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_trace.h | 23 |
2 files changed, 76 insertions, 8 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 621234265454..220ce53d4a9c 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h | |||
@@ -32,6 +32,7 @@ | |||
32 | 32 | ||
33 | #include "i915_reg.h" | 33 | #include "i915_reg.h" |
34 | #include "intel_bios.h" | 34 | #include "intel_bios.h" |
35 | #include "i915_trace.h" | ||
35 | #include "intel_ringbuffer.h" | 36 | #include "intel_ringbuffer.h" |
36 | #include <linux/io-mapping.h> | 37 | #include <linux/io-mapping.h> |
37 | #include <linux/i2c.h> | 38 | #include <linux/i2c.h> |
@@ -1173,14 +1174,58 @@ extern void intel_overlay_print_error_state(struct seq_file *m, struct intel_ove | |||
1173 | LOCK_TEST_WITH_RETURN(dev, file_priv); \ | 1174 | LOCK_TEST_WITH_RETURN(dev, file_priv); \ |
1174 | } while (0) | 1175 | } while (0) |
1175 | 1176 | ||
1176 | #define I915_READ(reg) readl(dev_priv->regs + (reg)) | 1177 | static inline u32 i915_read(struct drm_i915_private *dev_priv, u32 reg, int len) |
1177 | #define I915_WRITE(reg, val) writel(val, dev_priv->regs + (reg)) | 1178 | { |
1178 | #define I915_READ16(reg) readw(dev_priv->regs + (reg)) | 1179 | u64 val = 0; |
1179 | #define I915_WRITE16(reg, val) writel(val, dev_priv->regs + (reg)) | 1180 | |
1180 | #define I915_READ8(reg) readb(dev_priv->regs + (reg)) | 1181 | switch (len) { |
1181 | #define I915_WRITE8(reg, val) writeb(val, dev_priv->regs + (reg)) | 1182 | case 8: |
1182 | #define I915_WRITE64(reg, val) writeq(val, dev_priv->regs + (reg)) | 1183 | val = readq(dev_priv->regs + reg); |
1183 | #define I915_READ64(reg) readq(dev_priv->regs + (reg)) | 1184 | break; |
1185 | case 4: | ||
1186 | val = readl(dev_priv->regs + reg); | ||
1187 | break; | ||
1188 | case 2: | ||
1189 | val = readw(dev_priv->regs + reg); | ||
1190 | break; | ||
1191 | case 1: | ||
1192 | val = readb(dev_priv->regs + reg); | ||
1193 | break; | ||
1194 | } | ||
1195 | trace_i915_reg_rw('R', reg, val, len); | ||
1196 | |||
1197 | return val; | ||
1198 | } | ||
1199 | |||
1200 | static inline void | ||
1201 | i915_write(struct drm_i915_private *dev_priv, u32 reg, u64 val, int len) | ||
1202 | { | ||
1203 | /* Trace down the write operation before the real write */ | ||
1204 | trace_i915_reg_rw('W', reg, val, len); | ||
1205 | switch (len) { | ||
1206 | case 8: | ||
1207 | writeq(val, dev_priv->regs + reg); | ||
1208 | break; | ||
1209 | case 4: | ||
1210 | writel(val, dev_priv->regs + reg); | ||
1211 | break; | ||
1212 | case 2: | ||
1213 | writew(val, dev_priv->regs + reg); | ||
1214 | break; | ||
1215 | case 1: | ||
1216 | writeb(val, dev_priv->regs + reg); | ||
1217 | break; | ||
1218 | } | ||
1219 | } | ||
1220 | |||
1221 | #define I915_READ(reg) i915_read(dev_priv, (reg), 4) | ||
1222 | #define I915_WRITE(reg, val) i915_write(dev_priv, (reg), (val), 4) | ||
1223 | #define I915_READ16(reg) i915_read(dev_priv, (reg), 2) | ||
1224 | #define I915_WRITE16(reg, val) i915_write(dev_priv, (reg), (val), 2) | ||
1225 | #define I915_READ8(reg) i915_read(dev_priv, (reg), 1) | ||
1226 | #define I915_WRITE8(reg, val) i915_write(dev_priv, (reg), (val), 1) | ||
1227 | #define I915_WRITE64(reg, val) i915_write(dev_priv, (reg), (val), 8) | ||
1228 | #define I915_READ64(reg) i915_read(dev_priv, (reg), 8) | ||
1184 | #define POSTING_READ(reg) (void)I915_READ(reg) | 1229 | #define POSTING_READ(reg) (void)I915_READ(reg) |
1185 | #define POSTING_READ16(reg) (void)I915_READ16(reg) | 1230 | #define POSTING_READ16(reg) (void)I915_READ16(reg) |
1186 | 1231 | ||
diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h index 0b1049ff72a3..34ef49fd0377 100644 --- a/drivers/gpu/drm/i915/i915_trace.h +++ b/drivers/gpu/drm/i915/i915_trace.h | |||
@@ -301,6 +301,29 @@ TRACE_EVENT(i915_flip_complete, | |||
301 | TP_printk("plane=%d, obj=%p", __entry->plane, __entry->obj) | 301 | TP_printk("plane=%d, obj=%p", __entry->plane, __entry->obj) |
302 | ); | 302 | ); |
303 | 303 | ||
304 | TRACE_EVENT(i915_reg_rw, | ||
305 | TP_PROTO(int cmd, uint32_t reg, uint64_t val, int len), | ||
306 | |||
307 | TP_ARGS(cmd, reg, val, len), | ||
308 | |||
309 | TP_STRUCT__entry( | ||
310 | __field(int, cmd) | ||
311 | __field(uint32_t, reg) | ||
312 | __field(uint64_t, val) | ||
313 | __field(int, len) | ||
314 | ), | ||
315 | |||
316 | TP_fast_assign( | ||
317 | __entry->cmd = cmd; | ||
318 | __entry->reg = reg; | ||
319 | __entry->val = (uint64_t)val; | ||
320 | __entry->len = len; | ||
321 | ), | ||
322 | |||
323 | TP_printk("cmd=%c, reg=0x%x, val=0x%llx, len=%d", | ||
324 | __entry->cmd, __entry->reg, __entry->val, __entry->len) | ||
325 | ); | ||
326 | |||
304 | #endif /* _I915_TRACE_H_ */ | 327 | #endif /* _I915_TRACE_H_ */ |
305 | 328 | ||
306 | /* This part must be outside protection */ | 329 | /* This part must be outside protection */ |