aboutsummaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAge
* drm/nouveau: tidy+move PGRAPH ISRs to their respective *_graph.c filesBen Skeggs2010-12-03
| | | | | Reviewed-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: move PFIFO ISR into nv04_fifo.cBen Skeggs2010-12-03
| | | | | Reviewed-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nv04-nv40: register vblank isrBen Skeggs2010-12-03
| | | | | Reviewed-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: move bitfield/enum helpers to nouveau_util.cBen Skeggs2010-12-03
| | | | | Reviewed-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nv50: use register/unregister functionality for PDISPLAY ISRBen Skeggs2010-12-03
| | | | | Reviewed-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nv50: move GPIO ISR to nv50_gpio.cBen Skeggs2010-12-03
| | | | | Reviewed-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nv84: move PCRYPT ISR out of nouveau_irq.cBen Skeggs2010-12-03
| | | | | Reviewed-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: allow irq handlers to be installed by engine-specific codeBen Skeggs2010-12-03
| | | | | | | Lets start to clean up this mess! Reviewed-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nv50: 0x50c0 apparently works on NVA3+ too, so lets allow itBen Skeggs2010-12-03
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nv50: fix compute object classBen Skeggs2010-12-03
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: Fix sleep while atomic in nouveau_bo_fence().Francisco Jerez2010-12-03
| | | | | | Reported-by: Pekka Paalanen <pq@iki.fi> Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nv20: Add Z compression support.Francisco Jerez2010-12-03
| | | | | | Signed-off-by: Francisco Jerez <currojerez@riseup.net> Tested-by: Xavier Chantry <chantry.xavier@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: Rework tile region handling.Francisco Jerez2010-12-03
| | | | | | | | | The point is to share more code between the PFB/PGRAPH tile region hooks, and give the hardware specific functions a chance to allocate per-region resources. Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: Add a separate class for the kernel channel mutex.Francisco Jerez2010-12-03
| | | | | | | | | | nouveau_bo_move_m2mf() needs to lock the kernel channel, and it may be called from the pushbuf IOCTL with an user channel already locked. Use a separate subclass for the kernel channel mutex because this is legitimate mutex nesting. Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nv50: Keep track of the head a channel is vsync'ing to.Francisco Jerez2010-12-03
| | | | | | | | | | | In a multihead setup vblank interrupts may end up enabled in both heads. In that case we want to ignore the vblank interrupts coming from the wrong CRTC to avoid tearing and unbalanced calls to drm_vblank_get/put (fdo bug 31074). Reported-by: Felix Leimbach <felix.leimbach@gmx.net> Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: Call drm_vblank_pre/post_modeset() around mode setting.Francisco Jerez2010-12-03
| | | | | Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: Implement the pageflip ioctl.Francisco Jerez2010-12-03
| | | | | | | nv0x-nv4x should be mostly fine, nv50 doesn't work yet. Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: Implement the vblank DRM hooks.Francisco Jerez2010-12-03
| | | | | Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nv04: Make CRTC base changes effective in the next hsync.Francisco Jerez2010-12-03
| | | | | Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: fix annoying nouveau_fence type issueMarcin Slusarz2010-12-03
| | | | | | | | | | | | | | nouveau_fence_* functions are not type safe, which could lead to bugs. Additionally every use of nouveau_fence_unref had to cast struct nouveau_fence to void **. Fix it by renaming old functions and creating static inline functions with new prototypes. We still need old functions, because we pass function pointers to ttm. As we are wrapping functions, drop unused "void *arg" parameter where possible. Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com> Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nv50: regression fix, point NVAA/NVAC at correct PM functionsBen Skeggs2010-12-03
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: add support for MSIBen Skeggs2010-12-03
| | | | | | | | | | | | | | | | Only supported on NV50+ so far, and disabled by default currently. The module parameter "msi=1" will enable it. There's a kernel bug which will cause this to fail if the module (or the NVIDIA binary driver) has ever been loaded before loading nouveau with MSI enabled. As such, this is only safe to enable if you have nouveau load on boot, and don't wish to ever reload it. The workaround is to "echo 0 > /sys/bus/pci/devices/<device>/enable" until the enable count reads 0. Then you should be able to load nouveau with MSI enabled. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nv10: fix thinko and let nv17 do 3d again :)Ben Skeggs2010-12-03
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nv50: fix evo instmem alignmentBen Skeggs2010-12-03
| | | | | | | Not an issue right now, we're forced to 64k size/alignment by the BO allocator anyway. This won't be the case soon. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nv50: improve evo error handler when more than just channel 0 activeBen Skeggs2010-12-03
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nv50: rework evo init to match nvidia more closelyBen Skeggs2010-12-03
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nv50: initial work to allow multiple evo channelsBen Skeggs2010-12-03
| | | | | | This doesn't work yet for unknown reasons. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nv50: move evo handling to nv50_evo.cBen Skeggs2010-12-03
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nv50: clearer separation of the stages of evo initBen Skeggs2010-12-03
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nv50: create graph and crypt contexts on demandBen Skeggs2010-12-03
| | | | | | | | This really needs cleaning up somehow, and probably investigate what's needed to do this on earlier generations. NVIDIA do something similar there too. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nv50: remove excessive alignment of graph/crypt contextsBen Skeggs2010-12-03
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nv84: add support for the PCRYPT engineBen Skeggs2010-12-03
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: only expose the object classes that are supported by the chipsetBen Skeggs2010-12-03
| | | | | | | We previously added all the available classes for the entire generation, even though the objects wouldn't work on the hardware. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: use object class structs more extensivelyBen Skeggs2010-12-03
| | | | | | | The structs themselves, as well as the non-sw object creation function are probably very misnamed now. That's a problem for later :) Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: store engine type in gpuobj class structsBen Skeggs2010-12-03
| | | | | | We will eventually want to address hw engines other than PGRAPH. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: pass gpuobj alignment request down into backing allocatorBen Skeggs2010-12-03
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nv40: Ignore sync-to-vblank active when waiting for idle.Francisco Jerez2010-12-03
| | | | | Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: Take fence spinlock in nouveau_fence_channel_fini().Francisco Jerez2010-12-03
| | | | | | | Without it there's a potential race with nouveau_fence_update(). Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: Avoid race in the interchannel sync code.Francisco Jerez2010-12-03
| | | | | | | | | It needs a "strong" channel reference because it actually writes to the channel pushbuf, otherwise the corresponding FIFO context could get kicked off in the middle of nouveau_fence_sync(). Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: Make fences take a weak channel reference.Francisco Jerez2010-12-03
| | | | | | | | | Fences didn't increment the channel reference count, and the fenced channel could go away at any time. Fixes a potential race in nouveau_fence_update(). Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: Implement weak channel references.Francisco Jerez2010-12-03
| | | | | | | | | nouveau_channel_ref() takes a "weak" channel reference that doesn't prevent the hardware channel resources from being released, it just keeps the channel data structure alive. Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: Fix lock unbalance on card take down.Francisco Jerez2010-12-03
| | | | | Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: Add unlocked variants of nouveau_channel_get/put.Francisco Jerez2010-12-03
| | | | | Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: Fix race condition in channel refcount handling.Francisco Jerez2010-12-03
| | | | | | | | | | nouveau_channel_put() can be executed after the 'refcount == 0' check in nouveau_channel_get() and before the channel reference count is incremented. In that case CPU0 will take the context down while CPU1 thinks it owns the channel and 'refcount == 1'. Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: Refactor context destruction to avoid a lock ordering issue.Francisco Jerez2010-12-03
| | | | | | | | | | | | | | | | The destroy_context() engine hooks call gpuobj management functions to release the channel resources, these functions use HARDIRQ-unsafe locks whereas destroy_context() is called with the HARDIRQ-safe context_switch_lock held, that's a lock ordering violation. Push the engine-specific channel destruction logic into destroy_context() and let the hardware-specific code lock and unlock when it's actually needed. Change the engine destruction order to avoid a race in the small gap between pgraph and pfifo context uninitialization. Reported-by: Marcin Slusarz <marcin.slusarz@gmail.com> Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: Use lazy fence waits when doing software interchannel sync.Francisco Jerez2010-12-03
| | | | | Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: Leave BO eviction synchronization for later.Francisco Jerez2010-12-03
| | | | | | | The pushbuf ioctl syncs after validation, no need for this anymore. Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nv50: remove some unnecessary PDISPLAY initBen Skeggs2010-12-03
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: fallback to sw fbcon if we can't get mutex immediatelyBen Skeggs2010-12-03
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: hook up acpi power supply change trackingBen Skeggs2010-12-03
| | | | | | Not used at all yet, but lets hook it up now anyway. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
generated by cgit v1.2.2 (git 2.25.0) at 2024-09-23 18:24:09 -0400