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| * drm/i915: Use intel_edp_panel_vdd_on() in intel_dp_probe_mst()Ville Syrjälä2014-09-03
| | | | | | | | | | | | | | | | | | | | We want to use the higher level vdd on func here. Not a big deal yet (we'd just get the warn when things go awry) but when the locking gets fixed this becomes more important. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: Parametrize PANEL_PORT_SELECT_VLVVille Syrjälä2014-09-03
| | | | | | | | | | | | | | | | | | | | | | Passing the port as a parameter to PANEL_PORT_SELECT_VLV results in neater code. Sadly the PCH port select bits aren't suitable for the same treatment and the resulting macro would be much uglier, so leave those defines as is. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915/bdw: Populate lrc with aliasing ppgtt if requiredThomas Daniel2014-09-03
| | | | | | | | | | | | | | | | | | | | | | A previous commit broke aliasing PPGTT for lrc, resulting in a kernel oops on boot. Add a check so that is full PPGTT is not in use the context is populated with the aliasing PPGTT. Issue: VIZ-4278 Signed-off-by: Thomas Daniel <thomas.daniel@intel.com> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: honour forced connector modesChris Wilson2014-09-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the move over to use BIOS connector configs, we lost the ability to force a specific set of connectors on or off. Try to remedy that by dropping back to the old behavior if we detect a hard coded connector config that tries to enable a connector (disabling is easy!). Based on earlier patches by Jesse Barnes. v2: Remove Jesse's patch Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: Don't save/restore RS when not usedBen Widawsky2014-09-03
| | | | | | | | | | | | | | | | | | v2: fix conflict on rebase. Cc: Kenneth Graunke <kenneth@whitecape.org> Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: Bring UP Power Wells before disabling RC6.Deepak S2014-09-03
| | | | | | | | | | | | | | | | | | | | | | | | We need do forcewake before Disabling RC6, This is what the BIOS expects while going into suspend. v2: updated commit message. (Daniel) Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Deepak S <deepak.s@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: Print the pipe on which the vblank wait times outDamien Lespiau2014-09-03
| | | | | | | | | | | | | | | | | | | | | | Improve the debug message that tells us we've been waiting for a vblank that never arrived. Printing the pipe could lead a "doh!" moment where we've been waiting for a vblank on a pipe that was off for instance. Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Reviewed-by: Thomas Wood <thomas.wood@intel.com> [danvet: Polish commit message a bit.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: Use dev_priv as first argument of for_each_pipe()Damien Lespiau2014-09-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Chris has decided that enough is enough. It's time to fixup dev Vs dev_priv. This is a modest contribution to the crusade. v2: Still use INTEL_INFO(), for the (mythical!) case we want to hardcode the info struct with defines (Chris) Rename the macro argument from 'dev' to 'dev_priv' (Jani) v3: Use names unlikely to be used as macro arguments (Chris) Suggested-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: don't check for i830 in vlv specific codeJani Nikula2014-09-03
| | | | | | | | | | | | Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915/bdw: Make sure error capture keeps working with ExeclistsOscar Mateo2014-09-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since the ringbuffer does not belong per engine anymore, we have to make sure that we are always recording the correct ringbuffer. TODO: This is only a small fix to keep basic error capture working, but we need to add more information for it to be useful (e.g. dump the context being executed). v2: Reorder how the ringbuffer is chosen to clarify the change and rename the variable, both changes suggested by Chris Wilson. Also, add the TODO comment to the code, as suggested by Daniel. Signed-off-by: Oscar Mateo <oscar.mateo@intel.com> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: Suppress a WARN on reading an object back for a GPU hangChris Wilson2014-09-03
| | | | | | | | | | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: Remove num_pages parameter to i915_error_object_create()Chris Wilson2014-09-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | For cleanliness, i915_error_object_create() was written to handle the NULL pointer in a central location. The macro that wrapped it and passed it a num_pages to use, was not safe. As we now never limit the num_pages to use (we did so at one point to only capture the first page of the context), we can remove the redundant macro and be NULL safe again. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Cc: John Harrison <John.C.Harrison@Intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: Do not access stolen memory directly by the CPU, even for error ↵Chris Wilson2014-09-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | capture For stolen pages, since it is verboten to access them directly on many architectures, we have to read them through the GTT aperture. If they are not accessible through the aperture, then we have to abort. This was complicated by commit 8b6124a633d8095b0c8364f585edff9c59568a96 Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Thu Jan 30 14:38:16 2014 +0000 drm/i915: Don't access snooped pages through the GTT (even for error capture) and the desire to use stolen memory for ringbuffers, contexts and batches in the future. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: switch off backlight for backlight class 0 brightnessJani Nikula2014-09-03
| | | | | | | | | | | | | | | | | | | | | | Make backlight class sysfs brightness 0 value switch off the backlight for connectors that have the backlight_power callback defined. For eDP, this has the similar caveats regarding power savings as bl_power as only the power sequencer backlight control is switched off. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed_by: Clinton Taylor <Clinton.A.Taylor@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915/dp: make backlight bl_power control power sequencer backlightJani Nikula2014-09-03
| | | | | | | | | | | | | | | | | | | | | | | | | | This lets the userspace switch off the backlight using the backlight class sysfs bl_power file. The switch is done using the power sequencer; the backlight PWM, and everything else, remains enabled. The display backlight won't draw power, but for maximum power savings the encoder needs to be switched off. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed_by: Clinton Taylor <Clinton.A.Taylor@intel.com> Tested_by: Clinton Taylor <Clinton.A.Taylor@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: add some framework for backlight bl_power supportJani Nikula2014-09-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Make backlight class sysfs bl_power a sub-state of backlight enabled, if a backlight power connector callback is defined. It's up to the connector callback to handle the sub-state, typically in a way that respects panel power sequencing. v2: Post the version that does not oops. *facepalm*. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed_by: Clinton Taylor <Clinton.A.Taylor@intel.com> Tested_by: Clinton Taylor <Clinton.A.Taylor@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915/dp: split up panel power control from backlight pwm controlJani Nikula2014-09-03
| | | | | | | | | | | | | | | | | | | | Make it possible to change panel power control backlight state without touching the PWM. No functional changes. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed_by: Clinton Taylor <Clinton.A.Taylor@intel.com> Tested_by: Clinton Taylor <Clinton.A.Taylor@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: fix i915_frequency_info on BDWPaulo Zanoni2014-09-03
| | | | | | | | | | | | | | | | | | | | | | The GEN6_PM* registers don't exist on BDW anymore, so when we read this file we trigger unclaimed register errors. The equivalent BDW register for PMs is GEN8_GT_I*R(2), so use it. Testcase: igt/pm_rpm/debugfs-read Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: Add 180 degree primary plane rotation supportSonika Jindal2014-09-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Primary planes support 180 degree rotation. Expose the feature through rotation drm property. v2: Calculating linear/tiled offsets based on pipe source width and height. Added 180 degree rotation support in ironlake_update_plane. v3: Checking if CRTC is active before issueing update_plane. Added wait for vblank to make sure we dont overtake page flips. Disabling FBC since it does not work with rotated planes. v4: Updated rotation checks for pending flips, fbc disable. Creating rotation property only for Gen4 onwards. Property resetting as part of lastclose. v5: Resetting property in i915_driver_lastclose properly for planes and crtcs. Fixed linear offset calculation that was off by 1 w.r.t width in i9xx_update_plane and ironlake_update_plane. Removed tab based indentation and unnecessary braces in intel_crtc_set_property and intel_update_fbc. FBC and flip related checks should be done only for valid crtcs. v6: Minor nits in FBC disable checks for comments in intel_crtc_set_property and positioning the disable code in intel_update_fbc. v7: In case rotation property on inactive crtc is updated, we return successfully printing debug log as crtc is inactive and only property change is preserved. v8: update_plane is changed to update_primary_plane, crtc->fb is changed to crtc->primary->fb and return value of update_primary_plane is ignored. v9: added rotation property to primary plane instead of crtc. Removing reset of rotation property from lastclose. rotation_property is moved to drm_mode_config, so drm layer will take care of resetting. Adding updation of fbc when rotation is set to 0. Allowing rotation only if value is different than old one. v10: Calling intel_primary_plane_setplane instead of update_primary_plane in set_property(Daniel). v11: Using same set_property function for both primary and sprite, Adding primary plane specific code in the same function (Matt). v12: Removing disabling/ enabling of fbc from set_property because it is done from intel_pipe_set_base. Other formatting v13: we need to call disable_fbc before changing the rotation to 180, disable_fbc from intel_pipe_set_base gets called very late, that will be used to re-enable fbc if rotation is set to 0 (Ville). Testcase: igt/kms_rotation_crc Signed-off-by: Uma Shankar <uma.shankar@intel.com> Signed-off-by: Sagar Kamble <sagar.a.kamble@intel.com> Signed-off-by: Sonika Jindal <sonika.jindal@intel.com> [danvet: Add FIXME to explain why we need the open-coded update_fbc hunk to disable fbc when rotated 180 degree. And make checkpatch happier.] Acked-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: Updating plane parameters for primary plane in setplaneSonika Jindal2014-09-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This unifies how the primary plane functions work with how the sprite functions works, which allows us to reuse them to update primary plane properties. v2: Moving setting of plane members in the end to take care of failure cases and not-visible cases (Matt). Signed-off-by: Sonika Jindal <sonika.jindal@intel.com> Acked-by: Matt Roper <matthew.d.roper@intel.com> [danvet: Add a real commit message.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: Rework GPU reset sequence to match driver load & thawMcAulay, Alistair2014-09-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is to address Daniels concerns over different code during reset: http://lists.freedesktop.org/archives/intel-gfx/2014-June/047758.html "The reason for aiming as hard as possible to use the exact same code for driver load, gpu reset and runtime pm/system resume is that we've simply seen too many bugs due to slight variations and unintended omissions." Tested using igt drv_hangman. V2: Cleaner way of preventing check_wedge returning -EAGAIN V3: Clean the last_context during reset, to ensure do_switch() does the MI_SET_CONTEXT. As per review. Signed-off-by: McAulay, Alistair <alistair.mcaulay@intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> [danvet: Rebase over ctx->ppgtt rework and extend the comment in check_wedge a bit.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* | Merge branch 'drm-next-ast-fixes' of ssh://people.freedesktop.org/~/linux ↵Dave Airlie2014-09-16
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into drm-next Pull in first set of changes from Ben for ast on ppc. I've done a quick boot test on x86 and it still seems to boot. * 'drm-next-ast-fixes' of ssh://people.freedesktop.org/~/linux: drm/ast: Cleanup analog init code path drm/ast: Don't assume DVO enabled means SIL164 on uninitialized chips drm/ast: Properly initialize P2A base before using it in ast_init_3rdtx() drm/ast: POST chip at probe time if VGA not enabled drm/ast: Try to use MMIO registers when PIO isn't supported
| * | drm/ast: Cleanup analog init code pathBenjamin Herrenschmidt2014-09-14
| | | | | | | | | | | | | | | | | | | | | | | | Move the MMIO mangling to a separate routine and actually disable the DVO output when using pure analog. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | drm/ast: Don't assume DVO enabled means SIL164 on uninitialized chipsBenjamin Herrenschmidt2014-09-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It looks like the AST2400 comes up with the DVO enable bit set, which causes us to incorrectly assume we have a SIL164 regardless of the value of the scratch registers setup by the BMC firmware. So let's limit that test to the case where the chip has already been setup by a BIOS. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | drm/ast: Properly initialize P2A base before using it in ast_init_3rdtx()Benjamin Herrenschmidt2014-09-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the P2A has been used to target other SOC registers before that call, we're going to hit the wrong place so make sure we set the base address up properly before using it. (P2A stands for PCIe to AHB bridge and is the bride that allows accessing the AST's internal AHB bus using a relocatable 64k window in the second half of the PCIe MMIO BAR) Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | drm/ast: POST chip at probe time if VGA not enabledBenjamin Herrenschmidt2014-09-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We need to do it on machines without a BIOS such as POWER8. Also for detection to work without triggering PCIe errors, we need to enable VGA early on, inside ast_detect_chip(). While touching those files, replace a few hard coded register numbers with the corresponding symbolic constant. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | drm/ast: Try to use MMIO registers when PIO isn't supportedBenjamin Herrenschmidt2014-09-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the PIO resources haven't been assigned, then we have no choice but try to use the MMIO version. This is the case for example on POWER8 which doesn't support PIO at all. Chips rev 0x20 or later have MMIO decoding enabled by default. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | | drm/ast: Add reduced blanking modes for wide screen modeY.C. Chen2014-09-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Egbert Eich <eich@suse.com> Tested-by: Steven You2 Liang <liangyou2@lenovo.com> Signed-off-by: Y.C. Chen <yc_chen@aspeedtech.com> v3: based on [PATCH 1/2] drm/ast: Add missing entry to dclk_table[]. Add reduced blanking modes, improve mode matching to identify these modes by thier sync polarities. [airlied: argh whitespace damage] Signed-off-by: Dave Airlie <airlied@redhat.com>
* | | drm: backmerge tag 'v3.17-rc5' into drm-nextDave Airlie2014-09-15
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | This is requested to get the fixes for intel and radeon into the same tree for future development work. i915_display.c: fix missing dev_priv conflict.
| * | | Linux 3.17-rc5Linus Torvalds2014-09-14
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| * | | Merge branch 'for-linus' of ↵Linus Torvalds2014-09-14
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs Pull vfs fixes from Al Viro: "double iput() on failure exit in lustre, racy removal of spliced dentries from ->s_anon in __d_materialise_dentry() plus a bunch of assorted RCU pathwalk fixes" The RCU pathwalk fixes end up fixing a couple of cases where we incorrectly dropped out of RCU walking, due to incorrect initialization and testing of the sequence locks in some corner cases. Since dropping out of RCU walk mode forces the slow locked accesses, those corner cases slowed down quite dramatically. * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs: be careful with nd->inode in path_init() and follow_dotdot_rcu() don't bugger nd->seq on set_root_rcu() from follow_dotdot_rcu() fix bogus read_seqretry() checks introduced in b37199e move the call of __d_drop(anon) into __d_materialise_unique(dentry, anon) [fix] lustre: d_make_root() does iput() on dentry allocation failure
| | * | | be careful with nd->inode in path_init() and follow_dotdot_rcu()Al Viro2014-09-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | in the former we simply check if dentry is still valid after picking its ->d_inode; in the latter we fetch ->d_inode in the same places where we fetch dentry and its ->d_seq, under the same checks. Cc: stable@vger.kernel.org # 2.6.38+ Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
| | * | | don't bugger nd->seq on set_root_rcu() from follow_dotdot_rcu()Al Viro2014-09-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | return the value instead, and have path_init() do the assignment. Broken by "vfs: Fix absolute RCU path walk failures due to uninitialized seq number", which was Cc-stable with 2.6.38+ as destination. This one should go where it went. To avoid dummy value returned in case when root is already set (it would do no harm, actually, since the only caller that doesn't ignore the return value is guaranteed to have nd->root *not* set, but it's more obvious that way), lift the check into callers. And do the same to set_root(), to keep them in sync. Cc: stable@vger.kernel.org # 2.6.38+ Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
| | * | | fix bogus read_seqretry() checks introduced in b37199eAl Viro2014-09-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | read_seqretry() returns true on mismatch, not on match... Cc: stable@vger.kernel.org # 3.15+ Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
| | * | | move the call of __d_drop(anon) into __d_materialise_unique(dentry, anon)Al Viro2014-09-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | and lock the right list there Cc: stable@vger.kernel.org Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
| | * | | [fix] lustre: d_make_root() does iput() on dentry allocation failureAl Viro2014-09-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | double-free is a bad thing Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
| * | | | vfs: avoid non-forwarding large load after small store in path lookupLinus Torvalds2014-09-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The performance regression that Josef Bacik reported in the pathname lookup (see commit 99d263d4c5b2 "vfs: fix bad hashing of dentries") made me look at performance stability of the dcache code, just to verify that the problem was actually fixed. That turned up a few other problems in this area. There are a few cases where we exit RCU lookup mode and go to the slow serializing case when we shouldn't, Al has fixed those and they'll come in with the next VFS pull. But my performance verification also shows that link_path_walk() turns out to have a very unfortunate 32-bit store of the length and hash of the name we look up, followed by a 64-bit read of the combined hash_len field. That screws up the processor store to load forwarding, causing an unnecessary hickup in this critical routine. It's caused by the ugly calling convention for the "hash_name()" function, and easily fixed by just making hash_name() fill in the whole 'struct qstr' rather than passing it a pointer to just the hash value. With that, the profile for this function looks much smoother. Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
| * | | | Merge branch 'parisc-3.17-1' of ↵Linus Torvalds2014-09-14
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux Pull parisc updates from Helge Deller: "The most important patch is a new Light Weigth Syscall (LWS) for 8, 16, 32 and 64 bit atomic CAS operations which is required in order to be able to implement the atomic gcc builtins on our platform. Other than that, we wire up the seccomp, getrandom and memfd_create syscalls, fixes a minor off-by-one bug and a wrong printk string" * 'parisc-3.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux: parisc: Implement new LWS CAS supporting 64 bit operations. parisc: Wire up seccomp, getrandom and memfd_create syscalls parisc: dino: fix %d confusingly prefixed with 0x in format string parisc: sys_hpux: NUL terminator is one past the end
| | * | | | parisc: Implement new LWS CAS supporting 64 bit operations.Guy Martin2014-09-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current LWS cas only works correctly for 32bit. The new LWS allows for CAS operations of variable size. Signed-off-by: Guy Martin <gmsoft@tuxicoman.be> Cc: <stable@vger.kernel.org> # 3.13+ Signed-off-by: Helge Deller <deller@gmx.de>
| | * | | | parisc: Wire up seccomp, getrandom and memfd_create syscallsHelge Deller2014-08-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With secure computing we only support the SECCOMP_MODE_STRICT mode for now. Signed-off-by: Helge Deller <deller@gmx.de>
| | * | | | parisc: dino: fix %d confusingly prefixed with 0x in format stringHans Wennborg2014-08-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Hans Wennborg <hans@hanshq.net> Signed-off-by: Helge Deller <deller@gmx.de>
| | * | | | parisc: sys_hpux: NUL terminator is one past the endDan Carpenter2014-08-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We allocate "len" number of chars so we should put the NUL at "len - 1" to avoid corrupting memory. Btw, strlen_user() is different from the normal strlen() function because it includes NUL terminator in the count. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Helge Deller <deller@gmx.de>
| * | | | | Merge tag 'ntb-3.17' of git://github.com/jonmason/ntbLinus Torvalds2014-09-14
| |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ntb driver bugfixes from Jon Mason: "NTB driver fixes for queue spread and buffer alignment. Also, update to MAINTAINERS to reflect new e-mail address" * tag 'ntb-3.17' of git://github.com/jonmason/ntb: ntb: Add alignment check to meet hardware requirement MAINTAINERS: update NTB info NTB: correct the spread of queues over mw's
| | * | | | | ntb: Add alignment check to meet hardware requirementDave Jiang2014-09-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The NTB translate register must have the value to be BAR size aligned. This alignment check make sure that the DMA memory allocated has the proper alignment. Another requirement for NTB to function properly with memory window BAR size greater or equal to 4M is to use the CMA feature in 3.16 kernel with the appropriate CONFIG_CMA_ALIGNMENT and CONFIG_CMA_SIZE_MBYTES set. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
| | * | | | | MAINTAINERS: update NTB infoJon Mason2014-09-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update my contact info to my personal email address and add Dave Jiang. Signed-off-by: Jon Mason <jon.mason@intel.com> Signed-off-by: Dave Jiang <dave.jiang@intel.com>
| | * | | | | NTB: correct the spread of queues over mw'sJon Mason2014-09-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The detection of an uneven number of queues on the given memory windows was not correct. The mw_num is zero based and the mod should be division to spread them evenly over the mw's. Signed-off-by: Jon Mason <jon.mason@intel.com>
| * | | | | | Merge branch 'irq-urgent-for-linus' of ↵Linus Torvalds2014-09-14
| |\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull ARM irq chip fixes from Thomas Gleixner: "Another pile of ARM specific irq chip fixlets: - off by one bugs in the crossbar driver - missing annotations - a bunch of "make it compile" updates I pulled the lot today from Jason, but it has been in -next for at least a week" * 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: irqchip: gic-v3: Declare rdist as __percpu pointer to __iomem pointer irqchip: gic: Make gic_default_routable_irq_domain_ops static irqchip: exynos-combiner: Fix compilation error on ARM64 irqchip: crossbar: Off by one bugs in init irqchip: gic-v3: Tag all low level accessors __maybe_unused irqchip: gic-v3: Only define gic_peek_irq() when building SMP
| | * \ \ \ \ \ Merge tag 'irqchip-urgent-3.17' of ↵Thomas Gleixner2014-09-14
| | |\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.infradead.org/users/jcooper/linux into irq/urgent irqchip fixes for v3.17 from Jason Cooper - GIC/GICV3: Various fixlets - crossbar: Fix off-by-one bug - exynos-combiner: Fix arm64 build error
| | | * | | | | | irqchip: gic-v3: Declare rdist as __percpu pointer to __iomem pointerWill Deacon2014-09-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The __percpu __iomem annotations on the rdist base are contradictory and confuse static checkers such as sparse. This patch fixes the anotations so that rdist is described as a __percpu pointer to an __iomem pointer. Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Link: https://lkml.kernel.org/r/1409062410-25891-9-git-send-email-will.deacon@arm.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | | * | | | | | irqchip: gic: Make gic_default_routable_irq_domain_ops staticWill Deacon2014-09-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The internal irq domain ops for the GIC are not used directly anywhere else, so make them static. This gets rid of a sparse warning on the file. Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Link: https://lkml.kernel.org/r/1409062410-25891-8-git-send-email-will.deacon@arm.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-04 23:21:19 -0400