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authorDave Jiang <dave.jiang@intel.com>2014-08-28 16:53:02 -0400
committerJon Mason <jdmason@kudzu.us>2014-09-14 00:10:38 -0400
commit3cc5ba1938eea0de372a41d1687c8030049c5e8f (patch)
tree042e4a40cb3ae8470018821ca6ee569687d413b8
parent9ef6bf6c75abcfee3cfc3d751b8091200771aeec (diff)
ntb: Add alignment check to meet hardware requirement
The NTB translate register must have the value to be BAR size aligned. This alignment check make sure that the DMA memory allocated has the proper alignment. Another requirement for NTB to function properly with memory window BAR size greater or equal to 4M is to use the CMA feature in 3.16 kernel with the appropriate CONFIG_CMA_ALIGNMENT and CONFIG_CMA_SIZE_MBYTES set. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
-rw-r--r--drivers/ntb/ntb_transport.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/ntb/ntb_transport.c b/drivers/ntb/ntb_transport.c
index 611fef48bdc3..e9bf2f47b61a 100644
--- a/drivers/ntb/ntb_transport.c
+++ b/drivers/ntb/ntb_transport.c
@@ -576,6 +576,19 @@ static int ntb_set_mw(struct ntb_transport *nt, int num_mw, unsigned int size)
576 return -ENOMEM; 576 return -ENOMEM;
577 } 577 }
578 578
579 /*
580 * we must ensure that the memory address allocated is BAR size
581 * aligned in order for the XLAT register to take the value. This
582 * is a requirement of the hardware. It is recommended to setup CMA
583 * for BAR sizes equal or greater than 4MB.
584 */
585 if (!IS_ALIGNED(mw->dma_addr, mw->size)) {
586 dev_err(&pdev->dev, "DMA memory %pad not aligned to BAR size\n",
587 &mw->dma_addr);
588 ntb_free_mw(nt, num_mw);
589 return -ENOMEM;
590 }
591
579 /* Notify HW the memory location of the receive buffer */ 592 /* Notify HW the memory location of the receive buffer */
580 ntb_set_mw_addr(nt->ndev, num_mw, mw->dma_addr); 593 ntb_set_mw_addr(nt->ndev, num_mw, mw->dma_addr);
581 594