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-rw-r--r--include/linux/spi/ad7879.h12
-rw-r--r--include/linux/spi/ads7846.h3
-rw-r--r--include/linux/spi/dw_spi.h217
-rw-r--r--include/linux/spi/l4f00242t03.h31
-rw-r--r--include/linux/spi/max7301.h18
-rw-r--r--include/linux/spi/sh_msiof.h10
-rw-r--r--include/linux/spi/spi.h1
-rw-r--r--include/linux/spi/spi_bitbang.h2
-rw-r--r--include/linux/spi/wl12xx.h1
-rw-r--r--include/linux/spi/xilinx_spi.h20
10 files changed, 309 insertions, 6 deletions
diff --git a/include/linux/spi/ad7879.h b/include/linux/spi/ad7879.h
index 4231104c9afa..6334cee1a3be 100644
--- a/include/linux/spi/ad7879.h
+++ b/include/linux/spi/ad7879.h
@@ -28,8 +28,12 @@ struct ad7879_platform_data {
28 * 1 = 4, 2 = 8, 3 = 16 (median > averaging) 28 * 1 = 4, 2 = 8, 3 = 16 (median > averaging)
29 */ 29 */
30 u8 median; 30 u8 median;
31 /* 1 = AUX/VBAT/GPIO set to GPIO Output */ 31 /* 1 = AUX/VBAT/GPIO export GPIO to gpiolib
32 u8 gpio_output; 32 * requires CONFIG_GPIOLIB
33 /* Initial GPIO pin state (valid if gpio_output = 1) */ 33 */
34 u8 gpio_default; 34 bool gpio_export;
35 /* identifies the first GPIO number handled by this chip;
36 * or, if negative, requests dynamic ID allocation.
37 */
38 s32 gpio_base;
35}; 39};
diff --git a/include/linux/spi/ads7846.h b/include/linux/spi/ads7846.h
index 51948eb6927a..b4ae570d3c98 100644
--- a/include/linux/spi/ads7846.h
+++ b/include/linux/spi/ads7846.h
@@ -12,7 +12,7 @@ enum ads7846_filter {
12}; 12};
13 13
14struct ads7846_platform_data { 14struct ads7846_platform_data {
15 u16 model; /* 7843, 7845, 7846. */ 15 u16 model; /* 7843, 7845, 7846, 7873. */
16 u16 vref_delay_usecs; /* 0 for external vref; etc */ 16 u16 vref_delay_usecs; /* 0 for external vref; etc */
17 u16 vref_mv; /* external vref value, milliVolts */ 17 u16 vref_mv; /* external vref value, milliVolts */
18 bool keep_vref_on; /* set to keep vref on for differential 18 bool keep_vref_on; /* set to keep vref on for differential
@@ -53,5 +53,6 @@ struct ads7846_platform_data {
53 int (*filter) (void *filter_data, int data_idx, int *val); 53 int (*filter) (void *filter_data, int data_idx, int *val);
54 void (*filter_cleanup)(void *filter_data); 54 void (*filter_cleanup)(void *filter_data);
55 void (*wait_for_sync)(void); 55 void (*wait_for_sync)(void);
56 bool wakeup;
56}; 57};
57 58
diff --git a/include/linux/spi/dw_spi.h b/include/linux/spi/dw_spi.h
new file mode 100644
index 000000000000..cc813f95a2f2
--- /dev/null
+++ b/include/linux/spi/dw_spi.h
@@ -0,0 +1,217 @@
1#ifndef DW_SPI_HEADER_H
2#define DW_SPI_HEADER_H
3#include <linux/io.h>
4
5/* Bit fields in CTRLR0 */
6#define SPI_DFS_OFFSET 0
7
8#define SPI_FRF_OFFSET 4
9#define SPI_FRF_SPI 0x0
10#define SPI_FRF_SSP 0x1
11#define SPI_FRF_MICROWIRE 0x2
12#define SPI_FRF_RESV 0x3
13
14#define SPI_MODE_OFFSET 6
15#define SPI_SCPH_OFFSET 6
16#define SPI_SCOL_OFFSET 7
17#define SPI_TMOD_OFFSET 8
18#define SPI_TMOD_TR 0x0 /* xmit & recv */
19#define SPI_TMOD_TO 0x1 /* xmit only */
20#define SPI_TMOD_RO 0x2 /* recv only */
21#define SPI_TMOD_EPROMREAD 0x3 /* eeprom read mode */
22
23#define SPI_SLVOE_OFFSET 10
24#define SPI_SRL_OFFSET 11
25#define SPI_CFS_OFFSET 12
26
27/* Bit fields in SR, 7 bits */
28#define SR_MASK 0x7f /* cover 7 bits */
29#define SR_BUSY (1 << 0)
30#define SR_TF_NOT_FULL (1 << 1)
31#define SR_TF_EMPT (1 << 2)
32#define SR_RF_NOT_EMPT (1 << 3)
33#define SR_RF_FULL (1 << 4)
34#define SR_TX_ERR (1 << 5)
35#define SR_DCOL (1 << 6)
36
37/* Bit fields in ISR, IMR, RISR, 7 bits */
38#define SPI_INT_TXEI (1 << 0)
39#define SPI_INT_TXOI (1 << 1)
40#define SPI_INT_RXUI (1 << 2)
41#define SPI_INT_RXOI (1 << 3)
42#define SPI_INT_RXFI (1 << 4)
43#define SPI_INT_MSTI (1 << 5)
44
45/* TX RX interrupt level threshhold, max can be 256 */
46#define SPI_INT_THRESHOLD 32
47
48enum dw_ssi_type {
49 SSI_MOTO_SPI = 0,
50 SSI_TI_SSP,
51 SSI_NS_MICROWIRE,
52};
53
54struct dw_spi_reg {
55 u32 ctrl0;
56 u32 ctrl1;
57 u32 ssienr;
58 u32 mwcr;
59 u32 ser;
60 u32 baudr;
61 u32 txfltr;
62 u32 rxfltr;
63 u32 txflr;
64 u32 rxflr;
65 u32 sr;
66 u32 imr;
67 u32 isr;
68 u32 risr;
69 u32 txoicr;
70 u32 rxoicr;
71 u32 rxuicr;
72 u32 msticr;
73 u32 icr;
74 u32 dmacr;
75 u32 dmatdlr;
76 u32 dmardlr;
77 u32 idr;
78 u32 version;
79 u32 dr; /* Currently oper as 32 bits,
80 though only low 16 bits matters */
81} __packed;
82
83struct dw_spi {
84 struct spi_master *master;
85 struct spi_device *cur_dev;
86 struct device *parent_dev;
87 enum dw_ssi_type type;
88
89 void __iomem *regs;
90 unsigned long paddr;
91 u32 iolen;
92 int irq;
93 u32 fifo_len; /* depth of the FIFO buffer */
94 u32 max_freq; /* max bus freq supported */
95
96 u16 bus_num;
97 u16 num_cs; /* supported slave numbers */
98
99 /* Driver message queue */
100 struct workqueue_struct *workqueue;
101 struct work_struct pump_messages;
102 spinlock_t lock;
103 struct list_head queue;
104 int busy;
105 int run;
106
107 /* Message Transfer pump */
108 struct tasklet_struct pump_transfers;
109
110 /* Current message transfer state info */
111 struct spi_message *cur_msg;
112 struct spi_transfer *cur_transfer;
113 struct chip_data *cur_chip;
114 struct chip_data *prev_chip;
115 size_t len;
116 void *tx;
117 void *tx_end;
118 void *rx;
119 void *rx_end;
120 int dma_mapped;
121 dma_addr_t rx_dma;
122 dma_addr_t tx_dma;
123 size_t rx_map_len;
124 size_t tx_map_len;
125 u8 n_bytes; /* current is a 1/2 bytes op */
126 u8 max_bits_per_word; /* maxim is 16b */
127 u32 dma_width;
128 int cs_change;
129 int (*write)(struct dw_spi *dws);
130 int (*read)(struct dw_spi *dws);
131 irqreturn_t (*transfer_handler)(struct dw_spi *dws);
132 void (*cs_control)(u32 command);
133
134 /* Dma info */
135 int dma_inited;
136 struct dma_chan *txchan;
137 struct dma_chan *rxchan;
138 int txdma_done;
139 int rxdma_done;
140 u64 tx_param;
141 u64 rx_param;
142 struct device *dma_dev;
143 dma_addr_t dma_addr;
144
145 /* Bus interface info */
146 void *priv;
147#ifdef CONFIG_DEBUG_FS
148 struct dentry *debugfs;
149#endif
150};
151
152#define dw_readl(dw, name) \
153 __raw_readl(&(((struct dw_spi_reg *)dw->regs)->name))
154#define dw_writel(dw, name, val) \
155 __raw_writel((val), &(((struct dw_spi_reg *)dw->regs)->name))
156#define dw_readw(dw, name) \
157 __raw_readw(&(((struct dw_spi_reg *)dw->regs)->name))
158#define dw_writew(dw, name, val) \
159 __raw_writew((val), &(((struct dw_spi_reg *)dw->regs)->name))
160
161static inline void spi_enable_chip(struct dw_spi *dws, int enable)
162{
163 dw_writel(dws, ssienr, (enable ? 1 : 0));
164}
165
166static inline void spi_set_clk(struct dw_spi *dws, u16 div)
167{
168 dw_writel(dws, baudr, div);
169}
170
171static inline void spi_chip_sel(struct dw_spi *dws, u16 cs)
172{
173 if (cs > dws->num_cs)
174 return;
175
176 if (dws->cs_control)
177 dws->cs_control(1);
178
179 dw_writel(dws, ser, 1 << cs);
180}
181
182/* Disable IRQ bits */
183static inline void spi_mask_intr(struct dw_spi *dws, u32 mask)
184{
185 u32 new_mask;
186
187 new_mask = dw_readl(dws, imr) & ~mask;
188 dw_writel(dws, imr, new_mask);
189}
190
191/* Enable IRQ bits */
192static inline void spi_umask_intr(struct dw_spi *dws, u32 mask)
193{
194 u32 new_mask;
195
196 new_mask = dw_readl(dws, imr) | mask;
197 dw_writel(dws, imr, new_mask);
198}
199
200/*
201 * Each SPI slave device to work with dw_api controller should
202 * has such a structure claiming its working mode (PIO/DMA etc),
203 * which can be save in the "controller_data" member of the
204 * struct spi_device
205 */
206struct dw_spi_chip {
207 u8 poll_mode; /* 0 for contoller polling mode */
208 u8 type; /* SPI/SSP/Micrwire */
209 u8 enable_dma;
210 void (*cs_control)(u32 command);
211};
212
213extern int dw_spi_add_host(struct dw_spi *dws);
214extern void dw_spi_remove_host(struct dw_spi *dws);
215extern int dw_spi_suspend_host(struct dw_spi *dws);
216extern int dw_spi_resume_host(struct dw_spi *dws);
217#endif /* DW_SPI_HEADER_H */
diff --git a/include/linux/spi/l4f00242t03.h b/include/linux/spi/l4f00242t03.h
new file mode 100644
index 000000000000..aee1dbda4edc
--- /dev/null
+++ b/include/linux/spi/l4f00242t03.h
@@ -0,0 +1,31 @@
1/*
2 * l4f00242t03.h -- Platform glue for Epson L4F00242T03 LCD
3 *
4 * Copyright (c) 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
5 * Based on Marek Vasut work in lms283gf05.h
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19*/
20
21#ifndef _INCLUDE_LINUX_SPI_L4F00242T03_H_
22#define _INCLUDE_LINUX_SPI_L4F00242T03_H_
23
24struct l4f00242t03_pdata {
25 unsigned int reset_gpio;
26 unsigned int data_enable_gpio;
27 const char *io_supply; /* will be set to 1.8 V */
28 const char *core_supply; /* will be set to 2.8 V */
29};
30
31#endif /* _INCLUDE_LINUX_SPI_L4F00242T03_H_ */
diff --git a/include/linux/spi/max7301.h b/include/linux/spi/max7301.h
index 6dfd83f19b4b..34af0a3477bf 100644
--- a/include/linux/spi/max7301.h
+++ b/include/linux/spi/max7301.h
@@ -1,9 +1,27 @@
1#ifndef LINUX_SPI_MAX7301_H 1#ifndef LINUX_SPI_MAX7301_H
2#define LINUX_SPI_MAX7301_H 2#define LINUX_SPI_MAX7301_H
3 3
4#include <linux/gpio.h>
5
6/*
7 * Some registers must be read back to modify.
8 * To save time we cache them here in memory
9 */
10struct max7301 {
11 struct mutex lock;
12 u8 port_config[8]; /* field 0 is unused */
13 u32 out_level; /* cached output levels */
14 struct gpio_chip chip;
15 struct device *dev;
16 int (*write)(struct device *dev, unsigned int reg, unsigned int val);
17 int (*read)(struct device *dev, unsigned int reg);
18};
19
4struct max7301_platform_data { 20struct max7301_platform_data {
5 /* number assigned to the first GPIO */ 21 /* number assigned to the first GPIO */
6 unsigned base; 22 unsigned base;
7}; 23};
8 24
25extern int __max730x_remove(struct device *dev);
26extern int __max730x_probe(struct max7301 *ts);
9#endif 27#endif
diff --git a/include/linux/spi/sh_msiof.h b/include/linux/spi/sh_msiof.h
new file mode 100644
index 000000000000..2e8db3d2d2e5
--- /dev/null
+++ b/include/linux/spi/sh_msiof.h
@@ -0,0 +1,10 @@
1#ifndef __SPI_SH_MSIOF_H__
2#define __SPI_SH_MSIOF_H__
3
4struct sh_msiof_spi_info {
5 int tx_fifo_override;
6 int rx_fifo_override;
7 u16 num_chipselect;
8};
9
10#endif /* __SPI_SH_MSIOF_H__ */
diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
index 97b60b37f445..af56071b06f9 100644
--- a/include/linux/spi/spi.h
+++ b/include/linux/spi/spi.h
@@ -21,6 +21,7 @@
21 21
22#include <linux/device.h> 22#include <linux/device.h>
23#include <linux/mod_devicetable.h> 23#include <linux/mod_devicetable.h>
24#include <linux/slab.h>
24 25
25/* 26/*
26 * INTERFACES between SPI master-side drivers and SPI infrastructure. 27 * INTERFACES between SPI master-side drivers and SPI infrastructure.
diff --git a/include/linux/spi/spi_bitbang.h b/include/linux/spi/spi_bitbang.h
index eed4254bd503..3274c507b8a9 100644
--- a/include/linux/spi/spi_bitbang.h
+++ b/include/linux/spi/spi_bitbang.h
@@ -15,7 +15,7 @@
15 * Some hardware works well with requests at spi_transfer scope: 15 * Some hardware works well with requests at spi_transfer scope:
16 * 16 *
17 * - Drivers leveraging smarter hardware, with fifos or DMA; or for half 17 * - Drivers leveraging smarter hardware, with fifos or DMA; or for half
18 * duplex (MicroWire) controllers. Provide chipslect() and txrx_bufs(), 18 * duplex (MicroWire) controllers. Provide chipselect() and txrx_bufs(),
19 * and custom setup()/cleanup() methods. 19 * and custom setup()/cleanup() methods.
20 */ 20 */
21 21
diff --git a/include/linux/spi/wl12xx.h b/include/linux/spi/wl12xx.h
index 11430cab2aad..aed64ed3dc8a 100644
--- a/include/linux/spi/wl12xx.h
+++ b/include/linux/spi/wl12xx.h
@@ -26,6 +26,7 @@
26 26
27struct wl12xx_platform_data { 27struct wl12xx_platform_data {
28 void (*set_power)(bool enable); 28 void (*set_power)(bool enable);
29 bool use_eeprom;
29}; 30};
30 31
31#endif 32#endif
diff --git a/include/linux/spi/xilinx_spi.h b/include/linux/spi/xilinx_spi.h
new file mode 100644
index 000000000000..6f17278810b0
--- /dev/null
+++ b/include/linux/spi/xilinx_spi.h
@@ -0,0 +1,20 @@
1#ifndef __LINUX_SPI_XILINX_SPI_H
2#define __LINUX_SPI_XILINX_SPI_H
3
4/**
5 * struct xspi_platform_data - Platform data of the Xilinx SPI driver
6 * @num_chipselect: Number of chip select by the IP.
7 * @little_endian: If registers should be accessed little endian or not.
8 * @bits_per_word: Number of bits per word.
9 * @devices: Devices to add when the driver is probed.
10 * @num_devices: Number of devices in the devices array.
11 */
12struct xspi_platform_data {
13 u16 num_chipselect;
14 bool little_endian;
15 u8 bits_per_word;
16 struct spi_board_info *devices;
17 u8 num_devices;
18};
19
20#endif /* __LINUX_SPI_XILINX_SPI_H */
generated by cgit v1.2.2 (git 2.25.0) at 2025-04-17 12:01:49 -0400