Merge branch 'wip-2.6.34' into old-private-masterarchived-private-master

10 files changed, 309 insertions, 6 deletions

diff --git a/include/linux/spi/ad7879.h b/include/linux/spi/ad7879.h
index 4231104c9afa..6334cee1a3be 100644
--- a/include/linux/spi/ad7879.h
+++ b/include/linux/spi/ad7879.h
@@ -28,8 +28,12 @@ struct ad7879_platform_data {
          * 1 = 4, 2 = 8, 3 = 16 (median > averaging)
          */
         u8      median;
-        /* 1 = AUX/VBAT/GPIO set to GPIO Output */
-        u8      gpio_output;
-        /* Initial GPIO pin state (valid if gpio_output = 1) */
-        u8      gpio_default;
+        /* 1 = AUX/VBAT/GPIO export GPIO to gpiolib
+         * requires CONFIG_GPIOLIB
+         */
+        bool    gpio_export;
+        /* identifies the first GPIO number handled by this chip;
+         * or, if negative, requests dynamic ID allocation.
+         */
+        s32     gpio_base;
 };
diff --git a/include/linux/spi/ads7846.h b/include/linux/spi/ads7846.h
index 51948eb6927a..b4ae570d3c98 100644
--- a/include/linux/spi/ads7846.h
+++ b/include/linux/spi/ads7846.h
@@ -12,7 +12,7 @@ enum ads7846_filter {
 };
 
 struct ads7846_platform_data {
-        u16     model;                  /* 7843, 7845, 7846. */
+        u16     model;                  /* 7843, 7845, 7846, 7873. */
         u16     vref_delay_usecs;       /* 0 for external vref; etc */
         u16     vref_mv;                /* external vref value, milliVolts */
         bool    keep_vref_on;           /* set to keep vref on for differential
@@ -53,5 +53,6 @@ struct ads7846_platform_data {
         int     (*filter)       (void *filter_data, int data_idx, int *val);
         void    (*filter_cleanup)(void *filter_data);
         void    (*wait_for_sync)(void);
+        bool    wakeup;
 };
 
diff --git a/include/linux/spi/dw_spi.h b/include/linux/spi/dw_spi.h
new file mode 100644
index 000000000000..cc813f95a2f2
--- /dev/null
+++ b/include/linux/spi/dw_spi.h
@@ -0,0 +1,217 @@
+#ifndef DW_SPI_HEADER_H
+#define DW_SPI_HEADER_H
+#include <linux/io.h>
+
+/* Bit fields in CTRLR0 */
+#define SPI_DFS_OFFSET                  0
+
+#define SPI_FRF_OFFSET                  4
+#define SPI_FRF_SPI                     0x0
+#define SPI_FRF_SSP                     0x1
+#define SPI_FRF_MICROWIRE               0x2
+#define SPI_FRF_RESV                    0x3
+
+#define SPI_MODE_OFFSET                 6
+#define SPI_SCPH_OFFSET                 6
+#define SPI_SCOL_OFFSET                 7
+#define SPI_TMOD_OFFSET                 8
+#define SPI_TMOD_TR                     0x0             /* xmit & recv */
+#define SPI_TMOD_TO                     0x1             /* xmit only */
+#define SPI_TMOD_RO                     0x2             /* recv only */
+#define SPI_TMOD_EPROMREAD              0x3             /* eeprom read mode */
+
+#define SPI_SLVOE_OFFSET                10
+#define SPI_SRL_OFFSET                  11
+#define SPI_CFS_OFFSET                  12
+
+/* Bit fields in SR, 7 bits */
+#define SR_MASK                         0x7f            /* cover 7 bits */
+#define SR_BUSY                         (1 << 0)
+#define SR_TF_NOT_FULL                  (1 << 1)
+#define SR_TF_EMPT                      (1 << 2)
+#define SR_RF_NOT_EMPT                  (1 << 3)
+#define SR_RF_FULL                      (1 << 4)
+#define SR_TX_ERR                       (1 << 5)
+#define SR_DCOL                         (1 << 6)
+
+/* Bit fields in ISR, IMR, RISR, 7 bits */
+#define SPI_INT_TXEI                    (1 << 0)
+#define SPI_INT_TXOI                    (1 << 1)
+#define SPI_INT_RXUI                    (1 << 2)
+#define SPI_INT_RXOI                    (1 << 3)
+#define SPI_INT_RXFI                    (1 << 4)
+#define SPI_INT_MSTI                    (1 << 5)
+
+/* TX RX interrupt level threshhold, max can be 256 */
+#define SPI_INT_THRESHOLD               32
+
+enum dw_ssi_type {
+        SSI_MOTO_SPI = 0,
+        SSI_TI_SSP,
+        SSI_NS_MICROWIRE,
+};
+
+struct dw_spi_reg {
+        u32     ctrl0;
+        u32     ctrl1;
+        u32     ssienr;
+        u32     mwcr;
+        u32     ser;
+        u32     baudr;
+        u32     txfltr;
+        u32     rxfltr;
+        u32     txflr;
+        u32     rxflr;
+        u32     sr;
+        u32     imr;
+        u32     isr;
+        u32     risr;
+        u32     txoicr;
+        u32     rxoicr;
+        u32     rxuicr;
+        u32     msticr;
+        u32     icr;
+        u32     dmacr;
+        u32     dmatdlr;
+        u32     dmardlr;
+        u32     idr;
+        u32     version;
+        u32     dr;             /* Currently oper as 32 bits,
+                                though only low 16 bits matters */
+} __packed;
+
+struct dw_spi {
+        struct spi_master       *master;
+        struct spi_device       *cur_dev;
+        struct device           *parent_dev;
+        enum dw_ssi_type        type;
+
+        void __iomem            *regs;
+        unsigned long           paddr;
+        u32                     iolen;
+        int                     irq;
+        u32                     fifo_len;       /* depth of the FIFO buffer */
+        u32                     max_freq;       /* max bus freq supported */
+
+        u16                     bus_num;
+        u16                     num_cs;         /* supported slave numbers */
+
+        /* Driver message queue */
+        struct workqueue_struct *workqueue;
+        struct work_struct      pump_messages;
+        spinlock_t              lock;
+        struct list_head        queue;
+        int                     busy;
+        int                     run;
+
+        /* Message Transfer pump */
+        struct tasklet_struct   pump_transfers;
+
+        /* Current message transfer state info */
+        struct spi_message      *cur_msg;
+        struct spi_transfer     *cur_transfer;
+        struct chip_data        *cur_chip;
+        struct chip_data        *prev_chip;
+        size_t                  len;
+        void                    *tx;
+        void                    *tx_end;
+        void                    *rx;
+        void                    *rx_end;
+        int                     dma_mapped;
+        dma_addr_t              rx_dma;
+        dma_addr_t              tx_dma;
+        size_t                  rx_map_len;
+        size_t                  tx_map_len;
+        u8                      n_bytes;        /* current is a 1/2 bytes op */
+        u8                      max_bits_per_word;      /* maxim is 16b */
+        u32                     dma_width;
+        int                     cs_change;
+        int                     (*write)(struct dw_spi *dws);
+        int                     (*read)(struct dw_spi *dws);
+        irqreturn_t             (*transfer_handler)(struct dw_spi *dws);
+        void                    (*cs_control)(u32 command);
+
+        /* Dma info */
+        int                     dma_inited;
+        struct dma_chan         *txchan;
+        struct dma_chan         *rxchan;
+        int                     txdma_done;
+        int                     rxdma_done;
+        u64                     tx_param;
+        u64                     rx_param;
+        struct device           *dma_dev;
+        dma_addr_t              dma_addr;
+
+        /* Bus interface info */
+        void                    *priv;
+#ifdef CONFIG_DEBUG_FS
+        struct dentry *debugfs;
+#endif
+};
+
+#define dw_readl(dw, name) \
+        __raw_readl(&(((struct dw_spi_reg *)dw->regs)->name))
+#define dw_writel(dw, name, val) \
+        __raw_writel((val), &(((struct dw_spi_reg *)dw->regs)->name))
+#define dw_readw(dw, name) \
+        __raw_readw(&(((struct dw_spi_reg *)dw->regs)->name))
+#define dw_writew(dw, name, val) \
+        __raw_writew((val), &(((struct dw_spi_reg *)dw->regs)->name))
+
+static inline void spi_enable_chip(struct dw_spi *dws, int enable)
+{
+        dw_writel(dws, ssienr, (enable ? 1 : 0));
+}
+
+static inline void spi_set_clk(struct dw_spi *dws, u16 div)
+{
+        dw_writel(dws, baudr, div);
+}
+
+static inline void spi_chip_sel(struct dw_spi *dws, u16 cs)
+{
+        if (cs > dws->num_cs)
+                return;
+
+        if (dws->cs_control)
+                dws->cs_control(1);
+
+        dw_writel(dws, ser, 1 << cs);
+}
+
+/* Disable IRQ bits */
+static inline void spi_mask_intr(struct dw_spi *dws, u32 mask)
+{
+        u32 new_mask;
+
+        new_mask = dw_readl(dws, imr) & ~mask;
+        dw_writel(dws, imr, new_mask);
+}
+
+/* Enable IRQ bits */
+static inline void spi_umask_intr(struct dw_spi *dws, u32 mask)
+{
+        u32 new_mask;
+
+        new_mask = dw_readl(dws, imr) | mask;
+        dw_writel(dws, imr, new_mask);
+}
+
+/*
+ * Each SPI slave device to work with dw_api controller should
+ * has such a structure claiming its working mode (PIO/DMA etc),
+ * which can be save in the "controller_data" member of the
+ * struct spi_device
+ */
+struct dw_spi_chip {
+        u8 poll_mode;   /* 0 for contoller polling mode */
+        u8 type;        /* SPI/SSP/Micrwire */
+        u8 enable_dma;
+        void (*cs_control)(u32 command);
+};
+
+extern int dw_spi_add_host(struct dw_spi *dws);
+extern void dw_spi_remove_host(struct dw_spi *dws);
+extern int dw_spi_suspend_host(struct dw_spi *dws);
+extern int dw_spi_resume_host(struct dw_spi *dws);
+#endif /* DW_SPI_HEADER_H */
diff --git a/include/linux/spi/l4f00242t03.h b/include/linux/spi/l4f00242t03.h
new file mode 100644
index 000000000000..aee1dbda4edc
--- /dev/null
+++ b/include/linux/spi/l4f00242t03.h
@@ -0,0 +1,31 @@
+/*
+ * l4f00242t03.h -- Platform glue for Epson L4F00242T03 LCD
+ *
+ * Copyright (c) 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
+ * Based on Marek Vasut work in lms283gf05.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+*/
+
+#ifndef _INCLUDE_LINUX_SPI_L4F00242T03_H_
+#define _INCLUDE_LINUX_SPI_L4F00242T03_H_
+
+struct l4f00242t03_pdata {
+        unsigned int    reset_gpio;
+        unsigned int    data_enable_gpio;
+        const char      *io_supply;     /* will be set to 1.8 V */
+        const char      *core_supply;   /* will be set to 2.8 V */
+};
+
+#endif /* _INCLUDE_LINUX_SPI_L4F00242T03_H_ */
diff --git a/include/linux/spi/max7301.h b/include/linux/spi/max7301.h
index 6dfd83f19b4b..34af0a3477bf 100644
--- a/include/linux/spi/max7301.h
+++ b/include/linux/spi/max7301.h
@@ -1,9 +1,27 @@
 #ifndef LINUX_SPI_MAX7301_H
 #define LINUX_SPI_MAX7301_H
 
+#include <linux/gpio.h>
+
+/*
+ * Some registers must be read back to modify.
+ * To save time we cache them here in memory
+ */
+struct max7301 {
+        struct mutex    lock;
+        u8              port_config[8]; /* field 0 is unused */
+        u32             out_level;      /* cached output levels */
+        struct gpio_chip chip;
+        struct device *dev;
+        int (*write)(struct device *dev, unsigned int reg, unsigned int val);
+        int (*read)(struct device *dev, unsigned int reg);
+};
+
 struct max7301_platform_data {
         /* number assigned to the first GPIO */
         unsigned        base;
 };
 
+extern int __max730x_remove(struct device *dev);
+extern int __max730x_probe(struct max7301 *ts);
 #endif
diff --git a/include/linux/spi/sh_msiof.h b/include/linux/spi/sh_msiof.h
new file mode 100644
index 000000000000..2e8db3d2d2e5
--- /dev/null
+++ b/include/linux/spi/sh_msiof.h
@@ -0,0 +1,10 @@
+#ifndef __SPI_SH_MSIOF_H__
+#define __SPI_SH_MSIOF_H__
+
+struct sh_msiof_spi_info {
+        int tx_fifo_override;
+        int rx_fifo_override;
+        u16 num_chipselect;
+};
+
+#endif /* __SPI_SH_MSIOF_H__ */
diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
index 97b60b37f445..af56071b06f9 100644
--- a/include/linux/spi/spi.h
+++ b/include/linux/spi/spi.h
@@ -21,6 +21,7 @@
 
 #include <linux/device.h>
 #include <linux/mod_devicetable.h>
+#include <linux/slab.h>
 
 /*
  * INTERFACES between SPI master-side drivers and SPI infrastructure.
diff --git a/include/linux/spi/spi_bitbang.h b/include/linux/spi/spi_bitbang.h
index eed4254bd503..3274c507b8a9 100644
--- a/include/linux/spi/spi_bitbang.h
+++ b/include/linux/spi/spi_bitbang.h
@@ -15,7 +15,7 @@
  * Some hardware works well with requests at spi_transfer scope:
  *
  *   -  Drivers leveraging smarter hardware, with fifos or DMA; or for half
- *      duplex (MicroWire) controllers.  Provide chipslect() and txrx_bufs(),
+ *      duplex (MicroWire) controllers.  Provide chipselect() and txrx_bufs(),
  *      and custom setup()/cleanup() methods.
  */
 
diff --git a/include/linux/spi/wl12xx.h b/include/linux/spi/wl12xx.h
index 11430cab2aad..aed64ed3dc8a 100644
--- a/include/linux/spi/wl12xx.h
+++ b/include/linux/spi/wl12xx.h
@@ -26,6 +26,7 @@
 
 struct wl12xx_platform_data {
         void (*set_power)(bool enable);
+        bool use_eeprom;
 };
 
 #endif
diff --git a/include/linux/spi/xilinx_spi.h b/include/linux/spi/xilinx_spi.h
new file mode 100644
index 000000000000..6f17278810b0
--- /dev/null
+++ b/include/linux/spi/xilinx_spi.h
@@ -0,0 +1,20 @@
+#ifndef __LINUX_SPI_XILINX_SPI_H
+#define __LINUX_SPI_XILINX_SPI_H
+
+/**
+ * struct xspi_platform_data - Platform data of the Xilinx SPI driver
+ * @num_chipselect:     Number of chip select by the IP.
+ * @little_endian:      If registers should be accessed little endian or not.
+ * @bits_per_word:      Number of bits per word.
+ * @devices:            Devices to add when the driver is probed.
+ * @num_devices:        Number of devices in the devices array.
+ */
+struct xspi_platform_data {
+        u16 num_chipselect;
+        bool little_endian;
+        u8 bits_per_word;
+        struct spi_board_info *devices;
+        u8 num_devices;
+};
+
+#endif /* __LINUX_SPI_XILINX_SPI_H */