3 files changed, 40 insertions, 2 deletions

diff --git a/include/linux/mlx4/cmd.h b/include/linux/mlx4/cmd.h
index adf6e0648f20..bb1c8096a7eb 100644
--- a/include/linux/mlx4/cmd.h
+++ b/include/linux/mlx4/cmd.h
@@ -111,6 +111,7 @@ enum {
         MLX4_CMD_INIT2INIT_QP    = 0x2d,
         MLX4_CMD_SUSPEND_QP      = 0x32,
         MLX4_CMD_UNSUSPEND_QP    = 0x33,
+        MLX4_CMD_UPDATE_QP       = 0x61,
         /* special QP and management commands */
         MLX4_CMD_CONF_SPECIAL_QP = 0x23,
         MLX4_CMD_MAD_IFC         = 0x24,
@@ -237,7 +238,7 @@ int mlx4_set_vf_mac(struct mlx4_dev *dev, int port, int vf, u64 mac);
 int mlx4_set_vf_vlan(struct mlx4_dev *dev, int port, int vf, u16 vlan, u8 qos);
 int mlx4_set_vf_spoofchk(struct mlx4_dev *dev, int port, int vf, bool setting);
 int mlx4_get_vf_config(struct mlx4_dev *dev, int port, int vf, struct ifla_vf_info *ivf);
-
+int mlx4_set_vf_link_state(struct mlx4_dev *dev, int port, int vf, int link_state);
 
 #define MLX4_COMM_GET_IF_REV(cmd_chan_ver) (u8)((cmd_chan_ver) >> 8)
 
diff --git a/include/linux/mlx4/device.h b/include/linux/mlx4/device.h
index a51b0134ce18..52c23a892bab 100644
--- a/include/linux/mlx4/device.h
+++ b/include/linux/mlx4/device.h
@@ -157,7 +157,8 @@ enum {
         MLX4_DEV_CAP_FLAGS2_REASSIGN_MAC_EN     = 1LL <<  4,
         MLX4_DEV_CAP_FLAG2_TS                   = 1LL <<  5,
         MLX4_DEV_CAP_FLAG2_VLAN_CONTROL         = 1LL <<  6,
-        MLX4_DEV_CAP_FLAG2_FSM                  = 1LL <<  7
+        MLX4_DEV_CAP_FLAG2_FSM                  = 1LL <<  7,
+        MLX4_DEV_CAP_FLAG2_UPDATE_QP            = 1LL <<  8
 };
 
 enum {
diff --git a/include/linux/mlx4/qp.h b/include/linux/mlx4/qp.h
index 352eec9df1b8..262deac02c9e 100644
--- a/include/linux/mlx4/qp.h
+++ b/include/linux/mlx4/qp.h
@@ -152,6 +152,8 @@ enum { /* fl */
 };
 enum { /* vlan_control */
         MLX4_VLAN_CTRL_ETH_TX_BLOCK_TAGGED      = 1 << 6,
+        MLX4_VLAN_CTRL_ETH_TX_BLOCK_PRIO_TAGGED = 1 << 5, /* 802.1p priority tag */
+        MLX4_VLAN_CTRL_ETH_TX_BLOCK_UNTAGGED    = 1 << 4,
         MLX4_VLAN_CTRL_ETH_RX_BLOCK_TAGGED      = 1 << 2,
         MLX4_VLAN_CTRL_ETH_RX_BLOCK_PRIO_TAGGED = 1 << 1, /* 802.1p priority tag */
         MLX4_VLAN_CTRL_ETH_RX_BLOCK_UNTAGGED    = 1 << 0
@@ -206,6 +208,40 @@ struct mlx4_qp_context {
         u32                     reserved5[10];
 };
 
+struct mlx4_update_qp_context {
+        __be64                  qp_mask;
+        __be64                  primary_addr_path_mask;
+        __be64                  secondary_addr_path_mask;
+        u64                     reserved1;
+        struct mlx4_qp_context  qp_context;
+        u64                     reserved2[58];
+};
+
+enum {
+        MLX4_UPD_QP_MASK_PM_STATE       = 32,
+        MLX4_UPD_QP_MASK_VSD            = 33,
+};
+
+enum {
+        MLX4_UPD_QP_PATH_MASK_PKEY_INDEX                = 0 + 32,
+        MLX4_UPD_QP_PATH_MASK_FSM                       = 1 + 32,
+        MLX4_UPD_QP_PATH_MASK_MAC_INDEX                 = 2 + 32,
+        MLX4_UPD_QP_PATH_MASK_FVL                       = 3 + 32,
+        MLX4_UPD_QP_PATH_MASK_CV                        = 4 + 32,
+        MLX4_UPD_QP_PATH_MASK_VLAN_INDEX                = 5 + 32,
+        MLX4_UPD_QP_PATH_MASK_ETH_HIDE_CQE_VLAN         = 6 + 32,
+        MLX4_UPD_QP_PATH_MASK_ETH_TX_BLOCK_UNTAGGED     = 7 + 32,
+        MLX4_UPD_QP_PATH_MASK_ETH_TX_BLOCK_1P           = 8 + 32,
+        MLX4_UPD_QP_PATH_MASK_ETH_TX_BLOCK_TAGGED       = 9 + 32,
+        MLX4_UPD_QP_PATH_MASK_ETH_RX_BLOCK_UNTAGGED     = 10 + 32,
+        MLX4_UPD_QP_PATH_MASK_ETH_RX_BLOCK_1P           = 11 + 32,
+        MLX4_UPD_QP_PATH_MASK_ETH_RX_BLOCK_TAGGED       = 12 + 32,
+        MLX4_UPD_QP_PATH_MASK_FEUP                      = 13 + 32,
+        MLX4_UPD_QP_PATH_MASK_SCHED_QUEUE               = 14 + 32,
+        MLX4_UPD_QP_PATH_MASK_IF_COUNTER_INDEX          = 15 + 32,
+        MLX4_UPD_QP_PATH_MASK_FVL_RX                    = 16 + 32,
+};
+
 enum { /* param3 */
         MLX4_STRIP_VLAN = 1 << 30
 };