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-rw-r--r--drivers/usb/gadget/Kconfig16
-rw-r--r--drivers/usb/gadget/Makefile2
-rw-r--r--drivers/usb/gadget/at91_udc.c4
-rw-r--r--drivers/usb/gadget/ether.c2
-rw-r--r--drivers/usb/gadget/gadget_chips.h4
-rw-r--r--drivers/usb/gadget/inode.c2
-rw-r--r--drivers/usb/gadget/omap_udc.c510
-rw-r--r--drivers/usb/gadget/omap_udc.h61
-rw-r--r--drivers/usb/gadget/pxa25x_udc.c (renamed from drivers/usb/gadget/pxa2xx_udc.c)309
-rw-r--r--drivers/usb/gadget/pxa25x_udc.h (renamed from drivers/usb/gadget/pxa2xx_udc.h)29
-rw-r--r--drivers/usb/gadget/pxa27x_udc.c9
-rw-r--r--drivers/usb/gadget/pxa27x_udc.h8
-rw-r--r--drivers/usb/host/ohci-omap.c5
-rw-r--r--drivers/usb/host/ohci-pxa27x.c3
14 files changed, 494 insertions, 470 deletions
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index 6e784d2db423..d6bab0d5f453 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -118,10 +118,10 @@ config USB_AMD5536UDC
118config USB_GADGET_ATMEL_USBA 118config USB_GADGET_ATMEL_USBA
119 boolean "Atmel USBA" 119 boolean "Atmel USBA"
120 select USB_GADGET_DUALSPEED 120 select USB_GADGET_DUALSPEED
121 depends on AVR32 || ARCH_AT91CAP9 121 depends on AVR32 || ARCH_AT91CAP9 || ARCH_AT91SAM9RL
122 help 122 help
123 USBA is the integrated high-speed USB Device controller on 123 USBA is the integrated high-speed USB Device controller on
124 the AT32AP700x and AT91CAP9 processors from Atmel. 124 the AT32AP700x, some AT91SAM9 and AT91CAP9 processors from Atmel.
125 125
126config USB_ATMEL_USBA 126config USB_ATMEL_USBA
127 tristate 127 tristate
@@ -172,7 +172,7 @@ config USB_NET2280
172 default USB_GADGET 172 default USB_GADGET
173 select USB_GADGET_SELECTED 173 select USB_GADGET_SELECTED
174 174
175config USB_GADGET_PXA2XX 175config USB_GADGET_PXA25X
176 boolean "PXA 25x or IXP 4xx" 176 boolean "PXA 25x or IXP 4xx"
177 depends on (ARCH_PXA && PXA25x) || ARCH_IXP4XX 177 depends on (ARCH_PXA && PXA25x) || ARCH_IXP4XX
178 help 178 help
@@ -184,19 +184,19 @@ config USB_GADGET_PXA2XX
184 zero (for control transfers). 184 zero (for control transfers).
185 185
186 Say "y" to link the driver statically, or "m" to build a 186 Say "y" to link the driver statically, or "m" to build a
187 dynamically linked module called "pxa2xx_udc" and force all 187 dynamically linked module called "pxa25x_udc" and force all
188 gadget drivers to also be dynamically linked. 188 gadget drivers to also be dynamically linked.
189 189
190config USB_PXA2XX 190config USB_PXA25X
191 tristate 191 tristate
192 depends on USB_GADGET_PXA2XX 192 depends on USB_GADGET_PXA25X
193 default USB_GADGET 193 default USB_GADGET
194 select USB_GADGET_SELECTED 194 select USB_GADGET_SELECTED
195 195
196# if there's only one gadget driver, using only two bulk endpoints, 196# if there's only one gadget driver, using only two bulk endpoints,
197# don't waste memory for the other endpoints 197# don't waste memory for the other endpoints
198config USB_PXA2XX_SMALL 198config USB_PXA25X_SMALL
199 depends on USB_GADGET_PXA2XX 199 depends on USB_GADGET_PXA25X
200 bool 200 bool
201 default n if USB_ETH_RNDIS 201 default n if USB_ETH_RNDIS
202 default y if USB_ZERO 202 default y if USB_ZERO
diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile
index 12357255d740..e258afd25faf 100644
--- a/drivers/usb/gadget/Makefile
+++ b/drivers/usb/gadget/Makefile
@@ -8,7 +8,7 @@ endif
8obj-$(CONFIG_USB_DUMMY_HCD) += dummy_hcd.o 8obj-$(CONFIG_USB_DUMMY_HCD) += dummy_hcd.o
9obj-$(CONFIG_USB_NET2280) += net2280.o 9obj-$(CONFIG_USB_NET2280) += net2280.o
10obj-$(CONFIG_USB_AMD5536UDC) += amd5536udc.o 10obj-$(CONFIG_USB_AMD5536UDC) += amd5536udc.o
11obj-$(CONFIG_USB_PXA2XX) += pxa2xx_udc.o 11obj-$(CONFIG_USB_PXA25X) += pxa25x_udc.o
12obj-$(CONFIG_USB_PXA27X) += pxa27x_udc.o 12obj-$(CONFIG_USB_PXA27X) += pxa27x_udc.o
13obj-$(CONFIG_USB_GOKU) += goku_udc.o 13obj-$(CONFIG_USB_GOKU) += goku_udc.o
14obj-$(CONFIG_USB_OMAP) += omap_udc.o 14obj-$(CONFIG_USB_OMAP) += omap_udc.o
diff --git a/drivers/usb/gadget/at91_udc.c b/drivers/usb/gadget/at91_udc.c
index 274c60a970cd..b6b2a0a5ba37 100644
--- a/drivers/usb/gadget/at91_udc.c
+++ b/drivers/usb/gadget/at91_udc.c
@@ -888,7 +888,7 @@ static void pullup(struct at91_udc *udc, int is_on)
888 at91_udp_write(udc, AT91_UDP_TXVC, 0); 888 at91_udp_write(udc, AT91_UDP_TXVC, 0);
889 if (cpu_is_at91rm9200()) 889 if (cpu_is_at91rm9200())
890 gpio_set_value(udc->board.pullup_pin, active); 890 gpio_set_value(udc->board.pullup_pin, active);
891 else if (cpu_is_at91sam9260() || cpu_is_at91sam9263()) { 891 else if (cpu_is_at91sam9260() || cpu_is_at91sam9263() || cpu_is_at91sam9g20()) {
892 u32 txvc = at91_udp_read(udc, AT91_UDP_TXVC); 892 u32 txvc = at91_udp_read(udc, AT91_UDP_TXVC);
893 893
894 txvc |= AT91_UDP_TXVC_PUON; 894 txvc |= AT91_UDP_TXVC_PUON;
@@ -906,7 +906,7 @@ static void pullup(struct at91_udc *udc, int is_on)
906 at91_udp_write(udc, AT91_UDP_TXVC, AT91_UDP_TXVC_TXVDIS); 906 at91_udp_write(udc, AT91_UDP_TXVC, AT91_UDP_TXVC_TXVDIS);
907 if (cpu_is_at91rm9200()) 907 if (cpu_is_at91rm9200())
908 gpio_set_value(udc->board.pullup_pin, !active); 908 gpio_set_value(udc->board.pullup_pin, !active);
909 else if (cpu_is_at91sam9260() || cpu_is_at91sam9263()) { 909 else if (cpu_is_at91sam9260() || cpu_is_at91sam9263() || cpu_is_at91sam9g20()) {
910 u32 txvc = at91_udp_read(udc, AT91_UDP_TXVC); 910 u32 txvc = at91_udp_read(udc, AT91_UDP_TXVC);
911 911
912 txvc &= ~AT91_UDP_TXVC_PUON; 912 txvc &= ~AT91_UDP_TXVC_PUON;
diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c
index 8d61ea67a817..4ce3950b997f 100644
--- a/drivers/usb/gadget/ether.c
+++ b/drivers/usb/gadget/ether.c
@@ -262,7 +262,7 @@ MODULE_PARM_DESC(host_addr, "Host Ethernet Address");
262/* For CDC-incapable hardware, choose the simple cdc subset. 262/* For CDC-incapable hardware, choose the simple cdc subset.
263 * Anything that talks bulk (without notable bugs) can do this. 263 * Anything that talks bulk (without notable bugs) can do this.
264 */ 264 */
265#ifdef CONFIG_USB_GADGET_PXA2XX 265#ifdef CONFIG_USB_GADGET_PXA25X
266#define DEV_CONFIG_SUBSET 266#define DEV_CONFIG_SUBSET
267#endif 267#endif
268 268
diff --git a/drivers/usb/gadget/gadget_chips.h b/drivers/usb/gadget/gadget_chips.h
index f7f159c1002b..ca5149ea7312 100644
--- a/drivers/usb/gadget/gadget_chips.h
+++ b/drivers/usb/gadget/gadget_chips.h
@@ -29,8 +29,8 @@
29#define gadget_is_dummy(g) 0 29#define gadget_is_dummy(g) 0
30#endif 30#endif
31 31
32#ifdef CONFIG_USB_GADGET_PXA2XX 32#ifdef CONFIG_USB_GADGET_PXA25X
33#define gadget_is_pxa(g) !strcmp("pxa2xx_udc", (g)->name) 33#define gadget_is_pxa(g) !strcmp("pxa25x_udc", (g)->name)
34#else 34#else
35#define gadget_is_pxa(g) 0 35#define gadget_is_pxa(g) 0
36#endif 36#endif
diff --git a/drivers/usb/gadget/inode.c b/drivers/usb/gadget/inode.c
index 69b0a2754f2a..f132a9219e11 100644
--- a/drivers/usb/gadget/inode.c
+++ b/drivers/usb/gadget/inode.c
@@ -1501,7 +1501,7 @@ gadgetfs_setup (struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl)
1501 } 1501 }
1502 break; 1502 break;
1503 1503
1504#ifndef CONFIG_USB_GADGET_PXA2XX 1504#ifndef CONFIG_USB_GADGET_PXA25X
1505 /* PXA automagically handles this request too */ 1505 /* PXA automagically handles this request too */
1506 case USB_REQ_GET_CONFIGURATION: 1506 case USB_REQ_GET_CONFIGURATION:
1507 if (ctrl->bRequestType != 0x80) 1507 if (ctrl->bRequestType != 0x80)
diff --git a/drivers/usb/gadget/omap_udc.c b/drivers/usb/gadget/omap_udc.c
index 881d74c3d964..03a7f49d207d 100644
--- a/drivers/usb/gadget/omap_udc.c
+++ b/drivers/usb/gadget/omap_udc.c
@@ -135,13 +135,17 @@ static void use_ep(struct omap_ep *ep, u16 select)
135 135
136 if (ep->bEndpointAddress & USB_DIR_IN) 136 if (ep->bEndpointAddress & USB_DIR_IN)
137 num |= UDC_EP_DIR; 137 num |= UDC_EP_DIR;
138 UDC_EP_NUM_REG = num | select; 138 omap_writew(num | select, UDC_EP_NUM);
139 /* when select, MUST deselect later !! */ 139 /* when select, MUST deselect later !! */
140} 140}
141 141
142static inline void deselect_ep(void) 142static inline void deselect_ep(void)
143{ 143{
144 UDC_EP_NUM_REG &= ~UDC_EP_SEL; 144 u16 w;
145
146 w = omap_readw(UDC_EP_NUM);
147 w &= ~UDC_EP_SEL;
148 omap_writew(w, UDC_EP_NUM);
145 /* 6 wait states before TX will happen */ 149 /* 6 wait states before TX will happen */
146} 150}
147 151
@@ -216,7 +220,7 @@ static int omap_ep_enable(struct usb_ep *_ep,
216 ep->has_dma = 0; 220 ep->has_dma = 0;
217 ep->lch = -1; 221 ep->lch = -1;
218 use_ep(ep, UDC_EP_SEL); 222 use_ep(ep, UDC_EP_SEL);
219 UDC_CTRL_REG = udc->clr_halt; 223 omap_writew(udc->clr_halt, UDC_CTRL);
220 ep->ackwait = 0; 224 ep->ackwait = 0;
221 deselect_ep(); 225 deselect_ep();
222 226
@@ -232,7 +236,7 @@ static int omap_ep_enable(struct usb_ep *_ep,
232 if (desc->bmAttributes != USB_ENDPOINT_XFER_ISOC 236 if (desc->bmAttributes != USB_ENDPOINT_XFER_ISOC
233 && !ep->has_dma 237 && !ep->has_dma
234 && !(ep->bEndpointAddress & USB_DIR_IN)) { 238 && !(ep->bEndpointAddress & USB_DIR_IN)) {
235 UDC_CTRL_REG = UDC_SET_FIFO_EN; 239 omap_writew(UDC_SET_FIFO_EN, UDC_CTRL);
236 ep->ackwait = 1 + ep->double_buf; 240 ep->ackwait = 1 + ep->double_buf;
237 } 241 }
238 242
@@ -259,7 +263,7 @@ static int omap_ep_disable(struct usb_ep *_ep)
259 nuke (ep, -ESHUTDOWN); 263 nuke (ep, -ESHUTDOWN);
260 ep->ep.maxpacket = ep->maxpacket; 264 ep->ep.maxpacket = ep->maxpacket;
261 ep->has_dma = 0; 265 ep->has_dma = 0;
262 UDC_CTRL_REG = UDC_SET_HALT; 266 omap_writew(UDC_SET_HALT, UDC_CTRL);
263 list_del_init(&ep->iso); 267 list_del_init(&ep->iso);
264 del_timer(&ep->timer); 268 del_timer(&ep->timer);
265 269
@@ -360,13 +364,13 @@ write_packet(u8 *buf, struct omap_req *req, unsigned max)
360 if (likely((((int)buf) & 1) == 0)) { 364 if (likely((((int)buf) & 1) == 0)) {
361 wp = (u16 *)buf; 365 wp = (u16 *)buf;
362 while (max >= 2) { 366 while (max >= 2) {
363 UDC_DATA_REG = *wp++; 367 omap_writew(*wp++, UDC_DATA);
364 max -= 2; 368 max -= 2;
365 } 369 }
366 buf = (u8 *)wp; 370 buf = (u8 *)wp;
367 } 371 }
368 while (max--) 372 while (max--)
369 *(volatile u8 *)&UDC_DATA_REG = *buf++; 373 omap_writeb(*buf++, UDC_DATA);
370 return len; 374 return len;
371} 375}
372 376
@@ -385,13 +389,13 @@ static int write_fifo(struct omap_ep *ep, struct omap_req *req)
385 prefetch(buf); 389 prefetch(buf);
386 390
387 /* PIO-IN isn't double buffered except for iso */ 391 /* PIO-IN isn't double buffered except for iso */
388 ep_stat = UDC_STAT_FLG_REG; 392 ep_stat = omap_readw(UDC_STAT_FLG);
389 if (ep_stat & UDC_FIFO_UNWRITABLE) 393 if (ep_stat & UDC_FIFO_UNWRITABLE)
390 return 0; 394 return 0;
391 395
392 count = ep->ep.maxpacket; 396 count = ep->ep.maxpacket;
393 count = write_packet(buf, req, count); 397 count = write_packet(buf, req, count);
394 UDC_CTRL_REG = UDC_SET_FIFO_EN; 398 omap_writew(UDC_SET_FIFO_EN, UDC_CTRL);
395 ep->ackwait = 1; 399 ep->ackwait = 1;
396 400
397 /* last packet is often short (sometimes a zlp) */ 401 /* last packet is often short (sometimes a zlp) */
@@ -425,13 +429,13 @@ read_packet(u8 *buf, struct omap_req *req, unsigned avail)
425 if (likely((((int)buf) & 1) == 0)) { 429 if (likely((((int)buf) & 1) == 0)) {
426 wp = (u16 *)buf; 430 wp = (u16 *)buf;
427 while (avail >= 2) { 431 while (avail >= 2) {
428 *wp++ = UDC_DATA_REG; 432 *wp++ = omap_readw(UDC_DATA);
429 avail -= 2; 433 avail -= 2;
430 } 434 }
431 buf = (u8 *)wp; 435 buf = (u8 *)wp;
432 } 436 }
433 while (avail--) 437 while (avail--)
434 *buf++ = *(volatile u8 *)&UDC_DATA_REG; 438 *buf++ = omap_readb(UDC_DATA);
435 return len; 439 return len;
436} 440}
437 441
@@ -446,7 +450,7 @@ static int read_fifo(struct omap_ep *ep, struct omap_req *req)
446 prefetchw(buf); 450 prefetchw(buf);
447 451
448 for (;;) { 452 for (;;) {
449 u16 ep_stat = UDC_STAT_FLG_REG; 453 u16 ep_stat = omap_readw(UDC_STAT_FLG);
450 454
451 is_last = 0; 455 is_last = 0;
452 if (ep_stat & FIFO_EMPTY) { 456 if (ep_stat & FIFO_EMPTY) {
@@ -460,7 +464,7 @@ static int read_fifo(struct omap_ep *ep, struct omap_req *req)
460 if (ep_stat & UDC_FIFO_FULL) 464 if (ep_stat & UDC_FIFO_FULL)
461 avail = ep->ep.maxpacket; 465 avail = ep->ep.maxpacket;
462 else { 466 else {
463 avail = UDC_RXFSTAT_REG; 467 avail = omap_readw(UDC_RXFSTAT);
464 ep->fnf = ep->double_buf; 468 ep->fnf = ep->double_buf;
465 } 469 }
466 count = read_packet(buf, req, avail); 470 count = read_packet(buf, req, avail);
@@ -473,7 +477,7 @@ static int read_fifo(struct omap_ep *ep, struct omap_req *req)
473 req->req.status = -EOVERFLOW; 477 req->req.status = -EOVERFLOW;
474 avail -= count; 478 avail -= count;
475 while (avail--) 479 while (avail--)
476 (void) *(volatile u8 *)&UDC_DATA_REG; 480 omap_readw(UDC_DATA);
477 } 481 }
478 } else if (req->req.length == req->req.actual) 482 } else if (req->req.length == req->req.actual)
479 is_last = 1; 483 is_last = 1;
@@ -491,32 +495,6 @@ static int read_fifo(struct omap_ep *ep, struct omap_req *req)
491 495
492/*-------------------------------------------------------------------------*/ 496/*-------------------------------------------------------------------------*/
493 497
494static inline dma_addr_t dma_csac(unsigned lch)
495{
496 dma_addr_t csac;
497
498 /* omap 3.2/3.3 erratum: sometimes 0 is returned if CSAC/CDAC is
499 * read before the DMA controller finished disabling the channel.
500 */
501 csac = OMAP_DMA_CSAC_REG(lch);
502 if (csac == 0)
503 csac = OMAP_DMA_CSAC_REG(lch);
504 return csac;
505}
506
507static inline dma_addr_t dma_cdac(unsigned lch)
508{
509 dma_addr_t cdac;
510
511 /* omap 3.2/3.3 erratum: sometimes 0 is returned if CSAC/CDAC is
512 * read before the DMA controller finished disabling the channel.
513 */
514 cdac = OMAP_DMA_CDAC_REG(lch);
515 if (cdac == 0)
516 cdac = OMAP_DMA_CDAC_REG(lch);
517 return cdac;
518}
519
520static u16 dma_src_len(struct omap_ep *ep, dma_addr_t start) 498static u16 dma_src_len(struct omap_ep *ep, dma_addr_t start)
521{ 499{
522 dma_addr_t end; 500 dma_addr_t end;
@@ -527,7 +505,7 @@ static u16 dma_src_len(struct omap_ep *ep, dma_addr_t start)
527 if (cpu_is_omap15xx()) 505 if (cpu_is_omap15xx())
528 return 0; 506 return 0;
529 507
530 end = dma_csac(ep->lch); 508 end = omap_get_dma_src_pos(ep->lch);
531 if (end == ep->dma_counter) 509 if (end == ep->dma_counter)
532 return 0; 510 return 0;
533 511
@@ -537,15 +515,11 @@ static u16 dma_src_len(struct omap_ep *ep, dma_addr_t start)
537 return end - start; 515 return end - start;
538} 516}
539 517
540#define DMA_DEST_LAST(x) (cpu_is_omap15xx() \
541 ? OMAP_DMA_CSAC_REG(x) /* really: CPC */ \
542 : dma_cdac(x))
543
544static u16 dma_dest_len(struct omap_ep *ep, dma_addr_t start) 518static u16 dma_dest_len(struct omap_ep *ep, dma_addr_t start)
545{ 519{
546 dma_addr_t end; 520 dma_addr_t end;
547 521
548 end = DMA_DEST_LAST(ep->lch); 522 end = omap_get_dma_dst_pos(ep->lch);
549 if (end == ep->dma_counter) 523 if (end == ep->dma_counter)
550 return 0; 524 return 0;
551 525
@@ -565,7 +539,7 @@ static u16 dma_dest_len(struct omap_ep *ep, dma_addr_t start)
565 539
566static void next_in_dma(struct omap_ep *ep, struct omap_req *req) 540static void next_in_dma(struct omap_ep *ep, struct omap_req *req)
567{ 541{
568 u16 txdma_ctrl; 542 u16 txdma_ctrl, w;
569 unsigned length = req->req.length - req->req.actual; 543 unsigned length = req->req.length - req->req.actual;
570 const int sync_mode = cpu_is_omap15xx() 544 const int sync_mode = cpu_is_omap15xx()
571 ? OMAP_DMA_SYNC_FRAME 545 ? OMAP_DMA_SYNC_FRAME
@@ -596,14 +570,18 @@ static void next_in_dma(struct omap_ep *ep, struct omap_req *req)
596 0, 0); 570 0, 0);
597 571
598 omap_start_dma(ep->lch); 572 omap_start_dma(ep->lch);
599 ep->dma_counter = dma_csac(ep->lch); 573 ep->dma_counter = omap_get_dma_src_pos(ep->lch);
600 UDC_DMA_IRQ_EN_REG |= UDC_TX_DONE_IE(ep->dma_channel); 574 w = omap_readw(UDC_DMA_IRQ_EN);
601 UDC_TXDMA_REG(ep->dma_channel) = UDC_TXN_START | txdma_ctrl; 575 w |= UDC_TX_DONE_IE(ep->dma_channel);
576 omap_writew(w, UDC_DMA_IRQ_EN);
577 omap_writew(UDC_TXN_START | txdma_ctrl, UDC_TXDMA(ep->dma_channel));
602 req->dma_bytes = length; 578 req->dma_bytes = length;
603} 579}
604 580
605static void finish_in_dma(struct omap_ep *ep, struct omap_req *req, int status) 581static void finish_in_dma(struct omap_ep *ep, struct omap_req *req, int status)
606{ 582{
583 u16 w;
584
607 if (status == 0) { 585 if (status == 0) {
608 req->req.actual += req->dma_bytes; 586 req->req.actual += req->dma_bytes;
609 587
@@ -620,7 +598,9 @@ static void finish_in_dma(struct omap_ep *ep, struct omap_req *req, int status)
620 598
621 /* tx completion */ 599 /* tx completion */
622 omap_stop_dma(ep->lch); 600 omap_stop_dma(ep->lch);
623 UDC_DMA_IRQ_EN_REG &= ~UDC_TX_DONE_IE(ep->dma_channel); 601 w = omap_readw(UDC_DMA_IRQ_EN);
602 w &= ~UDC_TX_DONE_IE(ep->dma_channel);
603 omap_writew(w, UDC_DMA_IRQ_EN);
624 done(ep, req, status); 604 done(ep, req, status);
625} 605}
626 606
@@ -628,6 +608,7 @@ static void next_out_dma(struct omap_ep *ep, struct omap_req *req)
628{ 608{
629 unsigned packets = req->req.length - req->req.actual; 609 unsigned packets = req->req.length - req->req.actual;
630 int dma_trigger = 0; 610 int dma_trigger = 0;
611 u16 w;
631 612
632 if (cpu_is_omap24xx()) 613 if (cpu_is_omap24xx())
633 dma_trigger = OMAP24XX_DMA(USB_W2FC_RX0, ep->dma_channel); 614 dma_trigger = OMAP24XX_DMA(USB_W2FC_RX0, ep->dma_channel);
@@ -654,12 +635,14 @@ static void next_out_dma(struct omap_ep *ep, struct omap_req *req)
654 omap_set_dma_dest_params(ep->lch, OMAP_DMA_PORT_EMIFF, 635 omap_set_dma_dest_params(ep->lch, OMAP_DMA_PORT_EMIFF,
655 OMAP_DMA_AMODE_POST_INC, req->req.dma + req->req.actual, 636 OMAP_DMA_AMODE_POST_INC, req->req.dma + req->req.actual,
656 0, 0); 637 0, 0);
657 ep->dma_counter = DMA_DEST_LAST(ep->lch); 638 ep->dma_counter = omap_get_dma_dst_pos(ep->lch);
658 639
659 UDC_RXDMA_REG(ep->dma_channel) = UDC_RXN_STOP | (packets - 1); 640 omap_writew(UDC_RXN_STOP | (packets - 1), UDC_RXDMA(ep->dma_channel));
660 UDC_DMA_IRQ_EN_REG |= UDC_RX_EOT_IE(ep->dma_channel); 641 w = omap_readw(UDC_DMA_IRQ_EN);
661 UDC_EP_NUM_REG = (ep->bEndpointAddress & 0xf); 642 w |= UDC_RX_EOT_IE(ep->dma_channel);
662 UDC_CTRL_REG = UDC_SET_FIFO_EN; 643 omap_writew(w, UDC_DMA_IRQ_EN);
644 omap_writew(ep->bEndpointAddress & 0xf, UDC_EP_NUM);
645 omap_writew(UDC_SET_FIFO_EN, UDC_CTRL);
663 646
664 omap_start_dma(ep->lch); 647 omap_start_dma(ep->lch);
665} 648}
@@ -667,7 +650,7 @@ static void next_out_dma(struct omap_ep *ep, struct omap_req *req)
667static void 650static void
668finish_out_dma(struct omap_ep *ep, struct omap_req *req, int status, int one) 651finish_out_dma(struct omap_ep *ep, struct omap_req *req, int status, int one)
669{ 652{
670 u16 count; 653 u16 count, w;
671 654
672 if (status == 0) 655 if (status == 0)
673 ep->dma_counter = (u16) (req->req.dma + req->req.actual); 656 ep->dma_counter = (u16) (req->req.dma + req->req.actual);
@@ -686,13 +669,15 @@ finish_out_dma(struct omap_ep *ep, struct omap_req *req, int status, int one)
686 return; 669 return;
687 670
688 /* rx completion */ 671 /* rx completion */
689 UDC_DMA_IRQ_EN_REG &= ~UDC_RX_EOT_IE(ep->dma_channel); 672 w = omap_readw(UDC_DMA_IRQ_EN);
673 w &= ~UDC_RX_EOT_IE(ep->dma_channel);
674 omap_writew(w, UDC_DMA_IRQ_EN);
690 done(ep, req, status); 675 done(ep, req, status);
691} 676}
692 677
693static void dma_irq(struct omap_udc *udc, u16 irq_src) 678static void dma_irq(struct omap_udc *udc, u16 irq_src)
694{ 679{
695 u16 dman_stat = UDC_DMAN_STAT_REG; 680 u16 dman_stat = omap_readw(UDC_DMAN_STAT);
696 struct omap_ep *ep; 681 struct omap_ep *ep;
697 struct omap_req *req; 682 struct omap_req *req;
698 683
@@ -706,7 +691,7 @@ static void dma_irq(struct omap_udc *udc, u16 irq_src)
706 struct omap_req, queue); 691 struct omap_req, queue);
707 finish_in_dma(ep, req, 0); 692 finish_in_dma(ep, req, 0);
708 } 693 }
709 UDC_IRQ_SRC_REG = UDC_TXN_DONE; 694 omap_writew(UDC_TXN_DONE, UDC_IRQ_SRC);
710 695
711 if (!list_empty (&ep->queue)) { 696 if (!list_empty (&ep->queue)) {
712 req = container_of(ep->queue.next, 697 req = container_of(ep->queue.next,
@@ -725,7 +710,7 @@ static void dma_irq(struct omap_udc *udc, u16 irq_src)
725 struct omap_req, queue); 710 struct omap_req, queue);
726 finish_out_dma(ep, req, 0, dman_stat & UDC_DMA_RX_SB); 711 finish_out_dma(ep, req, 0, dman_stat & UDC_DMA_RX_SB);
727 } 712 }
728 UDC_IRQ_SRC_REG = UDC_RXN_EOT; 713 omap_writew(UDC_RXN_EOT, UDC_IRQ_SRC);
729 714
730 if (!list_empty (&ep->queue)) { 715 if (!list_empty (&ep->queue)) {
731 req = container_of(ep->queue.next, 716 req = container_of(ep->queue.next,
@@ -739,7 +724,7 @@ static void dma_irq(struct omap_udc *udc, u16 irq_src)
739 ep->irqs++; 724 ep->irqs++;
740 /* omap15xx does this unasked... */ 725 /* omap15xx does this unasked... */
741 VDBG("%s, RX_CNT irq?\n", ep->ep.name); 726 VDBG("%s, RX_CNT irq?\n", ep->ep.name);
742 UDC_IRQ_SRC_REG = UDC_RXN_CNT; 727 omap_writew(UDC_RXN_CNT, UDC_IRQ_SRC);
743 } 728 }
744} 729}
745 730
@@ -762,9 +747,9 @@ static void dma_channel_claim(struct omap_ep *ep, unsigned channel)
762 747
763 is_in = ep->bEndpointAddress & USB_DIR_IN; 748 is_in = ep->bEndpointAddress & USB_DIR_IN;
764 if (is_in) 749 if (is_in)
765 reg = UDC_TXDMA_CFG_REG; 750 reg = omap_readw(UDC_TXDMA_CFG);
766 else 751 else
767 reg = UDC_RXDMA_CFG_REG; 752 reg = omap_readw(UDC_RXDMA_CFG);
768 reg |= UDC_DMA_REQ; /* "pulse" activated */ 753 reg |= UDC_DMA_REQ; /* "pulse" activated */
769 754
770 ep->dma_channel = 0; 755 ep->dma_channel = 0;
@@ -792,7 +777,7 @@ static void dma_channel_claim(struct omap_ep *ep, unsigned channel)
792 status = omap_request_dma(dma_channel, 777 status = omap_request_dma(dma_channel,
793 ep->ep.name, dma_error, ep, &ep->lch); 778 ep->ep.name, dma_error, ep, &ep->lch);
794 if (status == 0) { 779 if (status == 0) {
795 UDC_TXDMA_CFG_REG = reg; 780 omap_writew(reg, UDC_TXDMA_CFG);
796 /* EMIFF or SDRC */ 781 /* EMIFF or SDRC */
797 omap_set_dma_src_burst_mode(ep->lch, 782 omap_set_dma_src_burst_mode(ep->lch,
798 OMAP_DMA_DATA_BURST_4); 783 OMAP_DMA_DATA_BURST_4);
@@ -801,7 +786,7 @@ static void dma_channel_claim(struct omap_ep *ep, unsigned channel)
801 omap_set_dma_dest_params(ep->lch, 786 omap_set_dma_dest_params(ep->lch,
802 OMAP_DMA_PORT_TIPB, 787 OMAP_DMA_PORT_TIPB,
803 OMAP_DMA_AMODE_CONSTANT, 788 OMAP_DMA_AMODE_CONSTANT,
804 (unsigned long) io_v2p((u32)&UDC_DATA_DMA_REG), 789 (unsigned long) io_v2p(UDC_DATA_DMA),
805 0, 0); 790 0, 0);
806 } 791 }
807 } else { 792 } else {
@@ -813,12 +798,12 @@ static void dma_channel_claim(struct omap_ep *ep, unsigned channel)
813 status = omap_request_dma(dma_channel, 798 status = omap_request_dma(dma_channel,
814 ep->ep.name, dma_error, ep, &ep->lch); 799 ep->ep.name, dma_error, ep, &ep->lch);
815 if (status == 0) { 800 if (status == 0) {
816 UDC_RXDMA_CFG_REG = reg; 801 omap_writew(reg, UDC_RXDMA_CFG);
817 /* TIPB */ 802 /* TIPB */
818 omap_set_dma_src_params(ep->lch, 803 omap_set_dma_src_params(ep->lch,
819 OMAP_DMA_PORT_TIPB, 804 OMAP_DMA_PORT_TIPB,
820 OMAP_DMA_AMODE_CONSTANT, 805 OMAP_DMA_AMODE_CONSTANT,
821 (unsigned long) io_v2p((u32)&UDC_DATA_DMA_REG), 806 (unsigned long) io_v2p(UDC_DATA_DMA),
822 0, 0); 807 0, 0);
823 /* EMIFF or SDRC */ 808 /* EMIFF or SDRC */
824 omap_set_dma_dest_burst_mode(ep->lch, 809 omap_set_dma_dest_burst_mode(ep->lch,
@@ -834,7 +819,7 @@ static void dma_channel_claim(struct omap_ep *ep, unsigned channel)
834 819
835 /* channel type P: hw synch (fifo) */ 820 /* channel type P: hw synch (fifo) */
836 if (cpu_class_is_omap1() && !cpu_is_omap15xx()) 821 if (cpu_class_is_omap1() && !cpu_is_omap15xx())
837 OMAP1_DMA_LCH_CTRL_REG(ep->lch) = 2; 822 omap_set_dma_channel_mode(ep->lch, OMAP_DMA_LCH_P);
838 } 823 }
839 824
840just_restart: 825just_restart:
@@ -860,7 +845,7 @@ just_restart:
860 (is_in ? write_fifo : read_fifo)(ep, req); 845 (is_in ? write_fifo : read_fifo)(ep, req);
861 deselect_ep(); 846 deselect_ep();
862 if (!is_in) { 847 if (!is_in) {
863 UDC_CTRL_REG = UDC_SET_FIFO_EN; 848 omap_writew(UDC_SET_FIFO_EN, UDC_CTRL);
864 ep->ackwait = 1 + ep->double_buf; 849 ep->ackwait = 1 + ep->double_buf;
865 } 850 }
866 /* IN: 6 wait states before it'll tx */ 851 /* IN: 6 wait states before it'll tx */
@@ -881,7 +866,7 @@ static void dma_channel_release(struct omap_ep *ep)
881 else 866 else
882 req = NULL; 867 req = NULL;
883 868
884 active = ((1 << 7) & OMAP_DMA_CCR_REG(ep->lch)) != 0; 869 active = omap_get_dma_active_status(ep->lch);
885 870
886 DBG("%s release %s %cxdma%d %p\n", ep->ep.name, 871 DBG("%s release %s %cxdma%d %p\n", ep->ep.name,
887 active ? "active" : "idle", 872 active ? "active" : "idle",
@@ -894,23 +879,25 @@ static void dma_channel_release(struct omap_ep *ep)
894 879
895 /* wait till current packet DMA finishes, and fifo empties */ 880 /* wait till current packet DMA finishes, and fifo empties */
896 if (ep->bEndpointAddress & USB_DIR_IN) { 881 if (ep->bEndpointAddress & USB_DIR_IN) {
897 UDC_TXDMA_CFG_REG = (UDC_TXDMA_CFG_REG & ~mask) | UDC_DMA_REQ; 882 omap_writew((omap_readw(UDC_TXDMA_CFG) & ~mask) | UDC_DMA_REQ,
883 UDC_TXDMA_CFG);
898 884
899 if (req) { 885 if (req) {
900 finish_in_dma(ep, req, -ECONNRESET); 886 finish_in_dma(ep, req, -ECONNRESET);
901 887
902 /* clear FIFO; hosts probably won't empty it */ 888 /* clear FIFO; hosts probably won't empty it */
903 use_ep(ep, UDC_EP_SEL); 889 use_ep(ep, UDC_EP_SEL);
904 UDC_CTRL_REG = UDC_CLR_EP; 890 omap_writew(UDC_CLR_EP, UDC_CTRL);
905 deselect_ep(); 891 deselect_ep();
906 } 892 }
907 while (UDC_TXDMA_CFG_REG & mask) 893 while (omap_readw(UDC_TXDMA_CFG) & mask)
908 udelay(10); 894 udelay(10);
909 } else { 895 } else {
910 UDC_RXDMA_CFG_REG = (UDC_RXDMA_CFG_REG & ~mask) | UDC_DMA_REQ; 896 omap_writew((omap_readw(UDC_RXDMA_CFG) & ~mask) | UDC_DMA_REQ,
897 UDC_RXDMA_CFG);
911 898
912 /* dma empties the fifo */ 899 /* dma empties the fifo */
913 while (UDC_RXDMA_CFG_REG & mask) 900 while (omap_readw(UDC_RXDMA_CFG) & mask)
914 udelay(10); 901 udelay(10);
915 if (req) 902 if (req)
916 finish_out_dma(ep, req, -ECONNRESET, 0); 903 finish_out_dma(ep, req, -ECONNRESET, 0);
@@ -997,9 +984,13 @@ omap_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
997 req->req.actual = 0; 984 req->req.actual = 0;
998 985
999 /* maybe kickstart non-iso i/o queues */ 986 /* maybe kickstart non-iso i/o queues */
1000 if (is_iso) 987 if (is_iso) {
1001 UDC_IRQ_EN_REG |= UDC_SOF_IE; 988 u16 w;
1002 else if (list_empty(&ep->queue) && !ep->stopped && !ep->ackwait) { 989
990 w = omap_readw(UDC_IRQ_EN);
991 w |= UDC_SOF_IE;
992 omap_writew(w, UDC_IRQ_EN);
993 } else if (list_empty(&ep->queue) && !ep->stopped && !ep->ackwait) {
1003 int is_in; 994 int is_in;
1004 995
1005 if (ep->bEndpointAddress == 0) { 996 if (ep->bEndpointAddress == 0) {
@@ -1017,23 +1008,23 @@ omap_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
1017 * requests to non-control endpoints 1008 * requests to non-control endpoints
1018 */ 1009 */
1019 if (udc->ep0_set_config) { 1010 if (udc->ep0_set_config) {
1020 u16 irq_en = UDC_IRQ_EN_REG; 1011 u16 irq_en = omap_readw(UDC_IRQ_EN);
1021 1012
1022 irq_en |= UDC_DS_CHG_IE | UDC_EP0_IE; 1013 irq_en |= UDC_DS_CHG_IE | UDC_EP0_IE;
1023 if (!udc->ep0_reset_config) 1014 if (!udc->ep0_reset_config)
1024 irq_en |= UDC_EPN_RX_IE 1015 irq_en |= UDC_EPN_RX_IE
1025 | UDC_EPN_TX_IE; 1016 | UDC_EPN_TX_IE;
1026 UDC_IRQ_EN_REG = irq_en; 1017 omap_writew(irq_en, UDC_IRQ_EN);
1027 } 1018 }
1028 1019
1029 /* STATUS for zero length DATA stages is 1020 /* STATUS for zero length DATA stages is
1030 * always an IN ... even for IN transfers, 1021 * always an IN ... even for IN transfers,
1031 * a weird case which seem to stall OMAP. 1022 * a weird case which seem to stall OMAP.
1032 */ 1023 */
1033 UDC_EP_NUM_REG = (UDC_EP_SEL|UDC_EP_DIR); 1024 omap_writew(UDC_EP_SEL | UDC_EP_DIR, UDC_EP_NUM);
1034 UDC_CTRL_REG = UDC_CLR_EP; 1025 omap_writew(UDC_CLR_EP, UDC_CTRL);
1035 UDC_CTRL_REG = UDC_SET_FIFO_EN; 1026 omap_writew(UDC_SET_FIFO_EN, UDC_CTRL);
1036 UDC_EP_NUM_REG = UDC_EP_DIR; 1027 omap_writew(UDC_EP_DIR, UDC_EP_NUM);
1037 1028
1038 /* cleanup */ 1029 /* cleanup */
1039 udc->ep0_pending = 0; 1030 udc->ep0_pending = 0;
@@ -1042,11 +1033,11 @@ omap_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
1042 1033
1043 /* non-empty DATA stage */ 1034 /* non-empty DATA stage */
1044 } else if (is_in) { 1035 } else if (is_in) {
1045 UDC_EP_NUM_REG = UDC_EP_SEL|UDC_EP_DIR; 1036 omap_writew(UDC_EP_SEL | UDC_EP_DIR, UDC_EP_NUM);
1046 } else { 1037 } else {
1047 if (udc->ep0_setup) 1038 if (udc->ep0_setup)
1048 goto irq_wait; 1039 goto irq_wait;
1049 UDC_EP_NUM_REG = UDC_EP_SEL; 1040 omap_writew(UDC_EP_SEL, UDC_EP_NUM);
1050 } 1041 }
1051 } else { 1042 } else {
1052 is_in = ep->bEndpointAddress & USB_DIR_IN; 1043 is_in = ep->bEndpointAddress & USB_DIR_IN;
@@ -1062,7 +1053,7 @@ omap_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
1062 req = NULL; 1053 req = NULL;
1063 deselect_ep(); 1054 deselect_ep();
1064 if (!is_in) { 1055 if (!is_in) {
1065 UDC_CTRL_REG = UDC_SET_FIFO_EN; 1056 omap_writew(UDC_SET_FIFO_EN, UDC_CTRL);
1066 ep->ackwait = 1 + ep->double_buf; 1057 ep->ackwait = 1 + ep->double_buf;
1067 } 1058 }
1068 /* IN: 6 wait states before it'll tx */ 1059 /* IN: 6 wait states before it'll tx */
@@ -1130,9 +1121,9 @@ static int omap_ep_set_halt(struct usb_ep *_ep, int value)
1130 else if (value) { 1121 else if (value) {
1131 if (ep->udc->ep0_set_config) { 1122 if (ep->udc->ep0_set_config) {
1132 WARN("error changing config?\n"); 1123 WARN("error changing config?\n");
1133 UDC_SYSCON2_REG = UDC_CLR_CFG; 1124 omap_writew(UDC_CLR_CFG, UDC_SYSCON2);
1134 } 1125 }
1135 UDC_SYSCON2_REG = UDC_STALL_CMD; 1126 omap_writew(UDC_STALL_CMD, UDC_SYSCON2);
1136 ep->udc->ep0_pending = 0; 1127 ep->udc->ep0_pending = 0;
1137 status = 0; 1128 status = 0;
1138 } else /* NOP */ 1129 } else /* NOP */
@@ -1159,8 +1150,8 @@ static int omap_ep_set_halt(struct usb_ep *_ep, int value)
1159 channel = 0; 1150 channel = 0;
1160 1151
1161 use_ep(ep, UDC_EP_SEL); 1152 use_ep(ep, UDC_EP_SEL);
1162 if (UDC_STAT_FLG_REG & UDC_NON_ISO_FIFO_EMPTY) { 1153 if (omap_readw(UDC_STAT_FLG) & UDC_NON_ISO_FIFO_EMPTY) {
1163 UDC_CTRL_REG = UDC_SET_HALT; 1154 omap_writew(UDC_SET_HALT, UDC_CTRL);
1164 status = 0; 1155 status = 0;
1165 } else 1156 } else
1166 status = -EAGAIN; 1157 status = -EAGAIN;
@@ -1170,10 +1161,10 @@ static int omap_ep_set_halt(struct usb_ep *_ep, int value)
1170 dma_channel_claim(ep, channel); 1161 dma_channel_claim(ep, channel);
1171 } else { 1162 } else {
1172 use_ep(ep, 0); 1163 use_ep(ep, 0);
1173 UDC_CTRL_REG = ep->udc->clr_halt; 1164 omap_writew(ep->udc->clr_halt, UDC_CTRL);
1174 ep->ackwait = 0; 1165 ep->ackwait = 0;
1175 if (!(ep->bEndpointAddress & USB_DIR_IN)) { 1166 if (!(ep->bEndpointAddress & USB_DIR_IN)) {
1176 UDC_CTRL_REG = UDC_SET_FIFO_EN; 1167 omap_writew(UDC_SET_FIFO_EN, UDC_CTRL);
1177 ep->ackwait = 1 + ep->double_buf; 1168 ep->ackwait = 1 + ep->double_buf;
1178 } 1169 }
1179 } 1170 }
@@ -1205,7 +1196,7 @@ static struct usb_ep_ops omap_ep_ops = {
1205 1196
1206static int omap_get_frame(struct usb_gadget *gadget) 1197static int omap_get_frame(struct usb_gadget *gadget)
1207{ 1198{
1208 u16 sof = UDC_SOF_REG; 1199 u16 sof = omap_readw(UDC_SOF);
1209 return (sof & UDC_TS_OK) ? (sof & UDC_TS) : -EL2NSYNC; 1200 return (sof & UDC_TS_OK) ? (sof & UDC_TS) : -EL2NSYNC;
1210} 1201}
1211 1202
@@ -1224,7 +1215,7 @@ static int omap_wakeup(struct usb_gadget *gadget)
1224 */ 1215 */
1225 if (udc->devstat & (UDC_B_HNP_ENABLE|UDC_R_WK_OK)) { 1216 if (udc->devstat & (UDC_B_HNP_ENABLE|UDC_R_WK_OK)) {
1226 DBG("remote wakeup...\n"); 1217 DBG("remote wakeup...\n");
1227 UDC_SYSCON2_REG = UDC_RMT_WKP; 1218 omap_writew(UDC_RMT_WKP, UDC_SYSCON2);
1228 retval = 0; 1219 retval = 0;
1229 } 1220 }
1230 1221
@@ -1247,12 +1238,12 @@ omap_set_selfpowered(struct usb_gadget *gadget, int is_selfpowered)
1247 1238
1248 udc = container_of(gadget, struct omap_udc, gadget); 1239 udc = container_of(gadget, struct omap_udc, gadget);
1249 spin_lock_irqsave(&udc->lock, flags); 1240 spin_lock_irqsave(&udc->lock, flags);
1250 syscon1 = UDC_SYSCON1_REG; 1241 syscon1 = omap_readw(UDC_SYSCON1);
1251 if (is_selfpowered) 1242 if (is_selfpowered)
1252 syscon1 |= UDC_SELF_PWR; 1243 syscon1 |= UDC_SELF_PWR;
1253 else 1244 else
1254 syscon1 &= ~UDC_SELF_PWR; 1245 syscon1 &= ~UDC_SELF_PWR;
1255 UDC_SYSCON1_REG = syscon1; 1246 omap_writew(syscon1, UDC_SYSCON1);
1256 spin_unlock_irqrestore(&udc->lock, flags); 1247 spin_unlock_irqrestore(&udc->lock, flags);
1257 1248
1258 return 0; 1249 return 0;
@@ -1265,18 +1256,36 @@ static int can_pullup(struct omap_udc *udc)
1265 1256
1266static void pullup_enable(struct omap_udc *udc) 1257static void pullup_enable(struct omap_udc *udc)
1267{ 1258{
1268 UDC_SYSCON1_REG |= UDC_PULLUP_EN; 1259 u16 w;
1269 if (!gadget_is_otg(&udc->gadget) && !cpu_is_omap15xx()) 1260
1270 OTG_CTRL_REG |= OTG_BSESSVLD; 1261 w = omap_readw(UDC_SYSCON1);
1271 UDC_IRQ_EN_REG = UDC_DS_CHG_IE; 1262 w |= UDC_PULLUP_EN;
1263 omap_writew(w, UDC_SYSCON1);
1264 if (!gadget_is_otg(&udc->gadget) && !cpu_is_omap15xx()) {
1265 u32 l;
1266
1267 l = omap_readl(OTG_CTRL);
1268 l |= OTG_BSESSVLD;
1269 omap_writel(l, OTG_CTRL);
1270 }
1271 omap_writew(UDC_DS_CHG_IE, UDC_IRQ_EN);
1272} 1272}
1273 1273
1274static void pullup_disable(struct omap_udc *udc) 1274static void pullup_disable(struct omap_udc *udc)
1275{ 1275{
1276 if (!gadget_is_otg(&udc->gadget) && !cpu_is_omap15xx()) 1276 u16 w;
1277 OTG_CTRL_REG &= ~OTG_BSESSVLD; 1277
1278 UDC_IRQ_EN_REG = UDC_DS_CHG_IE; 1278 if (!gadget_is_otg(&udc->gadget) && !cpu_is_omap15xx()) {
1279 UDC_SYSCON1_REG &= ~UDC_PULLUP_EN; 1279 u32 l;
1280
1281 l = omap_readl(OTG_CTRL);
1282 l &= ~OTG_BSESSVLD;
1283 omap_writel(l, OTG_CTRL);
1284 }
1285 omap_writew(UDC_DS_CHG_IE, UDC_IRQ_EN);
1286 w = omap_readw(UDC_SYSCON1);
1287 w &= ~UDC_PULLUP_EN;
1288 omap_writew(w, UDC_SYSCON1);
1280} 1289}
1281 1290
1282static struct omap_udc *udc; 1291static struct omap_udc *udc;
@@ -1304,6 +1313,7 @@ static int omap_vbus_session(struct usb_gadget *gadget, int is_active)
1304{ 1313{
1305 struct omap_udc *udc; 1314 struct omap_udc *udc;
1306 unsigned long flags; 1315 unsigned long flags;
1316 u32 l;
1307 1317
1308 udc = container_of(gadget, struct omap_udc, gadget); 1318 udc = container_of(gadget, struct omap_udc, gadget);
1309 spin_lock_irqsave(&udc->lock, flags); 1319 spin_lock_irqsave(&udc->lock, flags);
@@ -1311,10 +1321,12 @@ static int omap_vbus_session(struct usb_gadget *gadget, int is_active)
1311 udc->vbus_active = (is_active != 0); 1321 udc->vbus_active = (is_active != 0);
1312 if (cpu_is_omap15xx()) { 1322 if (cpu_is_omap15xx()) {
1313 /* "software" detect, ignored if !VBUS_MODE_1510 */ 1323 /* "software" detect, ignored if !VBUS_MODE_1510 */
1324 l = omap_readl(FUNC_MUX_CTRL_0);
1314 if (is_active) 1325 if (is_active)
1315 FUNC_MUX_CTRL_0_REG |= VBUS_CTRL_1510; 1326 l |= VBUS_CTRL_1510;
1316 else 1327 else
1317 FUNC_MUX_CTRL_0_REG &= ~VBUS_CTRL_1510; 1328 l &= ~VBUS_CTRL_1510;
1329 omap_writel(l, FUNC_MUX_CTRL_0);
1318 } 1330 }
1319 if (udc->dc_clk != NULL && is_active) { 1331 if (udc->dc_clk != NULL && is_active) {
1320 if (!udc->clk_requested) { 1332 if (!udc->clk_requested) {
@@ -1384,9 +1396,9 @@ static void nuke(struct omap_ep *ep, int status)
1384 dma_channel_release(ep); 1396 dma_channel_release(ep);
1385 1397
1386 use_ep(ep, 0); 1398 use_ep(ep, 0);
1387 UDC_CTRL_REG = UDC_CLR_EP; 1399 omap_writew(UDC_CLR_EP, UDC_CTRL);
1388 if (ep->bEndpointAddress && ep->bmAttributes != USB_ENDPOINT_XFER_ISOC) 1400 if (ep->bEndpointAddress && ep->bmAttributes != USB_ENDPOINT_XFER_ISOC)
1389 UDC_CTRL_REG = UDC_SET_HALT; 1401 omap_writew(UDC_SET_HALT, UDC_CTRL);
1390 1402
1391 while (!list_empty(&ep->queue)) { 1403 while (!list_empty(&ep->queue)) {
1392 req = list_entry(ep->queue.next, struct omap_req, queue); 1404 req = list_entry(ep->queue.next, struct omap_req, queue);
@@ -1414,8 +1426,8 @@ static void update_otg(struct omap_udc *udc)
1414 if (!gadget_is_otg(&udc->gadget)) 1426 if (!gadget_is_otg(&udc->gadget))
1415 return; 1427 return;
1416 1428
1417 if (OTG_CTRL_REG & OTG_ID) 1429 if (omap_readl(OTG_CTRL) & OTG_ID)
1418 devstat = UDC_DEVSTAT_REG; 1430 devstat = omap_readw(UDC_DEVSTAT);
1419 else 1431 else
1420 devstat = 0; 1432 devstat = 0;
1421 1433
@@ -1426,9 +1438,14 @@ static void update_otg(struct omap_udc *udc)
1426 /* Enable HNP early, avoiding races on suspend irq path. 1438 /* Enable HNP early, avoiding races on suspend irq path.
1427 * ASSUMES OTG state machine B_BUS_REQ input is true. 1439 * ASSUMES OTG state machine B_BUS_REQ input is true.
1428 */ 1440 */
1429 if (udc->gadget.b_hnp_enable) 1441 if (udc->gadget.b_hnp_enable) {
1430 OTG_CTRL_REG = (OTG_CTRL_REG | OTG_B_HNPEN | OTG_B_BUSREQ) 1442 u32 l;
1431 & ~OTG_PULLUP; 1443
1444 l = omap_readl(OTG_CTRL);
1445 l |= OTG_B_HNPEN | OTG_B_BUSREQ;
1446 l &= ~OTG_PULLUP;
1447 omap_writel(l, OTG_CTRL);
1448 }
1432} 1449}
1433 1450
1434static void ep0_irq(struct omap_udc *udc, u16 irq_src) 1451static void ep0_irq(struct omap_udc *udc, u16 irq_src)
@@ -1446,7 +1463,7 @@ static void ep0_irq(struct omap_udc *udc, u16 irq_src)
1446 1463
1447 nuke(ep0, 0); 1464 nuke(ep0, 0);
1448 if (ack) { 1465 if (ack) {
1449 UDC_IRQ_SRC_REG = ack; 1466 omap_writew(ack, UDC_IRQ_SRC);
1450 irq_src = UDC_SETUP; 1467 irq_src = UDC_SETUP;
1451 } 1468 }
1452 } 1469 }
@@ -1466,9 +1483,9 @@ static void ep0_irq(struct omap_udc *udc, u16 irq_src)
1466 if (irq_src & UDC_EP0_TX) { 1483 if (irq_src & UDC_EP0_TX) {
1467 int stat; 1484 int stat;
1468 1485
1469 UDC_IRQ_SRC_REG = UDC_EP0_TX; 1486 omap_writew(UDC_EP0_TX, UDC_IRQ_SRC);
1470 UDC_EP_NUM_REG = UDC_EP_SEL|UDC_EP_DIR; 1487 omap_writew(UDC_EP_SEL|UDC_EP_DIR, UDC_EP_NUM);
1471 stat = UDC_STAT_FLG_REG; 1488 stat = omap_readw(UDC_STAT_FLG);
1472 if (stat & UDC_ACK) { 1489 if (stat & UDC_ACK) {
1473 if (udc->ep0_in) { 1490 if (udc->ep0_in) {
1474 /* write next IN packet from response, 1491 /* write next IN packet from response,
@@ -1476,26 +1493,26 @@ static void ep0_irq(struct omap_udc *udc, u16 irq_src)
1476 */ 1493 */
1477 if (req) 1494 if (req)
1478 stat = write_fifo(ep0, req); 1495 stat = write_fifo(ep0, req);
1479 UDC_EP_NUM_REG = UDC_EP_DIR; 1496 omap_writew(UDC_EP_DIR, UDC_EP_NUM);
1480 if (!req && udc->ep0_pending) { 1497 if (!req && udc->ep0_pending) {
1481 UDC_EP_NUM_REG = UDC_EP_SEL; 1498 omap_writew(UDC_EP_SEL, UDC_EP_NUM);
1482 UDC_CTRL_REG = UDC_CLR_EP; 1499 omap_writew(UDC_CLR_EP, UDC_CTRL);
1483 UDC_CTRL_REG = UDC_SET_FIFO_EN; 1500 omap_writew(UDC_SET_FIFO_EN, UDC_CTRL);
1484 UDC_EP_NUM_REG = 0; 1501 omap_writew(0, UDC_EP_NUM);
1485 udc->ep0_pending = 0; 1502 udc->ep0_pending = 0;
1486 } /* else: 6 wait states before it'll tx */ 1503 } /* else: 6 wait states before it'll tx */
1487 } else { 1504 } else {
1488 /* ack status stage of OUT transfer */ 1505 /* ack status stage of OUT transfer */
1489 UDC_EP_NUM_REG = UDC_EP_DIR; 1506 omap_writew(UDC_EP_DIR, UDC_EP_NUM);
1490 if (req) 1507 if (req)
1491 done(ep0, req, 0); 1508 done(ep0, req, 0);
1492 } 1509 }
1493 req = NULL; 1510 req = NULL;
1494 } else if (stat & UDC_STALL) { 1511 } else if (stat & UDC_STALL) {
1495 UDC_CTRL_REG = UDC_CLR_HALT; 1512 omap_writew(UDC_CLR_HALT, UDC_CTRL);
1496 UDC_EP_NUM_REG = UDC_EP_DIR; 1513 omap_writew(UDC_EP_DIR, UDC_EP_NUM);
1497 } else { 1514 } else {
1498 UDC_EP_NUM_REG = UDC_EP_DIR; 1515 omap_writew(UDC_EP_DIR, UDC_EP_NUM);
1499 } 1516 }
1500 } 1517 }
1501 1518
@@ -1503,9 +1520,9 @@ static void ep0_irq(struct omap_udc *udc, u16 irq_src)
1503 if (irq_src & UDC_EP0_RX) { 1520 if (irq_src & UDC_EP0_RX) {
1504 int stat; 1521 int stat;
1505 1522
1506 UDC_IRQ_SRC_REG = UDC_EP0_RX; 1523 omap_writew(UDC_EP0_RX, UDC_IRQ_SRC);
1507 UDC_EP_NUM_REG = UDC_EP_SEL; 1524 omap_writew(UDC_EP_SEL, UDC_EP_NUM);
1508 stat = UDC_STAT_FLG_REG; 1525 stat = omap_readw(UDC_STAT_FLG);
1509 if (stat & UDC_ACK) { 1526 if (stat & UDC_ACK) {
1510 if (!udc->ep0_in) { 1527 if (!udc->ep0_in) {
1511 stat = 0; 1528 stat = 0;
@@ -1513,34 +1530,35 @@ static void ep0_irq(struct omap_udc *udc, u16 irq_src)
1513 * reactiviting the fifo; stall on errors. 1530 * reactiviting the fifo; stall on errors.
1514 */ 1531 */
1515 if (!req || (stat = read_fifo(ep0, req)) < 0) { 1532 if (!req || (stat = read_fifo(ep0, req)) < 0) {
1516 UDC_SYSCON2_REG = UDC_STALL_CMD; 1533 omap_writew(UDC_STALL_CMD, UDC_SYSCON2);
1517 udc->ep0_pending = 0; 1534 udc->ep0_pending = 0;
1518 stat = 0; 1535 stat = 0;
1519 } else if (stat == 0) 1536 } else if (stat == 0)
1520 UDC_CTRL_REG = UDC_SET_FIFO_EN; 1537 omap_writew(UDC_SET_FIFO_EN, UDC_CTRL);
1521 UDC_EP_NUM_REG = 0; 1538 omap_writew(0, UDC_EP_NUM);
1522 1539
1523 /* activate status stage */ 1540 /* activate status stage */
1524 if (stat == 1) { 1541 if (stat == 1) {
1525 done(ep0, req, 0); 1542 done(ep0, req, 0);
1526 /* that may have STALLed ep0... */ 1543 /* that may have STALLed ep0... */
1527 UDC_EP_NUM_REG = UDC_EP_SEL|UDC_EP_DIR; 1544 omap_writew(UDC_EP_SEL | UDC_EP_DIR,
1528 UDC_CTRL_REG = UDC_CLR_EP; 1545 UDC_EP_NUM);
1529 UDC_CTRL_REG = UDC_SET_FIFO_EN; 1546 omap_writew(UDC_CLR_EP, UDC_CTRL);
1530 UDC_EP_NUM_REG = UDC_EP_DIR; 1547 omap_writew(UDC_SET_FIFO_EN, UDC_CTRL);
1548 omap_writew(UDC_EP_DIR, UDC_EP_NUM);
1531 udc->ep0_pending = 0; 1549 udc->ep0_pending = 0;
1532 } 1550 }
1533 } else { 1551 } else {
1534 /* ack status stage of IN transfer */ 1552 /* ack status stage of IN transfer */
1535 UDC_EP_NUM_REG = 0; 1553 omap_writew(0, UDC_EP_NUM);
1536 if (req) 1554 if (req)
1537 done(ep0, req, 0); 1555 done(ep0, req, 0);
1538 } 1556 }
1539 } else if (stat & UDC_STALL) { 1557 } else if (stat & UDC_STALL) {
1540 UDC_CTRL_REG = UDC_CLR_HALT; 1558 omap_writew(UDC_CLR_HALT, UDC_CTRL);
1541 UDC_EP_NUM_REG = 0; 1559 omap_writew(0, UDC_EP_NUM);
1542 } else { 1560 } else {
1543 UDC_EP_NUM_REG = 0; 1561 omap_writew(0, UDC_EP_NUM);
1544 } 1562 }
1545 } 1563 }
1546 1564
@@ -1555,14 +1573,14 @@ static void ep0_irq(struct omap_udc *udc, u16 irq_src)
1555 1573
1556 /* read the (latest) SETUP message */ 1574 /* read the (latest) SETUP message */
1557 do { 1575 do {
1558 UDC_EP_NUM_REG = UDC_SETUP_SEL; 1576 omap_writew(UDC_SETUP_SEL, UDC_EP_NUM);
1559 /* two bytes at a time */ 1577 /* two bytes at a time */
1560 u.word[0] = UDC_DATA_REG; 1578 u.word[0] = omap_readw(UDC_DATA);
1561 u.word[1] = UDC_DATA_REG; 1579 u.word[1] = omap_readw(UDC_DATA);
1562 u.word[2] = UDC_DATA_REG; 1580 u.word[2] = omap_readw(UDC_DATA);
1563 u.word[3] = UDC_DATA_REG; 1581 u.word[3] = omap_readw(UDC_DATA);
1564 UDC_EP_NUM_REG = 0; 1582 omap_writew(0, UDC_EP_NUM);
1565 } while (UDC_IRQ_SRC_REG & UDC_SETUP); 1583 } while (omap_readw(UDC_IRQ_SRC) & UDC_SETUP);
1566 1584
1567#define w_value le16_to_cpu(u.r.wValue) 1585#define w_value le16_to_cpu(u.r.wValue)
1568#define w_index le16_to_cpu(u.r.wIndex) 1586#define w_index le16_to_cpu(u.r.wIndex)
@@ -1593,9 +1611,9 @@ static void ep0_irq(struct omap_udc *udc, u16 irq_src)
1593 * later if it fails the request. 1611 * later if it fails the request.
1594 */ 1612 */
1595 if (udc->ep0_reset_config) 1613 if (udc->ep0_reset_config)
1596 UDC_SYSCON2_REG = UDC_CLR_CFG; 1614 omap_writew(UDC_CLR_CFG, UDC_SYSCON2);
1597 else 1615 else
1598 UDC_SYSCON2_REG = UDC_DEV_CFG; 1616 omap_writew(UDC_DEV_CFG, UDC_SYSCON2);
1599 update_otg(udc); 1617 update_otg(udc);
1600 goto delegate; 1618 goto delegate;
1601 case USB_REQ_CLEAR_FEATURE: 1619 case USB_REQ_CLEAR_FEATURE:
@@ -1613,10 +1631,10 @@ static void ep0_irq(struct omap_udc *udc, u16 irq_src)
1613 || !ep->desc) 1631 || !ep->desc)
1614 goto do_stall; 1632 goto do_stall;
1615 use_ep(ep, 0); 1633 use_ep(ep, 0);
1616 UDC_CTRL_REG = udc->clr_halt; 1634 omap_writew(udc->clr_halt, UDC_CTRL);
1617 ep->ackwait = 0; 1635 ep->ackwait = 0;
1618 if (!(ep->bEndpointAddress & USB_DIR_IN)) { 1636 if (!(ep->bEndpointAddress & USB_DIR_IN)) {
1619 UDC_CTRL_REG = UDC_SET_FIFO_EN; 1637 omap_writew(UDC_SET_FIFO_EN, UDC_CTRL);
1620 ep->ackwait = 1 + ep->double_buf; 1638 ep->ackwait = 1 + ep->double_buf;
1621 } 1639 }
1622 /* NOTE: assumes the host behaves sanely, 1640 /* NOTE: assumes the host behaves sanely,
@@ -1649,15 +1667,15 @@ static void ep0_irq(struct omap_udc *udc, u16 irq_src)
1649 } 1667 }
1650 use_ep(ep, 0); 1668 use_ep(ep, 0);
1651 /* can't halt if fifo isn't empty... */ 1669 /* can't halt if fifo isn't empty... */
1652 UDC_CTRL_REG = UDC_CLR_EP; 1670 omap_writew(UDC_CLR_EP, UDC_CTRL);
1653 UDC_CTRL_REG = UDC_SET_HALT; 1671 omap_writew(UDC_SET_HALT, UDC_CTRL);
1654 VDBG("%s halted by host\n", ep->name); 1672 VDBG("%s halted by host\n", ep->name);
1655ep0out_status_stage: 1673ep0out_status_stage:
1656 status = 0; 1674 status = 0;
1657 UDC_EP_NUM_REG = UDC_EP_SEL|UDC_EP_DIR; 1675 omap_writew(UDC_EP_SEL|UDC_EP_DIR, UDC_EP_NUM);
1658 UDC_CTRL_REG = UDC_CLR_EP; 1676 omap_writew(UDC_CLR_EP, UDC_CTRL);
1659 UDC_CTRL_REG = UDC_SET_FIFO_EN; 1677 omap_writew(UDC_SET_FIFO_EN, UDC_CTRL);
1660 UDC_EP_NUM_REG = UDC_EP_DIR; 1678 omap_writew(UDC_EP_DIR, UDC_EP_NUM);
1661 udc->ep0_pending = 0; 1679 udc->ep0_pending = 0;
1662 break; 1680 break;
1663 case USB_REQ_GET_STATUS: 1681 case USB_REQ_GET_STATUS:
@@ -1694,10 +1712,10 @@ intf_status:
1694 1712
1695zero_status: 1713zero_status:
1696 /* return two zero bytes */ 1714 /* return two zero bytes */
1697 UDC_EP_NUM_REG = UDC_EP_SEL|UDC_EP_DIR; 1715 omap_writew(UDC_EP_SEL|UDC_EP_DIR, UDC_EP_NUM);
1698 UDC_DATA_REG = 0; 1716 omap_writew(0, UDC_DATA);
1699 UDC_CTRL_REG = UDC_SET_FIFO_EN; 1717 omap_writew(UDC_SET_FIFO_EN, UDC_CTRL);
1700 UDC_EP_NUM_REG = UDC_EP_DIR; 1718 omap_writew(UDC_EP_DIR, UDC_EP_NUM);
1701 status = 0; 1719 status = 0;
1702 VDBG("GET_STATUS, interface %d\n", w_index); 1720 VDBG("GET_STATUS, interface %d\n", w_index);
1703 /* next, status stage */ 1721 /* next, status stage */
@@ -1706,8 +1724,8 @@ zero_status:
1706delegate: 1724delegate:
1707 /* activate the ep0out fifo right away */ 1725 /* activate the ep0out fifo right away */
1708 if (!udc->ep0_in && w_length) { 1726 if (!udc->ep0_in && w_length) {
1709 UDC_EP_NUM_REG = 0; 1727 omap_writew(0, UDC_EP_NUM);
1710 UDC_CTRL_REG = UDC_SET_FIFO_EN; 1728 omap_writew(UDC_SET_FIFO_EN, UDC_CTRL);
1711 } 1729 }
1712 1730
1713 /* gadget drivers see class/vendor specific requests, 1731 /* gadget drivers see class/vendor specific requests,
@@ -1748,9 +1766,9 @@ do_stall:
1748 if (udc->ep0_reset_config) 1766 if (udc->ep0_reset_config)
1749 WARN("error resetting config?\n"); 1767 WARN("error resetting config?\n");
1750 else 1768 else
1751 UDC_SYSCON2_REG = UDC_CLR_CFG; 1769 omap_writew(UDC_CLR_CFG, UDC_SYSCON2);
1752 } 1770 }
1753 UDC_SYSCON2_REG = UDC_STALL_CMD; 1771 omap_writew(UDC_STALL_CMD, UDC_SYSCON2);
1754 udc->ep0_pending = 0; 1772 udc->ep0_pending = 0;
1755 } 1773 }
1756 } 1774 }
@@ -1764,7 +1782,7 @@ static void devstate_irq(struct omap_udc *udc, u16 irq_src)
1764{ 1782{
1765 u16 devstat, change; 1783 u16 devstat, change;
1766 1784
1767 devstat = UDC_DEVSTAT_REG; 1785 devstat = omap_readw(UDC_DEVSTAT);
1768 change = devstat ^ udc->devstat; 1786 change = devstat ^ udc->devstat;
1769 udc->devstat = devstat; 1787 udc->devstat = devstat;
1770 1788
@@ -1804,7 +1822,8 @@ static void devstate_irq(struct omap_udc *udc, u16 irq_src)
1804 INFO("USB reset done, gadget %s\n", 1822 INFO("USB reset done, gadget %s\n",
1805 udc->driver->driver.name); 1823 udc->driver->driver.name);
1806 /* ep0 traffic is legal from now on */ 1824 /* ep0 traffic is legal from now on */
1807 UDC_IRQ_EN_REG = UDC_DS_CHG_IE | UDC_EP0_IE; 1825 omap_writew(UDC_DS_CHG_IE | UDC_EP0_IE,
1826 UDC_IRQ_EN);
1808 } 1827 }
1809 change &= ~UDC_USB_RESET; 1828 change &= ~UDC_USB_RESET;
1810 } 1829 }
@@ -1848,7 +1867,7 @@ static void devstate_irq(struct omap_udc *udc, u16 irq_src)
1848 VDBG("devstat %03x, ignore change %03x\n", 1867 VDBG("devstat %03x, ignore change %03x\n",
1849 devstat, change); 1868 devstat, change);
1850 1869
1851 UDC_IRQ_SRC_REG = UDC_DS_CHG; 1870 omap_writew(UDC_DS_CHG, UDC_IRQ_SRC);
1852} 1871}
1853 1872
1854static irqreturn_t omap_udc_irq(int irq, void *_udc) 1873static irqreturn_t omap_udc_irq(int irq, void *_udc)
@@ -1859,7 +1878,7 @@ static irqreturn_t omap_udc_irq(int irq, void *_udc)
1859 unsigned long flags; 1878 unsigned long flags;
1860 1879
1861 spin_lock_irqsave(&udc->lock, flags); 1880 spin_lock_irqsave(&udc->lock, flags);
1862 irq_src = UDC_IRQ_SRC_REG; 1881 irq_src = omap_readw(UDC_IRQ_SRC);
1863 1882
1864 /* Device state change (usb ch9 stuff) */ 1883 /* Device state change (usb ch9 stuff) */
1865 if (irq_src & UDC_DS_CHG) { 1884 if (irq_src & UDC_DS_CHG) {
@@ -1882,7 +1901,7 @@ static irqreturn_t omap_udc_irq(int irq, void *_udc)
1882 irq_src &= ~(UDC_TXN_DONE|UDC_RXN_CNT|UDC_RXN_EOT); 1901 irq_src &= ~(UDC_TXN_DONE|UDC_RXN_CNT|UDC_RXN_EOT);
1883 } 1902 }
1884 1903
1885 irq_src &= ~(UDC_SOF|UDC_EPN_TX|UDC_EPN_RX); 1904 irq_src &= ~(UDC_IRQ_SOF | UDC_EPN_TX|UDC_EPN_RX);
1886 if (irq_src) 1905 if (irq_src)
1887 DBG("udc_irq, unhandled %03x\n", irq_src); 1906 DBG("udc_irq, unhandled %03x\n", irq_src);
1888 spin_unlock_irqrestore(&udc->lock, flags); 1907 spin_unlock_irqrestore(&udc->lock, flags);
@@ -1903,7 +1922,7 @@ static void pio_out_timer(unsigned long _ep)
1903 spin_lock_irqsave(&ep->udc->lock, flags); 1922 spin_lock_irqsave(&ep->udc->lock, flags);
1904 if (!list_empty(&ep->queue) && ep->ackwait) { 1923 if (!list_empty(&ep->queue) && ep->ackwait) {
1905 use_ep(ep, UDC_EP_SEL); 1924 use_ep(ep, UDC_EP_SEL);
1906 stat_flg = UDC_STAT_FLG_REG; 1925 stat_flg = omap_readw(UDC_STAT_FLG);
1907 1926
1908 if ((stat_flg & UDC_ACK) && (!(stat_flg & UDC_FIFO_EN) 1927 if ((stat_flg & UDC_ACK) && (!(stat_flg & UDC_FIFO_EN)
1909 || (ep->double_buf && HALF_FULL(stat_flg)))) { 1928 || (ep->double_buf && HALF_FULL(stat_flg)))) {
@@ -1913,8 +1932,8 @@ static void pio_out_timer(unsigned long _ep)
1913 req = container_of(ep->queue.next, 1932 req = container_of(ep->queue.next,
1914 struct omap_req, queue); 1933 struct omap_req, queue);
1915 (void) read_fifo(ep, req); 1934 (void) read_fifo(ep, req);
1916 UDC_EP_NUM_REG = ep->bEndpointAddress; 1935 omap_writew(ep->bEndpointAddress, UDC_EP_NUM);
1917 UDC_CTRL_REG = UDC_SET_FIFO_EN; 1936 omap_writew(UDC_SET_FIFO_EN, UDC_CTRL);
1918 ep->ackwait = 1 + ep->double_buf; 1937 ep->ackwait = 1 + ep->double_buf;
1919 } else 1938 } else
1920 deselect_ep(); 1939 deselect_ep();
@@ -1934,20 +1953,20 @@ static irqreturn_t omap_udc_pio_irq(int irq, void *_dev)
1934 unsigned long flags; 1953 unsigned long flags;
1935 1954
1936 spin_lock_irqsave(&udc->lock, flags); 1955 spin_lock_irqsave(&udc->lock, flags);
1937 epn_stat = UDC_EPN_STAT_REG; 1956 epn_stat = omap_readw(UDC_EPN_STAT);
1938 irq_src = UDC_IRQ_SRC_REG; 1957 irq_src = omap_readw(UDC_IRQ_SRC);
1939 1958
1940 /* handle OUT first, to avoid some wasteful NAKs */ 1959 /* handle OUT first, to avoid some wasteful NAKs */
1941 if (irq_src & UDC_EPN_RX) { 1960 if (irq_src & UDC_EPN_RX) {
1942 epnum = (epn_stat >> 8) & 0x0f; 1961 epnum = (epn_stat >> 8) & 0x0f;
1943 UDC_IRQ_SRC_REG = UDC_EPN_RX; 1962 omap_writew(UDC_EPN_RX, UDC_IRQ_SRC);
1944 status = IRQ_HANDLED; 1963 status = IRQ_HANDLED;
1945 ep = &udc->ep[epnum]; 1964 ep = &udc->ep[epnum];
1946 ep->irqs++; 1965 ep->irqs++;
1947 1966
1948 UDC_EP_NUM_REG = epnum | UDC_EP_SEL; 1967 omap_writew(epnum | UDC_EP_SEL, UDC_EP_NUM);
1949 ep->fnf = 0; 1968 ep->fnf = 0;
1950 if ((UDC_STAT_FLG_REG & UDC_ACK)) { 1969 if (omap_readw(UDC_STAT_FLG) & UDC_ACK) {
1951 ep->ackwait--; 1970 ep->ackwait--;
1952 if (!list_empty(&ep->queue)) { 1971 if (!list_empty(&ep->queue)) {
1953 int stat; 1972 int stat;
@@ -1959,15 +1978,15 @@ static irqreturn_t omap_udc_pio_irq(int irq, void *_dev)
1959 } 1978 }
1960 } 1979 }
1961 /* min 6 clock delay before clearing EP_SEL ... */ 1980 /* min 6 clock delay before clearing EP_SEL ... */
1962 epn_stat = UDC_EPN_STAT_REG; 1981 epn_stat = omap_readw(UDC_EPN_STAT);
1963 epn_stat = UDC_EPN_STAT_REG; 1982 epn_stat = omap_readw(UDC_EPN_STAT);
1964 UDC_EP_NUM_REG = epnum; 1983 omap_writew(epnum, UDC_EP_NUM);
1965 1984
1966 /* enabling fifo _after_ clearing ACK, contrary to docs, 1985 /* enabling fifo _after_ clearing ACK, contrary to docs,
1967 * reduces lossage; timer still needed though (sigh). 1986 * reduces lossage; timer still needed though (sigh).
1968 */ 1987 */
1969 if (ep->fnf) { 1988 if (ep->fnf) {
1970 UDC_CTRL_REG = UDC_SET_FIFO_EN; 1989 omap_writew(UDC_SET_FIFO_EN, UDC_CTRL);
1971 ep->ackwait = 1 + ep->double_buf; 1990 ep->ackwait = 1 + ep->double_buf;
1972 } 1991 }
1973 mod_timer(&ep->timer, PIO_OUT_TIMEOUT); 1992 mod_timer(&ep->timer, PIO_OUT_TIMEOUT);
@@ -1976,13 +1995,13 @@ static irqreturn_t omap_udc_pio_irq(int irq, void *_dev)
1976 /* then IN transfers */ 1995 /* then IN transfers */
1977 else if (irq_src & UDC_EPN_TX) { 1996 else if (irq_src & UDC_EPN_TX) {
1978 epnum = epn_stat & 0x0f; 1997 epnum = epn_stat & 0x0f;
1979 UDC_IRQ_SRC_REG = UDC_EPN_TX; 1998 omap_writew(UDC_EPN_TX, UDC_IRQ_SRC);
1980 status = IRQ_HANDLED; 1999 status = IRQ_HANDLED;
1981 ep = &udc->ep[16 + epnum]; 2000 ep = &udc->ep[16 + epnum];
1982 ep->irqs++; 2001 ep->irqs++;
1983 2002
1984 UDC_EP_NUM_REG = epnum | UDC_EP_DIR | UDC_EP_SEL; 2003 omap_writew(epnum | UDC_EP_DIR | UDC_EP_SEL, UDC_EP_NUM);
1985 if ((UDC_STAT_FLG_REG & UDC_ACK)) { 2004 if (omap_readw(UDC_STAT_FLG) & UDC_ACK) {
1986 ep->ackwait = 0; 2005 ep->ackwait = 0;
1987 if (!list_empty(&ep->queue)) { 2006 if (!list_empty(&ep->queue)) {
1988 req = container_of(ep->queue.next, 2007 req = container_of(ep->queue.next,
@@ -1991,9 +2010,9 @@ static irqreturn_t omap_udc_pio_irq(int irq, void *_dev)
1991 } 2010 }
1992 } 2011 }
1993 /* min 6 clock delay before clearing EP_SEL ... */ 2012 /* min 6 clock delay before clearing EP_SEL ... */
1994 epn_stat = UDC_EPN_STAT_REG; 2013 epn_stat = omap_readw(UDC_EPN_STAT);
1995 epn_stat = UDC_EPN_STAT_REG; 2014 epn_stat = omap_readw(UDC_EPN_STAT);
1996 UDC_EP_NUM_REG = epnum | UDC_EP_DIR; 2015 omap_writew(epnum | UDC_EP_DIR, UDC_EP_NUM);
1997 /* then 6 clocks before it'd tx */ 2016 /* then 6 clocks before it'd tx */
1998 } 2017 }
1999 2018
@@ -2021,7 +2040,7 @@ static irqreturn_t omap_udc_iso_irq(int irq, void *_dev)
2021 req = list_entry(ep->queue.next, struct omap_req, queue); 2040 req = list_entry(ep->queue.next, struct omap_req, queue);
2022 2041
2023 use_ep(ep, UDC_EP_SEL); 2042 use_ep(ep, UDC_EP_SEL);
2024 stat = UDC_STAT_FLG_REG; 2043 stat = omap_readw(UDC_STAT_FLG);
2025 2044
2026 /* NOTE: like the other controller drivers, this isn't 2045 /* NOTE: like the other controller drivers, this isn't
2027 * currently reporting lost or damaged frames. 2046 * currently reporting lost or damaged frames.
@@ -2053,9 +2072,14 @@ static irqreturn_t omap_udc_iso_irq(int irq, void *_dev)
2053 if (!list_empty(&ep->queue)) 2072 if (!list_empty(&ep->queue))
2054 pending = 1; 2073 pending = 1;
2055 } 2074 }
2056 if (!pending) 2075 if (!pending) {
2057 UDC_IRQ_EN_REG &= ~UDC_SOF_IE; 2076 u16 w;
2058 UDC_IRQ_SRC_REG = UDC_SOF; 2077
2078 w = omap_readw(UDC_IRQ_EN);
2079 w &= ~UDC_SOF_IE;
2080 omap_writew(w, UDC_IRQ_EN);
2081 }
2082 omap_writew(UDC_IRQ_SOF, UDC_IRQ_SRC);
2059 2083
2060 spin_unlock_irqrestore(&udc->lock, flags); 2084 spin_unlock_irqrestore(&udc->lock, flags);
2061 return IRQ_HANDLED; 2085 return IRQ_HANDLED;
@@ -2104,7 +2128,7 @@ int usb_gadget_register_driver (struct usb_gadget_driver *driver)
2104 if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) 2128 if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC)
2105 continue; 2129 continue;
2106 use_ep(ep, 0); 2130 use_ep(ep, 0);
2107 UDC_CTRL_REG = UDC_SET_HALT; 2131 omap_writew(UDC_SET_HALT, UDC_CTRL);
2108 } 2132 }
2109 udc->ep0_pending = 0; 2133 udc->ep0_pending = 0;
2110 udc->ep[0].irqs = 0; 2134 udc->ep[0].irqs = 0;
@@ -2128,7 +2152,7 @@ int usb_gadget_register_driver (struct usb_gadget_driver *driver)
2128 } 2152 }
2129 DBG("bound to driver %s\n", driver->driver.name); 2153 DBG("bound to driver %s\n", driver->driver.name);
2130 2154
2131 UDC_IRQ_SRC_REG = UDC_IRQ_SRC_MASK; 2155 omap_writew(UDC_IRQ_SRC_MASK, UDC_IRQ_SRC);
2132 2156
2133 /* connect to bus through transceiver */ 2157 /* connect to bus through transceiver */
2134 if (udc->transceiver) { 2158 if (udc->transceiver) {
@@ -2225,7 +2249,7 @@ static void proc_ep_show(struct seq_file *s, struct omap_ep *ep)
2225 else 2249 else
2226 buf[0] = 0; 2250 buf[0] = 0;
2227 2251
2228 stat_flg = UDC_STAT_FLG_REG; 2252 stat_flg = omap_readw(UDC_STAT_FLG);
2229 seq_printf(s, 2253 seq_printf(s,
2230 "\n%s %s%s%sirqs %ld stat %04x " EIGHTBITS FOURBITS "%s\n", 2254 "\n%s %s%s%sirqs %ld stat %04x " EIGHTBITS FOURBITS "%s\n",
2231 ep->name, buf, 2255 ep->name, buf,
@@ -2292,11 +2316,11 @@ static int proc_otg_show(struct seq_file *s)
2292 trans = CONTROL_DEVCONF_REG; 2316 trans = CONTROL_DEVCONF_REG;
2293 } else { 2317 } else {
2294 ctrl_name = "tranceiver_ctrl"; 2318 ctrl_name = "tranceiver_ctrl";
2295 trans = USB_TRANSCEIVER_CTRL_REG; 2319 trans = omap_readw(USB_TRANSCEIVER_CTRL);
2296 } 2320 }
2297 seq_printf(s, "\nOTG rev %d.%d, %s %05x\n", 2321 seq_printf(s, "\nOTG rev %d.%d, %s %05x\n",
2298 tmp >> 4, tmp & 0xf, ctrl_name, trans); 2322 tmp >> 4, tmp & 0xf, ctrl_name, trans);
2299 tmp = OTG_SYSCON_1_REG; 2323 tmp = omap_readw(OTG_SYSCON_1);
2300 seq_printf(s, "otg_syscon1 %08x usb2 %s, usb1 %s, usb0 %s," 2324 seq_printf(s, "otg_syscon1 %08x usb2 %s, usb1 %s, usb0 %s,"
2301 FOURBITS "\n", tmp, 2325 FOURBITS "\n", tmp,
2302 trx_mode(USB2_TRX_MODE(tmp), trans & CONF_USB2_UNI_R), 2326 trx_mode(USB2_TRX_MODE(tmp), trans & CONF_USB2_UNI_R),
@@ -2308,7 +2332,7 @@ static int proc_otg_show(struct seq_file *s)
2308 (tmp & HST_IDLE_EN) ? " !host" : "", 2332 (tmp & HST_IDLE_EN) ? " !host" : "",
2309 (tmp & DEV_IDLE_EN) ? " !dev" : "", 2333 (tmp & DEV_IDLE_EN) ? " !dev" : "",
2310 (tmp & OTG_RESET_DONE) ? " reset_done" : " reset_active"); 2334 (tmp & OTG_RESET_DONE) ? " reset_done" : " reset_active");
2311 tmp = OTG_SYSCON_2_REG; 2335 tmp = omap_readl(OTG_SYSCON_2);
2312 seq_printf(s, "otg_syscon2 %08x%s" EIGHTBITS 2336 seq_printf(s, "otg_syscon2 %08x%s" EIGHTBITS
2313 " b_ase_brst=%d hmc=%d\n", tmp, 2337 " b_ase_brst=%d hmc=%d\n", tmp,
2314 (tmp & OTG_EN) ? " otg_en" : "", 2338 (tmp & OTG_EN) ? " otg_en" : "",
@@ -2323,7 +2347,7 @@ static int proc_otg_show(struct seq_file *s)
2323 (tmp & HMC_TLLATTACH) ? " tllattach" : "", 2347 (tmp & HMC_TLLATTACH) ? " tllattach" : "",
2324 B_ASE_BRST(tmp), 2348 B_ASE_BRST(tmp),
2325 OTG_HMC(tmp)); 2349 OTG_HMC(tmp));
2326 tmp = OTG_CTRL_REG; 2350 tmp = omap_readl(OTG_CTRL);
2327 seq_printf(s, "otg_ctrl %06x" EIGHTBITS EIGHTBITS "%s\n", tmp, 2351 seq_printf(s, "otg_ctrl %06x" EIGHTBITS EIGHTBITS "%s\n", tmp,
2328 (tmp & OTG_ASESSVLD) ? " asess" : "", 2352 (tmp & OTG_ASESSVLD) ? " asess" : "",
2329 (tmp & OTG_BSESSEND) ? " bsess_end" : "", 2353 (tmp & OTG_BSESSEND) ? " bsess_end" : "",
@@ -2343,13 +2367,13 @@ static int proc_otg_show(struct seq_file *s)
2343 (tmp & OTG_PU_VBUS) ? " pu_vb" : "", 2367 (tmp & OTG_PU_VBUS) ? " pu_vb" : "",
2344 (tmp & OTG_PU_ID) ? " pu_id" : "" 2368 (tmp & OTG_PU_ID) ? " pu_id" : ""
2345 ); 2369 );
2346 tmp = OTG_IRQ_EN_REG; 2370 tmp = omap_readw(OTG_IRQ_EN);
2347 seq_printf(s, "otg_irq_en %04x" "\n", tmp); 2371 seq_printf(s, "otg_irq_en %04x" "\n", tmp);
2348 tmp = OTG_IRQ_SRC_REG; 2372 tmp = omap_readw(OTG_IRQ_SRC);
2349 seq_printf(s, "otg_irq_src %04x" "\n", tmp); 2373 seq_printf(s, "otg_irq_src %04x" "\n", tmp);
2350 tmp = OTG_OUTCTRL_REG; 2374 tmp = omap_readw(OTG_OUTCTRL);
2351 seq_printf(s, "otg_outctrl %04x" "\n", tmp); 2375 seq_printf(s, "otg_outctrl %04x" "\n", tmp);
2352 tmp = OTG_TEST_REG; 2376 tmp = omap_readw(OTG_TEST);
2353 seq_printf(s, "otg_test %04x" "\n", tmp); 2377 seq_printf(s, "otg_test %04x" "\n", tmp);
2354 return 0; 2378 return 0;
2355} 2379}
@@ -2370,7 +2394,7 @@ static int proc_udc_show(struct seq_file *s, void *_)
2370 driver_desc, 2394 driver_desc,
2371 use_dma ? " (dma)" : ""); 2395 use_dma ? " (dma)" : "");
2372 2396
2373 tmp = UDC_REV_REG & 0xff; 2397 tmp = omap_readw(UDC_REV) & 0xff;
2374 seq_printf(s, 2398 seq_printf(s,
2375 "UDC rev %d.%d, fifo mode %d, gadget %s\n" 2399 "UDC rev %d.%d, fifo mode %d, gadget %s\n"
2376 "hmc %d, transceiver %s\n", 2400 "hmc %d, transceiver %s\n",
@@ -2384,16 +2408,16 @@ static int proc_udc_show(struct seq_file *s, void *_)
2384 ? "external" : "(none)")); 2408 ? "external" : "(none)"));
2385 if (cpu_class_is_omap1()) { 2409 if (cpu_class_is_omap1()) {
2386 seq_printf(s, "ULPD control %04x req %04x status %04x\n", 2410 seq_printf(s, "ULPD control %04x req %04x status %04x\n",
2387 __REG16(ULPD_CLOCK_CTRL), 2411 omap_readw(ULPD_CLOCK_CTRL),
2388 __REG16(ULPD_SOFT_REQ), 2412 omap_readw(ULPD_SOFT_REQ),
2389 __REG16(ULPD_STATUS_REQ)); 2413 omap_readw(ULPD_STATUS_REQ));
2390 } 2414 }
2391 2415
2392 /* OTG controller registers */ 2416 /* OTG controller registers */
2393 if (!cpu_is_omap15xx()) 2417 if (!cpu_is_omap15xx())
2394 proc_otg_show(s); 2418 proc_otg_show(s);
2395 2419
2396 tmp = UDC_SYSCON1_REG; 2420 tmp = omap_readw(UDC_SYSCON1);
2397 seq_printf(s, "\nsyscon1 %04x" EIGHTBITS "\n", tmp, 2421 seq_printf(s, "\nsyscon1 %04x" EIGHTBITS "\n", tmp,
2398 (tmp & UDC_CFG_LOCK) ? " cfg_lock" : "", 2422 (tmp & UDC_CFG_LOCK) ? " cfg_lock" : "",
2399 (tmp & UDC_DATA_ENDIAN) ? " data_endian" : "", 2423 (tmp & UDC_DATA_ENDIAN) ? " data_endian" : "",
@@ -2412,7 +2436,7 @@ static int proc_udc_show(struct seq_file *s, void *_)
2412 return 0; 2436 return 0;
2413 } 2437 }
2414 2438
2415 tmp = UDC_DEVSTAT_REG; 2439 tmp = omap_readw(UDC_DEVSTAT);
2416 seq_printf(s, "devstat %04x" EIGHTBITS "%s%s\n", tmp, 2440 seq_printf(s, "devstat %04x" EIGHTBITS "%s%s\n", tmp,
2417 (tmp & UDC_B_HNP_ENABLE) ? " b_hnp" : "", 2441 (tmp & UDC_B_HNP_ENABLE) ? " b_hnp" : "",
2418 (tmp & UDC_A_HNP_SUPPORT) ? " a_hnp" : "", 2442 (tmp & UDC_A_HNP_SUPPORT) ? " a_hnp" : "",
@@ -2424,20 +2448,20 @@ static int proc_udc_show(struct seq_file *s, void *_)
2424 (tmp & UDC_ADD) ? " ADD" : "", 2448 (tmp & UDC_ADD) ? " ADD" : "",
2425 (tmp & UDC_DEF) ? " DEF" : "", 2449 (tmp & UDC_DEF) ? " DEF" : "",
2426 (tmp & UDC_ATT) ? " ATT" : ""); 2450 (tmp & UDC_ATT) ? " ATT" : "");
2427 seq_printf(s, "sof %04x\n", UDC_SOF_REG); 2451 seq_printf(s, "sof %04x\n", omap_readw(UDC_SOF));
2428 tmp = UDC_IRQ_EN_REG; 2452 tmp = omap_readw(UDC_IRQ_EN);
2429 seq_printf(s, "irq_en %04x" FOURBITS "%s\n", tmp, 2453 seq_printf(s, "irq_en %04x" FOURBITS "%s\n", tmp,
2430 (tmp & UDC_SOF_IE) ? " sof" : "", 2454 (tmp & UDC_SOF_IE) ? " sof" : "",
2431 (tmp & UDC_EPN_RX_IE) ? " epn_rx" : "", 2455 (tmp & UDC_EPN_RX_IE) ? " epn_rx" : "",
2432 (tmp & UDC_EPN_TX_IE) ? " epn_tx" : "", 2456 (tmp & UDC_EPN_TX_IE) ? " epn_tx" : "",
2433 (tmp & UDC_DS_CHG_IE) ? " ds_chg" : "", 2457 (tmp & UDC_DS_CHG_IE) ? " ds_chg" : "",
2434 (tmp & UDC_EP0_IE) ? " ep0" : ""); 2458 (tmp & UDC_EP0_IE) ? " ep0" : "");
2435 tmp = UDC_IRQ_SRC_REG; 2459 tmp = omap_readw(UDC_IRQ_SRC);
2436 seq_printf(s, "irq_src %04x" EIGHTBITS "%s%s\n", tmp, 2460 seq_printf(s, "irq_src %04x" EIGHTBITS "%s%s\n", tmp,
2437 (tmp & UDC_TXN_DONE) ? " txn_done" : "", 2461 (tmp & UDC_TXN_DONE) ? " txn_done" : "",
2438 (tmp & UDC_RXN_CNT) ? " rxn_cnt" : "", 2462 (tmp & UDC_RXN_CNT) ? " rxn_cnt" : "",
2439 (tmp & UDC_RXN_EOT) ? " rxn_eot" : "", 2463 (tmp & UDC_RXN_EOT) ? " rxn_eot" : "",
2440 (tmp & UDC_SOF) ? " sof" : "", 2464 (tmp & UDC_IRQ_SOF) ? " sof" : "",
2441 (tmp & UDC_EPN_RX) ? " epn_rx" : "", 2465 (tmp & UDC_EPN_RX) ? " epn_rx" : "",
2442 (tmp & UDC_EPN_TX) ? " epn_tx" : "", 2466 (tmp & UDC_EPN_TX) ? " epn_tx" : "",
2443 (tmp & UDC_DS_CHG) ? " ds_chg" : "", 2467 (tmp & UDC_DS_CHG) ? " ds_chg" : "",
@@ -2447,7 +2471,7 @@ static int proc_udc_show(struct seq_file *s, void *_)
2447 if (use_dma) { 2471 if (use_dma) {
2448 unsigned i; 2472 unsigned i;
2449 2473
2450 tmp = UDC_DMA_IRQ_EN_REG; 2474 tmp = omap_readw(UDC_DMA_IRQ_EN);
2451 seq_printf(s, "dma_irq_en %04x%s" EIGHTBITS "\n", tmp, 2475 seq_printf(s, "dma_irq_en %04x%s" EIGHTBITS "\n", tmp,
2452 (tmp & UDC_TX_DONE_IE(3)) ? " tx2_done" : "", 2476 (tmp & UDC_TX_DONE_IE(3)) ? " tx2_done" : "",
2453 (tmp & UDC_RX_CNT_IE(3)) ? " rx2_cnt" : "", 2477 (tmp & UDC_RX_CNT_IE(3)) ? " rx2_cnt" : "",
@@ -2461,29 +2485,29 @@ static int proc_udc_show(struct seq_file *s, void *_)
2461 (tmp & UDC_RX_CNT_IE(1)) ? " rx0_cnt" : "", 2485 (tmp & UDC_RX_CNT_IE(1)) ? " rx0_cnt" : "",
2462 (tmp & UDC_RX_EOT_IE(1)) ? " rx0_eot" : ""); 2486 (tmp & UDC_RX_EOT_IE(1)) ? " rx0_eot" : "");
2463 2487
2464 tmp = UDC_RXDMA_CFG_REG; 2488 tmp = omap_readw(UDC_RXDMA_CFG);
2465 seq_printf(s, "rxdma_cfg %04x\n", tmp); 2489 seq_printf(s, "rxdma_cfg %04x\n", tmp);
2466 if (tmp) { 2490 if (tmp) {
2467 for (i = 0; i < 3; i++) { 2491 for (i = 0; i < 3; i++) {
2468 if ((tmp & (0x0f << (i * 4))) == 0) 2492 if ((tmp & (0x0f << (i * 4))) == 0)
2469 continue; 2493 continue;
2470 seq_printf(s, "rxdma[%d] %04x\n", i, 2494 seq_printf(s, "rxdma[%d] %04x\n", i,
2471 UDC_RXDMA_REG(i + 1)); 2495 omap_readw(UDC_RXDMA(i + 1)));
2472 } 2496 }
2473 } 2497 }
2474 tmp = UDC_TXDMA_CFG_REG; 2498 tmp = omap_readw(UDC_TXDMA_CFG);
2475 seq_printf(s, "txdma_cfg %04x\n", tmp); 2499 seq_printf(s, "txdma_cfg %04x\n", tmp);
2476 if (tmp) { 2500 if (tmp) {
2477 for (i = 0; i < 3; i++) { 2501 for (i = 0; i < 3; i++) {
2478 if (!(tmp & (0x0f << (i * 4)))) 2502 if (!(tmp & (0x0f << (i * 4))))
2479 continue; 2503 continue;
2480 seq_printf(s, "txdma[%d] %04x\n", i, 2504 seq_printf(s, "txdma[%d] %04x\n", i,
2481 UDC_TXDMA_REG(i + 1)); 2505 omap_readw(UDC_TXDMA(i + 1)));
2482 } 2506 }
2483 } 2507 }
2484 } 2508 }
2485 2509
2486 tmp = UDC_DEVSTAT_REG; 2510 tmp = omap_readw(UDC_DEVSTAT);
2487 if (tmp & UDC_ATT) { 2511 if (tmp & UDC_ATT) {
2488 proc_ep_show(s, &udc->ep[0]); 2512 proc_ep_show(s, &udc->ep[0]);
2489 if (tmp & UDC_ADD) { 2513 if (tmp & UDC_ADD) {
@@ -2535,7 +2559,7 @@ static inline void remove_proc_file(void) {}
2535 * buffer space among the endpoints we'll be operating. 2559 * buffer space among the endpoints we'll be operating.
2536 * 2560 *
2537 * NOTE: as of OMAP 1710 ES2.0, writing a new endpoint config when 2561 * NOTE: as of OMAP 1710 ES2.0, writing a new endpoint config when
2538 * UDC_SYSCON_1_REG.CFG_LOCK is set can now work. We won't use that 2562 * UDC_SYSCON_1.CFG_LOCK is set can now work. We won't use that
2539 * capability yet though. 2563 * capability yet though.
2540 */ 2564 */
2541static unsigned __init 2565static unsigned __init
@@ -2597,9 +2621,9 @@ omap_ep_setup(char *name, u8 addr, u8 type,
2597 name, addr, epn_rxtx, maxp, dbuf ? "x2" : "", buf); 2621 name, addr, epn_rxtx, maxp, dbuf ? "x2" : "", buf);
2598 2622
2599 if (addr & USB_DIR_IN) 2623 if (addr & USB_DIR_IN)
2600 UDC_EP_TX_REG(addr & 0xf) = epn_rxtx; 2624 omap_writew(epn_rxtx, UDC_EP_TX(addr & 0xf));
2601 else 2625 else
2602 UDC_EP_RX_REG(addr) = epn_rxtx; 2626 omap_writew(epn_rxtx, UDC_EP_RX(addr));
2603 2627
2604 /* next endpoint's buffer starts after this one's */ 2628 /* next endpoint's buffer starts after this one's */
2605 buf += maxp; 2629 buf += maxp;
@@ -2638,15 +2662,15 @@ omap_udc_setup(struct platform_device *odev, struct otg_transceiver *xceiv)
2638 unsigned tmp, buf; 2662 unsigned tmp, buf;
2639 2663
2640 /* abolish any previous hardware state */ 2664 /* abolish any previous hardware state */
2641 UDC_SYSCON1_REG = 0; 2665 omap_writew(0, UDC_SYSCON1);
2642 UDC_IRQ_EN_REG = 0; 2666 omap_writew(0, UDC_IRQ_EN);
2643 UDC_IRQ_SRC_REG = UDC_IRQ_SRC_MASK; 2667 omap_writew(UDC_IRQ_SRC_MASK, UDC_IRQ_SRC);
2644 UDC_DMA_IRQ_EN_REG = 0; 2668 omap_writew(0, UDC_DMA_IRQ_EN);
2645 UDC_RXDMA_CFG_REG = 0; 2669 omap_writew(0, UDC_RXDMA_CFG);
2646 UDC_TXDMA_CFG_REG = 0; 2670 omap_writew(0, UDC_TXDMA_CFG);
2647 2671
2648 /* UDC_PULLUP_EN gates the chip clock */ 2672 /* UDC_PULLUP_EN gates the chip clock */
2649 // OTG_SYSCON_1_REG |= DEV_IDLE_EN; 2673 // OTG_SYSCON_1 |= DEV_IDLE_EN;
2650 2674
2651 udc = kzalloc(sizeof(*udc), GFP_KERNEL); 2675 udc = kzalloc(sizeof(*udc), GFP_KERNEL);
2652 if (!udc) 2676 if (!udc)
@@ -2677,8 +2701,8 @@ omap_udc_setup(struct platform_device *odev, struct otg_transceiver *xceiv)
2677 2701
2678 /* initially disable all non-ep0 endpoints */ 2702 /* initially disable all non-ep0 endpoints */
2679 for (tmp = 1; tmp < 15; tmp++) { 2703 for (tmp = 1; tmp < 15; tmp++) {
2680 UDC_EP_RX_REG(tmp) = 0; 2704 omap_writew(0, UDC_EP_RX(tmp));
2681 UDC_EP_TX_REG(tmp) = 0; 2705 omap_writew(0, UDC_EP_TX(tmp));
2682 } 2706 }
2683 2707
2684#define OMAP_BULK_EP(name,addr) \ 2708#define OMAP_BULK_EP(name,addr) \
@@ -2763,7 +2787,7 @@ omap_udc_setup(struct platform_device *odev, struct otg_transceiver *xceiv)
2763 ERR("unsupported fifo_mode #%d\n", fifo_mode); 2787 ERR("unsupported fifo_mode #%d\n", fifo_mode);
2764 return -ENODEV; 2788 return -ENODEV;
2765 } 2789 }
2766 UDC_SYSCON1_REG = UDC_CFG_LOCK|UDC_SELF_PWR; 2790 omap_writew(UDC_CFG_LOCK|UDC_SELF_PWR, UDC_SYSCON1);
2767 INFO("fifo mode %d, %d bytes not used\n", fifo_mode, 2048 - buf); 2791 INFO("fifo mode %d, %d bytes not used\n", fifo_mode, 2048 - buf);
2768 return 0; 2792 return 0;
2769} 2793}
@@ -2807,7 +2831,7 @@ static int __init omap_udc_probe(struct platform_device *pdev)
2807 } 2831 }
2808 2832
2809 INFO("OMAP UDC rev %d.%d%s\n", 2833 INFO("OMAP UDC rev %d.%d%s\n",
2810 UDC_REV_REG >> 4, UDC_REV_REG & 0xf, 2834 omap_readw(UDC_REV) >> 4, omap_readw(UDC_REV) & 0xf,
2811 config->otg ? ", Mini-AB" : ""); 2835 config->otg ? ", Mini-AB" : "");
2812 2836
2813 /* use the mode given to us by board init code */ 2837 /* use the mode given to us by board init code */
@@ -2822,12 +2846,12 @@ static int __init omap_udc_probe(struct platform_device *pdev)
2822 * know when to turn PULLUP_EN on/off; and that 2846 * know when to turn PULLUP_EN on/off; and that
2823 * means we always "need" the 48MHz clock. 2847 * means we always "need" the 48MHz clock.
2824 */ 2848 */
2825 u32 tmp = FUNC_MUX_CTRL_0_REG; 2849 u32 tmp = omap_readl(FUNC_MUX_CTRL_0);
2826 2850 tmp &= ~VBUS_CTRL_1510;
2827 FUNC_MUX_CTRL_0_REG &= ~VBUS_CTRL_1510; 2851 omap_writel(tmp, FUNC_MUX_CTRL_0);
2828 tmp |= VBUS_MODE_1510; 2852 tmp |= VBUS_MODE_1510;
2829 tmp &= ~VBUS_CTRL_1510; 2853 tmp &= ~VBUS_CTRL_1510;
2830 FUNC_MUX_CTRL_0_REG = tmp; 2854 omap_writel(tmp, FUNC_MUX_CTRL_0);
2831 } 2855 }
2832 } else { 2856 } else {
2833 /* The transceiver may package some GPIO logic or handle 2857 /* The transceiver may package some GPIO logic or handle
@@ -2907,7 +2931,7 @@ known:
2907#endif 2931#endif
2908 2932
2909 /* starting with omap1710 es2.0, clear toggle is a separate bit */ 2933 /* starting with omap1710 es2.0, clear toggle is a separate bit */
2910 if (UDC_REV_REG >= 0x61) 2934 if (omap_readw(UDC_REV) >= 0x61)
2911 udc->clr_halt = UDC_RESET_EP | UDC_CLRDATA_TOGGLE; 2935 udc->clr_halt = UDC_RESET_EP | UDC_CLRDATA_TOGGLE;
2912 else 2936 else
2913 udc->clr_halt = UDC_RESET_EP; 2937 udc->clr_halt = UDC_RESET_EP;
@@ -3005,7 +3029,7 @@ static int __exit omap_udc_remove(struct platform_device *pdev)
3005 put_device(udc->transceiver->dev); 3029 put_device(udc->transceiver->dev);
3006 udc->transceiver = NULL; 3030 udc->transceiver = NULL;
3007 } 3031 }
3008 UDC_SYSCON1_REG = 0; 3032 omap_writew(0, UDC_SYSCON1);
3009 3033
3010 remove_proc_file(); 3034 remove_proc_file();
3011 3035
@@ -3036,7 +3060,7 @@ static int __exit omap_udc_remove(struct platform_device *pdev)
3036 * 3060 *
3037 * REVISIT we should probably reject suspend requests when there's a host 3061 * REVISIT we should probably reject suspend requests when there's a host
3038 * session active, rather than disconnecting, at least on boards that can 3062 * session active, rather than disconnecting, at least on boards that can
3039 * report VBUS irqs (UDC_DEVSTAT_REG.UDC_ATT). And in any case, we need to 3063 * report VBUS irqs (UDC_DEVSTAT.UDC_ATT). And in any case, we need to
3040 * make host resumes and VBUS detection trigger OMAP wakeup events; that 3064 * make host resumes and VBUS detection trigger OMAP wakeup events; that
3041 * may involve talking to an external transceiver (e.g. isp1301). 3065 * may involve talking to an external transceiver (e.g. isp1301).
3042 */ 3066 */
@@ -3045,7 +3069,7 @@ static int omap_udc_suspend(struct platform_device *dev, pm_message_t message)
3045{ 3069{
3046 u32 devstat; 3070 u32 devstat;
3047 3071
3048 devstat = UDC_DEVSTAT_REG; 3072 devstat = omap_readw(UDC_DEVSTAT);
3049 3073
3050 /* we're requesting 48 MHz clock if the pullup is enabled 3074 /* we're requesting 48 MHz clock if the pullup is enabled
3051 * (== we're attached to the host) and we're not suspended, 3075 * (== we're attached to the host) and we're not suspended,
diff --git a/drivers/usb/gadget/omap_udc.h b/drivers/usb/gadget/omap_udc.h
index c6b9cbc7230a..8522bbb12278 100644
--- a/drivers/usb/gadget/omap_udc.h
+++ b/drivers/usb/gadget/omap_udc.h
@@ -8,23 +8,22 @@
8/* 8/*
9 * USB device/endpoint management registers 9 * USB device/endpoint management registers
10 */ 10 */
11#define UDC_REG(offset) __REG16(UDC_BASE + (offset))
12 11
13#define UDC_REV_REG UDC_REG(0x0) /* Revision */ 12#define UDC_REV (UDC_BASE + 0x0) /* Revision */
14#define UDC_EP_NUM_REG UDC_REG(0x4) /* Which endpoint */ 13#define UDC_EP_NUM (UDC_BASE + 0x4) /* Which endpoint */
15# define UDC_SETUP_SEL (1 << 6) 14# define UDC_SETUP_SEL (1 << 6)
16# define UDC_EP_SEL (1 << 5) 15# define UDC_EP_SEL (1 << 5)
17# define UDC_EP_DIR (1 << 4) 16# define UDC_EP_DIR (1 << 4)
18 /* low 4 bits for endpoint number */ 17 /* low 4 bits for endpoint number */
19#define UDC_DATA_REG UDC_REG(0x08) /* Endpoint FIFO */ 18#define UDC_DATA (UDC_BASE + 0x08) /* Endpoint FIFO */
20#define UDC_CTRL_REG UDC_REG(0x0C) /* Endpoint control */ 19#define UDC_CTRL (UDC_BASE + 0x0C) /* Endpoint control */
21# define UDC_CLR_HALT (1 << 7) 20# define UDC_CLR_HALT (1 << 7)
22# define UDC_SET_HALT (1 << 6) 21# define UDC_SET_HALT (1 << 6)
23# define UDC_CLRDATA_TOGGLE (1 << 3) 22# define UDC_CLRDATA_TOGGLE (1 << 3)
24# define UDC_SET_FIFO_EN (1 << 2) 23# define UDC_SET_FIFO_EN (1 << 2)
25# define UDC_CLR_EP (1 << 1) 24# define UDC_CLR_EP (1 << 1)
26# define UDC_RESET_EP (1 << 0) 25# define UDC_RESET_EP (1 << 0)
27#define UDC_STAT_FLG_REG UDC_REG(0x10) /* Endpoint status */ 26#define UDC_STAT_FLG (UDC_BASE + 0x10) /* Endpoint status */
28# define UDC_NO_RXPACKET (1 << 15) 27# define UDC_NO_RXPACKET (1 << 15)
29# define UDC_MISS_IN (1 << 14) 28# define UDC_MISS_IN (1 << 14)
30# define UDC_DATA_FLUSH (1 << 13) 29# define UDC_DATA_FLUSH (1 << 13)
@@ -38,8 +37,8 @@
38# define UDC_FIFO_EN (1 << 2) 37# define UDC_FIFO_EN (1 << 2)
39# define UDC_NON_ISO_FIFO_EMPTY (1 << 1) 38# define UDC_NON_ISO_FIFO_EMPTY (1 << 1)
40# define UDC_NON_ISO_FIFO_FULL (1 << 0) 39# define UDC_NON_ISO_FIFO_FULL (1 << 0)
41#define UDC_RXFSTAT_REG UDC_REG(0x14) /* OUT bytecount */ 40#define UDC_RXFSTAT (UDC_BASE + 0x14) /* OUT bytecount */
42#define UDC_SYSCON1_REG UDC_REG(0x18) /* System config 1 */ 41#define UDC_SYSCON1 (UDC_BASE + 0x18) /* System config 1 */
43# define UDC_CFG_LOCK (1 << 8) 42# define UDC_CFG_LOCK (1 << 8)
44# define UDC_DATA_ENDIAN (1 << 7) 43# define UDC_DATA_ENDIAN (1 << 7)
45# define UDC_DMA_ENDIAN (1 << 6) 44# define UDC_DMA_ENDIAN (1 << 6)
@@ -48,12 +47,12 @@
48# define UDC_SELF_PWR (1 << 2) 47# define UDC_SELF_PWR (1 << 2)
49# define UDC_SOFF_DIS (1 << 1) 48# define UDC_SOFF_DIS (1 << 1)
50# define UDC_PULLUP_EN (1 << 0) 49# define UDC_PULLUP_EN (1 << 0)
51#define UDC_SYSCON2_REG UDC_REG(0x1C) /* System config 2 */ 50#define UDC_SYSCON2 (UDC_BASE + 0x1C) /* System config 2 */
52# define UDC_RMT_WKP (1 << 6) 51# define UDC_RMT_WKP (1 << 6)
53# define UDC_STALL_CMD (1 << 5) 52# define UDC_STALL_CMD (1 << 5)
54# define UDC_DEV_CFG (1 << 3) 53# define UDC_DEV_CFG (1 << 3)
55# define UDC_CLR_CFG (1 << 2) 54# define UDC_CLR_CFG (1 << 2)
56#define UDC_DEVSTAT_REG UDC_REG(0x20) /* Device status */ 55#define UDC_DEVSTAT (UDC_BASE + 0x20) /* Device status */
57# define UDC_B_HNP_ENABLE (1 << 9) 56# define UDC_B_HNP_ENABLE (1 << 9)
58# define UDC_A_HNP_SUPPORT (1 << 8) 57# define UDC_A_HNP_SUPPORT (1 << 8)
59# define UDC_A_ALT_HNP_SUPPORT (1 << 7) 58# define UDC_A_ALT_HNP_SUPPORT (1 << 7)
@@ -64,26 +63,26 @@
64# define UDC_ADD (1 << 2) 63# define UDC_ADD (1 << 2)
65# define UDC_DEF (1 << 1) 64# define UDC_DEF (1 << 1)
66# define UDC_ATT (1 << 0) 65# define UDC_ATT (1 << 0)
67#define UDC_SOF_REG UDC_REG(0x24) /* Start of frame */ 66#define UDC_SOF (UDC_BASE + 0x24) /* Start of frame */
68# define UDC_FT_LOCK (1 << 12) 67# define UDC_FT_LOCK (1 << 12)
69# define UDC_TS_OK (1 << 11) 68# define UDC_TS_OK (1 << 11)
70# define UDC_TS 0x03ff 69# define UDC_TS 0x03ff
71#define UDC_IRQ_EN_REG UDC_REG(0x28) /* Interrupt enable */ 70#define UDC_IRQ_EN (UDC_BASE + 0x28) /* Interrupt enable */
72# define UDC_SOF_IE (1 << 7) 71# define UDC_SOF_IE (1 << 7)
73# define UDC_EPN_RX_IE (1 << 5) 72# define UDC_EPN_RX_IE (1 << 5)
74# define UDC_EPN_TX_IE (1 << 4) 73# define UDC_EPN_TX_IE (1 << 4)
75# define UDC_DS_CHG_IE (1 << 3) 74# define UDC_DS_CHG_IE (1 << 3)
76# define UDC_EP0_IE (1 << 0) 75# define UDC_EP0_IE (1 << 0)
77#define UDC_DMA_IRQ_EN_REG UDC_REG(0x2C) /* DMA irq enable */ 76#define UDC_DMA_IRQ_EN (UDC_BASE + 0x2C) /* DMA irq enable */
78 /* rx/tx dma channels numbered 1-3 not 0-2 */ 77 /* rx/tx dma channels numbered 1-3 not 0-2 */
79# define UDC_TX_DONE_IE(n) (1 << (4 * (n) - 2)) 78# define UDC_TX_DONE_IE(n) (1 << (4 * (n) - 2))
80# define UDC_RX_CNT_IE(n) (1 << (4 * (n) - 3)) 79# define UDC_RX_CNT_IE(n) (1 << (4 * (n) - 3))
81# define UDC_RX_EOT_IE(n) (1 << (4 * (n) - 4)) 80# define UDC_RX_EOT_IE(n) (1 << (4 * (n) - 4))
82#define UDC_IRQ_SRC_REG UDC_REG(0x30) /* Interrupt source */ 81#define UDC_IRQ_SRC (UDC_BASE + 0x30) /* Interrupt source */
83# define UDC_TXN_DONE (1 << 10) 82# define UDC_TXN_DONE (1 << 10)
84# define UDC_RXN_CNT (1 << 9) 83# define UDC_RXN_CNT (1 << 9)
85# define UDC_RXN_EOT (1 << 8) 84# define UDC_RXN_EOT (1 << 8)
86# define UDC_SOF (1 << 7) 85# define UDC_IRQ_SOF (1 << 7)
87# define UDC_EPN_RX (1 << 5) 86# define UDC_EPN_RX (1 << 5)
88# define UDC_EPN_TX (1 << 4) 87# define UDC_EPN_TX (1 << 4)
89# define UDC_DS_CHG (1 << 3) 88# define UDC_DS_CHG (1 << 3)
@@ -91,41 +90,41 @@
91# define UDC_EP0_RX (1 << 1) 90# define UDC_EP0_RX (1 << 1)
92# define UDC_EP0_TX (1 << 0) 91# define UDC_EP0_TX (1 << 0)
93# define UDC_IRQ_SRC_MASK 0x7bf 92# define UDC_IRQ_SRC_MASK 0x7bf
94#define UDC_EPN_STAT_REG UDC_REG(0x34) /* EP irq status */ 93#define UDC_EPN_STAT (UDC_BASE + 0x34) /* EP irq status */
95#define UDC_DMAN_STAT_REG UDC_REG(0x38) /* DMA irq status */ 94#define UDC_DMAN_STAT (UDC_BASE + 0x38) /* DMA irq status */
96# define UDC_DMA_RX_SB (1 << 12) 95# define UDC_DMA_RX_SB (1 << 12)
97# define UDC_DMA_RX_SRC(x) (((x)>>8) & 0xf) 96# define UDC_DMA_RX_SRC(x) (((x)>>8) & 0xf)
98# define UDC_DMA_TX_SRC(x) (((x)>>0) & 0xf) 97# define UDC_DMA_TX_SRC(x) (((x)>>0) & 0xf)
99 98
100 99
101/* DMA configuration registers: up to three channels in each direction. */ 100/* DMA configuration registers: up to three channels in each direction. */
102#define UDC_RXDMA_CFG_REG UDC_REG(0x40) /* 3 eps for RX DMA */ 101#define UDC_RXDMA_CFG (UDC_BASE + 0x40) /* 3 eps for RX DMA */
103# define UDC_DMA_REQ (1 << 12) 102# define UDC_DMA_REQ (1 << 12)
104#define UDC_TXDMA_CFG_REG UDC_REG(0x44) /* 3 eps for TX DMA */ 103#define UDC_TXDMA_CFG (UDC_BASE + 0x44) /* 3 eps for TX DMA */
105#define UDC_DATA_DMA_REG UDC_REG(0x48) /* rx/tx fifo addr */ 104#define UDC_DATA_DMA (UDC_BASE + 0x48) /* rx/tx fifo addr */
106 105
107/* rx/tx dma control, numbering channels 1-3 not 0-2 */ 106/* rx/tx dma control, numbering channels 1-3 not 0-2 */
108#define UDC_TXDMA_REG(chan) UDC_REG(0x50 - 4 + 4 * (chan)) 107#define UDC_TXDMA(chan) (UDC_BASE + 0x50 - 4 + 4 * (chan))
109# define UDC_TXN_EOT (1 << 15) /* bytes vs packets */ 108# define UDC_TXN_EOT (1 << 15) /* bytes vs packets */
110# define UDC_TXN_START (1 << 14) /* start transfer */ 109# define UDC_TXN_START (1 << 14) /* start transfer */
111# define UDC_TXN_TSC 0x03ff /* units in xfer */ 110# define UDC_TXN_TSC 0x03ff /* units in xfer */
112#define UDC_RXDMA_REG(chan) UDC_REG(0x60 - 4 + 4 * (chan)) 111#define UDC_RXDMA(chan) (UDC_BASE + 0x60 - 4 + 4 * (chan))
113# define UDC_RXN_STOP (1 << 15) /* enable EOT irq */ 112# define UDC_RXN_STOP (1 << 15) /* enable EOT irq */
114# define UDC_RXN_TC 0x00ff /* packets in xfer */ 113# define UDC_RXN_TC 0x00ff /* packets in xfer */
115 114
116 115
117/* 116/*
118 * Endpoint configuration registers (used before CFG_LOCK is set) 117 * Endpoint configuration registers (used before CFG_LOCK is set)
119 * UDC_EP_TX_REG(0) is unused 118 * UDC_EP_TX(0) is unused
120 */ 119 */
121#define UDC_EP_RX_REG(endpoint) UDC_REG(0x80 + (endpoint)*4) 120#define UDC_EP_RX(endpoint) (UDC_BASE + 0x80 + (endpoint)*4)
122# define UDC_EPN_RX_VALID (1 << 15) 121# define UDC_EPN_RX_VALID (1 << 15)
123# define UDC_EPN_RX_DB (1 << 14) 122# define UDC_EPN_RX_DB (1 << 14)
124 /* buffer size in bits 13, 12 */ 123 /* buffer size in bits 13, 12 */
125# define UDC_EPN_RX_ISO (1 << 11) 124# define UDC_EPN_RX_ISO (1 << 11)
126 /* buffer pointer in low 11 bits */ 125 /* buffer pointer in low 11 bits */
127#define UDC_EP_TX_REG(endpoint) UDC_REG(0xc0 + (endpoint)*4) 126#define UDC_EP_TX(endpoint) (UDC_BASE + 0xc0 + (endpoint)*4)
128 /* same bitfields as in RX_REG */ 127 /* same bitfields as in RX */
129 128
130/*-------------------------------------------------------------------------*/ 129/*-------------------------------------------------------------------------*/
131 130
@@ -195,14 +194,14 @@ struct omap_udc {
195 194
196/*-------------------------------------------------------------------------*/ 195/*-------------------------------------------------------------------------*/
197 196
198#define MOD_CONF_CTRL_0_REG __REG32(MOD_CONF_CTRL_0) 197/* MOD_CONF_CTRL_0 */
199#define VBUS_W2FC_1510 (1 << 17) /* 0 gpio0, 1 dvdd2 pin */ 198#define VBUS_W2FC_1510 (1 << 17) /* 0 gpio0, 1 dvdd2 pin */
200 199
201#define FUNC_MUX_CTRL_0_REG __REG32(FUNC_MUX_CTRL_0) 200/* FUNC_MUX_CTRL_0 */
202#define VBUS_CTRL_1510 (1 << 19) /* 1 connected (software) */ 201#define VBUS_CTRL_1510 (1 << 19) /* 1 connected (software) */
203#define VBUS_MODE_1510 (1 << 18) /* 0 hardware, 1 software */ 202#define VBUS_MODE_1510 (1 << 18) /* 0 hardware, 1 software */
204 203
205#define HMC_1510 ((MOD_CONF_CTRL_0_REG >> 1) & 0x3f) 204#define HMC_1510 ((omap_readl(MOD_CONF_CTRL_0) >> 1) & 0x3f)
206#define HMC_1610 (OTG_SYSCON_2_REG & 0x3f) 205#define HMC_1610 (omap_readl(OTG_SYSCON_2) & 0x3f)
207#define HMC (cpu_is_omap15xx() ? HMC_1510 : HMC_1610) 206#define HMC (cpu_is_omap15xx() ? HMC_1510 : HMC_1610)
208 207
diff --git a/drivers/usb/gadget/pxa2xx_udc.c b/drivers/usb/gadget/pxa25x_udc.c
index 08f699b1fc57..031dceb93023 100644
--- a/drivers/usb/gadget/pxa2xx_udc.c
+++ b/drivers/usb/gadget/pxa25x_udc.c
@@ -1,5 +1,4 @@
1/* 1/*
2 * linux/drivers/usb/gadget/pxa2xx_udc.c
3 * Intel PXA25x and IXP4xx on-chip full speed USB device controllers 2 * Intel PXA25x and IXP4xx on-chip full speed USB device controllers
4 * 3 *
5 * Copyright (C) 2002 Intrinsyc, Inc. (Frank Becker) 4 * Copyright (C) 2002 Intrinsyc, Inc. (Frank Becker)
@@ -46,19 +45,25 @@
46#include <linux/err.h> 45#include <linux/err.h>
47#include <linux/seq_file.h> 46#include <linux/seq_file.h>
48#include <linux/debugfs.h> 47#include <linux/debugfs.h>
48#include <linux/io.h>
49 49
50#include <asm/byteorder.h> 50#include <asm/byteorder.h>
51#include <asm/dma.h> 51#include <asm/dma.h>
52#include <asm/gpio.h> 52#include <asm/gpio.h>
53#include <asm/io.h>
54#include <asm/system.h> 53#include <asm/system.h>
55#include <asm/mach-types.h> 54#include <asm/mach-types.h>
56#include <asm/unaligned.h> 55#include <asm/unaligned.h>
57#include <asm/hardware.h>
58 56
59#include <linux/usb/ch9.h> 57#include <linux/usb/ch9.h>
60#include <linux/usb/gadget.h> 58#include <linux/usb/gadget.h>
61 59
60/*
61 * This driver is PXA25x only. Grab the right register definitions.
62 */
63#ifdef CONFIG_ARCH_PXA
64#include <asm/arch/pxa25x-udc.h>
65#endif
66
62#include <asm/mach/udc_pxa2xx.h> 67#include <asm/mach/udc_pxa2xx.h>
63 68
64 69
@@ -91,7 +96,7 @@
91#define DRIVER_DESC "PXA 25x USB Device Controller driver" 96#define DRIVER_DESC "PXA 25x USB Device Controller driver"
92 97
93 98
94static const char driver_name [] = "pxa2xx_udc"; 99static const char driver_name [] = "pxa25x_udc";
95 100
96static const char ep0name [] = "ep0"; 101static const char ep0name [] = "ep0";
97 102
@@ -111,10 +116,10 @@ static const char ep0name [] = "ep0";
111 116
112#endif 117#endif
113 118
114#include "pxa2xx_udc.h" 119#include "pxa25x_udc.h"
115 120
116 121
117#ifdef CONFIG_USB_PXA2XX_SMALL 122#ifdef CONFIG_USB_PXA25X_SMALL
118#define SIZE_STR " (small)" 123#define SIZE_STR " (small)"
119#else 124#else
120#define SIZE_STR "" 125#define SIZE_STR ""
@@ -126,8 +131,8 @@ static const char ep0name [] = "ep0";
126 * --------------------------------------------------------------------------- 131 * ---------------------------------------------------------------------------
127 */ 132 */
128 133
129static void pxa2xx_ep_fifo_flush (struct usb_ep *ep); 134static void pxa25x_ep_fifo_flush (struct usb_ep *ep);
130static void nuke (struct pxa2xx_ep *, int status); 135static void nuke (struct pxa25x_ep *, int status);
131 136
132/* one GPIO should be used to detect VBUS from the host */ 137/* one GPIO should be used to detect VBUS from the host */
133static int is_vbus_present(void) 138static int is_vbus_present(void)
@@ -212,24 +217,24 @@ static inline void udc_ack_int_UDCCR(int mask)
212/* 217/*
213 * endpoint enable/disable 218 * endpoint enable/disable
214 * 219 *
215 * we need to verify the descriptors used to enable endpoints. since pxa2xx 220 * we need to verify the descriptors used to enable endpoints. since pxa25x
216 * endpoint configurations are fixed, and are pretty much always enabled, 221 * endpoint configurations are fixed, and are pretty much always enabled,
217 * there's not a lot to manage here. 222 * there's not a lot to manage here.
218 * 223 *
219 * because pxa2xx can't selectively initialize bulk (or interrupt) endpoints, 224 * because pxa25x can't selectively initialize bulk (or interrupt) endpoints,
220 * (resetting endpoint halt and toggle), SET_INTERFACE is unusable except 225 * (resetting endpoint halt and toggle), SET_INTERFACE is unusable except
221 * for a single interface (with only the default altsetting) and for gadget 226 * for a single interface (with only the default altsetting) and for gadget
222 * drivers that don't halt endpoints (not reset by set_interface). that also 227 * drivers that don't halt endpoints (not reset by set_interface). that also
223 * means that if you use ISO, you must violate the USB spec rule that all 228 * means that if you use ISO, you must violate the USB spec rule that all
224 * iso endpoints must be in non-default altsettings. 229 * iso endpoints must be in non-default altsettings.
225 */ 230 */
226static int pxa2xx_ep_enable (struct usb_ep *_ep, 231static int pxa25x_ep_enable (struct usb_ep *_ep,
227 const struct usb_endpoint_descriptor *desc) 232 const struct usb_endpoint_descriptor *desc)
228{ 233{
229 struct pxa2xx_ep *ep; 234 struct pxa25x_ep *ep;
230 struct pxa2xx_udc *dev; 235 struct pxa25x_udc *dev;
231 236
232 ep = container_of (_ep, struct pxa2xx_ep, ep); 237 ep = container_of (_ep, struct pxa25x_ep, ep);
233 if (!_ep || !desc || ep->desc || _ep->name == ep0name 238 if (!_ep || !desc || ep->desc || _ep->name == ep0name
234 || desc->bDescriptorType != USB_DT_ENDPOINT 239 || desc->bDescriptorType != USB_DT_ENDPOINT
235 || ep->bEndpointAddress != desc->bEndpointAddress 240 || ep->bEndpointAddress != desc->bEndpointAddress
@@ -268,7 +273,7 @@ static int pxa2xx_ep_enable (struct usb_ep *_ep,
268 ep->ep.maxpacket = le16_to_cpu (desc->wMaxPacketSize); 273 ep->ep.maxpacket = le16_to_cpu (desc->wMaxPacketSize);
269 274
270 /* flush fifo (mostly for OUT buffers) */ 275 /* flush fifo (mostly for OUT buffers) */
271 pxa2xx_ep_fifo_flush (_ep); 276 pxa25x_ep_fifo_flush (_ep);
272 277
273 /* ... reset halt state too, if we could ... */ 278 /* ... reset halt state too, if we could ... */
274 279
@@ -276,12 +281,12 @@ static int pxa2xx_ep_enable (struct usb_ep *_ep,
276 return 0; 281 return 0;
277} 282}
278 283
279static int pxa2xx_ep_disable (struct usb_ep *_ep) 284static int pxa25x_ep_disable (struct usb_ep *_ep)
280{ 285{
281 struct pxa2xx_ep *ep; 286 struct pxa25x_ep *ep;
282 unsigned long flags; 287 unsigned long flags;
283 288
284 ep = container_of (_ep, struct pxa2xx_ep, ep); 289 ep = container_of (_ep, struct pxa25x_ep, ep);
285 if (!_ep || !ep->desc) { 290 if (!_ep || !ep->desc) {
286 DMSG("%s, %s not enabled\n", __func__, 291 DMSG("%s, %s not enabled\n", __func__,
287 _ep ? ep->ep.name : NULL); 292 _ep ? ep->ep.name : NULL);
@@ -292,7 +297,7 @@ static int pxa2xx_ep_disable (struct usb_ep *_ep)
292 nuke (ep, -ESHUTDOWN); 297 nuke (ep, -ESHUTDOWN);
293 298
294 /* flush fifo (mostly for IN buffers) */ 299 /* flush fifo (mostly for IN buffers) */
295 pxa2xx_ep_fifo_flush (_ep); 300 pxa25x_ep_fifo_flush (_ep);
296 301
297 ep->desc = NULL; 302 ep->desc = NULL;
298 ep->stopped = 1; 303 ep->stopped = 1;
@@ -304,18 +309,18 @@ static int pxa2xx_ep_disable (struct usb_ep *_ep)
304 309
305/*-------------------------------------------------------------------------*/ 310/*-------------------------------------------------------------------------*/
306 311
307/* for the pxa2xx, these can just wrap kmalloc/kfree. gadget drivers 312/* for the pxa25x, these can just wrap kmalloc/kfree. gadget drivers
308 * must still pass correctly initialized endpoints, since other controller 313 * must still pass correctly initialized endpoints, since other controller
309 * drivers may care about how it's currently set up (dma issues etc). 314 * drivers may care about how it's currently set up (dma issues etc).
310 */ 315 */
311 316
312/* 317/*
313 * pxa2xx_ep_alloc_request - allocate a request data structure 318 * pxa25x_ep_alloc_request - allocate a request data structure
314 */ 319 */
315static struct usb_request * 320static struct usb_request *
316pxa2xx_ep_alloc_request (struct usb_ep *_ep, gfp_t gfp_flags) 321pxa25x_ep_alloc_request (struct usb_ep *_ep, gfp_t gfp_flags)
317{ 322{
318 struct pxa2xx_request *req; 323 struct pxa25x_request *req;
319 324
320 req = kzalloc(sizeof(*req), gfp_flags); 325 req = kzalloc(sizeof(*req), gfp_flags);
321 if (!req) 326 if (!req)
@@ -327,14 +332,14 @@ pxa2xx_ep_alloc_request (struct usb_ep *_ep, gfp_t gfp_flags)
327 332
328 333
329/* 334/*
330 * pxa2xx_ep_free_request - deallocate a request data structure 335 * pxa25x_ep_free_request - deallocate a request data structure
331 */ 336 */
332static void 337static void
333pxa2xx_ep_free_request (struct usb_ep *_ep, struct usb_request *_req) 338pxa25x_ep_free_request (struct usb_ep *_ep, struct usb_request *_req)
334{ 339{
335 struct pxa2xx_request *req; 340 struct pxa25x_request *req;
336 341
337 req = container_of (_req, struct pxa2xx_request, req); 342 req = container_of (_req, struct pxa25x_request, req);
338 WARN_ON (!list_empty (&req->queue)); 343 WARN_ON (!list_empty (&req->queue));
339 kfree(req); 344 kfree(req);
340} 345}
@@ -344,7 +349,7 @@ pxa2xx_ep_free_request (struct usb_ep *_ep, struct usb_request *_req)
344/* 349/*
345 * done - retire a request; caller blocked irqs 350 * done - retire a request; caller blocked irqs
346 */ 351 */
347static void done(struct pxa2xx_ep *ep, struct pxa2xx_request *req, int status) 352static void done(struct pxa25x_ep *ep, struct pxa25x_request *req, int status)
348{ 353{
349 unsigned stopped = ep->stopped; 354 unsigned stopped = ep->stopped;
350 355
@@ -367,13 +372,13 @@ static void done(struct pxa2xx_ep *ep, struct pxa2xx_request *req, int status)
367} 372}
368 373
369 374
370static inline void ep0_idle (struct pxa2xx_udc *dev) 375static inline void ep0_idle (struct pxa25x_udc *dev)
371{ 376{
372 dev->ep0state = EP0_IDLE; 377 dev->ep0state = EP0_IDLE;
373} 378}
374 379
375static int 380static int
376write_packet(volatile u32 *uddr, struct pxa2xx_request *req, unsigned max) 381write_packet(volatile u32 *uddr, struct pxa25x_request *req, unsigned max)
377{ 382{
378 u8 *buf; 383 u8 *buf;
379 unsigned length, count; 384 unsigned length, count;
@@ -398,7 +403,7 @@ write_packet(volatile u32 *uddr, struct pxa2xx_request *req, unsigned max)
398 * caller guarantees at least one packet buffer is ready (or a zlp). 403 * caller guarantees at least one packet buffer is ready (or a zlp).
399 */ 404 */
400static int 405static int
401write_fifo (struct pxa2xx_ep *ep, struct pxa2xx_request *req) 406write_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
402{ 407{
403 unsigned max; 408 unsigned max;
404 409
@@ -455,7 +460,7 @@ write_fifo (struct pxa2xx_ep *ep, struct pxa2xx_request *req)
455 * ep0 data stage. these chips want very simple state transitions. 460 * ep0 data stage. these chips want very simple state transitions.
456 */ 461 */
457static inline 462static inline
458void ep0start(struct pxa2xx_udc *dev, u32 flags, const char *tag) 463void ep0start(struct pxa25x_udc *dev, u32 flags, const char *tag)
459{ 464{
460 UDCCS0 = flags|UDCCS0_SA|UDCCS0_OPR; 465 UDCCS0 = flags|UDCCS0_SA|UDCCS0_OPR;
461 USIR0 = USIR0_IR0; 466 USIR0 = USIR0_IR0;
@@ -465,7 +470,7 @@ void ep0start(struct pxa2xx_udc *dev, u32 flags, const char *tag)
465} 470}
466 471
467static int 472static int
468write_ep0_fifo (struct pxa2xx_ep *ep, struct pxa2xx_request *req) 473write_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
469{ 474{
470 unsigned count; 475 unsigned count;
471 int is_short; 476 int is_short;
@@ -525,7 +530,7 @@ write_ep0_fifo (struct pxa2xx_ep *ep, struct pxa2xx_request *req)
525 * request buffer having filled (and maybe overran till end-of-packet). 530 * request buffer having filled (and maybe overran till end-of-packet).
526 */ 531 */
527static int 532static int
528read_fifo (struct pxa2xx_ep *ep, struct pxa2xx_request *req) 533read_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
529{ 534{
530 for (;;) { 535 for (;;) {
531 u32 udccs; 536 u32 udccs;
@@ -602,7 +607,7 @@ read_fifo (struct pxa2xx_ep *ep, struct pxa2xx_request *req)
602 * protocols do use them. 607 * protocols do use them.
603 */ 608 */
604static int 609static int
605read_ep0_fifo (struct pxa2xx_ep *ep, struct pxa2xx_request *req) 610read_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
606{ 611{
607 u8 *buf, byte; 612 u8 *buf, byte;
608 unsigned bufferspace; 613 unsigned bufferspace;
@@ -641,21 +646,21 @@ read_ep0_fifo (struct pxa2xx_ep *ep, struct pxa2xx_request *req)
641/*-------------------------------------------------------------------------*/ 646/*-------------------------------------------------------------------------*/
642 647
643static int 648static int
644pxa2xx_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags) 649pxa25x_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
645{ 650{
646 struct pxa2xx_request *req; 651 struct pxa25x_request *req;
647 struct pxa2xx_ep *ep; 652 struct pxa25x_ep *ep;
648 struct pxa2xx_udc *dev; 653 struct pxa25x_udc *dev;
649 unsigned long flags; 654 unsigned long flags;
650 655
651 req = container_of(_req, struct pxa2xx_request, req); 656 req = container_of(_req, struct pxa25x_request, req);
652 if (unlikely (!_req || !_req->complete || !_req->buf 657 if (unlikely (!_req || !_req->complete || !_req->buf
653 || !list_empty(&req->queue))) { 658 || !list_empty(&req->queue))) {
654 DMSG("%s, bad params\n", __func__); 659 DMSG("%s, bad params\n", __func__);
655 return -EINVAL; 660 return -EINVAL;
656 } 661 }
657 662
658 ep = container_of(_ep, struct pxa2xx_ep, ep); 663 ep = container_of(_ep, struct pxa25x_ep, ep);
659 if (unlikely (!_ep || (!ep->desc && ep->ep.name != ep0name))) { 664 if (unlikely (!_ep || (!ep->desc && ep->ep.name != ep0name))) {
660 DMSG("%s, bad ep\n", __func__); 665 DMSG("%s, bad ep\n", __func__);
661 return -EINVAL; 666 return -EINVAL;
@@ -751,14 +756,14 @@ pxa2xx_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
751/* 756/*
752 * nuke - dequeue ALL requests 757 * nuke - dequeue ALL requests
753 */ 758 */
754static void nuke(struct pxa2xx_ep *ep, int status) 759static void nuke(struct pxa25x_ep *ep, int status)
755{ 760{
756 struct pxa2xx_request *req; 761 struct pxa25x_request *req;
757 762
758 /* called with irqs blocked */ 763 /* called with irqs blocked */
759 while (!list_empty(&ep->queue)) { 764 while (!list_empty(&ep->queue)) {
760 req = list_entry(ep->queue.next, 765 req = list_entry(ep->queue.next,
761 struct pxa2xx_request, 766 struct pxa25x_request,
762 queue); 767 queue);
763 done(ep, req, status); 768 done(ep, req, status);
764 } 769 }
@@ -768,13 +773,13 @@ static void nuke(struct pxa2xx_ep *ep, int status)
768 773
769 774
770/* dequeue JUST ONE request */ 775/* dequeue JUST ONE request */
771static int pxa2xx_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) 776static int pxa25x_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
772{ 777{
773 struct pxa2xx_ep *ep; 778 struct pxa25x_ep *ep;
774 struct pxa2xx_request *req; 779 struct pxa25x_request *req;
775 unsigned long flags; 780 unsigned long flags;
776 781
777 ep = container_of(_ep, struct pxa2xx_ep, ep); 782 ep = container_of(_ep, struct pxa25x_ep, ep);
778 if (!_ep || ep->ep.name == ep0name) 783 if (!_ep || ep->ep.name == ep0name)
779 return -EINVAL; 784 return -EINVAL;
780 785
@@ -798,12 +803,12 @@ static int pxa2xx_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
798 803
799/*-------------------------------------------------------------------------*/ 804/*-------------------------------------------------------------------------*/
800 805
801static int pxa2xx_ep_set_halt(struct usb_ep *_ep, int value) 806static int pxa25x_ep_set_halt(struct usb_ep *_ep, int value)
802{ 807{
803 struct pxa2xx_ep *ep; 808 struct pxa25x_ep *ep;
804 unsigned long flags; 809 unsigned long flags;
805 810
806 ep = container_of(_ep, struct pxa2xx_ep, ep); 811 ep = container_of(_ep, struct pxa25x_ep, ep);
807 if (unlikely (!_ep 812 if (unlikely (!_ep
808 || (!ep->desc && ep->ep.name != ep0name)) 813 || (!ep->desc && ep->ep.name != ep0name))
809 || ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) { 814 || ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
@@ -853,11 +858,11 @@ static int pxa2xx_ep_set_halt(struct usb_ep *_ep, int value)
853 return 0; 858 return 0;
854} 859}
855 860
856static int pxa2xx_ep_fifo_status(struct usb_ep *_ep) 861static int pxa25x_ep_fifo_status(struct usb_ep *_ep)
857{ 862{
858 struct pxa2xx_ep *ep; 863 struct pxa25x_ep *ep;
859 864
860 ep = container_of(_ep, struct pxa2xx_ep, ep); 865 ep = container_of(_ep, struct pxa25x_ep, ep);
861 if (!_ep) { 866 if (!_ep) {
862 DMSG("%s, bad ep\n", __func__); 867 DMSG("%s, bad ep\n", __func__);
863 return -ENODEV; 868 return -ENODEV;
@@ -872,11 +877,11 @@ static int pxa2xx_ep_fifo_status(struct usb_ep *_ep)
872 return (*ep->reg_ubcr & 0xfff) + 1; 877 return (*ep->reg_ubcr & 0xfff) + 1;
873} 878}
874 879
875static void pxa2xx_ep_fifo_flush(struct usb_ep *_ep) 880static void pxa25x_ep_fifo_flush(struct usb_ep *_ep)
876{ 881{
877 struct pxa2xx_ep *ep; 882 struct pxa25x_ep *ep;
878 883
879 ep = container_of(_ep, struct pxa2xx_ep, ep); 884 ep = container_of(_ep, struct pxa25x_ep, ep);
880 if (!_ep || ep->ep.name == ep0name || !list_empty(&ep->queue)) { 885 if (!_ep || ep->ep.name == ep0name || !list_empty(&ep->queue)) {
881 DMSG("%s, bad ep\n", __func__); 886 DMSG("%s, bad ep\n", __func__);
882 return; 887 return;
@@ -898,19 +903,19 @@ static void pxa2xx_ep_fifo_flush(struct usb_ep *_ep)
898} 903}
899 904
900 905
901static struct usb_ep_ops pxa2xx_ep_ops = { 906static struct usb_ep_ops pxa25x_ep_ops = {
902 .enable = pxa2xx_ep_enable, 907 .enable = pxa25x_ep_enable,
903 .disable = pxa2xx_ep_disable, 908 .disable = pxa25x_ep_disable,
904 909
905 .alloc_request = pxa2xx_ep_alloc_request, 910 .alloc_request = pxa25x_ep_alloc_request,
906 .free_request = pxa2xx_ep_free_request, 911 .free_request = pxa25x_ep_free_request,
907 912
908 .queue = pxa2xx_ep_queue, 913 .queue = pxa25x_ep_queue,
909 .dequeue = pxa2xx_ep_dequeue, 914 .dequeue = pxa25x_ep_dequeue,
910 915
911 .set_halt = pxa2xx_ep_set_halt, 916 .set_halt = pxa25x_ep_set_halt,
912 .fifo_status = pxa2xx_ep_fifo_status, 917 .fifo_status = pxa25x_ep_fifo_status,
913 .fifo_flush = pxa2xx_ep_fifo_flush, 918 .fifo_flush = pxa25x_ep_fifo_flush,
914}; 919};
915 920
916 921
@@ -919,12 +924,12 @@ static struct usb_ep_ops pxa2xx_ep_ops = {
919 * --------------------------------------------------------------------------- 924 * ---------------------------------------------------------------------------
920 */ 925 */
921 926
922static int pxa2xx_udc_get_frame(struct usb_gadget *_gadget) 927static int pxa25x_udc_get_frame(struct usb_gadget *_gadget)
923{ 928{
924 return ((UFNRH & 0x07) << 8) | (UFNRL & 0xff); 929 return ((UFNRH & 0x07) << 8) | (UFNRL & 0xff);
925} 930}
926 931
927static int pxa2xx_udc_wakeup(struct usb_gadget *_gadget) 932static int pxa25x_udc_wakeup(struct usb_gadget *_gadget)
928{ 933{
929 /* host may not have enabled remote wakeup */ 934 /* host may not have enabled remote wakeup */
930 if ((UDCCS0 & UDCCS0_DRWF) == 0) 935 if ((UDCCS0 & UDCCS0_DRWF) == 0)
@@ -933,14 +938,14 @@ static int pxa2xx_udc_wakeup(struct usb_gadget *_gadget)
933 return 0; 938 return 0;
934} 939}
935 940
936static void stop_activity(struct pxa2xx_udc *, struct usb_gadget_driver *); 941static void stop_activity(struct pxa25x_udc *, struct usb_gadget_driver *);
937static void udc_enable (struct pxa2xx_udc *); 942static void udc_enable (struct pxa25x_udc *);
938static void udc_disable(struct pxa2xx_udc *); 943static void udc_disable(struct pxa25x_udc *);
939 944
940/* We disable the UDC -- and its 48 MHz clock -- whenever it's not 945/* We disable the UDC -- and its 48 MHz clock -- whenever it's not
941 * in active use. 946 * in active use.
942 */ 947 */
943static int pullup(struct pxa2xx_udc *udc) 948static int pullup(struct pxa25x_udc *udc)
944{ 949{
945 int is_active = udc->vbus && udc->pullup && !udc->suspended; 950 int is_active = udc->vbus && udc->pullup && !udc->suspended;
946 DMSG("%s\n", is_active ? "active" : "inactive"); 951 DMSG("%s\n", is_active ? "active" : "inactive");
@@ -970,11 +975,11 @@ static int pullup(struct pxa2xx_udc *udc)
970} 975}
971 976
972/* VBUS reporting logically comes from a transceiver */ 977/* VBUS reporting logically comes from a transceiver */
973static int pxa2xx_udc_vbus_session(struct usb_gadget *_gadget, int is_active) 978static int pxa25x_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
974{ 979{
975 struct pxa2xx_udc *udc; 980 struct pxa25x_udc *udc;
976 981
977 udc = container_of(_gadget, struct pxa2xx_udc, gadget); 982 udc = container_of(_gadget, struct pxa25x_udc, gadget);
978 udc->vbus = (is_active != 0); 983 udc->vbus = (is_active != 0);
979 DMSG("vbus %s\n", is_active ? "supplied" : "inactive"); 984 DMSG("vbus %s\n", is_active ? "supplied" : "inactive");
980 pullup(udc); 985 pullup(udc);
@@ -982,11 +987,11 @@ static int pxa2xx_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
982} 987}
983 988
984/* drivers may have software control over D+ pullup */ 989/* drivers may have software control over D+ pullup */
985static int pxa2xx_udc_pullup(struct usb_gadget *_gadget, int is_active) 990static int pxa25x_udc_pullup(struct usb_gadget *_gadget, int is_active)
986{ 991{
987 struct pxa2xx_udc *udc; 992 struct pxa25x_udc *udc;
988 993
989 udc = container_of(_gadget, struct pxa2xx_udc, gadget); 994 udc = container_of(_gadget, struct pxa25x_udc, gadget);
990 995
991 /* not all boards support pullup control */ 996 /* not all boards support pullup control */
992 if (!udc->mach->gpio_pullup && !udc->mach->udc_command) 997 if (!udc->mach->gpio_pullup && !udc->mach->udc_command)
@@ -997,11 +1002,11 @@ static int pxa2xx_udc_pullup(struct usb_gadget *_gadget, int is_active)
997 return 0; 1002 return 0;
998} 1003}
999 1004
1000static const struct usb_gadget_ops pxa2xx_udc_ops = { 1005static const struct usb_gadget_ops pxa25x_udc_ops = {
1001 .get_frame = pxa2xx_udc_get_frame, 1006 .get_frame = pxa25x_udc_get_frame,
1002 .wakeup = pxa2xx_udc_wakeup, 1007 .wakeup = pxa25x_udc_wakeup,
1003 .vbus_session = pxa2xx_udc_vbus_session, 1008 .vbus_session = pxa25x_udc_vbus_session,
1004 .pullup = pxa2xx_udc_pullup, 1009 .pullup = pxa25x_udc_pullup,
1005 1010
1006 // .vbus_draw ... boards may consume current from VBUS, up to 1011 // .vbus_draw ... boards may consume current from VBUS, up to
1007 // 100-500mA based on config. the 500uA suspend ceiling means 1012 // 100-500mA based on config. the 500uA suspend ceiling means
@@ -1015,7 +1020,7 @@ static const struct usb_gadget_ops pxa2xx_udc_ops = {
1015static int 1020static int
1016udc_seq_show(struct seq_file *m, void *_d) 1021udc_seq_show(struct seq_file *m, void *_d)
1017{ 1022{
1018 struct pxa2xx_udc *dev = m->private; 1023 struct pxa25x_udc *dev = m->private;
1019 unsigned long flags; 1024 unsigned long flags;
1020 int i; 1025 int i;
1021 u32 tmp; 1026 u32 tmp;
@@ -1076,8 +1081,8 @@ udc_seq_show(struct seq_file *m, void *_d)
1076 1081
1077 /* dump endpoint queues */ 1082 /* dump endpoint queues */
1078 for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) { 1083 for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1079 struct pxa2xx_ep *ep = &dev->ep [i]; 1084 struct pxa25x_ep *ep = &dev->ep [i];
1080 struct pxa2xx_request *req; 1085 struct pxa25x_request *req;
1081 1086
1082 if (i != 0) { 1087 if (i != 0) {
1083 const struct usb_endpoint_descriptor *desc; 1088 const struct usb_endpoint_descriptor *desc;
@@ -1150,7 +1155,7 @@ static const struct file_operations debug_fops = {
1150/* 1155/*
1151 * udc_disable - disable USB device controller 1156 * udc_disable - disable USB device controller
1152 */ 1157 */
1153static void udc_disable(struct pxa2xx_udc *dev) 1158static void udc_disable(struct pxa25x_udc *dev)
1154{ 1159{
1155 /* block all irqs */ 1160 /* block all irqs */
1156 udc_set_mask_UDCCR(UDCCR_SRM|UDCCR_REM); 1161 udc_set_mask_UDCCR(UDCCR_SRM|UDCCR_REM);
@@ -1170,7 +1175,7 @@ static void udc_disable(struct pxa2xx_udc *dev)
1170/* 1175/*
1171 * udc_reinit - initialize software state 1176 * udc_reinit - initialize software state
1172 */ 1177 */
1173static void udc_reinit(struct pxa2xx_udc *dev) 1178static void udc_reinit(struct pxa25x_udc *dev)
1174{ 1179{
1175 u32 i; 1180 u32 i;
1176 1181
@@ -1181,7 +1186,7 @@ static void udc_reinit(struct pxa2xx_udc *dev)
1181 1186
1182 /* basic endpoint records init */ 1187 /* basic endpoint records init */
1183 for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) { 1188 for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1184 struct pxa2xx_ep *ep = &dev->ep[i]; 1189 struct pxa25x_ep *ep = &dev->ep[i];
1185 1190
1186 if (i != 0) 1191 if (i != 0)
1187 list_add_tail (&ep->ep.ep_list, &dev->gadget.ep_list); 1192 list_add_tail (&ep->ep.ep_list, &dev->gadget.ep_list);
@@ -1198,7 +1203,7 @@ static void udc_reinit(struct pxa2xx_udc *dev)
1198/* until it's enabled, this UDC should be completely invisible 1203/* until it's enabled, this UDC should be completely invisible
1199 * to any USB host. 1204 * to any USB host.
1200 */ 1205 */
1201static void udc_enable (struct pxa2xx_udc *dev) 1206static void udc_enable (struct pxa25x_udc *dev)
1202{ 1207{
1203 udc_clear_mask_UDCCR(UDCCR_UDE); 1208 udc_clear_mask_UDCCR(UDCCR_UDE);
1204 1209
@@ -1254,7 +1259,7 @@ static void udc_enable (struct pxa2xx_udc *dev)
1254 */ 1259 */
1255int usb_gadget_register_driver(struct usb_gadget_driver *driver) 1260int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1256{ 1261{
1257 struct pxa2xx_udc *dev = the_controller; 1262 struct pxa25x_udc *dev = the_controller;
1258 int retval; 1263 int retval;
1259 1264
1260 if (!driver 1265 if (!driver
@@ -1299,7 +1304,7 @@ fail:
1299EXPORT_SYMBOL(usb_gadget_register_driver); 1304EXPORT_SYMBOL(usb_gadget_register_driver);
1300 1305
1301static void 1306static void
1302stop_activity(struct pxa2xx_udc *dev, struct usb_gadget_driver *driver) 1307stop_activity(struct pxa25x_udc *dev, struct usb_gadget_driver *driver)
1303{ 1308{
1304 int i; 1309 int i;
1305 1310
@@ -1310,7 +1315,7 @@ stop_activity(struct pxa2xx_udc *dev, struct usb_gadget_driver *driver)
1310 1315
1311 /* prevent new request submissions, kill any outstanding requests */ 1316 /* prevent new request submissions, kill any outstanding requests */
1312 for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) { 1317 for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1313 struct pxa2xx_ep *ep = &dev->ep[i]; 1318 struct pxa25x_ep *ep = &dev->ep[i];
1314 1319
1315 ep->stopped = 1; 1320 ep->stopped = 1;
1316 nuke(ep, -ESHUTDOWN); 1321 nuke(ep, -ESHUTDOWN);
@@ -1327,7 +1332,7 @@ stop_activity(struct pxa2xx_udc *dev, struct usb_gadget_driver *driver)
1327 1332
1328int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) 1333int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1329{ 1334{
1330 struct pxa2xx_udc *dev = the_controller; 1335 struct pxa25x_udc *dev = the_controller;
1331 1336
1332 if (!dev) 1337 if (!dev)
1333 return -ENODEV; 1338 return -ENODEV;
@@ -1364,7 +1369,7 @@ EXPORT_SYMBOL(usb_gadget_unregister_driver);
1364static irqreturn_t 1369static irqreturn_t
1365lubbock_vbus_irq(int irq, void *_dev) 1370lubbock_vbus_irq(int irq, void *_dev)
1366{ 1371{
1367 struct pxa2xx_udc *dev = _dev; 1372 struct pxa25x_udc *dev = _dev;
1368 int vbus; 1373 int vbus;
1369 1374
1370 dev->stats.irqs++; 1375 dev->stats.irqs++;
@@ -1383,7 +1388,7 @@ lubbock_vbus_irq(int irq, void *_dev)
1383 return IRQ_NONE; 1388 return IRQ_NONE;
1384 } 1389 }
1385 1390
1386 pxa2xx_udc_vbus_session(&dev->gadget, vbus); 1391 pxa25x_udc_vbus_session(&dev->gadget, vbus);
1387 return IRQ_HANDLED; 1392 return IRQ_HANDLED;
1388} 1393}
1389 1394
@@ -1391,20 +1396,20 @@ lubbock_vbus_irq(int irq, void *_dev)
1391 1396
1392static irqreturn_t udc_vbus_irq(int irq, void *_dev) 1397static irqreturn_t udc_vbus_irq(int irq, void *_dev)
1393{ 1398{
1394 struct pxa2xx_udc *dev = _dev; 1399 struct pxa25x_udc *dev = _dev;
1395 int vbus = gpio_get_value(dev->mach->gpio_vbus); 1400 int vbus = gpio_get_value(dev->mach->gpio_vbus);
1396 1401
1397 if (dev->mach->gpio_vbus_inverted) 1402 if (dev->mach->gpio_vbus_inverted)
1398 vbus = !vbus; 1403 vbus = !vbus;
1399 1404
1400 pxa2xx_udc_vbus_session(&dev->gadget, vbus); 1405 pxa25x_udc_vbus_session(&dev->gadget, vbus);
1401 return IRQ_HANDLED; 1406 return IRQ_HANDLED;
1402} 1407}
1403 1408
1404 1409
1405/*-------------------------------------------------------------------------*/ 1410/*-------------------------------------------------------------------------*/
1406 1411
1407static inline void clear_ep_state (struct pxa2xx_udc *dev) 1412static inline void clear_ep_state (struct pxa25x_udc *dev)
1408{ 1413{
1409 unsigned i; 1414 unsigned i;
1410 1415
@@ -1417,7 +1422,7 @@ static inline void clear_ep_state (struct pxa2xx_udc *dev)
1417 1422
1418static void udc_watchdog(unsigned long _dev) 1423static void udc_watchdog(unsigned long _dev)
1419{ 1424{
1420 struct pxa2xx_udc *dev = (void *)_dev; 1425 struct pxa25x_udc *dev = (void *)_dev;
1421 1426
1422 local_irq_disable(); 1427 local_irq_disable();
1423 if (dev->ep0state == EP0_STALL 1428 if (dev->ep0state == EP0_STALL
@@ -1430,11 +1435,11 @@ static void udc_watchdog(unsigned long _dev)
1430 local_irq_enable(); 1435 local_irq_enable();
1431} 1436}
1432 1437
1433static void handle_ep0 (struct pxa2xx_udc *dev) 1438static void handle_ep0 (struct pxa25x_udc *dev)
1434{ 1439{
1435 u32 udccs0 = UDCCS0; 1440 u32 udccs0 = UDCCS0;
1436 struct pxa2xx_ep *ep = &dev->ep [0]; 1441 struct pxa25x_ep *ep = &dev->ep [0];
1437 struct pxa2xx_request *req; 1442 struct pxa25x_request *req;
1438 union { 1443 union {
1439 struct usb_ctrlrequest r; 1444 struct usb_ctrlrequest r;
1440 u8 raw [8]; 1445 u8 raw [8];
@@ -1444,7 +1449,7 @@ static void handle_ep0 (struct pxa2xx_udc *dev)
1444 if (list_empty(&ep->queue)) 1449 if (list_empty(&ep->queue))
1445 req = NULL; 1450 req = NULL;
1446 else 1451 else
1447 req = list_entry(ep->queue.next, struct pxa2xx_request, queue); 1452 req = list_entry(ep->queue.next, struct pxa25x_request, queue);
1448 1453
1449 /* clear stall status */ 1454 /* clear stall status */
1450 if (udccs0 & UDCCS0_SST) { 1455 if (udccs0 & UDCCS0_SST) {
@@ -1654,9 +1659,9 @@ stall:
1654 USIR0 = USIR0_IR0; 1659 USIR0 = USIR0_IR0;
1655} 1660}
1656 1661
1657static void handle_ep(struct pxa2xx_ep *ep) 1662static void handle_ep(struct pxa25x_ep *ep)
1658{ 1663{
1659 struct pxa2xx_request *req; 1664 struct pxa25x_request *req;
1660 int is_in = ep->bEndpointAddress & USB_DIR_IN; 1665 int is_in = ep->bEndpointAddress & USB_DIR_IN;
1661 int completed; 1666 int completed;
1662 u32 udccs, tmp; 1667 u32 udccs, tmp;
@@ -1665,7 +1670,7 @@ static void handle_ep(struct pxa2xx_ep *ep)
1665 completed = 0; 1670 completed = 0;
1666 if (likely (!list_empty(&ep->queue))) 1671 if (likely (!list_empty(&ep->queue)))
1667 req = list_entry(ep->queue.next, 1672 req = list_entry(ep->queue.next,
1668 struct pxa2xx_request, queue); 1673 struct pxa25x_request, queue);
1669 else 1674 else
1670 req = NULL; 1675 req = NULL;
1671 1676
@@ -1702,16 +1707,16 @@ static void handle_ep(struct pxa2xx_ep *ep)
1702} 1707}
1703 1708
1704/* 1709/*
1705 * pxa2xx_udc_irq - interrupt handler 1710 * pxa25x_udc_irq - interrupt handler
1706 * 1711 *
1707 * avoid delays in ep0 processing. the control handshaking isn't always 1712 * avoid delays in ep0 processing. the control handshaking isn't always
1708 * under software control (pxa250c0 and the pxa255 are better), and delays 1713 * under software control (pxa250c0 and the pxa255 are better), and delays
1709 * could cause usb protocol errors. 1714 * could cause usb protocol errors.
1710 */ 1715 */
1711static irqreturn_t 1716static irqreturn_t
1712pxa2xx_udc_irq(int irq, void *_dev) 1717pxa25x_udc_irq(int irq, void *_dev)
1713{ 1718{
1714 struct pxa2xx_udc *dev = _dev; 1719 struct pxa25x_udc *dev = _dev;
1715 int handled; 1720 int handled;
1716 1721
1717 dev->stats.irqs++; 1722 dev->stats.irqs++;
@@ -1820,9 +1825,9 @@ static void nop_release (struct device *dev)
1820 * doing it at run-time) to save code, eliminate fault paths, and 1825 * doing it at run-time) to save code, eliminate fault paths, and
1821 * be more obviously correct. 1826 * be more obviously correct.
1822 */ 1827 */
1823static struct pxa2xx_udc memory = { 1828static struct pxa25x_udc memory = {
1824 .gadget = { 1829 .gadget = {
1825 .ops = &pxa2xx_udc_ops, 1830 .ops = &pxa25x_udc_ops,
1826 .ep0 = &memory.ep[0].ep, 1831 .ep0 = &memory.ep[0].ep,
1827 .name = driver_name, 1832 .name = driver_name,
1828 .dev = { 1833 .dev = {
@@ -1835,7 +1840,7 @@ static struct pxa2xx_udc memory = {
1835 .ep[0] = { 1840 .ep[0] = {
1836 .ep = { 1841 .ep = {
1837 .name = ep0name, 1842 .name = ep0name,
1838 .ops = &pxa2xx_ep_ops, 1843 .ops = &pxa25x_ep_ops,
1839 .maxpacket = EP0_FIFO_SIZE, 1844 .maxpacket = EP0_FIFO_SIZE,
1840 }, 1845 },
1841 .dev = &memory, 1846 .dev = &memory,
@@ -1847,7 +1852,7 @@ static struct pxa2xx_udc memory = {
1847 .ep[1] = { 1852 .ep[1] = {
1848 .ep = { 1853 .ep = {
1849 .name = "ep1in-bulk", 1854 .name = "ep1in-bulk",
1850 .ops = &pxa2xx_ep_ops, 1855 .ops = &pxa25x_ep_ops,
1851 .maxpacket = BULK_FIFO_SIZE, 1856 .maxpacket = BULK_FIFO_SIZE,
1852 }, 1857 },
1853 .dev = &memory, 1858 .dev = &memory,
@@ -1860,7 +1865,7 @@ static struct pxa2xx_udc memory = {
1860 .ep[2] = { 1865 .ep[2] = {
1861 .ep = { 1866 .ep = {
1862 .name = "ep2out-bulk", 1867 .name = "ep2out-bulk",
1863 .ops = &pxa2xx_ep_ops, 1868 .ops = &pxa25x_ep_ops,
1864 .maxpacket = BULK_FIFO_SIZE, 1869 .maxpacket = BULK_FIFO_SIZE,
1865 }, 1870 },
1866 .dev = &memory, 1871 .dev = &memory,
@@ -1871,11 +1876,11 @@ static struct pxa2xx_udc memory = {
1871 .reg_ubcr = &UBCR2, 1876 .reg_ubcr = &UBCR2,
1872 .reg_uddr = &UDDR2, 1877 .reg_uddr = &UDDR2,
1873 }, 1878 },
1874#ifndef CONFIG_USB_PXA2XX_SMALL 1879#ifndef CONFIG_USB_PXA25X_SMALL
1875 .ep[3] = { 1880 .ep[3] = {
1876 .ep = { 1881 .ep = {
1877 .name = "ep3in-iso", 1882 .name = "ep3in-iso",
1878 .ops = &pxa2xx_ep_ops, 1883 .ops = &pxa25x_ep_ops,
1879 .maxpacket = ISO_FIFO_SIZE, 1884 .maxpacket = ISO_FIFO_SIZE,
1880 }, 1885 },
1881 .dev = &memory, 1886 .dev = &memory,
@@ -1888,7 +1893,7 @@ static struct pxa2xx_udc memory = {
1888 .ep[4] = { 1893 .ep[4] = {
1889 .ep = { 1894 .ep = {
1890 .name = "ep4out-iso", 1895 .name = "ep4out-iso",
1891 .ops = &pxa2xx_ep_ops, 1896 .ops = &pxa25x_ep_ops,
1892 .maxpacket = ISO_FIFO_SIZE, 1897 .maxpacket = ISO_FIFO_SIZE,
1893 }, 1898 },
1894 .dev = &memory, 1899 .dev = &memory,
@@ -1902,7 +1907,7 @@ static struct pxa2xx_udc memory = {
1902 .ep[5] = { 1907 .ep[5] = {
1903 .ep = { 1908 .ep = {
1904 .name = "ep5in-int", 1909 .name = "ep5in-int",
1905 .ops = &pxa2xx_ep_ops, 1910 .ops = &pxa25x_ep_ops,
1906 .maxpacket = INT_FIFO_SIZE, 1911 .maxpacket = INT_FIFO_SIZE,
1907 }, 1912 },
1908 .dev = &memory, 1913 .dev = &memory,
@@ -1917,7 +1922,7 @@ static struct pxa2xx_udc memory = {
1917 .ep[6] = { 1922 .ep[6] = {
1918 .ep = { 1923 .ep = {
1919 .name = "ep6in-bulk", 1924 .name = "ep6in-bulk",
1920 .ops = &pxa2xx_ep_ops, 1925 .ops = &pxa25x_ep_ops,
1921 .maxpacket = BULK_FIFO_SIZE, 1926 .maxpacket = BULK_FIFO_SIZE,
1922 }, 1927 },
1923 .dev = &memory, 1928 .dev = &memory,
@@ -1930,7 +1935,7 @@ static struct pxa2xx_udc memory = {
1930 .ep[7] = { 1935 .ep[7] = {
1931 .ep = { 1936 .ep = {
1932 .name = "ep7out-bulk", 1937 .name = "ep7out-bulk",
1933 .ops = &pxa2xx_ep_ops, 1938 .ops = &pxa25x_ep_ops,
1934 .maxpacket = BULK_FIFO_SIZE, 1939 .maxpacket = BULK_FIFO_SIZE,
1935 }, 1940 },
1936 .dev = &memory, 1941 .dev = &memory,
@@ -1944,7 +1949,7 @@ static struct pxa2xx_udc memory = {
1944 .ep[8] = { 1949 .ep[8] = {
1945 .ep = { 1950 .ep = {
1946 .name = "ep8in-iso", 1951 .name = "ep8in-iso",
1947 .ops = &pxa2xx_ep_ops, 1952 .ops = &pxa25x_ep_ops,
1948 .maxpacket = ISO_FIFO_SIZE, 1953 .maxpacket = ISO_FIFO_SIZE,
1949 }, 1954 },
1950 .dev = &memory, 1955 .dev = &memory,
@@ -1957,7 +1962,7 @@ static struct pxa2xx_udc memory = {
1957 .ep[9] = { 1962 .ep[9] = {
1958 .ep = { 1963 .ep = {
1959 .name = "ep9out-iso", 1964 .name = "ep9out-iso",
1960 .ops = &pxa2xx_ep_ops, 1965 .ops = &pxa25x_ep_ops,
1961 .maxpacket = ISO_FIFO_SIZE, 1966 .maxpacket = ISO_FIFO_SIZE,
1962 }, 1967 },
1963 .dev = &memory, 1968 .dev = &memory,
@@ -1971,7 +1976,7 @@ static struct pxa2xx_udc memory = {
1971 .ep[10] = { 1976 .ep[10] = {
1972 .ep = { 1977 .ep = {
1973 .name = "ep10in-int", 1978 .name = "ep10in-int",
1974 .ops = &pxa2xx_ep_ops, 1979 .ops = &pxa25x_ep_ops,
1975 .maxpacket = INT_FIFO_SIZE, 1980 .maxpacket = INT_FIFO_SIZE,
1976 }, 1981 },
1977 .dev = &memory, 1982 .dev = &memory,
@@ -1986,7 +1991,7 @@ static struct pxa2xx_udc memory = {
1986 .ep[11] = { 1991 .ep[11] = {
1987 .ep = { 1992 .ep = {
1988 .name = "ep11in-bulk", 1993 .name = "ep11in-bulk",
1989 .ops = &pxa2xx_ep_ops, 1994 .ops = &pxa25x_ep_ops,
1990 .maxpacket = BULK_FIFO_SIZE, 1995 .maxpacket = BULK_FIFO_SIZE,
1991 }, 1996 },
1992 .dev = &memory, 1997 .dev = &memory,
@@ -1999,7 +2004,7 @@ static struct pxa2xx_udc memory = {
1999 .ep[12] = { 2004 .ep[12] = {
2000 .ep = { 2005 .ep = {
2001 .name = "ep12out-bulk", 2006 .name = "ep12out-bulk",
2002 .ops = &pxa2xx_ep_ops, 2007 .ops = &pxa25x_ep_ops,
2003 .maxpacket = BULK_FIFO_SIZE, 2008 .maxpacket = BULK_FIFO_SIZE,
2004 }, 2009 },
2005 .dev = &memory, 2010 .dev = &memory,
@@ -2013,7 +2018,7 @@ static struct pxa2xx_udc memory = {
2013 .ep[13] = { 2018 .ep[13] = {
2014 .ep = { 2019 .ep = {
2015 .name = "ep13in-iso", 2020 .name = "ep13in-iso",
2016 .ops = &pxa2xx_ep_ops, 2021 .ops = &pxa25x_ep_ops,
2017 .maxpacket = ISO_FIFO_SIZE, 2022 .maxpacket = ISO_FIFO_SIZE,
2018 }, 2023 },
2019 .dev = &memory, 2024 .dev = &memory,
@@ -2026,7 +2031,7 @@ static struct pxa2xx_udc memory = {
2026 .ep[14] = { 2031 .ep[14] = {
2027 .ep = { 2032 .ep = {
2028 .name = "ep14out-iso", 2033 .name = "ep14out-iso",
2029 .ops = &pxa2xx_ep_ops, 2034 .ops = &pxa25x_ep_ops,
2030 .maxpacket = ISO_FIFO_SIZE, 2035 .maxpacket = ISO_FIFO_SIZE,
2031 }, 2036 },
2032 .dev = &memory, 2037 .dev = &memory,
@@ -2040,7 +2045,7 @@ static struct pxa2xx_udc memory = {
2040 .ep[15] = { 2045 .ep[15] = {
2041 .ep = { 2046 .ep = {
2042 .name = "ep15in-int", 2047 .name = "ep15in-int",
2043 .ops = &pxa2xx_ep_ops, 2048 .ops = &pxa25x_ep_ops,
2044 .maxpacket = INT_FIFO_SIZE, 2049 .maxpacket = INT_FIFO_SIZE,
2045 }, 2050 },
2046 .dev = &memory, 2051 .dev = &memory,
@@ -2050,7 +2055,7 @@ static struct pxa2xx_udc memory = {
2050 .reg_udccs = &UDCCS15, 2055 .reg_udccs = &UDCCS15,
2051 .reg_uddr = &UDDR15, 2056 .reg_uddr = &UDDR15,
2052 }, 2057 },
2053#endif /* !CONFIG_USB_PXA2XX_SMALL */ 2058#endif /* !CONFIG_USB_PXA25X_SMALL */
2054}; 2059};
2055 2060
2056#define CP15R0_VENDOR_MASK 0xffffe000 2061#define CP15R0_VENDOR_MASK 0xffffe000
@@ -2090,9 +2095,9 @@ static struct pxa2xx_udc memory = {
2090/* 2095/*
2091 * probe - binds to the platform device 2096 * probe - binds to the platform device
2092 */ 2097 */
2093static int __init pxa2xx_udc_probe(struct platform_device *pdev) 2098static int __init pxa25x_udc_probe(struct platform_device *pdev)
2094{ 2099{
2095 struct pxa2xx_udc *dev = &memory; 2100 struct pxa25x_udc *dev = &memory;
2096 int retval, vbus_irq, irq; 2101 int retval, vbus_irq, irq;
2097 u32 chiprev; 2102 u32 chiprev;
2098 2103
@@ -2155,7 +2160,7 @@ static int __init pxa2xx_udc_probe(struct platform_device *pdev)
2155 2160
2156 if (dev->mach->gpio_vbus) { 2161 if (dev->mach->gpio_vbus) {
2157 if ((retval = gpio_request(dev->mach->gpio_vbus, 2162 if ((retval = gpio_request(dev->mach->gpio_vbus,
2158 "pxa2xx_udc GPIO VBUS"))) { 2163 "pxa25x_udc GPIO VBUS"))) {
2159 dev_dbg(&pdev->dev, 2164 dev_dbg(&pdev->dev,
2160 "can't get vbus gpio %d, err: %d\n", 2165 "can't get vbus gpio %d, err: %d\n",
2161 dev->mach->gpio_vbus, retval); 2166 dev->mach->gpio_vbus, retval);
@@ -2168,7 +2173,7 @@ static int __init pxa2xx_udc_probe(struct platform_device *pdev)
2168 2173
2169 if (dev->mach->gpio_pullup) { 2174 if (dev->mach->gpio_pullup) {
2170 if ((retval = gpio_request(dev->mach->gpio_pullup, 2175 if ((retval = gpio_request(dev->mach->gpio_pullup,
2171 "pca2xx_udc GPIO PULLUP"))) { 2176 "pca25x_udc GPIO PULLUP"))) {
2172 dev_dbg(&pdev->dev, 2177 dev_dbg(&pdev->dev,
2173 "can't get pullup gpio %d, err: %d\n", 2178 "can't get pullup gpio %d, err: %d\n",
2174 dev->mach->gpio_pullup, retval); 2179 dev->mach->gpio_pullup, retval);
@@ -2194,7 +2199,7 @@ static int __init pxa2xx_udc_probe(struct platform_device *pdev)
2194 dev->vbus = is_vbus_present(); 2199 dev->vbus = is_vbus_present();
2195 2200
2196 /* irq setup after old hardware state is cleaned up */ 2201 /* irq setup after old hardware state is cleaned up */
2197 retval = request_irq(irq, pxa2xx_udc_irq, 2202 retval = request_irq(irq, pxa25x_udc_irq,
2198 IRQF_DISABLED, driver_name, dev); 2203 IRQF_DISABLED, driver_name, dev);
2199 if (retval != 0) { 2204 if (retval != 0) {
2200 pr_err("%s: can't get irq %d, err %d\n", 2205 pr_err("%s: can't get irq %d, err %d\n",
@@ -2260,14 +2265,14 @@ lubbock_fail0:
2260 return retval; 2265 return retval;
2261} 2266}
2262 2267
2263static void pxa2xx_udc_shutdown(struct platform_device *_dev) 2268static void pxa25x_udc_shutdown(struct platform_device *_dev)
2264{ 2269{
2265 pullup_off(); 2270 pullup_off();
2266} 2271}
2267 2272
2268static int __exit pxa2xx_udc_remove(struct platform_device *pdev) 2273static int __exit pxa25x_udc_remove(struct platform_device *pdev)
2269{ 2274{
2270 struct pxa2xx_udc *dev = platform_get_drvdata(pdev); 2275 struct pxa25x_udc *dev = platform_get_drvdata(pdev);
2271 2276
2272 if (dev->driver) 2277 if (dev->driver)
2273 return -EBUSY; 2278 return -EBUSY;
@@ -2317,9 +2322,9 @@ static int __exit pxa2xx_udc_remove(struct platform_device *pdev)
2317 * VBUS IRQs should probably be ignored so that the PXA device just acts 2322 * VBUS IRQs should probably be ignored so that the PXA device just acts
2318 * "dead" to USB hosts until system resume. 2323 * "dead" to USB hosts until system resume.
2319 */ 2324 */
2320static int pxa2xx_udc_suspend(struct platform_device *dev, pm_message_t state) 2325static int pxa25x_udc_suspend(struct platform_device *dev, pm_message_t state)
2321{ 2326{
2322 struct pxa2xx_udc *udc = platform_get_drvdata(dev); 2327 struct pxa25x_udc *udc = platform_get_drvdata(dev);
2323 unsigned long flags; 2328 unsigned long flags;
2324 2329
2325 if (!udc->mach->gpio_pullup && !udc->mach->udc_command) 2330 if (!udc->mach->gpio_pullup && !udc->mach->udc_command)
@@ -2333,9 +2338,9 @@ static int pxa2xx_udc_suspend(struct platform_device *dev, pm_message_t state)
2333 return 0; 2338 return 0;
2334} 2339}
2335 2340
2336static int pxa2xx_udc_resume(struct platform_device *dev) 2341static int pxa25x_udc_resume(struct platform_device *dev)
2337{ 2342{
2338 struct pxa2xx_udc *udc = platform_get_drvdata(dev); 2343 struct pxa25x_udc *udc = platform_get_drvdata(dev);
2339 unsigned long flags; 2344 unsigned long flags;
2340 2345
2341 udc->suspended = 0; 2346 udc->suspended = 0;
@@ -2347,27 +2352,27 @@ static int pxa2xx_udc_resume(struct platform_device *dev)
2347} 2352}
2348 2353
2349#else 2354#else
2350#define pxa2xx_udc_suspend NULL 2355#define pxa25x_udc_suspend NULL
2351#define pxa2xx_udc_resume NULL 2356#define pxa25x_udc_resume NULL
2352#endif 2357#endif
2353 2358
2354/*-------------------------------------------------------------------------*/ 2359/*-------------------------------------------------------------------------*/
2355 2360
2356static struct platform_driver udc_driver = { 2361static struct platform_driver udc_driver = {
2357 .shutdown = pxa2xx_udc_shutdown, 2362 .shutdown = pxa25x_udc_shutdown,
2358 .remove = __exit_p(pxa2xx_udc_remove), 2363 .remove = __exit_p(pxa25x_udc_remove),
2359 .suspend = pxa2xx_udc_suspend, 2364 .suspend = pxa25x_udc_suspend,
2360 .resume = pxa2xx_udc_resume, 2365 .resume = pxa25x_udc_resume,
2361 .driver = { 2366 .driver = {
2362 .owner = THIS_MODULE, 2367 .owner = THIS_MODULE,
2363 .name = "pxa2xx-udc", 2368 .name = "pxa25x-udc",
2364 }, 2369 },
2365}; 2370};
2366 2371
2367static int __init udc_init(void) 2372static int __init udc_init(void)
2368{ 2373{
2369 pr_info("%s: version %s\n", driver_name, DRIVER_VERSION); 2374 pr_info("%s: version %s\n", driver_name, DRIVER_VERSION);
2370 return platform_driver_probe(&udc_driver, pxa2xx_udc_probe); 2375 return platform_driver_probe(&udc_driver, pxa25x_udc_probe);
2371} 2376}
2372module_init(udc_init); 2377module_init(udc_init);
2373 2378
@@ -2380,4 +2385,4 @@ module_exit(udc_exit);
2380MODULE_DESCRIPTION(DRIVER_DESC); 2385MODULE_DESCRIPTION(DRIVER_DESC);
2381MODULE_AUTHOR("Frank Becker, Robert Schwebel, David Brownell"); 2386MODULE_AUTHOR("Frank Becker, Robert Schwebel, David Brownell");
2382MODULE_LICENSE("GPL"); 2387MODULE_LICENSE("GPL");
2383MODULE_ALIAS("platform:pxa2xx-udc"); 2388MODULE_ALIAS("platform:pxa25x-udc");
diff --git a/drivers/usb/gadget/pxa2xx_udc.h b/drivers/usb/gadget/pxa25x_udc.h
index e2c19e88c875..4d11ece7c95f 100644
--- a/drivers/usb/gadget/pxa2xx_udc.h
+++ b/drivers/usb/gadget/pxa25x_udc.h
@@ -1,6 +1,5 @@
1/* 1/*
2 * linux/drivers/usb/gadget/pxa2xx_udc.h 2 * Intel PXA25x on-chip full speed USB device controller
3 * Intel PXA2xx on-chip full speed USB device controller
4 * 3 *
5 * Copyright (C) 2003 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix 4 * Copyright (C) 2003 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
6 * Copyright (C) 2003 David Brownell 5 * Copyright (C) 2003 David Brownell
@@ -21,14 +20,14 @@
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 */ 21 */
23 22
24#ifndef __LINUX_USB_GADGET_PXA2XX_H 23#ifndef __LINUX_USB_GADGET_PXA25X_H
25#define __LINUX_USB_GADGET_PXA2XX_H 24#define __LINUX_USB_GADGET_PXA25X_H
26 25
27#include <linux/types.h> 26#include <linux/types.h>
28 27
29/*-------------------------------------------------------------------------*/ 28/*-------------------------------------------------------------------------*/
30 29
31/* pxa2xx has this (move to include/asm-arm/arch-pxa/pxa-regs.h) */ 30/* pxa25x has this (move to include/asm-arm/arch-pxa/pxa-regs.h) */
32#define UFNRH_SIR (1 << 7) /* SOF interrupt request */ 31#define UFNRH_SIR (1 << 7) /* SOF interrupt request */
33#define UFNRH_SIM (1 << 6) /* SOF interrupt mask */ 32#define UFNRH_SIM (1 << 6) /* SOF interrupt mask */
34#define UFNRH_IPE14 (1 << 5) /* ISO packet error, ep14 */ 33#define UFNRH_IPE14 (1 << 5) /* ISO packet error, ep14 */
@@ -45,11 +44,11 @@
45 44
46/*-------------------------------------------------------------------------*/ 45/*-------------------------------------------------------------------------*/
47 46
48struct pxa2xx_udc; 47struct pxa25x_udc;
49 48
50struct pxa2xx_ep { 49struct pxa25x_ep {
51 struct usb_ep ep; 50 struct usb_ep ep;
52 struct pxa2xx_udc *dev; 51 struct pxa25x_udc *dev;
53 52
54 const struct usb_endpoint_descriptor *desc; 53 const struct usb_endpoint_descriptor *desc;
55 struct list_head queue; 54 struct list_head queue;
@@ -72,7 +71,7 @@ struct pxa2xx_ep {
72 volatile u32 *reg_uddr; 71 volatile u32 *reg_uddr;
73}; 72};
74 73
75struct pxa2xx_request { 74struct pxa25x_request {
76 struct usb_request req; 75 struct usb_request req;
77 struct list_head queue; 76 struct list_head queue;
78}; 77};
@@ -98,7 +97,7 @@ struct udc_stats {
98 unsigned long irqs; 97 unsigned long irqs;
99}; 98};
100 99
101#ifdef CONFIG_USB_PXA2XX_SMALL 100#ifdef CONFIG_USB_PXA25X_SMALL
102/* when memory's tight, SMALL config saves code+data. */ 101/* when memory's tight, SMALL config saves code+data. */
103#define PXA_UDC_NUM_ENDPOINTS 3 102#define PXA_UDC_NUM_ENDPOINTS 3
104#endif 103#endif
@@ -107,7 +106,7 @@ struct udc_stats {
107#define PXA_UDC_NUM_ENDPOINTS 16 106#define PXA_UDC_NUM_ENDPOINTS 16
108#endif 107#endif
109 108
110struct pxa2xx_udc { 109struct pxa25x_udc {
111 struct usb_gadget gadget; 110 struct usb_gadget gadget;
112 struct usb_gadget_driver *driver; 111 struct usb_gadget_driver *driver;
113 112
@@ -130,7 +129,7 @@ struct pxa2xx_udc {
130 struct clk *clk; 129 struct clk *clk;
131 struct pxa2xx_udc_mach_info *mach; 130 struct pxa2xx_udc_mach_info *mach;
132 u64 dma_mask; 131 u64 dma_mask;
133 struct pxa2xx_ep ep [PXA_UDC_NUM_ENDPOINTS]; 132 struct pxa25x_ep ep [PXA_UDC_NUM_ENDPOINTS];
134 133
135#ifdef CONFIG_USB_GADGET_DEBUG_FS 134#ifdef CONFIG_USB_GADGET_DEBUG_FS
136 struct dentry *debugfs_udc; 135 struct dentry *debugfs_udc;
@@ -144,7 +143,7 @@ struct pxa2xx_udc {
144/* lubbock can also report usb connect/disconnect irqs */ 143/* lubbock can also report usb connect/disconnect irqs */
145#endif 144#endif
146 145
147static struct pxa2xx_udc *the_controller; 146static struct pxa25x_udc *the_controller;
148 147
149/*-------------------------------------------------------------------------*/ 148/*-------------------------------------------------------------------------*/
150 149
@@ -209,7 +208,7 @@ dump_udccs0(const char *label)
209} 208}
210 209
211static void __maybe_unused 210static void __maybe_unused
212dump_state(struct pxa2xx_udc *dev) 211dump_state(struct pxa25x_udc *dev)
213{ 212{
214 u32 tmp; 213 u32 tmp;
215 unsigned i; 214 unsigned i;
@@ -264,4 +263,4 @@ dump_state(struct pxa2xx_udc *dev)
264#define INFO(stuff...) pr_info("udc: " stuff) 263#define INFO(stuff...) pr_info("udc: " stuff)
265 264
266 265
267#endif /* __LINUX_USB_GADGET_PXA2XX_H */ 266#endif /* __LINUX_USB_GADGET_PXA25X_H */
diff --git a/drivers/usb/gadget/pxa27x_udc.c b/drivers/usb/gadget/pxa27x_udc.c
index e02bfd4df3a6..9c0e82ec5c43 100644
--- a/drivers/usb/gadget/pxa27x_udc.c
+++ b/drivers/usb/gadget/pxa27x_udc.c
@@ -38,7 +38,7 @@
38#include <linux/usb.h> 38#include <linux/usb.h>
39#include <linux/usb/ch9.h> 39#include <linux/usb/ch9.h>
40#include <linux/usb/gadget.h> 40#include <linux/usb/gadget.h>
41 41#include <asm/arch/pxa2xx-regs.h> /* FIXME: for PSSR */
42#include <asm/arch/udc.h> 42#include <asm/arch/udc.h>
43 43
44#include "pxa27x_udc.h" 44#include "pxa27x_udc.h"
@@ -2360,18 +2360,19 @@ static int pxa_udc_resume(struct platform_device *_dev)
2360 * Software must configure the USB OTG pad, UDC, and UHC 2360 * Software must configure the USB OTG pad, UDC, and UHC
2361 * to the state they were in before entering sleep mode. 2361 * to the state they were in before entering sleep mode.
2362 */ 2362 */
2363 PSSR |= PSSR_OTGPH; 2363 if (cpu_is_pxa27x())
2364 PSSR |= PSSR_OTGPH;
2364 2365
2365 return 0; 2366 return 0;
2366} 2367}
2367#endif 2368#endif
2368 2369
2369/* work with hotplug and coldplug */ 2370/* work with hotplug and coldplug */
2370MODULE_ALIAS("platform:pxa2xx-udc"); 2371MODULE_ALIAS("platform:pxa27x-udc");
2371 2372
2372static struct platform_driver udc_driver = { 2373static struct platform_driver udc_driver = {
2373 .driver = { 2374 .driver = {
2374 .name = "pxa2xx-udc", 2375 .name = "pxa27x-udc",
2375 .owner = THIS_MODULE, 2376 .owner = THIS_MODULE,
2376 }, 2377 },
2377 .remove = __exit_p(pxa_udc_remove), 2378 .remove = __exit_p(pxa_udc_remove),
diff --git a/drivers/usb/gadget/pxa27x_udc.h b/drivers/usb/gadget/pxa27x_udc.h
index 97453db924ff..1d1b7936ee11 100644
--- a/drivers/usb/gadget/pxa27x_udc.h
+++ b/drivers/usb/gadget/pxa27x_udc.h
@@ -484,12 +484,4 @@ static inline struct pxa_udc *to_gadget_udc(struct usb_gadget *gadget)
484#define ep_warn(ep, fmt, arg...) \ 484#define ep_warn(ep, fmt, arg...) \
485 dev_warn(ep->dev->dev, "%s:%s:" fmt, EPNAME(ep), __func__, ## arg) 485 dev_warn(ep->dev->dev, "%s:%s:" fmt, EPNAME(ep), __func__, ## arg)
486 486
487/*
488 * Cannot include pxa-regs.h, as register names are similar.
489 * So PSSR is redefined here. This should be removed once UDC registers will
490 * be gone from pxa-regs.h.
491 */
492#define PSSR __REG(0x40F00004) /* Power Manager Sleep Status */
493#define PSSR_OTGPH (1 << 6) /* OTG Peripheral Hold */
494
495#endif /* __LINUX_USB_GADGET_PXA27X_H */ 487#endif /* __LINUX_USB_GADGET_PXA27X_H */
diff --git a/drivers/usb/host/ohci-omap.c b/drivers/usb/host/ohci-omap.c
index 3a7c24c03671..a19a4f80a6e1 100644
--- a/drivers/usb/host/ohci-omap.c
+++ b/drivers/usb/host/ohci-omap.c
@@ -169,13 +169,16 @@ static void start_hnp(struct ohci_hcd *ohci)
169{ 169{
170 const unsigned port = ohci_to_hcd(ohci)->self.otg_port - 1; 170 const unsigned port = ohci_to_hcd(ohci)->self.otg_port - 1;
171 unsigned long flags; 171 unsigned long flags;
172 u32 l;
172 173
173 otg_start_hnp(ohci->transceiver); 174 otg_start_hnp(ohci->transceiver);
174 175
175 local_irq_save(flags); 176 local_irq_save(flags);
176 ohci->transceiver->state = OTG_STATE_A_SUSPEND; 177 ohci->transceiver->state = OTG_STATE_A_SUSPEND;
177 writel (RH_PS_PSS, &ohci->regs->roothub.portstatus [port]); 178 writel (RH_PS_PSS, &ohci->regs->roothub.portstatus [port]);
178 OTG_CTRL_REG &= ~OTG_A_BUSREQ; 179 l = omap_readl(OTG_CTRL);
180 l &= ~OTG_A_BUSREQ;
181 omap_writel(l, OTG_CTRL);
179 local_irq_restore(flags); 182 local_irq_restore(flags);
180} 183}
181 184
diff --git a/drivers/usb/host/ohci-pxa27x.c b/drivers/usb/host/ohci-pxa27x.c
index d4ee27d92be8..127b15799024 100644
--- a/drivers/usb/host/ohci-pxa27x.c
+++ b/drivers/usb/host/ohci-pxa27x.c
@@ -27,6 +27,7 @@
27#include <asm/mach-types.h> 27#include <asm/mach-types.h>
28#include <asm/hardware.h> 28#include <asm/hardware.h>
29#include <asm/arch/pxa-regs.h> 29#include <asm/arch/pxa-regs.h>
30#include <asm/arch/pxa2xx-regs.h> /* FIXME: for PSSR */
30#include <asm/arch/ohci.h> 31#include <asm/arch/ohci.h>
31 32
32#define PXA_UHC_MAX_PORTNUM 3 33#define PXA_UHC_MAX_PORTNUM 3
@@ -104,7 +105,7 @@ static int pxa27x_start_hc(struct device *dev)
104 UHCHIE = (UHCHIE_UPRIE | UHCHIE_RWIE); 105 UHCHIE = (UHCHIE_UPRIE | UHCHIE_RWIE);
105 106
106 /* Clear any OTG Pin Hold */ 107 /* Clear any OTG Pin Hold */
107 if (PSSR & PSSR_OTGPH) 108 if (cpu_is_pxa27x() && (PSSR & PSSR_OTGPH))
108 PSSR |= PSSR_OTGPH; 109 PSSR |= PSSR_OTGPH;
109 110
110 return 0; 111 return 0;
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-11 02:31:33 -0500