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-rw-r--r--drivers/serial/21285.c4
-rw-r--r--drivers/serial/68328serial.c9
-rw-r--r--drivers/serial/8250.c84
-rw-r--r--drivers/serial/8250_gsc.c1
-rw-r--r--drivers/serial/8250_hp300.c1
-rw-r--r--drivers/serial/8250_pci.c31
-rw-r--r--drivers/serial/8250_pnp.c18
-rw-r--r--drivers/serial/Kconfig113
-rw-r--r--drivers/serial/Makefile2
-rw-r--r--drivers/serial/amba-pl010.c16
-rw-r--r--drivers/serial/amba-pl011.c20
-rw-r--r--drivers/serial/apbuart.c710
-rw-r--r--drivers/serial/apbuart.h64
-rw-r--r--drivers/serial/atmel_serial.c22
-rw-r--r--drivers/serial/bcm63xx_uart.c7
-rw-r--r--drivers/serial/bfin_5xx.c23
-rw-r--r--drivers/serial/bfin_sport_uart.c702
-rw-r--r--drivers/serial/bfin_sport_uart.h38
-rw-r--r--drivers/serial/cpm_uart/cpm_uart_cpm1.c1
-rw-r--r--drivers/serial/cpm_uart/cpm_uart_cpm2.c5
-rw-r--r--drivers/serial/icom.c5
-rw-r--r--drivers/serial/imx.c21
-rw-r--r--drivers/serial/ioc3_serial.c8
-rw-r--r--drivers/serial/ioc4_serial.c21
-rw-r--r--drivers/serial/jsm/jsm.h8
-rw-r--r--drivers/serial/jsm/jsm_driver.c50
-rw-r--r--drivers/serial/jsm/jsm_neo.c8
-rw-r--r--drivers/serial/jsm/jsm_tty.c16
-rw-r--r--drivers/serial/max3100.c1
-rw-r--r--drivers/serial/mcf.c8
-rw-r--r--drivers/serial/mpc52xx_uart.c284
-rw-r--r--drivers/serial/mpsc.c1
-rw-r--r--drivers/serial/msm_serial.c6
-rw-r--r--drivers/serial/mux.c1
-rw-r--r--drivers/serial/of_serial.c1
-rw-r--r--drivers/serial/pmac_zilog.c262
-rw-r--r--drivers/serial/pmac_zilog.h36
-rw-r--r--drivers/serial/pxa.c16
-rw-r--r--drivers/serial/s3c2410.c2
-rw-r--r--drivers/serial/s3c2412.c3
-rw-r--r--drivers/serial/s3c2440.c2
-rw-r--r--drivers/serial/s3c24a0.c2
-rw-r--r--drivers/serial/s5pv210.c154
-rw-r--r--drivers/serial/samsung.c10
-rw-r--r--drivers/serial/samsung.h21
-rw-r--r--drivers/serial/serial_core.c138
-rw-r--r--drivers/serial/serial_cs.c179
-rw-r--r--drivers/serial/serial_ks8695.c1
-rw-r--r--drivers/serial/sh-sci.c748
-rw-r--r--drivers/serial/sh-sci.h269
-rw-r--r--drivers/serial/sunsab.c2
-rw-r--r--drivers/serial/sunsu.c5
-rw-r--r--drivers/serial/timbuart.c8
-rw-r--r--drivers/serial/uartlite.c12
-rw-r--r--drivers/serial/ucc_uart.c11
55 files changed, 3094 insertions, 1097 deletions
diff --git a/drivers/serial/21285.c b/drivers/serial/21285.c
index 1e3d19397a59..8681f1345056 100644
--- a/drivers/serial/21285.c
+++ b/drivers/serial/21285.c
@@ -58,7 +58,7 @@ static const char serial21285_name[] = "Footbridge UART";
58static void serial21285_stop_tx(struct uart_port *port) 58static void serial21285_stop_tx(struct uart_port *port)
59{ 59{
60 if (tx_enabled(port)) { 60 if (tx_enabled(port)) {
61 disable_irq(IRQ_CONTX); 61 disable_irq_nosync(IRQ_CONTX);
62 tx_enabled(port) = 0; 62 tx_enabled(port) = 0;
63 } 63 }
64} 64}
@@ -74,7 +74,7 @@ static void serial21285_start_tx(struct uart_port *port)
74static void serial21285_stop_rx(struct uart_port *port) 74static void serial21285_stop_rx(struct uart_port *port)
75{ 75{
76 if (rx_enabled(port)) { 76 if (rx_enabled(port)) {
77 disable_irq(IRQ_CONRX); 77 disable_irq_nosync(IRQ_CONRX);
78 rx_enabled(port) = 0; 78 rx_enabled(port) = 0;
79 } 79 }
80} 80}
diff --git a/drivers/serial/68328serial.c b/drivers/serial/68328serial.c
index d935b2d04f93..78ed24bb6a35 100644
--- a/drivers/serial/68328serial.c
+++ b/drivers/serial/68328serial.c
@@ -35,6 +35,7 @@
35#include <linux/pm.h> 35#include <linux/pm.h>
36#include <linux/bitops.h> 36#include <linux/bitops.h>
37#include <linux/delay.h> 37#include <linux/delay.h>
38#include <linux/gfp.h>
38 39
39#include <asm/io.h> 40#include <asm/io.h>
40#include <asm/irq.h> 41#include <asm/irq.h>
@@ -153,8 +154,6 @@ static int baud_table[] = {
153 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800, 154 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800,
154 9600, 19200, 38400, 57600, 115200, 0 }; 155 9600, 19200, 38400, 57600, 115200, 0 };
155 156
156#define BAUD_TABLE_SIZE (sizeof(baud_table)/sizeof(baud_table[0]))
157
158/* Sets or clears DTR/RTS on the requested line */ 157/* Sets or clears DTR/RTS on the requested line */
159static inline void m68k_rtsdtr(struct m68k_serial *ss, int set) 158static inline void m68k_rtsdtr(struct m68k_serial *ss, int set)
160{ 159{
@@ -1406,10 +1405,10 @@ static void m68328_set_baud(void)
1406 USTCNT = ustcnt & ~USTCNT_TXEN; 1405 USTCNT = ustcnt & ~USTCNT_TXEN;
1407 1406
1408again: 1407again:
1409 for (i = 0; i < sizeof(baud_table) / sizeof(baud_table[0]); i++) 1408 for (i = 0; i < ARRAY_SIZE(baud_table); i++)
1410 if (baud_table[i] == m68328_console_baud) 1409 if (baud_table[i] == m68328_console_baud)
1411 break; 1410 break;
1412 if (i >= sizeof(baud_table) / sizeof(baud_table[0])) { 1411 if (i >= ARRAY_SIZE(baud_table)) {
1413 m68328_console_baud = 9600; 1412 m68328_console_baud = 9600;
1414 goto again; 1413 goto again;
1415 } 1414 }
@@ -1435,7 +1434,7 @@ int m68328_console_setup(struct console *cp, char *arg)
1435 if (arg) 1434 if (arg)
1436 n = simple_strtoul(arg,NULL,0); 1435 n = simple_strtoul(arg,NULL,0);
1437 1436
1438 for (i = 0; i < BAUD_TABLE_SIZE; i++) 1437 for (i = 0; i < ARRAY_SIZE(baud_table); i++)
1439 if (baud_table[i] == n) 1438 if (baud_table[i] == n)
1440 break; 1439 break;
1441 if (i < BAUD_TABLE_SIZE) { 1440 if (i < BAUD_TABLE_SIZE) {
diff --git a/drivers/serial/8250.c b/drivers/serial/8250.c
index 737b4c960971..2b1ea3d4c4f4 100644
--- a/drivers/serial/8250.c
+++ b/drivers/serial/8250.c
@@ -38,6 +38,7 @@
38#include <linux/serial_8250.h> 38#include <linux/serial_8250.h>
39#include <linux/nmi.h> 39#include <linux/nmi.h>
40#include <linux/mutex.h> 40#include <linux/mutex.h>
41#include <linux/slab.h>
41 42
42#include <asm/io.h> 43#include <asm/io.h>
43#include <asm/irq.h> 44#include <asm/irq.h>
@@ -83,6 +84,9 @@ static unsigned int skip_txen_test; /* force skip of txen test at init time */
83 84
84#define PASS_LIMIT 256 85#define PASS_LIMIT 256
85 86
87#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
88
89
86/* 90/*
87 * We default to IRQ0 for the "no irq" hack. Some 91 * We default to IRQ0 for the "no irq" hack. Some
88 * machine types want others as well - they're free 92 * machine types want others as well - they're free
@@ -1214,12 +1218,6 @@ static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
1214 } 1218 }
1215#endif 1219#endif
1216 1220
1217#ifdef CONFIG_SERIAL_8250_AU1X00
1218 /* if access method is AU, it is a 16550 with a quirk */
1219 if (up->port.type == PORT_16550A && up->port.iotype == UPIO_AU)
1220 up->bugs |= UART_BUG_NOMSR;
1221#endif
1222
1223 serial_outp(up, UART_LCR, save_lcr); 1221 serial_outp(up, UART_LCR, save_lcr);
1224 1222
1225 if (up->capabilities != uart_config[up->port.type].flags) { 1223 if (up->capabilities != uart_config[up->port.type].flags) {
@@ -1339,14 +1337,12 @@ static void serial8250_start_tx(struct uart_port *port)
1339 serial_out(up, UART_IER, up->ier); 1337 serial_out(up, UART_IER, up->ier);
1340 1338
1341 if (up->bugs & UART_BUG_TXEN) { 1339 if (up->bugs & UART_BUG_TXEN) {
1342 unsigned char lsr, iir; 1340 unsigned char lsr;
1343 lsr = serial_in(up, UART_LSR); 1341 lsr = serial_in(up, UART_LSR);
1344 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS; 1342 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1345 iir = serial_in(up, UART_IIR) & 0x0f;
1346 if ((up->port.type == PORT_RM9000) ? 1343 if ((up->port.type == PORT_RM9000) ?
1347 (lsr & UART_LSR_THRE && 1344 (lsr & UART_LSR_THRE) :
1348 (iir == UART_IIR_NO_INT || iir == UART_IIR_THRI)) : 1345 (lsr & UART_LSR_TEMT))
1349 (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT))
1350 transmit_chars(up); 1346 transmit_chars(up);
1351 } 1347 }
1352 } 1348 }
@@ -1794,7 +1790,7 @@ static unsigned int serial8250_tx_empty(struct uart_port *port)
1794 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS; 1790 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1795 spin_unlock_irqrestore(&up->port.lock, flags); 1791 spin_unlock_irqrestore(&up->port.lock, flags);
1796 1792
1797 return lsr & UART_LSR_TEMT ? TIOCSER_TEMT : 0; 1793 return (lsr & BOTH_EMPTY) == BOTH_EMPTY ? TIOCSER_TEMT : 0;
1798} 1794}
1799 1795
1800static unsigned int serial8250_get_mctrl(struct uart_port *port) 1796static unsigned int serial8250_get_mctrl(struct uart_port *port)
@@ -1852,8 +1848,6 @@ static void serial8250_break_ctl(struct uart_port *port, int break_state)
1852 spin_unlock_irqrestore(&up->port.lock, flags); 1848 spin_unlock_irqrestore(&up->port.lock, flags);
1853} 1849}
1854 1850
1855#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
1856
1857/* 1851/*
1858 * Wait for transmitter & holding register to empty 1852 * Wait for transmitter & holding register to empty
1859 */ 1853 */
@@ -2415,6 +2409,21 @@ serial8250_set_termios(struct uart_port *port, struct ktermios *termios,
2415} 2409}
2416 2410
2417static void 2411static void
2412serial8250_set_ldisc(struct uart_port *port)
2413{
2414 int line = port->line;
2415
2416 if (line >= port->state->port.tty->driver->num)
2417 return;
2418
2419 if (port->state->port.tty->ldisc->ops->num == N_PPS) {
2420 port->flags |= UPF_HARDPPS_CD;
2421 serial8250_enable_ms(port);
2422 } else
2423 port->flags &= ~UPF_HARDPPS_CD;
2424}
2425
2426static void
2418serial8250_pm(struct uart_port *port, unsigned int state, 2427serial8250_pm(struct uart_port *port, unsigned int state,
2419 unsigned int oldstate) 2428 unsigned int oldstate)
2420{ 2429{
@@ -2429,7 +2438,7 @@ serial8250_pm(struct uart_port *port, unsigned int state,
2429static unsigned int serial8250_port_size(struct uart_8250_port *pt) 2438static unsigned int serial8250_port_size(struct uart_8250_port *pt)
2430{ 2439{
2431 if (pt->port.iotype == UPIO_AU) 2440 if (pt->port.iotype == UPIO_AU)
2432 return 0x100000; 2441 return 0x1000;
2433#ifdef CONFIG_ARCH_OMAP 2442#ifdef CONFIG_ARCH_OMAP
2434 if (is_omap_port(pt)) 2443 if (is_omap_port(pt))
2435 return 0x16 << pt->port.regshift; 2444 return 0x16 << pt->port.regshift;
@@ -2586,6 +2595,13 @@ static void serial8250_config_port(struct uart_port *port, int flags)
2586 2595
2587 if (flags & UART_CONFIG_TYPE) 2596 if (flags & UART_CONFIG_TYPE)
2588 autoconfig(up, probeflags); 2597 autoconfig(up, probeflags);
2598
2599#ifdef CONFIG_SERIAL_8250_AU1X00
2600 /* if access method is AU, it is a 16550 with a quirk */
2601 if (up->port.type == PORT_16550A && up->port.iotype == UPIO_AU)
2602 up->bugs |= UART_BUG_NOMSR;
2603#endif
2604
2589 if (up->port.type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ) 2605 if (up->port.type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ)
2590 autoconfig_irq(up); 2606 autoconfig_irq(up);
2591 2607
@@ -2628,6 +2644,7 @@ static struct uart_ops serial8250_pops = {
2628 .startup = serial8250_startup, 2644 .startup = serial8250_startup,
2629 .shutdown = serial8250_shutdown, 2645 .shutdown = serial8250_shutdown,
2630 .set_termios = serial8250_set_termios, 2646 .set_termios = serial8250_set_termios,
2647 .set_ldisc = serial8250_set_ldisc,
2631 .pm = serial8250_pm, 2648 .pm = serial8250_pm,
2632 .type = serial8250_type, 2649 .type = serial8250_type,
2633 .release_port = serial8250_release_port, 2650 .release_port = serial8250_release_port,
@@ -2646,7 +2663,7 @@ static void __init serial8250_isa_init_ports(void)
2646{ 2663{
2647 struct uart_8250_port *up; 2664 struct uart_8250_port *up;
2648 static int first = 1; 2665 static int first = 1;
2649 int i; 2666 int i, irqflag = 0;
2650 2667
2651 if (!first) 2668 if (!first)
2652 return; 2669 return;
@@ -2670,6 +2687,9 @@ static void __init serial8250_isa_init_ports(void)
2670 up->port.ops = &serial8250_pops; 2687 up->port.ops = &serial8250_pops;
2671 } 2688 }
2672 2689
2690 if (share_irqs)
2691 irqflag = IRQF_SHARED;
2692
2673 for (i = 0, up = serial8250_ports; 2693 for (i = 0, up = serial8250_ports;
2674 i < ARRAY_SIZE(old_serial_port) && i < nr_uarts; 2694 i < ARRAY_SIZE(old_serial_port) && i < nr_uarts;
2675 i++, up++) { 2695 i++, up++) {
@@ -2683,11 +2703,19 @@ static void __init serial8250_isa_init_ports(void)
2683 up->port.iotype = old_serial_port[i].io_type; 2703 up->port.iotype = old_serial_port[i].io_type;
2684 up->port.regshift = old_serial_port[i].iomem_reg_shift; 2704 up->port.regshift = old_serial_port[i].iomem_reg_shift;
2685 set_io_from_upio(&up->port); 2705 set_io_from_upio(&up->port);
2686 if (share_irqs) 2706 up->port.irqflags |= irqflag;
2687 up->port.irqflags |= IRQF_SHARED;
2688 } 2707 }
2689} 2708}
2690 2709
2710static void
2711serial8250_init_fixed_type_port(struct uart_8250_port *up, unsigned int type)
2712{
2713 up->port.type = type;
2714 up->port.fifosize = uart_config[type].fifo_size;
2715 up->capabilities = uart_config[type].flags;
2716 up->tx_loadsz = uart_config[type].tx_loadsz;
2717}
2718
2691static void __init 2719static void __init
2692serial8250_register_ports(struct uart_driver *drv, struct device *dev) 2720serial8250_register_ports(struct uart_driver *drv, struct device *dev)
2693{ 2721{
@@ -2704,6 +2732,10 @@ serial8250_register_ports(struct uart_driver *drv, struct device *dev)
2704 struct uart_8250_port *up = &serial8250_ports[i]; 2732 struct uart_8250_port *up = &serial8250_ports[i];
2705 2733
2706 up->port.dev = dev; 2734 up->port.dev = dev;
2735
2736 if (up->port.flags & UPF_FIXED_TYPE)
2737 serial8250_init_fixed_type_port(up, up->port.type);
2738
2707 uart_add_one_port(drv, &up->port); 2739 uart_add_one_port(drv, &up->port);
2708 } 2740 }
2709} 2741}
@@ -2940,10 +2972,13 @@ static int __devinit serial8250_probe(struct platform_device *dev)
2940{ 2972{
2941 struct plat_serial8250_port *p = dev->dev.platform_data; 2973 struct plat_serial8250_port *p = dev->dev.platform_data;
2942 struct uart_port port; 2974 struct uart_port port;
2943 int ret, i; 2975 int ret, i, irqflag = 0;
2944 2976
2945 memset(&port, 0, sizeof(struct uart_port)); 2977 memset(&port, 0, sizeof(struct uart_port));
2946 2978
2979 if (share_irqs)
2980 irqflag = IRQF_SHARED;
2981
2947 for (i = 0; p && p->flags != 0; p++, i++) { 2982 for (i = 0; p && p->flags != 0; p++, i++) {
2948 port.iobase = p->iobase; 2983 port.iobase = p->iobase;
2949 port.membase = p->membase; 2984 port.membase = p->membase;
@@ -2960,8 +2995,7 @@ static int __devinit serial8250_probe(struct platform_device *dev)
2960 port.serial_in = p->serial_in; 2995 port.serial_in = p->serial_in;
2961 port.serial_out = p->serial_out; 2996 port.serial_out = p->serial_out;
2962 port.dev = &dev->dev; 2997 port.dev = &dev->dev;
2963 if (share_irqs) 2998 port.irqflags |= irqflag;
2964 port.irqflags |= IRQF_SHARED;
2965 ret = serial8250_register_port(&port); 2999 ret = serial8250_register_port(&port);
2966 if (ret < 0) { 3000 if (ret < 0) {
2967 dev_err(&dev->dev, "unable to register port at index %d " 3001 dev_err(&dev->dev, "unable to register port at index %d "
@@ -3114,12 +3148,8 @@ int serial8250_register_port(struct uart_port *port)
3114 if (port->dev) 3148 if (port->dev)
3115 uart->port.dev = port->dev; 3149 uart->port.dev = port->dev;
3116 3150
3117 if (port->flags & UPF_FIXED_TYPE) { 3151 if (port->flags & UPF_FIXED_TYPE)
3118 uart->port.type = port->type; 3152 serial8250_init_fixed_type_port(uart, port->type);
3119 uart->port.fifosize = uart_config[port->type].fifo_size;
3120 uart->capabilities = uart_config[port->type].flags;
3121 uart->tx_loadsz = uart_config[port->type].tx_loadsz;
3122 }
3123 3153
3124 set_io_from_upio(&uart->port); 3154 set_io_from_upio(&uart->port);
3125 /* Possibly override default I/O functions. */ 3155 /* Possibly override default I/O functions. */
diff --git a/drivers/serial/8250_gsc.c b/drivers/serial/8250_gsc.c
index 33149d982e82..d8c0ffbfa6e3 100644
--- a/drivers/serial/8250_gsc.c
+++ b/drivers/serial/8250_gsc.c
@@ -16,7 +16,6 @@
16#include <linux/module.h> 16#include <linux/module.h>
17#include <linux/serial_core.h> 17#include <linux/serial_core.h>
18#include <linux/signal.h> 18#include <linux/signal.h>
19#include <linux/slab.h>
20#include <linux/types.h> 19#include <linux/types.h>
21 20
22#include <asm/hardware.h> 21#include <asm/hardware.h>
diff --git a/drivers/serial/8250_hp300.c b/drivers/serial/8250_hp300.c
index 0e1410f2c033..c13438c93012 100644
--- a/drivers/serial/8250_hp300.c
+++ b/drivers/serial/8250_hp300.c
@@ -15,6 +15,7 @@
15#include <linux/delay.h> 15#include <linux/delay.h>
16#include <linux/dio.h> 16#include <linux/dio.h>
17#include <linux/console.h> 17#include <linux/console.h>
18#include <linux/slab.h>
18#include <asm/io.h> 19#include <asm/io.h>
19 20
20#include "8250.h" 21#include "8250.h"
diff --git a/drivers/serial/8250_pci.c b/drivers/serial/8250_pci.c
index b28af13c45a1..01c012da4e26 100644
--- a/drivers/serial/8250_pci.c
+++ b/drivers/serial/8250_pci.c
@@ -760,7 +760,8 @@ static int pci_netmos_init(struct pci_dev *dev)
760 /* subdevice 0x00PS means <P> parallel, <S> serial */ 760 /* subdevice 0x00PS means <P> parallel, <S> serial */
761 unsigned int num_serial = dev->subsystem_device & 0xf; 761 unsigned int num_serial = dev->subsystem_device & 0xf;
762 762
763 if (dev->device == PCI_DEVICE_ID_NETMOS_9901) 763 if ((dev->device == PCI_DEVICE_ID_NETMOS_9901) ||
764 (dev->device == PCI_DEVICE_ID_NETMOS_9865))
764 return 0; 765 return 0;
765 if (dev->subsystem_vendor == PCI_VENDOR_ID_IBM && 766 if (dev->subsystem_vendor == PCI_VENDOR_ID_IBM &&
766 dev->subsystem_device == 0x0299) 767 dev->subsystem_device == 0x0299)
@@ -1479,6 +1480,7 @@ enum pci_board_num_t {
1479 1480
1480 pbn_b0_bt_1_115200, 1481 pbn_b0_bt_1_115200,
1481 pbn_b0_bt_2_115200, 1482 pbn_b0_bt_2_115200,
1483 pbn_b0_bt_4_115200,
1482 pbn_b0_bt_8_115200, 1484 pbn_b0_bt_8_115200,
1483 1485
1484 pbn_b0_bt_1_460800, 1486 pbn_b0_bt_1_460800,
@@ -1703,6 +1705,12 @@ static struct pciserial_board pci_boards[] __devinitdata = {
1703 .base_baud = 115200, 1705 .base_baud = 115200,
1704 .uart_offset = 8, 1706 .uart_offset = 8,
1705 }, 1707 },
1708 [pbn_b0_bt_4_115200] = {
1709 .flags = FL_BASE0|FL_BASE_BARS,
1710 .num_ports = 4,
1711 .base_baud = 115200,
1712 .uart_offset = 8,
1713 },
1706 [pbn_b0_bt_8_115200] = { 1714 [pbn_b0_bt_8_115200] = {
1707 .flags = FL_BASE0|FL_BASE_BARS, 1715 .flags = FL_BASE0|FL_BASE_BARS,
1708 .num_ports = 8, 1716 .num_ports = 8,
@@ -3191,6 +3199,15 @@ static struct pci_device_id serial_pci_tbl[] = {
3191 0x1208, 0x0004, 0, 0, 3199 0x1208, 0x0004, 0, 0,
3192 pbn_b0_4_921600 }, 3200 pbn_b0_4_921600 },
3193 3201
3202 { PCI_VENDOR_ID_KORENIX, PCI_DEVICE_ID_KORENIX_JETCARDF2,
3203 0x1204, 0x0004, 0, 0,
3204 pbn_b0_4_921600 },
3205 { PCI_VENDOR_ID_KORENIX, PCI_DEVICE_ID_KORENIX_JETCARDF2,
3206 0x1208, 0x0004, 0, 0,
3207 pbn_b0_4_921600 },
3208 { PCI_VENDOR_ID_KORENIX, PCI_DEVICE_ID_KORENIX_JETCARDF3,
3209 0x1208, 0x0004, 0, 0,
3210 pbn_b0_4_921600 },
3194 /* 3211 /*
3195 * Dell Remote Access Card 4 - Tim_T_Murphy@Dell.com 3212 * Dell Remote Access Card 4 - Tim_T_Murphy@Dell.com
3196 */ 3213 */
@@ -3649,6 +3666,18 @@ static struct pci_device_id serial_pci_tbl[] = {
3649 0, 0, pbn_b0_1_115200 }, 3666 0, 0, pbn_b0_1_115200 },
3650 3667
3651 /* 3668 /*
3669 * Best Connectivity PCI Multi I/O cards
3670 */
3671
3672 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9865,
3673 0xA000, 0x1000,
3674 0, 0, pbn_b0_1_115200 },
3675
3676 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9865,
3677 0xA000, 0x3004,
3678 0, 0, pbn_b0_bt_4_115200 },
3679
3680 /*
3652 * These entries match devices with class COMMUNICATION_SERIAL, 3681 * These entries match devices with class COMMUNICATION_SERIAL,
3653 * COMMUNICATION_MODEM or COMMUNICATION_MULTISERIAL 3682 * COMMUNICATION_MODEM or COMMUNICATION_MULTISERIAL
3654 */ 3683 */
diff --git a/drivers/serial/8250_pnp.c b/drivers/serial/8250_pnp.c
index d71dfe398940..4822cb50cd0f 100644
--- a/drivers/serial/8250_pnp.c
+++ b/drivers/serial/8250_pnp.c
@@ -328,15 +328,7 @@ static const struct pnp_device_id pnp_dev_table[] = {
328 /* U.S. Robotics 56K Voice INT PnP*/ 328 /* U.S. Robotics 56K Voice INT PnP*/
329 { "USR9190", 0 }, 329 { "USR9190", 0 },
330 /* Wacom tablets */ 330 /* Wacom tablets */
331 { "WACF004", 0 }, 331 { "WACFXXX", 0 },
332 { "WACF005", 0 },
333 { "WACF006", 0 },
334 { "WACF007", 0 },
335 { "WACF008", 0 },
336 { "WACF009", 0 },
337 { "WACF00A", 0 },
338 { "WACF00B", 0 },
339 { "WACF00C", 0 },
340 /* Compaq touchscreen */ 332 /* Compaq touchscreen */
341 { "FPI2002", 0 }, 333 { "FPI2002", 0 },
342 /* Fujitsu Stylistic touchscreens */ 334 /* Fujitsu Stylistic touchscreens */
@@ -354,6 +346,10 @@ static const struct pnp_device_id pnp_dev_table[] = {
354 { "FUJ02E5", 0 }, 346 { "FUJ02E5", 0 },
355 /* Fujitsu P-series tablet PC device */ 347 /* Fujitsu P-series tablet PC device */
356 { "FUJ02E6", 0 }, 348 { "FUJ02E6", 0 },
349 /* Fujitsu Wacom 2FGT Tablet PC device */
350 { "FUJ02E7", 0 },
351 /* Fujitsu Wacom 1FGT Tablet PC device */
352 { "FUJ02E9", 0 },
357 /* 353 /*
358 * LG C1 EXPRESS DUAL (C1-PB11A3) touch screen (actually a FUJ02E6 in 354 * LG C1 EXPRESS DUAL (C1-PB11A3) touch screen (actually a FUJ02E6 in
359 * disguise) 355 * disguise)
@@ -361,9 +357,9 @@ static const struct pnp_device_id pnp_dev_table[] = {
361 { "LTS0001", 0 }, 357 { "LTS0001", 0 },
362 /* Rockwell's (PORALiNK) 33600 INT PNP */ 358 /* Rockwell's (PORALiNK) 33600 INT PNP */
363 { "WCI0003", 0 }, 359 { "WCI0003", 0 },
364 /* Unkown PnP modems */ 360 /* Unknown PnP modems */
365 { "PNPCXXX", UNKNOWN_DEV }, 361 { "PNPCXXX", UNKNOWN_DEV },
366 /* More unkown PnP modems */ 362 /* More unknown PnP modems */
367 { "PNPDXXX", UNKNOWN_DEV }, 363 { "PNPDXXX", UNKNOWN_DEV },
368 { "", 0 } 364 { "", 0 }
369}; 365};
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index e52257257279..f55c49475a8c 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -447,7 +447,7 @@ config SERIAL_CLPS711X_CONSOLE
447 447
448config SERIAL_SAMSUNG 448config SERIAL_SAMSUNG
449 tristate "Samsung SoC serial support" 449 tristate "Samsung SoC serial support"
450 depends on ARM && PLAT_S3C 450 depends on ARM && PLAT_SAMSUNG
451 select SERIAL_CORE 451 select SERIAL_CORE
452 help 452 help
453 Support for the on-chip UARTs on the Samsung S3C24XX series CPUs, 453 Support for the on-chip UARTs on the Samsung S3C24XX series CPUs,
@@ -455,11 +455,18 @@ config SERIAL_SAMSUNG
455 provide all of these ports, depending on how the serial port 455 provide all of these ports, depending on how the serial port
456 pins are configured. 456 pins are configured.
457 457
458config SERIAL_SAMSUNG_UARTS_4
459 bool
460 depends on ARM && PLAT_SAMSUNG
461 default y if CPU_S3C2443
462 help
463 Internal node for the common case of 4 Samsung compatible UARTs
464
458config SERIAL_SAMSUNG_UARTS 465config SERIAL_SAMSUNG_UARTS
459 int 466 int
460 depends on ARM && PLAT_S3C 467 depends on ARM && PLAT_SAMSUNG
461 default 2 if ARCH_S3C2400 468 default 2 if ARCH_S3C2400
462 default 4 if ARCH_S5PC1XX || ARCH_S3C64XX || CPU_S3C2443 469 default 4 if SERIAL_SAMSUNG_UARTS_4
463 default 3 470 default 3
464 help 471 help
465 Select the number of available UART ports for the Samsung S3C 472 Select the number of available UART ports for the Samsung S3C
@@ -526,20 +533,30 @@ config SERIAL_S3C24A0
526 Serial port support for the Samsung S3C24A0 SoC 533 Serial port support for the Samsung S3C24A0 SoC
527 534
528config SERIAL_S3C6400 535config SERIAL_S3C6400
529 tristate "Samsung S3C6400/S3C6410 Serial port support" 536 tristate "Samsung S3C6400/S3C6410/S5P6440 Seria port support"
530 depends on SERIAL_SAMSUNG && (CPU_S3C6400 || CPU_S3C6410) 537 depends on SERIAL_SAMSUNG && (CPU_S3C6400 || CPU_S3C6410 || CPU_S5P6440)
538 select SERIAL_SAMSUNG_UARTS_4
531 default y 539 default y
532 help 540 help
533 Serial port support for the Samsung S3C6400 and S3C6410 541 Serial port support for the Samsung S3C6400, S3C6410 and S5P6440
534 SoCs 542 SoCs
535 543
536config SERIAL_S5PC100 544config SERIAL_S5PC100
537 tristate "Samsung S5PC100 Serial port support" 545 tristate "Samsung S5PC100 Serial port support"
538 depends on SERIAL_SAMSUNG && CPU_S5PC100 546 depends on SERIAL_SAMSUNG && CPU_S5PC100
547 select SERIAL_SAMSUNG_UARTS_4
539 default y 548 default y
540 help 549 help
541 Serial port support for the Samsung S5PC100 SoCs 550 Serial port support for the Samsung S5PC100 SoCs
542 551
552config SERIAL_S5PV210
553 tristate "Samsung S5PV210 Serial port support"
554 depends on SERIAL_SAMSUNG && (CPU_S5PV210 || CPU_S5P6442)
555 select SERIAL_SAMSUNG_UARTS_4 if CPU_S5PV210
556 default y
557 help
558 Serial port support for Samsung's S5P Family of SoC's
559
543config SERIAL_MAX3100 560config SERIAL_MAX3100
544 tristate "MAX3100 support" 561 tristate "MAX3100 support"
545 depends on SPI 562 depends on SPI
@@ -996,7 +1013,7 @@ config SERIAL_IP22_ZILOG_CONSOLE
996 1013
997config SERIAL_SH_SCI 1014config SERIAL_SH_SCI
998 tristate "SuperH SCI(F) serial port support" 1015 tristate "SuperH SCI(F) serial port support"
999 depends on SUPERH || H8300 1016 depends on HAVE_CLK && (SUPERH || H8300 || ARCH_SHMOBILE)
1000 select SERIAL_CORE 1017 select SERIAL_CORE
1001 1018
1002config SERIAL_SH_SCI_NR_UARTS 1019config SERIAL_SH_SCI_NR_UARTS
@@ -1009,6 +1026,10 @@ config SERIAL_SH_SCI_CONSOLE
1009 depends on SERIAL_SH_SCI=y 1026 depends on SERIAL_SH_SCI=y
1010 select SERIAL_CORE_CONSOLE 1027 select SERIAL_CORE_CONSOLE
1011 1028
1029config SERIAL_SH_SCI_DMA
1030 bool "DMA support"
1031 depends on SERIAL_SH_SCI && SH_DMAE && EXPERIMENTAL
1032
1012config SERIAL_PNX8XXX 1033config SERIAL_PNX8XXX
1013 bool "Enable PNX8XXX SoCs' UART Support" 1034 bool "Enable PNX8XXX SoCs' UART Support"
1014 depends on MIPS && (SOC_PNX8550 || SOC_PNX833X) 1035 depends on MIPS && (SOC_PNX8550 || SOC_PNX833X)
@@ -1086,12 +1107,12 @@ config SERIAL_68360
1086 default y 1107 default y
1087 1108
1088config SERIAL_PMACZILOG 1109config SERIAL_PMACZILOG
1089 tristate "PowerMac z85c30 ESCC support" 1110 tristate "Mac or PowerMac z85c30 ESCC support"
1090 depends on PPC_OF && PPC_PMAC 1111 depends on (M68K && MAC) || (PPC_OF && PPC_PMAC)
1091 select SERIAL_CORE 1112 select SERIAL_CORE
1092 help 1113 help
1093 This driver supports the Zilog z85C30 serial ports found on 1114 This driver supports the Zilog z85C30 serial ports found on
1094 PowerMac machines. 1115 (Power)Mac machines.
1095 Say Y or M if you want to be able to these serial ports. 1116 Say Y or M if you want to be able to these serial ports.
1096 1117
1097config SERIAL_PMACZILOG_TTYS 1118config SERIAL_PMACZILOG_TTYS
@@ -1116,16 +1137,16 @@ config SERIAL_PMACZILOG_TTYS
1116 unable to use the 8250 module for PCMCIA or other 16C550-style 1137 unable to use the 8250 module for PCMCIA or other 16C550-style
1117 UARTs. 1138 UARTs.
1118 1139
1119 Say N unless you need the z85c30 ports on your powermac 1140 Say N unless you need the z85c30 ports on your (Power)Mac
1120 to appear as /dev/ttySn. 1141 to appear as /dev/ttySn.
1121 1142
1122config SERIAL_PMACZILOG_CONSOLE 1143config SERIAL_PMACZILOG_CONSOLE
1123 bool "Console on PowerMac z85c30 serial port" 1144 bool "Console on Mac or PowerMac z85c30 serial port"
1124 depends on SERIAL_PMACZILOG=y 1145 depends on SERIAL_PMACZILOG=y
1125 select SERIAL_CORE_CONSOLE 1146 select SERIAL_CORE_CONSOLE
1126 help 1147 help
1127 If you would like to be able to use the z85c30 serial port 1148 If you would like to be able to use the z85c30 serial port
1128 on your PowerMac as the console, you can do so by answering 1149 on your (Power)Mac as the console, you can do so by answering
1129 Y to this option. 1150 Y to this option.
1130 1151
1131config SERIAL_LH7A40X 1152config SERIAL_LH7A40X
@@ -1418,42 +1439,37 @@ config SERIAL_BFIN_SPORT
1418 To compile this driver as a module, choose M here: the 1439 To compile this driver as a module, choose M here: the
1419 module will be called bfin_sport_uart. 1440 module will be called bfin_sport_uart.
1420 1441
1421choice 1442config SERIAL_BFIN_SPORT_CONSOLE
1422 prompt "Baud rate for Blackfin SPORT UART" 1443 bool "Console on Blackfin sport emulated uart"
1423 depends on SERIAL_BFIN_SPORT 1444 depends on SERIAL_BFIN_SPORT=y
1424 default SERIAL_SPORT_BAUD_RATE_57600 1445 select SERIAL_CORE_CONSOLE
1425 help
1426 Choose a baud rate for the SPORT UART, other uart settings are
1427 8 bit, 1 stop bit, no parity, no flow control.
1428
1429config SERIAL_SPORT_BAUD_RATE_115200
1430 bool "115200"
1431
1432config SERIAL_SPORT_BAUD_RATE_57600
1433 bool "57600"
1434 1446
1435config SERIAL_SPORT_BAUD_RATE_38400 1447config SERIAL_BFIN_SPORT0_UART
1436 bool "38400" 1448 bool "Enable UART over SPORT0"
1449 depends on SERIAL_BFIN_SPORT && !(BF542 || BF542M || BF544 || BF544M)
1450 help
1451 Enable UART over SPORT0
1437 1452
1438config SERIAL_SPORT_BAUD_RATE_19200 1453config SERIAL_BFIN_SPORT1_UART
1439 bool "19200" 1454 bool "Enable UART over SPORT1"
1455 depends on SERIAL_BFIN_SPORT
1456 help
1457 Enable UART over SPORT1
1440 1458
1441config SERIAL_SPORT_BAUD_RATE_9600 1459config SERIAL_BFIN_SPORT2_UART
1442 bool "9600" 1460 bool "Enable UART over SPORT2"
1443endchoice 1461 depends on SERIAL_BFIN_SPORT && (BF54x || BF538 || BF539)
1462 help
1463 Enable UART over SPORT2
1444 1464
1445config SPORT_BAUD_RATE 1465config SERIAL_BFIN_SPORT3_UART
1446 int 1466 bool "Enable UART over SPORT3"
1447 depends on SERIAL_BFIN_SPORT 1467 depends on SERIAL_BFIN_SPORT && (BF54x || BF538 || BF539)
1448 default 115200 if (SERIAL_SPORT_BAUD_RATE_115200) 1468 help
1449 default 57600 if (SERIAL_SPORT_BAUD_RATE_57600) 1469 Enable UART over SPORT3
1450 default 38400 if (SERIAL_SPORT_BAUD_RATE_38400)
1451 default 19200 if (SERIAL_SPORT_BAUD_RATE_19200)
1452 default 9600 if (SERIAL_SPORT_BAUD_RATE_9600)
1453 1470
1454config SERIAL_TIMBERDALE 1471config SERIAL_TIMBERDALE
1455 tristate "Support for timberdale UART" 1472 tristate "Support for timberdale UART"
1456 depends on MFD_TIMBERDALE
1457 select SERIAL_CORE 1473 select SERIAL_CORE
1458 ---help--- 1474 ---help---
1459 Add support for UART controller on timberdale. 1475 Add support for UART controller on timberdale.
@@ -1477,4 +1493,17 @@ config SERIAL_BCM63XX_CONSOLE
1477 If you have enabled the serial port on the bcm63xx CPU 1493 If you have enabled the serial port on the bcm63xx CPU
1478 you can make it the console by answering Y to this option. 1494 you can make it the console by answering Y to this option.
1479 1495
1496config SERIAL_GRLIB_GAISLER_APBUART
1497 tristate "GRLIB APBUART serial support"
1498 depends on OF
1499 ---help---
1500 Add support for the GRLIB APBUART serial port.
1501
1502config SERIAL_GRLIB_GAISLER_APBUART_CONSOLE
1503 bool "Console on GRLIB APBUART serial port"
1504 depends on SERIAL_GRLIB_GAISLER_APBUART=y
1505 select SERIAL_CORE_CONSOLE
1506 help
1507 Support for running a console on the GRLIB APBUART
1508
1480endmenu 1509endmenu
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index d21d5dd5d048..6aa4723b74ee 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -45,6 +45,7 @@ obj-$(CONFIG_SERIAL_S3C2440) += s3c2440.o
45obj-$(CONFIG_SERIAL_S3C24A0) += s3c24a0.o 45obj-$(CONFIG_SERIAL_S3C24A0) += s3c24a0.o
46obj-$(CONFIG_SERIAL_S3C6400) += s3c6400.o 46obj-$(CONFIG_SERIAL_S3C6400) += s3c6400.o
47obj-$(CONFIG_SERIAL_S5PC100) += s3c6400.o 47obj-$(CONFIG_SERIAL_S5PC100) += s3c6400.o
48obj-$(CONFIG_SERIAL_S5PV210) += s5pv210.o
48obj-$(CONFIG_SERIAL_MAX3100) += max3100.o 49obj-$(CONFIG_SERIAL_MAX3100) += max3100.o
49obj-$(CONFIG_SERIAL_IP22_ZILOG) += ip22zilog.o 50obj-$(CONFIG_SERIAL_IP22_ZILOG) += ip22zilog.o
50obj-$(CONFIG_SERIAL_MUX) += mux.o 51obj-$(CONFIG_SERIAL_MUX) += mux.o
@@ -81,3 +82,4 @@ obj-$(CONFIG_SERIAL_KS8695) += serial_ks8695.o
81obj-$(CONFIG_KGDB_SERIAL_CONSOLE) += kgdboc.o 82obj-$(CONFIG_KGDB_SERIAL_CONSOLE) += kgdboc.o
82obj-$(CONFIG_SERIAL_QE) += ucc_uart.o 83obj-$(CONFIG_SERIAL_QE) += ucc_uart.o
83obj-$(CONFIG_SERIAL_TIMBERDALE) += timbuart.o 84obj-$(CONFIG_SERIAL_TIMBERDALE) += timbuart.o
85obj-$(CONFIG_SERIAL_GRLIB_GAISLER_APBUART) += apbuart.o
diff --git a/drivers/serial/amba-pl010.c b/drivers/serial/amba-pl010.c
index 429a8ae86933..b09a638d051f 100644
--- a/drivers/serial/amba-pl010.c
+++ b/drivers/serial/amba-pl010.c
@@ -47,6 +47,7 @@
47#include <linux/amba/bus.h> 47#include <linux/amba/bus.h>
48#include <linux/amba/serial.h> 48#include <linux/amba/serial.h>
49#include <linux/clk.h> 49#include <linux/clk.h>
50#include <linux/slab.h>
50 51
51#include <asm/io.h> 52#include <asm/io.h>
52 53
@@ -471,6 +472,20 @@ pl010_set_termios(struct uart_port *port, struct ktermios *termios,
471 spin_unlock_irqrestore(&uap->port.lock, flags); 472 spin_unlock_irqrestore(&uap->port.lock, flags);
472} 473}
473 474
475static void pl010_set_ldisc(struct uart_port *port)
476{
477 int line = port->line;
478
479 if (line >= port->state->port.tty->driver->num)
480 return;
481
482 if (port->state->port.tty->ldisc->ops->num == N_PPS) {
483 port->flags |= UPF_HARDPPS_CD;
484 pl010_enable_ms(port);
485 } else
486 port->flags &= ~UPF_HARDPPS_CD;
487}
488
474static const char *pl010_type(struct uart_port *port) 489static const char *pl010_type(struct uart_port *port)
475{ 490{
476 return port->type == PORT_AMBA ? "AMBA" : NULL; 491 return port->type == PORT_AMBA ? "AMBA" : NULL;
@@ -531,6 +546,7 @@ static struct uart_ops amba_pl010_pops = {
531 .startup = pl010_startup, 546 .startup = pl010_startup,
532 .shutdown = pl010_shutdown, 547 .shutdown = pl010_shutdown,
533 .set_termios = pl010_set_termios, 548 .set_termios = pl010_set_termios,
549 .set_ldisc = pl010_set_ldisc,
534 .type = pl010_type, 550 .type = pl010_type,
535 .release_port = pl010_release_port, 551 .release_port = pl010_release_port,
536 .request_port = pl010_request_port, 552 .request_port = pl010_request_port,
diff --git a/drivers/serial/amba-pl011.c b/drivers/serial/amba-pl011.c
index ef7adc8135dd..743ebf5f16da 100644
--- a/drivers/serial/amba-pl011.c
+++ b/drivers/serial/amba-pl011.c
@@ -47,6 +47,7 @@
47#include <linux/amba/bus.h> 47#include <linux/amba/bus.h>
48#include <linux/amba/serial.h> 48#include <linux/amba/serial.h>
49#include <linux/clk.h> 49#include <linux/clk.h>
50#include <linux/slab.h>
50 51
51#include <asm/io.h> 52#include <asm/io.h>
52#include <asm/sizes.h> 53#include <asm/sizes.h>
@@ -71,6 +72,7 @@ struct uart_amba_port {
71 unsigned int im; /* interrupt mask */ 72 unsigned int im; /* interrupt mask */
72 unsigned int old_status; 73 unsigned int old_status;
73 unsigned int ifls; /* vendor-specific */ 74 unsigned int ifls; /* vendor-specific */
75 bool autorts;
74}; 76};
75 77
76/* There is by now at least one vendor with differing details, so handle it */ 78/* There is by now at least one vendor with differing details, so handle it */
@@ -308,6 +310,11 @@ static void pl011_set_mctrl(struct uart_port *port, unsigned int mctrl)
308 TIOCMBIT(TIOCM_OUT1, UART011_CR_OUT1); 310 TIOCMBIT(TIOCM_OUT1, UART011_CR_OUT1);
309 TIOCMBIT(TIOCM_OUT2, UART011_CR_OUT2); 311 TIOCMBIT(TIOCM_OUT2, UART011_CR_OUT2);
310 TIOCMBIT(TIOCM_LOOP, UART011_CR_LBE); 312 TIOCMBIT(TIOCM_LOOP, UART011_CR_LBE);
313
314 if (uap->autorts) {
315 /* We need to disable auto-RTS if we want to turn RTS off */
316 TIOCMBIT(TIOCM_RTS, UART011_CR_RTSEN);
317 }
311#undef TIOCMBIT 318#undef TIOCMBIT
312 319
313 writew(cr, uap->port.membase + UART011_CR); 320 writew(cr, uap->port.membase + UART011_CR);
@@ -437,6 +444,7 @@ static void pl011_shutdown(struct uart_port *port)
437 /* 444 /*
438 * disable the port 445 * disable the port
439 */ 446 */
447 uap->autorts = false;
440 writew(UART01x_CR_UARTEN | UART011_CR_TXE, uap->port.membase + UART011_CR); 448 writew(UART01x_CR_UARTEN | UART011_CR_TXE, uap->port.membase + UART011_CR);
441 449
442 /* 450 /*
@@ -456,6 +464,7 @@ static void
456pl011_set_termios(struct uart_port *port, struct ktermios *termios, 464pl011_set_termios(struct uart_port *port, struct ktermios *termios,
457 struct ktermios *old) 465 struct ktermios *old)
458{ 466{
467 struct uart_amba_port *uap = (struct uart_amba_port *)port;
459 unsigned int lcr_h, old_cr; 468 unsigned int lcr_h, old_cr;
460 unsigned long flags; 469 unsigned long flags;
461 unsigned int baud, quot; 470 unsigned int baud, quot;
@@ -532,6 +541,17 @@ pl011_set_termios(struct uart_port *port, struct ktermios *termios,
532 old_cr = readw(port->membase + UART011_CR); 541 old_cr = readw(port->membase + UART011_CR);
533 writew(0, port->membase + UART011_CR); 542 writew(0, port->membase + UART011_CR);
534 543
544 if (termios->c_cflag & CRTSCTS) {
545 if (old_cr & UART011_CR_RTS)
546 old_cr |= UART011_CR_RTSEN;
547
548 old_cr |= UART011_CR_CTSEN;
549 uap->autorts = true;
550 } else {
551 old_cr &= ~(UART011_CR_CTSEN | UART011_CR_RTSEN);
552 uap->autorts = false;
553 }
554
535 /* Set baud rate */ 555 /* Set baud rate */
536 writew(quot & 0x3f, port->membase + UART011_FBRD); 556 writew(quot & 0x3f, port->membase + UART011_FBRD);
537 writew(quot >> 6, port->membase + UART011_IBRD); 557 writew(quot >> 6, port->membase + UART011_IBRD);
diff --git a/drivers/serial/apbuart.c b/drivers/serial/apbuart.c
new file mode 100644
index 000000000000..fe91319b5f65
--- /dev/null
+++ b/drivers/serial/apbuart.c
@@ -0,0 +1,710 @@
1/*
2 * Driver for GRLIB serial ports (APBUART)
3 *
4 * Based on linux/drivers/serial/amba.c
5 *
6 * Copyright (C) 2000 Deep Blue Solutions Ltd.
7 * Copyright (C) 2003 Konrad Eisele <eiselekd@web.de>
8 * Copyright (C) 2006 Daniel Hellstrom <daniel@gaisler.com>, Aeroflex Gaisler AB
9 * Copyright (C) 2008 Gilead Kutnick <kutnickg@zin-tech.com>
10 * Copyright (C) 2009 Kristoffer Glembo <kristoffer@gaisler.com>, Aeroflex Gaisler AB
11 */
12
13#if defined(CONFIG_SERIAL_GRLIB_GAISLER_APBUART_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
14#define SUPPORT_SYSRQ
15#endif
16
17#include <linux/module.h>
18#include <linux/tty.h>
19#include <linux/ioport.h>
20#include <linux/init.h>
21#include <linux/serial.h>
22#include <linux/console.h>
23#include <linux/sysrq.h>
24#include <linux/kthread.h>
25#include <linux/device.h>
26#include <linux/of.h>
27#include <linux/of_device.h>
28#include <linux/of_platform.h>
29#include <linux/platform_device.h>
30#include <linux/io.h>
31#include <linux/serial_core.h>
32#include <asm/irq.h>
33
34#include "apbuart.h"
35
36#define SERIAL_APBUART_MAJOR TTY_MAJOR
37#define SERIAL_APBUART_MINOR 64
38#define UART_DUMMY_RSR_RX 0x8000 /* for ignore all read */
39
40static void apbuart_tx_chars(struct uart_port *port);
41
42static void apbuart_stop_tx(struct uart_port *port)
43{
44 unsigned int cr;
45
46 cr = UART_GET_CTRL(port);
47 cr &= ~UART_CTRL_TI;
48 UART_PUT_CTRL(port, cr);
49}
50
51static void apbuart_start_tx(struct uart_port *port)
52{
53 unsigned int cr;
54
55 cr = UART_GET_CTRL(port);
56 cr |= UART_CTRL_TI;
57 UART_PUT_CTRL(port, cr);
58
59 if (UART_GET_STATUS(port) & UART_STATUS_THE)
60 apbuart_tx_chars(port);
61}
62
63static void apbuart_stop_rx(struct uart_port *port)
64{
65 unsigned int cr;
66
67 cr = UART_GET_CTRL(port);
68 cr &= ~(UART_CTRL_RI);
69 UART_PUT_CTRL(port, cr);
70}
71
72static void apbuart_enable_ms(struct uart_port *port)
73{
74 /* No modem status change interrupts for APBUART */
75}
76
77static void apbuart_rx_chars(struct uart_port *port)
78{
79 struct tty_struct *tty = port->state->port.tty;
80 unsigned int status, ch, rsr, flag;
81 unsigned int max_chars = port->fifosize;
82
83 status = UART_GET_STATUS(port);
84
85 while (UART_RX_DATA(status) && (max_chars--)) {
86
87 ch = UART_GET_CHAR(port);
88 flag = TTY_NORMAL;
89
90 port->icount.rx++;
91
92 rsr = UART_GET_STATUS(port) | UART_DUMMY_RSR_RX;
93 UART_PUT_STATUS(port, 0);
94 if (rsr & UART_STATUS_ERR) {
95
96 if (rsr & UART_STATUS_BR) {
97 rsr &= ~(UART_STATUS_FE | UART_STATUS_PE);
98 port->icount.brk++;
99 if (uart_handle_break(port))
100 goto ignore_char;
101 } else if (rsr & UART_STATUS_PE) {
102 port->icount.parity++;
103 } else if (rsr & UART_STATUS_FE) {
104 port->icount.frame++;
105 }
106 if (rsr & UART_STATUS_OE)
107 port->icount.overrun++;
108
109 rsr &= port->read_status_mask;
110
111 if (rsr & UART_STATUS_PE)
112 flag = TTY_PARITY;
113 else if (rsr & UART_STATUS_FE)
114 flag = TTY_FRAME;
115 }
116
117 if (uart_handle_sysrq_char(port, ch))
118 goto ignore_char;
119
120 uart_insert_char(port, rsr, UART_STATUS_OE, ch, flag);
121
122
123 ignore_char:
124 status = UART_GET_STATUS(port);
125 }
126
127 tty_flip_buffer_push(tty);
128}
129
130static void apbuart_tx_chars(struct uart_port *port)
131{
132 struct circ_buf *xmit = &port->state->xmit;
133 int count;
134
135 if (port->x_char) {
136 UART_PUT_CHAR(port, port->x_char);
137 port->icount.tx++;
138 port->x_char = 0;
139 return;
140 }
141
142 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
143 apbuart_stop_tx(port);
144 return;
145 }
146
147 /* amba: fill FIFO */
148 count = port->fifosize >> 1;
149 do {
150 UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
151 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
152 port->icount.tx++;
153 if (uart_circ_empty(xmit))
154 break;
155 } while (--count > 0);
156
157 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
158 uart_write_wakeup(port);
159
160 if (uart_circ_empty(xmit))
161 apbuart_stop_tx(port);
162}
163
164static irqreturn_t apbuart_int(int irq, void *dev_id)
165{
166 struct uart_port *port = dev_id;
167 unsigned int status;
168
169 spin_lock(&port->lock);
170
171 status = UART_GET_STATUS(port);
172 if (status & UART_STATUS_DR)
173 apbuart_rx_chars(port);
174 if (status & UART_STATUS_THE)
175 apbuart_tx_chars(port);
176
177 spin_unlock(&port->lock);
178
179 return IRQ_HANDLED;
180}
181
182static unsigned int apbuart_tx_empty(struct uart_port *port)
183{
184 unsigned int status = UART_GET_STATUS(port);
185 return status & UART_STATUS_THE ? TIOCSER_TEMT : 0;
186}
187
188static unsigned int apbuart_get_mctrl(struct uart_port *port)
189{
190 /* The GRLIB APBUART handles flow control in hardware */
191 return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
192}
193
194static void apbuart_set_mctrl(struct uart_port *port, unsigned int mctrl)
195{
196 /* The GRLIB APBUART handles flow control in hardware */
197}
198
199static void apbuart_break_ctl(struct uart_port *port, int break_state)
200{
201 /* We don't support sending break */
202}
203
204static int apbuart_startup(struct uart_port *port)
205{
206 int retval;
207 unsigned int cr;
208
209 /* Allocate the IRQ */
210 retval = request_irq(port->irq, apbuart_int, 0, "apbuart", port);
211 if (retval)
212 return retval;
213
214 /* Finally, enable interrupts */
215 cr = UART_GET_CTRL(port);
216 UART_PUT_CTRL(port,
217 cr | UART_CTRL_RE | UART_CTRL_TE |
218 UART_CTRL_RI | UART_CTRL_TI);
219
220 return 0;
221}
222
223static void apbuart_shutdown(struct uart_port *port)
224{
225 unsigned int cr;
226
227 /* disable all interrupts, disable the port */
228 cr = UART_GET_CTRL(port);
229 UART_PUT_CTRL(port,
230 cr & ~(UART_CTRL_RE | UART_CTRL_TE |
231 UART_CTRL_RI | UART_CTRL_TI));
232
233 /* Free the interrupt */
234 free_irq(port->irq, port);
235}
236
237static void apbuart_set_termios(struct uart_port *port,
238 struct ktermios *termios, struct ktermios *old)
239{
240 unsigned int cr;
241 unsigned long flags;
242 unsigned int baud, quot;
243
244 /* Ask the core to calculate the divisor for us. */
245 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
246 if (baud == 0)
247 panic("invalid baudrate %i\n", port->uartclk / 16);
248
249 /* uart_get_divisor calc a *16 uart freq, apbuart is *8 */
250 quot = (uart_get_divisor(port, baud)) * 2;
251 cr = UART_GET_CTRL(port);
252 cr &= ~(UART_CTRL_PE | UART_CTRL_PS);
253
254 if (termios->c_cflag & PARENB) {
255 cr |= UART_CTRL_PE;
256 if ((termios->c_cflag & PARODD))
257 cr |= UART_CTRL_PS;
258 }
259
260 /* Enable flow control. */
261 if (termios->c_cflag & CRTSCTS)
262 cr |= UART_CTRL_FL;
263
264 spin_lock_irqsave(&port->lock, flags);
265
266 /* Update the per-port timeout. */
267 uart_update_timeout(port, termios->c_cflag, baud);
268
269 port->read_status_mask = UART_STATUS_OE;
270 if (termios->c_iflag & INPCK)
271 port->read_status_mask |= UART_STATUS_FE | UART_STATUS_PE;
272
273 /* Characters to ignore */
274 port->ignore_status_mask = 0;
275 if (termios->c_iflag & IGNPAR)
276 port->ignore_status_mask |= UART_STATUS_FE | UART_STATUS_PE;
277
278 /* Ignore all characters if CREAD is not set. */
279 if ((termios->c_cflag & CREAD) == 0)
280 port->ignore_status_mask |= UART_DUMMY_RSR_RX;
281
282 /* Set baud rate */
283 quot -= 1;
284 UART_PUT_SCAL(port, quot);
285 UART_PUT_CTRL(port, cr);
286
287 spin_unlock_irqrestore(&port->lock, flags);
288}
289
290static const char *apbuart_type(struct uart_port *port)
291{
292 return port->type == PORT_APBUART ? "GRLIB/APBUART" : NULL;
293}
294
295static void apbuart_release_port(struct uart_port *port)
296{
297 release_mem_region(port->mapbase, 0x100);
298}
299
300static int apbuart_request_port(struct uart_port *port)
301{
302 return request_mem_region(port->mapbase, 0x100, "grlib-apbuart")
303 != NULL ? 0 : -EBUSY;
304 return 0;
305}
306
307/* Configure/autoconfigure the port */
308static void apbuart_config_port(struct uart_port *port, int flags)
309{
310 if (flags & UART_CONFIG_TYPE) {
311 port->type = PORT_APBUART;
312 apbuart_request_port(port);
313 }
314}
315
316/* Verify the new serial_struct (for TIOCSSERIAL) */
317static int apbuart_verify_port(struct uart_port *port,
318 struct serial_struct *ser)
319{
320 int ret = 0;
321 if (ser->type != PORT_UNKNOWN && ser->type != PORT_APBUART)
322 ret = -EINVAL;
323 if (ser->irq < 0 || ser->irq >= NR_IRQS)
324 ret = -EINVAL;
325 if (ser->baud_base < 9600)
326 ret = -EINVAL;
327 return ret;
328}
329
330static struct uart_ops grlib_apbuart_ops = {
331 .tx_empty = apbuart_tx_empty,
332 .set_mctrl = apbuart_set_mctrl,
333 .get_mctrl = apbuart_get_mctrl,
334 .stop_tx = apbuart_stop_tx,
335 .start_tx = apbuart_start_tx,
336 .stop_rx = apbuart_stop_rx,
337 .enable_ms = apbuart_enable_ms,
338 .break_ctl = apbuart_break_ctl,
339 .startup = apbuart_startup,
340 .shutdown = apbuart_shutdown,
341 .set_termios = apbuart_set_termios,
342 .type = apbuart_type,
343 .release_port = apbuart_release_port,
344 .request_port = apbuart_request_port,
345 .config_port = apbuart_config_port,
346 .verify_port = apbuart_verify_port,
347};
348
349static struct uart_port grlib_apbuart_ports[UART_NR];
350static struct device_node *grlib_apbuart_nodes[UART_NR];
351
352static int apbuart_scan_fifo_size(struct uart_port *port, int portnumber)
353{
354 int ctrl, loop = 0;
355 int status;
356 int fifosize;
357 unsigned long flags;
358
359 ctrl = UART_GET_CTRL(port);
360
361 /*
362 * Enable the transceiver and wait for it to be ready to send data.
363 * Clear interrupts so that this process will not be externally
364 * interrupted in the middle (which can cause the transceiver to
365 * drain prematurely).
366 */
367
368 local_irq_save(flags);
369
370 UART_PUT_CTRL(port, ctrl | UART_CTRL_TE);
371
372 while (!UART_TX_READY(UART_GET_STATUS(port)))
373 loop++;
374
375 /*
376 * Disable the transceiver so data isn't actually sent during the
377 * actual test.
378 */
379
380 UART_PUT_CTRL(port, ctrl & ~(UART_CTRL_TE));
381
382 fifosize = 1;
383 UART_PUT_CHAR(port, 0);
384
385 /*
386 * So long as transmitting a character increments the tranceivier FIFO
387 * length the FIFO must be at least that big. These bytes will
388 * automatically drain off of the FIFO.
389 */
390
391 status = UART_GET_STATUS(port);
392 while (((status >> 20) & 0x3F) == fifosize) {
393 fifosize++;
394 UART_PUT_CHAR(port, 0);
395 status = UART_GET_STATUS(port);
396 }
397
398 fifosize--;
399
400 UART_PUT_CTRL(port, ctrl);
401 local_irq_restore(flags);
402
403 if (fifosize == 0)
404 fifosize = 1;
405
406 return fifosize;
407}
408
409static void apbuart_flush_fifo(struct uart_port *port)
410{
411 int i;
412
413 for (i = 0; i < port->fifosize; i++)
414 UART_GET_CHAR(port);
415}
416
417
418/* ======================================================================== */
419/* Console driver, if enabled */
420/* ======================================================================== */
421
422#ifdef CONFIG_SERIAL_GRLIB_GAISLER_APBUART_CONSOLE
423
424static void apbuart_console_putchar(struct uart_port *port, int ch)
425{
426 unsigned int status;
427 do {
428 status = UART_GET_STATUS(port);
429 } while (!UART_TX_READY(status));
430 UART_PUT_CHAR(port, ch);
431}
432
433static void
434apbuart_console_write(struct console *co, const char *s, unsigned int count)
435{
436 struct uart_port *port = &grlib_apbuart_ports[co->index];
437 unsigned int status, old_cr, new_cr;
438
439 /* First save the CR then disable the interrupts */
440 old_cr = UART_GET_CTRL(port);
441 new_cr = old_cr & ~(UART_CTRL_RI | UART_CTRL_TI);
442 UART_PUT_CTRL(port, new_cr);
443
444 uart_console_write(port, s, count, apbuart_console_putchar);
445
446 /*
447 * Finally, wait for transmitter to become empty
448 * and restore the TCR
449 */
450 do {
451 status = UART_GET_STATUS(port);
452 } while (!UART_TX_READY(status));
453 UART_PUT_CTRL(port, old_cr);
454}
455
456static void __init
457apbuart_console_get_options(struct uart_port *port, int *baud,
458 int *parity, int *bits)
459{
460 if (UART_GET_CTRL(port) & (UART_CTRL_RE | UART_CTRL_TE)) {
461
462 unsigned int quot, status;
463 status = UART_GET_STATUS(port);
464
465 *parity = 'n';
466 if (status & UART_CTRL_PE) {
467 if ((status & UART_CTRL_PS) == 0)
468 *parity = 'e';
469 else
470 *parity = 'o';
471 }
472
473 *bits = 8;
474 quot = UART_GET_SCAL(port) / 8;
475 *baud = port->uartclk / (16 * (quot + 1));
476 }
477}
478
479static int __init apbuart_console_setup(struct console *co, char *options)
480{
481 struct uart_port *port;
482 int baud = 38400;
483 int bits = 8;
484 int parity = 'n';
485 int flow = 'n';
486
487 pr_debug("apbuart_console_setup co=%p, co->index=%i, options=%s\n",
488 co, co->index, options);
489
490 /*
491 * Check whether an invalid uart number has been specified, and
492 * if so, search for the first available port that does have
493 * console support.
494 */
495 if (co->index >= grlib_apbuart_port_nr)
496 co->index = 0;
497
498 port = &grlib_apbuart_ports[co->index];
499
500 spin_lock_init(&port->lock);
501
502 if (options)
503 uart_parse_options(options, &baud, &parity, &bits, &flow);
504 else
505 apbuart_console_get_options(port, &baud, &parity, &bits);
506
507 return uart_set_options(port, co, baud, parity, bits, flow);
508}
509
510static struct uart_driver grlib_apbuart_driver;
511
512static struct console grlib_apbuart_console = {
513 .name = "ttyS",
514 .write = apbuart_console_write,
515 .device = uart_console_device,
516 .setup = apbuart_console_setup,
517 .flags = CON_PRINTBUFFER,
518 .index = -1,
519 .data = &grlib_apbuart_driver,
520};
521
522
523static void grlib_apbuart_configure(void);
524
525static int __init apbuart_console_init(void)
526{
527 grlib_apbuart_configure();
528 register_console(&grlib_apbuart_console);
529 return 0;
530}
531
532console_initcall(apbuart_console_init);
533
534#define APBUART_CONSOLE (&grlib_apbuart_console)
535#else
536#define APBUART_CONSOLE NULL
537#endif
538
539static struct uart_driver grlib_apbuart_driver = {
540 .owner = THIS_MODULE,
541 .driver_name = "serial",
542 .dev_name = "ttyS",
543 .major = SERIAL_APBUART_MAJOR,
544 .minor = SERIAL_APBUART_MINOR,
545 .nr = UART_NR,
546 .cons = APBUART_CONSOLE,
547};
548
549
550/* ======================================================================== */
551/* OF Platform Driver */
552/* ======================================================================== */
553
554static int __devinit apbuart_probe(struct of_device *op,
555 const struct of_device_id *match)
556{
557 int i = -1;
558 struct uart_port *port = NULL;
559
560 i = 0;
561 for (i = 0; i < grlib_apbuart_port_nr; i++) {
562 if (op->node == grlib_apbuart_nodes[i])
563 break;
564 }
565
566 port = &grlib_apbuart_ports[i];
567 port->dev = &op->dev;
568
569 uart_add_one_port(&grlib_apbuart_driver, (struct uart_port *) port);
570
571 apbuart_flush_fifo((struct uart_port *) port);
572
573 printk(KERN_INFO "grlib-apbuart at 0x%llx, irq %d\n",
574 (unsigned long long) port->mapbase, port->irq);
575 return 0;
576
577}
578
579static struct of_device_id __initdata apbuart_match[] = {
580 {
581 .name = "GAISLER_APBUART",
582 },
583 {},
584};
585
586static struct of_platform_driver grlib_apbuart_of_driver = {
587 .match_table = apbuart_match,
588 .probe = apbuart_probe,
589 .driver = {
590 .owner = THIS_MODULE,
591 .name = "grlib-apbuart",
592 },
593};
594
595
596static void grlib_apbuart_configure(void)
597{
598 static int enum_done;
599 struct device_node *np, *rp;
600 struct uart_port *port = NULL;
601 const u32 *prop;
602 int freq_khz;
603 int v = 0, d = 0;
604 unsigned int addr;
605 int irq, line;
606 struct amba_prom_registers *regs;
607
608 if (enum_done)
609 return;
610
611 /* Get bus frequency */
612 rp = of_find_node_by_path("/");
613 rp = of_get_next_child(rp, NULL);
614 prop = of_get_property(rp, "clock-frequency", NULL);
615 freq_khz = *prop;
616
617 line = 0;
618 for_each_matching_node(np, apbuart_match) {
619
620 int *vendor = (int *) of_get_property(np, "vendor", NULL);
621 int *device = (int *) of_get_property(np, "device", NULL);
622 int *irqs = (int *) of_get_property(np, "interrupts", NULL);
623 regs = (struct amba_prom_registers *)
624 of_get_property(np, "reg", NULL);
625
626 if (vendor)
627 v = *vendor;
628 if (device)
629 d = *device;
630
631 if (!irqs || !regs)
632 return;
633
634 grlib_apbuart_nodes[line] = np;
635
636 addr = regs->phys_addr;
637 irq = *irqs;
638
639 port = &grlib_apbuart_ports[line];
640
641 port->mapbase = addr;
642 port->membase = ioremap(addr, sizeof(struct grlib_apbuart_regs_map));
643 port->irq = irq;
644 port->iotype = UPIO_MEM;
645 port->ops = &grlib_apbuart_ops;
646 port->flags = UPF_BOOT_AUTOCONF;
647 port->line = line;
648 port->uartclk = freq_khz * 1000;
649 port->fifosize = apbuart_scan_fifo_size((struct uart_port *) port, line);
650 line++;
651
652 /* We support maximum UART_NR uarts ... */
653 if (line == UART_NR)
654 break;
655
656 }
657
658 enum_done = 1;
659
660 grlib_apbuart_driver.nr = grlib_apbuart_port_nr = line;
661}
662
663static int __init grlib_apbuart_init(void)
664{
665 int ret;
666
667 /* Find all APBUARTS in device the tree and initialize their ports */
668 grlib_apbuart_configure();
669
670 printk(KERN_INFO "Serial: GRLIB APBUART driver\n");
671
672 ret = uart_register_driver(&grlib_apbuart_driver);
673
674 if (ret) {
675 printk(KERN_ERR "%s: uart_register_driver failed (%i)\n",
676 __FILE__, ret);
677 return ret;
678 }
679
680 ret = of_register_platform_driver(&grlib_apbuart_of_driver);
681 if (ret) {
682 printk(KERN_ERR
683 "%s: of_register_platform_driver failed (%i)\n",
684 __FILE__, ret);
685 uart_unregister_driver(&grlib_apbuart_driver);
686 return ret;
687 }
688
689 return ret;
690}
691
692static void __exit grlib_apbuart_exit(void)
693{
694 int i;
695
696 for (i = 0; i < grlib_apbuart_port_nr; i++)
697 uart_remove_one_port(&grlib_apbuart_driver,
698 &grlib_apbuart_ports[i]);
699
700 uart_unregister_driver(&grlib_apbuart_driver);
701 of_unregister_platform_driver(&grlib_apbuart_of_driver);
702}
703
704module_init(grlib_apbuart_init);
705module_exit(grlib_apbuart_exit);
706
707MODULE_AUTHOR("Aeroflex Gaisler AB");
708MODULE_DESCRIPTION("GRLIB APBUART serial driver");
709MODULE_VERSION("2.1");
710MODULE_LICENSE("GPL");
diff --git a/drivers/serial/apbuart.h b/drivers/serial/apbuart.h
new file mode 100644
index 000000000000..5faf87c8d2bc
--- /dev/null
+++ b/drivers/serial/apbuart.h
@@ -0,0 +1,64 @@
1#ifndef __GRLIB_APBUART_H__
2#define __GRLIB_APBUART_H__
3
4#include <asm/io.h>
5
6#define UART_NR 8
7static int grlib_apbuart_port_nr;
8
9struct grlib_apbuart_regs_map {
10 u32 data;
11 u32 status;
12 u32 ctrl;
13 u32 scaler;
14};
15
16struct amba_prom_registers {
17 unsigned int phys_addr;
18 unsigned int reg_size;
19};
20
21/*
22 * The following defines the bits in the APBUART Status Registers.
23 */
24#define UART_STATUS_DR 0x00000001 /* Data Ready */
25#define UART_STATUS_TSE 0x00000002 /* TX Send Register Empty */
26#define UART_STATUS_THE 0x00000004 /* TX Hold Register Empty */
27#define UART_STATUS_BR 0x00000008 /* Break Error */
28#define UART_STATUS_OE 0x00000010 /* RX Overrun Error */
29#define UART_STATUS_PE 0x00000020 /* RX Parity Error */
30#define UART_STATUS_FE 0x00000040 /* RX Framing Error */
31#define UART_STATUS_ERR 0x00000078 /* Error Mask */
32
33/*
34 * The following defines the bits in the APBUART Ctrl Registers.
35 */
36#define UART_CTRL_RE 0x00000001 /* Receiver enable */
37#define UART_CTRL_TE 0x00000002 /* Transmitter enable */
38#define UART_CTRL_RI 0x00000004 /* Receiver interrupt enable */
39#define UART_CTRL_TI 0x00000008 /* Transmitter irq */
40#define UART_CTRL_PS 0x00000010 /* Parity select */
41#define UART_CTRL_PE 0x00000020 /* Parity enable */
42#define UART_CTRL_FL 0x00000040 /* Flow control enable */
43#define UART_CTRL_LB 0x00000080 /* Loopback enable */
44
45#define APBBASE(port) ((struct grlib_apbuart_regs_map *)((port)->membase))
46
47#define APBBASE_DATA_P(port) (&(APBBASE(port)->data))
48#define APBBASE_STATUS_P(port) (&(APBBASE(port)->status))
49#define APBBASE_CTRL_P(port) (&(APBBASE(port)->ctrl))
50#define APBBASE_SCALAR_P(port) (&(APBBASE(port)->scaler))
51
52#define UART_GET_CHAR(port) (__raw_readl(APBBASE_DATA_P(port)))
53#define UART_PUT_CHAR(port, v) (__raw_writel(v, APBBASE_DATA_P(port)))
54#define UART_GET_STATUS(port) (__raw_readl(APBBASE_STATUS_P(port)))
55#define UART_PUT_STATUS(port, v)(__raw_writel(v, APBBASE_STATUS_P(port)))
56#define UART_GET_CTRL(port) (__raw_readl(APBBASE_CTRL_P(port)))
57#define UART_PUT_CTRL(port, v) (__raw_writel(v, APBBASE_CTRL_P(port)))
58#define UART_GET_SCAL(port) (__raw_readl(APBBASE_SCALAR_P(port)))
59#define UART_PUT_SCAL(port, v) (__raw_writel(v, APBBASE_SCALAR_P(port)))
60
61#define UART_RX_DATA(s) (((s) & UART_STATUS_DR) != 0)
62#define UART_TX_READY(s) (((s) & UART_STATUS_THE) != 0)
63
64#endif /* __GRLIB_APBUART_H__ */
diff --git a/drivers/serial/atmel_serial.c b/drivers/serial/atmel_serial.c
index 9d948bccafaf..2c9bf9b68327 100644
--- a/drivers/serial/atmel_serial.c
+++ b/drivers/serial/atmel_serial.c
@@ -1213,6 +1213,24 @@ static int atmel_verify_port(struct uart_port *port, struct serial_struct *ser)
1213 return ret; 1213 return ret;
1214} 1214}
1215 1215
1216#ifdef CONFIG_CONSOLE_POLL
1217static int atmel_poll_get_char(struct uart_port *port)
1218{
1219 while (!(UART_GET_CSR(port) & ATMEL_US_RXRDY))
1220 cpu_relax();
1221
1222 return UART_GET_CHAR(port);
1223}
1224
1225static void atmel_poll_put_char(struct uart_port *port, unsigned char ch)
1226{
1227 while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
1228 cpu_relax();
1229
1230 UART_PUT_CHAR(port, ch);
1231}
1232#endif
1233
1216static struct uart_ops atmel_pops = { 1234static struct uart_ops atmel_pops = {
1217 .tx_empty = atmel_tx_empty, 1235 .tx_empty = atmel_tx_empty,
1218 .set_mctrl = atmel_set_mctrl, 1236 .set_mctrl = atmel_set_mctrl,
@@ -1232,6 +1250,10 @@ static struct uart_ops atmel_pops = {
1232 .config_port = atmel_config_port, 1250 .config_port = atmel_config_port,
1233 .verify_port = atmel_verify_port, 1251 .verify_port = atmel_verify_port,
1234 .pm = atmel_serial_pm, 1252 .pm = atmel_serial_pm,
1253#ifdef CONFIG_CONSOLE_POLL
1254 .poll_get_char = atmel_poll_get_char,
1255 .poll_put_char = atmel_poll_put_char,
1256#endif
1235}; 1257};
1236 1258
1237/* 1259/*
diff --git a/drivers/serial/bcm63xx_uart.c b/drivers/serial/bcm63xx_uart.c
index 37ad0c449937..a1a0e55d0807 100644
--- a/drivers/serial/bcm63xx_uart.c
+++ b/drivers/serial/bcm63xx_uart.c
@@ -35,7 +35,7 @@
35#include <bcm63xx_regs.h> 35#include <bcm63xx_regs.h>
36#include <bcm63xx_io.h> 36#include <bcm63xx_io.h>
37 37
38#define BCM63XX_NR_UARTS 1 38#define BCM63XX_NR_UARTS 2
39 39
40static struct uart_port ports[BCM63XX_NR_UARTS]; 40static struct uart_port ports[BCM63XX_NR_UARTS];
41 41
@@ -784,7 +784,7 @@ static struct uart_driver bcm_uart_driver = {
784 .dev_name = "ttyS", 784 .dev_name = "ttyS",
785 .major = TTY_MAJOR, 785 .major = TTY_MAJOR,
786 .minor = 64, 786 .minor = 64,
787 .nr = 1, 787 .nr = BCM63XX_NR_UARTS,
788 .cons = BCM63XX_CONSOLE, 788 .cons = BCM63XX_CONSOLE,
789}; 789};
790 790
@@ -826,11 +826,12 @@ static int __devinit bcm_uart_probe(struct platform_device *pdev)
826 port->dev = &pdev->dev; 826 port->dev = &pdev->dev;
827 port->fifosize = 16; 827 port->fifosize = 16;
828 port->uartclk = clk_get_rate(clk) / 2; 828 port->uartclk = clk_get_rate(clk) / 2;
829 port->line = pdev->id;
829 clk_put(clk); 830 clk_put(clk);
830 831
831 ret = uart_add_one_port(&bcm_uart_driver, port); 832 ret = uart_add_one_port(&bcm_uart_driver, port);
832 if (ret) { 833 if (ret) {
833 kfree(port); 834 ports[pdev->id].membase = 0;
834 return ret; 835 return ret;
835 } 836 }
836 platform_set_drvdata(pdev, port); 837 platform_set_drvdata(pdev, port);
diff --git a/drivers/serial/bfin_5xx.c b/drivers/serial/bfin_5xx.c
index 50abb7e557f4..96f7e7484fee 100644
--- a/drivers/serial/bfin_5xx.c
+++ b/drivers/serial/bfin_5xx.c
@@ -14,6 +14,8 @@
14 14
15#include <linux/module.h> 15#include <linux/module.h>
16#include <linux/ioport.h> 16#include <linux/ioport.h>
17#include <linux/gfp.h>
18#include <linux/io.h>
17#include <linux/init.h> 19#include <linux/init.h>
18#include <linux/console.h> 20#include <linux/console.h>
19#include <linux/sysrq.h> 21#include <linux/sysrq.h>
@@ -237,7 +239,8 @@ static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
237 239
238#if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \ 240#if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
239 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE) 241 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
240 if (kgdb_connected && kgdboc_port_line == uart->port.line) 242 if (kgdb_connected && kgdboc_port_line == uart->port.line
243 && kgdboc_break_enabled)
241 if (ch == 0x3) {/* Ctrl + C */ 244 if (ch == 0x3) {/* Ctrl + C */
242 kgdb_breakpoint(); 245 kgdb_breakpoint();
243 return; 246 return;
@@ -488,6 +491,7 @@ void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
488{ 491{
489 int x_pos, pos; 492 int x_pos, pos;
490 493
494 dma_disable_irq(uart->tx_dma_channel);
491 dma_disable_irq(uart->rx_dma_channel); 495 dma_disable_irq(uart->rx_dma_channel);
492 spin_lock_bh(&uart->port.lock); 496 spin_lock_bh(&uart->port.lock);
493 497
@@ -521,6 +525,7 @@ void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
521 } 525 }
522 526
523 spin_unlock_bh(&uart->port.lock); 527 spin_unlock_bh(&uart->port.lock);
528 dma_enable_irq(uart->tx_dma_channel);
524 dma_enable_irq(uart->rx_dma_channel); 529 dma_enable_irq(uart->rx_dma_channel);
525 530
526 mod_timer(&(uart->rx_dma_timer), jiffies + DMA_RX_FLUSH_JIFFIES); 531 mod_timer(&(uart->rx_dma_timer), jiffies + DMA_RX_FLUSH_JIFFIES);
@@ -746,15 +751,6 @@ static int bfin_serial_startup(struct uart_port *port)
746 Status interrupt.\n"); 751 Status interrupt.\n");
747 } 752 }
748 753
749 if (uart->cts_pin >= 0) {
750 gpio_request(uart->cts_pin, DRIVER_NAME);
751 gpio_direction_output(uart->cts_pin, 1);
752 }
753 if (uart->rts_pin >= 0) {
754 gpio_request(uart->rts_pin, DRIVER_NAME);
755 gpio_direction_output(uart->rts_pin, 0);
756 }
757
758 /* CTS RTS PINs are negative assertive. */ 754 /* CTS RTS PINs are negative assertive. */
759 UART_PUT_MCR(uart, ACTS); 755 UART_PUT_MCR(uart, ACTS);
760 UART_SET_IER(uart, EDSSI); 756 UART_SET_IER(uart, EDSSI);
@@ -801,10 +797,6 @@ static void bfin_serial_shutdown(struct uart_port *port)
801 gpio_free(uart->rts_pin); 797 gpio_free(uart->rts_pin);
802#endif 798#endif
803#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS 799#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
804 if (uart->cts_pin >= 0)
805 gpio_free(uart->cts_pin);
806 if (uart->rts_pin >= 0)
807 gpio_free(uart->rts_pin);
808 if (UART_GET_IER(uart) && EDSSI) 800 if (UART_GET_IER(uart) && EDSSI)
809 free_irq(uart->status_irq, uart); 801 free_irq(uart->status_irq, uart);
810#endif 802#endif
@@ -1409,8 +1401,7 @@ static int bfin_serial_remove(struct platform_device *dev)
1409 continue; 1401 continue;
1410 uart_remove_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port); 1402 uart_remove_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1411 bfin_serial_ports[i].port.dev = NULL; 1403 bfin_serial_ports[i].port.dev = NULL;
1412#if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \ 1404#if defined(CONFIG_SERIAL_BFIN_CTSRTS)
1413 defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
1414 gpio_free(bfin_serial_ports[i].cts_pin); 1405 gpio_free(bfin_serial_ports[i].cts_pin);
1415 gpio_free(bfin_serial_ports[i].rts_pin); 1406 gpio_free(bfin_serial_ports[i].rts_pin);
1416#endif 1407#endif
diff --git a/drivers/serial/bfin_sport_uart.c b/drivers/serial/bfin_sport_uart.c
index 088bb35475f1..c88f8ad3ff82 100644
--- a/drivers/serial/bfin_sport_uart.c
+++ b/drivers/serial/bfin_sport_uart.c
@@ -1,27 +1,11 @@
1/* 1/*
2 * File: linux/drivers/serial/bfin_sport_uart.c 2 * Blackfin On-Chip Sport Emulated UART Driver
3 * 3 *
4 * Based on: drivers/serial/bfin_5xx.c by Aubrey Li. 4 * Copyright 2006-2009 Analog Devices Inc.
5 * Author: Roy Huang <roy.huang@analog.com>
6 * 5 *
7 * Created: Nov 22, 2006 6 * Enter bugs at http://blackfin.uclinux.org/
8 * Copyright: (c) 2006-2007 Analog Devices Inc.
9 * Description: this driver enable SPORTs on Blackfin emulate UART.
10 * 7 *
11 * This program is free software; you can redistribute it and/or modify 8 * Licensed under the GPL-2 or later.
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, see the file COPYING, or write
23 * to the Free Software Foundation, Inc.,
24 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
25 */ 9 */
26 10
27/* 11/*
@@ -29,42 +13,22 @@
29 * http://www.analog.com/UploadedFiles/Application_Notes/399447663EE191.pdf 13 * http://www.analog.com/UploadedFiles/Application_Notes/399447663EE191.pdf
30 * This application note describe how to implement a UART on a Sharc DSP, 14 * This application note describe how to implement a UART on a Sharc DSP,
31 * but this driver is implemented on Blackfin Processor. 15 * but this driver is implemented on Blackfin Processor.
16 * Transmit Frame Sync is not used by this driver to transfer data out.
32 */ 17 */
33 18
34/* After reset, there is a prelude of low level pulse when transmit data first 19/* #define DEBUG */
35 * time. No addtional pulse in following transmit.
36 * According to document:
37 * The SPORTs are ready to start transmitting or receiving data no later than
38 * three serial clock cycles after they are enabled in the SPORTx_TCR1 or
39 * SPORTx_RCR1 register. No serial clock cycles are lost from this point on.
40 * The first internal frame sync will occur one frame sync delay after the
41 * SPORTs are ready. External frame syncs can occur as soon as the SPORT is
42 * ready.
43 */
44 20
45/* Thanks to Axel Alatalo <axel@rubico.se> for fixing sport rx bug. Sometimes 21#define DRV_NAME "bfin-sport-uart"
46 * sport receives data incorrectly. The following is Axel's words. 22#define DEVICE_NAME "ttySS"
47 * As EE-191, sport rx samples 3 times of the UART baudrate and takes the 23#define pr_fmt(fmt) DRV_NAME ": " fmt
48 * middle smaple of every 3 samples as the data bit. For a 8-N-1 UART setting,
49 * 30 samples will be required for a byte. If transmitter sends a 1/3 bit short
50 * byte due to buadrate drift, then the 30th sample of a byte, this sample is
51 * also the third sample of the stop bit, will happens on the immediately
52 * following start bit which will be thrown away and missed. Thus since parts
53 * of the startbit will be missed and the receiver will begin to drift, the
54 * effect accumulates over time until synchronization is lost.
55 * If only require 2 samples of the stopbit (by sampling in total 29 samples),
56 * then a to short byte as in the case above will be tolerated. Then the 1/3
57 * early startbit will trigger a framesync since the last read is complete
58 * after only 2/3 stopbit and framesync is active during the last 1/3 looking
59 * for a possible early startbit. */
60
61//#define DEBUG
62 24
63#include <linux/module.h> 25#include <linux/module.h>
64#include <linux/ioport.h> 26#include <linux/ioport.h>
27#include <linux/io.h>
65#include <linux/init.h> 28#include <linux/init.h>
66#include <linux/console.h> 29#include <linux/console.h>
67#include <linux/sysrq.h> 30#include <linux/sysrq.h>
31#include <linux/slab.h>
68#include <linux/platform_device.h> 32#include <linux/platform_device.h>
69#include <linux/tty.h> 33#include <linux/tty.h>
70#include <linux/tty_flip.h> 34#include <linux/tty_flip.h>
@@ -75,23 +39,36 @@
75 39
76#include "bfin_sport_uart.h" 40#include "bfin_sport_uart.h"
77 41
42#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
78unsigned short bfin_uart_pin_req_sport0[] = 43unsigned short bfin_uart_pin_req_sport0[] =
79 {P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS, \ 44 {P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS, \
80 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0}; 45 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0};
81 46#endif
47#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
82unsigned short bfin_uart_pin_req_sport1[] = 48unsigned short bfin_uart_pin_req_sport1[] =
83 {P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS, \ 49 {P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS, \
84 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0}; 50 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0};
85 51#endif
86#define DRV_NAME "bfin-sport-uart" 52#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
53unsigned short bfin_uart_pin_req_sport2[] =
54 {P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS, \
55 P_SPORT2_DRPRI, P_SPORT2_RSCLK, P_SPORT2_DRSEC, P_SPORT2_DTSEC, 0};
56#endif
57#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
58unsigned short bfin_uart_pin_req_sport3[] =
59 {P_SPORT3_TFS, P_SPORT3_DTPRI, P_SPORT3_TSCLK, P_SPORT3_RFS, \
60 P_SPORT3_DRPRI, P_SPORT3_RSCLK, P_SPORT3_DRSEC, P_SPORT3_DTSEC, 0};
61#endif
87 62
88struct sport_uart_port { 63struct sport_uart_port {
89 struct uart_port port; 64 struct uart_port port;
90 char *name;
91
92 int tx_irq;
93 int rx_irq;
94 int err_irq; 65 int err_irq;
66 unsigned short csize;
67 unsigned short rxmask;
68 unsigned short txmask1;
69 unsigned short txmask2;
70 unsigned char stopb;
71/* unsigned char parib; */
95}; 72};
96 73
97static void sport_uart_tx_chars(struct sport_uart_port *up); 74static void sport_uart_tx_chars(struct sport_uart_port *up);
@@ -99,36 +76,42 @@ static void sport_stop_tx(struct uart_port *port);
99 76
100static inline void tx_one_byte(struct sport_uart_port *up, unsigned int value) 77static inline void tx_one_byte(struct sport_uart_port *up, unsigned int value)
101{ 78{
102 pr_debug("%s value:%x\n", __func__, value); 79 pr_debug("%s value:%x, mask1=0x%x, mask2=0x%x\n", __func__, value,
103 /* Place a Start and Stop bit */ 80 up->txmask1, up->txmask2);
81
82 /* Place Start and Stop bits */
104 __asm__ __volatile__ ( 83 __asm__ __volatile__ (
105 "R2 = b#01111111100;" 84 "%[val] <<= 1;"
106 "R3 = b#10000000001;" 85 "%[val] = %[val] & %[mask1];"
107 "%0 <<= 2;" 86 "%[val] = %[val] | %[mask2];"
108 "%0 = %0 & R2;" 87 : [val]"+d"(value)
109 "%0 = %0 | R3;" 88 : [mask1]"d"(up->txmask1), [mask2]"d"(up->txmask2)
110 : "=d"(value) 89 : "ASTAT"
111 : "d"(value)
112 : "ASTAT", "R2", "R3"
113 ); 90 );
114 pr_debug("%s value:%x\n", __func__, value); 91 pr_debug("%s value:%x\n", __func__, value);
115 92
116 SPORT_PUT_TX(up, value); 93 SPORT_PUT_TX(up, value);
117} 94}
118 95
119static inline unsigned int rx_one_byte(struct sport_uart_port *up) 96static inline unsigned char rx_one_byte(struct sport_uart_port *up)
120{ 97{
121 unsigned int value, extract; 98 unsigned int value;
99 unsigned char extract;
122 u32 tmp_mask1, tmp_mask2, tmp_shift, tmp; 100 u32 tmp_mask1, tmp_mask2, tmp_shift, tmp;
123 101
124 value = SPORT_GET_RX32(up); 102 if ((up->csize + up->stopb) > 7)
125 pr_debug("%s value:%x\n", __func__, value); 103 value = SPORT_GET_RX32(up);
104 else
105 value = SPORT_GET_RX(up);
106
107 pr_debug("%s value:%x, cs=%d, mask=0x%x\n", __func__, value,
108 up->csize, up->rxmask);
126 109
127 /* Extract 8 bits data */ 110 /* Extract data */
128 __asm__ __volatile__ ( 111 __asm__ __volatile__ (
129 "%[extr] = 0;" 112 "%[extr] = 0;"
130 "%[mask1] = 0x1801(Z);" 113 "%[mask1] = %[rxmask];"
131 "%[mask2] = 0x0300(Z);" 114 "%[mask2] = 0x0200(Z);"
132 "%[shift] = 0;" 115 "%[shift] = 0;"
133 "LSETUP(.Lloop_s, .Lloop_e) LC0 = %[lc];" 116 "LSETUP(.Lloop_s, .Lloop_e) LC0 = %[lc];"
134 ".Lloop_s:" 117 ".Lloop_s:"
@@ -138,9 +121,9 @@ static inline unsigned int rx_one_byte(struct sport_uart_port *up)
138 "%[mask1] = %[mask1] - %[mask2];" 121 "%[mask1] = %[mask1] - %[mask2];"
139 ".Lloop_e:" 122 ".Lloop_e:"
140 "%[shift] += 1;" 123 "%[shift] += 1;"
141 : [val]"=d"(value), [extr]"=d"(extract), [shift]"=d"(tmp_shift), [tmp]"=d"(tmp), 124 : [extr]"=&d"(extract), [shift]"=&d"(tmp_shift), [tmp]"=&d"(tmp),
142 [mask1]"=d"(tmp_mask1), [mask2]"=d"(tmp_mask2) 125 [mask1]"=&d"(tmp_mask1), [mask2]"=&d"(tmp_mask2)
143 : "d"(value), [lc]"a"(8) 126 : [val]"d"(value), [rxmask]"d"(up->rxmask), [lc]"a"(up->csize)
144 : "ASTAT", "LB0", "LC0", "LT0" 127 : "ASTAT", "LB0", "LC0", "LT0"
145 ); 128 );
146 129
@@ -148,29 +131,28 @@ static inline unsigned int rx_one_byte(struct sport_uart_port *up)
148 return extract; 131 return extract;
149} 132}
150 133
151static int sport_uart_setup(struct sport_uart_port *up, int sclk, int baud_rate) 134static int sport_uart_setup(struct sport_uart_port *up, int size, int baud_rate)
152{ 135{
153 int tclkdiv, tfsdiv, rclkdiv; 136 int tclkdiv, rclkdiv;
137 unsigned int sclk = get_sclk();
154 138
155 /* Set TCR1 and TCR2 */ 139 /* Set TCR1 and TCR2, TFSR is not enabled for uart */
156 SPORT_PUT_TCR1(up, (LATFS | ITFS | TFSR | TLSBIT | ITCLK)); 140 SPORT_PUT_TCR1(up, (ITFS | TLSBIT | ITCLK));
157 SPORT_PUT_TCR2(up, 10); 141 SPORT_PUT_TCR2(up, size + 1);
158 pr_debug("%s TCR1:%x, TCR2:%x\n", __func__, SPORT_GET_TCR1(up), SPORT_GET_TCR2(up)); 142 pr_debug("%s TCR1:%x, TCR2:%x\n", __func__, SPORT_GET_TCR1(up), SPORT_GET_TCR2(up));
159 143
160 /* Set RCR1 and RCR2 */ 144 /* Set RCR1 and RCR2 */
161 SPORT_PUT_RCR1(up, (RCKFE | LARFS | LRFS | RFSR | IRCLK)); 145 SPORT_PUT_RCR1(up, (RCKFE | LARFS | LRFS | RFSR | IRCLK));
162 SPORT_PUT_RCR2(up, 28); 146 SPORT_PUT_RCR2(up, (size + 1) * 2 - 1);
163 pr_debug("%s RCR1:%x, RCR2:%x\n", __func__, SPORT_GET_RCR1(up), SPORT_GET_RCR2(up)); 147 pr_debug("%s RCR1:%x, RCR2:%x\n", __func__, SPORT_GET_RCR1(up), SPORT_GET_RCR2(up));
164 148
165 tclkdiv = sclk/(2 * baud_rate) - 1; 149 tclkdiv = sclk / (2 * baud_rate) - 1;
166 tfsdiv = 12; 150 rclkdiv = sclk / (2 * baud_rate * 2) - 1;
167 rclkdiv = sclk/(2 * baud_rate * 3) - 1;
168 SPORT_PUT_TCLKDIV(up, tclkdiv); 151 SPORT_PUT_TCLKDIV(up, tclkdiv);
169 SPORT_PUT_TFSDIV(up, tfsdiv);
170 SPORT_PUT_RCLKDIV(up, rclkdiv); 152 SPORT_PUT_RCLKDIV(up, rclkdiv);
171 SSYNC(); 153 SSYNC();
172 pr_debug("%s sclk:%d, baud_rate:%d, tclkdiv:%d, tfsdiv:%d, rclkdiv:%d\n", 154 pr_debug("%s sclk:%d, baud_rate:%d, tclkdiv:%d, rclkdiv:%d\n",
173 __func__, sclk, baud_rate, tclkdiv, tfsdiv, rclkdiv); 155 __func__, sclk, baud_rate, tclkdiv, rclkdiv);
174 156
175 return 0; 157 return 0;
176} 158}
@@ -181,23 +163,29 @@ static irqreturn_t sport_uart_rx_irq(int irq, void *dev_id)
181 struct tty_struct *tty = up->port.state->port.tty; 163 struct tty_struct *tty = up->port.state->port.tty;
182 unsigned int ch; 164 unsigned int ch;
183 165
184 do { 166 spin_lock(&up->port.lock);
167
168 while (SPORT_GET_STAT(up) & RXNE) {
185 ch = rx_one_byte(up); 169 ch = rx_one_byte(up);
186 up->port.icount.rx++; 170 up->port.icount.rx++;
187 171
188 if (uart_handle_sysrq_char(&up->port, ch)) 172 if (!uart_handle_sysrq_char(&up->port, ch))
189 ;
190 else
191 tty_insert_flip_char(tty, ch, TTY_NORMAL); 173 tty_insert_flip_char(tty, ch, TTY_NORMAL);
192 } while (SPORT_GET_STAT(up) & RXNE); 174 }
193 tty_flip_buffer_push(tty); 175 tty_flip_buffer_push(tty);
194 176
177 spin_unlock(&up->port.lock);
178
195 return IRQ_HANDLED; 179 return IRQ_HANDLED;
196} 180}
197 181
198static irqreturn_t sport_uart_tx_irq(int irq, void *dev_id) 182static irqreturn_t sport_uart_tx_irq(int irq, void *dev_id)
199{ 183{
200 sport_uart_tx_chars(dev_id); 184 struct sport_uart_port *up = dev_id;
185
186 spin_lock(&up->port.lock);
187 sport_uart_tx_chars(up);
188 spin_unlock(&up->port.lock);
201 189
202 return IRQ_HANDLED; 190 return IRQ_HANDLED;
203} 191}
@@ -208,6 +196,8 @@ static irqreturn_t sport_uart_err_irq(int irq, void *dev_id)
208 struct tty_struct *tty = up->port.state->port.tty; 196 struct tty_struct *tty = up->port.state->port.tty;
209 unsigned int stat = SPORT_GET_STAT(up); 197 unsigned int stat = SPORT_GET_STAT(up);
210 198
199 spin_lock(&up->port.lock);
200
211 /* Overflow in RX FIFO */ 201 /* Overflow in RX FIFO */
212 if (stat & ROVF) { 202 if (stat & ROVF) {
213 up->port.icount.overrun++; 203 up->port.icount.overrun++;
@@ -216,15 +206,16 @@ static irqreturn_t sport_uart_err_irq(int irq, void *dev_id)
216 } 206 }
217 /* These should not happen */ 207 /* These should not happen */
218 if (stat & (TOVF | TUVF | RUVF)) { 208 if (stat & (TOVF | TUVF | RUVF)) {
219 printk(KERN_ERR "SPORT Error:%s %s %s\n", 209 pr_err("SPORT Error:%s %s %s\n",
220 (stat & TOVF)?"TX overflow":"", 210 (stat & TOVF) ? "TX overflow" : "",
221 (stat & TUVF)?"TX underflow":"", 211 (stat & TUVF) ? "TX underflow" : "",
222 (stat & RUVF)?"RX underflow":""); 212 (stat & RUVF) ? "RX underflow" : "");
223 SPORT_PUT_TCR1(up, SPORT_GET_TCR1(up) & ~TSPEN); 213 SPORT_PUT_TCR1(up, SPORT_GET_TCR1(up) & ~TSPEN);
224 SPORT_PUT_RCR1(up, SPORT_GET_RCR1(up) & ~RSPEN); 214 SPORT_PUT_RCR1(up, SPORT_GET_RCR1(up) & ~RSPEN);
225 } 215 }
226 SSYNC(); 216 SSYNC();
227 217
218 spin_unlock(&up->port.lock);
228 return IRQ_HANDLED; 219 return IRQ_HANDLED;
229} 220}
230 221
@@ -232,60 +223,37 @@ static irqreturn_t sport_uart_err_irq(int irq, void *dev_id)
232static int sport_startup(struct uart_port *port) 223static int sport_startup(struct uart_port *port)
233{ 224{
234 struct sport_uart_port *up = (struct sport_uart_port *)port; 225 struct sport_uart_port *up = (struct sport_uart_port *)port;
235 char buffer[20]; 226 int ret;
236 int retval;
237 227
238 pr_debug("%s enter\n", __func__); 228 pr_debug("%s enter\n", __func__);
239 snprintf(buffer, 20, "%s rx", up->name); 229 ret = request_irq(up->port.irq, sport_uart_rx_irq, 0,
240 retval = request_irq(up->rx_irq, sport_uart_rx_irq, IRQF_SAMPLE_RANDOM, buffer, up); 230 "SPORT_UART_RX", up);
241 if (retval) { 231 if (ret) {
242 printk(KERN_ERR "Unable to request interrupt %s\n", buffer); 232 dev_err(port->dev, "unable to request SPORT RX interrupt\n");
243 return retval; 233 return ret;
244 } 234 }
245 235
246 snprintf(buffer, 20, "%s tx", up->name); 236 ret = request_irq(up->port.irq+1, sport_uart_tx_irq, 0,
247 retval = request_irq(up->tx_irq, sport_uart_tx_irq, IRQF_SAMPLE_RANDOM, buffer, up); 237 "SPORT_UART_TX", up);
248 if (retval) { 238 if (ret) {
249 printk(KERN_ERR "Unable to request interrupt %s\n", buffer); 239 dev_err(port->dev, "unable to request SPORT TX interrupt\n");
250 goto fail1; 240 goto fail1;
251 } 241 }
252 242
253 snprintf(buffer, 20, "%s err", up->name); 243 ret = request_irq(up->err_irq, sport_uart_err_irq, 0,
254 retval = request_irq(up->err_irq, sport_uart_err_irq, IRQF_SAMPLE_RANDOM, buffer, up); 244 "SPORT_UART_STATUS", up);
255 if (retval) { 245 if (ret) {
256 printk(KERN_ERR "Unable to request interrupt %s\n", buffer); 246 dev_err(port->dev, "unable to request SPORT status interrupt\n");
257 goto fail2; 247 goto fail2;
258 } 248 }
259 249
260 if (port->line) {
261 if (peripheral_request_list(bfin_uart_pin_req_sport1, DRV_NAME))
262 goto fail3;
263 } else {
264 if (peripheral_request_list(bfin_uart_pin_req_sport0, DRV_NAME))
265 goto fail3;
266 }
267
268 sport_uart_setup(up, get_sclk(), port->uartclk);
269
270 /* Enable receive interrupt */
271 SPORT_PUT_RCR1(up, (SPORT_GET_RCR1(up) | RSPEN));
272 SSYNC();
273
274 return 0; 250 return 0;
251 fail2:
252 free_irq(up->port.irq+1, up);
253 fail1:
254 free_irq(up->port.irq, up);
275 255
276 256 return ret;
277fail3:
278 printk(KERN_ERR DRV_NAME
279 ": Requesting Peripherals failed\n");
280
281 free_irq(up->err_irq, up);
282fail2:
283 free_irq(up->tx_irq, up);
284fail1:
285 free_irq(up->rx_irq, up);
286
287 return retval;
288
289} 257}
290 258
291static void sport_uart_tx_chars(struct sport_uart_port *up) 259static void sport_uart_tx_chars(struct sport_uart_port *up)
@@ -344,20 +312,17 @@ static void sport_set_mctrl(struct uart_port *port, unsigned int mctrl)
344static void sport_stop_tx(struct uart_port *port) 312static void sport_stop_tx(struct uart_port *port)
345{ 313{
346 struct sport_uart_port *up = (struct sport_uart_port *)port; 314 struct sport_uart_port *up = (struct sport_uart_port *)port;
347 unsigned int stat;
348 315
349 pr_debug("%s enter\n", __func__); 316 pr_debug("%s enter\n", __func__);
350 317
351 stat = SPORT_GET_STAT(up);
352 while(!(stat & TXHRE)) {
353 udelay(1);
354 stat = SPORT_GET_STAT(up);
355 }
356 /* Although the hold register is empty, last byte is still in shift 318 /* Although the hold register is empty, last byte is still in shift
357 * register and not sent out yet. If baud rate is lower than default, 319 * register and not sent out yet. So, put a dummy data into TX FIFO.
358 * delay should be longer. For example, if the baud rate is 9600, 320 * Then, sport tx stops when last byte is shift out and the dummy
359 * the delay must be at least 2ms by experience */ 321 * data is moved into the shift register.
360 udelay(500); 322 */
323 SPORT_PUT_TX(up, 0xffff);
324 while (!(SPORT_GET_STAT(up) & TXHRE))
325 cpu_relax();
361 326
362 SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) & ~TSPEN)); 327 SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) & ~TSPEN));
363 SSYNC(); 328 SSYNC();
@@ -370,6 +335,7 @@ static void sport_start_tx(struct uart_port *port)
370 struct sport_uart_port *up = (struct sport_uart_port *)port; 335 struct sport_uart_port *up = (struct sport_uart_port *)port;
371 336
372 pr_debug("%s enter\n", __func__); 337 pr_debug("%s enter\n", __func__);
338
373 /* Write data into SPORT FIFO before enable SPROT to transmit */ 339 /* Write data into SPORT FIFO before enable SPROT to transmit */
374 sport_uart_tx_chars(up); 340 sport_uart_tx_chars(up);
375 341
@@ -403,37 +369,24 @@ static void sport_shutdown(struct uart_port *port)
403{ 369{
404 struct sport_uart_port *up = (struct sport_uart_port *)port; 370 struct sport_uart_port *up = (struct sport_uart_port *)port;
405 371
406 pr_debug("%s enter\n", __func__); 372 dev_dbg(port->dev, "%s enter\n", __func__);
407 373
408 /* Disable sport */ 374 /* Disable sport */
409 SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) & ~TSPEN)); 375 SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) & ~TSPEN));
410 SPORT_PUT_RCR1(up, (SPORT_GET_RCR1(up) & ~RSPEN)); 376 SPORT_PUT_RCR1(up, (SPORT_GET_RCR1(up) & ~RSPEN));
411 SSYNC(); 377 SSYNC();
412 378
413 if (port->line) { 379 free_irq(up->port.irq, up);
414 peripheral_free_list(bfin_uart_pin_req_sport1); 380 free_irq(up->port.irq+1, up);
415 } else {
416 peripheral_free_list(bfin_uart_pin_req_sport0);
417 }
418
419 free_irq(up->rx_irq, up);
420 free_irq(up->tx_irq, up);
421 free_irq(up->err_irq, up); 381 free_irq(up->err_irq, up);
422} 382}
423 383
424static void sport_set_termios(struct uart_port *port,
425 struct ktermios *termios, struct ktermios *old)
426{
427 pr_debug("%s enter, c_cflag:%08x\n", __func__, termios->c_cflag);
428 uart_update_timeout(port, CS8 ,port->uartclk);
429}
430
431static const char *sport_type(struct uart_port *port) 384static const char *sport_type(struct uart_port *port)
432{ 385{
433 struct sport_uart_port *up = (struct sport_uart_port *)port; 386 struct sport_uart_port *up = (struct sport_uart_port *)port;
434 387
435 pr_debug("%s enter\n", __func__); 388 pr_debug("%s enter\n", __func__);
436 return up->name; 389 return up->port.type == PORT_BFIN_SPORT ? "BFIN-SPORT-UART" : NULL;
437} 390}
438 391
439static void sport_release_port(struct uart_port *port) 392static void sport_release_port(struct uart_port *port)
@@ -461,6 +414,110 @@ static int sport_verify_port(struct uart_port *port, struct serial_struct *ser)
461 return 0; 414 return 0;
462} 415}
463 416
417static void sport_set_termios(struct uart_port *port,
418 struct ktermios *termios, struct ktermios *old)
419{
420 struct sport_uart_port *up = (struct sport_uart_port *)port;
421 unsigned long flags;
422 int i;
423
424 pr_debug("%s enter, c_cflag:%08x\n", __func__, termios->c_cflag);
425
426 switch (termios->c_cflag & CSIZE) {
427 case CS8:
428 up->csize = 8;
429 break;
430 case CS7:
431 up->csize = 7;
432 break;
433 case CS6:
434 up->csize = 6;
435 break;
436 case CS5:
437 up->csize = 5;
438 break;
439 default:
440 pr_warning("requested word length not supported\n");
441 }
442
443 if (termios->c_cflag & CSTOPB) {
444 up->stopb = 1;
445 }
446 if (termios->c_cflag & PARENB) {
447 pr_warning("PAREN bits is not supported yet\n");
448 /* up->parib = 1; */
449 }
450
451 port->read_status_mask = OE;
452 if (termios->c_iflag & INPCK)
453 port->read_status_mask |= (FE | PE);
454 if (termios->c_iflag & (BRKINT | PARMRK))
455 port->read_status_mask |= BI;
456
457 /*
458 * Characters to ignore
459 */
460 port->ignore_status_mask = 0;
461 if (termios->c_iflag & IGNPAR)
462 port->ignore_status_mask |= FE | PE;
463 if (termios->c_iflag & IGNBRK) {
464 port->ignore_status_mask |= BI;
465 /*
466 * If we're ignoring parity and break indicators,
467 * ignore overruns too (for real raw support).
468 */
469 if (termios->c_iflag & IGNPAR)
470 port->ignore_status_mask |= OE;
471 }
472
473 /* RX extract mask */
474 up->rxmask = 0x01 | (((up->csize + up->stopb) * 2 - 1) << 0x8);
475 /* TX masks, 8 bit data and 1 bit stop for example:
476 * mask1 = b#0111111110
477 * mask2 = b#1000000000
478 */
479 for (i = 0, up->txmask1 = 0; i < up->csize; i++)
480 up->txmask1 |= (1<<i);
481 up->txmask2 = (1<<i);
482 if (up->stopb) {
483 ++i;
484 up->txmask2 |= (1<<i);
485 }
486 up->txmask1 <<= 1;
487 up->txmask2 <<= 1;
488 /* uart baud rate */
489 port->uartclk = uart_get_baud_rate(port, termios, old, 0, get_sclk()/16);
490
491 spin_lock_irqsave(&up->port.lock, flags);
492
493 /* Disable UART */
494 SPORT_PUT_TCR1(up, SPORT_GET_TCR1(up) & ~TSPEN);
495 SPORT_PUT_RCR1(up, SPORT_GET_RCR1(up) & ~RSPEN);
496
497 sport_uart_setup(up, up->csize + up->stopb, port->uartclk);
498
499 /* driver TX line high after config, one dummy data is
500 * necessary to stop sport after shift one byte
501 */
502 SPORT_PUT_TX(up, 0xffff);
503 SPORT_PUT_TX(up, 0xffff);
504 SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) | TSPEN));
505 SSYNC();
506 while (!(SPORT_GET_STAT(up) & TXHRE))
507 cpu_relax();
508 SPORT_PUT_TCR1(up, SPORT_GET_TCR1(up) & ~TSPEN);
509 SSYNC();
510
511 /* Port speed changed, update the per-port timeout. */
512 uart_update_timeout(port, termios->c_cflag, port->uartclk);
513
514 /* Enable sport rx */
515 SPORT_PUT_RCR1(up, SPORT_GET_RCR1(up) | RSPEN);
516 SSYNC();
517
518 spin_unlock_irqrestore(&up->port.lock, flags);
519}
520
464struct uart_ops sport_uart_ops = { 521struct uart_ops sport_uart_ops = {
465 .tx_empty = sport_tx_empty, 522 .tx_empty = sport_tx_empty,
466 .set_mctrl = sport_set_mctrl, 523 .set_mctrl = sport_set_mctrl,
@@ -480,138 +537,319 @@ struct uart_ops sport_uart_ops = {
480 .verify_port = sport_verify_port, 537 .verify_port = sport_verify_port,
481}; 538};
482 539
483static struct sport_uart_port sport_uart_ports[] = { 540#define BFIN_SPORT_UART_MAX_PORTS 4
484 { /* SPORT 0 */ 541
485 .name = "SPORT0", 542static struct sport_uart_port *bfin_sport_uart_ports[BFIN_SPORT_UART_MAX_PORTS];
486 .tx_irq = IRQ_SPORT0_TX, 543
487 .rx_irq = IRQ_SPORT0_RX, 544#ifdef CONFIG_SERIAL_BFIN_SPORT_CONSOLE
488 .err_irq= IRQ_SPORT0_ERROR, 545static int __init
489 .port = { 546sport_uart_console_setup(struct console *co, char *options)
490 .type = PORT_BFIN_SPORT, 547{
491 .iotype = UPIO_MEM, 548 struct sport_uart_port *up;
492 .membase = (void __iomem *)SPORT0_TCR1, 549 int baud = 57600;
493 .mapbase = SPORT0_TCR1, 550 int bits = 8;
494 .irq = IRQ_SPORT0_RX, 551 int parity = 'n';
495 .uartclk = CONFIG_SPORT_BAUD_RATE, 552 int flow = 'n';
496 .fifosize = 8, 553
497 .ops = &sport_uart_ops, 554 /* Check whether an invalid uart number has been specified */
498 .line = 0, 555 if (co->index < 0 || co->index >= BFIN_SPORT_UART_MAX_PORTS)
499 }, 556 return -ENODEV;
500 }, { /* SPORT 1 */ 557
501 .name = "SPORT1", 558 up = bfin_sport_uart_ports[co->index];
502 .tx_irq = IRQ_SPORT1_TX, 559 if (!up)
503 .rx_irq = IRQ_SPORT1_RX, 560 return -ENODEV;
504 .err_irq= IRQ_SPORT1_ERROR, 561
505 .port = { 562 if (options)
506 .type = PORT_BFIN_SPORT, 563 uart_parse_options(options, &baud, &parity, &bits, &flow);
507 .iotype = UPIO_MEM, 564
508 .membase = (void __iomem *)SPORT1_TCR1, 565 return uart_set_options(&up->port, co, baud, parity, bits, flow);
509 .mapbase = SPORT1_TCR1, 566}
510 .irq = IRQ_SPORT1_RX, 567
511 .uartclk = CONFIG_SPORT_BAUD_RATE, 568static void sport_uart_console_putchar(struct uart_port *port, int ch)
512 .fifosize = 8, 569{
513 .ops = &sport_uart_ops, 570 struct sport_uart_port *up = (struct sport_uart_port *)port;
514 .line = 1, 571
515 }, 572 while (SPORT_GET_STAT(up) & TXF)
573 barrier();
574
575 tx_one_byte(up, ch);
576}
577
578/*
579 * Interrupts are disabled on entering
580 */
581static void
582sport_uart_console_write(struct console *co, const char *s, unsigned int count)
583{
584 struct sport_uart_port *up = bfin_sport_uart_ports[co->index];
585 unsigned long flags;
586
587 spin_lock_irqsave(&up->port.lock, flags);
588
589 if (SPORT_GET_TCR1(up) & TSPEN)
590 uart_console_write(&up->port, s, count, sport_uart_console_putchar);
591 else {
592 /* dummy data to start sport */
593 while (SPORT_GET_STAT(up) & TXF)
594 barrier();
595 SPORT_PUT_TX(up, 0xffff);
596 /* Enable transmit, then an interrupt will generated */
597 SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) | TSPEN));
598 SSYNC();
599
600 uart_console_write(&up->port, s, count, sport_uart_console_putchar);
601
602 /* Although the hold register is empty, last byte is still in shift
603 * register and not sent out yet. So, put a dummy data into TX FIFO.
604 * Then, sport tx stops when last byte is shift out and the dummy
605 * data is moved into the shift register.
606 */
607 while (SPORT_GET_STAT(up) & TXF)
608 barrier();
609 SPORT_PUT_TX(up, 0xffff);
610 while (!(SPORT_GET_STAT(up) & TXHRE))
611 barrier();
612
613 /* Stop sport tx transfer */
614 SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) & ~TSPEN));
615 SSYNC();
516 } 616 }
617
618 spin_unlock_irqrestore(&up->port.lock, flags);
619}
620
621static struct uart_driver sport_uart_reg;
622
623static struct console sport_uart_console = {
624 .name = DEVICE_NAME,
625 .write = sport_uart_console_write,
626 .device = uart_console_device,
627 .setup = sport_uart_console_setup,
628 .flags = CON_PRINTBUFFER,
629 .index = -1,
630 .data = &sport_uart_reg,
517}; 631};
518 632
633#define SPORT_UART_CONSOLE (&sport_uart_console)
634#else
635#define SPORT_UART_CONSOLE NULL
636#endif /* CONFIG_SERIAL_BFIN_SPORT_CONSOLE */
637
638
519static struct uart_driver sport_uart_reg = { 639static struct uart_driver sport_uart_reg = {
520 .owner = THIS_MODULE, 640 .owner = THIS_MODULE,
521 .driver_name = "SPORT-UART", 641 .driver_name = DRV_NAME,
522 .dev_name = "ttySS", 642 .dev_name = DEVICE_NAME,
523 .major = 204, 643 .major = 204,
524 .minor = 84, 644 .minor = 84,
525 .nr = ARRAY_SIZE(sport_uart_ports), 645 .nr = BFIN_SPORT_UART_MAX_PORTS,
526 .cons = NULL, 646 .cons = SPORT_UART_CONSOLE,
527}; 647};
528 648
529static int sport_uart_suspend(struct platform_device *dev, pm_message_t state) 649#ifdef CONFIG_PM
650static int sport_uart_suspend(struct device *dev)
530{ 651{
531 struct sport_uart_port *sport = platform_get_drvdata(dev); 652 struct sport_uart_port *sport = dev_get_drvdata(dev);
532 653
533 pr_debug("%s enter\n", __func__); 654 dev_dbg(dev, "%s enter\n", __func__);
534 if (sport) 655 if (sport)
535 uart_suspend_port(&sport_uart_reg, &sport->port); 656 uart_suspend_port(&sport_uart_reg, &sport->port);
536 657
537 return 0; 658 return 0;
538} 659}
539 660
540static int sport_uart_resume(struct platform_device *dev) 661static int sport_uart_resume(struct device *dev)
541{ 662{
542 struct sport_uart_port *sport = platform_get_drvdata(dev); 663 struct sport_uart_port *sport = dev_get_drvdata(dev);
543 664
544 pr_debug("%s enter\n", __func__); 665 dev_dbg(dev, "%s enter\n", __func__);
545 if (sport) 666 if (sport)
546 uart_resume_port(&sport_uart_reg, &sport->port); 667 uart_resume_port(&sport_uart_reg, &sport->port);
547 668
548 return 0; 669 return 0;
549} 670}
550 671
551static int sport_uart_probe(struct platform_device *dev) 672static struct dev_pm_ops bfin_sport_uart_dev_pm_ops = {
673 .suspend = sport_uart_suspend,
674 .resume = sport_uart_resume,
675};
676#endif
677
678static int __devinit sport_uart_probe(struct platform_device *pdev)
552{ 679{
553 pr_debug("%s enter\n", __func__); 680 struct resource *res;
554 sport_uart_ports[dev->id].port.dev = &dev->dev; 681 struct sport_uart_port *sport;
555 uart_add_one_port(&sport_uart_reg, &sport_uart_ports[dev->id].port); 682 int ret = 0;
556 platform_set_drvdata(dev, &sport_uart_ports[dev->id]);
557 683
558 return 0; 684 dev_dbg(&pdev->dev, "%s enter\n", __func__);
685
686 if (pdev->id < 0 || pdev->id >= BFIN_SPORT_UART_MAX_PORTS) {
687 dev_err(&pdev->dev, "Wrong sport uart platform device id.\n");
688 return -ENOENT;
689 }
690
691 if (bfin_sport_uart_ports[pdev->id] == NULL) {
692 bfin_sport_uart_ports[pdev->id] =
693 kmalloc(sizeof(struct sport_uart_port), GFP_KERNEL);
694 sport = bfin_sport_uart_ports[pdev->id];
695 if (!sport) {
696 dev_err(&pdev->dev,
697 "Fail to kmalloc sport_uart_port\n");
698 return -ENOMEM;
699 }
700
701 ret = peripheral_request_list(
702 (unsigned short *)pdev->dev.platform_data, DRV_NAME);
703 if (ret) {
704 dev_err(&pdev->dev,
705 "Fail to request SPORT peripherals\n");
706 goto out_error_free_mem;
707 }
708
709 spin_lock_init(&sport->port.lock);
710 sport->port.fifosize = SPORT_TX_FIFO_SIZE,
711 sport->port.ops = &sport_uart_ops;
712 sport->port.line = pdev->id;
713 sport->port.iotype = UPIO_MEM;
714 sport->port.flags = UPF_BOOT_AUTOCONF;
715
716 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
717 if (res == NULL) {
718 dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
719 ret = -ENOENT;
720 goto out_error_free_peripherals;
721 }
722
723 sport->port.membase = ioremap(res->start,
724 res->end - res->start);
725 if (!sport->port.membase) {
726 dev_err(&pdev->dev, "Cannot map sport IO\n");
727 ret = -ENXIO;
728 goto out_error_free_peripherals;
729 }
730
731 sport->port.irq = platform_get_irq(pdev, 0);
732 if (sport->port.irq < 0) {
733 dev_err(&pdev->dev, "No sport RX/TX IRQ specified\n");
734 ret = -ENOENT;
735 goto out_error_unmap;
736 }
737
738 sport->err_irq = platform_get_irq(pdev, 1);
739 if (sport->err_irq < 0) {
740 dev_err(&pdev->dev, "No sport status IRQ specified\n");
741 ret = -ENOENT;
742 goto out_error_unmap;
743 }
744 }
745
746#ifdef CONFIG_SERIAL_BFIN_SPORT_CONSOLE
747 if (!is_early_platform_device(pdev)) {
748#endif
749 sport = bfin_sport_uart_ports[pdev->id];
750 sport->port.dev = &pdev->dev;
751 dev_set_drvdata(&pdev->dev, sport);
752 ret = uart_add_one_port(&sport_uart_reg, &sport->port);
753#ifdef CONFIG_SERIAL_BFIN_SPORT_CONSOLE
754 }
755#endif
756 if (!ret)
757 return 0;
758
759 if (sport) {
760out_error_unmap:
761 iounmap(sport->port.membase);
762out_error_free_peripherals:
763 peripheral_free_list(
764 (unsigned short *)pdev->dev.platform_data);
765out_error_free_mem:
766 kfree(sport);
767 bfin_sport_uart_ports[pdev->id] = NULL;
768 }
769
770 return ret;
559} 771}
560 772
561static int sport_uart_remove(struct platform_device *dev) 773static int __devexit sport_uart_remove(struct platform_device *pdev)
562{ 774{
563 struct sport_uart_port *sport = platform_get_drvdata(dev); 775 struct sport_uart_port *sport = platform_get_drvdata(pdev);
564 776
565 pr_debug("%s enter\n", __func__); 777 dev_dbg(&pdev->dev, "%s enter\n", __func__);
566 platform_set_drvdata(dev, NULL); 778 dev_set_drvdata(&pdev->dev, NULL);
567 779
568 if (sport) 780 if (sport) {
569 uart_remove_one_port(&sport_uart_reg, &sport->port); 781 uart_remove_one_port(&sport_uart_reg, &sport->port);
782 iounmap(sport->port.membase);
783 peripheral_free_list(
784 (unsigned short *)pdev->dev.platform_data);
785 kfree(sport);
786 bfin_sport_uart_ports[pdev->id] = NULL;
787 }
570 788
571 return 0; 789 return 0;
572} 790}
573 791
574static struct platform_driver sport_uart_driver = { 792static struct platform_driver sport_uart_driver = {
575 .probe = sport_uart_probe, 793 .probe = sport_uart_probe,
576 .remove = sport_uart_remove, 794 .remove = __devexit_p(sport_uart_remove),
577 .suspend = sport_uart_suspend,
578 .resume = sport_uart_resume,
579 .driver = { 795 .driver = {
580 .name = DRV_NAME, 796 .name = DRV_NAME,
797#ifdef CONFIG_PM
798 .pm = &bfin_sport_uart_dev_pm_ops,
799#endif
581 }, 800 },
582}; 801};
583 802
803#ifdef CONFIG_SERIAL_BFIN_SPORT_CONSOLE
804static __initdata struct early_platform_driver early_sport_uart_driver = {
805 .class_str = DRV_NAME,
806 .pdrv = &sport_uart_driver,
807 .requested_id = EARLY_PLATFORM_ID_UNSET,
808};
809
810static int __init sport_uart_rs_console_init(void)
811{
812 early_platform_driver_register(&early_sport_uart_driver, DRV_NAME);
813
814 early_platform_driver_probe(DRV_NAME, BFIN_SPORT_UART_MAX_PORTS, 0);
815
816 register_console(&sport_uart_console);
817
818 return 0;
819}
820console_initcall(sport_uart_rs_console_init);
821#endif
822
584static int __init sport_uart_init(void) 823static int __init sport_uart_init(void)
585{ 824{
586 int ret; 825 int ret;
587 826
588 pr_debug("%s enter\n", __func__); 827 pr_info("Serial: Blackfin uart over sport driver\n");
828
589 ret = uart_register_driver(&sport_uart_reg); 829 ret = uart_register_driver(&sport_uart_reg);
590 if (ret != 0) { 830 if (ret) {
591 printk(KERN_ERR "Failed to register %s:%d\n", 831 pr_err("failed to register %s:%d\n",
592 sport_uart_reg.driver_name, ret); 832 sport_uart_reg.driver_name, ret);
593 return ret; 833 return ret;
594 } 834 }
595 835
596 ret = platform_driver_register(&sport_uart_driver); 836 ret = platform_driver_register(&sport_uart_driver);
597 if (ret != 0) { 837 if (ret) {
598 printk(KERN_ERR "Failed to register sport uart driver:%d\n", ret); 838 pr_err("failed to register sport uart driver:%d\n", ret);
599 uart_unregister_driver(&sport_uart_reg); 839 uart_unregister_driver(&sport_uart_reg);
600 } 840 }
601 841
602
603 pr_debug("%s exit\n", __func__);
604 return ret; 842 return ret;
605} 843}
844module_init(sport_uart_init);
606 845
607static void __exit sport_uart_exit(void) 846static void __exit sport_uart_exit(void)
608{ 847{
609 pr_debug("%s enter\n", __func__);
610 platform_driver_unregister(&sport_uart_driver); 848 platform_driver_unregister(&sport_uart_driver);
611 uart_unregister_driver(&sport_uart_reg); 849 uart_unregister_driver(&sport_uart_reg);
612} 850}
613
614module_init(sport_uart_init);
615module_exit(sport_uart_exit); 851module_exit(sport_uart_exit);
616 852
853MODULE_AUTHOR("Sonic Zhang, Roy Huang");
854MODULE_DESCRIPTION("Blackfin serial over SPORT driver");
617MODULE_LICENSE("GPL"); 855MODULE_LICENSE("GPL");
diff --git a/drivers/serial/bfin_sport_uart.h b/drivers/serial/bfin_sport_uart.h
index 671d41cc1a3f..abe03614e4df 100644
--- a/drivers/serial/bfin_sport_uart.h
+++ b/drivers/serial/bfin_sport_uart.h
@@ -1,29 +1,23 @@
1/* 1/*
2 * File: linux/drivers/serial/bfin_sport_uart.h 2 * Blackfin On-Chip Sport Emulated UART Driver
3 * 3 *
4 * Based on: include/asm-blackfin/mach-533/bfin_serial_5xx.h 4 * Copyright 2006-2008 Analog Devices Inc.
5 * Author: Roy Huang <roy.huang>analog.com>
6 * 5 *
7 * Created: Nov 22, 2006 6 * Enter bugs at http://blackfin.uclinux.org/
8 * Copyright: (C) Analog Device Inc.
9 * Description: this driver enable SPORTs on Blackfin emulate UART.
10 * 7 *
11 * This program is free software; you can redistribute it and/or modify 8 * Licensed under the GPL-2 or later.
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, see the file COPYING, or write
23 * to the Free Software Foundation, Inc.,
24 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
25 */ 9 */
26 10
11/*
12 * This driver and the hardware supported are in term of EE-191 of ADI.
13 * http://www.analog.com/UploadedFiles/Application_Notes/399447663EE191.pdf
14 * This application note describe how to implement a UART on a Sharc DSP,
15 * but this driver is implemented on Blackfin Processor.
16 * Transmit Frame Sync is not used by this driver to transfer data out.
17 */
18
19#ifndef _BFIN_SPORT_UART_H
20#define _BFIN_SPORT_UART_H
27 21
28#define OFFSET_TCR1 0x00 /* Transmit Configuration 1 Register */ 22#define OFFSET_TCR1 0x00 /* Transmit Configuration 1 Register */
29#define OFFSET_TCR2 0x04 /* Transmit Configuration 2 Register */ 23#define OFFSET_TCR2 0x04 /* Transmit Configuration 2 Register */
@@ -61,3 +55,7 @@
61#define SPORT_PUT_RCLKDIV(sport, v) bfin_write16(((sport)->port.membase + OFFSET_RCLKDIV), v) 55#define SPORT_PUT_RCLKDIV(sport, v) bfin_write16(((sport)->port.membase + OFFSET_RCLKDIV), v)
62#define SPORT_PUT_RFSDIV(sport, v) bfin_write16(((sport)->port.membase + OFFSET_RFSDIV), v) 56#define SPORT_PUT_RFSDIV(sport, v) bfin_write16(((sport)->port.membase + OFFSET_RFSDIV), v)
63#define SPORT_PUT_STAT(sport, v) bfin_write16(((sport)->port.membase + OFFSET_STAT), v) 57#define SPORT_PUT_STAT(sport, v) bfin_write16(((sport)->port.membase + OFFSET_STAT), v)
58
59#define SPORT_TX_FIFO_SIZE 8
60
61#endif /* _BFIN_SPORT_UART_H */
diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm1.c b/drivers/serial/cpm_uart/cpm_uart_cpm1.c
index 1b94c56ec239..3fc1d66e32c6 100644
--- a/drivers/serial/cpm_uart/cpm_uart_cpm1.c
+++ b/drivers/serial/cpm_uart/cpm_uart_cpm1.c
@@ -29,6 +29,7 @@
29 29
30#include <linux/module.h> 30#include <linux/module.h>
31#include <linux/tty.h> 31#include <linux/tty.h>
32#include <linux/gfp.h>
32#include <linux/ioport.h> 33#include <linux/ioport.h>
33#include <linux/init.h> 34#include <linux/init.h>
34#include <linux/serial.h> 35#include <linux/serial.h>
diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm2.c b/drivers/serial/cpm_uart/cpm_uart_cpm2.c
index a9802e76b5fa..814ac006393f 100644
--- a/drivers/serial/cpm_uart/cpm_uart_cpm2.c
+++ b/drivers/serial/cpm_uart/cpm_uart_cpm2.c
@@ -30,6 +30,7 @@
30#include <linux/module.h> 30#include <linux/module.h>
31#include <linux/tty.h> 31#include <linux/tty.h>
32#include <linux/ioport.h> 32#include <linux/ioport.h>
33#include <linux/slab.h>
33#include <linux/init.h> 34#include <linux/init.h>
34#include <linux/serial.h> 35#include <linux/serial.h>
35#include <linux/console.h> 36#include <linux/console.h>
@@ -61,7 +62,7 @@ void __iomem *cpm_uart_map_pram(struct uart_cpm_port *port,
61 void __iomem *pram; 62 void __iomem *pram;
62 unsigned long offset; 63 unsigned long offset;
63 struct resource res; 64 struct resource res;
64 unsigned long len; 65 resource_size_t len;
65 66
66 /* Don't remap parameter RAM if it has already been initialized 67 /* Don't remap parameter RAM if it has already been initialized
67 * during console setup. 68 * during console setup.
@@ -74,7 +75,7 @@ void __iomem *cpm_uart_map_pram(struct uart_cpm_port *port,
74 if (of_address_to_resource(np, 1, &res)) 75 if (of_address_to_resource(np, 1, &res))
75 return NULL; 76 return NULL;
76 77
77 len = 1 + res.end - res.start; 78 len = resource_size(&res);
78 pram = ioremap(res.start, len); 79 pram = ioremap(res.start, len);
79 if (!pram) 80 if (!pram)
80 return NULL; 81 return NULL;
diff --git a/drivers/serial/icom.c b/drivers/serial/icom.c
index 0028b6f89ce6..53a468227056 100644
--- a/drivers/serial/icom.c
+++ b/drivers/serial/icom.c
@@ -751,7 +751,6 @@ static void recv_interrupt(u16 port_int_reg, struct icom_port *icom_port)
751 trace(icom_port, "FID_STATUS", status); 751 trace(icom_port, "FID_STATUS", status);
752 count = cpu_to_le16(icom_port->statStg->rcv[rcv_buff].leLength); 752 count = cpu_to_le16(icom_port->statStg->rcv[rcv_buff].leLength);
753 753
754 count = tty_buffer_request_room(tty, count);
755 trace(icom_port, "RCV_COUNT", count); 754 trace(icom_port, "RCV_COUNT", count);
756 755
757 trace(icom_port, "REAL_COUNT", count); 756 trace(icom_port, "REAL_COUNT", count);
@@ -1654,4 +1653,6 @@ MODULE_DESCRIPTION("IBM iSeries Serial IOA driver");
1654MODULE_SUPPORTED_DEVICE 1653MODULE_SUPPORTED_DEVICE
1655 ("IBM iSeries 2745, 2771, 2772, 2742, 2793 and 2805 Communications adapters"); 1654 ("IBM iSeries 2745, 2771, 2772, 2742, 2793 and 2805 Communications adapters");
1656MODULE_LICENSE("GPL"); 1655MODULE_LICENSE("GPL");
1657 1656MODULE_FIRMWARE("icom_call_setup.bin");
1657MODULE_FIRMWARE("icom_res_dce.bin");
1658MODULE_FIRMWARE("icom_asc.bin");
diff --git a/drivers/serial/imx.c b/drivers/serial/imx.c
index 18130f11238e..eacb588a9345 100644
--- a/drivers/serial/imx.c
+++ b/drivers/serial/imx.c
@@ -46,6 +46,7 @@
46#include <linux/clk.h> 46#include <linux/clk.h>
47#include <linux/delay.h> 47#include <linux/delay.h>
48#include <linux/rational.h> 48#include <linux/rational.h>
49#include <linux/slab.h>
49 50
50#include <asm/io.h> 51#include <asm/io.h>
51#include <asm/irq.h> 52#include <asm/irq.h>
@@ -119,7 +120,8 @@
119#define MX2_UCR3_RXDMUXSEL (1<<2) /* RXD Muxed Input Select, on mx2/mx3 */ 120#define MX2_UCR3_RXDMUXSEL (1<<2) /* RXD Muxed Input Select, on mx2/mx3 */
120#define UCR3_INVT (1<<1) /* Inverted Infrared transmission */ 121#define UCR3_INVT (1<<1) /* Inverted Infrared transmission */
121#define UCR3_BPEN (1<<0) /* Preset registers enable */ 122#define UCR3_BPEN (1<<0) /* Preset registers enable */
122#define UCR4_CTSTL_32 (32<<10) /* CTS trigger level (32 chars) */ 123#define UCR4_CTSTL_SHF 10 /* CTS trigger level shift */
124#define UCR4_CTSTL_MASK 0x3F /* CTS trigger is 6 bits wide */
123#define UCR4_INVR (1<<9) /* Inverted infrared reception */ 125#define UCR4_INVR (1<<9) /* Inverted infrared reception */
124#define UCR4_ENIRI (1<<8) /* Serial infrared interrupt enable */ 126#define UCR4_ENIRI (1<<8) /* Serial infrared interrupt enable */
125#define UCR4_WKEN (1<<7) /* Wake interrupt enable */ 127#define UCR4_WKEN (1<<7) /* Wake interrupt enable */
@@ -440,7 +442,7 @@ static irqreturn_t imx_rxint(int irq, void *dev_id)
440 442
441 temp = readl(sport->port.membase + USR2); 443 temp = readl(sport->port.membase + USR2);
442 if (temp & USR2_BRCD) { 444 if (temp & USR2_BRCD) {
443 writel(temp | USR2_BRCD, sport->port.membase + USR2); 445 writel(USR2_BRCD, sport->port.membase + USR2);
444 if (uart_handle_break(&sport->port)) 446 if (uart_handle_break(&sport->port))
445 continue; 447 continue;
446 } 448 }
@@ -590,6 +592,9 @@ static int imx_setup_ufcr(struct imx_port *sport, unsigned int mode)
590 return 0; 592 return 0;
591} 593}
592 594
595/* half the RX buffer size */
596#define CTSTL 16
597
593static int imx_startup(struct uart_port *port) 598static int imx_startup(struct uart_port *port)
594{ 599{
595 struct imx_port *sport = (struct imx_port *)port; 600 struct imx_port *sport = (struct imx_port *)port;
@@ -606,6 +611,10 @@ static int imx_startup(struct uart_port *port)
606 if (USE_IRDA(sport)) 611 if (USE_IRDA(sport))
607 temp |= UCR4_IRSC; 612 temp |= UCR4_IRSC;
608 613
614 /* set the trigger level for CTS */
615 temp &= ~(UCR4_CTSTL_MASK<< UCR4_CTSTL_SHF);
616 temp |= CTSTL<< UCR4_CTSTL_SHF;
617
609 writel(temp & ~UCR4_DREN, sport->port.membase + UCR4); 618 writel(temp & ~UCR4_DREN, sport->port.membase + UCR4);
610 619
611 if (USE_IRDA(sport)) { 620 if (USE_IRDA(sport)) {
@@ -1088,7 +1097,7 @@ imx_console_get_options(struct imx_port *sport, int *baud,
1088 int *parity, int *bits) 1097 int *parity, int *bits)
1089{ 1098{
1090 1099
1091 if ( readl(sport->port.membase + UCR1) | UCR1_UARTEN ) { 1100 if (readl(sport->port.membase + UCR1) & UCR1_UARTEN) {
1092 /* ok, the port was enabled */ 1101 /* ok, the port was enabled */
1093 unsigned int ucr2, ubir,ubmr, uartclk; 1102 unsigned int ucr2, ubir,ubmr, uartclk;
1094 unsigned int baud_raw; 1103 unsigned int baud_raw;
@@ -1279,7 +1288,7 @@ static int serial_imx_probe(struct platform_device *pdev)
1279 sport->use_irda = 1; 1288 sport->use_irda = 1;
1280#endif 1289#endif
1281 1290
1282 if (pdata->init) { 1291 if (pdata && pdata->init) {
1283 ret = pdata->init(pdev); 1292 ret = pdata->init(pdev);
1284 if (ret) 1293 if (ret)
1285 goto clkput; 1294 goto clkput;
@@ -1292,7 +1301,7 @@ static int serial_imx_probe(struct platform_device *pdev)
1292 1301
1293 return 0; 1302 return 0;
1294deinit: 1303deinit:
1295 if (pdata->exit) 1304 if (pdata && pdata->exit)
1296 pdata->exit(pdev); 1305 pdata->exit(pdev);
1297clkput: 1306clkput:
1298 clk_put(sport->clk); 1307 clk_put(sport->clk);
@@ -1321,7 +1330,7 @@ static int serial_imx_remove(struct platform_device *pdev)
1321 1330
1322 clk_disable(sport->clk); 1331 clk_disable(sport->clk);
1323 1332
1324 if (pdata->exit) 1333 if (pdata && pdata->exit)
1325 pdata->exit(pdev); 1334 pdata->exit(pdev);
1326 1335
1327 iounmap(sport->port.membase); 1336 iounmap(sport->port.membase);
diff --git a/drivers/serial/ioc3_serial.c b/drivers/serial/ioc3_serial.c
index d8983dd5c4b2..f164ba4eba02 100644
--- a/drivers/serial/ioc3_serial.c
+++ b/drivers/serial/ioc3_serial.c
@@ -20,6 +20,7 @@
20#include <linux/pci.h> 20#include <linux/pci.h>
21#include <linux/serial_core.h> 21#include <linux/serial_core.h>
22#include <linux/ioc3.h> 22#include <linux/ioc3.h>
23#include <linux/slab.h>
23 24
24/* 25/*
25 * Interesting things about the ioc3 26 * Interesting things about the ioc3
@@ -1411,8 +1412,7 @@ static int receive_chars(struct uart_port *the_port)
1411 read_count = do_read(the_port, ch, MAX_CHARS); 1412 read_count = do_read(the_port, ch, MAX_CHARS);
1412 if (read_count > 0) { 1413 if (read_count > 0) {
1413 flip = 1; 1414 flip = 1;
1414 read_room = tty_buffer_request_room(tty, read_count); 1415 read_room = tty_insert_flip_string(tty, ch, read_count);
1415 tty_insert_flip_string(tty, ch, read_room);
1416 the_port->icount.rx += read_count; 1416 the_port->icount.rx += read_count;
1417 } 1417 }
1418 spin_unlock_irqrestore(&the_port->lock, pflags); 1418 spin_unlock_irqrestore(&the_port->lock, pflags);
@@ -2162,7 +2162,7 @@ static struct ioc3_submodule ioc3uart_ops = {
2162/** 2162/**
2163 * ioc3_detect - module init called, 2163 * ioc3_detect - module init called,
2164 */ 2164 */
2165static int __devinit ioc3uart_init(void) 2165static int __init ioc3uart_init(void)
2166{ 2166{
2167 int ret; 2167 int ret;
2168 2168
@@ -2179,7 +2179,7 @@ static int __devinit ioc3uart_init(void)
2179 return ret; 2179 return ret;
2180} 2180}
2181 2181
2182static void __devexit ioc3uart_exit(void) 2182static void __exit ioc3uart_exit(void)
2183{ 2183{
2184 ioc3_unregister_submodule(&ioc3uart_ops); 2184 ioc3_unregister_submodule(&ioc3uart_ops);
2185 uart_unregister_driver(&ioc3_uart); 2185 uart_unregister_driver(&ioc3_uart);
diff --git a/drivers/serial/ioc4_serial.c b/drivers/serial/ioc4_serial.c
index 2e02c3026d24..8ad28fc64926 100644
--- a/drivers/serial/ioc4_serial.c
+++ b/drivers/serial/ioc4_serial.c
@@ -22,6 +22,7 @@
22#include <linux/pci.h> 22#include <linux/pci.h>
23#include <linux/ioc4.h> 23#include <linux/ioc4.h>
24#include <linux/serial_core.h> 24#include <linux/serial_core.h>
25#include <linux/slab.h>
25 26
26/* 27/*
27 * interesting things about the ioc4 28 * interesting things about the ioc4
@@ -2904,7 +2905,7 @@ static struct ioc4_submodule ioc4_serial_submodule = {
2904/** 2905/**
2905 * ioc4_serial_init - module init 2906 * ioc4_serial_init - module init
2906 */ 2907 */
2907int ioc4_serial_init(void) 2908static int __init ioc4_serial_init(void)
2908{ 2909{
2909 int ret; 2910 int ret;
2910 2911
@@ -2913,20 +2914,30 @@ int ioc4_serial_init(void)
2913 printk(KERN_WARNING 2914 printk(KERN_WARNING
2914 "%s: Couldn't register rs232 IOC4 serial driver\n", 2915 "%s: Couldn't register rs232 IOC4 serial driver\n",
2915 __func__); 2916 __func__);
2916 return ret; 2917 goto out;
2917 } 2918 }
2918 if ((ret = uart_register_driver(&ioc4_uart_rs422)) < 0) { 2919 if ((ret = uart_register_driver(&ioc4_uart_rs422)) < 0) {
2919 printk(KERN_WARNING 2920 printk(KERN_WARNING
2920 "%s: Couldn't register rs422 IOC4 serial driver\n", 2921 "%s: Couldn't register rs422 IOC4 serial driver\n",
2921 __func__); 2922 __func__);
2922 return ret; 2923 goto out_uart_rs232;
2923 } 2924 }
2924 2925
2925 /* register with IOC4 main module */ 2926 /* register with IOC4 main module */
2926 return ioc4_register_submodule(&ioc4_serial_submodule); 2927 ret = ioc4_register_submodule(&ioc4_serial_submodule);
2928 if (ret)
2929 goto out_uart_rs422;
2930 return 0;
2931
2932out_uart_rs422:
2933 uart_unregister_driver(&ioc4_uart_rs422);
2934out_uart_rs232:
2935 uart_unregister_driver(&ioc4_uart_rs232);
2936out:
2937 return ret;
2927} 2938}
2928 2939
2929static void __devexit ioc4_serial_exit(void) 2940static void __exit ioc4_serial_exit(void)
2930{ 2941{
2931 ioc4_unregister_submodule(&ioc4_serial_submodule); 2942 ioc4_unregister_submodule(&ioc4_serial_submodule);
2932 uart_unregister_driver(&ioc4_uart_rs232); 2943 uart_unregister_driver(&ioc4_uart_rs232);
diff --git a/drivers/serial/jsm/jsm.h b/drivers/serial/jsm/jsm.h
index 4e5f3bde0461..38a509c684cd 100644
--- a/drivers/serial/jsm/jsm.h
+++ b/drivers/serial/jsm/jsm.h
@@ -138,7 +138,6 @@ struct jsm_board
138 u32 nasync; /* Number of ports on card */ 138 u32 nasync; /* Number of ports on card */
139 139
140 u32 irq; /* Interrupt request number */ 140 u32 irq; /* Interrupt request number */
141 u64 intr_count; /* Count of interrupts */
142 141
143 u64 membase; /* Start of base memory of the card */ 142 u64 membase; /* Start of base memory of the card */
144 u64 membase_end; /* End of base memory of the card */ 143 u64 membase_end; /* End of base memory of the card */
@@ -206,8 +205,6 @@ struct jsm_channel {
206 205
207 u64 ch_close_delay; /* How long we should drop RTS/DTR for */ 206 u64 ch_close_delay; /* How long we should drop RTS/DTR for */
208 207
209 u64 ch_cpstime; /* Time for CPS calculations */
210
211 tcflag_t ch_c_iflag; /* channel iflags */ 208 tcflag_t ch_c_iflag; /* channel iflags */
212 tcflag_t ch_c_cflag; /* channel cflags */ 209 tcflag_t ch_c_cflag; /* channel cflags */
213 tcflag_t ch_c_oflag; /* channel oflags */ 210 tcflag_t ch_c_oflag; /* channel oflags */
@@ -215,11 +212,6 @@ struct jsm_channel {
215 u8 ch_stopc; /* Stop character */ 212 u8 ch_stopc; /* Stop character */
216 u8 ch_startc; /* Start character */ 213 u8 ch_startc; /* Start character */
217 214
218 u32 ch_old_baud; /* Cache of the current baud */
219 u32 ch_custom_speed;/* Custom baud, if set */
220
221 u32 ch_wopen; /* Waiting for open process cnt */
222
223 u8 ch_mostat; /* FEP output modem status */ 215 u8 ch_mostat; /* FEP output modem status */
224 u8 ch_mistat; /* FEP input modem status */ 216 u8 ch_mistat; /* FEP input modem status */
225 217
diff --git a/drivers/serial/jsm/jsm_driver.c b/drivers/serial/jsm/jsm_driver.c
index b3604aa322a4..eaf545014119 100644
--- a/drivers/serial/jsm/jsm_driver.c
+++ b/drivers/serial/jsm/jsm_driver.c
@@ -26,6 +26,7 @@
26 ***********************************************************************/ 26 ***********************************************************************/
27#include <linux/moduleparam.h> 27#include <linux/moduleparam.h>
28#include <linux/pci.h> 28#include <linux/pci.h>
29#include <linux/slab.h>
29 30
30#include "jsm.h" 31#include "jsm.h"
31 32
@@ -48,6 +49,17 @@ struct uart_driver jsm_uart_driver = {
48 .nr = NR_PORTS, 49 .nr = NR_PORTS,
49}; 50};
50 51
52static pci_ers_result_t jsm_io_error_detected(struct pci_dev *pdev,
53 pci_channel_state_t state);
54static pci_ers_result_t jsm_io_slot_reset(struct pci_dev *pdev);
55static void jsm_io_resume(struct pci_dev *pdev);
56
57static struct pci_error_handlers jsm_err_handler = {
58 .error_detected = jsm_io_error_detected,
59 .slot_reset = jsm_io_slot_reset,
60 .resume = jsm_io_resume,
61};
62
51int jsm_debug; 63int jsm_debug;
52module_param(jsm_debug, int, 0); 64module_param(jsm_debug, int, 0);
53MODULE_PARM_DESC(jsm_debug, "Driver debugging level"); 65MODULE_PARM_DESC(jsm_debug, "Driver debugging level");
@@ -123,7 +135,7 @@ static int __devinit jsm_probe_one(struct pci_dev *pdev, const struct pci_device
123 } 135 }
124 136
125 rc = request_irq(brd->irq, brd->bd_ops->intr, 137 rc = request_irq(brd->irq, brd->bd_ops->intr,
126 IRQF_DISABLED|IRQF_SHARED, "JSM", brd); 138 IRQF_SHARED, "JSM", brd);
127 if (rc) { 139 if (rc) {
128 printk(KERN_WARNING "Failed to hook IRQ %d\n",brd->irq); 140 printk(KERN_WARNING "Failed to hook IRQ %d\n",brd->irq);
129 goto out_iounmap; 141 goto out_iounmap;
@@ -164,9 +176,11 @@ static int __devinit jsm_probe_one(struct pci_dev *pdev, const struct pci_device
164 } 176 }
165 177
166 pci_set_drvdata(pdev, brd); 178 pci_set_drvdata(pdev, brd);
179 pci_save_state(pdev);
167 180
168 return 0; 181 return 0;
169 out_free_irq: 182 out_free_irq:
183 jsm_remove_uart_port(brd);
170 free_irq(brd->irq, brd); 184 free_irq(brd->irq, brd);
171 out_iounmap: 185 out_iounmap:
172 iounmap(brd->re_map_membase); 186 iounmap(brd->re_map_membase);
@@ -222,8 +236,42 @@ static struct pci_driver jsm_driver = {
222 .id_table = jsm_pci_tbl, 236 .id_table = jsm_pci_tbl,
223 .probe = jsm_probe_one, 237 .probe = jsm_probe_one,
224 .remove = __devexit_p(jsm_remove_one), 238 .remove = __devexit_p(jsm_remove_one),
239 .err_handler = &jsm_err_handler,
225}; 240};
226 241
242static pci_ers_result_t jsm_io_error_detected(struct pci_dev *pdev,
243 pci_channel_state_t state)
244{
245 struct jsm_board *brd = pci_get_drvdata(pdev);
246
247 jsm_remove_uart_port(brd);
248
249 return PCI_ERS_RESULT_NEED_RESET;
250}
251
252static pci_ers_result_t jsm_io_slot_reset(struct pci_dev *pdev)
253{
254 int rc;
255
256 rc = pci_enable_device(pdev);
257
258 if (rc)
259 return PCI_ERS_RESULT_DISCONNECT;
260
261 pci_set_master(pdev);
262
263 return PCI_ERS_RESULT_RECOVERED;
264}
265
266static void jsm_io_resume(struct pci_dev *pdev)
267{
268 struct jsm_board *brd = pci_get_drvdata(pdev);
269
270 pci_restore_state(pdev);
271
272 jsm_uart_port_init(brd);
273}
274
227static int __init jsm_init_module(void) 275static int __init jsm_init_module(void)
228{ 276{
229 int rc; 277 int rc;
diff --git a/drivers/serial/jsm/jsm_neo.c b/drivers/serial/jsm/jsm_neo.c
index b4b124e4828f..7960d9633c15 100644
--- a/drivers/serial/jsm/jsm_neo.c
+++ b/drivers/serial/jsm/jsm_neo.c
@@ -954,13 +954,8 @@ static void neo_param(struct jsm_channel *ch)
954 ch->ch_flags |= (CH_BAUD0); 954 ch->ch_flags |= (CH_BAUD0);
955 ch->ch_mostat &= ~(UART_MCR_RTS | UART_MCR_DTR); 955 ch->ch_mostat &= ~(UART_MCR_RTS | UART_MCR_DTR);
956 neo_assert_modem_signals(ch); 956 neo_assert_modem_signals(ch);
957 ch->ch_old_baud = 0;
958 return; 957 return;
959 958
960 } else if (ch->ch_custom_speed) {
961 baud = ch->ch_custom_speed;
962 if (ch->ch_flags & CH_BAUD0)
963 ch->ch_flags &= ~(CH_BAUD0);
964 } else { 959 } else {
965 int i; 960 int i;
966 unsigned int cflag; 961 unsigned int cflag;
@@ -1045,7 +1040,6 @@ static void neo_param(struct jsm_channel *ch)
1045 quot = ch->ch_bd->bd_dividend / baud; 1040 quot = ch->ch_bd->bd_dividend / baud;
1046 1041
1047 if (quot != 0) { 1042 if (quot != 0) {
1048 ch->ch_old_baud = baud;
1049 writeb(UART_LCR_DLAB, &ch->ch_neo_uart->lcr); 1043 writeb(UART_LCR_DLAB, &ch->ch_neo_uart->lcr);
1050 writeb((quot & 0xff), &ch->ch_neo_uart->txrx); 1044 writeb((quot & 0xff), &ch->ch_neo_uart->txrx);
1051 writeb((quot >> 8), &ch->ch_neo_uart->ier); 1045 writeb((quot >> 8), &ch->ch_neo_uart->ier);
@@ -1123,8 +1117,6 @@ static irqreturn_t neo_intr(int irq, void *voidbrd)
1123 unsigned long lock_flags2; 1117 unsigned long lock_flags2;
1124 int outofloop_count = 0; 1118 int outofloop_count = 0;
1125 1119
1126 brd->intr_count++;
1127
1128 /* Lock out the slow poller from running on this board. */ 1120 /* Lock out the slow poller from running on this board. */
1129 spin_lock_irqsave(&brd->bd_intr_lock, lock_flags); 1121 spin_lock_irqsave(&brd->bd_intr_lock, lock_flags);
1130 1122
diff --git a/drivers/serial/jsm/jsm_tty.c b/drivers/serial/jsm/jsm_tty.c
index 7439c0373620..7a4a914ecff0 100644
--- a/drivers/serial/jsm/jsm_tty.c
+++ b/drivers/serial/jsm/jsm_tty.c
@@ -30,6 +30,7 @@
30#include <linux/serial_reg.h> 30#include <linux/serial_reg.h>
31#include <linux/delay.h> /* For udelay */ 31#include <linux/delay.h> /* For udelay */
32#include <linux/pci.h> 32#include <linux/pci.h>
33#include <linux/slab.h>
33 34
34#include "jsm.h" 35#include "jsm.h"
35 36
@@ -296,8 +297,6 @@ static void jsm_tty_close(struct uart_port *port)
296 bd->bd_ops->assert_modem_signals(channel); 297 bd->bd_ops->assert_modem_signals(channel);
297 } 298 }
298 299
299 channel->ch_old_baud = 0;
300
301 /* Turn off UART interrupts for this port */ 300 /* Turn off UART interrupts for this port */
302 channel->ch_bd->bd_ops->uart_off(channel); 301 channel->ch_bd->bd_ops->uart_off(channel);
303 302
@@ -432,9 +431,9 @@ int __devinit jsm_tty_init(struct jsm_board *brd)
432 return 0; 431 return 0;
433} 432}
434 433
435int __devinit jsm_uart_port_init(struct jsm_board *brd) 434int jsm_uart_port_init(struct jsm_board *brd)
436{ 435{
437 int i; 436 int i, rc;
438 unsigned int line; 437 unsigned int line;
439 struct jsm_channel *ch; 438 struct jsm_channel *ch;
440 439
@@ -469,10 +468,13 @@ int __devinit jsm_uart_port_init(struct jsm_board *brd)
469 } else 468 } else
470 set_bit(line, linemap); 469 set_bit(line, linemap);
471 brd->channels[i]->uart_port.line = line; 470 brd->channels[i]->uart_port.line = line;
472 if (uart_add_one_port (&jsm_uart_driver, &brd->channels[i]->uart_port)) 471 rc = uart_add_one_port (&jsm_uart_driver, &brd->channels[i]->uart_port);
473 printk(KERN_INFO "jsm: add device failed\n"); 472 if (rc){
473 printk(KERN_INFO "jsm: Port %d failed. Aborting...\n", i);
474 return rc;
475 }
474 else 476 else
475 printk(KERN_INFO "Added device \n"); 477 printk(KERN_INFO "jsm: Port %d added\n", i);
476 } 478 }
477 479
478 jsm_printk(INIT, INFO, &brd->pci_dev, "finish\n"); 480 jsm_printk(INIT, INFO, &brd->pci_dev, "finish\n");
diff --git a/drivers/serial/max3100.c b/drivers/serial/max3100.c
index 3c30c56aa2e1..3351c3bd59e4 100644
--- a/drivers/serial/max3100.c
+++ b/drivers/serial/max3100.c
@@ -41,6 +41,7 @@
41#define MAX_MAX3100 4 41#define MAX_MAX3100 4
42 42
43#include <linux/delay.h> 43#include <linux/delay.h>
44#include <linux/slab.h>
44#include <linux/device.h> 45#include <linux/device.h>
45#include <linux/serial_core.h> 46#include <linux/serial_core.h>
46#include <linux/serial.h> 47#include <linux/serial.h>
diff --git a/drivers/serial/mcf.c b/drivers/serial/mcf.c
index b44382442bf1..b5aaef965f24 100644
--- a/drivers/serial/mcf.c
+++ b/drivers/serial/mcf.c
@@ -263,6 +263,7 @@ static void mcf_set_termios(struct uart_port *port, struct ktermios *termios,
263 } 263 }
264 264
265 spin_lock_irqsave(&port->lock, flags); 265 spin_lock_irqsave(&port->lock, flags);
266 uart_update_timeout(port, termios->c_cflag, baud);
266 writeb(MCFUART_UCR_CMDRESETRX, port->membase + MCFUART_UCR); 267 writeb(MCFUART_UCR_CMDRESETRX, port->membase + MCFUART_UCR);
267 writeb(MCFUART_UCR_CMDRESETTX, port->membase + MCFUART_UCR); 268 writeb(MCFUART_UCR_CMDRESETTX, port->membase + MCFUART_UCR);
268 writeb(MCFUART_UCR_CMDRESETMRPTR, port->membase + MCFUART_UCR); 269 writeb(MCFUART_UCR_CMDRESETMRPTR, port->membase + MCFUART_UCR);
@@ -379,6 +380,7 @@ static irqreturn_t mcf_interrupt(int irq, void *data)
379static void mcf_config_port(struct uart_port *port, int flags) 380static void mcf_config_port(struct uart_port *port, int flags)
380{ 381{
381 port->type = PORT_MCF; 382 port->type = PORT_MCF;
383 port->fifosize = MCFUART_TXFIFOSIZE;
382 384
383 /* Clear mask, so no surprise interrupts. */ 385 /* Clear mask, so no surprise interrupts. */
384 writeb(0, port->membase + MCFUART_UIMR); 386 writeb(0, port->membase + MCFUART_UIMR);
@@ -424,7 +426,7 @@ static int mcf_verify_port(struct uart_port *port, struct serial_struct *ser)
424/* 426/*
425 * Define the basic serial functions we support. 427 * Define the basic serial functions we support.
426 */ 428 */
427static struct uart_ops mcf_uart_ops = { 429static const struct uart_ops mcf_uart_ops = {
428 .tx_empty = mcf_tx_empty, 430 .tx_empty = mcf_tx_empty,
429 .get_mctrl = mcf_get_mctrl, 431 .get_mctrl = mcf_get_mctrl,
430 .set_mctrl = mcf_set_mctrl, 432 .set_mctrl = mcf_set_mctrl,
@@ -443,7 +445,7 @@ static struct uart_ops mcf_uart_ops = {
443 .verify_port = mcf_verify_port, 445 .verify_port = mcf_verify_port,
444}; 446};
445 447
446static struct mcf_uart mcf_ports[3]; 448static struct mcf_uart mcf_ports[4];
447 449
448#define MCF_MAXPORTS ARRAY_SIZE(mcf_ports) 450#define MCF_MAXPORTS ARRAY_SIZE(mcf_ports)
449 451
@@ -602,7 +604,7 @@ static int __devinit mcf_probe(struct platform_device *pdev)
602 604
603/****************************************************************************/ 605/****************************************************************************/
604 606
605static int mcf_remove(struct platform_device *pdev) 607static int __devexit mcf_remove(struct platform_device *pdev)
606{ 608{
607 struct uart_port *port; 609 struct uart_port *port;
608 int i; 610 int i;
diff --git a/drivers/serial/mpc52xx_uart.c b/drivers/serial/mpc52xx_uart.c
index 7ce9e9f567a3..02469c31bf0b 100644
--- a/drivers/serial/mpc52xx_uart.c
+++ b/drivers/serial/mpc52xx_uart.c
@@ -29,39 +29,6 @@
29 * kind, whether express or implied. 29 * kind, whether express or implied.
30 */ 30 */
31 31
32/* Platform device Usage :
33 *
34 * Since PSCs can have multiple function, the correct driver for each one
35 * is selected by calling mpc52xx_match_psc_function(...). The function
36 * handled by this driver is "uart".
37 *
38 * The driver init all necessary registers to place the PSC in uart mode without
39 * DCD. However, the pin multiplexing aren't changed and should be set either
40 * by the bootloader or in the platform init code.
41 *
42 * The idx field must be equal to the PSC index (e.g. 0 for PSC1, 1 for PSC2,
43 * and so on). So the PSC1 is mapped to /dev/ttyPSC0, PSC2 to /dev/ttyPSC1 and
44 * so on. But be warned, it's an ABSOLUTE REQUIREMENT ! This is needed mainly
45 * fpr the console code : without this 1:1 mapping, at early boot time, when we
46 * are parsing the kernel args console=ttyPSC?, we wouldn't know which PSC it
47 * will be mapped to.
48 */
49
50/* OF Platform device Usage :
51 *
52 * This driver is only used for PSCs configured in uart mode. The device
53 * tree will have a node for each PSC with "mpc52xx-psc-uart" in the compatible
54 * list.
55 *
56 * By default, PSC devices are enumerated in the order they are found. However
57 * a particular PSC number can be forces by adding 'device_no = <port#>'
58 * to the device node.
59 *
60 * The driver init all necessary registers to place the PSC in uart mode without
61 * DCD. However, the pin multiplexing aren't changed and should be set either
62 * by the bootloader or in the platform init code.
63 */
64
65#undef DEBUG 32#undef DEBUG
66 33
67#include <linux/device.h> 34#include <linux/device.h>
@@ -74,6 +41,7 @@
74#include <linux/io.h> 41#include <linux/io.h>
75#include <linux/of.h> 42#include <linux/of.h>
76#include <linux/of_platform.h> 43#include <linux/of_platform.h>
44#include <linux/clk.h>
77 45
78#include <asm/mpc52xx.h> 46#include <asm/mpc52xx.h>
79#include <asm/mpc52xx_psc.h> 47#include <asm/mpc52xx_psc.h>
@@ -113,6 +81,7 @@ static void mpc52xx_uart_of_enumerate(void);
113 81
114/* Forward declaration of the interruption handling routine */ 82/* Forward declaration of the interruption handling routine */
115static irqreturn_t mpc52xx_uart_int(int irq, void *dev_id); 83static irqreturn_t mpc52xx_uart_int(int irq, void *dev_id);
84static irqreturn_t mpc5xxx_uart_process_int(struct uart_port *port);
116 85
117 86
118/* Simple macro to test if a port is console or not. This one is taken 87/* Simple macro to test if a port is console or not. This one is taken
@@ -145,6 +114,11 @@ struct psc_ops {
145 void (*cw_disable_ints)(struct uart_port *port); 114 void (*cw_disable_ints)(struct uart_port *port);
146 void (*cw_restore_ints)(struct uart_port *port); 115 void (*cw_restore_ints)(struct uart_port *port);
147 unsigned long (*getuartclk)(void *p); 116 unsigned long (*getuartclk)(void *p);
117 int (*clock)(struct uart_port *port, int enable);
118 int (*fifoc_init)(void);
119 void (*fifoc_uninit)(void);
120 void (*get_irq)(struct uart_port *, struct device_node *);
121 irqreturn_t (*handle_irq)(struct uart_port *port);
148}; 122};
149 123
150#ifdef CONFIG_PPC_MPC52xx 124#ifdef CONFIG_PPC_MPC52xx
@@ -256,6 +230,18 @@ static unsigned long mpc52xx_getuartclk(void *p)
256 return mpc5xxx_get_bus_frequency(p) / 2; 230 return mpc5xxx_get_bus_frequency(p) / 2;
257} 231}
258 232
233static void mpc52xx_psc_get_irq(struct uart_port *port, struct device_node *np)
234{
235 port->irqflags = IRQF_DISABLED;
236 port->irq = irq_of_parse_and_map(np, 0);
237}
238
239/* 52xx specific interrupt handler. The caller holds the port lock */
240static irqreturn_t mpc52xx_psc_handle_irq(struct uart_port *port)
241{
242 return mpc5xxx_uart_process_int(port);
243}
244
259static struct psc_ops mpc52xx_psc_ops = { 245static struct psc_ops mpc52xx_psc_ops = {
260 .fifo_init = mpc52xx_psc_fifo_init, 246 .fifo_init = mpc52xx_psc_fifo_init,
261 .raw_rx_rdy = mpc52xx_psc_raw_rx_rdy, 247 .raw_rx_rdy = mpc52xx_psc_raw_rx_rdy,
@@ -273,14 +259,32 @@ static struct psc_ops mpc52xx_psc_ops = {
273 .cw_disable_ints = mpc52xx_psc_cw_disable_ints, 259 .cw_disable_ints = mpc52xx_psc_cw_disable_ints,
274 .cw_restore_ints = mpc52xx_psc_cw_restore_ints, 260 .cw_restore_ints = mpc52xx_psc_cw_restore_ints,
275 .getuartclk = mpc52xx_getuartclk, 261 .getuartclk = mpc52xx_getuartclk,
262 .get_irq = mpc52xx_psc_get_irq,
263 .handle_irq = mpc52xx_psc_handle_irq,
276}; 264};
277 265
278#endif /* CONFIG_MPC52xx */ 266#endif /* CONFIG_MPC52xx */
279 267
280#ifdef CONFIG_PPC_MPC512x 268#ifdef CONFIG_PPC_MPC512x
281#define FIFO_512x(port) ((struct mpc512x_psc_fifo __iomem *)(PSC(port)+1)) 269#define FIFO_512x(port) ((struct mpc512x_psc_fifo __iomem *)(PSC(port)+1))
270
271/* PSC FIFO Controller for mpc512x */
272struct psc_fifoc {
273 u32 fifoc_cmd;
274 u32 fifoc_int;
275 u32 fifoc_dma;
276 u32 fifoc_axe;
277 u32 fifoc_debug;
278};
279
280static struct psc_fifoc __iomem *psc_fifoc;
281static unsigned int psc_fifoc_irq;
282
282static void mpc512x_psc_fifo_init(struct uart_port *port) 283static void mpc512x_psc_fifo_init(struct uart_port *port)
283{ 284{
285 /* /32 prescaler */
286 out_be16(&PSC(port)->mpc52xx_psc_clock_select, 0xdd00);
287
284 out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_RESET_SLICE); 288 out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_RESET_SLICE);
285 out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_ENABLE_SLICE); 289 out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_ENABLE_SLICE);
286 out_be32(&FIFO_512x(port)->txalarm, 1); 290 out_be32(&FIFO_512x(port)->txalarm, 1);
@@ -393,6 +397,160 @@ static unsigned long mpc512x_getuartclk(void *p)
393 return mpc5xxx_get_bus_frequency(p); 397 return mpc5xxx_get_bus_frequency(p);
394} 398}
395 399
400#define DEFAULT_FIFO_SIZE 16
401
402static unsigned int __init get_fifo_size(struct device_node *np,
403 char *fifo_name)
404{
405 const unsigned int *fp;
406
407 fp = of_get_property(np, fifo_name, NULL);
408 if (fp)
409 return *fp;
410
411 pr_warning("no %s property in %s node, defaulting to %d\n",
412 fifo_name, np->full_name, DEFAULT_FIFO_SIZE);
413
414 return DEFAULT_FIFO_SIZE;
415}
416
417#define FIFOC(_base) ((struct mpc512x_psc_fifo __iomem *) \
418 ((u32)(_base) + sizeof(struct mpc52xx_psc)))
419
420/* Init PSC FIFO Controller */
421static int __init mpc512x_psc_fifoc_init(void)
422{
423 struct device_node *np;
424 void __iomem *psc;
425 unsigned int tx_fifo_size;
426 unsigned int rx_fifo_size;
427 int fifobase = 0; /* current fifo address in 32 bit words */
428
429 np = of_find_compatible_node(NULL, NULL,
430 "fsl,mpc5121-psc-fifo");
431 if (!np) {
432 pr_err("%s: Can't find FIFOC node\n", __func__);
433 return -ENODEV;
434 }
435
436 psc_fifoc = of_iomap(np, 0);
437 if (!psc_fifoc) {
438 pr_err("%s: Can't map FIFOC\n", __func__);
439 return -ENODEV;
440 }
441
442 psc_fifoc_irq = irq_of_parse_and_map(np, 0);
443 of_node_put(np);
444 if (psc_fifoc_irq == NO_IRQ) {
445 pr_err("%s: Can't get FIFOC irq\n", __func__);
446 iounmap(psc_fifoc);
447 return -ENODEV;
448 }
449
450 for_each_compatible_node(np, NULL, "fsl,mpc5121-psc-uart") {
451 tx_fifo_size = get_fifo_size(np, "fsl,tx-fifo-size");
452 rx_fifo_size = get_fifo_size(np, "fsl,rx-fifo-size");
453
454 /* size in register is in 4 byte units */
455 tx_fifo_size /= 4;
456 rx_fifo_size /= 4;
457 if (!tx_fifo_size)
458 tx_fifo_size = 1;
459 if (!rx_fifo_size)
460 rx_fifo_size = 1;
461
462 psc = of_iomap(np, 0);
463 if (!psc) {
464 pr_err("%s: Can't map %s device\n",
465 __func__, np->full_name);
466 continue;
467 }
468
469 /* FIFO space is 4KiB, check if requested size is available */
470 if ((fifobase + tx_fifo_size + rx_fifo_size) > 0x1000) {
471 pr_err("%s: no fifo space available for %s\n",
472 __func__, np->full_name);
473 iounmap(psc);
474 /*
475 * chances are that another device requests less
476 * fifo space, so we continue.
477 */
478 continue;
479 }
480 /* set tx and rx fifo size registers */
481 out_be32(&FIFOC(psc)->txsz, (fifobase << 16) | tx_fifo_size);
482 fifobase += tx_fifo_size;
483 out_be32(&FIFOC(psc)->rxsz, (fifobase << 16) | rx_fifo_size);
484 fifobase += rx_fifo_size;
485
486 /* reset and enable the slices */
487 out_be32(&FIFOC(psc)->txcmd, 0x80);
488 out_be32(&FIFOC(psc)->txcmd, 0x01);
489 out_be32(&FIFOC(psc)->rxcmd, 0x80);
490 out_be32(&FIFOC(psc)->rxcmd, 0x01);
491
492 iounmap(psc);
493 }
494
495 return 0;
496}
497
498static void __exit mpc512x_psc_fifoc_uninit(void)
499{
500 iounmap(psc_fifoc);
501}
502
503/* 512x specific interrupt handler. The caller holds the port lock */
504static irqreturn_t mpc512x_psc_handle_irq(struct uart_port *port)
505{
506 unsigned long fifoc_int;
507 int psc_num;
508
509 /* Read pending PSC FIFOC interrupts */
510 fifoc_int = in_be32(&psc_fifoc->fifoc_int);
511
512 /* Check if it is an interrupt for this port */
513 psc_num = (port->mapbase & 0xf00) >> 8;
514 if (test_bit(psc_num, &fifoc_int) ||
515 test_bit(psc_num + 16, &fifoc_int))
516 return mpc5xxx_uart_process_int(port);
517
518 return IRQ_NONE;
519}
520
521static int mpc512x_psc_clock(struct uart_port *port, int enable)
522{
523 struct clk *psc_clk;
524 int psc_num;
525 char clk_name[10];
526
527 if (uart_console(port))
528 return 0;
529
530 psc_num = (port->mapbase & 0xf00) >> 8;
531 snprintf(clk_name, sizeof(clk_name), "psc%d_clk", psc_num);
532 psc_clk = clk_get(port->dev, clk_name);
533 if (IS_ERR(psc_clk)) {
534 dev_err(port->dev, "Failed to get PSC clock entry!\n");
535 return -ENODEV;
536 }
537
538 dev_dbg(port->dev, "%s %sable\n", clk_name, enable ? "en" : "dis");
539
540 if (enable)
541 clk_enable(psc_clk);
542 else
543 clk_disable(psc_clk);
544
545 return 0;
546}
547
548static void mpc512x_psc_get_irq(struct uart_port *port, struct device_node *np)
549{
550 port->irqflags = IRQF_SHARED;
551 port->irq = psc_fifoc_irq;
552}
553
396static struct psc_ops mpc512x_psc_ops = { 554static struct psc_ops mpc512x_psc_ops = {
397 .fifo_init = mpc512x_psc_fifo_init, 555 .fifo_init = mpc512x_psc_fifo_init,
398 .raw_rx_rdy = mpc512x_psc_raw_rx_rdy, 556 .raw_rx_rdy = mpc512x_psc_raw_rx_rdy,
@@ -410,6 +568,11 @@ static struct psc_ops mpc512x_psc_ops = {
410 .cw_disable_ints = mpc512x_psc_cw_disable_ints, 568 .cw_disable_ints = mpc512x_psc_cw_disable_ints,
411 .cw_restore_ints = mpc512x_psc_cw_restore_ints, 569 .cw_restore_ints = mpc512x_psc_cw_restore_ints,
412 .getuartclk = mpc512x_getuartclk, 570 .getuartclk = mpc512x_getuartclk,
571 .clock = mpc512x_psc_clock,
572 .fifoc_init = mpc512x_psc_fifoc_init,
573 .fifoc_uninit = mpc512x_psc_fifoc_uninit,
574 .get_irq = mpc512x_psc_get_irq,
575 .handle_irq = mpc512x_psc_handle_irq,
413}; 576};
414#endif 577#endif
415 578
@@ -519,10 +682,15 @@ mpc52xx_uart_startup(struct uart_port *port)
519 struct mpc52xx_psc __iomem *psc = PSC(port); 682 struct mpc52xx_psc __iomem *psc = PSC(port);
520 int ret; 683 int ret;
521 684
685 if (psc_ops->clock) {
686 ret = psc_ops->clock(port, 1);
687 if (ret)
688 return ret;
689 }
690
522 /* Request IRQ */ 691 /* Request IRQ */
523 ret = request_irq(port->irq, mpc52xx_uart_int, 692 ret = request_irq(port->irq, mpc52xx_uart_int,
524 IRQF_DISABLED | IRQF_SAMPLE_RANDOM, 693 port->irqflags, "mpc52xx_psc_uart", port);
525 "mpc52xx_psc_uart", port);
526 if (ret) 694 if (ret)
527 return ret; 695 return ret;
528 696
@@ -553,6 +721,9 @@ mpc52xx_uart_shutdown(struct uart_port *port)
553 port->read_status_mask = 0; 721 port->read_status_mask = 0;
554 out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask); 722 out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
555 723
724 if (psc_ops->clock)
725 psc_ops->clock(port, 0);
726
556 /* Release interrupt */ 727 /* Release interrupt */
557 free_irq(port->irq, port); 728 free_irq(port->irq, port);
558} 729}
@@ -851,15 +1022,12 @@ mpc52xx_uart_int_tx_chars(struct uart_port *port)
851} 1022}
852 1023
853static irqreturn_t 1024static irqreturn_t
854mpc52xx_uart_int(int irq, void *dev_id) 1025mpc5xxx_uart_process_int(struct uart_port *port)
855{ 1026{
856 struct uart_port *port = dev_id;
857 unsigned long pass = ISR_PASS_LIMIT; 1027 unsigned long pass = ISR_PASS_LIMIT;
858 unsigned int keepgoing; 1028 unsigned int keepgoing;
859 u8 status; 1029 u8 status;
860 1030
861 spin_lock(&port->lock);
862
863 /* While we have stuff to do, we continue */ 1031 /* While we have stuff to do, we continue */
864 do { 1032 do {
865 /* If we don't find anything to do, we stop */ 1033 /* If we don't find anything to do, we stop */
@@ -886,11 +1054,23 @@ mpc52xx_uart_int(int irq, void *dev_id)
886 1054
887 } while (keepgoing); 1055 } while (keepgoing);
888 1056
889 spin_unlock(&port->lock);
890
891 return IRQ_HANDLED; 1057 return IRQ_HANDLED;
892} 1058}
893 1059
1060static irqreturn_t
1061mpc52xx_uart_int(int irq, void *dev_id)
1062{
1063 struct uart_port *port = dev_id;
1064 irqreturn_t ret;
1065
1066 spin_lock(&port->lock);
1067
1068 ret = psc_ops->handle_irq(port);
1069
1070 spin_unlock(&port->lock);
1071
1072 return ret;
1073}
894 1074
895/* ======================================================================== */ 1075/* ======================================================================== */
896/* Console ( if applicable ) */ 1076/* Console ( if applicable ) */
@@ -1152,7 +1332,7 @@ mpc52xx_uart_of_probe(struct of_device *op, const struct of_device_id *match)
1152 return -EINVAL; 1332 return -EINVAL;
1153 } 1333 }
1154 1334
1155 port->irq = irq_of_parse_and_map(op->node, 0); 1335 psc_ops->get_irq(port, op->node);
1156 if (port->irq == NO_IRQ) { 1336 if (port->irq == NO_IRQ) {
1157 dev_dbg(&op->dev, "Could not get irq\n"); 1337 dev_dbg(&op->dev, "Could not get irq\n");
1158 return -EINVAL; 1338 return -EINVAL;
@@ -1163,10 +1343,8 @@ mpc52xx_uart_of_probe(struct of_device *op, const struct of_device_id *match)
1163 1343
1164 /* Add the port to the uart sub-system */ 1344 /* Add the port to the uart sub-system */
1165 ret = uart_add_one_port(&mpc52xx_uart_driver, port); 1345 ret = uart_add_one_port(&mpc52xx_uart_driver, port);
1166 if (ret) { 1346 if (ret)
1167 irq_dispose_mapping(port->irq);
1168 return ret; 1347 return ret;
1169 }
1170 1348
1171 dev_set_drvdata(&op->dev, (void *)port); 1349 dev_set_drvdata(&op->dev, (void *)port);
1172 return 0; 1350 return 0;
@@ -1178,10 +1356,8 @@ mpc52xx_uart_of_remove(struct of_device *op)
1178 struct uart_port *port = dev_get_drvdata(&op->dev); 1356 struct uart_port *port = dev_get_drvdata(&op->dev);
1179 dev_set_drvdata(&op->dev, NULL); 1357 dev_set_drvdata(&op->dev, NULL);
1180 1358
1181 if (port) { 1359 if (port)
1182 uart_remove_one_port(&mpc52xx_uart_driver, port); 1360 uart_remove_one_port(&mpc52xx_uart_driver, port);
1183 irq_dispose_mapping(port->irq);
1184 }
1185 1361
1186 return 0; 1362 return 0;
1187} 1363}
@@ -1288,6 +1464,15 @@ mpc52xx_uart_init(void)
1288 1464
1289 mpc52xx_uart_of_enumerate(); 1465 mpc52xx_uart_of_enumerate();
1290 1466
1467 /*
1468 * Map the PSC FIFO Controller and init if on MPC512x.
1469 */
1470 if (psc_ops && psc_ops->fifoc_init) {
1471 ret = psc_ops->fifoc_init();
1472 if (ret)
1473 return ret;
1474 }
1475
1291 ret = of_register_platform_driver(&mpc52xx_uart_of_driver); 1476 ret = of_register_platform_driver(&mpc52xx_uart_of_driver);
1292 if (ret) { 1477 if (ret) {
1293 printk(KERN_ERR "%s: of_register_platform_driver failed (%i)\n", 1478 printk(KERN_ERR "%s: of_register_platform_driver failed (%i)\n",
@@ -1302,6 +1487,9 @@ mpc52xx_uart_init(void)
1302static void __exit 1487static void __exit
1303mpc52xx_uart_exit(void) 1488mpc52xx_uart_exit(void)
1304{ 1489{
1490 if (psc_ops->fifoc_uninit)
1491 psc_ops->fifoc_uninit();
1492
1305 of_unregister_platform_driver(&mpc52xx_uart_of_driver); 1493 of_unregister_platform_driver(&mpc52xx_uart_of_driver);
1306 uart_unregister_driver(&mpc52xx_uart_driver); 1494 uart_unregister_driver(&mpc52xx_uart_driver);
1307} 1495}
diff --git a/drivers/serial/mpsc.c b/drivers/serial/mpsc.c
index b5496c28e60b..55e113a0be03 100644
--- a/drivers/serial/mpsc.c
+++ b/drivers/serial/mpsc.c
@@ -70,6 +70,7 @@
70#include <linux/dma-mapping.h> 70#include <linux/dma-mapping.h>
71#include <linux/mv643xx.h> 71#include <linux/mv643xx.h>
72#include <linux/platform_device.h> 72#include <linux/platform_device.h>
73#include <linux/gfp.h>
73 74
74#include <asm/io.h> 75#include <asm/io.h>
75#include <asm/irq.h> 76#include <asm/irq.h>
diff --git a/drivers/serial/msm_serial.c b/drivers/serial/msm_serial.c
index b05c5aa02cb4..ecdc0facf7ee 100644
--- a/drivers/serial/msm_serial.c
+++ b/drivers/serial/msm_serial.c
@@ -691,6 +691,7 @@ static int __init msm_serial_probe(struct platform_device *pdev)
691 struct msm_port *msm_port; 691 struct msm_port *msm_port;
692 struct resource *resource; 692 struct resource *resource;
693 struct uart_port *port; 693 struct uart_port *port;
694 int irq;
694 695
695 if (unlikely(pdev->id < 0 || pdev->id >= UART_NR)) 696 if (unlikely(pdev->id < 0 || pdev->id >= UART_NR))
696 return -ENXIO; 697 return -ENXIO;
@@ -711,9 +712,10 @@ static int __init msm_serial_probe(struct platform_device *pdev)
711 return -ENXIO; 712 return -ENXIO;
712 port->mapbase = resource->start; 713 port->mapbase = resource->start;
713 714
714 port->irq = platform_get_irq(pdev, 0); 715 irq = platform_get_irq(pdev, 0);
715 if (unlikely(port->irq < 0)) 716 if (unlikely(irq < 0))
716 return -ENXIO; 717 return -ENXIO;
718 port->irq = irq;
717 719
718 platform_set_drvdata(pdev, port); 720 platform_set_drvdata(pdev, port);
719 721
diff --git a/drivers/serial/mux.c b/drivers/serial/mux.c
index 7571aaa138b0..9711e06a8374 100644
--- a/drivers/serial/mux.c
+++ b/drivers/serial/mux.c
@@ -22,7 +22,6 @@
22#include <linux/init.h> 22#include <linux/init.h>
23#include <linux/serial.h> 23#include <linux/serial.h>
24#include <linux/console.h> 24#include <linux/console.h>
25#include <linux/slab.h>
26#include <linux/delay.h> /* for udelay */ 25#include <linux/delay.h> /* for udelay */
27#include <linux/device.h> 26#include <linux/device.h>
28#include <asm/io.h> 27#include <asm/io.h>
diff --git a/drivers/serial/of_serial.c b/drivers/serial/of_serial.c
index cdf172eda2e3..4abfebdb0fcc 100644
--- a/drivers/serial/of_serial.c
+++ b/drivers/serial/of_serial.c
@@ -11,6 +11,7 @@
11 */ 11 */
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/slab.h>
14#include <linux/serial_core.h> 15#include <linux/serial_core.h>
15#include <linux/serial_8250.h> 16#include <linux/serial_8250.h>
16#include <linux/of_platform.h> 17#include <linux/of_platform.h>
diff --git a/drivers/serial/pmac_zilog.c b/drivers/serial/pmac_zilog.c
index 0700cd10b97c..700e10833bf9 100644
--- a/drivers/serial/pmac_zilog.c
+++ b/drivers/serial/pmac_zilog.c
@@ -54,7 +54,6 @@
54#include <linux/delay.h> 54#include <linux/delay.h>
55#include <linux/init.h> 55#include <linux/init.h>
56#include <linux/console.h> 56#include <linux/console.h>
57#include <linux/slab.h>
58#include <linux/adb.h> 57#include <linux/adb.h>
59#include <linux/pmu.h> 58#include <linux/pmu.h>
60#include <linux/bitops.h> 59#include <linux/bitops.h>
@@ -63,11 +62,17 @@
63#include <asm/sections.h> 62#include <asm/sections.h>
64#include <asm/io.h> 63#include <asm/io.h>
65#include <asm/irq.h> 64#include <asm/irq.h>
65
66#ifdef CONFIG_PPC_PMAC
66#include <asm/prom.h> 67#include <asm/prom.h>
67#include <asm/machdep.h> 68#include <asm/machdep.h>
68#include <asm/pmac_feature.h> 69#include <asm/pmac_feature.h>
69#include <asm/dbdma.h> 70#include <asm/dbdma.h>
70#include <asm/macio.h> 71#include <asm/macio.h>
72#else
73#include <linux/platform_device.h>
74#define of_machine_is_compatible(x) (0)
75#endif
71 76
72#if defined (CONFIG_SERIAL_PMACZILOG_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 77#if defined (CONFIG_SERIAL_PMACZILOG_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
73#define SUPPORT_SYSRQ 78#define SUPPORT_SYSRQ
@@ -83,11 +88,9 @@
83 88
84static char version[] __initdata = "pmac_zilog: 0.6 (Benjamin Herrenschmidt <benh@kernel.crashing.org>)"; 89static char version[] __initdata = "pmac_zilog: 0.6 (Benjamin Herrenschmidt <benh@kernel.crashing.org>)";
85MODULE_AUTHOR("Benjamin Herrenschmidt <benh@kernel.crashing.org>"); 90MODULE_AUTHOR("Benjamin Herrenschmidt <benh@kernel.crashing.org>");
86MODULE_DESCRIPTION("Driver for the PowerMac serial ports."); 91MODULE_DESCRIPTION("Driver for the Mac and PowerMac serial ports.");
87MODULE_LICENSE("GPL"); 92MODULE_LICENSE("GPL");
88 93
89#define PWRDBG(fmt, arg...) printk(KERN_DEBUG fmt , ## arg)
90
91#ifdef CONFIG_SERIAL_PMACZILOG_TTYS 94#ifdef CONFIG_SERIAL_PMACZILOG_TTYS
92#define PMACZILOG_MAJOR TTY_MAJOR 95#define PMACZILOG_MAJOR TTY_MAJOR
93#define PMACZILOG_MINOR 64 96#define PMACZILOG_MINOR 64
@@ -153,8 +156,8 @@ static void pmz_load_zsregs(struct uart_pmac_port *uap, u8 *regs)
153 write_zsreg(uap, R10, regs[R10]); 156 write_zsreg(uap, R10, regs[R10]);
154 157
155 /* Set TX/RX controls sans the enable bits. */ 158 /* Set TX/RX controls sans the enable bits. */
156 write_zsreg(uap, R3, regs[R3] & ~RxENABLE); 159 write_zsreg(uap, R3, regs[R3] & ~RxENABLE);
157 write_zsreg(uap, R5, regs[R5] & ~TxENABLE); 160 write_zsreg(uap, R5, regs[R5] & ~TxENABLE);
158 161
159 /* now set R7 "prime" on ESCC */ 162 /* now set R7 "prime" on ESCC */
160 write_zsreg(uap, R15, regs[R15] | EN85C30); 163 write_zsreg(uap, R15, regs[R15] | EN85C30);
@@ -205,7 +208,7 @@ static void pmz_load_zsregs(struct uart_pmac_port *uap, u8 *regs)
205 */ 208 */
206static void pmz_maybe_update_regs(struct uart_pmac_port *uap) 209static void pmz_maybe_update_regs(struct uart_pmac_port *uap)
207{ 210{
208 if (!ZS_REGS_HELD(uap)) { 211 if (!ZS_REGS_HELD(uap)) {
209 if (ZS_TX_ACTIVE(uap)) { 212 if (ZS_TX_ACTIVE(uap)) {
210 uap->flags |= PMACZILOG_FLAG_REGS_HELD; 213 uap->flags |= PMACZILOG_FLAG_REGS_HELD;
211 } else { 214 } else {
@@ -281,7 +284,7 @@ static struct tty_struct *pmz_receive_chars(struct uart_pmac_port *uap)
281 spin_lock(&uap->port.lock); 284 spin_lock(&uap->port.lock);
282 if (swallow) 285 if (swallow)
283 goto next_char; 286 goto next_char;
284 } 287 }
285#endif /* CONFIG_MAGIC_SYSRQ && CONFIG_SERIAL_CORE_CONSOLE */ 288#endif /* CONFIG_MAGIC_SYSRQ && CONFIG_SERIAL_CORE_CONSOLE */
286 289
287 /* A real serial line, record the character and status. */ 290 /* A real serial line, record the character and status. */
@@ -317,7 +320,7 @@ static struct tty_struct *pmz_receive_chars(struct uart_pmac_port *uap)
317 320
318 if (uap->port.ignore_status_mask == 0xff || 321 if (uap->port.ignore_status_mask == 0xff ||
319 (r1 & uap->port.ignore_status_mask) == 0) { 322 (r1 & uap->port.ignore_status_mask) == 0) {
320 tty_insert_flip_char(tty, ch, flag); 323 tty_insert_flip_char(tty, ch, flag);
321 } 324 }
322 if (r1 & Rx_OVR) 325 if (r1 & Rx_OVR)
323 tty_insert_flip_char(tty, 0, TTY_OVERRUN); 326 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
@@ -341,7 +344,7 @@ static struct tty_struct *pmz_receive_chars(struct uart_pmac_port *uap)
341 uap->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK); 344 uap->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK);
342 write_zsreg(uap, R1, uap->curregs[R1]); 345 write_zsreg(uap, R1, uap->curregs[R1]);
343 zssync(uap); 346 zssync(uap);
344 dev_err(&uap->dev->ofdev.dev, "pmz: rx irq flood !\n"); 347 pmz_error("pmz: rx irq flood !\n");
345 return tty; 348 return tty;
346} 349}
347 350
@@ -411,6 +414,17 @@ static void pmz_transmit_chars(struct uart_pmac_port *uap)
411 goto ack_tx_int; 414 goto ack_tx_int;
412 } 415 }
413 416
417 /* Under some circumstances, we see interrupts reported for
418 * a closed channel. The interrupt mask in R1 is clear, but
419 * R3 still signals the interrupts and we see them when taking
420 * an interrupt for the other channel (this could be a qemu
421 * bug but since the ESCC doc doesn't specify precsiely whether
422 * R3 interrup status bits are masked by R1 interrupt enable
423 * bits, better safe than sorry). --BenH.
424 */
425 if (!ZS_IS_OPEN(uap))
426 goto ack_tx_int;
427
414 if (uap->port.x_char) { 428 if (uap->port.x_char) {
415 uap->flags |= PMACZILOG_FLAG_TX_ACTIVE; 429 uap->flags |= PMACZILOG_FLAG_TX_ACTIVE;
416 write_zsdata(uap, uap->port.x_char); 430 write_zsdata(uap, uap->port.x_char);
@@ -459,47 +473,47 @@ static irqreturn_t pmz_interrupt(int irq, void *dev_id)
459 473
460 uap_a = pmz_get_port_A(uap); 474 uap_a = pmz_get_port_A(uap);
461 uap_b = uap_a->mate; 475 uap_b = uap_a->mate;
462 476
463 spin_lock(&uap_a->port.lock); 477 spin_lock(&uap_a->port.lock);
464 r3 = read_zsreg(uap_a, R3); 478 r3 = read_zsreg(uap_a, R3);
465 479
466#ifdef DEBUG_HARD 480#ifdef DEBUG_HARD
467 pmz_debug("irq, r3: %x\n", r3); 481 pmz_debug("irq, r3: %x\n", r3);
468#endif 482#endif
469 /* Channel A */ 483 /* Channel A */
470 tty = NULL; 484 tty = NULL;
471 if (r3 & (CHAEXT | CHATxIP | CHARxIP)) { 485 if (r3 & (CHAEXT | CHATxIP | CHARxIP)) {
472 write_zsreg(uap_a, R0, RES_H_IUS); 486 write_zsreg(uap_a, R0, RES_H_IUS);
473 zssync(uap_a); 487 zssync(uap_a);
474 if (r3 & CHAEXT) 488 if (r3 & CHAEXT)
475 pmz_status_handle(uap_a); 489 pmz_status_handle(uap_a);
476 if (r3 & CHARxIP) 490 if (r3 & CHARxIP)
477 tty = pmz_receive_chars(uap_a); 491 tty = pmz_receive_chars(uap_a);
478 if (r3 & CHATxIP) 492 if (r3 & CHATxIP)
479 pmz_transmit_chars(uap_a); 493 pmz_transmit_chars(uap_a);
480 rc = IRQ_HANDLED; 494 rc = IRQ_HANDLED;
481 } 495 }
482 spin_unlock(&uap_a->port.lock); 496 spin_unlock(&uap_a->port.lock);
483 if (tty != NULL) 497 if (tty != NULL)
484 tty_flip_buffer_push(tty); 498 tty_flip_buffer_push(tty);
485 499
486 if (uap_b->node == NULL) 500 if (uap_b->node == NULL)
487 goto out; 501 goto out;
488 502
489 spin_lock(&uap_b->port.lock); 503 spin_lock(&uap_b->port.lock);
490 tty = NULL; 504 tty = NULL;
491 if (r3 & (CHBEXT | CHBTxIP | CHBRxIP)) { 505 if (r3 & (CHBEXT | CHBTxIP | CHBRxIP)) {
492 write_zsreg(uap_b, R0, RES_H_IUS); 506 write_zsreg(uap_b, R0, RES_H_IUS);
493 zssync(uap_b); 507 zssync(uap_b);
494 if (r3 & CHBEXT) 508 if (r3 & CHBEXT)
495 pmz_status_handle(uap_b); 509 pmz_status_handle(uap_b);
496 if (r3 & CHBRxIP) 510 if (r3 & CHBRxIP)
497 tty = pmz_receive_chars(uap_b); 511 tty = pmz_receive_chars(uap_b);
498 if (r3 & CHBTxIP) 512 if (r3 & CHBTxIP)
499 pmz_transmit_chars(uap_b); 513 pmz_transmit_chars(uap_b);
500 rc = IRQ_HANDLED; 514 rc = IRQ_HANDLED;
501 } 515 }
502 spin_unlock(&uap_b->port.lock); 516 spin_unlock(&uap_b->port.lock);
503 if (tty != NULL) 517 if (tty != NULL)
504 tty_flip_buffer_push(tty); 518 tty_flip_buffer_push(tty);
505 519
@@ -707,7 +721,7 @@ static void pmz_enable_ms(struct uart_port *port)
707 721
708 if (ZS_IS_ASLEEP(uap)) 722 if (ZS_IS_ASLEEP(uap))
709 return; 723 return;
710 /* NOTE: Not subject to 'transmitter active' rule. */ 724 /* NOTE: Not subject to 'transmitter active' rule. */
711 write_zsreg(uap, R15, uap->curregs[R15]); 725 write_zsreg(uap, R15, uap->curregs[R15]);
712 } 726 }
713} 727}
@@ -737,15 +751,19 @@ static void pmz_break_ctl(struct uart_port *port, int break_state)
737 if (new_reg != uap->curregs[R5]) { 751 if (new_reg != uap->curregs[R5]) {
738 uap->curregs[R5] = new_reg; 752 uap->curregs[R5] = new_reg;
739 753
740 /* NOTE: Not subject to 'transmitter active' rule. */ 754 /* NOTE: Not subject to 'transmitter active' rule. */
741 if (ZS_IS_ASLEEP(uap)) 755 if (ZS_IS_ASLEEP(uap)) {
756 spin_unlock_irqrestore(&port->lock, flags);
742 return; 757 return;
758 }
743 write_zsreg(uap, R5, uap->curregs[R5]); 759 write_zsreg(uap, R5, uap->curregs[R5]);
744 } 760 }
745 761
746 spin_unlock_irqrestore(&port->lock, flags); 762 spin_unlock_irqrestore(&port->lock, flags);
747} 763}
748 764
765#ifdef CONFIG_PPC_PMAC
766
749/* 767/*
750 * Turn power on or off to the SCC and associated stuff 768 * Turn power on or off to the SCC and associated stuff
751 * (port drivers, modem, IR port, etc.) 769 * (port drivers, modem, IR port, etc.)
@@ -781,6 +799,15 @@ static int pmz_set_scc_power(struct uart_pmac_port *uap, int state)
781 return delay; 799 return delay;
782} 800}
783 801
802#else
803
804static int pmz_set_scc_power(struct uart_pmac_port *uap, int state)
805{
806 return 0;
807}
808
809#endif /* !CONFIG_PPC_PMAC */
810
784/* 811/*
785 * FixZeroBug....Works around a bug in the SCC receving channel. 812 * FixZeroBug....Works around a bug in the SCC receving channel.
786 * Inspired from Darwin code, 15 Sept. 2000 -DanM 813 * Inspired from Darwin code, 15 Sept. 2000 -DanM
@@ -897,7 +924,6 @@ static int __pmz_startup(struct uart_pmac_port *uap)
897 /* Remember status for DCD/CTS changes */ 924 /* Remember status for DCD/CTS changes */
898 uap->prev_status = read_zsreg(uap, R0); 925 uap->prev_status = read_zsreg(uap, R0);
899 926
900
901 return pwr_delay; 927 return pwr_delay;
902} 928}
903 929
@@ -944,9 +970,9 @@ static int pmz_startup(struct uart_port *port)
944 } 970 }
945 971
946 pmz_get_port_A(uap)->flags |= PMACZILOG_FLAG_IS_IRQ_ON; 972 pmz_get_port_A(uap)->flags |= PMACZILOG_FLAG_IS_IRQ_ON;
947 if (request_irq(uap->port.irq, pmz_interrupt, IRQF_SHARED, "PowerMac Zilog", uap)) { 973 if (request_irq(uap->port.irq, pmz_interrupt, IRQF_SHARED,
948 dev_err(&uap->dev->ofdev.dev, 974 "SCC", uap)) {
949 "Unable to register zs interrupt handler.\n"); 975 pmz_error("Unable to register zs interrupt handler.\n");
950 pmz_set_scc_power(uap, 0); 976 pmz_set_scc_power(uap, 0);
951 mutex_unlock(&pmz_irq_mutex); 977 mutex_unlock(&pmz_irq_mutex);
952 return -ENXIO; 978 return -ENXIO;
@@ -972,7 +998,7 @@ static int pmz_startup(struct uart_port *port)
972 if (!ZS_IS_EXTCLK(uap)) 998 if (!ZS_IS_EXTCLK(uap))
973 uap->curregs[R1] |= EXT_INT_ENAB; 999 uap->curregs[R1] |= EXT_INT_ENAB;
974 write_zsreg(uap, R1, uap->curregs[R1]); 1000 write_zsreg(uap, R1, uap->curregs[R1]);
975 spin_unlock_irqrestore(&port->lock, flags); 1001 spin_unlock_irqrestore(&port->lock, flags);
976 1002
977 pmz_debug("pmz: startup() done.\n"); 1003 pmz_debug("pmz: startup() done.\n");
978 1004
@@ -992,7 +1018,7 @@ static void pmz_shutdown(struct uart_port *port)
992 mutex_lock(&pmz_irq_mutex); 1018 mutex_lock(&pmz_irq_mutex);
993 1019
994 /* Release interrupt handler */ 1020 /* Release interrupt handler */
995 free_irq(uap->port.irq, uap); 1021 free_irq(uap->port.irq, uap);
996 1022
997 spin_lock_irqsave(&port->lock, flags); 1023 spin_lock_irqsave(&port->lock, flags);
998 1024
@@ -1040,7 +1066,6 @@ static void pmz_convert_to_zs(struct uart_pmac_port *uap, unsigned int cflag,
1040{ 1066{
1041 int brg; 1067 int brg;
1042 1068
1043
1044 /* Switch to external clocking for IrDA high clock rates. That 1069 /* Switch to external clocking for IrDA high clock rates. That
1045 * code could be re-used for Midi interfaces with different 1070 * code could be re-used for Midi interfaces with different
1046 * multipliers 1071 * multipliers
@@ -1187,7 +1212,7 @@ static void pmz_irda_setup(struct uart_pmac_port *uap, unsigned long *baud)
1187 while ((read_zsreg(uap, R0) & Tx_BUF_EMP) == 0 1212 while ((read_zsreg(uap, R0) & Tx_BUF_EMP) == 0
1188 || (read_zsreg(uap, R1) & ALL_SNT) == 0) { 1213 || (read_zsreg(uap, R1) & ALL_SNT) == 0) {
1189 if (--t <= 0) { 1214 if (--t <= 0) {
1190 dev_err(&uap->dev->ofdev.dev, "transmitter didn't drain\n"); 1215 pmz_error("transmitter didn't drain\n");
1191 return; 1216 return;
1192 } 1217 }
1193 udelay(10); 1218 udelay(10);
@@ -1203,7 +1228,7 @@ static void pmz_irda_setup(struct uart_pmac_port *uap, unsigned long *baud)
1203 read_zsdata(uap); 1228 read_zsdata(uap);
1204 mdelay(10); 1229 mdelay(10);
1205 if (--t <= 0) { 1230 if (--t <= 0) {
1206 dev_err(&uap->dev->ofdev.dev, "receiver didn't drain\n"); 1231 pmz_error("receiver didn't drain\n");
1207 return; 1232 return;
1208 } 1233 }
1209 } 1234 }
@@ -1212,20 +1237,19 @@ static void pmz_irda_setup(struct uart_pmac_port *uap, unsigned long *baud)
1212 uap->curregs[R5] |= DTR; 1237 uap->curregs[R5] |= DTR;
1213 write_zsreg(uap, R5, uap->curregs[R5]); 1238 write_zsreg(uap, R5, uap->curregs[R5]);
1214 zssync(uap); 1239 zssync(uap);
1215 mdelay(1); 1240 mdelay(1);
1216 1241
1217 /* Switch SCC to 19200 */ 1242 /* Switch SCC to 19200 */
1218 pmz_convert_to_zs(uap, CS8, 0, 19200); 1243 pmz_convert_to_zs(uap, CS8, 0, 19200);
1219 pmz_load_zsregs(uap, uap->curregs); 1244 pmz_load_zsregs(uap, uap->curregs);
1220 mdelay(1); 1245 mdelay(1);
1221 1246
1222 /* Write get_version command byte */ 1247 /* Write get_version command byte */
1223 write_zsdata(uap, 1); 1248 write_zsdata(uap, 1);
1224 t = 5000; 1249 t = 5000;
1225 while ((read_zsreg(uap, R0) & Rx_CH_AV) == 0) { 1250 while ((read_zsreg(uap, R0) & Rx_CH_AV) == 0) {
1226 if (--t <= 0) { 1251 if (--t <= 0) {
1227 dev_err(&uap->dev->ofdev.dev, 1252 pmz_error("irda_setup timed out on get_version byte\n");
1228 "irda_setup timed out on get_version byte\n");
1229 goto out; 1253 goto out;
1230 } 1254 }
1231 udelay(10); 1255 udelay(10);
@@ -1233,8 +1257,7 @@ static void pmz_irda_setup(struct uart_pmac_port *uap, unsigned long *baud)
1233 version = read_zsdata(uap); 1257 version = read_zsdata(uap);
1234 1258
1235 if (version < 4) { 1259 if (version < 4) {
1236 dev_info(&uap->dev->ofdev.dev, "IrDA: dongle version %d not supported\n", 1260 pmz_info("IrDA: dongle version %d not supported\n", version);
1237 version);
1238 goto out; 1261 goto out;
1239 } 1262 }
1240 1263
@@ -1243,18 +1266,16 @@ static void pmz_irda_setup(struct uart_pmac_port *uap, unsigned long *baud)
1243 t = 5000; 1266 t = 5000;
1244 while ((read_zsreg(uap, R0) & Rx_CH_AV) == 0) { 1267 while ((read_zsreg(uap, R0) & Rx_CH_AV) == 0) {
1245 if (--t <= 0) { 1268 if (--t <= 0) {
1246 dev_err(&uap->dev->ofdev.dev, 1269 pmz_error("irda_setup timed out on speed mode byte\n");
1247 "irda_setup timed out on speed mode byte\n");
1248 goto out; 1270 goto out;
1249 } 1271 }
1250 udelay(10); 1272 udelay(10);
1251 } 1273 }
1252 t = read_zsdata(uap); 1274 t = read_zsdata(uap);
1253 if (t != cmdbyte) 1275 if (t != cmdbyte)
1254 dev_err(&uap->dev->ofdev.dev, 1276 pmz_error("irda_setup speed mode byte = %x (%x)\n", t, cmdbyte);
1255 "irda_setup speed mode byte = %x (%x)\n", t, cmdbyte);
1256 1277
1257 dev_info(&uap->dev->ofdev.dev, "IrDA setup for %ld bps, dongle version: %d\n", 1278 pmz_info("IrDA setup for %ld bps, dongle version: %d\n",
1258 *baud, version); 1279 *baud, version);
1259 1280
1260 (void)read_zsdata(uap); 1281 (void)read_zsdata(uap);
@@ -1404,7 +1425,7 @@ static void pmz_poll_put_char(struct uart_port *port, unsigned char c)
1404 write_zsdata(uap, c); 1425 write_zsdata(uap, c);
1405} 1426}
1406 1427
1407#endif 1428#endif /* CONFIG_CONSOLE_POLL */
1408 1429
1409static struct uart_ops pmz_pops = { 1430static struct uart_ops pmz_pops = {
1410 .tx_empty = pmz_tx_empty, 1431 .tx_empty = pmz_tx_empty,
@@ -1429,6 +1450,8 @@ static struct uart_ops pmz_pops = {
1429#endif 1450#endif
1430}; 1451};
1431 1452
1453#ifdef CONFIG_PPC_PMAC
1454
1432/* 1455/*
1433 * Setup one port structure after probing, HW is down at this point, 1456 * Setup one port structure after probing, HW is down at this point,
1434 * Unlike sunzilog, we don't need to pre-init the spinlock as we don't 1457 * Unlike sunzilog, we don't need to pre-init the spinlock as we don't
@@ -1452,7 +1475,7 @@ static int __init pmz_init_port(struct uart_pmac_port *uap)
1452 return -ENODEV; 1475 return -ENODEV;
1453 uap->port.mapbase = r_ports.start; 1476 uap->port.mapbase = r_ports.start;
1454 uap->port.membase = ioremap(uap->port.mapbase, 0x1000); 1477 uap->port.membase = ioremap(uap->port.mapbase, 0x1000);
1455 1478
1456 uap->control_reg = uap->port.membase; 1479 uap->control_reg = uap->port.membase;
1457 uap->data_reg = uap->control_reg + 0x10; 1480 uap->data_reg = uap->control_reg + 0x10;
1458 1481
@@ -1579,7 +1602,7 @@ static void pmz_dispose_port(struct uart_pmac_port *uap)
1579} 1602}
1580 1603
1581/* 1604/*
1582 * Called upon match with an escc node in the devive-tree. 1605 * Called upon match with an escc node in the device-tree.
1583 */ 1606 */
1584static int pmz_attach(struct macio_dev *mdev, const struct of_device_id *match) 1607static int pmz_attach(struct macio_dev *mdev, const struct of_device_id *match)
1585{ 1608{
@@ -1801,7 +1824,7 @@ static int __init pmz_probe(void)
1801 pmz_ports[count].node = node_a; 1824 pmz_ports[count].node = node_a;
1802 pmz_ports[count+1].node = node_b; 1825 pmz_ports[count+1].node = node_b;
1803 pmz_ports[count].port.line = count; 1826 pmz_ports[count].port.line = count;
1804 pmz_ports[count+1].port.line = count+1; 1827 pmz_ports[count+1].port.line = count+1;
1805 1828
1806 /* 1829 /*
1807 * Setup the ports for real 1830 * Setup the ports for real
@@ -1825,6 +1848,88 @@ next:
1825 return 0; 1848 return 0;
1826} 1849}
1827 1850
1851#else
1852
1853extern struct platform_device scc_a_pdev, scc_b_pdev;
1854
1855static int __init pmz_init_port(struct uart_pmac_port *uap)
1856{
1857 struct resource *r_ports;
1858 int irq;
1859
1860 r_ports = platform_get_resource(uap->node, IORESOURCE_MEM, 0);
1861 irq = platform_get_irq(uap->node, 0);
1862 if (!r_ports || !irq)
1863 return -ENODEV;
1864
1865 uap->port.mapbase = r_ports->start;
1866 uap->port.membase = (unsigned char __iomem *) r_ports->start;
1867 uap->port.iotype = UPIO_MEM;
1868 uap->port.irq = irq;
1869 uap->port.uartclk = ZS_CLOCK;
1870 uap->port.fifosize = 1;
1871 uap->port.ops = &pmz_pops;
1872 uap->port.type = PORT_PMAC_ZILOG;
1873 uap->port.flags = 0;
1874
1875 uap->control_reg = uap->port.membase;
1876 uap->data_reg = uap->control_reg + 4;
1877 uap->port_type = 0;
1878
1879 pmz_convert_to_zs(uap, CS8, 0, 9600);
1880
1881 return 0;
1882}
1883
1884static int __init pmz_probe(void)
1885{
1886 int err;
1887
1888 pmz_ports_count = 0;
1889
1890 pmz_ports[0].mate = &pmz_ports[1];
1891 pmz_ports[0].port.line = 0;
1892 pmz_ports[0].flags = PMACZILOG_FLAG_IS_CHANNEL_A;
1893 pmz_ports[0].node = &scc_a_pdev;
1894 err = pmz_init_port(&pmz_ports[0]);
1895 if (err)
1896 return err;
1897 pmz_ports_count++;
1898
1899 pmz_ports[1].mate = &pmz_ports[0];
1900 pmz_ports[1].port.line = 1;
1901 pmz_ports[1].flags = 0;
1902 pmz_ports[1].node = &scc_b_pdev;
1903 err = pmz_init_port(&pmz_ports[1]);
1904 if (err)
1905 return err;
1906 pmz_ports_count++;
1907
1908 return 0;
1909}
1910
1911static void pmz_dispose_port(struct uart_pmac_port *uap)
1912{
1913 memset(uap, 0, sizeof(struct uart_pmac_port));
1914}
1915
1916static int __init pmz_attach(struct platform_device *pdev)
1917{
1918 int i;
1919
1920 for (i = 0; i < pmz_ports_count; i++)
1921 if (pmz_ports[i].node == pdev)
1922 return 0;
1923 return -ENODEV;
1924}
1925
1926static int __exit pmz_detach(struct platform_device *pdev)
1927{
1928 return 0;
1929}
1930
1931#endif /* !CONFIG_PPC_PMAC */
1932
1828#ifdef CONFIG_SERIAL_PMACZILOG_CONSOLE 1933#ifdef CONFIG_SERIAL_PMACZILOG_CONSOLE
1829 1934
1830static void pmz_console_write(struct console *con, const char *s, unsigned int count); 1935static void pmz_console_write(struct console *con, const char *s, unsigned int count);
@@ -1885,28 +1990,41 @@ err_out:
1885 return rc; 1990 return rc;
1886} 1991}
1887 1992
1993#ifdef CONFIG_PPC_PMAC
1994
1888static struct of_device_id pmz_match[] = 1995static struct of_device_id pmz_match[] =
1889{ 1996{
1890 { 1997 {
1891 .name = "ch-a", 1998 .name = "ch-a",
1892 }, 1999 },
1893 { 2000 {
1894 .name = "ch-b", 2001 .name = "ch-b",
1895 }, 2002 },
1896 {}, 2003 {},
1897}; 2004};
1898MODULE_DEVICE_TABLE (of, pmz_match); 2005MODULE_DEVICE_TABLE (of, pmz_match);
1899 2006
1900static struct macio_driver pmz_driver = 2007static struct macio_driver pmz_driver = {
1901{
1902 .name = "pmac_zilog", 2008 .name = "pmac_zilog",
1903 .match_table = pmz_match, 2009 .match_table = pmz_match,
1904 .probe = pmz_attach, 2010 .probe = pmz_attach,
1905 .remove = pmz_detach, 2011 .remove = pmz_detach,
1906 .suspend = pmz_suspend, 2012 .suspend = pmz_suspend,
1907 .resume = pmz_resume, 2013 .resume = pmz_resume,
2014};
2015
2016#else
2017
2018static struct platform_driver pmz_driver = {
2019 .remove = __exit_p(pmz_detach),
2020 .driver = {
2021 .name = "scc",
2022 .owner = THIS_MODULE,
2023 },
1908}; 2024};
1909 2025
2026#endif /* !CONFIG_PPC_PMAC */
2027
1910static int __init init_pmz(void) 2028static int __init init_pmz(void)
1911{ 2029{
1912 int rc, i; 2030 int rc, i;
@@ -1941,19 +2059,27 @@ static int __init init_pmz(void)
1941 pmz_dispose_port(&pmz_ports[i]); 2059 pmz_dispose_port(&pmz_ports[i]);
1942 return rc; 2060 return rc;
1943 } 2061 }
1944 2062
1945 /* 2063 /*
1946 * Then we register the macio driver itself 2064 * Then we register the macio driver itself
1947 */ 2065 */
2066#ifdef CONFIG_PPC_PMAC
1948 return macio_register_driver(&pmz_driver); 2067 return macio_register_driver(&pmz_driver);
2068#else
2069 return platform_driver_probe(&pmz_driver, pmz_attach);
2070#endif
1949} 2071}
1950 2072
1951static void __exit exit_pmz(void) 2073static void __exit exit_pmz(void)
1952{ 2074{
1953 int i; 2075 int i;
1954 2076
2077#ifdef CONFIG_PPC_PMAC
1955 /* Get rid of macio-driver (detach from macio) */ 2078 /* Get rid of macio-driver (detach from macio) */
1956 macio_unregister_driver(&pmz_driver); 2079 macio_unregister_driver(&pmz_driver);
2080#else
2081 platform_driver_unregister(&pmz_driver);
2082#endif
1957 2083
1958 for (i = 0; i < pmz_ports_count; i++) { 2084 for (i = 0; i < pmz_ports_count; i++) {
1959 struct uart_pmac_port *uport = &pmz_ports[i]; 2085 struct uart_pmac_port *uport = &pmz_ports[i];
@@ -2020,10 +2146,10 @@ static int __init pmz_console_setup(struct console *co, char *options)
2020 /* 2146 /*
2021 * XServe's default to 57600 bps 2147 * XServe's default to 57600 bps
2022 */ 2148 */
2023 if (machine_is_compatible("RackMac1,1") 2149 if (of_machine_is_compatible("RackMac1,1")
2024 || machine_is_compatible("RackMac1,2") 2150 || of_machine_is_compatible("RackMac1,2")
2025 || machine_is_compatible("MacRISC4")) 2151 || of_machine_is_compatible("MacRISC4"))
2026 baud = 57600; 2152 baud = 57600;
2027 2153
2028 /* 2154 /*
2029 * Check whether an invalid uart number has been specified, and 2155 * Check whether an invalid uart number has been specified, and
diff --git a/drivers/serial/pmac_zilog.h b/drivers/serial/pmac_zilog.h
index 570b0d925e83..cbc34fbb1b20 100644
--- a/drivers/serial/pmac_zilog.h
+++ b/drivers/serial/pmac_zilog.h
@@ -1,7 +1,15 @@
1#ifndef __PMAC_ZILOG_H__ 1#ifndef __PMAC_ZILOG_H__
2#define __PMAC_ZILOG_H__ 2#define __PMAC_ZILOG_H__
3 3
4#define pmz_debug(fmt,arg...) dev_dbg(&uap->dev->ofdev.dev, fmt, ## arg) 4#ifdef CONFIG_PPC_PMAC
5#define pmz_debug(fmt, arg...) dev_dbg(&uap->dev->ofdev.dev, fmt, ## arg)
6#define pmz_error(fmt, arg...) dev_err(&uap->dev->ofdev.dev, fmt, ## arg)
7#define pmz_info(fmt, arg...) dev_info(&uap->dev->ofdev.dev, fmt, ## arg)
8#else
9#define pmz_debug(fmt, arg...) dev_dbg(&uap->node->dev, fmt, ## arg)
10#define pmz_error(fmt, arg...) dev_err(&uap->node->dev, fmt, ## arg)
11#define pmz_info(fmt, arg...) dev_info(&uap->node->dev, fmt, ## arg)
12#endif
5 13
6/* 14/*
7 * At most 2 ESCCs with 2 ports each 15 * At most 2 ESCCs with 2 ports each
@@ -17,6 +25,7 @@ struct uart_pmac_port {
17 struct uart_port port; 25 struct uart_port port;
18 struct uart_pmac_port *mate; 26 struct uart_pmac_port *mate;
19 27
28#ifdef CONFIG_PPC_PMAC
20 /* macio_dev for the escc holding this port (maybe be null on 29 /* macio_dev for the escc holding this port (maybe be null on
21 * early inited port) 30 * early inited port)
22 */ 31 */
@@ -25,6 +34,9 @@ struct uart_pmac_port {
25 * of "escc" node (ie. ch-a or ch-b) 34 * of "escc" node (ie. ch-a or ch-b)
26 */ 35 */
27 struct device_node *node; 36 struct device_node *node;
37#else
38 struct platform_device *node;
39#endif
28 40
29 /* Port type as obtained from device tree (IRDA, modem, ...) */ 41 /* Port type as obtained from device tree (IRDA, modem, ...) */
30 int port_type; 42 int port_type;
@@ -55,10 +67,12 @@ struct uart_pmac_port {
55 volatile u8 __iomem *control_reg; 67 volatile u8 __iomem *control_reg;
56 volatile u8 __iomem *data_reg; 68 volatile u8 __iomem *data_reg;
57 69
70#ifdef CONFIG_PPC_PMAC
58 unsigned int tx_dma_irq; 71 unsigned int tx_dma_irq;
59 unsigned int rx_dma_irq; 72 unsigned int rx_dma_irq;
60 volatile struct dbdma_regs __iomem *tx_dma_regs; 73 volatile struct dbdma_regs __iomem *tx_dma_regs;
61 volatile struct dbdma_regs __iomem *rx_dma_regs; 74 volatile struct dbdma_regs __iomem *rx_dma_regs;
75#endif
62 76
63 struct ktermios termios_cache; 77 struct ktermios termios_cache;
64}; 78};
@@ -73,7 +87,7 @@ static inline struct uart_pmac_port *pmz_get_port_A(struct uart_pmac_port *uap)
73} 87}
74 88
75/* 89/*
76 * Register acessors. Note that we don't need to enforce a recovery 90 * Register accessors. Note that we don't need to enforce a recovery
77 * delay on PCI PowerMac hardware, it's dealt in HW by the MacIO chip, 91 * delay on PCI PowerMac hardware, it's dealt in HW by the MacIO chip,
78 * though if we try to use this driver on older machines, we might have 92 * though if we try to use this driver on older machines, we might have
79 * to add it back 93 * to add it back
@@ -113,7 +127,7 @@ static inline void zssync(struct uart_pmac_port *port)
113#define BRG_TO_BPS(brg, freq) ((freq) / 2 / ((brg) + 2)) 127#define BRG_TO_BPS(brg, freq) ((freq) / 2 / ((brg) + 2))
114#define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2) 128#define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
115 129
116#define ZS_CLOCK 3686400 /* Z8530 RTxC input clock rate */ 130#define ZS_CLOCK 3686400 /* Z8530 RTxC input clock rate */
117 131
118/* The Zilog register set */ 132/* The Zilog register set */
119 133
@@ -171,7 +185,7 @@ static inline void zssync(struct uart_pmac_port *port)
171 185
172/* Write Register 3 */ 186/* Write Register 3 */
173 187
174#define RxENABLE 0x1 /* Rx Enable */ 188#define RxENABLE 0x1 /* Rx Enable */
175#define SYNC_L_INH 0x2 /* Sync Character Load Inhibit */ 189#define SYNC_L_INH 0x2 /* Sync Character Load Inhibit */
176#define ADD_SM 0x4 /* Address Search Mode (SDLC) */ 190#define ADD_SM 0x4 /* Address Search Mode (SDLC) */
177#define RxCRC_ENAB 0x8 /* Rx CRC Enable */ 191#define RxCRC_ENAB 0x8 /* Rx CRC Enable */
@@ -185,7 +199,7 @@ static inline void zssync(struct uart_pmac_port *port)
185 199
186/* Write Register 4 */ 200/* Write Register 4 */
187 201
188#define PAR_ENAB 0x1 /* Parity Enable */ 202#define PAR_ENAB 0x1 /* Parity Enable */
189#define PAR_EVEN 0x2 /* Parity Even/Odd* */ 203#define PAR_EVEN 0x2 /* Parity Even/Odd* */
190 204
191#define SYNC_ENAB 0 /* Sync Modes Enable */ 205#define SYNC_ENAB 0 /* Sync Modes Enable */
@@ -210,7 +224,7 @@ static inline void zssync(struct uart_pmac_port *port)
210#define TxCRC_ENAB 0x1 /* Tx CRC Enable */ 224#define TxCRC_ENAB 0x1 /* Tx CRC Enable */
211#define RTS 0x2 /* RTS */ 225#define RTS 0x2 /* RTS */
212#define SDLC_CRC 0x4 /* SDLC/CRC-16 */ 226#define SDLC_CRC 0x4 /* SDLC/CRC-16 */
213#define TxENABLE 0x8 /* Tx Enable */ 227#define TxENABLE 0x8 /* Tx Enable */
214#define SND_BRK 0x10 /* Send Break */ 228#define SND_BRK 0x10 /* Send Break */
215#define Tx5 0x0 /* Tx 5 bits (or less)/character */ 229#define Tx5 0x0 /* Tx 5 bits (or less)/character */
216#define Tx7 0x20 /* Tx 7 bits/character */ 230#define Tx7 0x20 /* Tx 7 bits/character */
@@ -372,11 +386,11 @@ static inline void zssync(struct uart_pmac_port *port)
372#define ZS_TX_ACTIVE(UP) ((UP)->flags & PMACZILOG_FLAG_TX_ACTIVE) 386#define ZS_TX_ACTIVE(UP) ((UP)->flags & PMACZILOG_FLAG_TX_ACTIVE)
373#define ZS_WANTS_MODEM_STATUS(UP) ((UP)->flags & PMACZILOG_FLAG_MODEM_STATUS) 387#define ZS_WANTS_MODEM_STATUS(UP) ((UP)->flags & PMACZILOG_FLAG_MODEM_STATUS)
374#define ZS_IS_IRDA(UP) ((UP)->flags & PMACZILOG_FLAG_IS_IRDA) 388#define ZS_IS_IRDA(UP) ((UP)->flags & PMACZILOG_FLAG_IS_IRDA)
375#define ZS_IS_INTMODEM(UP) ((UP)->flags & PMACZILOG_FLAG_IS_INTMODEM) 389#define ZS_IS_INTMODEM(UP) ((UP)->flags & PMACZILOG_FLAG_IS_INTMODEM)
376#define ZS_HAS_DMA(UP) ((UP)->flags & PMACZILOG_FLAG_HAS_DMA) 390#define ZS_HAS_DMA(UP) ((UP)->flags & PMACZILOG_FLAG_HAS_DMA)
377#define ZS_IS_ASLEEP(UP) ((UP)->flags & PMACZILOG_FLAG_IS_ASLEEP) 391#define ZS_IS_ASLEEP(UP) ((UP)->flags & PMACZILOG_FLAG_IS_ASLEEP)
378#define ZS_IS_OPEN(UP) ((UP)->flags & PMACZILOG_FLAG_IS_OPEN) 392#define ZS_IS_OPEN(UP) ((UP)->flags & PMACZILOG_FLAG_IS_OPEN)
379#define ZS_IS_IRQ_ON(UP) ((UP)->flags & PMACZILOG_FLAG_IS_IRQ_ON) 393#define ZS_IS_IRQ_ON(UP) ((UP)->flags & PMACZILOG_FLAG_IS_IRQ_ON)
380#define ZS_IS_EXTCLK(UP) ((UP)->flags & PMACZILOG_FLAG_IS_EXTCLK) 394#define ZS_IS_EXTCLK(UP) ((UP)->flags & PMACZILOG_FLAG_IS_EXTCLK)
381 395
382#endif /* __PMAC_ZILOG_H__ */ 396#endif /* __PMAC_ZILOG_H__ */
diff --git a/drivers/serial/pxa.c b/drivers/serial/pxa.c
index b8629d74f6a2..1102a39b44f5 100644
--- a/drivers/serial/pxa.c
+++ b/drivers/serial/pxa.c
@@ -44,6 +44,7 @@
44#include <linux/serial_core.h> 44#include <linux/serial_core.h>
45#include <linux/clk.h> 45#include <linux/clk.h>
46#include <linux/io.h> 46#include <linux/io.h>
47#include <linux/slab.h>
47 48
48struct uart_pxa_port { 49struct uart_pxa_port {
49 struct uart_port port; 50 struct uart_port port;
@@ -438,6 +439,7 @@ serial_pxa_set_termios(struct uart_port *port, struct ktermios *termios,
438 unsigned char cval, fcr = 0; 439 unsigned char cval, fcr = 0;
439 unsigned long flags; 440 unsigned long flags;
440 unsigned int baud, quot; 441 unsigned int baud, quot;
442 unsigned int dll;
441 443
442 switch (termios->c_cflag & CSIZE) { 444 switch (termios->c_cflag & CSIZE) {
443 case CS5: 445 case CS5:
@@ -534,10 +536,18 @@ serial_pxa_set_termios(struct uart_port *port, struct ktermios *termios,
534 else 536 else
535 up->mcr &= ~UART_MCR_AFE; 537 up->mcr &= ~UART_MCR_AFE;
536 538
537 serial_out(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */ 539 serial_out(up, UART_LCR, cval | UART_LCR_DLAB); /* set DLAB */
538 serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */ 540 serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */
541
542 /*
543 * work around Errata #75 according to Intel(R) PXA27x Processor Family
544 * Specification Update (Nov 2005)
545 */
546 dll = serial_in(up, UART_DLL);
547 WARN_ON(dll != (quot & 0xff));
548
539 serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */ 549 serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */
540 serial_out(up, UART_LCR, cval); /* reset DLAB */ 550 serial_out(up, UART_LCR, cval); /* reset DLAB */
541 up->lcr = cval; /* Save LCR */ 551 up->lcr = cval; /* Save LCR */
542 serial_pxa_set_mctrl(&up->port, up->port.mctrl); 552 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
543 serial_out(up, UART_FCR, fcr); 553 serial_out(up, UART_FCR, fcr);
@@ -747,7 +757,7 @@ static int serial_pxa_resume(struct device *dev)
747 return 0; 757 return 0;
748} 758}
749 759
750static struct dev_pm_ops serial_pxa_pm_ops = { 760static const struct dev_pm_ops serial_pxa_pm_ops = {
751 .suspend = serial_pxa_suspend, 761 .suspend = serial_pxa_suspend,
752 .resume = serial_pxa_resume, 762 .resume = serial_pxa_resume,
753}; 763};
diff --git a/drivers/serial/s3c2410.c b/drivers/serial/s3c2410.c
index c99f0821cae3..73f089d3efd6 100644
--- a/drivers/serial/s3c2410.c
+++ b/drivers/serial/s3c2410.c
@@ -2,7 +2,7 @@
2 * 2 *
3 * Driver for Samsung S3C2410 SoC onboard UARTs. 3 * Driver for Samsung S3C2410 SoC onboard UARTs.
4 * 4 *
5 * Ben Dooks, Copyright (c) 2003-2005,2008 Simtec Electronics 5 * Ben Dooks, Copyright (c) 2003-2008 Simtec Electronics
6 * http://armlinux.simtec.co.uk/ 6 * http://armlinux.simtec.co.uk/
7 * 7 *
8 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
diff --git a/drivers/serial/s3c2412.c b/drivers/serial/s3c2412.c
index 6e057d8809d3..1700b1a2fb7e 100644
--- a/drivers/serial/s3c2412.c
+++ b/drivers/serial/s3c2412.c
@@ -2,7 +2,7 @@
2 * 2 *
3 * Driver for Samsung S3C2412 and S3C2413 SoC onboard UARTs. 3 * Driver for Samsung S3C2412 and S3C2413 SoC onboard UARTs.
4 * 4 *
5 * Ben Dooks, Copyright (c) 2003-2005,2008 Simtec Electronics 5 * Ben Dooks, Copyright (c) 2003-2008 Simtec Electronics
6 * http://armlinux.simtec.co.uk/ 6 * http://armlinux.simtec.co.uk/
7 * 7 *
8 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
@@ -102,6 +102,7 @@ static struct s3c24xx_uart_info s3c2412_uart_inf = {
102 .name = "Samsung S3C2412 UART", 102 .name = "Samsung S3C2412 UART",
103 .type = PORT_S3C2412, 103 .type = PORT_S3C2412,
104 .fifosize = 64, 104 .fifosize = 64,
105 .has_divslot = 1,
105 .rx_fifomask = S3C2440_UFSTAT_RXMASK, 106 .rx_fifomask = S3C2440_UFSTAT_RXMASK,
106 .rx_fifoshift = S3C2440_UFSTAT_RXSHIFT, 107 .rx_fifoshift = S3C2440_UFSTAT_RXSHIFT,
107 .rx_fifofull = S3C2440_UFSTAT_RXFULL, 108 .rx_fifofull = S3C2440_UFSTAT_RXFULL,
diff --git a/drivers/serial/s3c2440.c b/drivers/serial/s3c2440.c
index 69ff5d340f04..094cc3904b13 100644
--- a/drivers/serial/s3c2440.c
+++ b/drivers/serial/s3c2440.c
@@ -2,7 +2,7 @@
2 * 2 *
3 * Driver for Samsung S3C2440 and S3C2442 SoC onboard UARTs. 3 * Driver for Samsung S3C2440 and S3C2442 SoC onboard UARTs.
4 * 4 *
5 * Ben Dooks, Copyright (c) 2003-2005,2008 Simtec Electronics 5 * Ben Dooks, Copyright (c) 2003-2008 Simtec Electronics
6 * http://armlinux.simtec.co.uk/ 6 * http://armlinux.simtec.co.uk/
7 * 7 *
8 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
diff --git a/drivers/serial/s3c24a0.c b/drivers/serial/s3c24a0.c
index 26c49e18bdd1..fad6083ca427 100644
--- a/drivers/serial/s3c24a0.c
+++ b/drivers/serial/s3c24a0.c
@@ -6,7 +6,7 @@
6 * 6 *
7 * Author: Sandeep Patil <sandeep.patil@azingo.com> 7 * Author: Sandeep Patil <sandeep.patil@azingo.com>
8 * 8 *
9 * Ben Dooks, Copyright (c) 2003-2005,2008 Simtec Electronics 9 * Ben Dooks, Copyright (c) 2003-2008 Simtec Electronics
10 * http://armlinux.simtec.co.uk/ 10 * http://armlinux.simtec.co.uk/
11 * 11 *
12 * This program is free software; you can redistribute it and/or modify 12 * This program is free software; you can redistribute it and/or modify
diff --git a/drivers/serial/s5pv210.c b/drivers/serial/s5pv210.c
new file mode 100644
index 000000000000..8dc03837617b
--- /dev/null
+++ b/drivers/serial/s5pv210.c
@@ -0,0 +1,154 @@
1/* linux/drivers/serial/s5pv210.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Based on drivers/serial/s3c6400.c
7 *
8 * Driver for Samsung S5PV210 SoC UARTs.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <linux/module.h>
16#include <linux/ioport.h>
17#include <linux/io.h>
18#include <linux/platform_device.h>
19#include <linux/init.h>
20#include <linux/serial_core.h>
21#include <linux/serial.h>
22
23#include <asm/irq.h>
24#include <mach/hardware.h>
25#include <plat/regs-serial.h>
26#include "samsung.h"
27
28static int s5pv210_serial_setsource(struct uart_port *port,
29 struct s3c24xx_uart_clksrc *clk)
30{
31 unsigned long ucon = rd_regl(port, S3C2410_UCON);
32
33 if (strcmp(clk->name, "pclk") == 0)
34 ucon &= ~S5PV210_UCON_CLKMASK;
35 else if (strcmp(clk->name, "uclk1") == 0)
36 ucon |= S5PV210_UCON_CLKMASK;
37 else {
38 printk(KERN_ERR "unknown clock source %s\n", clk->name);
39 return -EINVAL;
40 }
41
42 wr_regl(port, S3C2410_UCON, ucon);
43 return 0;
44}
45
46
47static int s5pv210_serial_getsource(struct uart_port *port,
48 struct s3c24xx_uart_clksrc *clk)
49{
50 u32 ucon = rd_regl(port, S3C2410_UCON);
51
52 clk->divisor = 1;
53
54 switch (ucon & S5PV210_UCON_CLKMASK) {
55 case S5PV210_UCON_PCLK:
56 clk->name = "pclk";
57 break;
58 case S5PV210_UCON_UCLK:
59 clk->name = "uclk1";
60 break;
61 }
62
63 return 0;
64}
65
66static int s5pv210_serial_resetport(struct uart_port *port,
67 struct s3c2410_uartcfg *cfg)
68{
69 unsigned long ucon = rd_regl(port, S3C2410_UCON);
70
71 ucon &= S5PV210_UCON_CLKMASK;
72 wr_regl(port, S3C2410_UCON, ucon | cfg->ucon);
73 wr_regl(port, S3C2410_ULCON, cfg->ulcon);
74
75 /* reset both fifos */
76 wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH);
77 wr_regl(port, S3C2410_UFCON, cfg->ufcon);
78
79 return 0;
80}
81
82#define S5PV210_UART_DEFAULT_INFO(fifo_size) \
83 .name = "Samsung S5PV210 UART0", \
84 .type = PORT_S3C6400, \
85 .fifosize = fifo_size, \
86 .has_divslot = 1, \
87 .rx_fifomask = S5PV210_UFSTAT_RXMASK, \
88 .rx_fifoshift = S5PV210_UFSTAT_RXSHIFT, \
89 .rx_fifofull = S5PV210_UFSTAT_RXFULL, \
90 .tx_fifofull = S5PV210_UFSTAT_TXFULL, \
91 .tx_fifomask = S5PV210_UFSTAT_TXMASK, \
92 .tx_fifoshift = S5PV210_UFSTAT_TXSHIFT, \
93 .get_clksrc = s5pv210_serial_getsource, \
94 .set_clksrc = s5pv210_serial_setsource, \
95 .reset_port = s5pv210_serial_resetport
96
97static struct s3c24xx_uart_info s5p_port_fifo256 = {
98 S5PV210_UART_DEFAULT_INFO(256),
99};
100
101static struct s3c24xx_uart_info s5p_port_fifo64 = {
102 S5PV210_UART_DEFAULT_INFO(64),
103};
104
105static struct s3c24xx_uart_info s5p_port_fifo16 = {
106 S5PV210_UART_DEFAULT_INFO(16),
107};
108
109static struct s3c24xx_uart_info *s5p_uart_inf[] = {
110 [0] = &s5p_port_fifo256,
111 [1] = &s5p_port_fifo64,
112 [2] = &s5p_port_fifo16,
113 [3] = &s5p_port_fifo16,
114};
115
116/* device management */
117static int s5p_serial_probe(struct platform_device *pdev)
118{
119 return s3c24xx_serial_probe(pdev, s5p_uart_inf[pdev->id]);
120}
121
122static struct platform_driver s5p_serial_drv = {
123 .probe = s5p_serial_probe,
124 .remove = __devexit_p(s3c24xx_serial_remove),
125 .driver = {
126 .name = "s5pv210-uart",
127 .owner = THIS_MODULE,
128 },
129};
130
131static int __init s5pv210_serial_console_init(void)
132{
133 return s3c24xx_serial_initconsole(&s5p_serial_drv, s5p_uart_inf);
134}
135
136console_initcall(s5pv210_serial_console_init);
137
138static int __init s5p_serial_init(void)
139{
140 return s3c24xx_serial_init(&s5p_serial_drv, *s5p_uart_inf);
141}
142
143static void __exit s5p_serial_exit(void)
144{
145 platform_driver_unregister(&s5p_serial_drv);
146}
147
148module_init(s5p_serial_init);
149module_exit(s5p_serial_exit);
150
151MODULE_LICENSE("GPL");
152MODULE_ALIAS("platform:s5pv210-uart");
153MODULE_DESCRIPTION("Samsung S5PV210 UART Driver support");
154MODULE_AUTHOR("Thomas Abraham <thomas.ab@samsung.com>");
diff --git a/drivers/serial/samsung.c b/drivers/serial/samsung.c
index 1523e8d9ae77..a9d6c5626a0a 100644
--- a/drivers/serial/samsung.c
+++ b/drivers/serial/samsung.c
@@ -2,7 +2,7 @@
2 * 2 *
3 * Driver core for Samsung SoC onboard UARTs. 3 * Driver core for Samsung SoC onboard UARTs.
4 * 4 *
5 * Ben Dooks, Copyright (c) 2003-2005,2008 Simtec Electronics 5 * Ben Dooks, Copyright (c) 2003-2008 Simtec Electronics
6 * http://armlinux.simtec.co.uk/ 6 * http://armlinux.simtec.co.uk/
7 * 7 *
8 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
@@ -1271,7 +1271,7 @@ s3c24xx_serial_console_txrdy(struct uart_port *port, unsigned int ufcon)
1271 unsigned long ufstat, utrstat; 1271 unsigned long ufstat, utrstat;
1272 1272
1273 if (ufcon & S3C2410_UFCON_FIFOMODE) { 1273 if (ufcon & S3C2410_UFCON_FIFOMODE) {
1274 /* fifo mode - check ammount of data in fifo registers... */ 1274 /* fifo mode - check amount of data in fifo registers... */
1275 1275
1276 ufstat = rd_regl(port, S3C2410_UFSTAT); 1276 ufstat = rd_regl(port, S3C2410_UFSTAT);
1277 return (ufstat & info->tx_fifofull) ? 0 : 1; 1277 return (ufstat & info->tx_fifofull) ? 0 : 1;
@@ -1374,7 +1374,7 @@ s3c24xx_serial_get_options(struct uart_port *port, int *baud,
1374 * data. 1374 * data.
1375*/ 1375*/
1376 1376
1377static int s3c24xx_serial_init_ports(struct s3c24xx_uart_info *info) 1377static int s3c24xx_serial_init_ports(struct s3c24xx_uart_info **info)
1378{ 1378{
1379 struct s3c24xx_uart_port *ptr = s3c24xx_serial_ports; 1379 struct s3c24xx_uart_port *ptr = s3c24xx_serial_ports;
1380 struct platform_device **platdev_ptr; 1380 struct platform_device **platdev_ptr;
@@ -1385,7 +1385,7 @@ static int s3c24xx_serial_init_ports(struct s3c24xx_uart_info *info)
1385 platdev_ptr = s3c24xx_uart_devs; 1385 platdev_ptr = s3c24xx_uart_devs;
1386 1386
1387 for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++, ptr++, platdev_ptr++) { 1387 for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++, ptr++, platdev_ptr++) {
1388 s3c24xx_serial_init_port(ptr, info, *platdev_ptr); 1388 s3c24xx_serial_init_port(ptr, info[i], *platdev_ptr);
1389 } 1389 }
1390 1390
1391 return 0; 1391 return 0;
@@ -1451,7 +1451,7 @@ static struct console s3c24xx_serial_console = {
1451}; 1451};
1452 1452
1453int s3c24xx_serial_initconsole(struct platform_driver *drv, 1453int s3c24xx_serial_initconsole(struct platform_driver *drv,
1454 struct s3c24xx_uart_info *info) 1454 struct s3c24xx_uart_info **info)
1455 1455
1456{ 1456{
1457 struct platform_device *dev = s3c24xx_uart_devs[0]; 1457 struct platform_device *dev = s3c24xx_uart_devs[0];
diff --git a/drivers/serial/samsung.h b/drivers/serial/samsung.h
index d3fe315969f6..0ac06a07d25f 100644
--- a/drivers/serial/samsung.h
+++ b/drivers/serial/samsung.h
@@ -2,7 +2,7 @@
2 * 2 *
3 * Driver for Samsung SoC onboard UARTs. 3 * Driver for Samsung SoC onboard UARTs.
4 * 4 *
5 * Ben Dooks, Copyright (c) 2003-2005,2008 Simtec Electronics 5 * Ben Dooks, Copyright (c) 2003-2008 Simtec Electronics
6 * http://armlinux.simtec.co.uk/ 6 * http://armlinux.simtec.co.uk/
7 * 7 *
8 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
@@ -75,19 +75,24 @@ extern int s3c24xx_serial_probe(struct platform_device *dev,
75extern int __devexit s3c24xx_serial_remove(struct platform_device *dev); 75extern int __devexit s3c24xx_serial_remove(struct platform_device *dev);
76 76
77extern int s3c24xx_serial_initconsole(struct platform_driver *drv, 77extern int s3c24xx_serial_initconsole(struct platform_driver *drv,
78 struct s3c24xx_uart_info *uart); 78 struct s3c24xx_uart_info **uart);
79 79
80extern int s3c24xx_serial_init(struct platform_driver *drv, 80extern int s3c24xx_serial_init(struct platform_driver *drv,
81 struct s3c24xx_uart_info *info); 81 struct s3c24xx_uart_info *info);
82 82
83#ifdef CONFIG_SERIAL_SAMSUNG_CONSOLE 83#ifdef CONFIG_SERIAL_SAMSUNG_CONSOLE
84 84
85#define s3c24xx_console_init(__drv, __inf) \ 85#define s3c24xx_console_init(__drv, __inf) \
86static int __init s3c_serial_console_init(void) \ 86static int __init s3c_serial_console_init(void) \
87{ \ 87{ \
88 return s3c24xx_serial_initconsole(__drv, __inf); \ 88 struct s3c24xx_uart_info *uinfo[CONFIG_SERIAL_SAMSUNG_UARTS]; \
89} \ 89 int i; \
90 \ 90 \
91 for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++) \
92 uinfo[i] = __inf; \
93 return s3c24xx_serial_initconsole(__drv, uinfo); \
94} \
95 \
91console_initcall(s3c_serial_console_init) 96console_initcall(s3c_serial_console_init)
92 97
93#else 98#else
diff --git a/drivers/serial/serial_core.c b/drivers/serial/serial_core.c
index dcc72444e8e7..7f2830709512 100644
--- a/drivers/serial/serial_core.c
+++ b/drivers/serial/serial_core.c
@@ -342,11 +342,11 @@ uart_get_baud_rate(struct uart_port *port, struct ktermios *termios,
342 342
343 if (flags == UPF_SPD_HI) 343 if (flags == UPF_SPD_HI)
344 altbaud = 57600; 344 altbaud = 57600;
345 if (flags == UPF_SPD_VHI) 345 else if (flags == UPF_SPD_VHI)
346 altbaud = 115200; 346 altbaud = 115200;
347 if (flags == UPF_SPD_SHI) 347 else if (flags == UPF_SPD_SHI)
348 altbaud = 230400; 348 altbaud = 230400;
349 if (flags == UPF_SPD_WARP) 349 else if (flags == UPF_SPD_WARP)
350 altbaud = 460800; 350 altbaud = 460800;
351 351
352 for (try = 0; try < 2; try++) { 352 for (try = 0; try < 2; try++) {
@@ -385,13 +385,20 @@ uart_get_baud_rate(struct uart_port *port, struct ktermios *termios,
385 } 385 }
386 386
387 /* 387 /*
388 * As a last resort, if the quotient is zero, 388 * As a last resort, if the range cannot be met then clip to
389 * default to 9600 bps 389 * the nearest chip supported rate.
390 */ 390 */
391 if (!hung_up) 391 if (!hung_up) {
392 tty_termios_encode_baud_rate(termios, 9600, 9600); 392 if (baud <= min)
393 tty_termios_encode_baud_rate(termios,
394 min + 1, min + 1);
395 else
396 tty_termios_encode_baud_rate(termios,
397 max - 1, max - 1);
398 }
393 } 399 }
394 400 /* Should never happen */
401 WARN_ON(1);
395 return 0; 402 return 0;
396} 403}
397 404
@@ -1217,9 +1224,8 @@ static void uart_set_termios(struct tty_struct *tty,
1217 /* Handle transition to B0 status */ 1224 /* Handle transition to B0 status */
1218 if ((old_termios->c_cflag & CBAUD) && !(cflag & CBAUD)) 1225 if ((old_termios->c_cflag & CBAUD) && !(cflag & CBAUD))
1219 uart_clear_mctrl(state->uart_port, TIOCM_RTS | TIOCM_DTR); 1226 uart_clear_mctrl(state->uart_port, TIOCM_RTS | TIOCM_DTR);
1220
1221 /* Handle transition away from B0 status */ 1227 /* Handle transition away from B0 status */
1222 if (!(old_termios->c_cflag & CBAUD) && (cflag & CBAUD)) { 1228 else if (!(old_termios->c_cflag & CBAUD) && (cflag & CBAUD)) {
1223 unsigned int mask = TIOCM_DTR; 1229 unsigned int mask = TIOCM_DTR;
1224 if (!(cflag & CRTSCTS) || 1230 if (!(cflag & CRTSCTS) ||
1225 !test_bit(TTY_THROTTLED, &tty->flags)) 1231 !test_bit(TTY_THROTTLED, &tty->flags))
@@ -1234,9 +1240,8 @@ static void uart_set_termios(struct tty_struct *tty,
1234 __uart_start(tty); 1240 __uart_start(tty);
1235 spin_unlock_irqrestore(&state->uart_port->lock, flags); 1241 spin_unlock_irqrestore(&state->uart_port->lock, flags);
1236 } 1242 }
1237
1238 /* Handle turning on CRTSCTS */ 1243 /* Handle turning on CRTSCTS */
1239 if (!(old_termios->c_cflag & CRTSCTS) && (cflag & CRTSCTS)) { 1244 else if (!(old_termios->c_cflag & CRTSCTS) && (cflag & CRTSCTS)) {
1240 spin_lock_irqsave(&state->uart_port->lock, flags); 1245 spin_lock_irqsave(&state->uart_port->lock, flags);
1241 if (!(state->uart_port->ops->get_mctrl(state->uart_port) & TIOCM_CTS)) { 1246 if (!(state->uart_port->ops->get_mctrl(state->uart_port) & TIOCM_CTS)) {
1242 tty->hw_stopped = 1; 1247 tty->hw_stopped = 1;
@@ -2008,12 +2013,6 @@ int uart_suspend_port(struct uart_driver *drv, struct uart_port *uport)
2008 2013
2009 mutex_lock(&port->mutex); 2014 mutex_lock(&port->mutex);
2010 2015
2011 if (!console_suspend_enabled && uart_console(uport)) {
2012 /* we're going to avoid suspending serial console */
2013 mutex_unlock(&port->mutex);
2014 return 0;
2015 }
2016
2017 tty_dev = device_find_child(uport->dev, &match, serial_match_port); 2016 tty_dev = device_find_child(uport->dev, &match, serial_match_port);
2018 if (device_may_wakeup(tty_dev)) { 2017 if (device_may_wakeup(tty_dev)) {
2019 enable_irq_wake(uport->irq); 2018 enable_irq_wake(uport->irq);
@@ -2021,20 +2020,23 @@ int uart_suspend_port(struct uart_driver *drv, struct uart_port *uport)
2021 mutex_unlock(&port->mutex); 2020 mutex_unlock(&port->mutex);
2022 return 0; 2021 return 0;
2023 } 2022 }
2024 uport->suspended = 1; 2023 if (console_suspend_enabled || !uart_console(uport))
2024 uport->suspended = 1;
2025 2025
2026 if (port->flags & ASYNC_INITIALIZED) { 2026 if (port->flags & ASYNC_INITIALIZED) {
2027 const struct uart_ops *ops = uport->ops; 2027 const struct uart_ops *ops = uport->ops;
2028 int tries; 2028 int tries;
2029 2029
2030 set_bit(ASYNCB_SUSPENDED, &port->flags); 2030 if (console_suspend_enabled || !uart_console(uport)) {
2031 clear_bit(ASYNCB_INITIALIZED, &port->flags); 2031 set_bit(ASYNCB_SUSPENDED, &port->flags);
2032 clear_bit(ASYNCB_INITIALIZED, &port->flags);
2032 2033
2033 spin_lock_irq(&uport->lock); 2034 spin_lock_irq(&uport->lock);
2034 ops->stop_tx(uport); 2035 ops->stop_tx(uport);
2035 ops->set_mctrl(uport, 0); 2036 ops->set_mctrl(uport, 0);
2036 ops->stop_rx(uport); 2037 ops->stop_rx(uport);
2037 spin_unlock_irq(&uport->lock); 2038 spin_unlock_irq(&uport->lock);
2039 }
2038 2040
2039 /* 2041 /*
2040 * Wait for the transmitter to empty. 2042 * Wait for the transmitter to empty.
@@ -2049,16 +2051,18 @@ int uart_suspend_port(struct uart_driver *drv, struct uart_port *uport)
2049 drv->dev_name, 2051 drv->dev_name,
2050 drv->tty_driver->name_base + uport->line); 2052 drv->tty_driver->name_base + uport->line);
2051 2053
2052 ops->shutdown(uport); 2054 if (console_suspend_enabled || !uart_console(uport))
2055 ops->shutdown(uport);
2053 } 2056 }
2054 2057
2055 /* 2058 /*
2056 * Disable the console device before suspending. 2059 * Disable the console device before suspending.
2057 */ 2060 */
2058 if (uart_console(uport)) 2061 if (console_suspend_enabled && uart_console(uport))
2059 console_stop(uport->cons); 2062 console_stop(uport->cons);
2060 2063
2061 uart_change_pm(state, 3); 2064 if (console_suspend_enabled || !uart_console(uport))
2065 uart_change_pm(state, 3);
2062 2066
2063 mutex_unlock(&port->mutex); 2067 mutex_unlock(&port->mutex);
2064 2068
@@ -2075,29 +2079,6 @@ int uart_resume_port(struct uart_driver *drv, struct uart_port *uport)
2075 2079
2076 mutex_lock(&port->mutex); 2080 mutex_lock(&port->mutex);
2077 2081
2078 if (!console_suspend_enabled && uart_console(uport)) {
2079 /* no need to resume serial console, it wasn't suspended */
2080 /*
2081 * First try to use the console cflag setting.
2082 */
2083 memset(&termios, 0, sizeof(struct ktermios));
2084 termios.c_cflag = uport->cons->cflag;
2085 /*
2086 * If that's unset, use the tty termios setting.
2087 */
2088 if (termios.c_cflag == 0)
2089 termios = *state->port.tty->termios;
2090 else {
2091 termios.c_ispeed = termios.c_ospeed =
2092 tty_termios_input_baud_rate(&termios);
2093 termios.c_ispeed = termios.c_ospeed =
2094 tty_termios_baud_rate(&termios);
2095 }
2096 uport->ops->set_termios(uport, &termios, NULL);
2097 mutex_unlock(&port->mutex);
2098 return 0;
2099 }
2100
2101 tty_dev = device_find_child(uport->dev, &match, serial_match_port); 2082 tty_dev = device_find_child(uport->dev, &match, serial_match_port);
2102 if (!uport->suspended && device_may_wakeup(tty_dev)) { 2083 if (!uport->suspended && device_may_wakeup(tty_dev)) {
2103 disable_irq_wake(uport->irq); 2084 disable_irq_wake(uport->irq);
@@ -2123,21 +2104,23 @@ int uart_resume_port(struct uart_driver *drv, struct uart_port *uport)
2123 spin_lock_irq(&uport->lock); 2104 spin_lock_irq(&uport->lock);
2124 ops->set_mctrl(uport, 0); 2105 ops->set_mctrl(uport, 0);
2125 spin_unlock_irq(&uport->lock); 2106 spin_unlock_irq(&uport->lock);
2126 ret = ops->startup(uport); 2107 if (console_suspend_enabled || !uart_console(uport)) {
2127 if (ret == 0) { 2108 ret = ops->startup(uport);
2128 uart_change_speed(state, NULL); 2109 if (ret == 0) {
2129 spin_lock_irq(&uport->lock); 2110 uart_change_speed(state, NULL);
2130 ops->set_mctrl(uport, uport->mctrl); 2111 spin_lock_irq(&uport->lock);
2131 ops->start_tx(uport); 2112 ops->set_mctrl(uport, uport->mctrl);
2132 spin_unlock_irq(&uport->lock); 2113 ops->start_tx(uport);
2133 set_bit(ASYNCB_INITIALIZED, &port->flags); 2114 spin_unlock_irq(&uport->lock);
2134 } else { 2115 set_bit(ASYNCB_INITIALIZED, &port->flags);
2135 /* 2116 } else {
2136 * Failed to resume - maybe hardware went away? 2117 /*
2137 * Clear the "initialized" flag so we won't try 2118 * Failed to resume - maybe hardware went away?
2138 * to call the low level drivers shutdown method. 2119 * Clear the "initialized" flag so we won't try
2139 */ 2120 * to call the low level drivers shutdown method.
2140 uart_shutdown(state); 2121 */
2122 uart_shutdown(state);
2123 }
2141 } 2124 }
2142 2125
2143 clear_bit(ASYNCB_SUSPENDED, &port->flags); 2126 clear_bit(ASYNCB_SUSPENDED, &port->flags);
@@ -2344,7 +2327,7 @@ static const struct tty_operations uart_ops = {
2344 */ 2327 */
2345int uart_register_driver(struct uart_driver *drv) 2328int uart_register_driver(struct uart_driver *drv)
2346{ 2329{
2347 struct tty_driver *normal = NULL; 2330 struct tty_driver *normal;
2348 int i, retval; 2331 int i, retval;
2349 2332
2350 BUG_ON(drv->state); 2333 BUG_ON(drv->state);
@@ -2354,13 +2337,12 @@ int uart_register_driver(struct uart_driver *drv)
2354 * we have a large number of ports to handle. 2337 * we have a large number of ports to handle.
2355 */ 2338 */
2356 drv->state = kzalloc(sizeof(struct uart_state) * drv->nr, GFP_KERNEL); 2339 drv->state = kzalloc(sizeof(struct uart_state) * drv->nr, GFP_KERNEL);
2357 retval = -ENOMEM;
2358 if (!drv->state) 2340 if (!drv->state)
2359 goto out; 2341 goto out;
2360 2342
2361 normal = alloc_tty_driver(drv->nr); 2343 normal = alloc_tty_driver(drv->nr);
2362 if (!normal) 2344 if (!normal)
2363 goto out; 2345 goto out_kfree;
2364 2346
2365 drv->tty_driver = normal; 2347 drv->tty_driver = normal;
2366 2348
@@ -2393,12 +2375,14 @@ int uart_register_driver(struct uart_driver *drv)
2393 } 2375 }
2394 2376
2395 retval = tty_register_driver(normal); 2377 retval = tty_register_driver(normal);
2396 out: 2378 if (retval >= 0)
2397 if (retval < 0) { 2379 return retval;
2398 put_tty_driver(normal); 2380
2399 kfree(drv->state); 2381 put_tty_driver(normal);
2400 } 2382out_kfree:
2401 return retval; 2383 kfree(drv->state);
2384out:
2385 return -ENOMEM;
2402} 2386}
2403 2387
2404/** 2388/**
diff --git a/drivers/serial/serial_cs.c b/drivers/serial/serial_cs.c
index 7c7914f5fa02..8cfa5b12ea7a 100644
--- a/drivers/serial/serial_cs.c
+++ b/drivers/serial/serial_cs.c
@@ -54,14 +54,6 @@
54 54
55#include "8250.h" 55#include "8250.h"
56 56
57#ifdef PCMCIA_DEBUG
58static int pc_debug = PCMCIA_DEBUG;
59module_param(pc_debug, int, 0644);
60#define DEBUG(n, args...) if (pc_debug>(n)) printk(KERN_DEBUG args)
61static char *version = "serial_cs.c 1.134 2002/05/04 05:48:53 (David Hinds)";
62#else
63#define DEBUG(n, args...)
64#endif
65 57
66/*====================================================================*/ 58/*====================================================================*/
67 59
@@ -113,6 +105,10 @@ struct serial_cfg_mem {
113 * manfid 0x0160, 0x0104 105 * manfid 0x0160, 0x0104
114 * This card appears to have a 14.7456MHz clock. 106 * This card appears to have a 14.7456MHz clock.
115 */ 107 */
108/* Generic Modem: MD55x (GPRS/EDGE) have
109 * Elan VPU16551 UART with 14.7456MHz oscillator
110 * manfid 0x015D, 0x4C45
111 */
116static void quirk_setup_brainboxes_0104(struct pcmcia_device *link, struct uart_port *port) 112static void quirk_setup_brainboxes_0104(struct pcmcia_device *link, struct uart_port *port)
117{ 113{
118 port->uartclk = 14745600; 114 port->uartclk = 14745600;
@@ -121,24 +117,20 @@ static void quirk_setup_brainboxes_0104(struct pcmcia_device *link, struct uart_
121static int quirk_post_ibm(struct pcmcia_device *link) 117static int quirk_post_ibm(struct pcmcia_device *link)
122{ 118{
123 conf_reg_t reg = { 0, CS_READ, 0x800, 0 }; 119 conf_reg_t reg = { 0, CS_READ, 0x800, 0 };
124 int last_ret, last_fn; 120 int ret;
121
122 ret = pcmcia_access_configuration_register(link, &reg);
123 if (ret)
124 goto failed;
125 125
126 last_ret = pcmcia_access_configuration_register(link, &reg);
127 if (last_ret) {
128 last_fn = AccessConfigurationRegister;
129 goto cs_failed;
130 }
131 reg.Action = CS_WRITE; 126 reg.Action = CS_WRITE;
132 reg.Value = reg.Value | 1; 127 reg.Value = reg.Value | 1;
133 last_ret = pcmcia_access_configuration_register(link, &reg); 128 ret = pcmcia_access_configuration_register(link, &reg);
134 if (last_ret) { 129 if (ret)
135 last_fn = AccessConfigurationRegister; 130 goto failed;
136 goto cs_failed;
137 }
138 return 0; 131 return 0;
139 132
140 cs_failed: 133 failed:
141 cs_error(link, last_fn, last_ret);
142 return -ENODEV; 134 return -ENODEV;
143} 135}
144 136
@@ -158,7 +150,8 @@ static void quirk_wakeup_oxsemi(struct pcmcia_device *link)
158{ 150{
159 struct serial_info *info = link->priv; 151 struct serial_info *info = link->priv;
160 152
161 outb(12, info->c950ctrl + 1); 153 if (info->c950ctrl)
154 outb(12, info->c950ctrl + 1);
162} 155}
163 156
164/* request_region? oxsemi branch does no request_region too... */ 157/* request_region? oxsemi branch does no request_region too... */
@@ -207,6 +200,11 @@ static const struct serial_quirk quirks[] = {
207 .multi = -1, 200 .multi = -1,
208 .setup = quirk_setup_brainboxes_0104, 201 .setup = quirk_setup_brainboxes_0104,
209 }, { 202 }, {
203 .manfid = 0x015D,
204 .prodid = 0x4C45,
205 .multi = -1,
206 .setup = quirk_setup_brainboxes_0104,
207 }, {
210 .manfid = MANFID_IBM, 208 .manfid = MANFID_IBM,
211 .prodid = ~0, 209 .prodid = ~0,
212 .multi = -1, 210 .multi = -1,
@@ -283,7 +281,7 @@ static void serial_remove(struct pcmcia_device *link)
283 struct serial_info *info = link->priv; 281 struct serial_info *info = link->priv;
284 int i; 282 int i;
285 283
286 DEBUG(0, "serial_release(0x%p)\n", link); 284 dev_dbg(&link->dev, "serial_release\n");
287 285
288 /* 286 /*
289 * Recheck to see if the device is still configured. 287 * Recheck to see if the device is still configured.
@@ -334,7 +332,7 @@ static int serial_probe(struct pcmcia_device *link)
334{ 332{
335 struct serial_info *info; 333 struct serial_info *info;
336 334
337 DEBUG(0, "serial_attach()\n"); 335 dev_dbg(&link->dev, "serial_attach()\n");
338 336
339 /* Create new serial device */ 337 /* Create new serial device */
340 info = kzalloc(sizeof (*info), GFP_KERNEL); 338 info = kzalloc(sizeof (*info), GFP_KERNEL);
@@ -346,7 +344,6 @@ static int serial_probe(struct pcmcia_device *link)
346 link->io.Attributes1 = IO_DATA_PATH_WIDTH_8; 344 link->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
347 link->io.NumPorts1 = 8; 345 link->io.NumPorts1 = 8;
348 link->irq.Attributes = IRQ_TYPE_DYNAMIC_SHARING; 346 link->irq.Attributes = IRQ_TYPE_DYNAMIC_SHARING;
349 link->irq.IRQInfo1 = IRQ_LEVEL_ID;
350 link->conf.Attributes = CONF_ENABLE_IRQ; 347 link->conf.Attributes = CONF_ENABLE_IRQ;
351 if (do_sound) { 348 if (do_sound) {
352 link->conf.Attributes |= CONF_ENABLE_SPKR; 349 link->conf.Attributes |= CONF_ENABLE_SPKR;
@@ -370,7 +367,7 @@ static void serial_detach(struct pcmcia_device *link)
370{ 367{
371 struct serial_info *info = link->priv; 368 struct serial_info *info = link->priv;
372 369
373 DEBUG(0, "serial_detach(0x%p)\n", link); 370 dev_dbg(&link->dev, "serial_detach\n");
374 371
375 /* 372 /*
376 * Ensure any outstanding scheduled tasks are completed. 373 * Ensure any outstanding scheduled tasks are completed.
@@ -399,7 +396,7 @@ static int setup_serial(struct pcmcia_device *handle, struct serial_info * info,
399 port.irq = irq; 396 port.irq = irq;
400 port.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_SHARE_IRQ; 397 port.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_SHARE_IRQ;
401 port.uartclk = 1843200; 398 port.uartclk = 1843200;
402 port.dev = &handle_to_dev(handle); 399 port.dev = &handle->dev;
403 if (buggy_uart) 400 if (buggy_uart)
404 port.flags |= UPF_BUGGY_UART; 401 port.flags |= UPF_BUGGY_UART;
405 402
@@ -426,21 +423,6 @@ static int setup_serial(struct pcmcia_device *handle, struct serial_info * info,
426 423
427/*====================================================================*/ 424/*====================================================================*/
428 425
429static int
430first_tuple(struct pcmcia_device *handle, tuple_t * tuple, cisparse_t * parse)
431{
432 int i;
433 i = pcmcia_get_first_tuple(handle, tuple);
434 if (i != 0)
435 return i;
436 i = pcmcia_get_tuple_data(handle, tuple);
437 if (i != 0)
438 return i;
439 return pcmcia_parse_tuple(tuple, parse);
440}
441
442/*====================================================================*/
443
444static int simple_config_check(struct pcmcia_device *p_dev, 426static int simple_config_check(struct pcmcia_device *p_dev,
445 cistpl_cftable_entry_t *cf, 427 cistpl_cftable_entry_t *cf,
446 cistpl_cftable_entry_t *dflt, 428 cistpl_cftable_entry_t *dflt,
@@ -522,15 +504,13 @@ static int simple_config(struct pcmcia_device *link)
522 504
523 printk(KERN_NOTICE 505 printk(KERN_NOTICE
524 "serial_cs: no usable port range found, giving up\n"); 506 "serial_cs: no usable port range found, giving up\n");
525 cs_error(link, RequestIO, i);
526 return -1; 507 return -1;
527 508
528found_port: 509found_port:
529 i = pcmcia_request_irq(link, &link->irq); 510 i = pcmcia_request_irq(link, &link->irq);
530 if (i != 0) { 511 if (i != 0)
531 cs_error(link, RequestIRQ, i);
532 link->irq.AssignedIRQ = 0; 512 link->irq.AssignedIRQ = 0;
533 } 513
534 if (info->multi && (info->manfid == MANFID_3COM)) 514 if (info->multi && (info->manfid == MANFID_3COM))
535 link->conf.ConfigIndex &= ~(0x08); 515 link->conf.ConfigIndex &= ~(0x08);
536 516
@@ -541,10 +521,8 @@ found_port:
541 info->quirk->config(link); 521 info->quirk->config(link);
542 522
543 i = pcmcia_request_configuration(link, &link->conf); 523 i = pcmcia_request_configuration(link, &link->conf);
544 if (i != 0) { 524 if (i != 0)
545 cs_error(link, RequestConfiguration, i);
546 return -1; 525 return -1;
547 }
548 return setup_serial(link, info, link->io.BasePort1, link->irq.AssignedIRQ); 526 return setup_serial(link, info, link->io.BasePort1, link->irq.AssignedIRQ);
549} 527}
550 528
@@ -613,7 +591,6 @@ static int multi_config(struct pcmcia_device *link)
613 /* FIXME: comment does not fit, error handling does not fit */ 591 /* FIXME: comment does not fit, error handling does not fit */
614 printk(KERN_NOTICE 592 printk(KERN_NOTICE
615 "serial_cs: no usable port range found, giving up\n"); 593 "serial_cs: no usable port range found, giving up\n");
616 cs_error(link, RequestIRQ, i);
617 link->irq.AssignedIRQ = 0; 594 link->irq.AssignedIRQ = 0;
618 } 595 }
619 596
@@ -624,10 +601,8 @@ static int multi_config(struct pcmcia_device *link)
624 info->quirk->config(link); 601 info->quirk->config(link);
625 602
626 i = pcmcia_request_configuration(link, &link->conf); 603 i = pcmcia_request_configuration(link, &link->conf);
627 if (i != 0) { 604 if (i != 0)
628 cs_error(link, RequestConfiguration, i);
629 return -ENODEV; 605 return -ENODEV;
630 }
631 606
632 /* The Oxford Semiconductor OXCF950 cards are in fact single-port: 607 /* The Oxford Semiconductor OXCF950 cards are in fact single-port:
633 * 8 registers are for the UART, the others are extra registers. 608 * 8 registers are for the UART, the others are extra registers.
@@ -665,6 +640,25 @@ static int multi_config(struct pcmcia_device *link)
665 return 0; 640 return 0;
666} 641}
667 642
643static int serial_check_for_multi(struct pcmcia_device *p_dev,
644 cistpl_cftable_entry_t *cf,
645 cistpl_cftable_entry_t *dflt,
646 unsigned int vcc,
647 void *priv_data)
648{
649 struct serial_info *info = p_dev->priv;
650
651 if ((cf->io.nwin == 1) && (cf->io.win[0].len % 8 == 0))
652 info->multi = cf->io.win[0].len >> 3;
653
654 if ((cf->io.nwin == 2) && (cf->io.win[0].len == 8) &&
655 (cf->io.win[1].len == 8))
656 info->multi = 2;
657
658 return 0; /* break */
659}
660
661
668/*====================================================================== 662/*======================================================================
669 663
670 serial_config() is scheduled to run after a CARD_INSERTION event 664 serial_config() is scheduled to run after a CARD_INSERTION event
@@ -676,46 +670,14 @@ static int multi_config(struct pcmcia_device *link)
676static int serial_config(struct pcmcia_device * link) 670static int serial_config(struct pcmcia_device * link)
677{ 671{
678 struct serial_info *info = link->priv; 672 struct serial_info *info = link->priv;
679 struct serial_cfg_mem *cfg_mem; 673 int i;
680 tuple_t *tuple;
681 u_char *buf;
682 cisparse_t *parse;
683 cistpl_cftable_entry_t *cf;
684 int i, last_ret, last_fn;
685
686 DEBUG(0, "serial_config(0x%p)\n", link);
687
688 cfg_mem = kmalloc(sizeof(struct serial_cfg_mem), GFP_KERNEL);
689 if (!cfg_mem)
690 goto failed;
691 674
692 tuple = &cfg_mem->tuple; 675 dev_dbg(&link->dev, "serial_config\n");
693 parse = &cfg_mem->parse;
694 cf = &parse->cftable_entry;
695 buf = cfg_mem->buf;
696
697 tuple->TupleData = (cisdata_t *) buf;
698 tuple->TupleOffset = 0;
699 tuple->TupleDataMax = 255;
700 tuple->Attributes = 0;
701
702 /* Get configuration register information */
703 tuple->DesiredTuple = CISTPL_CONFIG;
704 last_ret = first_tuple(link, tuple, parse);
705 if (last_ret != 0) {
706 last_fn = ParseTuple;
707 goto cs_failed;
708 }
709 link->conf.ConfigBase = parse->config.base;
710 link->conf.Present = parse->config.rmask[0];
711 676
712 /* Is this a compliant multifunction card? */ 677 /* Is this a compliant multifunction card? */
713 tuple->DesiredTuple = CISTPL_LONGLINK_MFC; 678 info->multi = (link->socket->functions > 1);
714 tuple->Attributes = TUPLE_RETURN_COMMON | TUPLE_RETURN_LINK;
715 info->multi = (first_tuple(link, tuple, parse) == 0);
716 679
717 /* Is this a multiport card? */ 680 /* Is this a multiport card? */
718 tuple->DesiredTuple = CISTPL_MANFID;
719 info->manfid = link->manf_id; 681 info->manfid = link->manf_id;
720 info->prodid = link->card_id; 682 info->prodid = link->card_id;
721 683
@@ -730,20 +692,11 @@ static int serial_config(struct pcmcia_device * link)
730 692
731 /* Another check for dual-serial cards: look for either serial or 693 /* Another check for dual-serial cards: look for either serial or
732 multifunction cards that ask for appropriate IO port ranges */ 694 multifunction cards that ask for appropriate IO port ranges */
733 tuple->DesiredTuple = CISTPL_FUNCID;
734 if ((info->multi == 0) && 695 if ((info->multi == 0) &&
735 (link->has_func_id) && 696 (link->has_func_id) &&
736 ((link->func_id == CISTPL_FUNCID_MULTI) || 697 ((link->func_id == CISTPL_FUNCID_MULTI) ||
737 (link->func_id == CISTPL_FUNCID_SERIAL))) { 698 (link->func_id == CISTPL_FUNCID_SERIAL)))
738 tuple->DesiredTuple = CISTPL_CFTABLE_ENTRY; 699 pcmcia_loop_config(link, serial_check_for_multi, info);
739 if (first_tuple(link, tuple, parse) == 0) {
740 if ((cf->io.nwin == 1) && (cf->io.win[0].len % 8 == 0))
741 info->multi = cf->io.win[0].len >> 3;
742 if ((cf->io.nwin == 2) && (cf->io.win[0].len == 8) &&
743 (cf->io.win[1].len == 8))
744 info->multi = 2;
745 }
746 }
747 700
748 /* 701 /*
749 * Apply any multi-port quirk. 702 * Apply any multi-port quirk.
@@ -752,11 +705,11 @@ static int serial_config(struct pcmcia_device * link)
752 info->multi = info->quirk->multi; 705 info->multi = info->quirk->multi;
753 706
754 if (info->multi > 1) 707 if (info->multi > 1)
755 multi_config(link); 708 i = multi_config(link);
756 else 709 else
757 simple_config(link); 710 i = simple_config(link);
758 711
759 if (info->ndev == 0) 712 if (i || info->ndev == 0)
760 goto failed; 713 goto failed;
761 714
762 /* 715 /*
@@ -768,14 +721,11 @@ static int serial_config(struct pcmcia_device * link)
768 goto failed; 721 goto failed;
769 722
770 link->dev_node = &info->node[0]; 723 link->dev_node = &info->node[0];
771 kfree(cfg_mem);
772 return 0; 724 return 0;
773 725
774cs_failed:
775 cs_error(link, last_fn, last_ret);
776failed: 726failed:
727 dev_warn(&link->dev, "serial_cs: failed to initialize\n");
777 serial_remove(link); 728 serial_remove(link);
778 kfree(cfg_mem);
779 return -ENODEV; 729 return -ENODEV;
780} 730}
781 731
@@ -804,6 +754,7 @@ static struct pcmcia_device_id serial_ids[] = {
804 PCMCIA_PFC_DEVICE_PROD_ID13(1, "Xircom", "REM10", 0x2e3ee845, 0x76df1d29), 754 PCMCIA_PFC_DEVICE_PROD_ID13(1, "Xircom", "REM10", 0x2e3ee845, 0x76df1d29),
805 PCMCIA_PFC_DEVICE_PROD_ID13(1, "Xircom", "XEM5600", 0x2e3ee845, 0xf1403719), 755 PCMCIA_PFC_DEVICE_PROD_ID13(1, "Xircom", "XEM5600", 0x2e3ee845, 0xf1403719),
806 PCMCIA_PFC_DEVICE_PROD_ID12(1, "AnyCom", "Fast Ethernet + 56K COMBO", 0x578ba6e7, 0xb0ac62c4), 756 PCMCIA_PFC_DEVICE_PROD_ID12(1, "AnyCom", "Fast Ethernet + 56K COMBO", 0x578ba6e7, 0xb0ac62c4),
757 PCMCIA_PFC_DEVICE_PROD_ID12(1, "ATKK", "LM33-PCM-T", 0xba9eb7e2, 0x077c174e),
807 PCMCIA_PFC_DEVICE_PROD_ID12(1, "D-Link", "DME336T", 0x1a424a1c, 0xb23897ff), 758 PCMCIA_PFC_DEVICE_PROD_ID12(1, "D-Link", "DME336T", 0x1a424a1c, 0xb23897ff),
808 PCMCIA_PFC_DEVICE_PROD_ID12(1, "Gateway 2000", "XJEM3336", 0xdd9989be, 0x662c394c), 759 PCMCIA_PFC_DEVICE_PROD_ID12(1, "Gateway 2000", "XJEM3336", 0xdd9989be, 0x662c394c),
809 PCMCIA_PFC_DEVICE_PROD_ID12(1, "Grey Cell", "GCS3000", 0x2a151fac, 0x48b932ae), 760 PCMCIA_PFC_DEVICE_PROD_ID12(1, "Grey Cell", "GCS3000", 0x2a151fac, 0x48b932ae),
@@ -818,6 +769,7 @@ static struct pcmcia_device_id serial_ids[] = {
818 PCMCIA_PFC_DEVICE_PROD_ID12(1, "PCMCIAs", "LanModem", 0xdcfe12d3, 0xc67c648f), 769 PCMCIA_PFC_DEVICE_PROD_ID12(1, "PCMCIAs", "LanModem", 0xdcfe12d3, 0xc67c648f),
819 PCMCIA_PFC_DEVICE_PROD_ID12(1, "TDK", "GlobalNetworker 3410/3412", 0x1eae9475, 0xd9a93bed), 770 PCMCIA_PFC_DEVICE_PROD_ID12(1, "TDK", "GlobalNetworker 3410/3412", 0x1eae9475, 0xd9a93bed),
820 PCMCIA_PFC_DEVICE_PROD_ID12(1, "Xircom", "CreditCard Ethernet+Modem II", 0x2e3ee845, 0xeca401bf), 771 PCMCIA_PFC_DEVICE_PROD_ID12(1, "Xircom", "CreditCard Ethernet+Modem II", 0x2e3ee845, 0xeca401bf),
772 PCMCIA_PFC_DEVICE_MANF_CARD(1, 0x0032, 0x0e01),
821 PCMCIA_PFC_DEVICE_MANF_CARD(1, 0x0032, 0x0a05), 773 PCMCIA_PFC_DEVICE_MANF_CARD(1, 0x0032, 0x0a05),
822 PCMCIA_PFC_DEVICE_MANF_CARD(1, 0x0032, 0x1101), 774 PCMCIA_PFC_DEVICE_MANF_CARD(1, 0x0032, 0x1101),
823 PCMCIA_MFC_DEVICE_MANF_CARD(0, 0x0104, 0x0070), 775 PCMCIA_MFC_DEVICE_MANF_CARD(0, 0x0104, 0x0070),
@@ -880,6 +832,7 @@ static struct pcmcia_device_id serial_ids[] = {
880 PCMCIA_MFC_DEVICE_CIS_MANF_CARD(1, 0x0101, 0x0035, "cis/3CXEM556.cis"), 832 PCMCIA_MFC_DEVICE_CIS_MANF_CARD(1, 0x0101, 0x0035, "cis/3CXEM556.cis"),
881 PCMCIA_MFC_DEVICE_CIS_MANF_CARD(1, 0x0101, 0x003d, "cis/3CXEM556.cis"), 833 PCMCIA_MFC_DEVICE_CIS_MANF_CARD(1, 0x0101, 0x003d, "cis/3CXEM556.cis"),
882 PCMCIA_DEVICE_CIS_PROD_ID12("Sierra Wireless", "AC850", 0xd85f6206, 0x42a2c018, "cis/SW_8xx_SER.cis"), /* Sierra Wireless AC850 3G Network Adapter R1 */ 834 PCMCIA_DEVICE_CIS_PROD_ID12("Sierra Wireless", "AC850", 0xd85f6206, 0x42a2c018, "cis/SW_8xx_SER.cis"), /* Sierra Wireless AC850 3G Network Adapter R1 */
835 PCMCIA_DEVICE_CIS_PROD_ID12("Sierra Wireless", "AC860", 0xd85f6206, 0x698f93db, "cis/SW_8xx_SER.cis"), /* Sierra Wireless AC860 3G Network Adapter R1 */
883 PCMCIA_DEVICE_CIS_PROD_ID12("Sierra Wireless", "AC710/AC750", 0xd85f6206, 0x761b11e0, "cis/SW_7xx_SER.cis"), /* Sierra Wireless AC710/AC750 GPRS Network Adapter R1 */ 836 PCMCIA_DEVICE_CIS_PROD_ID12("Sierra Wireless", "AC710/AC750", 0xd85f6206, 0x761b11e0, "cis/SW_7xx_SER.cis"), /* Sierra Wireless AC710/AC750 GPRS Network Adapter R1 */
884 PCMCIA_DEVICE_CIS_MANF_CARD(0x0192, 0xa555, "cis/SW_555_SER.cis"), /* Sierra Aircard 555 CDMA 1xrtt Modem -- pre update */ 837 PCMCIA_DEVICE_CIS_MANF_CARD(0x0192, 0xa555, "cis/SW_555_SER.cis"), /* Sierra Aircard 555 CDMA 1xrtt Modem -- pre update */
885 PCMCIA_DEVICE_CIS_MANF_CARD(0x013f, 0xa555, "cis/SW_555_SER.cis"), /* Sierra Aircard 555 CDMA 1xrtt Modem -- post update */ 838 PCMCIA_DEVICE_CIS_MANF_CARD(0x013f, 0xa555, "cis/SW_555_SER.cis"), /* Sierra Aircard 555 CDMA 1xrtt Modem -- post update */
@@ -888,7 +841,7 @@ static struct pcmcia_device_id serial_ids[] = {
888 PCMCIA_DEVICE_CIS_PROD_ID12("ADVANTECH", "COMpad-32/85B-4", 0x96913a85, 0xcec8f102, "cis/COMpad4.cis"), 841 PCMCIA_DEVICE_CIS_PROD_ID12("ADVANTECH", "COMpad-32/85B-4", 0x96913a85, 0xcec8f102, "cis/COMpad4.cis"),
889 PCMCIA_DEVICE_CIS_PROD_ID123("ADVANTECH", "COMpad-32/85", "1.0", 0x96913a85, 0x8fbe92ae, 0x0877b627, "cis/COMpad2.cis"), 842 PCMCIA_DEVICE_CIS_PROD_ID123("ADVANTECH", "COMpad-32/85", "1.0", 0x96913a85, 0x8fbe92ae, 0x0877b627, "cis/COMpad2.cis"),
890 PCMCIA_DEVICE_CIS_PROD_ID2("RS-COM 2P", 0xad20b156, "cis/RS-COM-2P.cis"), 843 PCMCIA_DEVICE_CIS_PROD_ID2("RS-COM 2P", 0xad20b156, "cis/RS-COM-2P.cis"),
891 PCMCIA_DEVICE_CIS_MANF_CARD(0x0013, 0x0000, "GLOBETROTTER.cis"), 844 PCMCIA_DEVICE_CIS_MANF_CARD(0x0013, 0x0000, "cis/GLOBETROTTER.cis"),
892 PCMCIA_DEVICE_PROD_ID12("ELAN DIGITAL SYSTEMS LTD, c1997.","SERIAL CARD: SL100 1.00.",0x19ca78af,0xf964f42b), 845 PCMCIA_DEVICE_PROD_ID12("ELAN DIGITAL SYSTEMS LTD, c1997.","SERIAL CARD: SL100 1.00.",0x19ca78af,0xf964f42b),
893 PCMCIA_DEVICE_PROD_ID12("ELAN DIGITAL SYSTEMS LTD, c1997.","SERIAL CARD: SL100",0x19ca78af,0x71d98e83), 846 PCMCIA_DEVICE_PROD_ID12("ELAN DIGITAL SYSTEMS LTD, c1997.","SERIAL CARD: SL100",0x19ca78af,0x71d98e83),
894 PCMCIA_DEVICE_PROD_ID12("ELAN DIGITAL SYSTEMS LTD, c1997.","SERIAL CARD: SL232 1.00.",0x19ca78af,0x69fb7490), 847 PCMCIA_DEVICE_PROD_ID12("ELAN DIGITAL SYSTEMS LTD, c1997.","SERIAL CARD: SL232 1.00.",0x19ca78af,0x69fb7490),
@@ -922,6 +875,18 @@ static struct pcmcia_device_id serial_ids[] = {
922}; 875};
923MODULE_DEVICE_TABLE(pcmcia, serial_ids); 876MODULE_DEVICE_TABLE(pcmcia, serial_ids);
924 877
878MODULE_FIRMWARE("cis/PCMLM28.cis");
879MODULE_FIRMWARE("cis/DP83903.cis");
880MODULE_FIRMWARE("cis/3CCFEM556.cis");
881MODULE_FIRMWARE("cis/3CXEM556.cis");
882MODULE_FIRMWARE("cis/SW_8xx_SER.cis");
883MODULE_FIRMWARE("cis/SW_7xx_SER.cis");
884MODULE_FIRMWARE("cis/SW_555_SER.cis");
885MODULE_FIRMWARE("cis/MT5634ZLX.cis");
886MODULE_FIRMWARE("cis/COMpad2.cis");
887MODULE_FIRMWARE("cis/COMpad4.cis");
888MODULE_FIRMWARE("cis/RS-COM-2P.cis");
889
925static struct pcmcia_driver serial_cs_driver = { 890static struct pcmcia_driver serial_cs_driver = {
926 .owner = THIS_MODULE, 891 .owner = THIS_MODULE,
927 .drv = { 892 .drv = {
diff --git a/drivers/serial/serial_ks8695.c b/drivers/serial/serial_ks8695.c
index 2e71bbc04dac..b1962025b1aa 100644
--- a/drivers/serial/serial_ks8695.c
+++ b/drivers/serial/serial_ks8695.c
@@ -650,6 +650,7 @@ static struct console ks8695_console = {
650 650
651static int __init ks8695_console_init(void) 651static int __init ks8695_console_init(void)
652{ 652{
653 add_preferred_console(SERIAL_KS8695_DEVNAME, 0, NULL);
653 register_console(&ks8695_console); 654 register_console(&ks8695_console);
654 return 0; 655 return 0;
655} 656}
diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c
index 6498bd1fb6dd..8eb094c1f61b 100644
--- a/drivers/serial/sh-sci.c
+++ b/drivers/serial/sh-sci.c
@@ -48,9 +48,11 @@
48#include <linux/ctype.h> 48#include <linux/ctype.h>
49#include <linux/err.h> 49#include <linux/err.h>
50#include <linux/list.h> 50#include <linux/list.h>
51#include <linux/dmaengine.h>
52#include <linux/scatterlist.h>
53#include <linux/slab.h>
51 54
52#ifdef CONFIG_SUPERH 55#ifdef CONFIG_SUPERH
53#include <asm/clock.h>
54#include <asm/sh_bios.h> 56#include <asm/sh_bios.h>
55#endif 57#endif
56 58
@@ -79,22 +81,39 @@ struct sci_port {
79 struct timer_list break_timer; 81 struct timer_list break_timer;
80 int break_flag; 82 int break_flag;
81 83
82#ifdef CONFIG_HAVE_CLK
83 /* Interface clock */ 84 /* Interface clock */
84 struct clk *iclk; 85 struct clk *iclk;
85 /* Data clock */ 86 /* Data clock */
86 struct clk *dclk; 87 struct clk *dclk;
87#endif 88
88 struct list_head node; 89 struct list_head node;
90 struct dma_chan *chan_tx;
91 struct dma_chan *chan_rx;
92#ifdef CONFIG_SERIAL_SH_SCI_DMA
93 struct device *dma_dev;
94 enum sh_dmae_slave_chan_id slave_tx;
95 enum sh_dmae_slave_chan_id slave_rx;
96 struct dma_async_tx_descriptor *desc_tx;
97 struct dma_async_tx_descriptor *desc_rx[2];
98 dma_cookie_t cookie_tx;
99 dma_cookie_t cookie_rx[2];
100 dma_cookie_t active_rx;
101 struct scatterlist sg_tx;
102 unsigned int sg_len_tx;
103 struct scatterlist sg_rx[2];
104 size_t buf_len_rx;
105 struct sh_dmae_slave param_tx;
106 struct sh_dmae_slave param_rx;
107 struct work_struct work_tx;
108 struct work_struct work_rx;
109 struct timer_list rx_timer;
110#endif
89}; 111};
90 112
91struct sh_sci_priv { 113struct sh_sci_priv {
92 spinlock_t lock; 114 spinlock_t lock;
93 struct list_head ports; 115 struct list_head ports;
94
95#ifdef CONFIG_HAVE_CLK
96 struct notifier_block clk_nb; 116 struct notifier_block clk_nb;
97#endif
98}; 117};
99 118
100/* Function prototypes */ 119/* Function prototypes */
@@ -156,32 +175,6 @@ static void sci_poll_put_char(struct uart_port *port, unsigned char c)
156} 175}
157#endif /* CONFIG_CONSOLE_POLL || CONFIG_SERIAL_SH_SCI_CONSOLE */ 176#endif /* CONFIG_CONSOLE_POLL || CONFIG_SERIAL_SH_SCI_CONSOLE */
158 177
159#if defined(__H8300S__)
160enum { sci_disable, sci_enable };
161
162static void h8300_sci_config(struct uart_port *port, unsigned int ctrl)
163{
164 volatile unsigned char *mstpcrl = (volatile unsigned char *)MSTPCRL;
165 int ch = (port->mapbase - SMR0) >> 3;
166 unsigned char mask = 1 << (ch+1);
167
168 if (ctrl == sci_disable)
169 *mstpcrl |= mask;
170 else
171 *mstpcrl &= ~mask;
172}
173
174static void h8300_sci_enable(struct uart_port *port)
175{
176 h8300_sci_config(port, sci_enable);
177}
178
179static void h8300_sci_disable(struct uart_port *port)
180{
181 h8300_sci_config(port, sci_disable);
182}
183#endif
184
185#if defined(__H8300H__) || defined(__H8300S__) 178#if defined(__H8300H__) || defined(__H8300S__)
186static void sci_init_pins(struct uart_port *port, unsigned int cflag) 179static void sci_init_pins(struct uart_port *port, unsigned int cflag)
187{ 180{
@@ -253,9 +246,9 @@ static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
253 Set SCP6MD1,0 = {01} (output) */ 246 Set SCP6MD1,0 = {01} (output) */
254 __raw_writew((data & 0x0fcf) | 0x1000, SCPCR); 247 __raw_writew((data & 0x0fcf) | 0x1000, SCPCR);
255 248
256 data = ctrl_inb(SCPDR); 249 data = __raw_readb(SCPDR);
257 /* Set /RTS2 (bit6) = 0 */ 250 /* Set /RTS2 (bit6) = 0 */
258 ctrl_outb(data & 0xbf, SCPDR); 251 __raw_writeb(data & 0xbf, SCPDR);
259 } 252 }
260} 253}
261#elif defined(CONFIG_CPU_SUBTYPE_SH7722) 254#elif defined(CONFIG_CPU_SUBTYPE_SH7722)
@@ -300,29 +293,44 @@ static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
300 defined(CONFIG_CPU_SUBTYPE_SH7780) || \ 293 defined(CONFIG_CPU_SUBTYPE_SH7780) || \
301 defined(CONFIG_CPU_SUBTYPE_SH7785) || \ 294 defined(CONFIG_CPU_SUBTYPE_SH7785) || \
302 defined(CONFIG_CPU_SUBTYPE_SH7786) 295 defined(CONFIG_CPU_SUBTYPE_SH7786)
303static inline int scif_txroom(struct uart_port *port) 296static int scif_txfill(struct uart_port *port)
297{
298 return sci_in(port, SCTFDR) & 0xff;
299}
300
301static int scif_txroom(struct uart_port *port)
304{ 302{
305 return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0xff); 303 return SCIF_TXROOM_MAX - scif_txfill(port);
306} 304}
307 305
308static inline int scif_rxroom(struct uart_port *port) 306static int scif_rxfill(struct uart_port *port)
309{ 307{
310 return sci_in(port, SCRFDR) & 0xff; 308 return sci_in(port, SCRFDR) & 0xff;
311} 309}
312#elif defined(CONFIG_CPU_SUBTYPE_SH7763) 310#elif defined(CONFIG_CPU_SUBTYPE_SH7763)
313static inline int scif_txroom(struct uart_port *port) 311static int scif_txfill(struct uart_port *port)
314{ 312{
315 if ((port->mapbase == 0xffe00000) || 313 if (port->mapbase == 0xffe00000 ||
316 (port->mapbase == 0xffe08000)) { 314 port->mapbase == 0xffe08000)
317 /* SCIF0/1*/ 315 /* SCIF0/1*/
318 return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0xff); 316 return sci_in(port, SCTFDR) & 0xff;
319 } else { 317 else
320 /* SCIF2 */ 318 /* SCIF2 */
321 return SCIF2_TXROOM_MAX - (sci_in(port, SCFDR) >> 8); 319 return sci_in(port, SCFDR) >> 8;
322 } 320}
321
322static int scif_txroom(struct uart_port *port)
323{
324 if (port->mapbase == 0xffe00000 ||
325 port->mapbase == 0xffe08000)
326 /* SCIF0/1*/
327 return SCIF_TXROOM_MAX - scif_txfill(port);
328 else
329 /* SCIF2 */
330 return SCIF2_TXROOM_MAX - scif_txfill(port);
323} 331}
324 332
325static inline int scif_rxroom(struct uart_port *port) 333static int scif_rxfill(struct uart_port *port)
326{ 334{
327 if ((port->mapbase == 0xffe00000) || 335 if ((port->mapbase == 0xffe00000) ||
328 (port->mapbase == 0xffe08000)) { 336 (port->mapbase == 0xffe08000)) {
@@ -334,23 +342,33 @@ static inline int scif_rxroom(struct uart_port *port)
334 } 342 }
335} 343}
336#else 344#else
337static inline int scif_txroom(struct uart_port *port) 345static int scif_txfill(struct uart_port *port)
346{
347 return sci_in(port, SCFDR) >> 8;
348}
349
350static int scif_txroom(struct uart_port *port)
338{ 351{
339 return SCIF_TXROOM_MAX - (sci_in(port, SCFDR) >> 8); 352 return SCIF_TXROOM_MAX - scif_txfill(port);
340} 353}
341 354
342static inline int scif_rxroom(struct uart_port *port) 355static int scif_rxfill(struct uart_port *port)
343{ 356{
344 return sci_in(port, SCFDR) & SCIF_RFDC_MASK; 357 return sci_in(port, SCFDR) & SCIF_RFDC_MASK;
345} 358}
346#endif 359#endif
347 360
348static inline int sci_txroom(struct uart_port *port) 361static int sci_txfill(struct uart_port *port)
349{ 362{
350 return (sci_in(port, SCxSR) & SCI_TDRE) != 0; 363 return !(sci_in(port, SCxSR) & SCI_TDRE);
351} 364}
352 365
353static inline int sci_rxroom(struct uart_port *port) 366static int sci_txroom(struct uart_port *port)
367{
368 return !sci_txfill(port);
369}
370
371static int sci_rxfill(struct uart_port *port)
354{ 372{
355 return (sci_in(port, SCxSR) & SCxSR_RDxF(port)) != 0; 373 return (sci_in(port, SCxSR) & SCxSR_RDxF(port)) != 0;
356} 374}
@@ -437,9 +455,9 @@ static inline void sci_receive_chars(struct uart_port *port)
437 455
438 while (1) { 456 while (1) {
439 if (port->type == PORT_SCI) 457 if (port->type == PORT_SCI)
440 count = sci_rxroom(port); 458 count = sci_rxfill(port);
441 else 459 else
442 count = scif_rxroom(port); 460 count = scif_rxfill(port);
443 461
444 /* Don't copy more bytes than there is room for in the buffer */ 462 /* Don't copy more bytes than there is room for in the buffer */
445 count = tty_buffer_request_room(tty, count); 463 count = tty_buffer_request_room(tty, count);
@@ -484,10 +502,10 @@ static inline void sci_receive_chars(struct uart_port *port)
484 } 502 }
485 503
486 /* Store data and status */ 504 /* Store data and status */
487 if (status&SCxSR_FER(port)) { 505 if (status & SCxSR_FER(port)) {
488 flag = TTY_FRAME; 506 flag = TTY_FRAME;
489 dev_notice(port->dev, "frame error\n"); 507 dev_notice(port->dev, "frame error\n");
490 } else if (status&SCxSR_PER(port)) { 508 } else if (status & SCxSR_PER(port)) {
491 flag = TTY_PARITY; 509 flag = TTY_PARITY;
492 dev_notice(port->dev, "parity error\n"); 510 dev_notice(port->dev, "parity error\n");
493 } else 511 } else
@@ -649,13 +667,39 @@ static inline int sci_handle_breaks(struct uart_port *port)
649 return copied; 667 return copied;
650} 668}
651 669
652static irqreturn_t sci_rx_interrupt(int irq, void *port) 670static irqreturn_t sci_rx_interrupt(int irq, void *ptr)
653{ 671{
672#ifdef CONFIG_SERIAL_SH_SCI_DMA
673 struct uart_port *port = ptr;
674 struct sci_port *s = to_sci_port(port);
675
676 if (s->chan_rx) {
677 unsigned long tout;
678 u16 scr = sci_in(port, SCSCR);
679 u16 ssr = sci_in(port, SCxSR);
680
681 /* Disable future Rx interrupts */
682 sci_out(port, SCSCR, scr & ~SCI_CTRL_FLAGS_RIE);
683 /* Clear current interrupt */
684 sci_out(port, SCxSR, ssr & ~(1 | SCxSR_RDxF(port)));
685 /* Calculate delay for 1.5 DMA buffers */
686 tout = (port->timeout - HZ / 50) * s->buf_len_rx * 3 /
687 port->fifosize / 2;
688 dev_dbg(port->dev, "Rx IRQ: setup timeout in %lu ms\n",
689 tout * 1000 / HZ);
690 if (tout < 2)
691 tout = 2;
692 mod_timer(&s->rx_timer, jiffies + tout);
693
694 return IRQ_HANDLED;
695 }
696#endif
697
654 /* I think sci_receive_chars has to be called irrespective 698 /* I think sci_receive_chars has to be called irrespective
655 * of whether the I_IXOFF is set, otherwise, how is the interrupt 699 * of whether the I_IXOFF is set, otherwise, how is the interrupt
656 * to be disabled? 700 * to be disabled?
657 */ 701 */
658 sci_receive_chars(port); 702 sci_receive_chars(ptr);
659 703
660 return IRQ_HANDLED; 704 return IRQ_HANDLED;
661} 705}
@@ -711,6 +755,7 @@ static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr)
711{ 755{
712 unsigned short ssr_status, scr_status, err_enabled; 756 unsigned short ssr_status, scr_status, err_enabled;
713 struct uart_port *port = ptr; 757 struct uart_port *port = ptr;
758 struct sci_port *s = to_sci_port(port);
714 irqreturn_t ret = IRQ_NONE; 759 irqreturn_t ret = IRQ_NONE;
715 760
716 ssr_status = sci_in(port, SCxSR); 761 ssr_status = sci_in(port, SCxSR);
@@ -718,10 +763,15 @@ static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr)
718 err_enabled = scr_status & (SCI_CTRL_FLAGS_REIE | SCI_CTRL_FLAGS_RIE); 763 err_enabled = scr_status & (SCI_CTRL_FLAGS_REIE | SCI_CTRL_FLAGS_RIE);
719 764
720 /* Tx Interrupt */ 765 /* Tx Interrupt */
721 if ((ssr_status & SCxSR_TDxE(port)) && (scr_status & SCI_CTRL_FLAGS_TIE)) 766 if ((ssr_status & SCxSR_TDxE(port)) && (scr_status & SCI_CTRL_FLAGS_TIE) &&
767 !s->chan_tx)
722 ret = sci_tx_interrupt(irq, ptr); 768 ret = sci_tx_interrupt(irq, ptr);
723 /* Rx Interrupt */ 769 /*
724 if ((ssr_status & SCxSR_RDxF(port)) && (scr_status & SCI_CTRL_FLAGS_RIE)) 770 * Rx Interrupt: if we're using DMA, the DMA controller clears RDF /
771 * DR flags
772 */
773 if (((ssr_status & SCxSR_RDxF(port)) || s->chan_rx) &&
774 (scr_status & SCI_CTRL_FLAGS_RIE))
725 ret = sci_rx_interrupt(irq, ptr); 775 ret = sci_rx_interrupt(irq, ptr);
726 /* Error Interrupt */ 776 /* Error Interrupt */
727 if ((ssr_status & SCxSR_ERRORS(port)) && err_enabled) 777 if ((ssr_status & SCxSR_ERRORS(port)) && err_enabled)
@@ -733,7 +783,6 @@ static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr)
733 return ret; 783 return ret;
734} 784}
735 785
736#ifdef CONFIG_HAVE_CLK
737/* 786/*
738 * Here we define a transistion notifier so that we can update all of our 787 * Here we define a transistion notifier so that we can update all of our
739 * ports' baud rate when the peripheral clock changes. 788 * ports' baud rate when the peripheral clock changes.
@@ -751,7 +800,6 @@ static int sci_notifier(struct notifier_block *self,
751 spin_lock_irqsave(&priv->lock, flags); 800 spin_lock_irqsave(&priv->lock, flags);
752 list_for_each_entry(sci_port, &priv->ports, node) 801 list_for_each_entry(sci_port, &priv->ports, node)
753 sci_port->port.uartclk = clk_get_rate(sci_port->dclk); 802 sci_port->port.uartclk = clk_get_rate(sci_port->dclk);
754
755 spin_unlock_irqrestore(&priv->lock, flags); 803 spin_unlock_irqrestore(&priv->lock, flags);
756 } 804 }
757 805
@@ -778,7 +826,6 @@ static void sci_clk_disable(struct uart_port *port)
778 826
779 clk_disable(sci_port->dclk); 827 clk_disable(sci_port->dclk);
780} 828}
781#endif
782 829
783static int sci_request_irq(struct sci_port *port) 830static int sci_request_irq(struct sci_port *port)
784{ 831{
@@ -833,8 +880,10 @@ static void sci_free_irq(struct sci_port *port)
833 880
834static unsigned int sci_tx_empty(struct uart_port *port) 881static unsigned int sci_tx_empty(struct uart_port *port)
835{ 882{
836 /* Can't detect */ 883 unsigned short status = sci_in(port, SCxSR);
837 return TIOCSER_TEMT; 884 unsigned short in_tx_fifo = scif_txfill(port);
885
886 return (status & SCxSR_TEND(port)) && !in_tx_fifo ? TIOCSER_TEMT : 0;
838} 887}
839 888
840static void sci_set_mctrl(struct uart_port *port, unsigned int mctrl) 889static void sci_set_mctrl(struct uart_port *port, unsigned int mctrl)
@@ -846,16 +895,297 @@ static void sci_set_mctrl(struct uart_port *port, unsigned int mctrl)
846 895
847static unsigned int sci_get_mctrl(struct uart_port *port) 896static unsigned int sci_get_mctrl(struct uart_port *port)
848{ 897{
849 /* This routine is used for geting signals of: DTR, DCD, DSR, RI, 898 /* This routine is used for getting signals of: DTR, DCD, DSR, RI,
850 and CTS/RTS */ 899 and CTS/RTS */
851 900
852 return TIOCM_DTR | TIOCM_RTS | TIOCM_DSR; 901 return TIOCM_DTR | TIOCM_RTS | TIOCM_DSR;
853} 902}
854 903
904#ifdef CONFIG_SERIAL_SH_SCI_DMA
905static void sci_dma_tx_complete(void *arg)
906{
907 struct sci_port *s = arg;
908 struct uart_port *port = &s->port;
909 struct circ_buf *xmit = &port->state->xmit;
910 unsigned long flags;
911
912 dev_dbg(port->dev, "%s(%d)\n", __func__, port->line);
913
914 spin_lock_irqsave(&port->lock, flags);
915
916 xmit->tail += s->sg_tx.length;
917 xmit->tail &= UART_XMIT_SIZE - 1;
918
919 port->icount.tx += s->sg_tx.length;
920
921 async_tx_ack(s->desc_tx);
922 s->cookie_tx = -EINVAL;
923 s->desc_tx = NULL;
924
925 spin_unlock_irqrestore(&port->lock, flags);
926
927 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
928 uart_write_wakeup(port);
929
930 if (uart_circ_chars_pending(xmit))
931 schedule_work(&s->work_tx);
932}
933
934/* Locking: called with port lock held */
935static int sci_dma_rx_push(struct sci_port *s, struct tty_struct *tty,
936 size_t count)
937{
938 struct uart_port *port = &s->port;
939 int i, active, room;
940
941 room = tty_buffer_request_room(tty, count);
942
943 if (s->active_rx == s->cookie_rx[0]) {
944 active = 0;
945 } else if (s->active_rx == s->cookie_rx[1]) {
946 active = 1;
947 } else {
948 dev_err(port->dev, "cookie %d not found!\n", s->active_rx);
949 return 0;
950 }
951
952 if (room < count)
953 dev_warn(port->dev, "Rx overrun: dropping %u bytes\n",
954 count - room);
955 if (!room)
956 return room;
957
958 for (i = 0; i < room; i++)
959 tty_insert_flip_char(tty, ((u8 *)sg_virt(&s->sg_rx[active]))[i],
960 TTY_NORMAL);
961
962 port->icount.rx += room;
963
964 return room;
965}
966
967static void sci_dma_rx_complete(void *arg)
968{
969 struct sci_port *s = arg;
970 struct uart_port *port = &s->port;
971 struct tty_struct *tty = port->state->port.tty;
972 unsigned long flags;
973 int count;
974
975 dev_dbg(port->dev, "%s(%d)\n", __func__, port->line);
976
977 spin_lock_irqsave(&port->lock, flags);
978
979 count = sci_dma_rx_push(s, tty, s->buf_len_rx);
980
981 mod_timer(&s->rx_timer, jiffies + msecs_to_jiffies(5));
982
983 spin_unlock_irqrestore(&port->lock, flags);
984
985 if (count)
986 tty_flip_buffer_push(tty);
987
988 schedule_work(&s->work_rx);
989}
990
991static void sci_start_rx(struct uart_port *port);
992static void sci_start_tx(struct uart_port *port);
993
994static void sci_rx_dma_release(struct sci_port *s, bool enable_pio)
995{
996 struct dma_chan *chan = s->chan_rx;
997 struct uart_port *port = &s->port;
998
999 s->chan_rx = NULL;
1000 s->cookie_rx[0] = s->cookie_rx[1] = -EINVAL;
1001 dma_release_channel(chan);
1002 dma_free_coherent(port->dev, s->buf_len_rx * 2,
1003 sg_virt(&s->sg_rx[0]), sg_dma_address(&s->sg_rx[0]));
1004 if (enable_pio)
1005 sci_start_rx(port);
1006}
1007
1008static void sci_tx_dma_release(struct sci_port *s, bool enable_pio)
1009{
1010 struct dma_chan *chan = s->chan_tx;
1011 struct uart_port *port = &s->port;
1012
1013 s->chan_tx = NULL;
1014 s->cookie_tx = -EINVAL;
1015 dma_release_channel(chan);
1016 if (enable_pio)
1017 sci_start_tx(port);
1018}
1019
1020static void sci_submit_rx(struct sci_port *s)
1021{
1022 struct dma_chan *chan = s->chan_rx;
1023 int i;
1024
1025 for (i = 0; i < 2; i++) {
1026 struct scatterlist *sg = &s->sg_rx[i];
1027 struct dma_async_tx_descriptor *desc;
1028
1029 desc = chan->device->device_prep_slave_sg(chan,
1030 sg, 1, DMA_FROM_DEVICE, DMA_PREP_INTERRUPT);
1031
1032 if (desc) {
1033 s->desc_rx[i] = desc;
1034 desc->callback = sci_dma_rx_complete;
1035 desc->callback_param = s;
1036 s->cookie_rx[i] = desc->tx_submit(desc);
1037 }
1038
1039 if (!desc || s->cookie_rx[i] < 0) {
1040 if (i) {
1041 async_tx_ack(s->desc_rx[0]);
1042 s->cookie_rx[0] = -EINVAL;
1043 }
1044 if (desc) {
1045 async_tx_ack(desc);
1046 s->cookie_rx[i] = -EINVAL;
1047 }
1048 dev_warn(s->port.dev,
1049 "failed to re-start DMA, using PIO\n");
1050 sci_rx_dma_release(s, true);
1051 return;
1052 }
1053 }
1054
1055 s->active_rx = s->cookie_rx[0];
1056
1057 dma_async_issue_pending(chan);
1058}
1059
1060static void work_fn_rx(struct work_struct *work)
1061{
1062 struct sci_port *s = container_of(work, struct sci_port, work_rx);
1063 struct uart_port *port = &s->port;
1064 struct dma_async_tx_descriptor *desc;
1065 int new;
1066
1067 if (s->active_rx == s->cookie_rx[0]) {
1068 new = 0;
1069 } else if (s->active_rx == s->cookie_rx[1]) {
1070 new = 1;
1071 } else {
1072 dev_err(port->dev, "cookie %d not found!\n", s->active_rx);
1073 return;
1074 }
1075 desc = s->desc_rx[new];
1076
1077 if (dma_async_is_tx_complete(s->chan_rx, s->active_rx, NULL, NULL) !=
1078 DMA_SUCCESS) {
1079 /* Handle incomplete DMA receive */
1080 struct tty_struct *tty = port->state->port.tty;
1081 struct dma_chan *chan = s->chan_rx;
1082 struct sh_desc *sh_desc = container_of(desc, struct sh_desc,
1083 async_tx);
1084 unsigned long flags;
1085 int count;
1086
1087 chan->device->device_terminate_all(chan);
1088 dev_dbg(port->dev, "Read %u bytes with cookie %d\n",
1089 sh_desc->partial, sh_desc->cookie);
1090
1091 spin_lock_irqsave(&port->lock, flags);
1092 count = sci_dma_rx_push(s, tty, sh_desc->partial);
1093 spin_unlock_irqrestore(&port->lock, flags);
1094
1095 if (count)
1096 tty_flip_buffer_push(tty);
1097
1098 sci_submit_rx(s);
1099
1100 return;
1101 }
1102
1103 s->cookie_rx[new] = desc->tx_submit(desc);
1104 if (s->cookie_rx[new] < 0) {
1105 dev_warn(port->dev, "Failed submitting Rx DMA descriptor\n");
1106 sci_rx_dma_release(s, true);
1107 return;
1108 }
1109
1110 dev_dbg(port->dev, "%s: cookie %d #%d\n", __func__,
1111 s->cookie_rx[new], new);
1112
1113 s->active_rx = s->cookie_rx[!new];
1114}
1115
1116static void work_fn_tx(struct work_struct *work)
1117{
1118 struct sci_port *s = container_of(work, struct sci_port, work_tx);
1119 struct dma_async_tx_descriptor *desc;
1120 struct dma_chan *chan = s->chan_tx;
1121 struct uart_port *port = &s->port;
1122 struct circ_buf *xmit = &port->state->xmit;
1123 struct scatterlist *sg = &s->sg_tx;
1124
1125 /*
1126 * DMA is idle now.
1127 * Port xmit buffer is already mapped, and it is one page... Just adjust
1128 * offsets and lengths. Since it is a circular buffer, we have to
1129 * transmit till the end, and then the rest. Take the port lock to get a
1130 * consistent xmit buffer state.
1131 */
1132 spin_lock_irq(&port->lock);
1133 sg->offset = xmit->tail & (UART_XMIT_SIZE - 1);
1134 sg->dma_address = (sg_dma_address(sg) & ~(UART_XMIT_SIZE - 1)) +
1135 sg->offset;
1136 sg->length = min((int)CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE),
1137 CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE));
1138 sg->dma_length = sg->length;
1139 spin_unlock_irq(&port->lock);
1140
1141 BUG_ON(!sg->length);
1142
1143 desc = chan->device->device_prep_slave_sg(chan,
1144 sg, s->sg_len_tx, DMA_TO_DEVICE,
1145 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
1146 if (!desc) {
1147 /* switch to PIO */
1148 sci_tx_dma_release(s, true);
1149 return;
1150 }
1151
1152 dma_sync_sg_for_device(port->dev, sg, 1, DMA_TO_DEVICE);
1153
1154 spin_lock_irq(&port->lock);
1155 s->desc_tx = desc;
1156 desc->callback = sci_dma_tx_complete;
1157 desc->callback_param = s;
1158 spin_unlock_irq(&port->lock);
1159 s->cookie_tx = desc->tx_submit(desc);
1160 if (s->cookie_tx < 0) {
1161 dev_warn(port->dev, "Failed submitting Tx DMA descriptor\n");
1162 /* switch to PIO */
1163 sci_tx_dma_release(s, true);
1164 return;
1165 }
1166
1167 dev_dbg(port->dev, "%s: %p: %d...%d, cookie %d\n", __func__,
1168 xmit->buf, xmit->tail, xmit->head, s->cookie_tx);
1169
1170 dma_async_issue_pending(chan);
1171}
1172#endif
1173
855static void sci_start_tx(struct uart_port *port) 1174static void sci_start_tx(struct uart_port *port)
856{ 1175{
857 unsigned short ctrl; 1176 unsigned short ctrl;
858 1177
1178#ifdef CONFIG_SERIAL_SH_SCI_DMA
1179 struct sci_port *s = to_sci_port(port);
1180
1181 if (s->chan_tx) {
1182 if (!uart_circ_empty(&s->port.state->xmit) && s->cookie_tx < 0)
1183 schedule_work(&s->work_tx);
1184
1185 return;
1186 }
1187#endif
1188
859 /* Set TIE (Transmit Interrupt Enable) bit in SCSCR */ 1189 /* Set TIE (Transmit Interrupt Enable) bit in SCSCR */
860 ctrl = sci_in(port, SCSCR); 1190 ctrl = sci_in(port, SCSCR);
861 ctrl |= SCI_CTRL_FLAGS_TIE; 1191 ctrl |= SCI_CTRL_FLAGS_TIE;
@@ -872,13 +1202,12 @@ static void sci_stop_tx(struct uart_port *port)
872 sci_out(port, SCSCR, ctrl); 1202 sci_out(port, SCSCR, ctrl);
873} 1203}
874 1204
875static void sci_start_rx(struct uart_port *port, unsigned int tty_start) 1205static void sci_start_rx(struct uart_port *port)
876{ 1206{
877 unsigned short ctrl; 1207 unsigned short ctrl = SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE;
878 1208
879 /* Set RIE (Receive Interrupt Enable) bit in SCSCR */ 1209 /* Set RIE (Receive Interrupt Enable) bit in SCSCR */
880 ctrl = sci_in(port, SCSCR); 1210 ctrl |= sci_in(port, SCSCR);
881 ctrl |= SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE;
882 sci_out(port, SCSCR, ctrl); 1211 sci_out(port, SCSCR, ctrl);
883} 1212}
884 1213
@@ -902,16 +1231,154 @@ static void sci_break_ctl(struct uart_port *port, int break_state)
902 /* Nothing here yet .. */ 1231 /* Nothing here yet .. */
903} 1232}
904 1233
1234#ifdef CONFIG_SERIAL_SH_SCI_DMA
1235static bool filter(struct dma_chan *chan, void *slave)
1236{
1237 struct sh_dmae_slave *param = slave;
1238
1239 dev_dbg(chan->device->dev, "%s: slave ID %d\n", __func__,
1240 param->slave_id);
1241
1242 if (param->dma_dev == chan->device->dev) {
1243 chan->private = param;
1244 return true;
1245 } else {
1246 return false;
1247 }
1248}
1249
1250static void rx_timer_fn(unsigned long arg)
1251{
1252 struct sci_port *s = (struct sci_port *)arg;
1253 struct uart_port *port = &s->port;
1254
1255 u16 scr = sci_in(port, SCSCR);
1256 sci_out(port, SCSCR, scr | SCI_CTRL_FLAGS_RIE);
1257 dev_dbg(port->dev, "DMA Rx timed out\n");
1258 schedule_work(&s->work_rx);
1259}
1260
1261static void sci_request_dma(struct uart_port *port)
1262{
1263 struct sci_port *s = to_sci_port(port);
1264 struct sh_dmae_slave *param;
1265 struct dma_chan *chan;
1266 dma_cap_mask_t mask;
1267 int nent;
1268
1269 dev_dbg(port->dev, "%s: port %d DMA %p\n", __func__,
1270 port->line, s->dma_dev);
1271
1272 if (!s->dma_dev)
1273 return;
1274
1275 dma_cap_zero(mask);
1276 dma_cap_set(DMA_SLAVE, mask);
1277
1278 param = &s->param_tx;
1279
1280 /* Slave ID, e.g., SHDMA_SLAVE_SCIF0_TX */
1281 param->slave_id = s->slave_tx;
1282 param->dma_dev = s->dma_dev;
1283
1284 s->cookie_tx = -EINVAL;
1285 chan = dma_request_channel(mask, filter, param);
1286 dev_dbg(port->dev, "%s: TX: got channel %p\n", __func__, chan);
1287 if (chan) {
1288 s->chan_tx = chan;
1289 sg_init_table(&s->sg_tx, 1);
1290 /* UART circular tx buffer is an aligned page. */
1291 BUG_ON((int)port->state->xmit.buf & ~PAGE_MASK);
1292 sg_set_page(&s->sg_tx, virt_to_page(port->state->xmit.buf),
1293 UART_XMIT_SIZE, (int)port->state->xmit.buf & ~PAGE_MASK);
1294 nent = dma_map_sg(port->dev, &s->sg_tx, 1, DMA_TO_DEVICE);
1295 if (!nent)
1296 sci_tx_dma_release(s, false);
1297 else
1298 dev_dbg(port->dev, "%s: mapped %d@%p to %x\n", __func__,
1299 sg_dma_len(&s->sg_tx),
1300 port->state->xmit.buf, sg_dma_address(&s->sg_tx));
1301
1302 s->sg_len_tx = nent;
1303
1304 INIT_WORK(&s->work_tx, work_fn_tx);
1305 }
1306
1307 param = &s->param_rx;
1308
1309 /* Slave ID, e.g., SHDMA_SLAVE_SCIF0_RX */
1310 param->slave_id = s->slave_rx;
1311 param->dma_dev = s->dma_dev;
1312
1313 chan = dma_request_channel(mask, filter, param);
1314 dev_dbg(port->dev, "%s: RX: got channel %p\n", __func__, chan);
1315 if (chan) {
1316 dma_addr_t dma[2];
1317 void *buf[2];
1318 int i;
1319
1320 s->chan_rx = chan;
1321
1322 s->buf_len_rx = 2 * max(16, (int)port->fifosize);
1323 buf[0] = dma_alloc_coherent(port->dev, s->buf_len_rx * 2,
1324 &dma[0], GFP_KERNEL);
1325
1326 if (!buf[0]) {
1327 dev_warn(port->dev,
1328 "failed to allocate dma buffer, using PIO\n");
1329 sci_rx_dma_release(s, true);
1330 return;
1331 }
1332
1333 buf[1] = buf[0] + s->buf_len_rx;
1334 dma[1] = dma[0] + s->buf_len_rx;
1335
1336 for (i = 0; i < 2; i++) {
1337 struct scatterlist *sg = &s->sg_rx[i];
1338
1339 sg_init_table(sg, 1);
1340 sg_set_page(sg, virt_to_page(buf[i]), s->buf_len_rx,
1341 (int)buf[i] & ~PAGE_MASK);
1342 sg->dma_address = dma[i];
1343 sg->dma_length = sg->length;
1344 }
1345
1346 INIT_WORK(&s->work_rx, work_fn_rx);
1347 setup_timer(&s->rx_timer, rx_timer_fn, (unsigned long)s);
1348
1349 sci_submit_rx(s);
1350 }
1351}
1352
1353static void sci_free_dma(struct uart_port *port)
1354{
1355 struct sci_port *s = to_sci_port(port);
1356
1357 if (!s->dma_dev)
1358 return;
1359
1360 if (s->chan_tx)
1361 sci_tx_dma_release(s, false);
1362 if (s->chan_rx)
1363 sci_rx_dma_release(s, false);
1364}
1365#endif
1366
905static int sci_startup(struct uart_port *port) 1367static int sci_startup(struct uart_port *port)
906{ 1368{
907 struct sci_port *s = to_sci_port(port); 1369 struct sci_port *s = to_sci_port(port);
908 1370
1371 dev_dbg(port->dev, "%s(%d)\n", __func__, port->line);
1372
909 if (s->enable) 1373 if (s->enable)
910 s->enable(port); 1374 s->enable(port);
911 1375
912 sci_request_irq(s); 1376 sci_request_irq(s);
1377#ifdef CONFIG_SERIAL_SH_SCI_DMA
1378 sci_request_dma(port);
1379#endif
913 sci_start_tx(port); 1380 sci_start_tx(port);
914 sci_start_rx(port, 1); 1381 sci_start_rx(port);
915 1382
916 return 0; 1383 return 0;
917} 1384}
@@ -920,8 +1387,13 @@ static void sci_shutdown(struct uart_port *port)
920{ 1387{
921 struct sci_port *s = to_sci_port(port); 1388 struct sci_port *s = to_sci_port(port);
922 1389
1390 dev_dbg(port->dev, "%s(%d)\n", __func__, port->line);
1391
923 sci_stop_rx(port); 1392 sci_stop_rx(port);
924 sci_stop_tx(port); 1393 sci_stop_tx(port);
1394#ifdef CONFIG_SERIAL_SH_SCI_DMA
1395 sci_free_dma(port);
1396#endif
925 sci_free_irq(s); 1397 sci_free_irq(s);
926 1398
927 if (s->disable) 1399 if (s->disable)
@@ -931,11 +1403,21 @@ static void sci_shutdown(struct uart_port *port)
931static void sci_set_termios(struct uart_port *port, struct ktermios *termios, 1403static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
932 struct ktermios *old) 1404 struct ktermios *old)
933{ 1405{
934 unsigned int status, baud, smr_val; 1406 unsigned int status, baud, smr_val, max_baud;
935 int t = -1; 1407 int t = -1;
936 1408
937 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); 1409 /*
938 if (likely(baud)) 1410 * earlyprintk comes here early on with port->uartclk set to zero.
1411 * the clock framework is not up and running at this point so here
1412 * we assume that 115200 is the maximum baud rate. please note that
1413 * the baud rate is not programmed during earlyprintk - it is assumed
1414 * that the previous boot loader has enabled required clocks and
1415 * setup the baud rate generator hardware for us already.
1416 */
1417 max_baud = port->uartclk ? port->uartclk / 16 : 115200;
1418
1419 baud = uart_get_baud_rate(port, termios, old, 0, max_baud);
1420 if (likely(baud && port->uartclk))
939 t = SCBRR_VALUE(baud, port->uartclk); 1421 t = SCBRR_VALUE(baud, port->uartclk);
940 1422
941 do { 1423 do {
@@ -961,6 +1443,9 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
961 1443
962 sci_out(port, SCSMR, smr_val); 1444 sci_out(port, SCSMR, smr_val);
963 1445
1446 dev_dbg(port->dev, "%s: SMR %x, t %x, SCSCR %x\n", __func__, smr_val, t,
1447 SCSCR_INIT(port));
1448
964 if (t > 0) { 1449 if (t > 0) {
965 if (t >= 256) { 1450 if (t >= 256) {
966 sci_out(port, SCSMR, (sci_in(port, SCSMR) & ~3) | 1); 1451 sci_out(port, SCSMR, (sci_in(port, SCSMR) & ~3) | 1);
@@ -978,7 +1463,7 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
978 sci_out(port, SCSCR, SCSCR_INIT(port)); 1463 sci_out(port, SCSCR, SCSCR_INIT(port));
979 1464
980 if ((termios->c_cflag & CREAD) != 0) 1465 if ((termios->c_cflag & CREAD) != 0)
981 sci_start_rx(port, 0); 1466 sci_start_rx(port);
982} 1467}
983 1468
984static const char *sci_type(struct uart_port *port) 1469static const char *sci_type(struct uart_port *port)
@@ -1073,40 +1558,53 @@ static void __devinit sci_init_single(struct platform_device *dev,
1073 unsigned int index, 1558 unsigned int index,
1074 struct plat_sci_port *p) 1559 struct plat_sci_port *p)
1075{ 1560{
1076 sci_port->port.ops = &sci_uart_ops; 1561 struct uart_port *port = &sci_port->port;
1077 sci_port->port.iotype = UPIO_MEM;
1078 sci_port->port.line = index;
1079 sci_port->port.fifosize = 1;
1080 1562
1081#if defined(__H8300H__) || defined(__H8300S__) 1563 port->ops = &sci_uart_ops;
1082#ifdef __H8300S__ 1564 port->iotype = UPIO_MEM;
1083 sci_port->enable = h8300_sci_enable; 1565 port->line = index;
1084 sci_port->disable = h8300_sci_disable; 1566
1085#endif 1567 switch (p->type) {
1086 sci_port->port.uartclk = CONFIG_CPU_CLOCK; 1568 case PORT_SCIFA:
1087#elif defined(CONFIG_HAVE_CLK) 1569 port->fifosize = 64;
1088 sci_port->iclk = p->clk ? clk_get(&dev->dev, p->clk) : NULL; 1570 break;
1089 sci_port->dclk = clk_get(&dev->dev, "peripheral_clk"); 1571 case PORT_SCIF:
1090 sci_port->enable = sci_clk_enable; 1572 port->fifosize = 16;
1091 sci_port->disable = sci_clk_disable; 1573 break;
1092#else 1574 default:
1093#error "Need a valid uartclk" 1575 port->fifosize = 1;
1094#endif 1576 break;
1577 }
1578
1579 if (dev) {
1580 sci_port->iclk = p->clk ? clk_get(&dev->dev, p->clk) : NULL;
1581 sci_port->dclk = clk_get(&dev->dev, "peripheral_clk");
1582 sci_port->enable = sci_clk_enable;
1583 sci_port->disable = sci_clk_disable;
1584 port->dev = &dev->dev;
1585 }
1095 1586
1096 sci_port->break_timer.data = (unsigned long)sci_port; 1587 sci_port->break_timer.data = (unsigned long)sci_port;
1097 sci_port->break_timer.function = sci_break_timer; 1588 sci_port->break_timer.function = sci_break_timer;
1098 init_timer(&sci_port->break_timer); 1589 init_timer(&sci_port->break_timer);
1099 1590
1100 sci_port->port.mapbase = p->mapbase; 1591 port->mapbase = p->mapbase;
1101 sci_port->port.membase = p->membase; 1592 port->membase = p->membase;
1102 1593
1103 sci_port->port.irq = p->irqs[SCIx_TXI_IRQ]; 1594 port->irq = p->irqs[SCIx_TXI_IRQ];
1104 sci_port->port.flags = p->flags; 1595 port->flags = p->flags;
1105 sci_port->port.dev = &dev->dev; 1596 sci_port->type = port->type = p->type;
1106 sci_port->type = sci_port->port.type = p->type;
1107 1597
1108 memcpy(&sci_port->irqs, &p->irqs, sizeof(p->irqs)); 1598#ifdef CONFIG_SERIAL_SH_SCI_DMA
1599 sci_port->dma_dev = p->dma_dev;
1600 sci_port->slave_tx = p->dma_slave_tx;
1601 sci_port->slave_rx = p->dma_slave_rx;
1109 1602
1603 dev_dbg(port->dev, "%s: DMA device %p, tx %d, rx %d\n", __func__,
1604 p->dma_dev, p->dma_slave_tx, p->dma_slave_rx);
1605#endif
1606
1607 memcpy(&sci_port->irqs, &p->irqs, sizeof(p->irqs));
1110} 1608}
1111 1609
1112#ifdef CONFIG_SERIAL_SH_SCI_CONSOLE 1610#ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
@@ -1147,7 +1645,7 @@ static void serial_console_write(struct console *co, const char *s,
1147 sci_port->disable(port); 1645 sci_port->disable(port);
1148} 1646}
1149 1647
1150static int __init serial_console_setup(struct console *co, char *options) 1648static int __devinit serial_console_setup(struct console *co, char *options)
1151{ 1649{
1152 struct sci_port *sci_port; 1650 struct sci_port *sci_port;
1153 struct uart_port *port; 1651 struct uart_port *port;
@@ -1165,9 +1663,14 @@ static int __init serial_console_setup(struct console *co, char *options)
1165 if (co->index >= SCI_NPORTS) 1663 if (co->index >= SCI_NPORTS)
1166 co->index = 0; 1664 co->index = 0;
1167 1665
1168 sci_port = &sci_ports[co->index]; 1666 if (co->data) {
1169 port = &sci_port->port; 1667 port = co->data;
1170 co->data = port; 1668 sci_port = to_sci_port(port);
1669 } else {
1670 sci_port = &sci_ports[co->index];
1671 port = &sci_port->port;
1672 co->data = port;
1673 }
1171 1674
1172 /* 1675 /*
1173 * Also need to check port->type, we don't actually have any 1676 * Also need to check port->type, we don't actually have any
@@ -1211,6 +1714,15 @@ static int __init sci_console_init(void)
1211 return 0; 1714 return 0;
1212} 1715}
1213console_initcall(sci_console_init); 1716console_initcall(sci_console_init);
1717
1718static struct sci_port early_serial_port;
1719static struct console early_serial_console = {
1720 .name = "early_ttySC",
1721 .write = serial_console_write,
1722 .flags = CON_PRINTBUFFER,
1723};
1724static char early_serial_buf[32];
1725
1214#endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */ 1726#endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
1215 1727
1216#if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) 1728#if defined(CONFIG_SERIAL_SH_SCI_CONSOLE)
@@ -1239,14 +1751,11 @@ static int sci_remove(struct platform_device *dev)
1239 struct sci_port *p; 1751 struct sci_port *p;
1240 unsigned long flags; 1752 unsigned long flags;
1241 1753
1242#ifdef CONFIG_HAVE_CLK
1243 cpufreq_unregister_notifier(&priv->clk_nb, CPUFREQ_TRANSITION_NOTIFIER); 1754 cpufreq_unregister_notifier(&priv->clk_nb, CPUFREQ_TRANSITION_NOTIFIER);
1244#endif
1245 1755
1246 spin_lock_irqsave(&priv->lock, flags); 1756 spin_lock_irqsave(&priv->lock, flags);
1247 list_for_each_entry(p, &priv->ports, node) 1757 list_for_each_entry(p, &priv->ports, node)
1248 uart_remove_one_port(&sci_uart_driver, &p->port); 1758 uart_remove_one_port(&sci_uart_driver, &p->port);
1249
1250 spin_unlock_irqrestore(&priv->lock, flags); 1759 spin_unlock_irqrestore(&priv->lock, flags);
1251 1760
1252 kfree(priv); 1761 kfree(priv);
@@ -1299,6 +1808,21 @@ static int __devinit sci_probe(struct platform_device *dev)
1299 struct sh_sci_priv *priv; 1808 struct sh_sci_priv *priv;
1300 int i, ret = -EINVAL; 1809 int i, ret = -EINVAL;
1301 1810
1811#ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
1812 if (is_early_platform_device(dev)) {
1813 if (dev->id == -1)
1814 return -ENOTSUPP;
1815 early_serial_console.index = dev->id;
1816 early_serial_console.data = &early_serial_port.port;
1817 sci_init_single(NULL, &early_serial_port, dev->id, p);
1818 serial_console_setup(&early_serial_console, early_serial_buf);
1819 if (!strstr(early_serial_buf, "keep"))
1820 early_serial_console.flags |= CON_BOOT;
1821 register_console(&early_serial_console);
1822 return 0;
1823 }
1824#endif
1825
1302 priv = kzalloc(sizeof(*priv), GFP_KERNEL); 1826 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
1303 if (!priv) 1827 if (!priv)
1304 return -ENOMEM; 1828 return -ENOMEM;
@@ -1307,10 +1831,8 @@ static int __devinit sci_probe(struct platform_device *dev)
1307 spin_lock_init(&priv->lock); 1831 spin_lock_init(&priv->lock);
1308 platform_set_drvdata(dev, priv); 1832 platform_set_drvdata(dev, priv);
1309 1833
1310#ifdef CONFIG_HAVE_CLK
1311 priv->clk_nb.notifier_call = sci_notifier; 1834 priv->clk_nb.notifier_call = sci_notifier;
1312 cpufreq_register_notifier(&priv->clk_nb, CPUFREQ_TRANSITION_NOTIFIER); 1835 cpufreq_register_notifier(&priv->clk_nb, CPUFREQ_TRANSITION_NOTIFIER);
1313#endif
1314 1836
1315 if (dev->id != -1) { 1837 if (dev->id != -1) {
1316 ret = sci_probe_single(dev, dev->id, p, &sci_ports[dev->id]); 1838 ret = sci_probe_single(dev, dev->id, p, &sci_ports[dev->id]);
@@ -1363,14 +1885,14 @@ static int sci_resume(struct device *dev)
1363 return 0; 1885 return 0;
1364} 1886}
1365 1887
1366static struct dev_pm_ops sci_dev_pm_ops = { 1888static const struct dev_pm_ops sci_dev_pm_ops = {
1367 .suspend = sci_suspend, 1889 .suspend = sci_suspend,
1368 .resume = sci_resume, 1890 .resume = sci_resume,
1369}; 1891};
1370 1892
1371static struct platform_driver sci_driver = { 1893static struct platform_driver sci_driver = {
1372 .probe = sci_probe, 1894 .probe = sci_probe,
1373 .remove = __devexit_p(sci_remove), 1895 .remove = sci_remove,
1374 .driver = { 1896 .driver = {
1375 .name = "sh-sci", 1897 .name = "sh-sci",
1376 .owner = THIS_MODULE, 1898 .owner = THIS_MODULE,
@@ -1400,6 +1922,10 @@ static void __exit sci_exit(void)
1400 uart_unregister_driver(&sci_uart_driver); 1922 uart_unregister_driver(&sci_uart_driver);
1401} 1923}
1402 1924
1925#ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
1926early_platform_init_buffer("earlyprintk", &sci_driver,
1927 early_serial_buf, ARRAY_SIZE(early_serial_buf));
1928#endif
1403module_init(sci_init); 1929module_init(sci_init);
1404module_exit(sci_exit); 1930module_exit(sci_exit);
1405 1931
diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h
index 3e2fcf93b42e..f70c49f915fa 100644
--- a/drivers/serial/sh-sci.h
+++ b/drivers/serial/sh-sci.h
@@ -1,5 +1,5 @@
1#include <linux/serial_core.h> 1#include <linux/serial_core.h>
2#include <asm/io.h> 2#include <linux/io.h>
3#include <linux/gpio.h> 3#include <linux/gpio.h>
4 4
5#if defined(CONFIG_H83007) || defined(CONFIG_H83068) 5#if defined(CONFIG_H83007) || defined(CONFIG_H83068)
@@ -30,7 +30,10 @@
30 */ 30 */
31# define SCSCR_INIT(port) (port->mapbase == SCIF2) ? 0xF3 : 0xF0 31# define SCSCR_INIT(port) (port->mapbase == SCIF2) ? 0xF3 : 0xF0
32#elif defined(CONFIG_CPU_SUBTYPE_SH7720) || \ 32#elif defined(CONFIG_CPU_SUBTYPE_SH7720) || \
33 defined(CONFIG_CPU_SUBTYPE_SH7721) 33 defined(CONFIG_CPU_SUBTYPE_SH7721) || \
34 defined(CONFIG_ARCH_SH7367) || \
35 defined(CONFIG_ARCH_SH7377) || \
36 defined(CONFIG_ARCH_SH7372)
34# define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */ 37# define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */
35# define PORT_PTCR 0xA405011EUL 38# define PORT_PTCR 0xA405011EUL
36# define PORT_PVCR 0xA4050122UL 39# define PORT_PVCR 0xA4050122UL
@@ -93,7 +96,9 @@
93# define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ 96# define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
94#elif defined(CONFIG_CPU_SUBTYPE_SH7724) 97#elif defined(CONFIG_CPU_SUBTYPE_SH7724)
95# define SCIF_ORER 0x0001 /* overrun error bit */ 98# define SCIF_ORER 0x0001 /* overrun error bit */
96# define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ 99# define SCSCR_INIT(port) ((port)->type == PORT_SCIFA ? \
100 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */ : \
101 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ )
97#elif defined(CONFIG_CPU_SUBTYPE_SH4_202) 102#elif defined(CONFIG_CPU_SUBTYPE_SH4_202)
98# define SCSPTR2 0xffe80020 /* 16 bit SCIF */ 103# define SCSPTR2 0xffe80020 /* 16 bit SCIF */
99# define SCIF_ORER 0x0001 /* overrun error bit */ 104# define SCIF_ORER 0x0001 /* overrun error bit */
@@ -196,6 +201,8 @@
196 defined(CONFIG_CPU_SUBTYPE_SH7786) || \ 201 defined(CONFIG_CPU_SUBTYPE_SH7786) || \
197 defined(CONFIG_CPU_SUBTYPE_SHX3) 202 defined(CONFIG_CPU_SUBTYPE_SHX3)
198#define SCI_CTRL_FLAGS_REIE 0x08 /* 7750 SCIF */ 203#define SCI_CTRL_FLAGS_REIE 0x08 /* 7750 SCIF */
204#elif defined(CONFIG_CPU_SUBTYPE_SH7724)
205#define SCI_CTRL_FLAGS_REIE ((port)->type == PORT_SCIFA ? 0 : 8)
199#else 206#else
200#define SCI_CTRL_FLAGS_REIE 0 207#define SCI_CTRL_FLAGS_REIE 0
201#endif 208#endif
@@ -228,7 +235,10 @@
228 235
229#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ 236#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \
230 defined(CONFIG_CPU_SUBTYPE_SH7720) || \ 237 defined(CONFIG_CPU_SUBTYPE_SH7720) || \
231 defined(CONFIG_CPU_SUBTYPE_SH7721) 238 defined(CONFIG_CPU_SUBTYPE_SH7721) || \
239 defined(CONFIG_ARCH_SH7367) || \
240 defined(CONFIG_ARCH_SH7377) || \
241 defined(CONFIG_ARCH_SH7372)
232# define SCIF_ORER 0x0200 242# define SCIF_ORER 0x0200
233# define SCIF_ERRORS ( SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK | SCIF_ORER) 243# define SCIF_ERRORS ( SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK | SCIF_ORER)
234# define SCIF_RFDC_MASK 0x007f 244# define SCIF_RFDC_MASK 0x007f
@@ -261,7 +271,10 @@
261 271
262#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ 272#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \
263 defined(CONFIG_CPU_SUBTYPE_SH7720) || \ 273 defined(CONFIG_CPU_SUBTYPE_SH7720) || \
264 defined(CONFIG_CPU_SUBTYPE_SH7721) 274 defined(CONFIG_CPU_SUBTYPE_SH7721) || \
275 defined(CONFIG_ARCH_SH7367) || \
276 defined(CONFIG_ARCH_SH7377) || \
277 defined(CONFIG_ARCH_SH7372)
265# define SCxSR_RDxF_CLEAR(port) (sci_in(port, SCxSR) & 0xfffc) 278# define SCxSR_RDxF_CLEAR(port) (sci_in(port, SCxSR) & 0xfffc)
266# define SCxSR_ERROR_CLEAR(port) (sci_in(port, SCxSR) & 0xfd73) 279# define SCxSR_ERROR_CLEAR(port) (sci_in(port, SCxSR) & 0xfd73)
267# define SCxSR_TDxE_CLEAR(port) (sci_in(port, SCxSR) & 0xffdf) 280# define SCxSR_TDxE_CLEAR(port) (sci_in(port, SCxSR) & 0xffdf)
@@ -356,7 +369,10 @@
356 SCI_OUT(sci_size, sci_offset, value); \ 369 SCI_OUT(sci_size, sci_offset, value); \
357 } 370 }
358 371
359#ifdef CONFIG_CPU_SH3 372#if defined(CONFIG_CPU_SH3) || \
373 defined(CONFIG_ARCH_SH7367) || \
374 defined(CONFIG_ARCH_SH7377) || \
375 defined(CONFIG_ARCH_SH7372)
360#if defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712) 376#if defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
361#define SCIx_FNS(name, sh3_sci_offset, sh3_sci_size, sh4_sci_offset, sh4_sci_size, \ 377#define SCIx_FNS(name, sh3_sci_offset, sh3_sci_size, sh4_sci_offset, sh4_sci_size, \
362 sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size, \ 378 sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size, \
@@ -366,7 +382,10 @@
366 CPU_SCIF_FNS(name, sh4_scif_offset, sh4_scif_size) 382 CPU_SCIF_FNS(name, sh4_scif_offset, sh4_scif_size)
367#elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \ 383#elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \
368 defined(CONFIG_CPU_SUBTYPE_SH7720) || \ 384 defined(CONFIG_CPU_SUBTYPE_SH7720) || \
369 defined(CONFIG_CPU_SUBTYPE_SH7721) 385 defined(CONFIG_CPU_SUBTYPE_SH7721) || \
386 defined(CONFIG_ARCH_SH7367) || \
387 defined(CONFIG_ARCH_SH7377) || \
388 defined(CONFIG_ARCH_SH7372)
370#define SCIF_FNS(name, scif_offset, scif_size) \ 389#define SCIF_FNS(name, scif_offset, scif_size) \
371 CPU_SCIF_FNS(name, scif_offset, scif_size) 390 CPU_SCIF_FNS(name, scif_offset, scif_size)
372#else 391#else
@@ -401,7 +420,10 @@
401 420
402#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ 421#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \
403 defined(CONFIG_CPU_SUBTYPE_SH7720) || \ 422 defined(CONFIG_CPU_SUBTYPE_SH7720) || \
404 defined(CONFIG_CPU_SUBTYPE_SH7721) 423 defined(CONFIG_CPU_SUBTYPE_SH7721) || \
424 defined(CONFIG_ARCH_SH7367) || \
425 defined(CONFIG_ARCH_SH7377) || \
426 defined(CONFIG_ARCH_SH7372)
405 427
406SCIF_FNS(SCSMR, 0x00, 16) 428SCIF_FNS(SCSMR, 0x00, 16)
407SCIF_FNS(SCBRR, 0x04, 8) 429SCIF_FNS(SCBRR, 0x04, 8)
@@ -413,7 +435,7 @@ SCIF_FNS(SCFCR, 0x18, 16)
413SCIF_FNS(SCFDR, 0x1c, 16) 435SCIF_FNS(SCFDR, 0x1c, 16)
414SCIF_FNS(SCxTDR, 0x20, 8) 436SCIF_FNS(SCxTDR, 0x20, 8)
415SCIF_FNS(SCxRDR, 0x24, 8) 437SCIF_FNS(SCxRDR, 0x24, 8)
416SCIF_FNS(SCLSR, 0x24, 16) 438SCIF_FNS(SCLSR, 0x00, 0)
417#elif defined(CONFIG_CPU_SUBTYPE_SH7723) ||\ 439#elif defined(CONFIG_CPU_SUBTYPE_SH7723) ||\
418 defined(CONFIG_CPU_SUBTYPE_SH7724) 440 defined(CONFIG_CPU_SUBTYPE_SH7724)
419SCIx_FNS(SCSMR, 0x00, 16, 0x00, 16) 441SCIx_FNS(SCSMR, 0x00, 16, 0x00, 16)
@@ -517,35 +539,7 @@ static const struct __attribute__((packed)) {
517static inline int sci_rxd_in(struct uart_port *port) 539static inline int sci_rxd_in(struct uart_port *port)
518{ 540{
519 if (port->mapbase == 0xfffffe80) 541 if (port->mapbase == 0xfffffe80)
520 return ctrl_inb(SCPDR)&0x01 ? 1 : 0; /* SCI */ 542 return __raw_readb(SCPDR)&0x01 ? 1 : 0; /* SCI */
521 if (port->mapbase == 0xa4000150)
522 return ctrl_inb(SCPDR)&0x10 ? 1 : 0; /* SCIF */
523 if (port->mapbase == 0xa4000140)
524 return ctrl_inb(SCPDR)&0x04 ? 1 : 0; /* IRDA */
525 return 1;
526}
527#elif defined(CONFIG_CPU_SUBTYPE_SH7705)
528static inline int sci_rxd_in(struct uart_port *port)
529{
530 if (port->mapbase == SCIF0)
531 return ctrl_inb(SCPDR)&0x04 ? 1 : 0; /* IRDA */
532 if (port->mapbase == SCIF2)
533 return ctrl_inb(SCPDR)&0x10 ? 1 : 0; /* SCIF */
534 return 1;
535}
536#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
537static inline int sci_rxd_in(struct uart_port *port)
538{
539 return sci_in(port,SCxSR)&0x0010 ? 1 : 0;
540}
541#elif defined(CONFIG_CPU_SUBTYPE_SH7720) || \
542 defined(CONFIG_CPU_SUBTYPE_SH7721)
543static inline int sci_rxd_in(struct uart_port *port)
544{
545 if (port->mapbase == 0xa4430000)
546 return sci_in(port, SCxSR) & 0x0003 ? 1 : 0;
547 else if (port->mapbase == 0xa4438000)
548 return sci_in(port, SCxSR) & 0x0003 ? 1 : 0;
549 return 1; 543 return 1;
550} 544}
551#elif defined(CONFIG_CPU_SUBTYPE_SH7750) || \ 545#elif defined(CONFIG_CPU_SUBTYPE_SH7750) || \
@@ -557,208 +551,18 @@ static inline int sci_rxd_in(struct uart_port *port)
557static inline int sci_rxd_in(struct uart_port *port) 551static inline int sci_rxd_in(struct uart_port *port)
558{ 552{
559 if (port->mapbase == 0xffe00000) 553 if (port->mapbase == 0xffe00000)
560 return ctrl_inb(SCSPTR1)&0x01 ? 1 : 0; /* SCI */ 554 return __raw_readb(SCSPTR1)&0x01 ? 1 : 0; /* SCI */
561 if (port->mapbase == 0xffe80000)
562 return ctrl_inw(SCSPTR2)&0x0001 ? 1 : 0; /* SCIF */
563 return 1; 555 return 1;
564} 556}
565#elif defined(CONFIG_CPU_SUBTYPE_SH4_202)
566static inline int sci_rxd_in(struct uart_port *port)
567{
568 if (port->mapbase == 0xffe80000)
569 return ctrl_inw(SCSPTR2)&0x0001 ? 1 : 0; /* SCIF */
570 return 1;
571}
572#elif defined(CONFIG_CPU_SUBTYPE_SH7757)
573static inline int sci_rxd_in(struct uart_port *port)
574{
575 if (port->mapbase == 0xfe4b0000)
576 return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0;
577 if (port->mapbase == 0xfe4c0000)
578 return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0;
579 if (port->mapbase == 0xfe4d0000)
580 return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0;
581}
582#elif defined(CONFIG_CPU_SUBTYPE_SH7760)
583static inline int sci_rxd_in(struct uart_port *port)
584{
585 if (port->mapbase == 0xfe600000)
586 return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
587 if (port->mapbase == 0xfe610000)
588 return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
589 if (port->mapbase == 0xfe620000)
590 return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
591 return 1;
592}
593#elif defined(CONFIG_CPU_SUBTYPE_SH7343)
594static inline int sci_rxd_in(struct uart_port *port)
595{
596 if (port->mapbase == 0xffe00000)
597 return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
598 if (port->mapbase == 0xffe10000)
599 return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
600 if (port->mapbase == 0xffe20000)
601 return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
602 if (port->mapbase == 0xffe30000)
603 return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */
604 return 1;
605}
606#elif defined(CONFIG_CPU_SUBTYPE_SH7366)
607static inline int sci_rxd_in(struct uart_port *port)
608{
609 if (port->mapbase == 0xffe00000)
610 return ctrl_inb(SCPDR0) & 0x0001 ? 1 : 0; /* SCIF0 */
611 return 1;
612}
613#elif defined(CONFIG_CPU_SUBTYPE_SH7722)
614static inline int sci_rxd_in(struct uart_port *port)
615{
616 if (port->mapbase == 0xffe00000)
617 return ctrl_inb(PSDR) & 0x02 ? 1 : 0; /* SCIF0 */
618 if (port->mapbase == 0xffe10000)
619 return ctrl_inb(PADR) & 0x40 ? 1 : 0; /* SCIF1 */
620 if (port->mapbase == 0xffe20000)
621 return ctrl_inb(PWDR) & 0x04 ? 1 : 0; /* SCIF2 */
622
623 return 1;
624}
625#elif defined(CONFIG_CPU_SUBTYPE_SH7723)
626static inline int sci_rxd_in(struct uart_port *port)
627{
628 if (port->mapbase == 0xffe00000)
629 return ctrl_inb(SCSPTR0) & 0x0008 ? 1 : 0; /* SCIF0 */
630 if (port->mapbase == 0xffe10000)
631 return ctrl_inb(SCSPTR1) & 0x0020 ? 1 : 0; /* SCIF1 */
632 if (port->mapbase == 0xffe20000)
633 return ctrl_inb(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF2 */
634 if (port->mapbase == 0xa4e30000)
635 return ctrl_inb(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF3 */
636 if (port->mapbase == 0xa4e40000)
637 return ctrl_inb(SCSPTR4) & 0x0001 ? 1 : 0; /* SCIF4 */
638 if (port->mapbase == 0xa4e50000)
639 return ctrl_inb(SCSPTR5) & 0x0008 ? 1 : 0; /* SCIF5 */
640 return 1;
641}
642#elif defined(CONFIG_CPU_SUBTYPE_SH7724)
643# define SCFSR 0x0010
644# define SCASSR 0x0014
645static inline int sci_rxd_in(struct uart_port *port)
646{
647 if (port->type == PORT_SCIF)
648 return ctrl_inw((port->mapbase + SCFSR)) & SCIF_BRK ? 1 : 0;
649 if (port->type == PORT_SCIFA)
650 return ctrl_inw((port->mapbase + SCASSR)) & SCIF_BRK ? 1 : 0;
651 return 1;
652}
653#elif defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103)
654static inline int sci_rxd_in(struct uart_port *port)
655{
656 return sci_in(port, SCSPTR)&0x0001 ? 1 : 0; /* SCIF */
657}
658#elif defined(__H8300H__) || defined(__H8300S__) 557#elif defined(__H8300H__) || defined(__H8300S__)
659static inline int sci_rxd_in(struct uart_port *port) 558static inline int sci_rxd_in(struct uart_port *port)
660{ 559{
661 int ch = (port->mapbase - SMR0) >> 3; 560 int ch = (port->mapbase - SMR0) >> 3;
662 return (H8300_SCI_DR(ch) & h8300_sci_pins[ch].rx) ? 1 : 0; 561 return (H8300_SCI_DR(ch) & h8300_sci_pins[ch].rx) ? 1 : 0;
663} 562}
664#elif defined(CONFIG_CPU_SUBTYPE_SH7763) 563#else /* default case for non-SCI processors */
665static inline int sci_rxd_in(struct uart_port *port)
666{
667 if (port->mapbase == 0xffe00000)
668 return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
669 if (port->mapbase == 0xffe08000)
670 return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
671 if (port->mapbase == 0xffe10000)
672 return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF/IRDA */
673
674 return 1;
675}
676#elif defined(CONFIG_CPU_SUBTYPE_SH7770)
677static inline int sci_rxd_in(struct uart_port *port)
678{
679 if (port->mapbase == 0xff923000)
680 return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
681 if (port->mapbase == 0xff924000)
682 return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
683 if (port->mapbase == 0xff925000)
684 return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
685 return 1;
686}
687#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
688static inline int sci_rxd_in(struct uart_port *port)
689{
690 if (port->mapbase == 0xffe00000)
691 return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
692 if (port->mapbase == 0xffe10000)
693 return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
694 return 1;
695}
696#elif defined(CONFIG_CPU_SUBTYPE_SH7785) || \
697 defined(CONFIG_CPU_SUBTYPE_SH7786)
698static inline int sci_rxd_in(struct uart_port *port)
699{
700 if (port->mapbase == 0xffea0000)
701 return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
702 if (port->mapbase == 0xffeb0000)
703 return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
704 if (port->mapbase == 0xffec0000)
705 return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
706 if (port->mapbase == 0xffed0000)
707 return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */
708 if (port->mapbase == 0xffee0000)
709 return ctrl_inw(SCSPTR4) & 0x0001 ? 1 : 0; /* SCIF */
710 if (port->mapbase == 0xffef0000)
711 return ctrl_inw(SCSPTR5) & 0x0001 ? 1 : 0; /* SCIF */
712 return 1;
713}
714#elif defined(CONFIG_CPU_SUBTYPE_SH7201) || \
715 defined(CONFIG_CPU_SUBTYPE_SH7203) || \
716 defined(CONFIG_CPU_SUBTYPE_SH7206) || \
717 defined(CONFIG_CPU_SUBTYPE_SH7263)
718static inline int sci_rxd_in(struct uart_port *port)
719{
720 if (port->mapbase == 0xfffe8000)
721 return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
722 if (port->mapbase == 0xfffe8800)
723 return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
724 if (port->mapbase == 0xfffe9000)
725 return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
726 if (port->mapbase == 0xfffe9800)
727 return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */
728#if defined(CONFIG_CPU_SUBTYPE_SH7201)
729 if (port->mapbase == 0xfffeA000)
730 return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
731 if (port->mapbase == 0xfffeA800)
732 return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
733 if (port->mapbase == 0xfffeB000)
734 return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
735 if (port->mapbase == 0xfffeB800)
736 return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */
737#endif
738 return 1;
739}
740#elif defined(CONFIG_CPU_SUBTYPE_SH7619)
741static inline int sci_rxd_in(struct uart_port *port)
742{
743 if (port->mapbase == 0xf8400000)
744 return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
745 if (port->mapbase == 0xf8410000)
746 return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
747 if (port->mapbase == 0xf8420000)
748 return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
749 return 1;
750}
751#elif defined(CONFIG_CPU_SUBTYPE_SHX3)
752static inline int sci_rxd_in(struct uart_port *port) 564static inline int sci_rxd_in(struct uart_port *port)
753{ 565{
754 if (port->mapbase == 0xffc30000)
755 return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
756 if (port->mapbase == 0xffc40000)
757 return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
758 if (port->mapbase == 0xffc50000)
759 return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
760 if (port->mapbase == 0xffc60000)
761 return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */
762 return 1; 566 return 1;
763} 567}
764#endif 568#endif
@@ -801,7 +605,10 @@ static inline int sci_rxd_in(struct uart_port *port)
801#define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(16*bps)-1) 605#define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(16*bps)-1)
802#elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \ 606#elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \
803 defined(CONFIG_CPU_SUBTYPE_SH7720) || \ 607 defined(CONFIG_CPU_SUBTYPE_SH7720) || \
804 defined(CONFIG_CPU_SUBTYPE_SH7721) 608 defined(CONFIG_CPU_SUBTYPE_SH7721) || \
609 defined(CONFIG_ARCH_SH7367) || \
610 defined(CONFIG_ARCH_SH7377) || \
611 defined(CONFIG_ARCH_SH7372)
805#define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(32*bps)-1) 612#define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(32*bps)-1)
806#elif defined(CONFIG_CPU_SUBTYPE_SH7723) ||\ 613#elif defined(CONFIG_CPU_SUBTYPE_SH7723) ||\
807 defined(CONFIG_CPU_SUBTYPE_SH7724) 614 defined(CONFIG_CPU_SUBTYPE_SH7724)
diff --git a/drivers/serial/sunsab.c b/drivers/serial/sunsab.c
index d514e28d0755..d2e0321049e2 100644
--- a/drivers/serial/sunsab.c
+++ b/drivers/serial/sunsab.c
@@ -474,7 +474,7 @@ static void sunsab_stop_rx(struct uart_port *port)
474{ 474{
475 struct uart_sunsab_port *up = (struct uart_sunsab_port *) port; 475 struct uart_sunsab_port *up = (struct uart_sunsab_port *) port;
476 476
477 up->interrupt_mask0 |= SAB82532_ISR0_TCD; 477 up->interrupt_mask0 |= SAB82532_IMR0_TCD;
478 writeb(up->interrupt_mask1, &up->regs->w.imr0); 478 writeb(up->interrupt_mask1, &up->regs->w.imr0);
479} 479}
480 480
diff --git a/drivers/serial/sunsu.c b/drivers/serial/sunsu.c
index 170d3d68c8f0..01f7731e59b8 100644
--- a/drivers/serial/sunsu.c
+++ b/drivers/serial/sunsu.c
@@ -29,6 +29,7 @@
29#include <linux/serial.h> 29#include <linux/serial.h>
30#include <linux/sysrq.h> 30#include <linux/sysrq.h>
31#include <linux/console.h> 31#include <linux/console.h>
32#include <linux/slab.h>
32#ifdef CONFIG_SERIO 33#ifdef CONFIG_SERIO
33#include <linux/serio.h> 34#include <linux/serio.h>
34#endif 35#endif
@@ -1453,8 +1454,10 @@ static int __devinit su_probe(struct of_device *op, const struct of_device_id *m
1453 if (up->su_type == SU_PORT_KBD || up->su_type == SU_PORT_MS) { 1454 if (up->su_type == SU_PORT_KBD || up->su_type == SU_PORT_MS) {
1454 err = sunsu_kbd_ms_init(up); 1455 err = sunsu_kbd_ms_init(up);
1455 if (err) { 1456 if (err) {
1457 of_iounmap(&op->resource[0],
1458 up->port.membase, up->reg_size);
1456 kfree(up); 1459 kfree(up);
1457 goto out_unmap; 1460 return err;
1458 } 1461 }
1459 dev_set_drvdata(&op->dev, up); 1462 dev_set_drvdata(&op->dev, up);
1460 1463
diff --git a/drivers/serial/timbuart.c b/drivers/serial/timbuart.c
index 34b31da01d09..786ba85c170b 100644
--- a/drivers/serial/timbuart.c
+++ b/drivers/serial/timbuart.c
@@ -26,6 +26,7 @@
26#include <linux/kernel.h> 26#include <linux/kernel.h>
27#include <linux/platform_device.h> 27#include <linux/platform_device.h>
28#include <linux/ioport.h> 28#include <linux/ioport.h>
29#include <linux/slab.h>
29 30
30#include "timbuart.h" 31#include "timbuart.h"
31 32
@@ -421,7 +422,7 @@ static struct uart_driver timbuart_driver = {
421 422
422static int timbuart_probe(struct platform_device *dev) 423static int timbuart_probe(struct platform_device *dev)
423{ 424{
424 int err; 425 int err, irq;
425 struct timbuart_port *uart; 426 struct timbuart_port *uart;
426 struct resource *iomem; 427 struct resource *iomem;
427 428
@@ -453,11 +454,12 @@ static int timbuart_probe(struct platform_device *dev)
453 uart->port.mapbase = iomem->start; 454 uart->port.mapbase = iomem->start;
454 uart->port.membase = NULL; 455 uart->port.membase = NULL;
455 456
456 uart->port.irq = platform_get_irq(dev, 0); 457 irq = platform_get_irq(dev, 0);
457 if (uart->port.irq < 0) { 458 if (irq < 0) {
458 err = -EINVAL; 459 err = -EINVAL;
459 goto err_register; 460 goto err_register;
460 } 461 }
462 uart->port.irq = irq;
461 463
462 tasklet_init(&uart->tasklet, timbuart_tasklet, (unsigned long)uart); 464 tasklet_init(&uart->tasklet, timbuart_tasklet, (unsigned long)uart);
463 465
diff --git a/drivers/serial/uartlite.c b/drivers/serial/uartlite.c
index 377f2712289e..f0a6c61b17f7 100644
--- a/drivers/serial/uartlite.c
+++ b/drivers/serial/uartlite.c
@@ -19,7 +19,7 @@
19#include <linux/interrupt.h> 19#include <linux/interrupt.h>
20#include <linux/init.h> 20#include <linux/init.h>
21#include <asm/io.h> 21#include <asm/io.h>
22#if defined(CONFIG_OF) 22#if defined(CONFIG_OF) && (defined(CONFIG_PPC32) || defined(CONFIG_MICROBLAZE))
23#include <linux/of.h> 23#include <linux/of.h>
24#include <linux/of_device.h> 24#include <linux/of_device.h>
25#include <linux/of_platform.h> 25#include <linux/of_platform.h>
@@ -394,7 +394,7 @@ static void ulite_console_write(struct console *co, const char *s,
394 spin_unlock_irqrestore(&port->lock, flags); 394 spin_unlock_irqrestore(&port->lock, flags);
395} 395}
396 396
397static int __init ulite_console_setup(struct console *co, char *options) 397static int __devinit ulite_console_setup(struct console *co, char *options)
398{ 398{
399 struct uart_port *port; 399 struct uart_port *port;
400 int baud = 9600; 400 int baud = 9600;
@@ -581,7 +581,7 @@ static struct platform_driver ulite_platform_driver = {
581/* --------------------------------------------------------------------- 581/* ---------------------------------------------------------------------
582 * OF bus bindings 582 * OF bus bindings
583 */ 583 */
584#if defined(CONFIG_OF) 584#if defined(CONFIG_OF) && (defined(CONFIG_PPC32) || defined(CONFIG_MICROBLAZE))
585static int __devinit 585static int __devinit
586ulite_of_probe(struct of_device *op, const struct of_device_id *match) 586ulite_of_probe(struct of_device *op, const struct of_device_id *match)
587{ 587{
@@ -631,11 +631,11 @@ static inline void __exit ulite_of_unregister(void)
631{ 631{
632 of_unregister_platform_driver(&ulite_of_driver); 632 of_unregister_platform_driver(&ulite_of_driver);
633} 633}
634#else /* CONFIG_OF */ 634#else /* CONFIG_OF && (CONFIG_PPC32 || CONFIG_MICROBLAZE) */
635/* CONFIG_OF not enabled; do nothing helpers */ 635/* Appropriate config not enabled; do nothing helpers */
636static inline int __init ulite_of_register(void) { return 0; } 636static inline int __init ulite_of_register(void) { return 0; }
637static inline void __exit ulite_of_unregister(void) { } 637static inline void __exit ulite_of_unregister(void) { }
638#endif /* CONFIG_OF */ 638#endif /* CONFIG_OF && (CONFIG_PPC32 || CONFIG_MICROBLAZE) */
639 639
640/* --------------------------------------------------------------------- 640/* ---------------------------------------------------------------------
641 * Module setup/teardown 641 * Module setup/teardown
diff --git a/drivers/serial/ucc_uart.c b/drivers/serial/ucc_uart.c
index 0c08f286a2ef..074904912f64 100644
--- a/drivers/serial/ucc_uart.c
+++ b/drivers/serial/ucc_uart.c
@@ -20,6 +20,7 @@
20 20
21#include <linux/module.h> 21#include <linux/module.h>
22#include <linux/serial.h> 22#include <linux/serial.h>
23#include <linux/slab.h>
23#include <linux/serial_core.h> 24#include <linux/serial_core.h>
24#include <linux/io.h> 25#include <linux/io.h>
25#include <linux/of_platform.h> 26#include <linux/of_platform.h>
@@ -313,7 +314,7 @@ static void qe_uart_stop_tx(struct uart_port *port)
313 * This function will attempt to stuff of all the characters from the 314 * This function will attempt to stuff of all the characters from the
314 * kernel's transmit buffer into TX BDs. 315 * kernel's transmit buffer into TX BDs.
315 * 316 *
316 * A return value of non-zero indicates that it sucessfully stuffed all 317 * A return value of non-zero indicates that it successfully stuffed all
317 * characters from the kernel buffer. 318 * characters from the kernel buffer.
318 * 319 *
319 * A return value of zero indicates that there are still characters in the 320 * A return value of zero indicates that there are still characters in the
@@ -1179,16 +1180,18 @@ static void uart_firmware_cont(const struct firmware *fw, void *context)
1179 1180
1180 if (firmware->header.length != fw->size) { 1181 if (firmware->header.length != fw->size) {
1181 dev_err(dev, "invalid firmware\n"); 1182 dev_err(dev, "invalid firmware\n");
1182 return; 1183 goto out;
1183 } 1184 }
1184 1185
1185 ret = qe_upload_firmware(firmware); 1186 ret = qe_upload_firmware(firmware);
1186 if (ret) { 1187 if (ret) {
1187 dev_err(dev, "could not load firmware\n"); 1188 dev_err(dev, "could not load firmware\n");
1188 return; 1189 goto out;
1189 } 1190 }
1190 1191
1191 firmware_loaded = 1; 1192 firmware_loaded = 1;
1193 out:
1194 release_firmware(fw);
1192} 1195}
1193 1196
1194static int ucc_uart_probe(struct of_device *ofdev, 1197static int ucc_uart_probe(struct of_device *ofdev,
@@ -1247,7 +1250,7 @@ static int ucc_uart_probe(struct of_device *ofdev,
1247 */ 1250 */
1248 ret = request_firmware_nowait(THIS_MODULE, 1251 ret = request_firmware_nowait(THIS_MODULE,
1249 FW_ACTION_HOTPLUG, filename, &ofdev->dev, 1252 FW_ACTION_HOTPLUG, filename, &ofdev->dev,
1250 &ofdev->dev, uart_firmware_cont); 1253 GFP_KERNEL, &ofdev->dev, uart_firmware_cont);
1251 if (ret) { 1254 if (ret) {
1252 dev_err(&ofdev->dev, 1255 dev_err(&ofdev->dev,
1253 "could not load firmware %s\n", 1256 "could not load firmware %s\n",
generated by cgit v1.2.2 (git 2.25.0) at 2025-09-12 00:39:49 -0400