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Diffstat (limited to 'drivers/net/wireless/rt2x00/rt2800.h')
-rw-r--r--drivers/net/wireless/rt2x00/rt2800.h40
1 files changed, 20 insertions, 20 deletions
diff --git a/drivers/net/wireless/rt2x00/rt2800.h b/drivers/net/wireless/rt2x00/rt2800.h
index 6f4a2432c021..70b9abbdeb9e 100644
--- a/drivers/net/wireless/rt2x00/rt2800.h
+++ b/drivers/net/wireless/rt2x00/rt2800.h
@@ -66,7 +66,7 @@
66#define RF3320 0x000b 66#define RF3320 0x000b
67#define RF3322 0x000c 67#define RF3322 0x000c
68#define RF3853 0x000d 68#define RF3853 0x000d
69#define RF5390 0x5390 69#define RF5390 0x5390
70 70
71/* 71/*
72 * Chipset revisions. 72 * Chipset revisions.
@@ -79,7 +79,7 @@
79#define REV_RT3071E 0x0211 79#define REV_RT3071E 0x0211
80#define REV_RT3090E 0x0211 80#define REV_RT3090E 0x0211
81#define REV_RT3390E 0x0211 81#define REV_RT3390E 0x0211
82#define REV_RT5390F 0x0502 82#define REV_RT5390F 0x0502
83 83
84/* 84/*
85 * Signal information. 85 * Signal information.
@@ -126,9 +126,9 @@
126/* 126/*
127 * AUX_CTRL: Aux/PCI-E related configuration 127 * AUX_CTRL: Aux/PCI-E related configuration
128 */ 128 */
129#define AUX_CTRL 0x10c 129#define AUX_CTRL 0x10c
130#define AUX_CTRL_WAKE_PCIE_EN FIELD32(0x00000002) 130#define AUX_CTRL_WAKE_PCIE_EN FIELD32(0x00000002)
131#define AUX_CTRL_FORCE_PCIE_CLK FIELD32(0x00000400) 131#define AUX_CTRL_FORCE_PCIE_CLK FIELD32(0x00000400)
132 132
133/* 133/*
134 * OPT_14: Unknown register used by rt3xxx devices. 134 * OPT_14: Unknown register used by rt3xxx devices.
@@ -464,7 +464,7 @@
464 */ 464 */
465#define RF_CSR_CFG 0x0500 465#define RF_CSR_CFG 0x0500
466#define RF_CSR_CFG_DATA FIELD32(0x000000ff) 466#define RF_CSR_CFG_DATA FIELD32(0x000000ff)
467#define RF_CSR_CFG_REGNUM FIELD32(0x00003f00) 467#define RF_CSR_CFG_REGNUM FIELD32(0x00003f00)
468#define RF_CSR_CFG_WRITE FIELD32(0x00010000) 468#define RF_CSR_CFG_WRITE FIELD32(0x00010000)
469#define RF_CSR_CFG_BUSY FIELD32(0x00020000) 469#define RF_CSR_CFG_BUSY FIELD32(0x00020000)
470 470
@@ -1746,13 +1746,13 @@ struct mac_iveiv_entry {
1746 */ 1746 */
1747#define BBP4_TX_BF FIELD8(0x01) 1747#define BBP4_TX_BF FIELD8(0x01)
1748#define BBP4_BANDWIDTH FIELD8(0x18) 1748#define BBP4_BANDWIDTH FIELD8(0x18)
1749#define BBP4_MAC_IF_CTRL FIELD8(0x40) 1749#define BBP4_MAC_IF_CTRL FIELD8(0x40)
1750 1750
1751/* 1751/*
1752 * BBP 109 1752 * BBP 109
1753 */ 1753 */
1754#define BBP109_TX0_POWER FIELD8(0x0f) 1754#define BBP109_TX0_POWER FIELD8(0x0f)
1755#define BBP109_TX1_POWER FIELD8(0xf0) 1755#define BBP109_TX1_POWER FIELD8(0xf0)
1756 1756
1757/* 1757/*
1758 * BBP 138: Unknown 1758 * BBP 138: Unknown
@@ -1765,7 +1765,7 @@ struct mac_iveiv_entry {
1765/* 1765/*
1766 * BBP 152: Rx Ant 1766 * BBP 152: Rx Ant
1767 */ 1767 */
1768#define BBP152_RX_DEFAULT_ANT FIELD8(0x80) 1768#define BBP152_RX_DEFAULT_ANT FIELD8(0x80)
1769 1769
1770/* 1770/*
1771 * RFCSR registers 1771 * RFCSR registers
@@ -1776,7 +1776,7 @@ struct mac_iveiv_entry {
1776 * RFCSR 1: 1776 * RFCSR 1:
1777 */ 1777 */
1778#define RFCSR1_RF_BLOCK_EN FIELD8(0x01) 1778#define RFCSR1_RF_BLOCK_EN FIELD8(0x01)
1779#define RFCSR1_PLL_PD FIELD8(0x02) 1779#define RFCSR1_PLL_PD FIELD8(0x02)
1780#define RFCSR1_RX0_PD FIELD8(0x04) 1780#define RFCSR1_RX0_PD FIELD8(0x04)
1781#define RFCSR1_TX0_PD FIELD8(0x08) 1781#define RFCSR1_TX0_PD FIELD8(0x08)
1782#define RFCSR1_RX1_PD FIELD8(0x10) 1782#define RFCSR1_RX1_PD FIELD8(0x10)
@@ -1785,7 +1785,7 @@ struct mac_iveiv_entry {
1785/* 1785/*
1786 * RFCSR 2: 1786 * RFCSR 2:
1787 */ 1787 */
1788#define RFCSR2_RESCAL_EN FIELD8(0x80) 1788#define RFCSR2_RESCAL_EN FIELD8(0x80)
1789 1789
1790/* 1790/*
1791 * RFCSR 6: 1791 * RFCSR 6:
@@ -1801,7 +1801,7 @@ struct mac_iveiv_entry {
1801/* 1801/*
1802 * RFCSR 11: 1802 * RFCSR 11:
1803 */ 1803 */
1804#define RFCSR11_R FIELD8(0x03) 1804#define RFCSR11_R FIELD8(0x03)
1805 1805
1806/* 1806/*
1807 * RFCSR 12: 1807 * RFCSR 12:
@@ -1857,9 +1857,9 @@ struct mac_iveiv_entry {
1857/* 1857/*
1858 * RFCSR 30: 1858 * RFCSR 30:
1859 */ 1859 */
1860#define RFCSR30_TX_H20M FIELD8(0x02) 1860#define RFCSR30_TX_H20M FIELD8(0x02)
1861#define RFCSR30_RX_H20M FIELD8(0x04) 1861#define RFCSR30_RX_H20M FIELD8(0x04)
1862#define RFCSR30_RX_VCM FIELD8(0x18) 1862#define RFCSR30_RX_VCM FIELD8(0x18)
1863#define RFCSR30_RF_CALIBRATION FIELD8(0x80) 1863#define RFCSR30_RF_CALIBRATION FIELD8(0x80)
1864 1864
1865/* 1865/*
@@ -1871,17 +1871,17 @@ struct mac_iveiv_entry {
1871/* 1871/*
1872 * RFCSR 38: 1872 * RFCSR 38:
1873 */ 1873 */
1874#define RFCSR38_RX_LO1_EN FIELD8(0x20) 1874#define RFCSR38_RX_LO1_EN FIELD8(0x20)
1875 1875
1876/* 1876/*
1877 * RFCSR 39: 1877 * RFCSR 39:
1878 */ 1878 */
1879#define RFCSR39_RX_LO2_EN FIELD8(0x80) 1879#define RFCSR39_RX_LO2_EN FIELD8(0x80)
1880 1880
1881/* 1881/*
1882 * RFCSR 49: 1882 * RFCSR 49:
1883 */ 1883 */
1884#define RFCSR49_TX FIELD8(0x3f) 1884#define RFCSR49_TX FIELD8(0x3f)
1885 1885
1886/* 1886/*
1887 * RF registers 1887 * RF registers
@@ -1918,7 +1918,7 @@ struct mac_iveiv_entry {
1918/* 1918/*
1919 * Chip ID 1919 * Chip ID
1920 */ 1920 */
1921#define EEPROM_CHIP_ID 0x0000 1921#define EEPROM_CHIP_ID 0x0000
1922 1922
1923/* 1923/*
1924 * EEPROM Version 1924 * EEPROM Version