diff options
Diffstat (limited to 'drivers/net/wireless/ath')
36 files changed, 2349 insertions, 220 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ar9002_hw.c b/drivers/net/wireless/ath/ath9k/ar9002_hw.c index 44d9d8d56490..b54ab78fb092 100644 --- a/drivers/net/wireless/ath/ath9k/ar9002_hw.c +++ b/drivers/net/wireless/ath/ath9k/ar9002_hw.c | |||
| @@ -303,17 +303,13 @@ static void ar9002_hw_init_mode_gain_regs(struct ath_hw *ah) | |||
| 303 | * register as the other analog registers. Hence the 9 writes. | 303 | * register as the other analog registers. Hence the 9 writes. |
| 304 | */ | 304 | */ |
| 305 | static void ar9002_hw_configpcipowersave(struct ath_hw *ah, | 305 | static void ar9002_hw_configpcipowersave(struct ath_hw *ah, |
| 306 | int restore, | 306 | bool power_off) |
| 307 | int power_off) | ||
| 308 | { | 307 | { |
| 309 | u8 i; | 308 | u8 i; |
| 310 | u32 val; | 309 | u32 val; |
| 311 | 310 | ||
| 312 | if (ah->is_pciexpress != true || ah->aspm_enabled != true) | ||
| 313 | return; | ||
| 314 | |||
| 315 | /* Nothing to do on restore for 11N */ | 311 | /* Nothing to do on restore for 11N */ |
| 316 | if (!restore) { | 312 | if (!power_off /* !restore */) { |
| 317 | if (AR_SREV_9280_20_OR_LATER(ah)) { | 313 | if (AR_SREV_9280_20_OR_LATER(ah)) { |
| 318 | /* | 314 | /* |
| 319 | * AR9280 2.0 or later chips use SerDes values from the | 315 | * AR9280 2.0 or later chips use SerDes values from the |
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h b/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h index a0aadaddd071..f2c6f2316a3b 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h +++ b/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h | |||
| @@ -636,7 +636,7 @@ static const u32 ar9300_2p2_baseband_postamble[][5] = { | |||
| 636 | {0x00009e44, 0x02321e27, 0x02321e27, 0x02291e27, 0x02291e27}, | 636 | {0x00009e44, 0x02321e27, 0x02321e27, 0x02291e27, 0x02291e27}, |
| 637 | {0x00009e48, 0x5030201a, 0x5030201a, 0x50302012, 0x50302012}, | 637 | {0x00009e48, 0x5030201a, 0x5030201a, 0x50302012, 0x50302012}, |
| 638 | {0x00009fc8, 0x0003f000, 0x0003f000, 0x0001a000, 0x0001a000}, | 638 | {0x00009fc8, 0x0003f000, 0x0003f000, 0x0001a000, 0x0001a000}, |
| 639 | {0x0000a204, 0x000037c0, 0x000037c4, 0x000037c4, 0x000037c0}, | 639 | {0x0000a204, 0x000036c0, 0x000036c4, 0x000036c4, 0x000036c0}, |
| 640 | {0x0000a208, 0x00000104, 0x00000104, 0x00000004, 0x00000004}, | 640 | {0x0000a208, 0x00000104, 0x00000104, 0x00000004, 0x00000004}, |
| 641 | {0x0000a22c, 0x01026a2f, 0x01026a2f, 0x01026a2f, 0x01026a2f}, | 641 | {0x0000a22c, 0x01026a2f, 0x01026a2f, 0x01026a2f, 0x01026a2f}, |
| 642 | {0x0000a230, 0x0000000a, 0x00000014, 0x00000016, 0x0000000b}, | 642 | {0x0000a230, 0x0000000a, 0x00000014, 0x00000016, 0x0000000b}, |
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_calib.c b/drivers/net/wireless/ath/ath9k/ar9003_calib.c index f48051c50092..fa35a0235f44 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_calib.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_calib.c | |||
| @@ -839,20 +839,8 @@ static bool ar9003_hw_init_cal(struct ath_hw *ah, | |||
| 839 | struct ath9k_channel *chan) | 839 | struct ath9k_channel *chan) |
| 840 | { | 840 | { |
| 841 | struct ath_common *common = ath9k_hw_common(ah); | 841 | struct ath_common *common = ath9k_hw_common(ah); |
| 842 | struct ath9k_hw_capabilities *pCap = &ah->caps; | ||
| 843 | int val; | ||
| 844 | bool txiqcal_done = false; | 842 | bool txiqcal_done = false; |
| 845 | 843 | ||
| 846 | val = REG_READ(ah, AR_ENT_OTP); | ||
| 847 | ath_dbg(common, ATH_DBG_CALIBRATE, "ath9k: AR_ENT_OTP 0x%x\n", val); | ||
| 848 | |||
| 849 | /* Configure rx/tx chains before running AGC/TxiQ cals */ | ||
| 850 | if (val & AR_ENT_OTP_CHAIN2_DISABLE) | ||
| 851 | ar9003_hw_set_chain_masks(ah, 0x3, 0x3); | ||
| 852 | else | ||
| 853 | ar9003_hw_set_chain_masks(ah, pCap->rx_chainmask, | ||
| 854 | pCap->tx_chainmask); | ||
| 855 | |||
| 856 | /* Do Tx IQ Calibration */ | 844 | /* Do Tx IQ Calibration */ |
| 857 | REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_1, | 845 | REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_1, |
| 858 | AR_PHY_TX_IQCAL_CONTROL_1_IQCORR_I_Q_COFF_DELPT, | 846 | AR_PHY_TX_IQCAL_CONTROL_1_IQCORR_I_Q_COFF_DELPT, |
| @@ -887,9 +875,6 @@ static bool ar9003_hw_init_cal(struct ath_hw *ah, | |||
| 887 | if (txiqcal_done) | 875 | if (txiqcal_done) |
| 888 | ar9003_hw_tx_iq_cal_post_proc(ah); | 876 | ar9003_hw_tx_iq_cal_post_proc(ah); |
| 889 | 877 | ||
| 890 | /* Revert chainmasks to their original values before NF cal */ | ||
| 891 | ar9003_hw_set_chain_masks(ah, ah->rxchainmask, ah->txchainmask); | ||
| 892 | |||
| 893 | ath9k_hw_start_nfcal(ah, true); | 878 | ath9k_hw_start_nfcal(ah, true); |
| 894 | 879 | ||
| 895 | /* Initialize list pointers */ | 880 | /* Initialize list pointers */ |
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_hw.c b/drivers/net/wireless/ath/ath9k/ar9003_hw.c index ad2bb2bf4e8a..b6839e695270 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c | |||
| @@ -21,6 +21,7 @@ | |||
| 21 | #include "ar9340_initvals.h" | 21 | #include "ar9340_initvals.h" |
| 22 | #include "ar9330_1p1_initvals.h" | 22 | #include "ar9330_1p1_initvals.h" |
| 23 | #include "ar9330_1p2_initvals.h" | 23 | #include "ar9330_1p2_initvals.h" |
| 24 | #include "ar9580_1p0_initvals.h" | ||
| 24 | 25 | ||
| 25 | /* General hardware code for the AR9003 hadware family */ | 26 | /* General hardware code for the AR9003 hadware family */ |
| 26 | 27 | ||
| @@ -253,6 +254,56 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah) | |||
| 253 | ar9485_1_1_pcie_phy_clkreq_disable_L1, | 254 | ar9485_1_1_pcie_phy_clkreq_disable_L1, |
| 254 | ARRAY_SIZE(ar9485_1_1_pcie_phy_clkreq_disable_L1), | 255 | ARRAY_SIZE(ar9485_1_1_pcie_phy_clkreq_disable_L1), |
| 255 | 2); | 256 | 2); |
| 257 | } else if (AR_SREV_9580(ah)) { | ||
| 258 | /* mac */ | ||
| 259 | INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0); | ||
| 260 | INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], | ||
| 261 | ar9580_1p0_mac_core, | ||
| 262 | ARRAY_SIZE(ar9580_1p0_mac_core), 2); | ||
| 263 | INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST], | ||
| 264 | ar9580_1p0_mac_postamble, | ||
| 265 | ARRAY_SIZE(ar9580_1p0_mac_postamble), 5); | ||
| 266 | |||
| 267 | /* bb */ | ||
| 268 | INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0); | ||
| 269 | INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE], | ||
| 270 | ar9580_1p0_baseband_core, | ||
| 271 | ARRAY_SIZE(ar9580_1p0_baseband_core), 2); | ||
| 272 | INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST], | ||
| 273 | ar9580_1p0_baseband_postamble, | ||
| 274 | ARRAY_SIZE(ar9580_1p0_baseband_postamble), 5); | ||
| 275 | |||
| 276 | /* radio */ | ||
| 277 | INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0); | ||
| 278 | INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE], | ||
| 279 | ar9580_1p0_radio_core, | ||
| 280 | ARRAY_SIZE(ar9580_1p0_radio_core), 2); | ||
| 281 | INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST], | ||
| 282 | ar9580_1p0_radio_postamble, | ||
| 283 | ARRAY_SIZE(ar9580_1p0_radio_postamble), 5); | ||
| 284 | |||
| 285 | /* soc */ | ||
| 286 | INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE], | ||
| 287 | ar9580_1p0_soc_preamble, | ||
| 288 | ARRAY_SIZE(ar9580_1p0_soc_preamble), 2); | ||
| 289 | INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0); | ||
| 290 | INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST], | ||
| 291 | ar9580_1p0_soc_postamble, | ||
| 292 | ARRAY_SIZE(ar9580_1p0_soc_postamble), 5); | ||
| 293 | |||
| 294 | /* rx/tx gain */ | ||
| 295 | INIT_INI_ARRAY(&ah->iniModesRxGain, | ||
| 296 | ar9580_1p0_rx_gain_table, | ||
| 297 | ARRAY_SIZE(ar9580_1p0_rx_gain_table), 2); | ||
| 298 | INIT_INI_ARRAY(&ah->iniModesTxGain, | ||
| 299 | ar9580_1p0_low_ob_db_tx_gain_table, | ||
| 300 | ARRAY_SIZE(ar9580_1p0_low_ob_db_tx_gain_table), | ||
| 301 | 5); | ||
| 302 | |||
| 303 | INIT_INI_ARRAY(&ah->iniModesAdditional, | ||
| 304 | ar9580_1p0_modes_fast_clock, | ||
| 305 | ARRAY_SIZE(ar9580_1p0_modes_fast_clock), | ||
| 306 | 3); | ||
| 256 | } else { | 307 | } else { |
| 257 | /* mac */ | 308 | /* mac */ |
| 258 | INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0); | 309 | INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0); |
| @@ -348,6 +399,11 @@ static void ar9003_tx_gain_table_apply(struct ath_hw *ah) | |||
| 348 | ar9485_modes_lowest_ob_db_tx_gain_1_1, | 399 | ar9485_modes_lowest_ob_db_tx_gain_1_1, |
| 349 | ARRAY_SIZE(ar9485_modes_lowest_ob_db_tx_gain_1_1), | 400 | ARRAY_SIZE(ar9485_modes_lowest_ob_db_tx_gain_1_1), |
| 350 | 5); | 401 | 5); |
| 402 | else if (AR_SREV_9580(ah)) | ||
| 403 | INIT_INI_ARRAY(&ah->iniModesTxGain, | ||
| 404 | ar9580_1p0_lowest_ob_db_tx_gain_table, | ||
| 405 | ARRAY_SIZE(ar9580_1p0_lowest_ob_db_tx_gain_table), | ||
| 406 | 5); | ||
| 351 | else | 407 | else |
| 352 | INIT_INI_ARRAY(&ah->iniModesTxGain, | 408 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
| 353 | ar9300Modes_lowest_ob_db_tx_gain_table_2p2, | 409 | ar9300Modes_lowest_ob_db_tx_gain_table_2p2, |
| @@ -375,6 +431,11 @@ static void ar9003_tx_gain_table_apply(struct ath_hw *ah) | |||
| 375 | ar9485Modes_high_ob_db_tx_gain_1_1, | 431 | ar9485Modes_high_ob_db_tx_gain_1_1, |
| 376 | ARRAY_SIZE(ar9485Modes_high_ob_db_tx_gain_1_1), | 432 | ARRAY_SIZE(ar9485Modes_high_ob_db_tx_gain_1_1), |
| 377 | 5); | 433 | 5); |
| 434 | else if (AR_SREV_9580(ah)) | ||
| 435 | INIT_INI_ARRAY(&ah->iniModesTxGain, | ||
| 436 | ar9580_1p0_high_ob_db_tx_gain_table, | ||
| 437 | ARRAY_SIZE(ar9580_1p0_high_ob_db_tx_gain_table), | ||
| 438 | 5); | ||
| 378 | else | 439 | else |
| 379 | INIT_INI_ARRAY(&ah->iniModesTxGain, | 440 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
| 380 | ar9300Modes_high_ob_db_tx_gain_table_2p2, | 441 | ar9300Modes_high_ob_db_tx_gain_table_2p2, |
| @@ -402,6 +463,11 @@ static void ar9003_tx_gain_table_apply(struct ath_hw *ah) | |||
| 402 | ar9485Modes_low_ob_db_tx_gain_1_1, | 463 | ar9485Modes_low_ob_db_tx_gain_1_1, |
| 403 | ARRAY_SIZE(ar9485Modes_low_ob_db_tx_gain_1_1), | 464 | ARRAY_SIZE(ar9485Modes_low_ob_db_tx_gain_1_1), |
| 404 | 5); | 465 | 5); |
| 466 | else if (AR_SREV_9580(ah)) | ||
| 467 | INIT_INI_ARRAY(&ah->iniModesTxGain, | ||
| 468 | ar9580_1p0_low_ob_db_tx_gain_table, | ||
| 469 | ARRAY_SIZE(ar9580_1p0_low_ob_db_tx_gain_table), | ||
| 470 | 5); | ||
| 405 | else | 471 | else |
| 406 | INIT_INI_ARRAY(&ah->iniModesTxGain, | 472 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
| 407 | ar9300Modes_low_ob_db_tx_gain_table_2p2, | 473 | ar9300Modes_low_ob_db_tx_gain_table_2p2, |
| @@ -429,6 +495,11 @@ static void ar9003_tx_gain_table_apply(struct ath_hw *ah) | |||
| 429 | ar9485Modes_high_power_tx_gain_1_1, | 495 | ar9485Modes_high_power_tx_gain_1_1, |
| 430 | ARRAY_SIZE(ar9485Modes_high_power_tx_gain_1_1), | 496 | ARRAY_SIZE(ar9485Modes_high_power_tx_gain_1_1), |
| 431 | 5); | 497 | 5); |
| 498 | else if (AR_SREV_9580(ah)) | ||
| 499 | INIT_INI_ARRAY(&ah->iniModesTxGain, | ||
| 500 | ar9580_1p0_high_power_tx_gain_table, | ||
| 501 | ARRAY_SIZE(ar9580_1p0_high_power_tx_gain_table), | ||
| 502 | 5); | ||
| 432 | else | 503 | else |
| 433 | INIT_INI_ARRAY(&ah->iniModesTxGain, | 504 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
| 434 | ar9300Modes_high_power_tx_gain_table_2p2, | 505 | ar9300Modes_high_power_tx_gain_table_2p2, |
| @@ -463,6 +534,11 @@ static void ar9003_rx_gain_table_apply(struct ath_hw *ah) | |||
| 463 | ar9485Common_wo_xlna_rx_gain_1_1, | 534 | ar9485Common_wo_xlna_rx_gain_1_1, |
| 464 | ARRAY_SIZE(ar9485Common_wo_xlna_rx_gain_1_1), | 535 | ARRAY_SIZE(ar9485Common_wo_xlna_rx_gain_1_1), |
| 465 | 2); | 536 | 2); |
| 537 | else if (AR_SREV_9580(ah)) | ||
| 538 | INIT_INI_ARRAY(&ah->iniModesRxGain, | ||
| 539 | ar9580_1p0_rx_gain_table, | ||
| 540 | ARRAY_SIZE(ar9580_1p0_rx_gain_table), | ||
| 541 | 2); | ||
| 466 | else | 542 | else |
| 467 | INIT_INI_ARRAY(&ah->iniModesRxGain, | 543 | INIT_INI_ARRAY(&ah->iniModesRxGain, |
| 468 | ar9300Common_rx_gain_table_2p2, | 544 | ar9300Common_rx_gain_table_2p2, |
| @@ -490,6 +566,11 @@ static void ar9003_rx_gain_table_apply(struct ath_hw *ah) | |||
| 490 | ar9485Common_wo_xlna_rx_gain_1_1, | 566 | ar9485Common_wo_xlna_rx_gain_1_1, |
| 491 | ARRAY_SIZE(ar9485Common_wo_xlna_rx_gain_1_1), | 567 | ARRAY_SIZE(ar9485Common_wo_xlna_rx_gain_1_1), |
| 492 | 2); | 568 | 2); |
| 569 | else if (AR_SREV_9580(ah)) | ||
| 570 | INIT_INI_ARRAY(&ah->iniModesRxGain, | ||
| 571 | ar9580_1p0_wo_xlna_rx_gain_table, | ||
| 572 | ARRAY_SIZE(ar9580_1p0_wo_xlna_rx_gain_table), | ||
| 573 | 2); | ||
| 493 | else | 574 | else |
| 494 | INIT_INI_ARRAY(&ah->iniModesRxGain, | 575 | INIT_INI_ARRAY(&ah->iniModesRxGain, |
| 495 | ar9300Common_wo_xlna_rx_gain_table_2p2, | 576 | ar9300Common_wo_xlna_rx_gain_table_2p2, |
| @@ -516,14 +597,10 @@ static void ar9003_hw_init_mode_gain_regs(struct ath_hw *ah) | |||
| 516 | * register as the other analog registers. Hence the 9 writes. | 597 | * register as the other analog registers. Hence the 9 writes. |
| 517 | */ | 598 | */ |
| 518 | static void ar9003_hw_configpcipowersave(struct ath_hw *ah, | 599 | static void ar9003_hw_configpcipowersave(struct ath_hw *ah, |
| 519 | int restore, | 600 | bool power_off) |
| 520 | int power_off) | ||
| 521 | { | 601 | { |
| 522 | if (ah->is_pciexpress != true || ah->aspm_enabled != true) | ||
| 523 | return; | ||
| 524 | |||
| 525 | /* Nothing to do on restore for 11N */ | 602 | /* Nothing to do on restore for 11N */ |
| 526 | if (!restore) { | 603 | if (!power_off /* !restore */) { |
| 527 | /* set bit 19 to allow forcing of pcie core into L1 state */ | 604 | /* set bit 19 to allow forcing of pcie core into L1 state */ |
| 528 | REG_SET_BIT(ah, AR_PCIE_PM_CTRL, AR_PCIE_PM_CTRL_ENA); | 605 | REG_SET_BIT(ah, AR_PCIE_PM_CTRL, AR_PCIE_PM_CTRL_ENA); |
| 529 | 606 | ||
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_mac.c b/drivers/net/wireless/ath/ath9k/ar9003_mac.c index 1aadc4757e67..8ace36e77399 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_mac.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_mac.c | |||
| @@ -253,8 +253,6 @@ static int ar9003_hw_proc_txdesc(struct ath_hw *ah, void *ds, | |||
| 253 | return -EIO; | 253 | return -EIO; |
| 254 | } | 254 | } |
| 255 | 255 | ||
| 256 | if (status & AR_TxOpExceeded) | ||
| 257 | ts->ts_status |= ATH9K_TXERR_XTXOP; | ||
| 258 | ts->ts_rateindex = MS(status, AR_FinalTxIdx); | 256 | ts->ts_rateindex = MS(status, AR_FinalTxIdx); |
| 259 | ts->ts_seqnum = MS(status, AR_SeqNum); | 257 | ts->ts_seqnum = MS(status, AR_SeqNum); |
| 260 | ts->tid = MS(status, AR_TxTid); | 258 | ts->tid = MS(status, AR_TxTid); |
| @@ -264,6 +262,8 @@ static int ar9003_hw_proc_txdesc(struct ath_hw *ah, void *ds, | |||
| 264 | ts->ts_status = 0; | 262 | ts->ts_status = 0; |
| 265 | ts->ts_flags = 0; | 263 | ts->ts_flags = 0; |
| 266 | 264 | ||
| 265 | if (status & AR_TxOpExceeded) | ||
| 266 | ts->ts_status |= ATH9K_TXERR_XTXOP; | ||
| 267 | status = ACCESS_ONCE(ads->status2); | 267 | status = ACCESS_ONCE(ads->status2); |
| 268 | ts->ts_rssi_ctl0 = MS(status, AR_TxRSSIAnt00); | 268 | ts->ts_rssi_ctl0 = MS(status, AR_TxRSSIAnt00); |
| 269 | ts->ts_rssi_ctl1 = MS(status, AR_TxRSSIAnt01); | 269 | ts->ts_rssi_ctl1 = MS(status, AR_TxRSSIAnt01); |
| @@ -415,36 +415,12 @@ static void ar9003_hw_set11n_ratescenario(struct ath_hw *ah, void *ds, | |||
| 415 | static void ar9003_hw_set11n_aggr_first(struct ath_hw *ah, void *ds, | 415 | static void ar9003_hw_set11n_aggr_first(struct ath_hw *ah, void *ds, |
| 416 | u32 aggrLen) | 416 | u32 aggrLen) |
| 417 | { | 417 | { |
| 418 | #define FIRST_DESC_NDELIMS 60 | ||
| 419 | struct ar9003_txc *ads = (struct ar9003_txc *) ds; | 418 | struct ar9003_txc *ads = (struct ar9003_txc *) ds; |
| 420 | 419 | ||
| 421 | ads->ctl12 |= (AR_IsAggr | AR_MoreAggr); | 420 | ads->ctl12 |= (AR_IsAggr | AR_MoreAggr); |
| 422 | 421 | ||
| 423 | if (ah->ent_mode & AR_ENT_OTP_MPSD) { | 422 | ads->ctl17 &= ~AR_AggrLen; |
| 424 | u32 ctl17, ndelim; | 423 | ads->ctl17 |= SM(aggrLen, AR_AggrLen); |
| 425 | /* | ||
| 426 | * Add delimiter when using RTS/CTS with aggregation | ||
| 427 | * and non enterprise AR9003 card | ||
| 428 | */ | ||
| 429 | ctl17 = ads->ctl17; | ||
| 430 | ndelim = MS(ctl17, AR_PadDelim); | ||
| 431 | |||
| 432 | if (ndelim < FIRST_DESC_NDELIMS) { | ||
| 433 | aggrLen += (FIRST_DESC_NDELIMS - ndelim) * 4; | ||
| 434 | ndelim = FIRST_DESC_NDELIMS; | ||
| 435 | } | ||
| 436 | |||
| 437 | ctl17 &= ~AR_AggrLen; | ||
| 438 | ctl17 |= SM(aggrLen, AR_AggrLen); | ||
| 439 | |||
| 440 | ctl17 &= ~AR_PadDelim; | ||
| 441 | ctl17 |= SM(ndelim, AR_PadDelim); | ||
| 442 | |||
| 443 | ads->ctl17 = ctl17; | ||
| 444 | } else { | ||
| 445 | ads->ctl17 &= ~AR_AggrLen; | ||
| 446 | ads->ctl17 |= SM(aggrLen, AR_AggrLen); | ||
| 447 | } | ||
| 448 | } | 424 | } |
| 449 | 425 | ||
| 450 | static void ar9003_hw_set11n_aggr_middle(struct ath_hw *ah, void *ds, | 426 | static void ar9003_hw_set11n_aggr_middle(struct ath_hw *ah, void *ds, |
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.c b/drivers/net/wireless/ath/ath9k/ar9003_phy.c index a0aaa6855486..33edb5653ca6 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c | |||
| @@ -482,7 +482,7 @@ static void ar9003_hw_set_channel_regs(struct ath_hw *ah, | |||
| 482 | (REG_READ(ah, AR_PHY_GEN_CTRL) & AR_PHY_GC_ENABLE_DAC_FIFO); | 482 | (REG_READ(ah, AR_PHY_GEN_CTRL) & AR_PHY_GC_ENABLE_DAC_FIFO); |
| 483 | 483 | ||
| 484 | /* Enable 11n HT, 20 MHz */ | 484 | /* Enable 11n HT, 20 MHz */ |
| 485 | phymode = AR_PHY_GC_HT_EN | AR_PHY_GC_SINGLE_HT_LTF1 | AR_PHY_GC_WALSH | | 485 | phymode = AR_PHY_GC_HT_EN | AR_PHY_GC_SINGLE_HT_LTF1 | |
| 486 | AR_PHY_GC_SHORT_GI_40 | enableDacFifo; | 486 | AR_PHY_GC_SHORT_GI_40 | enableDacFifo; |
| 487 | 487 | ||
| 488 | /* Configure baseband for dynamic 20/40 operation */ | 488 | /* Configure baseband for dynamic 20/40 operation */ |
| @@ -540,7 +540,7 @@ static void ar9003_hw_init_bb(struct ath_hw *ah, | |||
| 540 | udelay(synthDelay + BASE_ACTIVATE_DELAY); | 540 | udelay(synthDelay + BASE_ACTIVATE_DELAY); |
| 541 | } | 541 | } |
| 542 | 542 | ||
| 543 | void ar9003_hw_set_chain_masks(struct ath_hw *ah, u8 rx, u8 tx) | 543 | static void ar9003_hw_set_chain_masks(struct ath_hw *ah, u8 rx, u8 tx) |
| 544 | { | 544 | { |
| 545 | switch (rx) { | 545 | switch (rx) { |
| 546 | case 0x5: | 546 | case 0x5: |
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.h b/drivers/net/wireless/ath/ath9k/ar9003_phy.h index 5c590429f120..80397de11e0d 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h | |||
| @@ -1124,6 +1124,4 @@ | |||
| 1124 | #define AR_PHY_CL_TAB_CL_GAIN_MOD 0x1f | 1124 | #define AR_PHY_CL_TAB_CL_GAIN_MOD 0x1f |
| 1125 | #define AR_PHY_CL_TAB_CL_GAIN_MOD_S 0 | 1125 | #define AR_PHY_CL_TAB_CL_GAIN_MOD_S 0 |
| 1126 | 1126 | ||
| 1127 | void ar9003_hw_set_chain_masks(struct ath_hw *ah, u8 rx, u8 tx); | ||
| 1128 | |||
| 1129 | #endif /* AR9003_PHY_H */ | 1127 | #endif /* AR9003_PHY_H */ |
diff --git a/drivers/net/wireless/ath/ath9k/ar9580_1p0_initvals.h b/drivers/net/wireless/ath/ath9k/ar9580_1p0_initvals.h new file mode 100644 index 000000000000..06b3f0df9fad --- /dev/null +++ b/drivers/net/wireless/ath/ath9k/ar9580_1p0_initvals.h | |||
| @@ -0,0 +1,1673 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (c) 2010 Atheros Communications Inc. | ||
| 3 | * | ||
| 4 | * Permission to use, copy, modify, and/or distribute this software for any | ||
| 5 | * purpose with or without fee is hereby granted, provided that the above | ||
| 6 | * copyright notice and this permission notice appear in all copies. | ||
| 7 | * | ||
| 8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | ||
| 9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | ||
| 10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | ||
| 11 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | ||
| 12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | ||
| 13 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | ||
| 14 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | ||
| 15 | */ | ||
| 16 | |||
| 17 | #ifndef INITVALS_9580_1P0_H | ||
| 18 | #define INITVALS_9580_1P0_H | ||
| 19 | |||
| 20 | /* AR9580 1.0 */ | ||
| 21 | |||
| 22 | static const u32 ar9580_1p0_modes_fast_clock[][3] = { | ||
| 23 | /* Addr 5G_HT20 5G_HT40 */ | ||
| 24 | {0x00001030, 0x00000268, 0x000004d0}, | ||
| 25 | {0x00001070, 0x0000018c, 0x00000318}, | ||
| 26 | {0x000010b0, 0x00000fd0, 0x00001fa0}, | ||
| 27 | {0x00008014, 0x044c044c, 0x08980898}, | ||
| 28 | {0x0000801c, 0x148ec02b, 0x148ec057}, | ||
| 29 | {0x00008318, 0x000044c0, 0x00008980}, | ||
| 30 | {0x00009e00, 0x0372131c, 0x0372131c}, | ||
| 31 | {0x0000a230, 0x0000000b, 0x00000016}, | ||
| 32 | {0x0000a254, 0x00000898, 0x00001130}, | ||
| 33 | }; | ||
| 34 | |||
| 35 | static const u32 ar9580_1p0_radio_postamble[][5] = { | ||
| 36 | /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ | ||
| 37 | {0x0001609c, 0x0dd08f29, 0x0dd08f29, 0x0b283f31, 0x0b283f31}, | ||
| 38 | {0x000160ac, 0xa4653c00, 0xa4653c00, 0x24652800, 0x24652800}, | ||
| 39 | {0x000160b0, 0x03284f3e, 0x03284f3e, 0x05d08f20, 0x05d08f20}, | ||
| 40 | {0x0001610c, 0x08000000, 0x00000000, 0x00000000, 0x00000000}, | ||
| 41 | {0x00016140, 0x10804008, 0x10804008, 0x50804008, 0x50804008}, | ||
| 42 | {0x0001650c, 0x08000000, 0x00000000, 0x00000000, 0x00000000}, | ||
| 43 | {0x00016540, 0x10804008, 0x10804008, 0x50804008, 0x50804008}, | ||
| 44 | {0x0001690c, 0x08000000, 0x00000000, 0x00000000, 0x00000000}, | ||
| 45 | {0x00016940, 0x10804008, 0x10804008, 0x50804008, 0x50804008}, | ||
| 46 | }; | ||
| 47 | |||
| 48 | static const u32 ar9580_1p0_baseband_core[][2] = { | ||
| 49 | /* Addr allmodes */ | ||
| 50 | {0x00009800, 0xafe68e30}, | ||
| 51 | {0x00009804, 0xfd14e000}, | ||
| 52 | {0x00009808, 0x9c0a9f6b}, | ||
| 53 | {0x0000980c, 0x04900000}, | ||
| 54 | {0x00009814, 0x3280c00a}, | ||
| 55 | {0x00009818, 0x00000000}, | ||
| 56 | {0x0000981c, 0x00020028}, | ||
| 57 | {0x00009834, 0x6400a290}, | ||
| 58 | {0x00009838, 0x0108ecff}, | ||
| 59 | {0x0000983c, 0x0d000600}, | ||
| 60 | {0x00009880, 0x201fff00}, | ||
| 61 | {0x00009884, 0x00001042}, | ||
| 62 | {0x000098a4, 0x00200400}, | ||
| 63 | {0x000098b0, 0x32840bbe}, | ||
| 64 | {0x000098d0, 0x004b6a8e}, | ||
| 65 | {0x000098d4, 0x00000820}, | ||
| 66 | {0x000098dc, 0x00000000}, | ||
| 67 | {0x000098f0, 0x00000000}, | ||
| 68 | {0x000098f4, 0x00000000}, | ||
| 69 | {0x00009c04, 0xff55ff55}, | ||
| 70 | {0x00009c08, 0x0320ff55}, | ||
| 71 | {0x00009c0c, 0x00000000}, | ||
| 72 | {0x00009c10, 0x00000000}, | ||
| 73 | {0x00009c14, 0x00046384}, | ||
| 74 | {0x00009c18, 0x05b6b440}, | ||
| 75 | {0x00009c1c, 0x00b6b440}, | ||
| 76 | {0x00009d00, 0xc080a333}, | ||
| 77 | {0x00009d04, 0x40206c10}, | ||
| 78 | {0x00009d08, 0x009c4060}, | ||
| 79 | {0x00009d0c, 0x9883800a}, | ||
| 80 | {0x00009d10, 0x01834061}, | ||
| 81 | {0x00009d14, 0x00c0040b}, | ||
| 82 | {0x00009d18, 0x00000000}, | ||
| 83 | {0x00009e08, 0x0038230c}, | ||
| 84 | {0x00009e24, 0x990bb515}, | ||
| 85 | {0x00009e28, 0x0c6f0000}, | ||
| 86 | {0x00009e30, 0x06336f77}, | ||
| 87 | {0x00009e34, 0x6af6532f}, | ||
| 88 | {0x00009e38, 0x0cc80c00}, | ||
| 89 | {0x00009e40, 0x0d261820}, | ||
| 90 | {0x00009e4c, 0x00001004}, | ||
| 91 | {0x00009e50, 0x00ff03f1}, | ||
| 92 | {0x00009e54, 0x00000000}, | ||
| 93 | {0x00009fc0, 0x803e4788}, | ||
| 94 | {0x00009fc4, 0x0001efb5}, | ||
| 95 | {0x00009fcc, 0x40000014}, | ||
| 96 | {0x00009fd0, 0x01193b93}, | ||
| 97 | {0x0000a20c, 0x00000000}, | ||
| 98 | {0x0000a220, 0x00000000}, | ||
| 99 | {0x0000a224, 0x00000000}, | ||
| 100 | {0x0000a228, 0x10002310}, | ||
| 101 | {0x0000a23c, 0x00000000}, | ||
| 102 | {0x0000a244, 0x0c000000}, | ||
| 103 | {0x0000a2a0, 0x00000001}, | ||
| 104 | {0x0000a2c0, 0x00000001}, | ||
| 105 | {0x0000a2c8, 0x00000000}, | ||
| 106 | {0x0000a2cc, 0x18c43433}, | ||
| 107 | {0x0000a2d4, 0x00000000}, | ||
| 108 | {0x0000a2ec, 0x00000000}, | ||
| 109 | {0x0000a2f0, 0x00000000}, | ||
| 110 | {0x0000a2f4, 0x00000000}, | ||
| 111 | {0x0000a2f8, 0x00000000}, | ||
| 112 | {0x0000a344, 0x00000000}, | ||
| 113 | {0x0000a34c, 0x00000000}, | ||
| 114 | {0x0000a350, 0x0000a000}, | ||
| 115 | {0x0000a364, 0x00000000}, | ||
| 116 | {0x0000a370, 0x00000000}, | ||
| 117 | {0x0000a390, 0x00000001}, | ||
| 118 | {0x0000a394, 0x00000444}, | ||
| 119 | {0x0000a398, 0x001f0e0f}, | ||
| 120 | {0x0000a39c, 0x0075393f}, | ||
| 121 | {0x0000a3a0, 0xb79f6427}, | ||
| 122 | {0x0000a3a4, 0x00000000}, | ||
| 123 | {0x0000a3a8, 0xaaaaaaaa}, | ||
| 124 | {0x0000a3ac, 0x3c466478}, | ||
| 125 | {0x0000a3c0, 0x20202020}, | ||
| 126 | {0x0000a3c4, 0x22222220}, | ||
| 127 | {0x0000a3c8, 0x20200020}, | ||
| 128 | {0x0000a3cc, 0x20202020}, | ||
| 129 | {0x0000a3d0, 0x20202020}, | ||
| 130 | {0x0000a3d4, 0x20202020}, | ||
| 131 | {0x0000a3d8, 0x20202020}, | ||
| 132 | {0x0000a3dc, 0x20202020}, | ||
| 133 | {0x0000a3e0, 0x20202020}, | ||
| 134 | {0x0000a3e4, 0x20202020}, | ||
| 135 | {0x0000a3e8, 0x20202020}, | ||
| 136 | {0x0000a3ec, 0x20202020}, | ||
| 137 | {0x0000a3f0, 0x00000000}, | ||
| 138 | {0x0000a3f4, 0x00000000}, | ||
| 139 | {0x0000a3f8, 0x0c9bd380}, | ||
| 140 | {0x0000a3fc, 0x000f0f01}, | ||
| 141 | {0x0000a400, 0x8fa91f01}, | ||
| 142 | {0x0000a404, 0x00000000}, | ||
| 143 | {0x0000a408, 0x0e79e5c6}, | ||
| 144 | {0x0000a40c, 0x00820820}, | ||
| 145 | {0x0000a414, 0x1ce739ce}, | ||
| 146 | {0x0000a418, 0x2d001dce}, | ||
| 147 | {0x0000a41c, 0x1ce739ce}, | ||
| 148 | {0x0000a420, 0x000001ce}, | ||
| 149 | {0x0000a424, 0x1ce739ce}, | ||
| 150 | {0x0000a428, 0x000001ce}, | ||
| 151 | {0x0000a42c, 0x1ce739ce}, | ||
| 152 | {0x0000a430, 0x1ce739ce}, | ||
| 153 | {0x0000a434, 0x00000000}, | ||
| 154 | {0x0000a438, 0x00001801}, | ||
| 155 | {0x0000a43c, 0x00100000}, | ||
| 156 | {0x0000a440, 0x00000000}, | ||
| 157 | {0x0000a444, 0x00000000}, | ||
| 158 | {0x0000a448, 0x05000080}, | ||
| 159 | {0x0000a44c, 0x00000001}, | ||
| 160 | {0x0000a450, 0x00010000}, | ||
| 161 | {0x0000a458, 0x00000000}, | ||
| 162 | {0x0000a640, 0x00000000}, | ||
| 163 | {0x0000a644, 0x3fad9d74}, | ||
| 164 | {0x0000a648, 0x0048060a}, | ||
| 165 | {0x0000a64c, 0x00003c37}, | ||
| 166 | {0x0000a670, 0x03020100}, | ||
| 167 | {0x0000a674, 0x09080504}, | ||
| 168 | {0x0000a678, 0x0d0c0b0a}, | ||
| 169 | {0x0000a67c, 0x13121110}, | ||
| 170 | {0x0000a680, 0x31301514}, | ||
| 171 | {0x0000a684, 0x35343332}, | ||
| 172 | {0x0000a688, 0x00000036}, | ||
| 173 | {0x0000a690, 0x00000838}, | ||
| 174 | {0x0000a7c0, 0x00000000}, | ||
| 175 | {0x0000a7c4, 0xfffffffc}, | ||
| 176 | {0x0000a7c8, 0x00000000}, | ||
| 177 | {0x0000a7cc, 0x00000000}, | ||
| 178 | {0x0000a7d0, 0x00000000}, | ||
| 179 | {0x0000a7d4, 0x00000004}, | ||
| 180 | {0x0000a7dc, 0x00000000}, | ||
| 181 | {0x0000a8d0, 0x004b6a8e}, | ||
| 182 | {0x0000a8d4, 0x00000820}, | ||
| 183 | {0x0000a8dc, 0x00000000}, | ||
| 184 | {0x0000a8f0, 0x00000000}, | ||
| 185 | {0x0000a8f4, 0x00000000}, | ||
| 186 | {0x0000b2d0, 0x00000080}, | ||
| 187 | {0x0000b2d4, 0x00000000}, | ||
| 188 | {0x0000b2ec, 0x00000000}, | ||
| 189 | {0x0000b2f0, 0x00000000}, | ||
| 190 | {0x0000b2f4, 0x00000000}, | ||
| 191 | {0x0000b2f8, 0x00000000}, | ||
| 192 | {0x0000b408, 0x0e79e5c0}, | ||
| 193 | {0x0000b40c, 0x00820820}, | ||
| 194 | {0x0000b420, 0x00000000}, | ||
| 195 | {0x0000b8d0, 0x004b6a8e}, | ||
| 196 | {0x0000b8d4, 0x00000820}, | ||
| 197 | {0x0000b8dc, 0x00000000}, | ||
| 198 | {0x0000b8f0, 0x00000000}, | ||
| 199 | {0x0000b8f4, 0x00000000}, | ||
| 200 | {0x0000c2d0, 0x00000080}, | ||
| 201 | {0x0000c2d4, 0x00000000}, | ||
| 202 | {0x0000c2ec, 0x00000000}, | ||
| 203 | {0x0000c2f0, 0x00000000}, | ||
| 204 | {0x0000c2f4, 0x00000000}, | ||
| 205 | {0x0000c2f8, 0x00000000}, | ||
| 206 | {0x0000c408, 0x0e79e5c0}, | ||
| 207 | {0x0000c40c, 0x00820820}, | ||
| 208 | {0x0000c420, 0x00000000}, | ||
| 209 | }; | ||
| 210 | |||
| 211 | static const u32 ar9580_1p0_mac_postamble[][5] = { | ||
| 212 | /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ | ||
| 213 | {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160}, | ||
| 214 | {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c}, | ||
| 215 | {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38}, | ||
| 216 | {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00}, | ||
| 217 | {0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b}, | ||
| 218 | {0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810}, | ||
| 219 | {0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a}, | ||
| 220 | {0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440}, | ||
| 221 | }; | ||
| 222 | |||
| 223 | static const u32 ar9580_1p0_low_ob_db_tx_gain_table[][5] = { | ||
| 224 | /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ | ||
| 225 | {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352}, | ||
| 226 | {0x0000a2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584}, | ||
| 227 | {0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800}, | ||
| 228 | {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000}, | ||
| 229 | {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9}, | ||
| 230 | {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
| 231 | {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002}, | ||
| 232 | {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004}, | ||
| 233 | {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200}, | ||
| 234 | {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202}, | ||
| 235 | {0x0000a514, 0x1c000223, 0x1c000223, 0x12000400, 0x12000400}, | ||
| 236 | {0x0000a518, 0x21002220, 0x21002220, 0x16000402, 0x16000402}, | ||
| 237 | {0x0000a51c, 0x27002223, 0x27002223, 0x19000404, 0x19000404}, | ||
| 238 | {0x0000a520, 0x2b022220, 0x2b022220, 0x1c000603, 0x1c000603}, | ||
| 239 | {0x0000a524, 0x2f022222, 0x2f022222, 0x21000a02, 0x21000a02}, | ||
| 240 | {0x0000a528, 0x34022225, 0x34022225, 0x25000a04, 0x25000a04}, | ||
| 241 | {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x28000a20, 0x28000a20}, | ||
| 242 | {0x0000a530, 0x3e02222c, 0x3e02222c, 0x2c000e20, 0x2c000e20}, | ||
| 243 | {0x0000a534, 0x4202242a, 0x4202242a, 0x30000e22, 0x30000e22}, | ||
| 244 | {0x0000a538, 0x4702244a, 0x4702244a, 0x34000e24, 0x34000e24}, | ||
| 245 | {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x38001640, 0x38001640}, | ||
| 246 | {0x0000a540, 0x4e02246c, 0x4e02246c, 0x3c001660, 0x3c001660}, | ||
| 247 | {0x0000a544, 0x5302266c, 0x5302266c, 0x3f001861, 0x3f001861}, | ||
| 248 | {0x0000a548, 0x5702286c, 0x5702286c, 0x43001a81, 0x43001a81}, | ||
| 249 | {0x0000a54c, 0x5c02486b, 0x5c02486b, 0x47001a83, 0x47001a83}, | ||
| 250 | {0x0000a550, 0x61024a6c, 0x61024a6c, 0x4a001c84, 0x4a001c84}, | ||
| 251 | {0x0000a554, 0x66026a6c, 0x66026a6c, 0x4e001ce3, 0x4e001ce3}, | ||
| 252 | {0x0000a558, 0x6b026e6c, 0x6b026e6c, 0x52001ce5, 0x52001ce5}, | ||
| 253 | {0x0000a55c, 0x7002708c, 0x7002708c, 0x56001ce9, 0x56001ce9}, | ||
| 254 | {0x0000a560, 0x7302b08a, 0x7302b08a, 0x5a001ceb, 0x5a001ceb}, | ||
| 255 | {0x0000a564, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, | ||
| 256 | {0x0000a568, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, | ||
| 257 | {0x0000a56c, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, | ||
| 258 | {0x0000a570, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, | ||
| 259 | {0x0000a574, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, | ||
| 260 | {0x0000a578, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, | ||
| 261 | {0x0000a57c, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, | ||
| 262 | {0x0000a580, 0x00800000, 0x00800000, 0x00800000, 0x00800000}, | ||
| 263 | {0x0000a584, 0x06800003, 0x06800003, 0x04800002, 0x04800002}, | ||
| 264 | {0x0000a588, 0x0a800020, 0x0a800020, 0x08800004, 0x08800004}, | ||
| 265 | {0x0000a58c, 0x10800023, 0x10800023, 0x0b800200, 0x0b800200}, | ||
| 266 | {0x0000a590, 0x16800220, 0x16800220, 0x0f800202, 0x0f800202}, | ||
| 267 | {0x0000a594, 0x1c800223, 0x1c800223, 0x12800400, 0x12800400}, | ||
| 268 | {0x0000a598, 0x21802220, 0x21802220, 0x16800402, 0x16800402}, | ||
| 269 | {0x0000a59c, 0x27802223, 0x27802223, 0x19800404, 0x19800404}, | ||
| 270 | {0x0000a5a0, 0x2b822220, 0x2b822220, 0x1c800603, 0x1c800603}, | ||
| 271 | {0x0000a5a4, 0x2f822222, 0x2f822222, 0x21800a02, 0x21800a02}, | ||
| 272 | {0x0000a5a8, 0x34822225, 0x34822225, 0x25800a04, 0x25800a04}, | ||
| 273 | {0x0000a5ac, 0x3a82222a, 0x3a82222a, 0x28800a20, 0x28800a20}, | ||
| 274 | {0x0000a5b0, 0x3e82222c, 0x3e82222c, 0x2c800e20, 0x2c800e20}, | ||
| 275 | {0x0000a5b4, 0x4282242a, 0x4282242a, 0x30800e22, 0x30800e22}, | ||
| 276 | {0x0000a5b8, 0x4782244a, 0x4782244a, 0x34800e24, 0x34800e24}, | ||
| 277 | {0x0000a5bc, 0x4b82244c, 0x4b82244c, 0x38801640, 0x38801640}, | ||
| 278 | {0x0000a5c0, 0x4e82246c, 0x4e82246c, 0x3c801660, 0x3c801660}, | ||
| 279 | {0x0000a5c4, 0x5382266c, 0x5382266c, 0x3f801861, 0x3f801861}, | ||
| 280 | {0x0000a5c8, 0x5782286c, 0x5782286c, 0x43801a81, 0x43801a81}, | ||
| 281 | {0x0000a5cc, 0x5c82486b, 0x5c82486b, 0x47801a83, 0x47801a83}, | ||
| 282 | {0x0000a5d0, 0x61824a6c, 0x61824a6c, 0x4a801c84, 0x4a801c84}, | ||
| 283 | {0x0000a5d4, 0x66826a6c, 0x66826a6c, 0x4e801ce3, 0x4e801ce3}, | ||
| 284 | {0x0000a5d8, 0x6b826e6c, 0x6b826e6c, 0x52801ce5, 0x52801ce5}, | ||
| 285 | {0x0000a5dc, 0x7082708c, 0x7082708c, 0x56801ce9, 0x56801ce9}, | ||
| 286 | {0x0000a5e0, 0x7382b08a, 0x7382b08a, 0x5a801ceb, 0x5a801ceb}, | ||
| 287 | {0x0000a5e4, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, | ||
| 288 | {0x0000a5e8, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, | ||
| 289 | {0x0000a5ec, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, | ||
| 290 | {0x0000a5f0, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, | ||
| 291 | {0x0000a5f4, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, | ||
| 292 | {0x0000a5f8, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, | ||
| 293 | {0x0000a5fc, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, | ||
| 294 | {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
| 295 | {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
| 296 | {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
| 297 | {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
| 298 | {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
| 299 | {0x0000a614, 0x01404000, 0x01404000, 0x01404000, 0x01404000}, | ||
| 300 | {0x0000a618, 0x01404501, 0x01404501, 0x01404501, 0x01404501}, | ||
| 301 | {0x0000a61c, 0x02008802, 0x02008802, 0x02008501, 0x02008501}, | ||
| 302 | {0x0000a620, 0x0300cc03, 0x0300cc03, 0x0280ca03, 0x0280ca03}, | ||
| 303 | {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04}, | ||
| 304 | {0x0000a628, 0x0300cc03, 0x0300cc03, 0x04014c04, 0x04014c04}, | ||
| 305 | {0x0000a62c, 0x03810c03, 0x03810c03, 0x04015005, 0x04015005}, | ||
| 306 | {0x0000a630, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005}, | ||
| 307 | {0x0000a634, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005}, | ||
| 308 | {0x0000a638, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005}, | ||
| 309 | {0x0000a63c, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005}, | ||
| 310 | {0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352}, | ||
| 311 | {0x0000b2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584}, | ||
| 312 | {0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800}, | ||
| 313 | {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000}, | ||
| 314 | {0x0000c2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352}, | ||
| 315 | {0x0000c2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584}, | ||
| 316 | {0x0000c2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800}, | ||
| 317 | {0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000}, | ||
| 318 | {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, | ||
| 319 | {0x00016048, 0x66480001, 0x66480001, 0x66480001, 0x66480001}, | ||
| 320 | {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, | ||
| 321 | {0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, | ||
| 322 | {0x00016448, 0x66480001, 0x66480001, 0x66480001, 0x66480001}, | ||
| 323 | {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, | ||
| 324 | {0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, | ||
| 325 | {0x00016848, 0x66480001, 0x66480001, 0x66480001, 0x66480001}, | ||
| 326 | {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, | ||
| 327 | }; | ||
| 328 | |||
| 329 | static const u32 ar9580_1p0_high_power_tx_gain_table[][5] = { | ||
| 330 | /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ | ||
| 331 | {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352}, | ||
| 332 | {0x0000a2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584}, | ||
| 333 | {0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800}, | ||
| 334 | {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000}, | ||
| 335 | {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9}, | ||
| 336 | {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
| 337 | {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002}, | ||
| 338 | {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004}, | ||
| 339 | {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200}, | ||
| 340 | {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202}, | ||
| 341 | {0x0000a514, 0x1c000223, 0x1c000223, 0x12000400, 0x12000400}, | ||
| 342 | {0x0000a518, 0x21002220, 0x21002220, 0x16000402, 0x16000402}, | ||
| 343 | {0x0000a51c, 0x27002223, 0x27002223, 0x19000404, 0x19000404}, | ||
| 344 | {0x0000a520, 0x2b022220, 0x2b022220, 0x1c000603, 0x1c000603}, | ||
| 345 | {0x0000a524, 0x2f022222, 0x2f022222, 0x21000a02, 0x21000a02}, | ||
| 346 | {0x0000a528, 0x34022225, 0x34022225, 0x25000a04, 0x25000a04}, | ||
| 347 | {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x28000a20, 0x28000a20}, | ||
| 348 | {0x0000a530, 0x3e02222c, 0x3e02222c, 0x2c000e20, 0x2c000e20}, | ||
| 349 | {0x0000a534, 0x4202242a, 0x4202242a, 0x30000e22, 0x30000e22}, | ||
| 350 | {0x0000a538, 0x4702244a, 0x4702244a, 0x34000e24, 0x34000e24}, | ||
| 351 | {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x38001640, 0x38001640}, | ||
| 352 | {0x0000a540, 0x4e02246c, 0x4e02246c, 0x3c001660, 0x3c001660}, | ||
| 353 | {0x0000a544, 0x5302266c, 0x5302266c, 0x3f001861, 0x3f001861}, | ||
| 354 | {0x0000a548, 0x5702286c, 0x5702286c, 0x43001a81, 0x43001a81}, | ||
| 355 | {0x0000a54c, 0x5c02486b, 0x5c02486b, 0x47001a83, 0x47001a83}, | ||
| 356 | {0x0000a550, 0x61024a6c, 0x61024a6c, 0x4a001c84, 0x4a001c84}, | ||
| 357 | {0x0000a554, 0x66026a6c, 0x66026a6c, 0x4e001ce3, 0x4e001ce3}, | ||
| 358 | {0x0000a558, 0x6b026e6c, 0x6b026e6c, 0x52001ce5, 0x52001ce5}, | ||
| 359 | {0x0000a55c, 0x7002708c, 0x7002708c, 0x56001ce9, 0x56001ce9}, | ||
| 360 | {0x0000a560, 0x7302b08a, 0x7302b08a, 0x5a001ceb, 0x5a001ceb}, | ||
| 361 | {0x0000a564, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, | ||
| 362 | {0x0000a568, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, | ||
| 363 | {0x0000a56c, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, | ||
| 364 | {0x0000a570, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, | ||
| 365 | {0x0000a574, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, | ||
| 366 | {0x0000a578, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, | ||
| 367 | {0x0000a57c, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, | ||
| 368 | {0x0000a580, 0x00800000, 0x00800000, 0x00800000, 0x00800000}, | ||
| 369 | {0x0000a584, 0x06800003, 0x06800003, 0x04800002, 0x04800002}, | ||
| 370 | {0x0000a588, 0x0a800020, 0x0a800020, 0x08800004, 0x08800004}, | ||
| 371 | {0x0000a58c, 0x10800023, 0x10800023, 0x0b800200, 0x0b800200}, | ||
| 372 | {0x0000a590, 0x16800220, 0x16800220, 0x0f800202, 0x0f800202}, | ||
| 373 | {0x0000a594, 0x1c800223, 0x1c800223, 0x12800400, 0x12800400}, | ||
| 374 | {0x0000a598, 0x21802220, 0x21802220, 0x16800402, 0x16800402}, | ||
| 375 | {0x0000a59c, 0x27802223, 0x27802223, 0x19800404, 0x19800404}, | ||
| 376 | {0x0000a5a0, 0x2b822220, 0x2b822220, 0x1c800603, 0x1c800603}, | ||
| 377 | {0x0000a5a4, 0x2f822222, 0x2f822222, 0x21800a02, 0x21800a02}, | ||
| 378 | {0x0000a5a8, 0x34822225, 0x34822225, 0x25800a04, 0x25800a04}, | ||
| 379 | {0x0000a5ac, 0x3a82222a, 0x3a82222a, 0x28800a20, 0x28800a20}, | ||
| 380 | {0x0000a5b0, 0x3e82222c, 0x3e82222c, 0x2c800e20, 0x2c800e20}, | ||
| 381 | {0x0000a5b4, 0x4282242a, 0x4282242a, 0x30800e22, 0x30800e22}, | ||
| 382 | {0x0000a5b8, 0x4782244a, 0x4782244a, 0x34800e24, 0x34800e24}, | ||
| 383 | {0x0000a5bc, 0x4b82244c, 0x4b82244c, 0x38801640, 0x38801640}, | ||
| 384 | {0x0000a5c0, 0x4e82246c, 0x4e82246c, 0x3c801660, 0x3c801660}, | ||
| 385 | {0x0000a5c4, 0x5382266c, 0x5382266c, 0x3f801861, 0x3f801861}, | ||
| 386 | {0x0000a5c8, 0x5782286c, 0x5782286c, 0x43801a81, 0x43801a81}, | ||
| 387 | {0x0000a5cc, 0x5c82486b, 0x5c82486b, 0x47801a83, 0x47801a83}, | ||
| 388 | {0x0000a5d0, 0x61824a6c, 0x61824a6c, 0x4a801c84, 0x4a801c84}, | ||
| 389 | {0x0000a5d4, 0x66826a6c, 0x66826a6c, 0x4e801ce3, 0x4e801ce3}, | ||
| 390 | {0x0000a5d8, 0x6b826e6c, 0x6b826e6c, 0x52801ce5, 0x52801ce5}, | ||
| 391 | {0x0000a5dc, 0x7082708c, 0x7082708c, 0x56801ce9, 0x56801ce9}, | ||
| 392 | {0x0000a5e0, 0x7382b08a, 0x7382b08a, 0x5a801ceb, 0x5a801ceb}, | ||
| 393 | {0x0000a5e4, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, | ||
| 394 | {0x0000a5e8, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, | ||
| 395 | {0x0000a5ec, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, | ||
| 396 | {0x0000a5f0, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, | ||
| 397 | {0x0000a5f4, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, | ||
| 398 | {0x0000a5f8, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, | ||
| 399 | {0x0000a5fc, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, | ||
| 400 | {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
| 401 | {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
| 402 | {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
| 403 | {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
| 404 | {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
| 405 | {0x0000a614, 0x01404000, 0x01404000, 0x01404000, 0x01404000}, | ||
| 406 | {0x0000a618, 0x01404501, 0x01404501, 0x01404501, 0x01404501}, | ||
| 407 | {0x0000a61c, 0x02008802, 0x02008802, 0x02008501, 0x02008501}, | ||
| 408 | {0x0000a620, 0x0300cc03, 0x0300cc03, 0x0280ca03, 0x0280ca03}, | ||
| 409 | {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04}, | ||
| 410 | {0x0000a628, 0x0300cc03, 0x0300cc03, 0x04014c04, 0x04014c04}, | ||
| 411 | {0x0000a62c, 0x03810c03, 0x03810c03, 0x04015005, 0x04015005}, | ||
| 412 | {0x0000a630, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005}, | ||
| 413 | {0x0000a634, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005}, | ||
| 414 | {0x0000a638, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005}, | ||
| 415 | {0x0000a63c, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005}, | ||
| 416 | {0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352}, | ||
| 417 | {0x0000b2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584}, | ||
| 418 | {0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800}, | ||
| 419 | {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000}, | ||
| 420 | {0x0000c2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352}, | ||
| 421 | {0x0000c2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584}, | ||
| 422 | {0x0000c2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800}, | ||
| 423 | {0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000}, | ||
| 424 | {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, | ||
| 425 | {0x00016048, 0x66480001, 0x66480001, 0x66480001, 0x66480001}, | ||
| 426 | {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, | ||
| 427 | {0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, | ||
| 428 | {0x00016448, 0x66480001, 0x66480001, 0x66480001, 0x66480001}, | ||
| 429 | {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, | ||
| 430 | {0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, | ||
| 431 | {0x00016848, 0x66480001, 0x66480001, 0x66480001, 0x66480001}, | ||
| 432 | {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, | ||
| 433 | }; | ||
| 434 | |||
| 435 | static const u32 ar9580_1p0_lowest_ob_db_tx_gain_table[][5] = { | ||
| 436 | /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ | ||
| 437 | {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352}, | ||
| 438 | {0x0000a2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584}, | ||
| 439 | {0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800}, | ||
| 440 | {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000}, | ||
| 441 | {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9}, | ||
| 442 | {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
| 443 | {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002}, | ||
| 444 | {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004}, | ||
| 445 | {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200}, | ||
| 446 | {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202}, | ||
| 447 | {0x0000a514, 0x1c000223, 0x1c000223, 0x12000400, 0x12000400}, | ||
| 448 | {0x0000a518, 0x21002220, 0x21002220, 0x16000402, 0x16000402}, | ||
| 449 | {0x0000a51c, 0x27002223, 0x27002223, 0x19000404, 0x19000404}, | ||
| 450 | {0x0000a520, 0x2b022220, 0x2b022220, 0x1c000603, 0x1c000603}, | ||
| 451 | {0x0000a524, 0x2f022222, 0x2f022222, 0x21000a02, 0x21000a02}, | ||
| 452 | {0x0000a528, 0x34022225, 0x34022225, 0x25000a04, 0x25000a04}, | ||
| 453 | {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x28000a20, 0x28000a20}, | ||
| 454 | {0x0000a530, 0x3e02222c, 0x3e02222c, 0x2c000e20, 0x2c000e20}, | ||
| 455 | {0x0000a534, 0x4202242a, 0x4202242a, 0x30000e22, 0x30000e22}, | ||
| 456 | {0x0000a538, 0x4702244a, 0x4702244a, 0x34000e24, 0x34000e24}, | ||
| 457 | {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x38001640, 0x38001640}, | ||
| 458 | {0x0000a540, 0x4e02246c, 0x4e02246c, 0x3c001660, 0x3c001660}, | ||
| 459 | {0x0000a544, 0x5302266c, 0x5302266c, 0x3f001861, 0x3f001861}, | ||
| 460 | {0x0000a548, 0x5702286c, 0x5702286c, 0x43001a81, 0x43001a81}, | ||
| 461 | {0x0000a54c, 0x5c02486b, 0x5c02486b, 0x47001a83, 0x47001a83}, | ||
| 462 | {0x0000a550, 0x61024a6c, 0x61024a6c, 0x4a001c84, 0x4a001c84}, | ||
| 463 | {0x0000a554, 0x66026a6c, 0x66026a6c, 0x4e001ce3, 0x4e001ce3}, | ||
| 464 | {0x0000a558, 0x6b026e6c, 0x6b026e6c, 0x52001ce5, 0x52001ce5}, | ||
| 465 | {0x0000a55c, 0x7002708c, 0x7002708c, 0x56001ce9, 0x56001ce9}, | ||
| 466 | {0x0000a560, 0x7302b08a, 0x7302b08a, 0x5a001ceb, 0x5a001ceb}, | ||
| 467 | {0x0000a564, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, | ||
| 468 | {0x0000a568, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, | ||
| 469 | {0x0000a56c, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, | ||
| 470 | {0x0000a570, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, | ||
| 471 | {0x0000a574, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, | ||
| 472 | {0x0000a578, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, | ||
| 473 | {0x0000a57c, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, | ||
| 474 | {0x0000a580, 0x00800000, 0x00800000, 0x00800000, 0x00800000}, | ||
| 475 | {0x0000a584, 0x06800003, 0x06800003, 0x04800002, 0x04800002}, | ||
| 476 | {0x0000a588, 0x0a800020, 0x0a800020, 0x08800004, 0x08800004}, | ||
| 477 | {0x0000a58c, 0x10800023, 0x10800023, 0x0b800200, 0x0b800200}, | ||
| 478 | {0x0000a590, 0x16800220, 0x16800220, 0x0f800202, 0x0f800202}, | ||
| 479 | {0x0000a594, 0x1c800223, 0x1c800223, 0x12800400, 0x12800400}, | ||
| 480 | {0x0000a598, 0x21802220, 0x21802220, 0x16800402, 0x16800402}, | ||
| 481 | {0x0000a59c, 0x27802223, 0x27802223, 0x19800404, 0x19800404}, | ||
| 482 | {0x0000a5a0, 0x2b822220, 0x2b822220, 0x1c800603, 0x1c800603}, | ||
| 483 | {0x0000a5a4, 0x2f822222, 0x2f822222, 0x21800a02, 0x21800a02}, | ||
| 484 | {0x0000a5a8, 0x34822225, 0x34822225, 0x25800a04, 0x25800a04}, | ||
| 485 | {0x0000a5ac, 0x3a82222a, 0x3a82222a, 0x28800a20, 0x28800a20}, | ||
| 486 | {0x0000a5b0, 0x3e82222c, 0x3e82222c, 0x2c800e20, 0x2c800e20}, | ||
| 487 | {0x0000a5b4, 0x4282242a, 0x4282242a, 0x30800e22, 0x30800e22}, | ||
| 488 | {0x0000a5b8, 0x4782244a, 0x4782244a, 0x34800e24, 0x34800e24}, | ||
| 489 | {0x0000a5bc, 0x4b82244c, 0x4b82244c, 0x38801640, 0x38801640}, | ||
| 490 | {0x0000a5c0, 0x4e82246c, 0x4e82246c, 0x3c801660, 0x3c801660}, | ||
| 491 | {0x0000a5c4, 0x5382266c, 0x5382266c, 0x3f801861, 0x3f801861}, | ||
| 492 | {0x0000a5c8, 0x5782286c, 0x5782286c, 0x43801a81, 0x43801a81}, | ||
| 493 | {0x0000a5cc, 0x5c82486b, 0x5c82486b, 0x47801a83, 0x47801a83}, | ||
| 494 | {0x0000a5d0, 0x61824a6c, 0x61824a6c, 0x4a801c84, 0x4a801c84}, | ||
| 495 | {0x0000a5d4, 0x66826a6c, 0x66826a6c, 0x4e801ce3, 0x4e801ce3}, | ||
| 496 | {0x0000a5d8, 0x6b826e6c, 0x6b826e6c, 0x52801ce5, 0x52801ce5}, | ||
| 497 | {0x0000a5dc, 0x7082708c, 0x7082708c, 0x56801ce9, 0x56801ce9}, | ||
| 498 | {0x0000a5e0, 0x7382b08a, 0x7382b08a, 0x5a801ceb, 0x5a801ceb}, | ||
| 499 | {0x0000a5e4, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, | ||
| 500 | {0x0000a5e8, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, | ||
| 501 | {0x0000a5ec, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, | ||
| 502 | {0x0000a5f0, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, | ||
| 503 | {0x0000a5f4, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, | ||
| 504 | {0x0000a5f8, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, | ||
| 505 | {0x0000a5fc, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, | ||
| 506 | {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
| 507 | {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
| 508 | {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
| 509 | {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
| 510 | {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
| 511 | {0x0000a614, 0x01404000, 0x01404000, 0x01404000, 0x01404000}, | ||
| 512 | {0x0000a618, 0x01404501, 0x01404501, 0x01404501, 0x01404501}, | ||
| 513 | {0x0000a61c, 0x02008802, 0x02008802, 0x02008501, 0x02008501}, | ||
| 514 | {0x0000a620, 0x0300cc03, 0x0300cc03, 0x0280ca03, 0x0280ca03}, | ||
| 515 | {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04}, | ||
| 516 | {0x0000a628, 0x0300cc03, 0x0300cc03, 0x04014c04, 0x04014c04}, | ||
| 517 | {0x0000a62c, 0x03810c03, 0x03810c03, 0x04015005, 0x04015005}, | ||
| 518 | {0x0000a630, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005}, | ||
| 519 | {0x0000a634, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005}, | ||
| 520 | {0x0000a638, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005}, | ||
| 521 | {0x0000a63c, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005}, | ||
| 522 | {0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352}, | ||
| 523 | {0x0000b2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584}, | ||
| 524 | {0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800}, | ||
| 525 | {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000}, | ||
| 526 | {0x0000c2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352}, | ||
| 527 | {0x0000c2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584}, | ||
| 528 | {0x0000c2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800}, | ||
| 529 | {0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000}, | ||
| 530 | {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, | ||
| 531 | {0x00016048, 0x62480001, 0x62480001, 0x62480001, 0x62480001}, | ||
| 532 | {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, | ||
| 533 | {0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, | ||
| 534 | {0x00016448, 0x62480001, 0x62480001, 0x62480001, 0x62480001}, | ||
| 535 | {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, | ||
| 536 | {0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, | ||
| 537 | {0x00016848, 0x62480001, 0x62480001, 0x62480001, 0x62480001}, | ||
| 538 | {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, | ||
| 539 | }; | ||
| 540 | |||
| 541 | static const u32 ar9580_1p0_baseband_core_txfir_coeff_japan_2484[][2] = { | ||
| 542 | /* Addr allmodes */ | ||
| 543 | {0x0000a398, 0x00000000}, | ||
| 544 | {0x0000a39c, 0x6f7f0301}, | ||
| 545 | {0x0000a3a0, 0xca9228ee}, | ||
| 546 | }; | ||
| 547 | |||
| 548 | static const u32 ar9580_1p0_mac_core[][2] = { | ||
| 549 | /* Addr allmodes */ | ||
| 550 | {0x00000008, 0x00000000}, | ||
| 551 | {0x00000030, 0x00020085}, | ||
| 552 | {0x00000034, 0x00000005}, | ||
| 553 | {0x00000040, 0x00000000}, | ||
| 554 | {0x00000044, 0x00000000}, | ||
| 555 | {0x00000048, 0x00000008}, | ||
| 556 | {0x0000004c, 0x00000010}, | ||
| 557 | {0x00000050, 0x00000000}, | ||
| 558 | {0x00001040, 0x002ffc0f}, | ||
| 559 | {0x00001044, 0x002ffc0f}, | ||
| 560 | {0x00001048, 0x002ffc0f}, | ||
| 561 | {0x0000104c, 0x002ffc0f}, | ||
| 562 | {0x00001050, 0x002ffc0f}, | ||
| 563 | {0x00001054, 0x002ffc0f}, | ||
| 564 | {0x00001058, 0x002ffc0f}, | ||
| 565 | {0x0000105c, 0x002ffc0f}, | ||
| 566 | {0x00001060, 0x002ffc0f}, | ||
| 567 | {0x00001064, 0x002ffc0f}, | ||
| 568 | {0x000010f0, 0x00000100}, | ||
| 569 | {0x00001270, 0x00000000}, | ||
| 570 | {0x000012b0, 0x00000000}, | ||
| 571 | {0x000012f0, 0x00000000}, | ||
| 572 | {0x0000143c, 0x00000000}, | ||
| 573 | {0x0000147c, 0x00000000}, | ||
| 574 | {0x00008000, 0x00000000}, | ||
| 575 | {0x00008004, 0x00000000}, | ||
| 576 | {0x00008008, 0x00000000}, | ||
| 577 | {0x0000800c, 0x00000000}, | ||
| 578 | {0x00008018, 0x00000000}, | ||
| 579 | {0x00008020, 0x00000000}, | ||
| 580 | {0x00008038, 0x00000000}, | ||
| 581 | {0x0000803c, 0x00000000}, | ||
| 582 | {0x00008040, 0x00000000}, | ||
| 583 | {0x00008044, 0x00000000}, | ||
| 584 | {0x00008048, 0x00000000}, | ||
| 585 | {0x0000804c, 0xffffffff}, | ||
| 586 | {0x00008054, 0x00000000}, | ||
| 587 | {0x00008058, 0x00000000}, | ||
| 588 | {0x0000805c, 0x000fc78f}, | ||
| 589 | {0x00008060, 0x0000000f}, | ||
| 590 | {0x00008064, 0x00000000}, | ||
| 591 | {0x00008070, 0x00000310}, | ||
| 592 | {0x00008074, 0x00000020}, | ||
| 593 | {0x00008078, 0x00000000}, | ||
| 594 | {0x0000809c, 0x0000000f}, | ||
| 595 | {0x000080a0, 0x00000000}, | ||
| 596 | {0x000080a4, 0x02ff0000}, | ||
| 597 | {0x000080a8, 0x0e070605}, | ||
| 598 | {0x000080ac, 0x0000000d}, | ||
| 599 | {0x000080b0, 0x00000000}, | ||
| 600 | {0x000080b4, 0x00000000}, | ||
| 601 | {0x000080b8, 0x00000000}, | ||
| 602 | {0x000080bc, 0x00000000}, | ||
| 603 | {0x000080c0, 0x2a800000}, | ||
| 604 | {0x000080c4, 0x06900168}, | ||
| 605 | {0x000080c8, 0x13881c22}, | ||
| 606 | {0x000080cc, 0x01f40000}, | ||
| 607 | {0x000080d0, 0x00252500}, | ||
| 608 | {0x000080d4, 0x00a00000}, | ||
| 609 | {0x000080d8, 0x00400000}, | ||
| 610 | {0x000080dc, 0x00000000}, | ||
| 611 | {0x000080e0, 0xffffffff}, | ||
| 612 | {0x000080e4, 0x0000ffff}, | ||
| 613 | {0x000080e8, 0x3f3f3f3f}, | ||
| 614 | {0x000080ec, 0x00000000}, | ||
| 615 | {0x000080f0, 0x00000000}, | ||
| 616 | {0x000080f4, 0x00000000}, | ||
| 617 | {0x000080fc, 0x00020000}, | ||
| 618 | {0x00008100, 0x00000000}, | ||
| 619 | {0x00008108, 0x00000052}, | ||
| 620 | {0x0000810c, 0x00000000}, | ||
| 621 | {0x00008110, 0x00000000}, | ||
| 622 | {0x00008114, 0x000007ff}, | ||
| 623 | {0x00008118, 0x000000aa}, | ||
| 624 | {0x0000811c, 0x00003210}, | ||
| 625 | {0x00008124, 0x00000000}, | ||
| 626 | {0x00008128, 0x00000000}, | ||
| 627 | {0x0000812c, 0x00000000}, | ||
| 628 | {0x00008130, 0x00000000}, | ||
| 629 | {0x00008134, 0x00000000}, | ||
| 630 | {0x00008138, 0x00000000}, | ||
| 631 | {0x0000813c, 0x0000ffff}, | ||
| 632 | {0x00008144, 0xffffffff}, | ||
| 633 | {0x00008168, 0x00000000}, | ||
| 634 | {0x0000816c, 0x00000000}, | ||
| 635 | {0x000081c0, 0x00000000}, | ||
| 636 | {0x000081c4, 0x33332210}, | ||
| 637 | {0x000081ec, 0x00000000}, | ||
| 638 | {0x000081f0, 0x00000000}, | ||
| 639 | {0x000081f4, 0x00000000}, | ||
| 640 | {0x000081f8, 0x00000000}, | ||
| 641 | {0x000081fc, 0x00000000}, | ||
| 642 | {0x00008240, 0x00100000}, | ||
| 643 | {0x00008244, 0x0010f400}, | ||
| 644 | {0x00008248, 0x00000800}, | ||
| 645 | {0x0000824c, 0x0001e800}, | ||
| 646 | {0x00008250, 0x00000000}, | ||
| 647 | {0x00008254, 0x00000000}, | ||
| 648 | {0x00008258, 0x00000000}, | ||
| 649 | {0x0000825c, 0x40000000}, | ||
| 650 | {0x00008260, 0x00080922}, | ||
| 651 | {0x00008264, 0x9bc00010}, | ||
| 652 | {0x00008268, 0xffffffff}, | ||
| 653 | {0x0000826c, 0x0000ffff}, | ||
| 654 | {0x00008270, 0x00000000}, | ||
| 655 | {0x00008274, 0x40000000}, | ||
| 656 | {0x00008278, 0x003e4180}, | ||
| 657 | {0x0000827c, 0x00000004}, | ||
| 658 | {0x00008284, 0x0000002c}, | ||
| 659 | {0x00008288, 0x0000002c}, | ||
| 660 | {0x0000828c, 0x000000ff}, | ||
| 661 | {0x00008294, 0x00000000}, | ||
| 662 | {0x00008298, 0x00000000}, | ||
| 663 | {0x0000829c, 0x00000000}, | ||
| 664 | {0x00008300, 0x00000140}, | ||
| 665 | {0x00008314, 0x00000000}, | ||
| 666 | {0x0000831c, 0x0000010d}, | ||
| 667 | {0x00008328, 0x00000000}, | ||
| 668 | {0x0000832c, 0x00000007}, | ||
| 669 | {0x00008330, 0x00000302}, | ||
| 670 | {0x00008334, 0x00000700}, | ||
| 671 | {0x00008338, 0x00ff0000}, | ||
| 672 | {0x0000833c, 0x02400000}, | ||
| 673 | {0x00008340, 0x000107ff}, | ||
| 674 | {0x00008344, 0xaa48105b}, | ||
| 675 | {0x00008348, 0x008f0000}, | ||
| 676 | {0x0000835c, 0x00000000}, | ||
| 677 | {0x00008360, 0xffffffff}, | ||
| 678 | {0x00008364, 0xffffffff}, | ||
| 679 | {0x00008368, 0x00000000}, | ||
| 680 | {0x00008370, 0x00000000}, | ||
| 681 | {0x00008374, 0x000000ff}, | ||
| 682 | {0x00008378, 0x00000000}, | ||
| 683 | {0x0000837c, 0x00000000}, | ||
| 684 | {0x00008380, 0xffffffff}, | ||
| 685 | {0x00008384, 0xffffffff}, | ||
| 686 | {0x00008390, 0xffffffff}, | ||
| 687 | {0x00008394, 0xffffffff}, | ||
| 688 | {0x00008398, 0x00000000}, | ||
| 689 | {0x0000839c, 0x00000000}, | ||
| 690 | {0x000083a0, 0x00000000}, | ||
| 691 | {0x000083a4, 0x0000fa14}, | ||
| 692 | {0x000083a8, 0x000f0c00}, | ||
| 693 | {0x000083ac, 0x33332210}, | ||
| 694 | {0x000083b0, 0x33332210}, | ||
| 695 | {0x000083b4, 0x33332210}, | ||
| 696 | {0x000083b8, 0x33332210}, | ||
| 697 | {0x000083bc, 0x00000000}, | ||
| 698 | {0x000083c0, 0x00000000}, | ||
| 699 | {0x000083c4, 0x00000000}, | ||
| 700 | {0x000083c8, 0x00000000}, | ||
| 701 | {0x000083cc, 0x00000200}, | ||
| 702 | {0x000083d0, 0x000301ff}, | ||
| 703 | }; | ||
| 704 | |||
| 705 | static const u32 ar9580_1p0_mixed_ob_db_tx_gain_table[][5] = { | ||
| 706 | /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ | ||
| 707 | {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352}, | ||
| 708 | {0x0000a2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584}, | ||
| 709 | {0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800}, | ||
| 710 | {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000}, | ||
| 711 | {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9}, | ||
| 712 | {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
| 713 | {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002}, | ||
| 714 | {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004}, | ||
| 715 | {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200}, | ||
| 716 | {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202}, | ||
| 717 | {0x0000a514, 0x1c000223, 0x1c000223, 0x11000400, 0x11000400}, | ||
| 718 | {0x0000a518, 0x21002220, 0x21002220, 0x15000402, 0x15000402}, | ||
| 719 | {0x0000a51c, 0x27002223, 0x27002223, 0x19000404, 0x19000404}, | ||
| 720 | {0x0000a520, 0x2b022220, 0x2b022220, 0x1b000603, 0x1b000603}, | ||
| 721 | {0x0000a524, 0x2f022222, 0x2f022222, 0x1f000a02, 0x1f000a02}, | ||
| 722 | {0x0000a528, 0x34022225, 0x34022225, 0x23000a04, 0x23000a04}, | ||
| 723 | {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x26000a20, 0x26000a20}, | ||
| 724 | {0x0000a530, 0x3e02222c, 0x3e02222c, 0x2a000e20, 0x2a000e20}, | ||
| 725 | {0x0000a534, 0x4202242a, 0x4202242a, 0x2e000e22, 0x2e000e22}, | ||
| 726 | {0x0000a538, 0x4702244a, 0x4702244a, 0x31000e24, 0x31000e24}, | ||
| 727 | {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x34001640, 0x34001640}, | ||
| 728 | {0x0000a540, 0x4e02246c, 0x4e02246c, 0x38001660, 0x38001660}, | ||
| 729 | {0x0000a544, 0x5302266c, 0x5302266c, 0x3b001861, 0x3b001861}, | ||
| 730 | {0x0000a548, 0x5702286c, 0x5702286c, 0x3e001a81, 0x3e001a81}, | ||
| 731 | {0x0000a54c, 0x5c02486b, 0x5c02486b, 0x42001a83, 0x42001a83}, | ||
| 732 | {0x0000a550, 0x61024a6c, 0x61024a6c, 0x44001c84, 0x44001c84}, | ||
| 733 | {0x0000a554, 0x66026a6c, 0x66026a6c, 0x48001ce3, 0x48001ce3}, | ||
| 734 | {0x0000a558, 0x6b026e6c, 0x6b026e6c, 0x4c001ce5, 0x4c001ce5}, | ||
| 735 | {0x0000a55c, 0x7002708c, 0x7002708c, 0x50001ce9, 0x50001ce9}, | ||
| 736 | {0x0000a560, 0x7302b08a, 0x7302b08a, 0x54001ceb, 0x54001ceb}, | ||
| 737 | {0x0000a564, 0x7702b08c, 0x7702b08c, 0x56001eec, 0x56001eec}, | ||
| 738 | {0x0000a568, 0x7702b08c, 0x7702b08c, 0x56001eec, 0x56001eec}, | ||
| 739 | {0x0000a56c, 0x7702b08c, 0x7702b08c, 0x56001eec, 0x56001eec}, | ||
| 740 | {0x0000a570, 0x7702b08c, 0x7702b08c, 0x56001eec, 0x56001eec}, | ||
| 741 | {0x0000a574, 0x7702b08c, 0x7702b08c, 0x56001eec, 0x56001eec}, | ||
| 742 | {0x0000a578, 0x7702b08c, 0x7702b08c, 0x56001eec, 0x56001eec}, | ||
| 743 | {0x0000a57c, 0x7702b08c, 0x7702b08c, 0x56001eec, 0x56001eec}, | ||
| 744 | {0x0000a580, 0x00800000, 0x00800000, 0x00800000, 0x00800000}, | ||
| 745 | {0x0000a584, 0x06800003, 0x06800003, 0x04800002, 0x04800002}, | ||
| 746 | {0x0000a588, 0x0a800020, 0x0a800020, 0x08800004, 0x08800004}, | ||
| 747 | {0x0000a58c, 0x10800023, 0x10800023, 0x0b800200, 0x0b800200}, | ||
| 748 | {0x0000a590, 0x16800220, 0x16800220, 0x0f800202, 0x0f800202}, | ||
| 749 | {0x0000a594, 0x1c800223, 0x1c800223, 0x11800400, 0x11800400}, | ||
| 750 | {0x0000a598, 0x21802220, 0x21802220, 0x15800402, 0x15800402}, | ||
| 751 | {0x0000a59c, 0x27802223, 0x27802223, 0x19800404, 0x19800404}, | ||
| 752 | {0x0000a5a0, 0x2b822220, 0x2b822220, 0x1b800603, 0x1b800603}, | ||
| 753 | {0x0000a5a4, 0x2f822222, 0x2f822222, 0x1f800a02, 0x1f800a02}, | ||
| 754 | {0x0000a5a8, 0x34822225, 0x34822225, 0x23800a04, 0x23800a04}, | ||
| 755 | {0x0000a5ac, 0x3a82222a, 0x3a82222a, 0x26800a20, 0x26800a20}, | ||
| 756 | {0x0000a5b0, 0x3e82222c, 0x3e82222c, 0x2a800e20, 0x2a800e20}, | ||
| 757 | {0x0000a5b4, 0x4282242a, 0x4282242a, 0x2e800e22, 0x2e800e22}, | ||
| 758 | {0x0000a5b8, 0x4782244a, 0x4782244a, 0x31800e24, 0x31800e24}, | ||
| 759 | {0x0000a5bc, 0x4b82244c, 0x4b82244c, 0x34801640, 0x34801640}, | ||
| 760 | {0x0000a5c0, 0x4e82246c, 0x4e82246c, 0x38801660, 0x38801660}, | ||
| 761 | {0x0000a5c4, 0x5382266c, 0x5382266c, 0x3b801861, 0x3b801861}, | ||
| 762 | {0x0000a5c8, 0x5782286c, 0x5782286c, 0x3e801a81, 0x3e801a81}, | ||
| 763 | {0x0000a5cc, 0x5c82486b, 0x5c82486b, 0x42801a83, 0x42801a83}, | ||
| 764 | {0x0000a5d0, 0x61824a6c, 0x61824a6c, 0x44801c84, 0x44801c84}, | ||
| 765 | {0x0000a5d4, 0x66826a6c, 0x66826a6c, 0x48801ce3, 0x48801ce3}, | ||
| 766 | {0x0000a5d8, 0x6b826e6c, 0x6b826e6c, 0x4c801ce5, 0x4c801ce5}, | ||
| 767 | {0x0000a5dc, 0x7082708c, 0x7082708c, 0x50801ce9, 0x50801ce9}, | ||
| 768 | {0x0000a5e0, 0x7382b08a, 0x7382b08a, 0x54801ceb, 0x54801ceb}, | ||
| 769 | {0x0000a5e4, 0x7782b08c, 0x7782b08c, 0x56801eec, 0x56801eec}, | ||
| 770 | {0x0000a5e8, 0x7782b08c, 0x7782b08c, 0x56801eec, 0x56801eec}, | ||
| 771 | {0x0000a5ec, 0x7782b08c, 0x7782b08c, 0x56801eec, 0x56801eec}, | ||
| 772 | {0x0000a5f0, 0x7782b08c, 0x7782b08c, 0x56801eec, 0x56801eec}, | ||
| 773 | {0x0000a5f4, 0x7782b08c, 0x7782b08c, 0x56801eec, 0x56801eec}, | ||
| 774 | {0x0000a5f8, 0x7782b08c, 0x7782b08c, 0x56801eec, 0x56801eec}, | ||
| 775 | {0x0000a5fc, 0x7782b08c, 0x7782b08c, 0x56801eec, 0x56801eec}, | ||
| 776 | {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
| 777 | {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
| 778 | {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
| 779 | {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
| 780 | {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
| 781 | {0x0000a614, 0x01404000, 0x01404000, 0x01404000, 0x01404000}, | ||
| 782 | {0x0000a618, 0x01404501, 0x01404501, 0x01404501, 0x01404501}, | ||
| 783 | {0x0000a61c, 0x02008802, 0x02008802, 0x02008501, 0x02008501}, | ||
| 784 | {0x0000a620, 0x0300cc03, 0x0300cc03, 0x0280ca03, 0x0280ca03}, | ||
| 785 | {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04}, | ||
| 786 | {0x0000a628, 0x0300cc03, 0x0300cc03, 0x04014c04, 0x04014c04}, | ||
| 787 | {0x0000a62c, 0x03810c03, 0x03810c03, 0x04015005, 0x04015005}, | ||
| 788 | {0x0000a630, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005}, | ||
| 789 | {0x0000a634, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005}, | ||
| 790 | {0x0000a638, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005}, | ||
| 791 | {0x0000a63c, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005}, | ||
| 792 | {0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352}, | ||
| 793 | {0x0000b2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584}, | ||
| 794 | {0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800}, | ||
| 795 | {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000}, | ||
| 796 | {0x0000c2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352}, | ||
| 797 | {0x0000c2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584}, | ||
| 798 | {0x0000c2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800}, | ||
| 799 | {0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000}, | ||
| 800 | {0x00016044, 0x012492d4, 0x012492d4, 0x056db2e4, 0x056db2e4}, | ||
| 801 | {0x00016048, 0x66480001, 0x66480001, 0x8e480001, 0x8e480001}, | ||
| 802 | {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, | ||
| 803 | {0x00016444, 0x012492d4, 0x012492d4, 0x056db2e4, 0x056db2e4}, | ||
| 804 | {0x00016448, 0x66480001, 0x66480001, 0x8e480001, 0x8e480001}, | ||
| 805 | {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, | ||
| 806 | {0x00016844, 0x012492d4, 0x012492d4, 0x056db2e4, 0x056db2e4}, | ||
| 807 | {0x00016848, 0x66480001, 0x66480001, 0x8e480001, 0x8e480001}, | ||
| 808 | {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, | ||
| 809 | }; | ||
| 810 | |||
| 811 | static const u32 ar9580_1p0_wo_xlna_rx_gain_table[][2] = { | ||
| 812 | /* Addr allmodes */ | ||
| 813 | {0x0000a000, 0x00010000}, | ||
| 814 | {0x0000a004, 0x00030002}, | ||
| 815 | {0x0000a008, 0x00050004}, | ||
| 816 | {0x0000a00c, 0x00810080}, | ||
| 817 | {0x0000a010, 0x00830082}, | ||
| 818 | {0x0000a014, 0x01810180}, | ||
| 819 | {0x0000a018, 0x01830182}, | ||
| 820 | {0x0000a01c, 0x01850184}, | ||
| 821 | {0x0000a020, 0x01890188}, | ||
| 822 | {0x0000a024, 0x018b018a}, | ||
| 823 | {0x0000a028, 0x018d018c}, | ||
| 824 | {0x0000a02c, 0x03820190}, | ||
| 825 | {0x0000a030, 0x03840383}, | ||
| 826 | {0x0000a034, 0x03880385}, | ||
| 827 | {0x0000a038, 0x038a0389}, | ||
| 828 | {0x0000a03c, 0x038c038b}, | ||
| 829 | {0x0000a040, 0x0390038d}, | ||
| 830 | {0x0000a044, 0x03920391}, | ||
| 831 | {0x0000a048, 0x03940393}, | ||
| 832 | {0x0000a04c, 0x03960395}, | ||
| 833 | {0x0000a050, 0x00000000}, | ||
| 834 | {0x0000a054, 0x00000000}, | ||
| 835 | {0x0000a058, 0x00000000}, | ||
| 836 | {0x0000a05c, 0x00000000}, | ||
| 837 | {0x0000a060, 0x00000000}, | ||
| 838 | {0x0000a064, 0x00000000}, | ||
| 839 | {0x0000a068, 0x00000000}, | ||
| 840 | {0x0000a06c, 0x00000000}, | ||
| 841 | {0x0000a070, 0x00000000}, | ||
| 842 | {0x0000a074, 0x00000000}, | ||
| 843 | {0x0000a078, 0x00000000}, | ||
| 844 | {0x0000a07c, 0x00000000}, | ||
| 845 | {0x0000a080, 0x29292929}, | ||
| 846 | {0x0000a084, 0x29292929}, | ||
| 847 | {0x0000a088, 0x29292929}, | ||
| 848 | {0x0000a08c, 0x29292929}, | ||
| 849 | {0x0000a090, 0x22292929}, | ||
| 850 | {0x0000a094, 0x1d1d2222}, | ||
| 851 | {0x0000a098, 0x0c111117}, | ||
| 852 | {0x0000a09c, 0x00030303}, | ||
| 853 | {0x0000a0a0, 0x00000000}, | ||
| 854 | {0x0000a0a4, 0x00000000}, | ||
| 855 | {0x0000a0a8, 0x00000000}, | ||
| 856 | {0x0000a0ac, 0x00000000}, | ||
| 857 | {0x0000a0b0, 0x00000000}, | ||
| 858 | {0x0000a0b4, 0x00000000}, | ||
| 859 | {0x0000a0b8, 0x00000000}, | ||
| 860 | {0x0000a0bc, 0x00000000}, | ||
| 861 | {0x0000a0c0, 0x001f0000}, | ||
| 862 | {0x0000a0c4, 0x01000101}, | ||
| 863 | {0x0000a0c8, 0x011e011f}, | ||
| 864 | {0x0000a0cc, 0x011c011d}, | ||
| 865 | {0x0000a0d0, 0x02030204}, | ||
| 866 | {0x0000a0d4, 0x02010202}, | ||
| 867 | {0x0000a0d8, 0x021f0200}, | ||
| 868 | {0x0000a0dc, 0x0302021e}, | ||
| 869 | {0x0000a0e0, 0x03000301}, | ||
| 870 | {0x0000a0e4, 0x031e031f}, | ||
| 871 | {0x0000a0e8, 0x0402031d}, | ||
| 872 | {0x0000a0ec, 0x04000401}, | ||
| 873 | {0x0000a0f0, 0x041e041f}, | ||
| 874 | {0x0000a0f4, 0x0502041d}, | ||
| 875 | {0x0000a0f8, 0x05000501}, | ||
| 876 | {0x0000a0fc, 0x051e051f}, | ||
| 877 | {0x0000a100, 0x06010602}, | ||
| 878 | {0x0000a104, 0x061f0600}, | ||
| 879 | {0x0000a108, 0x061d061e}, | ||
| 880 | {0x0000a10c, 0x07020703}, | ||
| 881 | {0x0000a110, 0x07000701}, | ||
| 882 | {0x0000a114, 0x00000000}, | ||
| 883 | {0x0000a118, 0x00000000}, | ||
| 884 | {0x0000a11c, 0x00000000}, | ||
| 885 | {0x0000a120, 0x00000000}, | ||
| 886 | {0x0000a124, 0x00000000}, | ||
| 887 | {0x0000a128, 0x00000000}, | ||
| 888 | {0x0000a12c, 0x00000000}, | ||
| 889 | {0x0000a130, 0x00000000}, | ||
| 890 | {0x0000a134, 0x00000000}, | ||
| 891 | {0x0000a138, 0x00000000}, | ||
| 892 | {0x0000a13c, 0x00000000}, | ||
| 893 | {0x0000a140, 0x001f0000}, | ||
| 894 | {0x0000a144, 0x01000101}, | ||
| 895 | {0x0000a148, 0x011e011f}, | ||
| 896 | {0x0000a14c, 0x011c011d}, | ||
| 897 | {0x0000a150, 0x02030204}, | ||
| 898 | {0x0000a154, 0x02010202}, | ||
| 899 | {0x0000a158, 0x021f0200}, | ||
| 900 | {0x0000a15c, 0x0302021e}, | ||
| 901 | {0x0000a160, 0x03000301}, | ||
| 902 | {0x0000a164, 0x031e031f}, | ||
| 903 | {0x0000a168, 0x0402031d}, | ||
| 904 | {0x0000a16c, 0x04000401}, | ||
| 905 | {0x0000a170, 0x041e041f}, | ||
| 906 | {0x0000a174, 0x0502041d}, | ||
| 907 | {0x0000a178, 0x05000501}, | ||
| 908 | {0x0000a17c, 0x051e051f}, | ||
| 909 | {0x0000a180, 0x06010602}, | ||
| 910 | {0x0000a184, 0x061f0600}, | ||
| 911 | {0x0000a188, 0x061d061e}, | ||
| 912 | {0x0000a18c, 0x07020703}, | ||
| 913 | {0x0000a190, 0x07000701}, | ||
| 914 | {0x0000a194, 0x00000000}, | ||
| 915 | {0x0000a198, 0x00000000}, | ||
| 916 | {0x0000a19c, 0x00000000}, | ||
| 917 | {0x0000a1a0, 0x00000000}, | ||
| 918 | {0x0000a1a4, 0x00000000}, | ||
| 919 | {0x0000a1a8, 0x00000000}, | ||
| 920 | {0x0000a1ac, 0x00000000}, | ||
| 921 | {0x0000a1b0, 0x00000000}, | ||
| 922 | {0x0000a1b4, 0x00000000}, | ||
| 923 | {0x0000a1b8, 0x00000000}, | ||
| 924 | {0x0000a1bc, 0x00000000}, | ||
| 925 | {0x0000a1c0, 0x00000000}, | ||
| 926 | {0x0000a1c4, 0x00000000}, | ||
| 927 | {0x0000a1c8, 0x00000000}, | ||
| 928 | {0x0000a1cc, 0x00000000}, | ||
| 929 | {0x0000a1d0, 0x00000000}, | ||
| 930 | {0x0000a1d4, 0x00000000}, | ||
| 931 | {0x0000a1d8, 0x00000000}, | ||
| 932 | {0x0000a1dc, 0x00000000}, | ||
| 933 | {0x0000a1e0, 0x00000000}, | ||
| 934 | {0x0000a1e4, 0x00000000}, | ||
| 935 | {0x0000a1e8, 0x00000000}, | ||
| 936 | {0x0000a1ec, 0x00000000}, | ||
| 937 | {0x0000a1f0, 0x00000396}, | ||
| 938 | {0x0000a1f4, 0x00000396}, | ||
| 939 | {0x0000a1f8, 0x00000396}, | ||
| 940 | {0x0000a1fc, 0x00000196}, | ||
| 941 | {0x0000b000, 0x00010000}, | ||
| 942 | {0x0000b004, 0x00030002}, | ||
| 943 | {0x0000b008, 0x00050004}, | ||
| 944 | {0x0000b00c, 0x00810080}, | ||
| 945 | {0x0000b010, 0x00830082}, | ||
| 946 | {0x0000b014, 0x01810180}, | ||
| 947 | {0x0000b018, 0x01830182}, | ||
| 948 | {0x0000b01c, 0x01850184}, | ||
| 949 | {0x0000b020, 0x02810280}, | ||
| 950 | {0x0000b024, 0x02830282}, | ||
| 951 | {0x0000b028, 0x02850284}, | ||
| 952 | {0x0000b02c, 0x02890288}, | ||
| 953 | {0x0000b030, 0x028b028a}, | ||
| 954 | {0x0000b034, 0x0388028c}, | ||
| 955 | {0x0000b038, 0x038a0389}, | ||
| 956 | {0x0000b03c, 0x038c038b}, | ||
| 957 | {0x0000b040, 0x0390038d}, | ||
| 958 | {0x0000b044, 0x03920391}, | ||
| 959 | {0x0000b048, 0x03940393}, | ||
| 960 | {0x0000b04c, 0x03960395}, | ||
| 961 | {0x0000b050, 0x00000000}, | ||
| 962 | {0x0000b054, 0x00000000}, | ||
| 963 | {0x0000b058, 0x00000000}, | ||
| 964 | {0x0000b05c, 0x00000000}, | ||
| 965 | {0x0000b060, 0x00000000}, | ||
| 966 | {0x0000b064, 0x00000000}, | ||
| 967 | {0x0000b068, 0x00000000}, | ||
| 968 | {0x0000b06c, 0x00000000}, | ||
| 969 | {0x0000b070, 0x00000000}, | ||
| 970 | {0x0000b074, 0x00000000}, | ||
| 971 | {0x0000b078, 0x00000000}, | ||
| 972 | {0x0000b07c, 0x00000000}, | ||
| 973 | {0x0000b080, 0x32323232}, | ||
| 974 | {0x0000b084, 0x2f2f3232}, | ||
| 975 | {0x0000b088, 0x23282a2d}, | ||
| 976 | {0x0000b08c, 0x1c1e2123}, | ||
| 977 | {0x0000b090, 0x14171919}, | ||
| 978 | {0x0000b094, 0x0e0e1214}, | ||
| 979 | {0x0000b098, 0x03050707}, | ||
| 980 | {0x0000b09c, 0x00030303}, | ||
| 981 | {0x0000b0a0, 0x00000000}, | ||
| 982 | {0x0000b0a4, 0x00000000}, | ||
| 983 | {0x0000b0a8, 0x00000000}, | ||
| 984 | {0x0000b0ac, 0x00000000}, | ||
| 985 | {0x0000b0b0, 0x00000000}, | ||
| 986 | {0x0000b0b4, 0x00000000}, | ||
| 987 | {0x0000b0b8, 0x00000000}, | ||
| 988 | {0x0000b0bc, 0x00000000}, | ||
| 989 | {0x0000b0c0, 0x003f0020}, | ||
| 990 | {0x0000b0c4, 0x00400041}, | ||
| 991 | {0x0000b0c8, 0x0140005f}, | ||
| 992 | {0x0000b0cc, 0x0160015f}, | ||
| 993 | {0x0000b0d0, 0x017e017f}, | ||
| 994 | {0x0000b0d4, 0x02410242}, | ||
| 995 | {0x0000b0d8, 0x025f0240}, | ||
| 996 | {0x0000b0dc, 0x027f0260}, | ||
| 997 | {0x0000b0e0, 0x0341027e}, | ||
| 998 | {0x0000b0e4, 0x035f0340}, | ||
| 999 | {0x0000b0e8, 0x037f0360}, | ||
| 1000 | {0x0000b0ec, 0x04400441}, | ||
| 1001 | {0x0000b0f0, 0x0460045f}, | ||
| 1002 | {0x0000b0f4, 0x0541047f}, | ||
| 1003 | {0x0000b0f8, 0x055f0540}, | ||
| 1004 | {0x0000b0fc, 0x057f0560}, | ||
| 1005 | {0x0000b100, 0x06400641}, | ||
| 1006 | {0x0000b104, 0x0660065f}, | ||
| 1007 | {0x0000b108, 0x067e067f}, | ||
| 1008 | {0x0000b10c, 0x07410742}, | ||
| 1009 | {0x0000b110, 0x075f0740}, | ||
| 1010 | {0x0000b114, 0x077f0760}, | ||
| 1011 | {0x0000b118, 0x07800781}, | ||
| 1012 | {0x0000b11c, 0x07a0079f}, | ||
| 1013 | {0x0000b120, 0x07c107bf}, | ||
| 1014 | {0x0000b124, 0x000007c0}, | ||
| 1015 | {0x0000b128, 0x00000000}, | ||
| 1016 | {0x0000b12c, 0x00000000}, | ||
| 1017 | {0x0000b130, 0x00000000}, | ||
| 1018 | {0x0000b134, 0x00000000}, | ||
| 1019 | {0x0000b138, 0x00000000}, | ||
| 1020 | {0x0000b13c, 0x00000000}, | ||
| 1021 | {0x0000b140, 0x003f0020}, | ||
| 1022 | {0x0000b144, 0x00400041}, | ||
| 1023 | {0x0000b148, 0x0140005f}, | ||
| 1024 | {0x0000b14c, 0x0160015f}, | ||
| 1025 | {0x0000b150, 0x017e017f}, | ||
| 1026 | {0x0000b154, 0x02410242}, | ||
| 1027 | {0x0000b158, 0x025f0240}, | ||
| 1028 | {0x0000b15c, 0x027f0260}, | ||
| 1029 | {0x0000b160, 0x0341027e}, | ||
| 1030 | {0x0000b164, 0x035f0340}, | ||
| 1031 | {0x0000b168, 0x037f0360}, | ||
| 1032 | {0x0000b16c, 0x04400441}, | ||
| 1033 | {0x0000b170, 0x0460045f}, | ||
| 1034 | {0x0000b174, 0x0541047f}, | ||
| 1035 | {0x0000b178, 0x055f0540}, | ||
| 1036 | {0x0000b17c, 0x057f0560}, | ||
| 1037 | {0x0000b180, 0x06400641}, | ||
| 1038 | {0x0000b184, 0x0660065f}, | ||
| 1039 | {0x0000b188, 0x067e067f}, | ||
| 1040 | {0x0000b18c, 0x07410742}, | ||
| 1041 | {0x0000b190, 0x075f0740}, | ||
| 1042 | {0x0000b194, 0x077f0760}, | ||
| 1043 | {0x0000b198, 0x07800781}, | ||
| 1044 | {0x0000b19c, 0x07a0079f}, | ||
| 1045 | {0x0000b1a0, 0x07c107bf}, | ||
| 1046 | {0x0000b1a4, 0x000007c0}, | ||
| 1047 | {0x0000b1a8, 0x00000000}, | ||
| 1048 | {0x0000b1ac, 0x00000000}, | ||
| 1049 | {0x0000b1b0, 0x00000000}, | ||
| 1050 | {0x0000b1b4, 0x00000000}, | ||
| 1051 | {0x0000b1b8, 0x00000000}, | ||
| 1052 | {0x0000b1bc, 0x00000000}, | ||
| 1053 | {0x0000b1c0, 0x00000000}, | ||
| 1054 | {0x0000b1c4, 0x00000000}, | ||
| 1055 | {0x0000b1c8, 0x00000000}, | ||
| 1056 | {0x0000b1cc, 0x00000000}, | ||
| 1057 | {0x0000b1d0, 0x00000000}, | ||
| 1058 | {0x0000b1d4, 0x00000000}, | ||
| 1059 | {0x0000b1d8, 0x00000000}, | ||
| 1060 | {0x0000b1dc, 0x00000000}, | ||
| 1061 | {0x0000b1e0, 0x00000000}, | ||
| 1062 | {0x0000b1e4, 0x00000000}, | ||
| 1063 | {0x0000b1e8, 0x00000000}, | ||
| 1064 | {0x0000b1ec, 0x00000000}, | ||
| 1065 | {0x0000b1f0, 0x00000396}, | ||
| 1066 | {0x0000b1f4, 0x00000396}, | ||
| 1067 | {0x0000b1f8, 0x00000396}, | ||
| 1068 | {0x0000b1fc, 0x00000196}, | ||
| 1069 | }; | ||
| 1070 | |||
| 1071 | static const u32 ar9580_1p0_soc_postamble[][5] = { | ||
| 1072 | /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ | ||
| 1073 | {0x00007010, 0x00000023, 0x00000023, 0x00000023, 0x00000023}, | ||
| 1074 | }; | ||
| 1075 | |||
| 1076 | static const u32 ar9580_1p0_high_ob_db_tx_gain_table[][5] = { | ||
| 1077 | /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ | ||
| 1078 | {0x0000a2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352}, | ||
| 1079 | {0x0000a2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584}, | ||
| 1080 | {0x0000a2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800}, | ||
| 1081 | {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000}, | ||
| 1082 | {0x0000a410, 0x000050d8, 0x000050d8, 0x000050d9, 0x000050d9}, | ||
| 1083 | {0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000}, | ||
| 1084 | {0x0000a504, 0x04002222, 0x04002222, 0x04000002, 0x04000002}, | ||
| 1085 | {0x0000a508, 0x09002421, 0x09002421, 0x08000004, 0x08000004}, | ||
| 1086 | {0x0000a50c, 0x0d002621, 0x0d002621, 0x0b000200, 0x0b000200}, | ||
| 1087 | {0x0000a510, 0x13004620, 0x13004620, 0x0f000202, 0x0f000202}, | ||
| 1088 | {0x0000a514, 0x19004a20, 0x19004a20, 0x11000400, 0x11000400}, | ||
| 1089 | {0x0000a518, 0x1d004e20, 0x1d004e20, 0x15000402, 0x15000402}, | ||
| 1090 | {0x0000a51c, 0x21005420, 0x21005420, 0x19000404, 0x19000404}, | ||
| 1091 | {0x0000a520, 0x26005e20, 0x26005e20, 0x1b000603, 0x1b000603}, | ||
| 1092 | {0x0000a524, 0x2b005e40, 0x2b005e40, 0x1f000a02, 0x1f000a02}, | ||
| 1093 | {0x0000a528, 0x2f005e42, 0x2f005e42, 0x23000a04, 0x23000a04}, | ||
| 1094 | {0x0000a52c, 0x33005e44, 0x33005e44, 0x26000a20, 0x26000a20}, | ||
| 1095 | {0x0000a530, 0x38005e65, 0x38005e65, 0x2a000e20, 0x2a000e20}, | ||
| 1096 | {0x0000a534, 0x3c005e69, 0x3c005e69, 0x2e000e22, 0x2e000e22}, | ||
| 1097 | {0x0000a538, 0x40005e6b, 0x40005e6b, 0x31000e24, 0x31000e24}, | ||
| 1098 | {0x0000a53c, 0x44005e6d, 0x44005e6d, 0x34001640, 0x34001640}, | ||
| 1099 | {0x0000a540, 0x49005e72, 0x49005e72, 0x38001660, 0x38001660}, | ||
| 1100 | {0x0000a544, 0x4e005eb2, 0x4e005eb2, 0x3b001861, 0x3b001861}, | ||
| 1101 | {0x0000a548, 0x53005f12, 0x53005f12, 0x3e001a81, 0x3e001a81}, | ||
| 1102 | {0x0000a54c, 0x59025eb2, 0x59025eb2, 0x42001a83, 0x42001a83}, | ||
| 1103 | {0x0000a550, 0x5e025f12, 0x5e025f12, 0x44001c84, 0x44001c84}, | ||
| 1104 | {0x0000a554, 0x61027f12, 0x61027f12, 0x48001ce3, 0x48001ce3}, | ||
| 1105 | {0x0000a558, 0x6702bf12, 0x6702bf12, 0x4c001ce5, 0x4c001ce5}, | ||
| 1106 | {0x0000a55c, 0x6b02bf14, 0x6b02bf14, 0x50001ce9, 0x50001ce9}, | ||
| 1107 | {0x0000a560, 0x6f02bf16, 0x6f02bf16, 0x54001ceb, 0x54001ceb}, | ||
| 1108 | {0x0000a564, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec}, | ||
| 1109 | {0x0000a568, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec}, | ||
| 1110 | {0x0000a56c, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec}, | ||
| 1111 | {0x0000a570, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec}, | ||
| 1112 | {0x0000a574, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec}, | ||
| 1113 | {0x0000a578, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec}, | ||
| 1114 | {0x0000a57c, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec}, | ||
| 1115 | {0x0000a580, 0x00802220, 0x00802220, 0x00800000, 0x00800000}, | ||
| 1116 | {0x0000a584, 0x04802222, 0x04802222, 0x04800002, 0x04800002}, | ||
| 1117 | {0x0000a588, 0x09802421, 0x09802421, 0x08800004, 0x08800004}, | ||
| 1118 | {0x0000a58c, 0x0d802621, 0x0d802621, 0x0b800200, 0x0b800200}, | ||
| 1119 | {0x0000a590, 0x13804620, 0x13804620, 0x0f800202, 0x0f800202}, | ||
| 1120 | {0x0000a594, 0x19804a20, 0x19804a20, 0x11800400, 0x11800400}, | ||
| 1121 | {0x0000a598, 0x1d804e20, 0x1d804e20, 0x15800402, 0x15800402}, | ||
| 1122 | {0x0000a59c, 0x21805420, 0x21805420, 0x19800404, 0x19800404}, | ||
| 1123 | {0x0000a5a0, 0x26805e20, 0x26805e20, 0x1b800603, 0x1b800603}, | ||
| 1124 | {0x0000a5a4, 0x2b805e40, 0x2b805e40, 0x1f800a02, 0x1f800a02}, | ||
| 1125 | {0x0000a5a8, 0x2f805e42, 0x2f805e42, 0x23800a04, 0x23800a04}, | ||
| 1126 | {0x0000a5ac, 0x33805e44, 0x33805e44, 0x26800a20, 0x26800a20}, | ||
| 1127 | {0x0000a5b0, 0x38805e65, 0x38805e65, 0x2a800e20, 0x2a800e20}, | ||
| 1128 | {0x0000a5b4, 0x3c805e69, 0x3c805e69, 0x2e800e22, 0x2e800e22}, | ||
| 1129 | {0x0000a5b8, 0x40805e6b, 0x40805e6b, 0x31800e24, 0x31800e24}, | ||
| 1130 | {0x0000a5bc, 0x44805e6d, 0x44805e6d, 0x34801640, 0x34801640}, | ||
| 1131 | {0x0000a5c0, 0x49805e72, 0x49805e72, 0x38801660, 0x38801660}, | ||
| 1132 | {0x0000a5c4, 0x4e805eb2, 0x4e805eb2, 0x3b801861, 0x3b801861}, | ||
| 1133 | {0x0000a5c8, 0x53805f12, 0x53805f12, 0x3e801a81, 0x3e801a81}, | ||
| 1134 | {0x0000a5cc, 0x59825eb2, 0x59825eb2, 0x42801a83, 0x42801a83}, | ||
| 1135 | {0x0000a5d0, 0x5e825f12, 0x5e825f12, 0x44801c84, 0x44801c84}, | ||
| 1136 | {0x0000a5d4, 0x61827f12, 0x61827f12, 0x48801ce3, 0x48801ce3}, | ||
| 1137 | {0x0000a5d8, 0x6782bf12, 0x6782bf12, 0x4c801ce5, 0x4c801ce5}, | ||
| 1138 | {0x0000a5dc, 0x6b82bf14, 0x6b82bf14, 0x50801ce9, 0x50801ce9}, | ||
| 1139 | {0x0000a5e0, 0x6f82bf16, 0x6f82bf16, 0x54801ceb, 0x54801ceb}, | ||
| 1140 | {0x0000a5e4, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec}, | ||
| 1141 | {0x0000a5e8, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec}, | ||
| 1142 | {0x0000a5ec, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec}, | ||
| 1143 | {0x0000a5f0, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec}, | ||
| 1144 | {0x0000a5f4, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec}, | ||
| 1145 | {0x0000a5f8, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec}, | ||
| 1146 | {0x0000a5fc, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec}, | ||
| 1147 | {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
| 1148 | {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
| 1149 | {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
| 1150 | {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
| 1151 | {0x0000a610, 0x00804000, 0x00804000, 0x00000000, 0x00000000}, | ||
| 1152 | {0x0000a614, 0x00804201, 0x00804201, 0x01404000, 0x01404000}, | ||
| 1153 | {0x0000a618, 0x0280c802, 0x0280c802, 0x01404501, 0x01404501}, | ||
| 1154 | {0x0000a61c, 0x0280ca03, 0x0280ca03, 0x02008501, 0x02008501}, | ||
| 1155 | {0x0000a620, 0x04c15104, 0x04c15104, 0x0280ca03, 0x0280ca03}, | ||
| 1156 | {0x0000a624, 0x04c15305, 0x04c15305, 0x03010c04, 0x03010c04}, | ||
| 1157 | {0x0000a628, 0x04c15305, 0x04c15305, 0x04014c04, 0x04014c04}, | ||
| 1158 | {0x0000a62c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005}, | ||
| 1159 | {0x0000a630, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005}, | ||
| 1160 | {0x0000a634, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005}, | ||
| 1161 | {0x0000a638, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005}, | ||
| 1162 | {0x0000a63c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005}, | ||
| 1163 | {0x0000b2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352}, | ||
| 1164 | {0x0000b2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584}, | ||
| 1165 | {0x0000b2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800}, | ||
| 1166 | {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000}, | ||
| 1167 | {0x0000c2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352}, | ||
| 1168 | {0x0000c2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584}, | ||
| 1169 | {0x0000c2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800}, | ||
| 1170 | {0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000}, | ||
| 1171 | {0x00016044, 0x056db2e4, 0x056db2e4, 0x056db2e4, 0x056db2e4}, | ||
| 1172 | {0x00016048, 0x8e480001, 0x8e480001, 0x8e480001, 0x8e480001}, | ||
| 1173 | {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, | ||
| 1174 | {0x00016444, 0x056db2e4, 0x056db2e4, 0x056db2e4, 0x056db2e4}, | ||
| 1175 | {0x00016448, 0x8e480001, 0x8e480001, 0x8e480001, 0x8e480001}, | ||
| 1176 | {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, | ||
| 1177 | {0x00016844, 0x056db2e4, 0x056db2e4, 0x056db2e4, 0x056db2e4}, | ||
| 1178 | {0x00016848, 0x8e480001, 0x8e480001, 0x8e480001, 0x8e480001}, | ||
| 1179 | {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, | ||
| 1180 | }; | ||
| 1181 | |||
| 1182 | static const u32 ar9580_1p0_soc_preamble[][2] = { | ||
| 1183 | /* Addr allmodes */ | ||
| 1184 | {0x000040a4, 0x00a0c1c9}, | ||
| 1185 | {0x00007008, 0x00000000}, | ||
| 1186 | {0x00007020, 0x00000000}, | ||
| 1187 | {0x00007034, 0x00000002}, | ||
| 1188 | {0x00007038, 0x000004c2}, | ||
| 1189 | {0x00007048, 0x00000008}, | ||
| 1190 | }; | ||
| 1191 | |||
| 1192 | static const u32 ar9580_1p0_rx_gain_table[][2] = { | ||
| 1193 | /* Addr allmodes */ | ||
| 1194 | {0x0000a000, 0x00010000}, | ||
| 1195 | {0x0000a004, 0x00030002}, | ||
| 1196 | {0x0000a008, 0x00050004}, | ||
| 1197 | {0x0000a00c, 0x00810080}, | ||
| 1198 | {0x0000a010, 0x00830082}, | ||
| 1199 | {0x0000a014, 0x01810180}, | ||
| 1200 | {0x0000a018, 0x01830182}, | ||
| 1201 | {0x0000a01c, 0x01850184}, | ||
| 1202 | {0x0000a020, 0x01890188}, | ||
| 1203 | {0x0000a024, 0x018b018a}, | ||
| 1204 | {0x0000a028, 0x018d018c}, | ||
| 1205 | {0x0000a02c, 0x01910190}, | ||
| 1206 | {0x0000a030, 0x01930192}, | ||
| 1207 | {0x0000a034, 0x01950194}, | ||
| 1208 | {0x0000a038, 0x038a0196}, | ||
| 1209 | {0x0000a03c, 0x038c038b}, | ||
| 1210 | {0x0000a040, 0x0390038d}, | ||
| 1211 | {0x0000a044, 0x03920391}, | ||
| 1212 | {0x0000a048, 0x03940393}, | ||
| 1213 | {0x0000a04c, 0x03960395}, | ||
| 1214 | {0x0000a050, 0x00000000}, | ||
| 1215 | {0x0000a054, 0x00000000}, | ||
| 1216 | {0x0000a058, 0x00000000}, | ||
| 1217 | {0x0000a05c, 0x00000000}, | ||
| 1218 | {0x0000a060, 0x00000000}, | ||
| 1219 | {0x0000a064, 0x00000000}, | ||
| 1220 | {0x0000a068, 0x00000000}, | ||
| 1221 | {0x0000a06c, 0x00000000}, | ||
| 1222 | {0x0000a070, 0x00000000}, | ||
| 1223 | {0x0000a074, 0x00000000}, | ||
| 1224 | {0x0000a078, 0x00000000}, | ||
| 1225 | {0x0000a07c, 0x00000000}, | ||
| 1226 | {0x0000a080, 0x22222229}, | ||
| 1227 | {0x0000a084, 0x1d1d1d1d}, | ||
| 1228 | {0x0000a088, 0x1d1d1d1d}, | ||
| 1229 | {0x0000a08c, 0x1d1d1d1d}, | ||
| 1230 | {0x0000a090, 0x171d1d1d}, | ||
| 1231 | {0x0000a094, 0x11111717}, | ||
| 1232 | {0x0000a098, 0x00030311}, | ||
| 1233 | {0x0000a09c, 0x00000000}, | ||
| 1234 | {0x0000a0a0, 0x00000000}, | ||
| 1235 | {0x0000a0a4, 0x00000000}, | ||
| 1236 | {0x0000a0a8, 0x00000000}, | ||
| 1237 | {0x0000a0ac, 0x00000000}, | ||
| 1238 | {0x0000a0b0, 0x00000000}, | ||
| 1239 | {0x0000a0b4, 0x00000000}, | ||
| 1240 | {0x0000a0b8, 0x00000000}, | ||
| 1241 | {0x0000a0bc, 0x00000000}, | ||
| 1242 | {0x0000a0c0, 0x001f0000}, | ||
| 1243 | {0x0000a0c4, 0x01000101}, | ||
| 1244 | {0x0000a0c8, 0x011e011f}, | ||
| 1245 | {0x0000a0cc, 0x011c011d}, | ||
| 1246 | {0x0000a0d0, 0x02030204}, | ||
| 1247 | {0x0000a0d4, 0x02010202}, | ||
| 1248 | {0x0000a0d8, 0x021f0200}, | ||
| 1249 | {0x0000a0dc, 0x0302021e}, | ||
| 1250 | {0x0000a0e0, 0x03000301}, | ||
| 1251 | {0x0000a0e4, 0x031e031f}, | ||
| 1252 | {0x0000a0e8, 0x0402031d}, | ||
| 1253 | {0x0000a0ec, 0x04000401}, | ||
| 1254 | {0x0000a0f0, 0x041e041f}, | ||
| 1255 | {0x0000a0f4, 0x0502041d}, | ||
| 1256 | {0x0000a0f8, 0x05000501}, | ||
| 1257 | {0x0000a0fc, 0x051e051f}, | ||
| 1258 | {0x0000a100, 0x06010602}, | ||
| 1259 | {0x0000a104, 0x061f0600}, | ||
| 1260 | {0x0000a108, 0x061d061e}, | ||
| 1261 | {0x0000a10c, 0x07020703}, | ||
| 1262 | {0x0000a110, 0x07000701}, | ||
| 1263 | {0x0000a114, 0x00000000}, | ||
| 1264 | {0x0000a118, 0x00000000}, | ||
| 1265 | {0x0000a11c, 0x00000000}, | ||
| 1266 | {0x0000a120, 0x00000000}, | ||
| 1267 | {0x0000a124, 0x00000000}, | ||
| 1268 | {0x0000a128, 0x00000000}, | ||
| 1269 | {0x0000a12c, 0x00000000}, | ||
| 1270 | {0x0000a130, 0x00000000}, | ||
| 1271 | {0x0000a134, 0x00000000}, | ||
| 1272 | {0x0000a138, 0x00000000}, | ||
| 1273 | {0x0000a13c, 0x00000000}, | ||
| 1274 | {0x0000a140, 0x001f0000}, | ||
| 1275 | {0x0000a144, 0x01000101}, | ||
| 1276 | {0x0000a148, 0x011e011f}, | ||
| 1277 | {0x0000a14c, 0x011c011d}, | ||
| 1278 | {0x0000a150, 0x02030204}, | ||
| 1279 | {0x0000a154, 0x02010202}, | ||
| 1280 | {0x0000a158, 0x021f0200}, | ||
| 1281 | {0x0000a15c, 0x0302021e}, | ||
| 1282 | {0x0000a160, 0x03000301}, | ||
| 1283 | {0x0000a164, 0x031e031f}, | ||
| 1284 | {0x0000a168, 0x0402031d}, | ||
| 1285 | {0x0000a16c, 0x04000401}, | ||
| 1286 | {0x0000a170, 0x041e041f}, | ||
| 1287 | {0x0000a174, 0x0502041d}, | ||
| 1288 | {0x0000a178, 0x05000501}, | ||
| 1289 | {0x0000a17c, 0x051e051f}, | ||
| 1290 | {0x0000a180, 0x06010602}, | ||
| 1291 | {0x0000a184, 0x061f0600}, | ||
| 1292 | {0x0000a188, 0x061d061e}, | ||
| 1293 | {0x0000a18c, 0x07020703}, | ||
| 1294 | {0x0000a190, 0x07000701}, | ||
| 1295 | {0x0000a194, 0x00000000}, | ||
| 1296 | {0x0000a198, 0x00000000}, | ||
| 1297 | {0x0000a19c, 0x00000000}, | ||
| 1298 | {0x0000a1a0, 0x00000000}, | ||
| 1299 | {0x0000a1a4, 0x00000000}, | ||
| 1300 | {0x0000a1a8, 0x00000000}, | ||
| 1301 | {0x0000a1ac, 0x00000000}, | ||
| 1302 | {0x0000a1b0, 0x00000000}, | ||
| 1303 | {0x0000a1b4, 0x00000000}, | ||
| 1304 | {0x0000a1b8, 0x00000000}, | ||
| 1305 | {0x0000a1bc, 0x00000000}, | ||
| 1306 | {0x0000a1c0, 0x00000000}, | ||
| 1307 | {0x0000a1c4, 0x00000000}, | ||
| 1308 | {0x0000a1c8, 0x00000000}, | ||
| 1309 | {0x0000a1cc, 0x00000000}, | ||
| 1310 | {0x0000a1d0, 0x00000000}, | ||
| 1311 | {0x0000a1d4, 0x00000000}, | ||
| 1312 | {0x0000a1d8, 0x00000000}, | ||
| 1313 | {0x0000a1dc, 0x00000000}, | ||
| 1314 | {0x0000a1e0, 0x00000000}, | ||
| 1315 | {0x0000a1e4, 0x00000000}, | ||
| 1316 | {0x0000a1e8, 0x00000000}, | ||
| 1317 | {0x0000a1ec, 0x00000000}, | ||
| 1318 | {0x0000a1f0, 0x00000396}, | ||
| 1319 | {0x0000a1f4, 0x00000396}, | ||
| 1320 | {0x0000a1f8, 0x00000396}, | ||
| 1321 | {0x0000a1fc, 0x00000196}, | ||
| 1322 | {0x0000b000, 0x00010000}, | ||
| 1323 | {0x0000b004, 0x00030002}, | ||
| 1324 | {0x0000b008, 0x00050004}, | ||
| 1325 | {0x0000b00c, 0x00810080}, | ||
| 1326 | {0x0000b010, 0x00830082}, | ||
| 1327 | {0x0000b014, 0x01810180}, | ||
| 1328 | {0x0000b018, 0x01830182}, | ||
| 1329 | {0x0000b01c, 0x01850184}, | ||
| 1330 | {0x0000b020, 0x02810280}, | ||
| 1331 | {0x0000b024, 0x02830282}, | ||
| 1332 | {0x0000b028, 0x02850284}, | ||
| 1333 | {0x0000b02c, 0x02890288}, | ||
| 1334 | {0x0000b030, 0x028b028a}, | ||
| 1335 | {0x0000b034, 0x0388028c}, | ||
| 1336 | {0x0000b038, 0x038a0389}, | ||
| 1337 | {0x0000b03c, 0x038c038b}, | ||
| 1338 | {0x0000b040, 0x0390038d}, | ||
| 1339 | {0x0000b044, 0x03920391}, | ||
| 1340 | {0x0000b048, 0x03940393}, | ||
| 1341 | {0x0000b04c, 0x03960395}, | ||
| 1342 | {0x0000b050, 0x00000000}, | ||
| 1343 | {0x0000b054, 0x00000000}, | ||
| 1344 | {0x0000b058, 0x00000000}, | ||
| 1345 | {0x0000b05c, 0x00000000}, | ||
| 1346 | {0x0000b060, 0x00000000}, | ||
| 1347 | {0x0000b064, 0x00000000}, | ||
| 1348 | {0x0000b068, 0x00000000}, | ||
| 1349 | {0x0000b06c, 0x00000000}, | ||
| 1350 | {0x0000b070, 0x00000000}, | ||
| 1351 | {0x0000b074, 0x00000000}, | ||
| 1352 | {0x0000b078, 0x00000000}, | ||
| 1353 | {0x0000b07c, 0x00000000}, | ||
| 1354 | {0x0000b080, 0x2a2d2f32}, | ||
| 1355 | {0x0000b084, 0x21232328}, | ||
| 1356 | {0x0000b088, 0x19191c1e}, | ||
| 1357 | {0x0000b08c, 0x12141417}, | ||
| 1358 | {0x0000b090, 0x07070e0e}, | ||
| 1359 | {0x0000b094, 0x03030305}, | ||
| 1360 | {0x0000b098, 0x00000003}, | ||
| 1361 | {0x0000b09c, 0x00000000}, | ||
| 1362 | {0x0000b0a0, 0x00000000}, | ||
| 1363 | {0x0000b0a4, 0x00000000}, | ||
| 1364 | {0x0000b0a8, 0x00000000}, | ||
| 1365 | {0x0000b0ac, 0x00000000}, | ||
| 1366 | {0x0000b0b0, 0x00000000}, | ||
| 1367 | {0x0000b0b4, 0x00000000}, | ||
| 1368 | {0x0000b0b8, 0x00000000}, | ||
| 1369 | {0x0000b0bc, 0x00000000}, | ||
| 1370 | {0x0000b0c0, 0x003f0020}, | ||
| 1371 | {0x0000b0c4, 0x00400041}, | ||
| 1372 | {0x0000b0c8, 0x0140005f}, | ||
| 1373 | {0x0000b0cc, 0x0160015f}, | ||
| 1374 | {0x0000b0d0, 0x017e017f}, | ||
| 1375 | {0x0000b0d4, 0x02410242}, | ||
| 1376 | {0x0000b0d8, 0x025f0240}, | ||
| 1377 | {0x0000b0dc, 0x027f0260}, | ||
| 1378 | {0x0000b0e0, 0x0341027e}, | ||
| 1379 | {0x0000b0e4, 0x035f0340}, | ||
| 1380 | {0x0000b0e8, 0x037f0360}, | ||
| 1381 | {0x0000b0ec, 0x04400441}, | ||
| 1382 | {0x0000b0f0, 0x0460045f}, | ||
| 1383 | {0x0000b0f4, 0x0541047f}, | ||
| 1384 | {0x0000b0f8, 0x055f0540}, | ||
| 1385 | {0x0000b0fc, 0x057f0560}, | ||
| 1386 | {0x0000b100, 0x06400641}, | ||
| 1387 | {0x0000b104, 0x0660065f}, | ||
| 1388 | {0x0000b108, 0x067e067f}, | ||
| 1389 | {0x0000b10c, 0x07410742}, | ||
| 1390 | {0x0000b110, 0x075f0740}, | ||
| 1391 | {0x0000b114, 0x077f0760}, | ||
| 1392 | {0x0000b118, 0x07800781}, | ||
| 1393 | {0x0000b11c, 0x07a0079f}, | ||
| 1394 | {0x0000b120, 0x07c107bf}, | ||
| 1395 | {0x0000b124, 0x000007c0}, | ||
| 1396 | {0x0000b128, 0x00000000}, | ||
| 1397 | {0x0000b12c, 0x00000000}, | ||
| 1398 | {0x0000b130, 0x00000000}, | ||
| 1399 | {0x0000b134, 0x00000000}, | ||
| 1400 | {0x0000b138, 0x00000000}, | ||
| 1401 | {0x0000b13c, 0x00000000}, | ||
| 1402 | {0x0000b140, 0x003f0020}, | ||
| 1403 | {0x0000b144, 0x00400041}, | ||
| 1404 | {0x0000b148, 0x0140005f}, | ||
| 1405 | {0x0000b14c, 0x0160015f}, | ||
| 1406 | {0x0000b150, 0x017e017f}, | ||
| 1407 | {0x0000b154, 0x02410242}, | ||
| 1408 | {0x0000b158, 0x025f0240}, | ||
| 1409 | {0x0000b15c, 0x027f0260}, | ||
| 1410 | {0x0000b160, 0x0341027e}, | ||
| 1411 | {0x0000b164, 0x035f0340}, | ||
| 1412 | {0x0000b168, 0x037f0360}, | ||
| 1413 | {0x0000b16c, 0x04400441}, | ||
| 1414 | {0x0000b170, 0x0460045f}, | ||
| 1415 | {0x0000b174, 0x0541047f}, | ||
| 1416 | {0x0000b178, 0x055f0540}, | ||
| 1417 | {0x0000b17c, 0x057f0560}, | ||
| 1418 | {0x0000b180, 0x06400641}, | ||
| 1419 | {0x0000b184, 0x0660065f}, | ||
| 1420 | {0x0000b188, 0x067e067f}, | ||
| 1421 | {0x0000b18c, 0x07410742}, | ||
| 1422 | {0x0000b190, 0x075f0740}, | ||
| 1423 | {0x0000b194, 0x077f0760}, | ||
| 1424 | {0x0000b198, 0x07800781}, | ||
| 1425 | {0x0000b19c, 0x07a0079f}, | ||
| 1426 | {0x0000b1a0, 0x07c107bf}, | ||
| 1427 | {0x0000b1a4, 0x000007c0}, | ||
| 1428 | {0x0000b1a8, 0x00000000}, | ||
| 1429 | {0x0000b1ac, 0x00000000}, | ||
| 1430 | {0x0000b1b0, 0x00000000}, | ||
| 1431 | {0x0000b1b4, 0x00000000}, | ||
| 1432 | {0x0000b1b8, 0x00000000}, | ||
| 1433 | {0x0000b1bc, 0x00000000}, | ||
| 1434 | {0x0000b1c0, 0x00000000}, | ||
| 1435 | {0x0000b1c4, 0x00000000}, | ||
| 1436 | {0x0000b1c8, 0x00000000}, | ||
| 1437 | {0x0000b1cc, 0x00000000}, | ||
| 1438 | {0x0000b1d0, 0x00000000}, | ||
| 1439 | {0x0000b1d4, 0x00000000}, | ||
| 1440 | {0x0000b1d8, 0x00000000}, | ||
| 1441 | {0x0000b1dc, 0x00000000}, | ||
| 1442 | {0x0000b1e0, 0x00000000}, | ||
| 1443 | {0x0000b1e4, 0x00000000}, | ||
| 1444 | {0x0000b1e8, 0x00000000}, | ||
| 1445 | {0x0000b1ec, 0x00000000}, | ||
| 1446 | {0x0000b1f0, 0x00000396}, | ||
| 1447 | {0x0000b1f4, 0x00000396}, | ||
| 1448 | {0x0000b1f8, 0x00000396}, | ||
| 1449 | {0x0000b1fc, 0x00000196}, | ||
| 1450 | }; | ||
| 1451 | |||
| 1452 | static const u32 ar9580_1p0_radio_core[][2] = { | ||
| 1453 | /* Addr allmodes */ | ||
| 1454 | {0x00016000, 0x36db6db6}, | ||
| 1455 | {0x00016004, 0x6db6db40}, | ||
| 1456 | {0x00016008, 0x73f00000}, | ||
| 1457 | {0x0001600c, 0x00000000}, | ||
| 1458 | {0x00016040, 0x7f80fff8}, | ||
| 1459 | {0x0001604c, 0x76d005b5}, | ||
| 1460 | {0x00016050, 0x556cf031}, | ||
| 1461 | {0x00016054, 0x13449440}, | ||
| 1462 | {0x00016058, 0x0c51c92c}, | ||
| 1463 | {0x0001605c, 0x3db7fffc}, | ||
| 1464 | {0x00016060, 0xfffffffc}, | ||
| 1465 | {0x00016064, 0x000f0278}, | ||
| 1466 | {0x0001606c, 0x6db60000}, | ||
| 1467 | {0x00016080, 0x00000000}, | ||
| 1468 | {0x00016084, 0x0e48048c}, | ||
| 1469 | {0x00016088, 0x54214514}, | ||
| 1470 | {0x0001608c, 0x119f481e}, | ||
| 1471 | {0x00016090, 0x24926490}, | ||
| 1472 | {0x00016098, 0xd2888888}, | ||
| 1473 | {0x000160a0, 0x0a108ffe}, | ||
| 1474 | {0x000160a4, 0x812fc370}, | ||
| 1475 | {0x000160a8, 0x423c8000}, | ||
| 1476 | {0x000160b4, 0x92480080}, | ||
| 1477 | {0x000160c0, 0x00adb6d0}, | ||
| 1478 | {0x000160c4, 0x6db6db60}, | ||
| 1479 | {0x000160c8, 0x6db6db6c}, | ||
| 1480 | {0x000160cc, 0x01e6c000}, | ||
| 1481 | {0x00016100, 0x3fffbe01}, | ||
| 1482 | {0x00016104, 0xfff80000}, | ||
| 1483 | {0x00016108, 0x00080010}, | ||
| 1484 | {0x00016144, 0x02084080}, | ||
| 1485 | {0x00016148, 0x00000000}, | ||
| 1486 | {0x00016280, 0x058a0001}, | ||
| 1487 | {0x00016284, 0x3d840208}, | ||
| 1488 | {0x00016288, 0x05a20408}, | ||
| 1489 | {0x0001628c, 0x00038c07}, | ||
| 1490 | {0x00016290, 0x00000004}, | ||
| 1491 | {0x00016294, 0x458aa14f}, | ||
| 1492 | {0x00016380, 0x00000000}, | ||
| 1493 | {0x00016384, 0x00000000}, | ||
| 1494 | {0x00016388, 0x00800700}, | ||
| 1495 | {0x0001638c, 0x00800700}, | ||
| 1496 | {0x00016390, 0x00800700}, | ||
| 1497 | {0x00016394, 0x00000000}, | ||
| 1498 | {0x00016398, 0x00000000}, | ||
| 1499 | {0x0001639c, 0x00000000}, | ||
| 1500 | {0x000163a0, 0x00000001}, | ||
| 1501 | {0x000163a4, 0x00000001}, | ||
| 1502 | {0x000163a8, 0x00000000}, | ||
| 1503 | {0x000163ac, 0x00000000}, | ||
| 1504 | {0x000163b0, 0x00000000}, | ||
| 1505 | {0x000163b4, 0x00000000}, | ||
| 1506 | {0x000163b8, 0x00000000}, | ||
| 1507 | {0x000163bc, 0x00000000}, | ||
| 1508 | {0x000163c0, 0x000000a0}, | ||
| 1509 | {0x000163c4, 0x000c0000}, | ||
| 1510 | {0x000163c8, 0x14021402}, | ||
| 1511 | {0x000163cc, 0x00001402}, | ||
| 1512 | {0x000163d0, 0x00000000}, | ||
| 1513 | {0x000163d4, 0x00000000}, | ||
| 1514 | {0x00016400, 0x36db6db6}, | ||
| 1515 | {0x00016404, 0x6db6db40}, | ||
| 1516 | {0x00016408, 0x73f00000}, | ||
| 1517 | {0x0001640c, 0x00000000}, | ||
| 1518 | {0x00016440, 0x7f80fff8}, | ||
| 1519 | {0x0001644c, 0x76d005b5}, | ||
| 1520 | {0x00016450, 0x556cf031}, | ||
| 1521 | {0x00016454, 0x13449440}, | ||
| 1522 | {0x00016458, 0x0c51c92c}, | ||
| 1523 | {0x0001645c, 0x3db7fffc}, | ||
| 1524 | {0x00016460, 0xfffffffc}, | ||
| 1525 | {0x00016464, 0x000f0278}, | ||
| 1526 | {0x0001646c, 0x6db60000}, | ||
| 1527 | {0x00016500, 0x3fffbe01}, | ||
| 1528 | {0x00016504, 0xfff80000}, | ||
| 1529 | {0x00016508, 0x00080010}, | ||
| 1530 | {0x00016544, 0x02084080}, | ||
| 1531 | {0x00016548, 0x00000000}, | ||
| 1532 | {0x00016780, 0x00000000}, | ||
| 1533 | {0x00016784, 0x00000000}, | ||
| 1534 | {0x00016788, 0x00800700}, | ||
| 1535 | {0x0001678c, 0x00800700}, | ||
| 1536 | {0x00016790, 0x00800700}, | ||
| 1537 | {0x00016794, 0x00000000}, | ||
| 1538 | {0x00016798, 0x00000000}, | ||
| 1539 | {0x0001679c, 0x00000000}, | ||
| 1540 | {0x000167a0, 0x00000001}, | ||
| 1541 | {0x000167a4, 0x00000001}, | ||
| 1542 | {0x000167a8, 0x00000000}, | ||
| 1543 | {0x000167ac, 0x00000000}, | ||
| 1544 | {0x000167b0, 0x00000000}, | ||
| 1545 | {0x000167b4, 0x00000000}, | ||
| 1546 | {0x000167b8, 0x00000000}, | ||
| 1547 | {0x000167bc, 0x00000000}, | ||
| 1548 | {0x000167c0, 0x000000a0}, | ||
| 1549 | {0x000167c4, 0x000c0000}, | ||
| 1550 | {0x000167c8, 0x14021402}, | ||
| 1551 | {0x000167cc, 0x00001402}, | ||
| 1552 | {0x000167d0, 0x00000000}, | ||
| 1553 | {0x000167d4, 0x00000000}, | ||
| 1554 | {0x00016800, 0x36db6db6}, | ||
| 1555 | {0x00016804, 0x6db6db40}, | ||
| 1556 | {0x00016808, 0x73f00000}, | ||
| 1557 | {0x0001680c, 0x00000000}, | ||
| 1558 | {0x00016840, 0x7f80fff8}, | ||
| 1559 | {0x0001684c, 0x76d005b5}, | ||
| 1560 | {0x00016850, 0x556cf031}, | ||
| 1561 | {0x00016854, 0x13449440}, | ||
| 1562 | {0x00016858, 0x0c51c92c}, | ||
| 1563 | {0x0001685c, 0x3db7fffc}, | ||
| 1564 | {0x00016860, 0xfffffffc}, | ||
| 1565 | {0x00016864, 0x000f0278}, | ||
| 1566 | {0x0001686c, 0x6db60000}, | ||
| 1567 | {0x00016900, 0x3fffbe01}, | ||
| 1568 | {0x00016904, 0xfff80000}, | ||
| 1569 | {0x00016908, 0x00080010}, | ||
| 1570 | {0x00016944, 0x02084080}, | ||
| 1571 | {0x00016948, 0x00000000}, | ||
| 1572 | {0x00016b80, 0x00000000}, | ||
| 1573 | {0x00016b84, 0x00000000}, | ||
| 1574 | {0x00016b88, 0x00800700}, | ||
| 1575 | {0x00016b8c, 0x00800700}, | ||
| 1576 | {0x00016b90, 0x00800700}, | ||
| 1577 | {0x00016b94, 0x00000000}, | ||
| 1578 | {0x00016b98, 0x00000000}, | ||
| 1579 | {0x00016b9c, 0x00000000}, | ||
| 1580 | {0x00016ba0, 0x00000001}, | ||
| 1581 | {0x00016ba4, 0x00000001}, | ||
| 1582 | {0x00016ba8, 0x00000000}, | ||
| 1583 | {0x00016bac, 0x00000000}, | ||
| 1584 | {0x00016bb0, 0x00000000}, | ||
| 1585 | {0x00016bb4, 0x00000000}, | ||
| 1586 | {0x00016bb8, 0x00000000}, | ||
| 1587 | {0x00016bbc, 0x00000000}, | ||
| 1588 | {0x00016bc0, 0x000000a0}, | ||
| 1589 | {0x00016bc4, 0x000c0000}, | ||
| 1590 | {0x00016bc8, 0x14021402}, | ||
| 1591 | {0x00016bcc, 0x00001402}, | ||
| 1592 | {0x00016bd0, 0x00000000}, | ||
| 1593 | {0x00016bd4, 0x00000000}, | ||
| 1594 | }; | ||
| 1595 | |||
| 1596 | static const u32 ar9580_1p0_baseband_postamble[][5] = { | ||
| 1597 | /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ | ||
| 1598 | {0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8011, 0xd00a8011}, | ||
| 1599 | {0x00009820, 0x206a022e, 0x206a022e, 0x206a012e, 0x206a012e}, | ||
| 1600 | {0x00009824, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0}, | ||
| 1601 | {0x00009828, 0x06903081, 0x06903081, 0x06903881, 0x06903881}, | ||
| 1602 | {0x0000982c, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4}, | ||
| 1603 | {0x00009830, 0x0000059c, 0x0000059c, 0x0000119c, 0x0000119c}, | ||
| 1604 | {0x00009c00, 0x000000c4, 0x000000c4, 0x000000c4, 0x000000c4}, | ||
| 1605 | {0x00009e00, 0x0372111a, 0x0372111a, 0x037216a0, 0x037216a0}, | ||
| 1606 | {0x00009e04, 0x001c2020, 0x001c2020, 0x001c2020, 0x001c2020}, | ||
| 1607 | {0x00009e0c, 0x6c4000e2, 0x6d4000e2, 0x6d4000e2, 0x6c4000e2}, | ||
| 1608 | {0x00009e10, 0x7ec88d2e, 0x7ec88d2e, 0x7ec84d2e, 0x7ec84d2e}, | ||
| 1609 | {0x00009e14, 0x37b95d5e, 0x37b9605e, 0x3379605e, 0x33795d5e}, | ||
| 1610 | {0x00009e18, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
| 1611 | {0x00009e1c, 0x0001cf9c, 0x0001cf9c, 0x00021f9c, 0x00021f9c}, | ||
| 1612 | {0x00009e20, 0x000003b5, 0x000003b5, 0x000003ce, 0x000003ce}, | ||
| 1613 | {0x00009e2c, 0x0000001c, 0x0000001c, 0x00000021, 0x00000021}, | ||
| 1614 | {0x00009e3c, 0xcf946220, 0xcf946220, 0xcf946222, 0xcf946222}, | ||
| 1615 | {0x00009e44, 0x02321e27, 0x02321e27, 0x02291e27, 0x02291e27}, | ||
| 1616 | {0x00009e48, 0x5030201a, 0x5030201a, 0x50302012, 0x50302012}, | ||
| 1617 | {0x00009fc8, 0x0003f000, 0x0003f000, 0x0001a000, 0x0001a000}, | ||
| 1618 | {0x0000a204, 0x000036c0, 0x000036c4, 0x000036c4, 0x000036c0}, | ||
| 1619 | {0x0000a208, 0x00000104, 0x00000104, 0x00000004, 0x00000004}, | ||
| 1620 | {0x0000a22c, 0x07e26a2f, 0x07e26a2f, 0x01026a2f, 0x01026a2f}, | ||
| 1621 | {0x0000a230, 0x0000000a, 0x00000014, 0x00000016, 0x0000000b}, | ||
| 1622 | {0x0000a234, 0x00000fff, 0x10000fff, 0x10000fff, 0x00000fff}, | ||
| 1623 | {0x0000a238, 0xffb01018, 0xffb01018, 0xffb01018, 0xffb01018}, | ||
| 1624 | {0x0000a250, 0x00000000, 0x00000000, 0x00000210, 0x00000108}, | ||
| 1625 | {0x0000a254, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898}, | ||
| 1626 | {0x0000a258, 0x02020002, 0x02020002, 0x02020002, 0x02020002}, | ||
| 1627 | {0x0000a25c, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e}, | ||
| 1628 | {0x0000a260, 0x0a021501, 0x0a021501, 0x3a021501, 0x3a021501}, | ||
| 1629 | {0x0000a264, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e}, | ||
| 1630 | {0x0000a280, 0x00000007, 0x00000007, 0x0000000b, 0x0000000b}, | ||
| 1631 | {0x0000a284, 0x00000000, 0x00000000, 0x00000150, 0x00000150}, | ||
| 1632 | {0x0000a288, 0x00000110, 0x00000110, 0x00000110, 0x00000110}, | ||
| 1633 | {0x0000a28c, 0x00022222, 0x00022222, 0x00022222, 0x00022222}, | ||
| 1634 | {0x0000a2c4, 0x00158d18, 0x00158d18, 0x00158d18, 0x00158d18}, | ||
| 1635 | {0x0000a2d0, 0x00041981, 0x00041981, 0x00041981, 0x00041982}, | ||
| 1636 | {0x0000a2d8, 0x7999a83b, 0x7999a83b, 0x7999a83b, 0x7999a83b}, | ||
| 1637 | {0x0000a358, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
| 1638 | {0x0000a830, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c}, | ||
| 1639 | {0x0000ae04, 0x001c0000, 0x001c0000, 0x001c0000, 0x001c0000}, | ||
| 1640 | {0x0000ae18, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
| 1641 | {0x0000ae1c, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c}, | ||
| 1642 | {0x0000ae20, 0x000001b5, 0x000001b5, 0x000001ce, 0x000001ce}, | ||
| 1643 | {0x0000b284, 0x00000000, 0x00000000, 0x00000150, 0x00000150}, | ||
| 1644 | {0x0000b830, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c}, | ||
| 1645 | {0x0000be04, 0x001c0000, 0x001c0000, 0x001c0000, 0x001c0000}, | ||
| 1646 | {0x0000be18, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
| 1647 | {0x0000be1c, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c}, | ||
| 1648 | {0x0000be20, 0x000001b5, 0x000001b5, 0x000001ce, 0x000001ce}, | ||
| 1649 | {0x0000c284, 0x00000000, 0x00000000, 0x00000150, 0x00000150}, | ||
| 1650 | }; | ||
| 1651 | |||
| 1652 | static const u32 ar9580_1p0_pcie_phy_clkreq_enable_L1[][2] = { | ||
| 1653 | /* Addr allmodes */ | ||
| 1654 | {0x00004040, 0x0835365e}, | ||
| 1655 | {0x00004040, 0x0008003b}, | ||
| 1656 | {0x00004044, 0x00000000}, | ||
| 1657 | }; | ||
| 1658 | |||
| 1659 | static const u32 ar9580_1p0_pcie_phy_clkreq_disable_L1[][2] = { | ||
| 1660 | /* Addr allmodes */ | ||
| 1661 | {0x00004040, 0x0831365e}, | ||
| 1662 | {0x00004040, 0x0008003b}, | ||
| 1663 | {0x00004044, 0x00000000}, | ||
| 1664 | }; | ||
| 1665 | |||
| 1666 | static const u32 ar9580_1p0_pcie_phy_pll_on_clkreq[][2] = { | ||
| 1667 | /* Addr allmodes */ | ||
| 1668 | {0x00004040, 0x0831265e}, | ||
| 1669 | {0x00004040, 0x0008003b}, | ||
| 1670 | {0x00004044, 0x00000000}, | ||
| 1671 | }; | ||
| 1672 | |||
| 1673 | #endif /* INITVALS_9580_1P0_H */ | ||
diff --git a/drivers/net/wireless/ath/ath9k/ath9k.h b/drivers/net/wireless/ath/ath9k/ath9k.h index c03949eb37c8..3a893e19d6c3 100644 --- a/drivers/net/wireless/ath/ath9k/ath9k.h +++ b/drivers/net/wireless/ath/ath9k/ath9k.h | |||
| @@ -558,8 +558,7 @@ struct ath_ant_comb { | |||
| 558 | #define SC_OP_BT_PRIORITY_DETECTED BIT(12) | 558 | #define SC_OP_BT_PRIORITY_DETECTED BIT(12) |
| 559 | #define SC_OP_BT_SCAN BIT(13) | 559 | #define SC_OP_BT_SCAN BIT(13) |
| 560 | #define SC_OP_ANI_RUN BIT(14) | 560 | #define SC_OP_ANI_RUN BIT(14) |
| 561 | #define SC_OP_ENABLE_APM BIT(15) | 561 | #define SC_OP_PRIM_STA_VIF BIT(15) |
| 562 | #define SC_OP_PRIM_STA_VIF BIT(16) | ||
| 563 | 562 | ||
| 564 | /* Powersave flags */ | 563 | /* Powersave flags */ |
| 565 | #define PS_WAIT_FOR_BEACON BIT(0) | 564 | #define PS_WAIT_FOR_BEACON BIT(0) |
| @@ -664,7 +663,6 @@ extern int led_blink; | |||
| 664 | extern bool is_ath9k_unloaded; | 663 | extern bool is_ath9k_unloaded; |
| 665 | 664 | ||
| 666 | irqreturn_t ath_isr(int irq, void *dev); | 665 | irqreturn_t ath_isr(int irq, void *dev); |
| 667 | void ath9k_init_crypto(struct ath_softc *sc); | ||
| 668 | int ath9k_init_device(u16 devid, struct ath_softc *sc, | 666 | int ath9k_init_device(u16 devid, struct ath_softc *sc, |
| 669 | const struct ath_bus_ops *bus_ops); | 667 | const struct ath_bus_ops *bus_ops); |
| 670 | void ath9k_deinit_device(struct ath_softc *sc); | 668 | void ath9k_deinit_device(struct ath_softc *sc); |
diff --git a/drivers/net/wireless/ath/ath9k/calib.c b/drivers/net/wireless/ath/ath9k/calib.c index ac2da3cce788..ebaf304f464b 100644 --- a/drivers/net/wireless/ath/ath9k/calib.c +++ b/drivers/net/wireless/ath/ath9k/calib.c | |||
| @@ -82,7 +82,6 @@ static void ath9k_hw_update_nfcal_hist_buffer(struct ath_hw *ah, | |||
| 82 | int16_t *nfarray) | 82 | int16_t *nfarray) |
| 83 | { | 83 | { |
| 84 | struct ath_common *common = ath9k_hw_common(ah); | 84 | struct ath_common *common = ath9k_hw_common(ah); |
| 85 | struct ieee80211_conf *conf = &common->hw->conf; | ||
| 86 | struct ath_nf_limits *limit; | 85 | struct ath_nf_limits *limit; |
| 87 | struct ath9k_nfcal_hist *h; | 86 | struct ath9k_nfcal_hist *h; |
| 88 | bool high_nf_mid = false; | 87 | bool high_nf_mid = false; |
| @@ -94,7 +93,7 @@ static void ath9k_hw_update_nfcal_hist_buffer(struct ath_hw *ah, | |||
| 94 | 93 | ||
| 95 | for (i = 0; i < NUM_NF_READINGS; i++) { | 94 | for (i = 0; i < NUM_NF_READINGS; i++) { |
| 96 | if (!(chainmask & (1 << i)) || | 95 | if (!(chainmask & (1 << i)) || |
| 97 | ((i >= AR5416_MAX_CHAINS) && !conf_is_ht40(conf))) | 96 | ((i >= AR5416_MAX_CHAINS) && !IS_CHAN_HT40(ah->curchan))) |
| 98 | continue; | 97 | continue; |
| 99 | 98 | ||
| 100 | h[i].nfCalBuffer[h[i].currIndex] = nfarray[i]; | 99 | h[i].nfCalBuffer[h[i].currIndex] = nfarray[i]; |
diff --git a/drivers/net/wireless/ath/ath9k/common.c b/drivers/net/wireless/ath/ath9k/common.c index fa6bd2d189e5..dc705a224952 100644 --- a/drivers/net/wireless/ath/ath9k/common.c +++ b/drivers/net/wireless/ath/ath9k/common.c | |||
| @@ -169,6 +169,32 @@ void ath9k_cmn_update_txpow(struct ath_hw *ah, u16 cur_txpow, | |||
| 169 | } | 169 | } |
| 170 | EXPORT_SYMBOL(ath9k_cmn_update_txpow); | 170 | EXPORT_SYMBOL(ath9k_cmn_update_txpow); |
| 171 | 171 | ||
| 172 | void ath9k_cmn_init_crypto(struct ath_hw *ah) | ||
| 173 | { | ||
| 174 | struct ath_common *common = ath9k_hw_common(ah); | ||
| 175 | int i = 0; | ||
| 176 | |||
| 177 | /* Get the hardware key cache size. */ | ||
| 178 | common->keymax = AR_KEYTABLE_SIZE; | ||
| 179 | |||
| 180 | /* | ||
| 181 | * Check whether the separate key cache entries | ||
| 182 | * are required to handle both tx+rx MIC keys. | ||
| 183 | * With split mic keys the number of stations is limited | ||
| 184 | * to 27 otherwise 59. | ||
| 185 | */ | ||
| 186 | if (ah->misc_mode & AR_PCU_MIC_NEW_LOC_ENA) | ||
| 187 | common->crypt_caps |= ATH_CRYPT_CAP_MIC_COMBINED; | ||
| 188 | |||
| 189 | /* | ||
| 190 | * Reset the key cache since some parts do not | ||
| 191 | * reset the contents on initial power up. | ||
| 192 | */ | ||
| 193 | for (i = 0; i < common->keymax; i++) | ||
| 194 | ath_hw_keyreset(common, (u16) i); | ||
| 195 | } | ||
| 196 | EXPORT_SYMBOL(ath9k_cmn_init_crypto); | ||
| 197 | |||
| 172 | static int __init ath9k_cmn_init(void) | 198 | static int __init ath9k_cmn_init(void) |
| 173 | { | 199 | { |
| 174 | return 0; | 200 | return 0; |
diff --git a/drivers/net/wireless/ath/ath9k/common.h b/drivers/net/wireless/ath/ath9k/common.h index 77ec288b5a70..ad14fecc76c6 100644 --- a/drivers/net/wireless/ath/ath9k/common.h +++ b/drivers/net/wireless/ath/ath9k/common.h | |||
| @@ -62,3 +62,4 @@ void ath9k_cmn_btcoex_bt_stomp(struct ath_common *common, | |||
| 62 | enum ath_stomp_type stomp_type); | 62 | enum ath_stomp_type stomp_type); |
| 63 | void ath9k_cmn_update_txpow(struct ath_hw *ah, u16 cur_txpow, | 63 | void ath9k_cmn_update_txpow(struct ath_hw *ah, u16 cur_txpow, |
| 64 | u16 new_txpow, u16 *txpower); | 64 | u16 new_txpow, u16 *txpower); |
| 65 | void ath9k_cmn_init_crypto(struct ath_hw *ah); | ||
diff --git a/drivers/net/wireless/ath/ath9k/debug.c b/drivers/net/wireless/ath/ath9k/debug.c index 9bec3b89fb68..da45f325be7d 100644 --- a/drivers/net/wireless/ath/ath9k/debug.c +++ b/drivers/net/wireless/ath/ath9k/debug.c | |||
| @@ -1163,6 +1163,59 @@ static const struct file_operations fops_regdump = { | |||
| 1163 | .llseek = default_llseek,/* read accesses f_pos */ | 1163 | .llseek = default_llseek,/* read accesses f_pos */ |
| 1164 | }; | 1164 | }; |
| 1165 | 1165 | ||
| 1166 | static ssize_t read_file_dump_nfcal(struct file *file, char __user *user_buf, | ||
| 1167 | size_t count, loff_t *ppos) | ||
| 1168 | { | ||
| 1169 | struct ath_softc *sc = file->private_data; | ||
| 1170 | struct ath_hw *ah = sc->sc_ah; | ||
| 1171 | struct ath9k_nfcal_hist *h = sc->caldata.nfCalHist; | ||
| 1172 | struct ath_common *common = ath9k_hw_common(ah); | ||
| 1173 | struct ieee80211_conf *conf = &common->hw->conf; | ||
| 1174 | u32 len = 0, size = 1500; | ||
| 1175 | u32 i, j; | ||
| 1176 | ssize_t retval = 0; | ||
| 1177 | char *buf; | ||
| 1178 | u8 chainmask = (ah->rxchainmask << 3) | ah->rxchainmask; | ||
| 1179 | u8 nread; | ||
| 1180 | |||
| 1181 | buf = kzalloc(size, GFP_KERNEL); | ||
| 1182 | if (!buf) | ||
| 1183 | return -ENOMEM; | ||
| 1184 | |||
| 1185 | len += snprintf(buf + len, size - len, | ||
| 1186 | "Channel Noise Floor : %d\n", ah->noise); | ||
| 1187 | len += snprintf(buf + len, size - len, | ||
| 1188 | "Chain | privNF | # Readings | NF Readings\n"); | ||
| 1189 | for (i = 0; i < NUM_NF_READINGS; i++) { | ||
| 1190 | if (!(chainmask & (1 << i)) || | ||
| 1191 | ((i >= AR5416_MAX_CHAINS) && !conf_is_ht40(conf))) | ||
| 1192 | continue; | ||
| 1193 | |||
| 1194 | nread = AR_PHY_CCA_FILTERWINDOW_LENGTH - h[i].invalidNFcount; | ||
| 1195 | len += snprintf(buf + len, size - len, " %d\t %d\t %d\t\t", | ||
| 1196 | i, h[i].privNF, nread); | ||
| 1197 | for (j = 0; j < nread; j++) | ||
| 1198 | len += snprintf(buf + len, size - len, | ||
| 1199 | " %d", h[i].nfCalBuffer[j]); | ||
| 1200 | len += snprintf(buf + len, size - len, "\n"); | ||
| 1201 | } | ||
| 1202 | |||
| 1203 | if (len > size) | ||
| 1204 | len = size; | ||
| 1205 | |||
| 1206 | retval = simple_read_from_buffer(user_buf, count, ppos, buf, len); | ||
| 1207 | kfree(buf); | ||
| 1208 | |||
| 1209 | return retval; | ||
| 1210 | } | ||
| 1211 | |||
| 1212 | static const struct file_operations fops_dump_nfcal = { | ||
| 1213 | .read = read_file_dump_nfcal, | ||
| 1214 | .open = ath9k_debugfs_open, | ||
| 1215 | .owner = THIS_MODULE, | ||
| 1216 | .llseek = default_llseek, | ||
| 1217 | }; | ||
| 1218 | |||
| 1166 | static ssize_t read_file_base_eeprom(struct file *file, char __user *user_buf, | 1219 | static ssize_t read_file_base_eeprom(struct file *file, char __user *user_buf, |
| 1167 | size_t count, loff_t *ppos) | 1220 | size_t count, loff_t *ppos) |
| 1168 | { | 1221 | { |
| @@ -1262,6 +1315,8 @@ int ath9k_init_debug(struct ath_hw *ah) | |||
| 1262 | &ah->config.cwm_ignore_extcca); | 1315 | &ah->config.cwm_ignore_extcca); |
| 1263 | debugfs_create_file("regdump", S_IRUSR, sc->debug.debugfs_phy, sc, | 1316 | debugfs_create_file("regdump", S_IRUSR, sc->debug.debugfs_phy, sc, |
| 1264 | &fops_regdump); | 1317 | &fops_regdump); |
| 1318 | debugfs_create_file("dump_nfcal", S_IRUSR, sc->debug.debugfs_phy, sc, | ||
| 1319 | &fops_dump_nfcal); | ||
| 1265 | debugfs_create_file("base_eeprom", S_IRUSR, sc->debug.debugfs_phy, sc, | 1320 | debugfs_create_file("base_eeprom", S_IRUSR, sc->debug.debugfs_phy, sc, |
| 1266 | &fops_base_eeprom); | 1321 | &fops_base_eeprom); |
| 1267 | debugfs_create_file("modal_eeprom", S_IRUSR, sc->debug.debugfs_phy, sc, | 1322 | debugfs_create_file("modal_eeprom", S_IRUSR, sc->debug.debugfs_phy, sc, |
diff --git a/drivers/net/wireless/ath/ath9k/htc_drv_init.c b/drivers/net/wireless/ath/ath9k/htc_drv_init.c index 19aa5b724887..9cf42f6973aa 100644 --- a/drivers/net/wireless/ath/ath9k/htc_drv_init.c +++ b/drivers/net/wireless/ath/ath9k/htc_drv_init.c | |||
| @@ -572,25 +572,6 @@ err: | |||
| 572 | return -EINVAL; | 572 | return -EINVAL; |
| 573 | } | 573 | } |
| 574 | 574 | ||
| 575 | static void ath9k_init_crypto(struct ath9k_htc_priv *priv) | ||
| 576 | { | ||
| 577 | struct ath_common *common = ath9k_hw_common(priv->ah); | ||
| 578 | int i = 0; | ||
| 579 | |||
| 580 | /* Get the hardware key cache size. */ | ||
| 581 | common->keymax = AR_KEYTABLE_SIZE; | ||
| 582 | |||
| 583 | if (priv->ah->misc_mode & AR_PCU_MIC_NEW_LOC_ENA) | ||
| 584 | common->crypt_caps |= ATH_CRYPT_CAP_MIC_COMBINED; | ||
| 585 | |||
| 586 | /* | ||
| 587 | * Reset the key cache since some parts do not | ||
| 588 | * reset the contents on initial power up. | ||
| 589 | */ | ||
| 590 | for (i = 0; i < common->keymax; i++) | ||
| 591 | ath_hw_keyreset(common, (u16) i); | ||
| 592 | } | ||
| 593 | |||
| 594 | static void ath9k_init_channels_rates(struct ath9k_htc_priv *priv) | 575 | static void ath9k_init_channels_rates(struct ath9k_htc_priv *priv) |
| 595 | { | 576 | { |
| 596 | if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) { | 577 | if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) { |
| @@ -720,7 +701,7 @@ static int ath9k_init_priv(struct ath9k_htc_priv *priv, | |||
| 720 | for (i = 0; i < ATH9K_HTC_MAX_BCN_VIF; i++) | 701 | for (i = 0; i < ATH9K_HTC_MAX_BCN_VIF; i++) |
| 721 | priv->cur_beacon_conf.bslot[i] = NULL; | 702 | priv->cur_beacon_conf.bslot[i] = NULL; |
| 722 | 703 | ||
| 723 | ath9k_init_crypto(priv); | 704 | ath9k_cmn_init_crypto(ah); |
| 724 | ath9k_init_channels_rates(priv); | 705 | ath9k_init_channels_rates(priv); |
| 725 | ath9k_init_misc(priv); | 706 | ath9k_init_misc(priv); |
| 726 | 707 | ||
diff --git a/drivers/net/wireless/ath/ath9k/htc_drv_main.c b/drivers/net/wireless/ath/ath9k/htc_drv_main.c index 7212acb2bd6c..0248024da56a 100644 --- a/drivers/net/wireless/ath/ath9k/htc_drv_main.c +++ b/drivers/net/wireless/ath/ath9k/htc_drv_main.c | |||
| @@ -1736,6 +1736,22 @@ out: | |||
| 1736 | return ret; | 1736 | return ret; |
| 1737 | } | 1737 | } |
| 1738 | 1738 | ||
| 1739 | |||
| 1740 | static int ath9k_htc_get_stats(struct ieee80211_hw *hw, | ||
| 1741 | struct ieee80211_low_level_stats *stats) | ||
| 1742 | { | ||
| 1743 | struct ath9k_htc_priv *priv = hw->priv; | ||
| 1744 | struct ath_hw *ah = priv->ah; | ||
| 1745 | struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats; | ||
| 1746 | |||
| 1747 | stats->dot11ACKFailureCount = mib_stats->ackrcv_bad; | ||
| 1748 | stats->dot11RTSFailureCount = mib_stats->rts_bad; | ||
| 1749 | stats->dot11FCSErrorCount = mib_stats->fcs_bad; | ||
| 1750 | stats->dot11RTSSuccessCount = mib_stats->rts_good; | ||
| 1751 | |||
| 1752 | return 0; | ||
| 1753 | } | ||
| 1754 | |||
| 1739 | struct ieee80211_ops ath9k_htc_ops = { | 1755 | struct ieee80211_ops ath9k_htc_ops = { |
| 1740 | .tx = ath9k_htc_tx, | 1756 | .tx = ath9k_htc_tx, |
| 1741 | .start = ath9k_htc_start, | 1757 | .start = ath9k_htc_start, |
| @@ -1759,4 +1775,5 @@ struct ieee80211_ops ath9k_htc_ops = { | |||
| 1759 | .rfkill_poll = ath9k_htc_rfkill_poll_state, | 1775 | .rfkill_poll = ath9k_htc_rfkill_poll_state, |
| 1760 | .set_coverage_class = ath9k_htc_set_coverage_class, | 1776 | .set_coverage_class = ath9k_htc_set_coverage_class, |
| 1761 | .set_bitrate_mask = ath9k_htc_set_bitrate_mask, | 1777 | .set_bitrate_mask = ath9k_htc_set_bitrate_mask, |
| 1778 | .get_stats = ath9k_htc_get_stats, | ||
| 1762 | }; | 1779 | }; |
diff --git a/drivers/net/wireless/ath/ath9k/hw-ops.h b/drivers/net/wireless/ath/ath9k/hw-ops.h index cb29e8875386..dd9003ee123b 100644 --- a/drivers/net/wireless/ath/ath9k/hw-ops.h +++ b/drivers/net/wireless/ath/ath9k/hw-ops.h | |||
| @@ -22,10 +22,12 @@ | |||
| 22 | /* Hardware core and driver accessible callbacks */ | 22 | /* Hardware core and driver accessible callbacks */ |
| 23 | 23 | ||
| 24 | static inline void ath9k_hw_configpcipowersave(struct ath_hw *ah, | 24 | static inline void ath9k_hw_configpcipowersave(struct ath_hw *ah, |
| 25 | int restore, | 25 | bool power_off) |
| 26 | int power_off) | ||
| 27 | { | 26 | { |
| 28 | ath9k_hw_ops(ah)->config_pci_powersave(ah, restore, power_off); | 27 | if (ah->aspm_enabled != true) |
| 28 | return; | ||
| 29 | |||
| 30 | ath9k_hw_ops(ah)->config_pci_powersave(ah, power_off); | ||
| 29 | } | 31 | } |
| 30 | 32 | ||
| 31 | static inline void ath9k_hw_rxena(struct ath_hw *ah) | 33 | static inline void ath9k_hw_rxena(struct ath_hw *ah) |
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c index db44e5b0c98b..a0d1147844fb 100644 --- a/drivers/net/wireless/ath/ath9k/hw.c +++ b/drivers/net/wireless/ath/ath9k/hw.c | |||
| @@ -603,10 +603,7 @@ static int __ath9k_hw_init(struct ath_hw *ah) | |||
| 603 | 603 | ||
| 604 | ath9k_hw_init_mode_regs(ah); | 604 | ath9k_hw_init_mode_regs(ah); |
| 605 | 605 | ||
| 606 | 606 | if (!ah->is_pciexpress) | |
| 607 | if (ah->is_pciexpress) | ||
| 608 | ath9k_hw_aspm_init(ah); | ||
| 609 | else | ||
| 610 | ath9k_hw_disablepcie(ah); | 607 | ath9k_hw_disablepcie(ah); |
| 611 | 608 | ||
| 612 | if (!AR_SREV_9300_20_OR_LATER(ah)) | 609 | if (!AR_SREV_9300_20_OR_LATER(ah)) |
| @@ -621,6 +618,9 @@ static int __ath9k_hw_init(struct ath_hw *ah) | |||
| 621 | if (r) | 618 | if (r) |
| 622 | return r; | 619 | return r; |
| 623 | 620 | ||
| 621 | if (ah->is_pciexpress) | ||
| 622 | ath9k_hw_aspm_init(ah); | ||
| 623 | |||
| 624 | r = ath9k_hw_init_macaddr(ah); | 624 | r = ath9k_hw_init_macaddr(ah); |
| 625 | if (r) { | 625 | if (r) { |
| 626 | ath_err(common, "Failed to initialize MAC address\n"); | 626 | ath_err(common, "Failed to initialize MAC address\n"); |
| @@ -663,6 +663,7 @@ int ath9k_hw_init(struct ath_hw *ah) | |||
| 663 | case AR9300_DEVID_AR9485_PCIE: | 663 | case AR9300_DEVID_AR9485_PCIE: |
| 664 | case AR9300_DEVID_AR9330: | 664 | case AR9300_DEVID_AR9330: |
| 665 | case AR9300_DEVID_AR9340: | 665 | case AR9300_DEVID_AR9340: |
| 666 | case AR9300_DEVID_AR9580: | ||
| 666 | break; | 667 | break; |
| 667 | default: | 668 | default: |
| 668 | if (common->bus_ops->ath_bus_type == ATH_USB) | 669 | if (common->bus_ops->ath_bus_type == ATH_USB) |
| @@ -996,7 +997,7 @@ void ath9k_hw_init_global_settings(struct ath_hw *ah) | |||
| 996 | slottime = 21; | 997 | slottime = 21; |
| 997 | sifstime = 64; | 998 | sifstime = 64; |
| 998 | } else { | 999 | } else { |
| 999 | eifs = REG_READ(ah, AR_D_GBL_IFS_EIFS); | 1000 | eifs = REG_READ(ah, AR_D_GBL_IFS_EIFS)/common->clockrate; |
| 1000 | reg = REG_READ(ah, AR_USEC); | 1001 | reg = REG_READ(ah, AR_USEC); |
| 1001 | rx_lat = MS(reg, AR_USEC_RX_LAT); | 1002 | rx_lat = MS(reg, AR_USEC_RX_LAT); |
| 1002 | tx_lat = MS(reg, AR_USEC_TX_LAT); | 1003 | tx_lat = MS(reg, AR_USEC_TX_LAT); |
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h index 4fbcced2828c..3aa3fb191775 100644 --- a/drivers/net/wireless/ath/ath9k/hw.h +++ b/drivers/net/wireless/ath/ath9k/hw.h | |||
| @@ -45,6 +45,7 @@ | |||
| 45 | #define AR9300_DEVID_PCIE 0x0030 | 45 | #define AR9300_DEVID_PCIE 0x0030 |
| 46 | #define AR9300_DEVID_AR9340 0x0031 | 46 | #define AR9300_DEVID_AR9340 0x0031 |
| 47 | #define AR9300_DEVID_AR9485_PCIE 0x0032 | 47 | #define AR9300_DEVID_AR9485_PCIE 0x0032 |
| 48 | #define AR9300_DEVID_AR9580 0x0033 | ||
| 48 | #define AR9300_DEVID_AR9330 0x0035 | 49 | #define AR9300_DEVID_AR9330 0x0035 |
| 49 | 50 | ||
| 50 | #define AR5416_AR9100_DEVID 0x000b | 51 | #define AR5416_AR9100_DEVID 0x000b |
| @@ -606,8 +607,7 @@ struct ath_hw_private_ops { | |||
| 606 | */ | 607 | */ |
| 607 | struct ath_hw_ops { | 608 | struct ath_hw_ops { |
| 608 | void (*config_pci_powersave)(struct ath_hw *ah, | 609 | void (*config_pci_powersave)(struct ath_hw *ah, |
| 609 | int restore, | 610 | bool power_off); |
| 610 | int power_off); | ||
| 611 | void (*rx_enable)(struct ath_hw *ah); | 611 | void (*rx_enable)(struct ath_hw *ah); |
| 612 | void (*set_desc_link)(void *ds, u32 link); | 612 | void (*set_desc_link)(void *ds, u32 link); |
| 613 | bool (*calibrate)(struct ath_hw *ah, | 613 | bool (*calibrate)(struct ath_hw *ah, |
| @@ -1037,10 +1037,6 @@ void ath9k_ani_reset(struct ath_hw *ah, bool is_scanning); | |||
| 1037 | void ath9k_hw_proc_mib_event(struct ath_hw *ah); | 1037 | void ath9k_hw_proc_mib_event(struct ath_hw *ah); |
| 1038 | void ath9k_hw_ani_monitor(struct ath_hw *ah, struct ath9k_channel *chan); | 1038 | void ath9k_hw_ani_monitor(struct ath_hw *ah, struct ath9k_channel *chan); |
| 1039 | 1039 | ||
| 1040 | #define ATH_PCIE_CAP_LINK_CTRL 0x70 | ||
| 1041 | #define ATH_PCIE_CAP_LINK_L0S 1 | ||
| 1042 | #define ATH_PCIE_CAP_LINK_L1 2 | ||
| 1043 | |||
| 1044 | #define ATH9K_CLOCK_RATE_CCK 22 | 1040 | #define ATH9K_CLOCK_RATE_CCK 22 |
| 1045 | #define ATH9K_CLOCK_RATE_5GHZ_OFDM 40 | 1041 | #define ATH9K_CLOCK_RATE_5GHZ_OFDM 40 |
| 1046 | #define ATH9K_CLOCK_RATE_2GHZ_OFDM 44 | 1042 | #define ATH9K_CLOCK_RATE_2GHZ_OFDM 44 |
diff --git a/drivers/net/wireless/ath/ath9k/init.c b/drivers/net/wireless/ath/ath9k/init.c index db38a58e752d..d7761d1fc5ba 100644 --- a/drivers/net/wireless/ath/ath9k/init.c +++ b/drivers/net/wireless/ath/ath9k/init.c | |||
| @@ -404,31 +404,6 @@ fail: | |||
| 404 | return error; | 404 | return error; |
| 405 | } | 405 | } |
| 406 | 406 | ||
| 407 | void ath9k_init_crypto(struct ath_softc *sc) | ||
| 408 | { | ||
| 409 | struct ath_common *common = ath9k_hw_common(sc->sc_ah); | ||
| 410 | int i = 0; | ||
| 411 | |||
| 412 | /* Get the hardware key cache size. */ | ||
| 413 | common->keymax = AR_KEYTABLE_SIZE; | ||
| 414 | |||
| 415 | /* | ||
| 416 | * Reset the key cache since some parts do not | ||
| 417 | * reset the contents on initial power up. | ||
| 418 | */ | ||
| 419 | for (i = 0; i < common->keymax; i++) | ||
| 420 | ath_hw_keyreset(common, (u16) i); | ||
| 421 | |||
| 422 | /* | ||
| 423 | * Check whether the separate key cache entries | ||
| 424 | * are required to handle both tx+rx MIC keys. | ||
| 425 | * With split mic keys the number of stations is limited | ||
| 426 | * to 27 otherwise 59. | ||
| 427 | */ | ||
| 428 | if (sc->sc_ah->misc_mode & AR_PCU_MIC_NEW_LOC_ENA) | ||
| 429 | common->crypt_caps |= ATH_CRYPT_CAP_MIC_COMBINED; | ||
| 430 | } | ||
| 431 | |||
| 432 | static int ath9k_init_btcoex(struct ath_softc *sc) | 407 | static int ath9k_init_btcoex(struct ath_softc *sc) |
| 433 | { | 408 | { |
| 434 | struct ath_txq *txq; | 409 | struct ath_txq *txq; |
| @@ -630,7 +605,7 @@ static int ath9k_init_softc(u16 devid, struct ath_softc *sc, | |||
| 630 | if (ret) | 605 | if (ret) |
| 631 | goto err_btcoex; | 606 | goto err_btcoex; |
| 632 | 607 | ||
| 633 | ath9k_init_crypto(sc); | 608 | ath9k_cmn_init_crypto(sc->sc_ah); |
| 634 | ath9k_init_misc(sc); | 609 | ath9k_init_misc(sc); |
| 635 | 610 | ||
| 636 | return 0; | 611 | return 0; |
diff --git a/drivers/net/wireless/ath/ath9k/mac.c b/drivers/net/wireless/ath/ath9k/mac.c index 0f90e1521ffe..7ce9b320f0d9 100644 --- a/drivers/net/wireless/ath/ath9k/mac.c +++ b/drivers/net/wireless/ath/ath9k/mac.c | |||
| @@ -345,21 +345,8 @@ int ath9k_hw_setuptxqueue(struct ath_hw *ah, enum ath9k_tx_queue type, | |||
| 345 | } | 345 | } |
| 346 | memset(qi, 0, sizeof(struct ath9k_tx_queue_info)); | 346 | memset(qi, 0, sizeof(struct ath9k_tx_queue_info)); |
| 347 | qi->tqi_type = type; | 347 | qi->tqi_type = type; |
| 348 | if (qinfo == NULL) { | 348 | qi->tqi_physCompBuf = qinfo->tqi_physCompBuf; |
| 349 | qi->tqi_qflags = | 349 | (void) ath9k_hw_set_txq_props(ah, q, qinfo); |
| 350 | TXQ_FLAG_TXOKINT_ENABLE | ||
| 351 | | TXQ_FLAG_TXERRINT_ENABLE | ||
| 352 | | TXQ_FLAG_TXDESCINT_ENABLE | TXQ_FLAG_TXURNINT_ENABLE; | ||
| 353 | qi->tqi_aifs = INIT_AIFS; | ||
| 354 | qi->tqi_cwmin = ATH9K_TXQ_USEDEFAULT; | ||
| 355 | qi->tqi_cwmax = INIT_CWMAX; | ||
| 356 | qi->tqi_shretry = INIT_SH_RETRY; | ||
| 357 | qi->tqi_lgretry = INIT_LG_RETRY; | ||
| 358 | qi->tqi_physCompBuf = 0; | ||
| 359 | } else { | ||
| 360 | qi->tqi_physCompBuf = qinfo->tqi_physCompBuf; | ||
| 361 | (void) ath9k_hw_set_txq_props(ah, q, qinfo); | ||
| 362 | } | ||
| 363 | 350 | ||
| 364 | return q; | 351 | return q; |
| 365 | } | 352 | } |
| @@ -564,7 +551,7 @@ bool ath9k_hw_resettxqueue(struct ath_hw *ah, u32 q) | |||
| 564 | EXPORT_SYMBOL(ath9k_hw_resettxqueue); | 551 | EXPORT_SYMBOL(ath9k_hw_resettxqueue); |
| 565 | 552 | ||
| 566 | int ath9k_hw_rxprocdesc(struct ath_hw *ah, struct ath_desc *ds, | 553 | int ath9k_hw_rxprocdesc(struct ath_hw *ah, struct ath_desc *ds, |
| 567 | struct ath_rx_status *rs, u64 tsf) | 554 | struct ath_rx_status *rs) |
| 568 | { | 555 | { |
| 569 | struct ar5416_desc ads; | 556 | struct ar5416_desc ads; |
| 570 | struct ar5416_desc *adsp = AR5416DESC(ds); | 557 | struct ar5416_desc *adsp = AR5416DESC(ds); |
diff --git a/drivers/net/wireless/ath/ath9k/mac.h b/drivers/net/wireless/ath/ath9k/mac.h index 8e848c4d16ba..153859ccc2a1 100644 --- a/drivers/net/wireless/ath/ath9k/mac.h +++ b/drivers/net/wireless/ath/ath9k/mac.h | |||
| @@ -687,7 +687,7 @@ int ath9k_hw_setuptxqueue(struct ath_hw *ah, enum ath9k_tx_queue type, | |||
| 687 | bool ath9k_hw_releasetxqueue(struct ath_hw *ah, u32 q); | 687 | bool ath9k_hw_releasetxqueue(struct ath_hw *ah, u32 q); |
| 688 | bool ath9k_hw_resettxqueue(struct ath_hw *ah, u32 q); | 688 | bool ath9k_hw_resettxqueue(struct ath_hw *ah, u32 q); |
| 689 | int ath9k_hw_rxprocdesc(struct ath_hw *ah, struct ath_desc *ds, | 689 | int ath9k_hw_rxprocdesc(struct ath_hw *ah, struct ath_desc *ds, |
| 690 | struct ath_rx_status *rs, u64 tsf); | 690 | struct ath_rx_status *rs); |
| 691 | void ath9k_hw_setuprxdesc(struct ath_hw *ah, struct ath_desc *ds, | 691 | void ath9k_hw_setuprxdesc(struct ath_hw *ah, struct ath_desc *ds, |
| 692 | u32 size, u32 flags); | 692 | u32 size, u32 flags); |
| 693 | bool ath9k_hw_setrxabort(struct ath_hw *ah, bool set); | 693 | bool ath9k_hw_setrxabort(struct ath_hw *ah, bool set); |
diff --git a/drivers/net/wireless/ath/ath9k/main.c b/drivers/net/wireless/ath/ath9k/main.c index 1e7fe8c0e119..5ac4f3f2ad60 100644 --- a/drivers/net/wireless/ath/ath9k/main.c +++ b/drivers/net/wireless/ath/ath9k/main.c | |||
| @@ -565,7 +565,6 @@ set_timer: | |||
| 565 | static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta) | 565 | static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta) |
| 566 | { | 566 | { |
| 567 | struct ath_node *an; | 567 | struct ath_node *an; |
| 568 | struct ath_hw *ah = sc->sc_ah; | ||
| 569 | an = (struct ath_node *)sta->drv_priv; | 568 | an = (struct ath_node *)sta->drv_priv; |
| 570 | 569 | ||
| 571 | #ifdef CONFIG_ATH9K_DEBUGFS | 570 | #ifdef CONFIG_ATH9K_DEBUGFS |
| @@ -574,9 +573,6 @@ static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta) | |||
| 574 | spin_unlock(&sc->nodes_lock); | 573 | spin_unlock(&sc->nodes_lock); |
| 575 | an->sta = sta; | 574 | an->sta = sta; |
| 576 | #endif | 575 | #endif |
| 577 | if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM) | ||
| 578 | sc->sc_flags |= SC_OP_ENABLE_APM; | ||
| 579 | |||
| 580 | if (sc->sc_flags & SC_OP_TXAGGR) { | 576 | if (sc->sc_flags & SC_OP_TXAGGR) { |
| 581 | ath_tx_node_init(sc, an); | 577 | ath_tx_node_init(sc, an); |
| 582 | an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR + | 578 | an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR + |
| @@ -826,11 +822,9 @@ irqreturn_t ath_isr(int irq, void *dev) | |||
| 826 | if (status & ATH9K_INT_TXURN) | 822 | if (status & ATH9K_INT_TXURN) |
| 827 | ath9k_hw_updatetxtriglevel(ah, true); | 823 | ath9k_hw_updatetxtriglevel(ah, true); |
| 828 | 824 | ||
| 829 | if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) { | 825 | if (status & ATH9K_INT_RXEOL) { |
| 830 | if (status & ATH9K_INT_RXEOL) { | 826 | ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN); |
| 831 | ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN); | 827 | ath9k_hw_set_interrupts(ah, ah->imask); |
| 832 | ath9k_hw_set_interrupts(ah, ah->imask); | ||
| 833 | } | ||
| 834 | } | 828 | } |
| 835 | 829 | ||
| 836 | if (status & ATH9K_INT_MIB) { | 830 | if (status & ATH9K_INT_MIB) { |
| @@ -888,7 +882,7 @@ static void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw) | |||
| 888 | spin_lock_bh(&sc->sc_pcu_lock); | 882 | spin_lock_bh(&sc->sc_pcu_lock); |
| 889 | atomic_set(&ah->intr_ref_cnt, -1); | 883 | atomic_set(&ah->intr_ref_cnt, -1); |
| 890 | 884 | ||
| 891 | ath9k_hw_configpcipowersave(ah, 0, 0); | 885 | ath9k_hw_configpcipowersave(ah, false); |
| 892 | 886 | ||
| 893 | if (!ah->curchan) | 887 | if (!ah->curchan) |
| 894 | ah->curchan = ath9k_cmn_get_curchannel(sc->hw, ah); | 888 | ah->curchan = ath9k_cmn_get_curchannel(sc->hw, ah); |
| @@ -969,7 +963,7 @@ void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw) | |||
| 969 | 963 | ||
| 970 | ath9k_hw_phy_disable(ah); | 964 | ath9k_hw_phy_disable(ah); |
| 971 | 965 | ||
| 972 | ath9k_hw_configpcipowersave(ah, 1, 1); | 966 | ath9k_hw_configpcipowersave(ah, true); |
| 973 | 967 | ||
| 974 | spin_unlock_bh(&sc->sc_pcu_lock); | 968 | spin_unlock_bh(&sc->sc_pcu_lock); |
| 975 | ath9k_ps_restore(sc); | 969 | ath9k_ps_restore(sc); |
| @@ -1069,7 +1063,7 @@ static int ath9k_start(struct ieee80211_hw *hw) | |||
| 1069 | init_channel = ath9k_cmn_get_curchannel(hw, ah); | 1063 | init_channel = ath9k_cmn_get_curchannel(hw, ah); |
| 1070 | 1064 | ||
| 1071 | /* Reset SERDES registers */ | 1065 | /* Reset SERDES registers */ |
| 1072 | ath9k_hw_configpcipowersave(ah, 0, 0); | 1066 | ath9k_hw_configpcipowersave(ah, false); |
| 1073 | 1067 | ||
| 1074 | /* | 1068 | /* |
| 1075 | * The basic interface to setting the hardware in a good | 1069 | * The basic interface to setting the hardware in a good |
| @@ -1145,8 +1139,6 @@ static int ath9k_start(struct ieee80211_hw *hw) | |||
| 1145 | AR_STOMP_LOW_WLAN_WGHT); | 1139 | AR_STOMP_LOW_WLAN_WGHT); |
| 1146 | ath9k_hw_btcoex_enable(ah); | 1140 | ath9k_hw_btcoex_enable(ah); |
| 1147 | 1141 | ||
| 1148 | if (common->bus_ops->bt_coex_prep) | ||
| 1149 | common->bus_ops->bt_coex_prep(common); | ||
| 1150 | if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE) | 1142 | if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE) |
| 1151 | ath9k_btcoex_timer_resume(sc); | 1143 | ath9k_btcoex_timer_resume(sc); |
| 1152 | } | 1144 | } |
| @@ -1680,6 +1672,7 @@ static int ath9k_config(struct ieee80211_hw *hw, u32 changed) | |||
| 1680 | 1672 | ||
| 1681 | if (changed & IEEE80211_CONF_CHANGE_CHANNEL) { | 1673 | if (changed & IEEE80211_CONF_CHANGE_CHANNEL) { |
| 1682 | struct ieee80211_channel *curchan = hw->conf.channel; | 1674 | struct ieee80211_channel *curchan = hw->conf.channel; |
| 1675 | struct ath9k_channel old_chan; | ||
| 1683 | int pos = curchan->hw_value; | 1676 | int pos = curchan->hw_value; |
| 1684 | int old_pos = -1; | 1677 | int old_pos = -1; |
| 1685 | unsigned long flags; | 1678 | unsigned long flags; |
| @@ -1696,15 +1689,25 @@ static int ath9k_config(struct ieee80211_hw *hw, u32 changed) | |||
| 1696 | "Set channel: %d MHz type: %d\n", | 1689 | "Set channel: %d MHz type: %d\n", |
| 1697 | curchan->center_freq, conf->channel_type); | 1690 | curchan->center_freq, conf->channel_type); |
| 1698 | 1691 | ||
| 1699 | ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos], | ||
| 1700 | curchan, conf->channel_type); | ||
| 1701 | |||
| 1702 | /* update survey stats for the old channel before switching */ | 1692 | /* update survey stats for the old channel before switching */ |
| 1703 | spin_lock_irqsave(&common->cc_lock, flags); | 1693 | spin_lock_irqsave(&common->cc_lock, flags); |
| 1704 | ath_update_survey_stats(sc); | 1694 | ath_update_survey_stats(sc); |
| 1705 | spin_unlock_irqrestore(&common->cc_lock, flags); | 1695 | spin_unlock_irqrestore(&common->cc_lock, flags); |
| 1706 | 1696 | ||
| 1707 | /* | 1697 | /* |
| 1698 | * Preserve the current channel values, before updating | ||
| 1699 | * the same channel | ||
| 1700 | */ | ||
| 1701 | if (old_pos == pos) { | ||
| 1702 | memcpy(&old_chan, &sc->sc_ah->channels[pos], | ||
| 1703 | sizeof(struct ath9k_channel)); | ||
| 1704 | ah->curchan = &old_chan; | ||
| 1705 | } | ||
| 1706 | |||
| 1707 | ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos], | ||
| 1708 | curchan, conf->channel_type); | ||
| 1709 | |||
| 1710 | /* | ||
| 1708 | * If the operating channel changes, change the survey in-use flags | 1711 | * If the operating channel changes, change the survey in-use flags |
| 1709 | * along with it. | 1712 | * along with it. |
| 1710 | * Reset the survey data for the new channel, unless we're switching | 1713 | * Reset the survey data for the new channel, unless we're switching |
| @@ -2400,6 +2403,20 @@ skip: | |||
| 2400 | return sc->beacon.tx_last; | 2403 | return sc->beacon.tx_last; |
| 2401 | } | 2404 | } |
| 2402 | 2405 | ||
| 2406 | static int ath9k_get_stats(struct ieee80211_hw *hw, | ||
| 2407 | struct ieee80211_low_level_stats *stats) | ||
| 2408 | { | ||
| 2409 | struct ath_softc *sc = hw->priv; | ||
| 2410 | struct ath_hw *ah = sc->sc_ah; | ||
| 2411 | struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats; | ||
| 2412 | |||
| 2413 | stats->dot11ACKFailureCount = mib_stats->ackrcv_bad; | ||
| 2414 | stats->dot11RTSFailureCount = mib_stats->rts_bad; | ||
| 2415 | stats->dot11FCSErrorCount = mib_stats->fcs_bad; | ||
| 2416 | stats->dot11RTSSuccessCount = mib_stats->rts_good; | ||
| 2417 | return 0; | ||
| 2418 | } | ||
| 2419 | |||
| 2403 | struct ieee80211_ops ath9k_ops = { | 2420 | struct ieee80211_ops ath9k_ops = { |
| 2404 | .tx = ath9k_tx, | 2421 | .tx = ath9k_tx, |
| 2405 | .start = ath9k_start, | 2422 | .start = ath9k_start, |
| @@ -2424,5 +2441,6 @@ struct ieee80211_ops ath9k_ops = { | |||
| 2424 | .set_coverage_class = ath9k_set_coverage_class, | 2441 | .set_coverage_class = ath9k_set_coverage_class, |
| 2425 | .flush = ath9k_flush, | 2442 | .flush = ath9k_flush, |
| 2426 | .tx_frames_pending = ath9k_tx_frames_pending, | 2443 | .tx_frames_pending = ath9k_tx_frames_pending, |
| 2427 | .tx_last_beacon = ath9k_tx_last_beacon, | 2444 | .tx_last_beacon = ath9k_tx_last_beacon, |
| 2445 | .get_stats = ath9k_get_stats, | ||
| 2428 | }; | 2446 | }; |
diff --git a/drivers/net/wireless/ath/ath9k/pci.c b/drivers/net/wireless/ath/ath9k/pci.c index 5685cf11cfe3..891661a61513 100644 --- a/drivers/net/wireless/ath/ath9k/pci.c +++ b/drivers/net/wireless/ath/ath9k/pci.c | |||
| @@ -32,9 +32,11 @@ static DEFINE_PCI_DEVICE_TABLE(ath_pci_id_table) = { | |||
| 32 | { PCI_VDEVICE(ATHEROS, 0x002E) }, /* PCI-E */ | 32 | { PCI_VDEVICE(ATHEROS, 0x002E) }, /* PCI-E */ |
| 33 | { PCI_VDEVICE(ATHEROS, 0x0030) }, /* PCI-E AR9300 */ | 33 | { PCI_VDEVICE(ATHEROS, 0x0030) }, /* PCI-E AR9300 */ |
| 34 | { PCI_VDEVICE(ATHEROS, 0x0032) }, /* PCI-E AR9485 */ | 34 | { PCI_VDEVICE(ATHEROS, 0x0032) }, /* PCI-E AR9485 */ |
| 35 | { PCI_VDEVICE(ATHEROS, 0x0033) }, /* PCI-E AR9580 */ | ||
| 35 | { 0 } | 36 | { 0 } |
| 36 | }; | 37 | }; |
| 37 | 38 | ||
| 39 | |||
| 38 | /* return bus cachesize in 4B word units */ | 40 | /* return bus cachesize in 4B word units */ |
| 39 | static void ath_pci_read_cachesize(struct ath_common *common, int *csz) | 41 | static void ath_pci_read_cachesize(struct ath_common *common, int *csz) |
| 40 | { | 42 | { |
| @@ -88,23 +90,6 @@ static bool ath_pci_eeprom_read(struct ath_common *common, u32 off, u16 *data) | |||
| 88 | return true; | 90 | return true; |
| 89 | } | 91 | } |
| 90 | 92 | ||
| 91 | /* | ||
| 92 | * Bluetooth coexistance requires disabling ASPM. | ||
| 93 | */ | ||
| 94 | static void ath_pci_bt_coex_prep(struct ath_common *common) | ||
| 95 | { | ||
| 96 | struct ath_softc *sc = (struct ath_softc *) common->priv; | ||
| 97 | struct pci_dev *pdev = to_pci_dev(sc->dev); | ||
| 98 | u8 aspm; | ||
| 99 | |||
| 100 | if (!pci_is_pcie(pdev)) | ||
| 101 | return; | ||
| 102 | |||
| 103 | pci_read_config_byte(pdev, ATH_PCIE_CAP_LINK_CTRL, &aspm); | ||
| 104 | aspm &= ~(ATH_PCIE_CAP_LINK_L0S | ATH_PCIE_CAP_LINK_L1); | ||
| 105 | pci_write_config_byte(pdev, ATH_PCIE_CAP_LINK_CTRL, aspm); | ||
| 106 | } | ||
| 107 | |||
| 108 | static void ath_pci_extn_synch_enable(struct ath_common *common) | 93 | static void ath_pci_extn_synch_enable(struct ath_common *common) |
| 109 | { | 94 | { |
| 110 | struct ath_softc *sc = (struct ath_softc *) common->priv; | 95 | struct ath_softc *sc = (struct ath_softc *) common->priv; |
| @@ -116,6 +101,7 @@ static void ath_pci_extn_synch_enable(struct ath_common *common) | |||
| 116 | pci_write_config_byte(pdev, sc->sc_ah->caps.pcie_lcr_offset, lnkctl); | 101 | pci_write_config_byte(pdev, sc->sc_ah->caps.pcie_lcr_offset, lnkctl); |
| 117 | } | 102 | } |
| 118 | 103 | ||
| 104 | /* Need to be called after we discover btcoex capabilities */ | ||
| 119 | static void ath_pci_aspm_init(struct ath_common *common) | 105 | static void ath_pci_aspm_init(struct ath_common *common) |
| 120 | { | 106 | { |
| 121 | struct ath_softc *sc = (struct ath_softc *) common->priv; | 107 | struct ath_softc *sc = (struct ath_softc *) common->priv; |
| @@ -125,19 +111,38 @@ static void ath_pci_aspm_init(struct ath_common *common) | |||
| 125 | int pos; | 111 | int pos; |
| 126 | u8 aspm; | 112 | u8 aspm; |
| 127 | 113 | ||
| 128 | if (!pci_is_pcie(pdev)) | 114 | pos = pci_pcie_cap(pdev); |
| 115 | if (!pos) | ||
| 129 | return; | 116 | return; |
| 130 | 117 | ||
| 131 | parent = pdev->bus->self; | 118 | parent = pdev->bus->self; |
| 132 | if (WARN_ON(!parent)) | 119 | if (!parent) |
| 133 | return; | 120 | return; |
| 134 | 121 | ||
| 122 | if (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) { | ||
| 123 | /* Bluetooth coexistance requires disabling ASPM. */ | ||
| 124 | pci_read_config_byte(pdev, pos + PCI_EXP_LNKCTL, &aspm); | ||
| 125 | aspm &= ~(PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1); | ||
| 126 | pci_write_config_byte(pdev, pos + PCI_EXP_LNKCTL, aspm); | ||
| 127 | |||
| 128 | /* | ||
| 129 | * Both upstream and downstream PCIe components should | ||
| 130 | * have the same ASPM settings. | ||
| 131 | */ | ||
| 132 | pos = pci_pcie_cap(parent); | ||
| 133 | pci_read_config_byte(parent, pos + PCI_EXP_LNKCTL, &aspm); | ||
| 134 | aspm &= ~(PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1); | ||
| 135 | pci_write_config_byte(parent, pos + PCI_EXP_LNKCTL, aspm); | ||
| 136 | |||
| 137 | return; | ||
| 138 | } | ||
| 139 | |||
| 135 | pos = pci_pcie_cap(parent); | 140 | pos = pci_pcie_cap(parent); |
| 136 | pci_read_config_byte(parent, pos + PCI_EXP_LNKCTL, &aspm); | 141 | pci_read_config_byte(parent, pos + PCI_EXP_LNKCTL, &aspm); |
| 137 | if (aspm & (PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1)) { | 142 | if (aspm & (PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1)) { |
| 138 | ah->aspm_enabled = true; | 143 | ah->aspm_enabled = true; |
| 139 | /* Initialize PCIe PM and SERDES registers. */ | 144 | /* Initialize PCIe PM and SERDES registers. */ |
| 140 | ath9k_hw_configpcipowersave(ah, 0, 0); | 145 | ath9k_hw_configpcipowersave(ah, false); |
| 141 | } | 146 | } |
| 142 | } | 147 | } |
| 143 | 148 | ||
| @@ -145,7 +150,6 @@ static const struct ath_bus_ops ath_pci_bus_ops = { | |||
| 145 | .ath_bus_type = ATH_PCI, | 150 | .ath_bus_type = ATH_PCI, |
| 146 | .read_cachesize = ath_pci_read_cachesize, | 151 | .read_cachesize = ath_pci_read_cachesize, |
| 147 | .eeprom_read = ath_pci_eeprom_read, | 152 | .eeprom_read = ath_pci_eeprom_read, |
| 148 | .bt_coex_prep = ath_pci_bt_coex_prep, | ||
| 149 | .extn_synch_en = ath_pci_extn_synch_enable, | 153 | .extn_synch_en = ath_pci_extn_synch_enable, |
| 150 | .aspm_init = ath_pci_aspm_init, | 154 | .aspm_init = ath_pci_aspm_init, |
| 151 | }; | 155 | }; |
| @@ -338,7 +342,7 @@ static int ath_pci_resume(struct device *device) | |||
| 338 | * semi-random values after suspend/resume. | 342 | * semi-random values after suspend/resume. |
| 339 | */ | 343 | */ |
| 340 | ath9k_ps_wakeup(sc); | 344 | ath9k_ps_wakeup(sc); |
| 341 | ath9k_init_crypto(sc); | 345 | ath9k_cmn_init_crypto(sc->sc_ah); |
| 342 | ath9k_ps_restore(sc); | 346 | ath9k_ps_restore(sc); |
| 343 | 347 | ||
| 344 | sc->ps_idle = true; | 348 | sc->ps_idle = true; |
diff --git a/drivers/net/wireless/ath/ath9k/rc.c b/drivers/net/wireless/ath/ath9k/rc.c index 9e3649a3d5ca..4f1301881137 100644 --- a/drivers/net/wireless/ath/ath9k/rc.c +++ b/drivers/net/wireless/ath/ath9k/rc.c | |||
| @@ -603,7 +603,8 @@ static u8 ath_rc_setvalid_htrates(struct ath_rate_priv *ath_rc_priv, | |||
| 603 | static u8 ath_rc_get_highest_rix(struct ath_softc *sc, | 603 | static u8 ath_rc_get_highest_rix(struct ath_softc *sc, |
| 604 | struct ath_rate_priv *ath_rc_priv, | 604 | struct ath_rate_priv *ath_rc_priv, |
| 605 | const struct ath_rate_table *rate_table, | 605 | const struct ath_rate_table *rate_table, |
| 606 | int *is_probing) | 606 | int *is_probing, |
| 607 | bool legacy) | ||
| 607 | { | 608 | { |
| 608 | u32 best_thruput, this_thruput, now_msec; | 609 | u32 best_thruput, this_thruput, now_msec; |
| 609 | u8 rate, next_rate, best_rate, maxindex, minindex; | 610 | u8 rate, next_rate, best_rate, maxindex, minindex; |
| @@ -624,6 +625,8 @@ static u8 ath_rc_get_highest_rix(struct ath_softc *sc, | |||
| 624 | u8 per_thres; | 625 | u8 per_thres; |
| 625 | 626 | ||
| 626 | rate = ath_rc_priv->valid_rate_index[index]; | 627 | rate = ath_rc_priv->valid_rate_index[index]; |
| 628 | if (legacy && !(rate_table->info[rate].rate_flags & RC_LEGACY)) | ||
| 629 | continue; | ||
| 627 | if (rate > ath_rc_priv->rate_max_phy) | 630 | if (rate > ath_rc_priv->rate_max_phy) |
| 628 | continue; | 631 | continue; |
| 629 | 632 | ||
| @@ -767,7 +770,7 @@ static void ath_get_rate(void *priv, struct ieee80211_sta *sta, void *priv_sta, | |||
| 767 | struct ieee80211_tx_rate *rates = tx_info->control.rates; | 770 | struct ieee80211_tx_rate *rates = tx_info->control.rates; |
| 768 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; | 771 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; |
| 769 | __le16 fc = hdr->frame_control; | 772 | __le16 fc = hdr->frame_control; |
| 770 | u8 try_per_rate, i = 0, rix; | 773 | u8 try_per_rate, i = 0, rix, high_rix; |
| 771 | int is_probe = 0; | 774 | int is_probe = 0; |
| 772 | 775 | ||
| 773 | if (rate_control_send_low(sta, priv_sta, txrc)) | 776 | if (rate_control_send_low(sta, priv_sta, txrc)) |
| @@ -786,7 +789,9 @@ static void ath_get_rate(void *priv, struct ieee80211_sta *sta, void *priv_sta, | |||
| 786 | try_per_rate = 4; | 789 | try_per_rate = 4; |
| 787 | 790 | ||
| 788 | rate_table = ath_rc_priv->rate_table; | 791 | rate_table = ath_rc_priv->rate_table; |
| 789 | rix = ath_rc_get_highest_rix(sc, ath_rc_priv, rate_table, &is_probe); | 792 | rix = ath_rc_get_highest_rix(sc, ath_rc_priv, rate_table, |
| 793 | &is_probe, false); | ||
| 794 | high_rix = rix; | ||
| 790 | 795 | ||
| 791 | /* | 796 | /* |
| 792 | * If we're in HT mode and both us and our peer supports LDPC. | 797 | * If we're in HT mode and both us and our peer supports LDPC. |
| @@ -822,10 +827,7 @@ static void ath_get_rate(void *priv, struct ieee80211_sta *sta, void *priv_sta, | |||
| 822 | } | 827 | } |
| 823 | 828 | ||
| 824 | /* Fill in the other rates for multirate retry */ | 829 | /* Fill in the other rates for multirate retry */ |
| 825 | for ( ; i < 4; i++) { | 830 | for ( ; i < 3; i++) { |
| 826 | /* Use twice the number of tries for the last MRR segment. */ | ||
| 827 | if (i + 1 == 4) | ||
| 828 | try_per_rate = 8; | ||
| 829 | 831 | ||
| 830 | ath_rc_get_lower_rix(rate_table, ath_rc_priv, rix, &rix); | 832 | ath_rc_get_lower_rix(rate_table, ath_rc_priv, rix, &rix); |
| 831 | /* All other rates in the series have RTS enabled */ | 833 | /* All other rates in the series have RTS enabled */ |
| @@ -833,6 +835,24 @@ static void ath_get_rate(void *priv, struct ieee80211_sta *sta, void *priv_sta, | |||
| 833 | try_per_rate, rix, 1); | 835 | try_per_rate, rix, 1); |
| 834 | } | 836 | } |
| 835 | 837 | ||
| 838 | /* Use twice the number of tries for the last MRR segment. */ | ||
| 839 | try_per_rate = 8; | ||
| 840 | |||
| 841 | /* | ||
| 842 | * Use a legacy rate as last retry to ensure that the frame | ||
| 843 | * is tried in both MCS and legacy rates. | ||
| 844 | */ | ||
| 845 | if ((rates[2].flags & IEEE80211_TX_RC_MCS) && | ||
| 846 | (!(tx_info->flags & IEEE80211_TX_CTL_AMPDU) || | ||
| 847 | (ath_rc_priv->per[high_rix] > 45))) | ||
| 848 | rix = ath_rc_get_highest_rix(sc, ath_rc_priv, rate_table, | ||
| 849 | &is_probe, true); | ||
| 850 | else | ||
| 851 | ath_rc_get_lower_rix(rate_table, ath_rc_priv, rix, &rix); | ||
| 852 | |||
| 853 | /* All other rates in the series have RTS enabled */ | ||
| 854 | ath_rc_rate_set_series(rate_table, &rates[i], txrc, | ||
| 855 | try_per_rate, rix, 1); | ||
| 836 | /* | 856 | /* |
| 837 | * NB:Change rate series to enable aggregation when operating | 857 | * NB:Change rate series to enable aggregation when operating |
| 838 | * at lower MCS rates. When first rate in series is MCS2 | 858 | * at lower MCS rates. When first rate in series is MCS2 |
diff --git a/drivers/net/wireless/ath/ath9k/recv.c b/drivers/net/wireless/ath/ath9k/recv.c index 74094022b654..ad5f9bd2f0b9 100644 --- a/drivers/net/wireless/ath/ath9k/recv.c +++ b/drivers/net/wireless/ath/ath9k/recv.c | |||
| @@ -761,7 +761,7 @@ static struct ath_buf *ath_get_next_rx_buf(struct ath_softc *sc, | |||
| 761 | * on. All this is necessary because of our use of | 761 | * on. All this is necessary because of our use of |
| 762 | * a self-linked list to avoid rx overruns. | 762 | * a self-linked list to avoid rx overruns. |
| 763 | */ | 763 | */ |
| 764 | ret = ath9k_hw_rxprocdesc(ah, ds, rs, 0); | 764 | ret = ath9k_hw_rxprocdesc(ah, ds, rs); |
| 765 | if (ret == -EINPROGRESS) { | 765 | if (ret == -EINPROGRESS) { |
| 766 | struct ath_rx_status trs; | 766 | struct ath_rx_status trs; |
| 767 | struct ath_buf *tbf; | 767 | struct ath_buf *tbf; |
| @@ -787,7 +787,7 @@ static struct ath_buf *ath_get_next_rx_buf(struct ath_softc *sc, | |||
| 787 | */ | 787 | */ |
| 788 | 788 | ||
| 789 | tds = tbf->bf_desc; | 789 | tds = tbf->bf_desc; |
| 790 | ret = ath9k_hw_rxprocdesc(ah, tds, &trs, 0); | 790 | ret = ath9k_hw_rxprocdesc(ah, tds, &trs); |
| 791 | if (ret == -EINPROGRESS) | 791 | if (ret == -EINPROGRESS) |
| 792 | return NULL; | 792 | return NULL; |
| 793 | } | 793 | } |
| @@ -824,7 +824,8 @@ static bool ath9k_rx_accept(struct ath_common *common, | |||
| 824 | is_mc = !!is_multicast_ether_addr(hdr->addr1); | 824 | is_mc = !!is_multicast_ether_addr(hdr->addr1); |
| 825 | is_valid_tkip = rx_stats->rs_keyix != ATH9K_RXKEYIX_INVALID && | 825 | is_valid_tkip = rx_stats->rs_keyix != ATH9K_RXKEYIX_INVALID && |
| 826 | test_bit(rx_stats->rs_keyix, common->tkip_keymap); | 826 | test_bit(rx_stats->rs_keyix, common->tkip_keymap); |
| 827 | strip_mic = is_valid_tkip && !(rx_stats->rs_status & | 827 | strip_mic = is_valid_tkip && ieee80211_is_data(fc) && |
| 828 | !(rx_stats->rs_status & | ||
| 828 | (ATH9K_RXERR_DECRYPT | ATH9K_RXERR_CRC | ATH9K_RXERR_MIC)); | 829 | (ATH9K_RXERR_DECRYPT | ATH9K_RXERR_CRC | ATH9K_RXERR_MIC)); |
| 829 | 830 | ||
| 830 | if (!rx_stats->rs_datalen) | 831 | if (!rx_stats->rs_datalen) |
| @@ -1978,5 +1979,10 @@ requeue: | |||
| 1978 | 1979 | ||
| 1979 | spin_unlock_bh(&sc->rx.rxbuflock); | 1980 | spin_unlock_bh(&sc->rx.rxbuflock); |
| 1980 | 1981 | ||
| 1982 | if (!(ah->imask & ATH9K_INT_RXEOL)) { | ||
| 1983 | ah->imask |= (ATH9K_INT_RXEOL | ATH9K_INT_RXORN); | ||
| 1984 | ath9k_hw_set_interrupts(ah, ah->imask); | ||
| 1985 | } | ||
| 1986 | |||
| 1981 | return 0; | 1987 | return 0; |
| 1982 | } | 1988 | } |
diff --git a/drivers/net/wireless/ath/ath9k/reg.h b/drivers/net/wireless/ath/ath9k/reg.h index fa4c0bbce6b9..a3b8bbc6c063 100644 --- a/drivers/net/wireless/ath/ath9k/reg.h +++ b/drivers/net/wireless/ath/ath9k/reg.h | |||
| @@ -793,6 +793,8 @@ | |||
| 793 | #define AR_SREV_REVISION_9485_10 0 | 793 | #define AR_SREV_REVISION_9485_10 0 |
| 794 | #define AR_SREV_REVISION_9485_11 1 | 794 | #define AR_SREV_REVISION_9485_11 1 |
| 795 | #define AR_SREV_VERSION_9340 0x300 | 795 | #define AR_SREV_VERSION_9340 0x300 |
| 796 | #define AR_SREV_VERSION_9580 0x1C0 | ||
| 797 | #define AR_SREV_REVISION_9580_10 4 /* AR9580 1.0 */ | ||
| 796 | 798 | ||
| 797 | #define AR_SREV_5416(_ah) \ | 799 | #define AR_SREV_5416(_ah) \ |
| 798 | (((_ah)->hw_version.macVersion == AR_SREV_VERSION_5416_PCI) || \ | 800 | (((_ah)->hw_version.macVersion == AR_SREV_VERSION_5416_PCI) || \ |
| @@ -893,6 +895,18 @@ | |||
| 893 | (AR_SREV_9285_12_OR_LATER(_ah) && \ | 895 | (AR_SREV_9285_12_OR_LATER(_ah) && \ |
| 894 | ((REG_READ(_ah, AR_AN_SYNTH9) & 0x7) == 0x1)) | 896 | ((REG_READ(_ah, AR_AN_SYNTH9) & 0x7) == 0x1)) |
| 895 | 897 | ||
| 898 | #define AR_SREV_9580(_ah) \ | ||
| 899 | (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9580) && \ | ||
| 900 | ((_ah)->hw_version.macRev >= AR_SREV_REVISION_9580_10)) | ||
| 901 | |||
| 902 | #define AR_SREV_9580_10(_ah) \ | ||
| 903 | (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9580) && \ | ||
| 904 | ((_ah)->hw_version.macRev == AR_SREV_REVISION_9580_10)) | ||
| 905 | |||
| 906 | /* NOTE: When adding chips newer than Peacock, add chip check here */ | ||
| 907 | #define AR_SREV_9580_10_OR_LATER(_ah) \ | ||
| 908 | (AR_SREV_9580(_ah)) | ||
| 909 | |||
| 896 | enum ath_usb_dev { | 910 | enum ath_usb_dev { |
| 897 | AR9280_USB = 1, /* AR7010 + AR9280, UB94 */ | 911 | AR9280_USB = 1, /* AR7010 + AR9280, UB94 */ |
| 898 | AR9287_USB = 2, /* AR7010 + AR9287, UB95 */ | 912 | AR9287_USB = 2, /* AR7010 + AR9287, UB95 */ |
diff --git a/drivers/net/wireless/ath/ath9k/xmit.c b/drivers/net/wireless/ath/ath9k/xmit.c index e1d1e903229b..5e2982938ffc 100644 --- a/drivers/net/wireless/ath/ath9k/xmit.c +++ b/drivers/net/wireless/ath/ath9k/xmit.c | |||
| @@ -571,6 +571,25 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq, | |||
| 571 | ath_reset(sc, false); | 571 | ath_reset(sc, false); |
| 572 | } | 572 | } |
| 573 | 573 | ||
| 574 | static bool ath_lookup_legacy(struct ath_buf *bf) | ||
| 575 | { | ||
| 576 | struct sk_buff *skb; | ||
| 577 | struct ieee80211_tx_info *tx_info; | ||
| 578 | struct ieee80211_tx_rate *rates; | ||
| 579 | int i; | ||
| 580 | |||
| 581 | skb = bf->bf_mpdu; | ||
| 582 | tx_info = IEEE80211_SKB_CB(skb); | ||
| 583 | rates = tx_info->control.rates; | ||
| 584 | |||
| 585 | for (i = 3; i >= 0; i--) { | ||
| 586 | if (!(rates[i].flags & IEEE80211_TX_RC_MCS)) | ||
| 587 | return true; | ||
| 588 | } | ||
| 589 | |||
| 590 | return false; | ||
| 591 | } | ||
| 592 | |||
| 574 | static u32 ath_lookup_rate(struct ath_softc *sc, struct ath_buf *bf, | 593 | static u32 ath_lookup_rate(struct ath_softc *sc, struct ath_buf *bf, |
| 575 | struct ath_atx_tid *tid) | 594 | struct ath_atx_tid *tid) |
| 576 | { | 595 | { |
| @@ -644,8 +663,10 @@ static u32 ath_lookup_rate(struct ath_softc *sc, struct ath_buf *bf, | |||
| 644 | * meet the minimum required mpdudensity. | 663 | * meet the minimum required mpdudensity. |
| 645 | */ | 664 | */ |
| 646 | static int ath_compute_num_delims(struct ath_softc *sc, struct ath_atx_tid *tid, | 665 | static int ath_compute_num_delims(struct ath_softc *sc, struct ath_atx_tid *tid, |
| 647 | struct ath_buf *bf, u16 frmlen) | 666 | struct ath_buf *bf, u16 frmlen, |
| 667 | bool first_subfrm) | ||
| 648 | { | 668 | { |
| 669 | #define FIRST_DESC_NDELIMS 60 | ||
| 649 | struct sk_buff *skb = bf->bf_mpdu; | 670 | struct sk_buff *skb = bf->bf_mpdu; |
| 650 | struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); | 671 | struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); |
| 651 | u32 nsymbits, nsymbols; | 672 | u32 nsymbits, nsymbols; |
| @@ -668,6 +689,13 @@ static int ath_compute_num_delims(struct ath_softc *sc, struct ath_atx_tid *tid, | |||
| 668 | ndelim += ATH_AGGR_ENCRYPTDELIM; | 689 | ndelim += ATH_AGGR_ENCRYPTDELIM; |
| 669 | 690 | ||
| 670 | /* | 691 | /* |
| 692 | * Add delimiter when using RTS/CTS with aggregation | ||
| 693 | * and non enterprise AR9003 card | ||
| 694 | */ | ||
| 695 | if (first_subfrm) | ||
| 696 | ndelim = max(ndelim, FIRST_DESC_NDELIMS); | ||
| 697 | |||
| 698 | /* | ||
| 671 | * Convert desired mpdu density from microeconds to bytes based | 699 | * Convert desired mpdu density from microeconds to bytes based |
| 672 | * on highest rate in rate series (i.e. first rate) to determine | 700 | * on highest rate in rate series (i.e. first rate) to determine |
| 673 | * required minimum length for subframe. Take into account | 701 | * required minimum length for subframe. Take into account |
| @@ -741,7 +769,8 @@ static enum ATH_AGGR_STATUS ath_tx_form_aggr(struct ath_softc *sc, | |||
| 741 | al_delta = ATH_AGGR_DELIM_SZ + fi->framelen; | 769 | al_delta = ATH_AGGR_DELIM_SZ + fi->framelen; |
| 742 | 770 | ||
| 743 | if (nframes && | 771 | if (nframes && |
| 744 | (aggr_limit < (al + bpad + al_delta + prev_al))) { | 772 | ((aggr_limit < (al + bpad + al_delta + prev_al)) || |
| 773 | ath_lookup_legacy(bf))) { | ||
| 745 | status = ATH_AGGR_LIMITED; | 774 | status = ATH_AGGR_LIMITED; |
| 746 | break; | 775 | break; |
| 747 | } | 776 | } |
| @@ -756,7 +785,6 @@ static enum ATH_AGGR_STATUS ath_tx_form_aggr(struct ath_softc *sc, | |||
| 756 | status = ATH_AGGR_LIMITED; | 785 | status = ATH_AGGR_LIMITED; |
| 757 | break; | 786 | break; |
| 758 | } | 787 | } |
| 759 | nframes++; | ||
| 760 | 788 | ||
| 761 | /* add padding for previous frame to aggregation length */ | 789 | /* add padding for previous frame to aggregation length */ |
| 762 | al += bpad + al_delta; | 790 | al += bpad + al_delta; |
| @@ -765,9 +793,11 @@ static enum ATH_AGGR_STATUS ath_tx_form_aggr(struct ath_softc *sc, | |||
| 765 | * Get the delimiters needed to meet the MPDU | 793 | * Get the delimiters needed to meet the MPDU |
| 766 | * density for this node. | 794 | * density for this node. |
| 767 | */ | 795 | */ |
| 768 | ndelim = ath_compute_num_delims(sc, tid, bf_first, fi->framelen); | 796 | ndelim = ath_compute_num_delims(sc, tid, bf_first, fi->framelen, |
| 797 | !nframes); | ||
| 769 | bpad = PADBYTES(al_delta) + (ndelim << 2); | 798 | bpad = PADBYTES(al_delta) + (ndelim << 2); |
| 770 | 799 | ||
| 800 | nframes++; | ||
| 771 | bf->bf_next = NULL; | 801 | bf->bf_next = NULL; |
| 772 | ath9k_hw_set_desc_link(sc->sc_ah, bf->bf_desc, 0); | 802 | ath9k_hw_set_desc_link(sc->sc_ah, bf->bf_desc, 0); |
| 773 | 803 | ||
| @@ -1574,9 +1604,9 @@ u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate) | |||
| 1574 | { | 1604 | { |
| 1575 | struct ath_hw *ah = sc->sc_ah; | 1605 | struct ath_hw *ah = sc->sc_ah; |
| 1576 | struct ath9k_channel *curchan = ah->curchan; | 1606 | struct ath9k_channel *curchan = ah->curchan; |
| 1577 | if ((sc->sc_flags & SC_OP_ENABLE_APM) && | 1607 | if ((ah->caps.hw_caps & ATH9K_HW_CAP_APM) && |
| 1578 | (curchan->channelFlags & CHANNEL_5GHZ) && | 1608 | (curchan->channelFlags & CHANNEL_5GHZ) && |
| 1579 | (chainmask == 0x7) && (rate < 0x90)) | 1609 | (chainmask == 0x7) && (rate < 0x90)) |
| 1580 | return 0x3; | 1610 | return 0x3; |
| 1581 | else | 1611 | else |
| 1582 | return chainmask; | 1612 | return chainmask; |
diff --git a/drivers/net/wireless/ath/carl9170/Kconfig b/drivers/net/wireless/ath/carl9170/Kconfig index 2d1b821b440d..267d5dcf82dc 100644 --- a/drivers/net/wireless/ath/carl9170/Kconfig +++ b/drivers/net/wireless/ath/carl9170/Kconfig | |||
| @@ -39,3 +39,17 @@ config CARL9170_WPC | |||
| 39 | bool | 39 | bool |
| 40 | depends on CARL9170 && (INPUT = y || INPUT = CARL9170) | 40 | depends on CARL9170 && (INPUT = y || INPUT = CARL9170) |
| 41 | default y | 41 | default y |
| 42 | |||
| 43 | config CARL9170_HWRNG | ||
| 44 | bool "Random number generator" | ||
| 45 | depends on CARL9170 && (HW_RANDOM = y || HW_RANDOM = CARL9170) | ||
| 46 | default n | ||
| 47 | help | ||
| 48 | Provides a hardware random number generator to the kernel. | ||
| 49 | |||
| 50 | SECURITY WARNING: It's relatively easy to eavesdrop all | ||
| 51 | generated random numbers from the transport stream with | ||
| 52 | usbmon [software] or special usb sniffer hardware. | ||
| 53 | |||
| 54 | Say N, unless your setup[i.e.: embedded system] has no | ||
| 55 | other rng source and you can afford to take the risk. | ||
diff --git a/drivers/net/wireless/ath/carl9170/carl9170.h b/drivers/net/wireless/ath/carl9170/carl9170.h index c5427a72a1e2..6cfbb419e2f6 100644 --- a/drivers/net/wireless/ath/carl9170/carl9170.h +++ b/drivers/net/wireless/ath/carl9170/carl9170.h | |||
| @@ -43,6 +43,7 @@ | |||
| 43 | #include <linux/firmware.h> | 43 | #include <linux/firmware.h> |
| 44 | #include <linux/completion.h> | 44 | #include <linux/completion.h> |
| 45 | #include <linux/spinlock.h> | 45 | #include <linux/spinlock.h> |
| 46 | #include <linux/hw_random.h> | ||
| 46 | #include <net/cfg80211.h> | 47 | #include <net/cfg80211.h> |
| 47 | #include <net/mac80211.h> | 48 | #include <net/mac80211.h> |
| 48 | #include <linux/usb.h> | 49 | #include <linux/usb.h> |
| @@ -151,6 +152,7 @@ struct carl9170_sta_tid { | |||
| 151 | #define CARL9170_TX_TIMEOUT 2500 | 152 | #define CARL9170_TX_TIMEOUT 2500 |
| 152 | #define CARL9170_JANITOR_DELAY 128 | 153 | #define CARL9170_JANITOR_DELAY 128 |
| 153 | #define CARL9170_QUEUE_STUCK_TIMEOUT 5500 | 154 | #define CARL9170_QUEUE_STUCK_TIMEOUT 5500 |
| 155 | #define CARL9170_STAT_WORK 30000 | ||
| 154 | 156 | ||
| 155 | #define CARL9170_NUM_TX_AGG_MAX 30 | 157 | #define CARL9170_NUM_TX_AGG_MAX 30 |
| 156 | 158 | ||
| @@ -282,6 +284,7 @@ struct ar9170 { | |||
| 282 | bool rx_stream; | 284 | bool rx_stream; |
| 283 | bool tx_stream; | 285 | bool tx_stream; |
| 284 | bool rx_filter; | 286 | bool rx_filter; |
| 287 | bool hw_counters; | ||
| 285 | unsigned int mem_blocks; | 288 | unsigned int mem_blocks; |
| 286 | unsigned int mem_block_size; | 289 | unsigned int mem_block_size; |
| 287 | unsigned int rx_size; | 290 | unsigned int rx_size; |
| @@ -331,11 +334,21 @@ struct ar9170 { | |||
| 331 | 334 | ||
| 332 | /* PHY */ | 335 | /* PHY */ |
| 333 | struct ieee80211_channel *channel; | 336 | struct ieee80211_channel *channel; |
| 337 | unsigned int num_channels; | ||
| 334 | int noise[4]; | 338 | int noise[4]; |
| 335 | unsigned int chan_fail; | 339 | unsigned int chan_fail; |
| 336 | unsigned int total_chan_fail; | 340 | unsigned int total_chan_fail; |
| 337 | u8 heavy_clip; | 341 | u8 heavy_clip; |
| 338 | u8 ht_settings; | 342 | u8 ht_settings; |
| 343 | struct { | ||
| 344 | u64 active; /* usec */ | ||
| 345 | u64 cca; /* usec */ | ||
| 346 | u64 tx_time; /* usec */ | ||
| 347 | u64 rx_total; | ||
| 348 | u64 rx_overrun; | ||
| 349 | } tally; | ||
| 350 | struct delayed_work stat_work; | ||
| 351 | struct survey_info *survey; | ||
| 339 | 352 | ||
| 340 | /* power calibration data */ | 353 | /* power calibration data */ |
| 341 | u8 power_5G_leg[4]; | 354 | u8 power_5G_leg[4]; |
| @@ -437,6 +450,17 @@ struct ar9170 { | |||
| 437 | unsigned int off_override; | 450 | unsigned int off_override; |
| 438 | bool state; | 451 | bool state; |
| 439 | } ps; | 452 | } ps; |
| 453 | |||
| 454 | #ifdef CONFIG_CARL9170_HWRNG | ||
| 455 | # define CARL9170_HWRNG_CACHE_SIZE CARL9170_MAX_CMD_PAYLOAD_LEN | ||
| 456 | struct { | ||
| 457 | struct hwrng rng; | ||
| 458 | bool initialized; | ||
| 459 | char name[30 + 1]; | ||
| 460 | u16 cache[CARL9170_HWRNG_CACHE_SIZE / sizeof(u16)]; | ||
| 461 | unsigned int cache_idx; | ||
| 462 | } rng; | ||
| 463 | #endif /* CONFIG_CARL9170_HWRNG */ | ||
| 440 | }; | 464 | }; |
| 441 | 465 | ||
| 442 | enum carl9170_ps_off_override_reasons { | 466 | enum carl9170_ps_off_override_reasons { |
diff --git a/drivers/net/wireless/ath/carl9170/cmd.c b/drivers/net/wireless/ath/carl9170/cmd.c index cdfc94c371b4..195dc6538110 100644 --- a/drivers/net/wireless/ath/carl9170/cmd.c +++ b/drivers/net/wireless/ath/carl9170/cmd.c | |||
| @@ -36,6 +36,7 @@ | |||
| 36 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | 36 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
| 37 | */ | 37 | */ |
| 38 | 38 | ||
| 39 | #include <asm/div64.h> | ||
| 39 | #include "carl9170.h" | 40 | #include "carl9170.h" |
| 40 | #include "cmd.h" | 41 | #include "cmd.h" |
| 41 | 42 | ||
| @@ -165,6 +166,39 @@ int carl9170_bcn_ctrl(struct ar9170 *ar, const unsigned int vif_id, | |||
| 165 | return __carl9170_exec_cmd(ar, cmd, true); | 166 | return __carl9170_exec_cmd(ar, cmd, true); |
| 166 | } | 167 | } |
| 167 | 168 | ||
| 169 | int carl9170_collect_tally(struct ar9170 *ar) | ||
| 170 | { | ||
| 171 | struct carl9170_tally_rsp tally; | ||
| 172 | struct survey_info *info; | ||
| 173 | unsigned int tick; | ||
| 174 | int err; | ||
| 175 | |||
| 176 | err = carl9170_exec_cmd(ar, CARL9170_CMD_TALLY, 0, NULL, | ||
| 177 | sizeof(tally), (u8 *)&tally); | ||
| 178 | if (err) | ||
| 179 | return err; | ||
| 180 | |||
| 181 | tick = le32_to_cpu(tally.tick); | ||
| 182 | if (tick) { | ||
| 183 | ar->tally.active += le32_to_cpu(tally.active) / tick; | ||
| 184 | ar->tally.cca += le32_to_cpu(tally.cca) / tick; | ||
| 185 | ar->tally.tx_time += le32_to_cpu(tally.tx_time) / tick; | ||
| 186 | ar->tally.rx_total += le32_to_cpu(tally.rx_total); | ||
| 187 | ar->tally.rx_overrun += le32_to_cpu(tally.rx_overrun); | ||
| 188 | |||
| 189 | if (ar->channel) { | ||
| 190 | info = &ar->survey[ar->channel->hw_value]; | ||
| 191 | info->channel_time = ar->tally.active; | ||
| 192 | info->channel_time_busy = ar->tally.cca; | ||
| 193 | info->channel_time_tx = ar->tally.tx_time; | ||
| 194 | do_div(info->channel_time, 1000); | ||
| 195 | do_div(info->channel_time_busy, 1000); | ||
| 196 | do_div(info->channel_time_tx, 1000); | ||
| 197 | } | ||
| 198 | } | ||
| 199 | return 0; | ||
| 200 | } | ||
| 201 | |||
| 168 | int carl9170_powersave(struct ar9170 *ar, const bool ps) | 202 | int carl9170_powersave(struct ar9170 *ar, const bool ps) |
| 169 | { | 203 | { |
| 170 | struct carl9170_cmd *cmd; | 204 | struct carl9170_cmd *cmd; |
diff --git a/drivers/net/wireless/ath/carl9170/cmd.h b/drivers/net/wireless/ath/carl9170/cmd.h index d5f95bdc75c1..885c42778b8b 100644 --- a/drivers/net/wireless/ath/carl9170/cmd.h +++ b/drivers/net/wireless/ath/carl9170/cmd.h | |||
| @@ -50,6 +50,7 @@ int carl9170_echo_test(struct ar9170 *ar, u32 v); | |||
| 50 | int carl9170_reboot(struct ar9170 *ar); | 50 | int carl9170_reboot(struct ar9170 *ar); |
| 51 | int carl9170_mac_reset(struct ar9170 *ar); | 51 | int carl9170_mac_reset(struct ar9170 *ar); |
| 52 | int carl9170_powersave(struct ar9170 *ar, const bool power_on); | 52 | int carl9170_powersave(struct ar9170 *ar, const bool power_on); |
| 53 | int carl9170_collect_tally(struct ar9170 *ar); | ||
| 53 | int carl9170_bcn_ctrl(struct ar9170 *ar, const unsigned int vif_id, | 54 | int carl9170_bcn_ctrl(struct ar9170 *ar, const unsigned int vif_id, |
| 54 | const u32 mode, const u32 addr, const u32 len); | 55 | const u32 mode, const u32 addr, const u32 len); |
| 55 | 56 | ||
diff --git a/drivers/net/wireless/ath/carl9170/fw.c b/drivers/net/wireless/ath/carl9170/fw.c index 39ddea5794f7..f4cae1cccbff 100644 --- a/drivers/net/wireless/ath/carl9170/fw.c +++ b/drivers/net/wireless/ath/carl9170/fw.c | |||
| @@ -266,6 +266,9 @@ static int carl9170_fw(struct ar9170 *ar, const __u8 *data, size_t len) | |||
| 266 | FIF_PROMISC_IN_BSS; | 266 | FIF_PROMISC_IN_BSS; |
| 267 | } | 267 | } |
| 268 | 268 | ||
| 269 | if (SUPP(CARL9170FW_HW_COUNTERS)) | ||
| 270 | ar->fw.hw_counters = true; | ||
| 271 | |||
| 269 | if (SUPP(CARL9170FW_WOL)) | 272 | if (SUPP(CARL9170FW_WOL)) |
| 270 | device_set_wakeup_enable(&ar->udev->dev, true); | 273 | device_set_wakeup_enable(&ar->udev->dev, true); |
| 271 | 274 | ||
diff --git a/drivers/net/wireless/ath/carl9170/fwcmd.h b/drivers/net/wireless/ath/carl9170/fwcmd.h index 0a6dec529b59..9443c802b25b 100644 --- a/drivers/net/wireless/ath/carl9170/fwcmd.h +++ b/drivers/net/wireless/ath/carl9170/fwcmd.h | |||
| @@ -55,6 +55,7 @@ enum carl9170_cmd_oids { | |||
| 55 | CARL9170_CMD_READ_TSF = 0x06, | 55 | CARL9170_CMD_READ_TSF = 0x06, |
| 56 | CARL9170_CMD_RX_FILTER = 0x07, | 56 | CARL9170_CMD_RX_FILTER = 0x07, |
| 57 | CARL9170_CMD_WOL = 0x08, | 57 | CARL9170_CMD_WOL = 0x08, |
| 58 | CARL9170_CMD_TALLY = 0x09, | ||
| 58 | 59 | ||
| 59 | /* CAM */ | 60 | /* CAM */ |
| 60 | CARL9170_CMD_EKEY = 0x10, | 61 | CARL9170_CMD_EKEY = 0x10, |
| @@ -286,6 +287,15 @@ struct carl9170_tsf_rsp { | |||
| 286 | } __packed; | 287 | } __packed; |
| 287 | #define CARL9170_TSF_RSP_SIZE 8 | 288 | #define CARL9170_TSF_RSP_SIZE 8 |
| 288 | 289 | ||
| 290 | struct carl9170_tally_rsp { | ||
| 291 | __le32 active; | ||
| 292 | __le32 cca; | ||
| 293 | __le32 tx_time; | ||
| 294 | __le32 rx_total; | ||
| 295 | __le32 rx_overrun; | ||
| 296 | __le32 tick; | ||
| 297 | } __packed; | ||
| 298 | |||
| 289 | struct carl9170_rsp { | 299 | struct carl9170_rsp { |
| 290 | struct carl9170_cmd_head hdr; | 300 | struct carl9170_cmd_head hdr; |
| 291 | 301 | ||
| @@ -300,6 +310,7 @@ struct carl9170_rsp { | |||
| 300 | struct carl9170_gpio gpio; | 310 | struct carl9170_gpio gpio; |
| 301 | struct carl9170_tsf_rsp tsf; | 311 | struct carl9170_tsf_rsp tsf; |
| 302 | struct carl9170_psm psm; | 312 | struct carl9170_psm psm; |
| 313 | struct carl9170_tally_rsp tally; | ||
| 303 | u8 data[CARL9170_MAX_CMD_PAYLOAD_LEN]; | 314 | u8 data[CARL9170_MAX_CMD_PAYLOAD_LEN]; |
| 304 | } __packed; | 315 | } __packed; |
| 305 | } __packed __aligned(4); | 316 | } __packed __aligned(4); |
diff --git a/drivers/net/wireless/ath/carl9170/main.c b/drivers/net/wireless/ath/carl9170/main.c index 0122930b14c7..782b8f3ae58f 100644 --- a/drivers/net/wireless/ath/carl9170/main.c +++ b/drivers/net/wireless/ath/carl9170/main.c | |||
| @@ -413,6 +413,9 @@ static int carl9170_op_start(struct ieee80211_hw *hw) | |||
| 413 | 413 | ||
| 414 | carl9170_set_state_when(ar, CARL9170_IDLE, CARL9170_STARTED); | 414 | carl9170_set_state_when(ar, CARL9170_IDLE, CARL9170_STARTED); |
| 415 | 415 | ||
| 416 | ieee80211_queue_delayed_work(ar->hw, &ar->stat_work, | ||
| 417 | round_jiffies(msecs_to_jiffies(CARL9170_STAT_WORK))); | ||
| 418 | |||
| 416 | ieee80211_wake_queues(ar->hw); | 419 | ieee80211_wake_queues(ar->hw); |
| 417 | err = 0; | 420 | err = 0; |
| 418 | 421 | ||
| @@ -423,6 +426,7 @@ out: | |||
| 423 | 426 | ||
| 424 | static void carl9170_cancel_worker(struct ar9170 *ar) | 427 | static void carl9170_cancel_worker(struct ar9170 *ar) |
| 425 | { | 428 | { |
| 429 | cancel_delayed_work_sync(&ar->stat_work); | ||
| 426 | cancel_delayed_work_sync(&ar->tx_janitor); | 430 | cancel_delayed_work_sync(&ar->tx_janitor); |
| 427 | #ifdef CONFIG_CARL9170_LEDS | 431 | #ifdef CONFIG_CARL9170_LEDS |
| 428 | cancel_delayed_work_sync(&ar->led_work); | 432 | cancel_delayed_work_sync(&ar->led_work); |
| @@ -794,6 +798,43 @@ static void carl9170_ps_work(struct work_struct *work) | |||
| 794 | mutex_unlock(&ar->mutex); | 798 | mutex_unlock(&ar->mutex); |
| 795 | } | 799 | } |
| 796 | 800 | ||
| 801 | static int carl9170_update_survey(struct ar9170 *ar, bool flush, bool noise) | ||
| 802 | { | ||
| 803 | int err; | ||
| 804 | |||
| 805 | if (noise) { | ||
| 806 | err = carl9170_get_noisefloor(ar); | ||
| 807 | if (err) | ||
| 808 | return err; | ||
| 809 | } | ||
| 810 | |||
| 811 | if (ar->fw.hw_counters) { | ||
| 812 | err = carl9170_collect_tally(ar); | ||
| 813 | if (err) | ||
| 814 | return err; | ||
| 815 | } | ||
| 816 | |||
| 817 | if (flush) | ||
| 818 | memset(&ar->tally, 0, sizeof(ar->tally)); | ||
| 819 | |||
| 820 | return 0; | ||
| 821 | } | ||
| 822 | |||
| 823 | static void carl9170_stat_work(struct work_struct *work) | ||
| 824 | { | ||
| 825 | struct ar9170 *ar = container_of(work, struct ar9170, stat_work.work); | ||
| 826 | int err; | ||
| 827 | |||
| 828 | mutex_lock(&ar->mutex); | ||
| 829 | err = carl9170_update_survey(ar, false, true); | ||
| 830 | mutex_unlock(&ar->mutex); | ||
| 831 | |||
| 832 | if (err) | ||
| 833 | return; | ||
| 834 | |||
| 835 | ieee80211_queue_delayed_work(ar->hw, &ar->stat_work, | ||
| 836 | round_jiffies(msecs_to_jiffies(CARL9170_STAT_WORK))); | ||
| 837 | } | ||
| 797 | 838 | ||
| 798 | static int carl9170_op_config(struct ieee80211_hw *hw, u32 changed) | 839 | static int carl9170_op_config(struct ieee80211_hw *hw, u32 changed) |
| 799 | { | 840 | { |
| @@ -828,11 +869,19 @@ static int carl9170_op_config(struct ieee80211_hw *hw, u32 changed) | |||
| 828 | if (err) | 869 | if (err) |
| 829 | goto out; | 870 | goto out; |
| 830 | 871 | ||
| 872 | err = carl9170_update_survey(ar, true, false); | ||
| 873 | if (err) | ||
| 874 | goto out; | ||
| 875 | |||
| 831 | err = carl9170_set_channel(ar, hw->conf.channel, | 876 | err = carl9170_set_channel(ar, hw->conf.channel, |
| 832 | hw->conf.channel_type, CARL9170_RFI_NONE); | 877 | hw->conf.channel_type, CARL9170_RFI_NONE); |
| 833 | if (err) | 878 | if (err) |
| 834 | goto out; | 879 | goto out; |
| 835 | 880 | ||
| 881 | err = carl9170_update_survey(ar, false, true); | ||
| 882 | if (err) | ||
| 883 | goto out; | ||
| 884 | |||
| 836 | err = carl9170_set_dyn_sifs_ack(ar); | 885 | err = carl9170_set_dyn_sifs_ack(ar); |
| 837 | if (err) | 886 | if (err) |
| 838 | goto out; | 887 | goto out; |
| @@ -1419,24 +1468,159 @@ static int carl9170_register_wps_button(struct ar9170 *ar) | |||
| 1419 | } | 1468 | } |
| 1420 | #endif /* CONFIG_CARL9170_WPC */ | 1469 | #endif /* CONFIG_CARL9170_WPC */ |
| 1421 | 1470 | ||
| 1422 | static int carl9170_op_get_survey(struct ieee80211_hw *hw, int idx, | 1471 | #ifdef CONFIG_CARL9170_HWRNG |
| 1423 | struct survey_info *survey) | 1472 | static int carl9170_rng_get(struct ar9170 *ar) |
| 1424 | { | 1473 | { |
| 1425 | struct ar9170 *ar = hw->priv; | 1474 | |
| 1475 | #define RW (CARL9170_MAX_CMD_PAYLOAD_LEN / sizeof(u32)) | ||
| 1476 | #define RB (CARL9170_MAX_CMD_PAYLOAD_LEN) | ||
| 1477 | |||
| 1478 | static const __le32 rng_load[RW] = { | ||
| 1479 | [0 ... (RW - 1)] = cpu_to_le32(AR9170_RAND_REG_NUM)}; | ||
| 1480 | |||
| 1481 | u32 buf[RW]; | ||
| 1482 | |||
| 1483 | unsigned int i, off = 0, transfer, count; | ||
| 1426 | int err; | 1484 | int err; |
| 1427 | 1485 | ||
| 1428 | if (idx != 0) | 1486 | BUILD_BUG_ON(RB > CARL9170_MAX_CMD_PAYLOAD_LEN); |
| 1429 | return -ENOENT; | 1487 | |
| 1488 | if (!IS_ACCEPTING_CMD(ar) || !ar->rng.initialized) | ||
| 1489 | return -EAGAIN; | ||
| 1490 | |||
| 1491 | count = ARRAY_SIZE(ar->rng.cache); | ||
| 1492 | while (count) { | ||
| 1493 | err = carl9170_exec_cmd(ar, CARL9170_CMD_RREG, | ||
| 1494 | RB, (u8 *) rng_load, | ||
| 1495 | RB, (u8 *) buf); | ||
| 1496 | if (err) | ||
| 1497 | return err; | ||
| 1498 | |||
| 1499 | transfer = min_t(unsigned int, count, RW); | ||
| 1500 | for (i = 0; i < transfer; i++) | ||
| 1501 | ar->rng.cache[off + i] = buf[i]; | ||
| 1502 | |||
| 1503 | off += transfer; | ||
| 1504 | count -= transfer; | ||
| 1505 | } | ||
| 1506 | |||
| 1507 | ar->rng.cache_idx = 0; | ||
| 1508 | |||
| 1509 | #undef RW | ||
| 1510 | #undef RB | ||
| 1511 | return 0; | ||
| 1512 | } | ||
| 1513 | |||
| 1514 | static int carl9170_rng_read(struct hwrng *rng, u32 *data) | ||
| 1515 | { | ||
| 1516 | struct ar9170 *ar = (struct ar9170 *)rng->priv; | ||
| 1517 | int ret = -EIO; | ||
| 1430 | 1518 | ||
| 1431 | mutex_lock(&ar->mutex); | 1519 | mutex_lock(&ar->mutex); |
| 1432 | err = carl9170_get_noisefloor(ar); | 1520 | if (ar->rng.cache_idx >= ARRAY_SIZE(ar->rng.cache)) { |
| 1521 | ret = carl9170_rng_get(ar); | ||
| 1522 | if (ret) { | ||
| 1523 | mutex_unlock(&ar->mutex); | ||
| 1524 | return ret; | ||
| 1525 | } | ||
| 1526 | } | ||
| 1527 | |||
| 1528 | *data = ar->rng.cache[ar->rng.cache_idx++]; | ||
| 1433 | mutex_unlock(&ar->mutex); | 1529 | mutex_unlock(&ar->mutex); |
| 1434 | if (err) | 1530 | |
| 1531 | return sizeof(u16); | ||
| 1532 | } | ||
| 1533 | |||
| 1534 | static void carl9170_unregister_hwrng(struct ar9170 *ar) | ||
| 1535 | { | ||
| 1536 | if (ar->rng.initialized) { | ||
| 1537 | hwrng_unregister(&ar->rng.rng); | ||
| 1538 | ar->rng.initialized = false; | ||
| 1539 | } | ||
| 1540 | } | ||
| 1541 | |||
| 1542 | static int carl9170_register_hwrng(struct ar9170 *ar) | ||
| 1543 | { | ||
| 1544 | int err; | ||
| 1545 | |||
| 1546 | snprintf(ar->rng.name, ARRAY_SIZE(ar->rng.name), | ||
| 1547 | "%s_%s", KBUILD_MODNAME, wiphy_name(ar->hw->wiphy)); | ||
| 1548 | ar->rng.rng.name = ar->rng.name; | ||
| 1549 | ar->rng.rng.data_read = carl9170_rng_read; | ||
| 1550 | ar->rng.rng.priv = (unsigned long)ar; | ||
| 1551 | |||
| 1552 | if (WARN_ON(ar->rng.initialized)) | ||
| 1553 | return -EALREADY; | ||
| 1554 | |||
| 1555 | err = hwrng_register(&ar->rng.rng); | ||
| 1556 | if (err) { | ||
| 1557 | dev_err(&ar->udev->dev, "Failed to register the random " | ||
| 1558 | "number generator (%d)\n", err); | ||
| 1435 | return err; | 1559 | return err; |
| 1560 | } | ||
| 1561 | |||
| 1562 | ar->rng.initialized = true; | ||
| 1563 | |||
| 1564 | err = carl9170_rng_get(ar); | ||
| 1565 | if (err) { | ||
| 1566 | carl9170_unregister_hwrng(ar); | ||
| 1567 | return err; | ||
| 1568 | } | ||
| 1569 | |||
| 1570 | return 0; | ||
| 1571 | } | ||
| 1572 | #endif /* CONFIG_CARL9170_HWRNG */ | ||
| 1573 | |||
| 1574 | static int carl9170_op_get_survey(struct ieee80211_hw *hw, int idx, | ||
| 1575 | struct survey_info *survey) | ||
| 1576 | { | ||
| 1577 | struct ar9170 *ar = hw->priv; | ||
| 1578 | struct ieee80211_channel *chan; | ||
| 1579 | struct ieee80211_supported_band *band; | ||
| 1580 | int err, b, i; | ||
| 1581 | |||
| 1582 | chan = ar->channel; | ||
| 1583 | if (!chan) | ||
| 1584 | return -ENODEV; | ||
| 1585 | |||
| 1586 | if (idx == chan->hw_value) { | ||
| 1587 | mutex_lock(&ar->mutex); | ||
| 1588 | err = carl9170_update_survey(ar, false, true); | ||
| 1589 | mutex_unlock(&ar->mutex); | ||
| 1590 | if (err) | ||
| 1591 | return err; | ||
| 1592 | } | ||
| 1593 | |||
| 1594 | for (b = 0; b < IEEE80211_NUM_BANDS; b++) { | ||
| 1595 | band = ar->hw->wiphy->bands[b]; | ||
| 1596 | |||
| 1597 | if (!band) | ||
| 1598 | continue; | ||
| 1599 | |||
| 1600 | for (i = 0; i < band->n_channels; i++) { | ||
| 1601 | if (band->channels[i].hw_value == idx) { | ||
| 1602 | chan = &band->channels[i]; | ||
| 1603 | goto found; | ||
| 1604 | } | ||
| 1605 | } | ||
| 1606 | } | ||
| 1607 | return -ENOENT; | ||
| 1608 | |||
| 1609 | found: | ||
| 1610 | memcpy(survey, &ar->survey[idx], sizeof(*survey)); | ||
| 1436 | 1611 | ||
| 1437 | survey->channel = ar->channel; | 1612 | survey->channel = chan; |
| 1438 | survey->filled = SURVEY_INFO_NOISE_DBM; | 1613 | survey->filled = SURVEY_INFO_NOISE_DBM; |
| 1439 | survey->noise = ar->noise[0]; | 1614 | |
| 1615 | if (ar->channel == chan) | ||
| 1616 | survey->filled |= SURVEY_INFO_IN_USE; | ||
| 1617 | |||
| 1618 | if (ar->fw.hw_counters) { | ||
| 1619 | survey->filled |= SURVEY_INFO_CHANNEL_TIME | | ||
| 1620 | SURVEY_INFO_CHANNEL_TIME_BUSY | | ||
| 1621 | SURVEY_INFO_CHANNEL_TIME_TX; | ||
| 1622 | } | ||
| 1623 | |||
| 1440 | return 0; | 1624 | return 0; |
| 1441 | } | 1625 | } |
| 1442 | 1626 | ||
| @@ -1569,6 +1753,7 @@ void *carl9170_alloc(size_t priv_size) | |||
| 1569 | INIT_WORK(&ar->ping_work, carl9170_ping_work); | 1753 | INIT_WORK(&ar->ping_work, carl9170_ping_work); |
| 1570 | INIT_WORK(&ar->restart_work, carl9170_restart_work); | 1754 | INIT_WORK(&ar->restart_work, carl9170_restart_work); |
| 1571 | INIT_WORK(&ar->ampdu_work, carl9170_ampdu_work); | 1755 | INIT_WORK(&ar->ampdu_work, carl9170_ampdu_work); |
| 1756 | INIT_DELAYED_WORK(&ar->stat_work, carl9170_stat_work); | ||
| 1572 | INIT_DELAYED_WORK(&ar->tx_janitor, carl9170_tx_janitor); | 1757 | INIT_DELAYED_WORK(&ar->tx_janitor, carl9170_tx_janitor); |
| 1573 | INIT_LIST_HEAD(&ar->tx_ampdu_list); | 1758 | INIT_LIST_HEAD(&ar->tx_ampdu_list); |
| 1574 | rcu_assign_pointer(ar->tx_ampdu_iter, | 1759 | rcu_assign_pointer(ar->tx_ampdu_iter, |
| @@ -1652,6 +1837,7 @@ static int carl9170_parse_eeprom(struct ar9170 *ar) | |||
| 1652 | struct ath_regulatory *regulatory = &ar->common.regulatory; | 1837 | struct ath_regulatory *regulatory = &ar->common.regulatory; |
| 1653 | unsigned int rx_streams, tx_streams, tx_params = 0; | 1838 | unsigned int rx_streams, tx_streams, tx_params = 0; |
| 1654 | int bands = 0; | 1839 | int bands = 0; |
| 1840 | int chans = 0; | ||
| 1655 | 1841 | ||
| 1656 | if (ar->eeprom.length == cpu_to_le16(0xffff)) | 1842 | if (ar->eeprom.length == cpu_to_le16(0xffff)) |
| 1657 | return -ENODATA; | 1843 | return -ENODATA; |
| @@ -1675,14 +1861,24 @@ static int carl9170_parse_eeprom(struct ar9170 *ar) | |||
| 1675 | if (ar->eeprom.operating_flags & AR9170_OPFLAG_2GHZ) { | 1861 | if (ar->eeprom.operating_flags & AR9170_OPFLAG_2GHZ) { |
| 1676 | ar->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = | 1862 | ar->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = |
| 1677 | &carl9170_band_2GHz; | 1863 | &carl9170_band_2GHz; |
| 1864 | chans += carl9170_band_2GHz.n_channels; | ||
| 1678 | bands++; | 1865 | bands++; |
| 1679 | } | 1866 | } |
| 1680 | if (ar->eeprom.operating_flags & AR9170_OPFLAG_5GHZ) { | 1867 | if (ar->eeprom.operating_flags & AR9170_OPFLAG_5GHZ) { |
| 1681 | ar->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = | 1868 | ar->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = |
| 1682 | &carl9170_band_5GHz; | 1869 | &carl9170_band_5GHz; |
| 1870 | chans += carl9170_band_5GHz.n_channels; | ||
| 1683 | bands++; | 1871 | bands++; |
| 1684 | } | 1872 | } |
| 1685 | 1873 | ||
| 1874 | if (!bands) | ||
| 1875 | return -EINVAL; | ||
| 1876 | |||
| 1877 | ar->survey = kzalloc(sizeof(struct survey_info) * chans, GFP_KERNEL); | ||
| 1878 | if (!ar->survey) | ||
| 1879 | return -ENOMEM; | ||
| 1880 | ar->num_channels = chans; | ||
| 1881 | |||
| 1686 | /* | 1882 | /* |
| 1687 | * I measured this, a bandswitch takes roughly | 1883 | * I measured this, a bandswitch takes roughly |
| 1688 | * 135 ms and a frequency switch about 80. | 1884 | * 135 ms and a frequency switch about 80. |
| @@ -1701,7 +1897,7 @@ static int carl9170_parse_eeprom(struct ar9170 *ar) | |||
| 1701 | /* second part of wiphy init */ | 1897 | /* second part of wiphy init */ |
| 1702 | SET_IEEE80211_PERM_ADDR(ar->hw, ar->eeprom.mac_address); | 1898 | SET_IEEE80211_PERM_ADDR(ar->hw, ar->eeprom.mac_address); |
| 1703 | 1899 | ||
| 1704 | return bands ? 0 : -EINVAL; | 1900 | return 0; |
| 1705 | } | 1901 | } |
| 1706 | 1902 | ||
| 1707 | static int carl9170_reg_notifier(struct wiphy *wiphy, | 1903 | static int carl9170_reg_notifier(struct wiphy *wiphy, |
| @@ -1785,6 +1981,12 @@ int carl9170_register(struct ar9170 *ar) | |||
| 1785 | goto err_unreg; | 1981 | goto err_unreg; |
| 1786 | #endif /* CONFIG_CARL9170_WPC */ | 1982 | #endif /* CONFIG_CARL9170_WPC */ |
| 1787 | 1983 | ||
| 1984 | #ifdef CONFIG_CARL9170_HWRNG | ||
| 1985 | err = carl9170_register_hwrng(ar); | ||
| 1986 | if (err) | ||
| 1987 | goto err_unreg; | ||
| 1988 | #endif /* CONFIG_CARL9170_HWRNG */ | ||
| 1989 | |||
| 1788 | dev_info(&ar->udev->dev, "Atheros AR9170 is registered as '%s'\n", | 1990 | dev_info(&ar->udev->dev, "Atheros AR9170 is registered as '%s'\n", |
| 1789 | wiphy_name(ar->hw->wiphy)); | 1991 | wiphy_name(ar->hw->wiphy)); |
| 1790 | 1992 | ||
| @@ -1817,6 +2019,10 @@ void carl9170_unregister(struct ar9170 *ar) | |||
| 1817 | } | 2019 | } |
| 1818 | #endif /* CONFIG_CARL9170_WPC */ | 2020 | #endif /* CONFIG_CARL9170_WPC */ |
| 1819 | 2021 | ||
| 2022 | #ifdef CONFIG_CARL9170_HWRNG | ||
| 2023 | carl9170_unregister_hwrng(ar); | ||
| 2024 | #endif /* CONFIG_CARL9170_HWRNG */ | ||
| 2025 | |||
| 1820 | carl9170_cancel_worker(ar); | 2026 | carl9170_cancel_worker(ar); |
| 1821 | cancel_work_sync(&ar->restart_work); | 2027 | cancel_work_sync(&ar->restart_work); |
| 1822 | 2028 | ||
| @@ -1834,6 +2040,9 @@ void carl9170_free(struct ar9170 *ar) | |||
| 1834 | kfree(ar->mem_bitmap); | 2040 | kfree(ar->mem_bitmap); |
| 1835 | ar->mem_bitmap = NULL; | 2041 | ar->mem_bitmap = NULL; |
| 1836 | 2042 | ||
| 2043 | kfree(ar->survey); | ||
| 2044 | ar->survey = NULL; | ||
| 2045 | |||
| 1837 | mutex_destroy(&ar->mutex); | 2046 | mutex_destroy(&ar->mutex); |
| 1838 | 2047 | ||
| 1839 | ieee80211_free_hw(ar->hw); | 2048 | ieee80211_free_hw(ar->hw); |
diff --git a/drivers/net/wireless/ath/carl9170/phy.c b/drivers/net/wireless/ath/carl9170/phy.c index aa147a9120b6..472efc7e3402 100644 --- a/drivers/net/wireless/ath/carl9170/phy.c +++ b/drivers/net/wireless/ath/carl9170/phy.c | |||
| @@ -578,11 +578,10 @@ static int carl9170_init_phy(struct ar9170 *ar, enum ieee80211_band band) | |||
| 578 | if (err) | 578 | if (err) |
| 579 | return err; | 579 | return err; |
| 580 | 580 | ||
| 581 | /* XXX: remove magic! */ | 581 | if (!ar->fw.hw_counters) { |
| 582 | if (is_2ghz) | 582 | err = carl9170_write_reg(ar, AR9170_PWR_REG_PLL_ADDAC, |
| 583 | err = carl9170_write_reg(ar, AR9170_PWR_REG_PLL_ADDAC, 0x5163); | 583 | is_2ghz ? 0x5163 : 0x5143); |
| 584 | else | 584 | } |
| 585 | err = carl9170_write_reg(ar, AR9170_PWR_REG_PLL_ADDAC, 0x5143); | ||
| 586 | 585 | ||
| 587 | return err; | 586 | return err; |
| 588 | } | 587 | } |
| @@ -1574,6 +1573,9 @@ int carl9170_get_noisefloor(struct ar9170 *ar) | |||
| 1574 | AR9170_PHY_EXT_CCA_MIN_PWR, phy_res[i + 2]), 8); | 1573 | AR9170_PHY_EXT_CCA_MIN_PWR, phy_res[i + 2]), 8); |
| 1575 | } | 1574 | } |
| 1576 | 1575 | ||
| 1576 | if (ar->channel) | ||
| 1577 | ar->survey[ar->channel->hw_value].noise = ar->noise[0]; | ||
| 1578 | |||
| 1577 | return 0; | 1579 | return 0; |
| 1578 | } | 1580 | } |
| 1579 | 1581 | ||
| @@ -1766,10 +1768,6 @@ int carl9170_set_channel(struct ar9170 *ar, struct ieee80211_channel *channel, | |||
| 1766 | ar->chan_fail = 0; | 1768 | ar->chan_fail = 0; |
| 1767 | } | 1769 | } |
| 1768 | 1770 | ||
| 1769 | err = carl9170_get_noisefloor(ar); | ||
| 1770 | if (err) | ||
| 1771 | return err; | ||
| 1772 | |||
| 1773 | if (ar->heavy_clip) { | 1771 | if (ar->heavy_clip) { |
| 1774 | err = carl9170_write_reg(ar, AR9170_PHY_REG_HEAVY_CLIP_ENABLE, | 1772 | err = carl9170_write_reg(ar, AR9170_PHY_REG_HEAVY_CLIP_ENABLE, |
| 1775 | 0x200 | ar->heavy_clip); | 1773 | 0x200 | ar->heavy_clip); |
diff --git a/drivers/net/wireless/ath/carl9170/version.h b/drivers/net/wireless/ath/carl9170/version.h index 64703778cfea..e651db856344 100644 --- a/drivers/net/wireless/ath/carl9170/version.h +++ b/drivers/net/wireless/ath/carl9170/version.h | |||
| @@ -1,7 +1,7 @@ | |||
| 1 | #ifndef __CARL9170_SHARED_VERSION_H | 1 | #ifndef __CARL9170_SHARED_VERSION_H |
| 2 | #define __CARL9170_SHARED_VERSION_H | 2 | #define __CARL9170_SHARED_VERSION_H |
| 3 | #define CARL9170FW_VERSION_YEAR 11 | 3 | #define CARL9170FW_VERSION_YEAR 11 |
| 4 | #define CARL9170FW_VERSION_MONTH 6 | 4 | #define CARL9170FW_VERSION_MONTH 8 |
| 5 | #define CARL9170FW_VERSION_DAY 30 | 5 | #define CARL9170FW_VERSION_DAY 15 |
| 6 | #define CARL9170FW_VERSION_GIT "1.9.4" | 6 | #define CARL9170FW_VERSION_GIT "1.9.4" |
| 7 | #endif /* __CARL9170_SHARED_VERSION_H */ | 7 | #endif /* __CARL9170_SHARED_VERSION_H */ |
