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path: root/drivers/net/wireless/ath/ath9k/reg.h
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Diffstat (limited to 'drivers/net/wireless/ath/ath9k/reg.h')
-rw-r--r--drivers/net/wireless/ath/ath9k/reg.h33
1 files changed, 22 insertions, 11 deletions
diff --git a/drivers/net/wireless/ath/ath9k/reg.h b/drivers/net/wireless/ath/ath9k/reg.h
index d83b77f821e9..72cfa8ebd9ae 100644
--- a/drivers/net/wireless/ath/ath9k/reg.h
+++ b/drivers/net/wireless/ath/ath9k/reg.h
@@ -17,6 +17,8 @@
17#ifndef REG_H 17#ifndef REG_H
18#define REG_H 18#define REG_H
19 19
20#include "../reg.h"
21
20#define AR_CR 0x0008 22#define AR_CR 0x0008
21#define AR_CR_RXE 0x00000004 23#define AR_CR_RXE 0x00000004
22#define AR_CR_RXD 0x00000020 24#define AR_CR_RXD 0x00000020
@@ -969,10 +971,10 @@ enum {
969#define AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_S 4 971#define AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_S 4
970#define AR_GPIO_INPUT_EN_VAL_RFSILENT_DEF 0x00000080 972#define AR_GPIO_INPUT_EN_VAL_RFSILENT_DEF 0x00000080
971#define AR_GPIO_INPUT_EN_VAL_RFSILENT_DEF_S 7 973#define AR_GPIO_INPUT_EN_VAL_RFSILENT_DEF_S 7
974#define AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB 0x00000400
975#define AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB_S 10
972#define AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB 0x00001000 976#define AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB 0x00001000
973#define AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB_S 12 977#define AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB_S 12
974#define AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB 0x00001000
975#define AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB_S 1
976#define AR_GPIO_INPUT_EN_VAL_RFSILENT_BB 0x00008000 978#define AR_GPIO_INPUT_EN_VAL_RFSILENT_BB 0x00008000
977#define AR_GPIO_INPUT_EN_VAL_RFSILENT_BB_S 15 979#define AR_GPIO_INPUT_EN_VAL_RFSILENT_BB_S 15
978#define AR_GPIO_RTC_RESET_OVERRIDE_ENABLE 0x00010000 980#define AR_GPIO_RTC_RESET_OVERRIDE_ENABLE 0x00010000
@@ -1330,13 +1332,22 @@ enum {
1330#define AR_MCAST_FIL0 0x8040 1332#define AR_MCAST_FIL0 0x8040
1331#define AR_MCAST_FIL1 0x8044 1333#define AR_MCAST_FIL1 0x8044
1332 1334
1335/*
1336 * AR_DIAG_SW - Register which can be used for diagnostics and testing purposes.
1337 *
1338 * The force RX abort (AR_DIAG_RX_ABORT, bit 25) can be used in conjunction with
1339 * RX block (AR_DIAG_RX_DIS, bit 5) to help fast channel change to shut down
1340 * receive. The force RX abort bit will kill any frame which is currently being
1341 * transferred between the MAC and baseband. The RX block bit (AR_DIAG_RX_DIS)
1342 * will prevent any new frames from getting started.
1343 */
1333#define AR_DIAG_SW 0x8048 1344#define AR_DIAG_SW 0x8048
1334#define AR_DIAG_CACHE_ACK 0x00000001 1345#define AR_DIAG_CACHE_ACK 0x00000001
1335#define AR_DIAG_ACK_DIS 0x00000002 1346#define AR_DIAG_ACK_DIS 0x00000002
1336#define AR_DIAG_CTS_DIS 0x00000004 1347#define AR_DIAG_CTS_DIS 0x00000004
1337#define AR_DIAG_ENCRYPT_DIS 0x00000008 1348#define AR_DIAG_ENCRYPT_DIS 0x00000008
1338#define AR_DIAG_DECRYPT_DIS 0x00000010 1349#define AR_DIAG_DECRYPT_DIS 0x00000010
1339#define AR_DIAG_RX_DIS 0x00000020 1350#define AR_DIAG_RX_DIS 0x00000020 /* RX block */
1340#define AR_DIAG_LOOP_BACK 0x00000040 1351#define AR_DIAG_LOOP_BACK 0x00000040
1341#define AR_DIAG_CORR_FCS 0x00000080 1352#define AR_DIAG_CORR_FCS 0x00000080
1342#define AR_DIAG_CHAN_INFO 0x00000100 1353#define AR_DIAG_CHAN_INFO 0x00000100
@@ -1345,12 +1356,12 @@ enum {
1345#define AR_DIAG_FRAME_NV0 0x00020000 1356#define AR_DIAG_FRAME_NV0 0x00020000
1346#define AR_DIAG_OBS_PT_SEL1 0x000C0000 1357#define AR_DIAG_OBS_PT_SEL1 0x000C0000
1347#define AR_DIAG_OBS_PT_SEL1_S 18 1358#define AR_DIAG_OBS_PT_SEL1_S 18
1348#define AR_DIAG_FORCE_RX_CLEAR 0x00100000 1359#define AR_DIAG_FORCE_RX_CLEAR 0x00100000 /* force rx_clear high */
1349#define AR_DIAG_IGNORE_VIRT_CS 0x00200000 1360#define AR_DIAG_IGNORE_VIRT_CS 0x00200000
1350#define AR_DIAG_FORCE_CH_IDLE_HIGH 0x00400000 1361#define AR_DIAG_FORCE_CH_IDLE_HIGH 0x00400000
1351#define AR_DIAG_EIFS_CTRL_ENA 0x00800000 1362#define AR_DIAG_EIFS_CTRL_ENA 0x00800000
1352#define AR_DIAG_DUAL_CHAIN_INFO 0x01000000 1363#define AR_DIAG_DUAL_CHAIN_INFO 0x01000000
1353#define AR_DIAG_RX_ABORT 0x02000000 1364#define AR_DIAG_RX_ABORT 0x02000000 /* Force RX abort */
1354#define AR_DIAG_SATURATE_CYCLE_CNT 0x04000000 1365#define AR_DIAG_SATURATE_CYCLE_CNT 0x04000000
1355#define AR_DIAG_OBS_PT_SEL2 0x08000000 1366#define AR_DIAG_OBS_PT_SEL2 0x08000000
1356#define AR_DIAG_RX_CLEAR_CTL_LOW 0x10000000 1367#define AR_DIAG_RX_CLEAR_CTL_LOW 0x10000000
@@ -1421,9 +1432,6 @@ enum {
1421#define AR_SLEEP2_BEACON_TIMEOUT 0xFFE00000 1432#define AR_SLEEP2_BEACON_TIMEOUT 0xFFE00000
1422#define AR_SLEEP2_BEACON_TIMEOUT_S 21 1433#define AR_SLEEP2_BEACON_TIMEOUT_S 21
1423 1434
1424#define AR_BSSMSKL 0x80e0
1425#define AR_BSSMSKU 0x80e4
1426
1427#define AR_TPC 0x80e8 1435#define AR_TPC 0x80e8
1428#define AR_TPC_ACK 0x0000003f 1436#define AR_TPC_ACK 0x0000003f
1429#define AR_TPC_ACK_S 0x00 1437#define AR_TPC_ACK_S 0x00
@@ -1539,9 +1547,9 @@ enum {
1539 1547
1540#define AR_BT_COEX_WEIGHT 0x8174 1548#define AR_BT_COEX_WEIGHT 0x8174
1541#define AR_BT_COEX_WGHT 0xff55 1549#define AR_BT_COEX_WGHT 0xff55
1542#define AR_STOMP_ALL_WLAN_WGHT 0xffcc 1550#define AR_STOMP_ALL_WLAN_WGHT 0xfcfc
1543#define AR_STOMP_LOW_WLAN_WGHT 0xaaa8 1551#define AR_STOMP_LOW_WLAN_WGHT 0xa8a8
1544#define AR_STOMP_NONE_WLAN_WGHT 0xaa00 1552#define AR_STOMP_NONE_WLAN_WGHT 0x0000
1545#define AR_BTCOEX_BT_WGHT 0x0000ffff 1553#define AR_BTCOEX_BT_WGHT 0x0000ffff
1546#define AR_BTCOEX_BT_WGHT_S 0 1554#define AR_BTCOEX_BT_WGHT_S 0
1547#define AR_BTCOEX_WL_WGHT 0xffff0000 1555#define AR_BTCOEX_WL_WGHT 0xffff0000
@@ -1705,4 +1713,7 @@ enum {
1705#define AR_KEYTABLE_MAC0(_n) (AR_KEYTABLE(_n) + 24) 1713#define AR_KEYTABLE_MAC0(_n) (AR_KEYTABLE(_n) + 24)
1706#define AR_KEYTABLE_MAC1(_n) (AR_KEYTABLE(_n) + 28) 1714#define AR_KEYTABLE_MAC1(_n) (AR_KEYTABLE(_n) + 28)
1707 1715
1716#define AR9271_CORE_CLOCK 117 /* clock to 117Mhz */
1717#define AR9271_TARGET_BAUD_RATE 19200 /* 115200 */
1718
1708#endif 1719#endif