diff options
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/mac.h')
-rw-r--r-- | drivers/net/wireless/ath/ath9k/mac.h | 45 |
1 files changed, 12 insertions, 33 deletions
diff --git a/drivers/net/wireless/ath/ath9k/mac.h b/drivers/net/wireless/ath/ath9k/mac.h index 2633896d3998..8e848c4d16ba 100644 --- a/drivers/net/wireless/ath/ath9k/mac.h +++ b/drivers/net/wireless/ath/ath9k/mac.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2008-2009 Atheros Communications Inc. | 2 | * Copyright (c) 2008-2011 Atheros Communications Inc. |
3 | * | 3 | * |
4 | * Permission to use, copy, modify, and/or distribute this software for any | 4 | * Permission to use, copy, modify, and/or distribute this software for any |
5 | * purpose with or without fee is hereby granted, provided that the above | 5 | * purpose with or without fee is hereby granted, provided that the above |
@@ -104,13 +104,11 @@ struct ath_tx_status { | |||
104 | u32 ts_tstamp; | 104 | u32 ts_tstamp; |
105 | u16 ts_seqnum; | 105 | u16 ts_seqnum; |
106 | u8 ts_status; | 106 | u8 ts_status; |
107 | u8 ts_ratecode; | ||
108 | u8 ts_rateindex; | 107 | u8 ts_rateindex; |
109 | int8_t ts_rssi; | 108 | int8_t ts_rssi; |
110 | u8 ts_shortretry; | 109 | u8 ts_shortretry; |
111 | u8 ts_longretry; | 110 | u8 ts_longretry; |
112 | u8 ts_virtcol; | 111 | u8 ts_virtcol; |
113 | u8 ts_antenna; | ||
114 | u8 ts_flags; | 112 | u8 ts_flags; |
115 | int8_t ts_rssi_ctl0; | 113 | int8_t ts_rssi_ctl0; |
116 | int8_t ts_rssi_ctl1; | 114 | int8_t ts_rssi_ctl1; |
@@ -121,7 +119,6 @@ struct ath_tx_status { | |||
121 | u8 qid; | 119 | u8 qid; |
122 | u16 desc_id; | 120 | u16 desc_id; |
123 | u8 tid; | 121 | u8 tid; |
124 | u8 pad[2]; | ||
125 | u32 ba_low; | 122 | u32 ba_low; |
126 | u32 ba_high; | 123 | u32 ba_high; |
127 | u32 evm0; | 124 | u32 evm0; |
@@ -240,9 +237,8 @@ struct ath_desc { | |||
240 | u32 ds_ctl1; | 237 | u32 ds_ctl1; |
241 | u32 ds_hw[20]; | 238 | u32 ds_hw[20]; |
242 | void *ds_vdata; | 239 | void *ds_vdata; |
243 | } __packed; | 240 | } __packed __aligned(4); |
244 | 241 | ||
245 | #define ATH9K_TXDESC_CLRDMASK 0x0001 | ||
246 | #define ATH9K_TXDESC_NOACK 0x0002 | 242 | #define ATH9K_TXDESC_NOACK 0x0002 |
247 | #define ATH9K_TXDESC_RTSENA 0x0004 | 243 | #define ATH9K_TXDESC_RTSENA 0x0004 |
248 | #define ATH9K_TXDESC_CTSENA 0x0008 | 244 | #define ATH9K_TXDESC_CTSENA 0x0008 |
@@ -310,7 +306,7 @@ struct ar5416_desc { | |||
310 | u32 status8; | 306 | u32 status8; |
311 | } rx; | 307 | } rx; |
312 | } u; | 308 | } u; |
313 | } __packed; | 309 | } __packed __aligned(4); |
314 | 310 | ||
315 | #define AR5416DESC(_ds) ((struct ar5416_desc *)(_ds)) | 311 | #define AR5416DESC(_ds) ((struct ar5416_desc *)(_ds)) |
316 | #define AR5416DESC_CONST(_ds) ((const struct ar5416_desc *)(_ds)) | 312 | #define AR5416DESC_CONST(_ds) ((const struct ar5416_desc *)(_ds)) |
@@ -642,6 +638,8 @@ enum ath9k_rx_filter { | |||
642 | ATH9K_RX_FILTER_PHYERR = 0x00000100, | 638 | ATH9K_RX_FILTER_PHYERR = 0x00000100, |
643 | ATH9K_RX_FILTER_MYBEACON = 0x00000200, | 639 | ATH9K_RX_FILTER_MYBEACON = 0x00000200, |
644 | ATH9K_RX_FILTER_COMP_BAR = 0x00000400, | 640 | ATH9K_RX_FILTER_COMP_BAR = 0x00000400, |
641 | ATH9K_RX_FILTER_COMP_BA = 0x00000800, | ||
642 | ATH9K_RX_FILTER_UNCOMP_BA_BAR = 0x00001000, | ||
645 | ATH9K_RX_FILTER_PSPOLL = 0x00004000, | 643 | ATH9K_RX_FILTER_PSPOLL = 0x00004000, |
646 | ATH9K_RX_FILTER_PHYRADAR = 0x00002000, | 644 | ATH9K_RX_FILTER_PHYRADAR = 0x00002000, |
647 | ATH9K_RX_FILTER_MCAST_BCAST_ALL = 0x00008000, | 645 | ATH9K_RX_FILTER_MCAST_BCAST_ALL = 0x00008000, |
@@ -660,17 +658,6 @@ struct ath9k_11n_rate_series { | |||
660 | u32 RateFlags; | 658 | u32 RateFlags; |
661 | }; | 659 | }; |
662 | 660 | ||
663 | struct ath9k_keyval { | ||
664 | u8 kv_type; | ||
665 | u8 kv_pad; | ||
666 | u16 kv_len; | ||
667 | u8 kv_val[16]; /* TK */ | ||
668 | u8 kv_mic[8]; /* Michael MIC key */ | ||
669 | u8 kv_txmic[8]; /* Michael MIC TX key (used only if the hardware | ||
670 | * supports both MIC keys in the same key cache entry; | ||
671 | * in that case, kv_mic is the RX key) */ | ||
672 | }; | ||
673 | |||
674 | enum ath9k_key_type { | 661 | enum ath9k_key_type { |
675 | ATH9K_KEY_TYPE_CLEAR, | 662 | ATH9K_KEY_TYPE_CLEAR, |
676 | ATH9K_KEY_TYPE_WEP, | 663 | ATH9K_KEY_TYPE_WEP, |
@@ -678,18 +665,9 @@ enum ath9k_key_type { | |||
678 | ATH9K_KEY_TYPE_TKIP, | 665 | ATH9K_KEY_TYPE_TKIP, |
679 | }; | 666 | }; |
680 | 667 | ||
681 | enum ath9k_cipher { | ||
682 | ATH9K_CIPHER_WEP = 0, | ||
683 | ATH9K_CIPHER_AES_OCB = 1, | ||
684 | ATH9K_CIPHER_AES_CCM = 2, | ||
685 | ATH9K_CIPHER_CKIP = 3, | ||
686 | ATH9K_CIPHER_TKIP = 4, | ||
687 | ATH9K_CIPHER_CLR = 5, | ||
688 | ATH9K_CIPHER_MIC = 127 | ||
689 | }; | ||
690 | |||
691 | struct ath_hw; | 668 | struct ath_hw; |
692 | struct ath9k_channel; | 669 | struct ath9k_channel; |
670 | enum ath9k_int; | ||
693 | 671 | ||
694 | u32 ath9k_hw_gettxbuf(struct ath_hw *ah, u32 q); | 672 | u32 ath9k_hw_gettxbuf(struct ath_hw *ah, u32 q); |
695 | void ath9k_hw_puttxbuf(struct ath_hw *ah, u32 q, u32 txdp); | 673 | void ath9k_hw_puttxbuf(struct ath_hw *ah, u32 q, u32 txdp); |
@@ -697,7 +675,8 @@ void ath9k_hw_txstart(struct ath_hw *ah, u32 q); | |||
697 | void ath9k_hw_cleartxdesc(struct ath_hw *ah, void *ds); | 675 | void ath9k_hw_cleartxdesc(struct ath_hw *ah, void *ds); |
698 | u32 ath9k_hw_numtxpending(struct ath_hw *ah, u32 q); | 676 | u32 ath9k_hw_numtxpending(struct ath_hw *ah, u32 q); |
699 | bool ath9k_hw_updatetxtriglevel(struct ath_hw *ah, bool bIncTrigLevel); | 677 | bool ath9k_hw_updatetxtriglevel(struct ath_hw *ah, bool bIncTrigLevel); |
700 | bool ath9k_hw_stoptxdma(struct ath_hw *ah, u32 q); | 678 | bool ath9k_hw_stop_dma_queue(struct ath_hw *ah, u32 q); |
679 | void ath9k_hw_abort_tx_dma(struct ath_hw *ah); | ||
701 | void ath9k_hw_gettxintrtxqs(struct ath_hw *ah, u32 *txqs); | 680 | void ath9k_hw_gettxintrtxqs(struct ath_hw *ah, u32 *txqs); |
702 | bool ath9k_hw_set_txq_props(struct ath_hw *ah, int q, | 681 | bool ath9k_hw_set_txq_props(struct ath_hw *ah, int q, |
703 | const struct ath9k_tx_queue_info *qinfo); | 682 | const struct ath9k_tx_queue_info *qinfo); |
@@ -714,15 +693,15 @@ void ath9k_hw_setuprxdesc(struct ath_hw *ah, struct ath_desc *ds, | |||
714 | bool ath9k_hw_setrxabort(struct ath_hw *ah, bool set); | 693 | bool ath9k_hw_setrxabort(struct ath_hw *ah, bool set); |
715 | void ath9k_hw_putrxbuf(struct ath_hw *ah, u32 rxdp); | 694 | void ath9k_hw_putrxbuf(struct ath_hw *ah, u32 rxdp); |
716 | void ath9k_hw_startpcureceive(struct ath_hw *ah, bool is_scanning); | 695 | void ath9k_hw_startpcureceive(struct ath_hw *ah, bool is_scanning); |
717 | void ath9k_hw_stoppcurecv(struct ath_hw *ah); | ||
718 | void ath9k_hw_abortpcurecv(struct ath_hw *ah); | 696 | void ath9k_hw_abortpcurecv(struct ath_hw *ah); |
719 | bool ath9k_hw_stopdmarecv(struct ath_hw *ah); | 697 | bool ath9k_hw_stopdmarecv(struct ath_hw *ah, bool *reset); |
720 | int ath9k_hw_beaconq_setup(struct ath_hw *ah); | 698 | int ath9k_hw_beaconq_setup(struct ath_hw *ah); |
721 | 699 | ||
722 | /* Interrupt Handling */ | 700 | /* Interrupt Handling */ |
723 | bool ath9k_hw_intrpend(struct ath_hw *ah); | 701 | bool ath9k_hw_intrpend(struct ath_hw *ah); |
724 | enum ath9k_int ath9k_hw_set_interrupts(struct ath_hw *ah, | 702 | void ath9k_hw_set_interrupts(struct ath_hw *ah, enum ath9k_int ints); |
725 | enum ath9k_int ints); | 703 | void ath9k_hw_enable_interrupts(struct ath_hw *ah); |
704 | void ath9k_hw_disable_interrupts(struct ath_hw *ah); | ||
726 | 705 | ||
727 | void ar9002_hw_attach_mac_ops(struct ath_hw *ah); | 706 | void ar9002_hw_attach_mac_ops(struct ath_hw *ah); |
728 | 707 | ||