diff options
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/ath9k.h')
-rw-r--r-- | drivers/net/wireless/ath/ath9k/ath9k.h | 330 |
1 files changed, 171 insertions, 159 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ath9k.h b/drivers/net/wireless/ath/ath9k/ath9k.h index 07f26ee7a723..f75068b4b310 100644 --- a/drivers/net/wireless/ath/ath9k/ath9k.h +++ b/drivers/net/wireless/ath/ath9k/ath9k.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2008-2009 Atheros Communications Inc. | 2 | * Copyright (c) 2008-2011 Atheros Communications Inc. |
3 | * | 3 | * |
4 | * Permission to use, copy, modify, and/or distribute this software for any | 4 | * Permission to use, copy, modify, and/or distribute this software for any |
5 | * purpose with or without fee is hereby granted, provided that the above | 5 | * purpose with or without fee is hereby granted, provided that the above |
@@ -62,7 +62,6 @@ struct ath_node; | |||
62 | #define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i)) | 62 | #define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i)) |
63 | 63 | ||
64 | struct ath_config { | 64 | struct ath_config { |
65 | u32 ath_aggr_prot; | ||
66 | u16 txpowlimit; | 65 | u16 txpowlimit; |
67 | u8 cabqReadytime; | 66 | u8 cabqReadytime; |
68 | }; | 67 | }; |
@@ -86,33 +85,19 @@ struct ath_config { | |||
86 | /** | 85 | /** |
87 | * enum buffer_type - Buffer type flags | 86 | * enum buffer_type - Buffer type flags |
88 | * | 87 | * |
89 | * @BUF_HT: Send this buffer using HT capabilities | ||
90 | * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX) | 88 | * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX) |
91 | * @BUF_AGGR: Indicates whether the buffer can be aggregated | 89 | * @BUF_AGGR: Indicates whether the buffer can be aggregated |
92 | * (used in aggregation scheduling) | 90 | * (used in aggregation scheduling) |
93 | * @BUF_RETRY: Indicates whether the buffer is retried | ||
94 | * @BUF_XRETRY: To denote excessive retries of the buffer | 91 | * @BUF_XRETRY: To denote excessive retries of the buffer |
95 | */ | 92 | */ |
96 | enum buffer_type { | 93 | enum buffer_type { |
97 | BUF_HT = BIT(1), | 94 | BUF_AMPDU = BIT(0), |
98 | BUF_AMPDU = BIT(2), | 95 | BUF_AGGR = BIT(1), |
99 | BUF_AGGR = BIT(3), | 96 | BUF_XRETRY = BIT(2), |
100 | BUF_RETRY = BIT(4), | ||
101 | BUF_XRETRY = BIT(5), | ||
102 | }; | 97 | }; |
103 | 98 | ||
104 | #define bf_nframes bf_state.bfs_nframes | ||
105 | #define bf_al bf_state.bfs_al | ||
106 | #define bf_frmlen bf_state.bfs_frmlen | ||
107 | #define bf_retries bf_state.bfs_retries | ||
108 | #define bf_seqno bf_state.bfs_seqno | ||
109 | #define bf_tidno bf_state.bfs_tidno | ||
110 | #define bf_keyix bf_state.bfs_keyix | ||
111 | #define bf_keytype bf_state.bfs_keytype | ||
112 | #define bf_isht(bf) (bf->bf_state.bf_type & BUF_HT) | ||
113 | #define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU) | 99 | #define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU) |
114 | #define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR) | 100 | #define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR) |
115 | #define bf_isretried(bf) (bf->bf_state.bf_type & BUF_RETRY) | ||
116 | #define bf_isxretried(bf) (bf->bf_state.bf_type & BUF_XRETRY) | 101 | #define bf_isxretried(bf) (bf->bf_state.bf_type & BUF_XRETRY) |
117 | 102 | ||
118 | #define ATH_TXSTATUS_RING_SIZE 64 | 103 | #define ATH_TXSTATUS_RING_SIZE 64 |
@@ -134,13 +119,11 @@ void ath_descdma_cleanup(struct ath_softc *sc, struct ath_descdma *dd, | |||
134 | /* RX / TX */ | 119 | /* RX / TX */ |
135 | /***********/ | 120 | /***********/ |
136 | 121 | ||
137 | #define ATH_MAX_ANTENNA 3 | ||
138 | #define ATH_RXBUF 512 | 122 | #define ATH_RXBUF 512 |
139 | #define ATH_TXBUF 512 | 123 | #define ATH_TXBUF 512 |
140 | #define ATH_TXBUF_RESERVE 5 | 124 | #define ATH_TXBUF_RESERVE 5 |
141 | #define ATH_MAX_QDEPTH (ATH_TXBUF / 4 - ATH_TXBUF_RESERVE) | 125 | #define ATH_MAX_QDEPTH (ATH_TXBUF / 4 - ATH_TXBUF_RESERVE) |
142 | #define ATH_TXMAXTRY 13 | 126 | #define ATH_TXMAXTRY 13 |
143 | #define ATH_MGT_TXMAXTRY 4 | ||
144 | 127 | ||
145 | #define TID_TO_WME_AC(_tid) \ | 128 | #define TID_TO_WME_AC(_tid) \ |
146 | ((((_tid) == 0) || ((_tid) == 3)) ? WME_AC_BE : \ | 129 | ((((_tid) == 0) || ((_tid) == 3)) ? WME_AC_BE : \ |
@@ -148,7 +131,6 @@ void ath_descdma_cleanup(struct ath_softc *sc, struct ath_descdma *dd, | |||
148 | (((_tid) == 4) || ((_tid) == 5)) ? WME_AC_VI : \ | 131 | (((_tid) == 4) || ((_tid) == 5)) ? WME_AC_VI : \ |
149 | WME_AC_VO) | 132 | WME_AC_VO) |
150 | 133 | ||
151 | #define ADDBA_EXCHANGE_ATTEMPTS 10 | ||
152 | #define ATH_AGGR_DELIM_SZ 4 | 134 | #define ATH_AGGR_DELIM_SZ 4 |
153 | #define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */ | 135 | #define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */ |
154 | /* number of delimiters for encryption padding */ | 136 | /* number of delimiters for encryption padding */ |
@@ -177,8 +159,8 @@ void ath_descdma_cleanup(struct ath_softc *sc, struct ath_descdma *dd, | |||
177 | 159 | ||
178 | /* returns delimiter padding required given the packet length */ | 160 | /* returns delimiter padding required given the packet length */ |
179 | #define ATH_AGGR_GET_NDELIM(_len) \ | 161 | #define ATH_AGGR_GET_NDELIM(_len) \ |
180 | (((((_len) + ATH_AGGR_DELIM_SZ) < ATH_AGGR_MINPLEN) ? \ | 162 | (((_len) >= ATH_AGGR_MINPLEN) ? 0 : \ |
181 | (ATH_AGGR_MINPLEN - (_len) - ATH_AGGR_DELIM_SZ) : 0) >> 2) | 163 | DIV_ROUND_UP(ATH_AGGR_MINPLEN - (_len), ATH_AGGR_DELIM_SZ)) |
182 | 164 | ||
183 | #define BAW_WITHIN(_start, _bawsz, _seqno) \ | 165 | #define BAW_WITHIN(_start, _bawsz, _seqno) \ |
184 | ((((_seqno) - (_start)) & 4095) < (_bawsz)) | 166 | ((((_seqno) - (_start)) & 4095) < (_bawsz)) |
@@ -195,12 +177,13 @@ enum ATH_AGGR_STATUS { | |||
195 | 177 | ||
196 | #define ATH_TXFIFO_DEPTH 8 | 178 | #define ATH_TXFIFO_DEPTH 8 |
197 | struct ath_txq { | 179 | struct ath_txq { |
198 | int axq_class; | 180 | int mac80211_qnum; /* mac80211 queue number, -1 means not mac80211 Q */ |
199 | u32 axq_qnum; | 181 | u32 axq_qnum; /* ath9k hardware queue number */ |
200 | u32 *axq_link; | 182 | u32 *axq_link; |
201 | struct list_head axq_q; | 183 | struct list_head axq_q; |
202 | spinlock_t axq_lock; | 184 | spinlock_t axq_lock; |
203 | u32 axq_depth; | 185 | u32 axq_depth; |
186 | u32 axq_ampdu_depth; | ||
204 | bool stopped; | 187 | bool stopped; |
205 | bool axq_tx_inprogress; | 188 | bool axq_tx_inprogress; |
206 | struct list_head axq_acq; | 189 | struct list_head axq_acq; |
@@ -208,27 +191,30 @@ struct ath_txq { | |||
208 | struct list_head txq_fifo_pending; | 191 | struct list_head txq_fifo_pending; |
209 | u8 txq_headidx; | 192 | u8 txq_headidx; |
210 | u8 txq_tailidx; | 193 | u8 txq_tailidx; |
194 | int pending_frames; | ||
211 | }; | 195 | }; |
212 | 196 | ||
213 | struct ath_atx_ac { | 197 | struct ath_atx_ac { |
198 | struct ath_txq *txq; | ||
214 | int sched; | 199 | int sched; |
215 | int qnum; | ||
216 | struct list_head list; | 200 | struct list_head list; |
217 | struct list_head tid_q; | 201 | struct list_head tid_q; |
202 | bool clear_ps_filter; | ||
203 | }; | ||
204 | |||
205 | struct ath_frame_info { | ||
206 | int framelen; | ||
207 | u32 keyix; | ||
208 | enum ath9k_key_type keytype; | ||
209 | u8 retries; | ||
210 | u16 seqno; | ||
218 | }; | 211 | }; |
219 | 212 | ||
220 | struct ath_buf_state { | 213 | struct ath_buf_state { |
221 | int bfs_nframes; | ||
222 | u16 bfs_al; | ||
223 | u16 bfs_frmlen; | ||
224 | int bfs_seqno; | ||
225 | int bfs_tidno; | ||
226 | int bfs_retries; | ||
227 | u8 bf_type; | 214 | u8 bf_type; |
228 | u8 bfs_paprd; | 215 | u8 bfs_paprd; |
229 | unsigned long bfs_paprd_timestamp; | 216 | unsigned long bfs_paprd_timestamp; |
230 | u32 bfs_keyix; | 217 | enum ath9k_internal_frame_type bfs_ftype; |
231 | enum ath9k_key_type bfs_keytype; | ||
232 | }; | 218 | }; |
233 | 219 | ||
234 | struct ath_buf { | 220 | struct ath_buf { |
@@ -239,14 +225,10 @@ struct ath_buf { | |||
239 | struct sk_buff *bf_mpdu; /* enclosing frame structure */ | 225 | struct sk_buff *bf_mpdu; /* enclosing frame structure */ |
240 | void *bf_desc; /* virtual addr of desc */ | 226 | void *bf_desc; /* virtual addr of desc */ |
241 | dma_addr_t bf_daddr; /* physical addr of desc */ | 227 | dma_addr_t bf_daddr; /* physical addr of desc */ |
242 | dma_addr_t bf_buf_addr; /* physical addr of data buffer */ | 228 | dma_addr_t bf_buf_addr; /* physical addr of data buffer, for DMA */ |
243 | bool bf_stale; | 229 | bool bf_stale; |
244 | bool bf_isnullfunc; | ||
245 | bool bf_tx_aborted; | ||
246 | u16 bf_flags; | 230 | u16 bf_flags; |
247 | struct ath_buf_state bf_state; | 231 | struct ath_buf_state bf_state; |
248 | dma_addr_t bf_dmacontext; | ||
249 | struct ath_wiphy *aphy; | ||
250 | }; | 232 | }; |
251 | 233 | ||
252 | struct ath_atx_tid { | 234 | struct ath_atx_tid { |
@@ -254,7 +236,7 @@ struct ath_atx_tid { | |||
254 | struct list_head buf_q; | 236 | struct list_head buf_q; |
255 | struct ath_node *an; | 237 | struct ath_node *an; |
256 | struct ath_atx_ac *ac; | 238 | struct ath_atx_ac *ac; |
257 | struct ath_buf *tx_buf[ATH_TID_MAX_BUFS]; | 239 | unsigned long tx_buf[BITS_TO_LONGS(ATH_TID_MAX_BUFS)]; |
258 | u16 seq_start; | 240 | u16 seq_start; |
259 | u16 seq_next; | 241 | u16 seq_next; |
260 | u16 baw_size; | 242 | u16 baw_size; |
@@ -267,12 +249,18 @@ struct ath_atx_tid { | |||
267 | }; | 249 | }; |
268 | 250 | ||
269 | struct ath_node { | 251 | struct ath_node { |
270 | struct ath_common *common; | 252 | #ifdef CONFIG_ATH9K_DEBUGFS |
253 | struct list_head list; /* for sc->nodes */ | ||
254 | struct ieee80211_sta *sta; /* station struct we're part of */ | ||
255 | #endif | ||
271 | struct ath_atx_tid tid[WME_NUM_TID]; | 256 | struct ath_atx_tid tid[WME_NUM_TID]; |
272 | struct ath_atx_ac ac[WME_NUM_AC]; | 257 | struct ath_atx_ac ac[WME_NUM_AC]; |
258 | int ps_key; | ||
259 | |||
273 | u16 maxampdu; | 260 | u16 maxampdu; |
274 | u8 mpdudensity; | 261 | u8 mpdudensity; |
275 | int last_rssi; | 262 | |
263 | bool sleeping; | ||
276 | }; | 264 | }; |
277 | 265 | ||
278 | #define AGGR_CLEANUP BIT(1) | 266 | #define AGGR_CLEANUP BIT(1) |
@@ -281,6 +269,7 @@ struct ath_node { | |||
281 | 269 | ||
282 | struct ath_tx_control { | 270 | struct ath_tx_control { |
283 | struct ath_txq *txq; | 271 | struct ath_txq *txq; |
272 | struct ath_node *an; | ||
284 | int if_id; | 273 | int if_id; |
285 | enum ath9k_internal_frame_type frame_type; | 274 | enum ath9k_internal_frame_type frame_type; |
286 | u8 paprd; | 275 | u8 paprd; |
@@ -290,15 +279,19 @@ struct ath_tx_control { | |||
290 | #define ATH_TX_XRETRY 0x02 | 279 | #define ATH_TX_XRETRY 0x02 |
291 | #define ATH_TX_BAR 0x04 | 280 | #define ATH_TX_BAR 0x04 |
292 | 281 | ||
282 | /** | ||
283 | * @txq_map: Index is mac80211 queue number. This is | ||
284 | * not necessarily the same as the hardware queue number | ||
285 | * (axq_qnum). | ||
286 | */ | ||
293 | struct ath_tx { | 287 | struct ath_tx { |
294 | u16 seq_no; | 288 | u16 seq_no; |
295 | u32 txqsetup; | 289 | u32 txqsetup; |
296 | int hwq_map[WME_NUM_AC]; | ||
297 | spinlock_t txbuflock; | 290 | spinlock_t txbuflock; |
298 | struct list_head txbuf; | 291 | struct list_head txbuf; |
299 | struct ath_txq txq[ATH9K_NUM_TX_QUEUES]; | 292 | struct ath_txq txq[ATH9K_NUM_TX_QUEUES]; |
300 | struct ath_descdma txdma; | 293 | struct ath_descdma txdma; |
301 | int pending_frames[WME_NUM_AC]; | 294 | struct ath_txq *txq_map[WME_NUM_AC]; |
302 | }; | 295 | }; |
303 | 296 | ||
304 | struct ath_rx_edma { | 297 | struct ath_rx_edma { |
@@ -312,12 +305,13 @@ struct ath_rx { | |||
312 | u8 rxotherant; | 305 | u8 rxotherant; |
313 | u32 *rxlink; | 306 | u32 *rxlink; |
314 | unsigned int rxfilter; | 307 | unsigned int rxfilter; |
315 | spinlock_t rxflushlock; | ||
316 | spinlock_t rxbuflock; | 308 | spinlock_t rxbuflock; |
317 | struct list_head rxbuf; | 309 | struct list_head rxbuf; |
318 | struct ath_descdma rxdma; | 310 | struct ath_descdma rxdma; |
319 | struct ath_buf *rx_bufptr; | 311 | struct ath_buf *rx_bufptr; |
320 | struct ath_rx_edma rx_edma[ATH9K_RX_QUEUE_MAX]; | 312 | struct ath_rx_edma rx_edma[ATH9K_RX_QUEUE_MAX]; |
313 | |||
314 | struct sk_buff *frag; | ||
321 | }; | 315 | }; |
322 | 316 | ||
323 | int ath_startrecv(struct ath_softc *sc); | 317 | int ath_startrecv(struct ath_softc *sc); |
@@ -329,8 +323,7 @@ void ath_rx_cleanup(struct ath_softc *sc); | |||
329 | int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp); | 323 | int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp); |
330 | struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype); | 324 | struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype); |
331 | void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq); | 325 | void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq); |
332 | int ath_tx_setup(struct ath_softc *sc, int haltype); | 326 | bool ath_drain_all_txq(struct ath_softc *sc, bool retry_tx); |
333 | void ath_drain_all_txq(struct ath_softc *sc, bool retry_tx); | ||
334 | void ath_draintxq(struct ath_softc *sc, | 327 | void ath_draintxq(struct ath_softc *sc, |
335 | struct ath_txq *txq, bool retry_tx); | 328 | struct ath_txq *txq, bool retry_tx); |
336 | void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an); | 329 | void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an); |
@@ -344,13 +337,13 @@ int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb, | |||
344 | struct ath_tx_control *txctl); | 337 | struct ath_tx_control *txctl); |
345 | void ath_tx_tasklet(struct ath_softc *sc); | 338 | void ath_tx_tasklet(struct ath_softc *sc); |
346 | void ath_tx_edma_tasklet(struct ath_softc *sc); | 339 | void ath_tx_edma_tasklet(struct ath_softc *sc); |
347 | void ath_tx_cabq(struct ieee80211_hw *hw, struct sk_buff *skb); | 340 | int ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta, |
348 | bool ath_tx_aggr_check(struct ath_softc *sc, struct ath_node *an, u8 tidno); | 341 | u16 tid, u16 *ssn); |
349 | void ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta, | ||
350 | u16 tid, u16 *ssn); | ||
351 | void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid); | 342 | void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid); |
352 | void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid); | 343 | void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid); |
353 | void ath9k_enable_ps(struct ath_softc *sc); | 344 | |
345 | void ath_tx_aggr_wakeup(struct ath_softc *sc, struct ath_node *an); | ||
346 | bool ath_tx_aggr_sleep(struct ath_softc *sc, struct ath_node *an); | ||
354 | 347 | ||
355 | /********/ | 348 | /********/ |
356 | /* VIFs */ | 349 | /* VIFs */ |
@@ -358,11 +351,9 @@ void ath9k_enable_ps(struct ath_softc *sc); | |||
358 | 351 | ||
359 | struct ath_vif { | 352 | struct ath_vif { |
360 | int av_bslot; | 353 | int av_bslot; |
354 | bool is_bslot_active, primary_sta_vif; | ||
361 | __le64 tsf_adjust; /* TSF adjustment for staggered beacons */ | 355 | __le64 tsf_adjust; /* TSF adjustment for staggered beacons */ |
362 | enum nl80211_iftype av_opmode; | ||
363 | struct ath_buf *av_bcbuf; | 356 | struct ath_buf *av_bcbuf; |
364 | struct ath_tx_control av_btxctl; | ||
365 | u8 bssid[ETH_ALEN]; /* current BSSID from config_interface */ | ||
366 | }; | 357 | }; |
367 | 358 | ||
368 | /*******************/ | 359 | /*******************/ |
@@ -374,14 +365,14 @@ struct ath_vif { | |||
374 | * number of BSSIDs) if a given beacon does not go out even after waiting this | 365 | * number of BSSIDs) if a given beacon does not go out even after waiting this |
375 | * number of beacon intervals, the game's up. | 366 | * number of beacon intervals, the game's up. |
376 | */ | 367 | */ |
377 | #define BSTUCK_THRESH (9 * ATH_BCBUF) | 368 | #define BSTUCK_THRESH 9 |
378 | #define ATH_BCBUF 4 | 369 | #define ATH_BCBUF 4 |
379 | #define ATH_DEFAULT_BINTVAL 100 /* TU */ | 370 | #define ATH_DEFAULT_BINTVAL 100 /* TU */ |
380 | #define ATH_DEFAULT_BMISS_LIMIT 10 | 371 | #define ATH_DEFAULT_BMISS_LIMIT 10 |
381 | #define IEEE80211_MS_TO_TU(x) (((x) * 1000) / 1024) | 372 | #define IEEE80211_MS_TO_TU(x) (((x) * 1000) / 1024) |
382 | 373 | ||
383 | struct ath_beacon_config { | 374 | struct ath_beacon_config { |
384 | u16 beacon_interval; | 375 | int beacon_interval; |
385 | u16 listen_interval; | 376 | u16 listen_interval; |
386 | u16 dtim_period; | 377 | u16 dtim_period; |
387 | u16 bmiss_timeout; | 378 | u16 bmiss_timeout; |
@@ -398,22 +389,26 @@ struct ath_beacon { | |||
398 | u32 beaconq; | 389 | u32 beaconq; |
399 | u32 bmisscnt; | 390 | u32 bmisscnt; |
400 | u32 ast_be_xmit; | 391 | u32 ast_be_xmit; |
401 | u64 bc_tstamp; | 392 | u32 bc_tstamp; |
402 | struct ieee80211_vif *bslot[ATH_BCBUF]; | 393 | struct ieee80211_vif *bslot[ATH_BCBUF]; |
403 | struct ath_wiphy *bslot_aphy[ATH_BCBUF]; | ||
404 | int slottime; | 394 | int slottime; |
405 | int slotupdate; | 395 | int slotupdate; |
406 | struct ath9k_tx_queue_info beacon_qi; | 396 | struct ath9k_tx_queue_info beacon_qi; |
407 | struct ath_descdma bdma; | 397 | struct ath_descdma bdma; |
408 | struct ath_txq *cabq; | 398 | struct ath_txq *cabq; |
409 | struct list_head bbuf; | 399 | struct list_head bbuf; |
400 | |||
401 | bool tx_processed; | ||
402 | bool tx_last; | ||
410 | }; | 403 | }; |
411 | 404 | ||
412 | void ath_beacon_tasklet(unsigned long data); | 405 | void ath_beacon_tasklet(unsigned long data); |
413 | void ath_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif); | 406 | void ath_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif); |
414 | int ath_beacon_alloc(struct ath_wiphy *aphy, struct ieee80211_vif *vif); | 407 | int ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_vif *vif); |
415 | void ath_beacon_return(struct ath_softc *sc, struct ath_vif *avp); | 408 | void ath_beacon_return(struct ath_softc *sc, struct ath_vif *avp); |
416 | int ath_beaconq_config(struct ath_softc *sc); | 409 | int ath_beaconq_config(struct ath_softc *sc); |
410 | void ath_set_beacon(struct ath_softc *sc); | ||
411 | void ath9k_set_beaconing_status(struct ath_softc *sc, bool status); | ||
417 | 412 | ||
418 | /*******/ | 413 | /*******/ |
419 | /* ANI */ | 414 | /* ANI */ |
@@ -423,12 +418,14 @@ int ath_beaconq_config(struct ath_softc *sc); | |||
423 | #define ATH_AP_SHORT_CALINTERVAL 100 /* 100 ms */ | 418 | #define ATH_AP_SHORT_CALINTERVAL 100 /* 100 ms */ |
424 | #define ATH_ANI_POLLINTERVAL_OLD 100 /* 100 ms */ | 419 | #define ATH_ANI_POLLINTERVAL_OLD 100 /* 100 ms */ |
425 | #define ATH_ANI_POLLINTERVAL_NEW 1000 /* 1000 ms */ | 420 | #define ATH_ANI_POLLINTERVAL_NEW 1000 /* 1000 ms */ |
421 | #define ATH_LONG_CALINTERVAL_INT 1000 /* 1000 ms */ | ||
426 | #define ATH_LONG_CALINTERVAL 30000 /* 30 seconds */ | 422 | #define ATH_LONG_CALINTERVAL 30000 /* 30 seconds */ |
427 | #define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes */ | 423 | #define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes */ |
428 | 424 | ||
429 | #define ATH_PAPRD_TIMEOUT 100 /* msecs */ | 425 | #define ATH_PAPRD_TIMEOUT 100 /* msecs */ |
430 | 426 | ||
431 | void ath_hw_check(struct work_struct *work); | 427 | void ath_hw_check(struct work_struct *work); |
428 | void ath_hw_pll_work(struct work_struct *work); | ||
432 | void ath_paprd_calibrate(struct work_struct *work); | 429 | void ath_paprd_calibrate(struct work_struct *work); |
433 | void ath_ani_calibrate(unsigned long data); | 430 | void ath_ani_calibrate(unsigned long data); |
434 | 431 | ||
@@ -436,14 +433,6 @@ void ath_ani_calibrate(unsigned long data); | |||
436 | /* BTCOEX */ | 433 | /* BTCOEX */ |
437 | /**********/ | 434 | /**********/ |
438 | 435 | ||
439 | /* Defines the BT AR_BT_COEX_WGHT used */ | ||
440 | enum ath_stomp_type { | ||
441 | ATH_BTCOEX_NO_STOMP, | ||
442 | ATH_BTCOEX_STOMP_ALL, | ||
443 | ATH_BTCOEX_STOMP_LOW, | ||
444 | ATH_BTCOEX_STOMP_NONE | ||
445 | }; | ||
446 | |||
447 | struct ath_btcoex { | 436 | struct ath_btcoex { |
448 | bool hw_timer_enabled; | 437 | bool hw_timer_enabled; |
449 | spinlock_t btcoex_lock; | 438 | spinlock_t btcoex_lock; |
@@ -467,26 +456,75 @@ void ath9k_btcoex_timer_pause(struct ath_softc *sc); | |||
467 | 456 | ||
468 | #define ATH_LED_PIN_DEF 1 | 457 | #define ATH_LED_PIN_DEF 1 |
469 | #define ATH_LED_PIN_9287 8 | 458 | #define ATH_LED_PIN_9287 8 |
470 | #define ATH_LED_ON_DURATION_IDLE 350 /* in msecs */ | 459 | #define ATH_LED_PIN_9300 10 |
471 | #define ATH_LED_OFF_DURATION_IDLE 250 /* in msecs */ | 460 | #define ATH_LED_PIN_9485 6 |
472 | |||
473 | enum ath_led_type { | ||
474 | ATH_LED_RADIO, | ||
475 | ATH_LED_ASSOC, | ||
476 | ATH_LED_TX, | ||
477 | ATH_LED_RX | ||
478 | }; | ||
479 | |||
480 | struct ath_led { | ||
481 | struct ath_softc *sc; | ||
482 | struct led_classdev led_cdev; | ||
483 | enum ath_led_type led_type; | ||
484 | char name[32]; | ||
485 | bool registered; | ||
486 | }; | ||
487 | 461 | ||
462 | #ifdef CONFIG_MAC80211_LEDS | ||
488 | void ath_init_leds(struct ath_softc *sc); | 463 | void ath_init_leds(struct ath_softc *sc); |
489 | void ath_deinit_leds(struct ath_softc *sc); | 464 | void ath_deinit_leds(struct ath_softc *sc); |
465 | #else | ||
466 | static inline void ath_init_leds(struct ath_softc *sc) | ||
467 | { | ||
468 | } | ||
469 | |||
470 | static inline void ath_deinit_leds(struct ath_softc *sc) | ||
471 | { | ||
472 | } | ||
473 | #endif | ||
474 | |||
475 | |||
476 | /* Antenna diversity/combining */ | ||
477 | #define ATH_ANT_RX_CURRENT_SHIFT 4 | ||
478 | #define ATH_ANT_RX_MAIN_SHIFT 2 | ||
479 | #define ATH_ANT_RX_MASK 0x3 | ||
480 | |||
481 | #define ATH_ANT_DIV_COMB_SHORT_SCAN_INTR 50 | ||
482 | #define ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT 0x100 | ||
483 | #define ATH_ANT_DIV_COMB_MAX_PKTCOUNT 0x200 | ||
484 | #define ATH_ANT_DIV_COMB_INIT_COUNT 95 | ||
485 | #define ATH_ANT_DIV_COMB_MAX_COUNT 100 | ||
486 | #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO 30 | ||
487 | #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2 20 | ||
488 | |||
489 | #define ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA -1 | ||
490 | #define ATH_ANT_DIV_COMB_LNA1_DELTA_HI -4 | ||
491 | #define ATH_ANT_DIV_COMB_LNA1_DELTA_MID -2 | ||
492 | #define ATH_ANT_DIV_COMB_LNA1_DELTA_LOW 2 | ||
493 | |||
494 | enum ath9k_ant_div_comb_lna_conf { | ||
495 | ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2, | ||
496 | ATH_ANT_DIV_COMB_LNA2, | ||
497 | ATH_ANT_DIV_COMB_LNA1, | ||
498 | ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2, | ||
499 | }; | ||
500 | |||
501 | struct ath_ant_comb { | ||
502 | u16 count; | ||
503 | u16 total_pkt_count; | ||
504 | bool scan; | ||
505 | bool scan_not_start; | ||
506 | int main_total_rssi; | ||
507 | int alt_total_rssi; | ||
508 | int alt_recv_cnt; | ||
509 | int main_recv_cnt; | ||
510 | int rssi_lna1; | ||
511 | int rssi_lna2; | ||
512 | int rssi_add; | ||
513 | int rssi_sub; | ||
514 | int rssi_first; | ||
515 | int rssi_second; | ||
516 | int rssi_third; | ||
517 | bool alt_good; | ||
518 | int quick_scan_cnt; | ||
519 | int main_conf; | ||
520 | enum ath9k_ant_div_comb_lna_conf first_quick_scan_conf; | ||
521 | enum ath9k_ant_div_comb_lna_conf second_quick_scan_conf; | ||
522 | int first_bias; | ||
523 | int second_bias; | ||
524 | bool first_ratio; | ||
525 | bool second_ratio; | ||
526 | unsigned long scan_start_time; | ||
527 | }; | ||
490 | 528 | ||
491 | /********************/ | 529 | /********************/ |
492 | /* Main driver core */ | 530 | /* Main driver core */ |
@@ -501,7 +539,6 @@ void ath_deinit_leds(struct ath_softc *sc); | |||
501 | #define ATH_CABQ_READY_TIME 80 /* % of beacon interval */ | 539 | #define ATH_CABQ_READY_TIME 80 /* % of beacon interval */ |
502 | #define ATH_MAX_SW_RETRIES 10 | 540 | #define ATH_MAX_SW_RETRIES 10 |
503 | #define ATH_CHAN_MAX 255 | 541 | #define ATH_CHAN_MAX 255 |
504 | #define IEEE80211_WEP_NKID 4 /* number of key ids */ | ||
505 | 542 | ||
506 | #define ATH_TXPOWER_MAX 100 /* .5 dBm units */ | 543 | #define ATH_TXPOWER_MAX 100 /* .5 dBm units */ |
507 | #define ATH_RATE_DUMMY_MARKER 0 | 544 | #define ATH_RATE_DUMMY_MARKER 0 |
@@ -516,11 +553,12 @@ void ath_deinit_leds(struct ath_softc *sc); | |||
516 | #define SC_OP_RXFLUSH BIT(7) | 553 | #define SC_OP_RXFLUSH BIT(7) |
517 | #define SC_OP_LED_ASSOCIATED BIT(8) | 554 | #define SC_OP_LED_ASSOCIATED BIT(8) |
518 | #define SC_OP_LED_ON BIT(9) | 555 | #define SC_OP_LED_ON BIT(9) |
519 | #define SC_OP_SCANNING BIT(10) | ||
520 | #define SC_OP_TSF_RESET BIT(11) | 556 | #define SC_OP_TSF_RESET BIT(11) |
521 | #define SC_OP_BT_PRIORITY_DETECTED BIT(12) | 557 | #define SC_OP_BT_PRIORITY_DETECTED BIT(12) |
522 | #define SC_OP_BT_SCAN BIT(13) | 558 | #define SC_OP_BT_SCAN BIT(13) |
523 | #define SC_OP_ANI_RUN BIT(14) | 559 | #define SC_OP_ANI_RUN BIT(14) |
560 | #define SC_OP_ENABLE_APM BIT(15) | ||
561 | #define SC_OP_PRIM_STA_VIF BIT(16) | ||
524 | 562 | ||
525 | /* Powersave flags */ | 563 | /* Powersave flags */ |
526 | #define PS_WAIT_FOR_BEACON BIT(0) | 564 | #define PS_WAIT_FOR_BEACON BIT(0) |
@@ -528,103 +566,91 @@ void ath_deinit_leds(struct ath_softc *sc); | |||
528 | #define PS_WAIT_FOR_PSPOLL_DATA BIT(2) | 566 | #define PS_WAIT_FOR_PSPOLL_DATA BIT(2) |
529 | #define PS_WAIT_FOR_TX_ACK BIT(3) | 567 | #define PS_WAIT_FOR_TX_ACK BIT(3) |
530 | #define PS_BEACON_SYNC BIT(4) | 568 | #define PS_BEACON_SYNC BIT(4) |
531 | #define PS_NULLFUNC_COMPLETED BIT(5) | 569 | #define PS_TSFOOR_SYNC BIT(5) |
532 | #define PS_ENABLED BIT(6) | ||
533 | 570 | ||
534 | struct ath_wiphy; | ||
535 | struct ath_rate_table; | 571 | struct ath_rate_table; |
536 | 572 | ||
573 | struct ath9k_vif_iter_data { | ||
574 | const u8 *hw_macaddr; /* phy's hardware address, set | ||
575 | * before starting iteration for | ||
576 | * valid bssid mask. | ||
577 | */ | ||
578 | u8 mask[ETH_ALEN]; /* bssid mask */ | ||
579 | int naps; /* number of AP vifs */ | ||
580 | int nmeshes; /* number of mesh vifs */ | ||
581 | int nstations; /* number of station vifs */ | ||
582 | int nwds; /* number of nwd vifs */ | ||
583 | int nadhocs; /* number of adhoc vifs */ | ||
584 | int nothers; /* number of vifs not specified above. */ | ||
585 | }; | ||
586 | |||
537 | struct ath_softc { | 587 | struct ath_softc { |
538 | struct ieee80211_hw *hw; | 588 | struct ieee80211_hw *hw; |
539 | struct device *dev; | 589 | struct device *dev; |
540 | 590 | ||
541 | spinlock_t wiphy_lock; /* spinlock to protect ath_wiphy data */ | ||
542 | struct ath_wiphy *pri_wiphy; | ||
543 | struct ath_wiphy **sec_wiphy; /* secondary wiphys (virtual radios); may | ||
544 | * have NULL entries */ | ||
545 | int num_sec_wiphy; /* number of sec_wiphy pointers in the array */ | ||
546 | int chan_idx; | 591 | int chan_idx; |
547 | int chan_is_ht; | 592 | int chan_is_ht; |
548 | struct ath_wiphy *next_wiphy; | 593 | struct survey_info *cur_survey; |
549 | struct work_struct chan_work; | 594 | struct survey_info survey[ATH9K_NUM_CHANNELS]; |
550 | int wiphy_select_failures; | ||
551 | unsigned long wiphy_select_first_fail; | ||
552 | struct delayed_work wiphy_work; | ||
553 | unsigned long wiphy_scheduler_int; | ||
554 | int wiphy_scheduler_index; | ||
555 | 595 | ||
556 | struct tasklet_struct intr_tq; | 596 | struct tasklet_struct intr_tq; |
557 | struct tasklet_struct bcon_tasklet; | 597 | struct tasklet_struct bcon_tasklet; |
558 | struct ath_hw *sc_ah; | 598 | struct ath_hw *sc_ah; |
559 | void __iomem *mem; | 599 | void __iomem *mem; |
560 | int irq; | 600 | int irq; |
561 | spinlock_t sc_resetlock; | ||
562 | spinlock_t sc_serial_rw; | 601 | spinlock_t sc_serial_rw; |
563 | spinlock_t sc_pm_lock; | 602 | spinlock_t sc_pm_lock; |
603 | spinlock_t sc_pcu_lock; | ||
564 | struct mutex mutex; | 604 | struct mutex mutex; |
565 | struct work_struct paprd_work; | 605 | struct work_struct paprd_work; |
566 | struct work_struct hw_check_work; | 606 | struct work_struct hw_check_work; |
567 | struct completion paprd_complete; | 607 | struct completion paprd_complete; |
568 | 608 | ||
609 | unsigned int hw_busy_count; | ||
610 | |||
569 | u32 intrstatus; | 611 | u32 intrstatus; |
570 | u32 sc_flags; /* SC_OP_* */ | 612 | u32 sc_flags; /* SC_OP_* */ |
571 | u16 ps_flags; /* PS_* */ | 613 | u16 ps_flags; /* PS_* */ |
572 | u16 curtxpow; | 614 | u16 curtxpow; |
573 | u8 nbcnvifs; | ||
574 | u16 nvifs; | ||
575 | bool ps_enabled; | 615 | bool ps_enabled; |
576 | bool ps_idle; | 616 | bool ps_idle; |
617 | short nbcnvifs; | ||
618 | short nvifs; | ||
577 | unsigned long ps_usecount; | 619 | unsigned long ps_usecount; |
578 | 620 | ||
579 | struct ath_config config; | 621 | struct ath_config config; |
580 | struct ath_rx rx; | 622 | struct ath_rx rx; |
581 | struct ath_tx tx; | 623 | struct ath_tx tx; |
582 | struct ath_beacon beacon; | 624 | struct ath_beacon beacon; |
583 | const struct ath_rate_table *cur_rate_table; | ||
584 | enum wireless_mode cur_rate_mode; | ||
585 | struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS]; | 625 | struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS]; |
586 | 626 | ||
587 | struct ath_led radio_led; | 627 | #ifdef CONFIG_MAC80211_LEDS |
588 | struct ath_led assoc_led; | 628 | bool led_registered; |
589 | struct ath_led tx_led; | 629 | char led_name[32]; |
590 | struct ath_led rx_led; | 630 | struct led_classdev led_cdev; |
591 | struct delayed_work ath_led_blink_work; | 631 | #endif |
592 | int led_on_duration; | ||
593 | int led_off_duration; | ||
594 | int led_on_cnt; | ||
595 | int led_off_cnt; | ||
596 | 632 | ||
597 | int beacon_interval; | 633 | struct ath9k_hw_cal_data caldata; |
634 | int last_rssi; | ||
598 | 635 | ||
599 | #ifdef CONFIG_ATH9K_DEBUGFS | 636 | #ifdef CONFIG_ATH9K_DEBUGFS |
600 | struct ath9k_debug debug; | 637 | struct ath9k_debug debug; |
638 | spinlock_t nodes_lock; | ||
639 | struct list_head nodes; /* basically, stations */ | ||
640 | unsigned int tx_complete_poll_work_seen; | ||
601 | #endif | 641 | #endif |
602 | struct ath_beacon_config cur_beacon_conf; | 642 | struct ath_beacon_config cur_beacon_conf; |
603 | struct delayed_work tx_complete_work; | 643 | struct delayed_work tx_complete_work; |
644 | struct delayed_work hw_pll_work; | ||
604 | struct ath_btcoex btcoex; | 645 | struct ath_btcoex btcoex; |
605 | 646 | ||
606 | struct ath_descdma txsdma; | 647 | struct ath_descdma txsdma; |
607 | }; | ||
608 | 648 | ||
609 | struct ath_wiphy { | 649 | struct ath_ant_comb ant_comb; |
610 | struct ath_softc *sc; /* shared for all virtual wiphys */ | ||
611 | struct ieee80211_hw *hw; | ||
612 | struct ath9k_hw_cal_data caldata; | ||
613 | enum ath_wiphy_state { | ||
614 | ATH_WIPHY_INACTIVE, | ||
615 | ATH_WIPHY_ACTIVE, | ||
616 | ATH_WIPHY_PAUSING, | ||
617 | ATH_WIPHY_PAUSED, | ||
618 | ATH_WIPHY_SCAN, | ||
619 | } state; | ||
620 | bool idle; | ||
621 | int chan_idx; | ||
622 | int chan_is_ht; | ||
623 | }; | 650 | }; |
624 | 651 | ||
625 | void ath9k_tasklet(unsigned long data); | 652 | void ath9k_tasklet(unsigned long data); |
626 | int ath_reset(struct ath_softc *sc, bool retry_tx); | 653 | int ath_reset(struct ath_softc *sc, bool retry_tx); |
627 | int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc); | ||
628 | int ath_cabq_update(struct ath_softc *); | 654 | int ath_cabq_update(struct ath_softc *); |
629 | 655 | ||
630 | static inline void ath_read_cachesize(struct ath_common *common, int *csz) | 656 | static inline void ath_read_cachesize(struct ath_common *common, int *csz) |
@@ -633,25 +659,25 @@ static inline void ath_read_cachesize(struct ath_common *common, int *csz) | |||
633 | } | 659 | } |
634 | 660 | ||
635 | extern struct ieee80211_ops ath9k_ops; | 661 | extern struct ieee80211_ops ath9k_ops; |
636 | extern int modparam_nohwcrypt; | 662 | extern int ath9k_modparam_nohwcrypt; |
637 | extern int led_blink; | 663 | extern int led_blink; |
664 | extern bool is_ath9k_unloaded; | ||
638 | 665 | ||
639 | irqreturn_t ath_isr(int irq, void *dev); | 666 | irqreturn_t ath_isr(int irq, void *dev); |
667 | void ath9k_init_crypto(struct ath_softc *sc); | ||
640 | int ath9k_init_device(u16 devid, struct ath_softc *sc, u16 subsysid, | 668 | int ath9k_init_device(u16 devid, struct ath_softc *sc, u16 subsysid, |
641 | const struct ath_bus_ops *bus_ops); | 669 | const struct ath_bus_ops *bus_ops); |
642 | void ath9k_deinit_device(struct ath_softc *sc); | 670 | void ath9k_deinit_device(struct ath_softc *sc); |
643 | void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw); | 671 | void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw); |
644 | void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw, | ||
645 | struct ath9k_channel *ichan); | ||
646 | void ath_update_chainmask(struct ath_softc *sc, int is_ht); | ||
647 | int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw, | 672 | int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw, |
648 | struct ath9k_channel *hchan); | 673 | struct ath9k_channel *hchan); |
649 | 674 | ||
650 | void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw); | 675 | void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw); |
651 | void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw); | 676 | void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw); |
652 | bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode); | 677 | bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode); |
678 | bool ath9k_uses_beacons(int type); | ||
653 | 679 | ||
654 | #ifdef CONFIG_PCI | 680 | #ifdef CONFIG_ATH9K_PCI |
655 | int ath_pci_init(void); | 681 | int ath_pci_init(void); |
656 | void ath_pci_exit(void); | 682 | void ath_pci_exit(void); |
657 | #else | 683 | #else |
@@ -659,7 +685,7 @@ static inline int ath_pci_init(void) { return 0; }; | |||
659 | static inline void ath_pci_exit(void) {}; | 685 | static inline void ath_pci_exit(void) {}; |
660 | #endif | 686 | #endif |
661 | 687 | ||
662 | #ifdef CONFIG_ATHEROS_AR71XX | 688 | #ifdef CONFIG_ATH9K_AHB |
663 | int ath_ahb_init(void); | 689 | int ath_ahb_init(void); |
664 | void ath_ahb_exit(void); | 690 | void ath_ahb_exit(void); |
665 | #else | 691 | #else |
@@ -670,27 +696,13 @@ static inline void ath_ahb_exit(void) {}; | |||
670 | void ath9k_ps_wakeup(struct ath_softc *sc); | 696 | void ath9k_ps_wakeup(struct ath_softc *sc); |
671 | void ath9k_ps_restore(struct ath_softc *sc); | 697 | void ath9k_ps_restore(struct ath_softc *sc); |
672 | 698 | ||
673 | void ath9k_set_bssid_mask(struct ieee80211_hw *hw); | 699 | u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate); |
674 | int ath9k_wiphy_add(struct ath_softc *sc); | ||
675 | int ath9k_wiphy_del(struct ath_wiphy *aphy); | ||
676 | void ath9k_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb); | ||
677 | int ath9k_wiphy_pause(struct ath_wiphy *aphy); | ||
678 | int ath9k_wiphy_unpause(struct ath_wiphy *aphy); | ||
679 | int ath9k_wiphy_select(struct ath_wiphy *aphy); | ||
680 | void ath9k_wiphy_set_scheduler(struct ath_softc *sc, unsigned int msec_int); | ||
681 | void ath9k_wiphy_chan_work(struct work_struct *work); | ||
682 | bool ath9k_wiphy_started(struct ath_softc *sc); | ||
683 | void ath9k_wiphy_pause_all_forced(struct ath_softc *sc, | ||
684 | struct ath_wiphy *selected); | ||
685 | bool ath9k_wiphy_scanning(struct ath_softc *sc); | ||
686 | void ath9k_wiphy_work(struct work_struct *work); | ||
687 | bool ath9k_all_wiphys_idle(struct ath_softc *sc); | ||
688 | void ath9k_set_wiphy_idle(struct ath_wiphy *aphy, bool idle); | ||
689 | |||
690 | void ath_mac80211_stop_queue(struct ath_softc *sc, u16 skb_queue); | ||
691 | bool ath_mac80211_start_queue(struct ath_softc *sc, u16 skb_queue); | ||
692 | 700 | ||
693 | void ath_start_rfkill_poll(struct ath_softc *sc); | 701 | void ath_start_rfkill_poll(struct ath_softc *sc); |
694 | extern void ath9k_rfkill_poll_state(struct ieee80211_hw *hw); | 702 | extern void ath9k_rfkill_poll_state(struct ieee80211_hw *hw); |
703 | void ath9k_calculate_iter_data(struct ieee80211_hw *hw, | ||
704 | struct ieee80211_vif *vif, | ||
705 | struct ath9k_vif_iter_data *iter_data); | ||
706 | |||
695 | 707 | ||
696 | #endif /* ATH9K_H */ | 708 | #endif /* ATH9K_H */ |