218 files changed, 32493 insertions, 8099 deletions

diff --git a/drivers/media/dvb/Kconfig b/drivers/media/dvb/Kconfig
index 161ccfd471cb..ee214c3b63d7 100644
--- a/drivers/media/dvb/Kconfig
+++ b/drivers/media/dvb/Kconfig
@@ -65,7 +65,7 @@ comment "Supported SDMC DM1105 Adapters"
 source "drivers/media/dvb/dm1105/Kconfig"
 
 comment "Supported FireWire (IEEE 1394) Adapters"
-        depends on DVB_CORE && IEEE1394
+        depends on DVB_CORE && FIREWIRE
 source "drivers/media/dvb/firewire/Kconfig"
 
 comment "Supported Earthsoft PT1 Adapters"
diff --git a/drivers/media/dvb/b2c2/flexcop-i2c.c b/drivers/media/dvb/b2c2/flexcop-i2c.c
index fd1df2352764..965d5eb33752 100644
--- a/drivers/media/dvb/b2c2/flexcop-i2c.c
+++ b/drivers/media/dvb/b2c2/flexcop-i2c.c
@@ -245,9 +245,6 @@ int flexcop_i2c_init(struct flexcop_device *fc)
         i2c_set_adapdata(&fc->fc_i2c_adap[1].i2c_adap, &fc->fc_i2c_adap[1]);
         i2c_set_adapdata(&fc->fc_i2c_adap[2].i2c_adap, &fc->fc_i2c_adap[2]);
 
-        fc->fc_i2c_adap[0].i2c_adap.class =
-                fc->fc_i2c_adap[1].i2c_adap.class =
-                fc->fc_i2c_adap[2].i2c_adap.class = I2C_CLASS_TV_DIGITAL;
         fc->fc_i2c_adap[0].i2c_adap.algo =
                 fc->fc_i2c_adap[1].i2c_adap.algo =
                 fc->fc_i2c_adap[2].i2c_adap.algo = &flexcop_algo;
diff --git a/drivers/media/dvb/b2c2/flexcop-pci.c b/drivers/media/dvb/b2c2/flexcop-pci.c
index 227c0200b70a..44f8fb5f17ff 100644
--- a/drivers/media/dvb/b2c2/flexcop-pci.c
+++ b/drivers/media/dvb/b2c2/flexcop-pci.c
@@ -38,7 +38,7 @@ MODULE_PARM_DESC(debug,
         DEBSTATUS);
 
 #define DRIVER_VERSION "0.1"
-#define DRIVER_NAME "Technisat/B2C2 FlexCop II/IIb/III Digital TV PCI Driver"
+#define DRIVER_NAME "flexcop-pci"
 #define DRIVER_AUTHOR "Patrick Boettcher <patrick.boettcher@desy.de>"
 
 struct flexcop_pci {
@@ -58,7 +58,7 @@ struct flexcop_pci {
 
         int active_dma1_addr; /* 0 = addr0 of dma1; 1 = addr1 of dma1 */
         u32 last_dma1_cur_pos;
-        /* position of the pointer last time the timer/packet irq occured */
+        /* position of the pointer last time the timer/packet irq occurred */
         int count;
         int count_prev;
         int stream_problem;
@@ -290,10 +290,8 @@ static void flexcop_pci_dma_exit(struct flexcop_pci *fc_pci)
 static int flexcop_pci_init(struct flexcop_pci *fc_pci)
 {
         int ret;
-        u8 card_rev;
 
-        pci_read_config_byte(fc_pci->pdev, PCI_CLASS_REVISION, &card_rev);
-        info("card revision %x", card_rev);
+        info("card revision %x", fc_pci->pdev->revision);
 
         if ((ret = pci_enable_device(fc_pci->pdev)) != 0)
                 return ret;
diff --git a/drivers/media/dvb/bt8xx/bt878.c b/drivers/media/dvb/bt8xx/bt878.c
index 99d62094f908..b34fa95185e4 100644
--- a/drivers/media/dvb/bt8xx/bt878.c
+++ b/drivers/media/dvb/bt8xx/bt878.c
@@ -460,7 +460,7 @@ static int __devinit bt878_probe(struct pci_dev *dev,
                 goto fail0;
         }
 
-        pci_read_config_byte(dev, PCI_CLASS_REVISION, &bt->revision);
+        bt->revision = dev->revision;
         pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
 
 
diff --git a/drivers/media/dvb/bt8xx/dst_ca.c b/drivers/media/dvb/bt8xx/dst_ca.c
index cf8705162845..48e48e8af55a 100644
--- a/drivers/media/dvb/bt8xx/dst_ca.c
+++ b/drivers/media/dvb/bt8xx/dst_ca.c
@@ -22,7 +22,7 @@
 #include <linux/module.h>
 #include <linux/slab.h>
 #include <linux/init.h>
-#include <linux/smp_lock.h>
+#include <linux/mutex.h>
 #include <linux/string.h>
 #include <linux/dvb/ca.h>
 #include "dvbdev.h"
@@ -52,6 +52,7 @@
 } while(0)
 
 
+static DEFINE_MUTEX(dst_ca_mutex);
 static unsigned int verbose = 5;
 module_param(verbose, int, 0644);
 MODULE_PARM_DESC(verbose, "verbose startup messages, default is 1 (yes)");
@@ -564,7 +565,7 @@ static long dst_ca_ioctl(struct file *file, unsigned int cmd, unsigned long ioct
         void __user *arg = (void __user *)ioctl_arg;
         int result = 0;
 
-        lock_kernel();
+        mutex_lock(&dst_ca_mutex);
         dvbdev = file->private_data;
         state = (struct dst_state *)dvbdev->priv;
         p_ca_message = kmalloc(sizeof (struct ca_msg), GFP_KERNEL);
@@ -652,7 +653,7 @@ static long dst_ca_ioctl(struct file *file, unsigned int cmd, unsigned long ioct
         kfree (p_ca_slot_info);
         kfree (p_ca_caps);
 
-        unlock_kernel();
+        mutex_unlock(&dst_ca_mutex);
         return result;
 }
 
@@ -694,7 +695,8 @@ static const struct file_operations dst_ca_fops = {
         .open = dst_ca_open,
         .release = dst_ca_release,
         .read = dst_ca_read,
-        .write = dst_ca_write
+        .write = dst_ca_write,
+        .llseek = noop_llseek,
 };
 
 static struct dvb_device dvbdev_ca = {
diff --git a/drivers/media/dvb/bt8xx/dvb-bt8xx.c b/drivers/media/dvb/bt8xx/dvb-bt8xx.c
index 78fc469f0f69..1e1106dcd063 100644
--- a/drivers/media/dvb/bt8xx/dvb-bt8xx.c
+++ b/drivers/media/dvb/bt8xx/dvb-bt8xx.c
@@ -427,10 +427,10 @@ static void or51211_reset(struct dvb_frontend * fe)
         struct dvb_bt8xx_card *bt = fe->dvb->priv;
 
         /* RESET DEVICE
-         * reset is controled by GPIO-0
+         * reset is controlled by GPIO-0
          * when set to 0 causes reset and when to 1 for normal op
          * must remain reset for 128 clock cycles on a 50Mhz clock
-         * also PRM1 PRM2 & PRM4 are controled by GPIO-1,GPIO-2 & GPIO-4
+         * also PRM1 PRM2 & PRM4 are controlled by GPIO-1,GPIO-2 & GPIO-4
          * We assume that the reset has be held low long enough or we
          * have been reset by a power on.  When the driver is unloaded
          * reset set to 0 so if reloaded we have been reset.
diff --git a/drivers/media/dvb/dm1105/Kconfig b/drivers/media/dvb/dm1105/Kconfig
index a6ceb08f1183..f3de0a4d63f2 100644
--- a/drivers/media/dvb/dm1105/Kconfig
+++ b/drivers/media/dvb/dm1105/Kconfig
@@ -1,7 +1,6 @@
 config DVB_DM1105
         tristate "SDMC DM1105 based PCI cards"
         depends on DVB_CORE && PCI && I2C
-        depends on INPUT
         select DVB_PLL if !DVB_FE_CUSTOMISE
         select DVB_STV0299 if !DVB_FE_CUSTOMISE
         select DVB_STV0288 if !DVB_FE_CUSTOMISE
@@ -9,7 +8,7 @@ config DVB_DM1105
         select DVB_CX24116 if !DVB_FE_CUSTOMISE
         select DVB_SI21XX if !DVB_FE_CUSTOMISE
         select DVB_DS3000 if !DVB_FE_CUSTOMISE
-        depends on VIDEO_IR
+        depends on RC_CORE
         help
           Support for cards based on the SDMC DM1105 PCI chip like
           DvbWorld 2002
diff --git a/drivers/media/dvb/dm1105/dm1105.c b/drivers/media/dvb/dm1105/dm1105.c
index bca07c0bcd01..b2b0c45f32a9 100644
--- a/drivers/media/dvb/dm1105/dm1105.c
+++ b/drivers/media/dvb/dm1105/dm1105.c
@@ -20,15 +20,15 @@
  */
 
 #include <linux/i2c.h>
+#include <linux/i2c-algo-bit.h>
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/proc_fs.h>
 #include <linux/pci.h>
 #include <linux/dma-mapping.h>
-#include <linux/input.h>
 #include <linux/slab.h>
-#include <media/ir-core.h>
+#include <media/rc-core.h>
 
 #include "demux.h"
 #include "dmxdev.h"
@@ -50,11 +50,12 @@
 
 #define UNSET (-1U)
 
-#define DM1105_BOARD_NOAUTO             UNSET
-#define DM1105_BOARD_UNKNOWN            0
-#define DM1105_BOARD_DVBWORLD_2002      1
-#define DM1105_BOARD_DVBWORLD_2004      2
-#define DM1105_BOARD_AXESS_DM05         3
+#define DM1105_BOARD_NOAUTO                     UNSET
+#define DM1105_BOARD_UNKNOWN                    0
+#define DM1105_BOARD_DVBWORLD_2002              1
+#define DM1105_BOARD_DVBWORLD_2004              2
+#define DM1105_BOARD_AXESS_DM05                 3
+#define DM1105_BOARD_UNBRANDED_I2C_ON_GPIO      4
 
 /* ----------------------------------------------- */
 /*
@@ -158,22 +159,38 @@
 #define DM1105_MAX                              0x04
 
 #define DRIVER_NAME                             "dm1105"
+#define DM1105_I2C_GPIO_NAME                    "dm1105-gpio"
 
 #define DM1105_DMA_PACKETS                      47
 #define DM1105_DMA_PACKET_LENGTH                (128*4)
 #define DM1105_DMA_BYTES                        (128 * 4 * DM1105_DMA_PACKETS)
 
+/*  */
+#define GPIO08                                  (1 << 8)
+#define GPIO13                                  (1 << 13)
+#define GPIO14                                  (1 << 14)
+#define GPIO15                                  (1 << 15)
+#define GPIO16                                  (1 << 16)
+#define GPIO17                                  (1 << 17)
+#define GPIO_ALL                                0x03ffff
+
 /* GPIO's for LNB power control */
-#define DM1105_LNB_MASK                         0x00000000
-#define DM1105_LNB_OFF                          0x00020000
-#define DM1105_LNB_13V                          0x00010100
-#define DM1105_LNB_18V                          0x00000100
+#define DM1105_LNB_MASK                         (GPIO_ALL & ~(GPIO14 | GPIO13))
+#define DM1105_LNB_OFF                          GPIO17
+#define DM1105_LNB_13V                          (GPIO16 | GPIO08)
+#define DM1105_LNB_18V                          GPIO08
 
 /* GPIO's for LNB power control for Axess DM05 */
-#define DM05_LNB_MASK                           0x00000000
-#define DM05_LNB_OFF                            0x00020000/* actually 13v */
-#define DM05_LNB_13V                            0x00020000
-#define DM05_LNB_18V                            0x00030000
+#define DM05_LNB_MASK                           (GPIO_ALL & ~(GPIO14 | GPIO13))
+#define DM05_LNB_OFF                            GPIO17/* actually 13v */
+#define DM05_LNB_13V                            GPIO17
+#define DM05_LNB_18V                            (GPIO17 | GPIO16)
+
+/* GPIO's for LNB power control for unbranded with I2C on GPIO */
+#define UNBR_LNB_MASK                           (GPIO17 | GPIO16)
+#define UNBR_LNB_OFF                            0
+#define UNBR_LNB_13V                            GPIO17
+#define UNBR_LNB_18V                            (GPIO17 | GPIO16)
 
 static unsigned int card[]  = {[0 ... 3] = UNSET };
 module_param_array(card,  int, NULL, 0444);
@@ -188,7 +205,11 @@ static unsigned int dm1105_devcount;
 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
 
 struct dm1105_board {
-        char                    *name;
+        char    *name;
+        struct  {
+                u32     mask, off, v13, v18;
+        } lnb;
+        u32     gpio_scl, gpio_sda;
 };
 
 struct dm1105_subid {
@@ -200,15 +221,50 @@ struct dm1105_subid {
 static const struct dm1105_board dm1105_boards[] = {
         [DM1105_BOARD_UNKNOWN] = {
                 .name           = "UNKNOWN/GENERIC",
+                .lnb = {
+                        .mask = DM1105_LNB_MASK,
+                        .off = DM1105_LNB_OFF,
+                        .v13 = DM1105_LNB_13V,
+                        .v18 = DM1105_LNB_18V,
+                },
         },
         [DM1105_BOARD_DVBWORLD_2002] = {
                 .name           = "DVBWorld PCI 2002",
+                .lnb = {
+                        .mask = DM1105_LNB_MASK,
+                        .off = DM1105_LNB_OFF,
+                        .v13 = DM1105_LNB_13V,
+                        .v18 = DM1105_LNB_18V,
+                },
         },
         [DM1105_BOARD_DVBWORLD_2004] = {
                 .name           = "DVBWorld PCI 2004",
+                .lnb = {
+                        .mask = DM1105_LNB_MASK,
+                        .off = DM1105_LNB_OFF,
+                        .v13 = DM1105_LNB_13V,
+                        .v18 = DM1105_LNB_18V,
+                },
         },
         [DM1105_BOARD_AXESS_DM05] = {
                 .name           = "Axess/EasyTv DM05",
+                .lnb = {
+                        .mask = DM05_LNB_MASK,
+                        .off = DM05_LNB_OFF,
+                        .v13 = DM05_LNB_13V,
+                        .v18 = DM05_LNB_18V,
+                },
+        },
+        [DM1105_BOARD_UNBRANDED_I2C_ON_GPIO] = {
+                .name           = "Unbranded DM1105 with i2c on GPIOs",
+                .lnb = {
+                        .mask = UNBR_LNB_MASK,
+                        .off = UNBR_LNB_OFF,
+                        .v13 = UNBR_LNB_13V,
+                        .v18 = UNBR_LNB_18V,
+                },
+                .gpio_scl       = GPIO14,
+                .gpio_sda       = GPIO13,
         },
 };
 
@@ -266,7 +322,7 @@ static void dm1105_card_list(struct pci_dev *pci)
 
 /* infrared remote control */
 struct infrared {
-        struct input_dev        *input_dev;
+        struct rc_dev           *dev;
         char                    input_phys[32];
         struct work_struct      work;
         u32                     ir_command;
@@ -294,6 +350,8 @@ struct dm1105_dev {
 
         /* i2c */
         struct i2c_adapter i2c_adap;
+        struct i2c_adapter i2c_bb_adap;
+        struct i2c_algo_bit_data i2c_bit;
 
         /* irq */
         struct work_struct work;
@@ -329,6 +387,103 @@ struct dm1105_dev {
 #define dm_setl(reg, bit)       dm_andorl((reg), (bit), (bit))
 #define dm_clearl(reg, bit)     dm_andorl((reg), (bit), 0)
 
+/* The chip has 18 GPIOs. In HOST mode GPIO's used as 15 bit address lines,
+ so we can use only 3 GPIO's from GPIO15 to GPIO17.
+ Here I don't check whether HOST is enebled as it is not implemented yet.
+ */
+static void dm1105_gpio_set(struct dm1105_dev *dev, u32 mask)
+{
+        if (mask & 0xfffc0000)
+                printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
+
+        if (mask & 0x0003ffff)
+                dm_setl(DM1105_GPIOVAL, mask & 0x0003ffff);
+
+}
+
+static void dm1105_gpio_clear(struct dm1105_dev *dev, u32 mask)
+{
+        if (mask & 0xfffc0000)
+                printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
+
+        if (mask & 0x0003ffff)
+                dm_clearl(DM1105_GPIOVAL, mask & 0x0003ffff);
+
+}
+
+static void dm1105_gpio_andor(struct dm1105_dev *dev, u32 mask, u32 val)
+{
+        if (mask & 0xfffc0000)
+                printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
+
+        if (mask & 0x0003ffff)
+                dm_andorl(DM1105_GPIOVAL, mask & 0x0003ffff, val);
+
+}
+
+static u32 dm1105_gpio_get(struct dm1105_dev *dev, u32 mask)
+{
+        if (mask & 0xfffc0000)
+                printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
+
+        if (mask & 0x0003ffff)
+                return dm_readl(DM1105_GPIOVAL) & mask & 0x0003ffff;
+
+        return 0;
+}
+
+static void dm1105_gpio_enable(struct dm1105_dev *dev, u32 mask, int asoutput)
+{
+        if (mask & 0xfffc0000)
+                printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
+
+        if ((mask & 0x0003ffff) && asoutput)
+                dm_clearl(DM1105_GPIOCTR, mask & 0x0003ffff);
+        else if ((mask & 0x0003ffff) && !asoutput)
+                dm_setl(DM1105_GPIOCTR, mask & 0x0003ffff);
+
+}
+
+static void dm1105_setline(struct dm1105_dev *dev, u32 line, int state)
+{
+        if (state)
+                dm1105_gpio_enable(dev, line, 0);
+        else {
+                dm1105_gpio_enable(dev, line, 1);
+                dm1105_gpio_clear(dev, line);
+        }
+}
+
+static void dm1105_setsda(void *data, int state)
+{
+        struct dm1105_dev *dev = data;
+
+        dm1105_setline(dev, dm1105_boards[dev->boardnr].gpio_sda, state);
+}
+
+static void dm1105_setscl(void *data, int state)
+{
+        struct dm1105_dev *dev = data;
+
+        dm1105_setline(dev, dm1105_boards[dev->boardnr].gpio_scl, state);
+}
+
+static int dm1105_getsda(void *data)
+{
+        struct dm1105_dev *dev = data;
+
+        return dm1105_gpio_get(dev, dm1105_boards[dev->boardnr].gpio_sda)
+                                                                        ? 1 : 0;
+}
+
+static int dm1105_getscl(void *data)
+{
+        struct dm1105_dev *dev = data;
+
+        return dm1105_gpio_get(dev, dm1105_boards[dev->boardnr].gpio_scl)
+                                                                        ? 1 : 0;
+}
+
 static int dm1105_i2c_xfer(struct i2c_adapter *i2c_adap,
                             struct i2c_msg *msgs, int num)
 {
@@ -437,31 +592,20 @@ static inline struct dm1105_dev *frontend_to_dm1105_dev(struct dvb_frontend *fe)
 static int dm1105_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
 {
         struct dm1105_dev *dev = frontend_to_dm1105_dev(fe);
-        u32 lnb_mask, lnb_13v, lnb_18v, lnb_off;
 
-        switch (dev->boardnr) {
-        case DM1105_BOARD_AXESS_DM05:
-                lnb_mask = DM05_LNB_MASK;
-                lnb_off = DM05_LNB_OFF;
-                lnb_13v = DM05_LNB_13V;
-                lnb_18v = DM05_LNB_18V;
-                break;
-        case DM1105_BOARD_DVBWORLD_2002:
-        case DM1105_BOARD_DVBWORLD_2004:
-        default:
-                lnb_mask = DM1105_LNB_MASK;
-                lnb_off = DM1105_LNB_OFF;
-                lnb_13v = DM1105_LNB_13V;
-                lnb_18v = DM1105_LNB_18V;
-        }
-
-        dm_writel(DM1105_GPIOCTR, lnb_mask);
+        dm1105_gpio_enable(dev, dm1105_boards[dev->boardnr].lnb.mask, 1);
         if (voltage == SEC_VOLTAGE_18)
-                dm_writel(DM1105_GPIOVAL, lnb_18v);
+                dm1105_gpio_andor(dev,
+                                dm1105_boards[dev->boardnr].lnb.mask,
+                                dm1105_boards[dev->boardnr].lnb.v18);
         else if (voltage == SEC_VOLTAGE_13)
-                dm_writel(DM1105_GPIOVAL, lnb_13v);
+                dm1105_gpio_andor(dev,
+                                dm1105_boards[dev->boardnr].lnb.mask,
+                                dm1105_boards[dev->boardnr].lnb.v13);
         else
-                dm_writel(DM1105_GPIOVAL, lnb_off);
+                dm1105_gpio_andor(dev,
+                                dm1105_boards[dev->boardnr].lnb.mask,
+                                dm1105_boards[dev->boardnr].lnb.off);
 
         return 0;
 }
@@ -532,7 +676,7 @@ static void dm1105_emit_key(struct work_struct *work)
 
         data = (ircom >> 8) & 0x7f;
 
-        ir_keydown(ir->input_dev, data, 0);
+        rc_keydown(ir->dev, data, 0);
 }
 
 /* work handler */
@@ -593,46 +737,47 @@ static irqreturn_t dm1105_irq(int irq, void *dev_id)
 
 int __devinit dm1105_ir_init(struct dm1105_dev *dm1105)
 {
-        struct input_dev *input_dev;
-        char *ir_codes = RC_MAP_DM1105_NEC;
+        struct rc_dev *dev;
         int err = -ENOMEM;
 
-        input_dev = input_allocate_device();
-        if (!input_dev)
+        dev = rc_allocate_device();
+        if (!dev)
                 return -ENOMEM;
 
-        dm1105->ir.input_dev = input_dev;
         snprintf(dm1105->ir.input_phys, sizeof(dm1105->ir.input_phys),
                 "pci-%s/ir0", pci_name(dm1105->pdev));
 
-        input_dev->name = "DVB on-card IR receiver";
-        input_dev->phys = dm1105->ir.input_phys;
-        input_dev->id.bustype = BUS_PCI;
-        input_dev->id.version = 1;
+        dev->driver_name = MODULE_NAME;
+        dev->map_name = RC_MAP_DM1105_NEC;
+        dev->driver_type = RC_DRIVER_SCANCODE;
+        dev->input_name = "DVB on-card IR receiver";
+        dev->input_phys = dm1105->ir.input_phys;
+        dev->input_id.bustype = BUS_PCI;
+        dev->input_id.version = 1;
         if (dm1105->pdev->subsystem_vendor) {
-                input_dev->id.vendor = dm1105->pdev->subsystem_vendor;
-                input_dev->id.product = dm1105->pdev->subsystem_device;
+                dev->input_id.vendor = dm1105->pdev->subsystem_vendor;
+                dev->input_id.product = dm1105->pdev->subsystem_device;
         } else {
-                input_dev->id.vendor = dm1105->pdev->vendor;
-                input_dev->id.product = dm1105->pdev->device;
+                dev->input_id.vendor = dm1105->pdev->vendor;
+                dev->input_id.product = dm1105->pdev->device;
         }
-
-        input_dev->dev.parent = &dm1105->pdev->dev;
+        dev->dev.parent = &dm1105->pdev->dev;
 
         INIT_WORK(&dm1105->ir.work, dm1105_emit_key);
 
-        err = ir_input_register(input_dev, ir_codes, NULL, MODULE_NAME);
+        err = rc_register_device(dev);
         if (err < 0) {
-                input_free_device(input_dev);
+                rc_free_device(dev);
                 return err;
         }
 
+        dm1105->ir.dev = dev;
         return 0;
 }
 
 void __devexit dm1105_ir_exit(struct dm1105_dev *dm1105)
 {
-        ir_input_unregister(dm1105->ir.input_dev);
+        rc_unregister_device(dm1105->ir.dev);
 }
 
 static int __devinit dm1105_hw_init(struct dm1105_dev *dev)
@@ -708,6 +853,38 @@ static int __devinit frontend_init(struct dm1105_dev *dev)
         int ret;
 
         switch (dev->boardnr) {
+        case DM1105_BOARD_UNBRANDED_I2C_ON_GPIO:
+                dm1105_gpio_enable(dev, GPIO15, 1);
+                dm1105_gpio_clear(dev, GPIO15);
+                msleep(100);
+                dm1105_gpio_set(dev, GPIO15);
+                msleep(200);
+                dev->fe = dvb_attach(
+                        stv0299_attach, &sharp_z0194a_config,
+                        &dev->i2c_bb_adap);
+                if (dev->fe) {
+                        dev->fe->ops.set_voltage = dm1105_set_voltage;
+                        dvb_attach(dvb_pll_attach, dev->fe, 0x60,
+                                        &dev->i2c_bb_adap, DVB_PLL_OPERA1);
+                        break;
+                }
+
+                dev->fe = dvb_attach(
+                        stv0288_attach, &earda_config,
+                        &dev->i2c_bb_adap);
+                if (dev->fe) {
+                        dev->fe->ops.set_voltage = dm1105_set_voltage;
+                        dvb_attach(stb6000_attach, dev->fe, 0x61,
+                                        &dev->i2c_bb_adap);
+                        break;
+                }
+
+                dev->fe = dvb_attach(
+                        si21xx_attach, &serit_config,
+                        &dev->i2c_bb_adap);
+                if (dev->fe)
+                        dev->fe->ops.set_voltage = dm1105_set_voltage;
+                break;
         case DM1105_BOARD_DVBWORLD_2004:
                 dev->fe = dvb_attach(
                         cx24116_attach, &serit_sp2633_config,
@@ -862,7 +1039,6 @@ static int __devinit dm1105_probe(struct pci_dev *pdev,
         i2c_set_adapdata(&dev->i2c_adap, dev);
         strcpy(dev->i2c_adap.name, DRIVER_NAME);
         dev->i2c_adap.owner = THIS_MODULE;
-        dev->i2c_adap.class = I2C_CLASS_TV_DIGITAL;
         dev->i2c_adap.dev.parent = &pdev->dev;
         dev->i2c_adap.algo = &dm1105_algo;
         dev->i2c_adap.algo_data = dev;
@@ -871,11 +1047,32 @@ static int __devinit dm1105_probe(struct pci_dev *pdev,
         if (ret < 0)
                 goto err_dm1105_hw_exit;
 
+        i2c_set_adapdata(&dev->i2c_bb_adap, dev);
+        strcpy(dev->i2c_bb_adap.name, DM1105_I2C_GPIO_NAME);
+        dev->i2c_bb_adap.owner = THIS_MODULE;
+        dev->i2c_bb_adap.dev.parent = &pdev->dev;
+        dev->i2c_bb_adap.algo_data = &dev->i2c_bit;
+        dev->i2c_bit.data = dev;
+        dev->i2c_bit.setsda = dm1105_setsda;
+        dev->i2c_bit.setscl = dm1105_setscl;
+        dev->i2c_bit.getsda = dm1105_getsda;
+        dev->i2c_bit.getscl = dm1105_getscl;
+        dev->i2c_bit.udelay = 10;
+        dev->i2c_bit.timeout = 10;
+
+        /* Raise SCL and SDA */
+        dm1105_setsda(dev, 1);
+        dm1105_setscl(dev, 1);
+
+        ret = i2c_bit_add_bus(&dev->i2c_bb_adap);
+        if (ret < 0)
+                goto err_i2c_del_adapter;
+
         /* dvb */
         ret = dvb_register_adapter(&dev->dvb_adapter, DRIVER_NAME,
                                         THIS_MODULE, &pdev->dev, adapter_nr);
         if (ret < 0)
-                goto err_i2c_del_adapter;
+                goto err_i2c_del_adapters;
 
         dvb_adapter = &dev->dvb_adapter;
 
@@ -953,6 +1150,8 @@ err_dvb_dmx_release:
         dvb_dmx_release(dvbdemux);
 err_dvb_unregister_adapter:
         dvb_unregister_adapter(dvb_adapter);
+err_i2c_del_adapters:
+        i2c_del_adapter(&dev->i2c_bb_adap);
 err_i2c_del_adapter:
         i2c_del_adapter(&dev->i2c_adap);
 err_dm1105_hw_exit:
diff --git a/drivers/media/dvb/dvb-core/dmxdev.c b/drivers/media/dvb/dvb-core/dmxdev.c
index 0042306ea11b..e4b5c03ae516 100644
--- a/drivers/media/dvb/dvb-core/dmxdev.c
+++ b/drivers/media/dvb/dvb-core/dmxdev.c
@@ -25,7 +25,6 @@
 #include <linux/slab.h>
 #include <linux/vmalloc.h>
 #include <linux/module.h>
-#include <linux/smp_lock.h>
 #include <linux/poll.h>
 #include <linux/ioctl.h>
 #include <linux/wait.h>
@@ -573,13 +572,13 @@ static int dvb_dmxdev_start_feed(struct dmxdev *dmxdev,
         dmx_output_t otype;
         int ret;
         int ts_type;
-        enum dmx_ts_pes ts_pes;
+        dmx_pes_type_t ts_pes;
         struct dmx_ts_feed *tsfeed;
 
         feed->ts = NULL;
         otype = para->output;
 
-        ts_pes = (enum dmx_ts_pes)para->pes_type;
+        ts_pes = para->pes_type;
 
         if (ts_pes < DMX_PES_OTHER)
                 ts_type = TS_DECODER;
@@ -1088,13 +1087,7 @@ static int dvb_demux_do_ioctl(struct file *file,
 static long dvb_demux_ioctl(struct file *file, unsigned int cmd,
                             unsigned long arg)
 {
-        int ret;
-
-        lock_kernel();
-        ret = dvb_usercopy(file, cmd, arg, dvb_demux_do_ioctl);
-        unlock_kernel();
-
-        return ret;
+        return dvb_usercopy(file, cmd, arg, dvb_demux_do_ioctl);
 }
 
 static unsigned int dvb_demux_poll(struct file *file, poll_table *wait)
@@ -1150,6 +1143,7 @@ static const struct file_operations dvb_demux_fops = {
         .open = dvb_demux_open,
         .release = dvb_demux_release,
         .poll = dvb_demux_poll,
+        .llseek = default_llseek,
 };
 
 static struct dvb_device dvbdev_demux = {
@@ -1186,13 +1180,7 @@ static int dvb_dvr_do_ioctl(struct file *file,
 static long dvb_dvr_ioctl(struct file *file,
                          unsigned int cmd, unsigned long arg)
 {
-        int ret;
-
-        lock_kernel();
-        ret = dvb_usercopy(file, cmd, arg, dvb_dvr_do_ioctl);
-        unlock_kernel();
-
-        return ret;
+        return dvb_usercopy(file, cmd, arg, dvb_dvr_do_ioctl);
 }
 
 static unsigned int dvb_dvr_poll(struct file *file, poll_table *wait)
@@ -1225,6 +1213,7 @@ static const struct file_operations dvb_dvr_fops = {
         .open = dvb_dvr_open,
         .release = dvb_dvr_release,
         .poll = dvb_dvr_poll,
+        .llseek = default_llseek,
 };
 
 static struct dvb_device dvbdev_dvr = {
diff --git a/drivers/media/dvb/dvb-core/dvb_ca_en50221.c b/drivers/media/dvb/dvb-core/dvb_ca_en50221.c
index cb97e6b85432..7ea517b7e186 100644
--- a/drivers/media/dvb/dvb-core/dvb_ca_en50221.c
+++ b/drivers/media/dvb/dvb-core/dvb_ca_en50221.c
@@ -36,7 +36,6 @@
 #include <linux/delay.h>
 #include <linux/spinlock.h>
 #include <linux/sched.h>
-#include <linux/smp_lock.h>
 #include <linux/kthread.h>
 
 #include "dvb_ca_en50221.h"
@@ -1259,13 +1258,7 @@ static int dvb_ca_en50221_io_do_ioctl(struct file *file,
 static long dvb_ca_en50221_io_ioctl(struct file *file,
                                     unsigned int cmd, unsigned long arg)
 {
-        int ret;
-
-        lock_kernel();
-        ret = dvb_usercopy(file, cmd, arg, dvb_ca_en50221_io_do_ioctl);
-        unlock_kernel();
-
-        return ret;
+        return dvb_usercopy(file, cmd, arg, dvb_ca_en50221_io_do_ioctl);
 }
 
 
@@ -1628,6 +1621,7 @@ static const struct file_operations dvb_ca_fops = {
         .open = dvb_ca_en50221_io_open,
         .release = dvb_ca_en50221_io_release,
         .poll = dvb_ca_en50221_io_poll,
+        .llseek = noop_llseek,
 };
 
 static struct dvb_device dvbdev_ca = {
diff --git a/drivers/media/dvb/dvb-core/dvb_demux.c b/drivers/media/dvb/dvb-core/dvb_demux.c
index 4a88a3e4db2b..faa3671b649e 100644
--- a/drivers/media/dvb/dvb-core/dvb_demux.c
+++ b/drivers/media/dvb/dvb-core/dvb_demux.c
@@ -478,97 +478,94 @@ void dvb_dmx_swfilter_packets(struct dvb_demux *demux, const u8 *buf,
 
 EXPORT_SYMBOL(dvb_dmx_swfilter_packets);
 
-void dvb_dmx_swfilter(struct dvb_demux *demux, const u8 *buf, size_t count)
+static inline int find_next_packet(const u8 *buf, int pos, size_t count,
+                                   const int pktsize)
 {
-        int p = 0, i, j;
+        int start = pos, lost;
 
-        spin_lock(&demux->lock);
-
-        if (demux->tsbufp) {
-                i = demux->tsbufp;
-                j = 188 - i;
-                if (count < j) {
-                        memcpy(&demux->tsbuf[i], buf, count);
-                        demux->tsbufp += count;
-                        goto bailout;
-                }
-                memcpy(&demux->tsbuf[i], buf, j);
-                if (demux->tsbuf[0] == 0x47)
-                        dvb_dmx_swfilter_packet(demux, demux->tsbuf);
-                demux->tsbufp = 0;
-                p += j;
+        while (pos < count) {
+                if (buf[pos] == 0x47 ||
+                    (pktsize == 204 && buf[pos] == 0xB8))
+                        break;
+                pos++;
         }
 
-        while (p < count) {
-                if (buf[p] == 0x47) {
-                        if (count - p >= 188) {
-                                dvb_dmx_swfilter_packet(demux, &buf[p]);
-                                p += 188;
-                        } else {
-                                i = count - p;
-                                memcpy(demux->tsbuf, &buf[p], i);
-                                demux->tsbufp = i;
-                                goto bailout;
-                        }
-                } else
-                        p++;
+        lost = pos - start;
+        if (lost) {
+                /* This garbage is part of a valid packet? */
+                int backtrack = pos - pktsize;
+                if (backtrack >= 0 && (buf[backtrack] == 0x47 ||
+                    (pktsize == 204 && buf[backtrack] == 0xB8)))
+                        return backtrack;
         }
 
-bailout:
-        spin_unlock(&demux->lock);
+        return pos;
 }
 
-EXPORT_SYMBOL(dvb_dmx_swfilter);
-
-void dvb_dmx_swfilter_204(struct dvb_demux *demux, const u8 *buf, size_t count)
+/* Filter all pktsize= 188 or 204 sized packets and skip garbage. */
+static inline void _dvb_dmx_swfilter(struct dvb_demux *demux, const u8 *buf,
+                size_t count, const int pktsize)
 {
         int p = 0, i, j;
-        u8 tmppack[188];
+        const u8 *q;
 
         spin_lock(&demux->lock);
 
-        if (demux->tsbufp) {
+        if (demux->tsbufp) { /* tsbuf[0] is now 0x47. */
                 i = demux->tsbufp;
-                j = 204 - i;
+                j = pktsize - i;
                 if (count < j) {
                         memcpy(&demux->tsbuf[i], buf, count);
                         demux->tsbufp += count;
                         goto bailout;
                 }
                 memcpy(&demux->tsbuf[i], buf, j);
-                if ((demux->tsbuf[0] == 0x47) || (demux->tsbuf[0] == 0xB8)) {
-                        memcpy(tmppack, demux->tsbuf, 188);
-                        if (tmppack[0] == 0xB8)
-                                tmppack[0] = 0x47;
-                        dvb_dmx_swfilter_packet(demux, tmppack);
-                }
+                if (demux->tsbuf[0] == 0x47) /* double check */
+                        dvb_dmx_swfilter_packet(demux, demux->tsbuf);
                 demux->tsbufp = 0;
                 p += j;
         }
 
-        while (p < count) {
-                if ((buf[p] == 0x47) || (buf[p] == 0xB8)) {
-                        if (count - p >= 204) {
-                                memcpy(tmppack, &buf[p], 188);
-                                if (tmppack[0] == 0xB8)
-                                        tmppack[0] = 0x47;
-                                dvb_dmx_swfilter_packet(demux, tmppack);
-                                p += 204;
-                        } else {
-                                i = count - p;
-                                memcpy(demux->tsbuf, &buf[p], i);
-                                demux->tsbufp = i;
-                                goto bailout;
-                        }
-                } else {
-                        p++;
+        while (1) {
+                p = find_next_packet(buf, p, count, pktsize);
+                if (p >= count)
+                        break;
+                if (count - p < pktsize)
+                        break;
+
+                q = &buf[p];
+
+                if (pktsize == 204 && (*q == 0xB8)) {
+                        memcpy(demux->tsbuf, q, 188);
+                        demux->tsbuf[0] = 0x47;
+                        q = demux->tsbuf;
                 }
+                dvb_dmx_swfilter_packet(demux, q);
+                p += pktsize;
+        }
+
+        i = count - p;
+        if (i) {
+                memcpy(demux->tsbuf, &buf[p], i);
+                demux->tsbufp = i;
+                if (pktsize == 204 && demux->tsbuf[0] == 0xB8)
+                        demux->tsbuf[0] = 0x47;
         }
 
 bailout:
         spin_unlock(&demux->lock);
 }
 
+void dvb_dmx_swfilter(struct dvb_demux *demux, const u8 *buf, size_t count)
+{
+        _dvb_dmx_swfilter(demux, buf, count, 188);
+}
+EXPORT_SYMBOL(dvb_dmx_swfilter);
+
+void dvb_dmx_swfilter_204(struct dvb_demux *demux, const u8 *buf, size_t count)
+{
+        _dvb_dmx_swfilter(demux, buf, count, 204);
+}
 EXPORT_SYMBOL(dvb_dmx_swfilter_204);
 
 static struct dvb_demux_filter *dvb_dmx_filter_alloc(struct dvb_demux *demux)
diff --git a/drivers/media/dvb/dvb-core/dvb_frontend.c b/drivers/media/dvb/dvb-core/dvb_frontend.c
index 4d45b7d6b3fb..5b6b451d4694 100644
--- a/drivers/media/dvb/dvb-core/dvb_frontend.c
+++ b/drivers/media/dvb/dvb-core/dvb_frontend.c
@@ -36,7 +36,6 @@
 #include <linux/list.h>
 #include <linux/freezer.h>
 #include <linux/jiffies.h>
-#include <linux/smp_lock.h>
 #include <linux/kthread.h>
 #include <asm/processor.h>
 
@@ -106,7 +105,8 @@ struct dvb_frontend_private {
 
         /* thread/frontend values */
         struct dvb_device *dvbdev;
-        struct dvb_frontend_parameters parameters;
+        struct dvb_frontend_parameters parameters_in;
+        struct dvb_frontend_parameters parameters_out;
         struct dvb_fe_events events;
         struct semaphore sem;
         struct list_head list_head;
@@ -161,12 +161,11 @@ static void dvb_frontend_add_event(struct dvb_frontend *fe, fe_status_t status)
 
         e = &events->events[events->eventw];
 
-        memcpy (&e->parameters, &fepriv->parameters,
-                sizeof (struct dvb_frontend_parameters));
-
         if (status & FE_HAS_LOCK)
                 if (fe->ops.get_frontend)
-                        fe->ops.get_frontend(fe, &e->parameters);
+                        fe->ops.get_frontend(fe, &fepriv->parameters_out);
+
+        e->parameters = fepriv->parameters_out;
 
         events->eventw = wp;
 
@@ -278,12 +277,12 @@ static int dvb_frontend_swzigzag_autotune(struct dvb_frontend *fe, int check_wra
         int ready = 0;
         int fe_set_err = 0;
         struct dvb_frontend_private *fepriv = fe->frontend_priv;
-        int original_inversion = fepriv->parameters.inversion;
-        u32 original_frequency = fepriv->parameters.frequency;
+        int original_inversion = fepriv->parameters_in.inversion;
+        u32 original_frequency = fepriv->parameters_in.frequency;
 
         /* are we using autoinversion? */
         autoinversion = ((!(fe->ops.info.caps & FE_CAN_INVERSION_AUTO)) &&
-                         (fepriv->parameters.inversion == INVERSION_AUTO));
+                         (fepriv->parameters_in.inversion == INVERSION_AUTO));
 
         /* setup parameters correctly */
         while(!ready) {
@@ -349,18 +348,19 @@ static int dvb_frontend_swzigzag_autotune(struct dvb_frontend *fe, int check_wra
                 fepriv->auto_step, fepriv->auto_sub_step, fepriv->started_auto_step);
 
         /* set the frontend itself */
-        fepriv->parameters.frequency += fepriv->lnb_drift;
+        fepriv->parameters_in.frequency += fepriv->lnb_drift;
         if (autoinversion)
-                fepriv->parameters.inversion = fepriv->inversion;
+                fepriv->parameters_in.inversion = fepriv->inversion;
         if (fe->ops.set_frontend)
-                fe_set_err = fe->ops.set_frontend(fe, &fepriv->parameters);
+                fe_set_err = fe->ops.set_frontend(fe, &fepriv->parameters_in);
+        fepriv->parameters_out = fepriv->parameters_in;
         if (fe_set_err < 0) {
                 fepriv->state = FESTATE_ERROR;
                 return fe_set_err;
         }
 
-        fepriv->parameters.frequency = original_frequency;
-        fepriv->parameters.inversion = original_inversion;
+        fepriv->parameters_in.frequency = original_frequency;
+        fepriv->parameters_in.inversion = original_inversion;
 
         fepriv->auto_sub_step++;
         return 0;
@@ -384,7 +384,8 @@ static void dvb_frontend_swzigzag(struct dvb_frontend *fe)
                 if (fepriv->state & FESTATE_RETUNE) {
                         if (fe->ops.set_frontend)
                                 retval = fe->ops.set_frontend(fe,
-                                                        &fepriv->parameters);
+                                                        &fepriv->parameters_in);
+                        fepriv->parameters_out = fepriv->parameters_in;
                         if (retval < 0)
                                 fepriv->state = FESTATE_ERROR;
                         else
@@ -414,8 +415,8 @@ static void dvb_frontend_swzigzag(struct dvb_frontend *fe)
 
                 /* if we're tuned, then we have determined the correct inversion */
                 if ((!(fe->ops.info.caps & FE_CAN_INVERSION_AUTO)) &&
-                    (fepriv->parameters.inversion == INVERSION_AUTO)) {
-                        fepriv->parameters.inversion = fepriv->inversion;
+                    (fepriv->parameters_in.inversion == INVERSION_AUTO)) {
+                        fepriv->parameters_in.inversion = fepriv->inversion;
                 }
                 return;
         }
@@ -595,12 +596,14 @@ restart:
 
                                 if (fepriv->state & FESTATE_RETUNE) {
                                         dprintk("%s: Retune requested, FESTATE_RETUNE\n", __func__);
-                                        params = &fepriv->parameters;
+                                        params = &fepriv->parameters_in;
                                         fepriv->state = FESTATE_TUNED;
                                 }
 
                                 if (fe->ops.tune)
                                         fe->ops.tune(fe, params, fepriv->tune_mode_flags, &fepriv->delay, &s);
+                                if (params)
+                                        fepriv->parameters_out = *params;
 
                                 if (s != fepriv->status && !(fepriv->tune_mode_flags & FE_TUNE_MODE_ONESHOT)) {
                                         dprintk("%s: state changed, adding current state\n", __func__);
@@ -613,11 +616,9 @@ restart:
                                 dvb_frontend_swzigzag(fe);
                                 break;
                         case DVBFE_ALGO_CUSTOM:
-                                params = NULL; /* have we been asked to RETUNE ?        */
                                 dprintk("%s: Frontend ALGO = DVBFE_ALGO_CUSTOM, state=%d\n", __func__, fepriv->state);
                                 if (fepriv->state & FESTATE_RETUNE) {
                                         dprintk("%s: Retune requested, FESTAT_RETUNE\n", __func__);
-                                        params = &fepriv->parameters;
                                         fepriv->state = FESTATE_TUNED;
                                 }
                                 /* Case where we are going to search for a carrier
@@ -626,7 +627,7 @@ restart:
                                  */
                                 if (fepriv->algo_status & DVBFE_ALGO_SEARCH_AGAIN) {
                                         if (fe->ops.search) {
-                                                fepriv->algo_status = fe->ops.search(fe, &fepriv->parameters);
+                                                fepriv->algo_status = fe->ops.search(fe, &fepriv->parameters_in);
                                                 /* We did do a search as was requested, the flags are
                                                  * now unset as well and has the flags wrt to search.
                                                  */
@@ -637,11 +638,12 @@ restart:
                                 /* Track the carrier if the search was successful */
                                 if (fepriv->algo_status == DVBFE_ALGO_SEARCH_SUCCESS) {
                                         if (fe->ops.track)
-                                                fe->ops.track(fe, &fepriv->parameters);
+                                                fe->ops.track(fe, &fepriv->parameters_in);
                                 } else {
                                         fepriv->algo_status |= DVBFE_ALGO_SEARCH_AGAIN;
                                         fepriv->delay = HZ / 2;
                                 }
+                                fepriv->parameters_out = fepriv->parameters_in;
                                 fe->ops.read_status(fe, &s);
                                 if (s != fepriv->status) {
                                         dvb_frontend_add_event(fe, s); /* update event list */
@@ -702,7 +704,7 @@ static void dvb_frontend_stop(struct dvb_frontend *fe)
 
         kthread_stop(fepriv->thread);
 
-        init_MUTEX (&fepriv->sem);
+        sema_init(&fepriv->sem, 1);
         fepriv->state = FESTATE_IDLE;
 
         /* paranoia check in case a signal arrived */
@@ -861,34 +863,34 @@ static int dvb_frontend_check_parameters(struct dvb_frontend *fe,
 
 static int dvb_frontend_clear_cache(struct dvb_frontend *fe)
 {
+        struct dtv_frontend_properties *c = &fe->dtv_property_cache;
         int i;
 
-        memset(&(fe->dtv_property_cache), 0,
-                        sizeof(struct dtv_frontend_properties));
-
-        fe->dtv_property_cache.state = DTV_CLEAR;
-        fe->dtv_property_cache.delivery_system = SYS_UNDEFINED;
-        fe->dtv_property_cache.inversion = INVERSION_AUTO;
-        fe->dtv_property_cache.fec_inner = FEC_AUTO;
-        fe->dtv_property_cache.transmission_mode = TRANSMISSION_MODE_AUTO;
-        fe->dtv_property_cache.bandwidth_hz = BANDWIDTH_AUTO;
-        fe->dtv_property_cache.guard_interval = GUARD_INTERVAL_AUTO;
-        fe->dtv_property_cache.hierarchy = HIERARCHY_AUTO;
-        fe->dtv_property_cache.symbol_rate = QAM_AUTO;
-        fe->dtv_property_cache.code_rate_HP = FEC_AUTO;
-        fe->dtv_property_cache.code_rate_LP = FEC_AUTO;
-
-        fe->dtv_property_cache.isdbt_partial_reception = -1;
-        fe->dtv_property_cache.isdbt_sb_mode = -1;
-        fe->dtv_property_cache.isdbt_sb_subchannel = -1;
-        fe->dtv_property_cache.isdbt_sb_segment_idx = -1;
-        fe->dtv_property_cache.isdbt_sb_segment_count = -1;
-        fe->dtv_property_cache.isdbt_layer_enabled = 0x7;
+        memset(c, 0, sizeof(struct dtv_frontend_properties));
+
+        c->state = DTV_CLEAR;
+        c->delivery_system = SYS_UNDEFINED;
+        c->inversion = INVERSION_AUTO;
+        c->fec_inner = FEC_AUTO;
+        c->transmission_mode = TRANSMISSION_MODE_AUTO;
+        c->bandwidth_hz = BANDWIDTH_AUTO;
+        c->guard_interval = GUARD_INTERVAL_AUTO;
+        c->hierarchy = HIERARCHY_AUTO;
+        c->symbol_rate = QAM_AUTO;
+        c->code_rate_HP = FEC_AUTO;
+        c->code_rate_LP = FEC_AUTO;
+
+        c->isdbt_partial_reception = -1;
+        c->isdbt_sb_mode = -1;
+        c->isdbt_sb_subchannel = -1;
+        c->isdbt_sb_segment_idx = -1;
+        c->isdbt_sb_segment_count = -1;
+        c->isdbt_layer_enabled = 0x7;
         for (i = 0; i < 3; i++) {
-                fe->dtv_property_cache.layer[i].fec = FEC_AUTO;
-                fe->dtv_property_cache.layer[i].modulation = QAM_AUTO;
-                fe->dtv_property_cache.layer[i].interleaving = -1;
-                fe->dtv_property_cache.layer[i].segment_count = -1;
+                c->layer[i].fec = FEC_AUTO;
+                c->layer[i].modulation = QAM_AUTO;
+                c->layer[i].interleaving = -1;
+                c->layer[i].segment_count = -1;
         }
 
         return 0;
@@ -1021,10 +1023,9 @@ static int is_legacy_delivery_system(fe_delivery_system_t s)
  * it's being used for the legacy or new API, reducing code and complexity.
  */
 static void dtv_property_cache_sync(struct dvb_frontend *fe,
-                                    struct dvb_frontend_parameters *p)
+                                    struct dtv_frontend_properties *c,
+                                    const struct dvb_frontend_parameters *p)
 {
-        struct dtv_frontend_properties *c = &fe->dtv_property_cache;
-
         c->frequency = p->frequency;
         c->inversion = p->inversion;
 
@@ -1075,9 +1076,9 @@ static void dtv_property_cache_sync(struct dvb_frontend *fe,
  */
 static void dtv_property_legacy_params_sync(struct dvb_frontend *fe)
 {
-        struct dtv_frontend_properties *c = &fe->dtv_property_cache;
+        const struct dtv_frontend_properties *c = &fe->dtv_property_cache;
         struct dvb_frontend_private *fepriv = fe->frontend_priv;
-        struct dvb_frontend_parameters *p = &fepriv->parameters;
+        struct dvb_frontend_parameters *p = &fepriv->parameters_in;
 
         p->frequency = c->frequency;
         p->inversion = c->inversion;
@@ -1087,14 +1088,12 @@ static void dtv_property_legacy_params_sync(struct dvb_frontend *fe)
                 dprintk("%s() Preparing QPSK req\n", __func__);
                 p->u.qpsk.symbol_rate = c->symbol_rate;
                 p->u.qpsk.fec_inner = c->fec_inner;
-                c->delivery_system = SYS_DVBS;
                 break;
         case FE_QAM:
                 dprintk("%s() Preparing QAM req\n", __func__);
                 p->u.qam.symbol_rate = c->symbol_rate;
                 p->u.qam.fec_inner = c->fec_inner;
                 p->u.qam.modulation = c->modulation;
-                c->delivery_system = SYS_DVBC_ANNEX_AC;
                 break;
         case FE_OFDM:
                 dprintk("%s() Preparing OFDM req\n", __func__);
@@ -1112,15 +1111,10 @@ static void dtv_property_legacy_params_sync(struct dvb_frontend *fe)
                 p->u.ofdm.transmission_mode = c->transmission_mode;
                 p->u.ofdm.guard_interval = c->guard_interval;
                 p->u.ofdm.hierarchy_information = c->hierarchy;
-                c->delivery_system = SYS_DVBT;
                 break;
         case FE_ATSC:
                 dprintk("%s() Preparing VSB req\n", __func__);
                 p->u.vsb.modulation = c->modulation;
-                if ((c->modulation == VSB_8) || (c->modulation == VSB_16))
-                        c->delivery_system = SYS_ATSC;
-                else
-                        c->delivery_system = SYS_DVBC_ANNEX_B;
                 break;
         }
 }
@@ -1130,9 +1124,9 @@ static void dtv_property_legacy_params_sync(struct dvb_frontend *fe)
  */
 static void dtv_property_adv_params_sync(struct dvb_frontend *fe)
 {
-        struct dtv_frontend_properties *c = &fe->dtv_property_cache;
+        const struct dtv_frontend_properties *c = &fe->dtv_property_cache;
         struct dvb_frontend_private *fepriv = fe->frontend_priv;
-        struct dvb_frontend_parameters *p = &fepriv->parameters;
+        struct dvb_frontend_parameters *p = &fepriv->parameters_in;
 
         p->frequency = c->frequency;
         p->inversion = c->inversion;
@@ -1149,10 +1143,9 @@ static void dtv_property_adv_params_sync(struct dvb_frontend *fe)
                 break;
         }
 
-        if(c->delivery_system == SYS_ISDBT) {
-                /* Fake out a generic DVB-T request so we pass validation in the ioctl */
-                p->frequency = c->frequency;
-                p->inversion = c->inversion;
+        /* Fake out a generic DVB-T request so we pass validation in the ioctl */
+        if ((c->delivery_system == SYS_ISDBT) ||
+            (c->delivery_system == SYS_DVBT2)) {
                 p->u.ofdm.constellation = QAM_AUTO;
                 p->u.ofdm.code_rate_HP = FEC_AUTO;
                 p->u.ofdm.code_rate_LP = FEC_AUTO;
@@ -1172,7 +1165,7 @@ static void dtv_property_adv_params_sync(struct dvb_frontend *fe)
 
 static void dtv_property_cache_submit(struct dvb_frontend *fe)
 {
-        struct dtv_frontend_properties *c = &fe->dtv_property_cache;
+        const struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 
         /* For legacy delivery systems we don't need the delivery_system to
          * be specified, but we populate the older structures from the cache
@@ -1205,133 +1198,149 @@ static int dtv_property_process_get(struct dvb_frontend *fe,
                                     struct dtv_property *tvp,
                                     struct file *file)
 {
-        int r = 0;
-
-        /* Allow the frontend to validate incoming properties */
-        if (fe->ops.get_property)
-                r = fe->ops.get_property(fe, tvp);
+        const struct dtv_frontend_properties *c = &fe->dtv_property_cache;
+        struct dvb_frontend_private *fepriv = fe->frontend_priv;
+        struct dtv_frontend_properties cdetected;
+        int r;
 
-        if (r < 0)
-                return r;
+        /*
+         * If the driver implements a get_frontend function, then convert
+         * detected parameters to S2API properties.
+         */
+        if (fe->ops.get_frontend) {
+                cdetected = *c;
+                dtv_property_cache_sync(fe, &cdetected, &fepriv->parameters_out);
+                c = &cdetected;
+        }
 
         switch(tvp->cmd) {
         case DTV_FREQUENCY:
-                tvp->u.data = fe->dtv_property_cache.frequency;
+                tvp->u.data = c->frequency;
                 break;
         case DTV_MODULATION:
-                tvp->u.data = fe->dtv_property_cache.modulation;
+                tvp->u.data = c->modulation;
                 break;
         case DTV_BANDWIDTH_HZ:
-                tvp->u.data = fe->dtv_property_cache.bandwidth_hz;
+                tvp->u.data = c->bandwidth_hz;
                 break;
         case DTV_INVERSION:
-                tvp->u.data = fe->dtv_property_cache.inversion;
+                tvp->u.data = c->inversion;
                 break;
         case DTV_SYMBOL_RATE:
-                tvp->u.data = fe->dtv_property_cache.symbol_rate;
+                tvp->u.data = c->symbol_rate;
                 break;
         case DTV_INNER_FEC:
-                tvp->u.data = fe->dtv_property_cache.fec_inner;
+                tvp->u.data = c->fec_inner;
                 break;
         case DTV_PILOT:
-                tvp->u.data = fe->dtv_property_cache.pilot;
+                tvp->u.data = c->pilot;
                 break;
         case DTV_ROLLOFF:
-                tvp->u.data = fe->dtv_property_cache.rolloff;
+                tvp->u.data = c->rolloff;
                 break;
         case DTV_DELIVERY_SYSTEM:
-                tvp->u.data = fe->dtv_property_cache.delivery_system;
+                tvp->u.data = c->delivery_system;
                 break;
         case DTV_VOLTAGE:
-                tvp->u.data = fe->dtv_property_cache.voltage;
+                tvp->u.data = c->voltage;
                 break;
         case DTV_TONE:
-                tvp->u.data = fe->dtv_property_cache.sectone;
+                tvp->u.data = c->sectone;
                 break;
         case DTV_API_VERSION:
                 tvp->u.data = (DVB_API_VERSION << 8) | DVB_API_VERSION_MINOR;
                 break;
         case DTV_CODE_RATE_HP:
-                tvp->u.data = fe->dtv_property_cache.code_rate_HP;
+                tvp->u.data = c->code_rate_HP;
                 break;
         case DTV_CODE_RATE_LP:
-                tvp->u.data = fe->dtv_property_cache.code_rate_LP;
+                tvp->u.data = c->code_rate_LP;
                 break;
         case DTV_GUARD_INTERVAL:
-                tvp->u.data = fe->dtv_property_cache.guard_interval;
+                tvp->u.data = c->guard_interval;
                 break;
         case DTV_TRANSMISSION_MODE:
-                tvp->u.data = fe->dtv_property_cache.transmission_mode;
+                tvp->u.data = c->transmission_mode;
                 break;
         case DTV_HIERARCHY:
-                tvp->u.data = fe->dtv_property_cache.hierarchy;
+                tvp->u.data = c->hierarchy;
                 break;
 
         /* ISDB-T Support here */
         case DTV_ISDBT_PARTIAL_RECEPTION:
-                tvp->u.data = fe->dtv_property_cache.isdbt_partial_reception;
+                tvp->u.data = c->isdbt_partial_reception;
                 break;
         case DTV_ISDBT_SOUND_BROADCASTING:
-                tvp->u.data = fe->dtv_property_cache.isdbt_sb_mode;
+                tvp->u.data = c->isdbt_sb_mode;
                 break;
         case DTV_ISDBT_SB_SUBCHANNEL_ID:
-                tvp->u.data = fe->dtv_property_cache.isdbt_sb_subchannel;
+                tvp->u.data = c->isdbt_sb_subchannel;
                 break;
         case DTV_ISDBT_SB_SEGMENT_IDX:
-                tvp->u.data = fe->dtv_property_cache.isdbt_sb_segment_idx;
+                tvp->u.data = c->isdbt_sb_segment_idx;
                 break;
         case DTV_ISDBT_SB_SEGMENT_COUNT:
-                tvp->u.data = fe->dtv_property_cache.isdbt_sb_segment_count;
+                tvp->u.data = c->isdbt_sb_segment_count;
                 break;
         case DTV_ISDBT_LAYER_ENABLED:
-                tvp->u.data = fe->dtv_property_cache.isdbt_layer_enabled;
+                tvp->u.data = c->isdbt_layer_enabled;
                 break;
         case DTV_ISDBT_LAYERA_FEC:
-                tvp->u.data = fe->dtv_property_cache.layer[0].fec;
+                tvp->u.data = c->layer[0].fec;
                 break;
         case DTV_ISDBT_LAYERA_MODULATION:
-                tvp->u.data = fe->dtv_property_cache.layer[0].modulation;
+                tvp->u.data = c->layer[0].modulation;
                 break;
         case DTV_ISDBT_LAYERA_SEGMENT_COUNT:
-                tvp->u.data = fe->dtv_property_cache.layer[0].segment_count;
+                tvp->u.data = c->layer[0].segment_count;
                 break;
         case DTV_ISDBT_LAYERA_TIME_INTERLEAVING:
-                tvp->u.data = fe->dtv_property_cache.layer[0].interleaving;
+                tvp->u.data = c->layer[0].interleaving;
                 break;
         case DTV_ISDBT_LAYERB_FEC:
-                tvp->u.data = fe->dtv_property_cache.layer[1].fec;
+                tvp->u.data = c->layer[1].fec;
                 break;
         case DTV_ISDBT_LAYERB_MODULATION:
-                tvp->u.data = fe->dtv_property_cache.layer[1].modulation;
+                tvp->u.data = c->layer[1].modulation;
                 break;
         case DTV_ISDBT_LAYERB_SEGMENT_COUNT:
-                tvp->u.data = fe->dtv_property_cache.layer[1].segment_count;
+                tvp->u.data = c->layer[1].segment_count;
                 break;
         case DTV_ISDBT_LAYERB_TIME_INTERLEAVING:
-                tvp->u.data = fe->dtv_property_cache.layer[1].interleaving;
+                tvp->u.data = c->layer[1].interleaving;
                 break;
         case DTV_ISDBT_LAYERC_FEC:
-                tvp->u.data = fe->dtv_property_cache.layer[2].fec;
+                tvp->u.data = c->layer[2].fec;
                 break;
         case DTV_ISDBT_LAYERC_MODULATION:
-                tvp->u.data = fe->dtv_property_cache.layer[2].modulation;
+                tvp->u.data = c->layer[2].modulation;
                 break;
         case DTV_ISDBT_LAYERC_SEGMENT_COUNT:
-                tvp->u.data = fe->dtv_property_cache.layer[2].segment_count;
+                tvp->u.data = c->layer[2].segment_count;
                 break;
         case DTV_ISDBT_LAYERC_TIME_INTERLEAVING:
-                tvp->u.data = fe->dtv_property_cache.layer[2].interleaving;
+                tvp->u.data = c->layer[2].interleaving;
                 break;
         case DTV_ISDBS_TS_ID:
-                tvp->u.data = fe->dtv_property_cache.isdbs_ts_id;
+                tvp->u.data = c->isdbs_ts_id;
+                break;
+        case DTV_DVBT2_PLP_ID:
+                tvp->u.data = c->dvbt2_plp_id;
                 break;
         default:
-                r = -1;
+                return -EINVAL;
+        }
+
+        /* Allow the frontend to override outgoing properties */
+        if (fe->ops.get_property) {
+                r = fe->ops.get_property(fe, tvp);
+                if (r < 0)
+                        return r;
         }
 
         dtv_property_dump(tvp);
 
-        return r;
+        return 0;
 }
 
 static int dtv_property_process_set(struct dvb_frontend *fe,
@@ -1339,15 +1348,16 @@ static int dtv_property_process_set(struct dvb_frontend *fe,
                                     struct file *file)
 {
         int r = 0;
+        struct dtv_frontend_properties *c = &fe->dtv_property_cache;
         struct dvb_frontend_private *fepriv = fe->frontend_priv;
         dtv_property_dump(tvp);
 
         /* Allow the frontend to validate incoming properties */
-        if (fe->ops.set_property)
+        if (fe->ops.set_property) {
                 r = fe->ops.set_property(fe, tvp);
-
-        if (r < 0)
-                return r;
+                if (r < 0)
+                        return r;
+        }
 
         switch(tvp->cmd) {
         case DTV_CLEAR:
@@ -1362,126 +1372,129 @@ static int dtv_property_process_set(struct dvb_frontend *fe,
                  * tunerequest so we can pass validation in the FE_SET_FRONTEND
                  * ioctl.
                  */
-                fe->dtv_property_cache.state = tvp->cmd;
+                c->state = tvp->cmd;
                 dprintk("%s() Finalised property cache\n", __func__);
                 dtv_property_cache_submit(fe);
 
-                r |= dvb_frontend_ioctl_legacy(file, FE_SET_FRONTEND,
-                        &fepriv->parameters);
+                r = dvb_frontend_ioctl_legacy(file, FE_SET_FRONTEND,
+                        &fepriv->parameters_in);
                 break;
         case DTV_FREQUENCY:
-                fe->dtv_property_cache.frequency = tvp->u.data;
+                c->frequency = tvp->u.data;
                 break;
         case DTV_MODULATION:
-                fe->dtv_property_cache.modulation = tvp->u.data;
+                c->modulation = tvp->u.data;
                 break;
         case DTV_BANDWIDTH_HZ:
-                fe->dtv_property_cache.bandwidth_hz = tvp->u.data;
+                c->bandwidth_hz = tvp->u.data;
                 break;
         case DTV_INVERSION:
-                fe->dtv_property_cache.inversion = tvp->u.data;
+                c->inversion = tvp->u.data;
                 break;
         case DTV_SYMBOL_RATE:
-                fe->dtv_property_cache.symbol_rate = tvp->u.data;
+                c->symbol_rate = tvp->u.data;
                 break;
         case DTV_INNER_FEC:
-                fe->dtv_property_cache.fec_inner = tvp->u.data;
+                c->fec_inner = tvp->u.data;
                 break;
         case DTV_PILOT:
-                fe->dtv_property_cache.pilot = tvp->u.data;
+                c->pilot = tvp->u.data;
                 break;
         case DTV_ROLLOFF:
-                fe->dtv_property_cache.rolloff = tvp->u.data;
+                c->rolloff = tvp->u.data;
                 break;
         case DTV_DELIVERY_SYSTEM:
-                fe->dtv_property_cache.delivery_system = tvp->u.data;
+                c->delivery_system = tvp->u.data;
                 break;
         case DTV_VOLTAGE:
-                fe->dtv_property_cache.voltage = tvp->u.data;
+                c->voltage = tvp->u.data;
                 r = dvb_frontend_ioctl_legacy(file, FE_SET_VOLTAGE,
-                        (void *)fe->dtv_property_cache.voltage);
+                        (void *)c->voltage);
                 break;
         case DTV_TONE:
-                fe->dtv_property_cache.sectone = tvp->u.data;
+                c->sectone = tvp->u.data;
                 r = dvb_frontend_ioctl_legacy(file, FE_SET_TONE,
-                        (void *)fe->dtv_property_cache.sectone);
+                        (void *)c->sectone);
                 break;
         case DTV_CODE_RATE_HP:
-                fe->dtv_property_cache.code_rate_HP = tvp->u.data;
+                c->code_rate_HP = tvp->u.data;
                 break;
         case DTV_CODE_RATE_LP:
-                fe->dtv_property_cache.code_rate_LP = tvp->u.data;
+                c->code_rate_LP = tvp->u.data;
                 break;
         case DTV_GUARD_INTERVAL:
-                fe->dtv_property_cache.guard_interval = tvp->u.data;
+                c->guard_interval = tvp->u.data;
                 break;
         case DTV_TRANSMISSION_MODE:
-                fe->dtv_property_cache.transmission_mode = tvp->u.data;
+                c->transmission_mode = tvp->u.data;
                 break;
         case DTV_HIERARCHY:
-                fe->dtv_property_cache.hierarchy = tvp->u.data;
+                c->hierarchy = tvp->u.data;
                 break;
 
         /* ISDB-T Support here */
         case DTV_ISDBT_PARTIAL_RECEPTION:
-                fe->dtv_property_cache.isdbt_partial_reception = tvp->u.data;
+                c->isdbt_partial_reception = tvp->u.data;
                 break;
         case DTV_ISDBT_SOUND_BROADCASTING:
-                fe->dtv_property_cache.isdbt_sb_mode = tvp->u.data;
+                c->isdbt_sb_mode = tvp->u.data;
                 break;
         case DTV_ISDBT_SB_SUBCHANNEL_ID:
-                fe->dtv_property_cache.isdbt_sb_subchannel = tvp->u.data;
+                c->isdbt_sb_subchannel = tvp->u.data;
                 break;
         case DTV_ISDBT_SB_SEGMENT_IDX:
-                fe->dtv_property_cache.isdbt_sb_segment_idx = tvp->u.data;
+                c->isdbt_sb_segment_idx = tvp->u.data;
                 break;
         case DTV_ISDBT_SB_SEGMENT_COUNT:
-                fe->dtv_property_cache.isdbt_sb_segment_count = tvp->u.data;
+                c->isdbt_sb_segment_count = tvp->u.data;
                 break;
         case DTV_ISDBT_LAYER_ENABLED:
-                fe->dtv_property_cache.isdbt_layer_enabled = tvp->u.data;
+                c->isdbt_layer_enabled = tvp->u.data;
                 break;
         case DTV_ISDBT_LAYERA_FEC:
-                fe->dtv_property_cache.layer[0].fec = tvp->u.data;
+                c->layer[0].fec = tvp->u.data;
                 break;
         case DTV_ISDBT_LAYERA_MODULATION:
-                fe->dtv_property_cache.layer[0].modulation = tvp->u.data;
+                c->layer[0].modulation = tvp->u.data;
                 break;
         case DTV_ISDBT_LAYERA_SEGMENT_COUNT:
-                fe->dtv_property_cache.layer[0].segment_count = tvp->u.data;
+                c->layer[0].segment_count = tvp->u.data;
                 break;
         case DTV_ISDBT_LAYERA_TIME_INTERLEAVING:
-                fe->dtv_property_cache.layer[0].interleaving = tvp->u.data;
+                c->layer[0].interleaving = tvp->u.data;
                 break;
         case DTV_ISDBT_LAYERB_FEC:
-                fe->dtv_property_cache.layer[1].fec = tvp->u.data;
+                c->layer[1].fec = tvp->u.data;
                 break;
         case DTV_ISDBT_LAYERB_MODULATION:
-                fe->dtv_property_cache.layer[1].modulation = tvp->u.data;
+                c->layer[1].modulation = tvp->u.data;
                 break;
         case DTV_ISDBT_LAYERB_SEGMENT_COUNT:
-                fe->dtv_property_cache.layer[1].segment_count = tvp->u.data;
+                c->layer[1].segment_count = tvp->u.data;
                 break;
         case DTV_ISDBT_LAYERB_TIME_INTERLEAVING:
-                fe->dtv_property_cache.layer[1].interleaving = tvp->u.data;
+                c->layer[1].interleaving = tvp->u.data;
                 break;
         case DTV_ISDBT_LAYERC_FEC:
-                fe->dtv_property_cache.layer[2].fec = tvp->u.data;
+                c->layer[2].fec = tvp->u.data;
                 break;
         case DTV_ISDBT_LAYERC_MODULATION:
-                fe->dtv_property_cache.layer[2].modulation = tvp->u.data;
+                c->layer[2].modulation = tvp->u.data;
                 break;
         case DTV_ISDBT_LAYERC_SEGMENT_COUNT:
-                fe->dtv_property_cache.layer[2].segment_count = tvp->u.data;
+                c->layer[2].segment_count = tvp->u.data;
                 break;
         case DTV_ISDBT_LAYERC_TIME_INTERLEAVING:
-                fe->dtv_property_cache.layer[2].interleaving = tvp->u.data;
+                c->layer[2].interleaving = tvp->u.data;
                 break;
         case DTV_ISDBS_TS_ID:
-                fe->dtv_property_cache.isdbs_ts_id = tvp->u.data;
+                c->isdbs_ts_id = tvp->u.data;
+                break;
+        case DTV_DVBT2_PLP_ID:
+                c->dvbt2_plp_id = tvp->u.data;
                 break;
         default:
-                r = -1;
+                return -EINVAL;
         }
 
         return r;
@@ -1492,6 +1505,7 @@ static int dvb_frontend_ioctl(struct file *file,
 {
         struct dvb_device *dvbdev = file->private_data;
         struct dvb_frontend *fe = dvbdev->priv;
+        struct dtv_frontend_properties *c = &fe->dtv_property_cache;
         struct dvb_frontend_private *fepriv = fe->frontend_priv;
         int err = -EOPNOTSUPP;
 
@@ -1511,7 +1525,7 @@ static int dvb_frontend_ioctl(struct file *file,
         if ((cmd == FE_SET_PROPERTY) || (cmd == FE_GET_PROPERTY))
                 err = dvb_frontend_ioctl_properties(file, cmd, parg);
         else {
-                fe->dtv_property_cache.state = DTV_UNDEFINED;
+                c->state = DTV_UNDEFINED;
                 err = dvb_frontend_ioctl_legacy(file, cmd, parg);
         }
 
@@ -1524,6 +1538,7 @@ static int dvb_frontend_ioctl_properties(struct file *file,
 {
         struct dvb_device *dvbdev = file->private_data;
         struct dvb_frontend *fe = dvbdev->priv;
+        struct dtv_frontend_properties *c = &fe->dtv_property_cache;
         int err = 0;
 
         struct dtv_properties *tvps = NULL;
@@ -1555,11 +1570,13 @@ static int dvb_frontend_ioctl_properties(struct file *file,
                 }
 
                 for (i = 0; i < tvps->num; i++) {
-                        (tvp + i)->result = dtv_property_process_set(fe, tvp + i, file);
-                        err |= (tvp + i)->result;
+                        err = dtv_property_process_set(fe, tvp + i, file);
+                        if (err < 0)
+                                goto out;
+                        (tvp + i)->result = err;
                 }
 
-                if(fe->dtv_property_cache.state == DTV_TUNE)
+                if (c->state == DTV_TUNE)
                         dprintk("%s() Property cache is full, tuning\n", __func__);
 
         } else
@@ -1587,8 +1604,10 @@ static int dvb_frontend_ioctl_properties(struct file *file,
                 }
 
                 for (i = 0; i < tvps->num; i++) {
-                        (tvp + i)->result = dtv_property_process_get(fe, tvp + i, file);
-                        err |= (tvp + i)->result;
+                        err = dtv_property_process_get(fe, tvp + i, file);
+                        if (err < 0)
+                                goto out;
+                        (tvp + i)->result = err;
                 }
 
                 if (copy_to_user(tvps->props, tvp, tvps->num * sizeof(struct dtv_property))) {
@@ -1639,7 +1658,7 @@ static int dvb_frontend_ioctl_legacy(struct file *file,
         case FE_READ_STATUS: {
                 fe_status_t* status = parg;
 
-                /* if retune was requested but hasn't occured yet, prevent
+                /* if retune was requested but hasn't occurred yet, prevent
                  * that user get signal state from previous tuning */
                 if (fepriv->state == FESTATE_RETUNE ||
                     fepriv->state == FESTATE_ERROR) {
@@ -1730,7 +1749,7 @@ static int dvb_frontend_ioctl_legacy(struct file *file,
                          * Dish network legacy switches (as used by Dish500)
                          * are controlled by sending 9-bit command words
                          * spaced 8msec apart.
-                         * the actual command word is switch/port dependant
+                         * the actual command word is switch/port dependent
                          * so it is up to the userspace application to send
                          * the right command.
                          * The command must always start with a '0' after
@@ -1788,10 +1807,11 @@ static int dvb_frontend_ioctl_legacy(struct file *file,
                 break;
 
         case FE_SET_FRONTEND: {
+                struct dtv_frontend_properties *c = &fe->dtv_property_cache;
                 struct dvb_frontend_tune_settings fetunesettings;
 
-                if(fe->dtv_property_cache.state == DTV_TUNE) {
-                        if (dvb_frontend_check_parameters(fe, &fepriv->parameters) < 0) {
+                if (c->state == DTV_TUNE) {
+                        if (dvb_frontend_check_parameters(fe, &fepriv->parameters_in) < 0) {
                                 err = -EINVAL;
                                 break;
                         }
@@ -1801,9 +1821,9 @@ static int dvb_frontend_ioctl_legacy(struct file *file,
                                 break;
                         }
 
-                        memcpy (&fepriv->parameters, parg,
+                        memcpy (&fepriv->parameters_in, parg,
                                 sizeof (struct dvb_frontend_parameters));
-                        dtv_property_cache_sync(fe, &fepriv->parameters);
+                        dtv_property_cache_sync(fe, c, &fepriv->parameters_in);
                 }
 
                 memset(&fetunesettings, 0, sizeof(struct dvb_frontend_tune_settings));
@@ -1812,15 +1832,15 @@ static int dvb_frontend_ioctl_legacy(struct file *file,
 
                 /* force auto frequency inversion if requested */
                 if (dvb_force_auto_inversion) {
-                        fepriv->parameters.inversion = INVERSION_AUTO;
+                        fepriv->parameters_in.inversion = INVERSION_AUTO;
                         fetunesettings.parameters.inversion = INVERSION_AUTO;
                 }
                 if (fe->ops.info.type == FE_OFDM) {
                         /* without hierarchical coding code_rate_LP is irrelevant,
                          * so we tolerate the otherwise invalid FEC_NONE setting */
-                        if (fepriv->parameters.u.ofdm.hierarchy_information == HIERARCHY_NONE &&
-                            fepriv->parameters.u.ofdm.code_rate_LP == FEC_NONE)
-                                fepriv->parameters.u.ofdm.code_rate_LP = FEC_AUTO;
+                        if (fepriv->parameters_in.u.ofdm.hierarchy_information == HIERARCHY_NONE &&
+                            fepriv->parameters_in.u.ofdm.code_rate_LP == FEC_NONE)
+                                fepriv->parameters_in.u.ofdm.code_rate_LP = FEC_AUTO;
                 }
 
                 /* get frontend-specific tuning settings */
@@ -1833,8 +1853,8 @@ static int dvb_frontend_ioctl_legacy(struct file *file,
                         switch(fe->ops.info.type) {
                         case FE_QPSK:
                                 fepriv->min_delay = HZ/20;
-                                fepriv->step_size = fepriv->parameters.u.qpsk.symbol_rate / 16000;
-                                fepriv->max_drift = fepriv->parameters.u.qpsk.symbol_rate / 2000;
+                                fepriv->step_size = fepriv->parameters_in.u.qpsk.symbol_rate / 16000;
+                                fepriv->max_drift = fepriv->parameters_in.u.qpsk.symbol_rate / 2000;
                                 break;
 
                         case FE_QAM:
@@ -1876,8 +1896,8 @@ static int dvb_frontend_ioctl_legacy(struct file *file,
 
         case FE_GET_FRONTEND:
                 if (fe->ops.get_frontend) {
-                        memcpy (parg, &fepriv->parameters, sizeof (struct dvb_frontend_parameters));
-                        err = fe->ops.get_frontend(fe, (struct dvb_frontend_parameters*) parg);
+                        err = fe->ops.get_frontend(fe, &fepriv->parameters_out);
+                        memcpy(parg, &fepriv->parameters_out, sizeof(struct dvb_frontend_parameters));
                 }
                 break;
 
@@ -1968,6 +1988,14 @@ static int dvb_frontend_open(struct inode *inode, struct file *file)
         if (dvbdev->users == -1 && fe->ops.ts_bus_ctrl) {
                 if ((ret = fe->ops.ts_bus_ctrl(fe, 1)) < 0)
                         goto err0;
+
+                /* If we took control of the bus, we need to force
+                   reinitialization.  This is because many ts_bus_ctrl()
+                   functions strobe the RESET pin on the demod, and if the
+                   frontend thread already exists then the dvb_init() routine
+                   won't get called (which is what usually does initial
+                   register configuration). */
+                fepriv->reinitialise = 1;
         }
 
         if ((ret = dvb_generic_open (inode, file)) < 0)
@@ -2034,7 +2062,8 @@ static const struct file_operations dvb_frontend_fops = {
         .unlocked_ioctl = dvb_generic_ioctl,
         .poll           = dvb_frontend_poll,
         .open           = dvb_frontend_open,
-        .release        = dvb_frontend_release
+        .release        = dvb_frontend_release,
+        .llseek         = noop_llseek,
 };
 
 int dvb_register_frontend(struct dvb_adapter* dvb,
@@ -2061,7 +2090,7 @@ int dvb_register_frontend(struct dvb_adapter* dvb,
         }
         fepriv = fe->frontend_priv;
 
-        init_MUTEX (&fepriv->sem);
+        sema_init(&fepriv->sem, 1);
         init_waitqueue_head (&fepriv->wait_queue);
         init_waitqueue_head (&fepriv->events.wait_queue);
         mutex_init(&fepriv->events.mtx);
diff --git a/drivers/media/dvb/dvb-core/dvb_frontend.h b/drivers/media/dvb/dvb-core/dvb_frontend.h
index bf0e6bed28dd..5590eb6eb408 100644
--- a/drivers/media/dvb/dvb-core/dvb_frontend.h
+++ b/drivers/media/dvb/dvb-core/dvb_frontend.h
@@ -239,7 +239,6 @@ struct analog_demod_ops {
         void (*set_params)(struct dvb_frontend *fe,
                            struct analog_parameters *params);
         int  (*has_signal)(struct dvb_frontend *fe);
-        int  (*is_stereo)(struct dvb_frontend *fe);
         int  (*get_afc)(struct dvb_frontend *fe);
         void (*tuner_status)(struct dvb_frontend *fe);
         void (*standby)(struct dvb_frontend *fe);
@@ -260,7 +259,7 @@ struct dvb_frontend_ops {
         int (*init)(struct dvb_frontend* fe);
         int (*sleep)(struct dvb_frontend* fe);
 
-        int (*write)(struct dvb_frontend* fe, u8* buf, int len);
+        int (*write)(struct dvb_frontend* fe, const u8 buf[], int len);
 
         /* if this is set, it overrides the default swzigzag */
         int (*tune)(struct dvb_frontend* fe,
@@ -359,6 +358,9 @@ struct dtv_frontend_properties {
 
         /* ISDB-T specifics */
         u32                     isdbs_ts_id;
+
+        /* DVB-T2 specifics */
+        u32                     dvbt2_plp_id;
 };
 
 struct dvb_frontend {
diff --git a/drivers/media/dvb/dvb-core/dvb_net.c b/drivers/media/dvb/dvb-core/dvb_net.c
index 6c3a8a06ccab..51752a9ef7a4 100644
--- a/drivers/media/dvb/dvb-core/dvb_net.c
+++ b/drivers/media/dvb/dvb-core/dvb_net.c
@@ -59,7 +59,6 @@
 #include <linux/netdevice.h>
 #include <linux/etherdevice.h>
 #include <linux/dvb/net.h>
-#include <linux/smp_lock.h>
 #include <linux/uio.h>
 #include <asm/uaccess.h>
 #include <linux/crc32.h>
@@ -1330,7 +1329,8 @@ static int dvb_net_remove_if(struct dvb_net *dvbnet, unsigned long num)
                 return -EBUSY;
 
         dvb_net_stop(net);
-        flush_scheduled_work();
+        flush_work_sync(&priv->set_multicast_list_wq);
+        flush_work_sync(&priv->restart_net_feed_wq);
         printk("dvb_net: removed network interface %s\n", net->name);
         unregister_netdev(net);
         dvbnet->state[num]=0;
@@ -1445,13 +1445,7 @@ static int dvb_net_do_ioctl(struct file *file,
 static long dvb_net_ioctl(struct file *file,
               unsigned int cmd, unsigned long arg)
 {
-        int ret;
-
-        lock_kernel();
-        ret = dvb_usercopy(file, cmd, arg, dvb_net_do_ioctl);
-        unlock_kernel();
-
-        return ret;
+        return dvb_usercopy(file, cmd, arg, dvb_net_do_ioctl);
 }
 
 static int dvb_net_close(struct inode *inode, struct file *file)
@@ -1475,6 +1469,7 @@ static const struct file_operations dvb_net_fops = {
         .unlocked_ioctl = dvb_net_ioctl,
         .open = dvb_generic_open,
         .release = dvb_net_close,
+        .llseek = noop_llseek,
 };
 
 static struct dvb_device dvbdev_net = {
diff --git a/drivers/media/dvb/dvb-core/dvbdev.c b/drivers/media/dvb/dvb-core/dvbdev.c
index b915c39d782f..f73287775953 100644
--- a/drivers/media/dvb/dvb-core/dvbdev.c
+++ b/drivers/media/dvb/dvb-core/dvbdev.c
@@ -32,9 +32,9 @@
 #include <linux/fs.h>
 #include <linux/cdev.h>
 #include <linux/mutex.h>
-#include <linux/smp_lock.h>
 #include "dvbdev.h"
 
+static DEFINE_MUTEX(dvbdev_mutex);
 static int dvbdev_debug;
 
 module_param(dvbdev_debug, int, 0644);
@@ -68,7 +68,7 @@ static int dvb_device_open(struct inode *inode, struct file *file)
 {
         struct dvb_device *dvbdev;
 
-        lock_kernel();
+        mutex_lock(&dvbdev_mutex);
         down_read(&minor_rwsem);
         dvbdev = dvb_minors[iminor(inode)];
 
@@ -91,12 +91,12 @@ static int dvb_device_open(struct inode *inode, struct file *file)
                 }
                 fops_put(old_fops);
                 up_read(&minor_rwsem);
-                unlock_kernel();
+                mutex_unlock(&dvbdev_mutex);
                 return err;
         }
 fail:
         up_read(&minor_rwsem);
-        unlock_kernel();
+        mutex_unlock(&dvbdev_mutex);
         return -ENODEV;
 }
 
@@ -105,6 +105,7 @@ static const struct file_operations dvb_device_fops =
 {
         .owner =        THIS_MODULE,
         .open =         dvb_device_open,
+        .llseek =       noop_llseek,
 };
 
 static struct cdev dvb_device_cdev;
@@ -158,7 +159,6 @@ long dvb_generic_ioctl(struct file *file,
                        unsigned int cmd, unsigned long arg)
 {
         struct dvb_device *dvbdev = file->private_data;
-        int ret;
 
         if (!dvbdev)
                 return -ENODEV;
@@ -166,11 +166,7 @@ long dvb_generic_ioctl(struct file *file,
         if (!dvbdev->kernel_ioctl)
                 return -EINVAL;
 
-        lock_kernel();
-        ret = dvb_usercopy(file, cmd, arg, dvbdev->kernel_ioctl);
-        unlock_kernel();
-
-        return ret;
+        return dvb_usercopy(file, cmd, arg, dvbdev->kernel_ioctl);
 }
 EXPORT_SYMBOL(dvb_generic_ioctl);
 
@@ -421,8 +417,10 @@ int dvb_usercopy(struct file *file,
         }
 
         /* call driver */
+        mutex_lock(&dvbdev_mutex);
         if ((err = func(file, cmd, parg)) == -ENOIOCTLCMD)
                 err = -EINVAL;
+        mutex_unlock(&dvbdev_mutex);
 
         if (err < 0)
                 goto out;
diff --git a/drivers/media/dvb/dvb-usb/Kconfig b/drivers/media/dvb/dvb-usb/Kconfig
index fdc19bba2128..e85304c59a2b 100644
--- a/drivers/media/dvb/dvb-usb/Kconfig
+++ b/drivers/media/dvb/dvb-usb/Kconfig
@@ -1,6 +1,6 @@
 config DVB_USB
         tristate "Support for various USB DVB devices"
-        depends on DVB_CORE && USB && I2C && IR_CORE
+        depends on DVB_CORE && USB && I2C && RC_CORE
         help
           By enabling this you will be able to choose the various supported
           USB1.1 and USB2.0 DVB devices.
@@ -292,6 +292,11 @@ config DVB_USB_ANYSEE
         select DVB_MT352 if !DVB_FE_CUSTOMISE
         select DVB_ZL10353 if !DVB_FE_CUSTOMISE
         select DVB_TDA10023 if !DVB_FE_CUSTOMISE
+        select MEDIA_TUNER_TDA18212 if !MEDIA_TUNER_CUSTOMISE
+        select DVB_CX24116 if !DVB_FE_CUSTOMISE
+        select DVB_STV0900 if !DVB_FE_CUSTOMISE
+        select DVB_STV6110 if !DVB_FE_CUSTOMISE
+        select DVB_ISL6423 if !DVB_FE_CUSTOMISE
         help
           Say Y here to support the Anysee E30, Anysee E30 Plus or
           Anysee E30 C Plus DVB USB2.0 receiver.
@@ -314,6 +319,8 @@ config DVB_USB_AF9015
         select MEDIA_TUNER_TDA18271 if !MEDIA_TUNER_CUSTOMISE
         select MEDIA_TUNER_MXL5005S if !MEDIA_TUNER_CUSTOMISE
         select MEDIA_TUNER_MC44S803 if !MEDIA_TUNER_CUSTOMISE
+        select MEDIA_TUNER_TDA18218 if !MEDIA_TUNER_CUSTOMISE
+        select MEDIA_TUNER_MXL5007T if !MEDIA_TUNER_CUSTOMISE
         help
           Say Y here to support the Afatech AF9015 based DVB-T USB2.0 receiver
 
@@ -346,3 +353,23 @@ config DVB_USB_AZ6027
         select DVB_STB6100 if !DVB_FE_CUSTOMISE
         help
           Say Y here to support the AZ6027 device
+
+config DVB_USB_LME2510
+        tristate "LME DM04/QQBOX DVB-S USB2.0 support"
+        depends on DVB_USB
+        select DVB_TDA10086 if !DVB_FE_CUSTOMISE
+        select DVB_TDA826X if !DVB_FE_CUSTOMISE
+        select DVB_STV0288 if !DVB_FE_CUSTOMISE
+        select DVB_IX2505V if !DVB_FE_CUSTOMISE
+        select DVB_STV0299 if !DVB_FE_CUSTOMISE
+        select DVB_PLL if !DVB_FE_CUSTOMISE
+        help
+          Say Y here to support the LME DM04/QQBOX DVB-S USB2.0 .
+
+config DVB_USB_TECHNISAT_USB2
+        tristate "Technisat DVB-S/S2 USB2.0 support"
+        depends on DVB_USB
+        select DVB_STV090x if !DVB_FE_CUSTOMISE
+        select DVB_STV6110x if !DVB_FE_CUSTOMISE
+        help
+          Say Y here to support the Technisat USB2 DVB-S/S2 device
diff --git a/drivers/media/dvb/dvb-usb/Makefile b/drivers/media/dvb/dvb-usb/Makefile
index 1a192453b0e7..4bac13da0c39 100644
--- a/drivers/media/dvb/dvb-usb/Makefile
+++ b/drivers/media/dvb/dvb-usb/Makefile
@@ -88,6 +88,12 @@ obj-$(CONFIG_DVB_USB_EC168) += dvb-usb-ec168.o
 dvb-usb-az6027-objs = az6027.o
 obj-$(CONFIG_DVB_USB_AZ6027) += dvb-usb-az6027.o
 
+dvb-usb-lmedm04-objs = lmedm04.o
+obj-$(CONFIG_DVB_USB_LME2510) += dvb-usb-lmedm04.o
+
+dvb-usb-technisat-usb2-objs = technisat-usb2.o
+obj-$(CONFIG_DVB_USB_TECHNISAT_USB2) += dvb-usb-technisat-usb2.o
+
 EXTRA_CFLAGS += -Idrivers/media/dvb/dvb-core/ -Idrivers/media/dvb/frontends/
 # due to tuner-xc3028
 EXTRA_CFLAGS += -Idrivers/media/common/tuners
diff --git a/drivers/media/dvb/dvb-usb/a800.c b/drivers/media/dvb/dvb-usb/a800.c
index a5c363727133..b95a95e17840 100644
--- a/drivers/media/dvb/dvb-usb/a800.c
+++ b/drivers/media/dvb/dvb-usb/a800.c
@@ -37,9 +37,9 @@ static int a800_identify_state(struct usb_device *udev, struct dvb_usb_device_pr
         return 0;
 }
 
-static struct ir_scancode ir_codes_a800_table[] = {
-        { 0x0201, KEY_PROG1 },       /* SOURCE */
-        { 0x0200, KEY_POWER },       /* POWER */
+static struct rc_map_table rc_map_a800_table[] = {
+        { 0x0201, KEY_MODE },      /* SOURCE */
+        { 0x0200, KEY_POWER2 },      /* POWER */
         { 0x0205, KEY_1 },           /* 1 */
         { 0x0206, KEY_2 },           /* 2 */
         { 0x0207, KEY_3 },           /* 3 */
@@ -52,8 +52,8 @@ static struct ir_scancode ir_codes_a800_table[] = {
         { 0x0212, KEY_LEFT },        /* L / DISPLAY */
         { 0x0211, KEY_0 },           /* 0 */
         { 0x0213, KEY_RIGHT },       /* R / CH RTN */
-        { 0x0217, KEY_PROG2 },       /* SNAP SHOT */
-        { 0x0210, KEY_PROG3 },       /* 16-CH PREV */
+        { 0x0217, KEY_CAMERA },      /* SNAP SHOT */
+        { 0x0210, KEY_LAST },        /* 16-CH PREV */
         { 0x021e, KEY_VOLUMEDOWN },  /* VOL DOWN */
         { 0x020c, KEY_ZOOM },        /* FULL SCREEN */
         { 0x021f, KEY_VOLUMEUP },    /* VOL UP */
@@ -78,17 +78,26 @@ static struct ir_scancode ir_codes_a800_table[] = {
 
 static int a800_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
 {
-        u8 key[5];
+        int ret;
+        u8 *key = kmalloc(5, GFP_KERNEL);
+        if (!key)
+                return -ENOMEM;
+
         if (usb_control_msg(d->udev,usb_rcvctrlpipe(d->udev,0),
                                 0x04, USB_TYPE_VENDOR | USB_DIR_IN, 0, 0, key, 5,
-                                2000) != 5)
-                return -ENODEV;
+                                2000) != 5) {
+                ret = -ENODEV;
+                goto out;
+        }
 
         /* call the universal NEC remote processor, to find out the key's state and event */
         dvb_usb_nec_rc_key_to_event(d,key,event,state);
         if (key[0] != 0)
                 deb_rc("key: %x %x %x %x %x\n",key[0],key[1],key[2],key[3],key[4]);
-        return 0;
+        ret = 0;
+out:
+        kfree(key);
+        return ret;
 }
 
 /* USB Driver stuff */
@@ -148,8 +157,8 @@ static struct dvb_usb_device_properties a800_properties = {
 
         .rc.legacy = {
                 .rc_interval      = DEFAULT_RC_INTERVAL,
-                .rc_key_map       = ir_codes_a800_table,
-                .rc_key_map_size  = ARRAY_SIZE(ir_codes_a800_table),
+                .rc_map_table     = rc_map_a800_table,
+                .rc_map_size      = ARRAY_SIZE(rc_map_a800_table),
                 .rc_query         = a800_rc_query,
         },
 
diff --git a/drivers/media/dvb/dvb-usb/af9005-fe.c b/drivers/media/dvb/dvb-usb/af9005-fe.c
index 199ece0d4883..6ad94745bbdd 100644
--- a/drivers/media/dvb/dvb-usb/af9005-fe.c
+++ b/drivers/media/dvb/dvb-usb/af9005-fe.c
@@ -580,7 +580,7 @@ static int af9005_fe_program_cfoe(struct dvb_usb_device *d, fe_bandwidth_t bw)
                 NS_coeff2_8k = 0x724925;
                 break;
         default:
-                err("Invalid bandwith %d.", bw);
+                err("Invalid bandwidth %d.", bw);
                 return -EINVAL;
         }
 
@@ -789,7 +789,7 @@ static int af9005_fe_select_bw(struct dvb_usb_device *d, fe_bandwidth_t bw)
                 temp = 2;
                 break;
         default:
-                err("Invalid bandwith %d.", bw);
+                err("Invalid bandwidth %d.", bw);
                 return -EINVAL;
         }
         return af9005_write_register_bits(d, xd_g_reg_bw, reg_bw_pos,
@@ -930,7 +930,7 @@ static int af9005_fe_init(struct dvb_frontend *fe)
         if (ret)
                 return ret;
 
-        /* init other parameters: program cfoe and select bandwith */
+        /* init other parameters: program cfoe and select bandwidth */
         deb_info("program cfoe\n");
         if ((ret = af9005_fe_program_cfoe(state->d, BANDWIDTH_6_MHZ)))
                 return ret;
@@ -1167,7 +1167,7 @@ static int af9005_fe_set_frontend(struct dvb_frontend *fe,
         if (ret)
                 return ret;
 
-        /* select bandwith */
+        /* select bandwidth */
         deb_info("select bandwidth");
         ret = af9005_fe_select_bw(state->d, fep->u.ofdm.bandwidth);
         if (ret)
diff --git a/drivers/media/dvb/dvb-usb/af9005-remote.c b/drivers/media/dvb/dvb-usb/af9005-remote.c
index 696207fe37ec..c3bc64ed405c 100644
--- a/drivers/media/dvb/dvb-usb/af9005-remote.c
+++ b/drivers/media/dvb/dvb-usb/af9005-remote.c
@@ -33,7 +33,7 @@ MODULE_PARM_DESC(debug,
 
 #define deb_decode(args...)   dprintk(dvb_usb_af9005_remote_debug,0x01,args)
 
-struct ir_scancode ir_codes_af9005_table[] = {
+struct rc_map_table rc_map_af9005_table[] = {
 
         {0x01b7, KEY_POWER},
         {0x01a7, KEY_VOLUMEUP},
@@ -74,7 +74,7 @@ struct ir_scancode ir_codes_af9005_table[] = {
         {0x00d5, KEY_GOTO},     /* marked jump on the remote */
 };
 
-int ir_codes_af9005_table_size = ARRAY_SIZE(ir_codes_af9005_table);
+int rc_map_af9005_table_size = ARRAY_SIZE(rc_map_af9005_table);
 
 static int repeatable_keys[] = {
         KEY_VOLUMEUP,
@@ -130,10 +130,10 @@ int af9005_rc_decode(struct dvb_usb_device *d, u8 * data, int len, u32 * event,
                                 deb_decode("code != inverted code\n");
                                 return 0;
                         }
-                        for (i = 0; i < ir_codes_af9005_table_size; i++) {
-                                if (rc5_custom(&ir_codes_af9005_table[i]) == cust
-                                    && rc5_data(&ir_codes_af9005_table[i]) == dat) {
-                                        *event = ir_codes_af9005_table[i].keycode;
+                        for (i = 0; i < rc_map_af9005_table_size; i++) {
+                                if (rc5_custom(&rc_map_af9005_table[i]) == cust
+                                    && rc5_data(&rc_map_af9005_table[i]) == dat) {
+                                        *event = rc_map_af9005_table[i].keycode;
                                         *state = REMOTE_KEY_PRESSED;
                                         deb_decode
                                             ("key pressed, event %x\n", *event);
@@ -146,8 +146,8 @@ int af9005_rc_decode(struct dvb_usb_device *d, u8 * data, int len, u32 * event,
         return 0;
 }
 
-EXPORT_SYMBOL(ir_codes_af9005_table);
-EXPORT_SYMBOL(ir_codes_af9005_table_size);
+EXPORT_SYMBOL(rc_map_af9005_table);
+EXPORT_SYMBOL(rc_map_af9005_table_size);
 EXPORT_SYMBOL(af9005_rc_decode);
 
 MODULE_AUTHOR("Luca Olivetti <luca@ventoso.org>");
diff --git a/drivers/media/dvb/dvb-usb/af9005.c b/drivers/media/dvb/dvb-usb/af9005.c
index 8ecba8848bcf..51f6439dcfd5 100644
--- a/drivers/media/dvb/dvb-usb/af9005.c
+++ b/drivers/media/dvb/dvb-usb/af9005.c
@@ -1027,8 +1027,8 @@ static struct dvb_usb_device_properties af9005_properties = {
 
         .rc.legacy = {
                 .rc_interval = 200,
-                .rc_key_map = NULL,
-                .rc_key_map_size = 0,
+                .rc_map_table = NULL,
+                .rc_map_size = 0,
                 .rc_query = af9005_rc_query,
         },
 
@@ -1070,14 +1070,14 @@ static int __init af9005_usb_module_init(void)
                 return result;
         }
         rc_decode = symbol_request(af9005_rc_decode);
-        rc_keys = symbol_request(ir_codes_af9005_table);
-        rc_keys_size = symbol_request(ir_codes_af9005_table_size);
+        rc_keys = symbol_request(rc_map_af9005_table);
+        rc_keys_size = symbol_request(rc_map_af9005_table_size);
         if (rc_decode == NULL || rc_keys == NULL || rc_keys_size == NULL) {
                 err("af9005_rc_decode function not found, disabling remote");
                 af9005_properties.rc.legacy.rc_query = NULL;
         } else {
-                af9005_properties.rc.legacy.rc_key_map = rc_keys;
-                af9005_properties.rc.legacy.rc_key_map_size = *rc_keys_size;
+                af9005_properties.rc.legacy.rc_map_table = rc_keys;
+                af9005_properties.rc.legacy.rc_map_size = *rc_keys_size;
         }
 
         return 0;
@@ -1089,9 +1089,9 @@ static void __exit af9005_usb_module_exit(void)
         if (rc_decode != NULL)
                 symbol_put(af9005_rc_decode);
         if (rc_keys != NULL)
-                symbol_put(ir_codes_af9005_table);
+                symbol_put(rc_map_af9005_table);
         if (rc_keys_size != NULL)
-                symbol_put(ir_codes_af9005_table_size);
+                symbol_put(rc_map_af9005_table_size);
         /* deregister this driver from the USB subsystem */
         usb_deregister(&af9005_usb_driver);
 }
diff --git a/drivers/media/dvb/dvb-usb/af9005.h b/drivers/media/dvb/dvb-usb/af9005.h
index 3c1fbd1c5d60..c71c77bd7f4b 100644
--- a/drivers/media/dvb/dvb-usb/af9005.h
+++ b/drivers/media/dvb/dvb-usb/af9005.h
@@ -3490,7 +3490,7 @@ extern u8 regmask[8];
 /* remote control decoder */
 extern int af9005_rc_decode(struct dvb_usb_device *d, u8 * data, int len,
                             u32 * event, int *state);
-extern struct ir_scancode ir_codes_af9005_table[];
-extern int ir_codes_af9005_table_size;
+extern struct rc_map_table rc_map_af9005_table[];
+extern int rc_map_af9005_table_size;
 
 #endif
diff --git a/drivers/media/dvb/dvb-usb/af9015.c b/drivers/media/dvb/dvb-usb/af9015.c
index ea1ed3b4592a..100ebc37e99e 100644
--- a/drivers/media/dvb/dvb-usb/af9015.c
+++ b/drivers/media/dvb/dvb-usb/af9015.c
@@ -31,6 +31,8 @@
 #include "tda18271.h"
 #include "mxl5005s.h"
 #include "mc44s803.h"
+#include "tda18218.h"
+#include "mxl5007t.h"
 
 static int dvb_usb_af9015_debug;
 module_param_named(debug, dvb_usb_af9015_debug, int, 0644);
@@ -205,12 +207,18 @@ static int af9015_write_reg(struct dvb_usb_device *d, u16 addr, u8 val)
         return af9015_write_regs(d, addr, &val, 1);
 }
 
-static int af9015_read_reg(struct dvb_usb_device *d, u16 addr, u8 *val)
+static int af9015_read_regs(struct dvb_usb_device *d, u16 addr, u8 *val, u8 len)
 {
-        struct req_t req = {READ_MEMORY, AF9015_I2C_DEMOD, addr, 0, 0, 1, val};
+        struct req_t req = {READ_MEMORY, AF9015_I2C_DEMOD, addr, 0, 0, len,
+                val};
         return af9015_ctrl_msg(d, &req);
 }
 
+static int af9015_read_reg(struct dvb_usb_device *d, u16 addr, u8 *val)
+{
+        return af9015_read_regs(d, addr, val, 1);
+}
+
 static int af9015_write_reg_i2c(struct dvb_usb_device *d, u8 addr, u16 reg,
         u8 val)
 {
@@ -241,7 +249,7 @@ static int af9015_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msg[],
         struct dvb_usb_device *d = i2c_get_adapdata(adap);
         int ret = 0, i = 0;
         u16 addr;
-        u8 mbox, addr_len;
+        u8 uninitialized_var(mbox), addr_len;
         struct req_t req;
 
 /* TODO: implement bus lock
@@ -280,7 +288,7 @@ Due to that the only way to select correct tuner is use demodulator I2C-gate.
                 } else {
                         addr = msg[i].buf[0];
                         addr_len = 1;
-                        mbox = 0;
+                        /* mbox is don't care in that case */
                 }
 
                 if (num > i + 1 && (msg[i+1].flags & I2C_M_RD)) {
@@ -471,6 +479,7 @@ static int af9015_init_endpoint(struct dvb_usb_device *d)
                 ret = af9015_set_reg_bit(d, 0xd50b, 0);
         else
                 ret = af9015_clear_reg_bit(d, 0xd50b, 0);
+
 error:
         if (ret)
                 err("endpoint init failed:%d", ret);
@@ -494,7 +503,8 @@ static int af9015_copy_firmware(struct dvb_usb_device *d)
         /* wait 2nd demodulator ready */
         msleep(100);
 
-        ret = af9015_read_reg_i2c(d, 0x3a, 0x98be, &val);
+        ret = af9015_read_reg_i2c(d,
+                af9015_af9013_config[1].demod_address, 0x98be, &val);
         if (ret)
                 goto error;
         else
@@ -597,47 +607,17 @@ free:
         return ret;
 }
 
-static int af9015_download_ir_table(struct dvb_usb_device *d)
-{
-        int i, packets = 0, ret;
-        u16 addr = 0x9a56; /* ir-table start address */
-        struct req_t req = {WRITE_MEMORY, 0, 0, 0, 0, 1, NULL};
-        u8 *data = NULL;
-        deb_info("%s:\n", __func__);
-
-        data = af9015_config.ir_table;
-        packets = af9015_config.ir_table_size;
-
-        /* no remote */
-        if (!packets)
-                goto exit;
-
-        /* load remote ir-table */
-        for (i = 0; i < packets; i++) {
-                req.addr = addr + i;
-                req.data = &data[i];
-                ret = af9015_ctrl_msg(d, &req);
-                if (ret) {
-                        err("ir-table download failed at packet %d with " \
-                                "code %d", i, ret);
-                        return ret;
-                }
-        }
-
-exit:
-        return 0;
-}
-
 static int af9015_init(struct dvb_usb_device *d)
 {
         int ret;
         deb_info("%s:\n", __func__);
 
-        ret = af9015_init_endpoint(d);
+        /* init RC canary */
+        ret = af9015_write_reg(d, 0x98e9, 0xff);
         if (ret)
                 goto error;
 
-        ret = af9015_download_ir_table(d);
+        ret = af9015_init_endpoint(d);
         if (ret)
                 goto error;
 
@@ -685,9 +665,8 @@ error:
 static int af9015_download_firmware(struct usb_device *udev,
         const struct firmware *fw)
 {
-        int i, len, packets, remainder, ret;
+        int i, len, remaining, ret;
         struct req_t req = {DOWNLOAD_FIRMWARE, 0, 0, 0, 0, 0, NULL};
-        u16 addr = 0x5100; /* firmware start address */
         u16 checksum = 0;
 
         deb_info("%s:\n", __func__);
@@ -699,24 +678,20 @@ static int af9015_download_firmware(struct usb_device *udev,
         af9015_config.firmware_size = fw->size;
         af9015_config.firmware_checksum = checksum;
 
-        #define FW_PACKET_MAX_DATA  55
-
-        packets = fw->size / FW_PACKET_MAX_DATA;
-        remainder = fw->size % FW_PACKET_MAX_DATA;
-        len = FW_PACKET_MAX_DATA;
-        for (i = 0; i <= packets; i++) {
-                if (i == packets)  /* set size of the last packet */
-                        len = remainder;
+        #define FW_ADDR 0x5100 /* firmware start address */
+        #define LEN_MAX 55 /* max packet size */
+        for (remaining = fw->size; remaining > 0; remaining -= LEN_MAX) {
+                len = remaining;
+                if (len > LEN_MAX)
+                        len = LEN_MAX;
 
                 req.data_len = len;
-                req.data = (u8 *)(fw->data + i * FW_PACKET_MAX_DATA);
-                req.addr = addr;
-                addr += FW_PACKET_MAX_DATA;
+                req.data = (u8 *) &fw->data[fw->size - remaining];
+                req.addr = FW_ADDR + fw->size - remaining;
 
                 ret = af9015_rw_udev(udev, &req);
                 if (ret) {
-                        err("firmware download failed at packet %d with " \
-                                "code %d", i, ret);
+                        err("firmware download failed:%d", ret);
                         goto error;
                 }
         }
@@ -733,125 +708,104 @@ error:
         return ret;
 }
 
-struct af9015_setup {
+struct af9015_rc_setup {
         unsigned int id;
-        struct ir_scancode *rc_key_map;
-        unsigned int rc_key_map_size;
-        u8 *ir_table;
-        unsigned int ir_table_size;
+        char *rc_codes;
 };
 
-static const struct af9015_setup *af9015_setup_match(unsigned int id,
-                const struct af9015_setup *table)
+static char *af9015_rc_setup_match(unsigned int id,
+        const struct af9015_rc_setup *table)
 {
-        for (; table->rc_key_map; table++)
+        for (; table->rc_codes; table++)
                 if (table->id == id)
-                        return table;
+                        return table->rc_codes;
         return NULL;
 }
 
-static const struct af9015_setup af9015_setup_modparam[] = {
-        { AF9015_REMOTE_A_LINK_DTU_M,
-                ir_codes_af9015_table_a_link, ARRAY_SIZE(ir_codes_af9015_table_a_link),
-                af9015_ir_table_a_link, ARRAY_SIZE(af9015_ir_table_a_link) },
-        { AF9015_REMOTE_MSI_DIGIVOX_MINI_II_V3,
-                ir_codes_af9015_table_msi, ARRAY_SIZE(ir_codes_af9015_table_msi),
-                af9015_ir_table_msi, ARRAY_SIZE(af9015_ir_table_msi) },
-        { AF9015_REMOTE_MYGICTV_U718,
-                ir_codes_af9015_table_mygictv, ARRAY_SIZE(ir_codes_af9015_table_mygictv),
-                af9015_ir_table_mygictv, ARRAY_SIZE(af9015_ir_table_mygictv) },
-        { AF9015_REMOTE_DIGITTRADE_DVB_T,
-                ir_codes_af9015_table_digittrade, ARRAY_SIZE(ir_codes_af9015_table_digittrade),
-                af9015_ir_table_digittrade, ARRAY_SIZE(af9015_ir_table_digittrade) },
-        { AF9015_REMOTE_AVERMEDIA_KS,
-                ir_codes_af9015_table_avermedia, ARRAY_SIZE(ir_codes_af9015_table_avermedia),
-                af9015_ir_table_avermedia_ks, ARRAY_SIZE(af9015_ir_table_avermedia_ks) },
+static const struct af9015_rc_setup af9015_rc_setup_modparam[] = {
+        { AF9015_REMOTE_A_LINK_DTU_M, RC_MAP_ALINK_DTU_M },
+        { AF9015_REMOTE_MSI_DIGIVOX_MINI_II_V3, RC_MAP_MSI_DIGIVOX_II },
+        { AF9015_REMOTE_MYGICTV_U718, RC_MAP_TOTAL_MEDIA_IN_HAND },
+        { AF9015_REMOTE_DIGITTRADE_DVB_T, RC_MAP_DIGITTRADE },
+        { AF9015_REMOTE_AVERMEDIA_KS, RC_MAP_AVERMEDIA_RM_KS },
         { }
 };
 
-/* don't add new entries here anymore, use hashes instead */
-static const struct af9015_setup af9015_setup_usbids[] = {
-        { USB_VID_LEADTEK,
-                ir_codes_af9015_table_leadtek, ARRAY_SIZE(ir_codes_af9015_table_leadtek),
-                af9015_ir_table_leadtek, ARRAY_SIZE(af9015_ir_table_leadtek) },
-        { USB_VID_VISIONPLUS,
-                ir_codes_af9015_table_twinhan, ARRAY_SIZE(ir_codes_af9015_table_twinhan),
-                af9015_ir_table_twinhan, ARRAY_SIZE(af9015_ir_table_twinhan) },
-        { USB_VID_KWORLD_2, /* TODO: use correct rc keys */
-                ir_codes_af9015_table_twinhan, ARRAY_SIZE(ir_codes_af9015_table_twinhan),
-                af9015_ir_table_kworld, ARRAY_SIZE(af9015_ir_table_kworld) },
-        { USB_VID_AVERMEDIA,
-                ir_codes_af9015_table_avermedia, ARRAY_SIZE(ir_codes_af9015_table_avermedia),
-                af9015_ir_table_avermedia, ARRAY_SIZE(af9015_ir_table_avermedia) },
-        { USB_VID_MSI_2,
-                ir_codes_af9015_table_msi_digivox_iii, ARRAY_SIZE(ir_codes_af9015_table_msi_digivox_iii),
-                af9015_ir_table_msi_digivox_iii, ARRAY_SIZE(af9015_ir_table_msi_digivox_iii) },
+static const struct af9015_rc_setup af9015_rc_setup_hashes[] = {
+        { 0xb8feb708, RC_MAP_MSI_DIGIVOX_II },
+        { 0xa3703d00, RC_MAP_ALINK_DTU_M },
+        { 0x9b7dc64e, RC_MAP_TOTAL_MEDIA_IN_HAND }, /* MYGICTV U718 */
         { }
 };
 
-static const struct af9015_setup af9015_setup_hashes[] = {
-        { 0xb8feb708,
-                ir_codes_af9015_table_msi, ARRAY_SIZE(ir_codes_af9015_table_msi),
-                af9015_ir_table_msi, ARRAY_SIZE(af9015_ir_table_msi) },
-        { 0xa3703d00,
-                ir_codes_af9015_table_a_link, ARRAY_SIZE(ir_codes_af9015_table_a_link),
-                af9015_ir_table_a_link, ARRAY_SIZE(af9015_ir_table_a_link) },
-        { 0x9b7dc64e,
-                ir_codes_af9015_table_mygictv, ARRAY_SIZE(ir_codes_af9015_table_mygictv),
-                af9015_ir_table_mygictv, ARRAY_SIZE(af9015_ir_table_mygictv) },
+static const struct af9015_rc_setup af9015_rc_setup_usbids[] = {
+        { (USB_VID_TERRATEC << 16) + USB_PID_TERRATEC_CINERGY_T_STICK_RC,
+                RC_MAP_TERRATEC_SLIM_2 },
+        { (USB_VID_TERRATEC << 16) + USB_PID_TERRATEC_CINERGY_T_STICK_DUAL_RC,
+                RC_MAP_TERRATEC_SLIM },
+        { (USB_VID_VISIONPLUS << 16) + USB_PID_AZUREWAVE_AD_TU700,
+                RC_MAP_AZUREWAVE_AD_TU700 },
+        { (USB_VID_VISIONPLUS << 16) + USB_PID_TINYTWIN,
+                RC_MAP_AZUREWAVE_AD_TU700 },
+        { (USB_VID_MSI_2 << 16) + USB_PID_MSI_DIGI_VOX_MINI_III,
+                RC_MAP_MSI_DIGIVOX_III },
+        { (USB_VID_LEADTEK << 16) + USB_PID_WINFAST_DTV_DONGLE_GOLD,
+                RC_MAP_LEADTEK_Y04G0051 },
+        { (USB_VID_AVERMEDIA << 16) + USB_PID_AVERMEDIA_VOLAR_X,
+                RC_MAP_AVERMEDIA_M135A },
+        { (USB_VID_AFATECH << 16) + USB_PID_TREKSTOR_DVBT,
+                RC_MAP_TREKSTOR },
+        { (USB_VID_KWORLD_2 << 16) + USB_PID_TINYTWIN_2,
+                RC_MAP_DIGITALNOW_TINYTWIN },
+        { (USB_VID_GTEK << 16) + USB_PID_TINYTWIN_3,
+                RC_MAP_DIGITALNOW_TINYTWIN },
         { }
 };
 
 static void af9015_set_remote_config(struct usb_device *udev,
                 struct dvb_usb_device_properties *props)
 {
-        const struct af9015_setup *table = NULL;
-
-        if (dvb_usb_af9015_remote) {
-                /* load remote defined as module param */
-                table = af9015_setup_match(dvb_usb_af9015_remote,
-                                af9015_setup_modparam);
-        } else {
-                u16 vendor = le16_to_cpu(udev->descriptor.idVendor);
-
-                table = af9015_setup_match(af9015_config.eeprom_sum,
-                                af9015_setup_hashes);
-
-                if (!table && vendor == USB_VID_AFATECH) {
-                        /* Check USB manufacturer and product strings and try
-                           to determine correct remote in case of chip vendor
-                           reference IDs are used.
-                           DO NOT ADD ANYTHING NEW HERE. Use hashes instead.
-                         */
-                        char manufacturer[10];
-                        memset(manufacturer, 0, sizeof(manufacturer));
-                        usb_string(udev, udev->descriptor.iManufacturer,
-                                manufacturer, sizeof(manufacturer));
-                        if (!strcmp("MSI", manufacturer)) {
-                                /* iManufacturer 1 MSI
-                                   iProduct      2 MSI K-VOX */
-                                table = af9015_setup_match(
-                                        AF9015_REMOTE_MSI_DIGIVOX_MINI_II_V3,
-                                        af9015_setup_modparam);
-                        } else if (udev->descriptor.idProduct ==
-                                cpu_to_le16(USB_PID_TREKSTOR_DVBT)) {
-                                table = &(const struct af9015_setup){ 0,
-                                        ir_codes_af9015_table_trekstor,
-                                        ARRAY_SIZE(ir_codes_af9015_table_trekstor),
-                                        af9015_ir_table_trekstor,
-                                        ARRAY_SIZE(af9015_ir_table_trekstor)
-                                };
-                        }
-                } else if (!table)
-                        table = af9015_setup_match(vendor, af9015_setup_usbids);
+        u16 vid = le16_to_cpu(udev->descriptor.idVendor);
+        u16 pid = le16_to_cpu(udev->descriptor.idProduct);
+
+        /* try to load remote based module param */
+        props->rc.core.rc_codes = af9015_rc_setup_match(
+                dvb_usb_af9015_remote, af9015_rc_setup_modparam);
+
+        /* try to load remote based eeprom hash */
+        if (!props->rc.core.rc_codes)
+                props->rc.core.rc_codes = af9015_rc_setup_match(
+                        af9015_config.eeprom_sum, af9015_rc_setup_hashes);
+
+        /* try to load remote based USB ID */
+        if (!props->rc.core.rc_codes)
+                props->rc.core.rc_codes = af9015_rc_setup_match(
+                        (vid << 16) + pid, af9015_rc_setup_usbids);
+
+        /* try to load remote based USB iManufacturer string */
+        if (!props->rc.core.rc_codes && vid == USB_VID_AFATECH) {
+                /* Check USB manufacturer and product strings and try
+                   to determine correct remote in case of chip vendor
+                   reference IDs are used.
+                   DO NOT ADD ANYTHING NEW HERE. Use hashes instead. */
+                char manufacturer[10];
+                memset(manufacturer, 0, sizeof(manufacturer));
+                usb_string(udev, udev->descriptor.iManufacturer,
+                        manufacturer, sizeof(manufacturer));
+                if (!strcmp("MSI", manufacturer)) {
+                        /* iManufacturer 1 MSI
+                           iProduct      2 MSI K-VOX */
+                        props->rc.core.rc_codes = af9015_rc_setup_match(
+                                AF9015_REMOTE_MSI_DIGIVOX_MINI_II_V3,
+                                af9015_rc_setup_modparam);
+                }
         }
 
-        if (table) {
-                props->rc.legacy.rc_key_map = table->rc_key_map;
-                props->rc.legacy.rc_key_map_size = table->rc_key_map_size;
-                af9015_config.ir_table = table->ir_table;
-                af9015_config.ir_table_size = table->ir_table_size;
-        }
+        /* finally load "empty" just for leaving IR receiver enabled */
+        if (!props->rc.core.rc_codes)
+                props->rc.core.rc_codes = RC_MAP_EMPTY;
+
+        return;
 }
 
 static int af9015_read_config(struct usb_device *udev)
@@ -877,10 +831,9 @@ static int af9015_read_config(struct usb_device *udev)
 
         deb_info("%s: IR mode:%d\n", __func__, val);
         for (i = 0; i < af9015_properties_count; i++) {
-                if (val == AF9015_IR_MODE_DISABLED) {
-                        af9015_properties[i].rc.legacy.rc_key_map = NULL;
-                        af9015_properties[i].rc.legacy.rc_key_map_size  = 0;
-                } else
+                if (val == AF9015_IR_MODE_DISABLED)
+                        af9015_properties[i].rc.core.rc_codes = NULL;
+                else
                         af9015_set_remote_config(udev, &af9015_properties[i]);
         }
 
@@ -992,20 +945,19 @@ static int af9015_read_config(struct usb_device *udev)
                 case AF9013_TUNER_MT2060_2:
                 case AF9013_TUNER_TDA18271:
                 case AF9013_TUNER_QT1010A:
+                case AF9013_TUNER_TDA18218:
                         af9015_af9013_config[i].rf_spec_inv = 1;
                         break;
                 case AF9013_TUNER_MXL5003D:
                 case AF9013_TUNER_MXL5005D:
                 case AF9013_TUNER_MXL5005R:
+                case AF9013_TUNER_MXL5007T:
                         af9015_af9013_config[i].rf_spec_inv = 0;
                         break;
                 case AF9013_TUNER_MC44S803:
                         af9015_af9013_config[i].gpio[1] = AF9013_GPIO_LO;
                         af9015_af9013_config[i].rf_spec_inv = 1;
                         break;
-                case AF9013_TUNER_TDA18218:
-                        warn("tuner NXP TDA18218 not supported yet");
-                        return -ENODEV;
                 default:
                         warn("tuner id:%d not supported, please report!", val);
                         return -ENODEV;
@@ -1020,9 +972,13 @@ error:
                 err("eeprom read failed:%d", ret);
 
         /* AverMedia AVerTV Volar Black HD (A850) device have bad EEPROM
-           content :-( Override some wrong values here. */
+           content :-( Override some wrong values here. Ditto for the
+           AVerTV Red HD+ (A850T) device. */
         if (le16_to_cpu(udev->descriptor.idVendor) == USB_VID_AVERMEDIA &&
-            le16_to_cpu(udev->descriptor.idProduct) == USB_PID_AVERMEDIA_A850) {
+                ((le16_to_cpu(udev->descriptor.idProduct) ==
+                        USB_PID_AVERMEDIA_A850) ||
+                (le16_to_cpu(udev->descriptor.idProduct) ==
+                        USB_PID_AVERMEDIA_A850T))) {
                 deb_info("%s: AverMedia A850: overriding config\n", __func__);
                 /* disable dual mode */
                 af9015_config.dual_mode = 0;
@@ -1059,36 +1015,71 @@ static int af9015_identify_state(struct usb_device *udev,
         return ret;
 }
 
-static int af9015_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
+static int af9015_rc_query(struct dvb_usb_device *d)
 {
-        u8 buf[8];
-        struct req_t req = {GET_IR_CODE, 0, 0, 0, 0, sizeof(buf), buf};
-        struct ir_scancode *keymap = d->props.rc.legacy.rc_key_map;
-        int i, ret;
-
-        memset(buf, 0, sizeof(buf));
+        struct af9015_state *priv = d->priv;
+        int ret;
+        u8 buf[17];
 
-        ret = af9015_ctrl_msg(d, &req);
+        /* read registers needed to detect remote controller code */
+        ret = af9015_read_regs(d, 0x98d9, buf, sizeof(buf));
         if (ret)
+                goto error;
+
+        /* If any of these are non-zero, assume invalid data */
+        if (buf[1] || buf[2] || buf[3])
                 return ret;
 
-        *event = 0;
-        *state = REMOTE_NO_KEY_PRESSED;
+        /* Check for repeat of previous code */
+        if ((priv->rc_repeat != buf[6] || buf[0]) &&
+                                        !memcmp(&buf[12], priv->rc_last, 4)) {
+                deb_rc("%s: key repeated\n", __func__);
+                rc_keydown(d->rc_dev, priv->rc_keycode, 0);
+                priv->rc_repeat = buf[6];
+                return ret;
+        }
 
-        for (i = 0; i < d->props.rc.legacy.rc_key_map_size; i++) {
-                if (!buf[1] && rc5_custom(&keymap[i]) == buf[0] &&
-                    rc5_data(&keymap[i]) == buf[2]) {
-                        *event = keymap[i].keycode;
-                        *state = REMOTE_KEY_PRESSED;
-                        break;
+        /* Only process key if canary killed */
+        if (buf[16] != 0xff && buf[0] != 0x01) {
+                deb_rc("%s: key pressed %02x %02x %02x %02x\n", __func__,
+                        buf[12], buf[13], buf[14], buf[15]);
+
+                /* Reset the canary */
+                ret = af9015_write_reg(d, 0x98e9, 0xff);
+                if (ret)
+                        goto error;
+
+                /* Remember this key */
+                memcpy(priv->rc_last, &buf[12], 4);
+                if (buf[14] == (u8) ~buf[15]) {
+                        if (buf[12] == (u8) ~buf[13]) {
+                                /* NEC */
+                                priv->rc_keycode = buf[12] << 8 | buf[14];
+                        } else {
+                                /* NEC extended*/
+                                priv->rc_keycode = buf[12] << 16 |
+                                        buf[13] << 8 | buf[14];
+                        }
+                } else {
+                        /* 32 bit NEC */
+                        priv->rc_keycode = buf[12] << 24 | buf[13] << 16 |
+                                        buf[14] << 8 | buf[15];
                 }
+                rc_keydown(d->rc_dev, priv->rc_keycode, 0);
+        } else {
+                deb_rc("%s: no key press\n", __func__);
+                /* Invalidate last keypress */
+                /* Not really needed, but helps with debug */
+                priv->rc_last[2] = priv->rc_last[3];
         }
-        if (!buf[1])
-                deb_rc("%s: %02x %02x %02x %02x %02x %02x %02x %02x\n",
-                        __func__, buf[0], buf[1], buf[2], buf[3], buf[4],
-                        buf[5], buf[6], buf[7]);
 
-        return 0;
+        priv->rc_repeat = buf[6];
+
+error:
+        if (ret)
+                err("%s: failed:%d", __func__, ret);
+
+        return ret;
 }
 
 /* init 2nd I2C adapter */
@@ -1100,11 +1091,6 @@ static int af9015_i2c_init(struct dvb_usb_device *d)
 
         strncpy(state->i2c_adap.name, d->desc->name,
                 sizeof(state->i2c_adap.name));
-#ifdef I2C_ADAP_CLASS_TV_DIGITAL
-        state->i2c_adap.class = I2C_ADAP_CLASS_TV_DIGITAL,
-#else
-        state->i2c_adap.class = I2C_CLASS_TV_DIGITAL,
-#endif
         state->i2c_adap.algo      = d->props.i2c_algo;
         state->i2c_adap.algo_data = NULL;
         state->i2c_adap.dev.parent = &d->udev->dev;
@@ -1166,7 +1152,7 @@ static struct qt1010_config af9015_qt1010_config = {
 
 static struct tda18271_config af9015_tda18271_config = {
         .gate = TDA18271_GATE_DIGITAL,
-        .small_i2c = 1,
+        .small_i2c = TDA18271_16_BYTE_CHUNK_INIT,
 };
 
 static struct mxl5005s_config af9015_mxl5003_config = {
@@ -1208,12 +1194,22 @@ static struct mc44s803_config af9015_mc44s803_config = {
         .dig_out = 1,
 };
 
+static struct tda18218_config af9015_tda18218_config = {
+        .i2c_address = 0xc0,
+        .i2c_wr_max = 21, /* max wr bytes AF9015 I2C adap can handle at once */
+};
+
+static struct mxl5007t_config af9015_mxl5007t_config = {
+        .xtal_freq_hz = MxL_XTAL_24_MHZ,
+        .if_freq_hz = MxL_IF_4_57_MHZ,
+};
+
 static int af9015_tuner_attach(struct dvb_usb_adapter *adap)
 {
         struct af9015_state *state = adap->dev->priv;
         struct i2c_adapter *i2c_adap;
         int ret;
-        deb_info("%s: \n", __func__);
+        deb_info("%s:\n", __func__);
 
         /* select I2C adapter */
         if (adap->id == 0)
@@ -1238,6 +1234,10 @@ static int af9015_tuner_attach(struct dvb_usb_adapter *adap)
                 ret = dvb_attach(tda18271_attach, adap->fe, 0xc0, i2c_adap,
                         &af9015_tda18271_config) == NULL ? -ENODEV : 0;
                 break;
+        case AF9013_TUNER_TDA18218:
+                ret = dvb_attach(tda18218_attach, adap->fe, i2c_adap,
+                        &af9015_tda18218_config) == NULL ? -ENODEV : 0;
+                break;
         case AF9013_TUNER_MXL5003D:
                 ret = dvb_attach(mxl5005s_attach, adap->fe, i2c_adap,
                         &af9015_mxl5003_config) == NULL ? -ENODEV : 0;
@@ -1255,6 +1255,10 @@ static int af9015_tuner_attach(struct dvb_usb_adapter *adap)
                 ret = dvb_attach(mc44s803_attach, adap->fe, i2c_adap,
                         &af9015_mc44s803_config) == NULL ? -ENODEV : 0;
                 break;
+        case AF9013_TUNER_MXL5007T:
+                ret = dvb_attach(mxl5007t_attach, adap->fe, i2c_adap,
+                        0xc0, &af9015_mxl5007t_config) == NULL ? -ENODEV : 0;
+                break;
         case AF9013_TUNER_UNKNOWN:
         default:
                 ret = -ENODEV;
@@ -1300,10 +1304,16 @@ static struct usb_device_id af9015_usb_table[] = {
 /* 30 */{USB_DEVICE(USB_VID_KWORLD_2,  USB_PID_KWORLD_UB383_T)},
         {USB_DEVICE(USB_VID_KWORLD_2,  USB_PID_KWORLD_395U_4)},
         {USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_A815M)},
+        {USB_DEVICE(USB_VID_TERRATEC,  USB_PID_TERRATEC_CINERGY_T_STICK_RC)},
+        {USB_DEVICE(USB_VID_TERRATEC,
+                USB_PID_TERRATEC_CINERGY_T_STICK_DUAL_RC)},
+/* 35 */{USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_A850T)},
+        {USB_DEVICE(USB_VID_GTEK,      USB_PID_TINYTWIN_3)},
         {0},
 };
 MODULE_DEVICE_TABLE(usb, af9015_usb_table);
 
+#define AF9015_RC_INTERVAL 500
 static struct dvb_usb_device_properties af9015_properties[] = {
         {
                 .caps = DVB_USB_IS_AN_I2C_ADAPTER,
@@ -1354,14 +1364,17 @@ static struct dvb_usb_device_properties af9015_properties[] = {
 
                 .identify_state = af9015_identify_state,
 
-                .rc.legacy = {
+                .rc.core = {
+                        .protocol         = RC_TYPE_NEC,
+                        .module_name      = "af9015",
                         .rc_query         = af9015_rc_query,
-                        .rc_interval      = 150,
+                        .rc_interval      = AF9015_RC_INTERVAL,
+                        .allowed_protos   = RC_TYPE_NEC,
                 },
 
                 .i2c_algo = &af9015_i2c_algo,
 
-                .num_device_descs = 9, /* max 9 */
+                .num_device_descs = 12, /* check max from dvb-usb.h */
                 .devices = {
                         {
                                 .name = "Afatech AF9015 DVB-T USB2.0 stick",
@@ -1389,7 +1402,8 @@ static struct dvb_usb_device_properties af9015_properties[] = {
                         {
                                 .name = "DigitalNow TinyTwin DVB-T Receiver",
                                 .cold_ids = {&af9015_usb_table[5],
-                                             &af9015_usb_table[28], NULL},
+                                             &af9015_usb_table[28],
+                                             &af9015_usb_table[36], NULL},
                                 .warm_ids = {NULL},
                         },
                         {
@@ -1413,6 +1427,21 @@ static struct dvb_usb_device_properties af9015_properties[] = {
                                 .cold_ids = {&af9015_usb_table[9], NULL},
                                 .warm_ids = {NULL},
                         },
+                        {
+                                .name = "TerraTec Cinergy T Stick RC",
+                                .cold_ids = {&af9015_usb_table[33], NULL},
+                                .warm_ids = {NULL},
+                        },
+                        {
+                                .name = "TerraTec Cinergy T Stick Dual RC",
+                                .cold_ids = {&af9015_usb_table[34], NULL},
+                                .warm_ids = {NULL},
+                        },
+                        {
+                                .name = "AverMedia AVerTV Red HD+ (A850T)",
+                                .cold_ids = {&af9015_usb_table[35], NULL},
+                                .warm_ids = {NULL},
+                        },
                 }
         }, {
                 .caps = DVB_USB_IS_AN_I2C_ADAPTER,
@@ -1463,14 +1492,17 @@ static struct dvb_usb_device_properties af9015_properties[] = {
 
                 .identify_state = af9015_identify_state,
 
-                .rc.legacy = {
+                .rc.core = {
+                        .protocol         = RC_TYPE_NEC,
+                        .module_name      = "af9015",
                         .rc_query         = af9015_rc_query,
-                        .rc_interval      = 150,
+                        .rc_interval      = AF9015_RC_INTERVAL,
+                        .allowed_protos   = RC_TYPE_NEC,
                 },
 
                 .i2c_algo = &af9015_i2c_algo,
 
-                .num_device_descs = 9, /* max 9 */
+                .num_device_descs = 9, /* check max from dvb-usb.h */
                 .devices = {
                         {
                                 .name = "Xtensions XD-380",
@@ -1572,14 +1604,17 @@ static struct dvb_usb_device_properties af9015_properties[] = {
 
                 .identify_state = af9015_identify_state,
 
-                .rc.legacy = {
+                .rc.core = {
+                        .protocol         = RC_TYPE_NEC,
+                        .module_name      = "af9015",
                         .rc_query         = af9015_rc_query,
-                        .rc_interval      = 150,
+                        .rc_interval      = AF9015_RC_INTERVAL,
+                        .allowed_protos   = RC_TYPE_NEC,
                 },
 
                 .i2c_algo = &af9015_i2c_algo,
 
-                .num_device_descs = 9, /* max 9 */
+                .num_device_descs = 9, /* check max from dvb-usb.h */
                 .devices = {
                         {
                                 .name = "AverMedia AVerTV Volar GPS 805 (A805)",
@@ -1672,7 +1707,7 @@ static int af9015_usb_probe(struct usb_interface *intf,
 static void af9015_i2c_exit(struct dvb_usb_device *d)
 {
         struct af9015_state *state = d->priv;
-        deb_info("%s: \n", __func__);
+        deb_info("%s:\n", __func__);
 
         /* remove 2nd I2C adapter */
         if (d->state & DVB_USB_STATE_I2C)
@@ -1682,7 +1717,7 @@ static void af9015_i2c_exit(struct dvb_usb_device *d)
 static void af9015_usb_device_exit(struct usb_interface *intf)
 {
         struct dvb_usb_device *d = usb_get_intfdata(intf);
-        deb_info("%s: \n", __func__);
+        deb_info("%s:\n", __func__);
 
         /* remove 2nd I2C adapter */
         if (d != NULL && d->desc != NULL)
diff --git a/drivers/media/dvb/dvb-usb/af9015.h b/drivers/media/dvb/dvb-usb/af9015.h
index c8e9349742ee..beb3004f00ba 100644
--- a/drivers/media/dvb/dvb-usb/af9015.h
+++ b/drivers/media/dvb/dvb-usb/af9015.h
@@ -100,6 +100,9 @@ enum af9015_ir_mode {
 
 struct af9015_state {
         struct i2c_adapter i2c_adap; /* I2C adapter for 2nd FE */
+        u8 rc_repeat;
+        u32 rc_keycode;
+        u8 rc_last[4];
 };
 
 struct af9015_config {
@@ -108,8 +111,6 @@ struct af9015_config {
         u16 firmware_size;
         u16 firmware_checksum;
         u32 eeprom_sum;
-        u8  *ir_table;
-        u16 ir_table_size;
 };
 
 enum af9015_remote {
@@ -121,735 +122,4 @@ enum af9015_remote {
 /* 5 */ AF9015_REMOTE_AVERMEDIA_KS,
 };
 
-/* LeadTek - Y04G0051 */
-/* Leadtek WinFast DTV Dongle Gold */
-static struct ir_scancode ir_codes_af9015_table_leadtek[] = {
-        { 0x001e, KEY_1 },
-        { 0x001f, KEY_2 },
-        { 0x0020, KEY_3 },
-        { 0x0021, KEY_4 },
-        { 0x0022, KEY_5 },
-        { 0x0023, KEY_6 },
-        { 0x0024, KEY_7 },
-        { 0x0025, KEY_8 },
-        { 0x0026, KEY_9 },
-        { 0x0027, KEY_0 },
-        { 0x0028, KEY_OK },
-        { 0x004f, KEY_RIGHT },
-        { 0x0050, KEY_LEFT },
-        { 0x0051, KEY_DOWN },
-        { 0x0052, KEY_UP },
-        { 0x011a, KEY_POWER2 },
-        { 0x04b4, KEY_TV },
-        { 0x04b3, KEY_RED },
-        { 0x04b2, KEY_GREEN },
-        { 0x04b1, KEY_YELLOW },
-        { 0x04b0, KEY_BLUE },
-        { 0x003d, KEY_TEXT },
-        { 0x0113, KEY_SLEEP },
-        { 0x0010, KEY_MUTE },
-        { 0x0105, KEY_ESC },
-        { 0x0009, KEY_SCREEN },
-        { 0x010f, KEY_MENU },
-        { 0x003f, KEY_CHANNEL },
-        { 0x0013, KEY_REWIND },
-        { 0x0012, KEY_PLAY },
-        { 0x0011, KEY_FASTFORWARD },
-        { 0x0005, KEY_PREVIOUS },
-        { 0x0029, KEY_STOP },
-        { 0x002b, KEY_NEXT },
-        { 0x0041, KEY_EPG },
-        { 0x0019, KEY_VIDEO },
-        { 0x0016, KEY_AUDIO },
-        { 0x0037, KEY_DOT },
-        { 0x002a, KEY_AGAIN },
-        { 0x002c, KEY_CAMERA },
-        { 0x003c, KEY_NEW },
-        { 0x0115, KEY_RECORD },
-        { 0x010b, KEY_TIME },
-        { 0x0043, KEY_VOLUMEUP },
-        { 0x0042, KEY_VOLUMEDOWN },
-        { 0x004b, KEY_CHANNELUP },
-        { 0x004e, KEY_CHANNELDOWN },
-};
-
-static u8 af9015_ir_table_leadtek[] = {
-        0x03, 0xfc, 0x00, 0xff, 0x1a, 0x01, 0x00, /* KEY_POWER2 */
-        0x03, 0xfc, 0x56, 0xa9, 0xb4, 0x04, 0x00, /* KEY_TV */
-        0x03, 0xfc, 0x4b, 0xb4, 0xb3, 0x04, 0x00, /* KEY_RED */
-        0x03, 0xfc, 0x4c, 0xb3, 0xb2, 0x04, 0x00, /* KEY_GREEN */
-        0x03, 0xfc, 0x4d, 0xb2, 0xb1, 0x04, 0x00, /* KEY_YELLOW */
-        0x03, 0xfc, 0x4e, 0xb1, 0xb0, 0x04, 0x00, /* KEY_BLUE */
-        0x03, 0xfc, 0x1f, 0xe0, 0x3d, 0x00, 0x00, /* KEY_TEXT */
-        0x03, 0xfc, 0x40, 0xbf, 0x13, 0x01, 0x00, /* KEY_SLEEP */
-        0x03, 0xfc, 0x14, 0xeb, 0x10, 0x00, 0x00, /* KEY_MUTE */
-        0x03, 0xfc, 0x49, 0xb6, 0x05, 0x01, 0x00, /* KEY_ESC */
-        0x03, 0xfc, 0x50, 0xaf, 0x29, 0x00, 0x00, /* KEY_STOP (1)*/
-        0x03, 0xfc, 0x0c, 0xf3, 0x52, 0x00, 0x00, /* KEY_UP */
-        0x03, 0xfc, 0x03, 0xfc, 0x09, 0x00, 0x00, /* KEY_SCREEN */
-        0x03, 0xfc, 0x08, 0xf7, 0x50, 0x00, 0x00, /* KEY_LEFT */
-        0x03, 0xfc, 0x13, 0xec, 0x28, 0x00, 0x00, /* KEY_OK (1) */
-        0x03, 0xfc, 0x04, 0xfb, 0x4f, 0x00, 0x00, /* KEY_RIGHT */
-        0x03, 0xfc, 0x4f, 0xb0, 0x0f, 0x01, 0x00, /* KEY_MENU */
-        0x03, 0xfc, 0x10, 0xef, 0x51, 0x00, 0x00, /* KEY_DOWN */
-        0x03, 0xfc, 0x51, 0xae, 0x3f, 0x00, 0x00, /* KEY_CHANNEL */
-        0x03, 0xfc, 0x42, 0xbd, 0x13, 0x00, 0x00, /* KEY_REWIND */
-        0x03, 0xfc, 0x43, 0xbc, 0x12, 0x00, 0x00, /* KEY_PLAY */
-        0x03, 0xfc, 0x44, 0xbb, 0x11, 0x00, 0x00, /* KEY_FASTFORWARD */
-        0x03, 0xfc, 0x52, 0xad, 0x19, 0x00, 0x00, /* KEY_VIDEO (1) */
-        0x03, 0xfc, 0x54, 0xab, 0x05, 0x00, 0x00, /* KEY_PREVIOUS */
-        0x03, 0xfc, 0x46, 0xb9, 0x29, 0x00, 0x00, /* KEY_STOP (2) */
-        0x03, 0xfc, 0x55, 0xaa, 0x2b, 0x00, 0x00, /* KEY_NEXT */
-        0x03, 0xfc, 0x53, 0xac, 0x41, 0x00, 0x00, /* KEY_EPG */
-        0x03, 0xfc, 0x05, 0xfa, 0x1e, 0x00, 0x00, /* KEY_1 */
-        0x03, 0xfc, 0x06, 0xf9, 0x1f, 0x00, 0x00, /* KEY_2 */
-        0x03, 0xfc, 0x07, 0xf8, 0x20, 0x00, 0x00, /* KEY_3 */
-        0x03, 0xfc, 0x1e, 0xe1, 0x19, 0x00, 0x00, /* KEY_VIDEO (2) */
-        0x03, 0xfc, 0x09, 0xf6, 0x21, 0x00, 0x00, /* KEY_4 */
-        0x03, 0xfc, 0x0a, 0xf5, 0x22, 0x00, 0x00, /* KEY_5 */
-        0x03, 0xfc, 0x0b, 0xf4, 0x23, 0x00, 0x00, /* KEY_6 */
-        0x03, 0xfc, 0x1b, 0xe4, 0x16, 0x00, 0x00, /* KEY_AUDIO */
-        0x03, 0xfc, 0x0d, 0xf2, 0x24, 0x00, 0x00, /* KEY_7 */
-        0x03, 0xfc, 0x0e, 0xf1, 0x25, 0x00, 0x00, /* KEY_8 */
-        0x03, 0xfc, 0x0f, 0xf0, 0x26, 0x00, 0x00, /* KEY_9 */
-        0x03, 0xfc, 0x16, 0xe9, 0x28, 0x00, 0x00, /* KEY_OK (2) */
-        0x03, 0xfc, 0x41, 0xbe, 0x37, 0x00, 0x00, /* KEY_DOT */
-        0x03, 0xfc, 0x12, 0xed, 0x27, 0x00, 0x00, /* KEY_0 */
-        0x03, 0xfc, 0x11, 0xee, 0x2a, 0x00, 0x00, /* KEY_AGAIN */
-        0x03, 0xfc, 0x48, 0xb7, 0x2c, 0x00, 0x00, /* KEY_CAMERA */
-        0x03, 0xfc, 0x4a, 0xb5, 0x3c, 0x00, 0x00, /* KEY_NEW */
-        0x03, 0xfc, 0x47, 0xb8, 0x15, 0x01, 0x00, /* KEY_RECORD */
-        0x03, 0xfc, 0x45, 0xba, 0x0b, 0x01, 0x00, /* KEY_TIME */
-        0x03, 0xfc, 0x5e, 0xa1, 0x43, 0x00, 0x00, /* KEY_VOLUMEUP */
-        0x03, 0xfc, 0x5a, 0xa5, 0x42, 0x00, 0x00, /* KEY_VOLUMEDOWN */
-        0x03, 0xfc, 0x5b, 0xa4, 0x4b, 0x00, 0x00, /* KEY_CHANNELUP */
-        0x03, 0xfc, 0x5f, 0xa0, 0x4e, 0x00, 0x00, /* KEY_CHANNELDOWN */
-};
-
-/* TwinHan AzureWave AD-TU700(704J) */
-static struct ir_scancode ir_codes_af9015_table_twinhan[] = {
-        { 0x053f, KEY_POWER },
-        { 0x0019, KEY_FAVORITES },    /* Favorite List */
-        { 0x0004, KEY_TEXT },         /* Teletext */
-        { 0x000e, KEY_POWER },
-        { 0x000e, KEY_INFO },         /* Preview */
-        { 0x0008, KEY_EPG },          /* Info/EPG */
-        { 0x000f, KEY_LIST },         /* Record List */
-        { 0x001e, KEY_1 },
-        { 0x001f, KEY_2 },
-        { 0x0020, KEY_3 },
-        { 0x0021, KEY_4 },
-        { 0x0022, KEY_5 },
-        { 0x0023, KEY_6 },
-        { 0x0024, KEY_7 },
-        { 0x0025, KEY_8 },
-        { 0x0026, KEY_9 },
-        { 0x0027, KEY_0 },
-        { 0x0029, KEY_CANCEL },       /* Cancel */
-        { 0x004c, KEY_CLEAR },        /* Clear */
-        { 0x002a, KEY_BACK },         /* Back */
-        { 0x002b, KEY_TAB },          /* Tab */
-        { 0x0052, KEY_UP },           /* up arrow */
-        { 0x0051, KEY_DOWN },         /* down arrow */
-        { 0x004f, KEY_RIGHT },        /* right arrow */
-        { 0x0050, KEY_LEFT },         /* left arrow */
-        { 0x0028, KEY_ENTER },        /* Enter / ok */
-        { 0x0252, KEY_VOLUMEUP },
-        { 0x0251, KEY_VOLUMEDOWN },
-        { 0x004e, KEY_CHANNELDOWN },
-        { 0x004b, KEY_CHANNELUP },
-        { 0x004a, KEY_RECORD },
-        { 0x0111, KEY_PLAY },
-        { 0x0017, KEY_PAUSE },
-        { 0x000c, KEY_REWIND },       /* FR << */
-        { 0x0011, KEY_FASTFORWARD },  /* FF >> */
-        { 0x0115, KEY_PREVIOUS },     /* Replay */
-        { 0x010e, KEY_NEXT },         /* Skip */
-        { 0x0013, KEY_CAMERA },       /* Capture */
-        { 0x010f, KEY_LANGUAGE },     /* SAP */
-        { 0x0113, KEY_TV2 },          /* PIP */
-        { 0x001d, KEY_ZOOM },         /* Full Screen */
-        { 0x0117, KEY_SUBTITLE },     /* Subtitle / CC */
-        { 0x0010, KEY_MUTE },
-        { 0x0119, KEY_AUDIO },        /* L/R */ /* TODO better event */
-        { 0x0116, KEY_SLEEP },        /* Hibernate */
-        { 0x0116, KEY_SWITCHVIDEOMODE },
-                                          /* A/V */ /* TODO does not work */
-        { 0x0006, KEY_AGAIN },        /* Recall */
-        { 0x0116, KEY_KPPLUS },       /* Zoom+ */ /* TODO does not work */
-        { 0x0116, KEY_KPMINUS },      /* Zoom- */ /* TODO does not work */
-        { 0x0215, KEY_RED },
-        { 0x020a, KEY_GREEN },
-        { 0x021c, KEY_YELLOW },
-        { 0x0205, KEY_BLUE },
-};
-
-static u8 af9015_ir_table_twinhan[] = {
-        0x00, 0xff, 0x16, 0xe9, 0x3f, 0x05, 0x00,
-        0x00, 0xff, 0x07, 0xf8, 0x16, 0x01, 0x00,
-        0x00, 0xff, 0x14, 0xeb, 0x11, 0x01, 0x00,
-        0x00, 0xff, 0x1a, 0xe5, 0x4d, 0x00, 0x00,
-        0x00, 0xff, 0x4c, 0xb3, 0x17, 0x00, 0x00,
-        0x00, 0xff, 0x12, 0xed, 0x11, 0x00, 0x00,
-        0x00, 0xff, 0x40, 0xbf, 0x0c, 0x00, 0x00,
-        0x00, 0xff, 0x11, 0xee, 0x4a, 0x00, 0x00,
-        0x00, 0xff, 0x54, 0xab, 0x13, 0x00, 0x00,
-        0x00, 0xff, 0x41, 0xbe, 0x15, 0x01, 0x00,
-        0x00, 0xff, 0x42, 0xbd, 0x0e, 0x01, 0x00,
-        0x00, 0xff, 0x43, 0xbc, 0x17, 0x01, 0x00,
-        0x00, 0xff, 0x50, 0xaf, 0x0f, 0x01, 0x00,
-        0x00, 0xff, 0x4d, 0xb2, 0x1d, 0x00, 0x00,
-        0x00, 0xff, 0x47, 0xb8, 0x13, 0x01, 0x00,
-        0x00, 0xff, 0x05, 0xfa, 0x4b, 0x00, 0x00,
-        0x00, 0xff, 0x02, 0xfd, 0x4e, 0x00, 0x00,
-        0x00, 0xff, 0x0e, 0xf1, 0x06, 0x00, 0x00,
-        0x00, 0xff, 0x1e, 0xe1, 0x52, 0x02, 0x00,
-        0x00, 0xff, 0x0a, 0xf5, 0x51, 0x02, 0x00,
-        0x00, 0xff, 0x10, 0xef, 0x10, 0x00, 0x00,
-        0x00, 0xff, 0x49, 0xb6, 0x19, 0x01, 0x00,
-        0x00, 0xff, 0x15, 0xea, 0x27, 0x00, 0x00,
-        0x00, 0xff, 0x03, 0xfc, 0x1e, 0x00, 0x00,
-        0x00, 0xff, 0x01, 0xfe, 0x1f, 0x00, 0x00,
-        0x00, 0xff, 0x06, 0xf9, 0x20, 0x00, 0x00,
-        0x00, 0xff, 0x09, 0xf6, 0x21, 0x00, 0x00,
-        0x00, 0xff, 0x1d, 0xe2, 0x22, 0x00, 0x00,
-        0x00, 0xff, 0x1f, 0xe0, 0x23, 0x00, 0x00,
-        0x00, 0xff, 0x0d, 0xf2, 0x24, 0x00, 0x00,
-        0x00, 0xff, 0x19, 0xe6, 0x25, 0x00, 0x00,
-        0x00, 0xff, 0x1b, 0xe4, 0x26, 0x00, 0x00,
-        0x00, 0xff, 0x00, 0xff, 0x2b, 0x00, 0x00,
-        0x00, 0xff, 0x4a, 0xb5, 0x4c, 0x00, 0x00,
-        0x00, 0xff, 0x4b, 0xb4, 0x52, 0x00, 0x00,
-        0x00, 0xff, 0x51, 0xae, 0x51, 0x00, 0x00,
-        0x00, 0xff, 0x52, 0xad, 0x4f, 0x00, 0x00,
-        0x00, 0xff, 0x4e, 0xb1, 0x50, 0x00, 0x00,
-        0x00, 0xff, 0x0c, 0xf3, 0x29, 0x00, 0x00,
-        0x00, 0xff, 0x4f, 0xb0, 0x28, 0x00, 0x00,
-        0x00, 0xff, 0x13, 0xec, 0x2a, 0x00, 0x00,
-        0x00, 0xff, 0x17, 0xe8, 0x19, 0x00, 0x00,
-        0x00, 0xff, 0x04, 0xfb, 0x0f, 0x00, 0x00,
-        0x00, 0xff, 0x48, 0xb7, 0x0e, 0x00, 0x00,
-        0x00, 0xff, 0x0f, 0xf0, 0x04, 0x00, 0x00,
-        0x00, 0xff, 0x1c, 0xe3, 0x08, 0x00, 0x00,
-        0x00, 0xff, 0x18, 0xe7, 0x15, 0x02, 0x00,
-        0x00, 0xff, 0x53, 0xac, 0x0a, 0x02, 0x00,
-        0x00, 0xff, 0x5e, 0xa1, 0x1c, 0x02, 0x00,
-        0x00, 0xff, 0x5f, 0xa0, 0x05, 0x02, 0x00,
-};
-
-/* A-Link DTU(m) */
-static struct ir_scancode ir_codes_af9015_table_a_link[] = {
-        { 0x001e, KEY_1 },
-        { 0x001f, KEY_2 },
-        { 0x0020, KEY_3 },
-        { 0x0021, KEY_4 },
-        { 0x0022, KEY_5 },
-        { 0x0023, KEY_6 },
-        { 0x0024, KEY_7 },
-        { 0x0025, KEY_8 },
-        { 0x0026, KEY_9 },
-        { 0x0027, KEY_0 },
-        { 0x002e, KEY_CHANNELUP },
-        { 0x002d, KEY_CHANNELDOWN },
-        { 0x0428, KEY_ZOOM },
-        { 0x0041, KEY_MUTE },
-        { 0x0042, KEY_VOLUMEDOWN },
-        { 0x0043, KEY_VOLUMEUP },
-        { 0x0044, KEY_GOTO },         /* jump */
-        { 0x0545, KEY_POWER },
-};
-
-static u8 af9015_ir_table_a_link[] = {
-        0x08, 0xf7, 0x12, 0xed, 0x45, 0x05, 0x00, /* power */
-        0x08, 0xf7, 0x1a, 0xe5, 0x41, 0x00, 0x00, /* mute */
-        0x08, 0xf7, 0x01, 0xfe, 0x1e, 0x00, 0x00, /* 1 */
-        0x08, 0xf7, 0x1c, 0xe3, 0x21, 0x00, 0x00, /* 4 */
-        0x08, 0xf7, 0x03, 0xfc, 0x24, 0x00, 0x00, /* 7 */
-        0x08, 0xf7, 0x05, 0xfa, 0x28, 0x04, 0x00, /* zoom */
-        0x08, 0xf7, 0x00, 0xff, 0x43, 0x00, 0x00, /* volume up */
-        0x08, 0xf7, 0x16, 0xe9, 0x42, 0x00, 0x00, /* volume down */
-        0x08, 0xf7, 0x0f, 0xf0, 0x1f, 0x00, 0x00, /* 2 */
-        0x08, 0xf7, 0x0d, 0xf2, 0x22, 0x00, 0x00, /* 5 */
-        0x08, 0xf7, 0x1b, 0xe4, 0x25, 0x00, 0x00, /* 8 */
-        0x08, 0xf7, 0x06, 0xf9, 0x27, 0x00, 0x00, /* 0 */
-        0x08, 0xf7, 0x14, 0xeb, 0x2e, 0x00, 0x00, /* channel up */
-        0x08, 0xf7, 0x1d, 0xe2, 0x2d, 0x00, 0x00, /* channel down */
-        0x08, 0xf7, 0x02, 0xfd, 0x20, 0x00, 0x00, /* 3 */
-        0x08, 0xf7, 0x18, 0xe7, 0x23, 0x00, 0x00, /* 6 */
-        0x08, 0xf7, 0x04, 0xfb, 0x26, 0x00, 0x00, /* 9 */
-        0x08, 0xf7, 0x07, 0xf8, 0x44, 0x00, 0x00, /* jump */
-};
-
-/* MSI DIGIVOX mini II V3.0 */
-static struct ir_scancode ir_codes_af9015_table_msi[] = {
-        { 0x001e, KEY_1 },
-        { 0x001f, KEY_2 },
-        { 0x0020, KEY_3 },
-        { 0x0021, KEY_4 },
-        { 0x0022, KEY_5 },
-        { 0x0023, KEY_6 },
-        { 0x0024, KEY_7 },
-        { 0x0025, KEY_8 },
-        { 0x0026, KEY_9 },
-        { 0x0027, KEY_0 },
-        { 0x030f, KEY_CHANNELUP },
-        { 0x030e, KEY_CHANNELDOWN },
-        { 0x0042, KEY_VOLUMEDOWN },
-        { 0x0043, KEY_VOLUMEUP },
-        { 0x0545, KEY_POWER },
-        { 0x0052, KEY_UP },           /* up */
-        { 0x0051, KEY_DOWN },         /* down */
-        { 0x0028, KEY_ENTER },
-};
-
-static u8 af9015_ir_table_msi[] = {
-        0x03, 0xfc, 0x17, 0xe8, 0x45, 0x05, 0x00, /* power */
-        0x03, 0xfc, 0x0d, 0xf2, 0x51, 0x00, 0x00, /* down */
-        0x03, 0xfc, 0x03, 0xfc, 0x52, 0x00, 0x00, /* up */
-        0x03, 0xfc, 0x1a, 0xe5, 0x1e, 0x00, 0x00, /* 1 */
-        0x03, 0xfc, 0x02, 0xfd, 0x1f, 0x00, 0x00, /* 2 */
-        0x03, 0xfc, 0x04, 0xfb, 0x20, 0x00, 0x00, /* 3 */
-        0x03, 0xfc, 0x1c, 0xe3, 0x21, 0x00, 0x00, /* 4 */
-        0x03, 0xfc, 0x08, 0xf7, 0x22, 0x00, 0x00, /* 5 */
-        0x03, 0xfc, 0x1d, 0xe2, 0x23, 0x00, 0x00, /* 6 */
-        0x03, 0xfc, 0x11, 0xee, 0x24, 0x00, 0x00, /* 7 */
-        0x03, 0xfc, 0x0b, 0xf4, 0x25, 0x00, 0x00, /* 8 */
-        0x03, 0xfc, 0x10, 0xef, 0x26, 0x00, 0x00, /* 9 */
-        0x03, 0xfc, 0x09, 0xf6, 0x27, 0x00, 0x00, /* 0 */
-        0x03, 0xfc, 0x14, 0xeb, 0x43, 0x00, 0x00, /* volume up */
-        0x03, 0xfc, 0x1f, 0xe0, 0x42, 0x00, 0x00, /* volume down */
-        0x03, 0xfc, 0x15, 0xea, 0x0f, 0x03, 0x00, /* channel up */
-        0x03, 0xfc, 0x05, 0xfa, 0x0e, 0x03, 0x00, /* channel down */
-        0x03, 0xfc, 0x16, 0xe9, 0x28, 0x00, 0x00, /* enter */
-};
-
-/* MYGICTV U718 */
-static struct ir_scancode ir_codes_af9015_table_mygictv[] = {
-        { 0x003d, KEY_SWITCHVIDEOMODE },
-                                          /* TV / AV */
-        { 0x0545, KEY_POWER },
-        { 0x001e, KEY_1 },
-        { 0x001f, KEY_2 },
-        { 0x0020, KEY_3 },
-        { 0x0021, KEY_4 },
-        { 0x0022, KEY_5 },
-        { 0x0023, KEY_6 },
-        { 0x0024, KEY_7 },
-        { 0x0025, KEY_8 },
-        { 0x0026, KEY_9 },
-        { 0x0027, KEY_0 },
-        { 0x0041, KEY_MUTE },
-        { 0x002a, KEY_ESC },          /* Esc */
-        { 0x002e, KEY_CHANNELUP },
-        { 0x002d, KEY_CHANNELDOWN },
-        { 0x0042, KEY_VOLUMEDOWN },
-        { 0x0043, KEY_VOLUMEUP },
-        { 0x0052, KEY_UP },           /* up arrow */
-        { 0x0051, KEY_DOWN },         /* down arrow */
-        { 0x004f, KEY_RIGHT },        /* right arrow */
-        { 0x0050, KEY_LEFT },         /* left arrow */
-        { 0x0028, KEY_ENTER },        /* ok */
-        { 0x0115, KEY_RECORD },
-        { 0x0313, KEY_PLAY },
-        { 0x0113, KEY_PAUSE },
-        { 0x0116, KEY_STOP },
-        { 0x0307, KEY_REWIND },       /* FR << */
-        { 0x0309, KEY_FASTFORWARD },  /* FF >> */
-        { 0x003b, KEY_TIME },         /* TimeShift */
-        { 0x003e, KEY_CAMERA },       /* Snapshot */
-        { 0x0316, KEY_CYCLEWINDOWS }, /* yellow, min / max */
-        { 0x0000, KEY_ZOOM },         /* 'select' (?) */
-        { 0x0316, KEY_SHUFFLE },      /* Shuffle */
-        { 0x0345, KEY_POWER },
-};
-
-static u8 af9015_ir_table_mygictv[] = {
-        0x02, 0xbd, 0x0c, 0xf3, 0x3d, 0x00, 0x00, /* TV / AV */
-        0x02, 0xbd, 0x14, 0xeb, 0x45, 0x05, 0x00, /* power */
-        0x02, 0xbd, 0x00, 0xff, 0x1e, 0x00, 0x00, /* 1 */
-        0x02, 0xbd, 0x01, 0xfe, 0x1f, 0x00, 0x00, /* 2 */
-        0x02, 0xbd, 0x02, 0xfd, 0x20, 0x00, 0x00, /* 3 */
-        0x02, 0xbd, 0x03, 0xfc, 0x21, 0x00, 0x00, /* 4 */
-        0x02, 0xbd, 0x04, 0xfb, 0x22, 0x00, 0x00, /* 5 */
-        0x02, 0xbd, 0x05, 0xfa, 0x23, 0x00, 0x00, /* 6 */
-        0x02, 0xbd, 0x06, 0xf9, 0x24, 0x00, 0x00, /* 7 */
-        0x02, 0xbd, 0x07, 0xf8, 0x25, 0x00, 0x00, /* 8 */
-        0x02, 0xbd, 0x08, 0xf7, 0x26, 0x00, 0x00, /* 9 */
-        0x02, 0xbd, 0x09, 0xf6, 0x27, 0x00, 0x00, /* 0 */
-        0x02, 0xbd, 0x0a, 0xf5, 0x41, 0x00, 0x00, /* mute */
-        0x02, 0xbd, 0x1c, 0xe3, 0x2a, 0x00, 0x00, /* esc */
-        0x02, 0xbd, 0x1f, 0xe0, 0x43, 0x00, 0x00, /* volume up */
-        0x02, 0xbd, 0x12, 0xed, 0x52, 0x00, 0x00, /* up arrow */
-        0x02, 0xbd, 0x11, 0xee, 0x50, 0x00, 0x00, /* left arrow */
-        0x02, 0xbd, 0x15, 0xea, 0x28, 0x00, 0x00, /* ok */
-        0x02, 0xbd, 0x10, 0xef, 0x4f, 0x00, 0x00, /* right arrow */
-        0x02, 0xbd, 0x13, 0xec, 0x51, 0x00, 0x00, /* down arrow */
-        0x02, 0xbd, 0x0e, 0xf1, 0x42, 0x00, 0x00, /* volume down */
-        0x02, 0xbd, 0x19, 0xe6, 0x15, 0x01, 0x00, /* record */
-        0x02, 0xbd, 0x1e, 0xe1, 0x13, 0x03, 0x00, /* play */
-        0x02, 0xbd, 0x16, 0xe9, 0x16, 0x01, 0x00, /* stop */
-        0x02, 0xbd, 0x0b, 0xf4, 0x28, 0x04, 0x00, /* yellow, min / max */
-        0x02, 0xbd, 0x0f, 0xf0, 0x3b, 0x00, 0x00, /* time shift */
-        0x02, 0xbd, 0x18, 0xe7, 0x2e, 0x00, 0x00, /* channel up */
-        0x02, 0xbd, 0x1a, 0xe5, 0x2d, 0x00, 0x00, /* channel down */
-        0x02, 0xbd, 0x17, 0xe8, 0x3e, 0x00, 0x00, /* snapshot */
-        0x02, 0xbd, 0x40, 0xbf, 0x13, 0x01, 0x00, /* pause */
-        0x02, 0xbd, 0x41, 0xbe, 0x09, 0x03, 0x00, /* FF >> */
-        0x02, 0xbd, 0x42, 0xbd, 0x07, 0x03, 0x00, /* FR << */
-        0x02, 0xbd, 0x43, 0xbc, 0x00, 0x00, 0x00, /* 'select' (?) */
-        0x02, 0xbd, 0x44, 0xbb, 0x16, 0x03, 0x00, /* shuffle */
-        0x02, 0xbd, 0x45, 0xba, 0x45, 0x03, 0x00, /* power */
-};
-
-/* KWorld PlusTV Dual DVB-T Stick (DVB-T 399U) */
-static u8 af9015_ir_table_kworld[] = {
-        0x86, 0x6b, 0x0c, 0xf3, 0x2e, 0x07, 0x00,
-        0x86, 0x6b, 0x16, 0xe9, 0x2d, 0x07, 0x00,
-        0x86, 0x6b, 0x1d, 0xe2, 0x37, 0x07, 0x00,
-        0x86, 0x6b, 0x00, 0xff, 0x1e, 0x07, 0x00,
-        0x86, 0x6b, 0x01, 0xfe, 0x1f, 0x07, 0x00,
-        0x86, 0x6b, 0x02, 0xfd, 0x20, 0x07, 0x00,
-        0x86, 0x6b, 0x03, 0xfc, 0x21, 0x07, 0x00,
-        0x86, 0x6b, 0x04, 0xfb, 0x22, 0x07, 0x00,
-        0x86, 0x6b, 0x05, 0xfa, 0x23, 0x07, 0x00,
-        0x86, 0x6b, 0x06, 0xf9, 0x24, 0x07, 0x00,
-        0x86, 0x6b, 0x07, 0xf8, 0x25, 0x07, 0x00,
-        0x86, 0x6b, 0x08, 0xf7, 0x26, 0x07, 0x00,
-        0x86, 0x6b, 0x09, 0xf6, 0x4d, 0x07, 0x00,
-        0x86, 0x6b, 0x0a, 0xf5, 0x4e, 0x07, 0x00,
-        0x86, 0x6b, 0x14, 0xeb, 0x4f, 0x07, 0x00,
-        0x86, 0x6b, 0x1e, 0xe1, 0x50, 0x07, 0x00,
-        0x86, 0x6b, 0x17, 0xe8, 0x52, 0x07, 0x00,
-        0x86, 0x6b, 0x1f, 0xe0, 0x51, 0x07, 0x00,
-        0x86, 0x6b, 0x0e, 0xf1, 0x0b, 0x07, 0x00,
-        0x86, 0x6b, 0x20, 0xdf, 0x0c, 0x07, 0x00,
-        0x86, 0x6b, 0x42, 0xbd, 0x0d, 0x07, 0x00,
-        0x86, 0x6b, 0x0b, 0xf4, 0x0e, 0x07, 0x00,
-        0x86, 0x6b, 0x43, 0xbc, 0x0f, 0x07, 0x00,
-        0x86, 0x6b, 0x10, 0xef, 0x10, 0x07, 0x00,
-        0x86, 0x6b, 0x21, 0xde, 0x11, 0x07, 0x00,
-        0x86, 0x6b, 0x13, 0xec, 0x12, 0x07, 0x00,
-        0x86, 0x6b, 0x11, 0xee, 0x13, 0x07, 0x00,
-        0x86, 0x6b, 0x12, 0xed, 0x14, 0x07, 0x00,
-        0x86, 0x6b, 0x19, 0xe6, 0x15, 0x07, 0x00,
-        0x86, 0x6b, 0x1a, 0xe5, 0x16, 0x07, 0x00,
-        0x86, 0x6b, 0x1b, 0xe4, 0x17, 0x07, 0x00,
-        0x86, 0x6b, 0x4b, 0xb4, 0x18, 0x07, 0x00,
-        0x86, 0x6b, 0x40, 0xbf, 0x19, 0x07, 0x00,
-        0x86, 0x6b, 0x44, 0xbb, 0x1a, 0x07, 0x00,
-        0x86, 0x6b, 0x41, 0xbe, 0x1b, 0x07, 0x00,
-        0x86, 0x6b, 0x22, 0xdd, 0x1c, 0x07, 0x00,
-        0x86, 0x6b, 0x15, 0xea, 0x1d, 0x07, 0x00,
-        0x86, 0x6b, 0x0f, 0xf0, 0x3f, 0x07, 0x00,
-        0x86, 0x6b, 0x1c, 0xe3, 0x40, 0x07, 0x00,
-        0x86, 0x6b, 0x4a, 0xb5, 0x41, 0x07, 0x00,
-        0x86, 0x6b, 0x48, 0xb7, 0x42, 0x07, 0x00,
-        0x86, 0x6b, 0x49, 0xb6, 0x43, 0x07, 0x00,
-        0x86, 0x6b, 0x18, 0xe7, 0x44, 0x07, 0x00,
-        0x86, 0x6b, 0x23, 0xdc, 0x45, 0x07, 0x00,
-};
-
-/* AverMedia Volar X */
-static struct ir_scancode ir_codes_af9015_table_avermedia[] = {
-        { 0x053d, KEY_PROG1 },       /* SOURCE */
-        { 0x0512, KEY_POWER },       /* POWER */
-        { 0x051e, KEY_1 },           /* 1 */
-        { 0x051f, KEY_2 },           /* 2 */
-        { 0x0520, KEY_3 },           /* 3 */
-        { 0x0521, KEY_4 },           /* 4 */
-        { 0x0522, KEY_5 },           /* 5 */
-        { 0x0523, KEY_6 },           /* 6 */
-        { 0x0524, KEY_7 },           /* 7 */
-        { 0x0525, KEY_8 },           /* 8 */
-        { 0x0526, KEY_9 },           /* 9 */
-        { 0x053f, KEY_LEFT },        /* L / DISPLAY */
-        { 0x0527, KEY_0 },           /* 0 */
-        { 0x050f, KEY_RIGHT },       /* R / CH RTN */
-        { 0x0518, KEY_PROG2 },       /* SNAP SHOT */
-        { 0x051c, KEY_PROG3 },       /* 16-CH PREV */
-        { 0x052d, KEY_VOLUMEDOWN },  /* VOL DOWN */
-        { 0x053e, KEY_ZOOM },        /* FULL SCREEN */
-        { 0x052e, KEY_VOLUMEUP },    /* VOL UP */
-        { 0x0510, KEY_MUTE },        /* MUTE */
-        { 0x0504, KEY_AUDIO },       /* AUDIO */
-        { 0x0515, KEY_RECORD },      /* RECORD */
-        { 0x0511, KEY_PLAY },        /* PLAY */
-        { 0x0516, KEY_STOP },        /* STOP */
-        { 0x050c, KEY_PLAYPAUSE },   /* TIMESHIFT / PAUSE */
-        { 0x0505, KEY_BACK },        /* << / RED */
-        { 0x0509, KEY_FORWARD },     /* >> / YELLOW */
-        { 0x0517, KEY_TEXT },        /* TELETEXT */
-        { 0x050a, KEY_EPG },         /* EPG */
-        { 0x0513, KEY_MENU },        /* MENU */
-
-        { 0x050e, KEY_CHANNELUP },   /* CH UP */
-        { 0x050d, KEY_CHANNELDOWN }, /* CH DOWN */
-        { 0x0519, KEY_FIRST },       /* |<< / GREEN */
-        { 0x0508, KEY_LAST },        /* >>| / BLUE */
-};
-
-static u8 af9015_ir_table_avermedia[] = {
-        0x02, 0xfd, 0x00, 0xff, 0x12, 0x05, 0x00,
-        0x02, 0xfd, 0x01, 0xfe, 0x3d, 0x05, 0x00,
-        0x02, 0xfd, 0x03, 0xfc, 0x17, 0x05, 0x00,
-        0x02, 0xfd, 0x04, 0xfb, 0x0a, 0x05, 0x00,
-        0x02, 0xfd, 0x05, 0xfa, 0x1e, 0x05, 0x00,
-        0x02, 0xfd, 0x06, 0xf9, 0x1f, 0x05, 0x00,
-        0x02, 0xfd, 0x07, 0xf8, 0x20, 0x05, 0x00,
-        0x02, 0xfd, 0x09, 0xf6, 0x21, 0x05, 0x00,
-        0x02, 0xfd, 0x0a, 0xf5, 0x22, 0x05, 0x00,
-        0x02, 0xfd, 0x0b, 0xf4, 0x23, 0x05, 0x00,
-        0x02, 0xfd, 0x0d, 0xf2, 0x24, 0x05, 0x00,
-        0x02, 0xfd, 0x0e, 0xf1, 0x25, 0x05, 0x00,
-        0x02, 0xfd, 0x0f, 0xf0, 0x26, 0x05, 0x00,
-        0x02, 0xfd, 0x11, 0xee, 0x27, 0x05, 0x00,
-        0x02, 0xfd, 0x08, 0xf7, 0x04, 0x05, 0x00,
-        0x02, 0xfd, 0x0c, 0xf3, 0x3e, 0x05, 0x00,
-        0x02, 0xfd, 0x10, 0xef, 0x1c, 0x05, 0x00,
-        0x02, 0xfd, 0x12, 0xed, 0x3f, 0x05, 0x00,
-        0x02, 0xfd, 0x13, 0xec, 0x0f, 0x05, 0x00,
-        0x02, 0xfd, 0x14, 0xeb, 0x10, 0x05, 0x00,
-        0x02, 0xfd, 0x15, 0xea, 0x13, 0x05, 0x00,
-        0x02, 0xfd, 0x17, 0xe8, 0x18, 0x05, 0x00,
-        0x02, 0xfd, 0x18, 0xe7, 0x11, 0x05, 0x00,
-        0x02, 0xfd, 0x19, 0xe6, 0x15, 0x05, 0x00,
-        0x02, 0xfd, 0x1a, 0xe5, 0x0c, 0x05, 0x00,
-        0x02, 0xfd, 0x1b, 0xe4, 0x16, 0x05, 0x00,
-        0x02, 0xfd, 0x1c, 0xe3, 0x09, 0x05, 0x00,
-        0x02, 0xfd, 0x1d, 0xe2, 0x05, 0x05, 0x00,
-        0x02, 0xfd, 0x1e, 0xe1, 0x2d, 0x05, 0x00,
-        0x02, 0xfd, 0x1f, 0xe0, 0x2e, 0x05, 0x00,
-        0x03, 0xfc, 0x00, 0xff, 0x08, 0x05, 0x00,
-        0x03, 0xfc, 0x01, 0xfe, 0x19, 0x05, 0x00,
-        0x03, 0xfc, 0x02, 0xfd, 0x0d, 0x05, 0x00,
-        0x03, 0xfc, 0x03, 0xfc, 0x0e, 0x05, 0x00,
-};
-
-static u8 af9015_ir_table_avermedia_ks[] = {
-        0x05, 0xfa, 0x01, 0xfe, 0x12, 0x05, 0x00,
-        0x05, 0xfa, 0x02, 0xfd, 0x0e, 0x05, 0x00,
-        0x05, 0xfa, 0x03, 0xfc, 0x0d, 0x05, 0x00,
-        0x05, 0xfa, 0x04, 0xfb, 0x2e, 0x05, 0x00,
-        0x05, 0xfa, 0x05, 0xfa, 0x2d, 0x05, 0x00,
-        0x05, 0xfa, 0x06, 0xf9, 0x10, 0x05, 0x00,
-        0x05, 0xfa, 0x07, 0xf8, 0x0f, 0x05, 0x00,
-        0x05, 0xfa, 0x08, 0xf7, 0x3d, 0x05, 0x00,
-        0x05, 0xfa, 0x09, 0xf6, 0x1e, 0x05, 0x00,
-        0x05, 0xfa, 0x0a, 0xf5, 0x1f, 0x05, 0x00,
-        0x05, 0xfa, 0x0b, 0xf4, 0x20, 0x05, 0x00,
-        0x05, 0xfa, 0x0c, 0xf3, 0x21, 0x05, 0x00,
-        0x05, 0xfa, 0x0d, 0xf2, 0x22, 0x05, 0x00,
-        0x05, 0xfa, 0x0e, 0xf1, 0x23, 0x05, 0x00,
-        0x05, 0xfa, 0x0f, 0xf0, 0x24, 0x05, 0x00,
-        0x05, 0xfa, 0x10, 0xef, 0x25, 0x05, 0x00,
-        0x05, 0xfa, 0x11, 0xee, 0x26, 0x05, 0x00,
-        0x05, 0xfa, 0x12, 0xed, 0x27, 0x05, 0x00,
-        0x05, 0xfa, 0x13, 0xec, 0x04, 0x05, 0x00,
-        0x05, 0xfa, 0x15, 0xea, 0x0a, 0x05, 0x00,
-        0x05, 0xfa, 0x16, 0xe9, 0x11, 0x05, 0x00,
-        0x05, 0xfa, 0x17, 0xe8, 0x15, 0x05, 0x00,
-        0x05, 0xfa, 0x18, 0xe7, 0x16, 0x05, 0x00,
-        0x05, 0xfa, 0x1c, 0xe3, 0x05, 0x05, 0x00,
-        0x05, 0xfa, 0x1d, 0xe2, 0x09, 0x05, 0x00,
-        0x05, 0xfa, 0x4d, 0xb2, 0x3f, 0x05, 0x00,
-        0x05, 0xfa, 0x56, 0xa9, 0x3e, 0x05, 0x00
-};
-
-/* Digittrade DVB-T USB Stick */
-static struct ir_scancode ir_codes_af9015_table_digittrade[] = {
-        { 0x010f, KEY_LAST },   /* RETURN */
-        { 0x0517, KEY_TEXT },   /* TELETEXT */
-        { 0x0108, KEY_EPG },    /* EPG */
-        { 0x0513, KEY_POWER },  /* POWER */
-        { 0x0109, KEY_ZOOM },   /* FULLSCREEN */
-        { 0x0040, KEY_AUDIO },  /* DUAL SOUND */
-        { 0x002c, KEY_PRINT },  /* SNAPSHOT */
-        { 0x0516, KEY_SUBTITLE },       /* SUBTITLE */
-        { 0x0052, KEY_CHANNELUP },      /* CH Up */
-        { 0x0051, KEY_CHANNELDOWN },/* Ch Dn */
-        { 0x0057, KEY_VOLUMEUP },       /* Vol Up */
-        { 0x0056, KEY_VOLUMEDOWN },     /* Vol Dn */
-        { 0x0110, KEY_MUTE },   /* MUTE */
-        { 0x0027, KEY_0 },
-        { 0x001e, KEY_1 },
-        { 0x001f, KEY_2 },
-        { 0x0020, KEY_3 },
-        { 0x0021, KEY_4 },
-        { 0x0022, KEY_5 },
-        { 0x0023, KEY_6 },
-        { 0x0024, KEY_7 },
-        { 0x0025, KEY_8 },
-        { 0x0026, KEY_9 },
-        { 0x0117, KEY_PLAYPAUSE },      /* TIMESHIFT */
-        { 0x0115, KEY_RECORD }, /* RECORD */
-        { 0x0313, KEY_PLAY },   /* PLAY */
-        { 0x0116, KEY_STOP },   /* STOP */
-        { 0x0113, KEY_PAUSE },  /* PAUSE */
-};
-
-static u8 af9015_ir_table_digittrade[] = {
-        0x00, 0xff, 0x06, 0xf9, 0x13, 0x05, 0x00,
-        0x00, 0xff, 0x4d, 0xb2, 0x17, 0x01, 0x00,
-        0x00, 0xff, 0x1f, 0xe0, 0x2c, 0x00, 0x00,
-        0x00, 0xff, 0x0a, 0xf5, 0x15, 0x01, 0x00,
-        0x00, 0xff, 0x0e, 0xf1, 0x16, 0x01, 0x00,
-        0x00, 0xff, 0x09, 0xf6, 0x09, 0x01, 0x00,
-        0x00, 0xff, 0x01, 0xfe, 0x08, 0x01, 0x00,
-        0x00, 0xff, 0x05, 0xfa, 0x10, 0x01, 0x00,
-        0x00, 0xff, 0x02, 0xfd, 0x56, 0x00, 0x00,
-        0x00, 0xff, 0x40, 0xbf, 0x57, 0x00, 0x00,
-        0x00, 0xff, 0x19, 0xe6, 0x52, 0x00, 0x00,
-        0x00, 0xff, 0x17, 0xe8, 0x51, 0x00, 0x00,
-        0x00, 0xff, 0x10, 0xef, 0x0f, 0x01, 0x00,
-        0x00, 0xff, 0x54, 0xab, 0x27, 0x00, 0x00,
-        0x00, 0xff, 0x1b, 0xe4, 0x1e, 0x00, 0x00,
-        0x00, 0xff, 0x11, 0xee, 0x1f, 0x00, 0x00,
-        0x00, 0xff, 0x15, 0xea, 0x20, 0x00, 0x00,
-        0x00, 0xff, 0x12, 0xed, 0x21, 0x00, 0x00,
-        0x00, 0xff, 0x16, 0xe9, 0x22, 0x00, 0x00,
-        0x00, 0xff, 0x4c, 0xb3, 0x23, 0x00, 0x00,
-        0x00, 0xff, 0x48, 0xb7, 0x24, 0x00, 0x00,
-        0x00, 0xff, 0x04, 0xfb, 0x25, 0x00, 0x00,
-        0x00, 0xff, 0x00, 0xff, 0x26, 0x00, 0x00,
-        0x00, 0xff, 0x1e, 0xe1, 0x13, 0x03, 0x00,
-        0x00, 0xff, 0x1a, 0xe5, 0x13, 0x01, 0x00,
-        0x00, 0xff, 0x03, 0xfc, 0x17, 0x05, 0x00,
-        0x00, 0xff, 0x0d, 0xf2, 0x16, 0x05, 0x00,
-        0x00, 0xff, 0x1d, 0xe2, 0x40, 0x00, 0x00,
-};
-
-/* TREKSTOR DVB-T USB Stick */
-static struct ir_scancode ir_codes_af9015_table_trekstor[] = {
-        { 0x0704, KEY_AGAIN },          /* Home */
-        { 0x0705, KEY_MUTE },           /* Mute */
-        { 0x0706, KEY_UP },                     /* Up */
-        { 0x0707, KEY_DOWN },           /* Down */
-        { 0x0709, KEY_RIGHT },          /* Right */
-        { 0x070a, KEY_ENTER },          /* OK */
-        { 0x070b, KEY_FASTFORWARD },    /* Fast forward */
-        { 0x070c, KEY_REWIND },         /* Rewind */
-        { 0x070d, KEY_PLAY },           /* Play/Pause */
-        { 0x070e, KEY_VOLUMEUP },               /* Volume + */
-        { 0x070f, KEY_VOLUMEDOWN },             /* Volume - */
-        { 0x0710, KEY_RECORD },         /* Record */
-        { 0x0711, KEY_STOP },           /* Stop */
-        { 0x0712, KEY_ZOOM },           /* TV */
-        { 0x0713, KEY_EPG },            /* Info/EPG */
-        { 0x0714, KEY_CHANNELDOWN },    /* Channel - */
-        { 0x0715, KEY_CHANNELUP },              /* Channel + */
-        { 0x071e, KEY_1 },
-        { 0x071f, KEY_2 },
-        { 0x0720, KEY_3 },
-        { 0x0721, KEY_4 },
-        { 0x0722, KEY_5 },
-        { 0x0723, KEY_6 },
-        { 0x0724, KEY_7 },
-        { 0x0725, KEY_8 },
-        { 0x0726, KEY_9 },
-        { 0x0708, KEY_LEFT },           /* LEFT */
-        { 0x0727, KEY_0 },
-};
-
-static u8 af9015_ir_table_trekstor[] = {
-        0x00, 0xff, 0x86, 0x79, 0x04, 0x07, 0x00,
-        0x00, 0xff, 0x85, 0x7a, 0x05, 0x07, 0x00,
-        0x00, 0xff, 0x87, 0x78, 0x06, 0x07, 0x00,
-        0x00, 0xff, 0x8c, 0x73, 0x07, 0x07, 0x00,
-        0x00, 0xff, 0x89, 0x76, 0x09, 0x07, 0x00,
-        0x00, 0xff, 0x88, 0x77, 0x0a, 0x07, 0x00,
-        0x00, 0xff, 0x8a, 0x75, 0x0b, 0x07, 0x00,
-        0x00, 0xff, 0x9e, 0x61, 0x0c, 0x07, 0x00,
-        0x00, 0xff, 0x8d, 0x72, 0x0d, 0x07, 0x00,
-        0x00, 0xff, 0x8b, 0x74, 0x0e, 0x07, 0x00,
-        0x00, 0xff, 0x9b, 0x64, 0x0f, 0x07, 0x00,
-        0x00, 0xff, 0x9d, 0x62, 0x10, 0x07, 0x00,
-        0x00, 0xff, 0x8e, 0x71, 0x11, 0x07, 0x00,
-        0x00, 0xff, 0x9c, 0x63, 0x12, 0x07, 0x00,
-        0x00, 0xff, 0x8f, 0x70, 0x13, 0x07, 0x00,
-        0x00, 0xff, 0x93, 0x6c, 0x14, 0x07, 0x00,
-        0x00, 0xff, 0x97, 0x68, 0x15, 0x07, 0x00,
-        0x00, 0xff, 0x92, 0x6d, 0x1e, 0x07, 0x00,
-        0x00, 0xff, 0x96, 0x69, 0x1f, 0x07, 0x00,
-        0x00, 0xff, 0x9a, 0x65, 0x20, 0x07, 0x00,
-        0x00, 0xff, 0x91, 0x6e, 0x21, 0x07, 0x00,
-        0x00, 0xff, 0x95, 0x6a, 0x22, 0x07, 0x00,
-        0x00, 0xff, 0x99, 0x66, 0x23, 0x07, 0x00,
-        0x00, 0xff, 0x90, 0x6f, 0x24, 0x07, 0x00,
-        0x00, 0xff, 0x94, 0x6b, 0x25, 0x07, 0x00,
-        0x00, 0xff, 0x98, 0x67, 0x26, 0x07, 0x00,
-        0x00, 0xff, 0x9f, 0x60, 0x08, 0x07, 0x00,
-        0x00, 0xff, 0x84, 0x7b, 0x27, 0x07, 0x00,
-};
-
-/* MSI DIGIVOX mini III */
-static struct ir_scancode ir_codes_af9015_table_msi_digivox_iii[] = {
-        { 0x0713, KEY_POWER },       /* [red power button] */
-        { 0x073b, KEY_VIDEO },       /* Source */
-        { 0x073e, KEY_ZOOM },        /* Zoom */
-        { 0x070b, KEY_POWER2 },      /* ShutDown */
-        { 0x071e, KEY_1 },
-        { 0x071f, KEY_2 },
-        { 0x0720, KEY_3 },
-        { 0x0721, KEY_4 },
-        { 0x0722, KEY_5 },
-        { 0x0723, KEY_6 },
-        { 0x0724, KEY_7 },
-        { 0x0725, KEY_8 },
-        { 0x0726, KEY_9 },
-        { 0x0727, KEY_0 },
-        { 0x0752, KEY_CHANNELUP },   /* CH+ */
-        { 0x0751, KEY_CHANNELDOWN }, /* CH- */
-        { 0x0750, KEY_VOLUMEUP },    /* Vol+ */
-        { 0x074f, KEY_VOLUMEDOWN },  /* Vol- */
-        { 0x0705, KEY_ESC },         /* [back up arrow] */
-        { 0x0708, KEY_OK },          /* [enter arrow] */
-        { 0x073f, KEY_RECORD },      /* Rec */
-        { 0x0716, KEY_STOP },        /* Stop */
-        { 0x072a, KEY_PLAY },        /* Play */
-        { 0x073c, KEY_MUTE },        /* Mute */
-        { 0x0718, KEY_UP },
-        { 0x0707, KEY_DOWN },
-        { 0x070f, KEY_LEFT },
-        { 0x0715, KEY_RIGHT },
-        { 0x0736, KEY_RED },
-        { 0x0737, KEY_GREEN },
-        { 0x072d, KEY_YELLOW },
-        { 0x072e, KEY_BLUE },
-};
-
-static u8 af9015_ir_table_msi_digivox_iii[] = {
-        0x61, 0xd6, 0x43, 0xbc, 0x13, 0x07, 0x00, /* KEY_POWER */
-        0x61, 0xd6, 0x01, 0xfe, 0x3b, 0x07, 0x00, /* KEY_VIDEO */
-        0x61, 0xd6, 0x0b, 0xf4, 0x3e, 0x07, 0x00, /* KEY_ZOOM */
-        0x61, 0xd6, 0x03, 0xfc, 0x0b, 0x07, 0x00, /* KEY_POWER2 */
-        0x61, 0xd6, 0x04, 0xfb, 0x1e, 0x07, 0x00, /* KEY_1 */
-        0x61, 0xd6, 0x08, 0xf7, 0x1f, 0x07, 0x00, /* KEY_2 */
-        0x61, 0xd6, 0x02, 0xfd, 0x20, 0x07, 0x00, /* KEY_3 */
-        0x61, 0xd6, 0x0f, 0xf0, 0x21, 0x07, 0x00, /* KEY_4 */
-        0x61, 0xd6, 0x05, 0xfa, 0x22, 0x07, 0x00, /* KEY_5 */
-        0x61, 0xd6, 0x06, 0xf9, 0x23, 0x07, 0x00, /* KEY_6 */
-        0x61, 0xd6, 0x0c, 0xf3, 0x24, 0x07, 0x00, /* KEY_7 */
-        0x61, 0xd6, 0x0d, 0xf2, 0x25, 0x07, 0x00, /* KEY_8 */
-        0x61, 0xd6, 0x0a, 0xf5, 0x26, 0x07, 0x00, /* KEY_9 */
-        0x61, 0xd6, 0x11, 0xee, 0x27, 0x07, 0x00, /* KEY_0 */
-        0x61, 0xd6, 0x09, 0xf6, 0x52, 0x07, 0x00, /* KEY_CHANNELUP */
-        0x61, 0xd6, 0x07, 0xf8, 0x51, 0x07, 0x00, /* KEY_CHANNELDOWN */
-        0x61, 0xd6, 0x0e, 0xf1, 0x50, 0x07, 0x00, /* KEY_VOLUMEUP */
-        0x61, 0xd6, 0x13, 0xec, 0x4f, 0x07, 0x00, /* KEY_VOLUMEDOWN */
-        0x61, 0xd6, 0x10, 0xef, 0x05, 0x07, 0x00, /* KEY_ESC */
-        0x61, 0xd6, 0x12, 0xed, 0x08, 0x07, 0x00, /* KEY_OK */
-        0x61, 0xd6, 0x14, 0xeb, 0x3f, 0x07, 0x00, /* KEY_RECORD */
-        0x61, 0xd6, 0x15, 0xea, 0x16, 0x07, 0x00, /* KEY_STOP */
-        0x61, 0xd6, 0x16, 0xe9, 0x2a, 0x07, 0x00, /* KEY_PLAY */
-        0x61, 0xd6, 0x17, 0xe8, 0x3c, 0x07, 0x00, /* KEY_MUTE */
-        0x61, 0xd6, 0x18, 0xe7, 0x18, 0x07, 0x00, /* KEY_UP */
-        0x61, 0xd6, 0x19, 0xe6, 0x07, 0x07, 0x00, /* KEY_DOWN */
-        0x61, 0xd6, 0x1a, 0xe5, 0x0f, 0x07, 0x00, /* KEY_LEFT */
-        0x61, 0xd6, 0x1b, 0xe4, 0x15, 0x07, 0x00, /* KEY_RIGHT */
-        0x61, 0xd6, 0x1c, 0xe3, 0x36, 0x07, 0x00, /* KEY_RED */
-        0x61, 0xd6, 0x1d, 0xe2, 0x37, 0x07, 0x00, /* KEY_GREEN */
-        0x61, 0xd6, 0x1e, 0xe1, 0x2d, 0x07, 0x00, /* KEY_YELLOW */
-        0x61, 0xd6, 0x1f, 0xe0, 0x2e, 0x07, 0x00, /* KEY_BLUE */
-};
-
 #endif
diff --git a/drivers/media/dvb/dvb-usb/anysee.c b/drivers/media/dvb/dvb-usb/anysee.c
index 4685259e1614..7c327b54308e 100644
--- a/drivers/media/dvb/dvb-usb/anysee.c
+++ b/drivers/media/dvb/dvb-usb/anysee.c
@@ -36,6 +36,11 @@
 #include "mt352.h"
 #include "mt352_priv.h"
 #include "zl10353.h"
+#include "tda18212.h"
+#include "cx24116.h"
+#include "stv0900.h"
+#include "stv6110.h"
+#include "isl6423.h"
 
 /* debug */
 static int dvb_usb_anysee_debug;
@@ -55,8 +60,6 @@ static int anysee_ctrl_msg(struct dvb_usb_device *d, u8 *sbuf, u8 slen,
         int act_len, ret;
         u8 buf[64];
 
-        if (slen > sizeof(buf))
-                slen = sizeof(buf);
         memcpy(&buf[0], sbuf, slen);
         buf[60] = state->seq++;
 
@@ -105,6 +108,27 @@ static int anysee_write_reg(struct dvb_usb_device *d, u16 reg, u8 val)
         return anysee_ctrl_msg(d, buf, sizeof(buf), NULL, 0);
 }
 
+/* write single register with mask */
+static int anysee_wr_reg_mask(struct dvb_usb_device *d, u16 reg, u8 val,
+        u8 mask)
+{
+        int ret;
+        u8 tmp;
+
+        /* no need for read if whole reg is written */
+        if (mask != 0xff) {
+                ret = anysee_read_reg(d, reg, &tmp);
+                if (ret)
+                        return ret;
+
+                val &= mask;
+                tmp &= ~mask;
+                val |= tmp;
+        }
+
+        return anysee_write_reg(d, reg, val);
+}
+
 static int anysee_get_hw_info(struct dvb_usb_device *d, u8 *id)
 {
         u8 buf[] = {CMD_GET_HW_INFO};
@@ -154,30 +178,37 @@ static int anysee_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msg,
 {
         struct dvb_usb_device *d = i2c_get_adapdata(adap);
         int ret = 0, inc, i = 0;
+        u8 buf[52]; /* 4 + 48 (I2C WR USB command header + I2C WR max) */
 
         if (mutex_lock_interruptible(&d->i2c_mutex) < 0)
                 return -EAGAIN;
 
         while (i < num) {
                 if (num > i + 1 && (msg[i+1].flags & I2C_M_RD)) {
-                        u8 buf[6];
+                        if (msg[i].len > 2 || msg[i+1].len > 60) {
+                                ret = -EOPNOTSUPP;
+                                break;
+                        }
                         buf[0] = CMD_I2C_READ;
-                        buf[1] = msg[i].addr + 1;
+                        buf[1] = (msg[i].addr << 1) | 0x01;
                         buf[2] = msg[i].buf[0];
-                        buf[3] = 0x00;
-                        buf[4] = 0x00;
-                        buf[5] = 0x01;
-                        ret = anysee_ctrl_msg(d, buf, sizeof(buf), msg[i+1].buf,
+                        buf[3] = msg[i].buf[1];
+                        buf[4] = msg[i].len-1;
+                        buf[5] = msg[i+1].len;
+                        ret = anysee_ctrl_msg(d, buf, 6, msg[i+1].buf,
                                 msg[i+1].len);
                         inc = 2;
                 } else {
-                        u8 buf[4+msg[i].len];
+                        if (msg[i].len > 48) {
+                                ret = -EOPNOTSUPP;
+                                break;
+                        }
                         buf[0] = CMD_I2C_WRITE;
-                        buf[1] = msg[i].addr;
+                        buf[1] = (msg[i].addr << 1);
                         buf[2] = msg[i].len;
                         buf[3] = 0x01;
                         memcpy(&buf[4], msg[i].buf, msg[i].len);
-                        ret = anysee_ctrl_msg(d, buf, sizeof(buf), NULL, 0);
+                        ret = anysee_ctrl_msg(d, buf, 4 + msg[i].len, NULL, 0);
                         inc = 1;
                 }
                 if (ret)
@@ -224,7 +255,7 @@ static int anysee_mt352_demod_init(struct dvb_frontend *fe)
 
 /* Callbacks for DVB USB */
 static struct tda10023_config anysee_tda10023_config = {
-        .demod_address = 0x1a,
+        .demod_address = (0x1a >> 1),
         .invert = 0,
         .xtal   = 16000000,
         .pll_m  = 11,
@@ -235,217 +266,567 @@ static struct tda10023_config anysee_tda10023_config = {
 };
 
 static struct mt352_config anysee_mt352_config = {
-        .demod_address = 0x1e,
+        .demod_address = (0x1e >> 1),
         .demod_init    = anysee_mt352_demod_init,
 };
 
 static struct zl10353_config anysee_zl10353_config = {
-        .demod_address = 0x1e,
+        .demod_address = (0x1e >> 1),
         .parallel_ts = 1,
 };
 
+static struct zl10353_config anysee_zl10353_tda18212_config2 = {
+        .demod_address = (0x1e >> 1),
+        .parallel_ts = 1,
+        .disable_i2c_gate_ctrl = 1,
+        .no_tuner = 1,
+        .if2 = 41500,
+};
+
+static struct zl10353_config anysee_zl10353_tda18212_config = {
+        .demod_address = (0x18 >> 1),
+        .parallel_ts = 1,
+        .disable_i2c_gate_ctrl = 1,
+        .no_tuner = 1,
+        .if2 = 41500,
+};
+
+static struct tda10023_config anysee_tda10023_tda18212_config = {
+        .demod_address = (0x1a >> 1),
+        .xtal   = 16000000,
+        .pll_m  = 12,
+        .pll_p  = 3,
+        .pll_n  = 1,
+        .output_mode = TDA10023_OUTPUT_MODE_PARALLEL_C,
+        .deltaf = 0xba02,
+};
+
+static struct tda18212_config anysee_tda18212_config = {
+        .i2c_address = (0xc0 >> 1),
+        .if_dvbt_6 = 4150,
+        .if_dvbt_7 = 4150,
+        .if_dvbt_8 = 4150,
+        .if_dvbc = 5000,
+};
+
+static struct cx24116_config anysee_cx24116_config = {
+        .demod_address = (0xaa >> 1),
+        .mpg_clk_pos_pol = 0x00,
+        .i2c_wr_max = 48,
+};
+
+static struct stv0900_config anysee_stv0900_config = {
+        .demod_address = (0xd0 >> 1),
+        .demod_mode = 0,
+        .xtal = 8000000,
+        .clkmode = 3,
+        .diseqc_mode = 2,
+        .tun1_maddress = 0,
+        .tun1_adc = 1, /* 1 Vpp */
+        .path1_mode = 3,
+};
+
+static struct stv6110_config anysee_stv6110_config = {
+        .i2c_address = (0xc0 >> 1),
+        .mclk = 16000000,
+        .clk_div = 1,
+};
+
+static struct isl6423_config anysee_isl6423_config = {
+        .current_max = SEC_CURRENT_800m,
+        .curlim  = SEC_CURRENT_LIM_OFF,
+        .mod_extern = 1,
+        .addr = (0x10 >> 1),
+};
+
+/*
+ * New USB device strings: Mfr=1, Product=2, SerialNumber=0
+ * Manufacturer: AMT.CO.KR
+ *
+ * E30 VID=04b4 PID=861f HW=2 FW=2.1 Product=????????
+ * PCB: ?
+ * parts: DNOS404ZH102A(MT352, DTT7579(?))
+ *
+ * E30 VID=04b4 PID=861f HW=2 FW=2.1 Product=????????
+ * PCB: ?
+ * parts: DNOS404ZH103A(ZL10353, DTT7579(?))
+ *
+ * E30 Plus VID=04b4 PID=861f HW=6 FW=1.0 "anysee"
+ * PCB: 507CD (rev1.1)
+ * parts: DNOS404ZH103A(ZL10353, DTT7579(?)), CST56I01
+ * OEA=80 OEB=00 OEC=00 OED=ff OEF=fe
+ * IOA=4f IOB=ff IOC=00 IOD=06 IOF=01
+ * IOD[0] ZL10353 1=enabled
+ * IOA[7] TS 0=enabled
+ * tuner is not behind ZL10353 I2C-gate (no care if gate disabled or not)
+ *
+ * E30 C Plus VID=04b4 PID=861f HW=10 FW=1.0 "anysee-DC(LP)"
+ * PCB: 507DC (rev0.2)
+ * parts: TDA10023, DTOS403IH102B TM, CST56I01
+ * OEA=80 OEB=00 OEC=00 OED=ff OEF=fe
+ * IOA=4f IOB=ff IOC=00 IOD=26 IOF=01
+ * IOD[0] TDA10023 1=enabled
+ *
+ * E30 S2 Plus VID=04b4 PID=861f HW=11 FW=0.1 "anysee-S2(LP)"
+ * PCB: 507SI (rev2.1)
+ * parts: BS2N10WCC01(CX24116, CX24118), ISL6423, TDA8024
+ * OEA=80 OEB=00 OEC=ff OED=ff OEF=fe
+ * IOA=4d IOB=ff IOC=00 IOD=26 IOF=01
+ * IOD[0] CX24116 1=enabled
+ *
+ * E30 C Plus VID=1c73 PID=861f HW=15 FW=1.2 "anysee-FA(LP)"
+ * PCB: 507FA (rev0.4)
+ * parts: TDA10023, DTOS403IH102B TM, TDA8024
+ * OEA=80 OEB=00 OEC=ff OED=ff OEF=ff
+ * IOA=4d IOB=ff IOC=00 IOD=00 IOF=c0
+ * IOD[5] TDA10023 1=enabled
+ * IOE[0] tuner 1=enabled
+ *
+ * E30 Combo Plus VID=1c73 PID=861f HW=15 FW=1.2 "anysee-FA(LP)"
+ * PCB: 507FA (rev1.1)
+ * parts: ZL10353, TDA10023, DTOS403IH102B TM, TDA8024
+ * OEA=80 OEB=00 OEC=ff OED=ff OEF=ff
+ * IOA=4d IOB=ff IOC=00 IOD=00 IOF=c0
+ * DVB-C:
+ * IOD[5] TDA10023 1=enabled
+ * IOE[0] tuner 1=enabled
+ * DVB-T:
+ * IOD[0] ZL10353 1=enabled
+ * IOE[0] tuner 0=enabled
+ * tuner is behind ZL10353 I2C-gate
+ *
+ * E7 TC VID=1c73 PID=861f HW=18 FW=0.7 AMTCI=0.5 "anysee-E7TC(LP)"
+ * PCB: 508TC (rev0.6)
+ * parts: ZL10353, TDA10023, DNOD44CDH086A(TDA18212)
+ * OEA=80 OEB=00 OEC=03 OED=f7 OEF=ff
+ * IOA=4d IOB=00 IOC=cc IOD=48 IOF=e4
+ * IOA[7] TS 1=enabled
+ * IOE[4] TDA18212 1=enabled
+ * DVB-C:
+ * IOD[6] ZL10353 0=disabled
+ * IOD[5] TDA10023 1=enabled
+ * IOE[0] IF 1=enabled
+ * DVB-T:
+ * IOD[5] TDA10023 0=disabled
+ * IOD[6] ZL10353 1=enabled
+ * IOE[0] IF 0=enabled
+ *
+ * E7 S2 VID=1c73 PID=861f HW=19 FW=0.4 AMTCI=0.5 "anysee-E7S2(LP)"
+ * PCB: 508S2 (rev0.7)
+ * parts: DNBU10512IST(STV0903, STV6110), ISL6423
+ * OEA=80 OEB=00 OEC=03 OED=f7 OEF=ff
+ * IOA=4d IOB=00 IOC=c4 IOD=08 IOF=e4
+ * IOA[7] TS 1=enabled
+ * IOE[5] STV0903 1=enabled
+ *
+ */
+
 static int anysee_frontend_attach(struct dvb_usb_adapter *adap)
 {
         int ret;
         struct anysee_state *state = adap->dev->priv;
         u8 hw_info[3];
-        u8 io_d; /* IO port D */
+        u8 tmp;
+        struct i2c_msg msg[2] = {
+                {
+                        .addr = anysee_tda18212_config.i2c_address,
+                        .flags = 0,
+                        .len = 1,
+                        .buf = "\x00",
+                }, {
+                        .addr = anysee_tda18212_config.i2c_address,
+                        .flags = I2C_M_RD,
+                        .len = 1,
+                        .buf = &tmp,
+                }
+        };
 
-        /* check which hardware we have
-           We must do this call two times to get reliable values (hw bug). */
+        /* Check which hardware we have.
+         * We must do this call two times to get reliable values (hw bug).
+         */
         ret = anysee_get_hw_info(adap->dev, hw_info);
         if (ret)
-                return ret;
+                goto error;
+
         ret = anysee_get_hw_info(adap->dev, hw_info);
         if (ret)
-                return ret;
+                goto error;
 
         /* Meaning of these info bytes are guessed. */
-        info("firmware version:%d.%d.%d hardware id:%d",
-                0, hw_info[1], hw_info[2], hw_info[0]);
+        info("firmware version:%d.%d hardware id:%d",
+                hw_info[1], hw_info[2], hw_info[0]);
 
-        ret = anysee_read_reg(adap->dev, 0xb0, &io_d); /* IO port D */
-        if (ret)
-                return ret;
-        deb_info("%s: IO port D:%02x\n", __func__, io_d);
-
-        /* Select demod using trial and error method. */
-
-        /* Try to attach demodulator in following order:
-              model      demod     hw  firmware
-           1. E30        MT352     02  0.2.1
-           2. E30        ZL10353   02  0.2.1
-           3. E30 Combo  ZL10353   0f  0.1.2    DVB-T/C combo
-           4. E30 Plus   ZL10353   06  0.1.0
-           5. E30C Plus  TDA10023  0a  0.1.0    rev 0.2
-              E30C Plus  TDA10023  0f  0.1.2    rev 0.4
-              E30 Combo  TDA10023  0f  0.1.2    DVB-T/C combo
-        */
-
-        /* Zarlink MT352 DVB-T demod inside of Samsung DNOS404ZH102A NIM */
-        adap->fe = dvb_attach(mt352_attach, &anysee_mt352_config,
-                              &adap->dev->i2c_adap);
-        if (adap->fe != NULL) {
-                state->tuner = DVB_PLL_THOMSON_DTT7579;
-                return 0;
-        }
+        state->hw = hw_info[0];
 
-        /* Zarlink ZL10353 DVB-T demod inside of Samsung DNOS404ZH103A NIM */
-        adap->fe = dvb_attach(zl10353_attach, &anysee_zl10353_config,
-                              &adap->dev->i2c_adap);
-        if (adap->fe != NULL) {
-                state->tuner = DVB_PLL_THOMSON_DTT7579;
-                return 0;
-        }
+        switch (state->hw) {
+        case ANYSEE_HW_02: /* 2 */
+                /* E30 */
 
-        /* for E30 Combo Plus DVB-T demodulator */
-        if (dvb_usb_anysee_delsys) {
-                ret = anysee_write_reg(adap->dev, 0xb0, 0x01);
+                /* attach demod */
+                adap->fe = dvb_attach(mt352_attach, &anysee_mt352_config,
+                        &adap->dev->i2c_adap);
+                if (adap->fe)
+                        break;
+
+                /* attach demod */
+                adap->fe = dvb_attach(zl10353_attach, &anysee_zl10353_config,
+                        &adap->dev->i2c_adap);
+
+                break;
+        case ANYSEE_HW_507CD: /* 6 */
+                /* E30 Plus */
+
+                /* enable DVB-T demod on IOD[0] */
+                ret = anysee_wr_reg_mask(adap->dev, REG_IOD, (1 << 0), 0x01);
                 if (ret)
-                        return ret;
+                        goto error;
+
+                /* enable transport stream on IOA[7] */
+                ret = anysee_wr_reg_mask(adap->dev, REG_IOA, (0 << 7), 0x80);
+                if (ret)
+                        goto error;
 
-                /* Zarlink ZL10353 DVB-T demod */
+                /* attach demod */
                 adap->fe = dvb_attach(zl10353_attach, &anysee_zl10353_config,
-                                      &adap->dev->i2c_adap);
-                if (adap->fe != NULL) {
-                        state->tuner = DVB_PLL_SAMSUNG_DTOS403IH102A;
-                        return 0;
+                        &adap->dev->i2c_adap);
+
+                break;
+        case ANYSEE_HW_507DC: /* 10 */
+                /* E30 C Plus */
+
+                /* enable DVB-C demod on IOD[0] */
+                ret = anysee_wr_reg_mask(adap->dev, REG_IOD, (1 << 0), 0x01);
+                if (ret)
+                        goto error;
+
+                /* attach demod */
+                adap->fe = dvb_attach(tda10023_attach, &anysee_tda10023_config,
+                        &adap->dev->i2c_adap, 0x48);
+
+                break;
+        case ANYSEE_HW_507SI: /* 11 */
+                /* E30 S2 Plus */
+
+                /* enable DVB-S/S2 demod on IOD[0] */
+                ret = anysee_wr_reg_mask(adap->dev, REG_IOD, (1 << 0), 0x01);
+                if (ret)
+                        goto error;
+
+                /* attach demod */
+                adap->fe = dvb_attach(cx24116_attach, &anysee_cx24116_config,
+                        &adap->dev->i2c_adap);
+
+                break;
+        case ANYSEE_HW_507FA: /* 15 */
+                /* E30 Combo Plus */
+                /* E30 C Plus */
+
+                /* enable tuner on IOE[4] */
+                ret = anysee_wr_reg_mask(adap->dev, REG_IOE, (1 << 4), 0x10);
+                if (ret)
+                        goto error;
+
+                /* probe TDA18212 */
+                tmp = 0;
+                ret = i2c_transfer(&adap->dev->i2c_adap, msg, 2);
+                if (ret == 2 && tmp == 0xc7)
+                        deb_info("%s: TDA18212 found\n", __func__);
+                else
+                        tmp = 0;
+
+                /* disable tuner on IOE[4] */
+                ret = anysee_wr_reg_mask(adap->dev, REG_IOE, (0 << 4), 0x10);
+                if (ret)
+                        goto error;
+
+                if (dvb_usb_anysee_delsys) {
+                        /* disable DVB-C demod on IOD[5] */
+                        ret = anysee_wr_reg_mask(adap->dev, REG_IOD, (0 << 5),
+                                0x20);
+                        if (ret)
+                                goto error;
+
+                        /* enable DVB-T demod on IOD[0] */
+                        ret = anysee_wr_reg_mask(adap->dev, REG_IOD, (1 << 0),
+                                0x01);
+                        if (ret)
+                                goto error;
+
+                        /* attach demod */
+                        if (tmp == 0xc7) {
+                                /* TDA18212 config */
+                                adap->fe = dvb_attach(zl10353_attach,
+                                        &anysee_zl10353_tda18212_config2,
+                                        &adap->dev->i2c_adap);
+                        } else {
+                                /* PLL config */
+                                adap->fe = dvb_attach(zl10353_attach,
+                                        &anysee_zl10353_config,
+                                        &adap->dev->i2c_adap);
+                        }
+                } else {
+                        /* disable DVB-T demod on IOD[0] */
+                        ret = anysee_wr_reg_mask(adap->dev, REG_IOD, (0 << 0),
+                                0x01);
+                        if (ret)
+                                goto error;
+
+                        /* enable DVB-C demod on IOD[5] */
+                        ret = anysee_wr_reg_mask(adap->dev, REG_IOD, (1 << 5),
+                                0x20);
+                        if (ret)
+                                goto error;
+
+                        /* attach demod */
+                        if (tmp == 0xc7) {
+                                /* TDA18212 config */
+                                adap->fe = dvb_attach(tda10023_attach,
+                                        &anysee_tda10023_tda18212_config,
+                                        &adap->dev->i2c_adap, 0x48);
+                        } else {
+                                /* PLL config */
+                                adap->fe = dvb_attach(tda10023_attach,
+                                        &anysee_tda10023_config,
+                                        &adap->dev->i2c_adap, 0x48);
+                        }
                 }
-        }
 
-        /* connect demod on IO port D for TDA10023 & ZL10353 */
-        ret = anysee_write_reg(adap->dev, 0xb0, 0x25);
-        if (ret)
-                return ret;
+                break;
+        case ANYSEE_HW_508TC: /* 18 */
+                /* E7 TC */
 
-        /* Zarlink ZL10353 DVB-T demod inside of Samsung DNOS404ZH103A NIM */
-        adap->fe = dvb_attach(zl10353_attach, &anysee_zl10353_config,
-                              &adap->dev->i2c_adap);
-        if (adap->fe != NULL) {
-                state->tuner = DVB_PLL_THOMSON_DTT7579;
-                return 0;
-        }
+                /* enable transport stream on IOA[7] */
+                ret = anysee_wr_reg_mask(adap->dev, REG_IOA, (1 << 7), 0x80);
+                if (ret)
+                        goto error;
+
+                if (dvb_usb_anysee_delsys) {
+                        /* disable DVB-C demod on IOD[5] */
+                        ret = anysee_wr_reg_mask(adap->dev, REG_IOD, (0 << 5),
+                                0x20);
+                        if (ret)
+                                goto error;
+
+                        /* enable DVB-T demod on IOD[6] */
+                        ret = anysee_wr_reg_mask(adap->dev, REG_IOD, (1 << 6),
+                                0x40);
+                        if (ret)
+                                goto error;
+
+                        /* enable IF route on IOE[0] */
+                        ret = anysee_wr_reg_mask(adap->dev, REG_IOE, (0 << 0),
+                                0x01);
+                        if (ret)
+                                goto error;
+
+                        /* attach demod */
+                        adap->fe = dvb_attach(zl10353_attach,
+                                &anysee_zl10353_tda18212_config,
+                                &adap->dev->i2c_adap);
+                } else {
+                        /* disable DVB-T demod on IOD[6] */
+                        ret = anysee_wr_reg_mask(adap->dev, REG_IOD, (0 << 6),
+                                0x40);
+                        if (ret)
+                                goto error;
+
+                        /* enable DVB-C demod on IOD[5] */
+                        ret = anysee_wr_reg_mask(adap->dev, REG_IOD, (1 << 5),
+                                0x20);
+                        if (ret)
+                                goto error;
+
+                        /* enable IF route on IOE[0] */
+                        ret = anysee_wr_reg_mask(adap->dev, REG_IOE, (1 << 0),
+                                0x01);
+                        if (ret)
+                                goto error;
+
+                        /* attach demod */
+                        adap->fe = dvb_attach(tda10023_attach,
+                                &anysee_tda10023_tda18212_config,
+                                &adap->dev->i2c_adap, 0x48);
+                }
 
-        /* IO port E - E30C rev 0.4 board requires this */
-        ret = anysee_write_reg(adap->dev, 0xb1, 0xa7);
-        if (ret)
-                return ret;
+                break;
+        case ANYSEE_HW_508S2: /* 19 */
+                /* E7 S2 */
 
-        /* Philips TDA10023 DVB-C demod */
-        adap->fe = dvb_attach(tda10023_attach, &anysee_tda10023_config,
-                              &adap->dev->i2c_adap, 0x48);
-        if (adap->fe != NULL) {
-                state->tuner = DVB_PLL_SAMSUNG_DTOS403IH102A;
-                return 0;
-        }
+                /* enable transport stream on IOA[7] */
+                ret = anysee_wr_reg_mask(adap->dev, REG_IOA, (1 << 7), 0x80);
+                if (ret)
+                        goto error;
 
-        /* return IO port D to init value for safe */
-        ret = anysee_write_reg(adap->dev, 0xb0, io_d);
-        if (ret)
-                return ret;
+                /* enable DVB-S/S2 demod on IOE[5] */
+                ret = anysee_wr_reg_mask(adap->dev, REG_IOE, (1 << 5), 0x20);
+                if (ret)
+                        goto error;
 
-        err("Unknown Anysee version: %02x %02x %02x. "\
-            "Please report the <linux-dvb@linuxtv.org>.",
-            hw_info[0], hw_info[1], hw_info[2]);
+                /* attach demod */
+                adap->fe = dvb_attach(stv0900_attach, &anysee_stv0900_config,
+                        &adap->dev->i2c_adap, 0);
 
-        return -ENODEV;
+                break;
+        }
+
+        if (!adap->fe) {
+                /* we have no frontend :-( */
+                ret = -ENODEV;
+                err("Unsupported Anysee version. " \
+                        "Please report the <linux-media@vger.kernel.org>.");
+        }
+error:
+        return ret;
 }
 
 static int anysee_tuner_attach(struct dvb_usb_adapter *adap)
 {
         struct anysee_state *state = adap->dev->priv;
-        deb_info("%s: \n", __func__);
-
-        switch (state->tuner) {
-        case DVB_PLL_THOMSON_DTT7579:
-                /* Thomson dtt7579 (not sure) PLL inside of:
-                   Samsung DNOS404ZH102A NIM
-                   Samsung DNOS404ZH103A NIM */
-                dvb_attach(dvb_pll_attach, adap->fe, 0x61,
-                           NULL, DVB_PLL_THOMSON_DTT7579);
+        struct dvb_frontend *fe;
+        int ret;
+        deb_info("%s:\n", __func__);
+
+        switch (state->hw) {
+        case ANYSEE_HW_02: /* 2 */
+                /* E30 */
+
+                /* attach tuner */
+                fe = dvb_attach(dvb_pll_attach, adap->fe, (0xc2 >> 1),
+                        NULL, DVB_PLL_THOMSON_DTT7579);
+
+                break;
+        case ANYSEE_HW_507CD: /* 6 */
+                /* E30 Plus */
+
+                /* attach tuner */
+                fe = dvb_attach(dvb_pll_attach, adap->fe, (0xc2 >> 1),
+                        &adap->dev->i2c_adap, DVB_PLL_THOMSON_DTT7579);
+
+                break;
+        case ANYSEE_HW_507DC: /* 10 */
+                /* E30 C Plus */
+
+                /* attach tuner */
+                fe = dvb_attach(dvb_pll_attach, adap->fe, (0xc0 >> 1),
+                        &adap->dev->i2c_adap, DVB_PLL_SAMSUNG_DTOS403IH102A);
+
+                break;
+        case ANYSEE_HW_507SI: /* 11 */
+                /* E30 S2 Plus */
+
+                /* attach LNB controller */
+                fe = dvb_attach(isl6423_attach, adap->fe, &adap->dev->i2c_adap,
+                        &anysee_isl6423_config);
+
+                break;
+        case ANYSEE_HW_507FA: /* 15 */
+                /* E30 Combo Plus */
+                /* E30 C Plus */
+
+                if (dvb_usb_anysee_delsys) {
+                        /* enable DVB-T tuner on IOE[0] */
+                        ret = anysee_wr_reg_mask(adap->dev, REG_IOE, (0 << 0),
+                                0x01);
+                        if (ret)
+                                goto error;
+                } else {
+                        /* enable DVB-C tuner on IOE[0] */
+                        ret = anysee_wr_reg_mask(adap->dev, REG_IOE, (1 << 0),
+                                0x01);
+                        if (ret)
+                                goto error;
+                }
+
+                /* Try first attach TDA18212 silicon tuner on IOE[4], if that
+                 * fails attach old simple PLL. */
+
+                /* enable tuner on IOE[4] */
+                ret = anysee_wr_reg_mask(adap->dev, REG_IOE, (1 << 4), 0x10);
+                if (ret)
+                        goto error;
+
+                /* attach tuner */
+                fe = dvb_attach(tda18212_attach, adap->fe, &adap->dev->i2c_adap,
+                        &anysee_tda18212_config);
+                if (fe)
+                        break;
+
+                /* disable tuner on IOE[4] */
+                ret = anysee_wr_reg_mask(adap->dev, REG_IOE, (0 << 4), 0x10);
+                if (ret)
+                        goto error;
+
+                /* attach tuner */
+                fe = dvb_attach(dvb_pll_attach, adap->fe, (0xc0 >> 1),
+                        &adap->dev->i2c_adap, DVB_PLL_SAMSUNG_DTOS403IH102A);
+
+                break;
+        case ANYSEE_HW_508TC: /* 18 */
+                /* E7 TC */
+
+                /* enable tuner on IOE[4] */
+                ret = anysee_wr_reg_mask(adap->dev, REG_IOE, (1 << 4), 0x10);
+                if (ret)
+                        goto error;
+
+                /* attach tuner */
+                fe = dvb_attach(tda18212_attach, adap->fe, &adap->dev->i2c_adap,
+                        &anysee_tda18212_config);
+
                 break;
-        case DVB_PLL_SAMSUNG_DTOS403IH102A:
-                /* Unknown PLL inside of Samsung DTOS403IH102A tuner module */
-                dvb_attach(dvb_pll_attach, adap->fe, 0xc0,
-                           &adap->dev->i2c_adap, DVB_PLL_SAMSUNG_DTOS403IH102A);
+        case ANYSEE_HW_508S2: /* 19 */
+                /* E7 S2 */
+
+                /* attach tuner */
+                fe = dvb_attach(stv6110_attach, adap->fe,
+                        &anysee_stv6110_config, &adap->dev->i2c_adap);
+
+                if (fe) {
+                        /* attach LNB controller */
+                        fe = dvb_attach(isl6423_attach, adap->fe,
+                                &adap->dev->i2c_adap, &anysee_isl6423_config);
+                }
+
                 break;
+        default:
+                fe = NULL;
         }
 
-        return 0;
+        if (fe)
+                ret = 0;
+        else
+                ret = -ENODEV;
+
+error:
+        return ret;
 }
 
-static int anysee_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
+static int anysee_rc_query(struct dvb_usb_device *d)
 {
         u8 buf[] = {CMD_GET_IR_CODE};
-        struct ir_scancode *keymap = d->props.rc.legacy.rc_key_map;
         u8 ircode[2];
-        int i, ret;
+        int ret;
 
-        ret = anysee_ctrl_msg(d, buf, sizeof(buf), &ircode[0], 2);
+        /* Remote controller is basic NEC using address byte 0x08.
+           Anysee device RC query returns only two bytes, status and code,
+           address byte is dropped. Also it does not return any value for
+           NEC RCs having address byte other than 0x08. Due to that, we
+           cannot use that device as standard NEC receiver.
+           It could be possible make hack which reads whole code directly
+           from device memory... */
+
+        ret = anysee_ctrl_msg(d, buf, sizeof(buf), ircode, sizeof(ircode));
         if (ret)
                 return ret;
 
-        *event = 0;
-        *state = REMOTE_NO_KEY_PRESSED;
-
-        for (i = 0; i < d->props.rc.legacy.rc_key_map_size; i++) {
-                if (rc5_custom(&keymap[i]) == ircode[0] &&
-                    rc5_data(&keymap[i]) == ircode[1]) {
-                        *event = keymap[i].keycode;
-                        *state = REMOTE_KEY_PRESSED;
-                        return 0;
-                }
+        if (ircode[0]) {
+                deb_rc("%s: key pressed %02x\n", __func__, ircode[1]);
+                rc_keydown(d->rc_dev, 0x08 << 8 | ircode[1], 0);
         }
+
         return 0;
 }
 
-static struct ir_scancode ir_codes_anysee_table[] = {
-        { 0x0100, KEY_0 },
-        { 0x0101, KEY_1 },
-        { 0x0102, KEY_2 },
-        { 0x0103, KEY_3 },
-        { 0x0104, KEY_4 },
-        { 0x0105, KEY_5 },
-        { 0x0106, KEY_6 },
-        { 0x0107, KEY_7 },
-        { 0x0108, KEY_8 },
-        { 0x0109, KEY_9 },
-        { 0x010a, KEY_POWER },
-        { 0x010b, KEY_DOCUMENTS },    /* * */
-        { 0x0119, KEY_FAVORITES },
-        { 0x0120, KEY_SLEEP },
-        { 0x0121, KEY_MODE },         /* 4:3 / 16:9 select */
-        { 0x0122, KEY_ZOOM },
-        { 0x0147, KEY_TEXT },
-        { 0x0116, KEY_TV },           /* TV / radio select */
-        { 0x011e, KEY_LANGUAGE },     /* Second Audio Program */
-        { 0x011a, KEY_SUBTITLE },
-        { 0x011b, KEY_CAMERA },       /* screenshot */
-        { 0x0142, KEY_MUTE },
-        { 0x010e, KEY_MENU },
-        { 0x010f, KEY_EPG },
-        { 0x0117, KEY_INFO },
-        { 0x0110, KEY_EXIT },
-        { 0x0113, KEY_VOLUMEUP },
-        { 0x0112, KEY_VOLUMEDOWN },
-        { 0x0111, KEY_CHANNELUP },
-        { 0x0114, KEY_CHANNELDOWN },
-        { 0x0115, KEY_OK },
-        { 0x011d, KEY_RED },
-        { 0x011f, KEY_GREEN },
-        { 0x011c, KEY_YELLOW },
-        { 0x0144, KEY_BLUE },
-        { 0x010c, KEY_SHUFFLE },      /* snapshot */
-        { 0x0148, KEY_STOP },
-        { 0x0150, KEY_PLAY },
-        { 0x0151, KEY_PAUSE },
-        { 0x0149, KEY_RECORD },
-        { 0x0118, KEY_PREVIOUS },     /* |<< */
-        { 0x010d, KEY_NEXT },         /* >>| */
-        { 0x0124, KEY_PROG1 },        /* F1 */
-        { 0x0125, KEY_PROG2 },        /* F2 */
-};
-
 /* DVB USB Driver stuff */
 static struct dvb_usb_device_properties anysee_properties;
 
@@ -520,11 +901,12 @@ static struct dvb_usb_device_properties anysee_properties = {
                 }
         },
 
-        .rc.legacy = {
-                .rc_key_map       = ir_codes_anysee_table,
-                .rc_key_map_size  = ARRAY_SIZE(ir_codes_anysee_table),
+        .rc.core = {
+                .rc_codes         = RC_MAP_ANYSEE,
+                .protocol         = RC_TYPE_OTHER,
+                .module_name      = "anysee",
                 .rc_query         = anysee_rc_query,
-                .rc_interval      = 200,  /* windows driver uses 500ms */
+                .rc_interval      = 250,  /* windows driver uses 500ms */
         },
 
         .i2c_algo         = &anysee_i2c_algo,
diff --git a/drivers/media/dvb/dvb-usb/anysee.h b/drivers/media/dvb/dvb-usb/anysee.h
index 7ca01ff6e13c..a7673aa1e007 100644
--- a/drivers/media/dvb/dvb-usb/anysee.h
+++ b/drivers/media/dvb/dvb-usb/anysee.h
@@ -57,10 +57,29 @@ enum cmd {
 };
 
 struct anysee_state {
-        u8 tuner;
+        u8 hw; /* PCB ID */
         u8 seq;
 };
 
+#define ANYSEE_HW_02     2 /* E30 */
+#define ANYSEE_HW_507CD  6 /* E30 Plus */
+#define ANYSEE_HW_507DC 10 /* E30 C Plus */
+#define ANYSEE_HW_507SI 11 /* E30 S2 Plus */
+#define ANYSEE_HW_507FA 15 /* E30 Combo Plus / E30 C Plus */
+#define ANYSEE_HW_508TC 18 /* E7 TC */
+#define ANYSEE_HW_508S2 19 /* E7 S2 */
+
+#define REG_IOA       0x80 /* Port A (bit addressable) */
+#define REG_IOB       0x90 /* Port B (bit addressable) */
+#define REG_IOC       0xa0 /* Port C (bit addressable) */
+#define REG_IOD       0xb0 /* Port D (bit addressable) */
+#define REG_IOE       0xb1 /* Port E (NOT bit addressable) */
+#define REG_OEA       0xb2 /* Port A Output Enable */
+#define REG_OEB       0xb3 /* Port B Output Enable */
+#define REG_OEC       0xb4 /* Port C Output Enable */
+#define REG_OED       0xb5 /* Port D Output Enable */
+#define REG_OEE       0xb6 /* Port E Output Enable */
+
 #endif
 
 /***************************************************************************
@@ -136,7 +155,7 @@ General reply packet(s) are always used if not own reply defined.
 ----------------------------------------------------------------------------
 |    04 | 0x00
 ----------------------------------------------------------------------------
-|    05 | 0x01
+|    05 | data length
 ----------------------------------------------------------------------------
 | 06-59 | don't care
 ----------------------------------------------------------------------------
diff --git a/drivers/media/dvb/dvb-usb/au6610.c b/drivers/media/dvb/dvb-usb/au6610.c
index eb34cc3894e0..2351077ff2b3 100644
--- a/drivers/media/dvb/dvb-usb/au6610.c
+++ b/drivers/media/dvb/dvb-usb/au6610.c
@@ -33,8 +33,16 @@ static int au6610_usb_msg(struct dvb_usb_device *d, u8 operation, u8 addr,
 {
         int ret;
         u16 index;
-        u8 usb_buf[6]; /* enough for all known requests,
-                          read returns 5 and write 6 bytes */
+        u8 *usb_buf;
+
+        /*
+         * allocate enough for all known requests,
+         * read returns 5 and write 6 bytes
+         */
+        usb_buf = kmalloc(6, GFP_KERNEL);
+        if (!usb_buf)
+                return -ENOMEM;
+
         switch (wlen) {
         case 1:
                 index = wbuf[0] << 8;
@@ -45,14 +53,15 @@ static int au6610_usb_msg(struct dvb_usb_device *d, u8 operation, u8 addr,
                 break;
         default:
                 warn("wlen = %x, aborting.", wlen);
-                return -EINVAL;
+                ret = -EINVAL;
+                goto error;
         }
 
         ret = usb_control_msg(d->udev, usb_rcvctrlpipe(d->udev, 0), operation,
                               USB_TYPE_VENDOR|USB_DIR_IN, addr << 1, index,
-                              usb_buf, sizeof(usb_buf), AU6610_USB_TIMEOUT);
+                              usb_buf, 6, AU6610_USB_TIMEOUT);
         if (ret < 0)
-                return ret;
+                goto error;
 
         switch (operation) {
         case AU6610_REQ_I2C_READ:
@@ -60,7 +69,8 @@ static int au6610_usb_msg(struct dvb_usb_device *d, u8 operation, u8 addr,
                 /* requested value is always 5th byte in buffer */
                 rbuf[0] = usb_buf[4];
         }
-
+error:
+        kfree(usb_buf);
         return ret;
 }
 
diff --git a/drivers/media/dvb/dvb-usb/az6027.c b/drivers/media/dvb/dvb-usb/az6027.c
index 62c58288469f..57e2444d51ab 100644
--- a/drivers/media/dvb/dvb-usb/az6027.c
+++ b/drivers/media/dvb/dvb-usb/az6027.c
@@ -386,7 +386,7 @@ static int az6027_streaming_ctrl(struct dvb_usb_adapter *adap, int onoff)
 }
 
 /* keys for the enclosed remote control */
-static struct ir_scancode ir_codes_az6027_table[] = {
+static struct rc_map_table rc_map_az6027_table[] = {
         { 0x01, KEY_1 },
         { 0x02, KEY_2 },
 };
@@ -1089,6 +1089,7 @@ static struct usb_device_id az6027_usb_table[] = {
         { USB_DEVICE(USB_VID_TERRATEC,  USB_PID_TERRATEC_DVBS2CI_V2) },
         { USB_DEVICE(USB_VID_TECHNISAT, USB_PID_TECHNISAT_USB2_HDCI_V1) },
         { USB_DEVICE(USB_VID_TECHNISAT, USB_PID_TECHNISAT_USB2_HDCI_V2) },
+        { USB_DEVICE(USB_VID_ELGATO, USB_PID_ELGATO_EYETV_SAT) },
         { },
 };
 
@@ -1126,15 +1127,15 @@ static struct dvb_usb_device_properties az6027_properties = {
         .read_mac_address = az6027_read_mac_addr,
  */
         .rc.legacy = {
-                .rc_key_map       = ir_codes_az6027_table,
-                .rc_key_map_size  = ARRAY_SIZE(ir_codes_az6027_table),
+                .rc_map_table     = rc_map_az6027_table,
+                .rc_map_size      = ARRAY_SIZE(rc_map_az6027_table),
                 .rc_interval      = 400,
                 .rc_query         = az6027_rc_query,
         },
 
         .i2c_algo         = &az6027_i2c_algo,
 
-        .num_device_descs = 5,
+        .num_device_descs = 6,
         .devices = {
                 {
                         .name = "AZUREWAVE DVB-S/S2 USB2.0 (AZ6027)",
@@ -1156,6 +1157,10 @@ static struct dvb_usb_device_properties az6027_properties = {
                         .name = "Technisat SkyStar USB 2 HD CI",
                         .cold_ids = { &az6027_usb_table[4], NULL },
                         .warm_ids = { NULL },
+                }, {
+                        .name = "Elgato EyeTV Sat",
+                        .cold_ids = { &az6027_usb_table[5], NULL },
+                        .warm_ids = { NULL },
                 },
                 { NULL },
         }
diff --git a/drivers/media/dvb/dvb-usb/ce6230.c b/drivers/media/dvb/dvb-usb/ce6230.c
index 3df2045b7d2d..6d1a3041540d 100644
--- a/drivers/media/dvb/dvb-usb/ce6230.c
+++ b/drivers/media/dvb/dvb-usb/ce6230.c
@@ -39,7 +39,7 @@ static int ce6230_rw_udev(struct usb_device *udev, struct req_t *req)
         u8 requesttype;
         u16 value;
         u16 index;
-        u8 buf[req->data_len];
+        u8 *buf;
 
         request = req->cmd;
         value = req->value;
@@ -62,6 +62,12 @@ static int ce6230_rw_udev(struct usb_device *udev, struct req_t *req)
                 goto error;
         }
 
+        buf = kmalloc(req->data_len, GFP_KERNEL);
+        if (!buf) {
+                ret = -ENOMEM;
+                goto error;
+        }
+
         if (requesttype == (USB_TYPE_VENDOR | USB_DIR_OUT)) {
                 /* write */
                 memcpy(buf, req->data, req->data_len);
@@ -74,7 +80,7 @@ static int ce6230_rw_udev(struct usb_device *udev, struct req_t *req)
         msleep(1); /* avoid I2C errors */
 
         ret = usb_control_msg(udev, pipe, request, requesttype, value, index,
-                                buf, sizeof(buf), CE6230_USB_TIMEOUT);
+                                buf, req->data_len, CE6230_USB_TIMEOUT);
 
         ce6230_debug_dump(request, requesttype, value, index, buf,
                 req->data_len, deb_xfer);
@@ -88,6 +94,7 @@ static int ce6230_rw_udev(struct usb_device *udev, struct req_t *req)
         if (!ret && requesttype == (USB_TYPE_VENDOR | USB_DIR_IN))
                 memcpy(req->data, buf, req->data_len);
 
+        kfree(buf);
 error:
         return ret;
 }
diff --git a/drivers/media/dvb/dvb-usb/cinergyT2-core.c b/drivers/media/dvb/dvb-usb/cinergyT2-core.c
index 4f5aa83fc1fc..16f2ce2bc15a 100644
--- a/drivers/media/dvb/dvb-usb/cinergyT2-core.c
+++ b/drivers/media/dvb/dvb-usb/cinergyT2-core.c
@@ -84,7 +84,7 @@ static int cinergyt2_frontend_attach(struct dvb_usb_adapter *adap)
         return 0;
 }
 
-static struct ir_scancode ir_codes_cinergyt2_table[] = {
+static struct rc_map_table rc_map_cinergyt2_table[] = {
         { 0x0401, KEY_POWER },
         { 0x0402, KEY_1 },
         { 0x0403, KEY_2 },
@@ -219,8 +219,8 @@ static struct dvb_usb_device_properties cinergyt2_properties = {
 
         .rc.legacy = {
                 .rc_interval      = 50,
-                .rc_key_map       = ir_codes_cinergyt2_table,
-                .rc_key_map_size  = ARRAY_SIZE(ir_codes_cinergyt2_table),
+                .rc_map_table     = rc_map_cinergyt2_table,
+                .rc_map_size      = ARRAY_SIZE(rc_map_cinergyt2_table),
                 .rc_query         = cinergyt2_rc_query,
         },
 
diff --git a/drivers/media/dvb/dvb-usb/cxusb.c b/drivers/media/dvb/dvb-usb/cxusb.c
index cd9f362c37b2..acb5fb2d2e73 100644
--- a/drivers/media/dvb/dvb-usb/cxusb.c
+++ b/drivers/media/dvb/dvb-usb/cxusb.c
@@ -385,7 +385,7 @@ static int cxusb_d680_dmb_streaming_ctrl(
 
 static int cxusb_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
 {
-        struct ir_scancode *keymap = d->props.rc.legacy.rc_key_map;
+        struct rc_map_table *keymap = d->props.rc.legacy.rc_map_table;
         u8 ircode[4];
         int i;
 
@@ -394,7 +394,7 @@ static int cxusb_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
         *event = 0;
         *state = REMOTE_NO_KEY_PRESSED;
 
-        for (i = 0; i < d->props.rc.legacy.rc_key_map_size; i++) {
+        for (i = 0; i < d->props.rc.legacy.rc_map_size; i++) {
                 if (rc5_custom(&keymap[i]) == ircode[2] &&
                     rc5_data(&keymap[i]) == ircode[3]) {
                         *event = keymap[i].keycode;
@@ -410,7 +410,7 @@ static int cxusb_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
 static int cxusb_bluebird2_rc_query(struct dvb_usb_device *d, u32 *event,
                                     int *state)
 {
-        struct ir_scancode *keymap = d->props.rc.legacy.rc_key_map;
+        struct rc_map_table *keymap = d->props.rc.legacy.rc_map_table;
         u8 ircode[4];
         int i;
         struct i2c_msg msg = { .addr = 0x6b, .flags = I2C_M_RD,
@@ -422,7 +422,7 @@ static int cxusb_bluebird2_rc_query(struct dvb_usb_device *d, u32 *event,
         if (cxusb_i2c_xfer(&d->i2c_adap, &msg, 1) != 1)
                 return 0;
 
-        for (i = 0; i < d->props.rc.legacy.rc_key_map_size; i++) {
+        for (i = 0; i < d->props.rc.legacy.rc_map_size; i++) {
                 if (rc5_custom(&keymap[i]) == ircode[1] &&
                     rc5_data(&keymap[i]) == ircode[2]) {
                         *event = keymap[i].keycode;
@@ -438,7 +438,7 @@ static int cxusb_bluebird2_rc_query(struct dvb_usb_device *d, u32 *event,
 static int cxusb_d680_dmb_rc_query(struct dvb_usb_device *d, u32 *event,
                 int *state)
 {
-        struct ir_scancode *keymap = d->props.rc.legacy.rc_key_map;
+        struct rc_map_table *keymap = d->props.rc.legacy.rc_map_table;
         u8 ircode[2];
         int i;
 
@@ -448,7 +448,7 @@ static int cxusb_d680_dmb_rc_query(struct dvb_usb_device *d, u32 *event,
         if (cxusb_ctrl_msg(d, 0x10, NULL, 0, ircode, 2) < 0)
                 return 0;
 
-        for (i = 0; i < d->props.rc.legacy.rc_key_map_size; i++) {
+        for (i = 0; i < d->props.rc.legacy.rc_map_size; i++) {
                 if (rc5_custom(&keymap[i]) == ircode[0] &&
                     rc5_data(&keymap[i]) == ircode[1]) {
                         *event = keymap[i].keycode;
@@ -461,7 +461,7 @@ static int cxusb_d680_dmb_rc_query(struct dvb_usb_device *d, u32 *event,
         return 0;
 }
 
-static struct ir_scancode ir_codes_dvico_mce_table[] = {
+static struct rc_map_table rc_map_dvico_mce_table[] = {
         { 0xfe02, KEY_TV },
         { 0xfe0e, KEY_MP3 },
         { 0xfe1a, KEY_DVD },
@@ -509,7 +509,7 @@ static struct ir_scancode ir_codes_dvico_mce_table[] = {
         { 0xfe4e, KEY_POWER },
 };
 
-static struct ir_scancode ir_codes_dvico_portable_table[] = {
+static struct rc_map_table rc_map_dvico_portable_table[] = {
         { 0xfc02, KEY_SETUP },       /* Profile */
         { 0xfc43, KEY_POWER2 },
         { 0xfc06, KEY_EPG },
@@ -548,7 +548,7 @@ static struct ir_scancode ir_codes_dvico_portable_table[] = {
         { 0xfc00, KEY_UNKNOWN },    /* HD */
 };
 
-static struct ir_scancode ir_codes_d680_dmb_table[] = {
+static struct rc_map_table rc_map_d680_dmb_table[] = {
         { 0x0038, KEY_UNKNOWN },        /* TV/AV */
         { 0x080c, KEY_ZOOM },
         { 0x0800, KEY_0 },
@@ -923,7 +923,7 @@ static int cxusb_dualdig4_frontend_attach(struct dvb_usb_adapter *adap)
                 return -EIO;
 
         /* try to determine if there is no IR decoder on the I2C bus */
-        for (i = 0; adap->dev->props.rc.legacy.rc_key_map != NULL && i < 5; i++) {
+        for (i = 0; adap->dev->props.rc.legacy.rc_map_table != NULL && i < 5; i++) {
                 msleep(20);
                 if (cxusb_i2c_xfer(&adap->dev->i2c_adap, &msg, 1) != 1)
                         goto no_IR;
@@ -931,7 +931,7 @@ static int cxusb_dualdig4_frontend_attach(struct dvb_usb_adapter *adap)
                         continue;
                 if (ircode[2] + ircode[3] != 0xff) {
 no_IR:
-                        adap->dev->props.rc.legacy.rc_key_map = NULL;
+                        adap->dev->props.rc.legacy.rc_map_table = NULL;
                         info("No IR receiver detected on this device.");
                         break;
                 }
@@ -1453,8 +1453,8 @@ static struct dvb_usb_device_properties cxusb_bluebird_lgh064f_properties = {
 
         .rc.legacy = {
                 .rc_interval      = 100,
-                .rc_key_map       = ir_codes_dvico_portable_table,
-                .rc_key_map_size  = ARRAY_SIZE(ir_codes_dvico_portable_table),
+                .rc_map_table     = rc_map_dvico_portable_table,
+                .rc_map_size      = ARRAY_SIZE(rc_map_dvico_portable_table),
                 .rc_query         = cxusb_rc_query,
         },
 
@@ -1506,8 +1506,8 @@ static struct dvb_usb_device_properties cxusb_bluebird_dee1601_properties = {
 
         .rc.legacy = {
                 .rc_interval      = 150,
-                .rc_key_map       = ir_codes_dvico_mce_table,
-                .rc_key_map_size  = ARRAY_SIZE(ir_codes_dvico_mce_table),
+                .rc_map_table     = rc_map_dvico_mce_table,
+                .rc_map_size      = ARRAY_SIZE(rc_map_dvico_mce_table),
                 .rc_query         = cxusb_rc_query,
         },
 
@@ -1567,8 +1567,8 @@ static struct dvb_usb_device_properties cxusb_bluebird_lgz201_properties = {
 
         .rc.legacy = {
                 .rc_interval      = 100,
-                .rc_key_map       = ir_codes_dvico_portable_table,
-                .rc_key_map_size  = ARRAY_SIZE(ir_codes_dvico_portable_table),
+                .rc_map_table     = rc_map_dvico_portable_table,
+                .rc_map_size      = ARRAY_SIZE(rc_map_dvico_portable_table),
                 .rc_query         = cxusb_rc_query,
         },
 
@@ -1619,8 +1619,8 @@ static struct dvb_usb_device_properties cxusb_bluebird_dtt7579_properties = {
 
         .rc.legacy = {
                 .rc_interval      = 100,
-                .rc_key_map       = ir_codes_dvico_portable_table,
-                .rc_key_map_size  = ARRAY_SIZE(ir_codes_dvico_portable_table),
+                .rc_map_table     = rc_map_dvico_portable_table,
+                .rc_map_size      = ARRAY_SIZE(rc_map_dvico_portable_table),
                 .rc_query         = cxusb_rc_query,
         },
 
@@ -1670,8 +1670,8 @@ static struct dvb_usb_device_properties cxusb_bluebird_dualdig4_properties = {
 
         .rc.legacy = {
                 .rc_interval      = 100,
-                .rc_key_map       = ir_codes_dvico_mce_table,
-                .rc_key_map_size  = ARRAY_SIZE(ir_codes_dvico_mce_table),
+                .rc_map_table     = rc_map_dvico_mce_table,
+                .rc_map_size      = ARRAY_SIZE(rc_map_dvico_mce_table),
                 .rc_query         = cxusb_bluebird2_rc_query,
         },
 
@@ -1720,8 +1720,8 @@ static struct dvb_usb_device_properties cxusb_bluebird_nano2_properties = {
 
         .rc.legacy = {
                 .rc_interval      = 100,
-                .rc_key_map       = ir_codes_dvico_portable_table,
-                .rc_key_map_size  = ARRAY_SIZE(ir_codes_dvico_portable_table),
+                .rc_map_table     = rc_map_dvico_portable_table,
+                .rc_map_size      = ARRAY_SIZE(rc_map_dvico_portable_table),
                 .rc_query         = cxusb_bluebird2_rc_query,
         },
 
@@ -1772,8 +1772,8 @@ static struct dvb_usb_device_properties cxusb_bluebird_nano2_needsfirmware_prope
 
         .rc.legacy = {
                 .rc_interval      = 100,
-                .rc_key_map       = ir_codes_dvico_portable_table,
-                .rc_key_map_size  = ARRAY_SIZE(ir_codes_dvico_portable_table),
+                .rc_map_table     = rc_map_dvico_portable_table,
+                .rc_map_size      = ARRAY_SIZE(rc_map_dvico_portable_table),
                 .rc_query         = cxusb_rc_query,
         },
 
@@ -1865,8 +1865,8 @@ struct dvb_usb_device_properties cxusb_bluebird_dualdig4_rev2_properties = {
 
         .rc.legacy = {
                 .rc_interval      = 100,
-                .rc_key_map       = ir_codes_dvico_mce_table,
-                .rc_key_map_size  = ARRAY_SIZE(ir_codes_dvico_mce_table),
+                .rc_map_table     = rc_map_dvico_mce_table,
+                .rc_map_size      = ARRAY_SIZE(rc_map_dvico_mce_table),
                 .rc_query         = cxusb_rc_query,
         },
 
@@ -1915,8 +1915,8 @@ static struct dvb_usb_device_properties cxusb_d680_dmb_properties = {
 
         .rc.legacy = {
                 .rc_interval      = 100,
-                .rc_key_map       = ir_codes_d680_dmb_table,
-                .rc_key_map_size  = ARRAY_SIZE(ir_codes_d680_dmb_table),
+                .rc_map_table     = rc_map_d680_dmb_table,
+                .rc_map_size      = ARRAY_SIZE(rc_map_d680_dmb_table),
                 .rc_query         = cxusb_d680_dmb_rc_query,
         },
 
@@ -1966,8 +1966,8 @@ static struct dvb_usb_device_properties cxusb_mygica_d689_properties = {
 
         .rc.legacy = {
                 .rc_interval      = 100,
-                .rc_key_map       = ir_codes_d680_dmb_table,
-                .rc_key_map_size  = ARRAY_SIZE(ir_codes_d680_dmb_table),
+                .rc_map_table     = rc_map_d680_dmb_table,
+                .rc_map_size      = ARRAY_SIZE(rc_map_d680_dmb_table),
                 .rc_query         = cxusb_d680_dmb_rc_query,
         },
 
diff --git a/drivers/media/dvb/dvb-usb/dib0700.h b/drivers/media/dvb/dvb-usb/dib0700.h
index c2c9d236ec7e..9bd6d51b3b93 100644
--- a/drivers/media/dvb/dvb-usb/dib0700.h
+++ b/drivers/media/dvb/dvb-usb/dib0700.h
@@ -32,6 +32,7 @@ extern int dvb_usb_dib0700_debug;
         // 1 Byte: 4MSB(1 = enable streaming, 0 = disable streaming) 4LSB(Video Mode: 0 = MPEG2 188Bytes, 1 = Analog)
         // 2 Byte: MPEG2 mode:  4MSB(1 = Master Mode, 0 = Slave Mode) 4LSB(Channel 1 = bit0, Channel 2 = bit1)
         // 2 Byte: Analog mode: 4MSB(0 = 625 lines, 1 = 525 lines)    4LSB(     "                "           )
+#define REQUEST_SET_I2C_PARAM       0x10
 #define REQUEST_SET_RC              0x11
 #define REQUEST_NEW_I2C_READ        0x12
 #define REQUEST_NEW_I2C_WRITE       0x13
@@ -45,8 +46,9 @@ struct dib0700_state {
         u8 is_dib7000pc;
         u8 fw_use_new_i2c_api;
         u8 disable_streaming_master_mode;
-    u32 fw_version;
-    u32 nb_packet_buffer_size;
+        u32 fw_version;
+        u32 nb_packet_buffer_size;
+        u8 buf[255];
 };
 
 extern int dib0700_get_version(struct dvb_usb_device *d, u32 *hwversion,
@@ -60,7 +62,8 @@ extern int dib0700_streaming_ctrl(struct dvb_usb_adapter *adap, int onoff);
 extern struct i2c_algorithm dib0700_i2c_algo;
 extern int dib0700_identify_state(struct usb_device *udev, struct dvb_usb_device_properties *props,
                         struct dvb_usb_device_description **desc, int *cold);
-extern int dib0700_change_protocol(void *priv, u64 ir_type);
+extern int dib0700_change_protocol(struct rc_dev *dev, u64 rc_type);
+extern int dib0700_set_i2c_speed(struct dvb_usb_device *d, u16 scl_kHz);
 
 extern int dib0700_device_count;
 extern int dvb_usb_dib0700_ir_proto;
diff --git a/drivers/media/dvb/dvb-usb/dib0700_core.c b/drivers/media/dvb/dvb-usb/dib0700_core.c
index 48397f103d32..5eb91b4f8fd0 100644
--- a/drivers/media/dvb/dvb-usb/dib0700_core.c
+++ b/drivers/media/dvb/dvb-usb/dib0700_core.c
@@ -27,19 +27,25 @@ DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
 int dib0700_get_version(struct dvb_usb_device *d, u32 *hwversion,
                         u32 *romversion, u32 *ramversion, u32 *fwtype)
 {
-        u8 b[16];
-        int ret = usb_control_msg(d->udev, usb_rcvctrlpipe(d->udev, 0),
+        struct dib0700_state *st = d->priv;
+        int ret;
+
+        ret = usb_control_msg(d->udev, usb_rcvctrlpipe(d->udev, 0),
                                   REQUEST_GET_VERSION,
                                   USB_TYPE_VENDOR | USB_DIR_IN, 0, 0,
-                                  b, sizeof(b), USB_CTRL_GET_TIMEOUT);
+                                  st->buf, 16, USB_CTRL_GET_TIMEOUT);
         if (hwversion != NULL)
-                *hwversion  = (b[0] << 24)  | (b[1] << 16)  | (b[2] << 8)  | b[3];
+                *hwversion  = (st->buf[0] << 24)  | (st->buf[1] << 16)  |
+                        (st->buf[2] << 8)  | st->buf[3];
         if (romversion != NULL)
-                *romversion = (b[4] << 24)  | (b[5] << 16)  | (b[6] << 8)  | b[7];
+                *romversion = (st->buf[4] << 24)  | (st->buf[5] << 16)  |
+                        (st->buf[6] << 8)  | st->buf[7];
         if (ramversion != NULL)
-                *ramversion = (b[8] << 24)  | (b[9] << 16)  | (b[10] << 8) | b[11];
+                *ramversion = (st->buf[8] << 24)  | (st->buf[9] << 16)  |
+                        (st->buf[10] << 8) | st->buf[11];
         if (fwtype != NULL)
-                *fwtype     = (b[12] << 24) | (b[13] << 16) | (b[14] << 8) | b[15];
+                *fwtype     = (st->buf[12] << 24) | (st->buf[13] << 16) |
+                        (st->buf[14] << 8) | st->buf[15];
         return ret;
 }
 
@@ -101,24 +107,31 @@ int dib0700_ctrl_rd(struct dvb_usb_device *d, u8 *tx, u8 txlen, u8 *rx, u8 rxlen
 
 int dib0700_set_gpio(struct dvb_usb_device *d, enum dib07x0_gpios gpio, u8 gpio_dir, u8 gpio_val)
 {
-        u8 buf[3] = { REQUEST_SET_GPIO, gpio, ((gpio_dir & 0x01) << 7) | ((gpio_val & 0x01) << 6) };
-        return dib0700_ctrl_wr(d, buf, sizeof(buf));
+        struct dib0700_state *st = d->priv;
+        s16 ret;
+
+        st->buf[0] = REQUEST_SET_GPIO;
+        st->buf[1] = gpio;
+        st->buf[2] = ((gpio_dir & 0x01) << 7) | ((gpio_val & 0x01) << 6);
+
+        ret = dib0700_ctrl_wr(d, st->buf, 3);
+
+        return ret;
 }
 
 static int dib0700_set_usb_xfer_len(struct dvb_usb_device *d, u16 nb_ts_packets)
 {
         struct dib0700_state *st = d->priv;
-        u8 b[3];
         int ret;
 
         if (st->fw_version >= 0x10201) {
-                b[0] = REQUEST_SET_USB_XFER_LEN;
-                b[1] = (nb_ts_packets >> 8) & 0xff;
-                b[2] = nb_ts_packets & 0xff;
+                st->buf[0] = REQUEST_SET_USB_XFER_LEN;
+                st->buf[1] = (nb_ts_packets >> 8) & 0xff;
+                st->buf[2] = nb_ts_packets & 0xff;
 
                 deb_info("set the USB xfer len to %i Ts packet\n", nb_ts_packets);
 
-                ret = dib0700_ctrl_wr(d, b, sizeof(b));
+                ret = dib0700_ctrl_wr(d, st->buf, 3);
         } else {
                 deb_info("this firmware does not allow to change the USB xfer len\n");
                 ret = -EIO;
@@ -137,11 +150,11 @@ static int dib0700_i2c_xfer_new(struct i2c_adapter *adap, struct i2c_msg *msg,
            properly support i2c read calls not preceded by a write */
 
         struct dvb_usb_device *d = i2c_get_adapdata(adap);
+        struct dib0700_state *st = d->priv;
         uint8_t bus_mode = 1;  /* 0=eeprom bus, 1=frontend bus */
         uint8_t gen_mode = 0; /* 0=master i2c, 1=gpio i2c */
         uint8_t en_start = 0;
         uint8_t en_stop = 0;
-        uint8_t buf[255]; /* TBV: malloc ? */
         int result, i;
 
         /* Ensure nobody else hits the i2c bus while we're sending our
@@ -186,7 +199,7 @@ static int dib0700_i2c_xfer_new(struct i2c_adapter *adap, struct i2c_msg *msg,
                                                  msg[i].len,
                                                  USB_CTRL_GET_TIMEOUT);
                         if (result < 0) {
-                                err("i2c read error (status = %d)\n", result);
+                                deb_info("i2c read error (status = %d)\n", result);
                                 break;
                         }
 
@@ -195,27 +208,27 @@ static int dib0700_i2c_xfer_new(struct i2c_adapter *adap, struct i2c_msg *msg,
 
                 } else {
                         /* Write request */
-                        buf[0] = REQUEST_NEW_I2C_WRITE;
-                        buf[1] = msg[i].addr << 1;
-                        buf[2] = (en_start << 7) | (en_stop << 6) |
+                        st->buf[0] = REQUEST_NEW_I2C_WRITE;
+                        st->buf[1] = msg[i].addr << 1;
+                        st->buf[2] = (en_start << 7) | (en_stop << 6) |
                                 (msg[i].len & 0x3F);
                         /* I2C ctrl + FE bus; */
-                        buf[3] = ((gen_mode << 6) & 0xC0) |
+                        st->buf[3] = ((gen_mode << 6) & 0xC0) |
                                  ((bus_mode << 4) & 0x30);
                         /* The Actual i2c payload */
-                        memcpy(&buf[4], msg[i].buf, msg[i].len);
+                        memcpy(&st->buf[4], msg[i].buf, msg[i].len);
 
                         deb_data(">>> ");
-                        debug_dump(buf, msg[i].len + 4, deb_data);
+                        debug_dump(st->buf, msg[i].len + 4, deb_data);
 
                         result = usb_control_msg(d->udev,
                                                  usb_sndctrlpipe(d->udev, 0),
                                                  REQUEST_NEW_I2C_WRITE,
                                                  USB_TYPE_VENDOR | USB_DIR_OUT,
-                                                 0, 0, buf, msg[i].len + 4,
+                                                 0, 0, st->buf, msg[i].len + 4,
                                                  USB_CTRL_GET_TIMEOUT);
                         if (result < 0) {
-                                err("i2c write error (status = %d)\n", result);
+                                deb_info("i2c write error (status = %d)\n", result);
                                 break;
                         }
                 }
@@ -231,27 +244,29 @@ static int dib0700_i2c_xfer_legacy(struct i2c_adapter *adap,
                                    struct i2c_msg *msg, int num)
 {
         struct dvb_usb_device *d = i2c_get_adapdata(adap);
+        struct dib0700_state *st = d->priv;
         int i,len;
-        u8 buf[255];
 
         if (mutex_lock_interruptible(&d->i2c_mutex) < 0)
                 return -EAGAIN;
 
         for (i = 0; i < num; i++) {
                 /* fill in the address */
-                buf[1] = msg[i].addr << 1;
+                st->buf[1] = msg[i].addr << 1;
                 /* fill the buffer */
-                memcpy(&buf[2], msg[i].buf, msg[i].len);
+                memcpy(&st->buf[2], msg[i].buf, msg[i].len);
 
                 /* write/read request */
                 if (i+1 < num && (msg[i+1].flags & I2C_M_RD)) {
-                        buf[0] = REQUEST_I2C_READ;
-                        buf[1] |= 1;
+                        st->buf[0] = REQUEST_I2C_READ;
+                        st->buf[1] |= 1;
 
                         /* special thing in the current firmware: when length is zero the read-failed */
-                        if ((len = dib0700_ctrl_rd(d, buf, msg[i].len + 2, msg[i+1].buf, msg[i+1].len)) <= 0) {
+                        len = dib0700_ctrl_rd(d, st->buf, msg[i].len + 2,
+                                        msg[i+1].buf, msg[i+1].len);
+                        if (len <= 0) {
                                 deb_info("I2C read failed on address 0x%02x\n",
-                                         msg[i].addr);
+                                                msg[i].addr);
                                 break;
                         }
 
@@ -259,13 +274,13 @@ static int dib0700_i2c_xfer_legacy(struct i2c_adapter *adap,
 
                         i++;
                 } else {
-                        buf[0] = REQUEST_I2C_WRITE;
-                        if (dib0700_ctrl_wr(d, buf, msg[i].len + 2) < 0)
+                        st->buf[0] = REQUEST_I2C_WRITE;
+                        if (dib0700_ctrl_wr(d, st->buf, msg[i].len + 2) < 0)
                                 break;
                 }
         }
-
         mutex_unlock(&d->i2c_mutex);
+
         return i;
 }
 
@@ -297,15 +312,23 @@ struct i2c_algorithm dib0700_i2c_algo = {
 int dib0700_identify_state(struct usb_device *udev, struct dvb_usb_device_properties *props,
                         struct dvb_usb_device_description **desc, int *cold)
 {
-        u8 b[16];
-        s16 ret = usb_control_msg(udev, usb_rcvctrlpipe(udev,0),
+        s16 ret;
+        u8 *b;
+
+        b = kmalloc(16, GFP_KERNEL);
+        if (!b)
+                return  -ENOMEM;
+
+
+        ret = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
                 REQUEST_GET_VERSION, USB_TYPE_VENDOR | USB_DIR_IN, 0, 0, b, 16, USB_CTRL_GET_TIMEOUT);
 
         deb_info("FW GET_VERSION length: %d\n",ret);
 
         *cold = ret <= 0;
-
         deb_info("cold: %d\n", *cold);
+
+        kfree(b);
         return 0;
 }
 
@@ -313,21 +336,53 @@ static int dib0700_set_clock(struct dvb_usb_device *d, u8 en_pll,
         u8 pll_src, u8 pll_range, u8 clock_gpio3, u16 pll_prediv,
         u16 pll_loopdiv, u16 free_div, u16 dsuScaler)
 {
-        u8 b[10];
-        b[0] = REQUEST_SET_CLOCK;
-        b[1] = (en_pll << 7) | (pll_src << 6) | (pll_range << 5) | (clock_gpio3 << 4);
-        b[2] = (pll_prediv >> 8)  & 0xff; // MSB
-        b[3] =  pll_prediv        & 0xff; // LSB
-        b[4] = (pll_loopdiv >> 8) & 0xff; // MSB
-        b[5] =  pll_loopdiv       & 0xff; // LSB
-        b[6] = (free_div >> 8)    & 0xff; // MSB
-        b[7] =  free_div          & 0xff; // LSB
-        b[8] = (dsuScaler >> 8)   & 0xff; // MSB
-        b[9] =  dsuScaler         & 0xff; // LSB
-
-        return dib0700_ctrl_wr(d, b, 10);
+        struct dib0700_state *st = d->priv;
+        s16 ret;
+
+        st->buf[0] = REQUEST_SET_CLOCK;
+        st->buf[1] = (en_pll << 7) | (pll_src << 6) |
+                (pll_range << 5) | (clock_gpio3 << 4);
+        st->buf[2] = (pll_prediv >> 8)  & 0xff; /* MSB */
+        st->buf[3] =  pll_prediv        & 0xff; /* LSB */
+        st->buf[4] = (pll_loopdiv >> 8) & 0xff; /* MSB */
+        st->buf[5] =  pll_loopdiv       & 0xff; /* LSB */
+        st->buf[6] = (free_div >> 8)    & 0xff; /* MSB */
+        st->buf[7] =  free_div          & 0xff; /* LSB */
+        st->buf[8] = (dsuScaler >> 8)   & 0xff; /* MSB */
+        st->buf[9] =  dsuScaler         & 0xff; /* LSB */
+
+        ret = dib0700_ctrl_wr(d, st->buf, 10);
+
+        return ret;
 }
 
+int dib0700_set_i2c_speed(struct dvb_usb_device *d, u16 scl_kHz)
+{
+        struct dib0700_state *st = d->priv;
+        u16 divider;
+
+        if (scl_kHz == 0)
+                return -EINVAL;
+
+        st->buf[0] = REQUEST_SET_I2C_PARAM;
+        divider = (u16) (30000 / scl_kHz);
+        st->buf[1] = 0;
+        st->buf[2] = (u8) (divider >> 8);
+        st->buf[3] = (u8) (divider & 0xff);
+        divider = (u16) (72000 / scl_kHz);
+        st->buf[4] = (u8) (divider >> 8);
+        st->buf[5] = (u8) (divider & 0xff);
+        divider = (u16) (72000 / scl_kHz); /* clock: 72MHz */
+        st->buf[6] = (u8) (divider >> 8);
+        st->buf[7] = (u8) (divider & 0xff);
+
+        deb_info("setting I2C speed: %04x %04x %04x (%d kHz).",
+                (st->buf[2] << 8) | (st->buf[3]), (st->buf[4] << 8) |
+                st->buf[5], (st->buf[6] << 8) | st->buf[7], scl_kHz);
+        return dib0700_ctrl_wr(d, st->buf, 8);
+}
+
+
 int dib0700_ctrl_clock(struct dvb_usb_device *d, u32 clk_MHz, u8 clock_out_gp3)
 {
         switch (clk_MHz) {
@@ -339,32 +394,45 @@ int dib0700_ctrl_clock(struct dvb_usb_device *d, u32 clk_MHz, u8 clock_out_gp3)
 
 static int dib0700_jumpram(struct usb_device *udev, u32 address)
 {
-        int ret, actlen;
-        u8 buf[8] = { REQUEST_JUMPRAM, 0, 0, 0,
-                (address >> 24) & 0xff,
-                (address >> 16) & 0xff,
-                (address >> 8)  & 0xff,
-                 address        & 0xff };
+        int ret = 0, actlen;
+        u8 *buf;
+
+        buf = kmalloc(8, GFP_KERNEL);
+        if (!buf)
+                return -ENOMEM;
+        buf[0] = REQUEST_JUMPRAM;
+        buf[1] = 0;
+        buf[2] = 0;
+        buf[3] = 0;
+        buf[4] = (address >> 24) & 0xff;
+        buf[5] = (address >> 16) & 0xff;
+        buf[6] = (address >> 8)  & 0xff;
+        buf[7] =  address        & 0xff;
 
         if ((ret = usb_bulk_msg(udev, usb_sndbulkpipe(udev, 0x01),buf,8,&actlen,1000)) < 0) {
                 deb_fw("jumpram to 0x%x failed\n",address);
-                return ret;
+                goto out;
         }
         if (actlen != 8) {
                 deb_fw("jumpram to 0x%x failed\n",address);
-                return -EIO;
+                ret = -EIO;
+                goto out;
         }
-        return 0;
+out:
+        kfree(buf);
+        return ret;
 }
 
 int dib0700_download_firmware(struct usb_device *udev, const struct firmware *fw)
 {
         struct hexline hx;
         int pos = 0, ret, act_len, i, adap_num;
-        u8 b[16];
+        u8 *buf;
         u32 fw_version;
 
-        u8 buf[260];
+        buf = kmalloc(260, GFP_KERNEL);
+        if (!buf)
+                return -ENOMEM;
 
         while ((ret = dvb_usb_get_hexline(fw, &hx, &pos)) > 0) {
                 deb_fwdata("writing to address 0x%08x (buffer: 0x%02x %02x)\n",
@@ -386,7 +454,7 @@ int dib0700_download_firmware(struct usb_device *udev, const struct firmware *fw
 
                 if (ret < 0) {
                         err("firmware download failed at %d with %d",pos,ret);
-                        return ret;
+                        goto out;
                 }
         }
 
@@ -407,8 +475,8 @@ int dib0700_download_firmware(struct usb_device *udev, const struct firmware *fw
         usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
                                   REQUEST_GET_VERSION,
                                   USB_TYPE_VENDOR | USB_DIR_IN, 0, 0,
-                                  b, sizeof(b), USB_CTRL_GET_TIMEOUT);
-        fw_version = (b[8] << 24) | (b[9] << 16) | (b[10] << 8) | b[11];
+                                  buf, 16, USB_CTRL_GET_TIMEOUT);
+        fw_version = (buf[8] << 24) | (buf[9] << 16) | (buf[10] << 8) | buf[11];
 
         /* set the buffer size - DVB-USB is allocating URB buffers
          * only after the firwmare download was successful */
@@ -426,14 +494,14 @@ int dib0700_download_firmware(struct usb_device *udev, const struct firmware *fw
                         }
                 }
         }
-
+out:
+        kfree(buf);
         return ret;
 }
 
 int dib0700_streaming_ctrl(struct dvb_usb_adapter *adap, int onoff)
 {
         struct dib0700_state *st = adap->dev->priv;
-        u8 b[4];
         int ret;
 
         if ((onoff != 0) && (st->fw_version >= 0x10201)) {
@@ -447,43 +515,58 @@ int dib0700_streaming_ctrl(struct dvb_usb_adapter *adap, int onoff)
                 }
         }
 
-        b[0] = REQUEST_ENABLE_VIDEO;
-        b[1] = (onoff << 4) | 0x00; /* this bit gives a kind of command, rather than enabling something or not */
+        st->buf[0] = REQUEST_ENABLE_VIDEO;
+        /* this bit gives a kind of command,
+         * rather than enabling something or not */
+        st->buf[1] = (onoff << 4) | 0x00;
 
         if (st->disable_streaming_master_mode == 1)
-                b[2] = 0x00;
+                st->buf[2] = 0x00;
         else
-                b[2] = 0x01 << 4; /* Master mode */
+                st->buf[2] = 0x01 << 4; /* Master mode */
 
-        b[3] = 0x00;
+        st->buf[3] = 0x00;
 
         deb_info("modifying (%d) streaming state for %d\n", onoff, adap->id);
 
-        if (onoff)
-                st->channel_state |=   1 << adap->id;
-        else
-                st->channel_state &= ~(1 << adap->id);
+        st->channel_state &= ~0x3;
+        if ((adap->stream.props.endpoint != 2)
+                        && (adap->stream.props.endpoint != 3)) {
+                deb_info("the endpoint number (%i) is not correct, use the adapter id instead", adap->stream.props.endpoint);
+                if (onoff)
+                        st->channel_state |=    1 << (adap->id);
+                else
+                        st->channel_state |=    1 << ~(adap->id);
+        } else {
+                if (onoff)
+                        st->channel_state |=    1 << (adap->stream.props.endpoint-2);
+                else
+                        st->channel_state |=    1 << (3-adap->stream.props.endpoint);
+        }
 
-        b[2] |= st->channel_state;
+        st->buf[2] |= st->channel_state;
 
-        deb_info("data for streaming: %x %x\n", b[1], b[2]);
+        deb_info("data for streaming: %x %x\n", st->buf[1], st->buf[2]);
 
-        return dib0700_ctrl_wr(adap->dev, b, 4);
+        return dib0700_ctrl_wr(adap->dev, st->buf, 4);
 }
 
-int dib0700_change_protocol(void *priv, u64 ir_type)
+int dib0700_change_protocol(struct rc_dev *rc, u64 rc_type)
 {
-        struct dvb_usb_device *d = priv;
+        struct dvb_usb_device *d = rc->priv;
         struct dib0700_state *st = d->priv;
-        u8 rc_setup[3] = { REQUEST_SET_RC, 0, 0 };
         int new_proto, ret;
 
+        st->buf[0] = REQUEST_SET_RC;
+        st->buf[1] = 0;
+        st->buf[2] = 0;
+
         /* Set the IR mode */
-        if (ir_type == IR_TYPE_RC5)
+        if (rc_type == RC_TYPE_RC5)
                 new_proto = 1;
-        else if (ir_type == IR_TYPE_NEC)
+        else if (rc_type == RC_TYPE_NEC)
                 new_proto = 0;
-        else if (ir_type == IR_TYPE_RC6) {
+        else if (rc_type == RC_TYPE_RC6) {
                 if (st->fw_version < 0x10200)
                         return -EINVAL;
 
@@ -491,15 +574,15 @@ int dib0700_change_protocol(void *priv, u64 ir_type)
         } else
                 return -EINVAL;
 
-        rc_setup[1] = new_proto;
+        st->buf[1] = new_proto;
 
-        ret = dib0700_ctrl_wr(d, rc_setup, sizeof(rc_setup));
+        ret = dib0700_ctrl_wr(d, st->buf, 3);
         if (ret < 0) {
                 err("ir protocol setup failed");
                 return ret;
         }
 
-        d->props.rc.core.protocol = ir_type;
+        d->props.rc.core.protocol = rc_type;
 
         return ret;
 }
@@ -514,8 +597,8 @@ struct dib0700_rc_response {
         union {
                 u16 system16;
                 struct {
-                        u8 system;
                         u8 not_system;
+                        u8 system;
                 };
         };
         u8 data;
@@ -526,7 +609,6 @@ struct dib0700_rc_response {
 static void dib0700_rc_urb_completion(struct urb *purb)
 {
         struct dvb_usb_device *d = purb->context;
-        struct dib0700_state *st;
         struct dib0700_rc_response *poll_reply;
         u32 uninitialized_var(keycode);
         u8 toggle;
@@ -535,13 +617,12 @@ static void dib0700_rc_urb_completion(struct urb *purb)
         if (d == NULL)
                 return;
 
-        if (d->rc_input_dev == NULL) {
+        if (d->rc_dev == NULL) {
                 /* This will occur if disable_rc_polling=1 */
                 usb_free_urb(purb);
                 return;
         }
 
-        st = d->priv;
         poll_reply = purb->transfer_buffer;
 
         if (purb->status < 0) {
@@ -562,7 +643,7 @@ static void dib0700_rc_urb_completion(struct urb *purb)
                  purb->actual_length);
 
         switch (d->props.rc.core.protocol) {
-        case IR_TYPE_NEC:
+        case RC_TYPE_NEC:
                 toggle = 0;
 
                 /* NEC protocol sends repeat code as 0 0 0 FF */
@@ -575,7 +656,7 @@ static void dib0700_rc_urb_completion(struct urb *purb)
                 if ((poll_reply->system ^ poll_reply->not_system) != 0xff) {
                         deb_data("NEC extended protocol\n");
                         /* NEC extended code - 24 bits */
-                        keycode = poll_reply->system16 << 8 | poll_reply->data;
+                        keycode = be16_to_cpu(poll_reply->system16) << 8 | poll_reply->data;
                 } else {
                         deb_data("NEC normal protocol\n");
                         /* normal NEC code - 16 bits */
@@ -587,7 +668,7 @@ static void dib0700_rc_urb_completion(struct urb *purb)
                 deb_data("RC5 protocol\n");
                 /* RC5 Protocol */
                 toggle = poll_reply->report_id;
-                keycode = poll_reply->system16 << 8 | poll_reply->data;
+                keycode = poll_reply->system << 8 | poll_reply->data;
 
                 break;
         }
@@ -600,7 +681,7 @@ static void dib0700_rc_urb_completion(struct urb *purb)
                 goto resubmit;
         }
 
-        ir_keydown(d->rc_input_dev, keycode, toggle);
+        rc_keydown(d->rc_dev, keycode, toggle);
 
 resubmit:
         /* Clean the buffer before we requeue */
diff --git a/drivers/media/dvb/dvb-usb/dib0700_devices.c b/drivers/media/dvb/dvb-usb/dib0700_devices.c
index e06acd1fecb6..c519ad5eb731 100644
--- a/drivers/media/dvb/dvb-usb/dib0700_devices.c
+++ b/drivers/media/dvb/dvb-usb/dib0700_devices.c
@@ -12,6 +12,7 @@
 #include "dib7000m.h"
 #include "dib7000p.h"
 #include "dib8000.h"
+#include "dib9000.h"
 #include "mt2060.h"
 #include "mt2266.h"
 #include "tuner-xc2028.h"
@@ -29,6 +30,7 @@ MODULE_PARM_DESC(force_lna_activation, "force the activation of Low-Noise-Amplif
 
 struct dib0700_adapter_state {
         int (*set_param_save) (struct dvb_frontend *, struct dvb_frontend_parameters *);
+        const struct firmware *frontend_firmware;
 };
 
 /* Hauppauge Nova-T 500 (aka Bristol)
@@ -510,7 +512,7 @@ static int dib0700_rc_query_old_firmware(struct dvb_usb_device *d)
 
         d->last_event = 0;
         switch (d->props.rc.core.protocol) {
-        case IR_TYPE_NEC:
+        case RC_TYPE_NEC:
                 /* NEC protocol sends repeat code as 0 0 0 FF */
                 if ((key[3-2] == 0x00) && (key[3-3] == 0x00) &&
                     (key[3] == 0xff))
@@ -520,13 +522,13 @@ static int dib0700_rc_query_old_firmware(struct dvb_usb_device *d)
                         d->last_event = keycode;
                 }
 
-                ir_keydown(d->rc_input_dev, keycode, 0);
+                rc_keydown(d->rc_dev, keycode, 0);
                 break;
         default:
                 /* RC-5 protocol changes toggle bit on new keypress */
                 keycode = key[3-2] << 8 | key[3-3];
                 toggle = key[3-1];
-                ir_keydown(d->rc_input_dev, keycode, toggle);
+                rc_keydown(d->rc_dev, keycode, toggle);
 
                 break;
         }
@@ -870,6 +872,23 @@ static int dib7070p_tuner_attach(struct dvb_usb_adapter *adap)
         return 0;
 }
 
+static int stk7700p_pid_filter(struct dvb_usb_adapter *adapter, int index,
+                u16 pid, int onoff)
+{
+        struct dib0700_state *st = adapter->dev->priv;
+        if (st->is_dib7000pc)
+                return dib7000p_pid_filter(adapter->fe, index, pid, onoff);
+        return dib7000m_pid_filter(adapter->fe, index, pid, onoff);
+}
+
+static int stk7700p_pid_filter_ctrl(struct dvb_usb_adapter *adapter, int onoff)
+{
+        struct dib0700_state *st = adapter->dev->priv;
+        if (st->is_dib7000pc)
+                return dib7000p_pid_filter_ctrl(adapter->fe, onoff);
+        return dib7000m_pid_filter_ctrl(adapter->fe, onoff);
+}
+
 static int stk70x0p_pid_filter(struct dvb_usb_adapter *adapter, int index, u16 pid, int onoff)
 {
     return dib7000p_pid_filter(adapter->fe, index, pid, onoff);
@@ -1226,13 +1245,13 @@ static int dib807x_tuner_attach(struct dvb_usb_adapter *adap)
 static int stk80xx_pid_filter(struct dvb_usb_adapter *adapter, int index,
         u16 pid, int onoff)
 {
-    return dib8000_pid_filter(adapter->fe, index, pid, onoff);
+        return dib8000_pid_filter(adapter->fe, index, pid, onoff);
 }
 
 static int stk80xx_pid_filter_ctrl(struct dvb_usb_adapter *adapter,
-        int onoff)
+                int onoff)
 {
-    return dib8000_pid_filter_ctrl(adapter->fe, onoff);
+        return dib8000_pid_filter_ctrl(adapter->fe, onoff);
 }
 
 /* STK807x */
@@ -1304,11 +1323,11 @@ static int stk807xpvr_frontend_attach1(struct dvb_usb_adapter *adap)
 
 /* STK8096GP */
 struct dibx000_agc_config dib8090_agc_config[2] = {
-    {
+        {
         BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND,
         /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1,
-     * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
-     * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
+         * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
+         * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
         (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8)
         | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
 
@@ -1345,12 +1364,12 @@ struct dibx000_agc_config dib8090_agc_config[2] = {
         51,
 
         0,
-    },
-    {
+        },
+        {
         BAND_CBAND,
         /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1,
-     * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
-     * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
+         * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
+         * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
         (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8)
         | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
 
@@ -1387,135 +1406,153 @@ struct dibx000_agc_config dib8090_agc_config[2] = {
         51,
 
         0,
-    }
+        }
 };
 
 static struct dibx000_bandwidth_config dib8090_pll_config_12mhz = {
-    54000, 13500,
-    1, 18, 3, 1, 0,
-    0, 0, 1, 1, 2,
-    (3 << 14) | (1 << 12) | (599 << 0),
-    (0 << 25) | 0,
-    20199727,
-    12000000,
+        54000, 13500,
+        1, 18, 3, 1, 0,
+        0, 0, 1, 1, 2,
+        (3 << 14) | (1 << 12) | (599 << 0),
+        (0 << 25) | 0,
+        20199727,
+        12000000,
 };
 
 static int dib8090_get_adc_power(struct dvb_frontend *fe)
 {
-    return dib8000_get_adc_power(fe, 1);
+        return dib8000_get_adc_power(fe, 1);
 }
 
-static struct dib8000_config dib809x_dib8000_config = {
-    .output_mpeg2_in_188_bytes = 1,
-
-    .agc_config_count = 2,
-    .agc = dib8090_agc_config,
-    .agc_control = dib0090_dcc_freq,
-    .pll = &dib8090_pll_config_12mhz,
-    .tuner_is_baseband = 1,
-
-    .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
-    .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
-    .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
-
-    .hostbus_diversity = 1,
-    .div_cfg = 0x31,
-    .output_mode = OUTMODE_MPEG2_FIFO,
-    .drives = 0x2d98,
-    .diversity_delay = 144,
-    .refclksel = 3,
+static struct dib8000_config dib809x_dib8000_config[2] = {
+        {
+        .output_mpeg2_in_188_bytes = 1,
+
+        .agc_config_count = 2,
+        .agc = dib8090_agc_config,
+        .agc_control = dib0090_dcc_freq,
+        .pll = &dib8090_pll_config_12mhz,
+        .tuner_is_baseband = 1,
+
+        .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
+        .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
+        .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
+
+        .hostbus_diversity = 1,
+        .div_cfg = 0x31,
+        .output_mode = OUTMODE_MPEG2_FIFO,
+        .drives = 0x2d98,
+        .diversity_delay = 48,
+        .refclksel = 3,
+        }, {
+        .output_mpeg2_in_188_bytes = 1,
+
+        .agc_config_count = 2,
+        .agc = dib8090_agc_config,
+        .agc_control = dib0090_dcc_freq,
+        .pll = &dib8090_pll_config_12mhz,
+        .tuner_is_baseband = 1,
+
+        .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
+        .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
+        .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
+
+        .hostbus_diversity = 1,
+        .div_cfg = 0x31,
+        .output_mode = OUTMODE_DIVERSITY,
+        .drives = 0x2d08,
+        .diversity_delay = 1,
+        .refclksel = 3,
+        }
+};
+
+static struct dib0090_wbd_slope dib8090_wbd_table[] = {
+        /* max freq ; cold slope ; cold offset ; warm slope ; warm offset ; wbd gain */
+        { 120,     0, 500,  0,   500, 4 }, /* CBAND */
+        { 170,     0, 450,  0,   450, 4 }, /* CBAND */
+        { 380,    48, 373, 28,   259, 6 }, /* VHF */
+        { 860,    34, 700, 36,   616, 6 }, /* high UHF */
+        { 0xFFFF, 34, 700, 36,   616, 6 }, /* default */
 };
 
 static struct dib0090_config dib809x_dib0090_config = {
-    .io.pll_bypass = 1,
-    .io.pll_range = 1,
-    .io.pll_prediv = 1,
-    .io.pll_loopdiv = 20,
-    .io.adc_clock_ratio = 8,
-    .io.pll_int_loop_filt = 0,
-    .io.clock_khz = 12000,
-    .reset = dib80xx_tuner_reset,
-    .sleep = dib80xx_tuner_sleep,
-    .clkouttobamse = 1,
-    .analog_output = 1,
-    .i2c_address = DEFAULT_DIB0090_I2C_ADDRESS,
-    .wbd_vhf_offset = 100,
-    .wbd_cband_offset = 450,
-    .use_pwm_agc = 1,
-    .clkoutdrive = 1,
-    .get_adc_power = dib8090_get_adc_power,
-        .freq_offset_khz_uhf = 0,
+        .io.pll_bypass = 1,
+        .io.pll_range = 1,
+        .io.pll_prediv = 1,
+        .io.pll_loopdiv = 20,
+        .io.adc_clock_ratio = 8,
+        .io.pll_int_loop_filt = 0,
+        .io.clock_khz = 12000,
+        .reset = dib80xx_tuner_reset,
+        .sleep = dib80xx_tuner_sleep,
+        .clkouttobamse = 1,
+        .analog_output = 1,
+        .i2c_address = DEFAULT_DIB0090_I2C_ADDRESS,
+        .use_pwm_agc = 1,
+        .clkoutdrive = 1,
+        .get_adc_power = dib8090_get_adc_power,
+        .freq_offset_khz_uhf = -63,
         .freq_offset_khz_vhf = -143,
+        .wbd = dib8090_wbd_table,
+        .fref_clock_ratio = 6,
 };
 
 static int dib8096_set_param_override(struct dvb_frontend *fe,
                 struct dvb_frontend_parameters *fep)
 {
-    struct dvb_usb_adapter *adap = fe->dvb->priv;
-    struct dib0700_adapter_state *state = adap->priv;
-    u8 band = BAND_OF_FREQUENCY(fep->frequency/1000);
-    u16 offset;
-    int ret = 0;
-    enum frontend_tune_state tune_state = CT_SHUTDOWN;
-    u16 ltgain, rf_gain_limit;
-
-    ret = state->set_param_save(fe, fep);
-    if (ret < 0)
-        return ret;
-
-    switch (band) {
-    case BAND_VHF:
-            offset = 100;
-            break;
-    case BAND_UHF:
-            offset = 550;
-            break;
-    default:
-            offset = 0;
-            break;
-    }
-    offset += (dib0090_get_wbd_offset(fe) * 8 * 18 / 33 + 1) / 2;
-    dib8000_set_wbd_ref(fe, offset);
-
-
-    if (band == BAND_CBAND) {
-        deb_info("tuning in CBAND - soft-AGC startup\n");
-        /* TODO specific wbd target for dib0090 - needed for startup ? */
-        dib0090_set_tune_state(fe, CT_AGC_START);
-        do {
-                ret = dib0090_gain_control(fe);
-                msleep(ret);
-                tune_state = dib0090_get_tune_state(fe);
-                if (tune_state == CT_AGC_STEP_0)
-                        dib8000_set_gpio(fe, 6, 0, 1);
-                else if (tune_state == CT_AGC_STEP_1) {
-                        dib0090_get_current_gain(fe, NULL, NULL, &rf_gain_limit, &ltgain);
-                        if (rf_gain_limit == 0)
-                                dib8000_set_gpio(fe, 6, 0, 0);
-                }
-        } while (tune_state < CT_AGC_STOP);
-        dib0090_pwm_gain_reset(fe);
-        dib8000_pwm_agc_reset(fe);
-        dib8000_set_tune_state(fe, CT_DEMOD_START);
-    } else {
-        deb_info("not tuning in CBAND - standard AGC startup\n");
-        dib0090_pwm_gain_reset(fe);
-    }
+        struct dvb_usb_adapter *adap = fe->dvb->priv;
+        struct dib0700_adapter_state *state = adap->priv;
+        u8 band = BAND_OF_FREQUENCY(fep->frequency/1000);
+        u16 target;
+        int ret = 0;
+        enum frontend_tune_state tune_state = CT_SHUTDOWN;
+        u16 ltgain, rf_gain_limit;
+
+        ret = state->set_param_save(fe, fep);
+        if (ret < 0)
+                return ret;
+
+        target = (dib0090_get_wbd_offset(fe) * 8 * 18 / 33 + 1) / 2;
+        dib8000_set_wbd_ref(fe, target);
+
+
+        if (band == BAND_CBAND) {
+                deb_info("tuning in CBAND - soft-AGC startup\n");
+                dib0090_set_tune_state(fe, CT_AGC_START);
+                do {
+                        ret = dib0090_gain_control(fe);
+                        msleep(ret);
+                        tune_state = dib0090_get_tune_state(fe);
+                        if (tune_state == CT_AGC_STEP_0)
+                                dib8000_set_gpio(fe, 6, 0, 1);
+                        else if (tune_state == CT_AGC_STEP_1) {
+                                dib0090_get_current_gain(fe, NULL, NULL, &rf_gain_limit, &ltgain);
+                                if (rf_gain_limit == 0)
+                                        dib8000_set_gpio(fe, 6, 0, 0);
+                        }
+                } while (tune_state < CT_AGC_STOP);
+                dib0090_pwm_gain_reset(fe);
+                dib8000_pwm_agc_reset(fe);
+                dib8000_set_tune_state(fe, CT_DEMOD_START);
+        } else {
+                deb_info("not tuning in CBAND - standard AGC startup\n");
+                dib0090_pwm_gain_reset(fe);
+        }
 
-    return 0;
+        return 0;
 }
 
 static int dib809x_tuner_attach(struct dvb_usb_adapter *adap)
 {
-    struct dib0700_adapter_state *st = adap->priv;
-    struct i2c_adapter *tun_i2c = dib8000_get_i2c_master(adap->fe, DIBX000_I2C_INTERFACE_TUNER, 1);
+        struct dib0700_adapter_state *st = adap->priv;
+        struct i2c_adapter *tun_i2c = dib8000_get_i2c_master(adap->fe, DIBX000_I2C_INTERFACE_TUNER, 1);
 
-    if (dvb_attach(dib0090_register, adap->fe, tun_i2c, &dib809x_dib0090_config) == NULL)
-        return -ENODEV;
+        if (dvb_attach(dib0090_register, adap->fe, tun_i2c, &dib809x_dib0090_config) == NULL)
+                return -ENODEV;
 
-    st->set_param_save = adap->fe->ops.tuner_ops.set_params;
-    adap->fe->ops.tuner_ops.set_params = dib8096_set_param_override;
-    return 0;
+        st->set_param_save = adap->fe->ops.tuner_ops.set_params;
+        adap->fe->ops.tuner_ops.set_params = dib8096_set_param_override;
+        return 0;
 }
 
 static int stk809x_frontend_attach(struct dvb_usb_adapter *adap)
@@ -1537,11 +1574,930 @@ static int stk809x_frontend_attach(struct dvb_usb_adapter *adap)
 
         dib8000_i2c_enumeration(&adap->dev->i2c_adap, 1, 18, 0x80);
 
-        adap->fe = dvb_attach(dib8000_attach, &adap->dev->i2c_adap, 0x80, &dib809x_dib8000_config);
+        adap->fe = dvb_attach(dib8000_attach, &adap->dev->i2c_adap, 0x80, &dib809x_dib8000_config[0]);
+
+        return adap->fe == NULL ?  -ENODEV : 0;
+}
+
+static int nim8096md_tuner_attach(struct dvb_usb_adapter *adap)
+{
+        struct dib0700_adapter_state *st = adap->priv;
+        struct i2c_adapter *tun_i2c;
+        struct dvb_frontend *fe_slave  = dib8000_get_slave_frontend(adap->fe, 1);
+
+        if (fe_slave) {
+                tun_i2c = dib8000_get_i2c_master(fe_slave, DIBX000_I2C_INTERFACE_TUNER, 1);
+                if (dvb_attach(dib0090_register, fe_slave, tun_i2c, &dib809x_dib0090_config) == NULL)
+                        return -ENODEV;
+                fe_slave->dvb = adap->fe->dvb;
+                fe_slave->ops.tuner_ops.set_params = dib8096_set_param_override;
+        }
+        tun_i2c = dib8000_get_i2c_master(adap->fe, DIBX000_I2C_INTERFACE_TUNER, 1);
+        if (dvb_attach(dib0090_register, adap->fe, tun_i2c, &dib809x_dib0090_config) == NULL)
+                return -ENODEV;
+
+        st->set_param_save = adap->fe->ops.tuner_ops.set_params;
+        adap->fe->ops.tuner_ops.set_params = dib8096_set_param_override;
+
+        return 0;
+}
+
+static int nim8096md_frontend_attach(struct dvb_usb_adapter *adap)
+{
+        struct dvb_frontend *fe_slave;
+
+        dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
+        msleep(20);
+        dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
+        msleep(1000);
+        dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
+        dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
+        dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
+
+        dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
+
+        dib0700_ctrl_clock(adap->dev, 72, 1);
+
+        msleep(20);
+        dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
+        msleep(20);
+        dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
+
+        dib8000_i2c_enumeration(&adap->dev->i2c_adap, 2, 18, 0x80);
+
+        adap->fe = dvb_attach(dib8000_attach, &adap->dev->i2c_adap, 0x80, &dib809x_dib8000_config[0]);
+        if (adap->fe == NULL)
+                return -ENODEV;
+
+        fe_slave = dvb_attach(dib8000_attach, &adap->dev->i2c_adap, 0x82, &dib809x_dib8000_config[1]);
+        dib8000_set_slave_frontend(adap->fe, fe_slave);
+
+        return fe_slave == NULL ?  -ENODEV : 0;
+}
+
+/* STK9090M */
+static int dib90x0_pid_filter(struct dvb_usb_adapter *adapter, int index, u16 pid, int onoff)
+{
+        return dib9000_fw_pid_filter(adapter->fe, index, pid, onoff);
+}
+
+static int dib90x0_pid_filter_ctrl(struct dvb_usb_adapter *adapter, int onoff)
+{
+        return dib9000_fw_pid_filter_ctrl(adapter->fe, onoff);
+}
+
+static int dib90x0_tuner_reset(struct dvb_frontend *fe, int onoff)
+{
+        return dib9000_set_gpio(fe, 5, 0, !onoff);
+}
+
+static int dib90x0_tuner_sleep(struct dvb_frontend *fe, int onoff)
+{
+        return dib9000_set_gpio(fe, 0, 0, onoff);
+}
+
+static int dib01x0_pmu_update(struct i2c_adapter *i2c, u16 *data, u8 len)
+{
+        u8 wb[4] = { 0xc >> 8, 0xc & 0xff, 0, 0 };
+        u8 rb[2];
+        struct i2c_msg msg[2] = {
+                {.addr = 0x1e >> 1, .flags = 0, .buf = wb, .len = 2},
+                {.addr = 0x1e >> 1, .flags = I2C_M_RD, .buf = rb, .len = 2},
+        };
+        u8 index_data;
+
+        dibx000_i2c_set_speed(i2c, 250);
+
+        if (i2c_transfer(i2c, msg, 2) != 2)
+                return -EIO;
+
+        switch (rb[0] << 8 | rb[1]) {
+        case 0:
+                        deb_info("Found DiB0170 rev1: This version of DiB0170 is not supported any longer.\n");
+                        return -EIO;
+        case 1:
+                        deb_info("Found DiB0170 rev2");
+                        break;
+        case 2:
+                        deb_info("Found DiB0190 rev2");
+                        break;
+        default:
+                        deb_info("DiB01x0 not found");
+                        return -EIO;
+        }
+
+        for (index_data = 0; index_data < len; index_data += 2) {
+                wb[2] = (data[index_data + 1] >> 8) & 0xff;
+                wb[3] = (data[index_data + 1]) & 0xff;
+
+                if (data[index_data] == 0) {
+                        wb[0] = (data[index_data] >> 8) & 0xff;
+                        wb[1] = (data[index_data]) & 0xff;
+                        msg[0].len = 2;
+                        if (i2c_transfer(i2c, msg, 2) != 2)
+                                return -EIO;
+                        wb[2] |= rb[0];
+                        wb[3] |= rb[1] & ~(3 << 4);
+                }
+
+                wb[0] = (data[index_data] >> 8)&0xff;
+                wb[1] = (data[index_data])&0xff;
+                msg[0].len = 4;
+                if (i2c_transfer(i2c, &msg[0], 1) != 1)
+                        return -EIO;
+        }
+        return 0;
+}
+
+static struct dib9000_config stk9090m_config = {
+        .output_mpeg2_in_188_bytes = 1,
+        .output_mode = OUTMODE_MPEG2_FIFO,
+        .vcxo_timer = 279620,
+        .timing_frequency = 20452225,
+        .demod_clock_khz = 60000,
+        .xtal_clock_khz = 30000,
+        .if_drives = (0 << 15) | (1 << 13) | (0 << 12) | (3 << 10) | (0 << 9) | (1 << 7) | (0 << 6) | (0 << 4) | (1 << 3) | (1 << 1) | (0),
+        .subband = {
+                2,
+                {
+                        { 240, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0008, 0x0000, 0x0008 } }, /* GPIO 3 to 1 for VHF */
+                        { 890, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0008, 0x0000, 0x0000 } }, /* GPIO 3 to 0 for UHF */
+                        { 0 },
+                },
+        },
+        .gpio_function = {
+                { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_ON, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = (0x10 & ~0x1) | 0x20 },
+                { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_OFF, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = 0 | 0x21 },
+        },
+};
+
+static struct dib9000_config nim9090md_config[2] = {
+        {
+                .output_mpeg2_in_188_bytes = 1,
+                .output_mode = OUTMODE_MPEG2_FIFO,
+                .vcxo_timer = 279620,
+                .timing_frequency = 20452225,
+                .demod_clock_khz = 60000,
+                .xtal_clock_khz = 30000,
+                .if_drives = (0 << 15) | (1 << 13) | (0 << 12) | (3 << 10) | (0 << 9) | (1 << 7) | (0 << 6) | (0 << 4) | (1 << 3) | (1 << 1) | (0),
+        }, {
+                .output_mpeg2_in_188_bytes = 1,
+                .output_mode = OUTMODE_DIVERSITY,
+                .vcxo_timer = 279620,
+                .timing_frequency = 20452225,
+                .demod_clock_khz = 60000,
+                .xtal_clock_khz = 30000,
+                .if_drives = (0 << 15) | (1 << 13) | (0 << 12) | (3 << 10) | (0 << 9) | (1 << 7) | (0 << 6) | (0 << 4) | (1 << 3) | (1 << 1) | (0),
+                .subband = {
+                        2,
+                        {
+                                { 240, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0006, 0x0000, 0x0006 } }, /* GPIO 1 and 2 to 1 for VHF */
+                                { 890, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0006, 0x0000, 0x0000 } }, /* GPIO 1 and 2 to 0 for UHF */
+                                { 0 },
+                        },
+                },
+                .gpio_function = {
+                        { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_ON, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = (0x10 & ~0x1) | 0x20 },
+                        { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_OFF, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = 0 | 0x21 },
+                },
+        }
+};
+
+static struct dib0090_config dib9090_dib0090_config = {
+        .io.pll_bypass = 0,
+        .io.pll_range = 1,
+        .io.pll_prediv = 1,
+        .io.pll_loopdiv = 8,
+        .io.adc_clock_ratio = 8,
+        .io.pll_int_loop_filt = 0,
+        .io.clock_khz = 30000,
+        .reset = dib90x0_tuner_reset,
+        .sleep = dib90x0_tuner_sleep,
+        .clkouttobamse = 0,
+        .analog_output = 0,
+        .use_pwm_agc = 0,
+        .clkoutdrive = 0,
+        .freq_offset_khz_uhf = 0,
+        .freq_offset_khz_vhf = 0,
+};
+
+static struct dib0090_config nim9090md_dib0090_config[2] = {
+        {
+                .io.pll_bypass = 0,
+                .io.pll_range = 1,
+                .io.pll_prediv = 1,
+                .io.pll_loopdiv = 8,
+                .io.adc_clock_ratio = 8,
+                .io.pll_int_loop_filt = 0,
+                .io.clock_khz = 30000,
+                .reset = dib90x0_tuner_reset,
+                .sleep = dib90x0_tuner_sleep,
+                .clkouttobamse = 1,
+                .analog_output = 0,
+                .use_pwm_agc = 0,
+                .clkoutdrive = 0,
+                .freq_offset_khz_uhf = 0,
+                .freq_offset_khz_vhf = 0,
+        }, {
+                .io.pll_bypass = 0,
+                .io.pll_range = 1,
+                .io.pll_prediv = 1,
+                .io.pll_loopdiv = 8,
+                .io.adc_clock_ratio = 8,
+                .io.pll_int_loop_filt = 0,
+                .io.clock_khz = 30000,
+                .reset = dib90x0_tuner_reset,
+                .sleep = dib90x0_tuner_sleep,
+                .clkouttobamse = 0,
+                .analog_output = 0,
+                .use_pwm_agc = 0,
+                .clkoutdrive = 0,
+                .freq_offset_khz_uhf = 0,
+                .freq_offset_khz_vhf = 0,
+        }
+};
+
+
+static int stk9090m_frontend_attach(struct dvb_usb_adapter *adap)
+{
+        struct dib0700_adapter_state *state = adap->priv;
+        struct dib0700_state *st = adap->dev->priv;
+        u32 fw_version;
+
+        /* Make use of the new i2c functions from FW 1.20 */
+        dib0700_get_version(adap->dev, NULL, NULL, &fw_version, NULL);
+        if (fw_version >= 0x10200)
+                st->fw_use_new_i2c_api = 1;
+        dib0700_set_i2c_speed(adap->dev, 340);
+
+        dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
+        msleep(20);
+        dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
+        dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
+        dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
+        dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
+
+        dib0700_ctrl_clock(adap->dev, 72, 1);
+
+        msleep(20);
+        dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
+        msleep(20);
+        dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
+
+        dib9000_i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, 0x80);
+
+        if (request_firmware(&state->frontend_firmware, "dib9090.fw", &adap->dev->udev->dev)) {
+                deb_info("%s: Upload failed. (file not found?)\n", __func__);
+                return -ENODEV;
+        } else {
+                deb_info("%s: firmware read %Zu bytes.\n", __func__, state->frontend_firmware->size);
+        }
+        stk9090m_config.microcode_B_fe_size = state->frontend_firmware->size;
+        stk9090m_config.microcode_B_fe_buffer = state->frontend_firmware->data;
+
+        adap->fe = dvb_attach(dib9000_attach, &adap->dev->i2c_adap, 0x80, &stk9090m_config);
+
+        return adap->fe == NULL ?  -ENODEV : 0;
+}
+
+static int dib9090_tuner_attach(struct dvb_usb_adapter *adap)
+{
+        struct dib0700_adapter_state *state = adap->priv;
+        struct i2c_adapter *i2c = dib9000_get_tuner_interface(adap->fe);
+        u16 data_dib190[10] = {
+                1, 0x1374,
+                2, 0x01a2,
+                7, 0x0020,
+                0, 0x00ef,
+                8, 0x0486,
+        };
+
+        if (dvb_attach(dib0090_fw_register, adap->fe, i2c, &dib9090_dib0090_config) == NULL)
+                return -ENODEV;
+        i2c = dib9000_get_i2c_master(adap->fe, DIBX000_I2C_INTERFACE_GPIO_1_2, 0);
+        if (dib01x0_pmu_update(i2c, data_dib190, 10) != 0)
+                return -ENODEV;
+        dib0700_set_i2c_speed(adap->dev, 2000);
+        if (dib9000_firmware_post_pll_init(adap->fe) < 0)
+                return -ENODEV;
+        release_firmware(state->frontend_firmware);
+        return 0;
+}
+
+static int nim9090md_frontend_attach(struct dvb_usb_adapter *adap)
+{
+        struct dib0700_adapter_state *state = adap->priv;
+        struct dib0700_state *st = adap->dev->priv;
+        struct i2c_adapter *i2c;
+        struct dvb_frontend *fe_slave;
+        u32 fw_version;
+
+        /* Make use of the new i2c functions from FW 1.20 */
+        dib0700_get_version(adap->dev, NULL, NULL, &fw_version, NULL);
+        if (fw_version >= 0x10200)
+                st->fw_use_new_i2c_api = 1;
+        dib0700_set_i2c_speed(adap->dev, 340);
+
+        dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
+        msleep(20);
+        dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
+        dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
+        dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
+        dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
+
+        dib0700_ctrl_clock(adap->dev, 72, 1);
+
+        msleep(20);
+        dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
+        msleep(20);
+        dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
+
+        if (request_firmware(&state->frontend_firmware, "dib9090.fw", &adap->dev->udev->dev)) {
+                deb_info("%s: Upload failed. (file not found?)\n", __func__);
+                return -EIO;
+        } else {
+                deb_info("%s: firmware read %Zu bytes.\n", __func__, state->frontend_firmware->size);
+        }
+        nim9090md_config[0].microcode_B_fe_size = state->frontend_firmware->size;
+        nim9090md_config[0].microcode_B_fe_buffer = state->frontend_firmware->data;
+        nim9090md_config[1].microcode_B_fe_size = state->frontend_firmware->size;
+        nim9090md_config[1].microcode_B_fe_buffer = state->frontend_firmware->data;
+
+        dib9000_i2c_enumeration(&adap->dev->i2c_adap, 1, 0x20, 0x80);
+        adap->fe = dvb_attach(dib9000_attach, &adap->dev->i2c_adap, 0x80, &nim9090md_config[0]);
+
+        if (adap->fe == NULL)
+                return -ENODEV;
+
+        i2c = dib9000_get_i2c_master(adap->fe, DIBX000_I2C_INTERFACE_GPIO_3_4, 0);
+        dib9000_i2c_enumeration(i2c, 1, 0x12, 0x82);
+
+        fe_slave = dvb_attach(dib9000_attach, i2c, 0x82, &nim9090md_config[1]);
+        dib9000_set_slave_frontend(adap->fe, fe_slave);
+
+        return fe_slave == NULL ?  -ENODEV : 0;
+}
+
+static int nim9090md_tuner_attach(struct dvb_usb_adapter *adap)
+{
+        struct dib0700_adapter_state *state = adap->priv;
+        struct i2c_adapter *i2c;
+        struct dvb_frontend *fe_slave;
+        u16 data_dib190[10] = {
+                1, 0x5374,
+                2, 0x01ae,
+                7, 0x0020,
+                0, 0x00ef,
+                8, 0x0406,
+        };
+        i2c = dib9000_get_tuner_interface(adap->fe);
+        if (dvb_attach(dib0090_fw_register, adap->fe, i2c, &nim9090md_dib0090_config[0]) == NULL)
+                return -ENODEV;
+        i2c = dib9000_get_i2c_master(adap->fe, DIBX000_I2C_INTERFACE_GPIO_1_2, 0);
+        if (dib01x0_pmu_update(i2c, data_dib190, 10) < 0)
+                return -ENODEV;
+        dib0700_set_i2c_speed(adap->dev, 2000);
+        if (dib9000_firmware_post_pll_init(adap->fe) < 0)
+                return -ENODEV;
+
+        fe_slave = dib9000_get_slave_frontend(adap->fe, 1);
+        if (fe_slave != NULL) {
+                i2c = dib9000_get_component_bus_interface(adap->fe);
+                dib9000_set_i2c_adapter(fe_slave, i2c);
+
+                i2c = dib9000_get_tuner_interface(fe_slave);
+                if (dvb_attach(dib0090_fw_register, fe_slave, i2c, &nim9090md_dib0090_config[1]) == NULL)
+                        return -ENODEV;
+                fe_slave->dvb = adap->fe->dvb;
+                dib9000_fw_set_component_bus_speed(adap->fe, 2000);
+                if (dib9000_firmware_post_pll_init(fe_slave) < 0)
+                        return -ENODEV;
+        }
+        release_firmware(state->frontend_firmware);
+
+        return 0;
+}
+
+/* NIM7090 */
+struct dib7090p_best_adc {
+        u32 timf;
+        u32 pll_loopdiv;
+        u32 pll_prediv;
+};
+
+static int dib7090p_get_best_sampling(struct dvb_frontend *fe , struct dib7090p_best_adc *adc)
+{
+        u8 spur = 0, prediv = 0, loopdiv = 0, min_prediv = 1, max_prediv = 1;
+
+        u16 xtal = 12000;
+        u32 fcp_min = 1900;  /* PLL Minimum Frequency comparator KHz */
+        u32 fcp_max = 20000; /* PLL Maximum Frequency comparator KHz */
+        u32 fdem_max = 76000;
+        u32 fdem_min = 69500;
+        u32 fcp = 0, fs = 0, fdem = 0;
+        u32 harmonic_id = 0;
+
+        adc->pll_loopdiv = loopdiv;
+        adc->pll_prediv = prediv;
+        adc->timf = 0;
+
+        deb_info("bandwidth = %d fdem_min =%d", fe->dtv_property_cache.bandwidth_hz, fdem_min);
+
+        /* Find Min and Max prediv */
+        while ((xtal/max_prediv) >= fcp_min)
+                max_prediv++;
+
+        max_prediv--;
+        min_prediv = max_prediv;
+        while ((xtal/min_prediv) <= fcp_max) {
+                min_prediv--;
+                if (min_prediv == 1)
+                        break;
+        }
+        deb_info("MIN prediv = %d : MAX prediv = %d", min_prediv, max_prediv);
+
+        min_prediv = 2;
+
+        for (prediv = min_prediv ; prediv < max_prediv; prediv++) {
+                fcp = xtal / prediv;
+                if (fcp > fcp_min && fcp < fcp_max) {
+                        for (loopdiv = 1 ; loopdiv < 64 ; loopdiv++) {
+                                fdem = ((xtal/prediv) * loopdiv);
+                                fs   = fdem / 4;
+                                /* test min/max system restrictions */
+
+                                if ((fdem >= fdem_min) && (fdem <= fdem_max) && (fs >= fe->dtv_property_cache.bandwidth_hz/1000)) {
+                                        spur = 0;
+                                        /* test fs harmonics positions */
+                                        for (harmonic_id = (fe->dtv_property_cache.frequency / (1000*fs)) ;  harmonic_id <= ((fe->dtv_property_cache.frequency / (1000*fs))+1) ; harmonic_id++) {
+                                                if (((fs*harmonic_id) >= ((fe->dtv_property_cache.frequency/1000) - (fe->dtv_property_cache.bandwidth_hz/2000))) &&  ((fs*harmonic_id) <= ((fe->dtv_property_cache.frequency/1000) + (fe->dtv_property_cache.bandwidth_hz/2000)))) {
+                                                        spur = 1;
+                                                        break;
+                                                }
+                                        }
+
+                                        if (!spur) {
+                                                adc->pll_loopdiv = loopdiv;
+                                                adc->pll_prediv = prediv;
+                                                adc->timf = 2396745143UL/fdem*(1 << 9);
+                                                adc->timf += ((2396745143UL%fdem) << 9)/fdem;
+                                                deb_info("loopdiv=%i prediv=%i timf=%i", loopdiv, prediv, adc->timf);
+                                                break;
+                                        }
+                                }
+                        }
+                }
+                if (!spur)
+                        break;
+        }
+
+
+        if (adc->pll_loopdiv == 0 && adc->pll_prediv == 0)
+                return -EINVAL;
+        else
+                return 0;
+}
+
+static int dib7090_agc_startup(struct dvb_frontend *fe, struct dvb_frontend_parameters *fep)
+{
+        struct dvb_usb_adapter *adap = fe->dvb->priv;
+        struct dib0700_adapter_state *state = adap->priv;
+        struct dibx000_bandwidth_config pll;
+        u16 target;
+        struct dib7090p_best_adc adc;
+        int ret;
+
+        ret = state->set_param_save(fe, fep);
+        if (ret < 0)
+                return ret;
+
+        memset(&pll, 0, sizeof(struct dibx000_bandwidth_config));
+        dib0090_pwm_gain_reset(fe);
+        target = (dib0090_get_wbd_offset(fe) * 8 + 1) / 2;
+        dib7000p_set_wbd_ref(fe, target);
+
+        if (dib7090p_get_best_sampling(fe, &adc) == 0) {
+                pll.pll_ratio  = adc.pll_loopdiv;
+                pll.pll_prediv = adc.pll_prediv;
+
+                dib7000p_update_pll(fe, &pll);
+                dib7000p_ctrl_timf(fe, DEMOD_TIMF_SET, adc.timf);
+        }
+        return 0;
+}
+
+static struct dib0090_wbd_slope dib7090_wbd_table[] = {
+        { 380,   81, 850, 64, 540,  4},
+        { 860,   51, 866, 21,  375, 4},
+        {1700,    0, 250, 0,   100, 6},
+        {2600,    0, 250, 0,   100, 6},
+        { 0xFFFF, 0,   0, 0,   0,   0},
+};
+
+struct dibx000_agc_config dib7090_agc_config[2] = {
+        {
+                .band_caps      = BAND_UHF,
+                /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
+                * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
+                .setup          = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
+
+                .inv_gain       = 687,
+                .time_stabiliz  = 10,
+
+                .alpha_level    = 0,
+                .thlock         = 118,
+
+                .wbd_inv        = 0,
+                .wbd_ref        = 1200,
+                .wbd_sel        = 3,
+                .wbd_alpha      = 5,
+
+                .agc1_max       = 65535,
+                .agc1_min       = 0,
+
+                .agc2_max       = 65535,
+                .agc2_min       = 0,
+
+                .agc1_pt1       = 0,
+                .agc1_pt2       = 32,
+                .agc1_pt3       = 114,
+                .agc1_slope1    = 143,
+                .agc1_slope2    = 144,
+                .agc2_pt1       = 114,
+                .agc2_pt2       = 227,
+                .agc2_slope1    = 116,
+                .agc2_slope2    = 117,
+
+                .alpha_mant     = 18,
+                .alpha_exp      = 0,
+                .beta_mant      = 20,
+                .beta_exp       = 59,
+
+                .perform_agc_softsplit = 0,
+        } , {
+                .band_caps      = BAND_FM | BAND_VHF | BAND_CBAND,
+                /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
+                * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
+                .setup          = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
+
+                .inv_gain       = 732,
+                .time_stabiliz  = 10,
+
+                .alpha_level    = 0,
+                .thlock         = 118,
+
+                .wbd_inv        = 0,
+                .wbd_ref        = 1200,
+                .wbd_sel        = 3,
+                .wbd_alpha      = 5,
+
+                .agc1_max       = 65535,
+                .agc1_min       = 0,
+
+                .agc2_max       = 65535,
+                .agc2_min       = 0,
+
+                .agc1_pt1       = 0,
+                .agc1_pt2       = 0,
+                .agc1_pt3       = 98,
+                .agc1_slope1    = 0,
+                .agc1_slope2    = 167,
+                .agc2_pt1       = 98,
+                .agc2_pt2       = 255,
+                .agc2_slope1    = 104,
+                .agc2_slope2    = 0,
+
+                .alpha_mant     = 18,
+                .alpha_exp      = 0,
+                .beta_mant      = 20,
+                .beta_exp       = 59,
+
+                .perform_agc_softsplit = 0,
+        }
+};
+
+static struct dibx000_bandwidth_config dib7090_clock_config_12_mhz = {
+        60000, 15000,
+        1, 5, 0, 0, 0,
+        0, 0, 1, 1, 2,
+        (3 << 14) | (1 << 12) | (524 << 0),
+        (0 << 25) | 0,
+        20452225,
+        15000000,
+};
+
+static struct dib7000p_config nim7090_dib7000p_config = {
+        .output_mpeg2_in_188_bytes  = 1,
+        .hostbus_diversity                      = 1,
+        .tuner_is_baseband                      = 1,
+        .update_lna                                     = NULL,
+
+        .agc_config_count                       = 2,
+        .agc                                            = dib7090_agc_config,
+
+        .bw                                                     = &dib7090_clock_config_12_mhz,
+
+        .gpio_dir                                       = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
+        .gpio_val                                       = DIB7000P_GPIO_DEFAULT_VALUES,
+        .gpio_pwm_pos                           = DIB7000P_GPIO_DEFAULT_PWM_POS,
+
+        .pwm_freq_div                           = 0,
+
+        .agc_control                            = dib7090_agc_restart,
+
+        .spur_protect                           = 0,
+        .disable_sample_and_hold        = 0,
+        .enable_current_mirror          = 0,
+        .diversity_delay                        = 0,
+
+        .output_mode                            = OUTMODE_MPEG2_FIFO,
+        .enMpegOutput                           = 1,
+};
+
+static struct dib7000p_config tfe7090pvr_dib7000p_config[2] = {
+        {
+                .output_mpeg2_in_188_bytes  = 1,
+                .hostbus_diversity                      = 1,
+                .tuner_is_baseband                      = 1,
+                .update_lna                                     = NULL,
+
+                .agc_config_count                       = 2,
+                .agc                                            = dib7090_agc_config,
+
+                .bw                                                     = &dib7090_clock_config_12_mhz,
+
+                .gpio_dir                                       = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
+                .gpio_val                                       = DIB7000P_GPIO_DEFAULT_VALUES,
+                .gpio_pwm_pos                           = DIB7000P_GPIO_DEFAULT_PWM_POS,
+
+                .pwm_freq_div                           = 0,
+
+                .agc_control                            = dib7090_agc_restart,
+
+                .spur_protect                           = 0,
+                .disable_sample_and_hold        = 0,
+                .enable_current_mirror          = 0,
+                .diversity_delay                        = 0,
+
+                .output_mode                            = OUTMODE_MPEG2_PAR_GATED_CLK,
+                .default_i2c_addr                       = 0x90,
+                .enMpegOutput                           = 1,
+        }, {
+                .output_mpeg2_in_188_bytes  = 1,
+                .hostbus_diversity                      = 1,
+                .tuner_is_baseband                      = 1,
+                .update_lna                                     = NULL,
+
+                .agc_config_count                       = 2,
+                .agc                                            = dib7090_agc_config,
+
+                .bw                                                     = &dib7090_clock_config_12_mhz,
+
+                .gpio_dir                                       = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
+                .gpio_val                                       = DIB7000P_GPIO_DEFAULT_VALUES,
+                .gpio_pwm_pos                           = DIB7000P_GPIO_DEFAULT_PWM_POS,
+
+                .pwm_freq_div                           = 0,
+
+                .agc_control                            = dib7090_agc_restart,
+
+                .spur_protect                           = 0,
+                .disable_sample_and_hold        = 0,
+                .enable_current_mirror          = 0,
+                .diversity_delay                        = 0,
+
+                .output_mode                            = OUTMODE_MPEG2_PAR_GATED_CLK,
+                .default_i2c_addr                       = 0x92,
+                .enMpegOutput                           = 0,
+        }
+};
+
+static const struct dib0090_config nim7090_dib0090_config = {
+        .io.clock_khz = 12000,
+        .io.pll_bypass = 0,
+        .io.pll_range = 0,
+        .io.pll_prediv = 3,
+        .io.pll_loopdiv = 6,
+        .io.adc_clock_ratio = 0,
+        .io.pll_int_loop_filt = 0,
+        .reset = dib7090_tuner_sleep,
+        .sleep = dib7090_tuner_sleep,
+
+        .freq_offset_khz_uhf = 0,
+        .freq_offset_khz_vhf = 0,
+
+        .get_adc_power = dib7090_get_adc_power,
+
+        .clkouttobamse = 1,
+        .analog_output = 0,
+
+        .wbd_vhf_offset = 0,
+        .wbd_cband_offset = 0,
+        .use_pwm_agc = 1,
+        .clkoutdrive = 0,
+
+        .fref_clock_ratio = 0,
+
+        .wbd = dib7090_wbd_table,
+
+        .ls_cfg_pad_drv = 0,
+        .data_tx_drv = 0,
+        .low_if = NULL,
+        .in_soc = 1,
+};
+
+static const struct dib0090_config tfe7090pvr_dib0090_config[2] = {
+        {
+                .io.clock_khz = 12000,
+                .io.pll_bypass = 0,
+                .io.pll_range = 0,
+                .io.pll_prediv = 3,
+                .io.pll_loopdiv = 6,
+                .io.adc_clock_ratio = 0,
+                .io.pll_int_loop_filt = 0,
+                .reset = dib7090_tuner_sleep,
+                .sleep = dib7090_tuner_sleep,
+
+                .freq_offset_khz_uhf = 50,
+                .freq_offset_khz_vhf = 70,
+
+                .get_adc_power = dib7090_get_adc_power,
+
+                .clkouttobamse = 1,
+                .analog_output = 0,
+
+                .wbd_vhf_offset = 0,
+                .wbd_cband_offset = 0,
+                .use_pwm_agc = 1,
+                .clkoutdrive = 0,
+
+                .fref_clock_ratio = 0,
+
+                .wbd = dib7090_wbd_table,
+
+                .ls_cfg_pad_drv = 0,
+                .data_tx_drv = 0,
+                .low_if = NULL,
+                .in_soc = 1,
+        }, {
+                .io.clock_khz = 12000,
+                .io.pll_bypass = 0,
+                .io.pll_range = 0,
+                .io.pll_prediv = 3,
+                .io.pll_loopdiv = 6,
+                .io.adc_clock_ratio = 0,
+                .io.pll_int_loop_filt = 0,
+                .reset = dib7090_tuner_sleep,
+                .sleep = dib7090_tuner_sleep,
+
+                .freq_offset_khz_uhf = -50,
+                .freq_offset_khz_vhf = -70,
+
+                .get_adc_power = dib7090_get_adc_power,
+
+                .clkouttobamse = 1,
+                .analog_output = 0,
+
+                .wbd_vhf_offset = 0,
+                .wbd_cband_offset = 0,
+                .use_pwm_agc = 1,
+                .clkoutdrive = 0,
+
+                .fref_clock_ratio = 0,
+
+                .wbd = dib7090_wbd_table,
+
+                .ls_cfg_pad_drv = 0,
+                .data_tx_drv = 0,
+                .low_if = NULL,
+                .in_soc = 1,
+        }
+};
+
+static int nim7090_frontend_attach(struct dvb_usb_adapter *adap)
+{
+        dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
+        msleep(20);
+        dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
+        dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
+        dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
+        dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
+
+        msleep(20);
+        dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
+        msleep(20);
+        dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
+
+        if (dib7000p_i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, &nim7090_dib7000p_config) != 0) {
+                err("%s: dib7000p_i2c_enumeration failed.  Cannot continue\n", __func__);
+                return -ENODEV;
+        }
+        adap->fe = dvb_attach(dib7000p_attach, &adap->dev->i2c_adap, 0x80, &nim7090_dib7000p_config);
 
         return adap->fe == NULL ?  -ENODEV : 0;
 }
 
+static int nim7090_tuner_attach(struct dvb_usb_adapter *adap)
+{
+        struct dib0700_adapter_state *st = adap->priv;
+        struct i2c_adapter *tun_i2c = dib7090_get_i2c_tuner(adap->fe);
+
+        if (dvb_attach(dib0090_register, adap->fe, tun_i2c, &nim7090_dib0090_config) == NULL)
+                return -ENODEV;
+
+        dib7000p_set_gpio(adap->fe, 8, 0, 1);
+
+        st->set_param_save = adap->fe->ops.tuner_ops.set_params;
+        adap->fe->ops.tuner_ops.set_params = dib7090_agc_startup;
+        return 0;
+}
+
+static int tfe7090pvr_frontend0_attach(struct dvb_usb_adapter *adap)
+{
+        struct dib0700_state *st = adap->dev->priv;
+
+        /* The TFE7090 requires the dib0700 to not be in master mode */
+        st->disable_streaming_master_mode = 1;
+
+        dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
+        msleep(20);
+        dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
+        dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
+        dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
+        dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
+
+        msleep(20);
+        dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
+        msleep(20);
+        dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
+
+        /* initialize IC 0 */
+        if (dib7000p_i2c_enumeration(&adap->dev->i2c_adap, 1, 0x20, &tfe7090pvr_dib7000p_config[0]) != 0) {
+                err("%s: dib7000p_i2c_enumeration failed.  Cannot continue\n", __func__);
+                return -ENODEV;
+        }
+
+        dib0700_set_i2c_speed(adap->dev, 340);
+        adap->fe = dvb_attach(dib7000p_attach, &adap->dev->i2c_adap, 0x90, &tfe7090pvr_dib7000p_config[0]);
+        if (adap->fe == NULL)
+                return -ENODEV;
+
+        dib7090_slave_reset(adap->fe);
+
+        return 0;
+}
+
+static int tfe7090pvr_frontend1_attach(struct dvb_usb_adapter *adap)
+{
+        struct i2c_adapter *i2c;
+
+        if (adap->dev->adapter[0].fe == NULL) {
+                err("the master dib7090 has to be initialized first");
+                return -ENODEV; /* the master device has not been initialized */
+        }
+
+        i2c = dib7000p_get_i2c_master(adap->dev->adapter[0].fe, DIBX000_I2C_INTERFACE_GPIO_6_7, 1);
+        if (dib7000p_i2c_enumeration(i2c, 1, 0x10, &tfe7090pvr_dib7000p_config[1]) != 0) {
+                err("%s: dib7000p_i2c_enumeration failed.  Cannot continue\n", __func__);
+                return -ENODEV;
+        }
+
+        adap->fe = dvb_attach(dib7000p_attach, i2c, 0x92, &tfe7090pvr_dib7000p_config[1]);
+        dib0700_set_i2c_speed(adap->dev, 200);
+
+        return adap->fe == NULL ? -ENODEV : 0;
+}
+
+static int tfe7090pvr_tuner0_attach(struct dvb_usb_adapter *adap)
+{
+        struct dib0700_adapter_state *st = adap->priv;
+        struct i2c_adapter *tun_i2c = dib7090_get_i2c_tuner(adap->fe);
+
+        if (dvb_attach(dib0090_register, adap->fe, tun_i2c, &tfe7090pvr_dib0090_config[0]) == NULL)
+                return -ENODEV;
+
+        dib7000p_set_gpio(adap->fe, 8, 0, 1);
+
+        st->set_param_save = adap->fe->ops.tuner_ops.set_params;
+        adap->fe->ops.tuner_ops.set_params = dib7090_agc_startup;
+        return 0;
+}
+
+static int tfe7090pvr_tuner1_attach(struct dvb_usb_adapter *adap)
+{
+        struct dib0700_adapter_state *st = adap->priv;
+        struct i2c_adapter *tun_i2c = dib7090_get_i2c_tuner(adap->fe);
+
+        if (dvb_attach(dib0090_register, adap->fe, tun_i2c, &tfe7090pvr_dib0090_config[1]) == NULL)
+                return -ENODEV;
+
+        dib7000p_set_gpio(adap->fe, 8, 0, 1);
+
+        st->set_param_save = adap->fe->ops.tuner_ops.set_params;
+        adap->fe->ops.tuner_ops.set_params = dib7090_agc_startup;
+        return 0;
+}
+
 /* STK7070PD */
 static struct dib7000p_config stk7070pd_dib7000p_config[2] = {
         {
@@ -1839,6 +2795,13 @@ struct usb_device_id dib0700_usb_id_table[] = {
         { USB_DEVICE(USB_VID_PINNACLE,  USB_PID_PINNACLE_PCTV282E) },
         { USB_DEVICE(USB_VID_DIBCOM,    USB_PID_DIBCOM_STK8096GP) },
         { USB_DEVICE(USB_VID_ELGATO,    USB_PID_ELGATO_EYETV_DIVERSITY) },
+        { USB_DEVICE(USB_VID_DIBCOM,    USB_PID_DIBCOM_NIM9090M) },
+/* 70 */{ USB_DEVICE(USB_VID_DIBCOM,    USB_PID_DIBCOM_NIM8096MD) },
+        { USB_DEVICE(USB_VID_DIBCOM,    USB_PID_DIBCOM_NIM9090MD) },
+        { USB_DEVICE(USB_VID_DIBCOM,    USB_PID_DIBCOM_NIM7090) },
+        { USB_DEVICE(USB_VID_DIBCOM,    USB_PID_DIBCOM_TFE7090PVR) },
+        { USB_DEVICE(USB_VID_TECHNISAT, USB_PID_TECHNISAT_AIRSTAR_TELESTICK_2) },
+/* 75 */{ USB_DEVICE(USB_VID_MEDION,    USB_PID_CREATIX_CTX1921) },
         { 0 }           /* Terminating entry */
 };
 MODULE_DEVICE_TABLE(usb, dib0700_usb_id_table);
@@ -1875,8 +2838,8 @@ struct dvb_usb_device_properties dib0700_devices[] = {
                         {
                                 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
                                 .pid_filter_count = 32,
-                                .pid_filter       = stk70x0p_pid_filter,
-                                .pid_filter_ctrl  = stk70x0p_pid_filter_ctrl,
+                                .pid_filter       = stk7700p_pid_filter,
+                                .pid_filter_ctrl  = stk7700p_pid_filter_ctrl,
                                 .frontend_attach  = stk7700p_frontend_attach,
                                 .tuner_attach     = stk7700p_tuner_attach,
 
@@ -1924,12 +2887,10 @@ struct dvb_usb_device_properties dib0700_devices[] = {
                         .rc_interval      = DEFAULT_RC_INTERVAL,
                         .rc_codes         = RC_MAP_DIB0700_RC5_TABLE,
                         .rc_query         = dib0700_rc_query_old_firmware,
-                        .rc_props = {
-                                .allowed_protos = IR_TYPE_RC5 |
-                                                  IR_TYPE_RC6 |
-                                                  IR_TYPE_NEC,
-                                .change_protocol = dib0700_change_protocol,
-                        },
+                        .allowed_protos   = RC_TYPE_RC5 |
+                                            RC_TYPE_RC6 |
+                                            RC_TYPE_NEC,
+                        .change_protocol  = dib0700_change_protocol,
                 },
         }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
 
@@ -1960,12 +2921,10 @@ struct dvb_usb_device_properties dib0700_devices[] = {
                         .rc_interval      = DEFAULT_RC_INTERVAL,
                         .rc_codes         = RC_MAP_DIB0700_RC5_TABLE,
                         .rc_query         = dib0700_rc_query_old_firmware,
-                        .rc_props = {
-                                .allowed_protos = IR_TYPE_RC5 |
-                                                  IR_TYPE_RC6 |
-                                                  IR_TYPE_NEC,
-                                .change_protocol = dib0700_change_protocol,
-                        },
+                        .allowed_protos   = RC_TYPE_RC5 |
+                                            RC_TYPE_RC6 |
+                                            RC_TYPE_NEC,
+                        .change_protocol = dib0700_change_protocol,
                 },
         }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
 
@@ -2021,12 +2980,10 @@ struct dvb_usb_device_properties dib0700_devices[] = {
                         .rc_interval      = DEFAULT_RC_INTERVAL,
                         .rc_codes         = RC_MAP_DIB0700_RC5_TABLE,
                         .rc_query         = dib0700_rc_query_old_firmware,
-                        .rc_props = {
-                                .allowed_protos = IR_TYPE_RC5 |
-                                                  IR_TYPE_RC6 |
-                                                  IR_TYPE_NEC,
-                                .change_protocol = dib0700_change_protocol,
-                        },
+                        .allowed_protos   = RC_TYPE_RC5 |
+                                            RC_TYPE_RC6 |
+                                            RC_TYPE_NEC,
+                        .change_protocol = dib0700_change_protocol,
                 },
         }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
 
@@ -2065,12 +3022,10 @@ struct dvb_usb_device_properties dib0700_devices[] = {
                         .rc_codes         = RC_MAP_DIB0700_RC5_TABLE,
                         .module_name      = "dib0700",
                         .rc_query         = dib0700_rc_query_old_firmware,
-                        .rc_props = {
-                                .allowed_protos = IR_TYPE_RC5 |
-                                                  IR_TYPE_RC6 |
-                                                  IR_TYPE_NEC,
-                                .change_protocol = dib0700_change_protocol,
-                        },
+                        .allowed_protos   = RC_TYPE_RC5 |
+                                            RC_TYPE_RC6 |
+                                            RC_TYPE_NEC,
+                        .change_protocol = dib0700_change_protocol,
                 },
         }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
 
@@ -2143,12 +3098,10 @@ struct dvb_usb_device_properties dib0700_devices[] = {
                         .rc_codes         = RC_MAP_DIB0700_RC5_TABLE,
                         .module_name      = "dib0700",
                         .rc_query         = dib0700_rc_query_old_firmware,
-                        .rc_props = {
-                                .allowed_protos = IR_TYPE_RC5 |
-                                                  IR_TYPE_RC6 |
-                                                  IR_TYPE_NEC,
-                                .change_protocol = dib0700_change_protocol,
-                        },
+                        .allowed_protos   = RC_TYPE_RC5 |
+                                            RC_TYPE_RC6 |
+                                            RC_TYPE_NEC,
+                        .change_protocol  = dib0700_change_protocol,
                 },
         }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
 
@@ -2189,12 +3142,10 @@ struct dvb_usb_device_properties dib0700_devices[] = {
                         .rc_codes         = RC_MAP_DIB0700_RC5_TABLE,
                         .module_name      = "dib0700",
                         .rc_query         = dib0700_rc_query_old_firmware,
-                        .rc_props = {
-                                .allowed_protos = IR_TYPE_RC5 |
-                                                  IR_TYPE_RC6 |
-                                                  IR_TYPE_NEC,
-                                .change_protocol = dib0700_change_protocol,
-                        },
+                        .allowed_protos   = RC_TYPE_RC5 |
+                                            RC_TYPE_RC6 |
+                                            RC_TYPE_NEC,
+                        .change_protocol  = dib0700_change_protocol,
                 },
         }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
 
@@ -2259,12 +3210,10 @@ struct dvb_usb_device_properties dib0700_devices[] = {
                         .rc_codes         = RC_MAP_DIB0700_RC5_TABLE,
                         .module_name      = "dib0700",
                         .rc_query         = dib0700_rc_query_old_firmware,
-                        .rc_props = {
-                                .allowed_protos = IR_TYPE_RC5 |
-                                                  IR_TYPE_RC6 |
-                                                  IR_TYPE_NEC,
-                                .change_protocol = dib0700_change_protocol,
-                        },
+                        .allowed_protos   = RC_TYPE_RC5 |
+                                            RC_TYPE_RC6 |
+                                            RC_TYPE_NEC,
+                        .change_protocol = dib0700_change_protocol,
                 },
         }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
 
@@ -2308,12 +3257,10 @@ struct dvb_usb_device_properties dib0700_devices[] = {
                         .rc_codes         = RC_MAP_DIB0700_NEC_TABLE,
                         .module_name      = "dib0700",
                         .rc_query         = dib0700_rc_query_old_firmware,
-                        .rc_props = {
-                                .allowed_protos = IR_TYPE_RC5 |
-                                                  IR_TYPE_RC6 |
-                                                  IR_TYPE_NEC,
-                                .change_protocol = dib0700_change_protocol,
-                        },
+                        .allowed_protos   = RC_TYPE_RC5 |
+                                            RC_TYPE_RC6 |
+                                            RC_TYPE_NEC,
+                        .change_protocol  = dib0700_change_protocol,
                 },
         }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
 
@@ -2379,12 +3326,10 @@ struct dvb_usb_device_properties dib0700_devices[] = {
                         .rc_codes         = RC_MAP_DIB0700_RC5_TABLE,
                         .module_name      = "dib0700",
                         .rc_query         = dib0700_rc_query_old_firmware,
-                        .rc_props = {
-                                .allowed_protos = IR_TYPE_RC5 |
-                                                  IR_TYPE_RC6 |
-                                                  IR_TYPE_NEC,
-                                .change_protocol = dib0700_change_protocol,
-                        },
+                        .allowed_protos   = RC_TYPE_RC5 |
+                                            RC_TYPE_RC6 |
+                                            RC_TYPE_NEC,
+                        .change_protocol  = dib0700_change_protocol,
                 },
         }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
                 .num_adapters = 1,
@@ -2417,12 +3362,10 @@ struct dvb_usb_device_properties dib0700_devices[] = {
                         .rc_codes         = RC_MAP_DIB0700_RC5_TABLE,
                         .module_name      = "dib0700",
                         .rc_query         = dib0700_rc_query_old_firmware,
-                        .rc_props = {
-                                .allowed_protos = IR_TYPE_RC5 |
-                                                  IR_TYPE_RC6 |
-                                                  IR_TYPE_NEC,
-                                .change_protocol = dib0700_change_protocol,
-                        },
+                        .allowed_protos   = RC_TYPE_RC5 |
+                                            RC_TYPE_RC6 |
+                                            RC_TYPE_NEC,
+                        .change_protocol  = dib0700_change_protocol,
                 },
         }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
                 .num_adapters = 1,
@@ -2468,7 +3411,7 @@ struct dvb_usb_device_properties dib0700_devices[] = {
                         },
                 },
 
-                .num_device_descs = 2,
+                .num_device_descs = 4,
                 .devices = {
                         {   "DiBcom STK7770P reference design",
                                 { &dib0700_usb_id_table[59], NULL },
@@ -2480,6 +3423,14 @@ struct dvb_usb_device_properties dib0700_devices[] = {
                                         &dib0700_usb_id_table[60], NULL},
                                 { NULL },
                         },
+                        {   "TechniSat AirStar TeleStick 2",
+                                { &dib0700_usb_id_table[74], NULL },
+                                { NULL },
+                        },
+                        {   "Medion CTX1921 DVB-T USB",
+                                { &dib0700_usb_id_table[75], NULL },
+                                { NULL },
+                        },
                 },
 
                 .rc.core = {
@@ -2487,12 +3438,10 @@ struct dvb_usb_device_properties dib0700_devices[] = {
                         .rc_codes         = RC_MAP_DIB0700_RC5_TABLE,
                         .module_name      = "dib0700",
                         .rc_query         = dib0700_rc_query_old_firmware,
-                        .rc_props = {
-                                .allowed_protos = IR_TYPE_RC5 |
-                                                  IR_TYPE_RC6 |
-                                                  IR_TYPE_NEC,
-                                .change_protocol = dib0700_change_protocol,
-                        },
+                        .allowed_protos   = RC_TYPE_RC5 |
+                                            RC_TYPE_RC6 |
+                                            RC_TYPE_NEC,
+                        .change_protocol  = dib0700_change_protocol,
                 },
         }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
                 .num_adapters = 1,
@@ -2533,12 +3482,10 @@ struct dvb_usb_device_properties dib0700_devices[] = {
                         .rc_codes         = RC_MAP_DIB0700_NEC_TABLE,
                         .module_name      = "dib0700",
                         .rc_query         = dib0700_rc_query_old_firmware,
-                        .rc_props = {
-                                .allowed_protos = IR_TYPE_RC5 |
-                                                  IR_TYPE_RC6 |
-                                                  IR_TYPE_NEC,
-                                .change_protocol = dib0700_change_protocol,
-                        },
+                        .allowed_protos   = RC_TYPE_RC5 |
+                                            RC_TYPE_RC6 |
+                                            RC_TYPE_NEC,
+                        .change_protocol  = dib0700_change_protocol,
                 },
         }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
                 .num_adapters = 2,
@@ -2584,12 +3531,10 @@ struct dvb_usb_device_properties dib0700_devices[] = {
                         .rc_codes         = RC_MAP_DIB0700_RC5_TABLE,
                         .module_name      = "dib0700",
                         .rc_query         = dib0700_rc_query_old_firmware,
-                        .rc_props = {
-                                .allowed_protos = IR_TYPE_RC5 |
-                                                  IR_TYPE_RC6 |
-                                                  IR_TYPE_NEC,
-                                .change_protocol = dib0700_change_protocol,
-                        },
+                        .allowed_protos   = RC_TYPE_RC5 |
+                                            RC_TYPE_RC6 |
+                                            RC_TYPE_NEC,
+                        .change_protocol  = dib0700_change_protocol,
                 },
         }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
                 .num_adapters = 1,
@@ -2623,13 +3568,210 @@ struct dvb_usb_device_properties dib0700_devices[] = {
                         .rc_codes         = RC_MAP_DIB0700_RC5_TABLE,
                         .module_name      = "dib0700",
                         .rc_query         = dib0700_rc_query_old_firmware,
-                        .rc_props = {
-                                .allowed_protos = IR_TYPE_RC5 |
-                                                  IR_TYPE_RC6 |
-                                                  IR_TYPE_NEC,
-                                .change_protocol = dib0700_change_protocol,
+                        .allowed_protos   = RC_TYPE_RC5 |
+                                            RC_TYPE_RC6 |
+                                            RC_TYPE_NEC,
+                        .change_protocol  = dib0700_change_protocol,
+                },
+        }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
+                .num_adapters = 1,
+                .adapter = {
+                        {
+                                .caps  = DVB_USB_ADAP_HAS_PID_FILTER |
+                                        DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
+                                .pid_filter_count = 32,
+                                .pid_filter = dib90x0_pid_filter,
+                                .pid_filter_ctrl = dib90x0_pid_filter_ctrl,
+                                .frontend_attach  = stk9090m_frontend_attach,
+                                .tuner_attach     = dib9090_tuner_attach,
+
+                                DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
+
+                                .size_of_priv =
+                                        sizeof(struct dib0700_adapter_state),
+                        },
+                },
+
+                .num_device_descs = 1,
+                .devices = {
+                        {   "DiBcom STK9090M reference design",
+                                { &dib0700_usb_id_table[69], NULL },
+                                { NULL },
+                        },
+                },
+
+                .rc.core = {
+                        .rc_interval      = DEFAULT_RC_INTERVAL,
+                        .rc_codes         = RC_MAP_DIB0700_RC5_TABLE,
+                        .module_name      = "dib0700",
+                        .rc_query         = dib0700_rc_query_old_firmware,
+                        .allowed_protos   = RC_TYPE_RC5 |
+                                            RC_TYPE_RC6 |
+                                            RC_TYPE_NEC,
+                        .change_protocol  = dib0700_change_protocol,
+                },
+        }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
+                .num_adapters = 1,
+                .adapter = {
+                        {
+                                .caps  = DVB_USB_ADAP_HAS_PID_FILTER |
+                                        DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
+                                .pid_filter_count = 32,
+                                .pid_filter = stk80xx_pid_filter,
+                                .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
+                                .frontend_attach  = nim8096md_frontend_attach,
+                                .tuner_attach     = nim8096md_tuner_attach,
+
+                                DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
+
+                                .size_of_priv =
+                                        sizeof(struct dib0700_adapter_state),
+                        },
+                },
+
+                .num_device_descs = 1,
+                .devices = {
+                        {   "DiBcom NIM8096MD reference design",
+                                { &dib0700_usb_id_table[70], NULL },
+                                { NULL },
+                        },
+                },
+
+                .rc.core = {
+                        .rc_interval      = DEFAULT_RC_INTERVAL,
+                        .rc_codes         = RC_MAP_DIB0700_RC5_TABLE,
+                        .module_name      = "dib0700",
+                        .rc_query         = dib0700_rc_query_old_firmware,
+                        .allowed_protos   = RC_TYPE_RC5 |
+                                            RC_TYPE_RC6 |
+                                            RC_TYPE_NEC,
+                        .change_protocol  = dib0700_change_protocol,
+                },
+        }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
+                .num_adapters = 1,
+                .adapter = {
+                        {
+                                .caps  = DVB_USB_ADAP_HAS_PID_FILTER |
+                                        DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
+                                .pid_filter_count = 32,
+                                .pid_filter = dib90x0_pid_filter,
+                                .pid_filter_ctrl = dib90x0_pid_filter_ctrl,
+                                .frontend_attach  = nim9090md_frontend_attach,
+                                .tuner_attach     = nim9090md_tuner_attach,
+
+                                DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
+
+                                .size_of_priv =
+                                        sizeof(struct dib0700_adapter_state),
+                        },
+                },
+
+                .num_device_descs = 1,
+                .devices = {
+                        {   "DiBcom NIM9090MD reference design",
+                                { &dib0700_usb_id_table[71], NULL },
+                                { NULL },
                         },
                 },
+
+                .rc.core = {
+                        .rc_interval      = DEFAULT_RC_INTERVAL,
+                        .rc_codes         = RC_MAP_DIB0700_RC5_TABLE,
+                        .module_name      = "dib0700",
+                        .rc_query         = dib0700_rc_query_old_firmware,
+                        .allowed_protos   = RC_TYPE_RC5 |
+                                            RC_TYPE_RC6 |
+                                            RC_TYPE_NEC,
+                        .change_protocol  = dib0700_change_protocol,
+                },
+        }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
+                .num_adapters = 1,
+                .adapter = {
+                        {
+                                .caps  = DVB_USB_ADAP_HAS_PID_FILTER |
+                                        DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
+                                .pid_filter_count = 32,
+                                .pid_filter = stk70x0p_pid_filter,
+                                .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
+                                .frontend_attach  = nim7090_frontend_attach,
+                                .tuner_attach     = nim7090_tuner_attach,
+
+                                DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
+
+                                .size_of_priv =
+                                        sizeof(struct dib0700_adapter_state),
+                        },
+                },
+
+                .num_device_descs = 1,
+                .devices = {
+                        {   "DiBcom NIM7090 reference design",
+                                { &dib0700_usb_id_table[72], NULL },
+                                { NULL },
+                        },
+                },
+
+                .rc.core = {
+                        .rc_interval      = DEFAULT_RC_INTERVAL,
+                        .rc_codes         = RC_MAP_DIB0700_RC5_TABLE,
+                        .module_name      = "dib0700",
+                        .rc_query         = dib0700_rc_query_old_firmware,
+                        .allowed_protos   = RC_TYPE_RC5 |
+                                            RC_TYPE_RC6 |
+                                            RC_TYPE_NEC,
+                        .change_protocol  = dib0700_change_protocol,
+                },
+        }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
+                .num_adapters = 2,
+                .adapter = {
+                        {
+                                .caps  = DVB_USB_ADAP_HAS_PID_FILTER |
+                                        DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
+                                .pid_filter_count = 32,
+                                .pid_filter = stk70x0p_pid_filter,
+                                .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
+                                .frontend_attach  = tfe7090pvr_frontend0_attach,
+                                .tuner_attach     = tfe7090pvr_tuner0_attach,
+
+                                DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
+
+                                .size_of_priv =
+                                        sizeof(struct dib0700_adapter_state),
+                        },
+                        {
+                                .caps  = DVB_USB_ADAP_HAS_PID_FILTER |
+                                        DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
+                                .pid_filter_count = 32,
+                                .pid_filter = stk70x0p_pid_filter,
+                                .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
+                                .frontend_attach  = tfe7090pvr_frontend1_attach,
+                                .tuner_attach     = tfe7090pvr_tuner1_attach,
+
+                                DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
+
+                                .size_of_priv =
+                                        sizeof(struct dib0700_adapter_state),
+                        },
+                },
+
+                .num_device_descs = 1,
+                .devices = {
+                        {   "DiBcom TFE7090PVR reference design",
+                                { &dib0700_usb_id_table[73], NULL },
+                                { NULL },
+                        },
+                },
+
+                .rc.core = {
+                        .rc_interval      = DEFAULT_RC_INTERVAL,
+                        .rc_codes         = RC_MAP_DIB0700_RC5_TABLE,
+                        .module_name      = "dib0700",
+                        .rc_query         = dib0700_rc_query_old_firmware,
+                        .allowed_protos   = RC_TYPE_RC5 |
+                                            RC_TYPE_RC6 |
+                                            RC_TYPE_NEC,
+                        .change_protocol  = dib0700_change_protocol,
+                },
         },
 };
 
diff --git a/drivers/media/dvb/dvb-usb/dibusb-common.c b/drivers/media/dvb/dvb-usb/dibusb-common.c
index ba991aa21aff..4c2a689c820e 100644
--- a/drivers/media/dvb/dvb-usb/dibusb-common.c
+++ b/drivers/media/dvb/dvb-usb/dibusb-common.c
@@ -327,7 +327,7 @@ EXPORT_SYMBOL(dibusb_dib3000mc_tuner_attach);
 /*
  * common remote control stuff
  */
-struct ir_scancode ir_codes_dibusb_table[] = {
+struct rc_map_table rc_map_dibusb_table[] = {
         /* Key codes for the little Artec T1/Twinhan/HAMA/ remote. */
         { 0x0016, KEY_POWER },
         { 0x0010, KEY_MUTE },
@@ -408,7 +408,7 @@ struct ir_scancode ir_codes_dibusb_table[] = {
 
         { 0x8008, KEY_DVD },
         { 0x8009, KEY_AUDIO },
-        { 0x800a, KEY_MEDIA },      /* Pictures */
+        { 0x800a, KEY_IMAGES },      /* Pictures */
         { 0x800b, KEY_VIDEO },
 
         { 0x800c, KEY_BACK },
@@ -456,7 +456,7 @@ struct ir_scancode ir_codes_dibusb_table[] = {
         { 0x804e, KEY_ENTER },
         { 0x804f, KEY_VOLUMEDOWN },
 };
-EXPORT_SYMBOL(ir_codes_dibusb_table);
+EXPORT_SYMBOL(rc_map_dibusb_table);
 
 int dibusb_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
 {
diff --git a/drivers/media/dvb/dvb-usb/dibusb-mb.c b/drivers/media/dvb/dvb-usb/dibusb-mb.c
index 8e3c0d2cce16..04d91bdd3562 100644
--- a/drivers/media/dvb/dvb-usb/dibusb-mb.c
+++ b/drivers/media/dvb/dvb-usb/dibusb-mb.c
@@ -213,8 +213,8 @@ static struct dvb_usb_device_properties dibusb1_1_properties = {
 
         .rc.legacy = {
                 .rc_interval      = DEFAULT_RC_INTERVAL,
-                .rc_key_map       = ir_codes_dibusb_table,
-                .rc_key_map_size  = 111, /* wow, that is ugly ... I want to load it to the driver dynamically */
+                .rc_map_table     = rc_map_dibusb_table,
+                .rc_map_size      = 111, /* wow, that is ugly ... I want to load it to the driver dynamically */
                 .rc_query         = dibusb_rc_query,
         },
 
@@ -299,8 +299,8 @@ static struct dvb_usb_device_properties dibusb1_1_an2235_properties = {
 
         .rc.legacy = {
                 .rc_interval      = DEFAULT_RC_INTERVAL,
-                .rc_key_map       = ir_codes_dibusb_table,
-                .rc_key_map_size  = 111, /* wow, that is ugly ... I want to load it to the driver dynamically */
+                .rc_map_table     = rc_map_dibusb_table,
+                .rc_map_size      = 111, /* wow, that is ugly ... I want to load it to the driver dynamically */
                 .rc_query         = dibusb_rc_query,
         },
 
@@ -365,8 +365,8 @@ static struct dvb_usb_device_properties dibusb2_0b_properties = {
 
         .rc.legacy = {
                 .rc_interval      = DEFAULT_RC_INTERVAL,
-                .rc_key_map       = ir_codes_dibusb_table,
-                .rc_key_map_size  = 111, /* wow, that is ugly ... I want to load it to the driver dynamically */
+                .rc_map_table     = rc_map_dibusb_table,
+                .rc_map_size      = 111, /* wow, that is ugly ... I want to load it to the driver dynamically */
                 .rc_query         = dibusb_rc_query,
         },
 
@@ -424,8 +424,8 @@ static struct dvb_usb_device_properties artec_t1_usb2_properties = {
 
         .rc.legacy = {
                 .rc_interval      = DEFAULT_RC_INTERVAL,
-                .rc_key_map       = ir_codes_dibusb_table,
-                .rc_key_map_size  = 111, /* wow, that is ugly ... I want to load it to the driver dynamically */
+                .rc_map_table     = rc_map_dibusb_table,
+                .rc_map_size      = 111, /* wow, that is ugly ... I want to load it to the driver dynamically */
                 .rc_query         = dibusb_rc_query,
         },
 
diff --git a/drivers/media/dvb/dvb-usb/dibusb-mc.c b/drivers/media/dvb/dvb-usb/dibusb-mc.c
index 1cbc41cb4e8f..c1d9094b61e5 100644
--- a/drivers/media/dvb/dvb-usb/dibusb-mc.c
+++ b/drivers/media/dvb/dvb-usb/dibusb-mc.c
@@ -83,8 +83,8 @@ static struct dvb_usb_device_properties dibusb_mc_properties = {
 
         .rc.legacy = {
                 .rc_interval      = DEFAULT_RC_INTERVAL,
-                .rc_key_map       = ir_codes_dibusb_table,
-                .rc_key_map_size  = 111, /* FIXME */
+                .rc_map_table     = rc_map_dibusb_table,
+                .rc_map_size      = 111, /* FIXME */
                 .rc_query         = dibusb_rc_query,
         },
 
diff --git a/drivers/media/dvb/dvb-usb/dibusb.h b/drivers/media/dvb/dvb-usb/dibusb.h
index 61a6bf389472..e47c321b3ffc 100644
--- a/drivers/media/dvb/dvb-usb/dibusb.h
+++ b/drivers/media/dvb/dvb-usb/dibusb.h
@@ -124,7 +124,7 @@ extern int dibusb2_0_power_ctrl(struct dvb_usb_device *, int);
 #define DEFAULT_RC_INTERVAL 150
 //#define DEFAULT_RC_INTERVAL 100000
 
-extern struct ir_scancode ir_codes_dibusb_table[];
+extern struct rc_map_table rc_map_dibusb_table[];
 extern int dibusb_rc_query(struct dvb_usb_device *, u32 *, int *);
 extern int dibusb_read_eeprom_byte(struct dvb_usb_device *, u8, u8 *);
 
diff --git a/drivers/media/dvb/dvb-usb/digitv.c b/drivers/media/dvb/dvb-usb/digitv.c
index 13d006bb19db..f6344cdd360f 100644
--- a/drivers/media/dvb/dvb-usb/digitv.c
+++ b/drivers/media/dvb/dvb-usb/digitv.c
@@ -161,7 +161,7 @@ static int digitv_tuner_attach(struct dvb_usb_adapter *adap)
         return 0;
 }
 
-static struct ir_scancode ir_codes_digitv_table[] = {
+static struct rc_map_table rc_map_digitv_table[] = {
         { 0x5f55, KEY_0 },
         { 0x6f55, KEY_1 },
         { 0x9f55, KEY_2 },
@@ -176,7 +176,7 @@ static struct ir_scancode ir_codes_digitv_table[] = {
         { 0xaf59, KEY_AUX },
         { 0x5f5a, KEY_DVD },
         { 0x6f5a, KEY_POWER },
-        { 0x9f5a, KEY_MHP },     /* labelled 'Picture' */
+        { 0x9f5a, KEY_CAMERA },     /* labelled 'Picture' */
         { 0xaf5a, KEY_AUDIO },
         { 0x5f65, KEY_INFO },
         { 0x6f65, KEY_F13 },     /* 16:9 */
@@ -237,10 +237,10 @@ static int digitv_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
         /* if something is inside the buffer, simulate key press */
         if (key[1] != 0)
         {
-                  for (i = 0; i < d->props.rc.legacy.rc_key_map_size; i++) {
-                        if (rc5_custom(&d->props.rc.legacy.rc_key_map[i]) == key[1] &&
-                            rc5_data(&d->props.rc.legacy.rc_key_map[i]) == key[2]) {
-                                *event = d->props.rc.legacy.rc_key_map[i].keycode;
+                  for (i = 0; i < d->props.rc.legacy.rc_map_size; i++) {
+                        if (rc5_custom(&d->props.rc.legacy.rc_map_table[i]) == key[1] &&
+                            rc5_data(&d->props.rc.legacy.rc_map_table[i]) == key[2]) {
+                                *event = d->props.rc.legacy.rc_map_table[i].keycode;
                                 *state = REMOTE_KEY_PRESSED;
                                 return 0;
                         }
@@ -312,8 +312,8 @@ static struct dvb_usb_device_properties digitv_properties = {
 
         .rc.legacy = {
                 .rc_interval      = 1000,
-                .rc_key_map       = ir_codes_digitv_table,
-                .rc_key_map_size  = ARRAY_SIZE(ir_codes_digitv_table),
+                .rc_map_table     = rc_map_digitv_table,
+                .rc_map_size      = ARRAY_SIZE(rc_map_digitv_table),
                 .rc_query         = digitv_rc_query,
         },
 
diff --git a/drivers/media/dvb/dvb-usb/dtt200u.c b/drivers/media/dvb/dvb-usb/dtt200u.c
index ca495e07f35c..ecd86eca2548 100644
--- a/drivers/media/dvb/dvb-usb/dtt200u.c
+++ b/drivers/media/dvb/dvb-usb/dtt200u.c
@@ -57,7 +57,7 @@ static int dtt200u_pid_filter(struct dvb_usb_adapter *adap, int index, u16 pid,
 
 /* remote control */
 /* key list for the tiny remote control (Yakumo, don't know about the others) */
-static struct ir_scancode ir_codes_dtt200u_table[] = {
+static struct rc_map_table rc_map_dtt200u_table[] = {
         { 0x8001, KEY_MUTE },
         { 0x8002, KEY_CHANNELDOWN },
         { 0x8003, KEY_VOLUMEDOWN },
@@ -163,8 +163,8 @@ static struct dvb_usb_device_properties dtt200u_properties = {
 
         .rc.legacy = {
                 .rc_interval     = 300,
-                .rc_key_map      = ir_codes_dtt200u_table,
-                .rc_key_map_size = ARRAY_SIZE(ir_codes_dtt200u_table),
+                .rc_map_table    = rc_map_dtt200u_table,
+                .rc_map_size     = ARRAY_SIZE(rc_map_dtt200u_table),
                 .rc_query        = dtt200u_rc_query,
         },
 
@@ -210,8 +210,8 @@ static struct dvb_usb_device_properties wt220u_properties = {
 
         .rc.legacy = {
                 .rc_interval     = 300,
-                .rc_key_map      = ir_codes_dtt200u_table,
-                .rc_key_map_size = ARRAY_SIZE(ir_codes_dtt200u_table),
+                .rc_map_table      = rc_map_dtt200u_table,
+                .rc_map_size = ARRAY_SIZE(rc_map_dtt200u_table),
                 .rc_query        = dtt200u_rc_query,
         },
 
@@ -257,8 +257,8 @@ static struct dvb_usb_device_properties wt220u_fc_properties = {
 
         .rc.legacy = {
                 .rc_interval     = 300,
-                .rc_key_map      = ir_codes_dtt200u_table,
-                .rc_key_map_size = ARRAY_SIZE(ir_codes_dtt200u_table),
+                .rc_map_table    = rc_map_dtt200u_table,
+                .rc_map_size     = ARRAY_SIZE(rc_map_dtt200u_table),
                 .rc_query        = dtt200u_rc_query,
         },
 
@@ -304,8 +304,8 @@ static struct dvb_usb_device_properties wt220u_zl0353_properties = {
 
         .rc.legacy = {
                 .rc_interval     = 300,
-                .rc_key_map      = ir_codes_dtt200u_table,
-                .rc_key_map_size = ARRAY_SIZE(ir_codes_dtt200u_table),
+                .rc_map_table    = rc_map_dtt200u_table,
+                .rc_map_size     = ARRAY_SIZE(rc_map_dtt200u_table),
                 .rc_query        = dtt200u_rc_query,
         },
 
diff --git a/drivers/media/dvb/dvb-usb/dvb-usb-dvb.c b/drivers/media/dvb/dvb-usb/dvb-usb-dvb.c
index df1ec3e69f4a..b3cb626ed56e 100644
--- a/drivers/media/dvb/dvb-usb/dvb-usb-dvb.c
+++ b/drivers/media/dvb/dvb-usb/dvb-usb-dvb.c
@@ -12,7 +12,7 @@
 static int dvb_usb_ctrl_feed(struct dvb_demux_feed *dvbdmxfeed, int onoff)
 {
         struct dvb_usb_adapter *adap = dvbdmxfeed->demux->priv;
-        int newfeedcount,ret;
+        int newfeedcount, ret;
 
         if (adap == NULL)
                 return -ENODEV;
@@ -24,9 +24,13 @@ static int dvb_usb_ctrl_feed(struct dvb_demux_feed *dvbdmxfeed, int onoff)
                 deb_ts("stop feeding\n");
                 usb_urb_kill(&adap->stream);
 
-                if (adap->props.streaming_ctrl != NULL)
-                        if ((ret = adap->props.streaming_ctrl(adap,0)))
+                if (adap->props.streaming_ctrl != NULL) {
+                        ret = adap->props.streaming_ctrl(adap, 0);
+                        if (ret < 0) {
                                 err("error while stopping stream.");
+                                return ret;
+                        }
+                }
         }
 
         adap->feedcount = newfeedcount;
@@ -49,17 +53,24 @@ static int dvb_usb_ctrl_feed(struct dvb_demux_feed *dvbdmxfeed, int onoff)
 
                 deb_ts("controlling pid parser\n");
                 if (adap->props.caps & DVB_USB_ADAP_HAS_PID_FILTER &&
-                        adap->props.caps & DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF &&
-                        adap->props.pid_filter_ctrl != NULL)
-                        if (adap->props.pid_filter_ctrl(adap,adap->pid_filtering) < 0)
+                        adap->props.caps &
+                        DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF &&
+                        adap->props.pid_filter_ctrl != NULL) {
+                        ret = adap->props.pid_filter_ctrl(adap,
+                                adap->pid_filtering);
+                        if (ret < 0) {
                                 err("could not handle pid_parser");
-
+                                return ret;
+                        }
+                }
                 deb_ts("start feeding\n");
-                if (adap->props.streaming_ctrl != NULL)
-                        if (adap->props.streaming_ctrl(adap,1)) {
+                if (adap->props.streaming_ctrl != NULL) {
+                        ret = adap->props.streaming_ctrl(adap, 1);
+                        if (ret < 0) {
                                 err("error while enabling fifo.");
-                                return -ENODEV;
+                                return ret;
                         }
+                }
 
         }
         return 0;
diff --git a/drivers/media/dvb/dvb-usb/dvb-usb-i2c.c b/drivers/media/dvb/dvb-usb/dvb-usb-i2c.c
index cead089bbb4f..88e4a62abc44 100644
--- a/drivers/media/dvb/dvb-usb/dvb-usb-i2c.c
+++ b/drivers/media/dvb/dvb-usb/dvb-usb-i2c.c
@@ -20,7 +20,6 @@ int dvb_usb_i2c_init(struct dvb_usb_device *d)
         }
 
         strlcpy(d->i2c_adap.name, d->desc->name, sizeof(d->i2c_adap.name));
-        d->i2c_adap.class = I2C_CLASS_TV_DIGITAL,
         d->i2c_adap.algo      = d->props.i2c_algo;
         d->i2c_adap.algo_data = NULL;
         d->i2c_adap.dev.parent = &d->udev->dev;
diff --git a/drivers/media/dvb/dvb-usb/dvb-usb-ids.h b/drivers/media/dvb/dvb-usb/dvb-usb-ids.h
index 1a774d58d664..21b15495d2d7 100644
--- a/drivers/media/dvb/dvb-usb/dvb-usb-ids.h
+++ b/drivers/media/dvb/dvb-usb/dvb-usb-ids.h
@@ -32,6 +32,7 @@
 #define USB_VID_EMPIA                           0xeb1a
 #define USB_VID_GENPIX                          0x09c0
 #define USB_VID_GRANDTEC                        0x5032
+#define USB_VID_GTEK                            0x1f4d
 #define USB_VID_HANFTEK                         0x15f4
 #define USB_VID_HAUPPAUGE                       0x2040
 #define USB_VID_HYPER_PALTEK                    0x1025
@@ -90,6 +91,7 @@
 #define USB_PID_COMPRO_VIDEOMATE_U500_PC                0x1e80
 #define USB_PID_CONCEPTRONIC_CTVDIGRCU                  0xe397
 #define USB_PID_CONEXANT_D680_DMB                       0x86d6
+#define USB_PID_CREATIX_CTX1921                         0x1921
 #define USB_PID_DIBCOM_HOOK_DEFAULT                     0x0064
 #define USB_PID_DIBCOM_HOOK_DEFAULT_REENUM              0x0065
 #define USB_PID_DIBCOM_MOD3000_COLD                     0x0bb8
@@ -105,8 +107,13 @@
 #define USB_PID_DIBCOM_STK807XP                         0x1f90
 #define USB_PID_DIBCOM_STK807XPVR                       0x1f98
 #define USB_PID_DIBCOM_STK8096GP                        0x1fa0
+#define USB_PID_DIBCOM_NIM8096MD                        0x1fa8
 #define USB_PID_DIBCOM_ANCHOR_2135_COLD                 0x2131
 #define USB_PID_DIBCOM_STK7770P                         0x1e80
+#define USB_PID_DIBCOM_NIM7090                          0x1bb2
+#define USB_PID_DIBCOM_TFE7090PVR                       0x1bb4
+#define USB_PID_DIBCOM_NIM9090M                         0x2383
+#define USB_PID_DIBCOM_NIM9090MD                        0x2384
 #define USB_PID_DPOSH_M9206_COLD                        0x9206
 #define USB_PID_DPOSH_M9206_WARM                        0xa090
 #define USB_PID_E3C_EC168                               0x1689
@@ -133,6 +140,8 @@
 #define USB_PID_KWORLD_VSTREAM_WARM                     0x17df
 #define USB_PID_TERRATEC_CINERGY_T_USB_XE               0x0055
 #define USB_PID_TERRATEC_CINERGY_T_USB_XE_REV2          0x0069
+#define USB_PID_TERRATEC_CINERGY_T_STICK_RC             0x0097
+#define USB_PID_TERRATEC_CINERGY_T_STICK_DUAL_RC        0x0099
 #define USB_PID_TWINHAN_VP7041_COLD                     0x3201
 #define USB_PID_TWINHAN_VP7041_WARM                     0x3202
 #define USB_PID_TWINHAN_VP7020_COLD                     0x3203
@@ -143,6 +152,7 @@
 #define USB_PID_TWINHAN_VP7021_WARM                     0x3208
 #define USB_PID_TINYTWIN                                0x3226
 #define USB_PID_TINYTWIN_2                              0xe402
+#define USB_PID_TINYTWIN_3                              0x9016
 #define USB_PID_DNTV_TINYUSB2_COLD                      0x3223
 #define USB_PID_DNTV_TINYUSB2_WARM                      0x3224
 #define USB_PID_ULTIMA_TVBOX_COLD                       0x8105
@@ -196,6 +206,7 @@
 #define USB_PID_AVERMEDIA_A309                          0xa309
 #define USB_PID_AVERMEDIA_A310                          0xa310
 #define USB_PID_AVERMEDIA_A850                          0x850a
+#define USB_PID_AVERMEDIA_A850T                         0x850b
 #define USB_PID_AVERMEDIA_A805                          0xa805
 #define USB_PID_AVERMEDIA_A815M                         0x815a
 #define USB_PID_TECHNOTREND_CONNECT_S2400               0x3006
@@ -268,6 +279,7 @@
 #define USB_PID_GENPIX_8PSK_REV_2                       0x0202
 #define USB_PID_GENPIX_SKYWALKER_1                      0x0203
 #define USB_PID_GENPIX_SKYWALKER_CW3K                   0x0204
+#define USB_PID_GENPIX_SKYWALKER_2                      0x0206
 #define USB_PID_SIGMATEK_DVB_110                        0x6610
 #define USB_PID_MSI_DIGI_VOX_MINI_II                    0x1513
 #define USB_PID_MSI_DIGIVOX_DUO                         0x8801
@@ -295,6 +307,7 @@
 #define USB_PID_ELGATO_EYETV_DIVERSITY                  0x0011
 #define USB_PID_ELGATO_EYETV_DTT                        0x0021
 #define USB_PID_ELGATO_EYETV_DTT_Dlx                    0x0020
+#define USB_PID_ELGATO_EYETV_SAT                        0x002a
 #define USB_PID_DVB_T_USB_STICK_HIGH_SPEED_COLD         0x5000
 #define USB_PID_DVB_T_USB_STICK_HIGH_SPEED_WARM         0x5001
 #define USB_PID_FRIIO_WHITE                             0x0001
@@ -305,4 +318,6 @@
 #define USB_PID_TERRATEC_DVBS2CI_V2                     0x10ac
 #define USB_PID_TECHNISAT_USB2_HDCI_V1                  0x0001
 #define USB_PID_TECHNISAT_USB2_HDCI_V2                  0x0002
+#define USB_PID_TECHNISAT_AIRSTAR_TELESTICK_2           0x0004
+#define USB_PID_TECHNISAT_USB2_DVB_S2                   0x0500
 #endif
diff --git a/drivers/media/dvb/dvb-usb/dvb-usb-remote.c b/drivers/media/dvb/dvb-usb/dvb-usb-remote.c
index b579fed3ab3f..41bacff24960 100644
--- a/drivers/media/dvb/dvb-usb/dvb-usb-remote.c
+++ b/drivers/media/dvb/dvb-usb/dvb-usb-remote.c
@@ -8,60 +8,71 @@
 #include "dvb-usb-common.h"
 #include <linux/usb/input.h>
 
-static int legacy_dvb_usb_getkeycode(struct input_dev *dev,
-                                unsigned int scancode, unsigned int *keycode)
+static unsigned int
+legacy_dvb_usb_get_keymap_index(const struct input_keymap_entry *ke,
+                                struct rc_map_table *keymap,
+                                unsigned int keymap_size)
 {
-        struct dvb_usb_device *d = input_get_drvdata(dev);
-
-        struct ir_scancode *keymap = d->props.rc.legacy.rc_key_map;
-        int i;
-
-        /* See if we can match the raw key code. */
-        for (i = 0; i < d->props.rc.legacy.rc_key_map_size; i++)
-                if (keymap[i].scancode == scancode) {
-                        *keycode = keymap[i].keycode;
-                        return 0;
-                }
+        unsigned int index;
+        unsigned int scancode;
+
+        if (ke->flags & INPUT_KEYMAP_BY_INDEX) {
+                index = ke->index;
+        } else {
+                if (input_scancode_to_scalar(ke, &scancode))
+                        return keymap_size;
+
+                /* See if we can match the raw key code. */
+                for (index = 0; index < keymap_size; index++)
+                        if (keymap[index].scancode == scancode)
+                                break;
 
-        /*
-         * If is there extra space, returns KEY_RESERVED,
-         * otherwise, input core won't let legacy_dvb_usb_setkeycode
-         * to work
-         */
-        for (i = 0; i < d->props.rc.legacy.rc_key_map_size; i++)
-                if (keymap[i].keycode == KEY_RESERVED ||
-                    keymap[i].keycode == KEY_UNKNOWN) {
-                        *keycode = KEY_RESERVED;
-                        return 0;
+                /* See if there is an unused hole in the map */
+                if (index >= keymap_size) {
+                        for (index = 0; index < keymap_size; index++) {
+                                if (keymap[index].keycode == KEY_RESERVED ||
+                                    keymap[index].keycode == KEY_UNKNOWN) {
+                                        break;
+                                }
+                        }
                 }
+        }
 
-        return -EINVAL;
+        return index;
 }
 
-static int legacy_dvb_usb_setkeycode(struct input_dev *dev,
-                                unsigned int scancode, unsigned int keycode)
+static int legacy_dvb_usb_getkeycode(struct input_dev *dev,
+                                     struct input_keymap_entry *ke)
 {
         struct dvb_usb_device *d = input_get_drvdata(dev);
+        struct rc_map_table *keymap = d->props.rc.legacy.rc_map_table;
+        unsigned int keymap_size = d->props.rc.legacy.rc_map_size;
+        unsigned int index;
 
-        struct ir_scancode *keymap = d->props.rc.legacy.rc_key_map;
-        int i;
+        index = legacy_dvb_usb_get_keymap_index(ke, keymap, keymap_size);
+        if (index >= keymap_size)
+                return -EINVAL;
 
-        /* Search if it is replacing an existing keycode */
-        for (i = 0; i < d->props.rc.legacy.rc_key_map_size; i++)
-                if (keymap[i].scancode == scancode) {
-                        keymap[i].keycode = keycode;
-                        return 0;
-                }
+        ke->keycode = keymap[index].keycode;
+        if (ke->keycode == KEY_UNKNOWN)
+                ke->keycode = KEY_RESERVED;
+        ke->len = sizeof(keymap[index].scancode);
+        memcpy(&ke->scancode, &keymap[index].scancode, ke->len);
+        ke->index = index;
 
-        /* Search if is there a clean entry. If so, use it */
-        for (i = 0; i < d->props.rc.legacy.rc_key_map_size; i++)
-                if (keymap[i].keycode == KEY_RESERVED ||
-                    keymap[i].keycode == KEY_UNKNOWN) {
-                        keymap[i].scancode = scancode;
-                        keymap[i].keycode = keycode;
-                        return 0;
-                }
+        return 0;
+}
+
+static int legacy_dvb_usb_setkeycode(struct input_dev *dev,
+                                     const struct input_keymap_entry *ke,
+                                     unsigned int *old_keycode)
+{
+        struct dvb_usb_device *d = input_get_drvdata(dev);
+        struct rc_map_table *keymap = d->props.rc.legacy.rc_map_table;
+        unsigned int keymap_size = d->props.rc.legacy.rc_map_size;
+        unsigned int index;
 
+        index = legacy_dvb_usb_get_keymap_index(ke, keymap, keymap_size);
         /*
          * FIXME: Currently, it is not possible to increase the size of
          * scancode table. For it to happen, one possibility
@@ -69,8 +80,24 @@ static int legacy_dvb_usb_setkeycode(struct input_dev *dev,
          * copying data, appending the new key on it, and freeing
          * the old one - or maybe just allocating some spare space
          */
+        if (index >= keymap_size)
+                return -EINVAL;
+
+        *old_keycode = keymap[index].keycode;
+        keymap->keycode = ke->keycode;
+        __set_bit(ke->keycode, dev->keybit);
+
+        if (*old_keycode != KEY_RESERVED) {
+                __clear_bit(*old_keycode, dev->keybit);
+                for (index = 0; index < keymap_size; index++) {
+                        if (keymap[index].keycode == *old_keycode) {
+                                __set_bit(*old_keycode, dev->keybit);
+                                break;
+                        }
+                }
+        }
 
-        return -EINVAL;
+        return 0;
 }
 
 /* Remote-control poll function - called every dib->rc_query_interval ms to see
@@ -106,10 +133,10 @@ static void legacy_dvb_usb_read_remote_control(struct work_struct *work)
                         d->last_event = event;
                 case REMOTE_KEY_REPEAT:
                         deb_rc("key repeated\n");
-                        input_event(d->rc_input_dev, EV_KEY, event, 1);
-                        input_sync(d->rc_input_dev);
-                        input_event(d->rc_input_dev, EV_KEY, d->last_event, 0);
-                        input_sync(d->rc_input_dev);
+                        input_event(d->input_dev, EV_KEY, event, 1);
+                        input_sync(d->input_dev);
+                        input_event(d->input_dev, EV_KEY, d->last_event, 0);
+                        input_sync(d->input_dev);
                         break;
                 default:
                         break;
@@ -154,20 +181,32 @@ schedule:
         schedule_delayed_work(&d->rc_query_work,msecs_to_jiffies(d->props.rc.legacy.rc_interval));
 }
 
-static int legacy_dvb_usb_remote_init(struct dvb_usb_device *d,
-                                      struct input_dev *input_dev)
+static int legacy_dvb_usb_remote_init(struct dvb_usb_device *d)
 {
         int i, err, rc_interval;
+        struct input_dev *input_dev;
+
+        input_dev = input_allocate_device();
+        if (!input_dev)
+                return -ENOMEM;
+
+        input_dev->evbit[0] = BIT_MASK(EV_KEY);
+        input_dev->name = "IR-receiver inside an USB DVB receiver";
+        input_dev->phys = d->rc_phys;
+        usb_to_input_id(d->udev, &input_dev->id);
+        input_dev->dev.parent = &d->udev->dev;
+        d->input_dev = input_dev;
+        d->rc_dev = NULL;
 
         input_dev->getkeycode = legacy_dvb_usb_getkeycode;
         input_dev->setkeycode = legacy_dvb_usb_setkeycode;
 
         /* set the bits for the keys */
-        deb_rc("key map size: %d\n", d->props.rc.legacy.rc_key_map_size);
-        for (i = 0; i < d->props.rc.legacy.rc_key_map_size; i++) {
+        deb_rc("key map size: %d\n", d->props.rc.legacy.rc_map_size);
+        for (i = 0; i < d->props.rc.legacy.rc_map_size; i++) {
                 deb_rc("setting bit for event %d item %d\n",
-                        d->props.rc.legacy.rc_key_map[i].keycode, i);
-                set_bit(d->props.rc.legacy.rc_key_map[i].keycode, input_dev->keybit);
+                        d->props.rc.legacy.rc_map_table[i].keycode, i);
+                set_bit(d->props.rc.legacy.rc_map_table[i].keycode, input_dev->keybit);
         }
 
         /* setting these two values to non-zero, we have to manage key repeats */
@@ -221,18 +260,34 @@ static void dvb_usb_read_remote_control(struct work_struct *work)
                               msecs_to_jiffies(d->props.rc.core.rc_interval));
 }
 
-static int rc_core_dvb_usb_remote_init(struct dvb_usb_device *d,
-                                       struct input_dev *input_dev)
+static int rc_core_dvb_usb_remote_init(struct dvb_usb_device *d)
 {
         int err, rc_interval;
+        struct rc_dev *dev;
+
+        dev = rc_allocate_device();
+        if (!dev)
+                return -ENOMEM;
 
-        d->props.rc.core.rc_props.priv = d;
-        err = ir_input_register(input_dev,
-                                 d->props.rc.core.rc_codes,
-                                 &d->props.rc.core.rc_props,
-                                 d->props.rc.core.module_name);
-        if (err < 0)
+        dev->driver_name = d->props.rc.core.module_name;
+        dev->map_name = d->props.rc.core.rc_codes;
+        dev->change_protocol = d->props.rc.core.change_protocol;
+        dev->allowed_protos = d->props.rc.core.allowed_protos;
+        dev->driver_type = d->props.rc.core.driver_type;
+        usb_to_input_id(d->udev, &dev->input_id);
+        dev->input_name = "IR-receiver inside an USB DVB receiver";
+        dev->input_phys = d->rc_phys;
+        dev->dev.parent = &d->udev->dev;
+        dev->priv = d;
+
+        err = rc_register_device(dev);
+        if (err < 0) {
+                rc_free_device(dev);
                 return err;
+        }
+
+        d->input_dev = NULL;
+        d->rc_dev = dev;
 
         if (!d->props.rc.core.rc_query || d->props.rc.core.bulk_mode)
                 return 0;
@@ -251,13 +306,12 @@ static int rc_core_dvb_usb_remote_init(struct dvb_usb_device *d,
 
 int dvb_usb_remote_init(struct dvb_usb_device *d)
 {
-        struct input_dev *input_dev;
         int err;
 
         if (dvb_usb_disable_rc_polling)
                 return 0;
 
-        if (d->props.rc.legacy.rc_key_map && d->props.rc.legacy.rc_query)
+        if (d->props.rc.legacy.rc_map_table && d->props.rc.legacy.rc_query)
                 d->props.rc.mode = DVB_RC_LEGACY;
         else if (d->props.rc.core.rc_codes)
                 d->props.rc.mode = DVB_RC_CORE;
@@ -267,26 +321,14 @@ int dvb_usb_remote_init(struct dvb_usb_device *d)
         usb_make_path(d->udev, d->rc_phys, sizeof(d->rc_phys));
         strlcat(d->rc_phys, "/ir0", sizeof(d->rc_phys));
 
-        input_dev = input_allocate_device();
-        if (!input_dev)
-                return -ENOMEM;
-
-        input_dev->evbit[0] = BIT_MASK(EV_KEY);
-        input_dev->name = "IR-receiver inside an USB DVB receiver";
-        input_dev->phys = d->rc_phys;
-        usb_to_input_id(d->udev, &input_dev->id);
-        input_dev->dev.parent = &d->udev->dev;
-
         /* Start the remote-control polling. */
         if (d->props.rc.legacy.rc_interval < 40)
                 d->props.rc.legacy.rc_interval = 100; /* default */
 
-        d->rc_input_dev = input_dev;
-
         if (d->props.rc.mode == DVB_RC_LEGACY)
-                err = legacy_dvb_usb_remote_init(d, input_dev);
+                err = legacy_dvb_usb_remote_init(d);
         else
-                err = rc_core_dvb_usb_remote_init(d, input_dev);
+                err = rc_core_dvb_usb_remote_init(d);
         if (err)
                 return err;
 
@@ -298,12 +340,11 @@ int dvb_usb_remote_init(struct dvb_usb_device *d)
 int dvb_usb_remote_exit(struct dvb_usb_device *d)
 {
         if (d->state & DVB_USB_STATE_REMOTE) {
-                cancel_rearming_delayed_work(&d->rc_query_work);
-                flush_scheduled_work();
+                cancel_delayed_work_sync(&d->rc_query_work);
                 if (d->props.rc.mode == DVB_RC_LEGACY)
-                        input_unregister_device(d->rc_input_dev);
+                        input_unregister_device(d->input_dev);
                 else
-                        ir_input_unregister(d->rc_input_dev);
+                        rc_unregister_device(d->rc_dev);
         }
         d->state &= ~DVB_USB_STATE_REMOTE;
         return 0;
@@ -316,7 +357,7 @@ int dvb_usb_nec_rc_key_to_event(struct dvb_usb_device *d,
                 u8 keybuf[5], u32 *event, int *state)
 {
         int i;
-        struct ir_scancode *keymap = d->props.rc.legacy.rc_key_map;
+        struct rc_map_table *keymap = d->props.rc.legacy.rc_map_table;
         *event = 0;
         *state = REMOTE_NO_KEY_PRESSED;
         switch (keybuf[0]) {
@@ -329,7 +370,7 @@ int dvb_usb_nec_rc_key_to_event(struct dvb_usb_device *d,
                                 break;
                         }
                         /* See if we can match the raw key code. */
-                        for (i = 0; i < d->props.rc.legacy.rc_key_map_size; i++)
+                        for (i = 0; i < d->props.rc.legacy.rc_map_size; i++)
                                 if (rc5_custom(&keymap[i]) == keybuf[1] &&
                                         rc5_data(&keymap[i]) == keybuf[3]) {
                                         *event = keymap[i].keycode;
diff --git a/drivers/media/dvb/dvb-usb/dvb-usb.h b/drivers/media/dvb/dvb-usb/dvb-usb.h
index 34f7b3ba8cc7..76a80968482a 100644
--- a/drivers/media/dvb/dvb-usb/dvb-usb.h
+++ b/drivers/media/dvb/dvb-usb/dvb-usb.h
@@ -14,7 +14,7 @@
 #include <linux/usb.h>
 #include <linux/firmware.h>
 #include <linux/mutex.h>
-#include <media/ir-core.h>
+#include <media/rc-core.h>
 
 #include "dvb_frontend.h"
 #include "dvb_demux.h"
@@ -75,17 +75,17 @@ struct dvb_usb_device_description {
         struct usb_device_id *warm_ids[DVB_USB_ID_MAX_NUM];
 };
 
-static inline u8 rc5_custom(struct ir_scancode *key)
+static inline u8 rc5_custom(struct rc_map_table *key)
 {
         return (key->scancode >> 8) & 0xff;
 }
 
-static inline u8 rc5_data(struct ir_scancode *key)
+static inline u8 rc5_data(struct rc_map_table *key)
 {
         return key->scancode & 0xff;
 }
 
-static inline u8 rc5_scan(struct ir_scancode *key)
+static inline u8 rc5_scan(struct rc_map_table *key)
 {
         return key->scancode & 0xffff;
 }
@@ -159,9 +159,9 @@ struct dvb_usb_adapter_properties {
 
 /**
  * struct dvb_rc_legacy - old properties of remote controller
- * @rc_key_map: a hard-wired array of struct ir_scancode (NULL to disable
+ * @rc_map_table: a hard-wired array of struct rc_map_table (NULL to disable
  *  remote control handling).
- * @rc_key_map_size: number of items in @rc_key_map.
+ * @rc_map_size: number of items in @rc_map_table.
  * @rc_query: called to query an event event.
  * @rc_interval: time in ms between two queries.
  */
@@ -170,8 +170,8 @@ struct dvb_rc_legacy {
 #define REMOTE_NO_KEY_PRESSED      0x00
 #define REMOTE_KEY_PRESSED         0x01
 #define REMOTE_KEY_REPEAT          0x02
-        struct ir_scancode  *rc_key_map;
-        int rc_key_map_size;
+        struct rc_map_table  *rc_map_table;
+        int rc_map_size;
         int (*rc_query) (struct dvb_usb_device *, u32 *, int *);
         int rc_interval;
 };
@@ -180,18 +180,22 @@ struct dvb_rc_legacy {
  * struct dvb_rc properties of remote controller, using rc-core
  * @rc_codes: name of rc codes table
  * @protocol: type of protocol(s) currently used by the driver
+ * @allowed_protos: protocol(s) supported by the driver
+ * @driver_type: Used to point if a device supports raw mode
+ * @change_protocol: callback to change protocol
  * @rc_query: called to query an event event.
  * @rc_interval: time in ms between two queries.
- * @rc_props: remote controller properties
  * @bulk_mode: device supports bulk mode for RC (disable polling mode)
  */
 struct dvb_rc {
         char *rc_codes;
         u64 protocol;
+        u64 allowed_protos;
+        enum rc_driver_type driver_type;
+        int (*change_protocol)(struct rc_dev *dev, u64 rc_type);
         char *module_name;
         int (*rc_query) (struct dvb_usb_device *d);
         int rc_interval;
-        struct ir_dev_props rc_props;
         bool bulk_mode;                         /* uses bulk mode */
 };
 
@@ -385,7 +389,8 @@ struct dvb_usb_adapter {
  *
  * @i2c_adap: device's i2c_adapter if it uses I2CoverUSB
  *
- * @rc_input_dev: input device for the remote control.
+ * @rc_dev: rc device for the remote control (rc-core mode)
+ * @input_dev: input device for the remote control (legacy mode)
  * @rc_query_work: struct work_struct frequent rc queries
  * @last_event: last triggered event
  * @last_state: last state (no, pressed, repeat)
@@ -418,7 +423,8 @@ struct dvb_usb_device {
         struct dvb_usb_adapter adapter[MAX_NO_OF_ADAPTER_PER_DEVICE];
 
         /* remote control */
-        struct input_dev *rc_input_dev;
+        struct rc_dev *rc_dev;
+        struct input_dev *input_dev;
         char rc_phys[64];
         struct delayed_work rc_query_work;
         u32 last_event;
diff --git a/drivers/media/dvb/dvb-usb/dw2102.c b/drivers/media/dvb/dvb-usb/dw2102.c
index 774df88dc6e3..058b2318abed 100644
--- a/drivers/media/dvb/dvb-usb/dw2102.c
+++ b/drivers/media/dvb/dvb-usb/dw2102.c
@@ -1,15 +1,16 @@
 /* DVB USB framework compliant Linux driver for the
-*       DVBWorld DVB-S 2101, 2102, DVB-S2 2104, DVB-C 3101,
-*       TeVii S600, S630, S650,
-*       Prof 1100, 7500 Cards
-* Copyright (C) 2008,2009 Igor M. Liplianin (liplianin@me.by)
-*
-*       This program is free software; you can redistribute it and/or modify it
-*       under the terms of the GNU General Public License as published by the
-*       Free Software Foundation, version 2.
-*
-* see Documentation/dvb/README.dvb-usb for more information
-*/
+ *      DVBWorld DVB-S 2101, 2102, DVB-S2 2104, DVB-C 3101,
+ *      TeVii S600, S630, S650, S660, S480,
+ *      Prof 1100, 7500,
+ *      Geniatech SU3000 Cards
+ * Copyright (C) 2008-2011 Igor M. Liplianin (liplianin@me.by)
+ *
+ *      This program is free software; you can redistribute it and/or modify it
+ *      under the terms of the GNU General Public License as published by the
+ *      Free Software Foundation, version 2.
+ *
+ * see Documentation/dvb/README.dvb-usb for more information
+ */
 #include "dw2102.h"
 #include "si21xx.h"
 #include "stv0299.h"
@@ -55,6 +56,14 @@
 #define USB_PID_TEVII_S660 0xd660
 #endif
 
+#ifndef USB_PID_TEVII_S480_1
+#define USB_PID_TEVII_S480_1 0xd481
+#endif
+
+#ifndef USB_PID_TEVII_S480_2
+#define USB_PID_TEVII_S480_2 0xd482
+#endif
+
 #ifndef USB_PID_PROF_1100
 #define USB_PID_PROF_1100 0xb012
 #endif
@@ -67,17 +76,27 @@
 #define REG_21_SYMBOLRATE_BYTE2 0x21
 /* on my own*/
 #define DW2102_VOLTAGE_CTRL (0x1800)
+#define SU3000_STREAM_CTRL (0x1900)
 #define DW2102_RC_QUERY (0x1a00)
+#define DW2102_LED_CTRL (0x1b00)
 
 #define err_str "did not find the firmware file. (%s) " \
                 "Please see linux/Documentation/dvb/ for more details " \
                 "on firmware-problems."
 
-struct ir_codes_dvb_usb_table_table {
-        struct ir_scancode *rc_keys;
+struct rc_map_dvb_usb_table_table {
+        struct rc_map_table *rc_keys;
         int rc_keys_size;
 };
 
+struct su3000_state {
+        u8 initialized;
+};
+
+struct s6x0_state {
+        int (*old_set_voltage)(struct dvb_frontend *f, fe_sec_voltage_t v);
+};
+
 /* debug */
 static int dvb_usb_dw2102_debug;
 module_param_named(debug, dvb_usb_dw2102_debug, int, 0644);
@@ -87,7 +106,8 @@ MODULE_PARM_DESC(debug, "set debugging level (1=info 2=xfer 4=rc(or-able))."
 /* keymaps */
 static int ir_keymap;
 module_param_named(keymap, ir_keymap, int, 0644);
-MODULE_PARM_DESC(keymap, "set keymap 0=default 1=dvbworld 2=tevii 3=tbs  ...");
+MODULE_PARM_DESC(keymap, "set keymap 0=default 1=dvbworld 2=tevii 3=tbs  ..."
+                        " 256=none");
 
 /* demod probe */
 static int demod_probe = 1;
@@ -101,12 +121,16 @@ static int dw210x_op_rw(struct usb_device *dev, u8 request, u16 value,
                         u16 index, u8 * data, u16 len, int flags)
 {
         int ret;
-        u8 u8buf[len];
-
+        u8 *u8buf;
         unsigned int pipe = (flags == DW210X_READ_MSG) ?
                                 usb_rcvctrlpipe(dev, 0) : usb_sndctrlpipe(dev, 0);
         u8 request_type = (flags == DW210X_READ_MSG) ? USB_DIR_IN : USB_DIR_OUT;
 
+        u8buf = kmalloc(len, GFP_KERNEL);
+        if (!u8buf)
+                return -ENOMEM;
+
+
         if (flags == DW210X_WRITE_MSG)
                 memcpy(u8buf, data, len);
         ret = usb_control_msg(dev, pipe, request, request_type | USB_TYPE_VENDOR,
@@ -114,6 +138,8 @@ static int dw210x_op_rw(struct usb_device *dev, u8 request, u16 value,
 
         if (flags == DW210X_READ_MSG)
                 memcpy(data, u8buf, len);
+
+        kfree(u8buf);
         return ret;
 }
 
@@ -136,8 +162,7 @@ static int dw2102_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg msg[],
                 /* read stv0299 register */
                 value = msg[0].buf[0];/* register */
                 for (i = 0; i < msg[1].len; i++) {
-                        value = value + i;
-                        ret = dw210x_op_rw(d->udev, 0xb5, value, 0,
+                        ret = dw210x_op_rw(d->udev, 0xb5, value + i, 0,
                                         buf6, 2, DW210X_READ_MSG);
                         msg[1].buf[i] = buf6[0];
                 }
@@ -483,10 +508,10 @@ static int s6x0_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg msg[],
         for (j = 0; j < num; j++) {
                 switch (msg[j].addr) {
                 case (DW2102_RC_QUERY): {
-                        u8 ibuf[4];
+                        u8 ibuf[5];
                         ret  = dw210x_op_rw(d->udev, 0xb8, 0, 0,
-                                        ibuf, 4, DW210X_READ_MSG);
-                        memcpy(msg[j].buf, ibuf + 1, 2);
+                                        ibuf, 5, DW210X_READ_MSG);
+                        memcpy(msg[j].buf, ibuf + 3, 2);
                         break;
                 }
                 case (DW2102_VOLTAGE_CTRL): {
@@ -502,6 +527,15 @@ static int s6x0_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg msg[],
                                         obuf, 2, DW210X_WRITE_MSG);
                         break;
                 }
+                case (DW2102_LED_CTRL): {
+                        u8 obuf[2];
+
+                        obuf[0] = 5;
+                        obuf[1] = msg[j].buf[0];
+                        ret = dw210x_op_rw(d->udev, 0x8a, 0, 0,
+                                        obuf, 2, DW210X_WRITE_MSG);
+                        break;
+                }
                 /*case 0x55: cx24116
                 case 0x6a: stv0903
                 case 0x68: ds3000, stv0903
@@ -535,14 +569,15 @@ static int s6x0_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg msg[],
                                         i += 16;
                                         len -= 16;
                                 } while (len > 0);
-                        } else if ((udev->descriptor.idProduct == 0x7500)
-                                        && (j < (num - 1))) {
+                        } else if (j < (num - 1)) {
                                 /* write register addr before read */
                                 u8 obuf[msg[j].len + 2];
                                 obuf[0] = msg[j + 1].len;
                                 obuf[1] = (msg[j].addr << 1);
                                 memcpy(obuf + 2, msg[j].buf, msg[j].len);
-                                ret = dw210x_op_rw(d->udev, 0x92, 0, 0,
+                                ret = dw210x_op_rw(d->udev,
+                                                udev->descriptor.idProduct ==
+                                                0x7500 ? 0x92 : 0x90, 0, 0,
                                                 obuf, msg[j].len + 2,
                                                 DW210X_WRITE_MSG);
                                 break;
@@ -552,8 +587,7 @@ static int s6x0_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg msg[],
                                 obuf[0] = msg[j].len + 1;
                                 obuf[1] = (msg[j].addr << 1);
                                 memcpy(obuf + 2, msg[j].buf, msg[j].len);
-                                ret = dw210x_op_rw(d->udev,
-                                                (num > 1 ? 0x90 : 0x80), 0, 0,
+                                ret = dw210x_op_rw(d->udev, 0x80, 0, 0,
                                                 obuf, msg[j].len + 2,
                                                 DW210X_WRITE_MSG);
                                 break;
@@ -561,14 +595,76 @@ static int s6x0_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg msg[],
                         break;
                 }
                 }
-
-                msleep(3);
         }
 
         mutex_unlock(&d->i2c_mutex);
         return num;
 }
 
+static int su3000_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg msg[],
+                                                                int num)
+{
+        struct dvb_usb_device *d = i2c_get_adapdata(adap);
+        u8 obuf[0x40], ibuf[0x40];
+
+        if (!d)
+                return -ENODEV;
+        if (mutex_lock_interruptible(&d->i2c_mutex) < 0)
+                return -EAGAIN;
+
+        switch (num) {
+        case 1:
+                switch (msg[0].addr) {
+                case SU3000_STREAM_CTRL:
+                        obuf[0] = msg[0].buf[0] + 0x36;
+                        obuf[1] = 3;
+                        obuf[2] = 0;
+                        if (dvb_usb_generic_rw(d, obuf, 3, ibuf, 0, 0) < 0)
+                                err("i2c transfer failed.");
+                        break;
+                case DW2102_RC_QUERY:
+                        obuf[0] = 0x10;
+                        if (dvb_usb_generic_rw(d, obuf, 1, ibuf, 2, 0) < 0)
+                                err("i2c transfer failed.");
+                        msg[0].buf[1] = ibuf[0];
+                        msg[0].buf[0] = ibuf[1];
+                        break;
+                default:
+                        /* always i2c write*/
+                        obuf[0] = 0x08;
+                        obuf[1] = msg[0].addr;
+                        obuf[2] = msg[0].len;
+
+                        memcpy(&obuf[3], msg[0].buf, msg[0].len);
+
+                        if (dvb_usb_generic_rw(d, obuf, msg[0].len + 3,
+                                                ibuf, 1, 0) < 0)
+                                err("i2c transfer failed.");
+
+                }
+                break;
+        case 2:
+                /* always i2c read */
+                obuf[0] = 0x09;
+                obuf[1] = msg[0].len;
+                obuf[2] = msg[1].len;
+                obuf[3] = msg[0].addr;
+                memcpy(&obuf[4], msg[0].buf, msg[0].len);
+
+                if (dvb_usb_generic_rw(d, obuf, msg[0].len + 4,
+                                        ibuf, msg[1].len + 1, 0) < 0)
+                        err("i2c transfer failed.");
+
+                memcpy(msg[1].buf, &ibuf[1], msg[1].len);
+                break;
+        default:
+                warn("more than 2 i2c messages at a time is not handled yet.");
+                break;
+        }
+        mutex_unlock(&d->i2c_mutex);
+        return num;
+}
+
 static u32 dw210x_i2c_func(struct i2c_adapter *adapter)
 {
         return I2C_FUNC_I2C;
@@ -604,6 +700,11 @@ static struct i2c_algorithm s6x0_i2c_algo = {
         .functionality = dw210x_i2c_func,
 };
 
+static struct i2c_algorithm su3000_i2c_algo = {
+        .master_xfer = su3000_i2c_transfer,
+        .functionality = dw210x_i2c_func,
+};
+
 static int dw210x_read_mac_address(struct dvb_usb_device *d, u8 mac[6])
 {
         int i;
@@ -668,6 +769,82 @@ static int s6x0_read_mac_address(struct dvb_usb_device *d, u8 mac[6])
         return 0;
 };
 
+static int su3000_streaming_ctrl(struct dvb_usb_adapter *adap, int onoff)
+{
+        static u8 command_start[] = {0x00};
+        static u8 command_stop[] = {0x01};
+        struct i2c_msg msg = {
+                .addr = SU3000_STREAM_CTRL,
+                .flags = 0,
+                .buf = onoff ? command_start : command_stop,
+                .len = 1
+        };
+
+        i2c_transfer(&adap->dev->i2c_adap, &msg, 1);
+
+        return 0;
+}
+
+static int su3000_power_ctrl(struct dvb_usb_device *d, int i)
+{
+        struct su3000_state *state = (struct su3000_state *)d->priv;
+        u8 obuf[] = {0xde, 0};
+
+        info("%s: %d, initialized %d\n", __func__, i, state->initialized);
+
+        if (i && !state->initialized) {
+                state->initialized = 1;
+                /* reset board */
+                dvb_usb_generic_rw(d, obuf, 2, NULL, 0, 0);
+        }
+
+        return 0;
+}
+
+static int su3000_read_mac_address(struct dvb_usb_device *d, u8 mac[6])
+{
+        int i;
+        u8 obuf[] = { 0x1f, 0xf0 };
+        u8 ibuf[] = { 0 };
+        struct i2c_msg msg[] = {
+                {
+                        .addr = 0x51,
+                        .flags = 0,
+                        .buf = obuf,
+                        .len = 2,
+                }, {
+                        .addr = 0x51,
+                        .flags = I2C_M_RD,
+                        .buf = ibuf,
+                        .len = 1,
+
+                }
+        };
+
+        for (i = 0; i < 6; i++) {
+                obuf[1] = 0xf0 + i;
+                if (i2c_transfer(&d->i2c_adap, msg, 2) != 2)
+                        break;
+                else
+                        mac[i] = ibuf[0];
+
+                debug_dump(mac, 6, printk);
+        }
+
+        return 0;
+}
+
+static int su3000_identify_state(struct usb_device *udev,
+                                 struct dvb_usb_device_properties *props,
+                                 struct dvb_usb_device_description **desc,
+                                 int *cold)
+{
+        info("%s\n", __func__);
+
+        *cold = 0;
+        return 0;
+}
+
 static int dw210x_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
 {
         static u8 command_13v[] = {0x00, 0x01};
@@ -692,6 +869,37 @@ static int dw210x_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
         return 0;
 }
 
+static int s660_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
+{
+        struct dvb_usb_adapter *d =
+                (struct dvb_usb_adapter *)(fe->dvb->priv);
+        struct s6x0_state *st = (struct s6x0_state *)d->dev->priv;
+
+        dw210x_set_voltage(fe, voltage);
+        if (st->old_set_voltage)
+                st->old_set_voltage(fe, voltage);
+
+        return 0;
+}
+
+static void dw210x_led_ctrl(struct dvb_frontend *fe, int offon)
+{
+        static u8 led_off[] = { 0 };
+        static u8 led_on[] = { 1 };
+        struct i2c_msg msg = {
+                .addr = DW2102_LED_CTRL,
+                .flags = 0,
+                .buf = led_off,
+                .len = 1
+        };
+        struct dvb_usb_adapter *udev_adap =
+                (struct dvb_usb_adapter *)(fe->dvb->priv);
+
+        if (offon)
+                msg.buf = led_on;
+        i2c_transfer(&udev_adap->dev->i2c_adap, &msg, 1);
+}
+
 static struct stv0299_config sharp_z0194a_config = {
         .demod_address = 0x68,
         .inittab = sharp_z0194a_inittab,
@@ -771,6 +979,12 @@ static struct stv0900_config prof_7500_stv0900_config = {
         .tun1_adc = 0,/* 2 Vpp */
         .path1_mode = 3,
         .tun1_type = 3,
+        .set_lock_led = dw210x_led_ctrl,
+};
+
+static struct ds3000_config su3000_ds3000_config = {
+        .demod_address = 0x68,
+        .ci_mode = 1,
 };
 
 static int dw2104_frontend_attach(struct dvb_usb_adapter *d)
@@ -885,7 +1099,7 @@ static int dw3101_frontend_attach(struct dvb_usb_adapter *d)
         return -EIO;
 }
 
-static int s6x0_frontend_attach(struct dvb_usb_adapter *d)
+static int zl100313_frontend_attach(struct dvb_usb_adapter *d)
 {
         d->fe = dvb_attach(mt312_attach, &zl313_config,
                         &d->dev->i2c_adap);
@@ -898,41 +1112,108 @@ static int s6x0_frontend_attach(struct dvb_usb_adapter *d)
                 }
         }
 
+        return -EIO;
+}
+
+static int stv0288_frontend_attach(struct dvb_usb_adapter *d)
+{
+        u8 obuf[] = {7, 1};
+
         d->fe = dvb_attach(stv0288_attach, &earda_config,
                         &d->dev->i2c_adap);
-        if (d->fe != NULL) {
-                if (dvb_attach(stb6000_attach, d->fe, 0x61,
-                                &d->dev->i2c_adap)) {
-                        d->fe->ops.set_voltage = dw210x_set_voltage;
-                        info("Attached stv0288+stb6000!\n");
-                        return 0;
-                }
-        }
+
+        if (d->fe == NULL)
+                return -EIO;
+
+        if (NULL == dvb_attach(stb6000_attach, d->fe, 0x61, &d->dev->i2c_adap))
+                return -EIO;
+
+        d->fe->ops.set_voltage = dw210x_set_voltage;
+
+        dw210x_op_rw(d->dev->udev, 0x8a, 0, 0, obuf, 2, DW210X_WRITE_MSG);
+
+        info("Attached stv0288+stb6000!\n");
+
+        return 0;
+
+}
+
+static int ds3000_frontend_attach(struct dvb_usb_adapter *d)
+{
+        struct s6x0_state *st = (struct s6x0_state *)d->dev->priv;
+        u8 obuf[] = {7, 1};
 
         d->fe = dvb_attach(ds3000_attach, &dw2104_ds3000_config,
                         &d->dev->i2c_adap);
-        if (d->fe != NULL) {
-                d->fe->ops.set_voltage = dw210x_set_voltage;
-                info("Attached ds3000+ds2020!\n");
-                return 0;
-        }
 
-        return -EIO;
+        if (d->fe == NULL)
+                return -EIO;
+
+        st->old_set_voltage = d->fe->ops.set_voltage;
+        d->fe->ops.set_voltage = s660_set_voltage;
+
+        dw210x_op_rw(d->dev->udev, 0x8a, 0, 0, obuf, 2, DW210X_WRITE_MSG);
+
+        info("Attached ds3000+ds2020!\n");
+
+        return 0;
 }
 
 static int prof_7500_frontend_attach(struct dvb_usb_adapter *d)
 {
+        u8 obuf[] = {7, 1};
+
         d->fe = dvb_attach(stv0900_attach, &prof_7500_stv0900_config,
                                         &d->dev->i2c_adap, 0);
         if (d->fe == NULL)
                 return -EIO;
+
         d->fe->ops.set_voltage = dw210x_set_voltage;
 
+        dw210x_op_rw(d->dev->udev, 0x8a, 0, 0, obuf, 2, DW210X_WRITE_MSG);
+
         info("Attached STV0900+STB6100A!\n");
 
         return 0;
 }
 
+static int su3000_frontend_attach(struct dvb_usb_adapter *d)
+{
+        u8 obuf[3] = { 0xe, 0x80, 0 };
+        u8 ibuf[] = { 0 };
+
+        if (dvb_usb_generic_rw(d->dev, obuf, 3, ibuf, 1, 0) < 0)
+                err("command 0x0e transfer failed.");
+
+        obuf[0] = 0xe;
+        obuf[1] = 0x83;
+        obuf[2] = 0;
+
+        if (dvb_usb_generic_rw(d->dev, obuf, 3, ibuf, 1, 0) < 0)
+                err("command 0x0e transfer failed.");
+
+        obuf[0] = 0xe;
+        obuf[1] = 0x83;
+        obuf[2] = 1;
+
+        if (dvb_usb_generic_rw(d->dev, obuf, 3, ibuf, 1, 0) < 0)
+                err("command 0x0e transfer failed.");
+
+        obuf[0] = 0x51;
+
+        if (dvb_usb_generic_rw(d->dev, obuf, 1, ibuf, 1, 0) < 0)
+                err("command 0x51 transfer failed.");
+
+        d->fe = dvb_attach(ds3000_attach, &su3000_ds3000_config,
+                                        &d->dev->i2c_adap);
+        if (d->fe == NULL)
+                return -EIO;
+
+        info("Attached DS3000!\n");
+
+        return 0;
+}
+
 static int dw2102_tuner_attach(struct dvb_usb_adapter *adap)
 {
         dvb_attach(dvb_pll_attach, adap->fe, 0x60,
@@ -948,9 +1229,9 @@ static int dw3101_tuner_attach(struct dvb_usb_adapter *adap)
         return 0;
 }
 
-static struct ir_scancode ir_codes_dw210x_table[] = {
-        { 0xf80a, KEY_Q },              /*power*/
-        { 0xf80c, KEY_M },              /*mute*/
+static struct rc_map_table rc_map_dw210x_table[] = {
+        { 0xf80a, KEY_POWER2 },         /*power*/
+        { 0xf80c, KEY_MUTE },           /*mute*/
         { 0xf811, KEY_1 },
         { 0xf812, KEY_2 },
         { 0xf813, KEY_3 },
@@ -961,28 +1242,28 @@ static struct ir_scancode ir_codes_dw210x_table[] = {
         { 0xf818, KEY_8 },
         { 0xf819, KEY_9 },
         { 0xf810, KEY_0 },
-        { 0xf81c, KEY_PAGEUP }, /*ch+*/
-        { 0xf80f, KEY_PAGEDOWN },       /*ch-*/
-        { 0xf81a, KEY_O },              /*vol+*/
-        { 0xf80e, KEY_Z },              /*vol-*/
-        { 0xf804, KEY_R },              /*rec*/
-        { 0xf809, KEY_D },              /*fav*/
-        { 0xf808, KEY_BACKSPACE },      /*rewind*/
-        { 0xf807, KEY_A },              /*fast*/
-        { 0xf80b, KEY_P },              /*pause*/
-        { 0xf802, KEY_ESC },    /*cancel*/
-        { 0xf803, KEY_G },              /*tab*/
+        { 0xf81c, KEY_CHANNELUP },      /*ch+*/
+        { 0xf80f, KEY_CHANNELDOWN },    /*ch-*/
+        { 0xf81a, KEY_VOLUMEUP },       /*vol+*/
+        { 0xf80e, KEY_VOLUMEDOWN },     /*vol-*/
+        { 0xf804, KEY_RECORD },         /*rec*/
+        { 0xf809, KEY_FAVORITES },      /*fav*/
+        { 0xf808, KEY_REWIND },         /*rewind*/
+        { 0xf807, KEY_FASTFORWARD },    /*fast*/
+        { 0xf80b, KEY_PAUSE },          /*pause*/
+        { 0xf802, KEY_ESC },            /*cancel*/
+        { 0xf803, KEY_TAB },            /*tab*/
         { 0xf800, KEY_UP },             /*up*/
-        { 0xf81f, KEY_ENTER },  /*ok*/
-        { 0xf801, KEY_DOWN },   /*down*/
-        { 0xf805, KEY_C },              /*cap*/
-        { 0xf806, KEY_S },              /*stop*/
-        { 0xf840, KEY_F },              /*full*/
-        { 0xf81e, KEY_W },              /*tvmode*/
-        { 0xf81b, KEY_B },              /*recall*/
+        { 0xf81f, KEY_OK },             /*ok*/
+        { 0xf801, KEY_DOWN },           /*down*/
+        { 0xf805, KEY_CAMERA },         /*cap*/
+        { 0xf806, KEY_STOP },           /*stop*/
+        { 0xf840, KEY_ZOOM },           /*full*/
+        { 0xf81e, KEY_TV },             /*tvmode*/
+        { 0xf81b, KEY_LAST },           /*recall*/
 };
 
-static struct ir_scancode ir_codes_tevii_table[] = {
+static struct rc_map_table rc_map_tevii_table[] = {
         { 0xf80a, KEY_POWER },
         { 0xf80c, KEY_MUTE },
         { 0xf811, KEY_1 },
@@ -1032,7 +1313,7 @@ static struct ir_scancode ir_codes_tevii_table[] = {
         { 0xf858, KEY_SWITCHVIDEOMODE },
 };
 
-static struct ir_scancode ir_codes_tbs_table[] = {
+static struct rc_map_table rc_map_tbs_table[] = {
         { 0xf884, KEY_POWER },
         { 0xf894, KEY_MUTE },
         { 0xf887, KEY_1 },
@@ -1067,16 +1348,55 @@ static struct ir_scancode ir_codes_tbs_table[] = {
         { 0xf89b, KEY_MODE }
 };
 
-static struct ir_codes_dvb_usb_table_table keys_tables[] = {
-        { ir_codes_dw210x_table, ARRAY_SIZE(ir_codes_dw210x_table) },
-        { ir_codes_tevii_table, ARRAY_SIZE(ir_codes_tevii_table) },
-        { ir_codes_tbs_table, ARRAY_SIZE(ir_codes_tbs_table) },
+static struct rc_map_table rc_map_su3000_table[] = {
+        { 0x25, KEY_POWER },    /* right-bottom Red */
+        { 0x0a, KEY_MUTE },     /* -/-- */
+        { 0x01, KEY_1 },
+        { 0x02, KEY_2 },
+        { 0x03, KEY_3 },
+        { 0x04, KEY_4 },
+        { 0x05, KEY_5 },
+        { 0x06, KEY_6 },
+        { 0x07, KEY_7 },
+        { 0x08, KEY_8 },
+        { 0x09, KEY_9 },
+        { 0x00, KEY_0 },
+        { 0x20, KEY_UP },       /* CH+ */
+        { 0x21, KEY_DOWN },     /* CH+ */
+        { 0x12, KEY_VOLUMEUP }, /* Brightness Up */
+        { 0x13, KEY_VOLUMEDOWN },/* Brightness Down */
+        { 0x1f, KEY_RECORD },
+        { 0x17, KEY_PLAY },
+        { 0x16, KEY_PAUSE },
+        { 0x0b, KEY_STOP },
+        { 0x27, KEY_FASTFORWARD },/* >> */
+        { 0x26, KEY_REWIND },   /* << */
+        { 0x0d, KEY_OK },       /* Mute */
+        { 0x11, KEY_LEFT },     /* VOL- */
+        { 0x10, KEY_RIGHT },    /* VOL+ */
+        { 0x29, KEY_BACK },     /* button under 9 */
+        { 0x2c, KEY_MENU },     /* TTX */
+        { 0x2b, KEY_EPG },      /* EPG */
+        { 0x1e, KEY_RED },      /* OSD */
+        { 0x0e, KEY_GREEN },    /* Window */
+        { 0x2d, KEY_YELLOW },   /* button under << */
+        { 0x0f, KEY_BLUE },     /* bottom yellow button */
+        { 0x14, KEY_AUDIO },    /* Snapshot */
+        { 0x38, KEY_TV },       /* TV/Radio */
+        { 0x0c, KEY_ESC }       /* upper Red button */
+};
+
+static struct rc_map_dvb_usb_table_table keys_tables[] = {
+        { rc_map_dw210x_table, ARRAY_SIZE(rc_map_dw210x_table) },
+        { rc_map_tevii_table, ARRAY_SIZE(rc_map_tevii_table) },
+        { rc_map_tbs_table, ARRAY_SIZE(rc_map_tbs_table) },
+        { rc_map_su3000_table, ARRAY_SIZE(rc_map_su3000_table) },
 };
 
 static int dw2102_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
 {
-        struct ir_scancode *keymap = d->props.rc.legacy.rc_key_map;
-        int keymap_size = d->props.rc.legacy.rc_key_map_size;
+        struct rc_map_table *keymap = d->props.rc.legacy.rc_map_table;
+        int keymap_size = d->props.rc.legacy.rc_map_size;
         u8 key[2];
         struct i2c_msg msg = {
                 .addr = DW2102_RC_QUERY,
@@ -1089,7 +1409,8 @@ static int dw2102_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
         if ((ir_keymap > 0) && (ir_keymap <= ARRAY_SIZE(keys_tables))) {
                 keymap = keys_tables[ir_keymap - 1].rc_keys ;
                 keymap_size = keys_tables[ir_keymap - 1].rc_keys_size;
-        }
+        } else if (ir_keymap > ARRAY_SIZE(keys_tables))
+                return 0; /* none */
 
         *state = REMOTE_NO_KEY_PRESSED;
         if (d->props.i2c_algo->master_xfer(&d->i2c_adap, &msg, 1) == 1) {
@@ -1125,6 +1446,11 @@ static struct usb_device_id dw2102_table[] = {
         {USB_DEVICE(0x3011, USB_PID_PROF_1100)},
         {USB_DEVICE(0x9022, USB_PID_TEVII_S660)},
         {USB_DEVICE(0x3034, 0x7500)},
+        {USB_DEVICE(0x1f4d, 0x3000)},
+        {USB_DEVICE(USB_VID_TERRATEC, 0x00a8)},
+        {USB_DEVICE(0x9022, USB_PID_TEVII_S480_1)},
+        {USB_DEVICE(0x9022, USB_PID_TEVII_S480_2)},
+        {USB_DEVICE(0x1f4d, 0x3100)},
         { }
 };
 
@@ -1184,15 +1510,10 @@ static int dw2102_load_firmware(struct usb_device *dev,
                 }
                 /* init registers */
                 switch (dev->descriptor.idProduct) {
-                case USB_PID_PROF_1100:
-                        s6x0_properties.rc.legacy.rc_key_map = ir_codes_tbs_table;
-                        s6x0_properties.rc.legacy.rc_key_map_size =
-                                        ARRAY_SIZE(ir_codes_tbs_table);
-                        break;
                 case USB_PID_TEVII_S650:
-                        dw2104_properties.rc.legacy.rc_key_map = ir_codes_tevii_table;
-                        dw2104_properties.rc.legacy.rc_key_map_size =
-                                        ARRAY_SIZE(ir_codes_tevii_table);
+                        dw2104_properties.rc.legacy.rc_map_table = rc_map_tevii_table;
+                        dw2104_properties.rc.legacy.rc_map_size =
+                                        ARRAY_SIZE(rc_map_tevii_table);
                 case USB_PID_DW2104:
                         reset = 1;
                         dw210x_op_rw(dev, 0xc4, 0x0000, 0, &reset, 1,
@@ -1257,8 +1578,8 @@ static struct dvb_usb_device_properties dw2102_properties = {
         .i2c_algo = &dw2102_serit_i2c_algo,
 
         .rc.legacy = {
-                .rc_key_map = ir_codes_dw210x_table,
-                .rc_key_map_size = ARRAY_SIZE(ir_codes_dw210x_table),
+                .rc_map_table = rc_map_dw210x_table,
+                .rc_map_size = ARRAY_SIZE(rc_map_dw210x_table),
                 .rc_interval = 150,
                 .rc_query = dw2102_rc_query,
         },
@@ -1271,8 +1592,6 @@ static struct dvb_usb_device_properties dw2102_properties = {
         .adapter = {
                 {
                         .frontend_attach = dw2102_frontend_attach,
-                        .streaming_ctrl = NULL,
-                        .tuner_attach = NULL,
                         .stream = {
                                 .type = USB_BULK,
                                 .count = 8,
@@ -1310,8 +1629,8 @@ static struct dvb_usb_device_properties dw2104_properties = {
 
         .i2c_algo = &dw2104_i2c_algo,
         .rc.legacy = {
-                .rc_key_map = ir_codes_dw210x_table,
-                .rc_key_map_size = ARRAY_SIZE(ir_codes_dw210x_table),
+                .rc_map_table = rc_map_dw210x_table,
+                .rc_map_size = ARRAY_SIZE(rc_map_dw210x_table),
                 .rc_interval = 150,
                 .rc_query = dw2102_rc_query,
         },
@@ -1324,8 +1643,6 @@ static struct dvb_usb_device_properties dw2104_properties = {
         .adapter = {
                 {
                         .frontend_attach = dw2104_frontend_attach,
-                        .streaming_ctrl = NULL,
-                        /*.tuner_attach = dw2104_tuner_attach,*/
                         .stream = {
                                 .type = USB_BULK,
                                 .count = 8,
@@ -1359,8 +1676,8 @@ static struct dvb_usb_device_properties dw3101_properties = {
 
         .i2c_algo = &dw3101_i2c_algo,
         .rc.legacy = {
-                .rc_key_map = ir_codes_dw210x_table,
-                .rc_key_map_size = ARRAY_SIZE(ir_codes_dw210x_table),
+                .rc_map_table = rc_map_dw210x_table,
+                .rc_map_size = ARRAY_SIZE(rc_map_dw210x_table),
                 .rc_interval = 150,
                 .rc_query = dw2102_rc_query,
         },
@@ -1373,7 +1690,6 @@ static struct dvb_usb_device_properties dw3101_properties = {
         .adapter = {
                 {
                         .frontend_attach = dw3101_frontend_attach,
-                        .streaming_ctrl = NULL,
                         .tuner_attach = dw3101_tuner_attach,
                         .stream = {
                                 .type = USB_BULK,
@@ -1399,13 +1715,14 @@ static struct dvb_usb_device_properties dw3101_properties = {
 static struct dvb_usb_device_properties s6x0_properties = {
         .caps = DVB_USB_IS_AN_I2C_ADAPTER,
         .usb_ctrl = DEVICE_SPECIFIC,
+        .size_of_priv = sizeof(struct s6x0_state),
         .firmware = "dvb-usb-s630.fw",
         .no_reconnect = 1,
 
         .i2c_algo = &s6x0_i2c_algo,
         .rc.legacy = {
-                .rc_key_map = ir_codes_tevii_table,
-                .rc_key_map_size = ARRAY_SIZE(ir_codes_tevii_table),
+                .rc_map_table = rc_map_tevii_table,
+                .rc_map_size = ARRAY_SIZE(rc_map_tevii_table),
                 .rc_interval = 150,
                 .rc_query = dw2102_rc_query,
         },
@@ -1416,9 +1733,7 @@ static struct dvb_usb_device_properties s6x0_properties = {
         .read_mac_address = s6x0_read_mac_address,
         .adapter = {
                 {
-                        .frontend_attach = s6x0_frontend_attach,
-                        .streaming_ctrl = NULL,
-                        .tuner_attach = NULL,
+                        .frontend_attach = zl100313_frontend_attach,
                         .stream = {
                                 .type = USB_BULK,
                                 .count = 8,
@@ -1431,23 +1746,41 @@ static struct dvb_usb_device_properties s6x0_properties = {
                         },
                 }
         },
-        .num_device_descs = 3,
+        .num_device_descs = 1,
         .devices = {
                 {"TeVii S630 USB",
                         {&dw2102_table[6], NULL},
                         {NULL},
                 },
-                {"Prof 1100 USB ",
-                        {&dw2102_table[7], NULL},
-                        {NULL},
-                },
-                {"TeVii S660 USB",
-                        {&dw2102_table[8], NULL},
-                        {NULL},
-                },
         }
 };
 
+struct dvb_usb_device_properties *p1100;
+static struct dvb_usb_device_description d1100 = {
+        "Prof 1100 USB ",
+        {&dw2102_table[7], NULL},
+        {NULL},
+};
+
+struct dvb_usb_device_properties *s660;
+static struct dvb_usb_device_description d660 = {
+        "TeVii S660 USB",
+        {&dw2102_table[8], NULL},
+        {NULL},
+};
+
+static struct dvb_usb_device_description d480_1 = {
+        "TeVii S480.1 USB",
+        {&dw2102_table[12], NULL},
+        {NULL},
+};
+
+static struct dvb_usb_device_description d480_2 = {
+        "TeVii S480.2 USB",
+        {&dw2102_table[13], NULL},
+        {NULL},
+};
+
 struct dvb_usb_device_properties *p7500;
 static struct dvb_usb_device_description d7500 = {
         "Prof 7500 USB DVB-S2",
@@ -1455,21 +1788,101 @@ static struct dvb_usb_device_description d7500 = {
         {NULL},
 };
 
+static struct dvb_usb_device_properties su3000_properties = {
+        .caps = DVB_USB_IS_AN_I2C_ADAPTER,
+        .usb_ctrl = DEVICE_SPECIFIC,
+        .size_of_priv = sizeof(struct su3000_state),
+        .power_ctrl = su3000_power_ctrl,
+        .num_adapters = 1,
+        .identify_state = su3000_identify_state,
+        .i2c_algo = &su3000_i2c_algo,
+
+        .rc.legacy = {
+                .rc_map_table = rc_map_su3000_table,
+                .rc_map_size = ARRAY_SIZE(rc_map_su3000_table),
+                .rc_interval = 150,
+                .rc_query = dw2102_rc_query,
+        },
+
+        .read_mac_address = su3000_read_mac_address,
+
+        .generic_bulk_ctrl_endpoint = 0x01,
+
+        .adapter = {
+                {
+                        .streaming_ctrl   = su3000_streaming_ctrl,
+                        .frontend_attach  = su3000_frontend_attach,
+                        .stream = {
+                                .type = USB_BULK,
+                                .count = 8,
+                                .endpoint = 0x82,
+                                .u = {
+                                        .bulk = {
+                                                .buffersize = 4096,
+                                        }
+                                }
+                        }
+                }
+        },
+        .num_device_descs = 3,
+        .devices = {
+                { "SU3000HD DVB-S USB2.0",
+                        { &dw2102_table[10], NULL },
+                        { NULL },
+                },
+                { "Terratec Cinergy S2 USB HD",
+                        { &dw2102_table[11], NULL },
+                        { NULL },
+                },
+                { "X3M TV SPC1400HD PCI",
+                        { &dw2102_table[14], NULL },
+                        { NULL },
+                },
+        }
+};
+
 static int dw2102_probe(struct usb_interface *intf,
                 const struct usb_device_id *id)
 {
+        p1100 = kzalloc(sizeof(struct dvb_usb_device_properties), GFP_KERNEL);
+        if (!p1100)
+                return -ENOMEM;
+        /* copy default structure */
+        memcpy(p1100, &s6x0_properties,
+                        sizeof(struct dvb_usb_device_properties));
+        /* fill only different fields */
+        p1100->firmware = "dvb-usb-p1100.fw";
+        p1100->devices[0] = d1100;
+        p1100->rc.legacy.rc_map_table = rc_map_tbs_table;
+        p1100->rc.legacy.rc_map_size = ARRAY_SIZE(rc_map_tbs_table);
+        p1100->adapter->frontend_attach = stv0288_frontend_attach;
+
+        s660 = kzalloc(sizeof(struct dvb_usb_device_properties), GFP_KERNEL);
+        if (!s660) {
+                kfree(p1100);
+                return -ENOMEM;
+        }
+        memcpy(s660, &s6x0_properties,
+                        sizeof(struct dvb_usb_device_properties));
+        s660->firmware = "dvb-usb-s660.fw";
+        s660->num_device_descs = 3;
+        s660->devices[0] = d660;
+        s660->devices[1] = d480_1;
+        s660->devices[2] = d480_2;
+        s660->adapter->frontend_attach = ds3000_frontend_attach;
 
         p7500 = kzalloc(sizeof(struct dvb_usb_device_properties), GFP_KERNEL);
-        if (!p7500)
+        if (!p7500) {
+                kfree(p1100);
+                kfree(s660);
                 return -ENOMEM;
-        /* copy default structure */
+        }
         memcpy(p7500, &s6x0_properties,
                         sizeof(struct dvb_usb_device_properties));
-        /* fill only different fields */
         p7500->firmware = "dvb-usb-p7500.fw";
         p7500->devices[0] = d7500;
-        p7500->rc.legacy.rc_key_map = ir_codes_tbs_table;
-        p7500->rc.legacy.rc_key_map_size = ARRAY_SIZE(ir_codes_tbs_table);
+        p7500->rc.legacy.rc_map_table = rc_map_tbs_table;
+        p7500->rc.legacy.rc_map_size = ARRAY_SIZE(rc_map_tbs_table);
         p7500->adapter->frontend_attach = prof_7500_frontend_attach;
 
         if (0 == dvb_usb_device_init(intf, &dw2102_properties,
@@ -1480,8 +1893,14 @@ static int dw2102_probe(struct usb_interface *intf,
                         THIS_MODULE, NULL, adapter_nr) ||
             0 == dvb_usb_device_init(intf, &s6x0_properties,
                         THIS_MODULE, NULL, adapter_nr) ||
+            0 == dvb_usb_device_init(intf, p1100,
+                        THIS_MODULE, NULL, adapter_nr) ||
+            0 == dvb_usb_device_init(intf, s660,
+                        THIS_MODULE, NULL, adapter_nr) ||
             0 == dvb_usb_device_init(intf, p7500,
-                        THIS_MODULE, NULL, adapter_nr))
+                        THIS_MODULE, NULL, adapter_nr) ||
+            0 == dvb_usb_device_init(intf, &su3000_properties,
+                                     THIS_MODULE, NULL, adapter_nr))
                 return 0;
 
         return -ENODEV;
@@ -1514,7 +1933,8 @@ module_exit(dw2102_module_exit);
 MODULE_AUTHOR("Igor M. Liplianin (c) liplianin@me.by");
 MODULE_DESCRIPTION("Driver for DVBWorld DVB-S 2101, 2102, DVB-S2 2104,"
                                 " DVB-C 3101 USB2.0,"
-                                " TeVii S600, S630, S650, S660 USB2.0,"
-                                " Prof 1100, 7500 USB2.0 devices");
+                                " TeVii S600, S630, S650, S660, S480,"
+                                " Prof 1100, 7500 USB2.0,"
+                                " Geniatech SU3000 devices");
 MODULE_VERSION("0.1");
 MODULE_LICENSE("GPL");
diff --git a/drivers/media/dvb/dvb-usb/ec168.c b/drivers/media/dvb/dvb-usb/ec168.c
index 52f5d4f0f230..1ba3e5dbee10 100644
--- a/drivers/media/dvb/dvb-usb/ec168.c
+++ b/drivers/media/dvb/dvb-usb/ec168.c
@@ -36,7 +36,9 @@ static int ec168_rw_udev(struct usb_device *udev, struct ec168_req *req)
         int ret;
         unsigned int pipe;
         u8 request, requesttype;
-        u8 buf[req->size];
+        u8 *buf;
+
+
 
         switch (req->cmd) {
         case DOWNLOAD_FIRMWARE:
@@ -72,6 +74,12 @@ static int ec168_rw_udev(struct usb_device *udev, struct ec168_req *req)
                 goto error;
         }
 
+        buf = kmalloc(req->size, GFP_KERNEL);
+        if (!buf) {
+                ret = -ENOMEM;
+                goto error;
+        }
+
         if (requesttype == (USB_TYPE_VENDOR | USB_DIR_OUT)) {
                 /* write */
                 memcpy(buf, req->data, req->size);
@@ -84,13 +92,13 @@ static int ec168_rw_udev(struct usb_device *udev, struct ec168_req *req)
         msleep(1); /* avoid I2C errors */
 
         ret = usb_control_msg(udev, pipe, request, requesttype, req->value,
-                req->index, buf, sizeof(buf), EC168_USB_TIMEOUT);
+                req->index, buf, req->size, EC168_USB_TIMEOUT);
 
         ec168_debug_dump(request, requesttype, req->value, req->index, buf,
                 req->size, deb_xfer);
 
         if (ret < 0)
-                goto error;
+                goto err_dealloc;
         else
                 ret = 0;
 
@@ -98,7 +106,11 @@ static int ec168_rw_udev(struct usb_device *udev, struct ec168_req *req)
         if (!ret && requesttype == (USB_TYPE_VENDOR | USB_DIR_IN))
                 memcpy(req->data, buf, req->size);
 
+        kfree(buf);
         return ret;
+
+err_dealloc:
+        kfree(buf);
 error:
         deb_info("%s: failed:%d\n", __func__, ret);
         return ret;
diff --git a/drivers/media/dvb/dvb-usb/friio-fe.c b/drivers/media/dvb/dvb-usb/friio-fe.c
index 93c21ddd0b77..015b4e8af1a5 100644
--- a/drivers/media/dvb/dvb-usb/friio-fe.c
+++ b/drivers/media/dvb/dvb-usb/friio-fe.c
@@ -75,7 +75,7 @@ static int jdvbt90502_single_reg_write(struct jdvbt90502_state *state,
         return 0;
 }
 
-static int _jdvbt90502_write(struct dvb_frontend *fe, u8 *buf, int len)
+static int _jdvbt90502_write(struct dvb_frontend *fe, const u8 buf[], int len)
 {
         struct jdvbt90502_state *state = fe->demodulator_priv;
         int err, i;
diff --git a/drivers/media/dvb/dvb-usb/friio.c b/drivers/media/dvb/dvb-usb/friio.c
index 14a65b4aec07..76159aed9bb0 100644
--- a/drivers/media/dvb/dvb-usb/friio.c
+++ b/drivers/media/dvb/dvb-usb/friio.c
@@ -142,17 +142,20 @@ static u32 gl861_i2c_func(struct i2c_adapter *adapter)
         return I2C_FUNC_I2C;
 }
 
-
 static int friio_ext_ctl(struct dvb_usb_adapter *adap,
                          u32 sat_color, int lnb_on)
 {
         int i;
         int ret;
         struct i2c_msg msg;
-        u8 buf[2];
+        u8 *buf;
         u32 mask;
         u8 lnb = (lnb_on) ? FRIIO_CTL_LNB : 0;
 
+        buf = kmalloc(2, GFP_KERNEL);
+        if (!buf)
+                return -ENOMEM;
+
         msg.addr = 0x00;
         msg.flags = 0;
         msg.len = 2;
@@ -189,6 +192,7 @@ static int friio_ext_ctl(struct dvb_usb_adapter *adap,
         buf[1] |= FRIIO_CTL_CLK;
         ret += gl861_i2c_xfer(&adap->dev->i2c_adap, &msg, 1);
 
+        kfree(buf);
         return (ret == 70);
 }
 
@@ -219,11 +223,20 @@ static int friio_initialize(struct dvb_usb_device *d)
         int ret;
         int i;
         int retry = 0;
-        u8 rbuf[2];
-        u8 wbuf[3];
+        u8 *rbuf, *wbuf;
 
         deb_info("%s called.\n", __func__);
 
+        wbuf = kmalloc(3, GFP_KERNEL);
+        if (!wbuf)
+                return -ENOMEM;
+
+        rbuf = kmalloc(2, GFP_KERNEL);
+        if (!rbuf) {
+                kfree(wbuf);
+                return -ENOMEM;
+        }
+
         /* use gl861_i2c_msg instead of gl861_i2c_xfer(), */
         /* because the i2c device is not set up yet. */
         wbuf[0] = 0x11;
@@ -358,6 +371,8 @@ restart:
         return 0;
 
 error:
+        kfree(wbuf);
+        kfree(rbuf);
         deb_info("%s:ret == %d\n", __func__, ret);
         return -EIO;
 }
diff --git a/drivers/media/dvb/dvb-usb/friio.h b/drivers/media/dvb/dvb-usb/friio.h
index af8d55e390fb..0f461ca10cb9 100644
--- a/drivers/media/dvb/dvb-usb/friio.h
+++ b/drivers/media/dvb/dvb-usb/friio.h
@@ -20,7 +20,7 @@
  *         Frontend:                             comtech JDVBT-90502
  *             (tuner PLL:                       tua6034, I2C addr:(0xC0 >> 1))
  *             (OFDM demodulator:                TC90502, I2C addr:(0x30 >> 1))
- *         LED x3 (+LNB) controll:               PIC 16F676
+ *         LED x3 (+LNB) control:                PIC 16F676
  *         EEPROM:                               24C08
  *
  *        (USB smart card reader:                AU9522)
diff --git a/drivers/media/dvb/dvb-usb/gp8psk-fe.c b/drivers/media/dvb/dvb-usb/gp8psk-fe.c
index dbdb5347b2a8..60d11e57e7d0 100644
--- a/drivers/media/dvb/dvb-usb/gp8psk-fe.c
+++ b/drivers/media/dvb/dvb-usb/gp8psk-fe.c
@@ -109,7 +109,7 @@ static int gp8psk_fe_read_signal_strength(struct dvb_frontend* fe, u16 *strength
 
 static int gp8psk_fe_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings *tune)
 {
-        tune->min_delay_ms = 200;
+        tune->min_delay_ms = 800;
         return 0;
 }
 
@@ -334,7 +334,7 @@ success:
 
 static struct dvb_frontend_ops gp8psk_fe_ops = {
         .info = {
-                .name                   = "Genpix 8psk-to-USB2 DVB-S",
+                .name                   = "Genpix DVB-S",
                 .type                   = FE_QPSK,
                 .frequency_min          = 800000,
                 .frequency_max          = 2250000,
diff --git a/drivers/media/dvb/dvb-usb/gp8psk.c b/drivers/media/dvb/dvb-usb/gp8psk.c
index 45106ac49674..1cb3d9a66e02 100644
--- a/drivers/media/dvb/dvb-usb/gp8psk.c
+++ b/drivers/media/dvb/dvb-usb/gp8psk.c
@@ -24,6 +24,33 @@ MODULE_PARM_DESC(debug, "set debugging level (1=info,xfer=2,rc=4 (or-able))." DV
 
 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
 
+static int gp8psk_get_fw_version(struct dvb_usb_device *d, u8 *fw_vers)
+{
+        return (gp8psk_usb_in_op(d, GET_FW_VERS, 0, 0, fw_vers, 6));
+}
+
+static int gp8psk_get_fpga_version(struct dvb_usb_device *d, u8 *fpga_vers)
+{
+        return (gp8psk_usb_in_op(d, GET_FPGA_VERS, 0, 0, fpga_vers, 1));
+}
+
+static void gp8psk_info(struct dvb_usb_device *d)
+{
+        u8 fpga_vers, fw_vers[6];
+
+        if (!gp8psk_get_fw_version(d, fw_vers))
+                info("FW Version = %i.%02i.%i (0x%x)  Build %4i/%02i/%02i",
+                fw_vers[2], fw_vers[1], fw_vers[0], GP8PSK_FW_VERS(fw_vers),
+                2000 + fw_vers[5], fw_vers[4], fw_vers[3]);
+        else
+                info("failed to get FW version");
+
+        if (!gp8psk_get_fpga_version(d, &fpga_vers))
+                info("FPGA Version = %i", fpga_vers);
+        else
+                info("failed to get FPGA version");
+}
+
 int gp8psk_usb_in_op(struct dvb_usb_device *d, u8 req, u16 value, u16 index, u8 *b, int blen)
 {
         int ret = 0,try = 0;
@@ -146,6 +173,7 @@ static int gp8psk_power_ctrl(struct dvb_usb_device *d, int onoff)
                                 gp8psk_usb_out_op(d, CW3K_INIT, 1, 0, NULL, 0);
                         if (gp8psk_usb_in_op(d, BOOT_8PSK, 1, 0, &buf, 1))
                                 return -EINVAL;
+                        gp8psk_info(d);
                 }
 
                 if (gp_product_id == USB_PID_GENPIX_8PSK_REV_1_WARM)
@@ -227,6 +255,7 @@ static struct usb_device_id gp8psk_usb_table [] = {
             { USB_DEVICE(USB_VID_GENPIX, USB_PID_GENPIX_8PSK_REV_1_WARM) },
             { USB_DEVICE(USB_VID_GENPIX, USB_PID_GENPIX_8PSK_REV_2) },
             { USB_DEVICE(USB_VID_GENPIX, USB_PID_GENPIX_SKYWALKER_1) },
+            { USB_DEVICE(USB_VID_GENPIX, USB_PID_GENPIX_SKYWALKER_2) },
 /*          { USB_DEVICE(USB_VID_GENPIX, USB_PID_GENPIX_SKYWALKER_CW3K) }, */
             { 0 },
 };
@@ -258,7 +287,7 @@ static struct dvb_usb_device_properties gp8psk_properties = {
 
         .generic_bulk_ctrl_endpoint = 0x01,
 
-        .num_device_descs = 3,
+        .num_device_descs = 4,
         .devices = {
                 { .name = "Genpix 8PSK-to-USB2 Rev.1 DVB-S receiver",
                   .cold_ids = { &gp8psk_usb_table[0], NULL },
@@ -272,6 +301,10 @@ static struct dvb_usb_device_properties gp8psk_properties = {
                   .cold_ids = { NULL },
                   .warm_ids = { &gp8psk_usb_table[3], NULL },
                 },
+                { .name = "Genpix SkyWalker-2 DVB-S receiver",
+                  .cold_ids = { NULL },
+                  .warm_ids = { &gp8psk_usb_table[4], NULL },
+                },
                 { NULL },
         }
 };
@@ -306,6 +339,6 @@ module_init(gp8psk_usb_module_init);
 module_exit(gp8psk_usb_module_exit);
 
 MODULE_AUTHOR("Alan Nisota <alannisota@gamil.com>");
-MODULE_DESCRIPTION("Driver for Genpix 8psk-to-USB2 DVB-S");
+MODULE_DESCRIPTION("Driver for Genpix DVB-S");
 MODULE_VERSION("1.1");
 MODULE_LICENSE("GPL");
diff --git a/drivers/media/dvb/dvb-usb/gp8psk.h b/drivers/media/dvb/dvb-usb/gp8psk.h
index e83a57506cfa..831749a518cb 100644
--- a/drivers/media/dvb/dvb-usb/gp8psk.h
+++ b/drivers/media/dvb/dvb-usb/gp8psk.h
@@ -25,7 +25,6 @@ extern int dvb_usb_gp8psk_debug;
 #define deb_xfer(args...) dprintk(dvb_usb_gp8psk_debug,0x02,args)
 #define deb_rc(args...)   dprintk(dvb_usb_gp8psk_debug,0x04,args)
 #define deb_fe(args...)   dprintk(dvb_usb_gp8psk_debug,0x08,args)
-/* gp8psk commands */
 
 /* Twinhan Vendor requests */
 #define TH_COMMAND_IN                     0xC0
@@ -49,8 +48,10 @@ extern int dvb_usb_gp8psk_debug;
 #define SET_DVB_MODE                    0x8E
 #define SET_DN_SWITCH                   0x8F
 #define GET_SIGNAL_LOCK                 0x90    /* in */
+#define GET_FW_VERS                     0x92
 #define GET_SERIAL_NUMBER               0x93    /* in */
 #define USE_EXTRA_VOLT                  0x94
+#define GET_FPGA_VERS                   0x95
 #define CW3K_INIT                       0x9d
 
 /* PSK_configuration bits */
@@ -88,6 +89,11 @@ extern int dvb_usb_gp8psk_debug;
 #define PRODUCT_STRING_READ               0x0D
 #define FW_BCD_VERSION_READ               0x14
 
+/* firmware revision id's */
+#define GP8PSK_FW_REV1                  0x020604
+#define GP8PSK_FW_REV2                  0x020704
+#define GP8PSK_FW_VERS(_fw_vers)        ((_fw_vers)[2]<<0x10 | (_fw_vers)[1]<<0x08 | (_fw_vers)[0])
+
 extern struct dvb_frontend * gp8psk_fe_attach(struct dvb_usb_device *d);
 extern int gp8psk_usb_in_op(struct dvb_usb_device *d, u8 req, u16 value, u16 index, u8 *b, int blen);
 extern int gp8psk_usb_out_op(struct dvb_usb_device *d, u8 req, u16 value,
diff --git a/drivers/media/dvb/dvb-usb/lmedm04.c b/drivers/media/dvb/dvb-usb/lmedm04.c
new file mode 100644
index 000000000000..37b146961ae2
--- /dev/null
+++ b/drivers/media/dvb/dvb-usb/lmedm04.c
@@ -0,0 +1,1310 @@
+/* DVB USB compliant linux driver for
+ *
+ * DM04/QQBOX DVB-S USB BOX     LME2510C + SHARP:BS2F7HZ7395
+ *                              LME2510C + LG TDQY-P001F
+ *                              LME2510C + BS2F7HZ0194
+ *                              LME2510 + LG TDQY-P001F
+ *                              LME2510 + BS2F7HZ0194
+ *
+ * MVB7395 (LME2510C+SHARP:BS2F7HZ7395)
+ * SHARP:BS2F7HZ7395 = (STV0288+Sharp IX2505V)
+ *
+ * MV001F (LME2510+LGTDQY-P001F)
+ * LG TDQY - P001F =(TDA8263 + TDA10086H)
+ *
+ * MVB0001F (LME2510C+LGTDQT-P001F)
+ *
+ * MV0194 (LME2510+SHARP:BS2F7HZ0194)
+ * SHARP:BS2F7HZ0194 = (STV0299+IX2410)
+ *
+ * MVB0194 (LME2510C+SHARP0194)
+ *
+ * For firmware see Documentation/dvb/lmedm04.txt
+ *
+ * I2C addresses:
+ * 0xd0 - STV0288       - Demodulator
+ * 0xc0 - Sharp IX2505V - Tuner
+ * --
+ * 0x1c - TDA10086   - Demodulator
+ * 0xc0 - TDA8263    - Tuner
+ * --
+ * 0xd0 - STV0299       - Demodulator
+ * 0xc0 - IX2410        - Tuner
+ *
+ *
+ * VID = 3344  PID LME2510=1122 LME2510C=1120
+ *
+ * Copyright (C) 2010 Malcolm Priestley (tvboxspy@gmail.com)
+ * LME2510(C)(C) Leaguerme (Shenzhen) MicroElectronics Co., Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License Version 2, as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ *
+ * see Documentation/dvb/README.dvb-usb for more information
+ *
+ * Known Issues :
+ *      LME2510: Non Intel USB chipsets fail to maintain High Speed on
+ * Boot or Hot Plug.
+ *
+ * QQbox suffers from noise on LNB voltage.
+ *
+ *      LME2510: SHARP:BS2F7HZ0194(MV0194) cannot cold reset and share system
+ * with other tuners. After a cold reset streaming will not start.
+ *
+ */
+#define DVB_USB_LOG_PREFIX "LME2510(C)"
+#include <linux/usb.h>
+#include <linux/usb/input.h>
+#include <media/rc-core.h>
+
+#include "dvb-usb.h"
+#include "lmedm04.h"
+#include "tda826x.h"
+#include "tda10086.h"
+#include "stv0288.h"
+#include "ix2505v.h"
+#include "stv0299.h"
+#include "dvb-pll.h"
+#include "z0194a.h"
+
+
+
+/* debug */
+static int dvb_usb_lme2510_debug;
+#define l_dprintk(var, level, args...) do { \
+        if ((var >= level)) \
+                printk(KERN_DEBUG DVB_USB_LOG_PREFIX ": " args); \
+} while (0)
+
+#define deb_info(level, args...) l_dprintk(dvb_usb_lme2510_debug, level, args)
+#define debug_data_snipet(level, name, p) \
+         deb_info(level, name" (%02x%02x%02x%02x%02x%02x%02x%02x)", \
+                *p, *(p+1), *(p+2), *(p+3), *(p+4), \
+                        *(p+5), *(p+6), *(p+7));
+
+
+module_param_named(debug, dvb_usb_lme2510_debug, int, 0644);
+MODULE_PARM_DESC(debug, "set debugging level (1=info (or-able))."
+                        DVB_USB_DEBUG_STATUS);
+
+static int dvb_usb_lme2510_firmware;
+module_param_named(firmware, dvb_usb_lme2510_firmware, int, 0644);
+MODULE_PARM_DESC(firmware, "set default firmware 0=Sharp7395 1=LG");
+
+static int pid_filter;
+module_param_named(pid, pid_filter, int, 0644);
+MODULE_PARM_DESC(pid, "set default 0=on 1=off");
+
+
+DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
+
+#define TUNER_DEFAULT   0x0
+#define TUNER_LG        0x1
+#define TUNER_S7395     0x2
+#define TUNER_S0194     0x3
+
+struct lme2510_state {
+        u8 id;
+        u8 tuner_config;
+        u8 signal_lock;
+        u8 signal_level;
+        u8 signal_sn;
+        u8 time_key;
+        u8 i2c_talk_onoff;
+        u8 i2c_gate;
+        u8 i2c_tuner_gate_w;
+        u8 i2c_tuner_gate_r;
+        u8 i2c_tuner_addr;
+        u8 stream_on;
+        u8 pid_size;
+        void *buffer;
+        struct urb *lme_urb;
+        void *usb_buffer;
+
+};
+
+static int lme2510_bulk_write(struct usb_device *dev,
+                                u8 *snd, int len, u8 pipe)
+{
+        int ret, actual_l;
+
+        ret = usb_bulk_msg(dev, usb_sndbulkpipe(dev, pipe),
+                                snd, len , &actual_l, 100);
+        return ret;
+}
+
+static int lme2510_bulk_read(struct usb_device *dev,
+                                u8 *rev, int len, u8 pipe)
+{
+        int ret, actual_l;
+
+        ret = usb_bulk_msg(dev, usb_rcvbulkpipe(dev, pipe),
+                                 rev, len , &actual_l, 200);
+        return ret;
+}
+
+static int lme2510_usb_talk(struct dvb_usb_device *d,
+                u8 *wbuf, int wlen, u8 *rbuf, int rlen)
+{
+        struct lme2510_state *st = d->priv;
+        u8 *buff;
+        int ret = 0;
+
+        if (st->usb_buffer == NULL) {
+                st->usb_buffer = kmalloc(512, GFP_KERNEL);
+                if (st->usb_buffer == NULL) {
+                        info("MEM Error no memory");
+                        return -ENOMEM;
+                }
+        }
+        buff = st->usb_buffer;
+
+        ret = mutex_lock_interruptible(&d->usb_mutex);
+
+        if (ret < 0)
+                return -EAGAIN;
+
+        /* the read/write capped at 512 */
+        memcpy(buff, wbuf, (wlen > 512) ? 512 : wlen);
+
+        ret |= usb_clear_halt(d->udev, usb_sndbulkpipe(d->udev, 0x01));
+
+        ret |= lme2510_bulk_write(d->udev, buff, wlen , 0x01);
+
+        msleep(10);
+
+        ret |= usb_clear_halt(d->udev, usb_rcvbulkpipe(d->udev, 0x01));
+
+        ret |= lme2510_bulk_read(d->udev, buff, (rlen > 512) ?
+                        512 : rlen , 0x01);
+
+        if (rlen > 0)
+                memcpy(rbuf, buff, rlen);
+
+        mutex_unlock(&d->usb_mutex);
+
+        return (ret < 0) ? -ENODEV : 0;
+}
+
+static int lme2510_stream_restart(struct dvb_usb_device *d)
+{
+        static u8 stream_on[] = LME_ST_ON_W;
+        int ret;
+        u8 rbuff[10];
+        /*Restart Stream Command*/
+        ret = lme2510_usb_talk(d, stream_on, sizeof(stream_on),
+                        rbuff, sizeof(rbuff));
+        return ret;
+}
+
+static int lme2510_enable_pid(struct dvb_usb_device *d, u8 index, u16 pid_out)
+{
+        struct lme2510_state *st = d->priv;
+        static u8 pid_buff[] = LME_ZERO_PID;
+        static u8 rbuf[1];
+        u8 pid_no = index * 2;
+        u8 pid_len = pid_no + 2;
+        int ret = 0;
+        deb_info(1, "PID Setting Pid %04x", pid_out);
+
+        if (st->pid_size == 0)
+                ret |= lme2510_stream_restart(d);
+
+        pid_buff[2] = pid_no;
+        pid_buff[3] = (u8)pid_out & 0xff;
+        pid_buff[4] = pid_no + 1;
+        pid_buff[5] = (u8)(pid_out >> 8);
+
+        if (pid_len > st->pid_size)
+                st->pid_size = pid_len;
+        pid_buff[7] = 0x80 + st->pid_size;
+
+        ret |= lme2510_usb_talk(d, pid_buff ,
+                sizeof(pid_buff) , rbuf, sizeof(rbuf));
+
+        if (st->stream_on)
+                ret |= lme2510_stream_restart(d);
+
+        return ret;
+}
+
+static void lme2510_int_response(struct urb *lme_urb)
+{
+        struct dvb_usb_adapter *adap = lme_urb->context;
+        struct lme2510_state *st = adap->dev->priv;
+        static u8 *ibuf, *rbuf;
+        int i = 0, offset;
+        u32 key;
+
+        switch (lme_urb->status) {
+        case 0:
+        case -ETIMEDOUT:
+                break;
+        case -ECONNRESET:
+        case -ENOENT:
+        case -ESHUTDOWN:
+                return;
+        default:
+                info("Error %x", lme_urb->status);
+                break;
+        }
+
+        rbuf = (u8 *) lme_urb->transfer_buffer;
+
+        offset = ((lme_urb->actual_length/8) > 4)
+                        ? 4 : (lme_urb->actual_length/8) ;
+
+        for (i = 0; i < offset; ++i) {
+                ibuf = (u8 *)&rbuf[i*8];
+                deb_info(5, "INT O/S C =%02x C/O=%02x Type =%02x%02x",
+                offset, i, ibuf[0], ibuf[1]);
+
+                switch (ibuf[0]) {
+                case 0xaa:
+                        debug_data_snipet(1, "INT Remote data snipet", ibuf);
+                        if ((ibuf[4] + ibuf[5]) == 0xff) {
+                                key = ibuf[5];
+                                key += (ibuf[3] > 0)
+                                        ? (ibuf[3] ^ 0xff) << 8 : 0;
+                                key += (ibuf[2] ^ 0xff) << 16;
+                                deb_info(1, "INT Key =%08x", key);
+                                if (adap->dev->rc_dev != NULL)
+                                        rc_keydown(adap->dev->rc_dev, key, 0);
+                        }
+                        break;
+                case 0xbb:
+                        switch (st->tuner_config) {
+                        case TUNER_LG:
+                                if (ibuf[2] > 0)
+                                        st->signal_lock = ibuf[2];
+                                st->signal_level = ibuf[4];
+                                st->signal_sn = ibuf[3];
+                                st->time_key = ibuf[7];
+                                break;
+                        case TUNER_S7395:
+                        case TUNER_S0194:
+                                /* Tweak for earlier firmware*/
+                                if (ibuf[1] == 0x03) {
+                                        if (ibuf[2] > 1)
+                                                st->signal_lock = ibuf[2];
+                                        st->signal_level = ibuf[3];
+                                        st->signal_sn = ibuf[4];
+                                } else {
+                                        st->signal_level = ibuf[4];
+                                        st->signal_sn = ibuf[5];
+                                        st->signal_lock =
+                                                (st->signal_lock & 0xf7) +
+                                                ((ibuf[2] & 0x01) << 0x03);
+                                }
+                                break;
+                        default:
+                                break;
+                        }
+                        debug_data_snipet(5, "INT Remote data snipet in", ibuf);
+                break;
+                case 0xcc:
+                        debug_data_snipet(1, "INT Control data snipet", ibuf);
+                        break;
+                default:
+                        debug_data_snipet(1, "INT Unknown data snipet", ibuf);
+                break;
+                }
+        }
+        usb_submit_urb(lme_urb, GFP_ATOMIC);
+}
+
+static int lme2510_int_read(struct dvb_usb_adapter *adap)
+{
+        struct lme2510_state *lme_int = adap->dev->priv;
+
+        lme_int->lme_urb = usb_alloc_urb(0, GFP_ATOMIC);
+
+        if (lme_int->lme_urb == NULL)
+                        return -ENOMEM;
+
+        lme_int->buffer = usb_alloc_coherent(adap->dev->udev, 5000, GFP_ATOMIC,
+                                        &lme_int->lme_urb->transfer_dma);
+
+        if (lme_int->buffer == NULL)
+                        return -ENOMEM;
+
+        usb_fill_int_urb(lme_int->lme_urb,
+                                adap->dev->udev,
+                                usb_rcvintpipe(adap->dev->udev, 0xa),
+                                lme_int->buffer,
+                                4096,
+                                lme2510_int_response,
+                                adap,
+                                11);
+
+        lme_int->lme_urb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;
+
+        usb_submit_urb(lme_int->lme_urb, GFP_ATOMIC);
+        info("INT Interrupt Service Started");
+
+        return 0;
+}
+
+static int lme2510_pid_filter_ctrl(struct dvb_usb_adapter *adap, int onoff)
+{
+        struct lme2510_state *st = adap->dev->priv;
+        static u8 clear_pid_reg[] = LME_CLEAR_PID;
+        static u8 rbuf[1];
+        int ret;
+
+        deb_info(1, "PID Clearing Filter");
+
+        ret = mutex_lock_interruptible(&adap->dev->i2c_mutex);
+        if (ret < 0)
+                return -EAGAIN;
+
+        if (!onoff)
+                ret |= lme2510_usb_talk(adap->dev, clear_pid_reg,
+                        sizeof(clear_pid_reg), rbuf, sizeof(rbuf));
+
+        st->pid_size = 0;
+
+        mutex_unlock(&adap->dev->i2c_mutex);
+
+        return 0;
+}
+
+static int lme2510_pid_filter(struct dvb_usb_adapter *adap, int index, u16 pid,
+        int onoff)
+{
+        int ret = 0;
+
+        deb_info(3, "%s PID=%04x Index=%04x onoff=%02x", __func__,
+                pid, index, onoff);
+
+        if (onoff)
+                if (!pid_filter) {
+                        ret = mutex_lock_interruptible(&adap->dev->i2c_mutex);
+                        if (ret < 0)
+                                return -EAGAIN;
+                        ret |= lme2510_enable_pid(adap->dev, index, pid);
+                        mutex_unlock(&adap->dev->i2c_mutex);
+        }
+
+
+        return ret;
+}
+
+
+static int lme2510_return_status(struct usb_device *dev)
+{
+        int ret = 0;
+        u8 *data;
+
+        data = kzalloc(10, GFP_KERNEL);
+        if (!data)
+                return -ENOMEM;
+
+        ret |= usb_control_msg(dev, usb_rcvctrlpipe(dev, 0),
+                        0x06, 0x80, 0x0302, 0x00, data, 0x0006, 200);
+        info("Firmware Status: %x (%x)", ret , data[2]);
+
+        ret = (ret < 0) ? -ENODEV : data[2];
+        kfree(data);
+        return ret;
+}
+
+static int lme2510_msg(struct dvb_usb_device *d,
+                u8 *wbuf, int wlen, u8 *rbuf, int rlen)
+{
+        int ret = 0;
+        struct lme2510_state *st = d->priv;
+
+        if (mutex_lock_interruptible(&d->i2c_mutex) < 0)
+                        return -EAGAIN;
+
+        if (st->i2c_talk_onoff == 1) {
+
+                ret = lme2510_usb_talk(d, wbuf, wlen, rbuf, rlen);
+
+                switch (st->tuner_config) {
+                case TUNER_LG:
+                        if (wbuf[2] == 0x1c) {
+                                if (wbuf[3] == 0x0e) {
+                                        st->signal_lock = rbuf[1];
+                                        if ((st->stream_on & 1) &&
+                                                (st->signal_lock & 0x10)) {
+                                                lme2510_stream_restart(d);
+                                                st->i2c_talk_onoff = 0;
+                                        }
+                                        msleep(80);
+                                }
+                        }
+                        break;
+                case TUNER_S7395:
+                        if (wbuf[2] == 0xd0) {
+                                if (wbuf[3] == 0x24) {
+                                        st->signal_lock = rbuf[1];
+                                        if ((st->stream_on & 1) &&
+                                                (st->signal_lock & 0x8)) {
+                                                lme2510_stream_restart(d);
+                                                st->i2c_talk_onoff = 0;
+                                        }
+                                }
+                                if ((wbuf[3] != 0x6) & (wbuf[3] != 0x5))
+                                        msleep(5);
+                        }
+                        break;
+                case TUNER_S0194:
+                        if (wbuf[2] == 0xd0) {
+                                if (wbuf[3] == 0x1b) {
+                                        st->signal_lock = rbuf[1];
+                                        if ((st->stream_on & 1) &&
+                                                (st->signal_lock & 0x8)) {
+                                                lme2510_stream_restart(d);
+                                                st->i2c_talk_onoff = 0;
+                                        }
+                                }
+                        }
+                        break;
+                default:
+                        break;
+                }
+        } else {
+                switch (st->tuner_config) {
+                case TUNER_LG:
+                        switch (wbuf[3]) {
+                        case 0x0e:
+                                rbuf[0] = 0x55;
+                                rbuf[1] = st->signal_lock;
+                                break;
+                        case 0x43:
+                                rbuf[0] = 0x55;
+                                rbuf[1] = st->signal_level;
+                                break;
+                        case 0x1c:
+                                rbuf[0] = 0x55;
+                                rbuf[1] = st->signal_sn;
+                                break;
+                        case 0x15:
+                        case 0x16:
+                        case 0x17:
+                        case 0x18:
+                                rbuf[0] = 0x55;
+                                rbuf[1] = 0x00;
+                                break;
+                        default:
+                                lme2510_usb_talk(d, wbuf, wlen, rbuf, rlen);
+                                st->i2c_talk_onoff = 1;
+                                break;
+                        }
+                        break;
+                case TUNER_S7395:
+                        switch (wbuf[3]) {
+                        case 0x10:
+                                rbuf[0] = 0x55;
+                                rbuf[1] = (st->signal_level & 0x80)
+                                                ? 0 : (st->signal_level * 2);
+                                break;
+                        case 0x2d:
+                                rbuf[0] = 0x55;
+                                rbuf[1] = st->signal_sn;
+                                break;
+                        case 0x24:
+                                rbuf[0] = 0x55;
+                                rbuf[1] = st->signal_lock;
+                                break;
+                        case 0x2e:
+                        case 0x26:
+                        case 0x27:
+                                rbuf[0] = 0x55;
+                                rbuf[1] = 0x00;
+                                break;
+                        default:
+                                lme2510_usb_talk(d, wbuf, wlen, rbuf, rlen);
+                                st->i2c_talk_onoff = 1;
+                                break;
+                        }
+                        break;
+                case TUNER_S0194:
+                        switch (wbuf[3]) {
+                        case 0x18:
+                                rbuf[0] = 0x55;
+                                rbuf[1] = (st->signal_level & 0x80)
+                                                ? 0 : (st->signal_level * 2);
+                                break;
+                        case 0x24:
+                                rbuf[0] = 0x55;
+                                rbuf[1] = st->signal_sn;
+                                break;
+                        case 0x1b:
+                                rbuf[0] = 0x55;
+                                rbuf[1] = st->signal_lock;
+                                break;
+                        case 0x19:
+                        case 0x25:
+                        case 0x1e:
+                        case 0x1d:
+                                rbuf[0] = 0x55;
+                                rbuf[1] = 0x00;
+                                break;
+                        default:
+                                lme2510_usb_talk(d, wbuf, wlen, rbuf, rlen);
+                                st->i2c_talk_onoff = 1;
+                                break;
+                        }
+                        break;
+                default:
+                        break;
+                }
+
+                deb_info(4, "I2C From Interrupt Message out(%02x) in(%02x)",
+                                wbuf[3], rbuf[1]);
+
+        }
+
+        mutex_unlock(&d->i2c_mutex);
+
+        return ret;
+}
+
+
+static int lme2510_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msg[],
+                                 int num)
+{
+        struct dvb_usb_device *d = i2c_get_adapdata(adap);
+        struct lme2510_state *st = d->priv;
+        static u8 obuf[64], ibuf[512];
+        int i, read, read_o;
+        u16 len;
+        u8 gate = st->i2c_gate;
+
+        if (gate == 0)
+                gate = 5;
+
+        if (num > 2)
+                warn("more than 2 i2c messages"
+                        "at a time is not handled yet.  TODO.");
+
+        for (i = 0; i < num; i++) {
+                read_o = 1 & (msg[i].flags & I2C_M_RD);
+                read = i+1 < num && (msg[i+1].flags & I2C_M_RD);
+                read |= read_o;
+                gate = (msg[i].addr == st->i2c_tuner_addr)
+                        ? (read)        ? st->i2c_tuner_gate_r
+                                        : st->i2c_tuner_gate_w
+                        : st->i2c_gate;
+                obuf[0] = gate | (read << 7);
+
+                if (gate == 5)
+                        obuf[1] = (read) ? 2 : msg[i].len + 1;
+                else
+                        obuf[1] = msg[i].len + read + 1;
+
+                obuf[2] = msg[i].addr;
+                if (read) {
+                        if (read_o)
+                                len = 3;
+                        else {
+                                memcpy(&obuf[3], msg[i].buf, msg[i].len);
+                                obuf[msg[i].len+3] = msg[i+1].len;
+                                len = msg[i].len+4;
+                        }
+                } else {
+                        memcpy(&obuf[3], msg[i].buf, msg[i].len);
+                        len = msg[i].len+3;
+                }
+
+                if (lme2510_msg(d, obuf, len, ibuf, 512) < 0) {
+                        deb_info(1, "i2c transfer failed.");
+                        return -EAGAIN;
+                }
+
+                if (read) {
+                        if (read_o)
+                                memcpy(msg[i].buf, &ibuf[1], msg[i].len);
+                        else {
+                                memcpy(msg[i+1].buf, &ibuf[1], msg[i+1].len);
+                                i++;
+                        }
+                }
+        }
+        return i;
+}
+
+static u32 lme2510_i2c_func(struct i2c_adapter *adapter)
+{
+        return I2C_FUNC_I2C;
+}
+
+static struct i2c_algorithm lme2510_i2c_algo = {
+        .master_xfer   = lme2510_i2c_xfer,
+        .functionality = lme2510_i2c_func,
+};
+
+/* Callbacks for DVB USB */
+static int lme2510_identify_state(struct usb_device *udev,
+                struct dvb_usb_device_properties *props,
+                struct dvb_usb_device_description **desc,
+                int *cold)
+{
+        *cold = 0;
+        return 0;
+}
+
+static int lme2510_streaming_ctrl(struct dvb_usb_adapter *adap, int onoff)
+{
+        struct lme2510_state *st = adap->dev->priv;
+        static u8 clear_reg_3[] = LME_CLEAR_PID;
+        static u8 rbuf[1];
+        int ret = 0, rlen = sizeof(rbuf);
+
+        deb_info(1, "STM  (%02x)", onoff);
+
+        /* Streaming is started by FE_HAS_LOCK */
+        if (onoff == 1)
+                st->stream_on = 1;
+        else {
+                deb_info(1, "STM Steam Off");
+                /* mutex is here only to avoid collision with I2C */
+                if (mutex_lock_interruptible(&adap->dev->i2c_mutex) < 0)
+                        return -EAGAIN;
+
+                ret = lme2510_usb_talk(adap->dev, clear_reg_3,
+                                sizeof(clear_reg_3), rbuf, rlen);
+                st->stream_on = 0;
+                st->i2c_talk_onoff = 1;
+
+                mutex_unlock(&adap->dev->i2c_mutex);
+        }
+
+        return (ret < 0) ? -ENODEV : 0;
+}
+
+static u8 check_sum(u8 *p, u8 len)
+{
+        u8 sum = 0;
+        while (len--)
+                sum += *p++;
+        return sum;
+}
+
+static int lme2510_download_firmware(struct usb_device *dev,
+                                        const struct firmware *fw)
+{
+        int ret = 0;
+        u8 *data;
+        u16 j, wlen, len_in, start, end;
+        u8 packet_size, dlen, i;
+        u8 *fw_data;
+
+        packet_size = 0x31;
+        len_in = 1;
+
+        data = kzalloc(512, GFP_KERNEL);
+        if (!data) {
+                info("FRM Could not start Firmware Download (Buffer allocation failed)");
+                return -ENOMEM;
+        }
+
+        info("FRM Starting Firmware Download");
+
+        for (i = 1; i < 3; i++) {
+                start = (i == 1) ? 0 : 512;
+                end = (i == 1) ? 512 : fw->size;
+                for (j = start; j < end; j += (packet_size+1)) {
+                        fw_data = (u8 *)(fw->data + j);
+                        if ((end - j) > packet_size) {
+                                data[0] = i;
+                                dlen = packet_size;
+                        } else {
+                                data[0] = i | 0x80;
+                                dlen = (u8)(end - j)-1;
+                        }
+                        data[1] = dlen;
+                        memcpy(&data[2], fw_data, dlen+1);
+                        wlen = (u8) dlen + 4;
+                        data[wlen-1] = check_sum(fw_data, dlen+1);
+                        deb_info(1, "Data S=%02x:E=%02x CS= %02x", data[3],
+                                data[dlen+2], data[dlen+3]);
+                        ret |= lme2510_bulk_write(dev, data,  wlen, 1);
+                        ret |= lme2510_bulk_read(dev, data, len_in , 1);
+                        ret |= (data[0] == 0x88) ? 0 : -1;
+                }
+        }
+
+        usb_control_msg(dev, usb_rcvctrlpipe(dev, 0),
+                        0x06, 0x80, 0x0200, 0x00, data, 0x0109, 1000);
+
+
+        data[0] = 0x8a;
+        len_in = 1;
+        msleep(2000);
+        ret |= lme2510_bulk_write(dev, data , len_in, 1); /*Resetting*/
+        ret |= lme2510_bulk_read(dev, data, len_in, 1);
+        msleep(400);
+
+        if (ret < 0)
+                info("FRM Firmware Download Failed (%04x)" , ret);
+        else
+                info("FRM Firmware Download Completed - Resetting Device");
+
+        kfree(data);
+        return (ret < 0) ? -ENODEV : 0;
+}
+
+static void lme_coldreset(struct usb_device *dev)
+{
+        int ret = 0, len_in;
+        u8 data[512] = {0};
+
+        data[0] = 0x0a;
+        len_in = 1;
+        info("FRM Firmware Cold Reset");
+        ret |= lme2510_bulk_write(dev, data , len_in, 1); /*Cold Resetting*/
+        ret |= lme2510_bulk_read(dev, data, len_in, 1);
+
+        return;
+}
+
+static int lme_firmware_switch(struct usb_device *udev, int cold)
+{
+        const struct firmware *fw = NULL;
+        const char fw_c_s7395[] = "dvb-usb-lme2510c-s7395.fw";
+        const char fw_c_lg[] = "dvb-usb-lme2510c-lg.fw";
+        const char fw_c_s0194[] = "dvb-usb-lme2510c-s0194.fw";
+        const char fw_lg[] = "dvb-usb-lme2510-lg.fw";
+        const char fw_s0194[] = "dvb-usb-lme2510-s0194.fw";
+        const char *fw_lme;
+        int ret, cold_fw;
+
+        cold = (cold > 0) ? (cold & 1) : 0;
+
+        cold_fw = !cold;
+
+        if (le16_to_cpu(udev->descriptor.idProduct) == 0x1122) {
+                switch (dvb_usb_lme2510_firmware) {
+                default:
+                        dvb_usb_lme2510_firmware = TUNER_S0194;
+                case TUNER_S0194:
+                        fw_lme = fw_s0194;
+                        ret = request_firmware(&fw, fw_lme, &udev->dev);
+                        if (ret == 0) {
+                                cold = 0;
+                                break;
+                        }
+                        dvb_usb_lme2510_firmware = TUNER_LG;
+                case TUNER_LG:
+                        fw_lme = fw_lg;
+                        ret = request_firmware(&fw, fw_lme, &udev->dev);
+                        if (ret == 0)
+                                break;
+                        info("FRM No Firmware Found - please install");
+                        dvb_usb_lme2510_firmware = TUNER_DEFAULT;
+                        cold = 0;
+                        cold_fw = 0;
+                        break;
+                }
+        } else {
+                switch (dvb_usb_lme2510_firmware) {
+                default:
+                        dvb_usb_lme2510_firmware = TUNER_S7395;
+                case TUNER_S7395:
+                        fw_lme = fw_c_s7395;
+                        ret = request_firmware(&fw, fw_lme, &udev->dev);
+                        if (ret == 0) {
+                                cold = 0;
+                                break;
+                        }
+                        dvb_usb_lme2510_firmware = TUNER_LG;
+                case TUNER_LG:
+                        fw_lme = fw_c_lg;
+                        ret = request_firmware(&fw, fw_lme, &udev->dev);
+                        if (ret == 0)
+                                break;
+                        dvb_usb_lme2510_firmware = TUNER_S0194;
+                case TUNER_S0194:
+                        fw_lme = fw_c_s0194;
+                        ret = request_firmware(&fw, fw_lme, &udev->dev);
+                        if (ret == 0)
+                                break;
+                        info("FRM No Firmware Found - please install");
+                        dvb_usb_lme2510_firmware = TUNER_DEFAULT;
+                        cold = 0;
+                        cold_fw = 0;
+                        break;
+                }
+        }
+
+        if (cold_fw) {
+                info("FRM Loading %s file", fw_lme);
+                ret = lme2510_download_firmware(udev, fw);
+        }
+
+        release_firmware(fw);
+
+        if (cold) {
+                info("FRM Changing to %s firmware", fw_lme);
+                lme_coldreset(udev);
+                return -ENODEV;
+        }
+
+        return ret;
+}
+
+static int lme2510_kill_urb(struct usb_data_stream *stream)
+{
+        int i;
+
+        for (i = 0; i < stream->urbs_submitted; i++) {
+                deb_info(3, "killing URB no. %d.", i);
+                /* stop the URB */
+                usb_kill_urb(stream->urb_list[i]);
+        }
+        stream->urbs_submitted = 0;
+
+        return 0;
+}
+
+static struct tda10086_config tda10086_config = {
+        .demod_address = 0x1c,
+        .invert = 0,
+        .diseqc_tone = 1,
+        .xtal_freq = TDA10086_XTAL_16M,
+};
+
+static struct stv0288_config lme_config = {
+        .demod_address = 0xd0,
+        .min_delay_ms = 15,
+        .inittab = s7395_inittab,
+};
+
+static struct ix2505v_config lme_tuner = {
+        .tuner_address = 0xc0,
+        .min_delay_ms = 100,
+        .tuner_gain = 0x0,
+        .tuner_chargepump = 0x3,
+};
+
+static struct stv0299_config sharp_z0194_config = {
+        .demod_address = 0xd0,
+        .inittab = sharp_z0194a_inittab,
+        .mclk = 88000000UL,
+        .invert = 0,
+        .skip_reinit = 0,
+        .lock_output = STV0299_LOCKOUTPUT_1,
+        .volt13_op0_op1 = STV0299_VOLT13_OP1,
+        .min_delay_ms = 100,
+        .set_symbol_rate = sharp_z0194a_set_symbol_rate,
+};
+
+static int dm04_lme2510_set_voltage(struct dvb_frontend *fe,
+                                        fe_sec_voltage_t voltage)
+{
+        struct dvb_usb_adapter *adap = fe->dvb->priv;
+        static u8 voltage_low[] = LME_VOLTAGE_L;
+        static u8 voltage_high[] = LME_VOLTAGE_H;
+        static u8 rbuf[1];
+        int ret = 0, len = 3, rlen = 1;
+
+        if (mutex_lock_interruptible(&adap->dev->i2c_mutex) < 0)
+                        return -EAGAIN;
+
+        switch (voltage) {
+        case SEC_VOLTAGE_18:
+                ret |= lme2510_usb_talk(adap->dev,
+                        voltage_high, len, rbuf, rlen);
+                break;
+
+        case SEC_VOLTAGE_OFF:
+        case SEC_VOLTAGE_13:
+        default:
+                ret |= lme2510_usb_talk(adap->dev,
+                                voltage_low, len, rbuf, rlen);
+                break;
+        }
+
+        mutex_unlock(&adap->dev->i2c_mutex);
+
+        return (ret < 0) ? -ENODEV : 0;
+}
+
+static int lme_name(struct dvb_usb_adapter *adap)
+{
+        struct lme2510_state *st = adap->dev->priv;
+        const char *desc = adap->dev->desc->name;
+        char *fe_name[] = {"", " LG TDQY-P001F", " SHARP:BS2F7HZ7395",
+                                " SHARP:BS2F7HZ0194"};
+        char *name = adap->fe->ops.info.name;
+
+        strlcpy(name, desc, 128);
+        strlcat(name, fe_name[st->tuner_config], 128);
+
+        return 0;
+}
+
+static int dm04_lme2510_frontend_attach(struct dvb_usb_adapter *adap)
+{
+        struct lme2510_state *st = adap->dev->priv;
+
+        int ret = 0;
+
+        st->i2c_talk_onoff = 1;
+
+        st->i2c_gate = 4;
+        adap->fe = dvb_attach(tda10086_attach, &tda10086_config,
+                &adap->dev->i2c_adap);
+
+        if (adap->fe) {
+                info("TUN Found Frontend TDA10086");
+                st->i2c_tuner_gate_w = 4;
+                st->i2c_tuner_gate_r = 4;
+                st->i2c_tuner_addr = 0xc0;
+                st->tuner_config = TUNER_LG;
+                if (dvb_usb_lme2510_firmware != TUNER_LG) {
+                        dvb_usb_lme2510_firmware = TUNER_LG;
+                        ret = lme_firmware_switch(adap->dev->udev, 1);
+                }
+                goto end;
+        }
+
+        st->i2c_gate = 4;
+        adap->fe = dvb_attach(stv0299_attach, &sharp_z0194_config,
+                        &adap->dev->i2c_adap);
+        if (adap->fe) {
+                info("FE Found Stv0299");
+                st->i2c_tuner_gate_w = 4;
+                st->i2c_tuner_gate_r = 5;
+                st->i2c_tuner_addr = 0xc0;
+                st->tuner_config = TUNER_S0194;
+                if (dvb_usb_lme2510_firmware != TUNER_S0194) {
+                        dvb_usb_lme2510_firmware = TUNER_S0194;
+                        ret = lme_firmware_switch(adap->dev->udev, 1);
+                }
+                goto end;
+        }
+
+        st->i2c_gate = 5;
+        adap->fe = dvb_attach(stv0288_attach, &lme_config,
+                        &adap->dev->i2c_adap);
+        if (adap->fe) {
+                info("FE Found Stv0288");
+                st->i2c_tuner_gate_w = 4;
+                st->i2c_tuner_gate_r = 5;
+                st->i2c_tuner_addr = 0xc0;
+                st->tuner_config = TUNER_S7395;
+                if (dvb_usb_lme2510_firmware != TUNER_S7395) {
+                        dvb_usb_lme2510_firmware = TUNER_S7395;
+                        ret = lme_firmware_switch(adap->dev->udev, 1);
+                }
+        } else {
+                info("DM04 Not Supported");
+                return -ENODEV;
+        }
+
+
+end:    if (ret) {
+                if (adap->fe) {
+                        dvb_frontend_detach(adap->fe);
+                        adap->fe = NULL;
+                }
+                adap->dev->props.rc.core.rc_codes = NULL;
+                return -ENODEV;
+        }
+
+        adap->fe->ops.set_voltage = dm04_lme2510_set_voltage;
+        ret = lme_name(adap);
+        return ret;
+}
+
+static int dm04_lme2510_tuner(struct dvb_usb_adapter *adap)
+{
+        struct lme2510_state *st = adap->dev->priv;
+        char *tun_msg[] = {"", "TDA8263", "IX2505V", "DVB_PLL_OPERA"};
+        int ret = 0;
+
+        switch (st->tuner_config) {
+        case TUNER_LG:
+                if (dvb_attach(tda826x_attach, adap->fe, 0xc0,
+                        &adap->dev->i2c_adap, 1))
+                        ret = st->tuner_config;
+                break;
+        case TUNER_S7395:
+                if (dvb_attach(ix2505v_attach , adap->fe, &lme_tuner,
+                        &adap->dev->i2c_adap))
+                        ret = st->tuner_config;
+                break;
+        case TUNER_S0194:
+                if (dvb_attach(dvb_pll_attach , adap->fe, 0xc0,
+                        &adap->dev->i2c_adap, DVB_PLL_OPERA1))
+                        ret = st->tuner_config;
+                break;
+        default:
+                break;
+        }
+
+        if (ret)
+                info("TUN Found %s tuner", tun_msg[ret]);
+        else {
+                info("TUN No tuner found --- reseting device");
+                lme_coldreset(adap->dev->udev);
+                return -ENODEV;
+        }
+
+        /* Start the Interrupt*/
+        ret = lme2510_int_read(adap);
+        if (ret < 0) {
+                info("INT Unable to start Interrupt Service");
+                return -ENODEV;
+        }
+
+        return ret;
+}
+
+static int lme2510_powerup(struct dvb_usb_device *d, int onoff)
+{
+        struct lme2510_state *st = d->priv;
+        static u8 lnb_on[] = LNB_ON;
+        static u8 lnb_off[] = LNB_OFF;
+        static u8 rbuf[1];
+        int ret, len = 3, rlen = 1;
+
+        if (mutex_lock_interruptible(&d->i2c_mutex) < 0)
+                return -EAGAIN;
+
+        if (onoff)
+                ret = lme2510_usb_talk(d, lnb_on, len, rbuf, rlen);
+        else
+                ret = lme2510_usb_talk(d, lnb_off, len, rbuf, rlen);
+
+        st->i2c_talk_onoff = 1;
+
+        mutex_unlock(&d->i2c_mutex);
+
+        return ret;
+}
+
+/* DVB USB Driver stuff */
+static struct dvb_usb_device_properties lme2510_properties;
+static struct dvb_usb_device_properties lme2510c_properties;
+
+static int lme2510_probe(struct usb_interface *intf,
+                const struct usb_device_id *id)
+{
+        struct usb_device *udev = interface_to_usbdev(intf);
+        int ret = 0;
+
+        usb_reset_configuration(udev);
+
+        usb_set_interface(udev, intf->cur_altsetting->desc.bInterfaceNumber, 1);
+
+        if (udev->speed != USB_SPEED_HIGH) {
+                ret = usb_reset_device(udev);
+                info("DEV Failed to connect in HIGH SPEED mode");
+                return -ENODEV;
+        }
+
+        if (lme2510_return_status(udev) == 0x44) {
+                lme_firmware_switch(udev, 0);
+                return -ENODEV;
+        }
+
+        if (0 == dvb_usb_device_init(intf, &lme2510_properties,
+                                     THIS_MODULE, NULL, adapter_nr)) {
+                info("DEV registering device driver");
+                return 0;
+        }
+        if (0 == dvb_usb_device_init(intf, &lme2510c_properties,
+                                     THIS_MODULE, NULL, adapter_nr)) {
+                info("DEV registering device driver");
+                return 0;
+        }
+
+        info("DEV lme2510 Error");
+        return -ENODEV;
+
+}
+
+static struct usb_device_id lme2510_table[] = {
+        { USB_DEVICE(0x3344, 0x1122) },  /* LME2510 */
+        { USB_DEVICE(0x3344, 0x1120) },  /* LME2510C */
+        {}              /* Terminating entry */
+};
+
+MODULE_DEVICE_TABLE(usb, lme2510_table);
+
+static struct dvb_usb_device_properties lme2510_properties = {
+        .caps = DVB_USB_IS_AN_I2C_ADAPTER,
+        .size_of_priv = sizeof(struct lme2510_state),
+        .num_adapters = 1,
+        .adapter = {
+                {
+                        .caps = DVB_USB_ADAP_HAS_PID_FILTER|
+                                DVB_USB_ADAP_NEED_PID_FILTERING|
+                                DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
+                        .streaming_ctrl   = lme2510_streaming_ctrl,
+                        .pid_filter_count = 15,
+                        .pid_filter = lme2510_pid_filter,
+                        .pid_filter_ctrl  = lme2510_pid_filter_ctrl,
+                        .frontend_attach  = dm04_lme2510_frontend_attach,
+                        .tuner_attach = dm04_lme2510_tuner,
+                        /* parameter for the MPEG2-data transfer */
+                        .stream = {
+                                .type = USB_BULK,
+                                .count = 10,
+                                .endpoint = 0x06,
+                                .u = {
+                                        .bulk = {
+                                                .buffersize = 4096,
+
+                                        }
+                                }
+                        }
+                }
+        },
+        .rc.core = {
+                .protocol       = RC_TYPE_NEC,
+                .module_name    = "LME2510 Remote Control",
+                .allowed_protos = RC_TYPE_NEC,
+                .rc_codes       = RC_MAP_LME2510,
+        },
+        .power_ctrl       = lme2510_powerup,
+        .identify_state   = lme2510_identify_state,
+        .i2c_algo         = &lme2510_i2c_algo,
+        .generic_bulk_ctrl_endpoint = 0,
+        .num_device_descs = 1,
+        .devices = {
+                {   "DM04_LME2510_DVB-S",
+                        { &lme2510_table[0], NULL },
+                        },
+
+        }
+};
+
+static struct dvb_usb_device_properties lme2510c_properties = {
+        .caps = DVB_USB_IS_AN_I2C_ADAPTER,
+        .size_of_priv = sizeof(struct lme2510_state),
+        .num_adapters = 1,
+        .adapter = {
+                {
+                        .caps = DVB_USB_ADAP_HAS_PID_FILTER|
+                                DVB_USB_ADAP_NEED_PID_FILTERING|
+                                DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
+                        .streaming_ctrl   = lme2510_streaming_ctrl,
+                        .pid_filter_count = 15,
+                        .pid_filter = lme2510_pid_filter,
+                        .pid_filter_ctrl  = lme2510_pid_filter_ctrl,
+                        .frontend_attach  = dm04_lme2510_frontend_attach,
+                        .tuner_attach = dm04_lme2510_tuner,
+                        /* parameter for the MPEG2-data transfer */
+                        .stream = {
+                                .type = USB_BULK,
+                                .count = 10,
+                                .endpoint = 0x8,
+                                .u = {
+                                        .bulk = {
+                                                .buffersize = 4096,
+
+                                        }
+                                }
+                        }
+                }
+        },
+        .rc.core = {
+                .protocol       = RC_TYPE_NEC,
+                .module_name    = "LME2510 Remote Control",
+                .allowed_protos = RC_TYPE_NEC,
+                .rc_codes       = RC_MAP_LME2510,
+        },
+        .power_ctrl       = lme2510_powerup,
+        .identify_state   = lme2510_identify_state,
+        .i2c_algo         = &lme2510_i2c_algo,
+        .generic_bulk_ctrl_endpoint = 0,
+        .num_device_descs = 1,
+        .devices = {
+                {   "DM04_LME2510C_DVB-S",
+                        { &lme2510_table[1], NULL },
+                        },
+        }
+};
+
+static void *lme2510_exit_int(struct dvb_usb_device *d)
+{
+        struct lme2510_state *st = d->priv;
+        struct dvb_usb_adapter *adap = &d->adapter[0];
+        void *buffer = NULL;
+
+        if (adap != NULL) {
+                lme2510_kill_urb(&adap->stream);
+                adap->feedcount = 0;
+        }
+
+        if (st->usb_buffer != NULL) {
+                st->i2c_talk_onoff = 1;
+                st->signal_lock = 0;
+                st->signal_level = 0;
+                st->signal_sn = 0;
+                buffer = st->usb_buffer;
+        }
+
+        if (st->lme_urb != NULL) {
+                usb_kill_urb(st->lme_urb);
+                usb_free_coherent(d->udev, 5000, st->buffer,
+                                  st->lme_urb->transfer_dma);
+                info("Interrupt Service Stopped");
+        }
+
+        return buffer;
+}
+
+static void lme2510_exit(struct usb_interface *intf)
+{
+        struct dvb_usb_device *d = usb_get_intfdata(intf);
+        void *usb_buffer;
+
+        if (d != NULL) {
+                usb_buffer = lme2510_exit_int(d);
+                dvb_usb_device_exit(intf);
+                if (usb_buffer != NULL)
+                        kfree(usb_buffer);
+        }
+}
+
+static struct usb_driver lme2510_driver = {
+        .name           = "LME2510C_DVB-S",
+        .probe          = lme2510_probe,
+        .disconnect     = lme2510_exit,
+        .id_table       = lme2510_table,
+};
+
+/* module stuff */
+static int __init lme2510_module_init(void)
+{
+        int result = usb_register(&lme2510_driver);
+        if (result) {
+                err("usb_register failed. Error number %d", result);
+                return result;
+        }
+
+        return 0;
+}
+
+static void __exit lme2510_module_exit(void)
+{
+        /* deregister this driver from the USB subsystem */
+        usb_deregister(&lme2510_driver);
+}
+
+module_init(lme2510_module_init);
+module_exit(lme2510_module_exit);
+
+MODULE_AUTHOR("Malcolm Priestley <tvboxspy@gmail.com>");
+MODULE_DESCRIPTION("LME2510(C) DVB-S USB2.0");
+MODULE_VERSION("1.88");
+MODULE_LICENSE("GPL");
diff --git a/drivers/media/dvb/dvb-usb/lmedm04.h b/drivers/media/dvb/dvb-usb/lmedm04.h
new file mode 100644
index 000000000000..ab21e2ef53fa
--- /dev/null
+++ b/drivers/media/dvb/dvb-usb/lmedm04.h
@@ -0,0 +1,174 @@
+/* DVB USB compliant linux driver for
+ *
+ * DM04/QQBOX DVB-S USB BOX     LME2510C + SHARP:BS2F7HZ7395
+ *                              LME2510C + LG TDQY-P001F
+ *                              LME2510 + LG TDQY-P001F
+ *
+ * MVB7395 (LME2510C+SHARP:BS2F7HZ7395)
+ * SHARP:BS2F7HZ7395 = (STV0288+Sharp IX2505V)
+ *
+ * MVB001F (LME2510+LGTDQT-P001F)
+ * LG TDQY - P001F =(TDA8263 + TDA10086H)
+ *
+ * MVB0001F (LME2510C+LGTDQT-P001F)
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation,  version 2.
+ * *
+ * see Documentation/dvb/README.dvb-usb for more information
+ */
+#ifndef _DVB_USB_LME2510_H_
+#define _DVB_USB_LME2510_H_
+
+/* Streamer &  PID
+ *
+ * Note:        These commands do not actually stop the streaming
+ *              but form some kind of packet filtering/stream count
+ *              or tuning related functions.
+ *  06 XX
+ *  offset 1 = 00 Enable Streaming
+ *
+ *
+ *  PID
+ *  03 XX XX  ----> reg number ---> setting....20 XX
+ *  offset 1 = length
+ *  offset 2 = start of data
+ *  end byte -1 = 20
+ *  end byte = clear pid always a0, other wise 9c, 9a ??
+ *
+*/
+#define LME_ST_ON_W     {0x06, 0x00}
+#define LME_CLEAR_PID   {0x03, 0x02, 0x20, 0xa0}
+#define LME_ZERO_PID    {0x03, 0x06, 0x00, 0x00, 0x01, 0x00, 0x20, 0x9c}
+
+/*  LNB Voltage
+ *  07 XX XX
+ *  offset 1 = 01
+ *  offset 2 = 00=Voltage low 01=Voltage high
+ *
+ *  LNB Power
+ *  03 01 XX
+ *  offset 2 = 00=ON 01=OFF
+ */
+
+#define LME_VOLTAGE_L   {0x07, 0x01, 0x00}
+#define LME_VOLTAGE_H   {0x07, 0x01, 0x01}
+#define LNB_ON          {0x3a, 0x01, 0x00}
+#define LNB_OFF         {0x3a, 0x01, 0x01}
+
+/* Initial stv0288 settings for 7395 Frontend */
+static u8 s7395_inittab[] = {
+        0x01, 0x15,
+        0x02, 0x20,
+        0x03, 0xa0,
+        0x04, 0xa0,
+        0x05, 0x12,
+        0x06, 0x00,
+        0x09, 0x00,
+        0x0a, 0x04,
+        0x0b, 0x00,
+        0x0c, 0x00,
+        0x0d, 0x00,
+        0x0e, 0xc1,
+        0x0f, 0x54,
+        0x11, 0x7a,
+        0x12, 0x03,
+        0x13, 0x48,
+        0x14, 0x84,
+        0x15, 0xc5,
+        0x16, 0xb8,
+        0x17, 0x9c,
+        0x18, 0x00,
+        0x19, 0xa6,
+        0x1a, 0x88,
+        0x1b, 0x8f,
+        0x1c, 0xf0,
+        0x20, 0x0b,
+        0x21, 0x54,
+        0x22, 0xff,
+        0x23, 0x01,
+        0x28, 0x46,
+        0x29, 0x66,
+        0x2a, 0x90,
+        0x2b, 0xfa,
+        0x2c, 0xd9,
+        0x30, 0x0,
+        0x31, 0x1e,
+        0x32, 0x14,
+        0x33, 0x0f,
+        0x34, 0x09,
+        0x35, 0x0c,
+        0x36, 0x05,
+        0x37, 0x2f,
+        0x38, 0x16,
+        0x39, 0xbd,
+        0x3a, 0x0,
+        0x3b, 0x13,
+        0x3c, 0x11,
+        0x3d, 0x30,
+        0x40, 0x63,
+        0x41, 0x04,
+        0x42, 0x20,
+        0x43, 0x00,
+        0x44, 0x00,
+        0x45, 0x00,
+        0x46, 0x00,
+        0x47, 0x00,
+        0x4a, 0x00,
+        0x50, 0x10,
+        0x51, 0x36,
+        0x52, 0x21,
+        0x53, 0x94,
+        0x54, 0xb2,
+        0x55, 0x29,
+        0x56, 0x64,
+        0x57, 0x2b,
+        0x58, 0x54,
+        0x59, 0x86,
+        0x5a, 0x00,
+        0x5b, 0x9b,
+        0x5c, 0x08,
+        0x5d, 0x7f,
+        0x5e, 0xff,
+        0x5f, 0x8d,
+        0x70, 0x0,
+        0x71, 0x0,
+        0x72, 0x0,
+        0x74, 0x0,
+        0x75, 0x0,
+        0x76, 0x0,
+        0x81, 0x0,
+        0x82, 0x3f,
+        0x83, 0x3f,
+        0x84, 0x0,
+        0x85, 0x0,
+        0x88, 0x0,
+        0x89, 0x0,
+        0x8a, 0x0,
+        0x8b, 0x0,
+        0x8c, 0x0,
+        0x90, 0x0,
+        0x91, 0x0,
+        0x92, 0x0,
+        0x93, 0x0,
+        0x94, 0x1c,
+        0x97, 0x0,
+        0xa0, 0x48,
+        0xa1, 0x0,
+        0xb0, 0xb8,
+        0xb1, 0x3a,
+        0xb2, 0x10,
+        0xb3, 0x82,
+        0xb4, 0x80,
+        0xb5, 0x82,
+        0xb6, 0x82,
+        0xb7, 0x82,
+        0xb8, 0x20,
+        0xb9, 0x0,
+        0xf0, 0x0,
+        0xf1, 0x0,
+        0xf2, 0xc0,
+        0xff, 0xff,
+};
+#endif
diff --git a/drivers/media/dvb/dvb-usb/m920x.c b/drivers/media/dvb/dvb-usb/m920x.c
index bdef1a18b664..9456792f219b 100644
--- a/drivers/media/dvb/dvb-usb/m920x.c
+++ b/drivers/media/dvb/dvb-usb/m920x.c
@@ -134,22 +134,26 @@ static int m920x_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
 {
         struct m920x_state *m = d->priv;
         int i, ret = 0;
-        u8 rc_state[2];
+        u8 *rc_state;
+
+        rc_state = kmalloc(2, GFP_KERNEL);
+        if (!rc_state)
+                return -ENOMEM;
 
         if ((ret = m920x_read(d->udev, M9206_CORE, 0x0, M9206_RC_STATE, rc_state, 1)) != 0)
-                goto unlock;
+                goto out;
 
         if ((ret = m920x_read(d->udev, M9206_CORE, 0x0, M9206_RC_KEY, rc_state + 1, 1)) != 0)
-                goto unlock;
+                goto out;
 
-        for (i = 0; i < d->props.rc.legacy.rc_key_map_size; i++)
-                if (rc5_data(&d->props.rc.legacy.rc_key_map[i]) == rc_state[1]) {
-                        *event = d->props.rc.legacy.rc_key_map[i].keycode;
+        for (i = 0; i < d->props.rc.legacy.rc_map_size; i++)
+                if (rc5_data(&d->props.rc.legacy.rc_map_table[i]) == rc_state[1]) {
+                        *event = d->props.rc.legacy.rc_map_table[i].keycode;
 
                         switch(rc_state[0]) {
                         case 0x80:
                                 *state = REMOTE_NO_KEY_PRESSED;
-                                goto unlock;
+                                goto out;
 
                         case 0x88: /* framing error or "invalid code" */
                         case 0x99:
@@ -157,7 +161,7 @@ static int m920x_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
                         case 0xd8:
                                 *state = REMOTE_NO_KEY_PRESSED;
                                 m->rep_count = 0;
-                                goto unlock;
+                                goto out;
 
                         case 0x93:
                         case 0x92:
@@ -165,7 +169,7 @@ static int m920x_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
                         case 0x82:
                                 m->rep_count = 0;
                                 *state = REMOTE_KEY_PRESSED;
-                                goto unlock;
+                                goto out;
 
                         case 0x91:
                         case 0x81: /* pinnacle PCTV310e */
@@ -174,12 +178,12 @@ static int m920x_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
                                         *state = REMOTE_KEY_REPEAT;
                                 else
                                         *state = REMOTE_NO_KEY_PRESSED;
-                                goto unlock;
+                                goto out;
 
                         default:
                                 deb("Unexpected rc state %02x\n", rc_state[0]);
                                 *state = REMOTE_NO_KEY_PRESSED;
-                                goto unlock;
+                                goto out;
                         }
                 }
 
@@ -188,8 +192,8 @@ static int m920x_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
 
         *state = REMOTE_NO_KEY_PRESSED;
 
- unlock:
-
+ out:
+        kfree(rc_state);
         return ret;
 }
 
@@ -339,13 +343,19 @@ static int m920x_pid_filter(struct dvb_usb_adapter *adap, int index, u16 pid, in
 static int m920x_firmware_download(struct usb_device *udev, const struct firmware *fw)
 {
         u16 value, index, size;
-        u8 read[4], *buff;
+        u8 *read, *buff;
         int i, pass, ret = 0;
 
         buff = kmalloc(65536, GFP_KERNEL);
         if (buff == NULL)
                 return -ENOMEM;
 
+        read = kmalloc(4, GFP_KERNEL);
+        if (!read) {
+                kfree(buff);
+                return -ENOMEM;
+        }
+
         if ((ret = m920x_read(udev, M9206_FILTER, 0x0, 0x8000, read, 4)) != 0)
                 goto done;
         deb("%x %x %x %x\n", read[0], read[1], read[2], read[3]);
@@ -396,6 +406,7 @@ static int m920x_firmware_download(struct usb_device *udev, const struct firmwar
         deb("firmware uploaded!\n");
 
  done:
+        kfree(read);
         kfree(buff);
 
         return ret;
@@ -589,7 +600,7 @@ static struct m920x_inits pinnacle310e_init[] = {
 };
 
 /* ir keymaps */
-static struct ir_scancode ir_codes_megasky_table[] = {
+static struct rc_map_table rc_map_megasky_table[] = {
         { 0x0012, KEY_POWER },
         { 0x001e, KEY_CYCLEWINDOWS }, /* min/max */
         { 0x0002, KEY_CHANNELUP },
@@ -608,7 +619,7 @@ static struct ir_scancode ir_codes_megasky_table[] = {
         { 0x000e, KEY_COFFEE }, /* "MTS" */
 };
 
-static struct ir_scancode ir_codes_tvwalkertwin_table[] = {
+static struct rc_map_table rc_map_tvwalkertwin_table[] = {
         { 0x0001, KEY_ZOOM }, /* Full Screen */
         { 0x0002, KEY_CAMERA }, /* snapshot */
         { 0x0003, KEY_MUTE },
@@ -628,13 +639,13 @@ static struct ir_scancode ir_codes_tvwalkertwin_table[] = {
         { 0x001e, KEY_VOLUMEUP },
 };
 
-static struct ir_scancode ir_codes_pinnacle310e_table[] = {
+static struct rc_map_table rc_map_pinnacle310e_table[] = {
         { 0x16, KEY_POWER },
         { 0x17, KEY_FAVORITES },
         { 0x0f, KEY_TEXT },
-        { 0x48, KEY_MEDIA },            /* preview */
+        { 0x48, KEY_PROGRAM },          /* preview */
         { 0x1c, KEY_EPG },
-        { 0x04, KEY_LIST },                     /* record list */
+        { 0x04, KEY_LIST },             /* record list */
         { 0x03, KEY_1 },
         { 0x01, KEY_2 },
         { 0x06, KEY_3 },
@@ -674,14 +685,14 @@ static struct ir_scancode ir_codes_pinnacle310e_table[] = {
         { 0x0e, KEY_MUTE },
 /*      { 0x49, KEY_LR },       */              /* L/R */
         { 0x07, KEY_SLEEP },            /* Hibernate */
-        { 0x08, KEY_MEDIA },            /* A/V */
-        { 0x0e, KEY_MENU },                     /* Recall */
+        { 0x08, KEY_VIDEO },            /* A/V */
+        { 0x0e, KEY_MENU },             /* Recall */
         { 0x45, KEY_ZOOMIN },
         { 0x46, KEY_ZOOMOUT },
-        { 0x18, KEY_TV },                       /* Red */
-        { 0x53, KEY_VCR },                      /* Green */
-        { 0x5e, KEY_SAT },                      /* Yellow */
-        { 0x5f, KEY_PLAYER },           /* Blue */
+        { 0x18, KEY_RED },              /* Red */
+        { 0x53, KEY_GREEN },            /* Green */
+        { 0x5e, KEY_YELLOW },           /* Yellow */
+        { 0x5f, KEY_BLUE },             /* Blue */
 };
 
 /* DVB USB Driver stuff */
@@ -786,8 +797,8 @@ static struct dvb_usb_device_properties megasky_properties = {
 
         .rc.legacy = {
                 .rc_interval      = 100,
-                .rc_key_map       = ir_codes_megasky_table,
-                .rc_key_map_size  = ARRAY_SIZE(ir_codes_megasky_table),
+                .rc_map_table     = rc_map_megasky_table,
+                .rc_map_size      = ARRAY_SIZE(rc_map_megasky_table),
                 .rc_query         = m920x_rc_query,
         },
 
@@ -889,8 +900,8 @@ static struct dvb_usb_device_properties tvwalkertwin_properties = {
 
         .rc.legacy = {
                 .rc_interval      = 100,
-                .rc_key_map       = ir_codes_tvwalkertwin_table,
-                .rc_key_map_size  = ARRAY_SIZE(ir_codes_tvwalkertwin_table),
+                .rc_map_table     = rc_map_tvwalkertwin_table,
+                .rc_map_size      = ARRAY_SIZE(rc_map_tvwalkertwin_table),
                 .rc_query         = m920x_rc_query,
         },
 
@@ -998,8 +1009,8 @@ static struct dvb_usb_device_properties pinnacle_pctv310e_properties = {
 
         .rc.legacy = {
                 .rc_interval      = 100,
-                .rc_key_map       = ir_codes_pinnacle310e_table,
-                .rc_key_map_size  = ARRAY_SIZE(ir_codes_pinnacle310e_table),
+                .rc_map_table     = rc_map_pinnacle310e_table,
+                .rc_map_size      = ARRAY_SIZE(rc_map_pinnacle310e_table),
                 .rc_query         = m920x_rc_query,
         },
 
diff --git a/drivers/media/dvb/dvb-usb/nova-t-usb2.c b/drivers/media/dvb/dvb-usb/nova-t-usb2.c
index 181f36a12e2a..bc350e982b72 100644
--- a/drivers/media/dvb/dvb-usb/nova-t-usb2.c
+++ b/drivers/media/dvb/dvb-usb/nova-t-usb2.c
@@ -21,7 +21,7 @@ DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
 #define deb_ee(args...) dprintk(debug,0x02,args)
 
 /* Hauppauge NOVA-T USB2 keys */
-static struct ir_scancode ir_codes_haupp_table[] = {
+static struct rc_map_table rc_map_haupp_table[] = {
         { 0x1e00, KEY_0 },
         { 0x1e01, KEY_1 },
         { 0x1e02, KEY_2 },
@@ -47,7 +47,7 @@ static struct ir_scancode ir_codes_haupp_table[] = {
         { 0x1e17, KEY_RIGHT },
         { 0x1e18, KEY_VIDEO },
         { 0x1e19, KEY_AUDIO },
-        { 0x1e1a, KEY_MEDIA },
+        { 0x1e1a, KEY_IMAGES },
         { 0x1e1b, KEY_EPG },
         { 0x1e1c, KEY_TV },
         { 0x1e1e, KEY_NEXT },
@@ -91,14 +91,14 @@ static int nova_t_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
 
                         deb_rc("raw key code 0x%02x, 0x%02x, 0x%02x to c: %02x d: %02x toggle: %d\n",key[1],key[2],key[3],custom,data,toggle);
 
-                        for (i = 0; i < ARRAY_SIZE(ir_codes_haupp_table); i++) {
-                                if (rc5_data(&ir_codes_haupp_table[i]) == data &&
-                                        rc5_custom(&ir_codes_haupp_table[i]) == custom) {
+                        for (i = 0; i < ARRAY_SIZE(rc_map_haupp_table); i++) {
+                                if (rc5_data(&rc_map_haupp_table[i]) == data &&
+                                        rc5_custom(&rc_map_haupp_table[i]) == custom) {
 
-                                        deb_rc("c: %x, d: %x\n", rc5_data(&ir_codes_haupp_table[i]),
-                                                                 rc5_custom(&ir_codes_haupp_table[i]));
+                                        deb_rc("c: %x, d: %x\n", rc5_data(&rc_map_haupp_table[i]),
+                                                                 rc5_custom(&rc_map_haupp_table[i]));
 
-                                        *event = ir_codes_haupp_table[i].keycode;
+                                        *event = rc_map_haupp_table[i].keycode;
                                         *state = REMOTE_KEY_PRESSED;
                                         if (st->old_toggle == toggle) {
                                                 if (st->last_repeat_count++ < 2)
@@ -197,8 +197,8 @@ static struct dvb_usb_device_properties nova_t_properties = {
 
         .rc.legacy = {
                 .rc_interval      = 100,
-                .rc_key_map       = ir_codes_haupp_table,
-                .rc_key_map_size  = ARRAY_SIZE(ir_codes_haupp_table),
+                .rc_map_table     = rc_map_haupp_table,
+                .rc_map_size      = ARRAY_SIZE(rc_map_haupp_table),
                 .rc_query         = nova_t_rc_query,
         },
 
diff --git a/drivers/media/dvb/dvb-usb/opera1.c b/drivers/media/dvb/dvb-usb/opera1.c
index f896337b4535..2e4fab7215f5 100644
--- a/drivers/media/dvb/dvb-usb/opera1.c
+++ b/drivers/media/dvb/dvb-usb/opera1.c
@@ -35,7 +35,7 @@
 struct opera1_state {
         u32 last_key_pressed;
 };
-struct ir_codes_opera_table {
+struct rc_map_opera_table {
         u32 keycode;
         u32 event;
 };
@@ -53,27 +53,36 @@ static int opera1_xilinx_rw(struct usb_device *dev, u8 request, u16 value,
                             u8 * data, u16 len, int flags)
 {
         int ret;
-        u8 r;
-        u8 u8buf[len];
-
+        u8 tmp;
+        u8 *buf;
         unsigned int pipe = (flags == OPERA_READ_MSG) ?
                 usb_rcvctrlpipe(dev,0) : usb_sndctrlpipe(dev, 0);
         u8 request_type = (flags == OPERA_READ_MSG) ? USB_DIR_IN : USB_DIR_OUT;
 
+        buf = kmalloc(len, GFP_KERNEL);
+        if (!buf)
+                return -ENOMEM;
+
         if (flags == OPERA_WRITE_MSG)
-                memcpy(u8buf, data, len);
-        ret =
-                usb_control_msg(dev, pipe, request, request_type | USB_TYPE_VENDOR,
-                        value, 0x0, u8buf, len, 2000);
+                memcpy(buf, data, len);
+        ret = usb_control_msg(dev, pipe, request,
+                        request_type | USB_TYPE_VENDOR, value, 0x0,
+                        buf, len, 2000);
 
         if (request == OPERA_TUNER_REQ) {
+                tmp = buf[0];
                 if (usb_control_msg(dev, usb_rcvctrlpipe(dev, 0),
-                                OPERA_TUNER_REQ, USB_DIR_IN | USB_TYPE_VENDOR,
-                                0x01, 0x0, &r, 1, 2000)<1 || r!=0x08)
-                                        return 0;
+                            OPERA_TUNER_REQ, USB_DIR_IN | USB_TYPE_VENDOR,
+                            0x01, 0x0, buf, 1, 2000) < 1 || buf[0] != 0x08) {
+                        ret = 0;
+                        goto out;
+                }
+                buf[0] = tmp;
         }
         if (flags == OPERA_READ_MSG)
-                memcpy(data, u8buf, len);
+                memcpy(data, buf, len);
+out:
+        kfree(buf);
         return ret;
 }
 
@@ -189,7 +198,7 @@ static int opera1_stv0299_set_symbol_rate(struct dvb_frontend *fe, u32 srate,
 static u8 opera1_inittab[] = {
         0x00, 0xa1,
         0x01, 0x15,
-        0x02, 0x00,
+        0x02, 0x30,
         0x03, 0x00,
         0x04, 0x7d,
         0x05, 0x05,
@@ -331,7 +340,7 @@ static int opera1_pid_filter_control(struct dvb_usb_adapter *adap, int onoff)
         return 0;
 }
 
-static struct ir_scancode ir_codes_opera1_table[] = {
+static struct rc_map_table rc_map_opera1_table[] = {
         {0x5fa0, KEY_1},
         {0x51af, KEY_2},
         {0x5da2, KEY_3},
@@ -342,23 +351,22 @@ static struct ir_scancode ir_codes_opera1_table[] = {
         {0x49b6, KEY_8},
         {0x05fa, KEY_9},
         {0x45ba, KEY_0},
-        {0x09f6, KEY_UP},       /*chanup */
-        {0x1be5, KEY_DOWN},     /*chandown */
-        {0x5da3, KEY_LEFT},     /*voldown */
-        {0x5fa1, KEY_RIGHT},    /*volup */
-        {0x07f8, KEY_SPACE},    /*tab */
-        {0x1fe1, KEY_ENTER},    /*play ok */
-        {0x1be4, KEY_Z},        /*zoom */
-        {0x59a6, KEY_M},        /*mute */
-        {0x5ba5, KEY_F},        /*tv/f */
-        {0x19e7, KEY_R},        /*rec */
-        {0x01fe, KEY_S},        /*Stop */
-        {0x03fd, KEY_P},        /*pause */
-        {0x03fc, KEY_W},        /*<- -> */
-        {0x07f9, KEY_C},        /*capture */
-        {0x47b9, KEY_Q},        /*exit */
-        {0x43bc, KEY_O},        /*power */
-
+        {0x09f6, KEY_CHANNELUP},        /*chanup */
+        {0x1be5, KEY_CHANNELDOWN},      /*chandown */
+        {0x5da3, KEY_VOLUMEDOWN},       /*voldown */
+        {0x5fa1, KEY_VOLUMEUP},         /*volup */
+        {0x07f8, KEY_SPACE},            /*tab */
+        {0x1fe1, KEY_OK},               /*play ok */
+        {0x1be4, KEY_ZOOM},             /*zoom */
+        {0x59a6, KEY_MUTE},             /*mute */
+        {0x5ba5, KEY_RADIO},            /*tv/f */
+        {0x19e7, KEY_RECORD},           /*rec */
+        {0x01fe, KEY_STOP},             /*Stop */
+        {0x03fd, KEY_PAUSE},            /*pause */
+        {0x03fc, KEY_SCREEN},           /*<- -> */
+        {0x07f9, KEY_CAMERA},           /*capture */
+        {0x47b9, KEY_ESC},              /*exit */
+        {0x43bc, KEY_POWER2},           /*power */
 };
 
 static int opera1_rc_query(struct dvb_usb_device *dev, u32 * event, int *state)
@@ -404,12 +412,12 @@ static int opera1_rc_query(struct dvb_usb_device *dev, u32 * event, int *state)
 
                 send_key = (send_key & 0xffff) | 0x0100;
 
-                for (i = 0; i < ARRAY_SIZE(ir_codes_opera1_table); i++) {
-                        if (rc5_scan(&ir_codes_opera1_table[i]) == (send_key & 0xffff)) {
+                for (i = 0; i < ARRAY_SIZE(rc_map_opera1_table); i++) {
+                        if (rc5_scan(&rc_map_opera1_table[i]) == (send_key & 0xffff)) {
                                 *state = REMOTE_KEY_PRESSED;
-                                *event = ir_codes_opera1_table[i].keycode;
+                                *event = rc_map_opera1_table[i].keycode;
                                 opst->last_key_pressed =
-                                        ir_codes_opera1_table[i].keycode;
+                                        rc_map_opera1_table[i].keycode;
                                 break;
                         }
                         opst->last_key_pressed = 0;
@@ -497,8 +505,8 @@ static struct dvb_usb_device_properties opera1_properties = {
         .i2c_algo = &opera1_i2c_algo,
 
         .rc.legacy = {
-                .rc_key_map = ir_codes_opera1_table,
-                .rc_key_map_size = ARRAY_SIZE(ir_codes_opera1_table),
+                .rc_map_table = rc_map_opera1_table,
+                .rc_map_size = ARRAY_SIZE(rc_map_opera1_table),
                 .rc_interval = 200,
                 .rc_query = opera1_rc_query,
         },
diff --git a/drivers/media/dvb/dvb-usb/technisat-usb2.c b/drivers/media/dvb/dvb-usb/technisat-usb2.c
new file mode 100644
index 000000000000..08f8842ad280
--- /dev/null
+++ b/drivers/media/dvb/dvb-usb/technisat-usb2.c
@@ -0,0 +1,807 @@
+/*
+ * Linux driver for Technisat DVB-S/S2 USB 2.0 device
+ *
+ * Copyright (C) 2010 Patrick Boettcher,
+ *                    Kernel Labs Inc. PO Box 745, St James, NY 11780
+ *
+ * Development was sponsored by Technisat Digital UK Limited, whose
+ * registered office is Witan Gate House 500 - 600 Witan Gate West,
+ * Milton Keynes, MK9 1SH
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ * THIS PROGRAM IS PROVIDED "AS IS" AND BOTH THE COPYRIGHT HOLDER AND
+ * TECHNISAT DIGITAL UK LTD DISCLAIM ALL WARRANTIES WITH REGARD TO
+ * THIS PROGRAM INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY OR
+ * FITNESS FOR A PARTICULAR PURPOSE.  NEITHER THE COPYRIGHT HOLDER
+ * NOR TECHNISAT DIGITAL UK LIMITED SHALL BE LIABLE FOR ANY SPECIAL,
+ * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER
+ * RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+ * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR
+ * IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS PROGRAM. See the
+ * GNU General Public License for more details.
+ */
+
+#define DVB_USB_LOG_PREFIX "technisat-usb2"
+#include "dvb-usb.h"
+
+#include "stv6110x.h"
+#include "stv090x.h"
+
+/* module parameters */
+DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
+
+static int debug;
+module_param(debug, int, 0644);
+MODULE_PARM_DESC(debug,
+                "set debugging level (bit-mask: 1=info,2=eeprom,4=i2c,8=rc)." \
+                DVB_USB_DEBUG_STATUS);
+
+/* disables all LED control command and
+ * also does not start the signal polling thread */
+static int disable_led_control;
+module_param(disable_led_control, int, 0444);
+MODULE_PARM_DESC(disable_led_control,
+                "disable LED control of the device "
+                "(default: 0 - LED control is active).");
+
+/* device private data */
+struct technisat_usb2_state {
+        struct dvb_usb_device *dev;
+        struct delayed_work green_led_work;
+        u8 power_state;
+
+        u16 last_scan_code;
+};
+
+/* debug print helpers */
+#define deb_info(args...)    dprintk(debug, 0x01, args)
+#define deb_eeprom(args...)  dprintk(debug, 0x02, args)
+#define deb_i2c(args...)     dprintk(debug, 0x04, args)
+#define deb_rc(args...)      dprintk(debug, 0x08, args)
+
+/* vendor requests */
+#define SET_IFCLK_TO_EXTERNAL_TSCLK_VENDOR_REQUEST 0xB3
+#define SET_FRONT_END_RESET_VENDOR_REQUEST         0xB4
+#define GET_VERSION_INFO_VENDOR_REQUEST            0xB5
+#define SET_GREEN_LED_VENDOR_REQUEST               0xB6
+#define SET_RED_LED_VENDOR_REQUEST                 0xB7
+#define GET_IR_DATA_VENDOR_REQUEST                 0xB8
+#define SET_LED_TIMER_DIVIDER_VENDOR_REQUEST       0xB9
+#define SET_USB_REENUMERATION                      0xBA
+
+/* i2c-access methods */
+#define I2C_SPEED_100KHZ_BIT 0x40
+
+#define I2C_STATUS_NAK 7
+#define I2C_STATUS_OK 8
+
+static int technisat_usb2_i2c_access(struct usb_device *udev,
+                u8 device_addr, u8 *tx, u8 txlen, u8 *rx, u8 rxlen)
+{
+        u8 b[64];
+        int ret, actual_length;
+
+        deb_i2c("i2c-access: %02x, tx: ", device_addr);
+        debug_dump(tx, txlen, deb_i2c);
+        deb_i2c(" ");
+
+        if (txlen > 62) {
+                err("i2c TX buffer can't exceed 62 bytes (dev 0x%02x)",
+                                device_addr);
+                txlen = 62;
+        }
+        if (rxlen > 62) {
+                err("i2c RX buffer can't exceed 62 bytes (dev 0x%02x)",
+                                device_addr);
+                txlen = 62;
+        }
+
+        b[0] = I2C_SPEED_100KHZ_BIT;
+        b[1] = device_addr << 1;
+
+        if (rx != NULL) {
+                b[0] |= rxlen;
+                b[1] |= 1;
+        }
+
+        memcpy(&b[2], tx, txlen);
+        ret = usb_bulk_msg(udev,
+                        usb_sndbulkpipe(udev, 0x01),
+                        b, 2 + txlen,
+                        NULL, 1000);
+
+        if (ret < 0) {
+                err("i2c-error: out failed %02x = %d", device_addr, ret);
+                return -ENODEV;
+        }
+
+        ret = usb_bulk_msg(udev,
+                        usb_rcvbulkpipe(udev, 0x01),
+                        b, 64, &actual_length, 1000);
+        if (ret < 0) {
+                err("i2c-error: in failed %02x = %d", device_addr, ret);
+                return -ENODEV;
+        }
+
+        if (b[0] != I2C_STATUS_OK) {
+                err("i2c-error: %02x = %d", device_addr, b[0]);
+                /* handle tuner-i2c-nak */
+                if (!(b[0] == I2C_STATUS_NAK &&
+                                device_addr == 0x60
+                                /* && device_is_technisat_usb2 */))
+                        return -ENODEV;
+        }
+
+        deb_i2c("status: %d, ", b[0]);
+
+        if (rx != NULL) {
+                memcpy(rx, &b[2], rxlen);
+
+                deb_i2c("rx (%d): ", rxlen);
+                debug_dump(rx, rxlen, deb_i2c);
+        }
+
+        deb_i2c("\n");
+
+        return 0;
+}
+
+static int technisat_usb2_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msg,
+                                int num)
+{
+        int ret = 0, i;
+        struct dvb_usb_device *d = i2c_get_adapdata(adap);
+
+        /* Ensure nobody else hits the i2c bus while we're sending our
+           sequence of messages, (such as the remote control thread) */
+        if (mutex_lock_interruptible(&d->i2c_mutex) < 0)
+                return -EAGAIN;
+
+        for (i = 0; i < num; i++) {
+                if (i+1 < num && msg[i+1].flags & I2C_M_RD) {
+                        ret = technisat_usb2_i2c_access(d->udev, msg[i+1].addr,
+                                                msg[i].buf, msg[i].len,
+                                                msg[i+1].buf, msg[i+1].len);
+                        if (ret != 0)
+                                break;
+                        i++;
+                } else {
+                        ret = technisat_usb2_i2c_access(d->udev, msg[i].addr,
+                                                msg[i].buf, msg[i].len,
+                                                NULL, 0);
+                        if (ret != 0)
+                                break;
+                }
+        }
+
+        if (ret == 0)
+                ret = i;
+
+        mutex_unlock(&d->i2c_mutex);
+
+        return ret;
+}
+
+static u32 technisat_usb2_i2c_func(struct i2c_adapter *adapter)
+{
+        return I2C_FUNC_I2C;
+}
+
+static struct i2c_algorithm technisat_usb2_i2c_algo = {
+        .master_xfer   = technisat_usb2_i2c_xfer,
+        .functionality = technisat_usb2_i2c_func,
+};
+
+#if 0
+static void technisat_usb2_frontend_reset(struct usb_device *udev)
+{
+        usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
+                        SET_FRONT_END_RESET_VENDOR_REQUEST,
+                        USB_TYPE_VENDOR | USB_DIR_OUT,
+                        10, 0,
+                        NULL, 0, 500);
+}
+#endif
+
+/* LED control */
+enum technisat_usb2_led_state {
+        LED_OFF,
+        LED_BLINK,
+        LED_ON,
+        LED_UNDEFINED
+};
+
+static int technisat_usb2_set_led(struct dvb_usb_device *d, int red, enum technisat_usb2_led_state state)
+{
+        int ret;
+
+        u8 led[8] = {
+                red ? SET_RED_LED_VENDOR_REQUEST : SET_GREEN_LED_VENDOR_REQUEST,
+                0
+        };
+
+        if (disable_led_control && state != LED_OFF)
+                return 0;
+
+        switch (state) {
+        case LED_ON:
+                led[1] = 0x82;
+                break;
+        case LED_BLINK:
+                led[1] = 0x82;
+                if (red) {
+                        led[2] = 0x02;
+                        led[3] = 10;
+                        led[4] = 10;
+                } else {
+                        led[2] = 0xff;
+                        led[3] = 50;
+                        led[4] = 50;
+                }
+                led[5] = 1;
+                break;
+
+        default:
+        case LED_OFF:
+                led[1] = 0x80;
+                break;
+        }
+
+        if (mutex_lock_interruptible(&d->i2c_mutex) < 0)
+                return -EAGAIN;
+
+        ret = usb_control_msg(d->udev, usb_sndctrlpipe(d->udev, 0),
+                red ? SET_RED_LED_VENDOR_REQUEST : SET_GREEN_LED_VENDOR_REQUEST,
+                USB_TYPE_VENDOR | USB_DIR_OUT,
+                0, 0,
+                led, sizeof(led), 500);
+
+        mutex_unlock(&d->i2c_mutex);
+        return ret;
+}
+
+static int technisat_usb2_set_led_timer(struct dvb_usb_device *d, u8 red, u8 green)
+{
+        int ret;
+        u8 b = 0;
+
+        if (mutex_lock_interruptible(&d->i2c_mutex) < 0)
+                return -EAGAIN;
+
+        ret = usb_control_msg(d->udev, usb_sndctrlpipe(d->udev, 0),
+                SET_LED_TIMER_DIVIDER_VENDOR_REQUEST,
+                USB_TYPE_VENDOR | USB_DIR_OUT,
+                (red << 8) | green, 0,
+                &b, 1, 500);
+
+        mutex_unlock(&d->i2c_mutex);
+
+        return ret;
+}
+
+static void technisat_usb2_green_led_control(struct work_struct *work)
+{
+        struct technisat_usb2_state *state =
+                container_of(work, struct technisat_usb2_state, green_led_work.work);
+        struct dvb_frontend *fe = state->dev->adapter[0].fe;
+
+        if (state->power_state == 0)
+                goto schedule;
+
+        if (fe != NULL) {
+                enum fe_status status;
+
+                if (fe->ops.read_status(fe, &status) != 0)
+                        goto schedule;
+
+                if (status & FE_HAS_LOCK) {
+                        u32 ber;
+
+                        if (fe->ops.read_ber(fe, &ber) != 0)
+                                goto schedule;
+
+                        if (ber > 1000)
+                                technisat_usb2_set_led(state->dev, 0, LED_BLINK);
+                        else
+                                technisat_usb2_set_led(state->dev, 0, LED_ON);
+                } else
+                        technisat_usb2_set_led(state->dev, 0, LED_OFF);
+        }
+
+schedule:
+        schedule_delayed_work(&state->green_led_work,
+                        msecs_to_jiffies(500));
+}
+
+/* method to find out whether the firmware has to be downloaded or not */
+static int technisat_usb2_identify_state(struct usb_device *udev,
+                struct dvb_usb_device_properties *props,
+                struct dvb_usb_device_description **desc, int *cold)
+{
+        int ret;
+        u8 version[3];
+
+        /* first select the interface */
+        if (usb_set_interface(udev, 0, 1) != 0)
+                err("could not set alternate setting to 0");
+        else
+                info("set alternate setting");
+
+        *cold = 0; /* by default do not download a firmware - just in case something is wrong */
+
+        ret = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
+                GET_VERSION_INFO_VENDOR_REQUEST,
+                USB_TYPE_VENDOR | USB_DIR_IN,
+                0, 0,
+                version, sizeof(version), 500);
+
+        if (ret < 0)
+                *cold = 1;
+        else {
+                info("firmware version: %d.%d", version[1], version[2]);
+                *cold = 0;
+        }
+
+        return 0;
+}
+
+/* power control */
+static int technisat_usb2_power_ctrl(struct dvb_usb_device *d, int level)
+{
+        struct technisat_usb2_state *state = d->priv;
+
+        state->power_state = level;
+
+        if (disable_led_control)
+                return 0;
+
+        /* green led is turned off in any case - will be turned on when tuning */
+        technisat_usb2_set_led(d, 0, LED_OFF);
+        /* red led is turned on all the time */
+        technisat_usb2_set_led(d, 1, LED_ON);
+        return 0;
+}
+
+/* mac address reading - from the eeprom */
+#if 0
+static void technisat_usb2_eeprom_dump(struct dvb_usb_device *d)
+{
+        u8 reg;
+        u8 b[16];
+        int i, j;
+
+        /* full EEPROM dump */
+        for (j = 0; j < 256 * 4; j += 16) {
+                reg = j;
+                if (technisat_usb2_i2c_access(d->udev, 0x50 + j / 256, &reg, 1, b, 16) != 0)
+                        break;
+
+                deb_eeprom("EEPROM: %01x%02x: ", j / 256, reg);
+                for (i = 0; i < 16; i++)
+                        deb_eeprom("%02x ", b[i]);
+                deb_eeprom("\n");
+        }
+}
+#endif
+
+static u8 technisat_usb2_calc_lrc(const u8 *b, u16 length)
+{
+        u8 lrc = 0;
+        while (--length)
+                lrc ^= *b++;
+        return lrc;
+}
+
+static int technisat_usb2_eeprom_lrc_read(struct dvb_usb_device *d,
+        u16 offset, u8 *b, u16 length, u8 tries)
+{
+        u8 bo = offset & 0xff;
+        struct i2c_msg msg[] = {
+                {
+                        .addr = 0x50 | ((offset >> 8) & 0x3),
+                        .buf = &bo,
+                        .len = 1
+                }, {
+                        .addr = 0x50 | ((offset >> 8) & 0x3),
+                        .flags  = I2C_M_RD,
+                        .buf = b,
+                        .len = length
+                }
+        };
+
+        while (tries--) {
+                int status;
+
+                if (i2c_transfer(&d->i2c_adap, msg, 2) != 2)
+                        break;
+
+                status =
+                        technisat_usb2_calc_lrc(b, length - 1) == b[length - 1];
+
+                if (status)
+                        return 0;
+        }
+
+        return -EREMOTEIO;
+}
+
+#define EEPROM_MAC_START 0x3f8
+#define EEPROM_MAC_TOTAL 8
+static int technisat_usb2_read_mac_address(struct dvb_usb_device *d,
+                u8 mac[])
+{
+        u8 buf[EEPROM_MAC_TOTAL];
+
+        if (technisat_usb2_eeprom_lrc_read(d, EEPROM_MAC_START,
+                                buf, EEPROM_MAC_TOTAL, 4) != 0)
+                return -ENODEV;
+
+        memcpy(mac, buf, 6);
+        return 0;
+}
+
+/* frontend attach */
+static int technisat_usb2_set_voltage(struct dvb_frontend *fe,
+                fe_sec_voltage_t voltage)
+{
+        int i;
+        u8 gpio[3] = { 0 }; /* 0 = 2, 1 = 3, 2 = 4 */
+
+        gpio[2] = 1; /* high - voltage ? */
+
+        switch (voltage) {
+        case SEC_VOLTAGE_13:
+                gpio[0] = 1;
+                break;
+        case SEC_VOLTAGE_18:
+                gpio[0] = 1;
+                gpio[1] = 1;
+                break;
+        default:
+        case SEC_VOLTAGE_OFF:
+                break;
+        }
+
+        for (i = 0; i < 3; i++)
+                if (stv090x_set_gpio(fe, i+2, 0, gpio[i], 0) != 0)
+                        return -EREMOTEIO;
+        return 0;
+}
+
+static struct stv090x_config technisat_usb2_stv090x_config = {
+        .device         = STV0903,
+        .demod_mode     = STV090x_SINGLE,
+        .clk_mode       = STV090x_CLK_EXT,
+
+        .xtal           = 8000000,
+        .address        = 0x68,
+
+        .ts1_mode       = STV090x_TSMODE_DVBCI,
+        .ts1_clk        = 13400000,
+        .ts1_tei        = 1,
+
+        .repeater_level = STV090x_RPTLEVEL_64,
+
+        .tuner_bbgain   = 6,
+};
+
+static struct stv6110x_config technisat_usb2_stv6110x_config = {
+        .addr           = 0x60,
+        .refclk         = 16000000,
+        .clk_div        = 2,
+};
+
+static int technisat_usb2_frontend_attach(struct dvb_usb_adapter *a)
+{
+        struct usb_device *udev = a->dev->udev;
+        int ret;
+
+        a->fe = dvb_attach(stv090x_attach, &technisat_usb2_stv090x_config,
+                        &a->dev->i2c_adap, STV090x_DEMODULATOR_0);
+
+        if (a->fe) {
+                struct stv6110x_devctl *ctl;
+
+                ctl = dvb_attach(stv6110x_attach,
+                                a->fe,
+                                &technisat_usb2_stv6110x_config,
+                                &a->dev->i2c_adap);
+
+                if (ctl) {
+                        technisat_usb2_stv090x_config.tuner_init          = ctl->tuner_init;
+                        technisat_usb2_stv090x_config.tuner_sleep         = ctl->tuner_sleep;
+                        technisat_usb2_stv090x_config.tuner_set_mode      = ctl->tuner_set_mode;
+                        technisat_usb2_stv090x_config.tuner_set_frequency = ctl->tuner_set_frequency;
+                        technisat_usb2_stv090x_config.tuner_get_frequency = ctl->tuner_get_frequency;
+                        technisat_usb2_stv090x_config.tuner_set_bandwidth = ctl->tuner_set_bandwidth;
+                        technisat_usb2_stv090x_config.tuner_get_bandwidth = ctl->tuner_get_bandwidth;
+                        technisat_usb2_stv090x_config.tuner_set_bbgain    = ctl->tuner_set_bbgain;
+                        technisat_usb2_stv090x_config.tuner_get_bbgain    = ctl->tuner_get_bbgain;
+                        technisat_usb2_stv090x_config.tuner_set_refclk    = ctl->tuner_set_refclk;
+                        technisat_usb2_stv090x_config.tuner_get_status    = ctl->tuner_get_status;
+
+                        /* call the init function once to initialize
+                           tuner's clock output divider and demod's
+                           master clock */
+                        if (a->fe->ops.init)
+                                a->fe->ops.init(a->fe);
+
+                        if (mutex_lock_interruptible(&a->dev->i2c_mutex) < 0)
+                                return -EAGAIN;
+
+                        ret = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
+                                        SET_IFCLK_TO_EXTERNAL_TSCLK_VENDOR_REQUEST,
+                                        USB_TYPE_VENDOR | USB_DIR_OUT,
+                                        0, 0,
+                                        NULL, 0, 500);
+                        mutex_unlock(&a->dev->i2c_mutex);
+
+                        if (ret != 0)
+                                err("could not set IF_CLK to external");
+
+                        a->fe->ops.set_voltage = technisat_usb2_set_voltage;
+
+                        /* if everything was successful assign a nice name to the frontend */
+                        strlcpy(a->fe->ops.info.name, a->dev->desc->name,
+                                        sizeof(a->fe->ops.info.name));
+                } else {
+                        dvb_frontend_detach(a->fe);
+                        a->fe = NULL;
+                }
+        }
+
+        technisat_usb2_set_led_timer(a->dev, 1, 1);
+
+        return a->fe == NULL ? -ENODEV : 0;
+}
+
+/* Remote control */
+
+/* the device is giving providing raw IR-signals to the host mapping
+ * it only to one remote control is just the default implementation
+ */
+#define NOMINAL_IR_BIT_TRANSITION_TIME_US 889
+#define NOMINAL_IR_BIT_TIME_US (2 * NOMINAL_IR_BIT_TRANSITION_TIME_US)
+
+#define FIRMWARE_CLOCK_TICK 83333
+#define FIRMWARE_CLOCK_DIVISOR 256
+
+#define IR_PERCENT_TOLERANCE 15
+
+#define NOMINAL_IR_BIT_TRANSITION_TICKS ((NOMINAL_IR_BIT_TRANSITION_TIME_US * 1000 * 1000) / FIRMWARE_CLOCK_TICK)
+#define NOMINAL_IR_BIT_TRANSITION_TICK_COUNT (NOMINAL_IR_BIT_TRANSITION_TICKS / FIRMWARE_CLOCK_DIVISOR)
+
+#define NOMINAL_IR_BIT_TIME_TICKS ((NOMINAL_IR_BIT_TIME_US * 1000 * 1000) / FIRMWARE_CLOCK_TICK)
+#define NOMINAL_IR_BIT_TIME_TICK_COUNT (NOMINAL_IR_BIT_TIME_TICKS / FIRMWARE_CLOCK_DIVISOR)
+
+#define MINIMUM_IR_BIT_TRANSITION_TICK_COUNT (NOMINAL_IR_BIT_TRANSITION_TICK_COUNT - ((NOMINAL_IR_BIT_TRANSITION_TICK_COUNT * IR_PERCENT_TOLERANCE) / 100))
+#define MAXIMUM_IR_BIT_TRANSITION_TICK_COUNT (NOMINAL_IR_BIT_TRANSITION_TICK_COUNT + ((NOMINAL_IR_BIT_TRANSITION_TICK_COUNT * IR_PERCENT_TOLERANCE) / 100))
+
+#define MINIMUM_IR_BIT_TIME_TICK_COUNT (NOMINAL_IR_BIT_TIME_TICK_COUNT - ((NOMINAL_IR_BIT_TIME_TICK_COUNT * IR_PERCENT_TOLERANCE) / 100))
+#define MAXIMUM_IR_BIT_TIME_TICK_COUNT (NOMINAL_IR_BIT_TIME_TICK_COUNT + ((NOMINAL_IR_BIT_TIME_TICK_COUNT * IR_PERCENT_TOLERANCE) / 100))
+
+static int technisat_usb2_get_ir(struct dvb_usb_device *d)
+{
+        u8 buf[62], *b;
+        int ret;
+        struct ir_raw_event ev;
+
+        buf[0] = GET_IR_DATA_VENDOR_REQUEST;
+        buf[1] = 0x08;
+        buf[2] = 0x8f;
+        buf[3] = MINIMUM_IR_BIT_TRANSITION_TICK_COUNT;
+        buf[4] = MAXIMUM_IR_BIT_TIME_TICK_COUNT;
+
+        if (mutex_lock_interruptible(&d->i2c_mutex) < 0)
+                return -EAGAIN;
+        ret = usb_control_msg(d->udev, usb_sndctrlpipe(d->udev, 0),
+                        GET_IR_DATA_VENDOR_REQUEST,
+                        USB_TYPE_VENDOR | USB_DIR_OUT,
+                        0, 0,
+                        buf, 5, 500);
+        if (ret < 0)
+                goto unlock;
+
+        buf[1] = 0;
+        buf[2] = 0;
+        ret = usb_control_msg(d->udev, usb_rcvctrlpipe(d->udev, 0),
+                        GET_IR_DATA_VENDOR_REQUEST,
+                        USB_TYPE_VENDOR | USB_DIR_IN,
+                        0x8080, 0,
+                        buf, sizeof(buf), 500);
+
+unlock:
+        mutex_unlock(&d->i2c_mutex);
+
+        if (ret < 0)
+                return ret;
+
+        if (ret == 1)
+                return 0; /* no key pressed */
+
+        /* decoding */
+        b = buf+1;
+
+#if 0
+        deb_rc("RC: %d ", ret);
+        debug_dump(b, ret, deb_rc);
+#endif
+
+        ev.pulse = 0;
+        while (1) {
+                ev.pulse = !ev.pulse;
+                ev.duration = (*b * FIRMWARE_CLOCK_DIVISOR * FIRMWARE_CLOCK_TICK) / 1000;
+                ir_raw_event_store(d->rc_dev, &ev);
+
+                b++;
+                if (*b == 0xff) {
+                        ev.pulse = 0;
+                        ev.duration = 888888*2;
+                        ir_raw_event_store(d->rc_dev, &ev);
+                        break;
+                }
+        }
+
+        ir_raw_event_handle(d->rc_dev);
+
+        return 1;
+}
+
+static int technisat_usb2_rc_query(struct dvb_usb_device *d)
+{
+        int ret = technisat_usb2_get_ir(d);
+
+        if (ret < 0)
+                return ret;
+
+        if (ret == 0)
+                return 0;
+
+        if (!disable_led_control)
+                technisat_usb2_set_led(d, 1, LED_BLINK);
+
+        return 0;
+}
+
+/* DVB-USB and USB stuff follows */
+static struct usb_device_id technisat_usb2_id_table[] = {
+        { USB_DEVICE(USB_VID_TECHNISAT, USB_PID_TECHNISAT_USB2_DVB_S2) },
+        { 0 }           /* Terminating entry */
+};
+
+/* device description */
+static struct dvb_usb_device_properties technisat_usb2_devices = {
+        .caps              = DVB_USB_IS_AN_I2C_ADAPTER,
+
+        .usb_ctrl          = CYPRESS_FX2,
+
+        .identify_state    = technisat_usb2_identify_state,
+        .firmware          = "dvb-usb-SkyStar_USB_HD_FW_v17_63.HEX.fw",
+
+        .size_of_priv      = sizeof(struct technisat_usb2_state),
+
+        .i2c_algo          = &technisat_usb2_i2c_algo,
+
+        .power_ctrl        = technisat_usb2_power_ctrl,
+        .read_mac_address  = technisat_usb2_read_mac_address,
+
+        .num_adapters = 1,
+        .adapter = {
+                {
+                        .frontend_attach  = technisat_usb2_frontend_attach,
+
+                        .stream = {
+                                .type = USB_ISOC,
+                                .count = 8,
+                                .endpoint = 0x2,
+                                .u = {
+                                        .isoc = {
+                                                .framesperurb = 32,
+                                                .framesize = 2048,
+                                                .interval = 3,
+                                        }
+                                }
+                        },
+
+                        .size_of_priv = 0,
+                },
+        },
+
+        .num_device_descs = 1,
+        .devices = {
+                {   "Technisat SkyStar USB HD (DVB-S/S2)",
+                        { &technisat_usb2_id_table[0], NULL },
+                        { NULL },
+                },
+        },
+
+        .rc.core = {
+                .rc_interval = 100,
+                .rc_codes    = RC_MAP_TECHNISAT_USB2,
+                .module_name = "technisat-usb2",
+                .rc_query    = technisat_usb2_rc_query,
+                .allowed_protos = RC_TYPE_ALL,
+                .driver_type    = RC_DRIVER_IR_RAW,
+        }
+};
+
+static int technisat_usb2_probe(struct usb_interface *intf,
+                const struct usb_device_id *id)
+{
+        struct dvb_usb_device *dev;
+
+        if (dvb_usb_device_init(intf, &technisat_usb2_devices, THIS_MODULE,
+                                &dev, adapter_nr) != 0)
+                return -ENODEV;
+
+        if (dev) {
+                struct technisat_usb2_state *state = dev->priv;
+                state->dev = dev;
+
+                if (!disable_led_control) {
+                        INIT_DELAYED_WORK(&state->green_led_work,
+                                        technisat_usb2_green_led_control);
+                        schedule_delayed_work(&state->green_led_work,
+                                        msecs_to_jiffies(500));
+                }
+        }
+
+        return 0;
+}
+
+static void technisat_usb2_disconnect(struct usb_interface *intf)
+{
+        struct dvb_usb_device *dev = usb_get_intfdata(intf);
+
+        /* work and stuff was only created when the device is is hot-state */
+        if (dev != NULL) {
+                struct technisat_usb2_state *state = dev->priv;
+                if (state != NULL) {
+                        cancel_delayed_work_sync(&state->green_led_work);
+                        flush_scheduled_work();
+                }
+        }
+
+        dvb_usb_device_exit(intf);
+}
+
+static struct usb_driver technisat_usb2_driver = {
+        .name       = "dvb_usb_technisat_usb2",
+        .probe      = technisat_usb2_probe,
+        .disconnect = technisat_usb2_disconnect,
+        .id_table   = technisat_usb2_id_table,
+};
+
+/* module stuff */
+static int __init technisat_usb2_module_init(void)
+{
+        int result = usb_register(&technisat_usb2_driver);
+        if (result) {
+                err("usb_register failed. Code %d", result);
+                return result;
+        }
+
+        return 0;
+}
+
+static void __exit technisat_usb2_module_exit(void)
+{
+        usb_deregister(&technisat_usb2_driver);
+}
+
+module_init(technisat_usb2_module_init);
+module_exit(technisat_usb2_module_exit);
+
+MODULE_AUTHOR("Patrick Boettcher <pboettcher@kernellabs.com>");
+MODULE_DESCRIPTION("Driver for Technisat DVB-S/S2 USB 2.0 device");
+MODULE_VERSION("1.0");
+MODULE_LICENSE("GPL");
diff --git a/drivers/media/dvb/dvb-usb/ttusb2.c b/drivers/media/dvb/dvb-usb/ttusb2.c
index a6de489a6a39..0d4709ff9cbb 100644
--- a/drivers/media/dvb/dvb-usb/ttusb2.c
+++ b/drivers/media/dvb/dvb-usb/ttusb2.c
@@ -43,6 +43,7 @@ DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
 
 struct ttusb2_state {
         u8 id;
+        u16 last_rc_key;
 };
 
 static int ttusb2_msg(struct dvb_usb_device *d, u8 cmd,
@@ -128,6 +129,33 @@ static struct i2c_algorithm ttusb2_i2c_algo = {
         .functionality = ttusb2_i2c_func,
 };
 
+/* command to poll IR receiver (copied from pctv452e.c) */
+#define CMD_GET_IR_CODE     0x1b
+
+/* IR */
+static int tt3650_rc_query(struct dvb_usb_device *d)
+{
+        int ret;
+        u8 rx[9]; /* A CMD_GET_IR_CODE reply is 9 bytes long */
+        struct ttusb2_state *st = d->priv;
+        ret = ttusb2_msg(d, CMD_GET_IR_CODE, NULL, 0, rx, sizeof(rx));
+        if (ret != 0)
+                return ret;
+
+        if (rx[8] & 0x01) {
+                /* got a "press" event */
+                st->last_rc_key = (rx[3] << 8) | rx[2];
+                deb_info("%s: cmd=0x%02x sys=0x%02x\n", __func__, rx[2], rx[3]);
+                rc_keydown(d->rc_dev, st->last_rc_key, 0);
+        } else if (st->last_rc_key) {
+                rc_keyup(d->rc_dev);
+                st->last_rc_key = 0;
+        }
+
+        return 0;
+}
+
+
 /* Callbacks for DVB USB */
 static int ttusb2_identify_state (struct usb_device *udev, struct
                 dvb_usb_device_properties *props, struct dvb_usb_device_description **desc,
@@ -345,6 +373,13 @@ static struct dvb_usb_device_properties ttusb2_properties_ct3650 = {
 
         .size_of_priv = sizeof(struct ttusb2_state),
 
+        .rc.core = {
+                .rc_interval      = 150, /* Less than IR_KEYPRESS_TIMEOUT */
+                .rc_codes         = RC_MAP_TT_1500,
+                .rc_query         = tt3650_rc_query,
+                .allowed_protos   = RC_TYPE_UNKNOWN,
+        },
+
         .num_adapters = 1,
         .adapter = {
                 {
diff --git a/drivers/media/dvb/dvb-usb/vp702x-fe.c b/drivers/media/dvb/dvb-usb/vp702x-fe.c
index ccc7e4452664..2bb8d4cc8d88 100644
--- a/drivers/media/dvb/dvb-usb/vp702x-fe.c
+++ b/drivers/media/dvb/dvb-usb/vp702x-fe.c
@@ -41,14 +41,23 @@ struct vp702x_fe_state {
 
 static int vp702x_fe_refresh_state(struct vp702x_fe_state *st)
 {
-        u8 buf[10];
-        if (time_after(jiffies,st->next_status_check)) {
-                vp702x_usb_in_op(st->d,READ_STATUS,0,0,buf,10);
+        struct vp702x_device_state *dst = st->d->priv;
+        u8 *buf;
 
+        if (time_after(jiffies, st->next_status_check)) {
+                mutex_lock(&dst->buf_mutex);
+                buf = dst->buf;
+
+                vp702x_usb_in_op(st->d, READ_STATUS, 0, 0, buf, 10);
                 st->lock = buf[4];
-                vp702x_usb_in_op(st->d,READ_TUNER_REG_REQ,0x11,0,&st->snr,1);
-                vp702x_usb_in_op(st->d,READ_TUNER_REG_REQ,0x15,0,&st->sig,1);
 
+                vp702x_usb_in_op(st->d, READ_TUNER_REG_REQ, 0x11, 0, buf, 1);
+                st->snr = buf[0];
+
+                vp702x_usb_in_op(st->d, READ_TUNER_REG_REQ, 0x15, 0, buf, 1);
+                st->sig = buf[0];
+
+                mutex_unlock(&dst->buf_mutex);
                 st->next_status_check = jiffies + (st->status_check_interval*HZ)/1000;
         }
         return 0;
@@ -130,11 +139,17 @@ static int vp702x_fe_set_frontend(struct dvb_frontend* fe,
                                   struct dvb_frontend_parameters *fep)
 {
         struct vp702x_fe_state *st = fe->demodulator_priv;
+        struct vp702x_device_state *dst = st->d->priv;
         u32 freq = fep->frequency/1000;
         /*CalFrequency*/
 /*      u16 frequencyRef[16] = { 2, 4, 8, 16, 32, 64, 128, 256, 24, 5, 10, 20, 40, 80, 160, 320 }; */
         u64 sr;
-        u8 cmd[8] = { 0 },ibuf[10];
+        u8 *cmd;
+
+        mutex_lock(&dst->buf_mutex);
+
+        cmd = dst->buf;
+        memset(cmd, 0, 10);
 
         cmd[0] = (freq >> 8) & 0x7f;
         cmd[1] =  freq       & 0xff;
@@ -170,13 +185,15 @@ static int vp702x_fe_set_frontend(struct dvb_frontend* fe,
         st->status_check_interval = 250;
         st->next_status_check = jiffies;
 
-        vp702x_usb_inout_op(st->d,cmd,8,ibuf,10,100);
+        vp702x_usb_inout_op(st->d, cmd, 8, cmd, 10, 100);
 
-        if (ibuf[2] == 0 && ibuf[3] == 0)
+        if (cmd[2] == 0 && cmd[3] == 0)
                 deb_fe("tuning failed.\n");
         else
                 deb_fe("tuning succeeded.\n");
 
+        mutex_unlock(&dst->buf_mutex);
+
         return 0;
 }
 
@@ -204,27 +221,32 @@ static int vp702x_fe_get_frontend(struct dvb_frontend* fe,
 static int vp702x_fe_send_diseqc_msg (struct dvb_frontend* fe,
                                     struct dvb_diseqc_master_cmd *m)
 {
+        u8 *cmd;
         struct vp702x_fe_state *st = fe->demodulator_priv;
-        u8 cmd[8],ibuf[10];
-        memset(cmd,0,8);
+        struct vp702x_device_state *dst = st->d->priv;
 
         deb_fe("%s\n",__func__);
 
         if (m->msg_len > 4)
                 return -EINVAL;
 
+        mutex_lock(&dst->buf_mutex);
+
+        cmd = dst->buf;
         cmd[1] = SET_DISEQC_CMD;
         cmd[2] = m->msg_len;
         memcpy(&cmd[3], m->msg, m->msg_len);
-        cmd[7] = vp702x_chksum(cmd,0,7);
+        cmd[7] = vp702x_chksum(cmd, 0, 7);
 
-        vp702x_usb_inout_op(st->d,cmd,8,ibuf,10,100);
+        vp702x_usb_inout_op(st->d, cmd, 8, cmd, 10, 100);
 
-        if (ibuf[2] == 0 && ibuf[3] == 0)
+        if (cmd[2] == 0 && cmd[3] == 0)
                 deb_fe("diseqc cmd failed.\n");
         else
                 deb_fe("diseqc cmd succeeded.\n");
 
+        mutex_unlock(&dst->buf_mutex);
+
         return 0;
 }
 
@@ -237,7 +259,9 @@ static int vp702x_fe_send_diseqc_burst (struct dvb_frontend* fe, fe_sec_mini_cmd
 static int vp702x_fe_set_tone(struct dvb_frontend* fe, fe_sec_tone_mode_t tone)
 {
         struct vp702x_fe_state *st = fe->demodulator_priv;
-        u8 ibuf[10];
+        struct vp702x_device_state *dst = st->d->priv;
+        u8 *buf;
+
         deb_fe("%s\n",__func__);
 
         st->tone_mode = tone;
@@ -247,14 +271,21 @@ static int vp702x_fe_set_tone(struct dvb_frontend* fe, fe_sec_tone_mode_t tone)
         else
                 st->lnb_buf[2] = 0x00;
 
-        st->lnb_buf[7] = vp702x_chksum(st->lnb_buf,0,7);
+        st->lnb_buf[7] = vp702x_chksum(st->lnb_buf, 0, 7);
+
+        mutex_lock(&dst->buf_mutex);
+
+        buf = dst->buf;
+        memcpy(buf, st->lnb_buf, 8);
 
-        vp702x_usb_inout_op(st->d,st->lnb_buf,8,ibuf,10,100);
-        if (ibuf[2] == 0 && ibuf[3] == 0)
+        vp702x_usb_inout_op(st->d, buf, 8, buf, 10, 100);
+        if (buf[2] == 0 && buf[3] == 0)
                 deb_fe("set_tone cmd failed.\n");
         else
                 deb_fe("set_tone cmd succeeded.\n");
 
+        mutex_unlock(&dst->buf_mutex);
+
         return 0;
 }
 
@@ -262,7 +293,8 @@ static int vp702x_fe_set_voltage (struct dvb_frontend* fe, fe_sec_voltage_t
                 voltage)
 {
         struct vp702x_fe_state *st = fe->demodulator_priv;
-        u8 ibuf[10];
+        struct vp702x_device_state *dst = st->d->priv;
+        u8 *buf;
         deb_fe("%s\n",__func__);
 
         st->voltage = voltage;
@@ -272,14 +304,20 @@ static int vp702x_fe_set_voltage (struct dvb_frontend* fe, fe_sec_voltage_t
         else
                 st->lnb_buf[4] = 0x00;
 
-        st->lnb_buf[7] = vp702x_chksum(st->lnb_buf,0,7);
+        st->lnb_buf[7] = vp702x_chksum(st->lnb_buf, 0, 7);
+
+        mutex_lock(&dst->buf_mutex);
+
+        buf = dst->buf;
+        memcpy(buf, st->lnb_buf, 8);
 
-        vp702x_usb_inout_op(st->d,st->lnb_buf,8,ibuf,10,100);
-        if (ibuf[2] == 0 && ibuf[3] == 0)
+        vp702x_usb_inout_op(st->d, buf, 8, buf, 10, 100);
+        if (buf[2] == 0 && buf[3] == 0)
                 deb_fe("set_voltage cmd failed.\n");
         else
                 deb_fe("set_voltage cmd succeeded.\n");
 
+        mutex_unlock(&dst->buf_mutex);
         return 0;
 }
 
diff --git a/drivers/media/dvb/dvb-usb/vp702x.c b/drivers/media/dvb/dvb-usb/vp702x.c
index 5c9f3275aaa0..54355f84a98f 100644
--- a/drivers/media/dvb/dvb-usb/vp702x.c
+++ b/drivers/media/dvb/dvb-usb/vp702x.c
@@ -15,6 +15,7 @@
  * see Documentation/dvb/README.dvb-usb for more information
  */
 #include "vp702x.h"
+#include <linux/mutex.h>
 
 /* debug */
 int dvb_usb_vp702x_debug;
@@ -23,27 +24,23 @@ MODULE_PARM_DESC(debug, "set debugging level (1=info,xfer=2,rc=4 (or-able))." DV
 
 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
 
-struct vp702x_state {
+struct vp702x_adapter_state {
         int pid_filter_count;
         int pid_filter_can_bypass;
         u8  pid_filter_state;
 };
 
-struct vp702x_device_state {
-        u8 power_state;
-};
-
-/* check for mutex FIXME */
-int vp702x_usb_in_op(struct dvb_usb_device *d, u8 req, u16 value, u16 index, u8 *b, int blen)
+static int vp702x_usb_in_op_unlocked(struct dvb_usb_device *d, u8 req,
+                                     u16 value, u16 index, u8 *b, int blen)
 {
-        int ret = -1;
+        int ret;
 
-                ret = usb_control_msg(d->udev,
-                        usb_rcvctrlpipe(d->udev,0),
-                        req,
-                        USB_TYPE_VENDOR | USB_DIR_IN,
-                        value,index,b,blen,
-                        2000);
+        ret = usb_control_msg(d->udev,
+                usb_rcvctrlpipe(d->udev, 0),
+                req,
+                USB_TYPE_VENDOR | USB_DIR_IN,
+                value, index, b, blen,
+                2000);
 
         if (ret < 0) {
                 warn("usb in operation failed. (%d)", ret);
@@ -58,8 +55,20 @@ int vp702x_usb_in_op(struct dvb_usb_device *d, u8 req, u16 value, u16 index, u8
         return ret;
 }
 
-static int vp702x_usb_out_op(struct dvb_usb_device *d, u8 req, u16 value,
-                             u16 index, u8 *b, int blen)
+int vp702x_usb_in_op(struct dvb_usb_device *d, u8 req, u16 value,
+                            u16 index, u8 *b, int blen)
+{
+        int ret;
+
+        mutex_lock(&d->usb_mutex);
+        ret = vp702x_usb_in_op_unlocked(d, req, value, index, b, blen);
+        mutex_unlock(&d->usb_mutex);
+
+        return ret;
+}
+
+int vp702x_usb_out_op_unlocked(struct dvb_usb_device *d, u8 req, u16 value,
+                                      u16 index, u8 *b, int blen)
 {
         int ret;
         deb_xfer("out: req. %02x, val: %04x, ind: %04x, buffer: ",req,value,index);
@@ -77,6 +86,18 @@ static int vp702x_usb_out_op(struct dvb_usb_device *d, u8 req, u16 value,
                 return 0;
 }
 
+int vp702x_usb_out_op(struct dvb_usb_device *d, u8 req, u16 value,
+                             u16 index, u8 *b, int blen)
+{
+        int ret;
+
+        mutex_lock(&d->usb_mutex);
+        ret = vp702x_usb_out_op_unlocked(d, req, value, index, b, blen);
+        mutex_unlock(&d->usb_mutex);
+
+        return ret;
+}
+
 int vp702x_usb_inout_op(struct dvb_usb_device *d, u8 *o, int olen, u8 *i, int ilen, int msec)
 {
         int ret;
@@ -84,50 +105,93 @@ int vp702x_usb_inout_op(struct dvb_usb_device *d, u8 *o, int olen, u8 *i, int il
         if ((ret = mutex_lock_interruptible(&d->usb_mutex)))
                 return ret;
 
-        ret = vp702x_usb_out_op(d,REQUEST_OUT,0,0,o,olen);
+        ret = vp702x_usb_out_op_unlocked(d, REQUEST_OUT, 0, 0, o, olen);
         msleep(msec);
-        ret = vp702x_usb_in_op(d,REQUEST_IN,0,0,i,ilen);
+        ret = vp702x_usb_in_op_unlocked(d, REQUEST_IN, 0, 0, i, ilen);
 
         mutex_unlock(&d->usb_mutex);
-
         return ret;
 }
 
 static int vp702x_usb_inout_cmd(struct dvb_usb_device *d, u8 cmd, u8 *o,
                                 int olen, u8 *i, int ilen, int msec)
 {
-        u8 bout[olen+2];
-        u8 bin[ilen+1];
+        struct vp702x_device_state *st = d->priv;
         int ret = 0;
+        u8 *buf;
+        int buflen = max(olen + 2, ilen + 1);
+
+        ret = mutex_lock_interruptible(&st->buf_mutex);
+        if (ret < 0)
+                return ret;
+
+        if (buflen > st->buf_len) {
+                buf = kmalloc(buflen, GFP_KERNEL);
+                if (!buf) {
+                        mutex_unlock(&st->buf_mutex);
+                        return -ENOMEM;
+                }
+                info("successfully reallocated a bigger buffer");
+                kfree(st->buf);
+                st->buf = buf;
+                st->buf_len = buflen;
+        } else {
+                buf = st->buf;
+        }
 
-        bout[0] = 0x00;
-        bout[1] = cmd;
-        memcpy(&bout[2],o,olen);
+        buf[0] = 0x00;
+        buf[1] = cmd;
+        memcpy(&buf[2], o, olen);
 
-        ret = vp702x_usb_inout_op(d, bout, olen+2, bin, ilen+1,msec);
+        ret = vp702x_usb_inout_op(d, buf, olen+2, buf, ilen+1, msec);
 
         if (ret == 0)
-                memcpy(i,&bin[1],ilen);
+                memcpy(i, &buf[1], ilen);
+        mutex_unlock(&st->buf_mutex);
 
         return ret;
 }
 
 static int vp702x_set_pld_mode(struct dvb_usb_adapter *adap, u8 bypass)
 {
-        u8 buf[16] = { 0 };
-        return vp702x_usb_in_op(adap->dev, 0xe0, (bypass << 8) | 0x0e, 0, buf, 16);
+        int ret;
+        struct vp702x_device_state *st = adap->dev->priv;
+        u8 *buf;
+
+        mutex_lock(&st->buf_mutex);
+
+        buf = st->buf;
+        memset(buf, 0, 16);
+
+        ret = vp702x_usb_in_op(adap->dev, 0xe0, (bypass << 8) | 0x0e,
+                        0, buf, 16);
+        mutex_unlock(&st->buf_mutex);
+        return ret;
 }
 
 static int vp702x_set_pld_state(struct dvb_usb_adapter *adap, u8 state)
 {
-        u8 buf[16] = { 0 };
-        return vp702x_usb_in_op(adap->dev, 0xe0, (state << 8) | 0x0f, 0, buf, 16);
+        int ret;
+        struct vp702x_device_state *st = adap->dev->priv;
+        u8 *buf;
+
+        mutex_lock(&st->buf_mutex);
+
+        buf = st->buf;
+        memset(buf, 0, 16);
+        ret = vp702x_usb_in_op(adap->dev, 0xe0, (state << 8) | 0x0f,
+                        0, buf, 16);
+
+        mutex_unlock(&st->buf_mutex);
+
+        return ret;
 }
 
 static int vp702x_set_pid(struct dvb_usb_adapter *adap, u16 pid, u8 id, int onoff)
 {
-        struct vp702x_state *st = adap->priv;
-        u8 buf[16] = { 0 };
+        struct vp702x_adapter_state *st = adap->priv;
+        struct vp702x_device_state *dst = adap->dev->priv;
+        u8 *buf;
 
         if (onoff)
                 st->pid_filter_state |=  (1 << id);
@@ -139,32 +203,45 @@ static int vp702x_set_pid(struct dvb_usb_adapter *adap, u16 pid, u8 id, int onof
         id = 0x10 + id*2;
 
         vp702x_set_pld_state(adap, st->pid_filter_state);
+
+        mutex_lock(&dst->buf_mutex);
+
+        buf = dst->buf;
+        memset(buf, 0, 16);
         vp702x_usb_in_op(adap->dev, 0xe0, (((pid >> 8) & 0xff) << 8) | (id), 0, buf, 16);
         vp702x_usb_in_op(adap->dev, 0xe0, (((pid     ) & 0xff) << 8) | (id+1), 0, buf, 16);
+
+        mutex_unlock(&dst->buf_mutex);
+
         return 0;
 }
 
 
 static int vp702x_init_pid_filter(struct dvb_usb_adapter *adap)
 {
-        struct vp702x_state *st = adap->priv;
+        struct vp702x_adapter_state *st = adap->priv;
+        struct vp702x_device_state *dst = adap->dev->priv;
         int i;
-        u8 b[10] = { 0 };
+        u8 *b;
 
         st->pid_filter_count = 8;
         st->pid_filter_can_bypass = 1;
         st->pid_filter_state = 0x00;
 
-        vp702x_set_pld_mode(adap, 1); // bypass
+        vp702x_set_pld_mode(adap, 1); /* bypass */
 
         for (i = 0; i < st->pid_filter_count; i++)
                 vp702x_set_pid(adap, 0xffff, i, 1);
 
+        mutex_lock(&dst->buf_mutex);
+        b = dst->buf;
+        memset(b, 0, 10);
         vp702x_usb_in_op(adap->dev, 0xb5, 3, 0, b, 10);
         vp702x_usb_in_op(adap->dev, 0xb5, 0, 0, b, 10);
         vp702x_usb_in_op(adap->dev, 0xb5, 1, 0, b, 10);
+        mutex_unlock(&dst->buf_mutex);
+        /*vp702x_set_pld_mode(d, 0); // filter */
 
-        //vp702x_set_pld_mode(d, 0); // filter
         return 0;
 }
 
@@ -174,7 +251,7 @@ static int vp702x_streaming_ctrl(struct dvb_usb_adapter *adap, int onoff)
 }
 
 /* keys for the enclosed remote control */
-static struct ir_scancode ir_codes_vp702x_table[] = {
+static struct rc_map_table rc_map_vp702x_table[] = {
         { 0x0001, KEY_1 },
         { 0x0002, KEY_2 },
 };
@@ -182,36 +259,49 @@ static struct ir_scancode ir_codes_vp702x_table[] = {
 /* remote control stuff (does not work with my box) */
 static int vp702x_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
 {
-        u8 key[10];
+        u8 *key;
         int i;
 
 /* remove the following return to enabled remote querying */
         return 0;
 
+        key = kmalloc(10, GFP_KERNEL);
+        if (!key)
+                return -ENOMEM;
+
         vp702x_usb_in_op(d,READ_REMOTE_REQ,0,0,key,10);
 
         deb_rc("remote query key: %x %d\n",key[1],key[1]);
 
         if (key[1] == 0x44) {
                 *state = REMOTE_NO_KEY_PRESSED;
+                kfree(key);
                 return 0;
         }
 
-        for (i = 0; i < ARRAY_SIZE(ir_codes_vp702x_table); i++)
-                if (rc5_custom(&ir_codes_vp702x_table[i]) == key[1]) {
+        for (i = 0; i < ARRAY_SIZE(rc_map_vp702x_table); i++)
+                if (rc5_custom(&rc_map_vp702x_table[i]) == key[1]) {
                         *state = REMOTE_KEY_PRESSED;
-                        *event = ir_codes_vp702x_table[i].keycode;
+                        *event = rc_map_vp702x_table[i].keycode;
                         break;
                 }
+        kfree(key);
         return 0;
 }
 
 
 static int vp702x_read_mac_addr(struct dvb_usb_device *d,u8 mac[6])
 {
-        u8 i;
+        u8 i, *buf;
+        struct vp702x_device_state *st = d->priv;
+
+        mutex_lock(&st->buf_mutex);
+        buf = st->buf;
         for (i = 6; i < 12; i++)
-                vp702x_usb_in_op(d, READ_EEPROM_REQ, i, 1, &mac[i - 6], 1);
+                vp702x_usb_in_op(d, READ_EEPROM_REQ, i, 1, &buf[i - 6], 1);
+
+        memcpy(mac, buf, 6);
+        mutex_unlock(&st->buf_mutex);
         return 0;
 }
 
@@ -221,7 +311,8 @@ static int vp702x_frontend_attach(struct dvb_usb_adapter *adap)
 
         vp702x_usb_out_op(adap->dev, SET_TUNER_POWER_REQ, 0, 7, NULL, 0);
 
-        if (vp702x_usb_inout_cmd(adap->dev, GET_SYSTEM_STRING, NULL, 0, buf, 10, 10))
+        if (vp702x_usb_inout_cmd(adap->dev, GET_SYSTEM_STRING, NULL, 0,
+                                   buf, 10, 10))
                 return -EIO;
 
         buf[9] = '\0';
@@ -240,8 +331,38 @@ static struct dvb_usb_device_properties vp702x_properties;
 static int vp702x_usb_probe(struct usb_interface *intf,
                 const struct usb_device_id *id)
 {
-        return dvb_usb_device_init(intf, &vp702x_properties,
-                                   THIS_MODULE, NULL, adapter_nr);
+        struct dvb_usb_device *d;
+        struct vp702x_device_state *st;
+        int ret;
+
+        ret = dvb_usb_device_init(intf, &vp702x_properties,
+                                   THIS_MODULE, &d, adapter_nr);
+        if (ret)
+                goto out;
+
+        st = d->priv;
+        st->buf_len = 16;
+        st->buf = kmalloc(st->buf_len, GFP_KERNEL);
+        if (!st->buf) {
+                ret = -ENOMEM;
+                dvb_usb_device_exit(intf);
+                goto out;
+        }
+        mutex_init(&st->buf_mutex);
+
+out:
+        return ret;
+
+}
+
+static void vp702x_usb_disconnect(struct usb_interface *intf)
+{
+        struct dvb_usb_device *d = usb_get_intfdata(intf);
+        struct vp702x_device_state *st = d->priv;
+        mutex_lock(&st->buf_mutex);
+        kfree(st->buf);
+        mutex_unlock(&st->buf_mutex);
+        dvb_usb_device_exit(intf);
 }
 
 static struct usb_device_id vp702x_usb_table [] = {
@@ -278,14 +399,14 @@ static struct dvb_usb_device_properties vp702x_properties = {
                                         }
                                 }
                         },
-                        .size_of_priv     = sizeof(struct vp702x_state),
+                        .size_of_priv     = sizeof(struct vp702x_adapter_state),
                 }
         },
         .read_mac_address = vp702x_read_mac_addr,
 
         .rc.legacy = {
-                .rc_key_map       = ir_codes_vp702x_table,
-                .rc_key_map_size  = ARRAY_SIZE(ir_codes_vp702x_table),
+                .rc_map_table       = rc_map_vp702x_table,
+                .rc_map_size  = ARRAY_SIZE(rc_map_vp702x_table),
                 .rc_interval      = 400,
                 .rc_query         = vp702x_rc_query,
         },
@@ -307,9 +428,9 @@ static struct dvb_usb_device_properties vp702x_properties = {
 /* usb specific object needed to register this driver with the usb subsystem */
 static struct usb_driver vp702x_usb_driver = {
         .name           = "dvb_usb_vp702x",
-        .probe          = vp702x_usb_probe,
-        .disconnect = dvb_usb_device_exit,
-        .id_table       = vp702x_usb_table,
+        .probe          = vp702x_usb_probe,
+        .disconnect     = vp702x_usb_disconnect,
+        .id_table       = vp702x_usb_table,
 };
 
 /* module stuff */
diff --git a/drivers/media/dvb/dvb-usb/vp702x.h b/drivers/media/dvb/dvb-usb/vp702x.h
index c2f97f96c21f..20b90055e7ac 100644
--- a/drivers/media/dvb/dvb-usb/vp702x.h
+++ b/drivers/media/dvb/dvb-usb/vp702x.h
@@ -98,6 +98,13 @@ extern int dvb_usb_vp702x_debug;
 #define RESET_TUNER             0xBE
 /* IN  i: 0, v: 0, no extra buffer */
 
+struct vp702x_device_state {
+        struct mutex buf_mutex;
+        int buf_len;
+        u8 *buf;
+};
+
+
 extern struct dvb_frontend * vp702x_fe_attach(struct dvb_usb_device *d);
 
 extern int vp702x_usb_inout_op(struct dvb_usb_device *d, u8 *o, int olen, u8 *i, int ilen, int msec);
diff --git a/drivers/media/dvb/dvb-usb/vp7045.c b/drivers/media/dvb/dvb-usb/vp7045.c
index f13791ca5994..3db89e3cb0bb 100644
--- a/drivers/media/dvb/dvb-usb/vp7045.c
+++ b/drivers/media/dvb/dvb-usb/vp7045.c
@@ -28,9 +28,9 @@ DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
 int vp7045_usb_op(struct dvb_usb_device *d, u8 cmd, u8 *out, int outlen, u8 *in, int inlen, int msec)
 {
         int ret = 0;
-        u8 inbuf[12] = { 0 }, outbuf[20] = { 0 };
+        u8 *buf = d->priv;
 
-        outbuf[0] = cmd;
+        buf[0] = cmd;
 
         if (outlen > 19)
                 outlen = 19;
@@ -38,19 +38,21 @@ int vp7045_usb_op(struct dvb_usb_device *d, u8 cmd, u8 *out, int outlen, u8 *in,
         if (inlen > 11)
                 inlen = 11;
 
+        ret = mutex_lock_interruptible(&d->usb_mutex);
+        if (ret)
+                return ret;
+
         if (out != NULL && outlen > 0)
-                memcpy(&outbuf[1], out, outlen);
+                memcpy(&buf[1], out, outlen);
 
         deb_xfer("out buffer: ");
-        debug_dump(outbuf,outlen+1,deb_xfer);
+        debug_dump(buf, outlen+1, deb_xfer);
 
-        if ((ret = mutex_lock_interruptible(&d->usb_mutex)))
-                return ret;
 
         if (usb_control_msg(d->udev,
                         usb_sndctrlpipe(d->udev,0),
                         TH_COMMAND_OUT, USB_TYPE_VENDOR | USB_DIR_OUT, 0, 0,
-                        outbuf, 20, 2000) != 20) {
+                        buf, 20, 2000) != 20) {
                 err("USB control message 'out' went wrong.");
                 ret = -EIO;
                 goto unlock;
@@ -61,17 +63,17 @@ int vp7045_usb_op(struct dvb_usb_device *d, u8 cmd, u8 *out, int outlen, u8 *in,
         if (usb_control_msg(d->udev,
                         usb_rcvctrlpipe(d->udev,0),
                         TH_COMMAND_IN, USB_TYPE_VENDOR | USB_DIR_IN, 0, 0,
-                        inbuf, 12, 2000) != 12) {
+                        buf, 12, 2000) != 12) {
                 err("USB control message 'in' went wrong.");
                 ret = -EIO;
                 goto unlock;
         }
 
         deb_xfer("in buffer: ");
-        debug_dump(inbuf,12,deb_xfer);
+        debug_dump(buf, 12, deb_xfer);
 
         if (in != NULL && inlen > 0)
-                memcpy(in,&inbuf[1],inlen);
+                memcpy(in, &buf[1], inlen);
 
 unlock:
         mutex_unlock(&d->usb_mutex);
@@ -99,7 +101,7 @@ static int vp7045_power_ctrl(struct dvb_usb_device *d, int onoff)
 
 /* The keymapping struct. Somehow this should be loaded to the driver, but
  * currently it is hardcoded. */
-static struct ir_scancode ir_codes_vp7045_table[] = {
+static struct rc_map_table rc_map_vp7045_table[] = {
         { 0x0016, KEY_POWER },
         { 0x0010, KEY_MUTE },
         { 0x0003, KEY_1 },
@@ -165,10 +167,10 @@ static int vp7045_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
                 return 0;
         }
 
-        for (i = 0; i < ARRAY_SIZE(ir_codes_vp7045_table); i++)
-                if (rc5_data(&ir_codes_vp7045_table[i]) == key) {
+        for (i = 0; i < ARRAY_SIZE(rc_map_vp7045_table); i++)
+                if (rc5_data(&rc_map_vp7045_table[i]) == key) {
                         *state = REMOTE_KEY_PRESSED;
-                        *event = ir_codes_vp7045_table[i].keycode;
+                        *event = rc_map_vp7045_table[i].keycode;
                         break;
                 }
         return 0;
@@ -222,8 +224,26 @@ static struct dvb_usb_device_properties vp7045_properties;
 static int vp7045_usb_probe(struct usb_interface *intf,
                 const struct usb_device_id *id)
 {
-        return dvb_usb_device_init(intf, &vp7045_properties,
-                                   THIS_MODULE, NULL, adapter_nr);
+        struct dvb_usb_device *d;
+        int ret = dvb_usb_device_init(intf, &vp7045_properties,
+                                   THIS_MODULE, &d, adapter_nr);
+        if (ret)
+                return ret;
+
+        d->priv = kmalloc(20, GFP_KERNEL);
+        if (!d->priv) {
+                dvb_usb_device_exit(intf);
+                return -ENOMEM;
+        }
+
+        return ret;
+}
+
+static void vp7045_usb_disconnect(struct usb_interface *intf)
+{
+        struct dvb_usb_device *d = usb_get_intfdata(intf);
+        kfree(d->priv);
+        dvb_usb_device_exit(intf);
 }
 
 static struct usb_device_id vp7045_usb_table [] = {
@@ -238,6 +258,7 @@ MODULE_DEVICE_TABLE(usb, vp7045_usb_table);
 static struct dvb_usb_device_properties vp7045_properties = {
         .usb_ctrl = CYPRESS_FX2,
         .firmware = "dvb-usb-vp7045-01.fw",
+        .size_of_priv = sizeof(u8 *),
 
         .num_adapters = 1,
         .adapter = {
@@ -261,8 +282,8 @@ static struct dvb_usb_device_properties vp7045_properties = {
 
         .rc.legacy = {
                 .rc_interval      = 400,
-                .rc_key_map       = ir_codes_vp7045_table,
-                .rc_key_map_size  = ARRAY_SIZE(ir_codes_vp7045_table),
+                .rc_map_table       = rc_map_vp7045_table,
+                .rc_map_size  = ARRAY_SIZE(rc_map_vp7045_table),
                 .rc_query         = vp7045_rc_query,
         },
 
@@ -284,7 +305,7 @@ static struct dvb_usb_device_properties vp7045_properties = {
 static struct usb_driver vp7045_usb_driver = {
         .name           = "dvb_usb_vp7045",
         .probe          = vp7045_usb_probe,
-        .disconnect = dvb_usb_device_exit,
+        .disconnect     = vp7045_usb_disconnect,
         .id_table       = vp7045_usb_table,
 };
 
diff --git a/drivers/media/dvb/firewire/Kconfig b/drivers/media/dvb/firewire/Kconfig
index 4afa29256df1..f3e9448c3955 100644
--- a/drivers/media/dvb/firewire/Kconfig
+++ b/drivers/media/dvb/firewire/Kconfig
@@ -1,6 +1,6 @@
 config DVB_FIREDTV
         tristate "FireDTV and FloppyDTV"
-        depends on DVB_CORE && (FIREWIRE || IEEE1394)
+        depends on DVB_CORE && FIREWIRE
         help
           Support for DVB receivers from Digital Everywhere
           which are connected via IEEE 1394 (FireWire).
@@ -13,12 +13,6 @@ config DVB_FIREDTV
 
 if DVB_FIREDTV
 
-config DVB_FIREDTV_FIREWIRE
-        def_bool FIREWIRE = y || (FIREWIRE = m && DVB_FIREDTV = m)
-
-config DVB_FIREDTV_IEEE1394
-        def_bool IEEE1394 = y || (IEEE1394 = m && DVB_FIREDTV = m)
-
 config DVB_FIREDTV_INPUT
         def_bool INPUT = y || (INPUT = m && DVB_FIREDTV = m)
 
diff --git a/drivers/media/dvb/firewire/Makefile b/drivers/media/dvb/firewire/Makefile
index da84203d51c6..357b3aab186b 100644
--- a/drivers/media/dvb/firewire/Makefile
+++ b/drivers/media/dvb/firewire/Makefile
@@ -1,9 +1,6 @@
 obj-$(CONFIG_DVB_FIREDTV) += firedtv.o
 
-firedtv-y := firedtv-avc.o firedtv-ci.o firedtv-dvb.o firedtv-fe.o
-firedtv-$(CONFIG_DVB_FIREDTV_FIREWIRE) += firedtv-fw.o
-firedtv-$(CONFIG_DVB_FIREDTV_IEEE1394) += firedtv-1394.o
+firedtv-y := firedtv-avc.o firedtv-ci.o firedtv-dvb.o firedtv-fe.o firedtv-fw.o
 firedtv-$(CONFIG_DVB_FIREDTV_INPUT)    += firedtv-rc.o
 
 ccflags-y += -Idrivers/media/dvb/dvb-core
-ccflags-$(CONFIG_DVB_FIREDTV_IEEE1394) += -Idrivers/ieee1394
diff --git a/drivers/media/dvb/firewire/firedtv-1394.c b/drivers/media/dvb/firewire/firedtv-1394.c
deleted file mode 100644
index b34ca7afb0e6..000000000000
--- a/drivers/media/dvb/firewire/firedtv-1394.c
+++ /dev/null
@@ -1,300 +0,0 @@
-/*
- * FireDTV driver -- ieee1394 I/O backend
- *
- * Copyright (C) 2004 Andreas Monitzer <andy@monitzer.com>
- * Copyright (C) 2007-2008 Ben Backx <ben@bbackx.com>
- * Copyright (C) 2008 Henrik Kurelid <henrik@kurelid.se>
- *
- *      This program is free software; you can redistribute it and/or
- *      modify it under the terms of the GNU General Public License as
- *      published by the Free Software Foundation; either version 2 of
- *      the License, or (at your option) any later version.
- */
-
-#include <linux/device.h>
-#include <linux/errno.h>
-#include <linux/kernel.h>
-#include <linux/list.h>
-#include <linux/slab.h>
-#include <linux/spinlock.h>
-#include <linux/types.h>
-
-#include <dma.h>
-#include <csr1212.h>
-#include <highlevel.h>
-#include <hosts.h>
-#include <ieee1394.h>
-#include <iso.h>
-#include <nodemgr.h>
-
-#include <dvb_demux.h>
-
-#include "firedtv.h"
-
-static LIST_HEAD(node_list);
-static DEFINE_SPINLOCK(node_list_lock);
-
-#define CIP_HEADER_SIZE                 8
-#define MPEG2_TS_HEADER_SIZE            4
-#define MPEG2_TS_SOURCE_PACKET_SIZE     (4 + 188)
-
-static void rawiso_activity_cb(struct hpsb_iso *iso)
-{
-        struct firedtv *f, *fdtv = NULL;
-        unsigned int i, num, packet;
-        unsigned char *buf;
-        unsigned long flags;
-        int count;
-
-        spin_lock_irqsave(&node_list_lock, flags);
-        list_for_each_entry(f, &node_list, list)
-                if (f->backend_data == iso) {
-                        fdtv = f;
-                        break;
-                }
-        spin_unlock_irqrestore(&node_list_lock, flags);
-
-        packet = iso->first_packet;
-        num = hpsb_iso_n_ready(iso);
-
-        if (!fdtv) {
-                pr_err("received at unknown iso channel\n");
-                goto out;
-        }
-
-        for (i = 0; i < num; i++, packet = (packet + 1) % iso->buf_packets) {
-                buf = dma_region_i(&iso->data_buf, unsigned char,
-                        iso->infos[packet].offset + CIP_HEADER_SIZE);
-                count = (iso->infos[packet].len - CIP_HEADER_SIZE) /
-                        MPEG2_TS_SOURCE_PACKET_SIZE;
-
-                /* ignore empty packet */
-                if (iso->infos[packet].len <= CIP_HEADER_SIZE)
-                        continue;
-
-                while (count--) {
-                        if (buf[MPEG2_TS_HEADER_SIZE] == 0x47)
-                                dvb_dmx_swfilter_packets(&fdtv->demux,
-                                                &buf[MPEG2_TS_HEADER_SIZE], 1);
-                        else
-                                dev_err(fdtv->device,
-                                        "skipping invalid packet\n");
-                        buf += MPEG2_TS_SOURCE_PACKET_SIZE;
-                }
-        }
-out:
-        hpsb_iso_recv_release_packets(iso, num);
-}
-
-static inline struct node_entry *node_of(struct firedtv *fdtv)
-{
-        return container_of(fdtv->device, struct unit_directory, device)->ne;
-}
-
-static int node_lock(struct firedtv *fdtv, u64 addr, void *data)
-{
-        quadlet_t *d = data;
-        int ret;
-
-        ret = hpsb_node_lock(node_of(fdtv), addr,
-                             EXTCODE_COMPARE_SWAP, &d[1], d[0]);
-        d[0] = d[1];
-
-        return ret;
-}
-
-static int node_read(struct firedtv *fdtv, u64 addr, void *data)
-{
-        return hpsb_node_read(node_of(fdtv), addr, data, 4);
-}
-
-static int node_write(struct firedtv *fdtv, u64 addr, void *data, size_t len)
-{
-        return hpsb_node_write(node_of(fdtv), addr, data, len);
-}
-
-#define FDTV_ISO_BUFFER_PACKETS 256
-#define FDTV_ISO_BUFFER_SIZE (FDTV_ISO_BUFFER_PACKETS * 200)
-
-static int start_iso(struct firedtv *fdtv)
-{
-        struct hpsb_iso *iso_handle;
-        int ret;
-
-        iso_handle = hpsb_iso_recv_init(node_of(fdtv)->host,
-                                FDTV_ISO_BUFFER_SIZE, FDTV_ISO_BUFFER_PACKETS,
-                                fdtv->isochannel, HPSB_ISO_DMA_DEFAULT,
-                                -1, /* stat.config.irq_interval */
-                                rawiso_activity_cb);
-        if (iso_handle == NULL) {
-                dev_err(fdtv->device, "cannot initialize iso receive\n");
-                return -ENOMEM;
-        }
-        fdtv->backend_data = iso_handle;
-
-        ret = hpsb_iso_recv_start(iso_handle, -1, -1, 0);
-        if (ret != 0) {
-                dev_err(fdtv->device, "cannot start iso receive\n");
-                hpsb_iso_shutdown(iso_handle);
-                fdtv->backend_data = NULL;
-        }
-        return ret;
-}
-
-static void stop_iso(struct firedtv *fdtv)
-{
-        struct hpsb_iso *iso_handle = fdtv->backend_data;
-
-        if (iso_handle != NULL) {
-                hpsb_iso_stop(iso_handle);
-                hpsb_iso_shutdown(iso_handle);
-        }
-        fdtv->backend_data = NULL;
-}
-
-static const struct firedtv_backend fdtv_1394_backend = {
-        .lock           = node_lock,
-        .read           = node_read,
-        .write          = node_write,
-        .start_iso      = start_iso,
-        .stop_iso       = stop_iso,
-};
-
-static void fcp_request(struct hpsb_host *host, int nodeid, int direction,
-                        int cts, u8 *data, size_t length)
-{
-        struct firedtv *f, *fdtv = NULL;
-        unsigned long flags;
-        int su;
-
-        if (length == 0 || (data[0] & 0xf0) != 0)
-                return;
-
-        su = data[1] & 0x7;
-
-        spin_lock_irqsave(&node_list_lock, flags);
-        list_for_each_entry(f, &node_list, list)
-                if (node_of(f)->host == host &&
-                    node_of(f)->nodeid == nodeid &&
-                    (f->subunit == su || (f->subunit == 0 && su == 0x7))) {
-                        fdtv = f;
-                        break;
-                }
-        spin_unlock_irqrestore(&node_list_lock, flags);
-
-        if (fdtv)
-                avc_recv(fdtv, data, length);
-}
-
-static int node_probe(struct device *dev)
-{
-        struct unit_directory *ud =
-                        container_of(dev, struct unit_directory, device);
-        struct firedtv *fdtv;
-        int kv_len, err;
-        void *kv_str;
-
-        if (ud->model_name_kv) {
-                kv_len = (ud->model_name_kv->value.leaf.len - 2) * 4;
-                kv_str = CSR1212_TEXTUAL_DESCRIPTOR_LEAF_DATA(ud->model_name_kv);
-        } else {
-                kv_len = 0;
-                kv_str = NULL;
-        }
-        fdtv = fdtv_alloc(dev, &fdtv_1394_backend, kv_str, kv_len);
-        if (!fdtv)
-                return -ENOMEM;
-
-        /*
-         * Work around a bug in udev's path_id script:  Use the fw-host's dev
-         * instead of the unit directory's dev as parent of the input device.
-         */
-        err = fdtv_register_rc(fdtv, dev->parent->parent);
-        if (err)
-                goto fail_free;
-
-        spin_lock_irq(&node_list_lock);
-        list_add_tail(&fdtv->list, &node_list);
-        spin_unlock_irq(&node_list_lock);
-
-        err = avc_identify_subunit(fdtv);
-        if (err)
-                goto fail;
-
-        err = fdtv_dvb_register(fdtv);
-        if (err)
-                goto fail;
-
-        avc_register_remote_control(fdtv);
-
-        return 0;
-fail:
-        spin_lock_irq(&node_list_lock);
-        list_del(&fdtv->list);
-        spin_unlock_irq(&node_list_lock);
-        fdtv_unregister_rc(fdtv);
-fail_free:
-        kfree(fdtv);
-
-        return err;
-}
-
-static int node_remove(struct device *dev)
-{
-        struct firedtv *fdtv = dev_get_drvdata(dev);
-
-        fdtv_dvb_unregister(fdtv);
-
-        spin_lock_irq(&node_list_lock);
-        list_del(&fdtv->list);
-        spin_unlock_irq(&node_list_lock);
-
-        fdtv_unregister_rc(fdtv);
-        kfree(fdtv);
-
-        return 0;
-}
-
-static int node_update(struct unit_directory *ud)
-{
-        struct firedtv *fdtv = dev_get_drvdata(&ud->device);
-
-        if (fdtv->isochannel >= 0)
-                cmp_establish_pp_connection(fdtv, fdtv->subunit,
-                                            fdtv->isochannel);
-        return 0;
-}
-
-static struct hpsb_protocol_driver fdtv_driver = {
-        .name           = "firedtv",
-        .id_table       = fdtv_id_table,
-        .update         = node_update,
-        .driver         = {
-                .probe  = node_probe,
-                .remove = node_remove,
-        },
-};
-
-static struct hpsb_highlevel fdtv_highlevel = {
-        .name           = "firedtv",
-        .fcp_request    = fcp_request,
-};
-
-int __init fdtv_1394_init(void)
-{
-        int ret;
-
-        hpsb_register_highlevel(&fdtv_highlevel);
-        ret = hpsb_register_protocol(&fdtv_driver);
-        if (ret) {
-                printk(KERN_ERR "firedtv: failed to register protocol\n");
-                hpsb_unregister_highlevel(&fdtv_highlevel);
-        }
-        return ret;
-}
-
-void __exit fdtv_1394_exit(void)
-{
-        hpsb_unregister_protocol(&fdtv_driver);
-        hpsb_unregister_highlevel(&fdtv_highlevel);
-}
diff --git a/drivers/media/dvb/firewire/firedtv-avc.c b/drivers/media/dvb/firewire/firedtv-avc.c
index 28294af752db..21c52e3b522e 100644
--- a/drivers/media/dvb/firewire/firedtv-avc.c
+++ b/drivers/media/dvb/firewire/firedtv-avc.c
@@ -24,6 +24,8 @@
 #include <linux/wait.h>
 #include <linux/workqueue.h>
 
+#include <dvb_frontend.h>
+
 #include "firedtv.h"
 
 #define FCP_COMMAND_REGISTER            0xfffff0000b00ULL
@@ -130,6 +132,20 @@ MODULE_PARM_DESC(debug, "Verbose logging (none = 0"
         ", FCP payloads = "             __stringify(AVC_DEBUG_FCP_PAYLOADS)
         ", or a combination, or all = -1)");
 
+/*
+ * This is a workaround since there is no vendor specific command to retrieve
+ * ca_info using AVC. If this parameter is not used, ca_system_id will be
+ * filled with application_manufacturer from ca_app_info.
+ * Digital Everywhere have said that adding ca_info is on their TODO list.
+ */
+static unsigned int num_fake_ca_system_ids;
+static int fake_ca_system_ids[4] = { -1, -1, -1, -1 };
+module_param_array(fake_ca_system_ids, int, &num_fake_ca_system_ids, 0644);
+MODULE_PARM_DESC(fake_ca_system_ids, "If your CAM application manufacturer "
+                 "does not have the same ca_system_id as your CAS, you can "
+                 "override what ca_system_ids are presented to the "
+                 "application by setting this field to an array of ids.");
+
 static const char *debug_fcp_ctype(unsigned int ctype)
 {
         static const char *ctypes[] = {
@@ -225,8 +241,8 @@ static int avc_write(struct firedtv *fdtv)
                 if (unlikely(avc_debug))
                         debug_fcp(fdtv->avc_data, fdtv->avc_data_length);
 
-                err = fdtv->backend->write(fdtv, FCP_COMMAND_REGISTER,
-                                fdtv->avc_data, fdtv->avc_data_length);
+                err = fdtv_write(fdtv, FCP_COMMAND_REGISTER,
+                                 fdtv->avc_data, fdtv->avc_data_length);
                 if (err) {
                         dev_err(fdtv->device, "FCP command write failed\n");
 
@@ -368,10 +384,30 @@ static int avc_tuner_tuneqpsk(struct firedtv *fdtv,
                 c->operand[12] = 0;
 
         if (fdtv->type == FIREDTV_DVB_S2) {
-                c->operand[13] = 0x1;
-                c->operand[14] = 0xff;
-                c->operand[15] = 0xff;
-
+                if (fdtv->fe.dtv_property_cache.delivery_system == SYS_DVBS2) {
+                        switch (fdtv->fe.dtv_property_cache.modulation) {
+                        case QAM_16:            c->operand[13] = 0x1; break;
+                        case QPSK:              c->operand[13] = 0x2; break;
+                        case PSK_8:             c->operand[13] = 0x3; break;
+                        default:                c->operand[13] = 0x2; break;
+                        }
+                        switch (fdtv->fe.dtv_property_cache.rolloff) {
+                        case ROLLOFF_AUTO:      c->operand[14] = 0x2; break;
+                        case ROLLOFF_35:        c->operand[14] = 0x2; break;
+                        case ROLLOFF_20:        c->operand[14] = 0x0; break;
+                        case ROLLOFF_25:        c->operand[14] = 0x1; break;
+                        /* case ROLLOFF_NONE:   c->operand[14] = 0xff; break; */
+                        }
+                        switch (fdtv->fe.dtv_property_cache.pilot) {
+                        case PILOT_AUTO:        c->operand[15] = 0x0; break;
+                        case PILOT_OFF:         c->operand[15] = 0x0; break;
+                        case PILOT_ON:          c->operand[15] = 0x1; break;
+                        }
+                } else {
+                        c->operand[13] = 0x1;  /* auto modulation */
+                        c->operand[14] = 0xff; /* disable rolloff */
+                        c->operand[15] = 0xff; /* disable pilot */
+                }
                 return 16;
         } else {
                 return 13;
@@ -977,7 +1013,7 @@ int avc_ca_info(struct firedtv *fdtv, char *app_info, unsigned int *len)
 {
         struct avc_command_frame *c = (void *)fdtv->avc_data;
         struct avc_response_frame *r = (void *)fdtv->avc_data;
-        int pos, ret;
+        int i, pos, ret;
 
         mutex_lock(&fdtv->avc_mutex);
 
@@ -1004,9 +1040,18 @@ int avc_ca_info(struct firedtv *fdtv, char *app_info, unsigned int *len)
         app_info[0] = (EN50221_TAG_CA_INFO >> 16) & 0xff;
         app_info[1] = (EN50221_TAG_CA_INFO >>  8) & 0xff;
         app_info[2] = (EN50221_TAG_CA_INFO >>  0) & 0xff;
-        app_info[3] = 2;
-        app_info[4] = r->operand[pos + 0];
-        app_info[5] = r->operand[pos + 1];
+        if (num_fake_ca_system_ids == 0) {
+                app_info[3] = 2;
+                app_info[4] = r->operand[pos + 0];
+                app_info[5] = r->operand[pos + 1];
+        } else {
+                app_info[3] = num_fake_ca_system_ids * 2;
+                for (i = 0; i < num_fake_ca_system_ids; i++) {
+                        app_info[4 + i * 2] =
+                                (fake_ca_system_ids[i] >> 8) & 0xff;
+                        app_info[5 + i * 2] = fake_ca_system_ids[i] & 0xff;
+                }
+        }
         *len = app_info[3] + 4;
 out:
         mutex_unlock(&fdtv->avc_mutex);
@@ -1275,14 +1320,10 @@ static int cmp_read(struct firedtv *fdtv, u64 addr, __be32 *data)
 {
         int ret;
 
-        mutex_lock(&fdtv->avc_mutex);
-
-        ret = fdtv->backend->read(fdtv, addr, data);
+        ret = fdtv_read(fdtv, addr, data);
         if (ret < 0)
                 dev_err(fdtv->device, "CMP: read I/O error\n");
 
-        mutex_unlock(&fdtv->avc_mutex);
-
         return ret;
 }
 
@@ -1290,18 +1331,9 @@ static int cmp_lock(struct firedtv *fdtv, u64 addr, __be32 data[])
 {
         int ret;
 
-        mutex_lock(&fdtv->avc_mutex);
-
-        /* data[] is stack-allocated and should not be DMA-mapped. */
-        memcpy(fdtv->avc_data, data, 8);
-
-        ret = fdtv->backend->lock(fdtv, addr, fdtv->avc_data);
+        ret = fdtv_lock(fdtv, addr, data);
         if (ret < 0)
                 dev_err(fdtv->device, "CMP: lock I/O error\n");
-        else
-                memcpy(data, fdtv->avc_data, 8);
-
-        mutex_unlock(&fdtv->avc_mutex);
 
         return ret;
 }
@@ -1360,10 +1392,7 @@ repeat:
                 /* FIXME: this is for the worst case - optimize */
                 set_opcr_overhead_id(opcr, 0);
 
-                /*
-                 * FIXME: allocate isochronous channel and bandwidth at IRM
-                 * fdtv->backend->alloc_resources(fdtv, channels_mask, bw);
-                 */
+                /* FIXME: allocate isochronous channel and bandwidth at IRM */
         }
 
         set_opcr_p2p_connections(opcr, get_opcr_p2p_connections(*opcr) + 1);
@@ -1379,8 +1408,6 @@ repeat:
                 /*
                  * FIXME: if old_opcr.P2P_Connections > 0,
                  * deallocate isochronous channel and bandwidth at IRM
-                 * if (...)
-                 *      fdtv->backend->dealloc_resources(fdtv, channel, bw);
                  */
 
                 if (++attempts < 6) /* arbitrary limit */
diff --git a/drivers/media/dvb/firewire/firedtv-ci.c b/drivers/media/dvb/firewire/firedtv-ci.c
index d3c2cf60de76..8ffb565f0704 100644
--- a/drivers/media/dvb/firewire/firedtv-ci.c
+++ b/drivers/media/dvb/firewire/firedtv-ci.c
@@ -220,6 +220,7 @@ static const struct file_operations fdtv_ca_fops = {
         .open           = dvb_generic_open,
         .release        = dvb_generic_release,
         .poll           = fdtv_ca_io_poll,
+        .llseek         = noop_llseek,
 };
 
 static struct dvb_device fdtv_ca = {
diff --git a/drivers/media/dvb/firewire/firedtv-dvb.c b/drivers/media/dvb/firewire/firedtv-dvb.c
index 079e8c5b0475..fd8bbbfa5c59 100644
--- a/drivers/media/dvb/firewire/firedtv-dvb.c
+++ b/drivers/media/dvb/firewire/firedtv-dvb.c
@@ -14,14 +14,9 @@
 #include <linux/device.h>
 #include <linux/errno.h>
 #include <linux/kernel.h>
-#include <linux/mod_devicetable.h>
 #include <linux/module.h>
 #include <linux/mutex.h>
-#include <linux/slab.h>
-#include <linux/string.h>
 #include <linux/types.h>
-#include <linux/wait.h>
-#include <linux/workqueue.h>
 
 #include <dmxdev.h>
 #include <dvb_demux.h>
@@ -166,11 +161,11 @@ int fdtv_stop_feed(struct dvb_demux_feed *dvbdmxfeed)
 
 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
 
-int fdtv_dvb_register(struct firedtv *fdtv)
+int fdtv_dvb_register(struct firedtv *fdtv, const char *name)
 {
         int err;
 
-        err = dvb_register_adapter(&fdtv->adapter, fdtv_model_names[fdtv->type],
+        err = dvb_register_adapter(&fdtv->adapter, name,
                                    THIS_MODULE, fdtv->device, adapter_nr);
         if (err < 0)
                 goto fail_log;
@@ -210,7 +205,7 @@ int fdtv_dvb_register(struct firedtv *fdtv)
 
         dvb_net_init(&fdtv->adapter, &fdtv->dvbnet, &fdtv->demux.dmx);
 
-        fdtv_frontend_init(fdtv);
+        fdtv_frontend_init(fdtv, name);
         err = dvb_register_frontend(&fdtv->adapter, &fdtv->fe);
         if (err)
                 goto fail_net_release;
@@ -248,127 +243,3 @@ void fdtv_dvb_unregister(struct firedtv *fdtv)
         dvb_dmx_release(&fdtv->demux);
         dvb_unregister_adapter(&fdtv->adapter);
 }
-
-const char *fdtv_model_names[] = {
-        [FIREDTV_UNKNOWN] = "unknown type",
-        [FIREDTV_DVB_S]   = "FireDTV S/CI",
-        [FIREDTV_DVB_C]   = "FireDTV C/CI",
-        [FIREDTV_DVB_T]   = "FireDTV T/CI",
-        [FIREDTV_DVB_S2]  = "FireDTV S2  ",
-};
-
-struct firedtv *fdtv_alloc(struct device *dev,
-                           const struct firedtv_backend *backend,
-                           const char *name, size_t name_len)
-{
-        struct firedtv *fdtv;
-        int i;
-
-        fdtv = kzalloc(sizeof(*fdtv), GFP_KERNEL);
-        if (!fdtv)
-                return NULL;
-
-        dev_set_drvdata(dev, fdtv);
-        fdtv->device            = dev;
-        fdtv->isochannel        = -1;
-        fdtv->voltage           = 0xff;
-        fdtv->tone              = 0xff;
-        fdtv->backend           = backend;
-
-        mutex_init(&fdtv->avc_mutex);
-        init_waitqueue_head(&fdtv->avc_wait);
-        mutex_init(&fdtv->demux_mutex);
-        INIT_WORK(&fdtv->remote_ctrl_work, avc_remote_ctrl_work);
-
-        for (i = ARRAY_SIZE(fdtv_model_names); --i; )
-                if (strlen(fdtv_model_names[i]) <= name_len &&
-                    strncmp(name, fdtv_model_names[i], name_len) == 0)
-                        break;
-        fdtv->type = i;
-
-        return fdtv;
-}
-
-#define MATCH_FLAGS (IEEE1394_MATCH_VENDOR_ID | IEEE1394_MATCH_MODEL_ID | \
-                     IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION)
-
-#define DIGITAL_EVERYWHERE_OUI  0x001287
-#define AVC_UNIT_SPEC_ID_ENTRY  0x00a02d
-#define AVC_SW_VERSION_ENTRY    0x010001
-
-const struct ieee1394_device_id fdtv_id_table[] = {
-        {
-                /* FloppyDTV S/CI and FloppyDTV S2 */
-                .match_flags    = MATCH_FLAGS,
-                .vendor_id      = DIGITAL_EVERYWHERE_OUI,
-                .model_id       = 0x000024,
-                .specifier_id   = AVC_UNIT_SPEC_ID_ENTRY,
-                .version        = AVC_SW_VERSION_ENTRY,
-        }, {
-                /* FloppyDTV T/CI */
-                .match_flags    = MATCH_FLAGS,
-                .vendor_id      = DIGITAL_EVERYWHERE_OUI,
-                .model_id       = 0x000025,
-                .specifier_id   = AVC_UNIT_SPEC_ID_ENTRY,
-                .version        = AVC_SW_VERSION_ENTRY,
-        }, {
-                /* FloppyDTV C/CI */
-                .match_flags    = MATCH_FLAGS,
-                .vendor_id      = DIGITAL_EVERYWHERE_OUI,
-                .model_id       = 0x000026,
-                .specifier_id   = AVC_UNIT_SPEC_ID_ENTRY,
-                .version        = AVC_SW_VERSION_ENTRY,
-        }, {
-                /* FireDTV S/CI and FloppyDTV S2 */
-                .match_flags    = MATCH_FLAGS,
-                .vendor_id      = DIGITAL_EVERYWHERE_OUI,
-                .model_id       = 0x000034,
-                .specifier_id   = AVC_UNIT_SPEC_ID_ENTRY,
-                .version        = AVC_SW_VERSION_ENTRY,
-        }, {
-                /* FireDTV T/CI */
-                .match_flags    = MATCH_FLAGS,
-                .vendor_id      = DIGITAL_EVERYWHERE_OUI,
-                .model_id       = 0x000035,
-                .specifier_id   = AVC_UNIT_SPEC_ID_ENTRY,
-                .version        = AVC_SW_VERSION_ENTRY,
-        }, {
-                /* FireDTV C/CI */
-                .match_flags    = MATCH_FLAGS,
-                .vendor_id      = DIGITAL_EVERYWHERE_OUI,
-                .model_id       = 0x000036,
-                .specifier_id   = AVC_UNIT_SPEC_ID_ENTRY,
-                .version        = AVC_SW_VERSION_ENTRY,
-        }, {}
-};
-MODULE_DEVICE_TABLE(ieee1394, fdtv_id_table);
-
-static int __init fdtv_init(void)
-{
-        int ret;
-
-        ret = fdtv_fw_init();
-        if (ret < 0)
-                return ret;
-
-        ret = fdtv_1394_init();
-        if (ret < 0)
-                fdtv_fw_exit();
-
-        return ret;
-}
-
-static void __exit fdtv_exit(void)
-{
-        fdtv_1394_exit();
-        fdtv_fw_exit();
-}
-
-module_init(fdtv_init);
-module_exit(fdtv_exit);
-
-MODULE_AUTHOR("Andreas Monitzer <andy@monitzer.com>");
-MODULE_AUTHOR("Ben Backx <ben@bbackx.com>");
-MODULE_DESCRIPTION("FireDTV DVB Driver");
-MODULE_LICENSE("GPL");
-MODULE_SUPPORTED_DEVICE("FireDTV DVB");
diff --git a/drivers/media/dvb/firewire/firedtv-fe.c b/drivers/media/dvb/firewire/firedtv-fe.c
index e49cdc88b0c7..8748a61be73d 100644
--- a/drivers/media/dvb/firewire/firedtv-fe.c
+++ b/drivers/media/dvb/firewire/firedtv-fe.c
@@ -36,14 +36,14 @@ static int fdtv_dvb_init(struct dvb_frontend *fe)
                 return err;
         }
 
-        return fdtv->backend->start_iso(fdtv);
+        return fdtv_start_iso(fdtv);
 }
 
 static int fdtv_sleep(struct dvb_frontend *fe)
 {
         struct firedtv *fdtv = fe->sec_priv;
 
-        fdtv->backend->stop_iso(fdtv);
+        fdtv_stop_iso(fdtv);
         cmp_break_pp_connection(fdtv, fdtv->subunit, fdtv->isochannel);
         fdtv->isochannel = -1;
         return 0;
@@ -155,7 +155,17 @@ static int fdtv_get_frontend(struct dvb_frontend *fe,
         return -EOPNOTSUPP;
 }
 
-void fdtv_frontend_init(struct firedtv *fdtv)
+static int fdtv_get_property(struct dvb_frontend *fe, struct dtv_property *tvp)
+{
+        return 0;
+}
+
+static int fdtv_set_property(struct dvb_frontend *fe, struct dtv_property *tvp)
+{
+        return 0;
+}
+
+void fdtv_frontend_init(struct firedtv *fdtv, const char *name)
 {
         struct dvb_frontend_ops *ops = &fdtv->fe.ops;
         struct dvb_frontend_info *fi = &ops->info;
@@ -166,6 +176,9 @@ void fdtv_frontend_init(struct firedtv *fdtv)
         ops->set_frontend               = fdtv_set_frontend;
         ops->get_frontend               = fdtv_get_frontend;
 
+        ops->get_property               = fdtv_get_property;
+        ops->set_property               = fdtv_set_property;
+
         ops->read_status                = fdtv_read_status;
         ops->read_ber                   = fdtv_read_ber;
         ops->read_signal_strength       = fdtv_read_signal_strength;
@@ -179,7 +192,6 @@ void fdtv_frontend_init(struct firedtv *fdtv)
 
         switch (fdtv->type) {
         case FIREDTV_DVB_S:
-        case FIREDTV_DVB_S2:
                 fi->type                = FE_QPSK;
 
                 fi->frequency_min       = 950000;
@@ -188,7 +200,7 @@ void fdtv_frontend_init(struct firedtv *fdtv)
                 fi->symbol_rate_min     = 1000000;
                 fi->symbol_rate_max     = 40000000;
 
-                fi->caps                = FE_CAN_INVERSION_AUTO |
+                fi->caps                = FE_CAN_INVERSION_AUTO |
                                           FE_CAN_FEC_1_2        |
                                           FE_CAN_FEC_2_3        |
                                           FE_CAN_FEC_3_4        |
@@ -198,6 +210,26 @@ void fdtv_frontend_init(struct firedtv *fdtv)
                                           FE_CAN_QPSK;
                 break;
 
+        case FIREDTV_DVB_S2:
+                fi->type                = FE_QPSK;
+
+                fi->frequency_min       = 950000;
+                fi->frequency_max       = 2150000;
+                fi->frequency_stepsize  = 125;
+                fi->symbol_rate_min     = 1000000;
+                fi->symbol_rate_max     = 40000000;
+
+                fi->caps                = FE_CAN_INVERSION_AUTO |
+                                          FE_CAN_FEC_1_2        |
+                                          FE_CAN_FEC_2_3        |
+                                          FE_CAN_FEC_3_4        |
+                                          FE_CAN_FEC_5_6        |
+                                          FE_CAN_FEC_7_8        |
+                                          FE_CAN_FEC_AUTO       |
+                                          FE_CAN_QPSK           |
+                                          FE_CAN_2G_MODULATION;
+                break;
+
         case FIREDTV_DVB_C:
                 fi->type                = FE_QAM;
 
@@ -234,7 +266,7 @@ void fdtv_frontend_init(struct firedtv *fdtv)
                 dev_err(fdtv->device, "no frontend for model type %d\n",
                         fdtv->type);
         }
-        strcpy(fi->name, fdtv_model_names[fdtv->type]);
+        strcpy(fi->name, name);
 
         fdtv->fe.dvb = &fdtv->adapter;
         fdtv->fe.sec_priv = fdtv;
diff --git a/drivers/media/dvb/firewire/firedtv-fw.c b/drivers/media/dvb/firewire/firedtv-fw.c
index 7424b0493f9d..864b6274c729 100644
--- a/drivers/media/dvb/firewire/firedtv-fw.c
+++ b/drivers/media/dvb/firewire/firedtv-fw.c
@@ -9,11 +9,18 @@
 #include <linux/kernel.h>
 #include <linux/list.h>
 #include <linux/mm.h>
+#include <linux/mod_devicetable.h>
+#include <linux/module.h>
+#include <linux/mutex.h>
 #include <linux/slab.h>
 #include <linux/spinlock.h>
+#include <linux/string.h>
 #include <linux/types.h>
+#include <linux/wait.h>
+#include <linux/workqueue.h>
 
 #include <asm/page.h>
+#include <asm/system.h>
 
 #include <dvb_demux.h>
 
@@ -41,17 +48,17 @@ static int node_req(struct firedtv *fdtv, u64 addr, void *data, size_t len,
         return rcode != RCODE_COMPLETE ? -EIO : 0;
 }
 
-static int node_lock(struct firedtv *fdtv, u64 addr, void *data)
+int fdtv_lock(struct firedtv *fdtv, u64 addr, void *data)
 {
         return node_req(fdtv, addr, data, 8, TCODE_LOCK_COMPARE_SWAP);
 }
 
-static int node_read(struct firedtv *fdtv, u64 addr, void *data)
+int fdtv_read(struct firedtv *fdtv, u64 addr, void *data)
 {
         return node_req(fdtv, addr, data, 4, TCODE_READ_QUADLET_REQUEST);
 }
 
-static int node_write(struct firedtv *fdtv, u64 addr, void *data, size_t len)
+int fdtv_write(struct firedtv *fdtv, u64 addr, void *data, size_t len)
 {
         return node_req(fdtv, addr, data, len, TCODE_WRITE_BLOCK_REQUEST);
 }
@@ -67,7 +74,7 @@ static int node_write(struct firedtv *fdtv, u64 addr, void *data, size_t len)
 #define N_PAGES                 DIV_ROUND_UP(N_PACKETS, PACKETS_PER_PAGE)
 #define IRQ_INTERVAL            16
 
-struct firedtv_receive_context {
+struct fdtv_ir_context {
         struct fw_iso_context *context;
         struct fw_iso_buffer buffer;
         int interrupt_packet;
@@ -75,7 +82,7 @@ struct firedtv_receive_context {
         char *pages[N_PAGES];
 };
 
-static int queue_iso(struct firedtv_receive_context *ctx, int index)
+static int queue_iso(struct fdtv_ir_context *ctx, int index)
 {
         struct fw_iso_packet p;
 
@@ -92,7 +99,7 @@ static void handle_iso(struct fw_iso_context *context, u32 cycle,
                        size_t header_length, void *header, void *data)
 {
         struct firedtv *fdtv = data;
-        struct firedtv_receive_context *ctx = fdtv->backend_data;
+        struct fdtv_ir_context *ctx = fdtv->ir_context;
         __be32 *h, *h_end;
         int length, err, i = ctx->current_packet;
         char *p, *p_end;
@@ -118,12 +125,13 @@ static void handle_iso(struct fw_iso_context *context, u32 cycle,
 
                 i = (i + 1) & (N_PACKETS - 1);
         }
+        fw_iso_context_queue_flush(ctx->context);
         ctx->current_packet = i;
 }
 
-static int start_iso(struct firedtv *fdtv)
+int fdtv_start_iso(struct firedtv *fdtv)
 {
-        struct firedtv_receive_context *ctx;
+        struct fdtv_ir_context *ctx;
         struct fw_device *device = device_of(fdtv);
         int i, err;
 
@@ -161,7 +169,7 @@ static int start_iso(struct firedtv *fdtv)
         if (err)
                 goto fail;
 
-        fdtv->backend_data = ctx;
+        fdtv->ir_context = ctx;
 
         return 0;
 fail:
@@ -174,9 +182,9 @@ fail_free:
         return err;
 }
 
-static void stop_iso(struct firedtv *fdtv)
+void fdtv_stop_iso(struct firedtv *fdtv)
 {
-        struct firedtv_receive_context *ctx = fdtv->backend_data;
+        struct fdtv_ir_context *ctx = fdtv->ir_context;
 
         fw_iso_context_stop(ctx->context);
         fw_iso_buffer_destroy(&ctx->buffer, device_of(fdtv)->card);
@@ -184,14 +192,6 @@ static void stop_iso(struct firedtv *fdtv)
         kfree(ctx);
 }
 
-static const struct firedtv_backend backend = {
-        .lock           = node_lock,
-        .read           = node_read,
-        .write          = node_write,
-        .start_iso      = start_iso,
-        .stop_iso       = stop_iso,
-};
-
 static void handle_fcp(struct fw_card *card, struct fw_request *request,
                        int tcode, int destination, int source, int generation,
                        unsigned long long offset, void *payload, size_t length,
@@ -238,6 +238,14 @@ static const struct fw_address_region fcp_region = {
         .end    = CSR_REGISTER_BASE + CSR_FCP_END,
 };
 
+static const char * const model_names[] = {
+        [FIREDTV_UNKNOWN] = "unknown type",
+        [FIREDTV_DVB_S]   = "FireDTV S/CI",
+        [FIREDTV_DVB_C]   = "FireDTV C/CI",
+        [FIREDTV_DVB_T]   = "FireDTV T/CI",
+        [FIREDTV_DVB_S2]  = "FireDTV S2  ",
+};
+
 /* Adjust the template string if models with longer names appear. */
 #define MAX_MODEL_NAME_LEN sizeof("FireDTV ????")
 
@@ -245,15 +253,31 @@ static int node_probe(struct device *dev)
 {
         struct firedtv *fdtv;
         char name[MAX_MODEL_NAME_LEN];
-        int name_len, err;
-
-        name_len = fw_csr_string(fw_unit(dev)->directory, CSR_MODEL,
-                                 name, sizeof(name));
+        int name_len, i, err;
 
-        fdtv = fdtv_alloc(dev, &backend, name, name_len >= 0 ? name_len : 0);
+        fdtv = kzalloc(sizeof(*fdtv), GFP_KERNEL);
         if (!fdtv)
                 return -ENOMEM;
 
+        dev_set_drvdata(dev, fdtv);
+        fdtv->device            = dev;
+        fdtv->isochannel        = -1;
+        fdtv->voltage           = 0xff;
+        fdtv->tone              = 0xff;
+
+        mutex_init(&fdtv->avc_mutex);
+        init_waitqueue_head(&fdtv->avc_wait);
+        mutex_init(&fdtv->demux_mutex);
+        INIT_WORK(&fdtv->remote_ctrl_work, avc_remote_ctrl_work);
+
+        name_len = fw_csr_string(fw_unit(dev)->directory, CSR_MODEL,
+                                 name, sizeof(name));
+        for (i = ARRAY_SIZE(model_names); --i; )
+                if (strlen(model_names[i]) <= name_len &&
+                    strncmp(name, model_names[i], name_len) == 0)
+                        break;
+        fdtv->type = i;
+
         err = fdtv_register_rc(fdtv, dev);
         if (err)
                 goto fail_free;
@@ -266,7 +290,7 @@ static int node_probe(struct device *dev)
         if (err)
                 goto fail;
 
-        err = fdtv_dvb_register(fdtv);
+        err = fdtv_dvb_register(fdtv, model_names[fdtv->type]);
         if (err)
                 goto fail;
 
@@ -309,6 +333,60 @@ static void node_update(struct fw_unit *unit)
                                             fdtv->isochannel);
 }
 
+#define MATCH_FLAGS (IEEE1394_MATCH_VENDOR_ID | IEEE1394_MATCH_MODEL_ID | \
+                     IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION)
+
+#define DIGITAL_EVERYWHERE_OUI  0x001287
+#define AVC_UNIT_SPEC_ID_ENTRY  0x00a02d
+#define AVC_SW_VERSION_ENTRY    0x010001
+
+static const struct ieee1394_device_id fdtv_id_table[] = {
+        {
+                /* FloppyDTV S/CI and FloppyDTV S2 */
+                .match_flags    = MATCH_FLAGS,
+                .vendor_id      = DIGITAL_EVERYWHERE_OUI,
+                .model_id       = 0x000024,
+                .specifier_id   = AVC_UNIT_SPEC_ID_ENTRY,
+                .version        = AVC_SW_VERSION_ENTRY,
+        }, {
+                /* FloppyDTV T/CI */
+                .match_flags    = MATCH_FLAGS,
+                .vendor_id      = DIGITAL_EVERYWHERE_OUI,
+                .model_id       = 0x000025,
+                .specifier_id   = AVC_UNIT_SPEC_ID_ENTRY,
+                .version        = AVC_SW_VERSION_ENTRY,
+        }, {
+                /* FloppyDTV C/CI */
+                .match_flags    = MATCH_FLAGS,
+                .vendor_id      = DIGITAL_EVERYWHERE_OUI,
+                .model_id       = 0x000026,
+                .specifier_id   = AVC_UNIT_SPEC_ID_ENTRY,
+                .version        = AVC_SW_VERSION_ENTRY,
+        }, {
+                /* FireDTV S/CI and FloppyDTV S2 */
+                .match_flags    = MATCH_FLAGS,
+                .vendor_id      = DIGITAL_EVERYWHERE_OUI,
+                .model_id       = 0x000034,
+                .specifier_id   = AVC_UNIT_SPEC_ID_ENTRY,
+                .version        = AVC_SW_VERSION_ENTRY,
+        }, {
+                /* FireDTV T/CI */
+                .match_flags    = MATCH_FLAGS,
+                .vendor_id      = DIGITAL_EVERYWHERE_OUI,
+                .model_id       = 0x000035,
+                .specifier_id   = AVC_UNIT_SPEC_ID_ENTRY,
+                .version        = AVC_SW_VERSION_ENTRY,
+        }, {
+                /* FireDTV C/CI */
+                .match_flags    = MATCH_FLAGS,
+                .vendor_id      = DIGITAL_EVERYWHERE_OUI,
+                .model_id       = 0x000036,
+                .specifier_id   = AVC_UNIT_SPEC_ID_ENTRY,
+                .version        = AVC_SW_VERSION_ENTRY,
+        }, {}
+};
+MODULE_DEVICE_TABLE(ieee1394, fdtv_id_table);
+
 static struct fw_driver fdtv_driver = {
         .driver   = {
                 .owner  = THIS_MODULE,
@@ -321,7 +399,7 @@ static struct fw_driver fdtv_driver = {
         .id_table = fdtv_id_table,
 };
 
-int __init fdtv_fw_init(void)
+static int __init fdtv_init(void)
 {
         int ret;
 
@@ -329,11 +407,24 @@ int __init fdtv_fw_init(void)
         if (ret < 0)
                 return ret;
 
-        return driver_register(&fdtv_driver.driver);
+        ret = driver_register(&fdtv_driver.driver);
+        if (ret < 0)
+                fw_core_remove_address_handler(&fcp_handler);
+
+        return ret;
 }
 
-void fdtv_fw_exit(void)
+static void __exit fdtv_exit(void)
 {
         driver_unregister(&fdtv_driver.driver);
         fw_core_remove_address_handler(&fcp_handler);
 }
+
+module_init(fdtv_init);
+module_exit(fdtv_exit);
+
+MODULE_AUTHOR("Andreas Monitzer <andy@monitzer.com>");
+MODULE_AUTHOR("Ben Backx <ben@bbackx.com>");
+MODULE_DESCRIPTION("FireDTV DVB Driver");
+MODULE_LICENSE("GPL");
+MODULE_SUPPORTED_DEVICE("FireDTV DVB");
diff --git a/drivers/media/dvb/firewire/firedtv-rc.c b/drivers/media/dvb/firewire/firedtv-rc.c
index fcf3828472b8..f82d4a93feb3 100644
--- a/drivers/media/dvb/firewire/firedtv-rc.c
+++ b/drivers/media/dvb/firewire/firedtv-rc.c
@@ -172,7 +172,8 @@ void fdtv_unregister_rc(struct firedtv *fdtv)
 
 void fdtv_handle_rc(struct firedtv *fdtv, unsigned int code)
 {
-        u16 *keycode = fdtv->remote_ctrl_dev->keycode;
+        struct input_dev *idev = fdtv->remote_ctrl_dev;
+        u16 *keycode = idev->keycode;
 
         if (code >= 0x0300 && code <= 0x031f)
                 code = keycode[code - 0x0300];
@@ -188,6 +189,8 @@ void fdtv_handle_rc(struct firedtv *fdtv, unsigned int code)
                 return;
         }
 
-        input_report_key(fdtv->remote_ctrl_dev, code, 1);
-        input_report_key(fdtv->remote_ctrl_dev, code, 0);
+        input_report_key(idev, code, 1);
+        input_sync(idev);
+        input_report_key(idev, code, 0);
+        input_sync(idev);
 }
diff --git a/drivers/media/dvb/firewire/firedtv.h b/drivers/media/dvb/firewire/firedtv.h
index 78cc28f36914..bd00b04e079d 100644
--- a/drivers/media/dvb/firewire/firedtv.h
+++ b/drivers/media/dvb/firewire/firedtv.h
@@ -70,15 +70,7 @@ enum model_type {
 
 struct device;
 struct input_dev;
-struct firedtv;
-
-struct firedtv_backend {
-        int (*lock)(struct firedtv *fdtv, u64 addr, void *data);
-        int (*read)(struct firedtv *fdtv, u64 addr, void *data);
-        int (*write)(struct firedtv *fdtv, u64 addr, void *data, size_t len);
-        int (*start_iso)(struct firedtv *fdtv);
-        void (*stop_iso)(struct firedtv *fdtv);
-};
+struct fdtv_ir_context;
 
 struct firedtv {
         struct device *device;
@@ -104,12 +96,11 @@ struct firedtv {
         enum model_type         type;
         char                    subunit;
         char                    isochannel;
+        struct fdtv_ir_context  *ir_context;
+
         fe_sec_voltage_t        voltage;
         fe_sec_tone_mode_t      tone;
 
-        const struct firedtv_backend *backend;
-        void                    *backend_data;
-
         struct mutex            demux_mutex;
         unsigned long           channel_active;
         u16                     channel_pid[16];
@@ -118,15 +109,6 @@ struct firedtv {
         u8                      avc_data[512];
 };
 
-/* firedtv-1394.c */
-#ifdef CONFIG_DVB_FIREDTV_IEEE1394
-int fdtv_1394_init(void);
-void fdtv_1394_exit(void);
-#else
-static inline int fdtv_1394_init(void) { return 0; }
-static inline void fdtv_1394_exit(void) {}
-#endif
-
 /* firedtv-avc.c */
 int avc_recv(struct firedtv *fdtv, void *data, size_t length);
 int avc_tuner_status(struct firedtv *fdtv, struct firedtv_tuner_status *stat);
@@ -158,25 +140,18 @@ void fdtv_ca_release(struct firedtv *fdtv);
 /* firedtv-dvb.c */
 int fdtv_start_feed(struct dvb_demux_feed *dvbdmxfeed);
 int fdtv_stop_feed(struct dvb_demux_feed *dvbdmxfeed);
-int fdtv_dvb_register(struct firedtv *fdtv);
+int fdtv_dvb_register(struct firedtv *fdtv, const char *name);
 void fdtv_dvb_unregister(struct firedtv *fdtv);
-struct firedtv *fdtv_alloc(struct device *dev,
-                           const struct firedtv_backend *backend,
-                           const char *name, size_t name_len);
-extern const char *fdtv_model_names[];
-extern const struct ieee1394_device_id fdtv_id_table[];
 
 /* firedtv-fe.c */
-void fdtv_frontend_init(struct firedtv *fdtv);
+void fdtv_frontend_init(struct firedtv *fdtv, const char *name);
 
 /* firedtv-fw.c */
-#ifdef CONFIG_DVB_FIREDTV_FIREWIRE
-int fdtv_fw_init(void);
-void fdtv_fw_exit(void);
-#else
-static inline int fdtv_fw_init(void) { return 0; }
-static inline void fdtv_fw_exit(void) {}
-#endif
+int fdtv_lock(struct firedtv *fdtv, u64 addr, void *data);
+int fdtv_read(struct firedtv *fdtv, u64 addr, void *data);
+int fdtv_write(struct firedtv *fdtv, u64 addr, void *data, size_t len);
+int fdtv_start_iso(struct firedtv *fdtv);
+void fdtv_stop_iso(struct firedtv *fdtv);
 
 /* firedtv-rc.c */
 #ifdef CONFIG_DVB_FIREDTV_INPUT
diff --git a/drivers/media/dvb/frontends/Kconfig b/drivers/media/dvb/frontends/Kconfig
index b5f6a04f9c12..44b816f2601e 100644
--- a/drivers/media/dvb/frontends/Kconfig
+++ b/drivers/media/dvb/frontends/Kconfig
@@ -1,7 +1,7 @@
 config DVB_FE_CUSTOMISE
         bool "Customise the frontend modules to build"
         depends on DVB_CORE
-        default y if EMBEDDED
+        default y if EXPERT
         help
           This allows the user to select/deselect frontend drivers for their
           hardware from the build.
@@ -12,9 +12,8 @@ config DVB_FE_CUSTOMISE
 
           If unsure say N.
 
-if DVB_FE_CUSTOMISE
-
 menu "Customise DVB Frontends"
+        visible if DVB_FE_CUSTOMISE
 
 comment "Multistandard (satellite) frontends"
         depends on DVB_CORE
@@ -257,18 +256,23 @@ config DVB_CX22702
         help
           A DVB-T tuner module. Say Y when you want to support this frontend.
 
-config DVB_DRX397XD
-        tristate "Micronas DRX3975D/DRX3977D based"
+config DVB_S5H1432
+        tristate "Samsung s5h1432 demodulator (OFDM)"
         depends on DVB_CORE && I2C
         default m if DVB_FE_CUSTOMISE
         help
           A DVB-T tuner module. Say Y when you want to support this frontend.
 
-          TODO:
-          This driver needs external firmware. Please use the command
-          "<kerneldir>/Documentation/dvb/get_dvb_firmware drx397xD" to
-          download/extract them, and then copy them to /usr/lib/hotplug/firmware
-          or /lib/firmware (depending on configuration of firmware hotplug).
+config DVB_DRXD
+        tristate "Micronas DRXD driver"
+        depends on DVB_CORE && I2C
+        default m if DVB_FE_CUSTOMISE
+        help
+          A DVB-T tuner module. Say Y when you want to support this frontend.
+
+          Note: this driver was based on vendor driver reference code (released
+          under the GPL) as opposed to the existing drx397xd driver, which
+          was written via reverse engineering.
 
 config DVB_L64781
         tristate "LSI L64781"
@@ -343,6 +347,14 @@ config DVB_DIB7000P
           A DVB-T tuner module. Designed for mobile usage. Say Y when you want
           to support this frontend.
 
+config DVB_DIB9000
+        tristate "DiBcom 9000"
+        depends on DVB_CORE && I2C
+        default m if DVB_FE_CUSTOMISE
+        help
+          A DVB-T tuner module. Designed for mobile usage. Say Y when you want
+          to support this frontend.
+
 config DVB_TDA10048
         tristate "Philips TDA10048HN based"
         depends on DVB_CORE && I2C
@@ -364,6 +376,20 @@ config DVB_EC100
         help
           Say Y when you want to support this frontend.
 
+config DVB_STV0367
+        tristate "ST STV0367 based"
+        depends on DVB_CORE && I2C
+        default m if DVB_FE_CUSTOMISE
+        help
+          A DVB-T/C tuner module. Say Y when you want to support this frontend.
+
+config DVB_CXD2820R
+        tristate "Sony CXD2820R"
+        depends on DVB_CORE && I2C
+        default m if DVB_FE_CUSTOMISE
+        help
+          Say Y when you want to support this frontend.
+
 comment "DVB-C (cable) frontends"
         depends on DVB_CORE
 
@@ -455,16 +481,8 @@ config DVB_LGDT330X
           An ATSC 8VSB and QAM64/256 tuner module. Say Y when you want
           to support this frontend.
 
-config DVB_LGDT3304
-        tristate "LG Electronics LGDT3304"
-        depends on DVB_CORE && I2C
-        default m if DVB_FE_CUSTOMISE
-        help
-          An ATSC 8VSB and QAM64/256 tuner module. Say Y when you want
-          to support this frontend.
-
 config DVB_LGDT3305
-        tristate "LG Electronics LGDT3305 based"
+        tristate "LG Electronics LGDT3304 and LGDT3305 based"
         depends on DVB_CORE && I2C
         default m if DVB_FE_CUSTOMISE
         help
@@ -499,7 +517,7 @@ comment "ISDB-T (terrestrial) frontends"
         depends on DVB_CORE
 
 config DVB_S921
-        tristate "Sharp S921 tuner"
+        tristate "Sharp S921 frontend"
         depends on DVB_CORE && I2C
         default m if DVB_FE_CUSTOMISE
         help
@@ -514,6 +532,14 @@ config DVB_DIB8000
           A driver for DiBcom's DiB8000 ISDB-T/ISDB-Tsb demodulator.
           Say Y when you want to support this frontend.
 
+config DVB_MB86A20S
+        tristate "Fujitsu mb86a20s"
+        depends on DVB_CORE && I2C
+        default m if DVB_FE_CUSTOMISE
+        help
+          A driver for Fujitsu mb86a20s ISDB-T/ISDB-Tsb demodulator.
+          Say Y when you want to support this frontend.
+
 comment "Digital terrestrial only tuners/PLL"
         depends on DVB_CORE
 
@@ -607,11 +633,16 @@ config DVB_TDA665x
           Currently supported tuners:
           * Panasonic ENV57H12D5 (ET-50DT)
 
+config DVB_IX2505V
+        tristate "Sharp IX2505V silicon tuner"
+        depends on DVB_CORE && I2C
+        default m if DVB_FE_CUSTOMISE
+        help
+          A DVB-S tuner module. Say Y when you want to support this frontend.
+
 comment "Tools to develop new frontends"
 
 config DVB_DUMMY_FE
         tristate "Dummy frontend driver"
         default n
 endmenu
-
-endif
diff --git a/drivers/media/dvb/frontends/Makefile b/drivers/media/dvb/frontends/Makefile
index 874e8ada4d1d..2f3a6f736d64 100644
--- a/drivers/media/dvb/frontends/Makefile
+++ b/drivers/media/dvb/frontends/Makefile
@@ -5,10 +5,11 @@
 EXTRA_CFLAGS += -Idrivers/media/dvb/dvb-core/
 EXTRA_CFLAGS += -Idrivers/media/common/tuners/
 
-s921-objs := s921_module.o s921_core.o
 stb0899-objs = stb0899_drv.o stb0899_algo.o
 stv0900-objs = stv0900_core.o stv0900_sw.o
 au8522-objs = au8522_dig.o au8522_decoder.o
+drxd-objs = drxd_firm.o drxd_hard.o
+cxd2820r-objs = cxd2820r_core.o cxd2820r_c.o cxd2820r_t.o cxd2820r_t2.o
 
 obj-$(CONFIG_DVB_PLL) += dvb-pll.o
 obj-$(CONFIG_DVB_STV0299) += stv0299.o
@@ -16,6 +17,7 @@ obj-$(CONFIG_DVB_STB0899) += stb0899.o
 obj-$(CONFIG_DVB_STB6100) += stb6100.o
 obj-$(CONFIG_DVB_SP8870) += sp8870.o
 obj-$(CONFIG_DVB_CX22700) += cx22700.o
+obj-$(CONFIG_DVB_S5H1432) += s5h1432.o
 obj-$(CONFIG_DVB_CX24110) += cx24110.o
 obj-$(CONFIG_DVB_TDA8083) += tda8083.o
 obj-$(CONFIG_DVB_L64781) += l64781.o
@@ -24,6 +26,7 @@ obj-$(CONFIG_DVB_DIB3000MC) += dib3000mc.o dibx000_common.o
 obj-$(CONFIG_DVB_DIB7000M) += dib7000m.o dibx000_common.o
 obj-$(CONFIG_DVB_DIB7000P) += dib7000p.o dibx000_common.o
 obj-$(CONFIG_DVB_DIB8000) += dib8000.o dibx000_common.o
+obj-$(CONFIG_DVB_DIB9000) += dib9000.o dibx000_common.o
 obj-$(CONFIG_DVB_MT312) += mt312.o
 obj-$(CONFIG_DVB_VES1820) += ves1820.o
 obj-$(CONFIG_DVB_VES1X93) += ves1x93.o
@@ -35,7 +38,7 @@ obj-$(CONFIG_DVB_ZL10036) += zl10036.o
 obj-$(CONFIG_DVB_ZL10039) += zl10039.o
 obj-$(CONFIG_DVB_ZL10353) += zl10353.o
 obj-$(CONFIG_DVB_CX22702) += cx22702.o
-obj-$(CONFIG_DVB_DRX397XD) += drx397xD.o
+obj-$(CONFIG_DVB_DRXD) += drxd.o
 obj-$(CONFIG_DVB_TDA10021) += tda10021.o
 obj-$(CONFIG_DVB_TDA10023) += tda10023.o
 obj-$(CONFIG_DVB_STV0297) += stv0297.o
@@ -45,7 +48,6 @@ obj-$(CONFIG_DVB_OR51132) += or51132.o
 obj-$(CONFIG_DVB_BCM3510) += bcm3510.o
 obj-$(CONFIG_DVB_S5H1420) += s5h1420.o
 obj-$(CONFIG_DVB_LGDT330X) += lgdt330x.o
-obj-$(CONFIG_DVB_LGDT3304) += lgdt3304.o
 obj-$(CONFIG_DVB_LGDT3305) += lgdt3305.o
 obj-$(CONFIG_DVB_CX24123) += cx24123.o
 obj-$(CONFIG_DVB_LNBP21) += lnbp21.o
@@ -82,3 +84,8 @@ obj-$(CONFIG_DVB_ISL6423) += isl6423.o
 obj-$(CONFIG_DVB_EC100) += ec100.o
 obj-$(CONFIG_DVB_DS3000) += ds3000.o
 obj-$(CONFIG_DVB_MB86A16) += mb86a16.o
+obj-$(CONFIG_DVB_MB86A20S) += mb86a20s.o
+obj-$(CONFIG_DVB_IX2505V) += ix2505v.o
+obj-$(CONFIG_DVB_STV0367) += stv0367.o
+obj-$(CONFIG_DVB_CXD2820R) += cxd2820r.o
+
diff --git a/drivers/media/dvb/frontends/af9013.c b/drivers/media/dvb/frontends/af9013.c
index dac917f7bb7f..345311c33383 100644
--- a/drivers/media/dvb/frontends/af9013.c
+++ b/drivers/media/dvb/frontends/af9013.c
@@ -42,6 +42,8 @@ struct af9013_state {
 
         struct af9013_config config;
 
+        /* tuner/demod RF and IF AGC limits used for signal strength calc */
+        u8 signal_strength_en, rf_50, rf_80, if_50, if_80;
         u16 signal_strength;
         u32 ber;
         u32 ucblocks;
@@ -220,184 +222,37 @@ static u32 af913_div(u32 a, u32 b, u32 x)
 
 static int af9013_set_coeff(struct af9013_state *state, fe_bandwidth_t bw)
 {
-        int ret = 0;
-        u8 i = 0;
-        u8 buf[24];
-        u32 uninitialized_var(ns_coeff1_2048nu);
-        u32 uninitialized_var(ns_coeff1_8191nu);
-        u32 uninitialized_var(ns_coeff1_8192nu);
-        u32 uninitialized_var(ns_coeff1_8193nu);
-        u32 uninitialized_var(ns_coeff2_2k);
-        u32 uninitialized_var(ns_coeff2_8k);
-
+        int ret, i, j, found;
         deb_info("%s: adc_clock:%d bw:%d\n", __func__,
                 state->config.adc_clock, bw);
 
-        switch (state->config.adc_clock) {
-        case 28800: /* 28.800 MHz */
-                switch (bw) {
-                case BANDWIDTH_6_MHZ:
-                        ns_coeff1_2048nu = 0x01e79e7a;
-                        ns_coeff1_8191nu = 0x0079eb6e;
-                        ns_coeff1_8192nu = 0x0079e79e;
-                        ns_coeff1_8193nu = 0x0079e3cf;
-                        ns_coeff2_2k     = 0x00f3cf3d;
-                        ns_coeff2_8k     = 0x003cf3cf;
-                        break;
-                case BANDWIDTH_7_MHZ:
-                        ns_coeff1_2048nu = 0x0238e38e;
-                        ns_coeff1_8191nu = 0x008e3d55;
-                        ns_coeff1_8192nu = 0x008e38e4;
-                        ns_coeff1_8193nu = 0x008e3472;
-                        ns_coeff2_2k     = 0x011c71c7;
-                        ns_coeff2_8k     = 0x00471c72;
-                        break;
-                case BANDWIDTH_8_MHZ:
-                        ns_coeff1_2048nu = 0x028a28a3;
-                        ns_coeff1_8191nu = 0x00a28f3d;
-                        ns_coeff1_8192nu = 0x00a28a29;
-                        ns_coeff1_8193nu = 0x00a28514;
-                        ns_coeff2_2k     = 0x01451451;
-                        ns_coeff2_8k     = 0x00514514;
-                        break;
-                default:
-                        ret = -EINVAL;
-                }
-                break;
-        case 20480: /* 20.480 MHz */
-                switch (bw) {
-                case BANDWIDTH_6_MHZ:
-                        ns_coeff1_2048nu = 0x02adb6dc;
-                        ns_coeff1_8191nu = 0x00ab7313;
-                        ns_coeff1_8192nu = 0x00ab6db7;
-                        ns_coeff1_8193nu = 0x00ab685c;
-                        ns_coeff2_2k     = 0x0156db6e;
-                        ns_coeff2_8k     = 0x0055b6dc;
+        /* lookup coeff from table */
+        for (i = 0, found = 0; i < ARRAY_SIZE(coeff_table); i++) {
+                if (coeff_table[i].adc_clock == state->config.adc_clock &&
+                        coeff_table[i].bw == bw) {
+                        found = 1;
                         break;
-                case BANDWIDTH_7_MHZ:
-                        ns_coeff1_2048nu = 0x03200001;
-                        ns_coeff1_8191nu = 0x00c80640;
-                        ns_coeff1_8192nu = 0x00c80000;
-                        ns_coeff1_8193nu = 0x00c7f9c0;
-                        ns_coeff2_2k     = 0x01900000;
-                        ns_coeff2_8k     = 0x00640000;
-                        break;
-                case BANDWIDTH_8_MHZ:
-                        ns_coeff1_2048nu = 0x03924926;
-                        ns_coeff1_8191nu = 0x00e4996e;
-                        ns_coeff1_8192nu = 0x00e49249;
-                        ns_coeff1_8193nu = 0x00e48b25;
-                        ns_coeff2_2k     = 0x01c92493;
-                        ns_coeff2_8k     = 0x00724925;
-                        break;
-                default:
-                        ret = -EINVAL;
                 }
-                break;
-        case 28000: /* 28.000 MHz */
-                switch (bw) {
-                case BANDWIDTH_6_MHZ:
-                        ns_coeff1_2048nu = 0x01f58d10;
-                        ns_coeff1_8191nu = 0x007d672f;
-                        ns_coeff1_8192nu = 0x007d6344;
-                        ns_coeff1_8193nu = 0x007d5f59;
-                        ns_coeff2_2k     = 0x00fac688;
-                        ns_coeff2_8k     = 0x003eb1a2;
-                        break;
-                case BANDWIDTH_7_MHZ:
-                        ns_coeff1_2048nu = 0x02492492;
-                        ns_coeff1_8191nu = 0x00924db7;
-                        ns_coeff1_8192nu = 0x00924925;
-                        ns_coeff1_8193nu = 0x00924492;
-                        ns_coeff2_2k     = 0x01249249;
-                        ns_coeff2_8k     = 0x00492492;
-                        break;
-                case BANDWIDTH_8_MHZ:
-                        ns_coeff1_2048nu = 0x029cbc15;
-                        ns_coeff1_8191nu = 0x00a7343f;
-                        ns_coeff1_8192nu = 0x00a72f05;
-                        ns_coeff1_8193nu = 0x00a729cc;
-                        ns_coeff2_2k     = 0x014e5e0a;
-                        ns_coeff2_8k     = 0x00539783;
-                        break;
-                default:
-                        ret = -EINVAL;
-                }
-                break;
-        case 25000: /* 25.000 MHz */
-                switch (bw) {
-                case BANDWIDTH_6_MHZ:
-                        ns_coeff1_2048nu = 0x0231bcb5;
-                        ns_coeff1_8191nu = 0x008c7391;
-                        ns_coeff1_8192nu = 0x008c6f2d;
-                        ns_coeff1_8193nu = 0x008c6aca;
-                        ns_coeff2_2k     = 0x0118de5b;
-                        ns_coeff2_8k     = 0x00463797;
-                        break;
-                case BANDWIDTH_7_MHZ:
-                        ns_coeff1_2048nu = 0x028f5c29;
-                        ns_coeff1_8191nu = 0x00a3dc29;
-                        ns_coeff1_8192nu = 0x00a3d70a;
-                        ns_coeff1_8193nu = 0x00a3d1ec;
-                        ns_coeff2_2k     = 0x0147ae14;
-                        ns_coeff2_8k     = 0x0051eb85;
-                        break;
-                case BANDWIDTH_8_MHZ:
-                        ns_coeff1_2048nu = 0x02ecfb9d;
-                        ns_coeff1_8191nu = 0x00bb44c1;
-                        ns_coeff1_8192nu = 0x00bb3ee7;
-                        ns_coeff1_8193nu = 0x00bb390d;
-                        ns_coeff2_2k     = 0x01767dce;
-                        ns_coeff2_8k     = 0x005d9f74;
-                        break;
-                default:
-                        ret = -EINVAL;
-                }
-                break;
-        default:
-                err("invalid xtal");
-                return -EINVAL;
         }
-        if (ret) {
-                err("invalid bandwidth");
-                return ret;
+
+        if (!found) {
+                err("invalid bw or clock");
+                ret = -EINVAL;
+                goto error;
         }
 
-        buf[i++] = (u8) ((ns_coeff1_2048nu & 0x03000000) >> 24);
-        buf[i++] = (u8) ((ns_coeff1_2048nu & 0x00ff0000) >> 16);
-        buf[i++] = (u8) ((ns_coeff1_2048nu & 0x0000ff00) >> 8);
-        buf[i++] = (u8) ((ns_coeff1_2048nu & 0x000000ff));
-        buf[i++] = (u8) ((ns_coeff2_2k     & 0x01c00000) >> 22);
-        buf[i++] = (u8) ((ns_coeff2_2k     & 0x003fc000) >> 14);
-        buf[i++] = (u8) ((ns_coeff2_2k     & 0x00003fc0) >> 6);
-        buf[i++] = (u8) ((ns_coeff2_2k     & 0x0000003f));
-        buf[i++] = (u8) ((ns_coeff1_8191nu & 0x03000000) >> 24);
-        buf[i++] = (u8) ((ns_coeff1_8191nu & 0x00ffc000) >> 16);
-        buf[i++] = (u8) ((ns_coeff1_8191nu & 0x0000ff00) >> 8);
-        buf[i++] = (u8) ((ns_coeff1_8191nu & 0x000000ff));
-        buf[i++] = (u8) ((ns_coeff1_8192nu & 0x03000000) >> 24);
-        buf[i++] = (u8) ((ns_coeff1_8192nu & 0x00ffc000) >> 16);
-        buf[i++] = (u8) ((ns_coeff1_8192nu & 0x0000ff00) >> 8);
-        buf[i++] = (u8) ((ns_coeff1_8192nu & 0x000000ff));
-        buf[i++] = (u8) ((ns_coeff1_8193nu & 0x03000000) >> 24);
-        buf[i++] = (u8) ((ns_coeff1_8193nu & 0x00ffc000) >> 16);
-        buf[i++] = (u8) ((ns_coeff1_8193nu & 0x0000ff00) >> 8);
-        buf[i++] = (u8) ((ns_coeff1_8193nu & 0x000000ff));
-        buf[i++] = (u8) ((ns_coeff2_8k     & 0x01c00000) >> 22);
-        buf[i++] = (u8) ((ns_coeff2_8k     & 0x003fc000) >> 14);
-        buf[i++] = (u8) ((ns_coeff2_8k     & 0x00003fc0) >> 6);
-        buf[i++] = (u8) ((ns_coeff2_8k     & 0x0000003f));
-
-        deb_info("%s: coeff:", __func__);
-        debug_dump(buf, sizeof(buf), deb_info);
+        deb_info("%s: coeff: ", __func__);
+        debug_dump(coeff_table[i].val, sizeof(coeff_table[i].val), deb_info);
 
         /* program */
-        for (i = 0; i < sizeof(buf); i++) {
-                ret = af9013_write_reg(state, 0xae00 + i, buf[i]);
+        for (j = 0; j < sizeof(coeff_table[i].val); j++) {
+                ret = af9013_write_reg(state, 0xae00 + j,
+                        coeff_table[i].val[j]);
                 if (ret)
                         break;
         }
 
+error:
         return ret;
 }
 
@@ -479,11 +334,24 @@ static int af9013_set_freq_ctrl(struct af9013_state *state, fe_bandwidth_t bw)
                                 if_sample_freq = 3300000; /* 3.3 MHz */
                                 break;
                         case BANDWIDTH_7_MHZ:
-                                if_sample_freq = 3800000; /* 3.8 MHz */
+                                if_sample_freq = 3500000; /* 3.5 MHz */
                                 break;
                         case BANDWIDTH_8_MHZ:
                         default:
-                                if_sample_freq = 4300000; /* 4.3 MHz */
+                                if_sample_freq = 4000000; /* 4.0 MHz */
+                                break;
+                        }
+                } else if (state->config.tuner == AF9013_TUNER_TDA18218) {
+                        switch (bw) {
+                        case BANDWIDTH_6_MHZ:
+                                if_sample_freq = 3000000; /* 3 MHz */
+                                break;
+                        case BANDWIDTH_7_MHZ:
+                                if_sample_freq = 3500000; /* 3.5 MHz */
+                                break;
+                        case BANDWIDTH_8_MHZ:
+                        default:
+                                if_sample_freq = 4000000; /* 4 MHz */
                                 break;
                         }
                 }
@@ -1096,46 +964,32 @@ error:
 static int af9013_update_signal_strength(struct dvb_frontend *fe)
 {
         struct af9013_state *state = fe->demodulator_priv;
-        int ret;
-        u8 tmp0;
-        u8 rf_gain, rf_50, rf_80, if_gain, if_50, if_80;
+        int ret = 0;
+        u8 rf_gain, if_gain;
         int signal_strength;
 
         deb_info("%s\n", __func__);
 
-        state->signal_strength = 0;
-
-        ret = af9013_read_reg_bits(state, 0x9bee, 0, 1, &tmp0);
-        if (ret)
-                goto error;
-        if (tmp0) {
-                ret = af9013_read_reg(state, 0x9bbd, &rf_50);
-                if (ret)
-                        goto error;
-                ret = af9013_read_reg(state, 0x9bd0, &rf_80);
-                if (ret)
-                        goto error;
-                ret = af9013_read_reg(state, 0x9be2, &if_50);
-                if (ret)
-                        goto error;
-                ret = af9013_read_reg(state, 0x9be4, &if_80);
-                if (ret)
-                        goto error;
+        if (state->signal_strength_en) {
                 ret = af9013_read_reg(state, 0xd07c, &rf_gain);
                 if (ret)
                         goto error;
                 ret = af9013_read_reg(state, 0xd07d, &if_gain);
                 if (ret)
                         goto error;
-                signal_strength = (0xffff / (9 * (rf_50 + if_50) - \
-                        11 * (rf_80 + if_80))) * (10 * (rf_gain + if_gain) - \
-                        11 * (rf_80 + if_80));
+                signal_strength = (0xffff / \
+                        (9 * (state->rf_50 + state->if_50) - \
+                        11 * (state->rf_80 + state->if_80))) * \
+                        (10 * (rf_gain + if_gain) - \
+                        11 * (state->rf_80 + state->if_80));
                 if (signal_strength < 0)
                         signal_strength = 0;
                 else if (signal_strength > 0xffff)
                         signal_strength = 0xffff;
 
                 state->signal_strength = signal_strength;
+        } else {
+                state->signal_strength = 0;
         }
 
 error:
@@ -1368,6 +1222,7 @@ static int af9013_init(struct dvb_frontend *fe)
                 break;
         case AF9013_TUNER_MXL5005D:
         case AF9013_TUNER_MXL5005R:
+        case AF9013_TUNER_MXL5007T:
                 len = ARRAY_SIZE(tuner_init_mxl5005);
                 init = tuner_init_mxl5005;
                 break;
@@ -1393,6 +1248,7 @@ static int af9013_init(struct dvb_frontend *fe)
                 init = tuner_init_mt2060_2;
                 break;
         case AF9013_TUNER_TDA18271:
+        case AF9013_TUNER_TDA18218:
                 len = ARRAY_SIZE(tuner_init_tda18271);
                 init = tuner_init_tda18271;
                 break;
@@ -1438,6 +1294,27 @@ static int af9013_init(struct dvb_frontend *fe)
         if (ret)
                 goto error;
 
+        /* read values needed for signal strength calculation */
+        ret = af9013_read_reg_bits(state, 0x9bee, 0, 1,
+                &state->signal_strength_en);
+        if (ret)
+                goto error;
+
+        if (state->signal_strength_en) {
+                ret = af9013_read_reg(state, 0x9bbd, &state->rf_50);
+                if (ret)
+                        goto error;
+                ret = af9013_read_reg(state, 0x9bd0, &state->rf_80);
+                if (ret)
+                        goto error;
+                ret = af9013_read_reg(state, 0x9be2, &state->if_50);
+                if (ret)
+                        goto error;
+                ret = af9013_read_reg(state, 0x9be4, &state->if_80);
+                if (ret)
+                        goto error;
+        }
+
 error:
         return ret;
 }
@@ -1446,13 +1323,11 @@ static struct dvb_frontend_ops af9013_ops;
 
 static int af9013_download_firmware(struct af9013_state *state)
 {
-        int i, len, packets, remainder, ret;
+        int i, len, remaining, ret;
         const struct firmware *fw;
-        u16 addr = 0x5100; /* firmware start address */
         u16 checksum = 0;
         u8 val;
         u8 fw_params[4];
-        u8 *data;
         u8 *fw_file = AF9013_DEFAULT_FIRMWARE;
 
         msleep(100);
@@ -1496,21 +1371,18 @@ static int af9013_download_firmware(struct af9013_state *state)
         if (ret)
                 goto error_release;
 
-        #define FW_PACKET_MAX_DATA  16
-
-        packets = fw->size / FW_PACKET_MAX_DATA;
-        remainder = fw->size % FW_PACKET_MAX_DATA;
-        len = FW_PACKET_MAX_DATA;
-        for (i = 0; i <= packets; i++) {
-                if (i == packets)  /* set size of the last packet */
-                        len = remainder;
-
-                data = (u8 *)(fw->data + i * FW_PACKET_MAX_DATA);
-                ret = af9013_write_ofsm_regs(state, addr, data, len);
-                addr += FW_PACKET_MAX_DATA;
+        #define FW_ADDR 0x5100 /* firmware start address */
+        #define LEN_MAX 16 /* max packet size */
+        for (remaining = fw->size; remaining > 0; remaining -= LEN_MAX) {
+                len = remaining;
+                if (len > LEN_MAX)
+                        len = LEN_MAX;
 
+                ret = af9013_write_ofsm_regs(state,
+                        FW_ADDR + fw->size - remaining,
+                        (u8 *) &fw->data[fw->size - remaining], len);
                 if (ret) {
-                        err("firmware download failed at %d with %d", i, ret);
+                        err("firmware download failed:%d", ret);
                         goto error_release;
                 }
         }
@@ -1589,20 +1461,6 @@ struct dvb_frontend *af9013_attach(const struct af9013_config *config,
         state->i2c = i2c;
         memcpy(&state->config, config, sizeof(struct af9013_config));
 
-        /* chip version */
-        ret = af9013_read_reg_bits(state, 0xd733, 4, 4, &buf[2]);
-        if (ret)
-                goto error;
-
-        /* ROM version */
-        for (i = 0; i < 2; i++) {
-                ret = af9013_read_reg(state, 0x116b + i, &buf[i]);
-                if (ret)
-                        goto error;
-        }
-        deb_info("%s: chip version:%d ROM version:%d.%d\n", __func__,
-                buf[2], buf[0], buf[1]);
-
         /* download firmware */
         if (state->config.output_mode != AF9013_OUTPUT_MODE_USB) {
                 ret = af9013_download_firmware(state);
@@ -1618,6 +1476,20 @@ struct dvb_frontend *af9013_attach(const struct af9013_config *config,
         }
         info("firmware version:%d.%d.%d.%d", buf[0], buf[1], buf[2], buf[3]);
 
+        /* chip version */
+        ret = af9013_read_reg_bits(state, 0xd733, 4, 4, &buf[2]);
+        if (ret)
+                goto error;
+
+        /* ROM version */
+        for (i = 0; i < 2; i++) {
+                ret = af9013_read_reg(state, 0x116b + i, &buf[i]);
+                if (ret)
+                        goto error;
+        }
+        deb_info("%s: chip version:%d ROM version:%d.%d\n", __func__,
+                buf[2], buf[0], buf[1]);
+
         /* settings for mp2if */
         if (state->config.output_mode == AF9013_OUTPUT_MODE_USB) {
                 /* AF9015 split PSB to 1.5k + 0.5k */
diff --git a/drivers/media/dvb/frontends/af9013.h b/drivers/media/dvb/frontends/af9013.h
index 72c71bb5d117..e53d873f7555 100644
--- a/drivers/media/dvb/frontends/af9013.h
+++ b/drivers/media/dvb/frontends/af9013.h
@@ -44,6 +44,7 @@ enum af9013_tuner {
         AF9013_TUNER_MT2060_2   = 147, /* Microtune */
         AF9013_TUNER_TDA18271   = 156, /* NXP */
         AF9013_TUNER_QT1010A    = 162, /* Quantek */
+        AF9013_TUNER_MXL5007T   = 177, /* MaxLinear */
         AF9013_TUNER_TDA18218   = 179, /* NXP */
 };
 
diff --git a/drivers/media/dvb/frontends/af9013_priv.h b/drivers/media/dvb/frontends/af9013_priv.h
index 0fd42b7e248e..e00b2a4a2db6 100644
--- a/drivers/media/dvb/frontends/af9013_priv.h
+++ b/drivers/media/dvb/frontends/af9013_priv.h
@@ -60,6 +60,56 @@ struct snr_table {
         u8 snr;
 };
 
+struct coeff {
+        u32 adc_clock;
+        fe_bandwidth_t bw;
+        u8 val[24];
+};
+
+/* pre-calculated coeff lookup table */
+static struct coeff coeff_table[] = {
+        /* 28.800 MHz */
+        { 28800, BANDWIDTH_8_MHZ, { 0x02, 0x8a, 0x28, 0xa3, 0x05, 0x14,
+                0x51, 0x11, 0x00, 0xa2, 0x8f, 0x3d, 0x00, 0xa2, 0x8a,
+                0x29, 0x00, 0xa2, 0x85, 0x14, 0x01, 0x45, 0x14, 0x14 } },
+        { 28800, BANDWIDTH_7_MHZ, { 0x02, 0x38, 0xe3, 0x8e, 0x04, 0x71,
+                0xc7, 0x07, 0x00, 0x8e, 0x3d, 0x55, 0x00, 0x8e, 0x38,
+                0xe4, 0x00, 0x8e, 0x34, 0x72, 0x01, 0x1c, 0x71, 0x32 } },
+        { 28800, BANDWIDTH_6_MHZ, { 0x01, 0xe7, 0x9e, 0x7a, 0x03, 0xcf,
+                0x3c, 0x3d, 0x00, 0x79, 0xeb, 0x6e, 0x00, 0x79, 0xe7,
+                0x9e, 0x00, 0x79, 0xe3, 0xcf, 0x00, 0xf3, 0xcf, 0x0f } },
+        /* 20.480 MHz */
+        { 20480, BANDWIDTH_8_MHZ, { 0x03, 0x92, 0x49, 0x26, 0x07, 0x24,
+                0x92, 0x13, 0x00, 0xe4, 0x99, 0x6e, 0x00, 0xe4, 0x92,
+                0x49, 0x00, 0xe4, 0x8b, 0x25, 0x01, 0xc9, 0x24, 0x25 } },
+        { 20480, BANDWIDTH_7_MHZ, { 0x03, 0x20, 0x00, 0x01, 0x06, 0x40,
+                0x00, 0x00, 0x00, 0xc8, 0x06, 0x40, 0x00, 0xc8, 0x00,
+                0x00, 0x00, 0xc7, 0xf9, 0xc0, 0x01, 0x90, 0x00, 0x00 } },
+        { 20480, BANDWIDTH_6_MHZ, { 0x02, 0xad, 0xb6, 0xdc, 0x05, 0x5b,
+                0x6d, 0x2e, 0x00, 0xab, 0x73, 0x13, 0x00, 0xab, 0x6d,
+                0xb7, 0x00, 0xab, 0x68, 0x5c, 0x01, 0x56, 0xdb, 0x1c } },
+        /* 28.000 MHz */
+        { 28000, BANDWIDTH_8_MHZ, { 0x02, 0x9c, 0xbc, 0x15, 0x05, 0x39,
+                0x78, 0x0a, 0x00, 0xa7, 0x34, 0x3f, 0x00, 0xa7, 0x2f,
+                0x05, 0x00, 0xa7, 0x29, 0xcc, 0x01, 0x4e, 0x5e, 0x03 } },
+        { 28000, BANDWIDTH_7_MHZ, { 0x02, 0x49, 0x24, 0x92, 0x04, 0x92,
+                0x49, 0x09, 0x00, 0x92, 0x4d, 0xb7, 0x00, 0x92, 0x49,
+                0x25, 0x00, 0x92, 0x44, 0x92, 0x01, 0x24, 0x92, 0x12 } },
+        { 28000, BANDWIDTH_6_MHZ, { 0x01, 0xf5, 0x8d, 0x10, 0x03, 0xeb,
+                0x1a, 0x08, 0x00, 0x7d, 0x67, 0x2f, 0x00, 0x7d, 0x63,
+                0x44, 0x00, 0x7d, 0x5f, 0x59, 0x00, 0xfa, 0xc6, 0x22 } },
+        /* 25.000 MHz */
+        { 25000, BANDWIDTH_8_MHZ, { 0x02, 0xec, 0xfb, 0x9d, 0x05, 0xd9,
+                0xf7, 0x0e, 0x00, 0xbb, 0x44, 0xc1, 0x00, 0xbb, 0x3e,
+                0xe7, 0x00, 0xbb, 0x39, 0x0d, 0x01, 0x76, 0x7d, 0x34 } },
+        { 25000, BANDWIDTH_7_MHZ, { 0x02, 0x8f, 0x5c, 0x29, 0x05, 0x1e,
+                0xb8, 0x14, 0x00, 0xa3, 0xdc, 0x29, 0x00, 0xa3, 0xd7,
+                0x0a, 0x00, 0xa3, 0xd1, 0xec, 0x01, 0x47, 0xae, 0x05 } },
+        { 25000, BANDWIDTH_6_MHZ, { 0x02, 0x31, 0xbc, 0xb5, 0x04, 0x63,
+                0x79, 0x1b, 0x00, 0x8c, 0x73, 0x91, 0x00, 0x8c, 0x6f,
+                0x2d, 0x00, 0x8c, 0x6a, 0xca, 0x01, 0x18, 0xde, 0x17 } },
+};
+
 /* QPSK SNR lookup table */
 static struct snr_table qpsk_snr_table[] = {
         { 0x0b4771,  0 },
@@ -480,9 +530,10 @@ static struct regdesc tuner_init_mxl5003d[] = {
         { 0x9bd9, 0, 8, 0x08 },
 };
 
-/* MaxLinear MXL5005 tuner init
+/* MaxLinear MXL5005S & MXL5007T tuner init
    AF9013_TUNER_MXL5005D   =  13
-   AF9013_TUNER_MXL5005R   =  30 */
+   AF9013_TUNER_MXL5005R   =  30
+   AF9013_TUNER_MXL5007T   = 177 */
 static struct regdesc tuner_init_mxl5005[] = {
         { 0x9bd5, 0, 8, 0x01 },
         { 0x9bd6, 0, 8, 0x07 },
@@ -791,8 +842,9 @@ static struct regdesc tuner_init_unknown[] = {
         { 0x9bd9, 0, 8, 0x08 },
 };
 
-/* NXP TDA18271 tuner init
-   AF9013_TUNER_TDA18271   = 156 */
+/* NXP TDA18271 & TDA18218 tuner init
+   AF9013_TUNER_TDA18271   = 156
+   AF9013_TUNER_TDA18218   = 179 */
 static struct regdesc tuner_init_tda18271[] = {
         { 0x9bd5, 0, 8, 0x01 },
         { 0x9bd6, 0, 8, 0x04 },
diff --git a/drivers/media/dvb/frontends/atbm8830.c b/drivers/media/dvb/frontends/atbm8830.c
index 43aac2f85c2e..1539ea1f81ac 100644
--- a/drivers/media/dvb/frontends/atbm8830.c
+++ b/drivers/media/dvb/frontends/atbm8830.c
@@ -50,8 +50,7 @@ static int atbm8830_write_reg(struct atbm_state *priv, u16 reg, u8 data)
         msg2.addr = dev_addr;
 
         if (debug >= 2)
-                printk(KERN_DEBUG "%s: reg=0x%04X, data=0x%02X\n",
-                        __func__, reg, data);
+                dprintk("%s: reg=0x%04X, data=0x%02X\n", __func__, reg, data);
 
         ret = i2c_transfer(priv->i2c, &msg1, 1);
         if (ret != 1)
@@ -77,8 +76,7 @@ static int atbm8830_read_reg(struct atbm_state *priv, u16 reg, u8 *p_data)
 
         ret = i2c_transfer(priv->i2c, &msg1, 1);
         if (ret != 1) {
-                dprintk(KERN_DEBUG "%s: error reg=0x%04x, ret=%i\n",
-                        __func__, reg, ret);
+                dprintk("%s: error reg=0x%04x, ret=%i\n", __func__, reg, ret);
                 return -EIO;
         }
 
@@ -88,7 +86,7 @@ static int atbm8830_read_reg(struct atbm_state *priv, u16 reg, u8 *p_data)
 
         *p_data = buf2[0];
         if (debug >= 2)
-                printk(KERN_DEBUG "%s: reg=0x%04X, data=0x%02X\n",
+                dprintk("%s: reg=0x%04X, data=0x%02X\n",
                         __func__, reg, buf2[0]);
 
         return 0;
diff --git a/drivers/media/dvb/frontends/atbm8830.h b/drivers/media/dvb/frontends/atbm8830.h
index e8149f393300..024273374bd8 100644
--- a/drivers/media/dvb/frontends/atbm8830.h
+++ b/drivers/media/dvb/frontends/atbm8830.h
@@ -39,7 +39,7 @@ struct atbm8830_config {
         /* parallel or serial transport stream */
         u8 serial_ts;
 
-        /* transport stream clock output only when receving valid stream */
+        /* transport stream clock output only when receiving valid stream */
         u8 ts_clk_gated;
 
         /* Decoder sample TS data at rising edge of clock */
diff --git a/drivers/media/dvb/frontends/au8522_decoder.c b/drivers/media/dvb/frontends/au8522_decoder.c
index 29cdbfe36852..b537891a4cc9 100644
--- a/drivers/media/dvb/frontends/au8522_decoder.c
+++ b/drivers/media/dvb/frontends/au8522_decoder.c
@@ -36,7 +36,6 @@
 #include <linux/delay.h>
 #include <media/v4l2-common.h>
 #include <media/v4l2-chip-ident.h>
-#include <media/v4l2-i2c-drv.h>
 #include <media/v4l2-device.h>
 #include "au8522.h"
 #include "au8522_priv.h"
@@ -279,10 +278,18 @@ static void setup_decoder_defaults(struct au8522_state *state, u8 input_mode)
                         AU8522_TVDEC_COMB_HDIF_THR2_REG06AH_CVBS);
         au8522_writereg(state, AU8522_TVDEC_COMB_HDIF_THR3_REG06BH,
                         AU8522_TVDEC_COMB_HDIF_THR3_REG06BH_CVBS);
-        au8522_writereg(state, AU8522_TVDEC_COMB_DCDIF_THR1_REG06CH,
-                        AU8522_TVDEC_COMB_DCDIF_THR1_REG06CH_CVBS);
-        au8522_writereg(state, AU8522_TVDEC_COMB_DCDIF_THR2_REG06DH,
-                        AU8522_TVDEC_COMB_DCDIF_THR2_REG06DH_CVBS);
+        if (input_mode == AU8522_INPUT_CONTROL_REG081H_SVIDEO_CH13 ||
+            input_mode == AU8522_INPUT_CONTROL_REG081H_SVIDEO_CH24) {
+                au8522_writereg(state, AU8522_TVDEC_COMB_DCDIF_THR1_REG06CH,
+                                AU8522_TVDEC_COMB_DCDIF_THR1_REG06CH_SVIDEO);
+                au8522_writereg(state, AU8522_TVDEC_COMB_DCDIF_THR2_REG06DH,
+                                AU8522_TVDEC_COMB_DCDIF_THR2_REG06DH_SVIDEO);
+        } else {
+                au8522_writereg(state, AU8522_TVDEC_COMB_DCDIF_THR1_REG06CH,
+                                AU8522_TVDEC_COMB_DCDIF_THR1_REG06CH_CVBS);
+                au8522_writereg(state, AU8522_TVDEC_COMB_DCDIF_THR2_REG06DH,
+                                AU8522_TVDEC_COMB_DCDIF_THR2_REG06DH_CVBS);
+        }
         au8522_writereg(state, AU8522_TVDEC_COMB_DCDIF_THR3_REG06EH,
                         AU8522_TVDEC_COMB_DCDIF_THR3_REG06EH_CVBS);
         au8522_writereg(state, AU8522_TVDEC_UV_SEP_THR_REG06FH,
@@ -348,9 +355,11 @@ static void au8522_setup_cvbs_mode(struct au8522_state *state)
         au8522_writereg(state, AU8522_MODULE_CLOCK_CONTROL_REG0A3H,
                         AU8522_MODULE_CLOCK_CONTROL_REG0A3H_CVBS);
 
+        /* PGA in automatic mode */
         au8522_writereg(state, AU8522_PGA_CONTROL_REG082H, 0x00);
-        au8522_writereg(state, AU8522_CLAMPING_CONTROL_REG083H, 0x0e);
-        au8522_writereg(state, AU8522_PGA_CONTROL_REG082H, 0x10);
+
+        /* Enable clamping control */
+        au8522_writereg(state, AU8522_CLAMPING_CONTROL_REG083H, 0x00);
 
         au8522_writereg(state, AU8522_INPUT_CONTROL_REG081H,
                         AU8522_INPUT_CONTROL_REG081H_CVBS_CH1);
@@ -367,14 +376,14 @@ static void au8522_setup_cvbs_tuner_mode(struct au8522_state *state)
         au8522_writereg(state, AU8522_MODULE_CLOCK_CONTROL_REG0A3H,
                         AU8522_MODULE_CLOCK_CONTROL_REG0A3H_CVBS);
 
-        /* It's not clear why they turn off the PGA before enabling the clamp
-           control, but the Windows trace does it so we will too... */
+        /* It's not clear why we have to have the PGA in automatic mode while
+           enabling clamp control, but it's what Windows does */
         au8522_writereg(state, AU8522_PGA_CONTROL_REG082H, 0x00);
 
         /* Enable clamping control */
         au8522_writereg(state, AU8522_CLAMPING_CONTROL_REG083H, 0x0e);
 
-        /* Turn on the PGA */
+        /* Disable automatic PGA (since the CVBS is coming from the tuner) */
         au8522_writereg(state, AU8522_PGA_CONTROL_REG082H, 0x10);
 
         /* Set input mode to CVBS on channel 4 with SIF audio input enabled */
@@ -397,7 +406,10 @@ static void au8522_setup_svideo_mode(struct au8522_state *state)
         au8522_writereg(state, AU8522_INPUT_CONTROL_REG081H,
                         AU8522_INPUT_CONTROL_REG081H_SVIDEO_CH13);
 
-        /* Disable clamping control (required for S-video) */
+        /* PGA in automatic mode */
+        au8522_writereg(state, AU8522_PGA_CONTROL_REG082H, 0x00);
+
+        /* Enable clamping control */
         au8522_writereg(state, AU8522_CLAMPING_CONTROL_REG083H, 0x00);
 
         setup_decoder_defaults(state,
@@ -411,29 +423,15 @@ static void au8522_setup_svideo_mode(struct au8522_state *state)
 
 static void disable_audio_input(struct au8522_state *state)
 {
-        /* This can probably be optimized */
         au8522_writereg(state, AU8522_AUDIO_VOLUME_L_REG0F2H, 0x00);
         au8522_writereg(state, AU8522_AUDIO_VOLUME_R_REG0F3H, 0x00);
         au8522_writereg(state, AU8522_AUDIO_VOLUME_REG0F4H, 0x00);
-        au8522_writereg(state, AU8522_I2C_CONTROL_REG1_REG091H, 0x80);
-        au8522_writereg(state, AU8522_I2C_CONTROL_REG0_REG090H, 0x84);
-
-        au8522_writereg(state, AU8522_ENA_USB_REG101H, 0x00);
-        au8522_writereg(state, AU8522_AUDIO_VOLUME_L_REG0F2H, 0x7F);
-        au8522_writereg(state, AU8522_AUDIO_VOLUME_R_REG0F3H, 0x7F);
-        au8522_writereg(state, AU8522_REG0F9H, AU8522_REG0F9H_AUDIO);
-        au8522_writereg(state, AU8522_AUDIO_MODE_REG0F1H, 0x40);
-
-        au8522_writereg(state, AU8522_GPIO_DATA_REG0E2H, 0x11);
-        msleep(5);
-        au8522_writereg(state, AU8522_GPIO_DATA_REG0E2H, 0x00);
 
         au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_1_REG0A5H, 0x04);
-        au8522_writereg(state, AU8522_AUDIOFREQ_REG606H, 0x03);
         au8522_writereg(state, AU8522_I2S_CTRL_2_REG112H, 0x02);
 
         au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H,
-                        AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H_CVBS);
+                        AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H_SVIDEO);
 }
 
 /* 0=disable, 1=SIF */
@@ -623,7 +621,7 @@ static int au8522_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
                 return v4l2_ctrl_query_fill(qc, 0, 255, 1,
                                             AU8522_TVDEC_CONTRAST_REG00BH_CVBS);
         case V4L2_CID_BRIGHTNESS:
-                return v4l2_ctrl_query_fill(qc, 0, 255, 1, 128);
+                return v4l2_ctrl_query_fill(qc, 0, 255, 1, 109);
         case V4L2_CID_SATURATION:
                 return v4l2_ctrl_query_fill(qc, 0, 255, 1, 128);
         case V4L2_CID_HUE:
@@ -831,9 +829,25 @@ static const struct i2c_device_id au8522_id[] = {
 
 MODULE_DEVICE_TABLE(i2c, au8522_id);
 
-static struct v4l2_i2c_driver_data v4l2_i2c_data = {
-        .name = "au8522",
-        .probe = au8522_probe,
-        .remove = au8522_remove,
-        .id_table = au8522_id,
+static struct i2c_driver au8522_driver = {
+        .driver = {
+                .owner  = THIS_MODULE,
+                .name   = "au8522",
+        },
+        .probe          = au8522_probe,
+        .remove         = au8522_remove,
+        .id_table       = au8522_id,
 };
+
+static __init int init_au8522(void)
+{
+        return i2c_add_driver(&au8522_driver);
+}
+
+static __exit void exit_au8522(void)
+{
+        i2c_del_driver(&au8522_driver);
+}
+
+module_init(init_au8522);
+module_exit(exit_au8522);
diff --git a/drivers/media/dvb/frontends/au8522_dig.c b/drivers/media/dvb/frontends/au8522_dig.c
index 65f6a36dfb21..1d572940e243 100644
--- a/drivers/media/dvb/frontends/au8522_dig.c
+++ b/drivers/media/dvb/frontends/au8522_dig.c
@@ -635,7 +635,7 @@ static int au8522_led_gpio_enable(struct au8522_state *state, int onoff)
         struct au8522_led_config *led_config = state->config->led_cfg;
         u8 val;
 
-        /* bail out if we cant control an LED */
+        /* bail out if we can't control an LED */
         if (!led_config || !led_config->gpio_output ||
             !led_config->gpio_output_enable || !led_config->gpio_output_disable)
                 return 0;
@@ -665,7 +665,7 @@ static int au8522_led_ctrl(struct au8522_state *state, int led)
         struct au8522_led_config *led_config = state->config->led_cfg;
         int i, ret = 0;
 
-        /* bail out if we cant control an LED */
+        /* bail out if we can't control an LED */
         if (!led_config || !led_config->gpio_leds ||
             !led_config->num_led_states || !led_config->led_states)
                 return 0;
@@ -803,7 +803,7 @@ static int au8522_led_status(struct au8522_state *state, const u16 *snr)
         int led;
         u16 strong;
 
-        /* bail out if we cant control an LED */
+        /* bail out if we can't control an LED */
         if (!led_config)
                 return 0;
 
diff --git a/drivers/media/dvb/frontends/au8522_priv.h b/drivers/media/dvb/frontends/au8522_priv.h
index 609cf04bc312..751e17d692a9 100644
--- a/drivers/media/dvb/frontends/au8522_priv.h
+++ b/drivers/media/dvb/frontends/au8522_priv.h
@@ -397,7 +397,9 @@ void au8522_release_state(struct au8522_state *state);
 #define AU8522_TVDEC_COMB_HDIF_THR2_REG06AH_CVBS                0x0A
 #define AU8522_TVDEC_COMB_HDIF_THR3_REG06BH_CVBS                0x32
 #define AU8522_TVDEC_COMB_DCDIF_THR1_REG06CH_CVBS               0x34
+#define AU8522_TVDEC_COMB_DCDIF_THR1_REG06CH_SVIDEO             0x2a
 #define AU8522_TVDEC_COMB_DCDIF_THR2_REG06DH_CVBS               0x05
+#define AU8522_TVDEC_COMB_DCDIF_THR2_REG06DH_SVIDEO             0x15
 #define AU8522_TVDEC_COMB_DCDIF_THR3_REG06EH_CVBS               0x6E
 #define AU8522_TVDEC_UV_SEP_THR_REG06FH_CVBS                    0x0F
 #define AU8522_TVDEC_COMB_DC_THR1_NTSC_REG070H_CVBS             0x80
diff --git a/drivers/media/dvb/frontends/bcm3510.c b/drivers/media/dvb/frontends/bcm3510.c
index cf5e576dfdcf..8aff5868a5e1 100644
--- a/drivers/media/dvb/frontends/bcm3510.c
+++ b/drivers/media/dvb/frontends/bcm3510.c
@@ -155,7 +155,7 @@ static int bcm3510_hab_send_request(struct bcm3510_state *st, u8 *buf, int len)
         unsigned long t;
 
 /* Check if any previous HAB request still needs to be serviced by the
- * Aquisition Processor before sending new request */
+ * Acquisition Processor before sending new request */
         if ((ret = bcm3510_readB(st,0xa8,&v)) < 0)
                 return ret;
         if (v.HABSTAT_a8.HABR) {
@@ -361,7 +361,7 @@ static int bcm3510_tuner_cmd(struct bcm3510_state* st,u8 bc, u16 n, u8 a)
 /* Set duration of the initial state of TUNCTL = 3.34 micro Sec */
         c.TUNCTL_state = 0x40;
 
-/* PRESCALER DEVIDE RATIO | BC1_2_3_4; (band switch), 1stosc REFERENCE COUNTER REF_S12 and REF_S11 */
+/* PRESCALER DIVIDE RATIO | BC1_2_3_4; (band switch), 1stosc REFERENCE COUNTER REF_S12 and REF_S11 */
         c.ctl_dat[0].ctrl.size = BITS_8;
         c.ctl_dat[0].data      = 0x80 | bc;
 
@@ -397,7 +397,7 @@ static int bcm3510_tuner_cmd(struct bcm3510_state* st,u8 bc, u16 n, u8 a)
         c.ctl_dat[7].ctrl.cs0  = 1;
         c.ctl_dat[7].data      = 0x40;
 
-/* PRESCALER DEVIDE RATIO, 2ndosc REFERENCE COUNTER REF_S12 and REF_S11 */
+/* PRESCALER DIVIDE RATIO, 2ndosc REFERENCE COUNTER REF_S12 and REF_S11 */
         c.ctl_dat[8].ctrl.size = BITS_8;
         c.ctl_dat[8].data      = 0x80;
 
diff --git a/drivers/media/dvb/frontends/bsbe1-d01a.h b/drivers/media/dvb/frontends/bsbe1-d01a.h
new file mode 100644
index 000000000000..7ed3c424178c
--- /dev/null
+++ b/drivers/media/dvb/frontends/bsbe1-d01a.h
@@ -0,0 +1,146 @@
+/*
+ * bsbe1-d01a.h - ALPS BSBE1-D01A tuner support
+ *
+ * Copyright (C) 2011 Oliver Endriss <o.endriss@gmx.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
+ *
+ *
+ * the project's page is at http://www.linuxtv.org
+ */
+
+#ifndef BSBE1_D01A_H
+#define BSBE1_D01A_H
+
+#include "stb6000.h"
+#include "stv0288.h"
+
+static u8 stv0288_bsbe1_d01a_inittab[] = {
+        0x01, 0x15,
+        0x02, 0x20,
+        0x09, 0x0,
+        0x0a, 0x4,
+        0x0b, 0x0,
+        0x0c, 0x0,
+        0x0d, 0x0,
+        0x0e, 0xd4,
+        0x0f, 0x30,
+        0x11, 0x80,
+        0x12, 0x03,
+        0x13, 0x48,
+        0x14, 0x84,
+        0x15, 0x45,
+        0x16, 0xb7,
+        0x17, 0x9c,
+        0x18, 0x0,
+        0x19, 0xa6,
+        0x1a, 0x88,
+        0x1b, 0x8f,
+        0x1c, 0xf0,
+        0x20, 0x0b,
+        0x21, 0x54,
+        0x22, 0x0,
+        0x23, 0x0,
+        0x2b, 0xff,
+        0x2c, 0xf7,
+        0x30, 0x0,
+        0x31, 0x1e,
+        0x32, 0x14,
+        0x33, 0x0f,
+        0x34, 0x09,
+        0x35, 0x0c,
+        0x36, 0x05,
+        0x37, 0x2f,
+        0x38, 0x16,
+        0x39, 0xbd,
+        0x3a, 0x03,
+        0x3b, 0x13,
+        0x3c, 0x11,
+        0x3d, 0x30,
+        0x40, 0x63,
+        0x41, 0x04,
+        0x42, 0x60,
+        0x43, 0x00,
+        0x44, 0x00,
+        0x45, 0x00,
+        0x46, 0x00,
+        0x47, 0x00,
+        0x4a, 0x00,
+        0x50, 0x10,
+        0x51, 0x36,
+        0x52, 0x09,
+        0x53, 0x94,
+        0x54, 0x62,
+        0x55, 0x29,
+        0x56, 0x64,
+        0x57, 0x2b,
+        0x58, 0x54,
+        0x59, 0x86,
+        0x5a, 0x0,
+        0x5b, 0x9b,
+        0x5c, 0x08,
+        0x5d, 0x7f,
+        0x5e, 0x0,
+        0x5f, 0xff,
+        0x70, 0x0,
+        0x71, 0x0,
+        0x72, 0x0,
+        0x74, 0x0,
+        0x75, 0x0,
+        0x76, 0x0,
+        0x81, 0x0,
+        0x82, 0x3f,
+        0x83, 0x3f,
+        0x84, 0x0,
+        0x85, 0x0,
+        0x88, 0x0,
+        0x89, 0x0,
+        0x8a, 0x0,
+        0x8b, 0x0,
+        0x8c, 0x0,
+        0x90, 0x0,
+        0x91, 0x0,
+        0x92, 0x0,
+        0x93, 0x0,
+        0x94, 0x1c,
+        0x97, 0x0,
+        0xa0, 0x48,
+        0xa1, 0x0,
+        0xb0, 0xb8,
+        0xb1, 0x3a,
+        0xb2, 0x10,
+        0xb3, 0x82,
+        0xb4, 0x80,
+        0xb5, 0x82,
+        0xb6, 0x82,
+        0xb7, 0x82,
+        0xb8, 0x20,
+        0xb9, 0x0,
+        0xf0, 0x0,
+        0xf1, 0x0,
+        0xf2, 0xc0,
+        0xff, 0xff,
+};
+
+static struct stv0288_config stv0288_bsbe1_d01a_config = {
+        .demod_address = 0x68,
+        .min_delay_ms = 100,
+        .inittab = stv0288_bsbe1_d01a_inittab,
+};
+
+#endif
diff --git a/drivers/media/dvb/frontends/bsru6.h b/drivers/media/dvb/frontends/bsru6.h
index 45a6dfd8ebb5..c480c839b302 100644
--- a/drivers/media/dvb/frontends/bsru6.h
+++ b/drivers/media/dvb/frontends/bsru6.h
@@ -27,7 +27,7 @@
 
 static u8 alps_bsru6_inittab[] = {
         0x01, 0x15,
-        0x02, 0x00,
+        0x02, 0x30,
         0x03, 0x00,
         0x04, 0x7d,   /* F22FR = 0x7d, F22 = f_VCO / 128 / 0x7d = 22 kHz */
         0x05, 0x35,   /* I2CT = 0, SCLT = 1, SDAT = 1 */
diff --git a/drivers/media/dvb/frontends/cx22700.c b/drivers/media/dvb/frontends/cx22700.c
index 5fbc0fc37ecd..0142214b0133 100644
--- a/drivers/media/dvb/frontends/cx22700.c
+++ b/drivers/media/dvb/frontends/cx22700.c
@@ -179,7 +179,7 @@ static int cx22700_set_tps (struct cx22700_state *state, struct dvb_ofdm_paramet
         cx22700_writereg (state, 0x06, val);
 
         cx22700_writereg (state, 0x08, 0x04 | 0x02);  /* use user tps parameters */
-        cx22700_writereg (state, 0x08, 0x04);         /* restart aquisition */
+        cx22700_writereg (state, 0x08, 0x04);         /* restart acquisition */
 
         return 0;
 }
diff --git a/drivers/media/dvb/frontends/cx22702.c b/drivers/media/dvb/frontends/cx22702.c
index 00b5c7e91d5d..3139558148ba 100644
--- a/drivers/media/dvb/frontends/cx22702.c
+++ b/drivers/media/dvb/frontends/cx22702.c
@@ -54,8 +54,8 @@ MODULE_PARM_DESC(debug, "Enable verbose debug messages");
 #define dprintk if (debug) printk
 
 /* Register values to initialise the demod */
-static u8 init_tab[] = {
-        0x00, 0x00, /* Stop aquisition */
+static const u8 init_tab[] = {
+        0x00, 0x00, /* Stop acquisition */
         0x0B, 0x06,
         0x09, 0x01,
         0x0D, 0x41,
@@ -92,52 +92,56 @@ static int cx22702_writereg(struct cx22702_state *state, u8 reg, u8 data)
 
         ret = i2c_transfer(state->i2c, &msg, 1);
 
-        if (ret != 1)
+        if (unlikely(ret != 1)) {
                 printk(KERN_ERR
                         "%s: error (reg == 0x%02x, val == 0x%02x, ret == %i)\n",
                         __func__, reg, data, ret);
+                return -1;
+        }
 
-        return (ret != 1) ? -1 : 0;
+        return 0;
 }
 
 static u8 cx22702_readreg(struct cx22702_state *state, u8 reg)
 {
         int ret;
-        u8 b0[] = { reg };
-        u8 b1[] = { 0 };
+        u8 data;
 
         struct i2c_msg msg[] = {
                 { .addr = state->config->demod_address, .flags = 0,
-                        .buf = b0, .len = 1 },
+                        .buf = &reg, .len = 1 },
                 { .addr = state->config->demod_address, .flags = I2C_M_RD,
-                        .buf = b1, .len = 1 } };
+                        .buf = &data, .len = 1 } };
 
         ret = i2c_transfer(state->i2c, msg, 2);
 
-        if (ret != 2)
-                printk(KERN_ERR "%s: readreg error (ret == %i)\n",
-                        __func__, ret);
+        if (unlikely(ret != 2)) {
+                printk(KERN_ERR "%s: error (reg == 0x%02x, ret == %i)\n",
+                        __func__, reg, ret);
+                return 0;
+        }
 
-        return b1[0];
+        return data;
 }
 
 static int cx22702_set_inversion(struct cx22702_state *state, int inversion)
 {
         u8 val;
 
+        val = cx22702_readreg(state, 0x0C);
         switch (inversion) {
         case INVERSION_AUTO:
                 return -EOPNOTSUPP;
         case INVERSION_ON:
-                val = cx22702_readreg(state, 0x0C);
-                return cx22702_writereg(state, 0x0C, val | 0x01);
+                val |= 0x01;
+                break;
         case INVERSION_OFF:
-                val = cx22702_readreg(state, 0x0C);
-                return cx22702_writereg(state, 0x0C, val & 0xfe);
+                val &= 0xfe;
+                break;
         default:
                 return -EINVAL;
         }
-
+        return cx22702_writereg(state, 0x0C, val);
 }
 
 /* Retrieve the demod settings */
@@ -244,13 +248,15 @@ static int cx22702_get_tps(struct cx22702_state *state,
 static int cx22702_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
 {
         struct cx22702_state *state = fe->demodulator_priv;
+        u8 val;
+
         dprintk("%s(%d)\n", __func__, enable);
+        val = cx22702_readreg(state, 0x0D);
         if (enable)
-                return cx22702_writereg(state, 0x0D,
-                        cx22702_readreg(state, 0x0D) & 0xfe);
+                val &= 0xfe;
         else
-                return cx22702_writereg(state, 0x0D,
-                        cx22702_readreg(state, 0x0D) | 1);
+                val |= 0x01;
+        return cx22702_writereg(state, 0x0D, val);
 }
 
 /* Talk to the demod, set the FEC, GUARD, QAM settings etc */
@@ -270,23 +276,21 @@ static int cx22702_set_tps(struct dvb_frontend *fe,
         cx22702_set_inversion(state, p->inversion);
 
         /* set bandwidth */
+        val = cx22702_readreg(state, 0x0C) & 0xcf;
         switch (p->u.ofdm.bandwidth) {
         case BANDWIDTH_6_MHZ:
-                cx22702_writereg(state, 0x0C,
-                        (cx22702_readreg(state, 0x0C) & 0xcf) | 0x20);
+                val |= 0x20;
                 break;
         case BANDWIDTH_7_MHZ:
-                cx22702_writereg(state, 0x0C,
-                        (cx22702_readreg(state, 0x0C) & 0xcf) | 0x10);
+                val |= 0x10;
                 break;
         case BANDWIDTH_8_MHZ:
-                cx22702_writereg(state, 0x0C,
-                        cx22702_readreg(state, 0x0C) & 0xcf);
                 break;
         default:
                 dprintk("%s: invalid bandwidth\n", __func__);
                 return -EINVAL;
         }
+        cx22702_writereg(state, 0x0C, val);
 
         p->u.ofdm.code_rate_LP = FEC_AUTO; /* temp hack as manual not working */
 
@@ -306,39 +310,37 @@ static int cx22702_set_tps(struct dvb_frontend *fe,
                         & 0xfc);
                 cx22702_writereg(state, 0x0C,
                         (cx22702_readreg(state, 0x0C) & 0xBF) | 0x40);
-                cx22702_writereg(state, 0x00, 0x01); /* Begin aquisition */
+                cx22702_writereg(state, 0x00, 0x01); /* Begin acquisition */
                 dprintk("%s: Autodetecting\n", __func__);
                 return 0;
         }
 
         /* manually programmed values */
-        val = 0;
-        switch (p->u.ofdm.constellation) {
+        switch (p->u.ofdm.constellation) {              /* mask 0x18 */
         case QPSK:
-                val = (val & 0xe7);
+                val = 0x00;
                 break;
         case QAM_16:
-                val = (val & 0xe7) | 0x08;
+                val = 0x08;
                 break;
         case QAM_64:
-                val = (val & 0xe7) | 0x10;
+                val = 0x10;
                 break;
         default:
                 dprintk("%s: invalid constellation\n", __func__);
                 return -EINVAL;
         }
-        switch (p->u.ofdm.hierarchy_information) {
+        switch (p->u.ofdm.hierarchy_information) {      /* mask 0x07 */
         case HIERARCHY_NONE:
-                val = (val & 0xf8);
                 break;
         case HIERARCHY_1:
-                val = (val & 0xf8) | 1;
+                val |= 0x01;
                 break;
         case HIERARCHY_2:
-                val = (val & 0xf8) | 2;
+                val |= 0x02;
                 break;
         case HIERARCHY_4:
-                val = (val & 0xf8) | 3;
+                val |= 0x03;
                 break;
         default:
                 dprintk("%s: invalid hierarchy\n", __func__);
@@ -346,44 +348,42 @@ static int cx22702_set_tps(struct dvb_frontend *fe,
         }
         cx22702_writereg(state, 0x06, val);
 
-        val = 0;
-        switch (p->u.ofdm.code_rate_HP) {
+        switch (p->u.ofdm.code_rate_HP) {               /* mask 0x38 */
         case FEC_NONE:
         case FEC_1_2:
-                val = (val & 0xc7);
+                val = 0x00;
                 break;
         case FEC_2_3:
-                val = (val & 0xc7) | 0x08;
+                val = 0x08;
                 break;
         case FEC_3_4:
-                val = (val & 0xc7) | 0x10;
+                val = 0x10;
                 break;
         case FEC_5_6:
-                val = (val & 0xc7) | 0x18;
+                val = 0x18;
                 break;
         case FEC_7_8:
-                val = (val & 0xc7) | 0x20;
+                val = 0x20;
                 break;
         default:
                 dprintk("%s: invalid code_rate_HP\n", __func__);
                 return -EINVAL;
         }
-        switch (p->u.ofdm.code_rate_LP) {
+        switch (p->u.ofdm.code_rate_LP) {               /* mask 0x07 */
         case FEC_NONE:
         case FEC_1_2:
-                val = (val & 0xf8);
                 break;
         case FEC_2_3:
-                val = (val & 0xf8) | 1;
+                val |= 0x01;
                 break;
         case FEC_3_4:
-                val = (val & 0xf8) | 2;
+                val |= 0x02;
                 break;
         case FEC_5_6:
-                val = (val & 0xf8) | 3;
+                val |= 0x03;
                 break;
         case FEC_7_8:
-                val = (val & 0xf8) | 4;
+                val |= 0x04;
                 break;
         default:
                 dprintk("%s: invalid code_rate_LP\n", __func__);
@@ -391,30 +391,28 @@ static int cx22702_set_tps(struct dvb_frontend *fe,
         }
         cx22702_writereg(state, 0x07, val);
 
-        val = 0;
-        switch (p->u.ofdm.guard_interval) {
+        switch (p->u.ofdm.guard_interval) {             /* mask 0x0c */
         case GUARD_INTERVAL_1_32:
-                val = (val & 0xf3);
+                val = 0x00;
                 break;
         case GUARD_INTERVAL_1_16:
-                val = (val & 0xf3) | 0x04;
+                val = 0x04;
                 break;
         case GUARD_INTERVAL_1_8:
-                val = (val & 0xf3) | 0x08;
+                val = 0x08;
                 break;
         case GUARD_INTERVAL_1_4:
-                val = (val & 0xf3) | 0x0c;
+                val = 0x0c;
                 break;
         default:
                 dprintk("%s: invalid guard_interval\n", __func__);
                 return -EINVAL;
         }
-        switch (p->u.ofdm.transmission_mode) {
+        switch (p->u.ofdm.transmission_mode) {          /* mask 0x03 */
         case TRANSMISSION_MODE_2K:
-                val = (val & 0xfc);
                 break;
         case TRANSMISSION_MODE_8K:
-                val = (val & 0xfc) | 1;
+                val |= 0x1;
                 break;
         default:
                 dprintk("%s: invalid transmission_mode\n", __func__);
@@ -426,7 +424,7 @@ static int cx22702_set_tps(struct dvb_frontend *fe,
         cx22702_writereg(state, 0x0C,
                 (cx22702_readreg(state, 0x0C) & 0xBF) | 0x40);
 
-        /* Begin channel aquisition */
+        /* Begin channel acquisition */
         cx22702_writereg(state, 0x00, 0x01);
 
         return 0;
@@ -505,7 +503,7 @@ static int cx22702_read_signal_strength(struct dvb_frontend *fe,
 {
         struct cx22702_state *state = fe->demodulator_priv;
 
-        u16 rs_ber = 0;
+        u16 rs_ber;
         rs_ber = cx22702_readreg(state, 0x23);
         *signal_strength = (rs_ber << 8) | rs_ber;
 
@@ -516,7 +514,7 @@ static int cx22702_read_snr(struct dvb_frontend *fe, u16 *snr)
 {
         struct cx22702_state *state = fe->demodulator_priv;
 
-        u16 rs_ber = 0;
+        u16 rs_ber;
         if (cx22702_readreg(state, 0xE4) & 0x02) {
                 /* Realtime statistics */
                 rs_ber = (cx22702_readreg(state, 0xDE) & 0x7F) << 7
@@ -572,7 +570,7 @@ static void cx22702_release(struct dvb_frontend *fe)
         kfree(state);
 }
 
-static struct dvb_frontend_ops cx22702_ops;
+static const struct dvb_frontend_ops cx22702_ops;
 
 struct dvb_frontend *cx22702_attach(const struct cx22702_config *config,
         struct i2c_adapter *i2c)
@@ -587,7 +585,6 @@ struct dvb_frontend *cx22702_attach(const struct cx22702_config *config,
         /* setup the state */
         state->config = config;
         state->i2c = i2c;
-        state->prevUCBlocks = 0;
 
         /* check if the demod is there */
         if (cx22702_readreg(state, 0x1f) != 0x3)
@@ -605,7 +602,7 @@ error:
 }
 EXPORT_SYMBOL(cx22702_attach);
 
-static struct dvb_frontend_ops cx22702_ops = {
+static const struct dvb_frontend_ops cx22702_ops = {
 
         .info = {
                 .name                   = "Conexant CX22702 DVB-T",
diff --git a/drivers/media/dvb/frontends/cx24110.c b/drivers/media/dvb/frontends/cx24110.c
index 00a4e8f03304..bf9c999aa470 100644
--- a/drivers/media/dvb/frontends/cx24110.c
+++ b/drivers/media/dvb/frontends/cx24110.c
@@ -310,7 +310,7 @@ static int cx24110_set_symbolrate (struct cx24110_state* state, u32 srate)
 
 }
 
-static int _cx24110_pll_write (struct dvb_frontend* fe, u8 *buf, int len)
+static int _cx24110_pll_write (struct dvb_frontend* fe, const u8 buf[], int len)
 {
         struct cx24110_state *state = fe->demodulator_priv;
 
@@ -544,7 +544,7 @@ static int cx24110_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_par
         cx24110_set_inversion (state, p->inversion);
         cx24110_set_fec (state, p->u.qpsk.fec_inner);
         cx24110_set_symbolrate (state, p->u.qpsk.symbol_rate);
-        cx24110_writereg(state,0x04,0x05); /* start aquisition */
+        cx24110_writereg(state,0x04,0x05); /* start acquisition */
 
         return 0;
 }
diff --git a/drivers/media/dvb/frontends/cx24113.h b/drivers/media/dvb/frontends/cx24113.h
index 5de0f7ffd8d2..01eb7b9c28f4 100644
--- a/drivers/media/dvb/frontends/cx24113.h
+++ b/drivers/media/dvb/frontends/cx24113.h
@@ -1,5 +1,5 @@
 /*
- *  Driver for Conexant CX24113/CX24128 Tuner (Satelite)
+ *  Driver for Conexant CX24113/CX24128 Tuner (Satellite)
  *
  *  Copyright (C) 2007-8 Patrick Boettcher <pb@linuxtv.org>
  *
diff --git a/drivers/media/dvb/frontends/cx24116.c b/drivers/media/dvb/frontends/cx24116.c
index 2410d8b59b6b..95c6465b87a1 100644
--- a/drivers/media/dvb/frontends/cx24116.c
+++ b/drivers/media/dvb/frontends/cx24116.c
@@ -137,7 +137,7 @@ MODULE_PARM_DESC(toneburst, "DiSEqC toneburst 0=OFF, 1=TONE CACHE, "\
 /* SNR measurements */
 static int esno_snr;
 module_param(esno_snr, int, 0644);
-MODULE_PARM_DESC(debug, "SNR return units, 0=PERCENTAGE 0-100, "\
+MODULE_PARM_DESC(esno_snr, "SNR return units, 0=PERCENTAGE 0-100, "\
         "1=ESNO(db * 10) (default:0)");
 
 enum cmds {
@@ -566,7 +566,7 @@ static int cx24116_load_firmware(struct dvb_frontend *fe,
 {
         struct cx24116_state *state = fe->demodulator_priv;
         struct cx24116_cmd cmd;
-        int i, ret;
+        int i, ret, len, max, remaining;
         unsigned char vers[4];
 
         dprintk("%s\n", __func__);
@@ -603,8 +603,21 @@ static int cx24116_load_firmware(struct dvb_frontend *fe,
         cx24116_writereg(state, 0xF5, 0x00);
         cx24116_writereg(state, 0xF6, 0x00);
 
-        /* write the entire firmware as one transaction */
-        cx24116_writeregN(state, 0xF7, fw->data, fw->size);
+        /* Split firmware to the max I2C write len and write.
+         * Writes whole firmware as one write when i2c_wr_max is set to 0. */
+        if (state->config->i2c_wr_max)
+                max = state->config->i2c_wr_max;
+        else
+                max = INT_MAX; /* enough for 32k firmware */
+
+        for (remaining = fw->size; remaining > 0; remaining -= max - 1) {
+                len = remaining;
+                if (len > max - 1)
+                        len = max - 1;
+
+                cx24116_writeregN(state, 0xF7, &fw->data[fw->size - remaining],
+                        len);
+        }
 
         cx24116_writereg(state, 0xF4, 0x10);
         cx24116_writereg(state, 0xF0, 0x00);
diff --git a/drivers/media/dvb/frontends/cx24116.h b/drivers/media/dvb/frontends/cx24116.h
index b1b76b47a14c..7d90ab949c03 100644
--- a/drivers/media/dvb/frontends/cx24116.h
+++ b/drivers/media/dvb/frontends/cx24116.h
@@ -35,6 +35,9 @@ struct cx24116_config {
 
         /* Need to set MPEG parameters */
         u8 mpg_clk_pos_pol:0x02;
+
+        /* max bytes I2C provider can write at once */
+        u16 i2c_wr_max;
 };
 
 #if defined(CONFIG_DVB_CX24116) || \
diff --git a/drivers/media/dvb/frontends/cx24123.c b/drivers/media/dvb/frontends/cx24123.c
index d8f921b6fafd..b1dd8acc607a 100644
--- a/drivers/media/dvb/frontends/cx24123.c
+++ b/drivers/media/dvb/frontends/cx24123.c
@@ -949,7 +949,7 @@ static int cx24123_set_frontend(struct dvb_frontend *fe,
         else
                 err("it seems I don't have a tuner...");
 
-        /* Enable automatic aquisition and reset cycle */
+        /* Enable automatic acquisition and reset cycle */
         cx24123_writereg(state, 0x03, (cx24123_readreg(state, 0x03) | 0x07));
         cx24123_writereg(state, 0x00, 0x10);
         cx24123_writereg(state, 0x00, 0);
@@ -1108,7 +1108,6 @@ struct dvb_frontend *cx24123_attach(const struct cx24123_config *config,
 
         strlcpy(state->tuner_i2c_adapter.name, "CX24123 tuner I2C bus",
                 sizeof(state->tuner_i2c_adapter.name));
-        state->tuner_i2c_adapter.class     = I2C_CLASS_TV_DIGITAL,
         state->tuner_i2c_adapter.algo      = &cx24123_tuner_i2c_algo;
         state->tuner_i2c_adapter.algo_data = NULL;
         i2c_set_adapdata(&state->tuner_i2c_adapter, state);
diff --git a/drivers/media/dvb/frontends/cxd2820r.h b/drivers/media/dvb/frontends/cxd2820r.h
new file mode 100644
index 000000000000..ad17845123d9
--- /dev/null
+++ b/drivers/media/dvb/frontends/cxd2820r.h
@@ -0,0 +1,118 @@
+/*
+ * Sony CXD2820R demodulator driver
+ *
+ * Copyright (C) 2010 Antti Palosaari <crope@iki.fi>
+ *
+ *    This program is free software; you can redistribute it and/or modify
+ *    it under the terms of the GNU General Public License as published by
+ *    the Free Software Foundation; either version 2 of the License, or
+ *    (at your option) any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License along
+ *    with this program; if not, write to the Free Software Foundation, Inc.,
+ *    51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+
+
+#ifndef CXD2820R_H
+#define CXD2820R_H
+
+#include <linux/dvb/frontend.h>
+
+#define CXD2820R_GPIO_D (0 << 0) /* disable */
+#define CXD2820R_GPIO_E (1 << 0) /* enable */
+#define CXD2820R_GPIO_O (0 << 1) /* output */
+#define CXD2820R_GPIO_I (1 << 1) /* input */
+#define CXD2820R_GPIO_L (0 << 2) /* output low */
+#define CXD2820R_GPIO_H (1 << 2) /* output high */
+
+#define CXD2820R_TS_SERIAL        0x08
+#define CXD2820R_TS_SERIAL_MSB    0x28
+#define CXD2820R_TS_PARALLEL      0x30
+#define CXD2820R_TS_PARALLEL_MSB  0x70
+
+struct cxd2820r_config {
+        /* Demodulator I2C address.
+         * Driver determines DVB-C slave I2C address automatically from master
+         * address.
+         * Default: none, must set
+         * Values: 0x6c, 0x6d
+         */
+        u8 i2c_address;
+
+        /* TS output mode.
+         * Default: none, must set.
+         * Values:
+         */
+        u8 ts_mode;
+
+        /* IF AGC polarity.
+         * Default: 0
+         * Values: 0, 1
+         */
+        int if_agc_polarity:1;
+
+        /* Spectrum inversion.
+         * Default: 0
+         * Values: 0, 1
+         */
+        int spec_inv:1;
+
+        /* IFs for all used modes.
+         * Default: none, must set
+         * Values: <kHz>
+         */
+        u16 if_dvbt_6;
+        u16 if_dvbt_7;
+        u16 if_dvbt_8;
+        u16 if_dvbt2_5;
+        u16 if_dvbt2_6;
+        u16 if_dvbt2_7;
+        u16 if_dvbt2_8;
+        u16 if_dvbc;
+
+        /* GPIOs for all used modes.
+         * Default: none, disabled
+         * Values: <see above>
+         */
+        u8 gpio_dvbt[3];
+        u8 gpio_dvbt2[3];
+        u8 gpio_dvbc[3];
+};
+
+
+#if defined(CONFIG_DVB_CXD2820R) || \
+        (defined(CONFIG_DVB_CXD2820R_MODULE) && defined(MODULE))
+extern struct dvb_frontend *cxd2820r_attach(
+        const struct cxd2820r_config *config,
+        struct i2c_adapter *i2c,
+        struct dvb_frontend *fe
+);
+extern struct i2c_adapter *cxd2820r_get_tuner_i2c_adapter(
+        struct dvb_frontend *fe
+);
+#else
+static inline struct dvb_frontend *cxd2820r_attach(
+        const struct cxd2820r_config *config,
+        struct i2c_adapter *i2c,
+        struct dvb_frontend *fe
+)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return NULL;
+}
+static inline struct i2c_adapter *cxd2820r_get_tuner_i2c_adapter(
+        struct dvb_frontend *fe
+)
+{
+        return NULL;
+}
+
+#endif
+
+#endif /* CXD2820R_H */
diff --git a/drivers/media/dvb/frontends/cxd2820r_c.c b/drivers/media/dvb/frontends/cxd2820r_c.c
new file mode 100644
index 000000000000..3c07d400731d
--- /dev/null
+++ b/drivers/media/dvb/frontends/cxd2820r_c.c
@@ -0,0 +1,338 @@
+/*
+ * Sony CXD2820R demodulator driver
+ *
+ * Copyright (C) 2010 Antti Palosaari <crope@iki.fi>
+ *
+ *    This program is free software; you can redistribute it and/or modify
+ *    it under the terms of the GNU General Public License as published by
+ *    the Free Software Foundation; either version 2 of the License, or
+ *    (at your option) any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License along
+ *    with this program; if not, write to the Free Software Foundation, Inc.,
+ *    51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+
+
+#include "cxd2820r_priv.h"
+
+int cxd2820r_set_frontend_c(struct dvb_frontend *fe,
+        struct dvb_frontend_parameters *params)
+{
+        struct cxd2820r_priv *priv = fe->demodulator_priv;
+        struct dtv_frontend_properties *c = &fe->dtv_property_cache;
+        int ret, i;
+        u8 buf[2];
+        u16 if_ctl;
+        u64 num;
+        struct reg_val_mask tab[] = {
+                { 0x00080, 0x01, 0xff },
+                { 0x00081, 0x05, 0xff },
+                { 0x00085, 0x07, 0xff },
+                { 0x00088, 0x01, 0xff },
+
+                { 0x00082, 0x20, 0x60 },
+                { 0x1016a, 0x48, 0xff },
+                { 0x100a5, 0x00, 0x01 },
+                { 0x10020, 0x06, 0x07 },
+                { 0x10059, 0x50, 0xff },
+                { 0x10087, 0x0c, 0x3c },
+                { 0x1008b, 0x07, 0xff },
+                { 0x1001f, priv->cfg.if_agc_polarity << 7, 0x80 },
+                { 0x10070, priv->cfg.ts_mode, 0xff },
+        };
+
+        dbg("%s: RF=%d SR=%d", __func__, c->frequency, c->symbol_rate);
+
+        /* update GPIOs */
+        ret = cxd2820r_gpio(fe);
+        if (ret)
+                goto error;
+
+        /* program tuner */
+        if (fe->ops.tuner_ops.set_params)
+                fe->ops.tuner_ops.set_params(fe, params);
+
+        if (priv->delivery_system !=  SYS_DVBC_ANNEX_AC) {
+                for (i = 0; i < ARRAY_SIZE(tab); i++) {
+                        ret = cxd2820r_wr_reg_mask(priv, tab[i].reg,
+                                tab[i].val, tab[i].mask);
+                        if (ret)
+                                goto error;
+                }
+        }
+
+        priv->delivery_system = SYS_DVBC_ANNEX_AC;
+        priv->ber_running = 0; /* tune stops BER counter */
+
+        num = priv->cfg.if_dvbc;
+        num *= 0x4000;
+        if_ctl = cxd2820r_div_u64_round_closest(num, 41000);
+        buf[0] = (if_ctl >> 8) & 0x3f;
+        buf[1] = (if_ctl >> 0) & 0xff;
+
+        ret = cxd2820r_wr_regs(priv, 0x10042, buf, 2);
+        if (ret)
+                goto error;
+
+        ret = cxd2820r_wr_reg(priv, 0x000ff, 0x08);
+        if (ret)
+                goto error;
+
+        ret = cxd2820r_wr_reg(priv, 0x000fe, 0x01);
+        if (ret)
+                goto error;
+
+        return ret;
+error:
+        dbg("%s: failed:%d", __func__, ret);
+        return ret;
+}
+
+int cxd2820r_get_frontend_c(struct dvb_frontend *fe,
+        struct dvb_frontend_parameters *p)
+{
+        struct cxd2820r_priv *priv = fe->demodulator_priv;
+        struct dtv_frontend_properties *c = &fe->dtv_property_cache;
+        int ret;
+        u8 buf[2];
+
+        ret = cxd2820r_rd_regs(priv, 0x1001a, buf, 2);
+        if (ret)
+                goto error;
+
+        c->symbol_rate = 2500 * ((buf[0] & 0x0f) << 8 | buf[1]);
+
+        ret = cxd2820r_rd_reg(priv, 0x10019, &buf[0]);
+        if (ret)
+                goto error;
+
+        switch ((buf[0] >> 0) & 0x03) {
+        case 0:
+                c->modulation = QAM_16;
+                break;
+        case 1:
+                c->modulation = QAM_32;
+                break;
+        case 2:
+                c->modulation = QAM_64;
+                break;
+        case 3:
+                c->modulation = QAM_128;
+                break;
+        case 4:
+                c->modulation = QAM_256;
+                break;
+        }
+
+        switch ((buf[0] >> 7) & 0x01) {
+        case 0:
+                c->inversion = INVERSION_OFF;
+                break;
+        case 1:
+                c->inversion = INVERSION_ON;
+                break;
+        }
+
+        return ret;
+error:
+        dbg("%s: failed:%d", __func__, ret);
+        return ret;
+}
+
+int cxd2820r_read_ber_c(struct dvb_frontend *fe, u32 *ber)
+{
+        struct cxd2820r_priv *priv = fe->demodulator_priv;
+        int ret;
+        u8 buf[3], start_ber = 0;
+        *ber = 0;
+
+        if (priv->ber_running) {
+                ret = cxd2820r_rd_regs(priv, 0x10076, buf, sizeof(buf));
+                if (ret)
+                        goto error;
+
+                if ((buf[2] >> 7) & 0x01 || (buf[2] >> 4) & 0x01) {
+                        *ber = (buf[2] & 0x0f) << 16 | buf[1] << 8 | buf[0];
+                        start_ber = 1;
+                }
+        } else {
+                priv->ber_running = 1;
+                start_ber = 1;
+        }
+
+        if (start_ber) {
+                /* (re)start BER */
+                ret = cxd2820r_wr_reg(priv, 0x10079, 0x01);
+                if (ret)
+                        goto error;
+        }
+
+        return ret;
+error:
+        dbg("%s: failed:%d", __func__, ret);
+        return ret;
+}
+
+int cxd2820r_read_signal_strength_c(struct dvb_frontend *fe,
+        u16 *strength)
+{
+        struct cxd2820r_priv *priv = fe->demodulator_priv;
+        int ret;
+        u8 buf[2];
+        u16 tmp;
+
+        ret = cxd2820r_rd_regs(priv, 0x10049, buf, sizeof(buf));
+        if (ret)
+                goto error;
+
+        tmp = (buf[0] & 0x03) << 8 | buf[1];
+        tmp = (~tmp & 0x03ff);
+
+        if (tmp == 512)
+                /* ~no signal */
+                tmp = 0;
+        else if (tmp > 350)
+                tmp = 350;
+
+        /* scale value to 0x0000-0xffff */
+        *strength = tmp * 0xffff / (350-0);
+
+        return ret;
+error:
+        dbg("%s: failed:%d", __func__, ret);
+        return ret;
+}
+
+int cxd2820r_read_snr_c(struct dvb_frontend *fe, u16 *snr)
+{
+        struct cxd2820r_priv *priv = fe->demodulator_priv;
+        int ret;
+        u8 tmp;
+        unsigned int A, B;
+        /* report SNR in dB * 10 */
+
+        ret = cxd2820r_rd_reg(priv, 0x10019, &tmp);
+        if (ret)
+                goto error;
+
+        if (((tmp >> 0) & 0x03) % 2) {
+                A = 875;
+                B = 650;
+        } else {
+                A = 950;
+                B = 760;
+        }
+
+        ret = cxd2820r_rd_reg(priv, 0x1004d, &tmp);
+        if (ret)
+                goto error;
+
+        #define CXD2820R_LOG2_E_24 24204406 /* log2(e) << 24 */
+        if (tmp)
+                *snr = A * (intlog2(B / tmp) >> 5) / (CXD2820R_LOG2_E_24 >> 5)
+                        / 10;
+        else
+                *snr = 0;
+
+        return ret;
+error:
+        dbg("%s: failed:%d", __func__, ret);
+        return ret;
+}
+
+int cxd2820r_read_ucblocks_c(struct dvb_frontend *fe, u32 *ucblocks)
+{
+        *ucblocks = 0;
+        /* no way to read ? */
+        return 0;
+}
+
+int cxd2820r_read_status_c(struct dvb_frontend *fe, fe_status_t *status)
+{
+        struct cxd2820r_priv *priv = fe->demodulator_priv;
+        int ret;
+        u8 buf[2];
+        *status = 0;
+
+        ret = cxd2820r_rd_regs(priv, 0x10088, buf, sizeof(buf));
+        if (ret)
+                goto error;
+
+        if (((buf[0] >> 0) & 0x01) == 1) {
+                *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
+                        FE_HAS_VITERBI | FE_HAS_SYNC;
+
+                if (((buf[1] >> 3) & 0x01) == 1) {
+                        *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
+                                FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
+                }
+        }
+
+        dbg("%s: lock=%02x %02x", __func__, buf[0], buf[1]);
+
+        return ret;
+error:
+        dbg("%s: failed:%d", __func__, ret);
+        return ret;
+}
+
+int cxd2820r_init_c(struct dvb_frontend *fe)
+{
+        struct cxd2820r_priv *priv = fe->demodulator_priv;
+        int ret;
+
+        ret = cxd2820r_wr_reg(priv, 0x00085, 0x07);
+        if (ret)
+                goto error;
+
+        return ret;
+error:
+        dbg("%s: failed:%d", __func__, ret);
+        return ret;
+}
+
+int cxd2820r_sleep_c(struct dvb_frontend *fe)
+{
+        struct cxd2820r_priv *priv = fe->demodulator_priv;
+        int ret, i;
+        struct reg_val_mask tab[] = {
+                { 0x000ff, 0x1f, 0xff },
+                { 0x00085, 0x00, 0xff },
+                { 0x00088, 0x01, 0xff },
+                { 0x00081, 0x00, 0xff },
+                { 0x00080, 0x00, 0xff },
+        };
+
+        dbg("%s", __func__);
+
+        priv->delivery_system = SYS_UNDEFINED;
+
+        for (i = 0; i < ARRAY_SIZE(tab); i++) {
+                ret = cxd2820r_wr_reg_mask(priv, tab[i].reg, tab[i].val,
+                        tab[i].mask);
+                if (ret)
+                        goto error;
+        }
+
+        return ret;
+error:
+        dbg("%s: failed:%d", __func__, ret);
+        return ret;
+}
+
+int cxd2820r_get_tune_settings_c(struct dvb_frontend *fe,
+        struct dvb_frontend_tune_settings *s)
+{
+        s->min_delay_ms = 500;
+        s->step_size = 0; /* no zigzag */
+        s->max_drift = 0;
+
+        return 0;
+}
+
diff --git a/drivers/media/dvb/frontends/cxd2820r_core.c b/drivers/media/dvb/frontends/cxd2820r_core.c
new file mode 100644
index 000000000000..0779f69db793
--- /dev/null
+++ b/drivers/media/dvb/frontends/cxd2820r_core.c
@@ -0,0 +1,915 @@
+/*
+ * Sony CXD2820R demodulator driver
+ *
+ * Copyright (C) 2010 Antti Palosaari <crope@iki.fi>
+ *
+ *    This program is free software; you can redistribute it and/or modify
+ *    it under the terms of the GNU General Public License as published by
+ *    the Free Software Foundation; either version 2 of the License, or
+ *    (at your option) any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License along
+ *    with this program; if not, write to the Free Software Foundation, Inc.,
+ *    51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+
+
+#include "cxd2820r_priv.h"
+
+int cxd2820r_debug;
+module_param_named(debug, cxd2820r_debug, int, 0644);
+MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
+
+/* write multiple registers */
+static int cxd2820r_wr_regs_i2c(struct cxd2820r_priv *priv, u8 i2c, u8 reg,
+        u8 *val, int len)
+{
+        int ret;
+        u8 buf[len+1];
+        struct i2c_msg msg[1] = {
+                {
+                        .addr = i2c,
+                        .flags = 0,
+                        .len = sizeof(buf),
+                        .buf = buf,
+                }
+        };
+
+        buf[0] = reg;
+        memcpy(&buf[1], val, len);
+
+        ret = i2c_transfer(priv->i2c, msg, 1);
+        if (ret == 1) {
+                ret = 0;
+        } else {
+                warn("i2c wr failed ret:%d reg:%02x len:%d", ret, reg, len);
+                ret = -EREMOTEIO;
+        }
+        return ret;
+}
+
+/* read multiple registers */
+static int cxd2820r_rd_regs_i2c(struct cxd2820r_priv *priv, u8 i2c, u8 reg,
+        u8 *val, int len)
+{
+        int ret;
+        u8 buf[len];
+        struct i2c_msg msg[2] = {
+                {
+                        .addr = i2c,
+                        .flags = 0,
+                        .len = 1,
+                        .buf = &reg,
+                }, {
+                        .addr = i2c,
+                        .flags = I2C_M_RD,
+                        .len = sizeof(buf),
+                        .buf = buf,
+                }
+        };
+
+        ret = i2c_transfer(priv->i2c, msg, 2);
+        if (ret == 2) {
+                memcpy(val, buf, len);
+                ret = 0;
+        } else {
+                warn("i2c rd failed ret:%d reg:%02x len:%d", ret, reg, len);
+                ret = -EREMOTEIO;
+        }
+
+        return ret;
+}
+
+/* write multiple registers */
+int cxd2820r_wr_regs(struct cxd2820r_priv *priv, u32 reginfo, u8 *val,
+        int len)
+{
+        int ret;
+        u8 i2c_addr;
+        u8 reg = (reginfo >> 0) & 0xff;
+        u8 bank = (reginfo >> 8) & 0xff;
+        u8 i2c = (reginfo >> 16) & 0x01;
+
+        /* select I2C */
+        if (i2c)
+                i2c_addr = priv->cfg.i2c_address | (1 << 1); /* DVB-C */
+        else
+                i2c_addr = priv->cfg.i2c_address; /* DVB-T/T2 */
+
+        /* switch bank if needed */
+        if (bank != priv->bank[i2c]) {
+                ret = cxd2820r_wr_regs_i2c(priv, i2c_addr, 0x00, &bank, 1);
+                if (ret)
+                        return ret;
+                priv->bank[i2c] = bank;
+        }
+        return cxd2820r_wr_regs_i2c(priv, i2c_addr, reg, val, len);
+}
+
+/* read multiple registers */
+int cxd2820r_rd_regs(struct cxd2820r_priv *priv, u32 reginfo, u8 *val,
+        int len)
+{
+        int ret;
+        u8 i2c_addr;
+        u8 reg = (reginfo >> 0) & 0xff;
+        u8 bank = (reginfo >> 8) & 0xff;
+        u8 i2c = (reginfo >> 16) & 0x01;
+
+        /* select I2C */
+        if (i2c)
+                i2c_addr = priv->cfg.i2c_address | (1 << 1); /* DVB-C */
+        else
+                i2c_addr = priv->cfg.i2c_address; /* DVB-T/T2 */
+
+        /* switch bank if needed */
+        if (bank != priv->bank[i2c]) {
+                ret = cxd2820r_wr_regs_i2c(priv, i2c_addr, 0x00, &bank, 1);
+                if (ret)
+                        return ret;
+                priv->bank[i2c] = bank;
+        }
+        return cxd2820r_rd_regs_i2c(priv, i2c_addr, reg, val, len);
+}
+
+/* write single register */
+int cxd2820r_wr_reg(struct cxd2820r_priv *priv, u32 reg, u8 val)
+{
+        return cxd2820r_wr_regs(priv, reg, &val, 1);
+}
+
+/* read single register */
+int cxd2820r_rd_reg(struct cxd2820r_priv *priv, u32 reg, u8 *val)
+{
+        return cxd2820r_rd_regs(priv, reg, val, 1);
+}
+
+/* write single register with mask */
+int cxd2820r_wr_reg_mask(struct cxd2820r_priv *priv, u32 reg, u8 val,
+        u8 mask)
+{
+        int ret;
+        u8 tmp;
+
+        /* no need for read if whole reg is written */
+        if (mask != 0xff) {
+                ret = cxd2820r_rd_reg(priv, reg, &tmp);
+                if (ret)
+                        return ret;
+
+                val &= mask;
+                tmp &= ~mask;
+                val |= tmp;
+        }
+
+        return cxd2820r_wr_reg(priv, reg, val);
+}
+
+int cxd2820r_gpio(struct dvb_frontend *fe)
+{
+        struct cxd2820r_priv *priv = fe->demodulator_priv;
+        int ret, i;
+        u8 *gpio, tmp0, tmp1;
+        dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
+
+        switch (fe->dtv_property_cache.delivery_system) {
+        case SYS_DVBT:
+                gpio = priv->cfg.gpio_dvbt;
+                break;
+        case SYS_DVBT2:
+                gpio = priv->cfg.gpio_dvbt2;
+                break;
+        case SYS_DVBC_ANNEX_AC:
+                gpio = priv->cfg.gpio_dvbc;
+                break;
+        default:
+                ret = -EINVAL;
+                goto error;
+        }
+
+        /* update GPIOs only when needed */
+        if (!memcmp(gpio, priv->gpio, sizeof(priv->gpio)))
+                return 0;
+
+        tmp0 = 0x00;
+        tmp1 = 0x00;
+        for (i = 0; i < sizeof(priv->gpio); i++) {
+                /* enable / disable */
+                if (gpio[i] & CXD2820R_GPIO_E)
+                        tmp0 |= (2 << 6) >> (2 * i);
+                else
+                        tmp0 |= (1 << 6) >> (2 * i);
+
+                /* input / output */
+                if (gpio[i] & CXD2820R_GPIO_I)
+                        tmp1 |= (1 << (3 + i));
+                else
+                        tmp1 |= (0 << (3 + i));
+
+                /* high / low */
+                if (gpio[i] & CXD2820R_GPIO_H)
+                        tmp1 |= (1 << (0 + i));
+                else
+                        tmp1 |= (0 << (0 + i));
+
+                dbg("%s: GPIO i=%d %02x %02x", __func__, i, tmp0, tmp1);
+        }
+
+        dbg("%s: wr gpio=%02x %02x", __func__, tmp0, tmp1);
+
+        /* write bits [7:2] */
+        ret = cxd2820r_wr_reg_mask(priv, 0x00089, tmp0, 0xfc);
+        if (ret)
+                goto error;
+
+        /* write bits [5:0] */
+        ret = cxd2820r_wr_reg_mask(priv, 0x0008e, tmp1, 0x3f);
+        if (ret)
+                goto error;
+
+        memcpy(priv->gpio, gpio, sizeof(priv->gpio));
+
+        return ret;
+error:
+        dbg("%s: failed:%d", __func__, ret);
+        return ret;
+}
+
+/* lock FE */
+static int cxd2820r_lock(struct cxd2820r_priv *priv, int active_fe)
+{
+        int ret = 0;
+        dbg("%s: active_fe=%d", __func__, active_fe);
+
+        mutex_lock(&priv->fe_lock);
+
+        /* -1=NONE, 0=DVB-T/T2, 1=DVB-C */
+        if (priv->active_fe == active_fe)
+                ;
+        else if (priv->active_fe == -1)
+                priv->active_fe = active_fe;
+        else
+                ret = -EBUSY;
+
+        mutex_unlock(&priv->fe_lock);
+
+        return ret;
+}
+
+/* unlock FE */
+static void cxd2820r_unlock(struct cxd2820r_priv *priv, int active_fe)
+{
+        dbg("%s: active_fe=%d", __func__, active_fe);
+
+        mutex_lock(&priv->fe_lock);
+
+        /* -1=NONE, 0=DVB-T/T2, 1=DVB-C */
+        if (priv->active_fe == active_fe)
+                priv->active_fe = -1;
+
+        mutex_unlock(&priv->fe_lock);
+
+        return;
+}
+
+/* 64 bit div with round closest, like DIV_ROUND_CLOSEST but 64 bit */
+u32 cxd2820r_div_u64_round_closest(u64 dividend, u32 divisor)
+{
+        return div_u64(dividend + (divisor / 2), divisor);
+}
+
+static int cxd2820r_set_frontend(struct dvb_frontend *fe,
+        struct dvb_frontend_parameters *p)
+{
+        struct cxd2820r_priv *priv = fe->demodulator_priv;
+        struct dtv_frontend_properties *c = &fe->dtv_property_cache;
+        int ret;
+        dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
+
+        if (fe->ops.info.type == FE_OFDM) {
+                /* DVB-T/T2 */
+                ret = cxd2820r_lock(priv, 0);
+                if (ret)
+                        return ret;
+
+                switch (priv->delivery_system) {
+                case SYS_UNDEFINED:
+                        if (c->delivery_system == SYS_DVBT) {
+                                /* SLEEP => DVB-T */
+                                ret = cxd2820r_set_frontend_t(fe, p);
+                        } else {
+                                /* SLEEP => DVB-T2 */
+                                ret = cxd2820r_set_frontend_t2(fe, p);
+                        }
+                        break;
+                case SYS_DVBT:
+                        if (c->delivery_system == SYS_DVBT) {
+                                /* DVB-T => DVB-T */
+                                ret = cxd2820r_set_frontend_t(fe, p);
+                        } else if (c->delivery_system == SYS_DVBT2) {
+                                /* DVB-T => DVB-T2 */
+                                ret = cxd2820r_sleep_t(fe);
+                                ret = cxd2820r_set_frontend_t2(fe, p);
+                        }
+                        break;
+                case SYS_DVBT2:
+                        if (c->delivery_system == SYS_DVBT2) {
+                                /* DVB-T2 => DVB-T2 */
+                                ret = cxd2820r_set_frontend_t2(fe, p);
+                        } else if (c->delivery_system == SYS_DVBT) {
+                                /* DVB-T2 => DVB-T */
+                                ret = cxd2820r_sleep_t2(fe);
+                                ret = cxd2820r_set_frontend_t(fe, p);
+                        }
+                        break;
+                default:
+                        dbg("%s: error state=%d", __func__,
+                                priv->delivery_system);
+                        ret = -EINVAL;
+                }
+        } else {
+                /* DVB-C */
+                ret = cxd2820r_lock(priv, 1);
+                if (ret)
+                        return ret;
+
+                ret = cxd2820r_set_frontend_c(fe, p);
+        }
+
+        return ret;
+}
+
+static int cxd2820r_read_status(struct dvb_frontend *fe, fe_status_t *status)
+{
+        struct cxd2820r_priv *priv = fe->demodulator_priv;
+        int ret;
+        dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
+
+        if (fe->ops.info.type == FE_OFDM) {
+                /* DVB-T/T2 */
+                ret = cxd2820r_lock(priv, 0);
+                if (ret)
+                        return ret;
+
+                switch (fe->dtv_property_cache.delivery_system) {
+                case SYS_DVBT:
+                        ret = cxd2820r_read_status_t(fe, status);
+                        break;
+                case SYS_DVBT2:
+                        ret = cxd2820r_read_status_t2(fe, status);
+                        break;
+                default:
+                        ret = -EINVAL;
+                }
+        } else {
+                /* DVB-C */
+                ret = cxd2820r_lock(priv, 1);
+                if (ret)
+                        return ret;
+
+                ret = cxd2820r_read_status_c(fe, status);
+        }
+
+        return ret;
+}
+
+static int cxd2820r_get_frontend(struct dvb_frontend *fe,
+        struct dvb_frontend_parameters *p)
+{
+        struct cxd2820r_priv *priv = fe->demodulator_priv;
+        int ret;
+        dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
+
+        if (fe->ops.info.type == FE_OFDM) {
+                /* DVB-T/T2 */
+                ret = cxd2820r_lock(priv, 0);
+                if (ret)
+                        return ret;
+
+                switch (fe->dtv_property_cache.delivery_system) {
+                case SYS_DVBT:
+                        ret = cxd2820r_get_frontend_t(fe, p);
+                        break;
+                case SYS_DVBT2:
+                        ret = cxd2820r_get_frontend_t2(fe, p);
+                        break;
+                default:
+                        ret = -EINVAL;
+                }
+        } else {
+                /* DVB-C */
+                ret = cxd2820r_lock(priv, 1);
+                if (ret)
+                        return ret;
+
+                ret = cxd2820r_get_frontend_c(fe, p);
+        }
+
+        return ret;
+}
+
+static int cxd2820r_read_ber(struct dvb_frontend *fe, u32 *ber)
+{
+        struct cxd2820r_priv *priv = fe->demodulator_priv;
+        int ret;
+        dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
+
+        if (fe->ops.info.type == FE_OFDM) {
+                /* DVB-T/T2 */
+                ret = cxd2820r_lock(priv, 0);
+                if (ret)
+                        return ret;
+
+                switch (fe->dtv_property_cache.delivery_system) {
+                case SYS_DVBT:
+                        ret = cxd2820r_read_ber_t(fe, ber);
+                        break;
+                case SYS_DVBT2:
+                        ret = cxd2820r_read_ber_t2(fe, ber);
+                        break;
+                default:
+                        ret = -EINVAL;
+                }
+        } else {
+                /* DVB-C */
+                ret = cxd2820r_lock(priv, 1);
+                if (ret)
+                        return ret;
+
+                ret = cxd2820r_read_ber_c(fe, ber);
+        }
+
+        return ret;
+}
+
+static int cxd2820r_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
+{
+        struct cxd2820r_priv *priv = fe->demodulator_priv;
+        int ret;
+        dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
+
+        if (fe->ops.info.type == FE_OFDM) {
+                /* DVB-T/T2 */
+                ret = cxd2820r_lock(priv, 0);
+                if (ret)
+                        return ret;
+
+                switch (fe->dtv_property_cache.delivery_system) {
+                case SYS_DVBT:
+                        ret = cxd2820r_read_signal_strength_t(fe, strength);
+                        break;
+                case SYS_DVBT2:
+                        ret = cxd2820r_read_signal_strength_t2(fe, strength);
+                        break;
+                default:
+                        ret = -EINVAL;
+                }
+        } else {
+                /* DVB-C */
+                ret = cxd2820r_lock(priv, 1);
+                if (ret)
+                        return ret;
+
+                ret = cxd2820r_read_signal_strength_c(fe, strength);
+        }
+
+        return ret;
+}
+
+static int cxd2820r_read_snr(struct dvb_frontend *fe, u16 *snr)
+{
+        struct cxd2820r_priv *priv = fe->demodulator_priv;
+        int ret;
+        dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
+
+        if (fe->ops.info.type == FE_OFDM) {
+                /* DVB-T/T2 */
+                ret = cxd2820r_lock(priv, 0);
+                if (ret)
+                        return ret;
+
+                switch (fe->dtv_property_cache.delivery_system) {
+                case SYS_DVBT:
+                        ret = cxd2820r_read_snr_t(fe, snr);
+                        break;
+                case SYS_DVBT2:
+                        ret = cxd2820r_read_snr_t2(fe, snr);
+                        break;
+                default:
+                        ret = -EINVAL;
+                }
+        } else {
+                /* DVB-C */
+                ret = cxd2820r_lock(priv, 1);
+                if (ret)
+                        return ret;
+
+                ret = cxd2820r_read_snr_c(fe, snr);
+        }
+
+        return ret;
+}
+
+static int cxd2820r_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
+{
+        struct cxd2820r_priv *priv = fe->demodulator_priv;
+        int ret;
+        dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
+
+        if (fe->ops.info.type == FE_OFDM) {
+                /* DVB-T/T2 */
+                ret = cxd2820r_lock(priv, 0);
+                if (ret)
+                        return ret;
+
+                switch (fe->dtv_property_cache.delivery_system) {
+                case SYS_DVBT:
+                        ret = cxd2820r_read_ucblocks_t(fe, ucblocks);
+                        break;
+                case SYS_DVBT2:
+                        ret = cxd2820r_read_ucblocks_t2(fe, ucblocks);
+                        break;
+                default:
+                        ret = -EINVAL;
+                }
+        } else {
+                /* DVB-C */
+                ret = cxd2820r_lock(priv, 1);
+                if (ret)
+                        return ret;
+
+                ret = cxd2820r_read_ucblocks_c(fe, ucblocks);
+        }
+
+        return ret;
+}
+
+static int cxd2820r_init(struct dvb_frontend *fe)
+{
+        struct cxd2820r_priv *priv = fe->demodulator_priv;
+        int ret;
+        dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
+
+        priv->delivery_system = SYS_UNDEFINED;
+        /* delivery system is unknown at that (init) phase */
+
+        if (fe->ops.info.type == FE_OFDM) {
+                /* DVB-T/T2 */
+                ret = cxd2820r_lock(priv, 0);
+                if (ret)
+                        return ret;
+
+                ret = cxd2820r_init_t(fe);
+        } else {
+                /* DVB-C */
+                ret = cxd2820r_lock(priv, 1);
+                if (ret)
+                        return ret;
+
+                ret = cxd2820r_init_c(fe);
+        }
+
+        return ret;
+}
+
+static int cxd2820r_sleep(struct dvb_frontend *fe)
+{
+        struct cxd2820r_priv *priv = fe->demodulator_priv;
+        int ret;
+        dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
+
+        if (fe->ops.info.type == FE_OFDM) {
+                /* DVB-T/T2 */
+                ret = cxd2820r_lock(priv, 0);
+                if (ret)
+                        return ret;
+
+                switch (fe->dtv_property_cache.delivery_system) {
+                case SYS_DVBT:
+                        ret = cxd2820r_sleep_t(fe);
+                        break;
+                case SYS_DVBT2:
+                        ret = cxd2820r_sleep_t2(fe);
+                        break;
+                default:
+                        ret = -EINVAL;
+                }
+
+                cxd2820r_unlock(priv, 0);
+        } else {
+                /* DVB-C */
+                ret = cxd2820r_lock(priv, 1);
+                if (ret)
+                        return ret;
+
+                ret = cxd2820r_sleep_c(fe);
+
+                cxd2820r_unlock(priv, 1);
+        }
+
+        return ret;
+}
+
+static int cxd2820r_get_tune_settings(struct dvb_frontend *fe,
+        struct dvb_frontend_tune_settings *s)
+{
+        struct cxd2820r_priv *priv = fe->demodulator_priv;
+        int ret;
+        dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
+
+        if (fe->ops.info.type == FE_OFDM) {
+                /* DVB-T/T2 */
+                ret = cxd2820r_lock(priv, 0);
+                if (ret)
+                        return ret;
+
+                switch (fe->dtv_property_cache.delivery_system) {
+                case SYS_DVBT:
+                        ret = cxd2820r_get_tune_settings_t(fe, s);
+                        break;
+                case SYS_DVBT2:
+                        ret = cxd2820r_get_tune_settings_t2(fe, s);
+                        break;
+                default:
+                        ret = -EINVAL;
+                }
+        } else {
+                /* DVB-C */
+                ret = cxd2820r_lock(priv, 1);
+                if (ret)
+                        return ret;
+
+                ret = cxd2820r_get_tune_settings_c(fe, s);
+        }
+
+        return ret;
+}
+
+static enum dvbfe_search cxd2820r_search(struct dvb_frontend *fe,
+        struct dvb_frontend_parameters *p)
+{
+        struct cxd2820r_priv *priv = fe->demodulator_priv;
+        struct dtv_frontend_properties *c = &fe->dtv_property_cache;
+        int ret, i;
+        fe_status_t status = 0;
+        dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
+
+        /* switch between DVB-T and DVB-T2 when tune fails */
+        if (priv->last_tune_failed) {
+                if (priv->delivery_system == SYS_DVBT)
+                        c->delivery_system = SYS_DVBT2;
+                else
+                        c->delivery_system = SYS_DVBT;
+        }
+
+        /* set frontend */
+        ret = cxd2820r_set_frontend(fe, p);
+        if (ret)
+                goto error;
+
+
+        /* frontend lock wait loop count */
+        switch (priv->delivery_system) {
+        case SYS_DVBT:
+                i = 20;
+                break;
+        case SYS_DVBT2:
+                i = 40;
+                break;
+        case SYS_UNDEFINED:
+        default:
+                i = 0;
+                break;
+        }
+
+        /* wait frontend lock */
+        for (; i > 0; i--) {
+                dbg("%s: LOOP=%d", __func__, i);
+                msleep(50);
+                ret = cxd2820r_read_status(fe, &status);
+                if (ret)
+                        goto error;
+
+                if (status & FE_HAS_SIGNAL)
+                        break;
+        }
+
+        /* check if we have a valid signal */
+        if (status) {
+                priv->last_tune_failed = 0;
+                return DVBFE_ALGO_SEARCH_SUCCESS;
+        } else {
+                priv->last_tune_failed = 1;
+                return DVBFE_ALGO_SEARCH_AGAIN;
+        }
+
+error:
+        dbg("%s: failed:%d", __func__, ret);
+        return DVBFE_ALGO_SEARCH_ERROR;
+}
+
+static int cxd2820r_get_frontend_algo(struct dvb_frontend *fe)
+{
+        return DVBFE_ALGO_CUSTOM;
+}
+
+static void cxd2820r_release(struct dvb_frontend *fe)
+{
+        struct cxd2820r_priv *priv = fe->demodulator_priv;
+        dbg("%s", __func__);
+
+        if (fe->ops.info.type == FE_OFDM) {
+                i2c_del_adapter(&priv->tuner_i2c_adapter);
+                kfree(priv);
+        }
+
+        return;
+}
+
+static u32 cxd2820r_tuner_i2c_func(struct i2c_adapter *adapter)
+{
+        return I2C_FUNC_I2C;
+}
+
+static int cxd2820r_tuner_i2c_xfer(struct i2c_adapter *i2c_adap,
+        struct i2c_msg msg[], int num)
+{
+        struct cxd2820r_priv *priv = i2c_get_adapdata(i2c_adap);
+        u8 obuf[msg[0].len + 2];
+        struct i2c_msg msg2[2] = {
+                {
+                        .addr = priv->cfg.i2c_address,
+                        .flags = 0,
+                        .len = sizeof(obuf),
+                        .buf = obuf,
+                }, {
+                        .addr = priv->cfg.i2c_address,
+                        .flags = I2C_M_RD,
+                        .len = msg[1].len,
+                        .buf = msg[1].buf,
+                }
+        };
+
+        obuf[0] = 0x09;
+        obuf[1] = (msg[0].addr << 1);
+        if (num == 2) { /* I2C read */
+                obuf[1] = (msg[0].addr << 1) | I2C_M_RD; /* I2C RD flag */
+                msg2[0].len = sizeof(obuf) - 1; /* maybe HW bug ? */
+        }
+        memcpy(&obuf[2], msg[0].buf, msg[0].len);
+
+        return i2c_transfer(priv->i2c, msg2, num);
+}
+
+static struct i2c_algorithm cxd2820r_tuner_i2c_algo = {
+        .master_xfer   = cxd2820r_tuner_i2c_xfer,
+        .functionality = cxd2820r_tuner_i2c_func,
+};
+
+struct i2c_adapter *cxd2820r_get_tuner_i2c_adapter(struct dvb_frontend *fe)
+{
+        struct cxd2820r_priv *priv = fe->demodulator_priv;
+        return &priv->tuner_i2c_adapter;
+}
+EXPORT_SYMBOL(cxd2820r_get_tuner_i2c_adapter);
+
+static struct dvb_frontend_ops cxd2820r_ops[2];
+
+struct dvb_frontend *cxd2820r_attach(const struct cxd2820r_config *cfg,
+        struct i2c_adapter *i2c, struct dvb_frontend *fe)
+{
+        int ret;
+        struct cxd2820r_priv *priv = NULL;
+        u8 tmp;
+
+        if (fe == NULL) {
+                /* FE0 */
+                /* allocate memory for the internal priv */
+                priv = kzalloc(sizeof(struct cxd2820r_priv), GFP_KERNEL);
+                if (priv == NULL)
+                        goto error;
+
+                /* setup the priv */
+                priv->i2c = i2c;
+                memcpy(&priv->cfg, cfg, sizeof(struct cxd2820r_config));
+                mutex_init(&priv->fe_lock);
+
+                priv->active_fe = -1; /* NONE */
+
+                /* check if the demod is there */
+                priv->bank[0] = priv->bank[1] = 0xff;
+                ret = cxd2820r_rd_reg(priv, 0x000fd, &tmp);
+                dbg("%s: chip id=%02x", __func__, tmp);
+                if (ret || tmp != 0xe1)
+                        goto error;
+
+                /* create frontends */
+                memcpy(&priv->fe[0].ops, &cxd2820r_ops[0],
+                        sizeof(struct dvb_frontend_ops));
+                memcpy(&priv->fe[1].ops, &cxd2820r_ops[1],
+                        sizeof(struct dvb_frontend_ops));
+
+                priv->fe[0].demodulator_priv = priv;
+                priv->fe[1].demodulator_priv = priv;
+
+                /* create tuner i2c adapter */
+                strlcpy(priv->tuner_i2c_adapter.name,
+                        "CXD2820R tuner I2C adapter",
+                        sizeof(priv->tuner_i2c_adapter.name));
+                priv->tuner_i2c_adapter.algo = &cxd2820r_tuner_i2c_algo;
+                priv->tuner_i2c_adapter.algo_data = NULL;
+                i2c_set_adapdata(&priv->tuner_i2c_adapter, priv);
+                if (i2c_add_adapter(&priv->tuner_i2c_adapter) < 0) {
+                        err("tuner I2C bus could not be initialized");
+                        goto error;
+                }
+
+                return &priv->fe[0];
+
+        } else {
+                /* FE1: FE0 given as pointer, just return FE1 we have
+                 * already created */
+                priv = fe->demodulator_priv;
+                return &priv->fe[1];
+        }
+
+error:
+        kfree(priv);
+        return NULL;
+}
+EXPORT_SYMBOL(cxd2820r_attach);
+
+static struct dvb_frontend_ops cxd2820r_ops[2] = {
+        {
+                /* DVB-T/T2 */
+                .info = {
+                        .name = "Sony CXD2820R (DVB-T/T2)",
+                        .type = FE_OFDM,
+                        .caps =
+                                FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 |
+                                FE_CAN_FEC_3_4 | FE_CAN_FEC_5_6 |
+                                FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
+                                FE_CAN_QPSK | FE_CAN_QAM_16 |
+                                FE_CAN_QAM_64 | FE_CAN_QAM_256 |
+                                FE_CAN_QAM_AUTO |
+                                FE_CAN_TRANSMISSION_MODE_AUTO |
+                                FE_CAN_GUARD_INTERVAL_AUTO |
+                                FE_CAN_HIERARCHY_AUTO |
+                                FE_CAN_MUTE_TS |
+                                FE_CAN_2G_MODULATION
+                },
+
+                .release = cxd2820r_release,
+                .init = cxd2820r_init,
+                .sleep = cxd2820r_sleep,
+
+                .get_tune_settings = cxd2820r_get_tune_settings,
+
+                .get_frontend = cxd2820r_get_frontend,
+
+                .get_frontend_algo = cxd2820r_get_frontend_algo,
+                .search = cxd2820r_search,
+
+                .read_status = cxd2820r_read_status,
+                .read_snr = cxd2820r_read_snr,
+                .read_ber = cxd2820r_read_ber,
+                .read_ucblocks = cxd2820r_read_ucblocks,
+                .read_signal_strength = cxd2820r_read_signal_strength,
+        },
+        {
+                /* DVB-C */
+                .info = {
+                        .name = "Sony CXD2820R (DVB-C)",
+                        .type = FE_QAM,
+                        .caps =
+                                FE_CAN_QAM_16 | FE_CAN_QAM_32 | FE_CAN_QAM_64 |
+                                FE_CAN_QAM_128 | FE_CAN_QAM_256 |
+                                FE_CAN_FEC_AUTO
+                },
+
+                .release = cxd2820r_release,
+                .init = cxd2820r_init,
+                .sleep = cxd2820r_sleep,
+
+                .get_tune_settings = cxd2820r_get_tune_settings,
+
+                .set_frontend = cxd2820r_set_frontend,
+                .get_frontend = cxd2820r_get_frontend,
+
+                .read_status = cxd2820r_read_status,
+                .read_snr = cxd2820r_read_snr,
+                .read_ber = cxd2820r_read_ber,
+                .read_ucblocks = cxd2820r_read_ucblocks,
+                .read_signal_strength = cxd2820r_read_signal_strength,
+        },
+};
+
+
+MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
+MODULE_DESCRIPTION("Sony CXD2820R demodulator driver");
+MODULE_LICENSE("GPL");
diff --git a/drivers/media/dvb/frontends/cxd2820r_priv.h b/drivers/media/dvb/frontends/cxd2820r_priv.h
new file mode 100644
index 000000000000..25adbeefa6d3
--- /dev/null
+++ b/drivers/media/dvb/frontends/cxd2820r_priv.h
@@ -0,0 +1,166 @@
+/*
+ * Sony CXD2820R demodulator driver
+ *
+ * Copyright (C) 2010 Antti Palosaari <crope@iki.fi>
+ *
+ *    This program is free software; you can redistribute it and/or modify
+ *    it under the terms of the GNU General Public License as published by
+ *    the Free Software Foundation; either version 2 of the License, or
+ *    (at your option) any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License along
+ *    with this program; if not, write to the Free Software Foundation, Inc.,
+ *    51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+
+
+#ifndef CXD2820R_PRIV_H
+#define CXD2820R_PRIV_H
+
+#include <linux/dvb/version.h>
+#include "dvb_frontend.h"
+#include "dvb_math.h"
+#include "cxd2820r.h"
+
+#define LOG_PREFIX "cxd2820r"
+
+#undef dbg
+#define dbg(f, arg...) \
+        if (cxd2820r_debug) \
+                printk(KERN_INFO   LOG_PREFIX": " f "\n" , ## arg)
+#undef err
+#define err(f, arg...)  printk(KERN_ERR     LOG_PREFIX": " f "\n" , ## arg)
+#undef info
+#define info(f, arg...) printk(KERN_INFO    LOG_PREFIX": " f "\n" , ## arg)
+#undef warn
+#define warn(f, arg...) printk(KERN_WARNING LOG_PREFIX": " f "\n" , ## arg)
+
+struct reg_val_mask {
+        u32 reg;
+        u8  val;
+        u8  mask;
+};
+
+struct cxd2820r_priv {
+        struct i2c_adapter *i2c;
+        struct dvb_frontend fe[2];
+        struct cxd2820r_config cfg;
+        struct i2c_adapter tuner_i2c_adapter;
+
+        struct mutex fe_lock; /* FE lock */
+        int active_fe:2; /* FE lock, -1=NONE, 0=DVB-T/T2, 1=DVB-C */
+
+        int ber_running:1;
+
+        u8 bank[2];
+        u8 gpio[3];
+
+        fe_delivery_system_t delivery_system;
+        int last_tune_failed:1; /* for switch between T and T2 tune */
+};
+
+/* cxd2820r_core.c */
+
+extern int cxd2820r_debug;
+
+int cxd2820r_gpio(struct dvb_frontend *fe);
+
+int cxd2820r_wr_reg_mask(struct cxd2820r_priv *priv, u32 reg, u8 val,
+        u8 mask);
+
+int cxd2820r_wr_regs(struct cxd2820r_priv *priv, u32 reginfo, u8 *val,
+        int len);
+
+u32 cxd2820r_div_u64_round_closest(u64 dividend, u32 divisor);
+
+int cxd2820r_wr_regs(struct cxd2820r_priv *priv, u32 reginfo, u8 *val,
+        int len);
+
+int cxd2820r_rd_regs(struct cxd2820r_priv *priv, u32 reginfo, u8 *val,
+        int len);
+
+int cxd2820r_wr_reg(struct cxd2820r_priv *priv, u32 reg, u8 val);
+
+int cxd2820r_rd_reg(struct cxd2820r_priv *priv, u32 reg, u8 *val);
+
+/* cxd2820r_c.c */
+
+int cxd2820r_get_frontend_c(struct dvb_frontend *fe,
+        struct dvb_frontend_parameters *p);
+
+int cxd2820r_set_frontend_c(struct dvb_frontend *fe,
+        struct dvb_frontend_parameters *params);
+
+int cxd2820r_read_status_c(struct dvb_frontend *fe, fe_status_t *status);
+
+int cxd2820r_read_ber_c(struct dvb_frontend *fe, u32 *ber);
+
+int cxd2820r_read_signal_strength_c(struct dvb_frontend *fe, u16 *strength);
+
+int cxd2820r_read_snr_c(struct dvb_frontend *fe, u16 *snr);
+
+int cxd2820r_read_ucblocks_c(struct dvb_frontend *fe, u32 *ucblocks);
+
+int cxd2820r_init_c(struct dvb_frontend *fe);
+
+int cxd2820r_sleep_c(struct dvb_frontend *fe);
+
+int cxd2820r_get_tune_settings_c(struct dvb_frontend *fe,
+        struct dvb_frontend_tune_settings *s);
+
+/* cxd2820r_t.c */
+
+int cxd2820r_get_frontend_t(struct dvb_frontend *fe,
+        struct dvb_frontend_parameters *p);
+
+int cxd2820r_set_frontend_t(struct dvb_frontend *fe,
+        struct dvb_frontend_parameters *params);
+
+int cxd2820r_read_status_t(struct dvb_frontend *fe, fe_status_t *status);
+
+int cxd2820r_read_ber_t(struct dvb_frontend *fe, u32 *ber);
+
+int cxd2820r_read_signal_strength_t(struct dvb_frontend *fe, u16 *strength);
+
+int cxd2820r_read_snr_t(struct dvb_frontend *fe, u16 *snr);
+
+int cxd2820r_read_ucblocks_t(struct dvb_frontend *fe, u32 *ucblocks);
+
+int cxd2820r_init_t(struct dvb_frontend *fe);
+
+int cxd2820r_sleep_t(struct dvb_frontend *fe);
+
+int cxd2820r_get_tune_settings_t(struct dvb_frontend *fe,
+        struct dvb_frontend_tune_settings *s);
+
+/* cxd2820r_t2.c */
+
+int cxd2820r_get_frontend_t2(struct dvb_frontend *fe,
+        struct dvb_frontend_parameters *p);
+
+int cxd2820r_set_frontend_t2(struct dvb_frontend *fe,
+        struct dvb_frontend_parameters *params);
+
+int cxd2820r_read_status_t2(struct dvb_frontend *fe, fe_status_t *status);
+
+int cxd2820r_read_ber_t2(struct dvb_frontend *fe, u32 *ber);
+
+int cxd2820r_read_signal_strength_t2(struct dvb_frontend *fe, u16 *strength);
+
+int cxd2820r_read_snr_t2(struct dvb_frontend *fe, u16 *snr);
+
+int cxd2820r_read_ucblocks_t2(struct dvb_frontend *fe, u32 *ucblocks);
+
+int cxd2820r_init_t2(struct dvb_frontend *fe);
+
+int cxd2820r_sleep_t2(struct dvb_frontend *fe);
+
+int cxd2820r_get_tune_settings_t2(struct dvb_frontend *fe,
+        struct dvb_frontend_tune_settings *s);
+
+#endif /* CXD2820R_PRIV_H */
diff --git a/drivers/media/dvb/frontends/cxd2820r_t.c b/drivers/media/dvb/frontends/cxd2820r_t.c
new file mode 100644
index 000000000000..6582564c930c
--- /dev/null
+++ b/drivers/media/dvb/frontends/cxd2820r_t.c
@@ -0,0 +1,449 @@
+/*
+ * Sony CXD2820R demodulator driver
+ *
+ * Copyright (C) 2010 Antti Palosaari <crope@iki.fi>
+ *
+ *    This program is free software; you can redistribute it and/or modify
+ *    it under the terms of the GNU General Public License as published by
+ *    the Free Software Foundation; either version 2 of the License, or
+ *    (at your option) any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License along
+ *    with this program; if not, write to the Free Software Foundation, Inc.,
+ *    51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+
+
+#include "cxd2820r_priv.h"
+
+int cxd2820r_set_frontend_t(struct dvb_frontend *fe,
+        struct dvb_frontend_parameters *p)
+{
+        struct cxd2820r_priv *priv = fe->demodulator_priv;
+        struct dtv_frontend_properties *c = &fe->dtv_property_cache;
+        int ret, i;
+        u32 if_khz, if_ctl;
+        u64 num;
+        u8 buf[3], bw_param;
+        u8 bw_params1[][5] = {
+                { 0x17, 0xea, 0xaa, 0xaa, 0xaa }, /* 6 MHz */
+                { 0x14, 0x80, 0x00, 0x00, 0x00 }, /* 7 MHz */
+                { 0x11, 0xf0, 0x00, 0x00, 0x00 }, /* 8 MHz */
+        };
+        u8 bw_params2[][2] = {
+                { 0x1f, 0xdc }, /* 6 MHz */
+                { 0x12, 0xf8 }, /* 7 MHz */
+                { 0x01, 0xe0 }, /* 8 MHz */
+        };
+        struct reg_val_mask tab[] = {
+                { 0x00080, 0x00, 0xff },
+                { 0x00081, 0x03, 0xff },
+                { 0x00085, 0x07, 0xff },
+                { 0x00088, 0x01, 0xff },
+
+                { 0x00070, priv->cfg.ts_mode, 0xff },
+                { 0x000cb, priv->cfg.if_agc_polarity << 6, 0x40 },
+                { 0x000a5, 0x00, 0x01 },
+                { 0x00082, 0x20, 0x60 },
+                { 0x000c2, 0xc3, 0xff },
+                { 0x0016a, 0x50, 0xff },
+                { 0x00427, 0x41, 0xff },
+        };
+
+        dbg("%s: RF=%d BW=%d", __func__, c->frequency, c->bandwidth_hz);
+
+        /* update GPIOs */
+        ret = cxd2820r_gpio(fe);
+        if (ret)
+                goto error;
+
+        /* program tuner */
+        if (fe->ops.tuner_ops.set_params)
+                fe->ops.tuner_ops.set_params(fe, p);
+
+        if (priv->delivery_system != SYS_DVBT) {
+                for (i = 0; i < ARRAY_SIZE(tab); i++) {
+                        ret = cxd2820r_wr_reg_mask(priv, tab[i].reg,
+                                tab[i].val, tab[i].mask);
+                        if (ret)
+                                goto error;
+                }
+        }
+
+        priv->delivery_system = SYS_DVBT;
+        priv->ber_running = 0; /* tune stops BER counter */
+
+        switch (c->bandwidth_hz) {
+        case 6000000:
+                if_khz = priv->cfg.if_dvbt_6;
+                i = 0;
+                bw_param = 2;
+                break;
+        case 7000000:
+                if_khz = priv->cfg.if_dvbt_7;
+                i = 1;
+                bw_param = 1;
+                break;
+        case 8000000:
+                if_khz = priv->cfg.if_dvbt_8;
+                i = 2;
+                bw_param = 0;
+                break;
+        default:
+                return -EINVAL;
+        }
+
+        num = if_khz;
+        num *= 0x1000000;
+        if_ctl = cxd2820r_div_u64_round_closest(num, 41000);
+        buf[0] = ((if_ctl >> 16) & 0xff);
+        buf[1] = ((if_ctl >>  8) & 0xff);
+        buf[2] = ((if_ctl >>  0) & 0xff);
+
+        ret = cxd2820r_wr_regs(priv, 0x000b6, buf, 3);
+        if (ret)
+                goto error;
+
+        ret = cxd2820r_wr_regs(priv, 0x0009f, bw_params1[i], 5);
+        if (ret)
+                goto error;
+
+        ret = cxd2820r_wr_reg_mask(priv, 0x000d7, bw_param << 6, 0xc0);
+        if (ret)
+                goto error;
+
+        ret = cxd2820r_wr_regs(priv, 0x000d9, bw_params2[i], 2);
+        if (ret)
+                goto error;
+
+        ret = cxd2820r_wr_reg(priv, 0x000ff, 0x08);
+        if (ret)
+                goto error;
+
+        ret = cxd2820r_wr_reg(priv, 0x000fe, 0x01);
+        if (ret)
+                goto error;
+
+        return ret;
+error:
+        dbg("%s: failed:%d", __func__, ret);
+        return ret;
+}
+
+int cxd2820r_get_frontend_t(struct dvb_frontend *fe,
+        struct dvb_frontend_parameters *p)
+{
+        struct cxd2820r_priv *priv = fe->demodulator_priv;
+        struct dtv_frontend_properties *c = &fe->dtv_property_cache;
+        int ret;
+        u8 buf[2];
+
+        ret = cxd2820r_rd_regs(priv, 0x0002f, buf, sizeof(buf));
+        if (ret)
+                goto error;
+
+        switch ((buf[0] >> 6) & 0x03) {
+        case 0:
+                c->modulation = QPSK;
+                break;
+        case 1:
+                c->modulation = QAM_16;
+                break;
+        case 2:
+                c->modulation = QAM_64;
+                break;
+        }
+
+        switch ((buf[1] >> 1) & 0x03) {
+        case 0:
+                c->transmission_mode = TRANSMISSION_MODE_2K;
+                break;
+        case 1:
+                c->transmission_mode = TRANSMISSION_MODE_8K;
+                break;
+        }
+
+        switch ((buf[1] >> 3) & 0x03) {
+        case 0:
+                c->guard_interval = GUARD_INTERVAL_1_32;
+                break;
+        case 1:
+                c->guard_interval = GUARD_INTERVAL_1_16;
+                break;
+        case 2:
+                c->guard_interval = GUARD_INTERVAL_1_8;
+                break;
+        case 3:
+                c->guard_interval = GUARD_INTERVAL_1_4;
+                break;
+        }
+
+        switch ((buf[0] >> 3) & 0x07) {
+        case 0:
+                c->hierarchy = HIERARCHY_NONE;
+                break;
+        case 1:
+                c->hierarchy = HIERARCHY_1;
+                break;
+        case 2:
+                c->hierarchy = HIERARCHY_2;
+                break;
+        case 3:
+                c->hierarchy = HIERARCHY_4;
+                break;
+        }
+
+        switch ((buf[0] >> 0) & 0x07) {
+        case 0:
+                c->code_rate_HP = FEC_1_2;
+                break;
+        case 1:
+                c->code_rate_HP = FEC_2_3;
+                break;
+        case 2:
+                c->code_rate_HP = FEC_3_4;
+                break;
+        case 3:
+                c->code_rate_HP = FEC_5_6;
+                break;
+        case 4:
+                c->code_rate_HP = FEC_7_8;
+                break;
+        }
+
+        switch ((buf[1] >> 5) & 0x07) {
+        case 0:
+                c->code_rate_LP = FEC_1_2;
+                break;
+        case 1:
+                c->code_rate_LP = FEC_2_3;
+                break;
+        case 2:
+                c->code_rate_LP = FEC_3_4;
+                break;
+        case 3:
+                c->code_rate_LP = FEC_5_6;
+                break;
+        case 4:
+                c->code_rate_LP = FEC_7_8;
+                break;
+        }
+
+        ret = cxd2820r_rd_reg(priv, 0x007c6, &buf[0]);
+        if (ret)
+                goto error;
+
+        switch ((buf[0] >> 0) & 0x01) {
+        case 0:
+                c->inversion = INVERSION_OFF;
+                break;
+        case 1:
+                c->inversion = INVERSION_ON;
+                break;
+        }
+
+        return ret;
+error:
+        dbg("%s: failed:%d", __func__, ret);
+        return ret;
+}
+
+int cxd2820r_read_ber_t(struct dvb_frontend *fe, u32 *ber)
+{
+        struct cxd2820r_priv *priv = fe->demodulator_priv;
+        int ret;
+        u8 buf[3], start_ber = 0;
+        *ber = 0;
+
+        if (priv->ber_running) {
+                ret = cxd2820r_rd_regs(priv, 0x00076, buf, sizeof(buf));
+                if (ret)
+                        goto error;
+
+                if ((buf[2] >> 7) & 0x01 || (buf[2] >> 4) & 0x01) {
+                        *ber = (buf[2] & 0x0f) << 16 | buf[1] << 8 | buf[0];
+                        start_ber = 1;
+                }
+        } else {
+                priv->ber_running = 1;
+                start_ber = 1;
+        }
+
+        if (start_ber) {
+                /* (re)start BER */
+                ret = cxd2820r_wr_reg(priv, 0x00079, 0x01);
+                if (ret)
+                        goto error;
+        }
+
+        return ret;
+error:
+        dbg("%s: failed:%d", __func__, ret);
+        return ret;
+}
+
+int cxd2820r_read_signal_strength_t(struct dvb_frontend *fe,
+        u16 *strength)
+{
+        struct cxd2820r_priv *priv = fe->demodulator_priv;
+        int ret;
+        u8 buf[2];
+        u16 tmp;
+
+        ret = cxd2820r_rd_regs(priv, 0x00026, buf, sizeof(buf));
+        if (ret)
+                goto error;
+
+        tmp = (buf[0] & 0x0f) << 8 | buf[1];
+        tmp = ~tmp & 0x0fff;
+
+        /* scale value to 0x0000-0xffff from 0x0000-0x0fff */
+        *strength = tmp * 0xffff / 0x0fff;
+
+        return ret;
+error:
+        dbg("%s: failed:%d", __func__, ret);
+        return ret;
+}
+
+int cxd2820r_read_snr_t(struct dvb_frontend *fe, u16 *snr)
+{
+        struct cxd2820r_priv *priv = fe->demodulator_priv;
+        int ret;
+        u8 buf[2];
+        u16 tmp;
+        /* report SNR in dB * 10 */
+
+        ret = cxd2820r_rd_regs(priv, 0x00028, buf, sizeof(buf));
+        if (ret)
+                goto error;
+
+        tmp = (buf[0] & 0x1f) << 8 | buf[1];
+        #define CXD2820R_LOG10_8_24 15151336 /* log10(8) << 24 */
+        if (tmp)
+                *snr = (intlog10(tmp) - CXD2820R_LOG10_8_24) / ((1 << 24)
+                        / 100);
+        else
+                *snr = 0;
+
+        dbg("%s: dBx10=%d val=%04x", __func__, *snr, tmp);
+
+        return ret;
+error:
+        dbg("%s: failed:%d", __func__, ret);
+        return ret;
+}
+
+int cxd2820r_read_ucblocks_t(struct dvb_frontend *fe, u32 *ucblocks)
+{
+        *ucblocks = 0;
+        /* no way to read ? */
+        return 0;
+}
+
+int cxd2820r_read_status_t(struct dvb_frontend *fe, fe_status_t *status)
+{
+        struct cxd2820r_priv *priv = fe->demodulator_priv;
+        int ret;
+        u8 buf[4];
+        *status = 0;
+
+        ret = cxd2820r_rd_reg(priv, 0x00010, &buf[0]);
+        if (ret)
+                goto error;
+
+        if ((buf[0] & 0x07) == 6) {
+                ret = cxd2820r_rd_reg(priv, 0x00073, &buf[1]);
+                if (ret)
+                        goto error;
+
+                if (((buf[1] >> 3) & 0x01) == 1) {
+                        *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
+                                FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
+                } else {
+                        *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
+                                FE_HAS_VITERBI | FE_HAS_SYNC;
+                }
+        } else {
+                ret = cxd2820r_rd_reg(priv, 0x00014, &buf[2]);
+                if (ret)
+                        goto error;
+
+                if ((buf[2] & 0x0f) >= 4) {
+                        ret = cxd2820r_rd_reg(priv, 0x00a14, &buf[3]);
+                        if (ret)
+                                goto error;
+
+                        if (((buf[3] >> 4) & 0x01) == 1)
+                                *status |= FE_HAS_SIGNAL;
+                }
+        }
+
+        dbg("%s: lock=%02x %02x %02x %02x", __func__,
+                buf[0], buf[1], buf[2], buf[3]);
+
+        return ret;
+error:
+        dbg("%s: failed:%d", __func__, ret);
+        return ret;
+}
+
+int cxd2820r_init_t(struct dvb_frontend *fe)
+{
+        struct cxd2820r_priv *priv = fe->demodulator_priv;
+        int ret;
+
+        ret = cxd2820r_wr_reg(priv, 0x00085, 0x07);
+        if (ret)
+                goto error;
+
+        return ret;
+error:
+        dbg("%s: failed:%d", __func__, ret);
+        return ret;
+}
+
+int cxd2820r_sleep_t(struct dvb_frontend *fe)
+{
+        struct cxd2820r_priv *priv = fe->demodulator_priv;
+        int ret, i;
+        struct reg_val_mask tab[] = {
+                { 0x000ff, 0x1f, 0xff },
+                { 0x00085, 0x00, 0xff },
+                { 0x00088, 0x01, 0xff },
+                { 0x00081, 0x00, 0xff },
+                { 0x00080, 0x00, 0xff },
+        };
+
+        dbg("%s", __func__);
+
+        priv->delivery_system = SYS_UNDEFINED;
+
+        for (i = 0; i < ARRAY_SIZE(tab); i++) {
+                ret = cxd2820r_wr_reg_mask(priv, tab[i].reg, tab[i].val,
+                        tab[i].mask);
+                if (ret)
+                        goto error;
+        }
+
+        return ret;
+error:
+        dbg("%s: failed:%d", __func__, ret);
+        return ret;
+}
+
+int cxd2820r_get_tune_settings_t(struct dvb_frontend *fe,
+        struct dvb_frontend_tune_settings *s)
+{
+        s->min_delay_ms = 500;
+        s->step_size = fe->ops.info.frequency_stepsize * 2;
+        s->max_drift = (fe->ops.info.frequency_stepsize * 2) + 1;
+
+        return 0;
+}
+
diff --git a/drivers/media/dvb/frontends/cxd2820r_t2.c b/drivers/media/dvb/frontends/cxd2820r_t2.c
new file mode 100644
index 000000000000..c47b35c8acf1
--- /dev/null
+++ b/drivers/media/dvb/frontends/cxd2820r_t2.c
@@ -0,0 +1,423 @@
+/*
+ * Sony CXD2820R demodulator driver
+ *
+ * Copyright (C) 2010 Antti Palosaari <crope@iki.fi>
+ *
+ *    This program is free software; you can redistribute it and/or modify
+ *    it under the terms of the GNU General Public License as published by
+ *    the Free Software Foundation; either version 2 of the License, or
+ *    (at your option) any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License along
+ *    with this program; if not, write to the Free Software Foundation, Inc.,
+ *    51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+
+
+#include "cxd2820r_priv.h"
+
+int cxd2820r_set_frontend_t2(struct dvb_frontend *fe,
+        struct dvb_frontend_parameters *params)
+{
+        struct cxd2820r_priv *priv = fe->demodulator_priv;
+        struct dtv_frontend_properties *c = &fe->dtv_property_cache;
+        int ret, i;
+        u32 if_khz, if_ctl;
+        u64 num;
+        u8 buf[3], bw_param;
+        u8 bw_params1[][5] = {
+                { 0x1c, 0xb3, 0x33, 0x33, 0x33 }, /* 5 MHz */
+                { 0x17, 0xea, 0xaa, 0xaa, 0xaa }, /* 6 MHz */
+                { 0x14, 0x80, 0x00, 0x00, 0x00 }, /* 7 MHz */
+                { 0x11, 0xf0, 0x00, 0x00, 0x00 }, /* 8 MHz */
+        };
+        struct reg_val_mask tab[] = {
+                { 0x00080, 0x02, 0xff },
+                { 0x00081, 0x20, 0xff },
+                { 0x00085, 0x07, 0xff },
+                { 0x00088, 0x01, 0xff },
+                { 0x02069, 0x01, 0xff },
+
+                { 0x0207f, 0x2a, 0xff },
+                { 0x02082, 0x0a, 0xff },
+                { 0x02083, 0x0a, 0xff },
+                { 0x020cb, priv->cfg.if_agc_polarity << 6, 0x40 },
+                { 0x02070, priv->cfg.ts_mode, 0xff },
+                { 0x020b5, priv->cfg.spec_inv << 4, 0x10 },
+                { 0x02567, 0x07, 0x0f },
+                { 0x02569, 0x03, 0x03 },
+                { 0x02595, 0x1a, 0xff },
+                { 0x02596, 0x50, 0xff },
+                { 0x02a8c, 0x00, 0xff },
+                { 0x02a8d, 0x34, 0xff },
+                { 0x02a45, 0x06, 0x07 },
+                { 0x03f10, 0x0d, 0xff },
+                { 0x03f11, 0x02, 0xff },
+                { 0x03f12, 0x01, 0xff },
+                { 0x03f23, 0x2c, 0xff },
+                { 0x03f51, 0x13, 0xff },
+                { 0x03f52, 0x01, 0xff },
+                { 0x03f53, 0x00, 0xff },
+                { 0x027e6, 0x14, 0xff },
+                { 0x02786, 0x02, 0x07 },
+                { 0x02787, 0x40, 0xe0 },
+                { 0x027ef, 0x10, 0x18 },
+        };
+
+        dbg("%s: RF=%d BW=%d", __func__, c->frequency, c->bandwidth_hz);
+
+        /* update GPIOs */
+        ret = cxd2820r_gpio(fe);
+        if (ret)
+                goto error;
+
+        /* program tuner */
+        if (fe->ops.tuner_ops.set_params)
+                fe->ops.tuner_ops.set_params(fe, params);
+
+        if (priv->delivery_system != SYS_DVBT2) {
+                for (i = 0; i < ARRAY_SIZE(tab); i++) {
+                        ret = cxd2820r_wr_reg_mask(priv, tab[i].reg,
+                                tab[i].val, tab[i].mask);
+                        if (ret)
+                                goto error;
+                }
+        }
+
+        priv->delivery_system = SYS_DVBT2;
+
+        switch (c->bandwidth_hz) {
+        case 5000000:
+                if_khz = priv->cfg.if_dvbt2_5;
+                i = 0;
+                bw_param = 3;
+                break;
+        case 6000000:
+                if_khz = priv->cfg.if_dvbt2_6;
+                i = 1;
+                bw_param = 2;
+                break;
+        case 7000000:
+                if_khz = priv->cfg.if_dvbt2_7;
+                i = 2;
+                bw_param = 1;
+                break;
+        case 8000000:
+                if_khz = priv->cfg.if_dvbt2_8;
+                i = 3;
+                bw_param = 0;
+                break;
+        default:
+                return -EINVAL;
+        }
+
+        num = if_khz;
+        num *= 0x1000000;
+        if_ctl = cxd2820r_div_u64_round_closest(num, 41000);
+        buf[0] = ((if_ctl >> 16) & 0xff);
+        buf[1] = ((if_ctl >>  8) & 0xff);
+        buf[2] = ((if_ctl >>  0) & 0xff);
+
+        ret = cxd2820r_wr_regs(priv, 0x020b6, buf, 3);
+        if (ret)
+                goto error;
+
+        ret = cxd2820r_wr_regs(priv, 0x0209f, bw_params1[i], 5);
+        if (ret)
+                goto error;
+
+        ret = cxd2820r_wr_reg_mask(priv, 0x020d7, bw_param << 6, 0xc0);
+        if (ret)
+                goto error;
+
+        ret = cxd2820r_wr_reg(priv, 0x000ff, 0x08);
+        if (ret)
+                goto error;
+
+        ret = cxd2820r_wr_reg(priv, 0x000fe, 0x01);
+        if (ret)
+                goto error;
+
+        return ret;
+error:
+        dbg("%s: failed:%d", __func__, ret);
+        return ret;
+
+}
+
+int cxd2820r_get_frontend_t2(struct dvb_frontend *fe,
+        struct dvb_frontend_parameters *p)
+{
+        struct cxd2820r_priv *priv = fe->demodulator_priv;
+        struct dtv_frontend_properties *c = &fe->dtv_property_cache;
+        int ret;
+        u8 buf[2];
+
+        ret = cxd2820r_rd_regs(priv, 0x0205c, buf, 2);
+        if (ret)
+                goto error;
+
+        switch ((buf[0] >> 0) & 0x07) {
+        case 0:
+                c->transmission_mode = TRANSMISSION_MODE_2K;
+                break;
+        case 1:
+                c->transmission_mode = TRANSMISSION_MODE_8K;
+                break;
+        case 2:
+                c->transmission_mode = TRANSMISSION_MODE_4K;
+                break;
+        case 3:
+                c->transmission_mode = TRANSMISSION_MODE_1K;
+                break;
+        case 4:
+                c->transmission_mode = TRANSMISSION_MODE_16K;
+                break;
+        case 5:
+                c->transmission_mode = TRANSMISSION_MODE_32K;
+                break;
+        }
+
+        switch ((buf[1] >> 4) & 0x07) {
+        case 0:
+                c->guard_interval = GUARD_INTERVAL_1_32;
+                break;
+        case 1:
+                c->guard_interval = GUARD_INTERVAL_1_16;
+                break;
+        case 2:
+                c->guard_interval = GUARD_INTERVAL_1_8;
+                break;
+        case 3:
+                c->guard_interval = GUARD_INTERVAL_1_4;
+                break;
+        case 4:
+                c->guard_interval = GUARD_INTERVAL_1_128;
+                break;
+        case 5:
+                c->guard_interval = GUARD_INTERVAL_19_128;
+                break;
+        case 6:
+                c->guard_interval = GUARD_INTERVAL_19_256;
+                break;
+        }
+
+        ret = cxd2820r_rd_regs(priv, 0x0225b, buf, 2);
+        if (ret)
+                goto error;
+
+        switch ((buf[0] >> 0) & 0x07) {
+        case 0:
+                c->fec_inner = FEC_1_2;
+                break;
+        case 1:
+                c->fec_inner = FEC_3_5;
+                break;
+        case 2:
+                c->fec_inner = FEC_2_3;
+                break;
+        case 3:
+                c->fec_inner = FEC_3_4;
+                break;
+        case 4:
+                c->fec_inner = FEC_4_5;
+                break;
+        case 5:
+                c->fec_inner = FEC_5_6;
+                break;
+        }
+
+        switch ((buf[1] >> 0) & 0x07) {
+        case 0:
+                c->modulation = QPSK;
+                break;
+        case 1:
+                c->modulation = QAM_16;
+                break;
+        case 2:
+                c->modulation = QAM_64;
+                break;
+        case 3:
+                c->modulation = QAM_256;
+                break;
+        }
+
+        ret = cxd2820r_rd_reg(priv, 0x020b5, &buf[0]);
+        if (ret)
+                goto error;
+
+        switch ((buf[0] >> 4) & 0x01) {
+        case 0:
+                c->inversion = INVERSION_OFF;
+                break;
+        case 1:
+                c->inversion = INVERSION_ON;
+                break;
+        }
+
+        return ret;
+error:
+        dbg("%s: failed:%d", __func__, ret);
+        return ret;
+}
+
+int cxd2820r_read_status_t2(struct dvb_frontend *fe, fe_status_t *status)
+{
+        struct cxd2820r_priv *priv = fe->demodulator_priv;
+        int ret;
+        u8 buf[1];
+        *status = 0;
+
+        ret = cxd2820r_rd_reg(priv, 0x02010 , &buf[0]);
+        if (ret)
+                goto error;
+
+        if ((buf[0] & 0x07) == 6) {
+                if (((buf[0] >> 5) & 0x01) == 1) {
+                        *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
+                                FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
+                } else {
+                        *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
+                                FE_HAS_VITERBI | FE_HAS_SYNC;
+                }
+        }
+
+        dbg("%s: lock=%02x", __func__, buf[0]);
+
+        return ret;
+error:
+        dbg("%s: failed:%d", __func__, ret);
+        return ret;
+}
+
+int cxd2820r_read_ber_t2(struct dvb_frontend *fe, u32 *ber)
+{
+        struct cxd2820r_priv *priv = fe->demodulator_priv;
+        int ret;
+        u8 buf[4];
+        unsigned int errbits;
+        *ber = 0;
+        /* FIXME: correct calculation */
+
+        ret = cxd2820r_rd_regs(priv, 0x02039, buf, sizeof(buf));
+        if (ret)
+                goto error;
+
+        if ((buf[0] >> 4) & 0x01) {
+                errbits = (buf[0] & 0x0f) << 24 | buf[1] << 16 |
+                        buf[2] << 8 | buf[3];
+
+                if (errbits)
+                        *ber = errbits * 64 / 16588800;
+        }
+
+        return ret;
+error:
+        dbg("%s: failed:%d", __func__, ret);
+        return ret;
+}
+
+int cxd2820r_read_signal_strength_t2(struct dvb_frontend *fe,
+        u16 *strength)
+{
+        struct cxd2820r_priv *priv = fe->demodulator_priv;
+        int ret;
+        u8 buf[2];
+        u16 tmp;
+
+        ret = cxd2820r_rd_regs(priv, 0x02026, buf, sizeof(buf));
+        if (ret)
+                goto error;
+
+        tmp = (buf[0] & 0x0f) << 8 | buf[1];
+        tmp = ~tmp & 0x0fff;
+
+        /* scale value to 0x0000-0xffff from 0x0000-0x0fff */
+        *strength = tmp * 0xffff / 0x0fff;
+
+        return ret;
+error:
+        dbg("%s: failed:%d", __func__, ret);
+        return ret;
+}
+
+int cxd2820r_read_snr_t2(struct dvb_frontend *fe, u16 *snr)
+{
+        struct cxd2820r_priv *priv = fe->demodulator_priv;
+        int ret;
+        u8 buf[2];
+        u16 tmp;
+        /* report SNR in dB * 10 */
+
+        ret = cxd2820r_rd_regs(priv, 0x02028, buf, sizeof(buf));
+        if (ret)
+                goto error;
+
+        tmp = (buf[0] & 0x0f) << 8 | buf[1];
+        #define CXD2820R_LOG10_8_24 15151336 /* log10(8) << 24 */
+        if (tmp)
+                *snr = (intlog10(tmp) - CXD2820R_LOG10_8_24) / ((1 << 24)
+                        / 100);
+        else
+                *snr = 0;
+
+        dbg("%s: dBx10=%d val=%04x", __func__, *snr, tmp);
+
+        return ret;
+error:
+        dbg("%s: failed:%d", __func__, ret);
+        return ret;
+}
+
+int cxd2820r_read_ucblocks_t2(struct dvb_frontend *fe, u32 *ucblocks)
+{
+        *ucblocks = 0;
+        /* no way to read ? */
+        return 0;
+}
+
+int cxd2820r_sleep_t2(struct dvb_frontend *fe)
+{
+        struct cxd2820r_priv *priv = fe->demodulator_priv;
+        int ret, i;
+        struct reg_val_mask tab[] = {
+                { 0x000ff, 0x1f, 0xff },
+                { 0x00085, 0x00, 0xff },
+                { 0x00088, 0x01, 0xff },
+                { 0x02069, 0x00, 0xff },
+                { 0x00081, 0x00, 0xff },
+                { 0x00080, 0x00, 0xff },
+        };
+
+        dbg("%s", __func__);
+
+        for (i = 0; i < ARRAY_SIZE(tab); i++) {
+                ret = cxd2820r_wr_reg_mask(priv, tab[i].reg, tab[i].val,
+                        tab[i].mask);
+                if (ret)
+                        goto error;
+        }
+
+        priv->delivery_system = SYS_UNDEFINED;
+
+        return ret;
+error:
+        dbg("%s: failed:%d", __func__, ret);
+        return ret;
+}
+
+int cxd2820r_get_tune_settings_t2(struct dvb_frontend *fe,
+        struct dvb_frontend_tune_settings *s)
+{
+        s->min_delay_ms = 1500;
+        s->step_size = fe->ops.info.frequency_stepsize * 2;
+        s->max_drift = (fe->ops.info.frequency_stepsize * 2) + 1;
+
+        return 0;
+}
+
diff --git a/drivers/media/dvb/frontends/dib0070.c b/drivers/media/dvb/frontends/dib0070.c
index d4e466a90e43..1d47d4da7d4c 100644
--- a/drivers/media/dvb/frontends/dib0070.c
+++ b/drivers/media/dvb/frontends/dib0070.c
@@ -73,27 +73,47 @@ struct dib0070_state {
 
     u8  wbd_gain_current;
         u16 wbd_offset_3_3[2];
+
+        /* for the I2C transfer */
+        struct i2c_msg msg[2];
+        u8 i2c_write_buffer[3];
+        u8 i2c_read_buffer[2];
 };
 
 static uint16_t dib0070_read_reg(struct dib0070_state *state, u8 reg)
 {
-        u8 b[2];
-        struct i2c_msg msg[2] = {
-                { .addr = state->cfg->i2c_address, .flags = 0,        .buf = &reg, .len = 1 },
-                { .addr = state->cfg->i2c_address, .flags = I2C_M_RD, .buf = b,  .len = 2 },
-        };
-        if (i2c_transfer(state->i2c, msg, 2) != 2) {
+        state->i2c_write_buffer[0] = reg;
+
+        memset(state->msg, 0, 2 * sizeof(struct i2c_msg));
+        state->msg[0].addr = state->cfg->i2c_address;
+        state->msg[0].flags = 0;
+        state->msg[0].buf = state->i2c_write_buffer;
+        state->msg[0].len = 1;
+        state->msg[1].addr = state->cfg->i2c_address;
+        state->msg[1].flags = I2C_M_RD;
+        state->msg[1].buf = state->i2c_read_buffer;
+        state->msg[1].len = 2;
+
+        if (i2c_transfer(state->i2c, state->msg, 2) != 2) {
                 printk(KERN_WARNING "DiB0070 I2C read failed\n");
                 return 0;
         }
-        return (b[0] << 8) | b[1];
+        return (state->i2c_read_buffer[0] << 8) | state->i2c_read_buffer[1];
 }
 
 static int dib0070_write_reg(struct dib0070_state *state, u8 reg, u16 val)
 {
-        u8 b[3] = { reg, val >> 8, val & 0xff };
-        struct i2c_msg msg = { .addr = state->cfg->i2c_address, .flags = 0, .buf = b, .len = 3 };
-        if (i2c_transfer(state->i2c, &msg, 1) != 1) {
+        state->i2c_write_buffer[0] = reg;
+        state->i2c_write_buffer[1] = val >> 8;
+        state->i2c_write_buffer[2] = val & 0xff;
+
+        memset(state->msg, 0, sizeof(struct i2c_msg));
+        state->msg[0].addr = state->cfg->i2c_address;
+        state->msg[0].flags = 0;
+        state->msg[0].buf = state->i2c_write_buffer;
+        state->msg[0].len = 3;
+
+        if (i2c_transfer(state->i2c, state->msg, 1) != 1) {
                 printk(KERN_WARNING "DiB0070 I2C write failed\n");
                 return -EREMOTEIO;
         }
diff --git a/drivers/media/dvb/frontends/dib0090.c b/drivers/media/dvb/frontends/dib0090.c
index 65240b7801e8..c9c935ae41e4 100644
--- a/drivers/media/dvb/frontends/dib0090.c
+++ b/drivers/media/dvb/frontends/dib0090.c
@@ -45,6 +45,7 @@ MODULE_PARM_DESC(debug, "turn on debugging (default: 0)");
         } \
 } while (0)
 
+#define CONFIG_SYS_DVBT
 #define CONFIG_SYS_ISDBT
 #define CONFIG_BAND_CBAND
 #define CONFIG_BAND_VHF
@@ -76,6 +77,34 @@ MODULE_PARM_DESC(debug, "turn on debugging (default: 0)");
 #define EN_SBD           0x44E9
 #define EN_CAB           0x88E9
 
+/* Calibration defines */
+#define      DC_CAL 0x1
+#define     WBD_CAL 0x2
+#define    TEMP_CAL 0x4
+#define CAPTRIM_CAL 0x8
+
+#define KROSUS_PLL_LOCKED   0x800
+#define KROSUS              0x2
+
+/* Use those defines to identify SOC version */
+#define SOC               0x02
+#define SOC_7090_P1G_11R1 0x82
+#define SOC_7090_P1G_21R1 0x8a
+#define SOC_8090_P1G_11R1 0x86
+#define SOC_8090_P1G_21R1 0x8e
+
+/* else use thos ones to check */
+#define P1A_B      0x0
+#define P1C        0x1
+#define P1D_E_F    0x3
+#define P1G        0x7
+#define P1G_21R2   0xf
+
+#define MP001 0x1               /* Single 9090/8096 */
+#define MP005 0x4               /* Single Sband */
+#define MP008 0x6               /* Dual diversity VHF-UHF-LBAND */
+#define MP009 0x7               /* Dual diversity 29098 CBAND-UHF-LBAND-SBAND */
+
 #define pgm_read_word(w) (*w)
 
 struct dc_calibration;
@@ -84,7 +113,7 @@ struct dib0090_tuning {
         u32 max_freq;           /* for every frequency less than or equal to that field: this information is correct */
         u8 switch_trim;
         u8 lna_tune;
-        u8 lna_bias;
+        u16 lna_bias;
         u16 v2i;
         u16 mix;
         u16 load;
@@ -99,13 +128,19 @@ struct dib0090_pll {
         u8 topresc;
 };
 
+struct dib0090_identity {
+        u8 version;
+        u8 product;
+        u8 p1g;
+        u8 in_soc;
+};
+
 struct dib0090_state {
         struct i2c_adapter *i2c;
         struct dvb_frontend *fe;
         const struct dib0090_config *config;
 
         u8 current_band;
-        u16 revision;
         enum frontend_tune_state tune_state;
         u32 current_rf;
 
@@ -143,28 +178,106 @@ struct dib0090_state {
         u8 tuner_is_tuned;
         u8 agc_freeze;
 
-        u8 reset;
+        struct dib0090_identity identity;
+
+        u32 rf_request;
+        u8 current_standard;
+
+        u8 calibrate;
+        u32 rest;
+        u16 bias;
+        s16 temperature;
+
+        u8 wbd_calibration_gain;
+        const struct dib0090_wbd_slope *current_wbd_table;
+        u16 wbdmux;
+
+        /* for the I2C transfer */
+        struct i2c_msg msg[2];
+        u8 i2c_write_buffer[3];
+        u8 i2c_read_buffer[2];
+};
+
+struct dib0090_fw_state {
+        struct i2c_adapter *i2c;
+        struct dvb_frontend *fe;
+        struct dib0090_identity identity;
+        const struct dib0090_config *config;
+
+        /* for the I2C transfer */
+        struct i2c_msg msg;
+        u8 i2c_write_buffer[2];
+        u8 i2c_read_buffer[2];
 };
 
 static u16 dib0090_read_reg(struct dib0090_state *state, u8 reg)
 {
-        u8 b[2];
-        struct i2c_msg msg[2] = {
-                {.addr = state->config->i2c_address, .flags = 0, .buf = &reg, .len = 1},
-                {.addr = state->config->i2c_address, .flags = I2C_M_RD, .buf = b, .len = 2},
-        };
-        if (i2c_transfer(state->i2c, msg, 2) != 2) {
+        state->i2c_write_buffer[0] = reg;
+
+        memset(state->msg, 0, 2 * sizeof(struct i2c_msg));
+        state->msg[0].addr = state->config->i2c_address;
+        state->msg[0].flags = 0;
+        state->msg[0].buf = state->i2c_write_buffer;
+        state->msg[0].len = 1;
+        state->msg[1].addr = state->config->i2c_address;
+        state->msg[1].flags = I2C_M_RD;
+        state->msg[1].buf = state->i2c_read_buffer;
+        state->msg[1].len = 2;
+
+        if (i2c_transfer(state->i2c, state->msg, 2) != 2) {
                 printk(KERN_WARNING "DiB0090 I2C read failed\n");
                 return 0;
         }
-        return (b[0] << 8) | b[1];
+
+        return (state->i2c_read_buffer[0] << 8) | state->i2c_read_buffer[1];
 }
 
 static int dib0090_write_reg(struct dib0090_state *state, u32 reg, u16 val)
 {
-        u8 b[3] = { reg & 0xff, val >> 8, val & 0xff };
-        struct i2c_msg msg = {.addr = state->config->i2c_address, .flags = 0, .buf = b, .len = 3 };
-        if (i2c_transfer(state->i2c, &msg, 1) != 1) {
+        state->i2c_write_buffer[0] = reg & 0xff;
+        state->i2c_write_buffer[1] = val >> 8;
+        state->i2c_write_buffer[2] = val & 0xff;
+
+        memset(state->msg, 0, sizeof(struct i2c_msg));
+        state->msg[0].addr = state->config->i2c_address;
+        state->msg[0].flags = 0;
+        state->msg[0].buf = state->i2c_write_buffer;
+        state->msg[0].len = 3;
+
+        if (i2c_transfer(state->i2c, state->msg, 1) != 1) {
+                printk(KERN_WARNING "DiB0090 I2C write failed\n");
+                return -EREMOTEIO;
+        }
+        return 0;
+}
+
+static u16 dib0090_fw_read_reg(struct dib0090_fw_state *state, u8 reg)
+{
+        state->i2c_write_buffer[0] = reg;
+
+        memset(&state->msg, 0, sizeof(struct i2c_msg));
+        state->msg.addr = reg;
+        state->msg.flags = I2C_M_RD;
+        state->msg.buf = state->i2c_read_buffer;
+        state->msg.len = 2;
+        if (i2c_transfer(state->i2c, &state->msg, 1) != 1) {
+                printk(KERN_WARNING "DiB0090 I2C read failed\n");
+                return 0;
+        }
+        return (state->i2c_read_buffer[0] << 8) | state->i2c_read_buffer[1];
+}
+
+static int dib0090_fw_write_reg(struct dib0090_fw_state *state, u8 reg, u16 val)
+{
+        state->i2c_write_buffer[0] = val >> 8;
+        state->i2c_write_buffer[1] = val & 0xff;
+
+        memset(&state->msg, 0, sizeof(struct i2c_msg));
+        state->msg.addr = reg;
+        state->msg.flags = 0;
+        state->msg.buf = state->i2c_write_buffer;
+        state->msg.len = 2;
+        if (i2c_transfer(state->i2c, &state->msg, 1) != 1) {
                 printk(KERN_WARNING "DiB0090 I2C write failed\n");
                 return -EREMOTEIO;
         }
@@ -183,89 +296,327 @@ static void dib0090_write_regs(struct dib0090_state *state, u8 r, const u16 * b,
         } while (--c);
 }
 
-static u16 dib0090_identify(struct dvb_frontend *fe)
+static int dib0090_identify(struct dvb_frontend *fe)
 {
         struct dib0090_state *state = fe->tuner_priv;
         u16 v;
+        struct dib0090_identity *identity = &state->identity;
 
         v = dib0090_read_reg(state, 0x1a);
 
-#ifdef FIRMWARE_FIREFLY
-        /* pll is not locked locked */
-        if (!(v & 0x800))
-                dprintk("FE%d : Identification : pll is not yet locked", fe->id);
-#endif
+        identity->p1g = 0;
+        identity->in_soc = 0;
+
+        dprintk("Tuner identification (Version = 0x%04x)", v);
 
         /* without PLL lock info */
-        v &= 0x3ff;
-        dprintk("P/V: %04x:", v);
+        v &= ~KROSUS_PLL_LOCKED;
 
-        if ((v >> 8) & 0xf)
-                dprintk("FE%d : Product ID = 0x%x : KROSUS", fe->id, (v >> 8) & 0xf);
-        else
-                return 0xff;
-
-        v &= 0xff;
-        if (((v >> 5) & 0x7) == 0x1)
-                dprintk("FE%d : MP001 : 9090/8096", fe->id);
-        else if (((v >> 5) & 0x7) == 0x4)
-                dprintk("FE%d : MP005 : Single Sband", fe->id);
-        else if (((v >> 5) & 0x7) == 0x6)
-                dprintk("FE%d : MP008 : diversity VHF-UHF-LBAND", fe->id);
-        else if (((v >> 5) & 0x7) == 0x7)
-                dprintk("FE%d : MP009 : diversity 29098 CBAND-UHF-LBAND-SBAND", fe->id);
-        else
-                return 0xff;
-
-        /* revision only */
-        if ((v & 0x1f) == 0x3)
-                dprintk("FE%d : P1-D/E/F detected", fe->id);
-        else if ((v & 0x1f) == 0x1)
-                dprintk("FE%d : P1C detected", fe->id);
-        else if ((v & 0x1f) == 0x0) {
-#ifdef CONFIG_TUNER_DIB0090_P1B_SUPPORT
-                dprintk("FE%d : P1-A/B detected: using previous driver - support will be removed soon", fe->id);
-                dib0090_p1b_register(fe);
-#else
-                dprintk("FE%d : P1-A/B detected: driver is deactivated - not available", fe->id);
-                return 0xff;
-#endif
+        identity->version = v & 0xff;
+        identity->product = (v >> 8) & 0xf;
+
+        if (identity->product != KROSUS)
+                goto identification_error;
+
+        if ((identity->version & 0x3) == SOC) {
+                identity->in_soc = 1;
+                switch (identity->version) {
+                case SOC_8090_P1G_11R1:
+                        dprintk("SOC 8090 P1-G11R1 Has been detected");
+                        identity->p1g = 1;
+                        break;
+                case SOC_8090_P1G_21R1:
+                        dprintk("SOC 8090 P1-G21R1 Has been detected");
+                        identity->p1g = 1;
+                        break;
+                case SOC_7090_P1G_11R1:
+                        dprintk("SOC 7090 P1-G11R1 Has been detected");
+                        identity->p1g = 1;
+                        break;
+                case SOC_7090_P1G_21R1:
+                        dprintk("SOC 7090 P1-G21R1 Has been detected");
+                        identity->p1g = 1;
+                        break;
+                default:
+                        goto identification_error;
+                }
+        } else {
+                switch ((identity->version >> 5) & 0x7) {
+                case MP001:
+                        dprintk("MP001 : 9090/8096");
+                        break;
+                case MP005:
+                        dprintk("MP005 : Single Sband");
+                        break;
+                case MP008:
+                        dprintk("MP008 : diversity VHF-UHF-LBAND");
+                        break;
+                case MP009:
+                        dprintk("MP009 : diversity 29098 CBAND-UHF-LBAND-SBAND");
+                        break;
+                default:
+                        goto identification_error;
+                }
+
+                switch (identity->version & 0x1f) {
+                case P1G_21R2:
+                        dprintk("P1G_21R2 detected");
+                        identity->p1g = 1;
+                        break;
+                case P1G:
+                        dprintk("P1G detected");
+                        identity->p1g = 1;
+                        break;
+                case P1D_E_F:
+                        dprintk("P1D/E/F detected");
+                        break;
+                case P1C:
+                        dprintk("P1C detected");
+                        break;
+                case P1A_B:
+                        dprintk("P1-A/B detected: driver is deactivated - not available");
+                        goto identification_error;
+                        break;
+                default:
+                        goto identification_error;
+                }
         }
 
-        return v;
+        return 0;
+
+identification_error:
+        return -EIO;
+}
+
+static int dib0090_fw_identify(struct dvb_frontend *fe)
+{
+        struct dib0090_fw_state *state = fe->tuner_priv;
+        struct dib0090_identity *identity = &state->identity;
+
+        u16 v = dib0090_fw_read_reg(state, 0x1a);
+        identity->p1g = 0;
+        identity->in_soc = 0;
+
+        dprintk("FE: Tuner identification (Version = 0x%04x)", v);
+
+        /* without PLL lock info */
+        v &= ~KROSUS_PLL_LOCKED;
+
+        identity->version = v & 0xff;
+        identity->product = (v >> 8) & 0xf;
+
+        if (identity->product != KROSUS)
+                goto identification_error;
+
+        if ((identity->version & 0x3) == SOC) {
+                identity->in_soc = 1;
+                switch (identity->version) {
+                case SOC_8090_P1G_11R1:
+                        dprintk("SOC 8090 P1-G11R1 Has been detected");
+                        identity->p1g = 1;
+                        break;
+                case SOC_8090_P1G_21R1:
+                        dprintk("SOC 8090 P1-G21R1 Has been detected");
+                        identity->p1g = 1;
+                        break;
+                case SOC_7090_P1G_11R1:
+                        dprintk("SOC 7090 P1-G11R1 Has been detected");
+                        identity->p1g = 1;
+                        break;
+                case SOC_7090_P1G_21R1:
+                        dprintk("SOC 7090 P1-G21R1 Has been detected");
+                        identity->p1g = 1;
+                        break;
+                default:
+                        goto identification_error;
+                }
+        } else {
+                switch ((identity->version >> 5) & 0x7) {
+                case MP001:
+                        dprintk("MP001 : 9090/8096");
+                        break;
+                case MP005:
+                        dprintk("MP005 : Single Sband");
+                        break;
+                case MP008:
+                        dprintk("MP008 : diversity VHF-UHF-LBAND");
+                        break;
+                case MP009:
+                        dprintk("MP009 : diversity 29098 CBAND-UHF-LBAND-SBAND");
+                        break;
+                default:
+                        goto identification_error;
+                }
+
+                switch (identity->version & 0x1f) {
+                case P1G_21R2:
+                        dprintk("P1G_21R2 detected");
+                        identity->p1g = 1;
+                        break;
+                case P1G:
+                        dprintk("P1G detected");
+                        identity->p1g = 1;
+                        break;
+                case P1D_E_F:
+                        dprintk("P1D/E/F detected");
+                        break;
+                case P1C:
+                        dprintk("P1C detected");
+                        break;
+                case P1A_B:
+                        dprintk("P1-A/B detected: driver is deactivated - not available");
+                        goto identification_error;
+                        break;
+                default:
+                        goto identification_error;
+                }
+        }
+
+        return 0;
+
+identification_error:
+        return -EIO;;
 }
 
 static void dib0090_reset_digital(struct dvb_frontend *fe, const struct dib0090_config *cfg)
 {
         struct dib0090_state *state = fe->tuner_priv;
+        u16 PllCfg, i, v;
 
         HARD_RESET(state);
 
-        dib0090_write_reg(state, 0x24, EN_PLL);
+        dib0090_write_reg(state, 0x24, EN_PLL | EN_CRYSTAL);
         dib0090_write_reg(state, 0x1b, EN_DIGCLK | EN_PLL | EN_CRYSTAL);        /* PLL, DIG_CLK and CRYSTAL remain */
 
-        /* adcClkOutRatio=8->7, release reset */
-        dib0090_write_reg(state, 0x20, ((cfg->io.adc_clock_ratio - 1) << 11) | (0 << 10) | (1 << 9) | (1 << 8) | (0 << 4) | 0);
+        if (!cfg->in_soc) {
+                /* adcClkOutRatio=8->7, release reset */
+                dib0090_write_reg(state, 0x20, ((cfg->io.adc_clock_ratio - 1) << 11) | (0 << 10) | (1 << 9) | (1 << 8) | (0 << 4) | 0);
+                if (cfg->clkoutdrive != 0)
+                        dib0090_write_reg(state, 0x23, (0 << 15) | ((!cfg->analog_output) << 14) | (2 << 10) | (1 << 9) | (0 << 8)
+                                          | (cfg->clkoutdrive << 5) | (cfg->clkouttobamse << 4) | (0 << 2) | (0));
+                else
+                        dib0090_write_reg(state, 0x23, (0 << 15) | ((!cfg->analog_output) << 14) | (2 << 10) | (1 << 9) | (0 << 8)
+                                          | (7 << 5) | (cfg->clkouttobamse << 4) | (0 << 2) | (0));
+        }
+
+        /* Read Pll current config * */
+        PllCfg = dib0090_read_reg(state, 0x21);
+
+        /** Reconfigure PLL if current setting is different from default setting **/
+        if ((PllCfg & 0x1FFF) != ((cfg->io.pll_range << 12) | (cfg->io.pll_loopdiv << 6) | (cfg->io.pll_prediv)) && (!cfg->in_soc)
+                        && !cfg->io.pll_bypass) {
+
+                /* Set Bypass mode */
+                PllCfg |= (1 << 15);
+                dib0090_write_reg(state, 0x21, PllCfg);
+
+                /* Set Reset Pll */
+                PllCfg &= ~(1 << 13);
+                dib0090_write_reg(state, 0x21, PllCfg);
+
+        /*** Set new Pll configuration in bypass and reset state ***/
+                PllCfg = (1 << 15) | (0 << 13) | (cfg->io.pll_range << 12) | (cfg->io.pll_loopdiv << 6) | (cfg->io.pll_prediv);
+                dib0090_write_reg(state, 0x21, PllCfg);
+
+                /* Remove Reset Pll */
+                PllCfg |= (1 << 13);
+                dib0090_write_reg(state, 0x21, PllCfg);
+
+        /*** Wait for PLL lock ***/
+                i = 100;
+                do {
+                        v = !!(dib0090_read_reg(state, 0x1a) & 0x800);
+                        if (v)
+                                break;
+                } while (--i);
+
+                if (i == 0) {
+                        dprintk("Pll: Unable to lock Pll");
+                        return;
+                }
+
+                /* Finally Remove Bypass mode */
+                PllCfg &= ~(1 << 15);
+                dib0090_write_reg(state, 0x21, PllCfg);
+        }
+
+        if (cfg->io.pll_bypass) {
+                PllCfg |= (cfg->io.pll_bypass << 15);
+                dib0090_write_reg(state, 0x21, PllCfg);
+        }
+}
+
+static int dib0090_fw_reset_digital(struct dvb_frontend *fe, const struct dib0090_config *cfg)
+{
+        struct dib0090_fw_state *state = fe->tuner_priv;
+        u16 PllCfg;
+        u16 v;
+        int i;
+
+        dprintk("fw reset digital");
+        HARD_RESET(state);
+
+        dib0090_fw_write_reg(state, 0x24, EN_PLL | EN_CRYSTAL);
+        dib0090_fw_write_reg(state, 0x1b, EN_DIGCLK | EN_PLL | EN_CRYSTAL);     /* PLL, DIG_CLK and CRYSTAL remain */
+
+        dib0090_fw_write_reg(state, 0x20,
+                        ((cfg->io.adc_clock_ratio - 1) << 11) | (0 << 10) | (1 << 9) | (1 << 8) | (cfg->data_tx_drv << 4) | cfg->ls_cfg_pad_drv);
+
+        v = (0 << 15) | ((!cfg->analog_output) << 14) | (1 << 9) | (0 << 8) | (cfg->clkouttobamse << 4) | (0 << 2) | (0);
         if (cfg->clkoutdrive != 0)
-                dib0090_write_reg(state, 0x23,
-                                  (0 << 15) | ((!cfg->analog_output) << 14) | (1 << 10) | (1 << 9) | (0 << 8) | (cfg->clkoutdrive << 5) | (cfg->
-                                                                                                                                           clkouttobamse
-                                                                                                                                           << 4) | (0
-                                                                                                                                                    <<
-                                                                                                                                                    2)
-                                  | (0));
+                v |= cfg->clkoutdrive << 5;
         else
-                dib0090_write_reg(state, 0x23,
-                                  (0 << 15) | ((!cfg->analog_output) << 14) | (1 << 10) | (1 << 9) | (0 << 8) | (7 << 5) | (cfg->
-                                                                                                                            clkouttobamse << 4) | (0
-                                                                                                                                                   <<
-                                                                                                                                                   2)
-                                  | (0));
+                v |= 7 << 5;
+
+        v |= 2 << 10;
+        dib0090_fw_write_reg(state, 0x23, v);
+
+        /* Read Pll current config * */
+        PllCfg = dib0090_fw_read_reg(state, 0x21);
+
+        /** Reconfigure PLL if current setting is different from default setting **/
+        if ((PllCfg & 0x1FFF) != ((cfg->io.pll_range << 12) | (cfg->io.pll_loopdiv << 6) | (cfg->io.pll_prediv)) && !cfg->io.pll_bypass) {
+
+                /* Set Bypass mode */
+                PllCfg |= (1 << 15);
+                dib0090_fw_write_reg(state, 0x21, PllCfg);
+
+                /* Set Reset Pll */
+                PllCfg &= ~(1 << 13);
+                dib0090_fw_write_reg(state, 0x21, PllCfg);
+
+        /*** Set new Pll configuration in bypass and reset state ***/
+                PllCfg = (1 << 15) | (0 << 13) | (cfg->io.pll_range << 12) | (cfg->io.pll_loopdiv << 6) | (cfg->io.pll_prediv);
+                dib0090_fw_write_reg(state, 0x21, PllCfg);
 
-        /* enable pll, de-activate reset, ratio: 2/1 = 60MHz */
-        dib0090_write_reg(state, 0x21,
-                          (cfg->io.pll_bypass << 15) | (1 << 13) | (cfg->io.pll_range << 12) | (cfg->io.pll_loopdiv << 6) | (cfg->io.pll_prediv));
+                /* Remove Reset Pll */
+                PllCfg |= (1 << 13);
+                dib0090_fw_write_reg(state, 0x21, PllCfg);
 
+        /*** Wait for PLL lock ***/
+                i = 100;
+                do {
+                        v = !!(dib0090_fw_read_reg(state, 0x1a) & 0x800);
+                        if (v)
+                                break;
+                } while (--i);
+
+                if (i == 0) {
+                        dprintk("Pll: Unable to lock Pll");
+                        return -EIO;
+                }
+
+                /* Finally Remove Bypass mode */
+                PllCfg &= ~(1 << 15);
+                dib0090_fw_write_reg(state, 0x21, PllCfg);
+        }
+
+        if (cfg->io.pll_bypass) {
+                PllCfg |= (cfg->io.pll_bypass << 15);
+                dib0090_fw_write_reg(state, 0x21, PllCfg);
+        }
+
+        return dib0090_fw_identify(fe);
 }
 
 static int dib0090_wakeup(struct dvb_frontend *fe)
@@ -273,6 +624,9 @@ static int dib0090_wakeup(struct dvb_frontend *fe)
         struct dib0090_state *state = fe->tuner_priv;
         if (state->config->sleep)
                 state->config->sleep(fe, 0);
+
+        /* enable dataTX in case we have been restarted in the wrong moment */
+        dib0090_write_reg(state, 0x23, dib0090_read_reg(state, 0x23) | (1 << 14));
         return 0;
 }
 
@@ -292,8 +646,75 @@ void dib0090_dcc_freq(struct dvb_frontend *fe, u8 fast)
         else
                 dib0090_write_reg(state, 0x04, 1);
 }
+
 EXPORT_SYMBOL(dib0090_dcc_freq);
 
+static const u16 bb_ramp_pwm_normal_socs[] = {
+        550,                    /* max BB gain in 10th of dB */
+        (1 << 9) | 8,           /* ramp_slope = 1dB of gain -> clock_ticks_per_db = clk_khz / ramp_slope -> BB_RAMP2 */
+        440,
+        (4 << 9) | 0,           /* BB_RAMP3 = 26dB */
+        (0 << 9) | 208,         /* BB_RAMP4 */
+        (4 << 9) | 208,         /* BB_RAMP5 = 29dB */
+        (0 << 9) | 440,         /* BB_RAMP6 */
+};
+
+static const u16 rf_ramp_pwm_cband_7090[] = {
+        280,                    /* max RF gain in 10th of dB */
+        18,                     /* ramp_slope = 1dB of gain -> clock_ticks_per_db = clk_khz / ramp_slope -> RF_RAMP2 */
+        504,                    /* ramp_max = maximum X used on the ramp */
+        (29 << 10) | 364,       /* RF_RAMP5, LNA 1 = 8dB */
+        (0 << 10) | 504,        /* RF_RAMP6, LNA 1 */
+        (60 << 10) | 228,       /* RF_RAMP7, LNA 2 = 7.7dB */
+        (0 << 10) | 364,        /* RF_RAMP8, LNA 2 */
+        (34 << 10) | 109,       /* GAIN_4_1, LNA 3 = 6.8dB */
+        (0 << 10) | 228,        /* GAIN_4_2, LNA 3 */
+        (37 << 10) | 0,         /* RF_RAMP3, LNA 4 = 6.2dB */
+        (0 << 10) | 109,        /* RF_RAMP4, LNA 4 */
+};
+
+static const u16 rf_ramp_pwm_cband_8090[] = {
+        345,                    /* max RF gain in 10th of dB */
+        29,                     /* ramp_slope = 1dB of gain -> clock_ticks_per_db = clk_khz / ramp_slope -> RF_RAMP2 */
+        1000,                   /* ramp_max = maximum X used on the ramp */
+        (35 << 10) | 772,       /* RF_RAMP3, LNA 1 = 8dB */
+        (0 << 10) | 1000,       /* RF_RAMP4, LNA 1 */
+        (58 << 10) | 496,       /* RF_RAMP5, LNA 2 = 9.5dB */
+        (0 << 10) | 772,        /* RF_RAMP6, LNA 2 */
+        (27 << 10) | 200,       /* RF_RAMP7, LNA 3 = 10.5dB */
+        (0 << 10) | 496,        /* RF_RAMP8, LNA 3 */
+        (40 << 10) | 0,         /* GAIN_4_1, LNA 4 = 7dB */
+        (0 << 10) | 200,        /* GAIN_4_2, LNA 4 */
+};
+
+static const u16 rf_ramp_pwm_uhf_7090[] = {
+        407,                    /* max RF gain in 10th of dB */
+        13,                     /* ramp_slope = 1dB of gain -> clock_ticks_per_db = clk_khz / ramp_slope -> RF_RAMP2 */
+        529,                    /* ramp_max = maximum X used on the ramp */
+        (23 << 10) | 0,         /* RF_RAMP3, LNA 1 = 14.7dB */
+        (0 << 10) | 176,        /* RF_RAMP4, LNA 1 */
+        (63 << 10) | 400,       /* RF_RAMP5, LNA 2 = 8dB */
+        (0 << 10) | 529,        /* RF_RAMP6, LNA 2 */
+        (48 << 10) | 316,       /* RF_RAMP7, LNA 3 = 6.8dB */
+        (0 << 10) | 400,        /* RF_RAMP8, LNA 3 */
+        (29 << 10) | 176,       /* GAIN_4_1, LNA 4 = 11.5dB */
+        (0 << 10) | 316,        /* GAIN_4_2, LNA 4 */
+};
+
+static const u16 rf_ramp_pwm_uhf_8090[] = {
+        388,                    /* max RF gain in 10th of dB */
+        26,                     /* ramp_slope = 1dB of gain -> clock_ticks_per_db = clk_khz / ramp_slope -> RF_RAMP2 */
+        1008,                   /* ramp_max = maximum X used on the ramp */
+        (11 << 10) | 0,         /* RF_RAMP3, LNA 1 = 14.7dB */
+        (0 << 10) | 369,        /* RF_RAMP4, LNA 1 */
+        (41 << 10) | 809,       /* RF_RAMP5, LNA 2 = 8dB */
+        (0 << 10) | 1008,       /* RF_RAMP6, LNA 2 */
+        (27 << 10) | 659,       /* RF_RAMP7, LNA 3 = 6dB */
+        (0 << 10) | 809,        /* RF_RAMP8, LNA 3 */
+        (14 << 10) | 369,       /* GAIN_4_1, LNA 4 = 11.5dB */
+        (0 << 10) | 659,        /* GAIN_4_2, LNA 4 */
+};
+
 static const u16 rf_ramp_pwm_cband[] = {
         0,                      /* max RF gain in 10th of dB */
         0,                      /* ramp_slope = 1dB of gain -> clock_ticks_per_db = clk_khz / ramp_slope -> 0x2b */
@@ -326,6 +747,16 @@ static const u16 rf_ramp_uhf[] = {
         0, 0, 127,              /* CBAND :  0.0 dB */
 };
 
+static const u16 rf_ramp_cband_broadmatching[] =        /* for p1G only */
+{
+        314,                    /* Calibrated at 200MHz order has been changed g4-g3-g2-g1 */
+        84, 314, 127,           /* LNA1 */
+        80, 230, 255,           /* LNA2 */
+        80, 150, 127,           /* LNA3  It was measured 12dB, do not lock if 120 */
+        70, 70, 127,            /* LNA4 */
+        0, 0, 127,              /* CBAND */
+};
+
 static const u16 rf_ramp_cband[] = {
         332,                    /* max RF gain in 10th of dB */
         132, 252, 127,          /* LNA1,  dB */
@@ -380,8 +811,8 @@ static const u16 bb_ramp_pwm_normal[] = {
 };
 
 struct slope {
-        int16_t range;
-        int16_t slope;
+        s16 range;
+        s16 slope;
 };
 static u16 slopes_to_scale(const struct slope *slopes, u8 num, s16 val)
 {
@@ -597,19 +1028,39 @@ void dib0090_pwm_gain_reset(struct dvb_frontend *fe)
 #endif
 #ifdef CONFIG_BAND_CBAND
                 if (state->current_band == BAND_CBAND) {
-                        dib0090_set_rframp_pwm(state, rf_ramp_pwm_cband);
-                        dib0090_set_bbramp_pwm(state, bb_ramp_pwm_normal);
+                        if (state->identity.in_soc) {
+                                dib0090_set_bbramp_pwm(state, bb_ramp_pwm_normal_socs);
+                                if (state->identity.version == SOC_8090_P1G_11R1 || state->identity.version == SOC_8090_P1G_21R1)
+                                        dib0090_set_rframp_pwm(state, rf_ramp_pwm_cband_8090);
+                                else if (state->identity.version == SOC_7090_P1G_11R1 || state->identity.version == SOC_7090_P1G_21R1)
+                                        dib0090_set_rframp_pwm(state, rf_ramp_pwm_cband_7090);
+                        } else {
+                                dib0090_set_rframp_pwm(state, rf_ramp_pwm_cband);
+                                dib0090_set_bbramp_pwm(state, bb_ramp_pwm_normal);
+                        }
                 } else
 #endif
 #ifdef CONFIG_BAND_VHF
                 if (state->current_band == BAND_VHF) {
-                        dib0090_set_rframp_pwm(state, rf_ramp_pwm_vhf);
-                        dib0090_set_bbramp_pwm(state, bb_ramp_pwm_normal);
+                        if (state->identity.in_soc) {
+                                dib0090_set_bbramp_pwm(state, bb_ramp_pwm_normal_socs);
+                        } else {
+                                dib0090_set_rframp_pwm(state, rf_ramp_pwm_vhf);
+                                dib0090_set_bbramp_pwm(state, bb_ramp_pwm_normal);
+                        }
                 } else
 #endif
                 {
-                        dib0090_set_rframp_pwm(state, rf_ramp_pwm_uhf);
-                        dib0090_set_bbramp_pwm(state, bb_ramp_pwm_normal);
+                        if (state->identity.in_soc) {
+                                if (state->identity.version == SOC_8090_P1G_11R1 || state->identity.version == SOC_8090_P1G_21R1)
+                                        dib0090_set_rframp_pwm(state, rf_ramp_pwm_uhf_8090);
+                                else if (state->identity.version == SOC_7090_P1G_11R1 || state->identity.version == SOC_7090_P1G_21R1)
+                                        dib0090_set_rframp_pwm(state, rf_ramp_pwm_uhf_7090);
+                                dib0090_set_bbramp_pwm(state, bb_ramp_pwm_normal_socs);
+                        } else {
+                                dib0090_set_rframp_pwm(state, rf_ramp_pwm_uhf);
+                                dib0090_set_bbramp_pwm(state, bb_ramp_pwm_normal);
+                        }
                 }
 
                 if (state->rf_ramp[0] != 0)
@@ -617,11 +1068,21 @@ void dib0090_pwm_gain_reset(struct dvb_frontend *fe)
                 else
                         dib0090_write_reg(state, 0x32, (0 << 11));
 
+                dib0090_write_reg(state, 0x04, 0x01);
                 dib0090_write_reg(state, 0x39, (1 << 10));
         }
 }
+
 EXPORT_SYMBOL(dib0090_pwm_gain_reset);
 
+static u32 dib0090_get_slow_adc_val(struct dib0090_state *state)
+{
+        u16 adc_val = dib0090_read_reg(state, 0x1d);
+        if (state->identity.in_soc)
+                adc_val >>= 2;
+        return adc_val;
+}
+
 int dib0090_gain_control(struct dvb_frontend *fe)
 {
         struct dib0090_state *state = fe->tuner_priv;
@@ -643,18 +1104,21 @@ int dib0090_gain_control(struct dvb_frontend *fe)
                 } else
 #endif
 #ifdef CONFIG_BAND_VHF
-                if (state->current_band == BAND_VHF) {
+                if (state->current_band == BAND_VHF && !state->identity.p1g) {
                         dib0090_set_rframp(state, rf_ramp_vhf);
                         dib0090_set_bbramp(state, bb_ramp_boost);
                 } else
 #endif
 #ifdef CONFIG_BAND_CBAND
-                if (state->current_band == BAND_CBAND) {
+                if (state->current_band == BAND_CBAND && !state->identity.p1g) {
                         dib0090_set_rframp(state, rf_ramp_cband);
                         dib0090_set_bbramp(state, bb_ramp_boost);
                 } else
 #endif
-                {
+                if ((state->current_band == BAND_CBAND || state->current_band == BAND_VHF) && state->identity.p1g) {
+                        dib0090_set_rframp(state, rf_ramp_cband_broadmatching);
+                        dib0090_set_bbramp(state, bb_ramp_boost);
+                } else {
                         dib0090_set_rframp(state, rf_ramp_uhf);
                         dib0090_set_bbramp(state, bb_ramp_boost);
                 }
@@ -669,17 +1133,25 @@ int dib0090_gain_control(struct dvb_frontend *fe)
 
                 *tune_state = CT_AGC_STEP_0;
         } else if (!state->agc_freeze) {
-                s16 wbd;
+                s16 wbd = 0, i, cnt;
 
                 int adc;
-                wbd_val = dib0090_read_reg(state, 0x1d);
+                wbd_val = dib0090_get_slow_adc_val(state);
 
-                /* read and calc the wbd power */
-                wbd = dib0090_wbd_to_db(state, wbd_val);
+                if (*tune_state == CT_AGC_STEP_0)
+                        cnt = 5;
+                else
+                        cnt = 1;
+
+                for (i = 0; i < cnt; i++) {
+                        wbd_val = dib0090_get_slow_adc_val(state);
+                        wbd += dib0090_wbd_to_db(state, wbd_val);
+                }
+                wbd /= cnt;
                 wbd_error = state->wbd_target - wbd;
 
                 if (*tune_state == CT_AGC_STEP_0) {
-                        if (wbd_error < 0 && state->rf_gain_limit > 0) {
+                        if (wbd_error < 0 && state->rf_gain_limit > 0 && !state->identity.p1g) {
 #ifdef CONFIG_BAND_CBAND
                                 /* in case of CBAND tune reduce first the lt_gain2 before adjusting the RF gain */
                                 u8 ltg2 = (state->rf_lt_def >> 10) & 0x7;
@@ -700,39 +1172,39 @@ int dib0090_gain_control(struct dvb_frontend *fe)
                         adc_error = (s16) (((s32) ADC_TARGET) - adc);
 #ifdef CONFIG_STANDARD_DAB
                         if (state->fe->dtv_property_cache.delivery_system == STANDARD_DAB)
-                                adc_error += 130;
+                                adc_error -= 10;
 #endif
 #ifdef CONFIG_STANDARD_DVBT
                         if (state->fe->dtv_property_cache.delivery_system == STANDARD_DVBT &&
-                            (state->fe->dtv_property_cache.modulation == QAM_64 || state->fe->dtv_property_cache.modulation == QAM_16))
+                                        (state->fe->dtv_property_cache.modulation == QAM_64 || state->fe->dtv_property_cache.modulation == QAM_16))
                                 adc_error += 60;
 #endif
 #ifdef CONFIG_SYS_ISDBT
                         if ((state->fe->dtv_property_cache.delivery_system == SYS_ISDBT) && (((state->fe->dtv_property_cache.layer[0].segment_count >
-                                                                                               0)
-                                                                                              &&
-                                                                                              ((state->fe->dtv_property_cache.layer[0].modulation ==
-                                                                                                QAM_64)
-                                                                                               || (state->fe->dtv_property_cache.layer[0].
-                                                                                                   modulation == QAM_16)))
-                                                                                             ||
-                                                                                             ((state->fe->dtv_property_cache.layer[1].segment_count >
-                                                                                               0)
-                                                                                              &&
-                                                                                              ((state->fe->dtv_property_cache.layer[1].modulation ==
-                                                                                                QAM_64)
-                                                                                               || (state->fe->dtv_property_cache.layer[1].
-                                                                                                   modulation == QAM_16)))
-                                                                                             ||
-                                                                                             ((state->fe->dtv_property_cache.layer[2].segment_count >
-                                                                                               0)
-                                                                                              &&
-                                                                                              ((state->fe->dtv_property_cache.layer[2].modulation ==
-                                                                                                QAM_64)
-                                                                                               || (state->fe->dtv_property_cache.layer[2].
-                                                                                                   modulation == QAM_16)))
-                            )
-                            )
+                                                                0)
+                                                        &&
+                                                        ((state->fe->dtv_property_cache.layer[0].modulation ==
+                                                          QAM_64)
+                                                         || (state->fe->dtv_property_cache.
+                                                                 layer[0].modulation == QAM_16)))
+                                                ||
+                                                ((state->fe->dtv_property_cache.layer[1].segment_count >
+                                                  0)
+                                                 &&
+                                                 ((state->fe->dtv_property_cache.layer[1].modulation ==
+                                                   QAM_64)
+                                                  || (state->fe->dtv_property_cache.
+                                                          layer[1].modulation == QAM_16)))
+                                                ||
+                                                ((state->fe->dtv_property_cache.layer[2].segment_count >
+                                                  0)
+                                                 &&
+                                                 ((state->fe->dtv_property_cache.layer[2].modulation ==
+                                                   QAM_64)
+                                                  || (state->fe->dtv_property_cache.
+                                                          layer[2].modulation == QAM_16)))
+                                                )
+                                )
                                 adc_error += 60;
 #endif
 
@@ -760,9 +1232,9 @@ int dib0090_gain_control(struct dvb_frontend *fe)
                 }
 #ifdef DEBUG_AGC
                 dprintk
-                    ("FE: %d, tune state %d, ADC = %3ddB (ADC err %3d) WBD %3ddB (WBD err %3d, WBD val SADC: %4d), RFGainLimit (TOP): %3d, signal: %3ddBm",
-                     (u32) fe->id, (u32) *tune_state, (u32) adc, (u32) adc_error, (u32) wbd, (u32) wbd_error, (u32) wbd_val,
-                     (u32) state->rf_gain_limit >> WBD_ALPHA, (s32) 200 + adc - (state->current_gain >> GAIN_ALPHA));
+                        ("tune state %d, ADC = %3ddB (ADC err %3d) WBD %3ddB (WBD err %3d, WBD val SADC: %4d), RFGainLimit (TOP): %3d, signal: %3ddBm",
+                         (u32) *tune_state, (u32) adc, (u32) adc_error, (u32) wbd, (u32) wbd_error, (u32) wbd_val,
+                         (u32) state->rf_gain_limit >> WBD_ALPHA, (s32) 200 + adc - (state->current_gain >> GAIN_ALPHA));
 #endif
         }
 
@@ -771,6 +1243,7 @@ int dib0090_gain_control(struct dvb_frontend *fe)
                 dib0090_gain_apply(state, adc_error, wbd_error, apply_gain_immediatly);
         return ret;
 }
+
 EXPORT_SYMBOL(dib0090_gain_control);
 
 void dib0090_get_current_gain(struct dvb_frontend *fe, u16 * rf, u16 * bb, u16 * rf_gain_limit, u16 * rflt)
@@ -785,13 +1258,47 @@ void dib0090_get_current_gain(struct dvb_frontend *fe, u16 * rf, u16 * bb, u16 *
         if (rflt)
                 *rflt = (state->rf_lt_def >> 10) & 0x7;
 }
+
 EXPORT_SYMBOL(dib0090_get_current_gain);
 
-u16 dib0090_get_wbd_offset(struct dvb_frontend *tuner)
+u16 dib0090_get_wbd_offset(struct dvb_frontend *fe)
 {
-        struct dib0090_state *st = tuner->tuner_priv;
-        return st->wbd_offset;
+        struct dib0090_state *state = fe->tuner_priv;
+        u32 f_MHz = state->fe->dtv_property_cache.frequency / 1000000;
+        s32 current_temp = state->temperature;
+        s32 wbd_thot, wbd_tcold;
+        const struct dib0090_wbd_slope *wbd = state->current_wbd_table;
+
+        while (f_MHz > wbd->max_freq)
+                wbd++;
+
+        dprintk("using wbd-table-entry with max freq %d", wbd->max_freq);
+
+        if (current_temp < 0)
+                current_temp = 0;
+        if (current_temp > 128)
+                current_temp = 128;
+
+        state->wbdmux &= ~(7 << 13);
+        if (wbd->wbd_gain != 0)
+                state->wbdmux |= (wbd->wbd_gain << 13);
+        else
+                state->wbdmux |= (4 << 13);
+
+        dib0090_write_reg(state, 0x10, state->wbdmux);
+
+        wbd_thot = wbd->offset_hot - (((u32) wbd->slope_hot * f_MHz) >> 6);
+        wbd_tcold = wbd->offset_cold - (((u32) wbd->slope_cold * f_MHz) >> 6);
+
+        wbd_tcold += ((wbd_thot - wbd_tcold) * current_temp) >> 7;
+
+        state->wbd_target = dib0090_wbd_to_db(state, state->wbd_offset + wbd_tcold);
+        dprintk("wbd-target: %d dB", (u32) state->wbd_target);
+        dprintk("wbd offset applied is %d", wbd_tcold);
+
+        return state->wbd_offset + wbd_tcold;
 }
+
 EXPORT_SYMBOL(dib0090_get_wbd_offset);
 
 static const u16 dib0090_defaults[] = {
@@ -801,7 +1308,7 @@ static const u16 dib0090_defaults[] = {
         0x99a0,
         0x6008,
         0x0000,
-        0x8acb,
+        0x8bcb,
         0x0000,
         0x0405,
         0x0000,
@@ -829,8 +1336,6 @@ static const u16 dib0090_defaults[] = {
         1, 0x39,
         0x0000,
 
-        1, 0x1b,
-        EN_IQADC | EN_BB | EN_BIAS | EN_DIGCLK | EN_PLL | EN_CRYSTAL,
         2, 0x1e,
         0x07FF,
         0x0007,
@@ -844,50 +1349,125 @@ static const u16 dib0090_defaults[] = {
         0
 };
 
-static int dib0090_reset(struct dvb_frontend *fe)
-{
-        struct dib0090_state *state = fe->tuner_priv;
-        u16 l, r, *n;
+static const u16 dib0090_p1g_additionnal_defaults[] = {
+        1, 0x05,
+        0xabcd,
 
-        dib0090_reset_digital(fe, state->config);
-        state->revision = dib0090_identify(fe);
+        1, 0x11,
+        0x00b4,
 
-        /* Revision definition */
-        if (state->revision == 0xff)
-                return -EINVAL;
-#ifdef EFUSE
-        else if ((state->revision & 0x1f) >= 3) /* Update the efuse : Only available for KROSUS > P1C */
-                dib0090_set_EFUSE(state);
-#endif
+        1, 0x1c,
+        0xfffd,
 
-#ifdef CONFIG_TUNER_DIB0090_P1B_SUPPORT
-        if (!(state->revision & 0x1))   /* it is P1B - reset is already done */
-                return 0;
-#endif
+        1, 0x40,
+        0x108,
+        0
+};
+
+static void dib0090_set_default_config(struct dib0090_state *state, const u16 * n)
+{
+        u16 l, r;
 
-        /* Upload the default values */
-        n = (u16 *) dib0090_defaults;
         l = pgm_read_word(n++);
         while (l) {
                 r = pgm_read_word(n++);
                 do {
-                        /* DEBUG_TUNER */
-                        /* dprintk("%d, %d, %d", l, r, pgm_read_word(n)); */
                         dib0090_write_reg(state, r, pgm_read_word(n++));
                         r++;
                 } while (--l);
                 l = pgm_read_word(n++);
         }
+}
+
+#define CAP_VALUE_MIN (u8)  9
+#define CAP_VALUE_MAX (u8) 40
+#define HR_MIN        (u8) 25
+#define HR_MAX        (u8) 40
+#define POLY_MIN      (u8)  0
+#define POLY_MAX      (u8)  8
+
+void dib0090_set_EFUSE(struct dib0090_state *state)
+{
+        u8 c, h, n;
+        u16 e2, e4;
+        u16 cal;
+
+        e2 = dib0090_read_reg(state, 0x26);
+        e4 = dib0090_read_reg(state, 0x28);
+
+        if ((state->identity.version == P1D_E_F) ||
+                        (state->identity.version == P1G) || (e2 == 0xffff)) {
+
+                dib0090_write_reg(state, 0x22, 0x10);
+                cal = (dib0090_read_reg(state, 0x22) >> 6) & 0x3ff;
+
+                if ((cal < 670) || (cal == 1023))
+                        cal = 850;
+                n = 165 - ((cal * 10)>>6) ;
+                e2 = e4 = (3<<12) | (34<<6) | (n);
+        }
+
+        if (e2 != e4)
+                e2 &= e4; /* Remove the redundancy  */
+
+        if (e2 != 0xffff) {
+                c = e2 & 0x3f;
+                n = (e2 >> 12) & 0xf;
+                h = (e2 >> 6) & 0x3f;
+
+                if ((c >= CAP_VALUE_MAX) || (c <= CAP_VALUE_MIN))
+                        c = 32;
+                if ((h >= HR_MAX) || (h <= HR_MIN))
+                        h = 34;
+                if ((n >= POLY_MAX) || (n <= POLY_MIN))
+                        n = 3;
+
+                dib0090_write_reg(state, 0x13, (h << 10)) ;
+                e2 = (n<<11) | ((h>>2)<<6) | (c);
+                dib0090_write_reg(state, 0x2, e2) ; /* Load the BB_2 */
+        }
+}
+
+static int dib0090_reset(struct dvb_frontend *fe)
+{
+        struct dib0090_state *state = fe->tuner_priv;
+
+        dib0090_reset_digital(fe, state->config);
+        if (dib0090_identify(fe) < 0)
+                return -EIO;
+
+#ifdef CONFIG_TUNER_DIB0090_P1B_SUPPORT
+        if (!(state->identity.version & 0x1))   /* it is P1B - reset is already done */
+                return 0;
+#endif
+
+        if (!state->identity.in_soc) {
+                if ((dib0090_read_reg(state, 0x1a) >> 5) & 0x2)
+                        dib0090_write_reg(state, 0x1b, (EN_IQADC | EN_BB | EN_BIAS | EN_DIGCLK | EN_PLL | EN_CRYSTAL));
+                else
+                        dib0090_write_reg(state, 0x1b, (EN_DIGCLK | EN_PLL | EN_CRYSTAL));
+        }
+
+        dib0090_set_default_config(state, dib0090_defaults);
+
+        if (state->identity.in_soc)
+                dib0090_write_reg(state, 0x18, 0x2910);  /* charge pump current = 0 */
+
+        if (state->identity.p1g)
+                dib0090_set_default_config(state, dib0090_p1g_additionnal_defaults);
+
+        /* Update the efuse : Only available for KROSUS > P1C  and SOC as well*/
+        if (((state->identity.version & 0x1f) >= P1D_E_F) || (state->identity.in_soc))
+                dib0090_set_EFUSE(state);
 
         /* Congigure in function of the crystal */
         if (state->config->io.clock_khz >= 24000)
-                l = 1;
+                dib0090_write_reg(state, 0x14, 1);
         else
-                l = 2;
-        dib0090_write_reg(state, 0x14, l);
+                dib0090_write_reg(state, 0x14, 2);
         dprintk("Pll lock : %d", (dib0090_read_reg(state, 0x1a) >> 11) & 0x1);
 
-        state->reset = 3;       /* enable iq-offset-calibration and wbd-calibration when tuning next time */
+        state->calibrate = DC_CAL | WBD_CAL | TEMP_CAL; /* enable iq-offset-calibration and wbd-calibration when tuning next time */
 
         return 0;
 }
@@ -927,11 +1507,11 @@ static int dib0090_get_offset(struct dib0090_state *state, enum frontend_tune_st
 }
 
 struct dc_calibration {
-        uint8_t addr;
-        uint8_t offset;
-        uint8_t pga:1;
-        uint16_t bb1;
-        uint8_t i:1;
+        u8 addr;
+        u8 offset;
+        u8 pga:1;
+        u16 bb1;
+        u8 i:1;
 };
 
 static const struct dc_calibration dc_table[] = {
@@ -944,6 +1524,17 @@ static const struct dc_calibration dc_table[] = {
         {0},
 };
 
+static const struct dc_calibration dc_p1g_table[] = {
+        /* Step1 BB gain1= 26 with boost 1, gain 2 = 0 */
+        /* addr ; trim reg offset ; pga ; CTRL_BB1 value ; i or q */
+        {0x06, 5, 1, (1 << 13) | (0 << 8) | (15 << 3), 1},
+        {0x07, 11, 1, (1 << 13) | (0 << 8) | (15 << 3), 0},
+        /* Step 2 BB gain 1 = 26 with boost = 1 & gain 2 = 29 */
+        {0x06, 0, 0, (1 << 13) | (29 << 8) | (15 << 3), 1},
+        {0x06, 10, 0, (1 << 13) | (29 << 8) | (15 << 3), 0},
+        {0},
+};
+
 static void dib0090_set_trim(struct dib0090_state *state)
 {
         u16 *val;
@@ -962,41 +1553,45 @@ static void dib0090_set_trim(struct dib0090_state *state)
 static int dib0090_dc_offset_calibration(struct dib0090_state *state, enum frontend_tune_state *tune_state)
 {
         int ret = 0;
+        u16 reg;
 
         switch (*tune_state) {
-
         case CT_TUNER_START:
-                /* init */
-                dprintk("Internal DC calibration");
-
-                /* the LNA is off */
-                dib0090_write_reg(state, 0x24, 0x02ed);
+                dprintk("Start DC offset calibration");
 
                 /* force vcm2 = 0.8V */
                 state->bb6 = 0;
                 state->bb7 = 0x040d;
 
+                /* the LNA AND LO are off */
+                reg = dib0090_read_reg(state, 0x24) & 0x0ffb;   /* shutdown lna and lo */
+                dib0090_write_reg(state, 0x24, reg);
+
+                state->wbdmux = dib0090_read_reg(state, 0x10);
+                dib0090_write_reg(state, 0x10, (state->wbdmux & ~(0xff << 3)) | (0x7 << 3) | 0x3);
+                dib0090_write_reg(state, 0x23, dib0090_read_reg(state, 0x23) & ~(1 << 14));
+
                 state->dc = dc_table;
 
+                if (state->identity.p1g)
+                        state->dc = dc_p1g_table;
                 *tune_state = CT_TUNER_STEP_0;
 
                 /* fall through */
 
         case CT_TUNER_STEP_0:
+                dprintk("Sart/continue DC calibration for %s path", (state->dc->i == 1) ? "I" : "Q");
                 dib0090_write_reg(state, 0x01, state->dc->bb1);
                 dib0090_write_reg(state, 0x07, state->bb7 | (state->dc->i << 7));
 
                 state->step = 0;
-
                 state->min_adc_diff = 1023;
-
                 *tune_state = CT_TUNER_STEP_1;
                 ret = 50;
                 break;
 
         case CT_TUNER_STEP_1:
                 dib0090_set_trim(state);
-
                 *tune_state = CT_TUNER_STEP_2;
                 break;
 
@@ -1007,7 +1602,13 @@ static int dib0090_dc_offset_calibration(struct dib0090_state *state, enum front
                 break;
 
         case CT_TUNER_STEP_5:   /* found an offset */
-                dprintk("FE%d: IQC read=%d, current=%x", state->fe->id, (u32) state->adc_diff, state->step);
+                dprintk("adc_diff = %d, current step= %d", (u32) state->adc_diff, state->step);
+                if (state->step == 0 && state->adc_diff < 0) {
+                        state->min_adc_diff = -1023;
+                        dprintk("Change of sign of the minimum adc diff");
+                }
+
+                dprintk("adc_diff = %d, min_adc_diff = %d current_step = %d", state->adc_diff, state->min_adc_diff, state->step);
 
                 /* first turn for this frequency */
                 if (state->step == 0) {
@@ -1017,20 +1618,21 @@ static int dib0090_dc_offset_calibration(struct dib0090_state *state, enum front
                                 state->step = 0x10;
                 }
 
-                state->adc_diff = ABS(state->adc_diff);
-
-                if (state->adc_diff < state->min_adc_diff && steps(state->step) < 15) { /* stop search when the delta to 0 is increasing */
+                /* Look for a change of Sign in the Adc_diff.min_adc_diff is used to STORE the setp N-1 */
+                if ((state->adc_diff & 0x8000) == (state->min_adc_diff & 0x8000) && steps(state->step) < 15) {
+                        /* stop search when the delta the sign is changing and Steps =15 and Step=0 is force for continuance */
                         state->step++;
                         state->min_adc_diff = state->adc_diff;
                         *tune_state = CT_TUNER_STEP_1;
                 } else {
-
                         /* the minimum was what we have seen in the step before */
-                        state->step--;
-                        dib0090_set_trim(state);
+                        if (ABS(state->adc_diff) > ABS(state->min_adc_diff)) {
+                                dprintk("Since adc_diff N = %d  > adc_diff step N-1 = %d, Come back one step", state->adc_diff, state->min_adc_diff);
+                                state->step--;
+                        }
 
-                        dprintk("FE%d: BB Offset Cal, BBreg=%hd,Offset=%hd,Value Set=%hd", state->fe->id, state->dc->addr, state->adc_diff,
-                                state->step);
+                        dib0090_set_trim(state);
+                        dprintk("BB Offset Cal, BBreg=%hd,Offset=%hd,Value Set=%hd", state->dc->addr, state->adc_diff, state->step);
 
                         state->dc++;
                         if (state->dc->addr == 0)       /* done */
@@ -1045,7 +1647,7 @@ static int dib0090_dc_offset_calibration(struct dib0090_state *state, enum front
                 dib0090_write_reg(state, 0x07, state->bb7 & ~0x0008);
                 dib0090_write_reg(state, 0x1f, 0x7);
                 *tune_state = CT_TUNER_START;   /* reset done -> real tuning can now begin */
-                state->reset &= ~0x1;
+                state->calibrate &= ~DC_CAL;
         default:
                 break;
         }
@@ -1054,21 +1656,43 @@ static int dib0090_dc_offset_calibration(struct dib0090_state *state, enum front
 
 static int dib0090_wbd_calibration(struct dib0090_state *state, enum frontend_tune_state *tune_state)
 {
+        u8 wbd_gain;
+        const struct dib0090_wbd_slope *wbd = state->current_wbd_table;
+
         switch (*tune_state) {
         case CT_TUNER_START:
-                /* WBD-mode=log, Bias=2, Gain=6, Testmode=1, en=1, WBDMUX=1 */
-                dib0090_write_reg(state, 0x10, 0xdb09 | (1 << 10));
-                dib0090_write_reg(state, 0x24, EN_UHF & 0x0fff);
+                while (state->current_rf / 1000 > wbd->max_freq)
+                        wbd++;
+                if (wbd->wbd_gain != 0)
+                        wbd_gain = wbd->wbd_gain;
+                else {
+                        wbd_gain = 4;
+#if defined(CONFIG_BAND_LBAND) || defined(CONFIG_BAND_SBAND)
+                        if ((state->current_band == BAND_LBAND) || (state->current_band == BAND_SBAND))
+                                wbd_gain = 2;
+#endif
+                }
+
+                if (wbd_gain == state->wbd_calibration_gain) {  /* the WBD calibration has already been done */
+                        *tune_state = CT_TUNER_START;
+                        state->calibrate &= ~WBD_CAL;
+                        return 0;
+                }
+
+                dib0090_write_reg(state, 0x10, 0x1b81 | (1 << 10) | (wbd_gain << 13) | (1 << 3));
 
+                dib0090_write_reg(state, 0x24, ((EN_UHF & 0x0fff) | (1 << 1)));
                 *tune_state = CT_TUNER_STEP_0;
+                state->wbd_calibration_gain = wbd_gain;
                 return 90;      /* wait for the WBDMUX to switch and for the ADC to sample */
+
         case CT_TUNER_STEP_0:
-                state->wbd_offset = dib0090_read_reg(state, 0x1d);
+                state->wbd_offset = dib0090_get_slow_adc_val(state);
                 dprintk("WBD calibration offset = %d", state->wbd_offset);
-
                 *tune_state = CT_TUNER_START;   /* reset done -> real tuning can now begin */
-                state->reset &= ~0x2;
+                state->calibrate &= ~WBD_CAL;
                 break;
+
         default:
                 break;
         }
@@ -1092,6 +1716,15 @@ static void dib0090_set_bandwidth(struct dib0090_state *state)
         state->bb_1_def |= tmp;
 
         dib0090_write_reg(state, 0x01, state->bb_1_def);        /* be sure that we have the right bb-filter */
+
+        dib0090_write_reg(state, 0x03, 0x6008); /* = 0x6008 : vcm3_trim = 1 ; filter2_gm1_trim = 8 ; filter2_cutoff_freq = 0 */
+        dib0090_write_reg(state, 0x04, 0x1);    /* 0 = 1KHz ; 1 = 50Hz ; 2 = 150Hz ; 3 = 50KHz ; 4 = servo fast */
+        if (state->identity.in_soc) {
+                dib0090_write_reg(state, 0x05, 0x9bcf); /* attenuator_ibias_tri = 2 ; input_stage_ibias_tr = 1 ; nc = 11 ; ext_gm_trim = 1 ; obuf_ibias_trim = 4 ; filter13_gm2_ibias_t = 15 */
+        } else {
+                dib0090_write_reg(state, 0x02, (5 << 11) | (8 << 6) | (22 & 0x3f));     /* 22 = cap_value */
+                dib0090_write_reg(state, 0x05, 0xabcd); /* = 0xabcd : attenuator_ibias_tri = 2 ; input_stage_ibias_tr = 2 ; nc = 11 ; ext_gm_trim = 1 ; obuf_ibias_trim = 4 ; filter13_gm2_ibias_t = 13 */
+        }
 }
 
 static const struct dib0090_pll dib0090_pll_table[] = {
@@ -1180,6 +1813,255 @@ static const struct dib0090_tuning dib0090_tuning_table[] = {
 #endif
 };
 
+static const struct dib0090_tuning dib0090_p1g_tuning_table[] = {
+#ifdef CONFIG_BAND_CBAND
+        {170000, 4, 1, 0x820f, 0x300, 0x2d22, 0x82cb, EN_CAB},
+#endif
+#ifdef CONFIG_BAND_VHF
+        {184000, 1, 1, 15, 0x300, 0x4d12, 0xb94e, EN_VHF},
+        {227000, 1, 3, 15, 0x300, 0x4d12, 0xb94e, EN_VHF},
+        {380000, 1, 7, 15, 0x300, 0x4d12, 0xb94e, EN_VHF},
+#endif
+#ifdef CONFIG_BAND_UHF
+        {510000, 2, 0, 15, 0x300, 0x1d12, 0xb9ce, EN_UHF},
+        {540000, 2, 1, 15, 0x300, 0x1d12, 0xb9ce, EN_UHF},
+        {600000, 2, 3, 15, 0x300, 0x1d12, 0xb9ce, EN_UHF},
+        {630000, 2, 4, 15, 0x300, 0x1d12, 0xb9ce, EN_UHF},
+        {680000, 2, 5, 15, 0x300, 0x1d12, 0xb9ce, EN_UHF},
+        {720000, 2, 6, 15, 0x300, 0x1d12, 0xb9ce, EN_UHF},
+        {900000, 2, 7, 15, 0x300, 0x1d12, 0xb9ce, EN_UHF},
+#endif
+#ifdef CONFIG_BAND_LBAND
+        {1500000, 4, 0, 20, 0x300, 0x1912, 0x82c9, EN_LBD},
+        {1600000, 4, 1, 20, 0x300, 0x1912, 0x82c9, EN_LBD},
+        {1800000, 4, 3, 20, 0x300, 0x1912, 0x82c9, EN_LBD},
+#endif
+#ifdef CONFIG_BAND_SBAND
+        {2300000, 1, 4, 20, 0x300, 0x2d2A, 0x82c7, EN_SBD},
+        {2900000, 1, 7, 20, 0x280, 0x2deb, 0x8347, EN_SBD},
+#endif
+};
+
+static const struct dib0090_pll dib0090_p1g_pll_table[] = {
+#ifdef CONFIG_BAND_CBAND
+        {57000, 0, 11, 48, 6},
+        {70000, 1, 11, 48, 6},
+        {86000, 0, 10, 32, 4},
+        {105000, 1, 10, 32, 4},
+        {115000, 0, 9, 24, 6},
+        {140000, 1, 9, 24, 6},
+        {170000, 0, 8, 16, 4},
+#endif
+#ifdef CONFIG_BAND_VHF
+        {200000, 1, 8, 16, 4},
+        {230000, 0, 7, 12, 6},
+        {280000, 1, 7, 12, 6},
+        {340000, 0, 6, 8, 4},
+        {380000, 1, 6, 8, 4},
+        {455000, 0, 5, 6, 6},
+#endif
+#ifdef CONFIG_BAND_UHF
+        {580000, 1, 5, 6, 6},
+        {680000, 0, 4, 4, 4},
+        {860000, 1, 4, 4, 4},
+#endif
+#ifdef CONFIG_BAND_LBAND
+        {1800000, 1, 2, 2, 4},
+#endif
+#ifdef CONFIG_BAND_SBAND
+        {2900000, 0, 1, 1, 6},
+#endif
+};
+
+static const struct dib0090_tuning dib0090_p1g_tuning_table_fm_vhf_on_cband[] = {
+#ifdef CONFIG_BAND_CBAND
+        {184000, 4, 3, 0x4187, 0x2c0, 0x2d22, 0x81cb, EN_CAB},
+        {227000, 4, 3, 0x4187, 0x2c0, 0x2d22, 0x81cb, EN_CAB},
+        {380000, 4, 3, 0x4187, 0x2c0, 0x2d22, 0x81cb, EN_CAB},
+#endif
+#ifdef CONFIG_BAND_UHF
+        {520000, 2, 0, 15, 0x300, 0x1d12, 0xb9ce, EN_UHF},
+        {550000, 2, 2, 15, 0x300, 0x1d12, 0xb9ce, EN_UHF},
+        {650000, 2, 3, 15, 0x300, 0x1d12, 0xb9ce, EN_UHF},
+        {750000, 2, 5, 15, 0x300, 0x1d12, 0xb9ce, EN_UHF},
+        {850000, 2, 6, 15, 0x300, 0x1d12, 0xb9ce, EN_UHF},
+        {900000, 2, 7, 15, 0x300, 0x1d12, 0xb9ce, EN_UHF},
+#endif
+#ifdef CONFIG_BAND_LBAND
+        {1500000, 4, 0, 20, 0x300, 0x1912, 0x82c9, EN_LBD},
+        {1600000, 4, 1, 20, 0x300, 0x1912, 0x82c9, EN_LBD},
+        {1800000, 4, 3, 20, 0x300, 0x1912, 0x82c9, EN_LBD},
+#endif
+#ifdef CONFIG_BAND_SBAND
+        {2300000, 1, 4, 20, 0x300, 0x2d2A, 0x82c7, EN_SBD},
+        {2900000, 1, 7, 20, 0x280, 0x2deb, 0x8347, EN_SBD},
+#endif
+};
+
+static const struct dib0090_tuning dib0090_tuning_table_cband_7090[] = {
+#ifdef CONFIG_BAND_CBAND
+        {300000, 4, 3, 0x018F, 0x2c0, 0x2d22, 0xb9ce, EN_CAB},
+        {380000, 4, 10, 0x018F, 0x2c0, 0x2d22, 0xb9ce, EN_CAB},
+        {570000, 4, 10, 0x8190, 0x2c0, 0x2d22, 0xb9ce, EN_CAB},
+        {858000, 4, 5, 0x8190, 0x2c0, 0x2d22, 0xb9ce, EN_CAB},
+#endif
+};
+
+static int dib0090_captrim_search(struct dib0090_state *state, enum frontend_tune_state *tune_state)
+{
+        int ret = 0;
+        u16 lo4 = 0xe900;
+
+        s16 adc_target;
+        u16 adc;
+        s8 step_sign;
+        u8 force_soft_search = 0;
+
+        if (state->identity.version == SOC_8090_P1G_11R1 || state->identity.version == SOC_8090_P1G_21R1)
+                force_soft_search = 1;
+
+        if (*tune_state == CT_TUNER_START) {
+                dprintk("Start Captrim search : %s", (force_soft_search == 1) ? "FORCE SOFT SEARCH" : "AUTO");
+                dib0090_write_reg(state, 0x10, 0x2B1);
+                dib0090_write_reg(state, 0x1e, 0x0032);
+
+                if (!state->tuner_is_tuned) {
+                        /* prepare a complete captrim */
+                        if (!state->identity.p1g || force_soft_search)
+                                state->step = state->captrim = state->fcaptrim = 64;
+
+                        state->current_rf = state->rf_request;
+                } else {        /* we are already tuned to this frequency - the configuration is correct  */
+                        if (!state->identity.p1g || force_soft_search) {
+                                /* do a minimal captrim even if the frequency has not changed */
+                                state->step = 4;
+                                state->captrim = state->fcaptrim = dib0090_read_reg(state, 0x18) & 0x7f;
+                        }
+                }
+                state->adc_diff = 3000;
+                *tune_state = CT_TUNER_STEP_0;
+
+        } else if (*tune_state == CT_TUNER_STEP_0) {
+                if (state->identity.p1g && !force_soft_search) {
+                        u8 ratio = 31;
+
+                        dib0090_write_reg(state, 0x40, (3 << 7) | (ratio << 2) | (1 << 1) | 1);
+                        dib0090_read_reg(state, 0x40);
+                        ret = 50;
+                } else {
+                        state->step /= 2;
+                        dib0090_write_reg(state, 0x18, lo4 | state->captrim);
+
+                        if (state->identity.in_soc)
+                                ret = 25;
+                }
+                *tune_state = CT_TUNER_STEP_1;
+
+        } else if (*tune_state == CT_TUNER_STEP_1) {
+                if (state->identity.p1g && !force_soft_search) {
+                        dib0090_write_reg(state, 0x40, 0x18c | (0 << 1) | 0);
+                        dib0090_read_reg(state, 0x40);
+
+                        state->fcaptrim = dib0090_read_reg(state, 0x18) & 0x7F;
+                        dprintk("***Final Captrim= 0x%x", state->fcaptrim);
+                        *tune_state = CT_TUNER_STEP_3;
+
+                } else {
+                        /* MERGE for all krosus before P1G */
+                        adc = dib0090_get_slow_adc_val(state);
+                        dprintk("CAPTRIM=%d; ADC = %d (ADC) & %dmV", (u32) state->captrim, (u32) adc, (u32) (adc) * (u32) 1800 / (u32) 1024);
+
+                        if (state->rest == 0 || state->identity.in_soc) {       /* Just for 8090P SOCS where auto captrim HW bug : TO CHECK IN ACI for SOCS !!! if 400 for 8090p SOC => tune issue !!! */
+                                adc_target = 200;
+                        } else
+                                adc_target = 400;
+
+                        if (adc >= adc_target) {
+                                adc -= adc_target;
+                                step_sign = -1;
+                        } else {
+                                adc = adc_target - adc;
+                                step_sign = 1;
+                        }
+
+                        if (adc < state->adc_diff) {
+                                dprintk("CAPTRIM=%d is closer to target (%d/%d)", (u32) state->captrim, (u32) adc, (u32) state->adc_diff);
+                                state->adc_diff = adc;
+                                state->fcaptrim = state->captrim;
+                        }
+
+                        state->captrim += step_sign * state->step;
+                        if (state->step >= 1)
+                                *tune_state = CT_TUNER_STEP_0;
+                        else
+                                *tune_state = CT_TUNER_STEP_2;
+
+                        ret = 25;
+                }
+        } else if (*tune_state == CT_TUNER_STEP_2) {    /* this step is only used by krosus < P1G */
+                /*write the final cptrim config */
+                dib0090_write_reg(state, 0x18, lo4 | state->fcaptrim);
+
+                *tune_state = CT_TUNER_STEP_3;
+
+        } else if (*tune_state == CT_TUNER_STEP_3) {
+                state->calibrate &= ~CAPTRIM_CAL;
+                *tune_state = CT_TUNER_STEP_0;
+        }
+
+        return ret;
+}
+
+static int dib0090_get_temperature(struct dib0090_state *state, enum frontend_tune_state *tune_state)
+{
+        int ret = 15;
+        s16 val;
+
+        switch (*tune_state) {
+        case CT_TUNER_START:
+                state->wbdmux = dib0090_read_reg(state, 0x10);
+                dib0090_write_reg(state, 0x10, (state->wbdmux & ~(0xff << 3)) | (0x8 << 3));
+
+                state->bias = dib0090_read_reg(state, 0x13);
+                dib0090_write_reg(state, 0x13, state->bias | (0x3 << 8));
+
+                *tune_state = CT_TUNER_STEP_0;
+                /* wait for the WBDMUX to switch and for the ADC to sample */
+                break;
+
+        case CT_TUNER_STEP_0:
+                state->adc_diff = dib0090_get_slow_adc_val(state);
+                dib0090_write_reg(state, 0x13, (state->bias & ~(0x3 << 8)) | (0x2 << 8));
+                *tune_state = CT_TUNER_STEP_1;
+                break;
+
+        case CT_TUNER_STEP_1:
+                val = dib0090_get_slow_adc_val(state);
+                state->temperature = ((s16) ((val - state->adc_diff) * 180) >> 8) + 55;
+
+                dprintk("temperature: %d C", state->temperature - 30);
+
+                *tune_state = CT_TUNER_STEP_2;
+                break;
+
+        case CT_TUNER_STEP_2:
+                dib0090_write_reg(state, 0x13, state->bias);
+                dib0090_write_reg(state, 0x10, state->wbdmux);  /* write back original WBDMUX */
+
+                *tune_state = CT_TUNER_START;
+                state->calibrate &= ~TEMP_CAL;
+                if (state->config->analog_output == 0)
+                        dib0090_write_reg(state, 0x23, dib0090_read_reg(state, 0x23) | (1 << 14));
+
+                break;
+
+        default:
+                ret = 0;
+                break;
+        }
+        return ret;
+}
+
 #define WBD     0x781           /* 1 1 1 1 0000 0 0 1 */
 static int dib0090_tune(struct dvb_frontend *fe)
 {
@@ -1188,87 +2070,131 @@ static int dib0090_tune(struct dvb_frontend *fe)
         const struct dib0090_pll *pll = state->current_pll_table_index;
         enum frontend_tune_state *tune_state = &state->tune_state;
 
-        u32 rf;
-        u16 lo4 = 0xe900, lo5, lo6, Den;
+        u16 lo5, lo6, Den, tmp;
         u32 FBDiv, Rest, FREF, VCOF_kHz = 0;
-        u16 tmp, adc;
-        int8_t step_sign;
         int ret = 10;           /* 1ms is the default delay most of the time */
         u8 c, i;
 
-        state->current_band = (u8) BAND_OF_FREQUENCY(fe->dtv_property_cache.frequency / 1000);
-        rf = fe->dtv_property_cache.frequency / 1000 + (state->current_band ==
-                                                        BAND_UHF ? state->config->freq_offset_khz_uhf : state->config->freq_offset_khz_vhf);
-        /* in any case we first need to do a reset if needed */
-        if (state->reset & 0x1)
-                return dib0090_dc_offset_calibration(state, tune_state);
-        else if (state->reset & 0x2)
-                return dib0090_wbd_calibration(state, tune_state);
-
-    /************************* VCO ***************************/
+        /************************* VCO ***************************/
         /* Default values for FG                                 */
         /* from these are needed :                               */
         /* Cp,HFdiv,VCOband,SD,Num,Den,FB and REFDiv             */
 
-#ifdef CONFIG_SYS_ISDBT
-        if (state->fe->dtv_property_cache.delivery_system == SYS_ISDBT && state->fe->dtv_property_cache.isdbt_sb_mode == 1)
-                rf += 850;
-#endif
+        /* in any case we first need to do a calibration if needed */
+        if (*tune_state == CT_TUNER_START) {
+                /* deactivate DataTX before some calibrations */
+                if (state->calibrate & (DC_CAL | TEMP_CAL | WBD_CAL))
+                        dib0090_write_reg(state, 0x23, dib0090_read_reg(state, 0x23) & ~(1 << 14));
+                else
+                        /* Activate DataTX in case a calibration has been done before */
+                        if (state->config->analog_output == 0)
+                                dib0090_write_reg(state, 0x23, dib0090_read_reg(state, 0x23) | (1 << 14));
+        }
 
-        if (state->current_rf != rf) {
-                state->tuner_is_tuned = 0;
+        if (state->calibrate & DC_CAL)
+                return dib0090_dc_offset_calibration(state, tune_state);
+        else if (state->calibrate & WBD_CAL) {
+                if (state->current_rf == 0)
+                        state->current_rf = state->fe->dtv_property_cache.frequency / 1000;
+                return dib0090_wbd_calibration(state, tune_state);
+        } else if (state->calibrate & TEMP_CAL)
+                return dib0090_get_temperature(state, tune_state);
+        else if (state->calibrate & CAPTRIM_CAL)
+                return dib0090_captrim_search(state, tune_state);
 
-                tune = dib0090_tuning_table;
+        if (*tune_state == CT_TUNER_START) {
+                /* if soc and AGC pwm control, disengage mux to be able to R/W access to 0x01 register to set the right filter (cutoff_freq_select) during the tune sequence, otherwise, SOC SERPAR error when accessing to 0x01 */
+                if (state->config->use_pwm_agc && state->identity.in_soc) {
+                        tmp = dib0090_read_reg(state, 0x39);
+                        if ((tmp >> 10) & 0x1)
+                                dib0090_write_reg(state, 0x39, tmp & ~(1 << 10));
+                }
 
-                tmp = (state->revision >> 5) & 0x7;
-                if (tmp == 0x4 || tmp == 0x7) {
-                        /* CBAND tuner version for VHF */
-                        if (state->current_band == BAND_FM || state->current_band == BAND_VHF) {
-                                /* Force CBAND */
-                                state->current_band = BAND_CBAND;
-                                tune = dib0090_tuning_table_fm_vhf_on_cband;
+                state->current_band = (u8) BAND_OF_FREQUENCY(state->fe->dtv_property_cache.frequency / 1000);
+                state->rf_request =
+                        state->fe->dtv_property_cache.frequency / 1000 + (state->current_band ==
+                                        BAND_UHF ? state->config->freq_offset_khz_uhf : state->config->
+                                        freq_offset_khz_vhf);
+
+                /* in ISDB-T 1seg we shift tuning frequency */
+                if ((state->fe->dtv_property_cache.delivery_system == SYS_ISDBT && state->fe->dtv_property_cache.isdbt_sb_mode == 1
+                                        && state->fe->dtv_property_cache.isdbt_partial_reception == 0)) {
+                        const struct dib0090_low_if_offset_table *LUT_offset = state->config->low_if;
+                        u8 found_offset = 0;
+                        u32 margin_khz = 100;
+
+                        if (LUT_offset != NULL) {
+                                while (LUT_offset->RF_freq != 0xffff) {
+                                        if (((state->rf_request > (LUT_offset->RF_freq - margin_khz))
+                                                                && (state->rf_request < (LUT_offset->RF_freq + margin_khz)))
+                                                        && LUT_offset->std == state->fe->dtv_property_cache.delivery_system) {
+                                                state->rf_request += LUT_offset->offset_khz;
+                                                found_offset = 1;
+                                                break;
+                                        }
+                                        LUT_offset++;
+                                }
                         }
+
+                        if (found_offset == 0)
+                                state->rf_request += 400;
                 }
+                if (state->current_rf != state->rf_request || (state->current_standard != state->fe->dtv_property_cache.delivery_system)) {
+                        state->tuner_is_tuned = 0;
+                        state->current_rf = 0;
+                        state->current_standard = 0;
 
-                pll = dib0090_pll_table;
-                /* Look for the interval */
-                while (rf > tune->max_freq)
-                        tune++;
-                while (rf > pll->max_freq)
-                        pll++;
-                state->current_tune_table_index = tune;
-                state->current_pll_table_index = pll;
-        }
+                        tune = dib0090_tuning_table;
+                        if (state->identity.p1g)
+                                tune = dib0090_p1g_tuning_table;
 
-        if (*tune_state == CT_TUNER_START) {
+                        tmp = (state->identity.version >> 5) & 0x7;
 
-                if (state->tuner_is_tuned == 0)
-                        state->current_rf = 0;
+                        if (state->identity.in_soc) {
+                                if (state->config->force_cband_input) { /* Use the CBAND input for all band */
+                                        if (state->current_band & BAND_CBAND || state->current_band & BAND_FM || state->current_band & BAND_VHF
+                                                        || state->current_band & BAND_UHF) {
+                                                state->current_band = BAND_CBAND;
+                                                tune = dib0090_tuning_table_cband_7090;
+                                        }
+                                } else {        /* Use the CBAND input for all band under UHF */
+                                        if (state->current_band & BAND_CBAND || state->current_band & BAND_FM || state->current_band & BAND_VHF) {
+                                                state->current_band = BAND_CBAND;
+                                                tune = dib0090_tuning_table_cband_7090;
+                                        }
+                                }
+                        } else
+                         if (tmp == 0x4 || tmp == 0x7) {
+                                /* CBAND tuner version for VHF */
+                                if (state->current_band == BAND_FM || state->current_band == BAND_CBAND || state->current_band == BAND_VHF) {
+                                        state->current_band = BAND_CBAND;       /* Force CBAND */
+
+                                        tune = dib0090_tuning_table_fm_vhf_on_cband;
+                                        if (state->identity.p1g)
+                                                tune = dib0090_p1g_tuning_table_fm_vhf_on_cband;
+                                }
+                        }
 
-                if (state->current_rf != rf) {
+                        pll = dib0090_pll_table;
+                        if (state->identity.p1g)
+                                pll = dib0090_p1g_pll_table;
 
-                        dib0090_write_reg(state, 0x0b, 0xb800 | (tune->switch_trim));
+                        /* Look for the interval */
+                        while (state->rf_request > tune->max_freq)
+                                tune++;
+                        while (state->rf_request > pll->max_freq)
+                                pll++;
 
-                        /* external loop filter, otherwise:
-                         * lo5 = (0 << 15) | (0 << 12) | (0 << 11) | (3 << 9) | (4 << 6) | (3 << 4) | 4;
-                         * lo6 = 0x0e34 */
-                        if (pll->vco_band)
-                                lo5 = 0x049e;
-                        else if (state->config->analog_output)
-                                lo5 = 0x041d;
-                        else
-                                lo5 = 0x041c;
-
-                        lo5 |= (pll->hfdiv_code << 11) | (pll->vco_band << 7);  /* bit 15 is the split to the slave, we do not do it here */
+                        state->current_tune_table_index = tune;
+                        state->current_pll_table_index = pll;
 
-                        if (!state->config->io.pll_int_loop_filt)
-                                lo6 = 0xff28;
-                        else
-                                lo6 = (state->config->io.pll_int_loop_filt << 3);
+                        dib0090_write_reg(state, 0x0b, 0xb800 | (tune->switch_trim));
 
-                        VCOF_kHz = (pll->hfdiv * rf) * 2;
+                        VCOF_kHz = (pll->hfdiv * state->rf_request) * 2;
 
                         FREF = state->config->io.clock_khz;
+                        if (state->config->fref_clock_ratio != 0)
+                                FREF /= state->config->fref_clock_ratio;
 
                         FBDiv = (VCOF_kHz / pll->topresc / FREF);
                         Rest = (VCOF_kHz / pll->topresc) - FBDiv * FREF;
@@ -1283,144 +2209,132 @@ static int dib0090_tune(struct dvb_frontend *fe)
                         } else if (Rest > (FREF - 2 * LPF))
                                 Rest = FREF - 2 * LPF;
                         Rest = (Rest * 6528) / (FREF / 10);
+                        state->rest = Rest;
 
-                        Den = 1;
+                        /* external loop filter, otherwise:
+                         * lo5 = (0 << 15) | (0 << 12) | (0 << 11) | (3 << 9) | (4 << 6) | (3 << 4) | 4;
+                         * lo6 = 0x0e34 */
+
+                        if (Rest == 0) {
+                                if (pll->vco_band)
+                                        lo5 = 0x049f;
+                                else
+                                        lo5 = 0x041f;
+                        } else {
+                                if (pll->vco_band)
+                                        lo5 = 0x049e;
+                                else if (state->config->analog_output)
+                                        lo5 = 0x041d;
+                                else
+                                        lo5 = 0x041c;
+                        }
+
+                        if (state->identity.p1g) {      /* Bias is done automatically in P1G */
+                                if (state->identity.in_soc) {
+                                        if (state->identity.version == SOC_8090_P1G_11R1)
+                                                lo5 = 0x46f;
+                                        else
+                                                lo5 = 0x42f;
+                                } else
+                                        lo5 = 0x42c;
+                        }
+
+                        lo5 |= (pll->hfdiv_code << 11) | (pll->vco_band << 7);  /* bit 15 is the split to the slave, we do not do it here */
 
-                        dprintk(" *****  ******* Rest value = %d", Rest);
+                        if (!state->config->io.pll_int_loop_filt) {
+                                if (state->identity.in_soc)
+                                        lo6 = 0xff98;
+                                else if (state->identity.p1g || (Rest == 0))
+                                        lo6 = 0xfff8;
+                                else
+                                        lo6 = 0xff28;
+                        } else
+                                lo6 = (state->config->io.pll_int_loop_filt << 3);
+
+                        Den = 1;
 
                         if (Rest > 0) {
                                 if (state->config->analog_output)
                                         lo6 |= (1 << 2) | 2;
-                                else
-                                        lo6 |= (1 << 2) | 1;
+                                else {
+                                        if (state->identity.in_soc)
+                                                lo6 |= (1 << 2) | 2;
+                                        else
+                                                lo6 |= (1 << 2) | 2;
+                                }
                                 Den = 255;
                         }
-#ifdef CONFIG_BAND_SBAND
-                        if (state->current_band == BAND_SBAND)
-                                lo6 &= 0xfffb;
-#endif
-
                         dib0090_write_reg(state, 0x15, (u16) FBDiv);
-
-                        dib0090_write_reg(state, 0x16, (Den << 8) | 1);
-
+                        if (state->config->fref_clock_ratio != 0)
+                                dib0090_write_reg(state, 0x16, (Den << 8) | state->config->fref_clock_ratio);
+                        else
+                                dib0090_write_reg(state, 0x16, (Den << 8) | 1);
                         dib0090_write_reg(state, 0x17, (u16) Rest);
-
                         dib0090_write_reg(state, 0x19, lo5);
-
                         dib0090_write_reg(state, 0x1c, lo6);
 
                         lo6 = tune->tuner_enable;
                         if (state->config->analog_output)
                                 lo6 = (lo6 & 0xff9f) | 0x2;
 
-                        dib0090_write_reg(state, 0x24, lo6 | EN_LO
-#ifdef CONFIG_DIB0090_USE_PWM_AGC
-                                          | state->config->use_pwm_agc * EN_CRYSTAL
-#endif
-                            );
-
-                        state->current_rf = rf;
-
-                        /* prepare a complete captrim */
-                        state->step = state->captrim = state->fcaptrim = 64;
-
-                } else {        /* we are already tuned to this frequency - the configuration is correct  */
+                        dib0090_write_reg(state, 0x24, lo6 | EN_LO | state->config->use_pwm_agc * EN_CRYSTAL);
 
-                        /* do a minimal captrim even if the frequency has not changed */
-                        state->step = 4;
-                        state->captrim = state->fcaptrim = dib0090_read_reg(state, 0x18) & 0x7f;
                 }
-                state->adc_diff = 3000;
-
-                dib0090_write_reg(state, 0x10, 0x2B1);
 
-                dib0090_write_reg(state, 0x1e, 0x0032);
+                state->current_rf = state->rf_request;
+                state->current_standard = state->fe->dtv_property_cache.delivery_system;
 
                 ret = 20;
-                *tune_state = CT_TUNER_STEP_1;
-        } else if (*tune_state == CT_TUNER_STEP_0) {
-                /* nothing */
-        } else if (*tune_state == CT_TUNER_STEP_1) {
-                state->step /= 2;
-                dib0090_write_reg(state, 0x18, lo4 | state->captrim);
-                *tune_state = CT_TUNER_STEP_2;
-        } else if (*tune_state == CT_TUNER_STEP_2) {
+                state->calibrate = CAPTRIM_CAL; /* captrim serach now */
+        }
 
-                adc = dib0090_read_reg(state, 0x1d);
-                dprintk("FE %d CAPTRIM=%d; ADC = %d (ADC) & %dmV", (u32) fe->id, (u32) state->captrim, (u32) adc,
-                        (u32) (adc) * (u32) 1800 / (u32) 1024);
+        else if (*tune_state == CT_TUNER_STEP_0) {      /* Warning : because of captrim cal, if you change this step, change it also in _cal.c file because it is the step following captrim cal state machine */
+                const struct dib0090_wbd_slope *wbd = state->current_wbd_table;
 
-                if (adc >= 400) {
-                        adc -= 400;
-                        step_sign = -1;
-                } else {
-                        adc = 400 - adc;
-                        step_sign = 1;
-                }
+                while (state->current_rf / 1000 > wbd->max_freq)
+                        wbd++;
 
-                if (adc < state->adc_diff) {
-                        dprintk("FE %d CAPTRIM=%d is closer to target (%d/%d)", (u32) fe->id, (u32) state->captrim, (u32) adc, (u32) state->adc_diff);
-                        state->adc_diff = adc;
-                        state->fcaptrim = state->captrim;
-
-                }
+                dib0090_write_reg(state, 0x1e, 0x07ff);
+                dprintk("Final Captrim: %d", (u32) state->fcaptrim);
+                dprintk("HFDIV code: %d", (u32) pll->hfdiv_code);
+                dprintk("VCO = %d", (u32) pll->vco_band);
+                dprintk("VCOF in kHz: %d ((%d*%d) << 1))", (u32) ((pll->hfdiv * state->rf_request) * 2), (u32) pll->hfdiv, (u32) state->rf_request);
+                dprintk("REFDIV: %d, FREF: %d", (u32) 1, (u32) state->config->io.clock_khz);
+                dprintk("FBDIV: %d, Rest: %d", (u32) dib0090_read_reg(state, 0x15), (u32) dib0090_read_reg(state, 0x17));
+                dprintk("Num: %d, Den: %d, SD: %d", (u32) dib0090_read_reg(state, 0x17), (u32) (dib0090_read_reg(state, 0x16) >> 8),
+                        (u32) dib0090_read_reg(state, 0x1c) & 0x3);
 
-                state->captrim += step_sign * state->step;
-                if (state->step >= 1)
-                        *tune_state = CT_TUNER_STEP_1;
-                else
-                        *tune_state = CT_TUNER_STEP_3;
+#define WBD     0x781           /* 1 1 1 1 0000 0 0 1 */
+                c = 4;
+                i = 3;
 
-                ret = 15;
-        } else if (*tune_state == CT_TUNER_STEP_3) {
-                /*write the final cptrim config */
-                dib0090_write_reg(state, 0x18, lo4 | state->fcaptrim);
+                if (wbd->wbd_gain != 0)
+                        c = wbd->wbd_gain;
 
-#ifdef CONFIG_TUNER_DIB0090_CAPTRIM_MEMORY
-                state->memory[state->memory_index].cap = state->fcaptrim;
-#endif
+                state->wbdmux = (c << 13) | (i << 11) | (WBD | (state->config->use_pwm_agc << 1));
+                dib0090_write_reg(state, 0x10, state->wbdmux);
 
-                *tune_state = CT_TUNER_STEP_4;
-        } else if (*tune_state == CT_TUNER_STEP_4) {
-                dib0090_write_reg(state, 0x1e, 0x07ff);
-
-                dprintk("FE %d Final Captrim: %d", (u32) fe->id, (u32) state->fcaptrim);
-                dprintk("FE %d HFDIV code: %d", (u32) fe->id, (u32) pll->hfdiv_code);
-                dprintk("FE %d VCO = %d", (u32) fe->id, (u32) pll->vco_band);
-                dprintk("FE %d VCOF in kHz: %d ((%d*%d) << 1))", (u32) fe->id, (u32) ((pll->hfdiv * rf) * 2), (u32) pll->hfdiv, (u32) rf);
-                dprintk("FE %d REFDIV: %d, FREF: %d", (u32) fe->id, (u32) 1, (u32) state->config->io.clock_khz);
-                dprintk("FE %d FBDIV: %d, Rest: %d", (u32) fe->id, (u32) dib0090_read_reg(state, 0x15), (u32) dib0090_read_reg(state, 0x17));
-                dprintk("FE %d Num: %d, Den: %d, SD: %d", (u32) fe->id, (u32) dib0090_read_reg(state, 0x17),
-                        (u32) (dib0090_read_reg(state, 0x16) >> 8), (u32) dib0090_read_reg(state, 0x1c) & 0x3);
+                if ((tune->tuner_enable == EN_CAB) && state->identity.p1g) {
+                        dprintk("P1G : The cable band is selected and lna_tune = %d", tune->lna_tune);
+                        dib0090_write_reg(state, 0x09, tune->lna_bias);
+                        dib0090_write_reg(state, 0x0b, 0xb800 | (tune->lna_tune << 6) | (tune->switch_trim));
+                } else
+                        dib0090_write_reg(state, 0x09, (tune->lna_tune << 5) | tune->lna_bias);
 
-                c = 4;
-                i = 3;
-#if defined(CONFIG_BAND_LBAND) || defined(CONFIG_BAND_SBAND)
-                if ((state->current_band == BAND_LBAND) || (state->current_band == BAND_SBAND)) {
-                        c = 2;
-                        i = 2;
-                }
-#endif
-                dib0090_write_reg(state, 0x10, (c << 13) | (i << 11) | (WBD
-#ifdef CONFIG_DIB0090_USE_PWM_AGC
-                                                                        | (state->config->use_pwm_agc << 1)
-#endif
-                                  ));
-                dib0090_write_reg(state, 0x09, (tune->lna_tune << 5) | (tune->lna_bias << 0));
                 dib0090_write_reg(state, 0x0c, tune->v2i);
                 dib0090_write_reg(state, 0x0d, tune->mix);
                 dib0090_write_reg(state, 0x0e, tune->load);
+                *tune_state = CT_TUNER_STEP_1;
 
-                *tune_state = CT_TUNER_STEP_5;
-        } else if (*tune_state == CT_TUNER_STEP_5) {
-
+        } else if (*tune_state == CT_TUNER_STEP_1) {
                 /* initialize the lt gain register */
                 state->rf_lt_def = 0x7c00;
-                dib0090_write_reg(state, 0x0f, state->rf_lt_def);
 
                 dib0090_set_bandwidth(state);
                 state->tuner_is_tuned = 1;
+
+                state->calibrate |= WBD_CAL;
+                state->calibrate |= TEMP_CAL;
                 *tune_state = CT_TUNER_STOP;
         } else
                 ret = FE_CALLBACK_TIME_NEVER;
@@ -1440,6 +2354,7 @@ enum frontend_tune_state dib0090_get_tune_state(struct dvb_frontend *fe)
 
         return state->tune_state;
 }
+
 EXPORT_SYMBOL(dib0090_get_tune_state);
 
 int dib0090_set_tune_state(struct dvb_frontend *fe, enum frontend_tune_state tune_state)
@@ -1449,6 +2364,7 @@ int dib0090_set_tune_state(struct dvb_frontend *fe, enum frontend_tune_state tun
         state->tune_state = tune_state;
         return 0;
 }
+
 EXPORT_SYMBOL(dib0090_set_tune_state);
 
 static int dib0090_get_frequency(struct dvb_frontend *fe, u32 * frequency)
@@ -1462,7 +2378,7 @@ static int dib0090_get_frequency(struct dvb_frontend *fe, u32 * frequency)
 static int dib0090_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *p)
 {
         struct dib0090_state *state = fe->tuner_priv;
-        uint32_t ret;
+        u32 ret;
 
         state->tune_state = CT_TUNER_START;
 
@@ -1492,6 +2408,29 @@ static const struct dvb_tuner_ops dib0090_ops = {
         .get_frequency = dib0090_get_frequency,
 };
 
+static const struct dvb_tuner_ops dib0090_fw_ops = {
+        .info = {
+                 .name = "DiBcom DiB0090",
+                 .frequency_min = 45000000,
+                 .frequency_max = 860000000,
+                 .frequency_step = 1000,
+                 },
+        .release = dib0090_release,
+
+        .init = NULL,
+        .sleep = NULL,
+        .set_params = NULL,
+        .get_frequency = NULL,
+};
+
+static const struct dib0090_wbd_slope dib0090_wbd_table_default[] = {
+        {470, 0, 250, 0, 100, 4},
+        {860, 51, 866, 21, 375, 4},
+        {1700, 0, 800, 0, 850, 4},
+        {2900, 0, 250, 0, 100, 6},
+        {0xFFFF, 0, 0, 0, 0, 0},
+};
+
 struct dvb_frontend *dib0090_register(struct dvb_frontend *fe, struct i2c_adapter *i2c, const struct dib0090_config *config)
 {
         struct dib0090_state *st = kzalloc(sizeof(struct dib0090_state), GFP_KERNEL);
@@ -1503,6 +2442,11 @@ struct dvb_frontend *dib0090_register(struct dvb_frontend *fe, struct i2c_adapte
         st->fe = fe;
         fe->tuner_priv = st;
 
+        if (config->wbd == NULL)
+                st->current_wbd_table = dib0090_wbd_table_default;
+        else
+                st->current_wbd_table = config->wbd;
+
         if (dib0090_reset(fe) != 0)
                 goto free_mem;
 
@@ -1515,8 +2459,34 @@ struct dvb_frontend *dib0090_register(struct dvb_frontend *fe, struct i2c_adapte
         fe->tuner_priv = NULL;
         return NULL;
 }
+
 EXPORT_SYMBOL(dib0090_register);
 
+struct dvb_frontend *dib0090_fw_register(struct dvb_frontend *fe, struct i2c_adapter *i2c, const struct dib0090_config *config)
+{
+        struct dib0090_fw_state *st = kzalloc(sizeof(struct dib0090_fw_state), GFP_KERNEL);
+        if (st == NULL)
+                return NULL;
+
+        st->config = config;
+        st->i2c = i2c;
+        st->fe = fe;
+        fe->tuner_priv = st;
+
+        if (dib0090_fw_reset_digital(fe, st->config) != 0)
+                goto free_mem;
+
+        dprintk("DiB0090 FW: successfully identified");
+        memcpy(&fe->ops.tuner_ops, &dib0090_fw_ops, sizeof(struct dvb_tuner_ops));
+
+        return fe;
+free_mem:
+        kfree(st);
+        fe->tuner_priv = NULL;
+        return NULL;
+}
+EXPORT_SYMBOL(dib0090_fw_register);
+
 MODULE_AUTHOR("Patrick Boettcher <pboettcher@dibcom.fr>");
 MODULE_AUTHOR("Olivier Grenie <olivier.grenie@dibcom.fr>");
 MODULE_DESCRIPTION("Driver for the DiBcom 0090 base-band RF Tuner");
diff --git a/drivers/media/dvb/frontends/dib0090.h b/drivers/media/dvb/frontends/dib0090.h
index aa7711e88776..13d85244ec16 100644
--- a/drivers/media/dvb/frontends/dib0090.h
+++ b/drivers/media/dvb/frontends/dib0090.h
@@ -27,6 +27,21 @@ struct dib0090_io_config {
         u16 pll_int_loop_filt;
 };
 
+struct dib0090_wbd_slope {
+        u16 max_freq;           /* for every frequency less than or equal to that field: this information is correct */
+        u16 slope_cold;
+        u16 offset_cold;
+        u16 slope_hot;
+        u16 offset_hot;
+        u8 wbd_gain;
+};
+
+struct dib0090_low_if_offset_table {
+        int std;
+        u32 RF_freq;
+        s32 offset_khz;
+};
+
 struct dib0090_config {
         struct dib0090_io_config io;
         int (*reset) (struct dvb_frontend *, int);
@@ -47,10 +62,20 @@ struct dib0090_config {
         u16 wbd_cband_offset;
         u8 use_pwm_agc;
         u8 clkoutdrive;
+
+        u8 ls_cfg_pad_drv;
+        u8 data_tx_drv;
+
+        u8 in_soc;
+        const struct dib0090_low_if_offset_table *low_if;
+        u8 fref_clock_ratio;
+        u16 force_cband_input;
+        struct dib0090_wbd_slope *wbd;
 };
 
 #if defined(CONFIG_DVB_TUNER_DIB0090) || (defined(CONFIG_DVB_TUNER_DIB0090_MODULE) && defined(MODULE))
 extern struct dvb_frontend *dib0090_register(struct dvb_frontend *fe, struct i2c_adapter *i2c, const struct dib0090_config *config);
+extern struct dvb_frontend *dib0090_fw_register(struct dvb_frontend *fe, struct i2c_adapter *i2c, const struct dib0090_config *config);
 extern void dib0090_dcc_freq(struct dvb_frontend *fe, u8 fast);
 extern void dib0090_pwm_gain_reset(struct dvb_frontend *fe);
 extern u16 dib0090_get_wbd_offset(struct dvb_frontend *tuner);
@@ -65,6 +90,12 @@ static inline struct dvb_frontend *dib0090_register(struct dvb_frontend *fe, str
         return NULL;
 }
 
+static inline struct dvb_frontend *dib0090_fw_register(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct dib0090_config *config)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return NULL;
+}
+
 static inline void dib0090_dcc_freq(struct dvb_frontend *fe, u8 fast)
 {
         printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
diff --git a/drivers/media/dvb/frontends/dib7000m.c b/drivers/media/dvb/frontends/dib7000m.c
index 0f09fd31cb29..79cb1c20df24 100644
--- a/drivers/media/dvb/frontends/dib7000m.c
+++ b/drivers/media/dvb/frontends/dib7000m.c
@@ -50,6 +50,11 @@ struct dib7000m_state {
         u16 revision;
 
         u8 agc_state;
+
+        /* for the I2C transfer */
+        struct i2c_msg msg[2];
+        u8 i2c_write_buffer[4];
+        u8 i2c_read_buffer[2];
 };
 
 enum dib7000m_power_mode {
@@ -64,29 +69,39 @@ enum dib7000m_power_mode {
 
 static u16 dib7000m_read_word(struct dib7000m_state *state, u16 reg)
 {
-        u8 wb[2] = { (reg >> 8) | 0x80, reg & 0xff };
-        u8 rb[2];
-        struct i2c_msg msg[2] = {
-                { .addr = state->i2c_addr >> 1, .flags = 0,        .buf = wb, .len = 2 },
-                { .addr = state->i2c_addr >> 1, .flags = I2C_M_RD, .buf = rb, .len = 2 },
-        };
-
-        if (i2c_transfer(state->i2c_adap, msg, 2) != 2)
+        state->i2c_write_buffer[0] = (reg >> 8) | 0x80;
+        state->i2c_write_buffer[1] = reg & 0xff;
+
+        memset(state->msg, 0, 2 * sizeof(struct i2c_msg));
+        state->msg[0].addr = state->i2c_addr >> 1;
+        state->msg[0].flags = 0;
+        state->msg[0].buf = state->i2c_write_buffer;
+        state->msg[0].len = 2;
+        state->msg[1].addr = state->i2c_addr >> 1;
+        state->msg[1].flags = I2C_M_RD;
+        state->msg[1].buf = state->i2c_read_buffer;
+        state->msg[1].len = 2;
+
+        if (i2c_transfer(state->i2c_adap, state->msg, 2) != 2)
                 dprintk("i2c read error on %d",reg);
 
-        return (rb[0] << 8) | rb[1];
+        return (state->i2c_read_buffer[0] << 8) | state->i2c_read_buffer[1];
 }
 
 static int dib7000m_write_word(struct dib7000m_state *state, u16 reg, u16 val)
 {
-        u8 b[4] = {
-                (reg >> 8) & 0xff, reg & 0xff,
-                (val >> 8) & 0xff, val & 0xff,
-        };
-        struct i2c_msg msg = {
-                .addr = state->i2c_addr >> 1, .flags = 0, .buf = b, .len = 4
-        };
-        return i2c_transfer(state->i2c_adap, &msg, 1) != 1 ? -EREMOTEIO : 0;
+        state->i2c_write_buffer[0] = (reg >> 8) & 0xff;
+        state->i2c_write_buffer[1] = reg & 0xff;
+        state->i2c_write_buffer[2] = (val >> 8) & 0xff;
+        state->i2c_write_buffer[3] = val & 0xff;
+
+        memset(&state->msg[0], 0, sizeof(struct i2c_msg));
+        state->msg[0].addr = state->i2c_addr >> 1;
+        state->msg[0].flags = 0;
+        state->msg[0].buf = state->i2c_write_buffer;
+        state->msg[0].len = 4;
+
+        return i2c_transfer(state->i2c_adap, state->msg, 1) != 1 ? -EREMOTEIO : 0;
 }
 static void dib7000m_write_tab(struct dib7000m_state *state, u16 *buf)
 {
@@ -805,7 +820,7 @@ static void dib7000m_set_channel(struct dib7000m_state *state, struct dvb_fronte
         value = 0;
         switch (ch->u.ofdm.transmission_mode) {
                 case TRANSMISSION_MODE_2K: value |= (0 << 7); break;
-                case /* 4K MODE */ 255: value |= (2 << 7); break;
+                case TRANSMISSION_MODE_4K: value |= (2 << 7); break;
                 default:
                 case TRANSMISSION_MODE_8K: value |= (1 << 7); break;
         }
@@ -866,7 +881,7 @@ static void dib7000m_set_channel(struct dib7000m_state *state, struct dvb_fronte
         /* P_dvsy_sync_wait */
         switch (ch->u.ofdm.transmission_mode) {
                 case TRANSMISSION_MODE_8K: value = 256; break;
-                case /* 4K MODE */ 255: value = 128; break;
+                case TRANSMISSION_MODE_4K: value = 128; break;
                 case TRANSMISSION_MODE_2K:
                 default: value = 64; break;
         }
@@ -1020,7 +1035,7 @@ static int dib7000m_tune(struct dvb_frontend *demod, struct dvb_frontend_paramet
         value = (6 << 8) | 0x80;
         switch (ch->u.ofdm.transmission_mode) {
                 case TRANSMISSION_MODE_2K: value |= (7 << 12); break;
-                case /* 4K MODE */ 255: value |= (8 << 12); break;
+                case TRANSMISSION_MODE_4K: value |= (8 << 12); break;
                 default:
                 case TRANSMISSION_MODE_8K: value |= (9 << 12); break;
         }
@@ -1030,7 +1045,7 @@ static int dib7000m_tune(struct dvb_frontend *demod, struct dvb_frontend_paramet
         value = (0 << 4);
         switch (ch->u.ofdm.transmission_mode) {
                 case TRANSMISSION_MODE_2K: value |= 0x6; break;
-                case /* 4K MODE */ 255: value |= 0x7; break;
+                case TRANSMISSION_MODE_4K: value |= 0x7; break;
                 default:
                 case TRANSMISSION_MODE_8K: value |= 0x8; break;
         }
@@ -1040,7 +1055,7 @@ static int dib7000m_tune(struct dvb_frontend *demod, struct dvb_frontend_paramet
         value = (0 << 4);
         switch (ch->u.ofdm.transmission_mode) {
                 case TRANSMISSION_MODE_2K: value |= 0x6; break;
-                case /* 4K MODE */ 255: value |= 0x7; break;
+                case TRANSMISSION_MODE_4K: value |= 0x7; break;
                 default:
                 case TRANSMISSION_MODE_8K: value |= 0x8; break;
         }
@@ -1285,6 +1300,25 @@ struct i2c_adapter * dib7000m_get_i2c_master(struct dvb_frontend *demod, enum di
 }
 EXPORT_SYMBOL(dib7000m_get_i2c_master);
 
+int dib7000m_pid_filter_ctrl(struct dvb_frontend *fe, u8 onoff)
+{
+        struct dib7000m_state *state = fe->demodulator_priv;
+        u16 val = dib7000m_read_word(state, 294 + state->reg_offs) & 0xffef;
+        val |= (onoff & 0x1) << 4;
+        dprintk("PID filter enabled %d", onoff);
+        return dib7000m_write_word(state, 294 + state->reg_offs, val);
+}
+EXPORT_SYMBOL(dib7000m_pid_filter_ctrl);
+
+int dib7000m_pid_filter(struct dvb_frontend *fe, u8 id, u16 pid, u8 onoff)
+{
+        struct dib7000m_state *state = fe->demodulator_priv;
+        dprintk("PID filter: index %x, PID %d, OnOff %d", id, pid, onoff);
+        return dib7000m_write_word(state, 300 + state->reg_offs + id,
+                        onoff ? (1 << 13) | pid : 0);
+}
+EXPORT_SYMBOL(dib7000m_pid_filter);
+
 #if 0
 /* used with some prototype boards */
 int dib7000m_i2c_enumeration(struct i2c_adapter *i2c, int no_of_demods,
diff --git a/drivers/media/dvb/frontends/dib7000m.h b/drivers/media/dvb/frontends/dib7000m.h
index 113819ce9f0d..81fcf2241c64 100644
--- a/drivers/media/dvb/frontends/dib7000m.h
+++ b/drivers/media/dvb/frontends/dib7000m.h
@@ -46,6 +46,8 @@ extern struct dvb_frontend *dib7000m_attach(struct i2c_adapter *i2c_adap,
 extern struct i2c_adapter *dib7000m_get_i2c_master(struct dvb_frontend *,
                                                    enum dibx000_i2c_interface,
                                                    int);
+extern int dib7000m_pid_filter(struct dvb_frontend *, u8 id, u16 pid, u8 onoff);
+extern int dib7000m_pid_filter_ctrl(struct dvb_frontend *fe, u8 onoff);
 #else
 static inline
 struct dvb_frontend *dib7000m_attach(struct i2c_adapter *i2c_adap,
@@ -63,6 +65,19 @@ struct i2c_adapter *dib7000m_get_i2c_master(struct dvb_frontend *demod,
         printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
         return NULL;
 }
+static inline int dib7000m_pid_filter(struct dvb_frontend *fe, u8 id,
+                                                u16 pid, u8 onoff)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return -ENODEV;
+}
+
+static inline int dib7000m_pid_filter_ctrl(struct dvb_frontend *fe,
+                                                uint8_t onoff)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return -ENODEV;
+}
 #endif
 
 /* TODO
diff --git a/drivers/media/dvb/frontends/dib7000p.c b/drivers/media/dvb/frontends/dib7000p.c
index 3aed0d433921..0c9f40c2a251 100644
--- a/drivers/media/dvb/frontends/dib7000p.c
+++ b/drivers/media/dvb/frontends/dib7000p.c
@@ -26,24 +26,29 @@ MODULE_PARM_DESC(buggy_sfn_workaround, "Enable work-around for buggy SFNs (defau
 
 #define dprintk(args...) do { if (debug) { printk(KERN_DEBUG "DiB7000P: "); printk(args); printk("\n"); } } while (0)
 
+struct i2c_device {
+        struct i2c_adapter *i2c_adap;
+        u8 i2c_addr;
+};
+
 struct dib7000p_state {
         struct dvb_frontend demod;
-    struct dib7000p_config cfg;
+        struct dib7000p_config cfg;
 
         u8 i2c_addr;
-        struct i2c_adapter   *i2c_adap;
+        struct i2c_adapter *i2c_adap;
 
         struct dibx000_i2c_master i2c_master;
 
         u16 wbd_ref;
 
-        u8  current_band;
+        u8 current_band;
         u32 current_bandwidth;
         struct dibx000_agc_config *current_agc;
         u32 timf;
 
-        u8 div_force_off : 1;
-        u8 div_state : 1;
+        u8 div_force_off:1;
+        u8 div_state:1;
         u16 div_sync_wait;
 
         u8 agc_state;
@@ -51,7 +56,18 @@ struct dib7000p_state {
         u16 gpio_dir;
         u16 gpio_val;
 
-        u8 sfn_workaround_active :1;
+        u8 sfn_workaround_active:1;
+
+#define SOC7090 0x7090
+        u16 version;
+
+        u16 tuner_enable;
+        struct i2c_adapter dib7090_tuner_adap;
+
+        /* for the I2C transfer */
+        struct i2c_msg msg[2];
+        u8 i2c_write_buffer[4];
+        u8 i2c_read_buffer[2];
 };
 
 enum dib7000p_power_mode {
@@ -60,33 +76,47 @@ enum dib7000p_power_mode {
         DIB7000P_POWER_INTERFACE_ONLY,
 };
 
+static int dib7090_set_output_mode(struct dvb_frontend *fe, int mode);
+static int dib7090_set_diversity_in(struct dvb_frontend *fe, int onoff);
+
 static u16 dib7000p_read_word(struct dib7000p_state *state, u16 reg)
 {
-        u8 wb[2] = { reg >> 8, reg & 0xff };
-        u8 rb[2];
-        struct i2c_msg msg[2] = {
-                { .addr = state->i2c_addr >> 1, .flags = 0,        .buf = wb, .len = 2 },
-                { .addr = state->i2c_addr >> 1, .flags = I2C_M_RD, .buf = rb, .len = 2 },
-        };
-
-        if (i2c_transfer(state->i2c_adap, msg, 2) != 2)
-                dprintk("i2c read error on %d",reg);
-
-        return (rb[0] << 8) | rb[1];
+        state->i2c_write_buffer[0] = reg >> 8;
+        state->i2c_write_buffer[1] = reg & 0xff;
+
+        memset(state->msg, 0, 2 * sizeof(struct i2c_msg));
+        state->msg[0].addr = state->i2c_addr >> 1;
+        state->msg[0].flags = 0;
+        state->msg[0].buf = state->i2c_write_buffer;
+        state->msg[0].len = 2;
+        state->msg[1].addr = state->i2c_addr >> 1;
+        state->msg[1].flags = I2C_M_RD;
+        state->msg[1].buf = state->i2c_read_buffer;
+        state->msg[1].len = 2;
+
+        if (i2c_transfer(state->i2c_adap, state->msg, 2) != 2)
+                dprintk("i2c read error on %d", reg);
+
+        return (state->i2c_read_buffer[0] << 8) | state->i2c_read_buffer[1];
 }
 
 static int dib7000p_write_word(struct dib7000p_state *state, u16 reg, u16 val)
 {
-        u8 b[4] = {
-                (reg >> 8) & 0xff, reg & 0xff,
-                (val >> 8) & 0xff, val & 0xff,
-        };
-        struct i2c_msg msg = {
-                .addr = state->i2c_addr >> 1, .flags = 0, .buf = b, .len = 4
-        };
-        return i2c_transfer(state->i2c_adap, &msg, 1) != 1 ? -EREMOTEIO : 0;
+        state->i2c_write_buffer[0] = (reg >> 8) & 0xff;
+        state->i2c_write_buffer[1] = reg & 0xff;
+        state->i2c_write_buffer[2] = (val >> 8) & 0xff;
+        state->i2c_write_buffer[3] = val & 0xff;
+
+        memset(&state->msg[0], 0, sizeof(struct i2c_msg));
+        state->msg[0].addr = state->i2c_addr >> 1;
+        state->msg[0].flags = 0;
+        state->msg[0].buf = state->i2c_write_buffer;
+        state->msg[0].len = 4;
+
+        return i2c_transfer(state->i2c_adap, state->msg, 1) != 1 ? -EREMOTEIO : 0;
 }
-static void dib7000p_write_tab(struct dib7000p_state *state, u16 *buf)
+
+static void dib7000p_write_tab(struct dib7000p_state *state, u16 * buf)
 {
         u16 l = 0, r, *n;
         n = buf;
@@ -104,54 +134,54 @@ static void dib7000p_write_tab(struct dib7000p_state *state, u16 *buf)
 
 static int dib7000p_set_output_mode(struct dib7000p_state *state, int mode)
 {
-        int    ret = 0;
+        int ret = 0;
         u16 outreg, fifo_threshold, smo_mode;
 
         outreg = 0;
         fifo_threshold = 1792;
         smo_mode = (dib7000p_read_word(state, 235) & 0x0050) | (1 << 1);
 
-        dprintk( "setting output mode for demod %p to %d",
-                        &state->demod, mode);
+        dprintk("setting output mode for demod %p to %d", &state->demod, mode);
 
         switch (mode) {
-                case OUTMODE_MPEG2_PAR_GATED_CLK:   // STBs with parallel gated clock
-                        outreg = (1 << 10);  /* 0x0400 */
-                        break;
-                case OUTMODE_MPEG2_PAR_CONT_CLK:    // STBs with parallel continues clock
-                        outreg = (1 << 10) | (1 << 6); /* 0x0440 */
-                        break;
-                case OUTMODE_MPEG2_SERIAL:          // STBs with serial input
-                        outreg = (1 << 10) | (2 << 6) | (0 << 1); /* 0x0480 */
-                        break;
-                case OUTMODE_DIVERSITY:
-                        if (state->cfg.hostbus_diversity)
-                                outreg = (1 << 10) | (4 << 6); /* 0x0500 */
-                        else
-                                outreg = (1 << 11);
-                        break;
-                case OUTMODE_MPEG2_FIFO:            // e.g. USB feeding
-                        smo_mode |= (3 << 1);
-                        fifo_threshold = 512;
-                        outreg = (1 << 10) | (5 << 6);
-                        break;
-                case OUTMODE_ANALOG_ADC:
-                        outreg = (1 << 10) | (3 << 6);
-                        break;
-                case OUTMODE_HIGH_Z:  // disable
-                        outreg = 0;
-                        break;
-                default:
-                        dprintk( "Unhandled output_mode passed to be set for demod %p",&state->demod);
-                        break;
+        case OUTMODE_MPEG2_PAR_GATED_CLK:
+                outreg = (1 << 10);     /* 0x0400 */
+                break;
+        case OUTMODE_MPEG2_PAR_CONT_CLK:
+                outreg = (1 << 10) | (1 << 6);  /* 0x0440 */
+                break;
+        case OUTMODE_MPEG2_SERIAL:
+                outreg = (1 << 10) | (2 << 6) | (0 << 1);       /* 0x0480 */
+                break;
+        case OUTMODE_DIVERSITY:
+                if (state->cfg.hostbus_diversity)
+                        outreg = (1 << 10) | (4 << 6);  /* 0x0500 */
+                else
+                        outreg = (1 << 11);
+                break;
+        case OUTMODE_MPEG2_FIFO:
+                smo_mode |= (3 << 1);
+                fifo_threshold = 512;
+                outreg = (1 << 10) | (5 << 6);
+                break;
+        case OUTMODE_ANALOG_ADC:
+                outreg = (1 << 10) | (3 << 6);
+                break;
+        case OUTMODE_HIGH_Z:
+                outreg = 0;
+                break;
+        default:
+                dprintk("Unhandled output_mode passed to be set for demod %p", &state->demod);
+                break;
         }
 
         if (state->cfg.output_mpeg2_in_188_bytes)
-                smo_mode |= (1 << 5) ;
+                smo_mode |= (1 << 5);
 
-        ret |= dib7000p_write_word(state,  235, smo_mode);
-        ret |= dib7000p_write_word(state,  236, fifo_threshold); /* synchronous fread */
-        ret |= dib7000p_write_word(state, 1286, outreg);         /* P_Div_active */
+        ret |= dib7000p_write_word(state, 235, smo_mode);
+        ret |= dib7000p_write_word(state, 236, fifo_threshold); /* synchronous fread */
+        if (state->version != SOC7090)
+                ret |= dib7000p_write_word(state, 1286, outreg);        /* P_Div_active */
 
         return ret;
 }
@@ -161,13 +191,13 @@ static int dib7000p_set_diversity_in(struct dvb_frontend *demod, int onoff)
         struct dib7000p_state *state = demod->demodulator_priv;
 
         if (state->div_force_off) {
-                dprintk( "diversity combination deactivated - forced by COFDM parameters");
+                dprintk("diversity combination deactivated - forced by COFDM parameters");
                 onoff = 0;
                 dib7000p_write_word(state, 207, 0);
         } else
                 dib7000p_write_word(state, 207, (state->div_sync_wait << 4) | (1 << 2) | (2 << 0));
 
-        state->div_state = (u8)onoff;
+        state->div_state = (u8) onoff;
 
         if (onoff) {
                 dib7000p_write_word(state, 204, 6);
@@ -184,37 +214,48 @@ static int dib7000p_set_diversity_in(struct dvb_frontend *demod, int onoff)
 static int dib7000p_set_power_mode(struct dib7000p_state *state, enum dib7000p_power_mode mode)
 {
         /* by default everything is powered off */
-        u16 reg_774 = 0xffff, reg_775 = 0xffff, reg_776 = 0x0007, reg_899  = 0x0003,
-                reg_1280 = (0xfe00) | (dib7000p_read_word(state, 1280) & 0x01ff);
+        u16 reg_774 = 0x3fff, reg_775 = 0xffff, reg_776 = 0x0007, reg_899 = 0x0003, reg_1280 = (0xfe00) | (dib7000p_read_word(state, 1280) & 0x01ff);
 
         /* now, depending on the requested mode, we power on */
         switch (mode) {
                 /* power up everything in the demod */
-                case DIB7000P_POWER_ALL:
-                        reg_774 = 0x0000; reg_775 = 0x0000; reg_776 = 0x0; reg_899 = 0x0; reg_1280 &= 0x01ff;
-                        break;
-
-                case DIB7000P_POWER_ANALOG_ADC:
-                        /* dem, cfg, iqc, sad, agc */
-                        reg_774 &= ~((1 << 15) | (1 << 14) | (1 << 11) | (1 << 10) | (1 << 9));
-                        /* nud */
-                        reg_776 &= ~((1 << 0));
-                        /* Dout */
+        case DIB7000P_POWER_ALL:
+                reg_774 = 0x0000;
+                reg_775 = 0x0000;
+                reg_776 = 0x0;
+                reg_899 = 0x0;
+                if (state->version == SOC7090)
+                        reg_1280 &= 0x001f;
+                else
+                        reg_1280 &= 0x01ff;
+                break;
+
+        case DIB7000P_POWER_ANALOG_ADC:
+                /* dem, cfg, iqc, sad, agc */
+                reg_774 &= ~((1 << 15) | (1 << 14) | (1 << 11) | (1 << 10) | (1 << 9));
+                /* nud */
+                reg_776 &= ~((1 << 0));
+                /* Dout */
+                if (state->version != SOC7090)
                         reg_1280 &= ~((1 << 11));
-                        /* fall through wanted to enable the interfaces */
+                reg_1280 &= ~(1 << 6);
+                /* fall through wanted to enable the interfaces */
 
                 /* just leave power on the control-interfaces: GPIO and (I2C or SDIO) */
-                case DIB7000P_POWER_INTERFACE_ONLY: /* TODO power up either SDIO or I2C */
+        case DIB7000P_POWER_INTERFACE_ONLY:     /* TODO power up either SDIO or I2C */
+                if (state->version == SOC7090)
+                        reg_1280 &= ~((1 << 7) | (1 << 5));
+                else
                         reg_1280 &= ~((1 << 14) | (1 << 13) | (1 << 12) | (1 << 10));
-                        break;
+                break;
 
 /* TODO following stuff is just converted from the dib7000-driver - check when is used what */
         }
 
-        dib7000p_write_word(state,  774,  reg_774);
-        dib7000p_write_word(state,  775,  reg_775);
-        dib7000p_write_word(state,  776,  reg_776);
-        dib7000p_write_word(state,  899,  reg_899);
+        dib7000p_write_word(state, 774, reg_774);
+        dib7000p_write_word(state, 775, reg_775);
+        dib7000p_write_word(state, 776, reg_776);
+        dib7000p_write_word(state, 899, reg_899);
         dib7000p_write_word(state, 1280, reg_1280);
 
         return 0;
@@ -222,40 +263,57 @@ static int dib7000p_set_power_mode(struct dib7000p_state *state, enum dib7000p_p
 
 static void dib7000p_set_adc_state(struct dib7000p_state *state, enum dibx000_adc_states no)
 {
-        u16 reg_908 = dib7000p_read_word(state, 908),
-               reg_909 = dib7000p_read_word(state, 909);
+        u16 reg_908 = dib7000p_read_word(state, 908), reg_909 = dib7000p_read_word(state, 909);
+        u16 reg;
 
         switch (no) {
-                case DIBX000_SLOW_ADC_ON:
+        case DIBX000_SLOW_ADC_ON:
+                if (state->version == SOC7090) {
+                        reg = dib7000p_read_word(state, 1925);
+
+                        dib7000p_write_word(state, 1925, reg | (1 << 4) | (1 << 2));    /* en_slowAdc = 1 & reset_sladc = 1 */
+
+                        reg = dib7000p_read_word(state, 1925);  /* read acces to make it works... strange ... */
+                        msleep(200);
+                        dib7000p_write_word(state, 1925, reg & ~(1 << 4));      /* en_slowAdc = 1 & reset_sladc = 0 */
+
+                        reg = dib7000p_read_word(state, 72) & ~((0x3 << 14) | (0x3 << 12));
+                        dib7000p_write_word(state, 72, reg | (1 << 14) | (3 << 12) | 524);      /* ref = Vin1 => Vbg ; sel = Vin0 or Vin3 ; (Vin2 = Vcm) */
+                } else {
                         reg_909 |= (1 << 1) | (1 << 0);
                         dib7000p_write_word(state, 909, reg_909);
                         reg_909 &= ~(1 << 1);
-                        break;
+                }
+                break;
 
-                case DIBX000_SLOW_ADC_OFF:
-                        reg_909 |=  (1 << 1) | (1 << 0);
-                        break;
+        case DIBX000_SLOW_ADC_OFF:
+                if (state->version == SOC7090) {
+                        reg = dib7000p_read_word(state, 1925);
+                        dib7000p_write_word(state, 1925, (reg & ~(1 << 2)) | (1 << 4)); /* reset_sladc = 1 en_slowAdc = 0 */
+                } else
+                        reg_909 |= (1 << 1) | (1 << 0);
+                break;
 
-                case DIBX000_ADC_ON:
-                        reg_908 &= 0x0fff;
-                        reg_909 &= 0x0003;
-                        break;
+        case DIBX000_ADC_ON:
+                reg_908 &= 0x0fff;
+                reg_909 &= 0x0003;
+                break;
 
-                case DIBX000_ADC_OFF: // leave the VBG voltage on
-                        reg_908 |= (1 << 14) | (1 << 13) | (1 << 12);
-                        reg_909 |= (1 << 5) | (1 << 4) | (1 << 3) | (1 << 2);
-                        break;
+        case DIBX000_ADC_OFF:
+                reg_908 |= (1 << 14) | (1 << 13) | (1 << 12);
+                reg_909 |= (1 << 5) | (1 << 4) | (1 << 3) | (1 << 2);
+                break;
 
-                case DIBX000_VBG_ENABLE:
-                        reg_908 &= ~(1 << 15);
-                        break;
+        case DIBX000_VBG_ENABLE:
+                reg_908 &= ~(1 << 15);
+                break;
 
-                case DIBX000_VBG_DISABLE:
-                        reg_908 |= (1 << 15);
-                        break;
+        case DIBX000_VBG_DISABLE:
+                reg_908 |= (1 << 15);
+                break;
 
-                default:
-                        break;
+        default:
+                break;
         }
 
 //      dprintk( "908: %x, 909: %x\n", reg_908, reg_909);
@@ -275,17 +333,17 @@ static int dib7000p_set_bandwidth(struct dib7000p_state *state, u32 bw)
         state->current_bandwidth = bw;
 
         if (state->timf == 0) {
-                dprintk( "using default timf");
+                dprintk("using default timf");
                 timf = state->cfg.bw->timf;
         } else {
-                dprintk( "using updated timf");
+                dprintk("using updated timf");
                 timf = state->timf;
         }
 
         timf = timf * (bw / 50) / 160;
 
         dib7000p_write_word(state, 23, (u16) ((timf >> 16) & 0xffff));
-        dib7000p_write_word(state, 24, (u16) ((timf      ) & 0xffff));
+        dib7000p_write_word(state, 24, (u16) ((timf) & 0xffff));
 
         return 0;
 }
@@ -293,9 +351,12 @@ static int dib7000p_set_bandwidth(struct dib7000p_state *state, u32 bw)
 static int dib7000p_sad_calib(struct dib7000p_state *state)
 {
 /* internal */
-//      dib7000p_write_word(state, 72, (3 << 14) | (1 << 12) | (524 << 0)); // sampling clock of the SAD is writting in set_bandwidth
         dib7000p_write_word(state, 73, (0 << 1) | (0 << 0));
-        dib7000p_write_word(state, 74, 776); // 0.625*3.3 / 4096
+
+        if (state->version == SOC7090)
+                dib7000p_write_word(state, 74, 2048);
+        else
+                dib7000p_write_word(state, 74, 776);
 
         /* do the calibration */
         dib7000p_write_word(state, 73, (1 << 0));
@@ -314,37 +375,91 @@ int dib7000p_set_wbd_ref(struct dvb_frontend *demod, u16 value)
         state->wbd_ref = value;
         return dib7000p_write_word(state, 105, (dib7000p_read_word(state, 105) & 0xf000) | value);
 }
-
 EXPORT_SYMBOL(dib7000p_set_wbd_ref);
+
 static void dib7000p_reset_pll(struct dib7000p_state *state)
 {
         struct dibx000_bandwidth_config *bw = &state->cfg.bw[0];
         u16 clk_cfg0;
 
-        /* force PLL bypass */
-        clk_cfg0 = (1 << 15) | ((bw->pll_ratio & 0x3f) << 9) |
-                (bw->modulo << 7) | (bw->ADClkSrc << 6) | (bw->IO_CLK_en_core << 5) |
-                (bw->bypclk_div << 2) | (bw->enable_refdiv << 1) | (0 << 0);
+        if (state->version == SOC7090) {
+                dib7000p_write_word(state, 1856, (!bw->pll_reset << 13) | (bw->pll_range << 12) | (bw->pll_ratio << 6) | (bw->pll_prediv));
 
-        dib7000p_write_word(state, 900, clk_cfg0);
+                while (((dib7000p_read_word(state, 1856) >> 15) & 0x1) != 1)
+                        ;
 
-        /* P_pll_cfg */
-        dib7000p_write_word(state, 903, (bw->pll_prediv << 5) | (((bw->pll_ratio >> 6) & 0x3) << 3) | (bw->pll_range << 1) | bw->pll_reset);
-        clk_cfg0 = (bw->pll_bypass << 15) | (clk_cfg0 & 0x7fff);
-        dib7000p_write_word(state, 900, clk_cfg0);
+                dib7000p_write_word(state, 1857, dib7000p_read_word(state, 1857) | (!bw->pll_bypass << 15));
+        } else {
+                /* force PLL bypass */
+                clk_cfg0 = (1 << 15) | ((bw->pll_ratio & 0x3f) << 9) |
+                        (bw->modulo << 7) | (bw->ADClkSrc << 6) | (bw->IO_CLK_en_core << 5) | (bw->bypclk_div << 2) | (bw->enable_refdiv << 1) | (0 << 0);
 
-        dib7000p_write_word(state, 18, (u16) (((bw->internal*1000) >> 16) & 0xffff));
-        dib7000p_write_word(state, 19, (u16) ( (bw->internal*1000       ) & 0xffff));
-        dib7000p_write_word(state, 21, (u16) ( (bw->ifreq          >> 16) & 0xffff));
-        dib7000p_write_word(state, 22, (u16) ( (bw->ifreq               ) & 0xffff));
+                dib7000p_write_word(state, 900, clk_cfg0);
+
+                /* P_pll_cfg */
+                dib7000p_write_word(state, 903, (bw->pll_prediv << 5) | (((bw->pll_ratio >> 6) & 0x3) << 3) | (bw->pll_range << 1) | bw->pll_reset);
+                clk_cfg0 = (bw->pll_bypass << 15) | (clk_cfg0 & 0x7fff);
+                dib7000p_write_word(state, 900, clk_cfg0);
+        }
+
+        dib7000p_write_word(state, 18, (u16) (((bw->internal * 1000) >> 16) & 0xffff));
+        dib7000p_write_word(state, 19, (u16) ((bw->internal * 1000) & 0xffff));
+        dib7000p_write_word(state, 21, (u16) ((bw->ifreq >> 16) & 0xffff));
+        dib7000p_write_word(state, 22, (u16) ((bw->ifreq) & 0xffff));
 
         dib7000p_write_word(state, 72, bw->sad_cfg);
 }
 
+static u32 dib7000p_get_internal_freq(struct dib7000p_state *state)
+{
+        u32 internal = (u32) dib7000p_read_word(state, 18) << 16;
+        internal |= (u32) dib7000p_read_word(state, 19);
+        internal /= 1000;
+
+        return internal;
+}
+
+int dib7000p_update_pll(struct dvb_frontend *fe, struct dibx000_bandwidth_config *bw)
+{
+        struct dib7000p_state *state = fe->demodulator_priv;
+        u16 reg_1857, reg_1856 = dib7000p_read_word(state, 1856);
+        u8 loopdiv, prediv;
+        u32 internal, xtal;
+
+        /* get back old values */
+        prediv = reg_1856 & 0x3f;
+        loopdiv = (reg_1856 >> 6) & 0x3f;
+
+        if ((bw != NULL) && (bw->pll_prediv != prediv || bw->pll_ratio != loopdiv)) {
+                dprintk("Updating pll (prediv: old =  %d new = %d ; loopdiv : old = %d new = %d)", prediv, bw->pll_prediv, loopdiv, bw->pll_ratio);
+                reg_1856 &= 0xf000;
+                reg_1857 = dib7000p_read_word(state, 1857);
+                dib7000p_write_word(state, 1857, reg_1857 & ~(1 << 15));
+
+                dib7000p_write_word(state, 1856, reg_1856 | ((bw->pll_ratio & 0x3f) << 6) | (bw->pll_prediv & 0x3f));
+
+                /* write new system clk into P_sec_len */
+                internal = dib7000p_get_internal_freq(state);
+                xtal = (internal / loopdiv) * prediv;
+                internal = 1000 * (xtal / bw->pll_prediv) * bw->pll_ratio;      /* new internal */
+                dib7000p_write_word(state, 18, (u16) ((internal >> 16) & 0xffff));
+                dib7000p_write_word(state, 19, (u16) (internal & 0xffff));
+
+                dib7000p_write_word(state, 1857, reg_1857 | (1 << 15));
+
+                while (((dib7000p_read_word(state, 1856) >> 15) & 0x1) != 1)
+                        dprintk("Waiting for PLL to lock");
+
+                return 0;
+        }
+        return -EIO;
+}
+EXPORT_SYMBOL(dib7000p_update_pll);
+
 static int dib7000p_reset_gpio(struct dib7000p_state *st)
 {
         /* reset the GPIOs */
-        dprintk( "gpio dir: %x: val: %x, pwm_pos: %x",st->gpio_dir, st->gpio_val,st->cfg.gpio_pwm_pos);
+        dprintk("gpio dir: %x: val: %x, pwm_pos: %x", st->gpio_dir, st->gpio_val, st->cfg.gpio_pwm_pos);
 
         dib7000p_write_word(st, 1029, st->gpio_dir);
         dib7000p_write_word(st, 1030, st->gpio_val);
@@ -360,13 +475,13 @@ static int dib7000p_reset_gpio(struct dib7000p_state *st)
 static int dib7000p_cfg_gpio(struct dib7000p_state *st, u8 num, u8 dir, u8 val)
 {
         st->gpio_dir = dib7000p_read_word(st, 1029);
-        st->gpio_dir &= ~(1 << num);         /* reset the direction bit */
-        st->gpio_dir |=  (dir & 0x1) << num; /* set the new direction */
+        st->gpio_dir &= ~(1 << num);    /* reset the direction bit */
+        st->gpio_dir |= (dir & 0x1) << num;     /* set the new direction */
         dib7000p_write_word(st, 1029, st->gpio_dir);
 
         st->gpio_val = dib7000p_read_word(st, 1030);
-        st->gpio_val &= ~(1 << num);          /* reset the direction bit */
-        st->gpio_val |=  (val & 0x01) << num; /* set the new value */
+        st->gpio_val &= ~(1 << num);    /* reset the direction bit */
+        st->gpio_val |= (val & 0x01) << num;    /* set the new value */
         dib7000p_write_word(st, 1030, st->gpio_val);
 
         return 0;
@@ -377,96 +492,94 @@ int dib7000p_set_gpio(struct dvb_frontend *demod, u8 num, u8 dir, u8 val)
         struct dib7000p_state *state = demod->demodulator_priv;
         return dib7000p_cfg_gpio(state, num, dir, val);
 }
-
 EXPORT_SYMBOL(dib7000p_set_gpio);
-static u16 dib7000p_defaults[] =
 
-{
+static u16 dib7000p_defaults[] = {
         // auto search configuration
         3, 2,
-                0x0004,
-                0x1000,
-                0x0814, /* Equal Lock */
+        0x0004,
+        0x1000,
+        0x0814,                 /* Equal Lock */
 
         12, 6,
-                0x001b,
-                0x7740,
-                0x005b,
-                0x8d80,
-                0x01c9,
-                0xc380,
-                0x0000,
-                0x0080,
-                0x0000,
-                0x0090,
-                0x0001,
-                0xd4c0,
+        0x001b,
+        0x7740,
+        0x005b,
+        0x8d80,
+        0x01c9,
+        0xc380,
+        0x0000,
+        0x0080,
+        0x0000,
+        0x0090,
+        0x0001,
+        0xd4c0,
 
         1, 26,
-                0x6680, // P_timf_alpha=6, P_corm_alpha=6, P_corm_thres=128 default: 6,4,26
+        0x6680,
 
         /* set ADC level to -16 */
         11, 79,
-                (1 << 13) - 825 - 117,
-                (1 << 13) - 837 - 117,
-                (1 << 13) - 811 - 117,
-                (1 << 13) - 766 - 117,
-                (1 << 13) - 737 - 117,
-                (1 << 13) - 693 - 117,
-                (1 << 13) - 648 - 117,
-                (1 << 13) - 619 - 117,
-                (1 << 13) - 575 - 117,
-                (1 << 13) - 531 - 117,
-                (1 << 13) - 501 - 117,
+        (1 << 13) - 825 - 117,
+        (1 << 13) - 837 - 117,
+        (1 << 13) - 811 - 117,
+        (1 << 13) - 766 - 117,
+        (1 << 13) - 737 - 117,
+        (1 << 13) - 693 - 117,
+        (1 << 13) - 648 - 117,
+        (1 << 13) - 619 - 117,
+        (1 << 13) - 575 - 117,
+        (1 << 13) - 531 - 117,
+        (1 << 13) - 501 - 117,
 
         1, 142,
-                0x0410, // P_palf_filter_on=1, P_palf_filter_freeze=0, P_palf_alpha_regul=16
+        0x0410,
 
         /* disable power smoothing */
         8, 145,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
 
         1, 154,
-                1 << 13, // P_fft_freq_dir=1, P_fft_nb_to_cut=0
+        1 << 13,
 
         1, 168,
-                0x0ccd, // P_pha3_thres, default 0x3000
-
-//      1, 169,
-//              0x0010, // P_cti_use_cpe=0, P_cti_use_prog=0, P_cti_win_len=16, default: 0x0010
+        0x0ccd,
 
         1, 183,
-                0x200f, // P_cspu_regul=512, P_cspu_win_cut=15, default: 0x2005
+        0x200f,
+
+        1, 212,
+                0x169,
 
         5, 187,
-                0x023d, // P_adp_regul_cnt=573, default: 410
-                0x00a4, // P_adp_noise_cnt=
-                0x00a4, // P_adp_regul_ext
-                0x7ff0, // P_adp_noise_ext
-                0x3ccc, // P_adp_fil
+        0x023d,
+        0x00a4,
+        0x00a4,
+        0x7ff0,
+        0x3ccc,
 
         1, 198,
-                0x800, // P_equal_thres_wgn
+        0x800,
 
         1, 222,
-                0x0010, // P_fec_ber_rs_len=2
+        0x0010,
 
         1, 235,
-                0x0062, // P_smo_mode, P_smo_rs_discard, P_smo_fifo_flush, P_smo_pid_parse, P_smo_error_discard
+        0x0062,
 
         2, 901,
-                0x0006, // P_clk_cfg1
-                (3 << 10) | (1 << 6), // P_divclksel=3 P_divbitsel=1
+        0x0006,
+        (3 << 10) | (1 << 6),
 
         1, 905,
-                0x2c8e, // Tuner IO bank: max drive (14mA) + divout pads max drive
+        0x2c8e,
 
         0,
 };
@@ -475,51 +588,64 @@ static int dib7000p_demod_reset(struct dib7000p_state *state)
 {
         dib7000p_set_power_mode(state, DIB7000P_POWER_ALL);
 
+        if (state->version == SOC7090)
+                dibx000_reset_i2c_master(&state->i2c_master);
+
         dib7000p_set_adc_state(state, DIBX000_VBG_ENABLE);
 
         /* restart all parts */
-        dib7000p_write_word(state,  770, 0xffff);
-        dib7000p_write_word(state,  771, 0xffff);
-        dib7000p_write_word(state,  772, 0x001f);
-        dib7000p_write_word(state,  898, 0x0003);
-        /* except i2c, sdio, gpio - control interfaces */
-        dib7000p_write_word(state, 1280, 0x01fc - ((1 << 7) | (1 << 6) | (1 << 5)) );
-
-        dib7000p_write_word(state,  770, 0);
-        dib7000p_write_word(state,  771, 0);
-        dib7000p_write_word(state,  772, 0);
-        dib7000p_write_word(state,  898, 0);
+        dib7000p_write_word(state, 770, 0xffff);
+        dib7000p_write_word(state, 771, 0xffff);
+        dib7000p_write_word(state, 772, 0x001f);
+        dib7000p_write_word(state, 898, 0x0003);
+        dib7000p_write_word(state, 1280, 0x001f - ((1 << 4) | (1 << 3)));
+
+        dib7000p_write_word(state, 770, 0);
+        dib7000p_write_word(state, 771, 0);
+        dib7000p_write_word(state, 772, 0);
+        dib7000p_write_word(state, 898, 0);
         dib7000p_write_word(state, 1280, 0);
 
         /* default */
         dib7000p_reset_pll(state);
 
         if (dib7000p_reset_gpio(state) != 0)
-                dprintk( "GPIO reset was not successful.");
+                dprintk("GPIO reset was not successful.");
 
-        if (dib7000p_set_output_mode(state, OUTMODE_HIGH_Z) != 0)
-                dprintk( "OUTPUT_MODE could not be reset.");
+        if (state->version == SOC7090) {
+                dib7000p_write_word(state, 899, 0);
 
-        /* unforce divstr regardless whether i2c enumeration was done or not */
-        dib7000p_write_word(state, 1285, dib7000p_read_word(state, 1285) & ~(1 << 1) );
-
-        dib7000p_set_bandwidth(state, 8000);
+                /* impulse noise */
+                dib7000p_write_word(state, 42, (1<<5) | 3); /* P_iqc_thsat_ipc = 1 ; P_iqc_win2 = 3 */
+                dib7000p_write_word(state, 43, 0x2d4); /*-300 fag P_iqc_dect_min = -280 */
+                dib7000p_write_word(state, 44, 300); /* 300 fag P_iqc_dect_min = +280 */
+                dib7000p_write_word(state, 273, (1<<6) | 30);
+        }
+        if (dib7000p_set_output_mode(state, OUTMODE_HIGH_Z) != 0)
+                dprintk("OUTPUT_MODE could not be reset.");
 
         dib7000p_set_adc_state(state, DIBX000_SLOW_ADC_ON);
         dib7000p_sad_calib(state);
         dib7000p_set_adc_state(state, DIBX000_SLOW_ADC_OFF);
 
-        // P_iqc_alpha_pha, P_iqc_alpha_amp_dcc_alpha, ...
-        if(state->cfg.tuner_is_baseband)
-                dib7000p_write_word(state, 36,0x0755);
-        else
-                dib7000p_write_word(state, 36,0x1f55);
+        /* unforce divstr regardless whether i2c enumeration was done or not */
+        dib7000p_write_word(state, 1285, dib7000p_read_word(state, 1285) & ~(1 << 1));
+
+        dib7000p_set_bandwidth(state, 8000);
+
+        if (state->version == SOC7090) {
+                dib7000p_write_word(state, 36, 0x5755);/* P_iqc_impnc_on =1 & P_iqc_corr_inh = 1 for impulsive noise */
+        } else {
+                if (state->cfg.tuner_is_baseband)
+                        dib7000p_write_word(state, 36, 0x0755);
+                else
+                        dib7000p_write_word(state, 36, 0x1f55);
+        }
 
         dib7000p_write_tab(state, dib7000p_defaults);
 
         dib7000p_set_power_mode(state, DIB7000P_POWER_INTERFACE_ONLY);
 
-
         return 0;
 }
 
@@ -527,9 +653,9 @@ static void dib7000p_pll_clk_cfg(struct dib7000p_state *state)
 {
         u16 tmp = 0;
         tmp = dib7000p_read_word(state, 903);
-        dib7000p_write_word(state, 903, (tmp | 0x1));   //pwr-up pll
+        dib7000p_write_word(state, 903, (tmp | 0x1));
         tmp = dib7000p_read_word(state, 900);
-        dib7000p_write_word(state, 900, (tmp & 0x7fff) | (1 << 6));     //use High freq clock
+        dib7000p_write_word(state, 900, (tmp & 0x7fff) | (1 << 6));
 }
 
 static void dib7000p_restart_agc(struct dib7000p_state *state)
@@ -543,11 +669,9 @@ static int dib7000p_update_lna(struct dib7000p_state *state)
 {
         u16 dyn_gain;
 
-        // when there is no LNA to program return immediatly
         if (state->cfg.update_lna) {
-                // read dyn_gain here (because it is demod-dependent and not fe)
                 dyn_gain = dib7000p_read_word(state, 394);
-                if (state->cfg.update_lna(&state->demod,dyn_gain)) { // LNA has changed
+                if (state->cfg.update_lna(&state->demod, dyn_gain)) {
                         dib7000p_restart_agc(state);
                         return 1;
                 }
@@ -571,24 +695,24 @@ static int dib7000p_set_agc_config(struct dib7000p_state *state, u8 band)
                 }
 
         if (agc == NULL) {
-                dprintk( "no valid AGC configuration found for band 0x%02x",band);
+                dprintk("no valid AGC configuration found for band 0x%02x", band);
                 return -EINVAL;
         }
 
         state->current_agc = agc;
 
         /* AGC */
-        dib7000p_write_word(state, 75 ,  agc->setup );
-        dib7000p_write_word(state, 76 ,  agc->inv_gain );
-        dib7000p_write_word(state, 77 ,  agc->time_stabiliz );
+        dib7000p_write_word(state, 75, agc->setup);
+        dib7000p_write_word(state, 76, agc->inv_gain);
+        dib7000p_write_word(state, 77, agc->time_stabiliz);
         dib7000p_write_word(state, 100, (agc->alpha_level << 12) | agc->thlock);
 
         // Demod AGC loop configuration
         dib7000p_write_word(state, 101, (agc->alpha_mant << 5) | agc->alpha_exp);
-        dib7000p_write_word(state, 102, (agc->beta_mant << 6)  | agc->beta_exp);
+        dib7000p_write_word(state, 102, (agc->beta_mant << 6) | agc->beta_exp);
 
         /* AGC continued */
-        dprintk( "WBD: ref: %d, sel: %d, active: %d, alpha: %d",
+        dprintk("WBD: ref: %d, sel: %d, active: %d, alpha: %d",
                 state->wbd_ref != 0 ? state->wbd_ref : agc->wbd_ref, agc->wbd_sel, !agc->perform_agc_softsplit, agc->wbd_sel);
 
         if (state->wbd_ref != 0)
@@ -598,101 +722,135 @@ static int dib7000p_set_agc_config(struct dib7000p_state *state, u8 band)
 
         dib7000p_write_word(state, 106, (agc->wbd_sel << 13) | (agc->wbd_alpha << 9) | (agc->perform_agc_softsplit << 8));
 
-        dib7000p_write_word(state, 107,  agc->agc1_max);
-        dib7000p_write_word(state, 108,  agc->agc1_min);
-        dib7000p_write_word(state, 109,  agc->agc2_max);
-        dib7000p_write_word(state, 110,  agc->agc2_min);
-        dib7000p_write_word(state, 111, (agc->agc1_pt1    << 8) | agc->agc1_pt2);
-        dib7000p_write_word(state, 112,  agc->agc1_pt3);
+        dib7000p_write_word(state, 107, agc->agc1_max);
+        dib7000p_write_word(state, 108, agc->agc1_min);
+        dib7000p_write_word(state, 109, agc->agc2_max);
+        dib7000p_write_word(state, 110, agc->agc2_min);
+        dib7000p_write_word(state, 111, (agc->agc1_pt1 << 8) | agc->agc1_pt2);
+        dib7000p_write_word(state, 112, agc->agc1_pt3);
         dib7000p_write_word(state, 113, (agc->agc1_slope1 << 8) | agc->agc1_slope2);
-        dib7000p_write_word(state, 114, (agc->agc2_pt1    << 8) | agc->agc2_pt2);
+        dib7000p_write_word(state, 114, (agc->agc2_pt1 << 8) | agc->agc2_pt2);
         dib7000p_write_word(state, 115, (agc->agc2_slope1 << 8) | agc->agc2_slope2);
         return 0;
 }
 
+static void dib7000p_set_dds(struct dib7000p_state *state, s32 offset_khz)
+{
+        u32 internal = dib7000p_get_internal_freq(state);
+        s32 unit_khz_dds_val = 67108864 / (internal);   /* 2**26 / Fsampling is the unit 1KHz offset */
+        u32 abs_offset_khz = ABS(offset_khz);
+        u32 dds = state->cfg.bw->ifreq & 0x1ffffff;
+        u8 invert = !!(state->cfg.bw->ifreq & (1 << 25));
+
+        dprintk("setting a frequency offset of %dkHz internal freq = %d invert = %d", offset_khz, internal, invert);
+
+        if (offset_khz < 0)
+                unit_khz_dds_val *= -1;
+
+        /* IF tuner */
+        if (invert)
+                dds -= (abs_offset_khz * unit_khz_dds_val);     /* /100 because of /100 on the unit_khz_dds_val line calc for better accuracy */
+        else
+                dds += (abs_offset_khz * unit_khz_dds_val);
+
+        if (abs_offset_khz <= (internal / 2)) { /* Max dds offset is the half of the demod freq */
+                dib7000p_write_word(state, 21, (u16) (((dds >> 16) & 0x1ff) | (0 << 10) | (invert << 9)));
+                dib7000p_write_word(state, 22, (u16) (dds & 0xffff));
+        }
+}
+
 static int dib7000p_agc_startup(struct dvb_frontend *demod, struct dvb_frontend_parameters *ch)
 {
         struct dib7000p_state *state = demod->demodulator_priv;
         int ret = -1;
         u8 *agc_state = &state->agc_state;
         u8 agc_split;
+        u16 reg;
+        u32 upd_demod_gain_period = 0x1000;
 
         switch (state->agc_state) {
-                case 0:
-                        // set power-up level: interf+analog+AGC
-                        dib7000p_set_power_mode(state, DIB7000P_POWER_ALL);
+        case 0:
+                dib7000p_set_power_mode(state, DIB7000P_POWER_ALL);
+                if (state->version == SOC7090) {
+                        reg = dib7000p_read_word(state, 0x79b) & 0xff00;
+                        dib7000p_write_word(state, 0x79a, upd_demod_gain_period & 0xFFFF);      /* lsb */
+                        dib7000p_write_word(state, 0x79b, reg | (1 << 14) | ((upd_demod_gain_period >> 16) & 0xFF));
+
+                        /* enable adc i & q */
+                        reg = dib7000p_read_word(state, 0x780);
+                        dib7000p_write_word(state, 0x780, (reg | (0x3)) & (~(1 << 7)));
+                } else {
                         dib7000p_set_adc_state(state, DIBX000_ADC_ON);
                         dib7000p_pll_clk_cfg(state);
+                }
 
-                        if (dib7000p_set_agc_config(state, BAND_OF_FREQUENCY(ch->frequency/1000)) != 0)
-                                return -1;
-
-                        ret = 7;
-                        (*agc_state)++;
-                        break;
+                if (dib7000p_set_agc_config(state, BAND_OF_FREQUENCY(ch->frequency / 1000)) != 0)
+                        return -1;
 
-                case 1:
-                        // AGC initialization
-                        if (state->cfg.agc_control)
-                                state->cfg.agc_control(&state->demod, 1);
-
-                        dib7000p_write_word(state, 78, 32768);
-                        if (!state->current_agc->perform_agc_softsplit) {
-                                /* we are using the wbd - so slow AGC startup */
-                                /* force 0 split on WBD and restart AGC */
-                                dib7000p_write_word(state, 106, (state->current_agc->wbd_sel << 13) | (state->current_agc->wbd_alpha << 9) | (1 << 8));
-                                (*agc_state)++;
-                                ret = 5;
-                        } else {
-                                /* default AGC startup */
-                                (*agc_state) = 4;
-                                /* wait AGC rough lock time */
-                                ret = 7;
-                        }
+                dib7000p_set_dds(state, 0);
+                ret = 7;
+                (*agc_state)++;
+                break;
 
-                        dib7000p_restart_agc(state);
-                        break;
+        case 1:
+                if (state->cfg.agc_control)
+                        state->cfg.agc_control(&state->demod, 1);
 
-                case 2: /* fast split search path after 5sec */
-                        dib7000p_write_word(state,  75, state->current_agc->setup | (1 << 4)); /* freeze AGC loop */
-                        dib7000p_write_word(state, 106, (state->current_agc->wbd_sel << 13) | (2 << 9) | (0 << 8)); /* fast split search 0.25kHz */
+                dib7000p_write_word(state, 78, 32768);
+                if (!state->current_agc->perform_agc_softsplit) {
+                        /* we are using the wbd - so slow AGC startup */
+                        /* force 0 split on WBD and restart AGC */
+                        dib7000p_write_word(state, 106, (state->current_agc->wbd_sel << 13) | (state->current_agc->wbd_alpha << 9) | (1 << 8));
                         (*agc_state)++;
-                        ret = 14;
-                        break;
+                        ret = 5;
+                } else {
+                        /* default AGC startup */
+                        (*agc_state) = 4;
+                        /* wait AGC rough lock time */
+                        ret = 7;
+                }
 
-        case 3: /* split search ended */
-                        agc_split = (u8)dib7000p_read_word(state, 396); /* store the split value for the next time */
-                        dib7000p_write_word(state, 78, dib7000p_read_word(state, 394)); /* set AGC gain start value */
+                dib7000p_restart_agc(state);
+                break;
 
-                        dib7000p_write_word(state, 75,  state->current_agc->setup);   /* std AGC loop */
-                        dib7000p_write_word(state, 106, (state->current_agc->wbd_sel << 13) | (state->current_agc->wbd_alpha << 9) | agc_split); /* standard split search */
+        case 2:         /* fast split search path after 5sec */
+                dib7000p_write_word(state, 75, state->current_agc->setup | (1 << 4));   /* freeze AGC loop */
+                dib7000p_write_word(state, 106, (state->current_agc->wbd_sel << 13) | (2 << 9) | (0 << 8));     /* fast split search 0.25kHz */
+                (*agc_state)++;
+                ret = 14;
+                break;
 
-                        dib7000p_restart_agc(state);
+        case 3:         /* split search ended */
+                agc_split = (u8) dib7000p_read_word(state, 396);        /* store the split value for the next time */
+                dib7000p_write_word(state, 78, dib7000p_read_word(state, 394)); /* set AGC gain start value */
 
-                        dprintk( "SPLIT %p: %hd", demod, agc_split);
+                dib7000p_write_word(state, 75, state->current_agc->setup);      /* std AGC loop */
+                dib7000p_write_word(state, 106, (state->current_agc->wbd_sel << 13) | (state->current_agc->wbd_alpha << 9) | agc_split);        /* standard split search */
 
-                        (*agc_state)++;
-                        ret = 5;
-                        break;
+                dib7000p_restart_agc(state);
 
-                case 4: /* LNA startup */
-                        // wait AGC accurate lock time
-                        ret = 7;
+                dprintk("SPLIT %p: %hd", demod, agc_split);
 
-                        if (dib7000p_update_lna(state))
-                                // wait only AGC rough lock time
-                                ret = 5;
-                        else // nothing was done, go to the next state
-                                (*agc_state)++;
-                        break;
+                (*agc_state)++;
+                ret = 5;
+                break;
+
+        case 4:         /* LNA startup */
+                ret = 7;
 
-                case 5:
-                        if (state->cfg.agc_control)
-                                state->cfg.agc_control(&state->demod, 0);
+                if (dib7000p_update_lna(state))
+                        ret = 5;
+                else
                         (*agc_state)++;
-                        break;
-                default:
-                        break;
+                break;
+
+        case 5:
+                if (state->cfg.agc_control)
+                        state->cfg.agc_control(&state->demod, 0);
+                (*agc_state)++;
+                break;
+        default:
+                break;
         }
         return ret;
 }
@@ -703,45 +861,89 @@ static void dib7000p_update_timf(struct dib7000p_state *state)
         state->timf = timf * 160 / (state->current_bandwidth / 50);
         dib7000p_write_word(state, 23, (u16) (timf >> 16));
         dib7000p_write_word(state, 24, (u16) (timf & 0xffff));
-        dprintk( "updated timf_frequency: %d (default: %d)",state->timf, state->cfg.bw->timf);
+        dprintk("updated timf_frequency: %d (default: %d)", state->timf, state->cfg.bw->timf);
+
+}
 
+u32 dib7000p_ctrl_timf(struct dvb_frontend *fe, u8 op, u32 timf)
+{
+        struct dib7000p_state *state = fe->demodulator_priv;
+        switch (op) {
+        case DEMOD_TIMF_SET:
+                state->timf = timf;
+                break;
+        case DEMOD_TIMF_UPDATE:
+                dib7000p_update_timf(state);
+                break;
+        case DEMOD_TIMF_GET:
+                break;
+        }
+        dib7000p_set_bandwidth(state, state->current_bandwidth);
+        return state->timf;
 }
+EXPORT_SYMBOL(dib7000p_ctrl_timf);
 
 static void dib7000p_set_channel(struct dib7000p_state *state, struct dvb_frontend_parameters *ch, u8 seq)
 {
         u16 value, est[4];
 
-    dib7000p_set_bandwidth(state, BANDWIDTH_TO_KHZ(ch->u.ofdm.bandwidth));
+        dib7000p_set_bandwidth(state, BANDWIDTH_TO_KHZ(ch->u.ofdm.bandwidth));
 
         /* nfft, guard, qam, alpha */
         value = 0;
         switch (ch->u.ofdm.transmission_mode) {
-                case TRANSMISSION_MODE_2K: value |= (0 << 7); break;
-                case /* 4K MODE */ 255: value |= (2 << 7); break;
-                default:
-                case TRANSMISSION_MODE_8K: value |= (1 << 7); break;
+        case TRANSMISSION_MODE_2K:
+                value |= (0 << 7);
+                break;
+        case TRANSMISSION_MODE_4K:
+                value |= (2 << 7);
+                break;
+        default:
+        case TRANSMISSION_MODE_8K:
+                value |= (1 << 7);
+                break;
         }
         switch (ch->u.ofdm.guard_interval) {
-                case GUARD_INTERVAL_1_32: value |= (0 << 5); break;
-                case GUARD_INTERVAL_1_16: value |= (1 << 5); break;
-                case GUARD_INTERVAL_1_4:  value |= (3 << 5); break;
-                default:
-                case GUARD_INTERVAL_1_8:  value |= (2 << 5); break;
+        case GUARD_INTERVAL_1_32:
+                value |= (0 << 5);
+                break;
+        case GUARD_INTERVAL_1_16:
+                value |= (1 << 5);
+                break;
+        case GUARD_INTERVAL_1_4:
+                value |= (3 << 5);
+                break;
+        default:
+        case GUARD_INTERVAL_1_8:
+                value |= (2 << 5);
+                break;
         }
         switch (ch->u.ofdm.constellation) {
-                case QPSK:  value |= (0 << 3); break;
-                case QAM_16: value |= (1 << 3); break;
-                default:
-                case QAM_64: value |= (2 << 3); break;
+        case QPSK:
+                value |= (0 << 3);
+                break;
+        case QAM_16:
+                value |= (1 << 3);
+                break;
+        default:
+        case QAM_64:
+                value |= (2 << 3);
+                break;
         }
         switch (HIERARCHY_1) {
-                case HIERARCHY_2: value |= 2; break;
-                case HIERARCHY_4: value |= 4; break;
-                default:
-                case HIERARCHY_1: value |= 1; break;
+        case HIERARCHY_2:
+                value |= 2;
+                break;
+        case HIERARCHY_4:
+                value |= 4;
+                break;
+        default:
+        case HIERARCHY_1:
+                value |= 1;
+                break;
         }
         dib7000p_write_word(state, 0, value);
-        dib7000p_write_word(state, 5, (seq << 4) | 1); /* do not force tps, search list 0 */
+        dib7000p_write_word(state, 5, (seq << 4) | 1);  /* do not force tps, search list 0 */
 
         /* P_dintl_native, P_dintlv_inv, P_hrch, P_code_rate, P_select_hp */
         value = 0;
@@ -752,39 +954,63 @@ static void dib7000p_set_channel(struct dib7000p_state *state, struct dvb_fronte
         if (1 == 1)
                 value |= 1;
         switch ((ch->u.ofdm.hierarchy_information == 0 || 1 == 1) ? ch->u.ofdm.code_rate_HP : ch->u.ofdm.code_rate_LP) {
-                case FEC_2_3: value |= (2 << 1); break;
-                case FEC_3_4: value |= (3 << 1); break;
-                case FEC_5_6: value |= (5 << 1); break;
-                case FEC_7_8: value |= (7 << 1); break;
-                default:
-                case FEC_1_2: value |= (1 << 1); break;
+        case FEC_2_3:
+                value |= (2 << 1);
+                break;
+        case FEC_3_4:
+                value |= (3 << 1);
+                break;
+        case FEC_5_6:
+                value |= (5 << 1);
+                break;
+        case FEC_7_8:
+                value |= (7 << 1);
+                break;
+        default:
+        case FEC_1_2:
+                value |= (1 << 1);
+                break;
         }
         dib7000p_write_word(state, 208, value);
 
         /* offset loop parameters */
-        dib7000p_write_word(state, 26, 0x6680); // timf(6xxx)
-        dib7000p_write_word(state, 32, 0x0003); // pha_off_max(xxx3)
-        dib7000p_write_word(state, 29, 0x1273); // isi
-        dib7000p_write_word(state, 33, 0x0005); // sfreq(xxx5)
+        dib7000p_write_word(state, 26, 0x6680);
+        dib7000p_write_word(state, 32, 0x0003);
+        dib7000p_write_word(state, 29, 0x1273);
+        dib7000p_write_word(state, 33, 0x0005);
 
         /* P_dvsy_sync_wait */
         switch (ch->u.ofdm.transmission_mode) {
-                case TRANSMISSION_MODE_8K: value = 256; break;
-                case /* 4K MODE */ 255: value = 128; break;
-                case TRANSMISSION_MODE_2K:
-                default: value = 64; break;
+        case TRANSMISSION_MODE_8K:
+                value = 256;
+                break;
+        case TRANSMISSION_MODE_4K:
+                value = 128;
+                break;
+        case TRANSMISSION_MODE_2K:
+        default:
+                value = 64;
+                break;
         }
         switch (ch->u.ofdm.guard_interval) {
-                case GUARD_INTERVAL_1_16: value *= 2; break;
-                case GUARD_INTERVAL_1_8:  value *= 4; break;
-                case GUARD_INTERVAL_1_4:  value *= 8; break;
-                default:
-                case GUARD_INTERVAL_1_32: value *= 1; break;
+        case GUARD_INTERVAL_1_16:
+                value *= 2;
+                break;
+        case GUARD_INTERVAL_1_8:
+                value *= 4;
+                break;
+        case GUARD_INTERVAL_1_4:
+                value *= 8;
+                break;
+        default:
+        case GUARD_INTERVAL_1_32:
+                value *= 1;
+                break;
         }
         if (state->cfg.diversity_delay == 0)
-                state->div_sync_wait = (value * 3) / 2 + 48; // add 50% SFN margin + compensate for one DVSY-fifo
+                state->div_sync_wait = (value * 3) / 2 + 48;
         else
-                state->div_sync_wait = (value * 3) / 2 + state->cfg.diversity_delay; // add 50% SFN margin + compensate for one DVSY-fifo
+                state->div_sync_wait = (value * 3) / 2 + state->cfg.diversity_delay;
 
         /* deactive the possibility of diversity reception if extended interleaver */
         state->div_force_off = !1 && ch->u.ofdm.transmission_mode != TRANSMISSION_MODE_8K;
@@ -792,24 +1018,24 @@ static void dib7000p_set_channel(struct dib7000p_state *state, struct dvb_fronte
 
         /* channel estimation fine configuration */
         switch (ch->u.ofdm.constellation) {
-                case QAM_64:
-                        est[0] = 0x0148;       /* P_adp_regul_cnt 0.04 */
-                        est[1] = 0xfff0;       /* P_adp_noise_cnt -0.002 */
-                        est[2] = 0x00a4;       /* P_adp_regul_ext 0.02 */
-                        est[3] = 0xfff8;       /* P_adp_noise_ext -0.001 */
-                        break;
-                case QAM_16:
-                        est[0] = 0x023d;       /* P_adp_regul_cnt 0.07 */
-                        est[1] = 0xffdf;       /* P_adp_noise_cnt -0.004 */
-                        est[2] = 0x00a4;       /* P_adp_regul_ext 0.02 */
-                        est[3] = 0xfff0;       /* P_adp_noise_ext -0.002 */
-                        break;
-                default:
-                        est[0] = 0x099a;       /* P_adp_regul_cnt 0.3 */
-                        est[1] = 0xffae;       /* P_adp_noise_cnt -0.01 */
-                        est[2] = 0x0333;       /* P_adp_regul_ext 0.1 */
-                        est[3] = 0xfff8;       /* P_adp_noise_ext -0.002 */
-                        break;
+        case QAM_64:
+                est[0] = 0x0148;        /* P_adp_regul_cnt 0.04 */
+                est[1] = 0xfff0;        /* P_adp_noise_cnt -0.002 */
+                est[2] = 0x00a4;        /* P_adp_regul_ext 0.02 */
+                est[3] = 0xfff8;        /* P_adp_noise_ext -0.001 */
+                break;
+        case QAM_16:
+                est[0] = 0x023d;        /* P_adp_regul_cnt 0.07 */
+                est[1] = 0xffdf;        /* P_adp_noise_cnt -0.004 */
+                est[2] = 0x00a4;        /* P_adp_regul_ext 0.02 */
+                est[3] = 0xfff0;        /* P_adp_noise_ext -0.002 */
+                break;
+        default:
+                est[0] = 0x099a;        /* P_adp_regul_cnt 0.3 */
+                est[1] = 0xffae;        /* P_adp_noise_cnt -0.01 */
+                est[2] = 0x0333;        /* P_adp_regul_ext 0.1 */
+                est[3] = 0xfff8;        /* P_adp_noise_ext -0.002 */
+                break;
         }
         for (value = 0; value < 4; value++)
                 dib7000p_write_word(state, 187 + value, est[value]);
@@ -820,14 +1046,15 @@ static int dib7000p_autosearch_start(struct dvb_frontend *demod, struct dvb_fron
         struct dib7000p_state *state = demod->demodulator_priv;
         struct dvb_frontend_parameters schan;
         u32 value, factor;
+        u32 internal = dib7000p_get_internal_freq(state);
 
         schan = *ch;
         schan.u.ofdm.constellation = QAM_64;
-        schan.u.ofdm.guard_interval         = GUARD_INTERVAL_1_32;
-        schan.u.ofdm.transmission_mode          = TRANSMISSION_MODE_8K;
-        schan.u.ofdm.code_rate_HP  = FEC_2_3;
-        schan.u.ofdm.code_rate_LP  = FEC_3_4;
-        schan.u.ofdm.hierarchy_information          = 0;
+        schan.u.ofdm.guard_interval = GUARD_INTERVAL_1_32;
+        schan.u.ofdm.transmission_mode = TRANSMISSION_MODE_8K;
+        schan.u.ofdm.code_rate_HP = FEC_2_3;
+        schan.u.ofdm.code_rate_LP = FEC_3_4;
+        schan.u.ofdm.hierarchy_information = 0;
 
         dib7000p_set_channel(state, &schan, 7);
 
@@ -837,16 +1064,15 @@ static int dib7000p_autosearch_start(struct dvb_frontend *demod, struct dvb_fron
         else
                 factor = 6;
 
-        // always use the setting for 8MHz here lock_time for 7,6 MHz are longer
-        value = 30 * state->cfg.bw->internal * factor;
-        dib7000p_write_word(state, 6,  (u16) ((value >> 16) & 0xffff)); // lock0 wait time
-        dib7000p_write_word(state, 7,  (u16)  (value        & 0xffff)); // lock0 wait time
-        value = 100 * state->cfg.bw->internal * factor;
-        dib7000p_write_word(state, 8,  (u16) ((value >> 16) & 0xffff)); // lock1 wait time
-        dib7000p_write_word(state, 9,  (u16)  (value        & 0xffff)); // lock1 wait time
-        value = 500 * state->cfg.bw->internal * factor;
-        dib7000p_write_word(state, 10, (u16) ((value >> 16) & 0xffff)); // lock2 wait time
-        dib7000p_write_word(state, 11, (u16)  (value        & 0xffff)); // lock2 wait time
+        value = 30 * internal * factor;
+        dib7000p_write_word(state, 6, (u16) ((value >> 16) & 0xffff));
+        dib7000p_write_word(state, 7, (u16) (value & 0xffff));
+        value = 100 * internal * factor;
+        dib7000p_write_word(state, 8, (u16) ((value >> 16) & 0xffff));
+        dib7000p_write_word(state, 9, (u16) (value & 0xffff));
+        value = 500 * internal * factor;
+        dib7000p_write_word(state, 10, (u16) ((value >> 16) & 0xffff));
+        dib7000p_write_word(state, 11, (u16) (value & 0xffff));
 
         value = dib7000p_read_word(state, 0);
         dib7000p_write_word(state, 0, (u16) ((1 << 9) | value));
@@ -861,101 +1087,101 @@ static int dib7000p_autosearch_is_irq(struct dvb_frontend *demod)
         struct dib7000p_state *state = demod->demodulator_priv;
         u16 irq_pending = dib7000p_read_word(state, 1284);
 
-        if (irq_pending & 0x1) // failed
+        if (irq_pending & 0x1)
                 return 1;
 
-        if (irq_pending & 0x2) // succeeded
+        if (irq_pending & 0x2)
                 return 2;
 
-        return 0; // still pending
+        return 0;
 }
 
 static void dib7000p_spur_protect(struct dib7000p_state *state, u32 rf_khz, u32 bw)
 {
-        static s16 notch[]={16143, 14402, 12238, 9713, 6902, 3888, 759, -2392};
-        static u8 sine [] ={0, 2, 3, 5, 6, 8, 9, 11, 13, 14, 16, 17, 19, 20, 22,
-        24, 25, 27, 28, 30, 31, 33, 34, 36, 38, 39, 41, 42, 44, 45, 47, 48, 50, 51,
-        53, 55, 56, 58, 59, 61, 62, 64, 65, 67, 68, 70, 71, 73, 74, 76, 77, 79, 80,
-        82, 83, 85, 86, 88, 89, 91, 92, 94, 95, 97, 98, 99, 101, 102, 104, 105,
-        107, 108, 109, 111, 112, 114, 115, 117, 118, 119, 121, 122, 123, 125, 126,
-        128, 129, 130, 132, 133, 134, 136, 137, 138, 140, 141, 142, 144, 145, 146,
-        147, 149, 150, 151, 152, 154, 155, 156, 157, 159, 160, 161, 162, 164, 165,
-        166, 167, 168, 170, 171, 172, 173, 174, 175, 177, 178, 179, 180, 181, 182,
-        183, 184, 185, 186, 188, 189, 190, 191, 192, 193, 194, 195, 196, 197, 198,
-        199, 200, 201, 202, 203, 204, 205, 206, 207, 207, 208, 209, 210, 211, 212,
-        213, 214, 215, 215, 216, 217, 218, 219, 220, 220, 221, 222, 223, 224, 224,
-        225, 226, 227, 227, 228, 229, 229, 230, 231, 231, 232, 233, 233, 234, 235,
-        235, 236, 237, 237, 238, 238, 239, 239, 240, 241, 241, 242, 242, 243, 243,
-        244, 244, 245, 245, 245, 246, 246, 247, 247, 248, 248, 248, 249, 249, 249,
-        250, 250, 250, 251, 251, 251, 252, 252, 252, 252, 253, 253, 253, 253, 254,
-        254, 254, 254, 254, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255,
-        255, 255, 255, 255, 255, 255};
+        static s16 notch[] = { 16143, 14402, 12238, 9713, 6902, 3888, 759, -2392 };
+        static u8 sine[] = { 0, 2, 3, 5, 6, 8, 9, 11, 13, 14, 16, 17, 19, 20, 22,
+                24, 25, 27, 28, 30, 31, 33, 34, 36, 38, 39, 41, 42, 44, 45, 47, 48, 50, 51,
+                53, 55, 56, 58, 59, 61, 62, 64, 65, 67, 68, 70, 71, 73, 74, 76, 77, 79, 80,
+                82, 83, 85, 86, 88, 89, 91, 92, 94, 95, 97, 98, 99, 101, 102, 104, 105,
+                107, 108, 109, 111, 112, 114, 115, 117, 118, 119, 121, 122, 123, 125, 126,
+                128, 129, 130, 132, 133, 134, 136, 137, 138, 140, 141, 142, 144, 145, 146,
+                147, 149, 150, 151, 152, 154, 155, 156, 157, 159, 160, 161, 162, 164, 165,
+                166, 167, 168, 170, 171, 172, 173, 174, 175, 177, 178, 179, 180, 181, 182,
+                183, 184, 185, 186, 188, 189, 190, 191, 192, 193, 194, 195, 196, 197, 198,
+                199, 200, 201, 202, 203, 204, 205, 206, 207, 207, 208, 209, 210, 211, 212,
+                213, 214, 215, 215, 216, 217, 218, 219, 220, 220, 221, 222, 223, 224, 224,
+                225, 226, 227, 227, 228, 229, 229, 230, 231, 231, 232, 233, 233, 234, 235,
+                235, 236, 237, 237, 238, 238, 239, 239, 240, 241, 241, 242, 242, 243, 243,
+                244, 244, 245, 245, 245, 246, 246, 247, 247, 248, 248, 248, 249, 249, 249,
+                250, 250, 250, 251, 251, 251, 252, 252, 252, 252, 253, 253, 253, 253, 254,
+                254, 254, 254, 254, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255,
+                255, 255, 255, 255, 255, 255
+        };
 
         u32 xtal = state->cfg.bw->xtal_hz / 1000;
         int f_rel = DIV_ROUND_CLOSEST(rf_khz, xtal) * xtal - rf_khz;
         int k;
-        int coef_re[8],coef_im[8];
+        int coef_re[8], coef_im[8];
         int bw_khz = bw;
         u32 pha;
 
-        dprintk( "relative position of the Spur: %dk (RF: %dk, XTAL: %dk)", f_rel, rf_khz, xtal);
-
+        dprintk("relative position of the Spur: %dk (RF: %dk, XTAL: %dk)", f_rel, rf_khz, xtal);
 
-        if (f_rel < -bw_khz/2 || f_rel > bw_khz/2)
+        if (f_rel < -bw_khz / 2 || f_rel > bw_khz / 2)
                 return;
 
         bw_khz /= 100;
 
-        dib7000p_write_word(state, 142 ,0x0610);
+        dib7000p_write_word(state, 142, 0x0610);
 
         for (k = 0; k < 8; k++) {
-                pha = ((f_rel * (k+1) * 112 * 80/bw_khz) /1000) & 0x3ff;
+                pha = ((f_rel * (k + 1) * 112 * 80 / bw_khz) / 1000) & 0x3ff;
 
-                if (pha==0) {
+                if (pha == 0) {
                         coef_re[k] = 256;
                         coef_im[k] = 0;
-                } else if(pha < 256) {
-                        coef_re[k] = sine[256-(pha&0xff)];
-                        coef_im[k] = sine[pha&0xff];
+                } else if (pha < 256) {
+                        coef_re[k] = sine[256 - (pha & 0xff)];
+                        coef_im[k] = sine[pha & 0xff];
                 } else if (pha == 256) {
                         coef_re[k] = 0;
                         coef_im[k] = 256;
                 } else if (pha < 512) {
-                        coef_re[k] = -sine[pha&0xff];
-                        coef_im[k] = sine[256 - (pha&0xff)];
+                        coef_re[k] = -sine[pha & 0xff];
+                        coef_im[k] = sine[256 - (pha & 0xff)];
                 } else if (pha == 512) {
                         coef_re[k] = -256;
                         coef_im[k] = 0;
                 } else if (pha < 768) {
-                        coef_re[k] = -sine[256-(pha&0xff)];
-                        coef_im[k] = -sine[pha&0xff];
+                        coef_re[k] = -sine[256 - (pha & 0xff)];
+                        coef_im[k] = -sine[pha & 0xff];
                 } else if (pha == 768) {
                         coef_re[k] = 0;
                         coef_im[k] = -256;
                 } else {
-                        coef_re[k] = sine[pha&0xff];
-                        coef_im[k] = -sine[256 - (pha&0xff)];
+                        coef_re[k] = sine[pha & 0xff];
+                        coef_im[k] = -sine[256 - (pha & 0xff)];
                 }
 
                 coef_re[k] *= notch[k];
-                coef_re[k] += (1<<14);
-                if (coef_re[k] >= (1<<24))
-                        coef_re[k]  = (1<<24) - 1;
-                coef_re[k] /= (1<<15);
+                coef_re[k] += (1 << 14);
+                if (coef_re[k] >= (1 << 24))
+                        coef_re[k] = (1 << 24) - 1;
+                coef_re[k] /= (1 << 15);
 
                 coef_im[k] *= notch[k];
-                coef_im[k] += (1<<14);
-                if (coef_im[k] >= (1<<24))
-                        coef_im[k]  = (1<<24)-1;
-                coef_im[k] /= (1<<15);
+                coef_im[k] += (1 << 14);
+                if (coef_im[k] >= (1 << 24))
+                        coef_im[k] = (1 << 24) - 1;
+                coef_im[k] /= (1 << 15);
 
-                dprintk( "PALF COEF: %d re: %d im: %d", k, coef_re[k], coef_im[k]);
+                dprintk("PALF COEF: %d re: %d im: %d", k, coef_re[k], coef_im[k]);
 
                 dib7000p_write_word(state, 143, (0 << 14) | (k << 10) | (coef_re[k] & 0x3ff));
                 dib7000p_write_word(state, 144, coef_im[k] & 0x3ff);
                 dib7000p_write_word(state, 143, (1 << 14) | (k << 10) | (coef_re[k] & 0x3ff));
         }
-        dib7000p_write_word(state,143 ,0);
+        dib7000p_write_word(state, 143, 0);
 }
 
 static int dib7000p_tune(struct dvb_frontend *demod, struct dvb_frontend_parameters *ch)
@@ -976,11 +1202,11 @@ static int dib7000p_tune(struct dvb_frontend *demod, struct dvb_frontend_paramet
         /* P_ctrl_inh_cor=0, P_ctrl_alpha_cor=4, P_ctrl_inh_isi=0, P_ctrl_alpha_isi=3, P_ctrl_inh_cor4=1, P_ctrl_alpha_cor4=3 */
         tmp = (0 << 14) | (4 << 10) | (0 << 9) | (3 << 5) | (1 << 4) | (0x3);
         if (state->sfn_workaround_active) {
-                dprintk( "SFN workaround is active");
+                dprintk("SFN workaround is active");
                 tmp |= (1 << 9);
-                dib7000p_write_word(state, 166, 0x4000); // P_pha3_force_pha_shift
+                dib7000p_write_word(state, 166, 0x4000);
         } else {
-                dib7000p_write_word(state, 166, 0x0000); // P_pha3_force_pha_shift
+                dib7000p_write_word(state, 166, 0x0000);
         }
         dib7000p_write_word(state, 29, tmp);
 
@@ -993,51 +1219,72 @@ static int dib7000p_tune(struct dvb_frontend *demod, struct dvb_frontend_paramet
         /* P_timf_alpha, P_corm_alpha=6, P_corm_thres=0x80 */
         tmp = (6 << 8) | 0x80;
         switch (ch->u.ofdm.transmission_mode) {
-                case TRANSMISSION_MODE_2K: tmp |= (7 << 12); break;
-                case /* 4K MODE */ 255: tmp |= (8 << 12); break;
-                default:
-                case TRANSMISSION_MODE_8K: tmp |= (9 << 12); break;
+        case TRANSMISSION_MODE_2K:
+                tmp |= (2 << 12);
+                break;
+        case TRANSMISSION_MODE_4K:
+                tmp |= (3 << 12);
+                break;
+        default:
+        case TRANSMISSION_MODE_8K:
+                tmp |= (4 << 12);
+                break;
         }
-        dib7000p_write_word(state, 26, tmp);  /* timf_a(6xxx) */
+        dib7000p_write_word(state, 26, tmp);    /* timf_a(6xxx) */
 
         /* P_ctrl_freeze_pha_shift=0, P_ctrl_pha_off_max */
         tmp = (0 << 4);
         switch (ch->u.ofdm.transmission_mode) {
-                case TRANSMISSION_MODE_2K: tmp |= 0x6; break;
-                case /* 4K MODE */ 255: tmp |= 0x7; break;
-                default:
-                case TRANSMISSION_MODE_8K: tmp |= 0x8; break;
+        case TRANSMISSION_MODE_2K:
+                tmp |= 0x6;
+                break;
+        case TRANSMISSION_MODE_4K:
+                tmp |= 0x7;
+                break;
+        default:
+        case TRANSMISSION_MODE_8K:
+                tmp |= 0x8;
+                break;
         }
-        dib7000p_write_word(state, 32,  tmp);
+        dib7000p_write_word(state, 32, tmp);
 
         /* P_ctrl_sfreq_inh=0, P_ctrl_sfreq_step */
         tmp = (0 << 4);
         switch (ch->u.ofdm.transmission_mode) {
-                case TRANSMISSION_MODE_2K: tmp |= 0x6; break;
-                case /* 4K MODE */ 255: tmp |= 0x7; break;
-                default:
-                case TRANSMISSION_MODE_8K: tmp |= 0x8; break;
+        case TRANSMISSION_MODE_2K:
+                tmp |= 0x6;
+                break;
+        case TRANSMISSION_MODE_4K:
+                tmp |= 0x7;
+                break;
+        default:
+        case TRANSMISSION_MODE_8K:
+                tmp |= 0x8;
+                break;
         }
-        dib7000p_write_word(state, 33,  tmp);
+        dib7000p_write_word(state, 33, tmp);
 
-        tmp = dib7000p_read_word(state,509);
+        tmp = dib7000p_read_word(state, 509);
         if (!((tmp >> 6) & 0x1)) {
                 /* restart the fec */
-                tmp = dib7000p_read_word(state,771);
+                tmp = dib7000p_read_word(state, 771);
                 dib7000p_write_word(state, 771, tmp | (1 << 1));
                 dib7000p_write_word(state, 771, tmp);
-                msleep(10);
-                tmp = dib7000p_read_word(state,509);
+                msleep(40);
+                tmp = dib7000p_read_word(state, 509);
         }
-
         // we achieved a lock - it's time to update the osc freq
-        if ((tmp >> 6) & 0x1)
+        if ((tmp >> 6) & 0x1) {
                 dib7000p_update_timf(state);
+                /* P_timf_alpha += 2 */
+                tmp = dib7000p_read_word(state, 26);
+                dib7000p_write_word(state, 26, (tmp & ~(0xf << 12)) | ((((tmp >> 12) & 0xf) + 5) << 12));
+        }
 
         if (state->cfg.spur_protect)
-                dib7000p_spur_protect(state, ch->frequency/1000, BANDWIDTH_TO_KHZ(ch->u.ofdm.bandwidth));
+                dib7000p_spur_protect(state, ch->frequency / 1000, BANDWIDTH_TO_KHZ(ch->u.ofdm.bandwidth));
 
-    dib7000p_set_bandwidth(state, BANDWIDTH_TO_KHZ(ch->u.ofdm.bandwidth));
+        dib7000p_set_bandwidth(state, BANDWIDTH_TO_KHZ(ch->u.ofdm.bandwidth));
         return 0;
 }
 
@@ -1046,63 +1293,82 @@ static int dib7000p_wakeup(struct dvb_frontend *demod)
         struct dib7000p_state *state = demod->demodulator_priv;
         dib7000p_set_power_mode(state, DIB7000P_POWER_ALL);
         dib7000p_set_adc_state(state, DIBX000_SLOW_ADC_ON);
+        if (state->version == SOC7090)
+                dib7000p_sad_calib(state);
         return 0;
 }
 
 static int dib7000p_sleep(struct dvb_frontend *demod)
 {
         struct dib7000p_state *state = demod->demodulator_priv;
+        if (state->version == SOC7090)
+                return dib7090_set_output_mode(demod, OUTMODE_HIGH_Z) | dib7000p_set_power_mode(state, DIB7000P_POWER_INTERFACE_ONLY);
         return dib7000p_set_output_mode(state, OUTMODE_HIGH_Z) | dib7000p_set_power_mode(state, DIB7000P_POWER_INTERFACE_ONLY);
 }
 
 static int dib7000p_identify(struct dib7000p_state *st)
 {
         u16 value;
-        dprintk( "checking demod on I2C address: %d (%x)",
-                st->i2c_addr, st->i2c_addr);
+        dprintk("checking demod on I2C address: %d (%x)", st->i2c_addr, st->i2c_addr);
 
         if ((value = dib7000p_read_word(st, 768)) != 0x01b3) {
-                dprintk( "wrong Vendor ID (read=0x%x)",value);
+                dprintk("wrong Vendor ID (read=0x%x)", value);
                 return -EREMOTEIO;
         }
 
         if ((value = dib7000p_read_word(st, 769)) != 0x4000) {
-                dprintk( "wrong Device ID (%x)",value);
+                dprintk("wrong Device ID (%x)", value);
                 return -EREMOTEIO;
         }
 
         return 0;
 }
 
-
-static int dib7000p_get_frontend(struct dvb_frontend* fe,
-                                struct dvb_frontend_parameters *fep)
+static int dib7000p_get_frontend(struct dvb_frontend *fe, struct dvb_frontend_parameters *fep)
 {
         struct dib7000p_state *state = fe->demodulator_priv;
-        u16 tps = dib7000p_read_word(state,463);
+        u16 tps = dib7000p_read_word(state, 463);
 
         fep->inversion = INVERSION_AUTO;
 
         fep->u.ofdm.bandwidth = BANDWIDTH_TO_INDEX(state->current_bandwidth);
 
         switch ((tps >> 8) & 0x3) {
-                case 0: fep->u.ofdm.transmission_mode = TRANSMISSION_MODE_2K; break;
-                case 1: fep->u.ofdm.transmission_mode = TRANSMISSION_MODE_8K; break;
-                /* case 2: fep->u.ofdm.transmission_mode = TRANSMISSION_MODE_4K; break; */
+        case 0:
+                fep->u.ofdm.transmission_mode = TRANSMISSION_MODE_2K;
+                break;
+        case 1:
+                fep->u.ofdm.transmission_mode = TRANSMISSION_MODE_8K;
+                break;
+        /* case 2: fep->u.ofdm.transmission_mode = TRANSMISSION_MODE_4K; break; */
         }
 
         switch (tps & 0x3) {
-                case 0: fep->u.ofdm.guard_interval = GUARD_INTERVAL_1_32; break;
-                case 1: fep->u.ofdm.guard_interval = GUARD_INTERVAL_1_16; break;
-                case 2: fep->u.ofdm.guard_interval = GUARD_INTERVAL_1_8; break;
-                case 3: fep->u.ofdm.guard_interval = GUARD_INTERVAL_1_4; break;
+        case 0:
+                fep->u.ofdm.guard_interval = GUARD_INTERVAL_1_32;
+                break;
+        case 1:
+                fep->u.ofdm.guard_interval = GUARD_INTERVAL_1_16;
+                break;
+        case 2:
+                fep->u.ofdm.guard_interval = GUARD_INTERVAL_1_8;
+                break;
+        case 3:
+                fep->u.ofdm.guard_interval = GUARD_INTERVAL_1_4;
+                break;
         }
 
         switch ((tps >> 14) & 0x3) {
-                case 0: fep->u.ofdm.constellation = QPSK; break;
-                case 1: fep->u.ofdm.constellation = QAM_16; break;
-                case 2:
-                default: fep->u.ofdm.constellation = QAM_64; break;
+        case 0:
+                fep->u.ofdm.constellation = QPSK;
+                break;
+        case 1:
+                fep->u.ofdm.constellation = QAM_16;
+                break;
+        case 2:
+        default:
+                fep->u.ofdm.constellation = QAM_64;
+                break;
         }
 
         /* as long as the frontend_param structure is fixed for hierarchical transmission I refuse to use it */
@@ -1110,22 +1376,42 @@ static int dib7000p_get_frontend(struct dvb_frontend* fe,
 
         fep->u.ofdm.hierarchy_information = HIERARCHY_NONE;
         switch ((tps >> 5) & 0x7) {
-                case 1: fep->u.ofdm.code_rate_HP = FEC_1_2; break;
-                case 2: fep->u.ofdm.code_rate_HP = FEC_2_3; break;
-                case 3: fep->u.ofdm.code_rate_HP = FEC_3_4; break;
-                case 5: fep->u.ofdm.code_rate_HP = FEC_5_6; break;
-                case 7:
-                default: fep->u.ofdm.code_rate_HP = FEC_7_8; break;
+        case 1:
+                fep->u.ofdm.code_rate_HP = FEC_1_2;
+                break;
+        case 2:
+                fep->u.ofdm.code_rate_HP = FEC_2_3;
+                break;
+        case 3:
+                fep->u.ofdm.code_rate_HP = FEC_3_4;
+                break;
+        case 5:
+                fep->u.ofdm.code_rate_HP = FEC_5_6;
+                break;
+        case 7:
+        default:
+                fep->u.ofdm.code_rate_HP = FEC_7_8;
+                break;
 
         }
 
         switch ((tps >> 2) & 0x7) {
-                case 1: fep->u.ofdm.code_rate_LP = FEC_1_2; break;
-                case 2: fep->u.ofdm.code_rate_LP = FEC_2_3; break;
-                case 3: fep->u.ofdm.code_rate_LP = FEC_3_4; break;
-                case 5: fep->u.ofdm.code_rate_LP = FEC_5_6; break;
-                case 7:
-                default: fep->u.ofdm.code_rate_LP = FEC_7_8; break;
+        case 1:
+                fep->u.ofdm.code_rate_LP = FEC_1_2;
+                break;
+        case 2:
+                fep->u.ofdm.code_rate_LP = FEC_2_3;
+                break;
+        case 3:
+                fep->u.ofdm.code_rate_LP = FEC_3_4;
+                break;
+        case 5:
+                fep->u.ofdm.code_rate_LP = FEC_5_6;
+                break;
+        case 7:
+        default:
+                fep->u.ofdm.code_rate_LP = FEC_7_8;
+                break;
         }
 
         /* native interleaver: (dib7000p_read_word(state, 464) >>  5) & 0x1 */
@@ -1133,15 +1419,18 @@ static int dib7000p_get_frontend(struct dvb_frontend* fe,
         return 0;
 }
 
-static int dib7000p_set_frontend(struct dvb_frontend* fe,
-                                struct dvb_frontend_parameters *fep)
+static int dib7000p_set_frontend(struct dvb_frontend *fe, struct dvb_frontend_parameters *fep)
 {
         struct dib7000p_state *state = fe->demodulator_priv;
         int time, ret;
 
-        dib7000p_set_output_mode(state, OUTMODE_HIGH_Z);
+        if (state->version == SOC7090) {
+                dib7090_set_diversity_in(fe, 0);
+                dib7090_set_output_mode(fe, OUTMODE_HIGH_Z);
+        } else
+                dib7000p_set_output_mode(state, OUTMODE_HIGH_Z);
 
-    /* maybe the parameter has been changed */
+        /* maybe the parameter has been changed */
         state->sfn_workaround_active = buggy_sfn_workaround;
 
         if (fe->ops.tuner_ops.set_params)
@@ -1156,9 +1445,7 @@ static int dib7000p_set_frontend(struct dvb_frontend* fe,
         } while (time != -1);
 
         if (fep->u.ofdm.transmission_mode == TRANSMISSION_MODE_AUTO ||
-                fep->u.ofdm.guard_interval    == GUARD_INTERVAL_AUTO ||
-                fep->u.ofdm.constellation     == QAM_AUTO ||
-                fep->u.ofdm.code_rate_HP      == FEC_AUTO) {
+                fep->u.ofdm.guard_interval == GUARD_INTERVAL_AUTO || fep->u.ofdm.constellation == QAM_AUTO || fep->u.ofdm.code_rate_HP == FEC_AUTO) {
                 int i = 800, found;
 
                 dib7000p_autosearch_start(fe, fep);
@@ -1167,9 +1454,9 @@ static int dib7000p_set_frontend(struct dvb_frontend* fe,
                         found = dib7000p_autosearch_is_irq(fe);
                 } while (found == 0 && i--);
 
-                dprintk("autosearch returns: %d",found);
+                dprintk("autosearch returns: %d", found);
                 if (found == 0 || found == 1)
-                        return 0; // no channel found
+                        return 0;
 
                 dib7000p_get_frontend(fe, fep);
         }
@@ -1177,11 +1464,15 @@ static int dib7000p_set_frontend(struct dvb_frontend* fe,
         ret = dib7000p_tune(fe, fep);
 
         /* make this a config parameter */
-        dib7000p_set_output_mode(state, state->cfg.output_mode);
-    return ret;
+        if (state->version == SOC7090)
+                dib7090_set_output_mode(fe, state->cfg.output_mode);
+        else
+                dib7000p_set_output_mode(state, state->cfg.output_mode);
+
+        return ret;
 }
 
-static int dib7000p_read_status(struct dvb_frontend *fe, fe_status_t *stat)
+static int dib7000p_read_status(struct dvb_frontend *fe, fe_status_t * stat)
 {
         struct dib7000p_state *state = fe->demodulator_priv;
         u16 lock = dib7000p_read_word(state, 509);
@@ -1196,27 +1487,27 @@ static int dib7000p_read_status(struct dvb_frontend *fe, fe_status_t *stat)
                 *stat |= FE_HAS_VITERBI;
         if (lock & 0x0010)
                 *stat |= FE_HAS_SYNC;
-    if ((lock & 0x0038) == 0x38)
+        if ((lock & 0x0038) == 0x38)
                 *stat |= FE_HAS_LOCK;
 
         return 0;
 }
 
-static int dib7000p_read_ber(struct dvb_frontend *fe, u32 *ber)
+static int dib7000p_read_ber(struct dvb_frontend *fe, u32 * ber)
 {
         struct dib7000p_state *state = fe->demodulator_priv;
         *ber = (dib7000p_read_word(state, 500) << 16) | dib7000p_read_word(state, 501);
         return 0;
 }
 
-static int dib7000p_read_unc_blocks(struct dvb_frontend *fe, u32 *unc)
+static int dib7000p_read_unc_blocks(struct dvb_frontend *fe, u32 * unc)
 {
         struct dib7000p_state *state = fe->demodulator_priv;
         *unc = dib7000p_read_word(state, 506);
         return 0;
 }
 
-static int dib7000p_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
+static int dib7000p_read_signal_strength(struct dvb_frontend *fe, u16 * strength)
 {
         struct dib7000p_state *state = fe->demodulator_priv;
         u16 val = dib7000p_read_word(state, 394);
@@ -1224,7 +1515,7 @@ static int dib7000p_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
         return 0;
 }
 
-static int dib7000p_read_snr(struct dvb_frontend* fe, u16 *snr)
+static int dib7000p_read_snr(struct dvb_frontend *fe, u16 * snr)
 {
         struct dib7000p_state *state = fe->demodulator_priv;
         u16 val;
@@ -1240,19 +1531,17 @@ static int dib7000p_read_snr(struct dvb_frontend* fe, u16 *snr)
                 noise_exp -= 0x40;
 
         signal_mant = (val >> 6) & 0xFF;
-        signal_exp  = (val & 0x3F);
+        signal_exp = (val & 0x3F);
         if ((signal_exp & 0x20) != 0)
                 signal_exp -= 0x40;
 
         if (signal_mant != 0)
-                result = intlog10(2) * 10 * signal_exp + 10 *
-                        intlog10(signal_mant);
+                result = intlog10(2) * 10 * signal_exp + 10 * intlog10(signal_mant);
         else
                 result = intlog10(2) * 10 * signal_exp - 100;
 
         if (noise_mant != 0)
-                result -= intlog10(2) * 10 * noise_exp + 10 *
-                        intlog10(noise_mant);
+                result -= intlog10(2) * 10 * noise_exp + 10 * intlog10(noise_mant);
         else
                 result -= intlog10(2) * 10 * noise_exp - 100;
 
@@ -1260,7 +1549,7 @@ static int dib7000p_read_snr(struct dvb_frontend* fe, u16 *snr)
         return 0;
 }
 
-static int dib7000p_fe_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings *tune)
+static int dib7000p_fe_get_tune_settings(struct dvb_frontend *fe, struct dvb_frontend_tune_settings *tune)
 {
         tune->min_delay_ms = 1000;
         return 0;
@@ -1270,16 +1559,30 @@ static void dib7000p_release(struct dvb_frontend *demod)
 {
         struct dib7000p_state *st = demod->demodulator_priv;
         dibx000_exit_i2c_master(&st->i2c_master);
+        i2c_del_adapter(&st->dib7090_tuner_adap);
         kfree(st);
 }
 
 int dib7000pc_detection(struct i2c_adapter *i2c_adap)
 {
-        u8 tx[2], rx[2];
+        u8 *tx, *rx;
         struct i2c_msg msg[2] = {
-                { .addr = 18 >> 1, .flags = 0,        .buf = tx, .len = 2 },
-                { .addr = 18 >> 1, .flags = I2C_M_RD, .buf = rx, .len = 2 },
+                {.addr = 18 >> 1, .flags = 0, .len = 2},
+                {.addr = 18 >> 1, .flags = I2C_M_RD, .len = 2},
         };
+        int ret = 0;
+
+        tx = kzalloc(2*sizeof(u8), GFP_KERNEL);
+        if (!tx)
+                return -ENOMEM;
+        rx = kzalloc(2*sizeof(u8), GFP_KERNEL);
+        if (!rx) {
+                goto rx_memory_error;
+                ret = -ENOMEM;
+        }
+
+        msg[0].buf = tx;
+        msg[1].buf = rx;
 
         tx[0] = 0x03;
         tx[1] = 0x00;
@@ -1299,11 +1602,15 @@ int dib7000pc_detection(struct i2c_adapter *i2c_adap)
                 }
 
         dprintk("-D-  DiB7000PC not detected");
-        return 0;
+
+        kfree(rx);
+rx_memory_error:
+        kfree(tx);
+        return ret;
 }
 EXPORT_SYMBOL(dib7000pc_detection);
 
-struct i2c_adapter * dib7000p_get_i2c_master(struct dvb_frontend *demod, enum dibx000_i2c_interface intf, int gating)
+struct i2c_adapter *dib7000p_get_i2c_master(struct dvb_frontend *demod, enum dibx000_i2c_interface intf, int gating)
 {
         struct dib7000p_state *st = demod->demodulator_priv;
         return dibx000_get_i2c_adapter(&st->i2c_master, intf, gating);
@@ -1312,19 +1619,19 @@ EXPORT_SYMBOL(dib7000p_get_i2c_master);
 
 int dib7000p_pid_filter_ctrl(struct dvb_frontend *fe, u8 onoff)
 {
-    struct dib7000p_state *state = fe->demodulator_priv;
-    u16 val = dib7000p_read_word(state, 235) & 0xffef;
-    val |= (onoff & 0x1) << 4;
-    dprintk("PID filter enabled %d", onoff);
-    return dib7000p_write_word(state, 235, val);
+        struct dib7000p_state *state = fe->demodulator_priv;
+        u16 val = dib7000p_read_word(state, 235) & 0xffef;
+        val |= (onoff & 0x1) << 4;
+        dprintk("PID filter enabled %d", onoff);
+        return dib7000p_write_word(state, 235, val);
 }
 EXPORT_SYMBOL(dib7000p_pid_filter_ctrl);
 
 int dib7000p_pid_filter(struct dvb_frontend *fe, u8 id, u16 pid, u8 onoff)
 {
-    struct dib7000p_state *state = fe->demodulator_priv;
-    dprintk("PID filter: index %x, PID %d, OnOff %d", id, pid, onoff);
-    return dib7000p_write_word(state, 241 + id, onoff ? (1 << 13) | pid : 0);
+        struct dib7000p_state *state = fe->demodulator_priv;
+        dprintk("PID filter: index %x, PID %d, OnOff %d", id, pid, onoff);
+        return dib7000p_write_word(state, 241 + id, onoff ? (1 << 13) | pid : 0);
 }
 EXPORT_SYMBOL(dib7000p_pid_filter);
 
@@ -1340,16 +1647,19 @@ int dib7000p_i2c_enumeration(struct i2c_adapter *i2c, int no_of_demods, u8 defau
 
         dpst->i2c_adap = i2c;
 
-        for (k = no_of_demods-1; k >= 0; k--) {
+        for (k = no_of_demods - 1; k >= 0; k--) {
                 dpst->cfg = cfg[k];
 
                 /* designated i2c address */
-                new_addr          = (0x40 + k) << 1;
+                if (cfg[k].default_i2c_addr != 0)
+                        new_addr = cfg[k].default_i2c_addr + (k << 1);
+                else
+                        new_addr = (0x40 + k) << 1;
                 dpst->i2c_addr = new_addr;
-                dib7000p_write_word(dpst, 1287, 0x0003); /* sram lead in, rdy */
+                dib7000p_write_word(dpst, 1287, 0x0003);        /* sram lead in, rdy */
                 if (dib7000p_identify(dpst) != 0) {
                         dpst->i2c_addr = default_addr;
-                        dib7000p_write_word(dpst, 1287, 0x0003); /* sram lead in, rdy */
+                        dib7000p_write_word(dpst, 1287, 0x0003);        /* sram lead in, rdy */
                         if (dib7000p_identify(dpst) != 0) {
                                 dprintk("DiB7000P #%d: not identified\n", k);
                                 kfree(dpst);
@@ -1368,7 +1678,10 @@ int dib7000p_i2c_enumeration(struct i2c_adapter *i2c, int no_of_demods, u8 defau
 
         for (k = 0; k < no_of_demods; k++) {
                 dpst->cfg = cfg[k];
-                dpst->i2c_addr = (0x40 + k) << 1;
+                if (cfg[k].default_i2c_addr != 0)
+                        dpst->i2c_addr = (cfg[k].default_i2c_addr + k) << 1;
+                else
+                        dpst->i2c_addr = (0x40 + k) << 1;
 
                 // unforce divstr
                 dib7000p_write_word(dpst, 1285, dpst->i2c_addr << 2);
@@ -1382,8 +1695,613 @@ int dib7000p_i2c_enumeration(struct i2c_adapter *i2c, int no_of_demods, u8 defau
 }
 EXPORT_SYMBOL(dib7000p_i2c_enumeration);
 
+static const s32 lut_1000ln_mant[] = {
+        6908, 6956, 7003, 7047, 7090, 7131, 7170, 7208, 7244, 7279, 7313, 7346, 7377, 7408, 7438, 7467, 7495, 7523, 7549, 7575, 7600
+};
+
+static s32 dib7000p_get_adc_power(struct dvb_frontend *fe)
+{
+        struct dib7000p_state *state = fe->demodulator_priv;
+        u32 tmp_val = 0, exp = 0, mant = 0;
+        s32 pow_i;
+        u16 buf[2];
+        u8 ix = 0;
+
+        buf[0] = dib7000p_read_word(state, 0x184);
+        buf[1] = dib7000p_read_word(state, 0x185);
+        pow_i = (buf[0] << 16) | buf[1];
+        dprintk("raw pow_i = %d", pow_i);
+
+        tmp_val = pow_i;
+        while (tmp_val >>= 1)
+                exp++;
+
+        mant = (pow_i * 1000 / (1 << exp));
+        dprintk(" mant = %d exp = %d", mant / 1000, exp);
+
+        ix = (u8) ((mant - 1000) / 100);        /* index of the LUT */
+        dprintk(" ix = %d", ix);
+
+        pow_i = (lut_1000ln_mant[ix] + 693 * (exp - 20) - 6908);
+        pow_i = (pow_i << 8) / 1000;
+        dprintk(" pow_i = %d", pow_i);
+
+        return pow_i;
+}
+
+static int map_addr_to_serpar_number(struct i2c_msg *msg)
+{
+        if ((msg->buf[0] <= 15))
+                msg->buf[0] -= 1;
+        else if (msg->buf[0] == 17)
+                msg->buf[0] = 15;
+        else if (msg->buf[0] == 16)
+                msg->buf[0] = 17;
+        else if (msg->buf[0] == 19)
+                msg->buf[0] = 16;
+        else if (msg->buf[0] >= 21 && msg->buf[0] <= 25)
+                msg->buf[0] -= 3;
+        else if (msg->buf[0] == 28)
+                msg->buf[0] = 23;
+        else
+                return -EINVAL;
+        return 0;
+}
+
+static int w7090p_tuner_write_serpar(struct i2c_adapter *i2c_adap, struct i2c_msg msg[], int num)
+{
+        struct dib7000p_state *state = i2c_get_adapdata(i2c_adap);
+        u8 n_overflow = 1;
+        u16 i = 1000;
+        u16 serpar_num = msg[0].buf[0];
+
+        while (n_overflow == 1 && i) {
+                n_overflow = (dib7000p_read_word(state, 1984) >> 1) & 0x1;
+                i--;
+                if (i == 0)
+                        dprintk("Tuner ITF: write busy (overflow)");
+        }
+        dib7000p_write_word(state, 1985, (1 << 6) | (serpar_num & 0x3f));
+        dib7000p_write_word(state, 1986, (msg[0].buf[1] << 8) | msg[0].buf[2]);
+
+        return num;
+}
+
+static int w7090p_tuner_read_serpar(struct i2c_adapter *i2c_adap, struct i2c_msg msg[], int num)
+{
+        struct dib7000p_state *state = i2c_get_adapdata(i2c_adap);
+        u8 n_overflow = 1, n_empty = 1;
+        u16 i = 1000;
+        u16 serpar_num = msg[0].buf[0];
+        u16 read_word;
+
+        while (n_overflow == 1 && i) {
+                n_overflow = (dib7000p_read_word(state, 1984) >> 1) & 0x1;
+                i--;
+                if (i == 0)
+                        dprintk("TunerITF: read busy (overflow)");
+        }
+        dib7000p_write_word(state, 1985, (0 << 6) | (serpar_num & 0x3f));
+
+        i = 1000;
+        while (n_empty == 1 && i) {
+                n_empty = dib7000p_read_word(state, 1984) & 0x1;
+                i--;
+                if (i == 0)
+                        dprintk("TunerITF: read busy (empty)");
+        }
+        read_word = dib7000p_read_word(state, 1987);
+        msg[1].buf[0] = (read_word >> 8) & 0xff;
+        msg[1].buf[1] = (read_word) & 0xff;
+
+        return num;
+}
+
+static int w7090p_tuner_rw_serpar(struct i2c_adapter *i2c_adap, struct i2c_msg msg[], int num)
+{
+        if (map_addr_to_serpar_number(&msg[0]) == 0) {  /* else = Tuner regs to ignore : DIG_CFG, CTRL_RF_LT, PLL_CFG, PWM1_REG, ADCCLK, DIG_CFG_3; SLEEP_EN... */
+                if (num == 1) { /* write */
+                        return w7090p_tuner_write_serpar(i2c_adap, msg, 1);
+                } else {        /* read */
+                        return w7090p_tuner_read_serpar(i2c_adap, msg, 2);
+                }
+        }
+        return num;
+}
+
+int dib7090p_rw_on_apb(struct i2c_adapter *i2c_adap, struct i2c_msg msg[], int num, u16 apb_address)
+{
+        struct dib7000p_state *state = i2c_get_adapdata(i2c_adap);
+        u16 word;
+
+        if (num == 1) {         /* write */
+                dib7000p_write_word(state, apb_address, ((msg[0].buf[1] << 8) | (msg[0].buf[2])));
+        } else {
+                word = dib7000p_read_word(state, apb_address);
+                msg[1].buf[0] = (word >> 8) & 0xff;
+                msg[1].buf[1] = (word) & 0xff;
+        }
+
+        return num;
+}
+
+static int dib7090_tuner_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg msg[], int num)
+{
+        struct dib7000p_state *state = i2c_get_adapdata(i2c_adap);
+
+        u16 apb_address = 0, word;
+        int i = 0;
+        switch (msg[0].buf[0]) {
+        case 0x12:
+                apb_address = 1920;
+                break;
+        case 0x14:
+                apb_address = 1921;
+                break;
+        case 0x24:
+                apb_address = 1922;
+                break;
+        case 0x1a:
+                apb_address = 1923;
+                break;
+        case 0x22:
+                apb_address = 1924;
+                break;
+        case 0x33:
+                apb_address = 1926;
+                break;
+        case 0x34:
+                apb_address = 1927;
+                break;
+        case 0x35:
+                apb_address = 1928;
+                break;
+        case 0x36:
+                apb_address = 1929;
+                break;
+        case 0x37:
+                apb_address = 1930;
+                break;
+        case 0x38:
+                apb_address = 1931;
+                break;
+        case 0x39:
+                apb_address = 1932;
+                break;
+        case 0x2a:
+                apb_address = 1935;
+                break;
+        case 0x2b:
+                apb_address = 1936;
+                break;
+        case 0x2c:
+                apb_address = 1937;
+                break;
+        case 0x2d:
+                apb_address = 1938;
+                break;
+        case 0x2e:
+                apb_address = 1939;
+                break;
+        case 0x2f:
+                apb_address = 1940;
+                break;
+        case 0x30:
+                apb_address = 1941;
+                break;
+        case 0x31:
+                apb_address = 1942;
+                break;
+        case 0x32:
+                apb_address = 1943;
+                break;
+        case 0x3e:
+                apb_address = 1944;
+                break;
+        case 0x3f:
+                apb_address = 1945;
+                break;
+        case 0x40:
+                apb_address = 1948;
+                break;
+        case 0x25:
+                apb_address = 914;
+                break;
+        case 0x26:
+                apb_address = 915;
+                break;
+        case 0x27:
+                apb_address = 916;
+                break;
+        case 0x28:
+                apb_address = 917;
+                break;
+        case 0x1d:
+                i = ((dib7000p_read_word(state, 72) >> 12) & 0x3);
+                word = dib7000p_read_word(state, 384 + i);
+                msg[1].buf[0] = (word >> 8) & 0xff;
+                msg[1].buf[1] = (word) & 0xff;
+                return num;
+        case 0x1f:
+                if (num == 1) { /* write */
+                        word = (u16) ((msg[0].buf[1] << 8) | msg[0].buf[2]);
+                        word &= 0x3;
+                        word = (dib7000p_read_word(state, 72) & ~(3 << 12)) | (word << 12);
+                        dib7000p_write_word(state, 72, word);   /* Set the proper input */
+                        return num;
+                }
+        }
+
+        if (apb_address != 0)   /* R/W acces via APB */
+                return dib7090p_rw_on_apb(i2c_adap, msg, num, apb_address);
+        else                    /* R/W access via SERPAR  */
+                return w7090p_tuner_rw_serpar(i2c_adap, msg, num);
+
+        return 0;
+}
+
+static u32 dib7000p_i2c_func(struct i2c_adapter *adapter)
+{
+        return I2C_FUNC_I2C;
+}
+
+static struct i2c_algorithm dib7090_tuner_xfer_algo = {
+        .master_xfer = dib7090_tuner_xfer,
+        .functionality = dib7000p_i2c_func,
+};
+
+struct i2c_adapter *dib7090_get_i2c_tuner(struct dvb_frontend *fe)
+{
+        struct dib7000p_state *st = fe->demodulator_priv;
+        return &st->dib7090_tuner_adap;
+}
+EXPORT_SYMBOL(dib7090_get_i2c_tuner);
+
+static int dib7090_host_bus_drive(struct dib7000p_state *state, u8 drive)
+{
+        u16 reg;
+
+        /* drive host bus 2, 3, 4 */
+        reg = dib7000p_read_word(state, 1798) & ~((0x7) | (0x7 << 6) | (0x7 << 12));
+        reg |= (drive << 12) | (drive << 6) | drive;
+        dib7000p_write_word(state, 1798, reg);
+
+        /* drive host bus 5,6 */
+        reg = dib7000p_read_word(state, 1799) & ~((0x7 << 2) | (0x7 << 8));
+        reg |= (drive << 8) | (drive << 2);
+        dib7000p_write_word(state, 1799, reg);
+
+        /* drive host bus 7, 8, 9 */
+        reg = dib7000p_read_word(state, 1800) & ~((0x7) | (0x7 << 6) | (0x7 << 12));
+        reg |= (drive << 12) | (drive << 6) | drive;
+        dib7000p_write_word(state, 1800, reg);
+
+        /* drive host bus 10, 11 */
+        reg = dib7000p_read_word(state, 1801) & ~((0x7 << 2) | (0x7 << 8));
+        reg |= (drive << 8) | (drive << 2);
+        dib7000p_write_word(state, 1801, reg);
+
+        /* drive host bus 12, 13, 14 */
+        reg = dib7000p_read_word(state, 1802) & ~((0x7) | (0x7 << 6) | (0x7 << 12));
+        reg |= (drive << 12) | (drive << 6) | drive;
+        dib7000p_write_word(state, 1802, reg);
+
+        return 0;
+}
+
+static u32 dib7090_calcSyncFreq(u32 P_Kin, u32 P_Kout, u32 insertExtSynchro, u32 syncSize)
+{
+        u32 quantif = 3;
+        u32 nom = (insertExtSynchro * P_Kin + syncSize);
+        u32 denom = P_Kout;
+        u32 syncFreq = ((nom << quantif) / denom);
+
+        if ((syncFreq & ((1 << quantif) - 1)) != 0)
+                syncFreq = (syncFreq >> quantif) + 1;
+        else
+                syncFreq = (syncFreq >> quantif);
+
+        if (syncFreq != 0)
+                syncFreq = syncFreq - 1;
+
+        return syncFreq;
+}
+
+static int dib7090_cfg_DibTx(struct dib7000p_state *state, u32 P_Kin, u32 P_Kout, u32 insertExtSynchro, u32 synchroMode, u32 syncWord, u32 syncSize)
+{
+        u8 index_buf;
+        u16 rx_copy_buf[22];
+
+        dprintk("Configure DibStream Tx");
+        for (index_buf = 0; index_buf < 22; index_buf++)
+                rx_copy_buf[index_buf] = dib7000p_read_word(state, 1536+index_buf);
+
+        dib7000p_write_word(state, 1615, 1);
+        dib7000p_write_word(state, 1603, P_Kin);
+        dib7000p_write_word(state, 1605, P_Kout);
+        dib7000p_write_word(state, 1606, insertExtSynchro);
+        dib7000p_write_word(state, 1608, synchroMode);
+        dib7000p_write_word(state, 1609, (syncWord >> 16) & 0xffff);
+        dib7000p_write_word(state, 1610, syncWord & 0xffff);
+        dib7000p_write_word(state, 1612, syncSize);
+        dib7000p_write_word(state, 1615, 0);
+
+        for (index_buf = 0; index_buf < 22; index_buf++)
+                dib7000p_write_word(state, 1536+index_buf, rx_copy_buf[index_buf]);
+
+        return 0;
+}
+
+static int dib7090_cfg_DibRx(struct dib7000p_state *state, u32 P_Kin, u32 P_Kout, u32 synchroMode, u32 insertExtSynchro, u32 syncWord, u32 syncSize,
+                u32 dataOutRate)
+{
+        u32 syncFreq;
+
+        dprintk("Configure DibStream Rx");
+        if ((P_Kin != 0) && (P_Kout != 0)) {
+                syncFreq = dib7090_calcSyncFreq(P_Kin, P_Kout, insertExtSynchro, syncSize);
+                dib7000p_write_word(state, 1542, syncFreq);
+        }
+        dib7000p_write_word(state, 1554, 1);
+        dib7000p_write_word(state, 1536, P_Kin);
+        dib7000p_write_word(state, 1537, P_Kout);
+        dib7000p_write_word(state, 1539, synchroMode);
+        dib7000p_write_word(state, 1540, (syncWord >> 16) & 0xffff);
+        dib7000p_write_word(state, 1541, syncWord & 0xffff);
+        dib7000p_write_word(state, 1543, syncSize);
+        dib7000p_write_word(state, 1544, dataOutRate);
+        dib7000p_write_word(state, 1554, 0);
+
+        return 0;
+}
+
+static int dib7090_enDivOnHostBus(struct dib7000p_state *state)
+{
+        u16 reg;
+
+        dprintk("Enable Diversity on host bus");
+        reg = (1 << 8) | (1 << 5);
+        dib7000p_write_word(state, 1288, reg);
+
+        return dib7090_cfg_DibTx(state, 5, 5, 0, 0, 0, 0);
+}
+
+static int dib7090_enAdcOnHostBus(struct dib7000p_state *state)
+{
+        u16 reg;
+
+        dprintk("Enable ADC on host bus");
+        reg = (1 << 7) | (1 << 5);
+        dib7000p_write_word(state, 1288, reg);
+
+        return dib7090_cfg_DibTx(state, 20, 5, 10, 0, 0, 0);
+}
+
+static int dib7090_enMpegOnHostBus(struct dib7000p_state *state)
+{
+        u16 reg;
+
+        dprintk("Enable Mpeg on host bus");
+        reg = (1 << 9) | (1 << 5);
+        dib7000p_write_word(state, 1288, reg);
+
+        return dib7090_cfg_DibTx(state, 8, 5, 0, 0, 0, 0);
+}
+
+static int dib7090_enMpegInput(struct dib7000p_state *state)
+{
+        dprintk("Enable Mpeg input");
+        return dib7090_cfg_DibRx(state, 8, 5, 0, 0, 0, 8, 0);   /*outputRate = 8 */
+}
+
+static int dib7090_enMpegMux(struct dib7000p_state *state, u16 pulseWidth, u16 enSerialMode, u16 enSerialClkDiv2)
+{
+        u16 reg = (1 << 7) | ((pulseWidth & 0x1f) << 2) | ((enSerialMode & 0x1) << 1) | (enSerialClkDiv2 & 0x1);
+
+        dprintk("Enable Mpeg mux");
+        dib7000p_write_word(state, 1287, reg);
+
+        reg &= ~(1 << 7);
+        dib7000p_write_word(state, 1287, reg);
+
+        reg = (1 << 4);
+        dib7000p_write_word(state, 1288, reg);
+
+        return 0;
+}
+
+static int dib7090_disableMpegMux(struct dib7000p_state *state)
+{
+        u16 reg;
+
+        dprintk("Disable Mpeg mux");
+        dib7000p_write_word(state, 1288, 0);
+
+        reg = dib7000p_read_word(state, 1287);
+        reg &= ~(1 << 7);
+        dib7000p_write_word(state, 1287, reg);
+
+        return 0;
+}
+
+static int dib7090_set_input_mode(struct dvb_frontend *fe, int mode)
+{
+        struct dib7000p_state *state = fe->demodulator_priv;
+
+        switch (mode) {
+        case INPUT_MODE_DIVERSITY:
+                        dprintk("Enable diversity INPUT");
+                        dib7090_cfg_DibRx(state, 5, 5, 0, 0, 0, 0, 0);
+                        break;
+        case INPUT_MODE_MPEG:
+                        dprintk("Enable Mpeg INPUT");
+                        dib7090_cfg_DibRx(state, 8, 5, 0, 0, 0, 8, 0); /*outputRate = 8 */
+                        break;
+        case INPUT_MODE_OFF:
+        default:
+                        dprintk("Disable INPUT");
+                        dib7090_cfg_DibRx(state, 0, 0, 0, 0, 0, 0, 0);
+                        break;
+        }
+        return 0;
+}
+
+static int dib7090_set_diversity_in(struct dvb_frontend *fe, int onoff)
+{
+        switch (onoff) {
+        case 0:         /* only use the internal way - not the diversity input */
+                dib7090_set_input_mode(fe, INPUT_MODE_MPEG);
+                break;
+        case 1:         /* both ways */
+        case 2:         /* only the diversity input */
+                dib7090_set_input_mode(fe, INPUT_MODE_DIVERSITY);
+                break;
+        }
+
+        return 0;
+}
+
+static int dib7090_set_output_mode(struct dvb_frontend *fe, int mode)
+{
+        struct dib7000p_state *state = fe->demodulator_priv;
+
+        u16 outreg, smo_mode, fifo_threshold;
+        u8 prefer_mpeg_mux_use = 1;
+        int ret = 0;
+
+        dib7090_host_bus_drive(state, 1);
+
+        fifo_threshold = 1792;
+        smo_mode = (dib7000p_read_word(state, 235) & 0x0050) | (1 << 1);
+        outreg = dib7000p_read_word(state, 1286) & ~((1 << 10) | (0x7 << 6) | (1 << 1));
+
+        switch (mode) {
+        case OUTMODE_HIGH_Z:
+                outreg = 0;
+                break;
+
+        case OUTMODE_MPEG2_SERIAL:
+                if (prefer_mpeg_mux_use) {
+                        dprintk("Sip 7090P setting output mode TS_SERIAL using Mpeg Mux");
+                        dib7090_enMpegOnHostBus(state);
+                        dib7090_enMpegInput(state);
+                        if (state->cfg.enMpegOutput == 1)
+                                dib7090_enMpegMux(state, 3, 1, 1);
+
+                } else {        /* Use Smooth block */
+                        dprintk("Sip 7090P setting output mode TS_SERIAL using Smooth bloc");
+                        dib7090_disableMpegMux(state);
+                        dib7000p_write_word(state, 1288, (1 << 6));
+                        outreg |= (2 << 6) | (0 << 1);
+                }
+                break;
+
+        case OUTMODE_MPEG2_PAR_GATED_CLK:
+                if (prefer_mpeg_mux_use) {
+                        dprintk("Sip 7090P setting output mode TS_PARALLEL_GATED using Mpeg Mux");
+                        dib7090_enMpegOnHostBus(state);
+                        dib7090_enMpegInput(state);
+                        if (state->cfg.enMpegOutput == 1)
+                                dib7090_enMpegMux(state, 2, 0, 0);
+                } else {        /* Use Smooth block */
+                        dprintk("Sip 7090P setting output mode TS_PARALLEL_GATED using Smooth block");
+                        dib7090_disableMpegMux(state);
+                        dib7000p_write_word(state, 1288, (1 << 6));
+                        outreg |= (0 << 6);
+                }
+                break;
+
+        case OUTMODE_MPEG2_PAR_CONT_CLK:        /* Using Smooth block only */
+                dprintk("Sip 7090P setting output mode TS_PARALLEL_CONT using Smooth block");
+                dib7090_disableMpegMux(state);
+                dib7000p_write_word(state, 1288, (1 << 6));
+                outreg |= (1 << 6);
+                break;
+
+        case OUTMODE_MPEG2_FIFO:        /* Using Smooth block because not supported by new Mpeg Mux bloc */
+                dprintk("Sip 7090P setting output mode TS_FIFO using Smooth block");
+                dib7090_disableMpegMux(state);
+                dib7000p_write_word(state, 1288, (1 << 6));
+                outreg |= (5 << 6);
+                smo_mode |= (3 << 1);
+                fifo_threshold = 512;
+                break;
+
+        case OUTMODE_DIVERSITY:
+                dprintk("Sip 7090P setting output mode MODE_DIVERSITY");
+                dib7090_disableMpegMux(state);
+                dib7090_enDivOnHostBus(state);
+                break;
+
+        case OUTMODE_ANALOG_ADC:
+                dprintk("Sip 7090P setting output mode MODE_ANALOG_ADC");
+                dib7090_enAdcOnHostBus(state);
+                break;
+        }
+
+        if (state->cfg.output_mpeg2_in_188_bytes)
+                smo_mode |= (1 << 5);
+
+        ret |= dib7000p_write_word(state, 235, smo_mode);
+        ret |= dib7000p_write_word(state, 236, fifo_threshold); /* synchronous fread */
+        ret |= dib7000p_write_word(state, 1286, outreg | (1 << 10));    /* allways set Dout active = 1 !!! */
+
+        return ret;
+}
+
+int dib7090_tuner_sleep(struct dvb_frontend *fe, int onoff)
+{
+        struct dib7000p_state *state = fe->demodulator_priv;
+        u16 en_cur_state;
+
+        dprintk("sleep dib7090: %d", onoff);
+
+        en_cur_state = dib7000p_read_word(state, 1922);
+
+        if (en_cur_state > 0xff)
+                state->tuner_enable = en_cur_state;
+
+        if (onoff)
+                en_cur_state &= 0x00ff;
+        else {
+                if (state->tuner_enable != 0)
+                        en_cur_state = state->tuner_enable;
+        }
+
+        dib7000p_write_word(state, 1922, en_cur_state);
+
+        return 0;
+}
+EXPORT_SYMBOL(dib7090_tuner_sleep);
+
+int dib7090_agc_restart(struct dvb_frontend *fe, u8 restart)
+{
+        dprintk("AGC restart callback: %d", restart);
+        return 0;
+}
+EXPORT_SYMBOL(dib7090_agc_restart);
+
+int dib7090_get_adc_power(struct dvb_frontend *fe)
+{
+        return dib7000p_get_adc_power(fe);
+}
+EXPORT_SYMBOL(dib7090_get_adc_power);
+
+int dib7090_slave_reset(struct dvb_frontend *fe)
+{
+        struct dib7000p_state *state = fe->demodulator_priv;
+        u16 reg;
+
+        reg = dib7000p_read_word(state, 1794);
+        dib7000p_write_word(state, 1794, reg | (4 << 12));
+
+        dib7000p_write_word(state, 1032, 0xffff);
+        return 0;
+}
+EXPORT_SYMBOL(dib7090_slave_reset);
+
 static struct dvb_frontend_ops dib7000p_ops;
-struct dvb_frontend * dib7000p_attach(struct i2c_adapter *i2c_adap, u8 i2c_addr, struct dib7000p_config *cfg)
+struct dvb_frontend *dib7000p_attach(struct i2c_adapter *i2c_adap, u8 i2c_addr, struct dib7000p_config *cfg)
 {
         struct dvb_frontend *demod;
         struct dib7000p_state *st;
@@ -1400,28 +2318,41 @@ struct dvb_frontend * dib7000p_attach(struct i2c_adapter *i2c_adap, u8 i2c_addr,
         /* Ensure the output mode remains at the previous default if it's
          * not specifically set by the caller.
          */
-        if ((st->cfg.output_mode != OUTMODE_MPEG2_SERIAL) &&
-            (st->cfg.output_mode != OUTMODE_MPEG2_PAR_GATED_CLK))
+        if ((st->cfg.output_mode != OUTMODE_MPEG2_SERIAL) && (st->cfg.output_mode != OUTMODE_MPEG2_PAR_GATED_CLK))
                 st->cfg.output_mode = OUTMODE_MPEG2_FIFO;
 
-        demod                   = &st->demod;
+        demod = &st->demod;
         demod->demodulator_priv = st;
         memcpy(&st->demod.ops, &dib7000p_ops, sizeof(struct dvb_frontend_ops));
 
-    dib7000p_write_word(st, 1287, 0x0003); /* sram lead in, rdy */
+        dib7000p_write_word(st, 1287, 0x0003);  /* sram lead in, rdy */
 
         if (dib7000p_identify(st) != 0)
                 goto error;
 
+        st->version = dib7000p_read_word(st, 897);
+
         /* FIXME: make sure the dev.parent field is initialized, or else
-        request_firmware() will hit an OOPS (this should be moved somewhere
-        more common) */
-        st->i2c_master.gated_tuner_i2c_adap.dev.parent = i2c_adap->dev.parent;
+                request_firmware() will hit an OOPS (this should be moved somewhere
+                more common) */
 
         dibx000_init_i2c_master(&st->i2c_master, DIB7000P, st->i2c_adap, st->i2c_addr);
 
+        /* init 7090 tuner adapter */
+        strncpy(st->dib7090_tuner_adap.name, "DiB7090 tuner interface", sizeof(st->dib7090_tuner_adap.name));
+        st->dib7090_tuner_adap.algo = &dib7090_tuner_xfer_algo;
+        st->dib7090_tuner_adap.algo_data = NULL;
+        st->dib7090_tuner_adap.dev.parent = st->i2c_adap->dev.parent;
+        i2c_set_adapdata(&st->dib7090_tuner_adap, st);
+        i2c_add_adapter(&st->dib7090_tuner_adap);
+
         dib7000p_demod_reset(st);
 
+        if (st->version == SOC7090) {
+                dib7090_set_output_mode(demod, st->cfg.output_mode);
+                dib7090_set_diversity_in(demod, 0);
+        }
+
         return demod;
 
 error:
@@ -1432,37 +2363,35 @@ EXPORT_SYMBOL(dib7000p_attach);
 
 static struct dvb_frontend_ops dib7000p_ops = {
         .info = {
-                .name = "DiBcom 7000PC",
-                .type = FE_OFDM,
-                .frequency_min      = 44250000,
-                .frequency_max      = 867250000,
-                .frequency_stepsize = 62500,
-                .caps = FE_CAN_INVERSION_AUTO |
-                        FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
-                        FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
-                        FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_AUTO |
-                        FE_CAN_TRANSMISSION_MODE_AUTO |
-                        FE_CAN_GUARD_INTERVAL_AUTO |
-                        FE_CAN_RECOVER |
-                        FE_CAN_HIERARCHY_AUTO,
-        },
-
-        .release              = dib7000p_release,
-
-        .init                 = dib7000p_wakeup,
-        .sleep                = dib7000p_sleep,
-
-        .set_frontend         = dib7000p_set_frontend,
-        .get_tune_settings    = dib7000p_fe_get_tune_settings,
-        .get_frontend         = dib7000p_get_frontend,
-
-        .read_status          = dib7000p_read_status,
-        .read_ber             = dib7000p_read_ber,
+                 .name = "DiBcom 7000PC",
+                 .type = FE_OFDM,
+                 .frequency_min = 44250000,
+                 .frequency_max = 867250000,
+                 .frequency_stepsize = 62500,
+                 .caps = FE_CAN_INVERSION_AUTO |
+                 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
+                 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
+                 FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_AUTO |
+                 FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_GUARD_INTERVAL_AUTO | FE_CAN_RECOVER | FE_CAN_HIERARCHY_AUTO,
+                 },
+
+        .release = dib7000p_release,
+
+        .init = dib7000p_wakeup,
+        .sleep = dib7000p_sleep,
+
+        .set_frontend = dib7000p_set_frontend,
+        .get_tune_settings = dib7000p_fe_get_tune_settings,
+        .get_frontend = dib7000p_get_frontend,
+
+        .read_status = dib7000p_read_status,
+        .read_ber = dib7000p_read_ber,
         .read_signal_strength = dib7000p_read_signal_strength,
-        .read_snr             = dib7000p_read_snr,
-        .read_ucblocks        = dib7000p_read_unc_blocks,
+        .read_snr = dib7000p_read_snr,
+        .read_ucblocks = dib7000p_read_unc_blocks,
 };
 
+MODULE_AUTHOR("Olivier Grenie <ogrenie@dibcom.fr>");
 MODULE_AUTHOR("Patrick Boettcher <pboettcher@dibcom.fr>");
 MODULE_DESCRIPTION("Driver for the DiBcom 7000PC COFDM demodulator");
 MODULE_LICENSE("GPL");
diff --git a/drivers/media/dvb/frontends/dib7000p.h b/drivers/media/dvb/frontends/dib7000p.h
index da17345bf5bd..0179f9474bac 100644
--- a/drivers/media/dvb/frontends/dib7000p.h
+++ b/drivers/media/dvb/frontends/dib7000p.h
@@ -33,59 +33,54 @@ struct dib7000p_config {
         int (*agc_control) (struct dvb_frontend *, u8 before);
 
         u8 output_mode;
-        u8 disable_sample_and_hold : 1;
+        u8 disable_sample_and_hold:1;
 
-        u8 enable_current_mirror : 1;
-        u8 diversity_delay;
+        u8 enable_current_mirror:1;
+        u16 diversity_delay;
 
+        u8 default_i2c_addr;
+        u8 enMpegOutput:1;
 };
 
 #define DEFAULT_DIB7000P_I2C_ADDRESS 18
 
 #if defined(CONFIG_DVB_DIB7000P) || (defined(CONFIG_DVB_DIB7000P_MODULE) && \
-                                     defined(MODULE))
-extern struct dvb_frontend *dib7000p_attach(struct i2c_adapter *i2c_adap,
-                                            u8 i2c_addr,
-                                            struct dib7000p_config *cfg);
-extern struct i2c_adapter *dib7000p_get_i2c_master(struct dvb_frontend *,
-                                                   enum dibx000_i2c_interface,
-                                                   int);
-extern int dib7000p_i2c_enumeration(struct i2c_adapter *i2c,
-                                    int no_of_demods, u8 default_addr,
-                                    struct dib7000p_config cfg[]);
+                                        defined(MODULE))
+extern struct dvb_frontend *dib7000p_attach(struct i2c_adapter *i2c_adap, u8 i2c_addr, struct dib7000p_config *cfg);
+extern struct i2c_adapter *dib7000p_get_i2c_master(struct dvb_frontend *, enum dibx000_i2c_interface, int);
+extern int dib7000p_i2c_enumeration(struct i2c_adapter *i2c, int no_of_demods, u8 default_addr, struct dib7000p_config cfg[]);
 extern int dib7000p_set_gpio(struct dvb_frontend *, u8 num, u8 dir, u8 val);
 extern int dib7000p_set_wbd_ref(struct dvb_frontend *, u16 value);
 extern int dib7000pc_detection(struct i2c_adapter *i2c_adap);
 extern int dib7000p_pid_filter(struct dvb_frontend *, u8 id, u16 pid, u8 onoff);
 extern int dib7000p_pid_filter_ctrl(struct dvb_frontend *fe, u8 onoff);
+extern int dib7000p_update_pll(struct dvb_frontend *fe, struct dibx000_bandwidth_config *bw);
+extern u32 dib7000p_ctrl_timf(struct dvb_frontend *fe, u8 op, u32 timf);
+extern int dib7090_agc_restart(struct dvb_frontend *fe, u8 restart);
+extern int dib7090_tuner_sleep(struct dvb_frontend *fe, int onoff);
+extern int dib7090_get_adc_power(struct dvb_frontend *fe);
+extern struct i2c_adapter *dib7090_get_i2c_tuner(struct dvb_frontend *fe);
+extern int dib7090_slave_reset(struct dvb_frontend *fe);
 #else
-static inline
-struct dvb_frontend *dib7000p_attach(struct i2c_adapter *i2c_adap, u8 i2c_addr,
-                                     struct dib7000p_config *cfg)
+static inline struct dvb_frontend *dib7000p_attach(struct i2c_adapter *i2c_adap, u8 i2c_addr, struct dib7000p_config *cfg)
 {
         printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
         return NULL;
 }
 
-static inline
-struct i2c_adapter *dib7000p_get_i2c_master(struct dvb_frontend *fe,
-                                            enum dibx000_i2c_interface i,
-                                            int x)
+static inline struct i2c_adapter *dib7000p_get_i2c_master(struct dvb_frontend *fe, enum dibx000_i2c_interface i, int x)
 {
         printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
         return NULL;
 }
 
-static inline int dib7000p_i2c_enumeration(struct i2c_adapter *i2c,
-                                           int no_of_demods, u8 default_addr,
-                                           struct dib7000p_config cfg[])
+static inline int dib7000p_i2c_enumeration(struct i2c_adapter *i2c, int no_of_demods, u8 default_addr, struct dib7000p_config cfg[])
 {
         printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
         return -ENODEV;
 }
 
-static inline int dib7000p_set_gpio(struct dvb_frontend *fe,
-                                    u8 num, u8 dir, u8 val)
+static inline int dib7000p_set_gpio(struct dvb_frontend *fe, u8 num, u8 dir, u8 val)
 {
         printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
         return -ENODEV;
@@ -102,16 +97,59 @@ static inline int dib7000pc_detection(struct i2c_adapter *i2c_adap)
         printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
         return -ENODEV;
 }
+
 static inline int dib7000p_pid_filter(struct dvb_frontend *fe, u8 id, u16 pid, u8 onoff)
 {
-    printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
-    return -ENODEV;
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return -ENODEV;
 }
 
 static inline int dib7000p_pid_filter_ctrl(struct dvb_frontend *fe, uint8_t onoff)
 {
-    printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
-    return -ENODEV;
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return -ENODEV;
+}
+
+static inline int dib7000p_update_pll(struct dvb_frontend *fe, struct dibx000_bandwidth_config *bw)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return -ENODEV;
+}
+
+static inline u32 dib7000p_ctrl_timf(struct dvb_frontend *fe, u8 op, u32 timf)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return 0;
+}
+
+static inline int dib7090_agc_restart(struct dvb_frontend *fe, u8 restart)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return -ENODEV;
+}
+
+static inline int dib7090_tuner_sleep(struct dvb_frontend *fe, int onoff)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return -ENODEV;
+}
+
+static inline int dib7090_get_adc_power(struct dvb_frontend *fe)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return -ENODEV;
+}
+
+static inline struct i2c_adapter *dib7090_get_i2c_tuner(struct dvb_frontend *fe)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return NULL;
+}
+
+static inline int dib7090_slave_reset(struct dvb_frontend *fe)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return -ENODEV;
 }
 #endif
 
diff --git a/drivers/media/dvb/frontends/dib8000.c b/drivers/media/dvb/frontends/dib8000.c
index df17b91b3250..7d2ea112ae2b 100644
--- a/drivers/media/dvb/frontends/dib8000.c
+++ b/drivers/media/dvb/frontends/dib8000.c
@@ -22,6 +22,7 @@
 #define LAYER_C   3
 
 #define FE_CALLBACK_TIME_NEVER 0xffffffff
+#define MAX_NUMBER_OF_FRONTENDS 6
 
 static int debug;
 module_param(debug, int, 0644);
@@ -34,10 +35,11 @@ MODULE_PARM_DESC(debug, "turn on debugging (default: 0)");
 struct i2c_device {
         struct i2c_adapter *adap;
         u8 addr;
+        u8 *i2c_write_buffer;
+        u8 *i2c_read_buffer;
 };
 
 struct dib8000_state {
-        struct dvb_frontend fe;
         struct dib8000_config cfg;
 
         struct i2c_device i2c;
@@ -68,6 +70,13 @@ struct dib8000_state {
         u8 isdbt_cfg_loaded;
         enum frontend_tune_state tune_state;
         u32 status;
+
+        struct dvb_frontend *fe[MAX_NUMBER_OF_FRONTENDS];
+
+        /* for the I2C transfer */
+        struct i2c_msg msg[2];
+        u8 i2c_write_buffer[4];
+        u8 i2c_read_buffer[2];
 };
 
 enum dib8000_power_mode {
@@ -77,22 +86,41 @@ enum dib8000_power_mode {
 
 static u16 dib8000_i2c_read16(struct i2c_device *i2c, u16 reg)
 {
-        u8 wb[2] = { reg >> 8, reg & 0xff };
-        u8 rb[2];
         struct i2c_msg msg[2] = {
-                {.addr = i2c->addr >> 1,.flags = 0,.buf = wb,.len = 2},
-                {.addr = i2c->addr >> 1,.flags = I2C_M_RD,.buf = rb,.len = 2},
+                {.addr = i2c->addr >> 1, .flags = 0,
+                        .buf = i2c->i2c_write_buffer, .len = 2},
+                {.addr = i2c->addr >> 1, .flags = I2C_M_RD,
+                        .buf = i2c->i2c_read_buffer, .len = 2},
         };
 
+        msg[0].buf[0] = reg >> 8;
+        msg[0].buf[1] = reg & 0xff;
+
         if (i2c_transfer(i2c->adap, msg, 2) != 2)
                 dprintk("i2c read error on %d", reg);
 
-        return (rb[0] << 8) | rb[1];
+        return (msg[1].buf[0] << 8) | msg[1].buf[1];
 }
 
 static u16 dib8000_read_word(struct dib8000_state *state, u16 reg)
 {
-        return dib8000_i2c_read16(&state->i2c, reg);
+        state->i2c_write_buffer[0] = reg >> 8;
+        state->i2c_write_buffer[1] = reg & 0xff;
+
+        memset(state->msg, 0, 2 * sizeof(struct i2c_msg));
+        state->msg[0].addr = state->i2c.addr >> 1;
+        state->msg[0].flags = 0;
+        state->msg[0].buf = state->i2c_write_buffer;
+        state->msg[0].len = 2;
+        state->msg[1].addr = state->i2c.addr >> 1;
+        state->msg[1].flags = I2C_M_RD;
+        state->msg[1].buf = state->i2c_read_buffer;
+        state->msg[1].len = 2;
+
+        if (i2c_transfer(state->i2c.adap, state->msg, 2) != 2)
+                dprintk("i2c read error on %d", reg);
+
+        return (state->i2c_read_buffer[0] << 8) | state->i2c_read_buffer[1];
 }
 
 static u32 dib8000_read32(struct dib8000_state *state, u16 reg)
@@ -107,126 +135,141 @@ static u32 dib8000_read32(struct dib8000_state *state, u16 reg)
 
 static int dib8000_i2c_write16(struct i2c_device *i2c, u16 reg, u16 val)
 {
-        u8 b[4] = {
-                (reg >> 8) & 0xff, reg & 0xff,
-                (val >> 8) & 0xff, val & 0xff,
-        };
-        struct i2c_msg msg = {
-                .addr = i2c->addr >> 1,.flags = 0,.buf = b,.len = 4
-        };
-        return i2c_transfer(i2c->adap, &msg, 1) != 1 ? -EREMOTEIO : 0;
+        struct i2c_msg msg = {.addr = i2c->addr >> 1, .flags = 0,
+                .buf = i2c->i2c_write_buffer, .len = 4};
+        int ret = 0;
+
+        msg.buf[0] = (reg >> 8) & 0xff;
+        msg.buf[1] = reg & 0xff;
+        msg.buf[2] = (val >> 8) & 0xff;
+        msg.buf[3] = val & 0xff;
+
+        ret = i2c_transfer(i2c->adap, &msg, 1) != 1 ? -EREMOTEIO : 0;
+
+        return ret;
 }
 
 static int dib8000_write_word(struct dib8000_state *state, u16 reg, u16 val)
 {
-        return dib8000_i2c_write16(&state->i2c, reg, val);
+        state->i2c_write_buffer[0] = (reg >> 8) & 0xff;
+        state->i2c_write_buffer[1] = reg & 0xff;
+        state->i2c_write_buffer[2] = (val >> 8) & 0xff;
+        state->i2c_write_buffer[3] = val & 0xff;
+
+        memset(&state->msg[0], 0, sizeof(struct i2c_msg));
+        state->msg[0].addr = state->i2c.addr >> 1;
+        state->msg[0].flags = 0;
+        state->msg[0].buf = state->i2c_write_buffer;
+        state->msg[0].len = 4;
+
+        return i2c_transfer(state->i2c.adap, state->msg, 1) != 1 ? -EREMOTEIO : 0;
 }
 
-static const int16_t coeff_2k_sb_1seg_dqpsk[8] = {
+static const s16 coeff_2k_sb_1seg_dqpsk[8] = {
         (769 << 5) | 0x0a, (745 << 5) | 0x03, (595 << 5) | 0x0d, (769 << 5) | 0x0a, (920 << 5) | 0x09, (784 << 5) | 0x02, (519 << 5) | 0x0c,
-            (920 << 5) | 0x09
+                (920 << 5) | 0x09
 };
 
-static const int16_t coeff_2k_sb_1seg[8] = {
+static const s16 coeff_2k_sb_1seg[8] = {
         (692 << 5) | 0x0b, (683 << 5) | 0x01, (519 << 5) | 0x09, (692 << 5) | 0x0b, 0 | 0x1f, 0 | 0x1f, 0 | 0x1f, 0 | 0x1f
 };
 
-static const int16_t coeff_2k_sb_3seg_0dqpsk_1dqpsk[8] = {
+static const s16 coeff_2k_sb_3seg_0dqpsk_1dqpsk[8] = {
         (832 << 5) | 0x10, (912 << 5) | 0x05, (900 << 5) | 0x12, (832 << 5) | 0x10, (-931 << 5) | 0x0f, (912 << 5) | 0x04, (807 << 5) | 0x11,
-            (-931 << 5) | 0x0f
+                (-931 << 5) | 0x0f
 };
 
-static const int16_t coeff_2k_sb_3seg_0dqpsk[8] = {
+static const s16 coeff_2k_sb_3seg_0dqpsk[8] = {
         (622 << 5) | 0x0c, (941 << 5) | 0x04, (796 << 5) | 0x10, (622 << 5) | 0x0c, (982 << 5) | 0x0c, (519 << 5) | 0x02, (572 << 5) | 0x0e,
-            (982 << 5) | 0x0c
+                (982 << 5) | 0x0c
 };
 
-static const int16_t coeff_2k_sb_3seg_1dqpsk[8] = {
+static const s16 coeff_2k_sb_3seg_1dqpsk[8] = {
         (699 << 5) | 0x14, (607 << 5) | 0x04, (944 << 5) | 0x13, (699 << 5) | 0x14, (-720 << 5) | 0x0d, (640 << 5) | 0x03, (866 << 5) | 0x12,
-            (-720 << 5) | 0x0d
+                (-720 << 5) | 0x0d
 };
 
-static const int16_t coeff_2k_sb_3seg[8] = {
+static const s16 coeff_2k_sb_3seg[8] = {
         (664 << 5) | 0x0c, (925 << 5) | 0x03, (937 << 5) | 0x10, (664 << 5) | 0x0c, (-610 << 5) | 0x0a, (697 << 5) | 0x01, (836 << 5) | 0x0e,
-            (-610 << 5) | 0x0a
+                (-610 << 5) | 0x0a
 };
 
-static const int16_t coeff_4k_sb_1seg_dqpsk[8] = {
+static const s16 coeff_4k_sb_1seg_dqpsk[8] = {
         (-955 << 5) | 0x0e, (687 << 5) | 0x04, (818 << 5) | 0x10, (-955 << 5) | 0x0e, (-922 << 5) | 0x0d, (750 << 5) | 0x03, (665 << 5) | 0x0f,
-            (-922 << 5) | 0x0d
+                (-922 << 5) | 0x0d
 };
 
-static const int16_t coeff_4k_sb_1seg[8] = {
+static const s16 coeff_4k_sb_1seg[8] = {
         (638 << 5) | 0x0d, (683 << 5) | 0x02, (638 << 5) | 0x0d, (638 << 5) | 0x0d, (-655 << 5) | 0x0a, (517 << 5) | 0x00, (698 << 5) | 0x0d,
-            (-655 << 5) | 0x0a
+                (-655 << 5) | 0x0a
 };
 
-static const int16_t coeff_4k_sb_3seg_0dqpsk_1dqpsk[8] = {
+static const s16 coeff_4k_sb_3seg_0dqpsk_1dqpsk[8] = {
         (-707 << 5) | 0x14, (910 << 5) | 0x06, (889 << 5) | 0x16, (-707 << 5) | 0x14, (-958 << 5) | 0x13, (993 << 5) | 0x05, (523 << 5) | 0x14,
-            (-958 << 5) | 0x13
+                (-958 << 5) | 0x13
 };
 
-static const int16_t coeff_4k_sb_3seg_0dqpsk[8] = {
+static const s16 coeff_4k_sb_3seg_0dqpsk[8] = {
         (-723 << 5) | 0x13, (910 << 5) | 0x05, (777 << 5) | 0x14, (-723 << 5) | 0x13, (-568 << 5) | 0x0f, (547 << 5) | 0x03, (696 << 5) | 0x12,
-            (-568 << 5) | 0x0f
+                (-568 << 5) | 0x0f
 };
 
-static const int16_t coeff_4k_sb_3seg_1dqpsk[8] = {
+static const s16 coeff_4k_sb_3seg_1dqpsk[8] = {
         (-940 << 5) | 0x15, (607 << 5) | 0x05, (915 << 5) | 0x16, (-940 << 5) | 0x15, (-848 << 5) | 0x13, (683 << 5) | 0x04, (543 << 5) | 0x14,
-            (-848 << 5) | 0x13
+                (-848 << 5) | 0x13
 };
 
-static const int16_t coeff_4k_sb_3seg[8] = {
+static const s16 coeff_4k_sb_3seg[8] = {
         (612 << 5) | 0x12, (910 << 5) | 0x04, (864 << 5) | 0x14, (612 << 5) | 0x12, (-869 << 5) | 0x13, (683 << 5) | 0x02, (869 << 5) | 0x12,
-            (-869 << 5) | 0x13
+                (-869 << 5) | 0x13
 };
 
-static const int16_t coeff_8k_sb_1seg_dqpsk[8] = {
+static const s16 coeff_8k_sb_1seg_dqpsk[8] = {
         (-835 << 5) | 0x12, (684 << 5) | 0x05, (735 << 5) | 0x14, (-835 << 5) | 0x12, (-598 << 5) | 0x10, (781 << 5) | 0x04, (739 << 5) | 0x13,
-            (-598 << 5) | 0x10
+                (-598 << 5) | 0x10
 };
 
-static const int16_t coeff_8k_sb_1seg[8] = {
+static const s16 coeff_8k_sb_1seg[8] = {
         (673 << 5) | 0x0f, (683 << 5) | 0x03, (808 << 5) | 0x12, (673 << 5) | 0x0f, (585 << 5) | 0x0f, (512 << 5) | 0x01, (780 << 5) | 0x0f,
-            (585 << 5) | 0x0f
+                (585 << 5) | 0x0f
 };
 
-static const int16_t coeff_8k_sb_3seg_0dqpsk_1dqpsk[8] = {
+static const s16 coeff_8k_sb_3seg_0dqpsk_1dqpsk[8] = {
         (863 << 5) | 0x17, (930 << 5) | 0x07, (878 << 5) | 0x19, (863 << 5) | 0x17, (0 << 5) | 0x14, (521 << 5) | 0x05, (980 << 5) | 0x18,
-            (0 << 5) | 0x14
+                (0 << 5) | 0x14
 };
 
-static const int16_t coeff_8k_sb_3seg_0dqpsk[8] = {
+static const s16 coeff_8k_sb_3seg_0dqpsk[8] = {
         (-924 << 5) | 0x17, (910 << 5) | 0x06, (774 << 5) | 0x17, (-924 << 5) | 0x17, (-877 << 5) | 0x15, (565 << 5) | 0x04, (553 << 5) | 0x15,
-            (-877 << 5) | 0x15
+                (-877 << 5) | 0x15
 };
 
-static const int16_t coeff_8k_sb_3seg_1dqpsk[8] = {
+static const s16 coeff_8k_sb_3seg_1dqpsk[8] = {
         (-921 << 5) | 0x19, (607 << 5) | 0x06, (881 << 5) | 0x19, (-921 << 5) | 0x19, (-921 << 5) | 0x14, (713 << 5) | 0x05, (1018 << 5) | 0x18,
-            (-921 << 5) | 0x14
+                (-921 << 5) | 0x14
 };
 
-static const int16_t coeff_8k_sb_3seg[8] = {
+static const s16 coeff_8k_sb_3seg[8] = {
         (514 << 5) | 0x14, (910 << 5) | 0x05, (861 << 5) | 0x17, (514 << 5) | 0x14, (690 << 5) | 0x14, (683 << 5) | 0x03, (662 << 5) | 0x15,
-            (690 << 5) | 0x14
+                (690 << 5) | 0x14
 };
 
-static const int16_t ana_fe_coeff_3seg[24] = {
+static const s16 ana_fe_coeff_3seg[24] = {
         81, 80, 78, 74, 68, 61, 54, 45, 37, 28, 19, 11, 4, 1022, 1017, 1013, 1010, 1008, 1008, 1008, 1008, 1010, 1014, 1017
 };
 
-static const int16_t ana_fe_coeff_1seg[24] = {
+static const s16 ana_fe_coeff_1seg[24] = {
         249, 226, 164, 82, 5, 981, 970, 988, 1018, 20, 31, 26, 8, 1012, 1000, 1018, 1012, 8, 15, 14, 9, 3, 1017, 1003
 };
 
-static const int16_t ana_fe_coeff_13seg[24] = {
+static const s16 ana_fe_coeff_13seg[24] = {
         396, 305, 105, -51, -77, -12, 41, 31, -11, -30, -11, 14, 15, -2, -13, -7, 5, 8, 1, -6, -7, -3, 0, 1
 };
 
 static u16 fft_to_mode(struct dib8000_state *state)
 {
         u16 mode;
-        switch (state->fe.dtv_property_cache.transmission_mode) {
+        switch (state->fe[0]->dtv_property_cache.transmission_mode) {
         case TRANSMISSION_MODE_2K:
                 mode = 1;
                 break;
@@ -249,16 +292,18 @@ static void dib8000_set_acquisition_mode(struct dib8000_state *state)
         dprintk("acquisition mode activated");
         dib8000_write_word(state, 298, nud);
 }
-
-static int dib8000_set_output_mode(struct dib8000_state *state, int mode)
+static int dib8000_set_output_mode(struct dvb_frontend *fe, int mode)
 {
+        struct dib8000_state *state = fe->demodulator_priv;
+
         u16 outreg, fifo_threshold, smo_mode, sram = 0x0205;    /* by default SDRAM deintlv is enabled */
 
         outreg = 0;
         fifo_threshold = 1792;
         smo_mode = (dib8000_read_word(state, 299) & 0x0050) | (1 << 1);
 
-        dprintk("-I-  Setting output mode for demod %p to %d", &state->fe, mode);
+        dprintk("-I-    Setting output mode for demod %p to %d",
+                        &state->fe[0], mode);
 
         switch (mode) {
         case OUTMODE_MPEG2_PAR_GATED_CLK:       // STBs with parallel gated clock
@@ -292,7 +337,8 @@ static int dib8000_set_output_mode(struct dib8000_state *state, int mode)
                 break;
 
         default:
-                dprintk("Unhandled output_mode passed to be set for demod %p", &state->fe);
+                dprintk("Unhandled output_mode passed to be set for demod %p",
+                                &state->fe[0]);
                 return -EINVAL;
         }
 
@@ -342,7 +388,8 @@ static void dib8000_set_power_mode(struct dib8000_state *state, enum dib8000_pow
 {
         /* by default everything is going to be powered off */
         u16 reg_774 = 0x3fff, reg_775 = 0xffff, reg_776 = 0xffff,
-            reg_900 = (dib8000_read_word(state, 900) & 0xfffc) | 0x3, reg_1280 = (dib8000_read_word(state, 1280) & 0x00ff) | 0xff00;
+                reg_900 = (dib8000_read_word(state, 900) & 0xfffc) | 0x3,
+                reg_1280 = (dib8000_read_word(state, 1280) & 0x00ff) | 0xff00;
 
         /* now, depending on the requested mode, we power on */
         switch (mode) {
@@ -411,8 +458,9 @@ static int dib8000_set_adc_state(struct dib8000_state *state, enum dibx000_adc_s
         return ret;
 }
 
-static int dib8000_set_bandwidth(struct dib8000_state *state, u32 bw)
+static int dib8000_set_bandwidth(struct dvb_frontend *fe, u32 bw)
 {
+        struct dib8000_state *state = fe->demodulator_priv;
         u32 timf;
 
         if (bw == 0)
@@ -478,7 +526,8 @@ static void dib8000_reset_pll(struct dib8000_state *state)
 
         // clk_cfg1
         clk_cfg1 = (1 << 10) | (0 << 9) | (pll->IO_CLK_en_core << 8) |
-            (pll->bypclk_div << 5) | (pll->enable_refdiv << 4) | (1 << 3) | (pll->pll_range << 1) | (pll->pll_reset << 0);
+                (pll->bypclk_div << 5) | (pll->enable_refdiv << 4) | (1 << 3) |
+                (pll->pll_range << 1) | (pll->pll_reset << 0);
 
         dib8000_write_word(state, 902, clk_cfg1);
         clk_cfg1 = (clk_cfg1 & 0xfff7) | (pll->pll_bypass << 3);
@@ -488,11 +537,12 @@ static void dib8000_reset_pll(struct dib8000_state *state)
 
         /* smpl_cfg: P_refclksel=2, P_ensmplsel=1 nodivsmpl=1 */
         if (state->cfg.pll->ADClkSrc == 0)
-                dib8000_write_word(state, 904, (0 << 15) | (0 << 12) | (0 << 10) | (pll->modulo << 8) | (pll->ADClkSrc << 7) | (0 << 1));
+                dib8000_write_word(state, 904, (0 << 15) | (0 << 12) | (0 << 10) |
+                                (pll->modulo << 8) | (pll->ADClkSrc << 7) | (0 << 1));
         else if (state->cfg.refclksel != 0)
-                dib8000_write_word(state, 904,
-                                   (0 << 15) | (1 << 12) | ((state->cfg.refclksel & 0x3) << 10) | (pll->modulo << 8) | (pll->
-                                                                                                                        ADClkSrc << 7) | (0 << 1));
+                dib8000_write_word(state, 904, (0 << 15) | (1 << 12) |
+                                ((state->cfg.refclksel & 0x3) << 10) | (pll->modulo << 8) |
+                                (pll->ADClkSrc << 7) | (0 << 1));
         else
                 dib8000_write_word(state, 904, (0 << 15) | (1 << 12) | (3 << 10) | (pll->modulo << 8) | (pll->ADClkSrc << 7) | (0 << 1));
 
@@ -560,7 +610,7 @@ static const u16 dib8000_defaults[] = {
         0xd4c0,
 
         /*1, 32,
-           0x6680 // P_corm_thres Lock algorithms configuration */
+                0x6680 // P_corm_thres Lock algorithms configuration */
 
         11, 80,                 /* set ADC level to -16 */
         (1 << 13) - 825 - 117,
@@ -623,14 +673,14 @@ static const u16 dib8000_defaults[] = {
         1, 285,
         0x0020,                 //p_fec_
         1, 299,
-        0x0062,                 // P_smo_mode, P_smo_rs_discard, P_smo_fifo_flush, P_smo_pid_parse, P_smo_error_discard
+        0x0062,                 /* P_smo_mode, P_smo_rs_discard, P_smo_fifo_flush, P_smo_pid_parse, P_smo_error_discard */
 
         1, 338,
         (1 << 12) |             // P_ctrl_corm_thres4pre_freq_inh=1
-            (1 << 10) |         // P_ctrl_pre_freq_mode_sat=1
-            (0 << 9) |          // P_ctrl_pre_freq_inh=0
-            (3 << 5) |          // P_ctrl_pre_freq_step=3
-            (1 << 0),           // P_pre_freq_win_len=1
+                (1 << 10) |
+                (0 << 9) |              /* P_ctrl_pre_freq_inh=0 */
+                (3 << 5) |              /* P_ctrl_pre_freq_step=3 */
+                (1 << 0),               /* P_pre_freq_win_len=1 */
 
         1, 903,
         (0 << 4) | 2,           // P_divclksel=0 P_divbitsel=2 (was clk=3,bit=1 for MPW)
@@ -717,7 +767,7 @@ static int dib8000_reset(struct dvb_frontend *fe)
         if (dib8000_reset_gpio(state) != 0)
                 dprintk("GPIO reset was not successful.");
 
-        if (dib8000_set_output_mode(state, OUTMODE_HIGH_Z) != 0)
+        if (dib8000_set_output_mode(fe, OUTMODE_HIGH_Z) != 0)
                 dprintk("OUTPUT_MODE could not be resetted.");
 
         state->current_agc = NULL;
@@ -752,7 +802,7 @@ static int dib8000_reset(struct dvb_frontend *fe)
         /* unforce divstr regardless whether i2c enumeration was done or not */
         dib8000_write_word(state, 1285, dib8000_read_word(state, 1285) & ~(1 << 1));
 
-        dib8000_set_bandwidth(state, 6000);
+        dib8000_set_bandwidth(fe, 6000);
 
         dib8000_set_adc_state(state, DIBX000_SLOW_ADC_ON);
         dib8000_sad_calib(state);
@@ -778,7 +828,7 @@ static int dib8000_update_lna(struct dib8000_state *state)
                 // read dyn_gain here (because it is demod-dependent and not tuner)
                 dyn_gain = dib8000_read_word(state, 390);
 
-                if (state->cfg.update_lna(&state->fe, dyn_gain)) {      // LNA has changed
+                if (state->cfg.update_lna(state->fe[0], dyn_gain)) {
                         dib8000_restart_agc(state);
                         return 1;
                 }
@@ -865,7 +915,8 @@ static int dib8000_agc_soft_split(struct dib8000_state *state)
                 split_offset = state->current_agc->split.max;
         else
                 split_offset = state->current_agc->split.max *
-                    (agc - state->current_agc->split.min_thres) / (state->current_agc->split.max_thres - state->current_agc->split.min_thres);
+                        (agc - state->current_agc->split.min_thres) /
+                        (state->current_agc->split.max_thres - state->current_agc->split.min_thres);
 
         dprintk("AGC split_offset: %d", split_offset);
 
@@ -900,7 +951,7 @@ static int dib8000_agc_startup(struct dvb_frontend *fe)
         case CT_AGC_STEP_0:
                 //AGC initialization
                 if (state->cfg.agc_control)
-                        state->cfg.agc_control(&state->fe, 1);
+                        state->cfg.agc_control(fe, 1);
 
                 dib8000_restart_agc(state);
 
@@ -924,7 +975,7 @@ static int dib8000_agc_startup(struct dvb_frontend *fe)
                 dib8000_agc_soft_split(state);
 
                 if (state->cfg.agc_control)
-                        state->cfg.agc_control(&state->fe, 0);
+                        state->cfg.agc_control(fe, 0);
 
                 *tune_state = CT_AGC_STOP;
                 break;
@@ -936,29 +987,28 @@ static int dib8000_agc_startup(struct dvb_frontend *fe)
 
 }
 
-static const int32_t lut_1000ln_mant[] =
+static const s32 lut_1000ln_mant[] =
 {
         908, 7003, 7090, 7170, 7244, 7313, 7377, 7438, 7495, 7549, 7600
 };
 
-int32_t dib8000_get_adc_power(struct dvb_frontend *fe, uint8_t mode)
+s32 dib8000_get_adc_power(struct dvb_frontend *fe, u8 mode)
 {
-    struct dib8000_state *state = fe->demodulator_priv;
-    uint32_t ix = 0, tmp_val = 0, exp = 0, mant = 0;
-    int32_t val;
-
-    val = dib8000_read32(state, 384);
-    /* mode = 1 : ln_agcpower calc using mant-exp conversion and mantis look up table */
-    if (mode) {
-        tmp_val = val;
-        while (tmp_val >>= 1)
-                exp++;
-        mant = (val * 1000 / (1<<exp));
-        ix = (uint8_t)((mant-1000)/100); /* index of the LUT */
-        val = (lut_1000ln_mant[ix] + 693*(exp-20) - 6908); /* 1000 * ln(adcpower_real) ; 693 = 1000ln(2) ; 6908 = 1000*ln(1000) ; 20 comes from adc_real = adc_pow_int / 2**20 */
-        val = (val*256)/1000;
-    }
-    return val;
+        struct dib8000_state *state = fe->demodulator_priv;
+        u32 ix = 0, tmp_val = 0, exp = 0, mant = 0;
+        s32 val;
+
+        val = dib8000_read32(state, 384);
+        if (mode) {
+                tmp_val = val;
+                while (tmp_val >>= 1)
+                        exp++;
+                mant = (val * 1000 / (1<<exp));
+                ix = (u8)((mant-1000)/100); /* index of the LUT */
+                val = (lut_1000ln_mant[ix] + 693*(exp-20) - 6908);
+                val = (val*256)/1000;
+        }
+        return val;
 }
 EXPORT_SYMBOL(dib8000_get_adc_power);
 
@@ -971,30 +1021,31 @@ static void dib8000_update_timf(struct dib8000_state *state)
         dprintk("Updated timing frequency: %d (default: %d)", state->timf, state->timf_default);
 }
 
+static const u16 adc_target_16dB[11] = {
+        (1 << 13) - 825 - 117,
+        (1 << 13) - 837 - 117,
+        (1 << 13) - 811 - 117,
+        (1 << 13) - 766 - 117,
+        (1 << 13) - 737 - 117,
+        (1 << 13) - 693 - 117,
+        (1 << 13) - 648 - 117,
+        (1 << 13) - 619 - 117,
+        (1 << 13) - 575 - 117,
+        (1 << 13) - 531 - 117,
+        (1 << 13) - 501 - 117
+};
+static const u8 permu_seg[] = { 6, 5, 7, 4, 8, 3, 9, 2, 10, 1, 11, 0, 12 };
+
 static void dib8000_set_channel(struct dib8000_state *state, u8 seq, u8 autosearching)
 {
         u16 mode, max_constellation, seg_diff_mask = 0, nbseg_diff = 0;
         u8 guard, crate, constellation, timeI;
-        u8 permu_seg[] = { 6, 5, 7, 4, 8, 3, 9, 2, 10, 1, 11, 0, 12 };
         u16 i, coeff[4], P_cfr_left_edge = 0, P_cfr_right_edge = 0, seg_mask13 = 0x1fff;        // All 13 segments enabled
         const s16 *ncoeff = NULL, *ana_fe;
         u16 tmcc_pow = 0;
         u16 coff_pow = 0x2800;
         u16 init_prbs = 0xfff;
         u16 ana_gain = 0;
-        u16 adc_target_16dB[11] = {
-                (1 << 13) - 825 - 117,
-                (1 << 13) - 837 - 117,
-                (1 << 13) - 811 - 117,
-                (1 << 13) - 766 - 117,
-                (1 << 13) - 737 - 117,
-                (1 << 13) - 693 - 117,
-                (1 << 13) - 648 - 117,
-                (1 << 13) - 619 - 117,
-                (1 << 13) - 575 - 117,
-                (1 << 13) - 531 - 117,
-                (1 << 13) - 501 - 117
-        };
 
         if (state->ber_monitored_layer != LAYER_ALL)
                 dib8000_write_word(state, 285, (dib8000_read_word(state, 285) & 0x60) | state->ber_monitored_layer);
@@ -1002,22 +1053,23 @@ static void dib8000_set_channel(struct dib8000_state *state, u8 seq, u8 autosear
                 dib8000_write_word(state, 285, dib8000_read_word(state, 285) & 0x60);
 
         i = dib8000_read_word(state, 26) & 1;   // P_dds_invspec
-        dib8000_write_word(state, 26, state->fe.dtv_property_cache.inversion ^ i);
+        dib8000_write_word(state, 26, state->fe[0]->dtv_property_cache.inversion^i);
 
-        if (state->fe.dtv_property_cache.isdbt_sb_mode) {
+        if (state->fe[0]->dtv_property_cache.isdbt_sb_mode) {
                 //compute new dds_freq for the seg and adjust prbs
                 int seg_offset =
-                    state->fe.dtv_property_cache.isdbt_sb_segment_idx - (state->fe.dtv_property_cache.isdbt_sb_segment_count / 2) -
-                    (state->fe.dtv_property_cache.isdbt_sb_segment_count % 2);
+                        state->fe[0]->dtv_property_cache.isdbt_sb_segment_idx -
+                        (state->fe[0]->dtv_property_cache.isdbt_sb_segment_count / 2) -
+                        (state->fe[0]->dtv_property_cache.isdbt_sb_segment_count % 2);
                 int clk = state->cfg.pll->internal;
                 u32 segtodds = ((u32) (430 << 23) / clk) << 3;  // segtodds = SegBW / Fclk * pow(2,26)
                 int dds_offset = seg_offset * segtodds;
                 int new_dds, sub_channel;
-                if ((state->fe.dtv_property_cache.isdbt_sb_segment_count % 2) == 0)     // if even
+                if ((state->fe[0]->dtv_property_cache.isdbt_sb_segment_count % 2) == 0)
                         dds_offset -= (int)(segtodds / 2);
 
                 if (state->cfg.pll->ifreq == 0) {
-                        if ((state->fe.dtv_property_cache.inversion ^ i) == 0) {
+                        if ((state->fe[0]->dtv_property_cache.inversion ^ i) == 0) {
                                 dib8000_write_word(state, 26, dib8000_read_word(state, 26) | 1);
                                 new_dds = dds_offset;
                         } else
@@ -1027,35 +1079,35 @@ static void dib8000_set_channel(struct dib8000_state *state, u8 seq, u8 autosear
                         //  - the segment of center frequency with an odd total number of segments
                         //  - the segment to the left of center frequency with an even total number of segments
                         //  - the segment to the right of center frequency with an even total number of segments
-                        if ((state->fe.dtv_property_cache.delivery_system == SYS_ISDBT) && (state->fe.dtv_property_cache.isdbt_sb_mode == 1)
-                            &&
-                            (((state->fe.dtv_property_cache.isdbt_sb_segment_count % 2)
-                              && (state->fe.dtv_property_cache.isdbt_sb_segment_idx ==
-                                  ((state->fe.dtv_property_cache.isdbt_sb_segment_count / 2) + 1)))
-                             || (((state->fe.dtv_property_cache.isdbt_sb_segment_count % 2) == 0)
-                                 && (state->fe.dtv_property_cache.isdbt_sb_segment_idx == (state->fe.dtv_property_cache.isdbt_sb_segment_count / 2)))
-                             || (((state->fe.dtv_property_cache.isdbt_sb_segment_count % 2) == 0)
-                                 && (state->fe.dtv_property_cache.isdbt_sb_segment_idx ==
-                                     ((state->fe.dtv_property_cache.isdbt_sb_segment_count / 2) + 1)))
-                            )) {
+                        if ((state->fe[0]->dtv_property_cache.delivery_system == SYS_ISDBT)
+                                && (state->fe[0]->dtv_property_cache.isdbt_sb_mode == 1)
+                                        && (((state->fe[0]->dtv_property_cache.isdbt_sb_segment_count % 2)
+                                          && (state->fe[0]->dtv_property_cache.isdbt_sb_segment_idx ==
+                                  ((state->fe[0]->dtv_property_cache.isdbt_sb_segment_count / 2) + 1)))
+                                         || (((state->fe[0]->dtv_property_cache.isdbt_sb_segment_count % 2) == 0)
+                                                 && (state->fe[0]->dtv_property_cache.isdbt_sb_segment_idx == (state->fe[0]->dtv_property_cache.isdbt_sb_segment_count / 2)))
+                                         || (((state->fe[0]->dtv_property_cache.isdbt_sb_segment_count % 2) == 0)
+                                                 && (state->fe[0]->dtv_property_cache.isdbt_sb_segment_idx ==
+                                                         ((state->fe[0]->dtv_property_cache.isdbt_sb_segment_count / 2) + 1)))
+                                        )) {
                                 new_dds -= ((u32) (850 << 22) / clk) << 4;      // new_dds = 850 (freq shift in KHz) / Fclk * pow(2,26)
                         }
                 } else {
-                        if ((state->fe.dtv_property_cache.inversion ^ i) == 0)
+                        if ((state->fe[0]->dtv_property_cache.inversion ^ i) == 0)
                                 new_dds = state->cfg.pll->ifreq - dds_offset;
                         else
                                 new_dds = state->cfg.pll->ifreq + dds_offset;
                 }
                 dib8000_write_word(state, 27, (u16) ((new_dds >> 16) & 0x01ff));
                 dib8000_write_word(state, 28, (u16) (new_dds & 0xffff));
-                if (state->fe.dtv_property_cache.isdbt_sb_segment_count % 2)    // if odd
-                        sub_channel = ((state->fe.dtv_property_cache.isdbt_sb_subchannel + (3 * seg_offset) + 1) % 41) / 3;
-                else            // if even
-                        sub_channel = ((state->fe.dtv_property_cache.isdbt_sb_subchannel + (3 * seg_offset)) % 41) / 3;
+                if (state->fe[0]->dtv_property_cache.isdbt_sb_segment_count % 2)
+                        sub_channel = ((state->fe[0]->dtv_property_cache.isdbt_sb_subchannel + (3 * seg_offset) + 1) % 41) / 3;
+                else
+                        sub_channel = ((state->fe[0]->dtv_property_cache.isdbt_sb_subchannel + (3 * seg_offset)) % 41) / 3;
                 sub_channel -= 6;
 
-                if (state->fe.dtv_property_cache.transmission_mode == TRANSMISSION_MODE_2K
-                    || state->fe.dtv_property_cache.transmission_mode == TRANSMISSION_MODE_4K) {
+                if (state->fe[0]->dtv_property_cache.transmission_mode == TRANSMISSION_MODE_2K
+                                || state->fe[0]->dtv_property_cache.transmission_mode == TRANSMISSION_MODE_4K) {
                         dib8000_write_word(state, 219, dib8000_read_word(state, 219) | 0x1);    //adp_pass =1
                         dib8000_write_word(state, 190, dib8000_read_word(state, 190) | (0x1 << 14));    //pha3_force_pha_shift = 1
                 } else {
@@ -1063,7 +1115,7 @@ static void dib8000_set_channel(struct dib8000_state *state, u8 seq, u8 autosear
                         dib8000_write_word(state, 190, dib8000_read_word(state, 190) & 0xbfff); //pha3_force_pha_shift = 0
                 }
 
-                switch (state->fe.dtv_property_cache.transmission_mode) {
+                switch (state->fe[0]->dtv_property_cache.transmission_mode) {
                 case TRANSMISSION_MODE_2K:
                         switch (sub_channel) {
                         case -6:
@@ -1209,7 +1261,7 @@ static void dib8000_set_channel(struct dib8000_state *state, u8 seq, u8 autosear
                         }
                         break;
                 }
-        } else {                // if not state->fe.dtv_property_cache.isdbt_sb_mode
+        } else {
                 dib8000_write_word(state, 27, (u16) ((state->cfg.pll->ifreq >> 16) & 0x01ff));
                 dib8000_write_word(state, 28, (u16) (state->cfg.pll->ifreq & 0xffff));
                 dib8000_write_word(state, 26, (u16) ((state->cfg.pll->ifreq >> 25) & 0x0003));
@@ -1218,7 +1270,7 @@ static void dib8000_set_channel(struct dib8000_state *state, u8 seq, u8 autosear
         dib8000_write_word(state, 10, (seq << 4));
         //  dib8000_write_word(state, 287, (dib8000_read_word(state, 287) & 0xe000) | 0x1000);
 
-        switch (state->fe.dtv_property_cache.guard_interval) {
+        switch (state->fe[0]->dtv_property_cache.guard_interval) {
         case GUARD_INTERVAL_1_32:
                 guard = 0;
                 break;
@@ -1238,7 +1290,7 @@ static void dib8000_set_channel(struct dib8000_state *state, u8 seq, u8 autosear
 
         max_constellation = DQPSK;
         for (i = 0; i < 3; i++) {
-                switch (state->fe.dtv_property_cache.layer[i].modulation) {
+                switch (state->fe[0]->dtv_property_cache.layer[i].modulation) {
                 case DQPSK:
                         constellation = 0;
                         break;
@@ -1254,7 +1306,7 @@ static void dib8000_set_channel(struct dib8000_state *state, u8 seq, u8 autosear
                         break;
                 }
 
-                switch (state->fe.dtv_property_cache.layer[i].fec) {
+                switch (state->fe[0]->dtv_property_cache.layer[i].fec) {
                 case FEC_1_2:
                         crate = 1;
                         break;
@@ -1273,26 +1325,26 @@ static void dib8000_set_channel(struct dib8000_state *state, u8 seq, u8 autosear
                         break;
                 }
 
-                if ((state->fe.dtv_property_cache.layer[i].interleaving > 0) &&
-                    ((state->fe.dtv_property_cache.layer[i].interleaving <= 3) ||
-                     (state->fe.dtv_property_cache.layer[i].interleaving == 4 && state->fe.dtv_property_cache.isdbt_sb_mode == 1))
-                    )
-                        timeI = state->fe.dtv_property_cache.layer[i].interleaving;
+                if ((state->fe[0]->dtv_property_cache.layer[i].interleaving > 0) &&
+                                ((state->fe[0]->dtv_property_cache.layer[i].interleaving <= 3) ||
+                                 (state->fe[0]->dtv_property_cache.layer[i].interleaving == 4 && state->fe[0]->dtv_property_cache.isdbt_sb_mode == 1))
+                        )
+                        timeI = state->fe[0]->dtv_property_cache.layer[i].interleaving;
                 else
                         timeI = 0;
-                dib8000_write_word(state, 2 + i, (constellation << 10) | ((state->fe.dtv_property_cache.layer[i].segment_count & 0xf) << 6) |
-                                   (crate << 3) | timeI);
-                if (state->fe.dtv_property_cache.layer[i].segment_count > 0) {
+                dib8000_write_word(state, 2 + i, (constellation << 10) | ((state->fe[0]->dtv_property_cache.layer[i].segment_count & 0xf) << 6) |
+                                        (crate << 3) | timeI);
+                if (state->fe[0]->dtv_property_cache.layer[i].segment_count > 0) {
                         switch (max_constellation) {
                         case DQPSK:
                         case QPSK:
-                                if (state->fe.dtv_property_cache.layer[i].modulation == QAM_16 ||
-                                    state->fe.dtv_property_cache.layer[i].modulation == QAM_64)
-                                        max_constellation = state->fe.dtv_property_cache.layer[i].modulation;
+                                if (state->fe[0]->dtv_property_cache.layer[i].modulation == QAM_16 ||
+                                        state->fe[0]->dtv_property_cache.layer[i].modulation == QAM_64)
+                                        max_constellation = state->fe[0]->dtv_property_cache.layer[i].modulation;
                                 break;
                         case QAM_16:
-                                if (state->fe.dtv_property_cache.layer[i].modulation == QAM_64)
-                                        max_constellation = state->fe.dtv_property_cache.layer[i].modulation;
+                                if (state->fe[0]->dtv_property_cache.layer[i].modulation == QAM_64)
+                                        max_constellation = state->fe[0]->dtv_property_cache.layer[i].modulation;
                                 break;
                         }
                 }
@@ -1303,34 +1355,34 @@ static void dib8000_set_channel(struct dib8000_state *state, u8 seq, u8 autosear
         //dib8000_write_word(state, 5, 13); /*p_last_seg = 13*/
 
         dib8000_write_word(state, 274, (dib8000_read_word(state, 274) & 0xffcf) |
-                           ((state->fe.dtv_property_cache.isdbt_partial_reception & 1) << 5) | ((state->fe.dtv_property_cache.
+                                ((state->fe[0]->dtv_property_cache.isdbt_partial_reception & 1) << 5) | ((state->fe[0]->dtv_property_cache.
                                                                                                  isdbt_sb_mode & 1) << 4));
 
-        dprintk("mode = %d ; guard = %d", mode, state->fe.dtv_property_cache.guard_interval);
+        dprintk("mode = %d ; guard = %d", mode, state->fe[0]->dtv_property_cache.guard_interval);
 
         /* signal optimization parameter */
 
-        if (state->fe.dtv_property_cache.isdbt_partial_reception) {
-                seg_diff_mask = (state->fe.dtv_property_cache.layer[0].modulation == DQPSK) << permu_seg[0];
+        if (state->fe[0]->dtv_property_cache.isdbt_partial_reception) {
+                seg_diff_mask = (state->fe[0]->dtv_property_cache.layer[0].modulation == DQPSK) << permu_seg[0];
                 for (i = 1; i < 3; i++)
                         nbseg_diff +=
-                            (state->fe.dtv_property_cache.layer[i].modulation == DQPSK) * state->fe.dtv_property_cache.layer[i].segment_count;
+                                (state->fe[0]->dtv_property_cache.layer[i].modulation == DQPSK) * state->fe[0]->dtv_property_cache.layer[i].segment_count;
                 for (i = 0; i < nbseg_diff; i++)
                         seg_diff_mask |= 1 << permu_seg[i + 1];
         } else {
                 for (i = 0; i < 3; i++)
                         nbseg_diff +=
-                            (state->fe.dtv_property_cache.layer[i].modulation == DQPSK) * state->fe.dtv_property_cache.layer[i].segment_count;
+                                (state->fe[0]->dtv_property_cache.layer[i].modulation == DQPSK) * state->fe[0]->dtv_property_cache.layer[i].segment_count;
                 for (i = 0; i < nbseg_diff; i++)
                         seg_diff_mask |= 1 << permu_seg[i];
         }
         dprintk("nbseg_diff = %X (%d)", seg_diff_mask, seg_diff_mask);
 
         state->differential_constellation = (seg_diff_mask != 0);
-        dib8000_set_diversity_in(&state->fe, state->diversity_onoff);
+        dib8000_set_diversity_in(state->fe[0], state->diversity_onoff);
 
-        if (state->fe.dtv_property_cache.isdbt_sb_mode == 1) {  // ISDB-Tsb
-                if (state->fe.dtv_property_cache.isdbt_partial_reception == 1)  // 3-segments
+        if (state->fe[0]->dtv_property_cache.isdbt_sb_mode == 1) {
+                if (state->fe[0]->dtv_property_cache.isdbt_partial_reception == 1)
                         seg_mask13 = 0x00E0;
                 else            // 1-segment
                         seg_mask13 = 0x0040;
@@ -1340,7 +1392,7 @@ static void dib8000_set_channel(struct dib8000_state *state, u8 seq, u8 autosear
         // WRITE: Mode & Diff mask
         dib8000_write_word(state, 0, (mode << 13) | seg_diff_mask);
 
-        if ((seg_diff_mask) || (state->fe.dtv_property_cache.isdbt_sb_mode))
+        if ((seg_diff_mask) || (state->fe[0]->dtv_property_cache.isdbt_sb_mode))
                 dib8000_write_word(state, 268, (dib8000_read_word(state, 268) & 0xF9FF) | 0x0200);
         else
                 dib8000_write_word(state, 268, (2 << 9) | 39);  //init value
@@ -1351,26 +1403,25 @@ static void dib8000_set_channel(struct dib8000_state *state, u8 seq, u8 autosear
 
         dib8000_write_word(state, 353, seg_mask13);     // ADDR 353
 
-/*     // P_small_narrow_band=0, P_small_last_seg=13, P_small_offset_num_car=5 */
-        // dib8000_write_word(state, 351, (state->fe.dtv_property_cache.isdbt_sb_mode << 8) | (13 << 4) | 5 );
+/*      // P_small_narrow_band=0, P_small_last_seg=13, P_small_offset_num_car=5 */
 
         // ---- SMALL ----
-        if (state->fe.dtv_property_cache.isdbt_sb_mode == 1) {
-                switch (state->fe.dtv_property_cache.transmission_mode) {
+        if (state->fe[0]->dtv_property_cache.isdbt_sb_mode == 1) {
+                switch (state->fe[0]->dtv_property_cache.transmission_mode) {
                 case TRANSMISSION_MODE_2K:
-                        if (state->fe.dtv_property_cache.isdbt_partial_reception == 0) {        // 1-seg
-                                if (state->fe.dtv_property_cache.layer[0].modulation == DQPSK)  // DQPSK
+                        if (state->fe[0]->dtv_property_cache.isdbt_partial_reception == 0) {
+                                if (state->fe[0]->dtv_property_cache.layer[0].modulation == DQPSK)
                                         ncoeff = coeff_2k_sb_1seg_dqpsk;
                                 else    // QPSK or QAM
                                         ncoeff = coeff_2k_sb_1seg;
                         } else {        // 3-segments
-                                if (state->fe.dtv_property_cache.layer[0].modulation == DQPSK) {        // DQPSK on central segment
-                                        if (state->fe.dtv_property_cache.layer[1].modulation == DQPSK)  // DQPSK on external segments
+                                if (state->fe[0]->dtv_property_cache.layer[0].modulation == DQPSK) {
+                                        if (state->fe[0]->dtv_property_cache.layer[1].modulation == DQPSK)
                                                 ncoeff = coeff_2k_sb_3seg_0dqpsk_1dqpsk;
                                         else    // QPSK or QAM on external segments
                                                 ncoeff = coeff_2k_sb_3seg_0dqpsk;
                                 } else {        // QPSK or QAM on central segment
-                                        if (state->fe.dtv_property_cache.layer[1].modulation == DQPSK)  // DQPSK on external segments
+                                        if (state->fe[0]->dtv_property_cache.layer[1].modulation == DQPSK)
                                                 ncoeff = coeff_2k_sb_3seg_1dqpsk;
                                         else    // QPSK or QAM on external segments
                                                 ncoeff = coeff_2k_sb_3seg;
@@ -1379,20 +1430,20 @@ static void dib8000_set_channel(struct dib8000_state *state, u8 seq, u8 autosear
                         break;
 
                 case TRANSMISSION_MODE_4K:
-                        if (state->fe.dtv_property_cache.isdbt_partial_reception == 0) {        // 1-seg
-                                if (state->fe.dtv_property_cache.layer[0].modulation == DQPSK)  // DQPSK
+                        if (state->fe[0]->dtv_property_cache.isdbt_partial_reception == 0) {
+                                if (state->fe[0]->dtv_property_cache.layer[0].modulation == DQPSK)
                                         ncoeff = coeff_4k_sb_1seg_dqpsk;
                                 else    // QPSK or QAM
                                         ncoeff = coeff_4k_sb_1seg;
                         } else {        // 3-segments
-                                if (state->fe.dtv_property_cache.layer[0].modulation == DQPSK) {        // DQPSK on central segment
-                                        if (state->fe.dtv_property_cache.layer[1].modulation == DQPSK) {        // DQPSK on external segments
+                                if (state->fe[0]->dtv_property_cache.layer[0].modulation == DQPSK) {
+                                        if (state->fe[0]->dtv_property_cache.layer[1].modulation == DQPSK) {
                                                 ncoeff = coeff_4k_sb_3seg_0dqpsk_1dqpsk;
                                         } else {        // QPSK or QAM on external segments
                                                 ncoeff = coeff_4k_sb_3seg_0dqpsk;
                                         }
                                 } else {        // QPSK or QAM on central segment
-                                        if (state->fe.dtv_property_cache.layer[1].modulation == DQPSK) {        // DQPSK on external segments
+                                        if (state->fe[0]->dtv_property_cache.layer[1].modulation == DQPSK) {
                                                 ncoeff = coeff_4k_sb_3seg_1dqpsk;
                                         } else  // QPSK or QAM on external segments
                                                 ncoeff = coeff_4k_sb_3seg;
@@ -1403,20 +1454,20 @@ static void dib8000_set_channel(struct dib8000_state *state, u8 seq, u8 autosear
                 case TRANSMISSION_MODE_AUTO:
                 case TRANSMISSION_MODE_8K:
                 default:
-                        if (state->fe.dtv_property_cache.isdbt_partial_reception == 0) {        // 1-seg
-                                if (state->fe.dtv_property_cache.layer[0].modulation == DQPSK)  // DQPSK
+                        if (state->fe[0]->dtv_property_cache.isdbt_partial_reception == 0) {
+                                if (state->fe[0]->dtv_property_cache.layer[0].modulation == DQPSK)
                                         ncoeff = coeff_8k_sb_1seg_dqpsk;
                                 else    // QPSK or QAM
                                         ncoeff = coeff_8k_sb_1seg;
                         } else {        // 3-segments
-                                if (state->fe.dtv_property_cache.layer[0].modulation == DQPSK) {        // DQPSK on central segment
-                                        if (state->fe.dtv_property_cache.layer[1].modulation == DQPSK) {        // DQPSK on external segments
+                                if (state->fe[0]->dtv_property_cache.layer[0].modulation == DQPSK) {
+                                        if (state->fe[0]->dtv_property_cache.layer[1].modulation == DQPSK) {
                                                 ncoeff = coeff_8k_sb_3seg_0dqpsk_1dqpsk;
                                         } else {        // QPSK or QAM on external segments
                                                 ncoeff = coeff_8k_sb_3seg_0dqpsk;
                                         }
                                 } else {        // QPSK or QAM on central segment
-                                        if (state->fe.dtv_property_cache.layer[1].modulation == DQPSK) {        // DQPSK on external segments
+                                        if (state->fe[0]->dtv_property_cache.layer[1].modulation == DQPSK) {
                                                 ncoeff = coeff_8k_sb_3seg_1dqpsk;
                                         } else  // QPSK or QAM on external segments
                                                 ncoeff = coeff_8k_sb_3seg;
@@ -1430,22 +1481,22 @@ static void dib8000_set_channel(struct dib8000_state *state, u8 seq, u8 autosear
 
         // P_small_coef_ext_enable=ISDB-Tsb, P_small_narrow_band=ISDB-Tsb, P_small_last_seg=13, P_small_offset_num_car=5
         dib8000_write_word(state, 351,
-                           (state->fe.dtv_property_cache.isdbt_sb_mode << 9) | (state->fe.dtv_property_cache.isdbt_sb_mode << 8) | (13 << 4) | 5);
+                                (state->fe[0]->dtv_property_cache.isdbt_sb_mode << 9) | (state->fe[0]->dtv_property_cache.isdbt_sb_mode << 8) | (13 << 4) | 5);
 
         // ---- COFF ----
         // Carloff, the most robust
-        if (state->fe.dtv_property_cache.isdbt_sb_mode == 1) {  // Sound Broadcasting mode - use both TMCC and AC pilots
+        if (state->fe[0]->dtv_property_cache.isdbt_sb_mode == 1) {
 
                 // P_coff_cpil_alpha=4, P_coff_inh=0, P_coff_cpil_winlen=64
                 // P_coff_narrow_band=1, P_coff_square_val=1, P_coff_one_seg=~partial_rcpt, P_coff_use_tmcc=1, P_coff_use_ac=1
                 dib8000_write_word(state, 187,
-                                   (4 << 12) | (0 << 11) | (63 << 5) | (0x3 << 3) | ((~state->fe.dtv_property_cache.isdbt_partial_reception & 1) << 2)
-                                   | 0x3);
+                                        (4 << 12) | (0 << 11) | (63 << 5) | (0x3 << 3) | ((~state->fe[0]->dtv_property_cache.isdbt_partial_reception & 1) << 2)
+                                        | 0x3);
 
-/*             // P_small_coef_ext_enable = 1 */
-/*             dib8000_write_word(state, 351, dib8000_read_word(state, 351) | 0x200); */
+/*              // P_small_coef_ext_enable = 1 */
+/*              dib8000_write_word(state, 351, dib8000_read_word(state, 351) | 0x200); */
 
-                if (state->fe.dtv_property_cache.isdbt_partial_reception == 0) {        // Sound Broadcasting mode 1 seg
+                if (state->fe[0]->dtv_property_cache.isdbt_partial_reception == 0) {
 
                         // P_coff_winlen=63, P_coff_thres_lock=15, P_coff_one_seg_width= (P_mode == 3) , P_coff_one_seg_sym= (P_mode-1)
                         if (mode == 3)
@@ -1469,10 +1520,10 @@ static void dib8000_set_channel(struct dib8000_state *state, u8 seq, u8 autosear
                         dib8000_write_word(state, 186, 80);
                 } else {        // Sound Broadcasting mode 3 seg
                         // P_coff_one_seg_sym= 1, P_coff_one_seg_width= 1, P_coff_winlen=63, P_coff_thres_lock=15
-                        /*                 if (mode == 3) */
-                        /*                     dib8000_write_word(state, 180, 0x2fca | ((0) << 14)); */
-                        /*                 else */
-                        /*                     dib8000_write_word(state, 180, 0x2fca | ((1) << 14)); */
+                        /*      if (mode == 3) */
+                        /*              dib8000_write_word(state, 180, 0x2fca | ((0) << 14)); */
+                        /*      else */
+                        /*              dib8000_write_word(state, 180, 0x2fca | ((1) << 14)); */
                         dib8000_write_word(state, 180, 0x1fcf | (1 << 14));
 
                         // P_ctrl_corm_thres4pre_freq_inh = 1, P_ctrl_pre_freq_mode_sat=1,
@@ -1509,7 +1560,7 @@ static void dib8000_set_channel(struct dib8000_state *state, u8 seq, u8 autosear
                 dib8000_write_word(state, 341, (4 << 3) | (1 << 2) | (1 << 1) | (1 << 0));
         }
         // ---- FFT ----
-        if (state->fe.dtv_property_cache.isdbt_sb_mode == 1 && state->fe.dtv_property_cache.isdbt_partial_reception == 0)       // 1-seg
+        if (state->fe[0]->dtv_property_cache.isdbt_sb_mode == 1 && state->fe[0]->dtv_property_cache.isdbt_partial_reception == 0)
                 dib8000_write_word(state, 178, 64);     // P_fft_powrange=64
         else
                 dib8000_write_word(state, 178, 32);     // P_fft_powrange=32
@@ -1518,12 +1569,12 @@ static void dib8000_set_channel(struct dib8000_state *state, u8 seq, u8 autosear
          * 6bits; p_coff_thres_lock 6bits (for coff lock if needed)
          */
         /* if ( ( nbseg_diff>0)&&(nbseg_diff<13))
-           dib8000_write_word(state, 187, (dib8000_read_word(state, 187) & 0xfffb) | (1 << 3)); */
+                dib8000_write_word(state, 187, (dib8000_read_word(state, 187) & 0xfffb) | (1 << 3)); */
 
         dib8000_write_word(state, 189, ~seg_mask13 | seg_diff_mask);    /* P_lmod4_seg_inh       */
         dib8000_write_word(state, 192, ~seg_mask13 | seg_diff_mask);    /* P_pha3_seg_inh        */
         dib8000_write_word(state, 225, ~seg_mask13 | seg_diff_mask);    /* P_tac_seg_inh         */
-        if ((!state->fe.dtv_property_cache.isdbt_sb_mode) && (state->cfg.pll->ifreq == 0))
+        if ((!state->fe[0]->dtv_property_cache.isdbt_sb_mode) && (state->cfg.pll->ifreq == 0))
                 dib8000_write_word(state, 266, ~seg_mask13 | seg_diff_mask | 0x40);     /* P_equal_noise_seg_inh */
         else
                 dib8000_write_word(state, 266, ~seg_mask13 | seg_diff_mask);    /* P_equal_noise_seg_inh */
@@ -1538,8 +1589,8 @@ static void dib8000_set_channel(struct dib8000_state *state, u8 seq, u8 autosear
         dib8000_write_word(state, 211, seg_mask13 & (~seg_diff_mask));  /* P_des_seg_enabled     */
 
         /* offset loop parameters */
-        if (state->fe.dtv_property_cache.isdbt_sb_mode == 1) {
-                if (state->fe.dtv_property_cache.isdbt_partial_reception == 0)  // Sound Broadcasting mode 1 seg
+        if (state->fe[0]->dtv_property_cache.isdbt_sb_mode == 1) {
+                if (state->fe[0]->dtv_property_cache.isdbt_partial_reception == 0)
                         /* P_timf_alpha = (11-P_mode), P_corm_alpha=6, P_corm_thres=0x80 */
                         dib8000_write_word(state, 32, ((11 - mode) << 12) | (6 << 8) | 0x40);
 
@@ -1551,8 +1602,8 @@ static void dib8000_set_channel(struct dib8000_state *state, u8 seq, u8 autosear
                 /* P_timf_alpha = (9-P_mode, P_corm_alpha=6, P_corm_thres=0x80 */
                 dib8000_write_word(state, 32, ((9 - mode) << 12) | (6 << 8) | 0x80);
 
-        if (state->fe.dtv_property_cache.isdbt_sb_mode == 1) {
-                if (state->fe.dtv_property_cache.isdbt_partial_reception == 0)  // Sound Broadcasting mode 1 seg
+        if (state->fe[0]->dtv_property_cache.isdbt_sb_mode == 1) {
+                if (state->fe[0]->dtv_property_cache.isdbt_partial_reception == 0)
                         /* P_ctrl_pha_off_max=3   P_ctrl_sfreq_inh =0  P_ctrl_sfreq_step = (11-P_mode)  */
                         dib8000_write_word(state, 37, (3 << 5) | (0 << 4) | (10 - mode));
 
@@ -1564,7 +1615,7 @@ static void dib8000_set_channel(struct dib8000_state *state, u8 seq, u8 autosear
                 dib8000_write_word(state, 37, (3 << 5) | (0 << 4) | (8 - mode));
 
         /* P_dvsy_sync_wait - reuse mode */
-        switch (state->fe.dtv_property_cache.transmission_mode) {
+        switch (state->fe[0]->dtv_property_cache.transmission_mode) {
         case TRANSMISSION_MODE_8K:
                 mode = 256;
                 break;
@@ -1624,15 +1675,15 @@ static void dib8000_set_channel(struct dib8000_state *state, u8 seq, u8 autosear
         }
 
         // ---- ANA_FE ----
-        if (state->fe.dtv_property_cache.isdbt_sb_mode) {
-                if (state->fe.dtv_property_cache.isdbt_partial_reception == 1)  // 3-segments
+        if (state->fe[0]->dtv_property_cache.isdbt_sb_mode) {
+                if (state->fe[0]->dtv_property_cache.isdbt_partial_reception == 1)
                         ana_fe = ana_fe_coeff_3seg;
                 else            // 1-segment
                         ana_fe = ana_fe_coeff_1seg;
         } else
                 ana_fe = ana_fe_coeff_13seg;
 
-        if (state->fe.dtv_property_cache.isdbt_sb_mode == 1 || state->isdbt_cfg_loaded == 0)
+        if (state->fe[0]->dtv_property_cache.isdbt_sb_mode == 1 || state->isdbt_cfg_loaded == 0)
                 for (mode = 0; mode < 24; mode++)
                         dib8000_write_word(state, 117 + mode, ana_fe[mode]);
 
@@ -1648,11 +1699,11 @@ static void dib8000_set_channel(struct dib8000_state *state, u8 seq, u8 autosear
         // "P_cspu_left_edge"  not used => do not care
         // "P_cspu_right_edge" not used => do not care
 
-        if (state->fe.dtv_property_cache.isdbt_sb_mode == 1) {  // ISDB-Tsb
+        if (state->fe[0]->dtv_property_cache.isdbt_sb_mode == 1) {
                 dib8000_write_word(state, 228, 1);      // P_2d_mode_byp=1
                 dib8000_write_word(state, 205, dib8000_read_word(state, 205) & 0xfff0); // P_cspu_win_cut = 0
-                if (state->fe.dtv_property_cache.isdbt_partial_reception == 0   // 1-segment
-                    && state->fe.dtv_property_cache.transmission_mode == TRANSMISSION_MODE_2K) {
+                if (state->fe[0]->dtv_property_cache.isdbt_partial_reception == 0
+                        && state->fe[0]->dtv_property_cache.transmission_mode == TRANSMISSION_MODE_2K) {
                         //dib8000_write_word(state, 219, dib8000_read_word(state, 219) & 0xfffe); // P_adp_pass = 0
                         dib8000_write_word(state, 265, 15);     // P_equal_noise_sel = 15
                 }
@@ -1664,7 +1715,7 @@ static void dib8000_set_channel(struct dib8000_state *state, u8 seq, u8 autosear
         // ---- TMCC ----
         for (i = 0; i < 3; i++)
                 tmcc_pow +=
-                    (((state->fe.dtv_property_cache.layer[i].modulation == DQPSK) * 4 + 1) * state->fe.dtv_property_cache.layer[i].segment_count);
+                        (((state->fe[0]->dtv_property_cache.layer[i].modulation == DQPSK) * 4 + 1) * state->fe[0]->dtv_property_cache.layer[i].segment_count);
         // Quantif of "P_tmcc_dec_thres_?k" is (0, 5+mode, 9);
         // Threshold is set at 1/4 of max power.
         tmcc_pow *= (1 << (9 - 2));
@@ -1678,7 +1729,7 @@ static void dib8000_set_channel(struct dib8000_state *state, u8 seq, u8 autosear
         if (state->isdbt_cfg_loaded == 0)
                 dib8000_write_word(state, 250, 3285);   /*p_2d_hspeed_thr0 */
 
-        if (state->fe.dtv_property_cache.isdbt_sb_mode == 1)
+        if (state->fe[0]->dtv_property_cache.isdbt_sb_mode == 1)
                 state->isdbt_cfg_loaded = 0;
         else
                 state->isdbt_cfg_loaded = 1;
@@ -1693,38 +1744,38 @@ static int dib8000_autosearch_start(struct dvb_frontend *fe)
 
         int slist = 0;
 
-        state->fe.dtv_property_cache.inversion = 0;
-        if (!state->fe.dtv_property_cache.isdbt_sb_mode)
-                state->fe.dtv_property_cache.layer[0].segment_count = 13;
-        state->fe.dtv_property_cache.layer[0].modulation = QAM_64;
-        state->fe.dtv_property_cache.layer[0].fec = FEC_2_3;
-        state->fe.dtv_property_cache.layer[0].interleaving = 0;
+        state->fe[0]->dtv_property_cache.inversion = 0;
+        if (!state->fe[0]->dtv_property_cache.isdbt_sb_mode)
+                state->fe[0]->dtv_property_cache.layer[0].segment_count = 13;
+        state->fe[0]->dtv_property_cache.layer[0].modulation = QAM_64;
+        state->fe[0]->dtv_property_cache.layer[0].fec = FEC_2_3;
+        state->fe[0]->dtv_property_cache.layer[0].interleaving = 0;
 
         //choose the right list, in sb, always do everything
-        if (state->fe.dtv_property_cache.isdbt_sb_mode) {
-                state->fe.dtv_property_cache.transmission_mode = TRANSMISSION_MODE_8K;
-                state->fe.dtv_property_cache.guard_interval = GUARD_INTERVAL_1_8;
+        if (state->fe[0]->dtv_property_cache.isdbt_sb_mode) {
+                state->fe[0]->dtv_property_cache.transmission_mode = TRANSMISSION_MODE_8K;
+                state->fe[0]->dtv_property_cache.guard_interval = GUARD_INTERVAL_1_8;
                 slist = 7;
                 dib8000_write_word(state, 0, (dib8000_read_word(state, 0) & 0x9fff) | (1 << 13));
         } else {
-                if (state->fe.dtv_property_cache.guard_interval == GUARD_INTERVAL_AUTO) {
-                        if (state->fe.dtv_property_cache.transmission_mode == TRANSMISSION_MODE_AUTO) {
+                if (state->fe[0]->dtv_property_cache.guard_interval == GUARD_INTERVAL_AUTO) {
+                        if (state->fe[0]->dtv_property_cache.transmission_mode == TRANSMISSION_MODE_AUTO) {
                                 slist = 7;
                                 dib8000_write_word(state, 0, (dib8000_read_word(state, 0) & 0x9fff) | (1 << 13));       // P_mode = 1 to have autosearch start ok with mode2
                         } else
                                 slist = 3;
                 } else {
-                        if (state->fe.dtv_property_cache.transmission_mode == TRANSMISSION_MODE_AUTO) {
+                        if (state->fe[0]->dtv_property_cache.transmission_mode == TRANSMISSION_MODE_AUTO) {
                                 slist = 2;
                                 dib8000_write_word(state, 0, (dib8000_read_word(state, 0) & 0x9fff) | (1 << 13));       // P_mode = 1
                         } else
                                 slist = 0;
                 }
 
-                if (state->fe.dtv_property_cache.transmission_mode == TRANSMISSION_MODE_AUTO)
-                        state->fe.dtv_property_cache.transmission_mode = TRANSMISSION_MODE_8K;
-                if (state->fe.dtv_property_cache.guard_interval == GUARD_INTERVAL_AUTO)
-                        state->fe.dtv_property_cache.guard_interval = GUARD_INTERVAL_1_8;
+                if (state->fe[0]->dtv_property_cache.transmission_mode == TRANSMISSION_MODE_AUTO)
+                        state->fe[0]->dtv_property_cache.transmission_mode = TRANSMISSION_MODE_8K;
+                if (state->fe[0]->dtv_property_cache.guard_interval == GUARD_INTERVAL_AUTO)
+                        state->fe[0]->dtv_property_cache.guard_interval = GUARD_INTERVAL_1_8;
 
                 dprintk("using list for autosearch : %d", slist);
                 dib8000_set_channel(state, (unsigned char)slist, 1);
@@ -1786,7 +1837,7 @@ static int dib8000_tune(struct dvb_frontend *fe)
         if (state == NULL)
                 return -EINVAL;
 
-        dib8000_set_bandwidth(state, state->fe.dtv_property_cache.bandwidth_hz / 1000);
+        dib8000_set_bandwidth(fe, state->fe[0]->dtv_property_cache.bandwidth_hz / 1000);
         dib8000_set_channel(state, 0, 0);
 
         // restart demod
@@ -1799,17 +1850,16 @@ static int dib8000_tune(struct dvb_frontend *fe)
 
         // never achieved a lock before - wait for timfreq to update
         if (state->timf == 0) {
-                if (state->fe.dtv_property_cache.isdbt_sb_mode == 1) {
-                        if (state->fe.dtv_property_cache.isdbt_partial_reception == 0)  // Sound Broadcasting mode 1 seg
+                if (state->fe[0]->dtv_property_cache.isdbt_sb_mode == 1) {
+                        if (state->fe[0]->dtv_property_cache.isdbt_partial_reception == 0)
                                 msleep(300);
                         else    // Sound Broadcasting mode 3 seg
                                 msleep(500);
                 } else          // 13 seg
                         msleep(200);
         }
-        //dump_reg(state);
-        if (state->fe.dtv_property_cache.isdbt_sb_mode == 1) {
-                if (state->fe.dtv_property_cache.isdbt_partial_reception == 0) {        // Sound Broadcasting mode 1 seg
+        if (state->fe[0]->dtv_property_cache.isdbt_sb_mode == 1) {
+                if (state->fe[0]->dtv_property_cache.isdbt_partial_reception == 0) {
 
                         /* P_timf_alpha = (13-P_mode) , P_corm_alpha=6, P_corm_thres=0x40  alpha to check on board */
                         dib8000_write_word(state, 32, ((13 - mode) << 12) | (6 << 8) | 0x40);
@@ -1854,26 +1904,38 @@ static int dib8000_tune(struct dvb_frontend *fe)
 static int dib8000_wakeup(struct dvb_frontend *fe)
 {
         struct dib8000_state *state = fe->demodulator_priv;
+        u8 index_frontend;
+        int ret;
 
         dib8000_set_power_mode(state, DIB8000M_POWER_ALL);
         dib8000_set_adc_state(state, DIBX000_ADC_ON);
         if (dib8000_set_adc_state(state, DIBX000_SLOW_ADC_ON) != 0)
                 dprintk("could not start Slow ADC");
 
+        for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++) {
+                ret = state->fe[index_frontend]->ops.init(state->fe[index_frontend]);
+                if (ret < 0)
+                        return ret;
+        }
+
         return 0;
 }
 
 static int dib8000_sleep(struct dvb_frontend *fe)
 {
-        struct dib8000_state *st = fe->demodulator_priv;
-        if (1) {
-                dib8000_set_output_mode(st, OUTMODE_HIGH_Z);
-                dib8000_set_power_mode(st, DIB8000M_POWER_INTERFACE_ONLY);
-                return dib8000_set_adc_state(st, DIBX000_SLOW_ADC_OFF) | dib8000_set_adc_state(st, DIBX000_ADC_OFF);
-        } else {
+        struct dib8000_state *state = fe->demodulator_priv;
+        u8 index_frontend;
+        int ret;
 
-                return 0;
+        for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++) {
+                ret = state->fe[index_frontend]->ops.sleep(state->fe[index_frontend]);
+                if (ret < 0)
+                        return ret;
         }
+
+        dib8000_set_output_mode(fe, OUTMODE_HIGH_Z);
+        dib8000_set_power_mode(state, DIB8000M_POWER_INTERFACE_ONLY);
+        return dib8000_set_adc_state(state, DIBX000_SLOW_ADC_OFF) | dib8000_set_adc_state(state, DIBX000_ADC_OFF);
 }
 
 enum frontend_tune_state dib8000_get_tune_state(struct dvb_frontend *fe)
@@ -1891,16 +1953,40 @@ int dib8000_set_tune_state(struct dvb_frontend *fe, enum frontend_tune_state tun
 }
 EXPORT_SYMBOL(dib8000_set_tune_state);
 
-
-
-
 static int dib8000_get_frontend(struct dvb_frontend *fe, struct dvb_frontend_parameters *fep)
 {
         struct dib8000_state *state = fe->demodulator_priv;
         u16 i, val = 0;
+        fe_status_t stat;
+        u8 index_frontend, sub_index_frontend;
 
         fe->dtv_property_cache.bandwidth_hz = 6000000;
 
+        for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++) {
+                state->fe[index_frontend]->ops.read_status(state->fe[index_frontend], &stat);
+                if (stat&FE_HAS_SYNC) {
+                        dprintk("TMCC lock on the slave%i", index_frontend);
+                        /* synchronize the cache with the other frontends */
+                        state->fe[index_frontend]->ops.get_frontend(state->fe[index_frontend], fep);
+                        for (sub_index_frontend = 0; (sub_index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[sub_index_frontend] != NULL); sub_index_frontend++) {
+                                if (sub_index_frontend != index_frontend) {
+                                        state->fe[sub_index_frontend]->dtv_property_cache.isdbt_sb_mode = state->fe[index_frontend]->dtv_property_cache.isdbt_sb_mode;
+                                        state->fe[sub_index_frontend]->dtv_property_cache.inversion = state->fe[index_frontend]->dtv_property_cache.inversion;
+                                        state->fe[sub_index_frontend]->dtv_property_cache.transmission_mode = state->fe[index_frontend]->dtv_property_cache.transmission_mode;
+                                        state->fe[sub_index_frontend]->dtv_property_cache.guard_interval = state->fe[index_frontend]->dtv_property_cache.guard_interval;
+                                        state->fe[sub_index_frontend]->dtv_property_cache.isdbt_partial_reception = state->fe[index_frontend]->dtv_property_cache.isdbt_partial_reception;
+                                        for (i = 0; i < 3; i++) {
+                                                state->fe[sub_index_frontend]->dtv_property_cache.layer[i].segment_count = state->fe[index_frontend]->dtv_property_cache.layer[i].segment_count;
+                                                state->fe[sub_index_frontend]->dtv_property_cache.layer[i].interleaving = state->fe[index_frontend]->dtv_property_cache.layer[i].interleaving;
+                                                state->fe[sub_index_frontend]->dtv_property_cache.layer[i].fec = state->fe[index_frontend]->dtv_property_cache.layer[i].fec;
+                                                state->fe[sub_index_frontend]->dtv_property_cache.layer[i].modulation = state->fe[index_frontend]->dtv_property_cache.layer[i].modulation;
+                                        }
+                                }
+                        }
+                        return 0;
+                }
+        }
+
         fe->dtv_property_cache.isdbt_sb_mode = dib8000_read_word(state, 508) & 0x1;
 
         val = dib8000_read_word(state, 570);
@@ -1992,112 +2078,200 @@ static int dib8000_get_frontend(struct dvb_frontend *fe, struct dvb_frontend_par
                         break;
                 }
         }
+
+        /* synchronize the cache with the other frontends */
+        for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++) {
+                state->fe[index_frontend]->dtv_property_cache.isdbt_sb_mode = fe->dtv_property_cache.isdbt_sb_mode;
+                state->fe[index_frontend]->dtv_property_cache.inversion = fe->dtv_property_cache.inversion;
+                state->fe[index_frontend]->dtv_property_cache.transmission_mode = fe->dtv_property_cache.transmission_mode;
+                state->fe[index_frontend]->dtv_property_cache.guard_interval = fe->dtv_property_cache.guard_interval;
+                state->fe[index_frontend]->dtv_property_cache.isdbt_partial_reception = fe->dtv_property_cache.isdbt_partial_reception;
+                for (i = 0; i < 3; i++) {
+                        state->fe[index_frontend]->dtv_property_cache.layer[i].segment_count = fe->dtv_property_cache.layer[i].segment_count;
+                        state->fe[index_frontend]->dtv_property_cache.layer[i].interleaving = fe->dtv_property_cache.layer[i].interleaving;
+                        state->fe[index_frontend]->dtv_property_cache.layer[i].fec = fe->dtv_property_cache.layer[i].fec;
+                        state->fe[index_frontend]->dtv_property_cache.layer[i].modulation = fe->dtv_property_cache.layer[i].modulation;
+                }
+        }
         return 0;
 }
 
 static int dib8000_set_frontend(struct dvb_frontend *fe, struct dvb_frontend_parameters *fep)
 {
         struct dib8000_state *state = fe->demodulator_priv;
+        u8 nbr_pending, exit_condition, index_frontend;
+        s8 index_frontend_success = -1;
         int time, ret;
+        int  time_slave = FE_CALLBACK_TIME_NEVER;
+
+        if (state->fe[0]->dtv_property_cache.frequency == 0) {
+                dprintk("dib8000: must at least specify frequency ");
+                return 0;
+        }
+
+        if (state->fe[0]->dtv_property_cache.bandwidth_hz == 0) {
+                dprintk("dib8000: no bandwidth specified, set to default ");
+                state->fe[0]->dtv_property_cache.bandwidth_hz = 6000000;
+        }
 
-        fe->dtv_property_cache.delivery_system = SYS_ISDBT;
+        for (index_frontend = 0; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++) {
+                /* synchronization of the cache */
+                state->fe[index_frontend]->dtv_property_cache.delivery_system = SYS_ISDBT;
+                memcpy(&state->fe[index_frontend]->dtv_property_cache, &fe->dtv_property_cache, sizeof(struct dtv_frontend_properties));
 
-        dib8000_set_output_mode(state, OUTMODE_HIGH_Z);
+                dib8000_set_output_mode(state->fe[index_frontend], OUTMODE_HIGH_Z);
+                if (state->fe[index_frontend]->ops.tuner_ops.set_params)
+                        state->fe[index_frontend]->ops.tuner_ops.set_params(state->fe[index_frontend], fep);
 
-        if (fe->ops.tuner_ops.set_params)
-                fe->ops.tuner_ops.set_params(fe, fep);
+                dib8000_set_tune_state(state->fe[index_frontend], CT_AGC_START);
+        }
 
         /* start up the AGC */
-        state->tune_state = CT_AGC_START;
         do {
-                time = dib8000_agc_startup(fe);
+                time = dib8000_agc_startup(state->fe[0]);
+                for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++) {
+                        time_slave = dib8000_agc_startup(state->fe[index_frontend]);
+                        if (time == FE_CALLBACK_TIME_NEVER)
+                                time = time_slave;
+                        else if ((time_slave != FE_CALLBACK_TIME_NEVER) && (time_slave > time))
+                                time = time_slave;
+                }
                 if (time != FE_CALLBACK_TIME_NEVER)
                         msleep(time / 10);
                 else
                         break;
-        } while (state->tune_state != CT_AGC_STOP);
-
-        if (state->fe.dtv_property_cache.frequency == 0) {
-                dprintk("dib8000: must at least specify frequency ");
-                return 0;
-        }
-
-        if (state->fe.dtv_property_cache.bandwidth_hz == 0) {
-                dprintk("dib8000: no bandwidth specified, set to default ");
-                state->fe.dtv_property_cache.bandwidth_hz = 6000000;
-        }
+                exit_condition = 1;
+                for (index_frontend = 0; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++) {
+                        if (dib8000_get_tune_state(state->fe[index_frontend]) != CT_AGC_STOP) {
+                                exit_condition = 0;
+                                break;
+                        }
+                }
+        } while (exit_condition == 0);
+
+        for (index_frontend = 0; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++)
+                dib8000_set_tune_state(state->fe[index_frontend], CT_DEMOD_START);
+
+        if ((state->fe[0]->dtv_property_cache.delivery_system != SYS_ISDBT) ||
+                        (state->fe[0]->dtv_property_cache.inversion == INVERSION_AUTO) ||
+                        (state->fe[0]->dtv_property_cache.transmission_mode == TRANSMISSION_MODE_AUTO) ||
+                        (state->fe[0]->dtv_property_cache.guard_interval == GUARD_INTERVAL_AUTO) ||
+                        (((state->fe[0]->dtv_property_cache.isdbt_layer_enabled & (1 << 0)) != 0) &&
+                         (state->fe[0]->dtv_property_cache.layer[0].segment_count != 0xff) &&
+                         (state->fe[0]->dtv_property_cache.layer[0].segment_count != 0) &&
+                         ((state->fe[0]->dtv_property_cache.layer[0].modulation == QAM_AUTO) ||
+                          (state->fe[0]->dtv_property_cache.layer[0].fec == FEC_AUTO))) ||
+                        (((state->fe[0]->dtv_property_cache.isdbt_layer_enabled & (1 << 1)) != 0) &&
+                         (state->fe[0]->dtv_property_cache.layer[1].segment_count != 0xff) &&
+                         (state->fe[0]->dtv_property_cache.layer[1].segment_count != 0) &&
+                         ((state->fe[0]->dtv_property_cache.layer[1].modulation == QAM_AUTO) ||
+                          (state->fe[0]->dtv_property_cache.layer[1].fec == FEC_AUTO))) ||
+                        (((state->fe[0]->dtv_property_cache.isdbt_layer_enabled & (1 << 2)) != 0) &&
+                         (state->fe[0]->dtv_property_cache.layer[2].segment_count != 0xff) &&
+                         (state->fe[0]->dtv_property_cache.layer[2].segment_count != 0) &&
+                         ((state->fe[0]->dtv_property_cache.layer[2].modulation == QAM_AUTO) ||
+                          (state->fe[0]->dtv_property_cache.layer[2].fec == FEC_AUTO))) ||
+                        (((state->fe[0]->dtv_property_cache.layer[0].segment_count == 0) ||
+                          ((state->fe[0]->dtv_property_cache.isdbt_layer_enabled & (1 << 0)) == 0)) &&
+                         ((state->fe[0]->dtv_property_cache.layer[1].segment_count == 0) ||
+                          ((state->fe[0]->dtv_property_cache.isdbt_layer_enabled & (2 << 0)) == 0)) &&
+                         ((state->fe[0]->dtv_property_cache.layer[2].segment_count == 0) || ((state->fe[0]->dtv_property_cache.isdbt_layer_enabled & (3 << 0)) == 0)))) {
+                int i = 80000;
+                u8 found = 0;
+                u8 tune_failed = 0;
+
+                for (index_frontend = 0; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++) {
+                        dib8000_set_bandwidth(state->fe[index_frontend], fe->dtv_property_cache.bandwidth_hz / 1000);
+                        dib8000_autosearch_start(state->fe[index_frontend]);
+                }
 
-        state->tune_state = CT_DEMOD_START;
-
-        if ((state->fe.dtv_property_cache.delivery_system != SYS_ISDBT) ||
-            (state->fe.dtv_property_cache.inversion == INVERSION_AUTO) ||
-            (state->fe.dtv_property_cache.transmission_mode == TRANSMISSION_MODE_AUTO) ||
-            (state->fe.dtv_property_cache.guard_interval == GUARD_INTERVAL_AUTO) ||
-            (((state->fe.dtv_property_cache.isdbt_layer_enabled & (1 << 0)) != 0) &&
-             (state->fe.dtv_property_cache.layer[0].segment_count != 0xff) &&
-             (state->fe.dtv_property_cache.layer[0].segment_count != 0) &&
-             ((state->fe.dtv_property_cache.layer[0].modulation == QAM_AUTO) ||
-              (state->fe.dtv_property_cache.layer[0].fec == FEC_AUTO))) ||
-            (((state->fe.dtv_property_cache.isdbt_layer_enabled & (1 << 1)) != 0) &&
-             (state->fe.dtv_property_cache.layer[1].segment_count != 0xff) &&
-             (state->fe.dtv_property_cache.layer[1].segment_count != 0) &&
-             ((state->fe.dtv_property_cache.layer[1].modulation == QAM_AUTO) ||
-              (state->fe.dtv_property_cache.layer[1].fec == FEC_AUTO))) ||
-            (((state->fe.dtv_property_cache.isdbt_layer_enabled & (1 << 2)) != 0) &&
-             (state->fe.dtv_property_cache.layer[2].segment_count != 0xff) &&
-             (state->fe.dtv_property_cache.layer[2].segment_count != 0) &&
-             ((state->fe.dtv_property_cache.layer[2].modulation == QAM_AUTO) ||
-              (state->fe.dtv_property_cache.layer[2].fec == FEC_AUTO))) ||
-            (((state->fe.dtv_property_cache.layer[0].segment_count == 0) ||
-              ((state->fe.dtv_property_cache.isdbt_layer_enabled & (1 << 0)) == 0)) &&
-             ((state->fe.dtv_property_cache.layer[1].segment_count == 0) ||
-              ((state->fe.dtv_property_cache.isdbt_layer_enabled & (2 << 0)) == 0)) &&
-             ((state->fe.dtv_property_cache.layer[2].segment_count == 0) || ((state->fe.dtv_property_cache.isdbt_layer_enabled & (3 << 0)) == 0)))) {
-                int i = 800, found;
-
-                dib8000_set_bandwidth(state, fe->dtv_property_cache.bandwidth_hz / 1000);
-                dib8000_autosearch_start(fe);
                 do {
-                        msleep(10);
-                        found = dib8000_autosearch_irq(fe);
-                } while (found == 0 && i--);
+                        msleep(20);
+                        nbr_pending = 0;
+                        exit_condition = 0; /* 0: tune pending; 1: tune failed; 2:tune success */
+                        for (index_frontend = 0; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++) {
+                                if (((tune_failed >> index_frontend) & 0x1) == 0) {
+                                        found = dib8000_autosearch_irq(state->fe[index_frontend]);
+                                        switch (found) {
+                                        case 0: /* tune pending */
+                                                 nbr_pending++;
+                                                 break;
+                                        case 2:
+                                                 dprintk("autosearch succeed on the frontend%i", index_frontend);
+                                                 exit_condition = 2;
+                                                 index_frontend_success = index_frontend;
+                                                 break;
+                                        default:
+                                                 dprintk("unhandled autosearch result");
+                                        case 1:
+                                                 dprintk("autosearch failed for the frontend%i", index_frontend);
+                                                 break;
+                                        }
+                                }
+                        }
 
-                dprintk("Frequency %d Hz, autosearch returns: %d", fep->frequency, found);
+                        /* if all tune are done and no success, exit: tune failed */
+                        if ((nbr_pending == 0) && (exit_condition == 0))
+                                exit_condition = 1;
+                } while ((exit_condition == 0) && i--);
 
-                if (found == 0 || found == 1)
-                        return 0;       // no channel found
+                if (exit_condition == 1) { /* tune failed */
+                        dprintk("tune failed");
+                        return 0;
+                }
+
+                dprintk("tune success on frontend%i", index_frontend_success);
 
                 dib8000_get_frontend(fe, fep);
         }
 
-        ret = dib8000_tune(fe);
+        for (index_frontend = 0, ret = 0; (ret >= 0) && (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++)
+                ret = dib8000_tune(state->fe[index_frontend]);
+
+        /* set output mode and diversity input */
+        dib8000_set_output_mode(state->fe[0], state->cfg.output_mode);
+        for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++) {
+                dib8000_set_output_mode(state->fe[index_frontend], OUTMODE_DIVERSITY);
+                dib8000_set_diversity_in(state->fe[index_frontend-1], 1);
+        }
 
-        /* make this a config parameter */
-        dib8000_set_output_mode(state, state->cfg.output_mode);
+        /* turn off the diversity of the last chip */
+        dib8000_set_diversity_in(state->fe[index_frontend-1], 0);
 
         return ret;
 }
 
+static u16 dib8000_read_lock(struct dvb_frontend *fe)
+{
+        struct dib8000_state *state = fe->demodulator_priv;
+
+        return dib8000_read_word(state, 568);
+}
+
 static int dib8000_read_status(struct dvb_frontend *fe, fe_status_t * stat)
 {
         struct dib8000_state *state = fe->demodulator_priv;
-        u16 lock = dib8000_read_word(state, 568);
+        u16 lock_slave = 0, lock = dib8000_read_word(state, 568);
+        u8 index_frontend;
+
+        for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++)
+                lock_slave |= dib8000_read_lock(state->fe[index_frontend]);
 
         *stat = 0;
 
-        if ((lock >> 13) & 1)
+        if (((lock >> 13) & 1) || ((lock_slave >> 13) & 1))
                 *stat |= FE_HAS_SIGNAL;
 
-        if ((lock >> 8) & 1) /* Equal */
+        if (((lock >> 8) & 1) || ((lock_slave >> 8) & 1)) /* Equal */
                 *stat |= FE_HAS_CARRIER;
 
-        if (((lock >> 1) & 0xf) == 0xf) /* TMCC_SYNC */
+        if ((((lock >> 1) & 0xf) == 0xf) || (((lock_slave >> 1) & 0xf) == 0xf)) /* TMCC_SYNC */
                 *stat |= FE_HAS_SYNC;
 
-        if (((lock >> 12) & 1) && ((lock >> 5) & 7)) /* FEC MPEG */
+        if ((((lock >> 12) & 1) || ((lock_slave >> 12) & 1)) && ((lock >> 5) & 7)) /* FEC MPEG */
                 *stat |= FE_HAS_LOCK;
 
-        if ((lock >> 12) & 1) {
+        if (((lock >> 12) & 1) || ((lock_slave >> 12) & 1)) {
                 lock = dib8000_read_word(state, 554); /* Viterbi Layer A */
                 if (lock & 0x01)
                         *stat |= FE_HAS_VITERBI;
@@ -2131,50 +2305,138 @@ static int dib8000_read_unc_blocks(struct dvb_frontend *fe, u32 * unc)
 static int dib8000_read_signal_strength(struct dvb_frontend *fe, u16 * strength)
 {
         struct dib8000_state *state = fe->demodulator_priv;
-        u16 val = dib8000_read_word(state, 390);
-        *strength = 65535 - val;
+        u8 index_frontend;
+        u16 val;
+
+        *strength = 0;
+        for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++) {
+                state->fe[index_frontend]->ops.read_signal_strength(state->fe[index_frontend], &val);
+                if (val > 65535 - *strength)
+                        *strength = 65535;
+                else
+                        *strength += val;
+        }
+
+        val = 65535 - dib8000_read_word(state, 390);
+        if (val > 65535 - *strength)
+                *strength = 65535;
+        else
+                *strength += val;
         return 0;
 }
 
-static int dib8000_read_snr(struct dvb_frontend *fe, u16 * snr)
+static u32 dib8000_get_snr(struct dvb_frontend *fe)
 {
         struct dib8000_state *state = fe->demodulator_priv;
+        u32 n, s, exp;
         u16 val;
-        s32 signal_mant, signal_exp, noise_mant, noise_exp;
-        u32 result = 0;
 
         val = dib8000_read_word(state, 542);
-        noise_mant = (val >> 6) & 0xff;
-        noise_exp = (val & 0x3f);
+        n = (val >> 6) & 0xff;
+        exp = (val & 0x3f);
+        if ((exp & 0x20) != 0)
+                exp -= 0x40;
+        n <<= exp+16;
 
         val = dib8000_read_word(state, 543);
-        signal_mant = (val >> 6) & 0xff;
-        signal_exp = (val & 0x3f);
+        s = (val >> 6) & 0xff;
+        exp = (val & 0x3f);
+        if ((exp & 0x20) != 0)
+                exp -= 0x40;
+        s <<= exp+16;
+
+        if (n > 0) {
+                u32 t = (s/n) << 16;
+                return t + ((s << 16) - n*t) / n;
+        }
+        return 0xffffffff;
+}
+
+static int dib8000_read_snr(struct dvb_frontend *fe, u16 * snr)
+{
+        struct dib8000_state *state = fe->demodulator_priv;
+        u8 index_frontend;
+        u32 snr_master;
 
-        if ((noise_exp & 0x20) != 0)
-                noise_exp -= 0x40;
-        if ((signal_exp & 0x20) != 0)
-                signal_exp -= 0x40;
+        snr_master = dib8000_get_snr(fe);
+        for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++)
+                snr_master += dib8000_get_snr(state->fe[index_frontend]);
 
-        if (signal_mant != 0)
-                result = intlog10(2) * 10 * signal_exp + 10 * intlog10(signal_mant);
-        else
-                result = intlog10(2) * 10 * signal_exp - 100;
-        if (noise_mant != 0)
-                result -= intlog10(2) * 10 * noise_exp + 10 * intlog10(noise_mant);
+        if (snr_master != 0) {
+                snr_master = 10*intlog10(snr_master>>16);
+                *snr = snr_master / ((1 << 24) / 10);
+        }
         else
-                result -= intlog10(2) * 10 * noise_exp - 100;
+                *snr = 0;
 
-        *snr = result / ((1 << 24) / 10);
         return 0;
 }
 
+int dib8000_set_slave_frontend(struct dvb_frontend *fe, struct dvb_frontend *fe_slave)
+{
+        struct dib8000_state *state = fe->demodulator_priv;
+        u8 index_frontend = 1;
+
+        while ((index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL))
+                index_frontend++;
+        if (index_frontend < MAX_NUMBER_OF_FRONTENDS) {
+                dprintk("set slave fe %p to index %i", fe_slave, index_frontend);
+                state->fe[index_frontend] = fe_slave;
+                return 0;
+        }
+
+        dprintk("too many slave frontend");
+        return -ENOMEM;
+}
+EXPORT_SYMBOL(dib8000_set_slave_frontend);
+
+int dib8000_remove_slave_frontend(struct dvb_frontend *fe)
+{
+        struct dib8000_state *state = fe->demodulator_priv;
+        u8 index_frontend = 1;
+
+        while ((index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL))
+                index_frontend++;
+        if (index_frontend != 1) {
+                dprintk("remove slave fe %p (index %i)", state->fe[index_frontend-1], index_frontend-1);
+                state->fe[index_frontend] = NULL;
+                return 0;
+        }
+
+        dprintk("no frontend to be removed");
+        return -ENODEV;
+}
+EXPORT_SYMBOL(dib8000_remove_slave_frontend);
+
+struct dvb_frontend *dib8000_get_slave_frontend(struct dvb_frontend *fe, int slave_index)
+{
+        struct dib8000_state *state = fe->demodulator_priv;
+
+        if (slave_index >= MAX_NUMBER_OF_FRONTENDS)
+                return NULL;
+        return state->fe[slave_index];
+}
+EXPORT_SYMBOL(dib8000_get_slave_frontend);
+
+
 int dib8000_i2c_enumeration(struct i2c_adapter *host, int no_of_demods, u8 default_addr, u8 first_addr)
 {
-        int k = 0;
+        int k = 0, ret = 0;
         u8 new_addr = 0;
         struct i2c_device client = {.adap = host };
 
+        client.i2c_write_buffer = kzalloc(4 * sizeof(u8), GFP_KERNEL);
+        if (!client.i2c_write_buffer) {
+                dprintk("%s: not enough memory", __func__);
+                return -ENOMEM;
+        }
+        client.i2c_read_buffer = kzalloc(4 * sizeof(u8), GFP_KERNEL);
+        if (!client.i2c_read_buffer) {
+                dprintk("%s: not enough memory", __func__);
+                ret = -ENOMEM;
+                goto error_memory;
+        }
+
         for (k = no_of_demods - 1; k >= 0; k--) {
                 /* designated i2c address */
                 new_addr = first_addr + (k << 1);
@@ -2186,7 +2448,8 @@ int dib8000_i2c_enumeration(struct i2c_adapter *host, int no_of_demods, u8 defau
                         client.addr = default_addr;
                         if (dib8000_identify(&client) == 0) {
                                 dprintk("#%d: not identified", k);
-                                return -EINVAL;
+                                ret  = -EINVAL;
+                                goto error;
                         }
                 }
 
@@ -2212,7 +2475,12 @@ int dib8000_i2c_enumeration(struct i2c_adapter *host, int no_of_demods, u8 defau
                 dib8000_i2c_write16(&client, 1286, 0);
         }
 
-        return 0;
+error:
+        kfree(client.i2c_read_buffer);
+error_memory:
+        kfree(client.i2c_write_buffer);
+
+        return ret;
 }
 
 EXPORT_SYMBOL(dib8000_i2c_enumeration);
@@ -2227,7 +2495,13 @@ static int dib8000_fe_get_tune_settings(struct dvb_frontend *fe, struct dvb_fron
 static void dib8000_release(struct dvb_frontend *fe)
 {
         struct dib8000_state *st = fe->demodulator_priv;
+        u8 index_frontend;
+
+        for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (st->fe[index_frontend] != NULL); index_frontend++)
+                dvb_frontend_detach(st->fe[index_frontend]);
+
         dibx000_exit_i2c_master(&st->i2c_master);
+        kfree(st->fe[0]);
         kfree(st);
 }
 
@@ -2242,19 +2516,19 @@ EXPORT_SYMBOL(dib8000_get_i2c_master);
 int dib8000_pid_filter_ctrl(struct dvb_frontend *fe, u8 onoff)
 {
         struct dib8000_state *st = fe->demodulator_priv;
-    u16 val = dib8000_read_word(st, 299) & 0xffef;
-    val |= (onoff & 0x1) << 4;
+        u16 val = dib8000_read_word(st, 299) & 0xffef;
+        val |= (onoff & 0x1) << 4;
 
-    dprintk("pid filter enabled %d", onoff);
-    return dib8000_write_word(st, 299, val);
+        dprintk("pid filter enabled %d", onoff);
+        return dib8000_write_word(st, 299, val);
 }
 EXPORT_SYMBOL(dib8000_pid_filter_ctrl);
 
 int dib8000_pid_filter(struct dvb_frontend *fe, u8 id, u16 pid, u8 onoff)
 {
         struct dib8000_state *st = fe->demodulator_priv;
-    dprintk("Index %x, PID %d, OnOff %d", id, pid, onoff);
-    return dib8000_write_word(st, 305 + id, onoff ? (1 << 13) | pid : 0);
+        dprintk("Index %x, PID %d, OnOff %d", id, pid, onoff);
+        return dib8000_write_word(st, 305 + id, onoff ? (1 << 13) | pid : 0);
 }
 EXPORT_SYMBOL(dib8000_pid_filter);
 
@@ -2298,10 +2572,15 @@ struct dvb_frontend *dib8000_attach(struct i2c_adapter *i2c_adap, u8 i2c_addr, s
         state = kzalloc(sizeof(struct dib8000_state), GFP_KERNEL);
         if (state == NULL)
                 return NULL;
+        fe = kzalloc(sizeof(struct dvb_frontend), GFP_KERNEL);
+        if (fe == NULL)
+                goto error;
 
         memcpy(&state->cfg, cfg, sizeof(struct dib8000_config));
         state->i2c.adap = i2c_adap;
         state->i2c.addr = i2c_addr;
+        state->i2c.i2c_write_buffer = state->i2c_write_buffer;
+        state->i2c.i2c_read_buffer = state->i2c_read_buffer;
         state->gpio_val = cfg->gpio_val;
         state->gpio_dir = cfg->gpio_dir;
 
@@ -2311,9 +2590,9 @@ struct dvb_frontend *dib8000_attach(struct i2c_adapter *i2c_adap, u8 i2c_addr, s
         if ((state->cfg.output_mode != OUTMODE_MPEG2_SERIAL) && (state->cfg.output_mode != OUTMODE_MPEG2_PAR_GATED_CLK))
                 state->cfg.output_mode = OUTMODE_MPEG2_FIFO;
 
-        fe = &state->fe;
+        state->fe[0] = fe;
         fe->demodulator_priv = state;
-        memcpy(&state->fe.ops, &dib8000_ops, sizeof(struct dvb_frontend_ops));
+        memcpy(&state->fe[0]->ops, &dib8000_ops, sizeof(struct dvb_frontend_ops));
 
         state->timf_default = cfg->pll->timf;
 
diff --git a/drivers/media/dvb/frontends/dib8000.h b/drivers/media/dvb/frontends/dib8000.h
index e0a9ded11df4..617f9eba3a09 100644
--- a/drivers/media/dvb/frontends/dib8000.h
+++ b/drivers/media/dvb/frontends/dib8000.h
@@ -50,6 +50,9 @@ extern int dib8000_set_tune_state(struct dvb_frontend *fe, enum frontend_tune_st
 extern enum frontend_tune_state dib8000_get_tune_state(struct dvb_frontend *fe);
 extern void dib8000_pwm_agc_reset(struct dvb_frontend *fe);
 extern s32 dib8000_get_adc_power(struct dvb_frontend *fe, u8 mode);
+extern int dib8000_set_slave_frontend(struct dvb_frontend *fe, struct dvb_frontend *fe_slave);
+extern int dib8000_remove_slave_frontend(struct dvb_frontend *fe);
+extern struct dvb_frontend *dib8000_get_slave_frontend(struct dvb_frontend *fe, int slave_index);
 #else
 static inline struct dvb_frontend *dib8000_attach(struct i2c_adapter *i2c_adap, u8 i2c_addr, struct dib8000_config *cfg)
 {
@@ -111,6 +114,23 @@ static inline s32 dib8000_get_adc_power(struct dvb_frontend *fe, u8 mode)
         printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
         return 0;
 }
+static inline int dib8000_set_slave_frontend(struct dvb_frontend *fe, struct dvb_frontend *fe_slave)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return -ENODEV;
+}
+
+int dib8000_remove_slave_frontend(struct dvb_frontend *fe)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return -ENODEV;
+}
+
+static inline struct dvb_frontend *dib8000_get_slave_frontend(struct dvb_frontend *fe, int slave_index)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return NULL;
+}
 #endif
 
 #endif
diff --git a/drivers/media/dvb/frontends/dib9000.c b/drivers/media/dvb/frontends/dib9000.c
new file mode 100644
index 000000000000..a0855883b5ce
--- /dev/null
+++ b/drivers/media/dvb/frontends/dib9000.c
@@ -0,0 +1,2403 @@
+/*
+ * Linux-DVB Driver for DiBcom's DiB9000 and demodulator-family.
+ *
+ * Copyright (C) 2005-10 DiBcom (http://www.dibcom.fr/)
+ *
+ * This program is free software; you can redistribute it and/or
+ *      modify it under the terms of the GNU General Public License as
+ *      published by the Free Software Foundation, version 2.
+ */
+#include <linux/kernel.h>
+#include <linux/i2c.h>
+#include <linux/mutex.h>
+
+#include "dvb_math.h"
+#include "dvb_frontend.h"
+
+#include "dib9000.h"
+#include "dibx000_common.h"
+
+static int debug;
+module_param(debug, int, 0644);
+MODULE_PARM_DESC(debug, "turn on debugging (default: 0)");
+
+#define dprintk(args...) do { if (debug) { printk(KERN_DEBUG "DiB9000: "); printk(args); printk("\n"); } } while (0)
+#define MAX_NUMBER_OF_FRONTENDS 6
+
+struct i2c_device {
+        struct i2c_adapter *i2c_adap;
+        u8 i2c_addr;
+        u8 *i2c_read_buffer;
+        u8 *i2c_write_buffer;
+};
+
+/* lock */
+#define DIB_LOCK struct mutex
+#define DibAcquireLock(lock) do { if (mutex_lock_interruptible(lock) < 0) dprintk("could not get the lock"); } while (0)
+#define DibReleaseLock(lock) mutex_unlock(lock)
+#define DibInitLock(lock) mutex_init(lock)
+#define DibFreeLock(lock)
+
+struct dib9000_state {
+        struct i2c_device i2c;
+
+        struct dibx000_i2c_master i2c_master;
+        struct i2c_adapter tuner_adap;
+        struct i2c_adapter component_bus;
+
+        u16 revision;
+        u8 reg_offs;
+
+        enum frontend_tune_state tune_state;
+        u32 status;
+        struct dvb_frontend_parametersContext channel_status;
+
+        u8 fe_id;
+
+#define DIB9000_GPIO_DEFAULT_DIRECTIONS 0xffff
+        u16 gpio_dir;
+#define DIB9000_GPIO_DEFAULT_VALUES     0x0000
+        u16 gpio_val;
+#define DIB9000_GPIO_DEFAULT_PWM_POS    0xffff
+        u16 gpio_pwm_pos;
+
+        union {                 /* common for all chips */
+                struct {
+                        u8 mobile_mode:1;
+                } host;
+
+                struct {
+                        struct dib9000_fe_memory_map {
+                                u16 addr;
+                                u16 size;
+                        } fe_mm[18];
+                        u8 memcmd;
+
+                        DIB_LOCK mbx_if_lock;   /* to protect read/write operations */
+                        DIB_LOCK mbx_lock;      /* to protect the whole mailbox handling */
+
+                        DIB_LOCK mem_lock;      /* to protect the memory accesses */
+                        DIB_LOCK mem_mbx_lock;  /* to protect the memory-based mailbox */
+
+#define MBX_MAX_WORDS (256 - 200 - 2)
+#define DIB9000_MSG_CACHE_SIZE 2
+                        u16 message_cache[DIB9000_MSG_CACHE_SIZE][MBX_MAX_WORDS];
+                        u8 fw_is_running;
+                } risc;
+        } platform;
+
+        union {                 /* common for all platforms */
+                struct {
+                        struct dib9000_config cfg;
+                } d9;
+        } chip;
+
+        struct dvb_frontend *fe[MAX_NUMBER_OF_FRONTENDS];
+        u16 component_bus_speed;
+
+        /* for the I2C transfer */
+        struct i2c_msg msg[2];
+        u8 i2c_write_buffer[255];
+        u8 i2c_read_buffer[255];
+};
+
+static const u32 fe_info[44] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0
+};
+
+enum dib9000_power_mode {
+        DIB9000_POWER_ALL = 0,
+
+        DIB9000_POWER_NO,
+        DIB9000_POWER_INTERF_ANALOG_AGC,
+        DIB9000_POWER_COR4_DINTLV_ICIRM_EQUAL_CFROD,
+        DIB9000_POWER_COR4_CRY_ESRAM_MOUT_NUD,
+        DIB9000_POWER_INTERFACE_ONLY,
+};
+
+enum dib9000_out_messages {
+        OUT_MSG_HBM_ACK,
+        OUT_MSG_HOST_BUF_FAIL,
+        OUT_MSG_REQ_VERSION,
+        OUT_MSG_BRIDGE_I2C_W,
+        OUT_MSG_BRIDGE_I2C_R,
+        OUT_MSG_BRIDGE_APB_W,
+        OUT_MSG_BRIDGE_APB_R,
+        OUT_MSG_SCAN_CHANNEL,
+        OUT_MSG_MONIT_DEMOD,
+        OUT_MSG_CONF_GPIO,
+        OUT_MSG_DEBUG_HELP,
+        OUT_MSG_SUBBAND_SEL,
+        OUT_MSG_ENABLE_TIME_SLICE,
+        OUT_MSG_FE_FW_DL,
+        OUT_MSG_FE_CHANNEL_SEARCH,
+        OUT_MSG_FE_CHANNEL_TUNE,
+        OUT_MSG_FE_SLEEP,
+        OUT_MSG_FE_SYNC,
+        OUT_MSG_CTL_MONIT,
+
+        OUT_MSG_CONF_SVC,
+        OUT_MSG_SET_HBM,
+        OUT_MSG_INIT_DEMOD,
+        OUT_MSG_ENABLE_DIVERSITY,
+        OUT_MSG_SET_OUTPUT_MODE,
+        OUT_MSG_SET_PRIORITARY_CHANNEL,
+        OUT_MSG_ACK_FRG,
+        OUT_MSG_INIT_PMU,
+};
+
+enum dib9000_in_messages {
+        IN_MSG_DATA,
+        IN_MSG_FRAME_INFO,
+        IN_MSG_CTL_MONIT,
+        IN_MSG_ACK_FREE_ITEM,
+        IN_MSG_DEBUG_BUF,
+        IN_MSG_MPE_MONITOR,
+        IN_MSG_RAWTS_MONITOR,
+        IN_MSG_END_BRIDGE_I2C_RW,
+        IN_MSG_END_BRIDGE_APB_RW,
+        IN_MSG_VERSION,
+        IN_MSG_END_OF_SCAN,
+        IN_MSG_MONIT_DEMOD,
+        IN_MSG_ERROR,
+        IN_MSG_FE_FW_DL_DONE,
+        IN_MSG_EVENT,
+        IN_MSG_ACK_CHANGE_SVC,
+        IN_MSG_HBM_PROF,
+};
+
+/* memory_access requests */
+#define FE_MM_W_CHANNEL                   0
+#define FE_MM_W_FE_INFO                   1
+#define FE_MM_RW_SYNC                     2
+
+#define FE_SYNC_CHANNEL          1
+#define FE_SYNC_W_GENERIC_MONIT  2
+#define FE_SYNC_COMPONENT_ACCESS 3
+
+#define FE_MM_R_CHANNEL_SEARCH_STATE      3
+#define FE_MM_R_CHANNEL_UNION_CONTEXT     4
+#define FE_MM_R_FE_INFO                   5
+#define FE_MM_R_FE_MONITOR                6
+
+#define FE_MM_W_CHANNEL_HEAD              7
+#define FE_MM_W_CHANNEL_UNION             8
+#define FE_MM_W_CHANNEL_CONTEXT           9
+#define FE_MM_R_CHANNEL_UNION            10
+#define FE_MM_R_CHANNEL_CONTEXT          11
+#define FE_MM_R_CHANNEL_TUNE_STATE       12
+
+#define FE_MM_R_GENERIC_MONITORING_SIZE  13
+#define FE_MM_W_GENERIC_MONITORING           14
+#define FE_MM_R_GENERIC_MONITORING           15
+
+#define FE_MM_W_COMPONENT_ACCESS         16
+#define FE_MM_RW_COMPONENT_ACCESS_BUFFER 17
+static int dib9000_risc_apb_access_read(struct dib9000_state *state, u32 address, u16 attribute, const u8 * tx, u32 txlen, u8 * b, u32 len);
+static int dib9000_risc_apb_access_write(struct dib9000_state *state, u32 address, u16 attribute, const u8 * b, u32 len);
+
+static u16 to_fw_output_mode(u16 mode)
+{
+        switch (mode) {
+        case OUTMODE_HIGH_Z:
+                return 0;
+        case OUTMODE_MPEG2_PAR_GATED_CLK:
+                return 4;
+        case OUTMODE_MPEG2_PAR_CONT_CLK:
+                return 8;
+        case OUTMODE_MPEG2_SERIAL:
+                return 16;
+        case OUTMODE_DIVERSITY:
+                return 128;
+        case OUTMODE_MPEG2_FIFO:
+                return 2;
+        case OUTMODE_ANALOG_ADC:
+                return 1;
+        default:
+                return 0;
+        }
+}
+
+static u16 dib9000_read16_attr(struct dib9000_state *state, u16 reg, u8 * b, u32 len, u16 attribute)
+{
+        u32 chunk_size = 126;
+        u32 l;
+        int ret;
+
+        if (state->platform.risc.fw_is_running && (reg < 1024))
+                return dib9000_risc_apb_access_read(state, reg, attribute, NULL, 0, b, len);
+
+        memset(state->msg, 0, 2 * sizeof(struct i2c_msg));
+        state->msg[0].addr = state->i2c.i2c_addr >> 1;
+        state->msg[0].flags = 0;
+        state->msg[0].buf = state->i2c_write_buffer;
+        state->msg[0].len = 2;
+        state->msg[1].addr = state->i2c.i2c_addr >> 1;
+        state->msg[1].flags = I2C_M_RD;
+        state->msg[1].buf = b;
+        state->msg[1].len = len;
+
+        state->i2c_write_buffer[0] = reg >> 8;
+        state->i2c_write_buffer[1] = reg & 0xff;
+
+        if (attribute & DATA_BUS_ACCESS_MODE_8BIT)
+                state->i2c_write_buffer[0] |= (1 << 5);
+        if (attribute & DATA_BUS_ACCESS_MODE_NO_ADDRESS_INCREMENT)
+                state->i2c_write_buffer[0] |= (1 << 4);
+
+        do {
+                l = len < chunk_size ? len : chunk_size;
+                state->msg[1].len = l;
+                state->msg[1].buf = b;
+                ret = i2c_transfer(state->i2c.i2c_adap, state->msg, 2) != 2 ? -EREMOTEIO : 0;
+                if (ret != 0) {
+                        dprintk("i2c read error on %d", reg);
+                        return -EREMOTEIO;
+                }
+
+                b += l;
+                len -= l;
+
+                if (!(attribute & DATA_BUS_ACCESS_MODE_NO_ADDRESS_INCREMENT))
+                        reg += l / 2;
+        } while ((ret == 0) && len);
+
+        return 0;
+}
+
+static u16 dib9000_i2c_read16(struct i2c_device *i2c, u16 reg)
+{
+        struct i2c_msg msg[2] = {
+                {.addr = i2c->i2c_addr >> 1, .flags = 0,
+                        .buf = i2c->i2c_write_buffer, .len = 2},
+                {.addr = i2c->i2c_addr >> 1, .flags = I2C_M_RD,
+                        .buf = i2c->i2c_read_buffer, .len = 2},
+        };
+
+        i2c->i2c_write_buffer[0] = reg >> 8;
+        i2c->i2c_write_buffer[1] = reg & 0xff;
+
+        if (i2c_transfer(i2c->i2c_adap, msg, 2) != 2) {
+                dprintk("read register %x error", reg);
+                return 0;
+        }
+
+        return (i2c->i2c_read_buffer[0] << 8) | i2c->i2c_read_buffer[1];
+}
+
+static inline u16 dib9000_read_word(struct dib9000_state *state, u16 reg)
+{
+        if (dib9000_read16_attr(state, reg, state->i2c_read_buffer, 2, 0) != 0)
+                return 0;
+        return (state->i2c_read_buffer[0] << 8) | state->i2c_read_buffer[1];
+}
+
+static inline u16 dib9000_read_word_attr(struct dib9000_state *state, u16 reg, u16 attribute)
+{
+        if (dib9000_read16_attr(state, reg, state->i2c_read_buffer, 2,
+                                attribute) != 0)
+                return 0;
+        return (state->i2c_read_buffer[0] << 8) | state->i2c_read_buffer[1];
+}
+
+#define dib9000_read16_noinc_attr(state, reg, b, len, attribute) dib9000_read16_attr(state, reg, b, len, (attribute) | DATA_BUS_ACCESS_MODE_NO_ADDRESS_INCREMENT)
+
+static u16 dib9000_write16_attr(struct dib9000_state *state, u16 reg, const u8 * buf, u32 len, u16 attribute)
+{
+        u32 chunk_size = 126;
+        u32 l;
+        int ret;
+
+        if (state->platform.risc.fw_is_running && (reg < 1024)) {
+                if (dib9000_risc_apb_access_write
+                    (state, reg, DATA_BUS_ACCESS_MODE_16BIT | DATA_BUS_ACCESS_MODE_NO_ADDRESS_INCREMENT | attribute, buf, len) != 0)
+                        return -EINVAL;
+                return 0;
+        }
+
+        memset(&state->msg[0], 0, sizeof(struct i2c_msg));
+        state->msg[0].addr = state->i2c.i2c_addr >> 1;
+        state->msg[0].flags = 0;
+        state->msg[0].buf = state->i2c_write_buffer;
+        state->msg[0].len = len + 2;
+
+        state->i2c_write_buffer[0] = (reg >> 8) & 0xff;
+        state->i2c_write_buffer[1] = (reg) & 0xff;
+
+        if (attribute & DATA_BUS_ACCESS_MODE_8BIT)
+                state->i2c_write_buffer[0] |= (1 << 5);
+        if (attribute & DATA_BUS_ACCESS_MODE_NO_ADDRESS_INCREMENT)
+                state->i2c_write_buffer[0] |= (1 << 4);
+
+        do {
+                l = len < chunk_size ? len : chunk_size;
+                state->msg[0].len = l + 2;
+                memcpy(&state->i2c_write_buffer[2], buf, l);
+
+                ret = i2c_transfer(state->i2c.i2c_adap, state->msg, 1) != 1 ? -EREMOTEIO : 0;
+
+                buf += l;
+                len -= l;
+
+                if (!(attribute & DATA_BUS_ACCESS_MODE_NO_ADDRESS_INCREMENT))
+                        reg += l / 2;
+        } while ((ret == 0) && len);
+
+        return ret;
+}
+
+static int dib9000_i2c_write16(struct i2c_device *i2c, u16 reg, u16 val)
+{
+        struct i2c_msg msg = {
+                .addr = i2c->i2c_addr >> 1, .flags = 0,
+                .buf = i2c->i2c_write_buffer, .len = 4
+        };
+
+        i2c->i2c_write_buffer[0] = (reg >> 8) & 0xff;
+        i2c->i2c_write_buffer[1] = reg & 0xff;
+        i2c->i2c_write_buffer[2] = (val >> 8) & 0xff;
+        i2c->i2c_write_buffer[3] = val & 0xff;
+
+        return i2c_transfer(i2c->i2c_adap, &msg, 1) != 1 ? -EREMOTEIO : 0;
+}
+
+static inline int dib9000_write_word(struct dib9000_state *state, u16 reg, u16 val)
+{
+        u8 b[2] = { val >> 8, val & 0xff };
+        return dib9000_write16_attr(state, reg, b, 2, 0);
+}
+
+static inline int dib9000_write_word_attr(struct dib9000_state *state, u16 reg, u16 val, u16 attribute)
+{
+        u8 b[2] = { val >> 8, val & 0xff };
+        return dib9000_write16_attr(state, reg, b, 2, attribute);
+}
+
+#define dib9000_write(state, reg, buf, len) dib9000_write16_attr(state, reg, buf, len, 0)
+#define dib9000_write16_noinc(state, reg, buf, len) dib9000_write16_attr(state, reg, buf, len, DATA_BUS_ACCESS_MODE_NO_ADDRESS_INCREMENT)
+#define dib9000_write16_noinc_attr(state, reg, buf, len, attribute) dib9000_write16_attr(state, reg, buf, len, DATA_BUS_ACCESS_MODE_NO_ADDRESS_INCREMENT | (attribute))
+
+#define dib9000_mbx_send(state, id, data, len) dib9000_mbx_send_attr(state, id, data, len, 0)
+#define dib9000_mbx_get_message(state, id, msg, len) dib9000_mbx_get_message_attr(state, id, msg, len, 0)
+
+#define MAC_IRQ      (1 << 1)
+#define IRQ_POL_MSK  (1 << 4)
+
+#define dib9000_risc_mem_read_chunks(state, b, len) dib9000_read16_attr(state, 1063, b, len, DATA_BUS_ACCESS_MODE_8BIT | DATA_BUS_ACCESS_MODE_NO_ADDRESS_INCREMENT)
+#define dib9000_risc_mem_write_chunks(state, buf, len) dib9000_write16_attr(state, 1063, buf, len, DATA_BUS_ACCESS_MODE_8BIT | DATA_BUS_ACCESS_MODE_NO_ADDRESS_INCREMENT)
+
+static void dib9000_risc_mem_setup_cmd(struct dib9000_state *state, u32 addr, u32 len, u8 reading)
+{
+        u8 b[14] = { 0 };
+
+/*      dprintk("%d memcmd: %d %d %d\n", state->fe_id, addr, addr+len, len); */
+/*      b[0] = 0 << 7; */
+        b[1] = 1;
+
+/*      b[2] = 0; */
+/*      b[3] = 0; */
+        b[4] = (u8) (addr >> 8);
+        b[5] = (u8) (addr & 0xff);
+
+/*      b[10] = 0; */
+/*      b[11] = 0; */
+        b[12] = (u8) (addr >> 8);
+        b[13] = (u8) (addr & 0xff);
+
+        addr += len;
+/*      b[6] = 0; */
+/*      b[7] = 0; */
+        b[8] = (u8) (addr >> 8);
+        b[9] = (u8) (addr & 0xff);
+
+        dib9000_write(state, 1056, b, 14);
+        if (reading)
+                dib9000_write_word(state, 1056, (1 << 15) | 1);
+        state->platform.risc.memcmd = -1;       /* if it was called directly reset it - to force a future setup-call to set it */
+}
+
+static void dib9000_risc_mem_setup(struct dib9000_state *state, u8 cmd)
+{
+        struct dib9000_fe_memory_map *m = &state->platform.risc.fe_mm[cmd & 0x7f];
+        /* decide whether we need to "refresh" the memory controller */
+        if (state->platform.risc.memcmd == cmd &&       /* same command */
+            !(cmd & 0x80 && m->size < 67))      /* and we do not want to read something with less than 67 bytes looping - working around a bug in the memory controller */
+                return;
+        dib9000_risc_mem_setup_cmd(state, m->addr, m->size, cmd & 0x80);
+        state->platform.risc.memcmd = cmd;
+}
+
+static int dib9000_risc_mem_read(struct dib9000_state *state, u8 cmd, u8 * b, u16 len)
+{
+        if (!state->platform.risc.fw_is_running)
+                return -EIO;
+
+        DibAcquireLock(&state->platform.risc.mem_lock);
+        dib9000_risc_mem_setup(state, cmd | 0x80);
+        dib9000_risc_mem_read_chunks(state, b, len);
+        DibReleaseLock(&state->platform.risc.mem_lock);
+        return 0;
+}
+
+static int dib9000_risc_mem_write(struct dib9000_state *state, u8 cmd, const u8 * b)
+{
+        struct dib9000_fe_memory_map *m = &state->platform.risc.fe_mm[cmd];
+        if (!state->platform.risc.fw_is_running)
+                return -EIO;
+
+        DibAcquireLock(&state->platform.risc.mem_lock);
+        dib9000_risc_mem_setup(state, cmd);
+        dib9000_risc_mem_write_chunks(state, b, m->size);
+        DibReleaseLock(&state->platform.risc.mem_lock);
+        return 0;
+}
+
+static int dib9000_firmware_download(struct dib9000_state *state, u8 risc_id, u16 key, const u8 * code, u32 len)
+{
+        u16 offs;
+
+        if (risc_id == 1)
+                offs = 16;
+        else
+                offs = 0;
+
+        /* config crtl reg */
+        dib9000_write_word(state, 1024 + offs, 0x000f);
+        dib9000_write_word(state, 1025 + offs, 0);
+        dib9000_write_word(state, 1031 + offs, key);
+
+        dprintk("going to download %dB of microcode", len);
+        if (dib9000_write16_noinc(state, 1026 + offs, (u8 *) code, (u16) len) != 0) {
+                dprintk("error while downloading microcode for RISC %c", 'A' + risc_id);
+                return -EIO;
+        }
+
+        dprintk("Microcode for RISC %c loaded", 'A' + risc_id);
+
+        return 0;
+}
+
+static int dib9000_mbx_host_init(struct dib9000_state *state, u8 risc_id)
+{
+        u16 mbox_offs;
+        u16 reset_reg;
+        u16 tries = 1000;
+
+        if (risc_id == 1)
+                mbox_offs = 16;
+        else
+                mbox_offs = 0;
+
+        /* Reset mailbox  */
+        dib9000_write_word(state, 1027 + mbox_offs, 0x8000);
+
+        /* Read reset status */
+        do {
+                reset_reg = dib9000_read_word(state, 1027 + mbox_offs);
+                msleep(100);
+        } while ((reset_reg & 0x8000) && --tries);
+
+        if (reset_reg & 0x8000) {
+                dprintk("MBX: init ERROR, no response from RISC %c", 'A' + risc_id);
+                return -EIO;
+        }
+        dprintk("MBX: initialized");
+        return 0;
+}
+
+#define MAX_MAILBOX_TRY 100
+static int dib9000_mbx_send_attr(struct dib9000_state *state, u8 id, u16 * data, u8 len, u16 attr)
+{
+        u8 *d, b[2];
+        u16 tmp;
+        u16 size;
+        u32 i;
+        int ret = 0;
+
+        if (!state->platform.risc.fw_is_running)
+                return -EINVAL;
+
+        DibAcquireLock(&state->platform.risc.mbx_if_lock);
+        tmp = MAX_MAILBOX_TRY;
+        do {
+                size = dib9000_read_word_attr(state, 1043, attr) & 0xff;
+                if ((size + len + 1) > MBX_MAX_WORDS && --tmp) {
+                        dprintk("MBX: RISC mbx full, retrying");
+                        msleep(100);
+                } else
+                        break;
+        } while (1);
+
+        /*dprintk( "MBX: size: %d", size); */
+
+        if (tmp == 0) {
+                ret = -EINVAL;
+                goto out;
+        }
+#ifdef DUMP_MSG
+        dprintk("--> %02x %d ", id, len + 1);
+        for (i = 0; i < len; i++)
+                dprintk("%04x ", data[i]);
+        dprintk("\n");
+#endif
+
+        /* byte-order conversion - works on big (where it is not necessary) or little endian */
+        d = (u8 *) data;
+        for (i = 0; i < len; i++) {
+                tmp = data[i];
+                *d++ = tmp >> 8;
+                *d++ = tmp & 0xff;
+        }
+
+        /* write msg */
+        b[0] = id;
+        b[1] = len + 1;
+        if (dib9000_write16_noinc_attr(state, 1045, b, 2, attr) != 0 || dib9000_write16_noinc_attr(state, 1045, (u8 *) data, len * 2, attr) != 0) {
+                ret = -EIO;
+                goto out;
+        }
+
+        /* update register nb_mes_in_RX */
+        ret = (u8) dib9000_write_word_attr(state, 1043, 1 << 14, attr);
+
+out:
+        DibReleaseLock(&state->platform.risc.mbx_if_lock);
+
+        return ret;
+}
+
+static u8 dib9000_mbx_read(struct dib9000_state *state, u16 * data, u8 risc_id, u16 attr)
+{
+#ifdef DUMP_MSG
+        u16 *d = data;
+#endif
+
+        u16 tmp, i;
+        u8 size;
+        u8 mc_base;
+
+        if (!state->platform.risc.fw_is_running)
+                return 0;
+
+        DibAcquireLock(&state->platform.risc.mbx_if_lock);
+        if (risc_id == 1)
+                mc_base = 16;
+        else
+                mc_base = 0;
+
+        /* Length and type in the first word */
+        *data = dib9000_read_word_attr(state, 1029 + mc_base, attr);
+
+        size = *data & 0xff;
+        if (size <= MBX_MAX_WORDS) {
+                data++;
+                size--;         /* Initial word already read */
+
+                dib9000_read16_noinc_attr(state, 1029 + mc_base, (u8 *) data, size * 2, attr);
+
+                /* to word conversion */
+                for (i = 0; i < size; i++) {
+                        tmp = *data;
+                        *data = (tmp >> 8) | (tmp << 8);
+                        data++;
+                }
+
+#ifdef DUMP_MSG
+                dprintk("<-- ");
+                for (i = 0; i < size + 1; i++)
+                        dprintk("%04x ", d[i]);
+                dprintk("\n");
+#endif
+        } else {
+                dprintk("MBX: message is too big for message cache (%d), flushing message", size);
+                size--;         /* Initial word already read */
+                while (size--)
+                        dib9000_read16_noinc_attr(state, 1029 + mc_base, (u8 *) data, 2, attr);
+        }
+        /* Update register nb_mes_in_TX */
+        dib9000_write_word_attr(state, 1028 + mc_base, 1 << 14, attr);
+
+        DibReleaseLock(&state->platform.risc.mbx_if_lock);
+
+        return size + 1;
+}
+
+static int dib9000_risc_debug_buf(struct dib9000_state *state, u16 * data, u8 size)
+{
+        u32 ts = data[1] << 16 | data[0];
+        char *b = (char *)&data[2];
+
+        b[2 * (size - 2) - 1] = '\0';   /* Bullet proof the buffer */
+        if (*b == '~') {
+                b++;
+                dprintk(b);
+        } else
+                dprintk("RISC%d: %d.%04d %s", state->fe_id, ts / 10000, ts % 10000, *b ? b : "<emtpy>");
+        return 1;
+}
+
+static int dib9000_mbx_fetch_to_cache(struct dib9000_state *state, u16 attr)
+{
+        int i;
+        u8 size;
+        u16 *block;
+        /* find a free slot */
+        for (i = 0; i < DIB9000_MSG_CACHE_SIZE; i++) {
+                block = state->platform.risc.message_cache[i];
+                if (*block == 0) {
+                        size = dib9000_mbx_read(state, block, 1, attr);
+
+/*                      dprintk( "MBX: fetched %04x message to cache", *block); */
+
+                        switch (*block >> 8) {
+                        case IN_MSG_DEBUG_BUF:
+                                dib9000_risc_debug_buf(state, block + 1, size); /* debug-messages are going to be printed right away */
+                                *block = 0;     /* free the block */
+                                break;
+#if 0
+                        case IN_MSG_DATA:       /* FE-TRACE */
+                                dib9000_risc_data_process(state, block + 1, size);
+                                *block = 0;
+                                break;
+#endif
+                        default:
+                                break;
+                        }
+
+                        return 1;
+                }
+        }
+        dprintk("MBX: no free cache-slot found for new message...");
+        return -1;
+}
+
+static u8 dib9000_mbx_count(struct dib9000_state *state, u8 risc_id, u16 attr)
+{
+        if (risc_id == 0)
+                return (u8) (dib9000_read_word_attr(state, 1028, attr) >> 10) & 0x1f;   /* 5 bit field */
+        else
+                return (u8) (dib9000_read_word_attr(state, 1044, attr) >> 8) & 0x7f;    /* 7 bit field */
+}
+
+static int dib9000_mbx_process(struct dib9000_state *state, u16 attr)
+{
+        int ret = 0;
+        u16 tmp;
+
+        if (!state->platform.risc.fw_is_running)
+                return -1;
+
+        DibAcquireLock(&state->platform.risc.mbx_lock);
+
+        if (dib9000_mbx_count(state, 1, attr))  /* 1=RiscB */
+                ret = dib9000_mbx_fetch_to_cache(state, attr);
+
+        tmp = dib9000_read_word_attr(state, 1229, attr);        /* Clear the IRQ */
+/*      if (tmp) */
+/*              dprintk( "cleared IRQ: %x", tmp); */
+        DibReleaseLock(&state->platform.risc.mbx_lock);
+
+        return ret;
+}
+
+static int dib9000_mbx_get_message_attr(struct dib9000_state *state, u16 id, u16 * msg, u8 * size, u16 attr)
+{
+        u8 i;
+        u16 *block;
+        u16 timeout = 30;
+
+        *msg = 0;
+        do {
+                /* dib9000_mbx_get_from_cache(); */
+                for (i = 0; i < DIB9000_MSG_CACHE_SIZE; i++) {
+                        block = state->platform.risc.message_cache[i];
+                        if ((*block >> 8) == id) {
+                                *size = (*block & 0xff) - 1;
+                                memcpy(msg, block + 1, (*size) * 2);
+                                *block = 0;     /* free the block */
+                                i = 0;  /* signal that we found a message */
+                                break;
+                        }
+                }
+
+                if (i == 0)
+                        break;
+
+                if (dib9000_mbx_process(state, attr) == -1)     /* try to fetch one message - if any */
+                        return -1;
+
+        } while (--timeout);
+
+        if (timeout == 0) {
+                dprintk("waiting for message %d timed out", id);
+                return -1;
+        }
+
+        return i == 0;
+}
+
+static int dib9000_risc_check_version(struct dib9000_state *state)
+{
+        u8 r[4];
+        u8 size;
+        u16 fw_version = 0;
+
+        if (dib9000_mbx_send(state, OUT_MSG_REQ_VERSION, &fw_version, 1) != 0)
+                return -EIO;
+
+        if (dib9000_mbx_get_message(state, IN_MSG_VERSION, (u16 *) r, &size) < 0)
+                return -EIO;
+
+        fw_version = (r[0] << 8) | r[1];
+        dprintk("RISC: ver: %d.%02d (IC: %d)", fw_version >> 10, fw_version & 0x3ff, (r[2] << 8) | r[3]);
+
+        if ((fw_version >> 10) != 7)
+                return -EINVAL;
+
+        switch (fw_version & 0x3ff) {
+        case 11:
+        case 12:
+        case 14:
+        case 15:
+        case 16:
+        case 17:
+                break;
+        default:
+                dprintk("RISC: invalid firmware version");
+                return -EINVAL;
+        }
+
+        dprintk("RISC: valid firmware version");
+        return 0;
+}
+
+static int dib9000_fw_boot(struct dib9000_state *state, const u8 * codeA, u32 lenA, const u8 * codeB, u32 lenB)
+{
+        /* Reconfig pool mac ram */
+        dib9000_write_word(state, 1225, 0x02);  /* A: 8k C, 4 k D - B: 32k C 6 k D - IRAM 96k */
+        dib9000_write_word(state, 1226, 0x05);
+
+        /* Toggles IP crypto to Host APB interface. */
+        dib9000_write_word(state, 1542, 1);
+
+        /* Set jump and no jump in the dma box */
+        dib9000_write_word(state, 1074, 0);
+        dib9000_write_word(state, 1075, 0);
+
+        /* Set MAC as APB Master. */
+        dib9000_write_word(state, 1237, 0);
+
+        /* Reset the RISCs */
+        if (codeA != NULL)
+                dib9000_write_word(state, 1024, 2);
+        else
+                dib9000_write_word(state, 1024, 15);
+        if (codeB != NULL)
+                dib9000_write_word(state, 1040, 2);
+
+        if (codeA != NULL)
+                dib9000_firmware_download(state, 0, 0x1234, codeA, lenA);
+        if (codeB != NULL)
+                dib9000_firmware_download(state, 1, 0x1234, codeB, lenB);
+
+        /* Run the RISCs */
+        if (codeA != NULL)
+                dib9000_write_word(state, 1024, 0);
+        if (codeB != NULL)
+                dib9000_write_word(state, 1040, 0);
+
+        if (codeA != NULL)
+                if (dib9000_mbx_host_init(state, 0) != 0)
+                        return -EIO;
+        if (codeB != NULL)
+                if (dib9000_mbx_host_init(state, 1) != 0)
+                        return -EIO;
+
+        msleep(100);
+        state->platform.risc.fw_is_running = 1;
+
+        if (dib9000_risc_check_version(state) != 0)
+                return -EINVAL;
+
+        state->platform.risc.memcmd = 0xff;
+        return 0;
+}
+
+static u16 dib9000_identify(struct i2c_device *client)
+{
+        u16 value;
+
+        value = dib9000_i2c_read16(client, 896);
+        if (value != 0x01b3) {
+                dprintk("wrong Vendor ID (0x%x)", value);
+                return 0;
+        }
+
+        value = dib9000_i2c_read16(client, 897);
+        if (value != 0x4000 && value != 0x4001 && value != 0x4002 && value != 0x4003 && value != 0x4004 && value != 0x4005) {
+                dprintk("wrong Device ID (0x%x)", value);
+                return 0;
+        }
+
+        /* protect this driver to be used with 7000PC */
+        if (value == 0x4000 && dib9000_i2c_read16(client, 769) == 0x4000) {
+                dprintk("this driver does not work with DiB7000PC");
+                return 0;
+        }
+
+        switch (value) {
+        case 0x4000:
+                dprintk("found DiB7000MA/PA/MB/PB");
+                break;
+        case 0x4001:
+                dprintk("found DiB7000HC");
+                break;
+        case 0x4002:
+                dprintk("found DiB7000MC");
+                break;
+        case 0x4003:
+                dprintk("found DiB9000A");
+                break;
+        case 0x4004:
+                dprintk("found DiB9000H");
+                break;
+        case 0x4005:
+                dprintk("found DiB9000M");
+                break;
+        }
+
+        return value;
+}
+
+static void dib9000_set_power_mode(struct dib9000_state *state, enum dib9000_power_mode mode)
+{
+        /* by default everything is going to be powered off */
+        u16 reg_903 = 0x3fff, reg_904 = 0xffff, reg_905 = 0xffff, reg_906;
+        u8 offset;
+
+        if (state->revision == 0x4003 || state->revision == 0x4004 || state->revision == 0x4005)
+                offset = 1;
+        else
+                offset = 0;
+
+        reg_906 = dib9000_read_word(state, 906 + offset) | 0x3; /* keep settings for RISC */
+
+        /* now, depending on the requested mode, we power on */
+        switch (mode) {
+                /* power up everything in the demod */
+        case DIB9000_POWER_ALL:
+                reg_903 = 0x0000;
+                reg_904 = 0x0000;
+                reg_905 = 0x0000;
+                reg_906 = 0x0000;
+                break;
+
+                /* just leave power on the control-interfaces: GPIO and (I2C or SDIO or SRAM) */
+        case DIB9000_POWER_INTERFACE_ONLY:      /* TODO power up either SDIO or I2C or SRAM */
+                reg_905 &= ~((1 << 7) | (1 << 6) | (1 << 5) | (1 << 2));
+                break;
+
+        case DIB9000_POWER_INTERF_ANALOG_AGC:
+                reg_903 &= ~((1 << 15) | (1 << 14) | (1 << 11) | (1 << 10));
+                reg_905 &= ~((1 << 7) | (1 << 6) | (1 << 5) | (1 << 4) | (1 << 2));
+                reg_906 &= ~((1 << 0));
+                break;
+
+        case DIB9000_POWER_COR4_DINTLV_ICIRM_EQUAL_CFROD:
+                reg_903 = 0x0000;
+                reg_904 = 0x801f;
+                reg_905 = 0x0000;
+                reg_906 &= ~((1 << 0));
+                break;
+
+        case DIB9000_POWER_COR4_CRY_ESRAM_MOUT_NUD:
+                reg_903 = 0x0000;
+                reg_904 = 0x8000;
+                reg_905 = 0x010b;
+                reg_906 &= ~((1 << 0));
+                break;
+        default:
+        case DIB9000_POWER_NO:
+                break;
+        }
+
+        /* always power down unused parts */
+        if (!state->platform.host.mobile_mode)
+                reg_904 |= (1 << 7) | (1 << 6) | (1 << 4) | (1 << 2) | (1 << 1);
+
+        /* P_sdio_select_clk = 0 on MC and after */
+        if (state->revision != 0x4000)
+                reg_906 <<= 1;
+
+        dib9000_write_word(state, 903 + offset, reg_903);
+        dib9000_write_word(state, 904 + offset, reg_904);
+        dib9000_write_word(state, 905 + offset, reg_905);
+        dib9000_write_word(state, 906 + offset, reg_906);
+}
+
+static int dib9000_fw_reset(struct dvb_frontend *fe)
+{
+        struct dib9000_state *state = fe->demodulator_priv;
+
+        dib9000_write_word(state, 1817, 0x0003);
+
+        dib9000_write_word(state, 1227, 1);
+        dib9000_write_word(state, 1227, 0);
+
+        switch ((state->revision = dib9000_identify(&state->i2c))) {
+        case 0x4003:
+        case 0x4004:
+        case 0x4005:
+                state->reg_offs = 1;
+                break;
+        default:
+                return -EINVAL;
+        }
+
+        /* reset the i2c-master to use the host interface */
+        dibx000_reset_i2c_master(&state->i2c_master);
+
+        dib9000_set_power_mode(state, DIB9000_POWER_ALL);
+
+        /* unforce divstr regardless whether i2c enumeration was done or not */
+        dib9000_write_word(state, 1794, dib9000_read_word(state, 1794) & ~(1 << 1));
+        dib9000_write_word(state, 1796, 0);
+        dib9000_write_word(state, 1805, 0x805);
+
+        /* restart all parts */
+        dib9000_write_word(state, 898, 0xffff);
+        dib9000_write_word(state, 899, 0xffff);
+        dib9000_write_word(state, 900, 0x0001);
+        dib9000_write_word(state, 901, 0xff19);
+        dib9000_write_word(state, 902, 0x003c);
+
+        dib9000_write_word(state, 898, 0);
+        dib9000_write_word(state, 899, 0);
+        dib9000_write_word(state, 900, 0);
+        dib9000_write_word(state, 901, 0);
+        dib9000_write_word(state, 902, 0);
+
+        dib9000_write_word(state, 911, state->chip.d9.cfg.if_drives);
+
+        dib9000_set_power_mode(state, DIB9000_POWER_INTERFACE_ONLY);
+
+        return 0;
+}
+
+static int dib9000_risc_apb_access_read(struct dib9000_state *state, u32 address, u16 attribute, const u8 * tx, u32 txlen, u8 * b, u32 len)
+{
+        u16 mb[10];
+        u8 i, s;
+
+        if (address >= 1024 || !state->platform.risc.fw_is_running)
+                return -EINVAL;
+
+        /* dprintk( "APB access thru rd fw %d %x", address, attribute); */
+
+        mb[0] = (u16) address;
+        mb[1] = len / 2;
+        dib9000_mbx_send_attr(state, OUT_MSG_BRIDGE_APB_R, mb, 2, attribute);
+        switch (dib9000_mbx_get_message_attr(state, IN_MSG_END_BRIDGE_APB_RW, mb, &s, attribute)) {
+        case 1:
+                s--;
+                for (i = 0; i < s; i++) {
+                        b[i * 2] = (mb[i + 1] >> 8) & 0xff;
+                        b[i * 2 + 1] = (mb[i + 1]) & 0xff;
+                }
+                return 0;
+        default:
+                return -EIO;
+        }
+        return -EIO;
+}
+
+static int dib9000_risc_apb_access_write(struct dib9000_state *state, u32 address, u16 attribute, const u8 * b, u32 len)
+{
+        u16 mb[10];
+        u8 s, i;
+
+        if (address >= 1024 || !state->platform.risc.fw_is_running)
+                return -EINVAL;
+
+        /* dprintk( "APB access thru wr fw %d %x", address, attribute); */
+
+        mb[0] = (unsigned short)address;
+        for (i = 0; i < len && i < 20; i += 2)
+                mb[1 + (i / 2)] = (b[i] << 8 | b[i + 1]);
+
+        dib9000_mbx_send_attr(state, OUT_MSG_BRIDGE_APB_W, mb, 1 + len / 2, attribute);
+        return dib9000_mbx_get_message_attr(state, IN_MSG_END_BRIDGE_APB_RW, mb, &s, attribute) == 1 ? 0 : -EINVAL;
+}
+
+static int dib9000_fw_memmbx_sync(struct dib9000_state *state, u8 i)
+{
+        u8 index_loop = 10;
+
+        if (!state->platform.risc.fw_is_running)
+                return 0;
+        dib9000_risc_mem_write(state, FE_MM_RW_SYNC, &i);
+        do {
+                dib9000_risc_mem_read(state, FE_MM_RW_SYNC, state->i2c_read_buffer, 1);
+        } while (state->i2c_read_buffer[0] && index_loop--);
+
+        if (index_loop > 0)
+                return 0;
+        return -EIO;
+}
+
+static int dib9000_fw_init(struct dib9000_state *state)
+{
+        struct dibGPIOFunction *f;
+        u16 b[40] = { 0 };
+        u8 i;
+        u8 size;
+
+        if (dib9000_fw_boot(state, NULL, 0, state->chip.d9.cfg.microcode_B_fe_buffer, state->chip.d9.cfg.microcode_B_fe_size) != 0)
+                return -EIO;
+
+        /* initialize the firmware */
+        for (i = 0; i < ARRAY_SIZE(state->chip.d9.cfg.gpio_function); i++) {
+                f = &state->chip.d9.cfg.gpio_function[i];
+                if (f->mask) {
+                        switch (f->function) {
+                        case BOARD_GPIO_FUNCTION_COMPONENT_ON:
+                                b[0] = (u16) f->mask;
+                                b[1] = (u16) f->direction;
+                                b[2] = (u16) f->value;
+                                break;
+                        case BOARD_GPIO_FUNCTION_COMPONENT_OFF:
+                                b[3] = (u16) f->mask;
+                                b[4] = (u16) f->direction;
+                                b[5] = (u16) f->value;
+                                break;
+                        }
+                }
+        }
+        if (dib9000_mbx_send(state, OUT_MSG_CONF_GPIO, b, 15) != 0)
+                return -EIO;
+
+        /* subband */
+        b[0] = state->chip.d9.cfg.subband.size; /* type == 0 -> GPIO - PWM not yet supported */
+        for (i = 0; i < state->chip.d9.cfg.subband.size; i++) {
+                b[1 + i * 4] = state->chip.d9.cfg.subband.subband[i].f_mhz;
+                b[2 + i * 4] = (u16) state->chip.d9.cfg.subband.subband[i].gpio.mask;
+                b[3 + i * 4] = (u16) state->chip.d9.cfg.subband.subband[i].gpio.direction;
+                b[4 + i * 4] = (u16) state->chip.d9.cfg.subband.subband[i].gpio.value;
+        }
+        b[1 + i * 4] = 0;       /* fe_id */
+        if (dib9000_mbx_send(state, OUT_MSG_SUBBAND_SEL, b, 2 + 4 * i) != 0)
+                return -EIO;
+
+        /* 0 - id, 1 - no_of_frontends */
+        b[0] = (0 << 8) | 1;
+        /* 0 = i2c-address demod, 0 = tuner */
+        b[1] = (0 << 8) | (0);
+        b[2] = (u16) (((state->chip.d9.cfg.xtal_clock_khz * 1000) >> 16) & 0xffff);
+        b[3] = (u16) (((state->chip.d9.cfg.xtal_clock_khz * 1000)) & 0xffff);
+        b[4] = (u16) ((state->chip.d9.cfg.vcxo_timer >> 16) & 0xffff);
+        b[5] = (u16) ((state->chip.d9.cfg.vcxo_timer) & 0xffff);
+        b[6] = (u16) ((state->chip.d9.cfg.timing_frequency >> 16) & 0xffff);
+        b[7] = (u16) ((state->chip.d9.cfg.timing_frequency) & 0xffff);
+        b[29] = state->chip.d9.cfg.if_drives;
+        if (dib9000_mbx_send(state, OUT_MSG_INIT_DEMOD, b, ARRAY_SIZE(b)) != 0)
+                return -EIO;
+
+        if (dib9000_mbx_send(state, OUT_MSG_FE_FW_DL, NULL, 0) != 0)
+                return -EIO;
+
+        if (dib9000_mbx_get_message(state, IN_MSG_FE_FW_DL_DONE, b, &size) < 0)
+                return -EIO;
+
+        if (size > ARRAY_SIZE(b)) {
+                dprintk("error : firmware returned %dbytes needed but the used buffer has only %dbytes\n Firmware init ABORTED", size,
+                        (int)ARRAY_SIZE(b));
+                return -EINVAL;
+        }
+
+        for (i = 0; i < size; i += 2) {
+                state->platform.risc.fe_mm[i / 2].addr = b[i + 0];
+                state->platform.risc.fe_mm[i / 2].size = b[i + 1];
+        }
+
+        return 0;
+}
+
+static void dib9000_fw_set_channel_head(struct dib9000_state *state, struct dvb_frontend_parameters *ch)
+{
+        u8 b[9];
+        u32 freq = state->fe[0]->dtv_property_cache.frequency / 1000;
+        if (state->fe_id % 2)
+                freq += 101;
+
+        b[0] = (u8) ((freq >> 0) & 0xff);
+        b[1] = (u8) ((freq >> 8) & 0xff);
+        b[2] = (u8) ((freq >> 16) & 0xff);
+        b[3] = (u8) ((freq >> 24) & 0xff);
+        b[4] = (u8) ((state->fe[0]->dtv_property_cache.bandwidth_hz / 1000 >> 0) & 0xff);
+        b[5] = (u8) ((state->fe[0]->dtv_property_cache.bandwidth_hz / 1000 >> 8) & 0xff);
+        b[6] = (u8) ((state->fe[0]->dtv_property_cache.bandwidth_hz / 1000 >> 16) & 0xff);
+        b[7] = (u8) ((state->fe[0]->dtv_property_cache.bandwidth_hz / 1000 >> 24) & 0xff);
+        b[8] = 0x80;            /* do not wait for CELL ID when doing autosearch */
+        if (state->fe[0]->dtv_property_cache.delivery_system == SYS_DVBT)
+                b[8] |= 1;
+        dib9000_risc_mem_write(state, FE_MM_W_CHANNEL_HEAD, b);
+}
+
+static int dib9000_fw_get_channel(struct dvb_frontend *fe, struct dvb_frontend_parameters *channel)
+{
+        struct dib9000_state *state = fe->demodulator_priv;
+        struct dibDVBTChannel {
+                s8 spectrum_inversion;
+
+                s8 nfft;
+                s8 guard;
+                s8 constellation;
+
+                s8 hrch;
+                s8 alpha;
+                s8 code_rate_hp;
+                s8 code_rate_lp;
+                s8 select_hp;
+
+                s8 intlv_native;
+        };
+        struct dibDVBTChannel *ch;
+        int ret = 0;
+
+        DibAcquireLock(&state->platform.risc.mem_mbx_lock);
+        if (dib9000_fw_memmbx_sync(state, FE_SYNC_CHANNEL) < 0) {
+                goto error;
+                ret = -EIO;
+        }
+
+        dib9000_risc_mem_read(state, FE_MM_R_CHANNEL_UNION,
+                        state->i2c_read_buffer, sizeof(struct dibDVBTChannel));
+        ch = (struct dibDVBTChannel *)state->i2c_read_buffer;
+
+
+        switch (ch->spectrum_inversion & 0x7) {
+        case 1:
+                state->fe[0]->dtv_property_cache.inversion = INVERSION_ON;
+                break;
+        case 0:
+                state->fe[0]->dtv_property_cache.inversion = INVERSION_OFF;
+                break;
+        default:
+        case -1:
+                state->fe[0]->dtv_property_cache.inversion = INVERSION_AUTO;
+                break;
+        }
+        switch (ch->nfft) {
+        case 0:
+                state->fe[0]->dtv_property_cache.transmission_mode = TRANSMISSION_MODE_2K;
+                break;
+        case 2:
+                state->fe[0]->dtv_property_cache.transmission_mode = TRANSMISSION_MODE_4K;
+                break;
+        case 1:
+                state->fe[0]->dtv_property_cache.transmission_mode = TRANSMISSION_MODE_8K;
+                break;
+        default:
+        case -1:
+                state->fe[0]->dtv_property_cache.transmission_mode = TRANSMISSION_MODE_AUTO;
+                break;
+        }
+        switch (ch->guard) {
+        case 0:
+                state->fe[0]->dtv_property_cache.guard_interval = GUARD_INTERVAL_1_32;
+                break;
+        case 1:
+                state->fe[0]->dtv_property_cache.guard_interval = GUARD_INTERVAL_1_16;
+                break;
+        case 2:
+                state->fe[0]->dtv_property_cache.guard_interval = GUARD_INTERVAL_1_8;
+                break;
+        case 3:
+                state->fe[0]->dtv_property_cache.guard_interval = GUARD_INTERVAL_1_4;
+                break;
+        default:
+        case -1:
+                state->fe[0]->dtv_property_cache.guard_interval = GUARD_INTERVAL_AUTO;
+                break;
+        }
+        switch (ch->constellation) {
+        case 2:
+                state->fe[0]->dtv_property_cache.modulation = QAM_64;
+                break;
+        case 1:
+                state->fe[0]->dtv_property_cache.modulation = QAM_16;
+                break;
+        case 0:
+                state->fe[0]->dtv_property_cache.modulation = QPSK;
+                break;
+        default:
+        case -1:
+                state->fe[0]->dtv_property_cache.modulation = QAM_AUTO;
+                break;
+        }
+        switch (ch->hrch) {
+        case 0:
+                state->fe[0]->dtv_property_cache.hierarchy = HIERARCHY_NONE;
+                break;
+        case 1:
+                state->fe[0]->dtv_property_cache.hierarchy = HIERARCHY_1;
+                break;
+        default:
+        case -1:
+                state->fe[0]->dtv_property_cache.hierarchy = HIERARCHY_AUTO;
+                break;
+        }
+        switch (ch->code_rate_hp) {
+        case 1:
+                state->fe[0]->dtv_property_cache.code_rate_HP = FEC_1_2;
+                break;
+        case 2:
+                state->fe[0]->dtv_property_cache.code_rate_HP = FEC_2_3;
+                break;
+        case 3:
+                state->fe[0]->dtv_property_cache.code_rate_HP = FEC_3_4;
+                break;
+        case 5:
+                state->fe[0]->dtv_property_cache.code_rate_HP = FEC_5_6;
+                break;
+        case 7:
+                state->fe[0]->dtv_property_cache.code_rate_HP = FEC_7_8;
+                break;
+        default:
+        case -1:
+                state->fe[0]->dtv_property_cache.code_rate_HP = FEC_AUTO;
+                break;
+        }
+        switch (ch->code_rate_lp) {
+        case 1:
+                state->fe[0]->dtv_property_cache.code_rate_LP = FEC_1_2;
+                break;
+        case 2:
+                state->fe[0]->dtv_property_cache.code_rate_LP = FEC_2_3;
+                break;
+        case 3:
+                state->fe[0]->dtv_property_cache.code_rate_LP = FEC_3_4;
+                break;
+        case 5:
+                state->fe[0]->dtv_property_cache.code_rate_LP = FEC_5_6;
+                break;
+        case 7:
+                state->fe[0]->dtv_property_cache.code_rate_LP = FEC_7_8;
+                break;
+        default:
+        case -1:
+                state->fe[0]->dtv_property_cache.code_rate_LP = FEC_AUTO;
+                break;
+        }
+
+error:
+        DibReleaseLock(&state->platform.risc.mem_mbx_lock);
+        return ret;
+}
+
+static int dib9000_fw_set_channel_union(struct dvb_frontend *fe, struct dvb_frontend_parameters *channel)
+{
+        struct dib9000_state *state = fe->demodulator_priv;
+        struct dibDVBTChannel {
+                s8 spectrum_inversion;
+
+                s8 nfft;
+                s8 guard;
+                s8 constellation;
+
+                s8 hrch;
+                s8 alpha;
+                s8 code_rate_hp;
+                s8 code_rate_lp;
+                s8 select_hp;
+
+                s8 intlv_native;
+        };
+        struct dibDVBTChannel ch;
+
+        switch (state->fe[0]->dtv_property_cache.inversion) {
+        case INVERSION_ON:
+                ch.spectrum_inversion = 1;
+                break;
+        case INVERSION_OFF:
+                ch.spectrum_inversion = 0;
+                break;
+        default:
+        case INVERSION_AUTO:
+                ch.spectrum_inversion = -1;
+                break;
+        }
+        switch (state->fe[0]->dtv_property_cache.transmission_mode) {
+        case TRANSMISSION_MODE_2K:
+                ch.nfft = 0;
+                break;
+        case TRANSMISSION_MODE_4K:
+                ch.nfft = 2;
+                break;
+        case TRANSMISSION_MODE_8K:
+                ch.nfft = 1;
+                break;
+        default:
+        case TRANSMISSION_MODE_AUTO:
+                ch.nfft = 1;
+                break;
+        }
+        switch (state->fe[0]->dtv_property_cache.guard_interval) {
+        case GUARD_INTERVAL_1_32:
+                ch.guard = 0;
+                break;
+        case GUARD_INTERVAL_1_16:
+                ch.guard = 1;
+                break;
+        case GUARD_INTERVAL_1_8:
+                ch.guard = 2;
+                break;
+        case GUARD_INTERVAL_1_4:
+                ch.guard = 3;
+                break;
+        default:
+        case GUARD_INTERVAL_AUTO:
+                ch.guard = -1;
+                break;
+        }
+        switch (state->fe[0]->dtv_property_cache.modulation) {
+        case QAM_64:
+                ch.constellation = 2;
+                break;
+        case QAM_16:
+                ch.constellation = 1;
+                break;
+        case QPSK:
+                ch.constellation = 0;
+                break;
+        default:
+        case QAM_AUTO:
+                ch.constellation = -1;
+                break;
+        }
+        switch (state->fe[0]->dtv_property_cache.hierarchy) {
+        case HIERARCHY_NONE:
+                ch.hrch = 0;
+                break;
+        case HIERARCHY_1:
+        case HIERARCHY_2:
+        case HIERARCHY_4:
+                ch.hrch = 1;
+                break;
+        default:
+        case HIERARCHY_AUTO:
+                ch.hrch = -1;
+                break;
+        }
+        ch.alpha = 1;
+        switch (state->fe[0]->dtv_property_cache.code_rate_HP) {
+        case FEC_1_2:
+                ch.code_rate_hp = 1;
+                break;
+        case FEC_2_3:
+                ch.code_rate_hp = 2;
+                break;
+        case FEC_3_4:
+                ch.code_rate_hp = 3;
+                break;
+        case FEC_5_6:
+                ch.code_rate_hp = 5;
+                break;
+        case FEC_7_8:
+                ch.code_rate_hp = 7;
+                break;
+        default:
+        case FEC_AUTO:
+                ch.code_rate_hp = -1;
+                break;
+        }
+        switch (state->fe[0]->dtv_property_cache.code_rate_LP) {
+        case FEC_1_2:
+                ch.code_rate_lp = 1;
+                break;
+        case FEC_2_3:
+                ch.code_rate_lp = 2;
+                break;
+        case FEC_3_4:
+                ch.code_rate_lp = 3;
+                break;
+        case FEC_5_6:
+                ch.code_rate_lp = 5;
+                break;
+        case FEC_7_8:
+                ch.code_rate_lp = 7;
+                break;
+        default:
+        case FEC_AUTO:
+                ch.code_rate_lp = -1;
+                break;
+        }
+        ch.select_hp = 1;
+        ch.intlv_native = 1;
+
+        dib9000_risc_mem_write(state, FE_MM_W_CHANNEL_UNION, (u8 *) &ch);
+
+        return 0;
+}
+
+static int dib9000_fw_tune(struct dvb_frontend *fe, struct dvb_frontend_parameters *ch)
+{
+        struct dib9000_state *state = fe->demodulator_priv;
+        int ret = 10, search = state->channel_status.status == CHANNEL_STATUS_PARAMETERS_UNKNOWN;
+        s8 i;
+
+        switch (state->tune_state) {
+        case CT_DEMOD_START:
+                dib9000_fw_set_channel_head(state, ch);
+
+                /* write the channel context - a channel is initialized to 0, so it is OK */
+                dib9000_risc_mem_write(state, FE_MM_W_CHANNEL_CONTEXT, (u8 *) fe_info);
+                dib9000_risc_mem_write(state, FE_MM_W_FE_INFO, (u8 *) fe_info);
+
+                if (search)
+                        dib9000_mbx_send(state, OUT_MSG_FE_CHANNEL_SEARCH, NULL, 0);
+                else {
+                        dib9000_fw_set_channel_union(fe, ch);
+                        dib9000_mbx_send(state, OUT_MSG_FE_CHANNEL_TUNE, NULL, 0);
+                }
+                state->tune_state = CT_DEMOD_STEP_1;
+                break;
+        case CT_DEMOD_STEP_1:
+                if (search)
+                        dib9000_risc_mem_read(state, FE_MM_R_CHANNEL_SEARCH_STATE, state->i2c_read_buffer, 1);
+                else
+                        dib9000_risc_mem_read(state, FE_MM_R_CHANNEL_TUNE_STATE, state->i2c_read_buffer, 1);
+                i = (s8)state->i2c_read_buffer[0];
+                switch (i) {    /* something happened */
+                case 0:
+                        break;
+                case -2:        /* tps locks are "slower" than MPEG locks -> even in autosearch data is OK here */
+                        if (search)
+                                state->status = FE_STATUS_DEMOD_SUCCESS;
+                        else {
+                                state->tune_state = CT_DEMOD_STOP;
+                                state->status = FE_STATUS_LOCKED;
+                        }
+                        break;
+                default:
+                        state->status = FE_STATUS_TUNE_FAILED;
+                        state->tune_state = CT_DEMOD_STOP;
+                        break;
+                }
+                break;
+        default:
+                ret = FE_CALLBACK_TIME_NEVER;
+                break;
+        }
+
+        return ret;
+}
+
+static int dib9000_fw_set_diversity_in(struct dvb_frontend *fe, int onoff)
+{
+        struct dib9000_state *state = fe->demodulator_priv;
+        u16 mode = (u16) onoff;
+        return dib9000_mbx_send(state, OUT_MSG_ENABLE_DIVERSITY, &mode, 1);
+}
+
+static int dib9000_fw_set_output_mode(struct dvb_frontend *fe, int mode)
+{
+        struct dib9000_state *state = fe->demodulator_priv;
+        u16 outreg, smo_mode;
+
+        dprintk("setting output mode for demod %p to %d", fe, mode);
+
+        switch (mode) {
+        case OUTMODE_MPEG2_PAR_GATED_CLK:
+                outreg = (1 << 10);     /* 0x0400 */
+                break;
+        case OUTMODE_MPEG2_PAR_CONT_CLK:
+                outreg = (1 << 10) | (1 << 6);  /* 0x0440 */
+                break;
+        case OUTMODE_MPEG2_SERIAL:
+                outreg = (1 << 10) | (2 << 6) | (0 << 1);       /* 0x0482 */
+                break;
+        case OUTMODE_DIVERSITY:
+                outreg = (1 << 10) | (4 << 6);  /* 0x0500 */
+                break;
+        case OUTMODE_MPEG2_FIFO:
+                outreg = (1 << 10) | (5 << 6);
+                break;
+        case OUTMODE_HIGH_Z:
+                outreg = 0;
+                break;
+        default:
+                dprintk("Unhandled output_mode passed to be set for demod %p", &state->fe[0]);
+                return -EINVAL;
+        }
+
+        dib9000_write_word(state, 1795, outreg);
+
+        switch (mode) {
+        case OUTMODE_MPEG2_PAR_GATED_CLK:
+        case OUTMODE_MPEG2_PAR_CONT_CLK:
+        case OUTMODE_MPEG2_SERIAL:
+        case OUTMODE_MPEG2_FIFO:
+                smo_mode = (dib9000_read_word(state, 295) & 0x0010) | (1 << 1);
+                if (state->chip.d9.cfg.output_mpeg2_in_188_bytes)
+                        smo_mode |= (1 << 5);
+                dib9000_write_word(state, 295, smo_mode);
+                break;
+        }
+
+        outreg = to_fw_output_mode(mode);
+        return dib9000_mbx_send(state, OUT_MSG_SET_OUTPUT_MODE, &outreg, 1);
+}
+
+static int dib9000_tuner_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg msg[], int num)
+{
+        struct dib9000_state *state = i2c_get_adapdata(i2c_adap);
+        u16 i, len, t, index_msg;
+
+        for (index_msg = 0; index_msg < num; index_msg++) {
+                if (msg[index_msg].flags & I2C_M_RD) {  /* read */
+                        len = msg[index_msg].len;
+                        if (len > 16)
+                                len = 16;
+
+                        if (dib9000_read_word(state, 790) != 0)
+                                dprintk("TunerITF: read busy");
+
+                        dib9000_write_word(state, 784, (u16) (msg[index_msg].addr));
+                        dib9000_write_word(state, 787, (len / 2) - 1);
+                        dib9000_write_word(state, 786, 1);      /* start read */
+
+                        i = 1000;
+                        while (dib9000_read_word(state, 790) != (len / 2) && i)
+                                i--;
+
+                        if (i == 0)
+                                dprintk("TunerITF: read failed");
+
+                        for (i = 0; i < len; i += 2) {
+                                t = dib9000_read_word(state, 785);
+                                msg[index_msg].buf[i] = (t >> 8) & 0xff;
+                                msg[index_msg].buf[i + 1] = (t) & 0xff;
+                        }
+                        if (dib9000_read_word(state, 790) != 0)
+                                dprintk("TunerITF: read more data than expected");
+                } else {
+                        i = 1000;
+                        while (dib9000_read_word(state, 789) && i)
+                                i--;
+                        if (i == 0)
+                                dprintk("TunerITF: write busy");
+
+                        len = msg[index_msg].len;
+                        if (len > 16)
+                                len = 16;
+
+                        for (i = 0; i < len; i += 2)
+                                dib9000_write_word(state, 785, (msg[index_msg].buf[i] << 8) | msg[index_msg].buf[i + 1]);
+                        dib9000_write_word(state, 784, (u16) msg[index_msg].addr);
+                        dib9000_write_word(state, 787, (len / 2) - 1);
+                        dib9000_write_word(state, 786, 0);      /* start write */
+
+                        i = 1000;
+                        while (dib9000_read_word(state, 791) > 0 && i)
+                                i--;
+                        if (i == 0)
+                                dprintk("TunerITF: write failed");
+                }
+        }
+        return num;
+}
+
+int dib9000_fw_set_component_bus_speed(struct dvb_frontend *fe, u16 speed)
+{
+        struct dib9000_state *state = fe->demodulator_priv;
+
+        state->component_bus_speed = speed;
+        return 0;
+}
+EXPORT_SYMBOL(dib9000_fw_set_component_bus_speed);
+
+static int dib9000_fw_component_bus_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg msg[], int num)
+{
+        struct dib9000_state *state = i2c_get_adapdata(i2c_adap);
+        u8 type = 0;            /* I2C */
+        u8 port = DIBX000_I2C_INTERFACE_GPIO_3_4;
+        u16 scl = state->component_bus_speed;   /* SCL frequency */
+        struct dib9000_fe_memory_map *m = &state->platform.risc.fe_mm[FE_MM_RW_COMPONENT_ACCESS_BUFFER];
+        u8 p[13] = { 0 };
+
+        p[0] = type;
+        p[1] = port;
+        p[2] = msg[0].addr << 1;
+
+        p[3] = (u8) scl & 0xff; /* scl */
+        p[4] = (u8) (scl >> 8);
+
+        p[7] = 0;
+        p[8] = 0;
+
+        p[9] = (u8) (msg[0].len);
+        p[10] = (u8) (msg[0].len >> 8);
+        if ((num > 1) && (msg[1].flags & I2C_M_RD)) {
+                p[11] = (u8) (msg[1].len);
+                p[12] = (u8) (msg[1].len >> 8);
+        } else {
+                p[11] = 0;
+                p[12] = 0;
+        }
+
+        DibAcquireLock(&state->platform.risc.mem_mbx_lock);
+
+        dib9000_risc_mem_write(state, FE_MM_W_COMPONENT_ACCESS, p);
+
+        {                       /* write-part */
+                dib9000_risc_mem_setup_cmd(state, m->addr, msg[0].len, 0);
+                dib9000_risc_mem_write_chunks(state, msg[0].buf, msg[0].len);
+        }
+
+        /* do the transaction */
+        if (dib9000_fw_memmbx_sync(state, FE_SYNC_COMPONENT_ACCESS) < 0) {
+                DibReleaseLock(&state->platform.risc.mem_mbx_lock);
+                return 0;
+        }
+
+        /* read back any possible result */
+        if ((num > 1) && (msg[1].flags & I2C_M_RD))
+                dib9000_risc_mem_read(state, FE_MM_RW_COMPONENT_ACCESS_BUFFER, msg[1].buf, msg[1].len);
+
+        DibReleaseLock(&state->platform.risc.mem_mbx_lock);
+
+        return num;
+}
+
+static u32 dib9000_i2c_func(struct i2c_adapter *adapter)
+{
+        return I2C_FUNC_I2C;
+}
+
+static struct i2c_algorithm dib9000_tuner_algo = {
+        .master_xfer = dib9000_tuner_xfer,
+        .functionality = dib9000_i2c_func,
+};
+
+static struct i2c_algorithm dib9000_component_bus_algo = {
+        .master_xfer = dib9000_fw_component_bus_xfer,
+        .functionality = dib9000_i2c_func,
+};
+
+struct i2c_adapter *dib9000_get_tuner_interface(struct dvb_frontend *fe)
+{
+        struct dib9000_state *st = fe->demodulator_priv;
+        return &st->tuner_adap;
+}
+EXPORT_SYMBOL(dib9000_get_tuner_interface);
+
+struct i2c_adapter *dib9000_get_component_bus_interface(struct dvb_frontend *fe)
+{
+        struct dib9000_state *st = fe->demodulator_priv;
+        return &st->component_bus;
+}
+EXPORT_SYMBOL(dib9000_get_component_bus_interface);
+
+struct i2c_adapter *dib9000_get_i2c_master(struct dvb_frontend *fe, enum dibx000_i2c_interface intf, int gating)
+{
+        struct dib9000_state *st = fe->demodulator_priv;
+        return dibx000_get_i2c_adapter(&st->i2c_master, intf, gating);
+}
+EXPORT_SYMBOL(dib9000_get_i2c_master);
+
+int dib9000_set_i2c_adapter(struct dvb_frontend *fe, struct i2c_adapter *i2c)
+{
+        struct dib9000_state *st = fe->demodulator_priv;
+
+        st->i2c.i2c_adap = i2c;
+        return 0;
+}
+EXPORT_SYMBOL(dib9000_set_i2c_adapter);
+
+static int dib9000_cfg_gpio(struct dib9000_state *st, u8 num, u8 dir, u8 val)
+{
+        st->gpio_dir = dib9000_read_word(st, 773);
+        st->gpio_dir &= ~(1 << num);    /* reset the direction bit */
+        st->gpio_dir |= (dir & 0x1) << num;     /* set the new direction */
+        dib9000_write_word(st, 773, st->gpio_dir);
+
+        st->gpio_val = dib9000_read_word(st, 774);
+        st->gpio_val &= ~(1 << num);    /* reset the direction bit */
+        st->gpio_val |= (val & 0x01) << num;    /* set the new value */
+        dib9000_write_word(st, 774, st->gpio_val);
+
+        dprintk("gpio dir: %04x: gpio val: %04x", st->gpio_dir, st->gpio_val);
+
+        return 0;
+}
+
+int dib9000_set_gpio(struct dvb_frontend *fe, u8 num, u8 dir, u8 val)
+{
+        struct dib9000_state *state = fe->demodulator_priv;
+        return dib9000_cfg_gpio(state, num, dir, val);
+}
+EXPORT_SYMBOL(dib9000_set_gpio);
+
+int dib9000_fw_pid_filter_ctrl(struct dvb_frontend *fe, u8 onoff)
+{
+        struct dib9000_state *state = fe->demodulator_priv;
+        u16 val = dib9000_read_word(state, 294 + 1) & 0xffef;
+        val |= (onoff & 0x1) << 4;
+
+        dprintk("PID filter enabled %d", onoff);
+        return dib9000_write_word(state, 294 + 1, val);
+}
+EXPORT_SYMBOL(dib9000_fw_pid_filter_ctrl);
+
+int dib9000_fw_pid_filter(struct dvb_frontend *fe, u8 id, u16 pid, u8 onoff)
+{
+        struct dib9000_state *state = fe->demodulator_priv;
+        dprintk("Index %x, PID %d, OnOff %d", id, pid, onoff);
+        return dib9000_write_word(state, 300 + 1 + id, onoff ? (1 << 13) | pid : 0);
+}
+EXPORT_SYMBOL(dib9000_fw_pid_filter);
+
+int dib9000_firmware_post_pll_init(struct dvb_frontend *fe)
+{
+        struct dib9000_state *state = fe->demodulator_priv;
+        return dib9000_fw_init(state);
+}
+EXPORT_SYMBOL(dib9000_firmware_post_pll_init);
+
+static void dib9000_release(struct dvb_frontend *demod)
+{
+        struct dib9000_state *st = demod->demodulator_priv;
+        u8 index_frontend;
+
+        for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (st->fe[index_frontend] != NULL); index_frontend++)
+                dvb_frontend_detach(st->fe[index_frontend]);
+
+        DibFreeLock(&state->platform.risc.mbx_if_lock);
+        DibFreeLock(&state->platform.risc.mbx_lock);
+        DibFreeLock(&state->platform.risc.mem_lock);
+        DibFreeLock(&state->platform.risc.mem_mbx_lock);
+        dibx000_exit_i2c_master(&st->i2c_master);
+
+        i2c_del_adapter(&st->tuner_adap);
+        i2c_del_adapter(&st->component_bus);
+        kfree(st->fe[0]);
+        kfree(st);
+}
+
+static int dib9000_wakeup(struct dvb_frontend *fe)
+{
+        return 0;
+}
+
+static int dib9000_sleep(struct dvb_frontend *fe)
+{
+        struct dib9000_state *state = fe->demodulator_priv;
+        u8 index_frontend;
+        int ret;
+
+        for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++) {
+                ret = state->fe[index_frontend]->ops.sleep(state->fe[index_frontend]);
+                if (ret < 0)
+                        return ret;
+        }
+        return dib9000_mbx_send(state, OUT_MSG_FE_SLEEP, NULL, 0);
+}
+
+static int dib9000_fe_get_tune_settings(struct dvb_frontend *fe, struct dvb_frontend_tune_settings *tune)
+{
+        tune->min_delay_ms = 1000;
+        return 0;
+}
+
+static int dib9000_get_frontend(struct dvb_frontend *fe, struct dvb_frontend_parameters *fep)
+{
+        struct dib9000_state *state = fe->demodulator_priv;
+        u8 index_frontend, sub_index_frontend;
+        fe_status_t stat;
+        int ret;
+
+        for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++) {
+                state->fe[index_frontend]->ops.read_status(state->fe[index_frontend], &stat);
+                if (stat & FE_HAS_SYNC) {
+                        dprintk("TPS lock on the slave%i", index_frontend);
+
+                        /* synchronize the cache with the other frontends */
+                        state->fe[index_frontend]->ops.get_frontend(state->fe[index_frontend], fep);
+                        for (sub_index_frontend = 0; (sub_index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[sub_index_frontend] != NULL);
+                             sub_index_frontend++) {
+                                if (sub_index_frontend != index_frontend) {
+                                        state->fe[sub_index_frontend]->dtv_property_cache.modulation =
+                                            state->fe[index_frontend]->dtv_property_cache.modulation;
+                                        state->fe[sub_index_frontend]->dtv_property_cache.inversion =
+                                            state->fe[index_frontend]->dtv_property_cache.inversion;
+                                        state->fe[sub_index_frontend]->dtv_property_cache.transmission_mode =
+                                            state->fe[index_frontend]->dtv_property_cache.transmission_mode;
+                                        state->fe[sub_index_frontend]->dtv_property_cache.guard_interval =
+                                            state->fe[index_frontend]->dtv_property_cache.guard_interval;
+                                        state->fe[sub_index_frontend]->dtv_property_cache.hierarchy =
+                                            state->fe[index_frontend]->dtv_property_cache.hierarchy;
+                                        state->fe[sub_index_frontend]->dtv_property_cache.code_rate_HP =
+                                            state->fe[index_frontend]->dtv_property_cache.code_rate_HP;
+                                        state->fe[sub_index_frontend]->dtv_property_cache.code_rate_LP =
+                                            state->fe[index_frontend]->dtv_property_cache.code_rate_LP;
+                                        state->fe[sub_index_frontend]->dtv_property_cache.rolloff =
+                                            state->fe[index_frontend]->dtv_property_cache.rolloff;
+                                }
+                        }
+                        return 0;
+                }
+        }
+
+        /* get the channel from master chip */
+        ret = dib9000_fw_get_channel(fe, fep);
+        if (ret != 0)
+                return ret;
+
+        /* synchronize the cache with the other frontends */
+        for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++) {
+                state->fe[index_frontend]->dtv_property_cache.inversion = fe->dtv_property_cache.inversion;
+                state->fe[index_frontend]->dtv_property_cache.transmission_mode = fe->dtv_property_cache.transmission_mode;
+                state->fe[index_frontend]->dtv_property_cache.guard_interval = fe->dtv_property_cache.guard_interval;
+                state->fe[index_frontend]->dtv_property_cache.modulation = fe->dtv_property_cache.modulation;
+                state->fe[index_frontend]->dtv_property_cache.hierarchy = fe->dtv_property_cache.hierarchy;
+                state->fe[index_frontend]->dtv_property_cache.code_rate_HP = fe->dtv_property_cache.code_rate_HP;
+                state->fe[index_frontend]->dtv_property_cache.code_rate_LP = fe->dtv_property_cache.code_rate_LP;
+                state->fe[index_frontend]->dtv_property_cache.rolloff = fe->dtv_property_cache.rolloff;
+        }
+
+        return 0;
+}
+
+static int dib9000_set_tune_state(struct dvb_frontend *fe, enum frontend_tune_state tune_state)
+{
+        struct dib9000_state *state = fe->demodulator_priv;
+        state->tune_state = tune_state;
+        if (tune_state == CT_DEMOD_START)
+                state->status = FE_STATUS_TUNE_PENDING;
+
+        return 0;
+}
+
+static u32 dib9000_get_status(struct dvb_frontend *fe)
+{
+        struct dib9000_state *state = fe->demodulator_priv;
+        return state->status;
+}
+
+static int dib9000_set_channel_status(struct dvb_frontend *fe, struct dvb_frontend_parametersContext *channel_status)
+{
+        struct dib9000_state *state = fe->demodulator_priv;
+
+        memcpy(&state->channel_status, channel_status, sizeof(struct dvb_frontend_parametersContext));
+        return 0;
+}
+
+static int dib9000_set_frontend(struct dvb_frontend *fe, struct dvb_frontend_parameters *fep)
+{
+        struct dib9000_state *state = fe->demodulator_priv;
+        int sleep_time, sleep_time_slave;
+        u32 frontend_status;
+        u8 nbr_pending, exit_condition, index_frontend, index_frontend_success;
+        struct dvb_frontend_parametersContext channel_status;
+
+        /* check that the correct parameters are set */
+        if (state->fe[0]->dtv_property_cache.frequency == 0) {
+                dprintk("dib9000: must specify frequency ");
+                return 0;
+        }
+
+        if (state->fe[0]->dtv_property_cache.bandwidth_hz == 0) {
+                dprintk("dib9000: must specify bandwidth ");
+                return 0;
+        }
+        fe->dtv_property_cache.delivery_system = SYS_DVBT;
+
+        /* set the master status */
+        if (fep->u.ofdm.transmission_mode == TRANSMISSION_MODE_AUTO ||
+            fep->u.ofdm.guard_interval == GUARD_INTERVAL_AUTO || fep->u.ofdm.constellation == QAM_AUTO || fep->u.ofdm.code_rate_HP == FEC_AUTO) {
+                /* no channel specified, autosearch the channel */
+                state->channel_status.status = CHANNEL_STATUS_PARAMETERS_UNKNOWN;
+        } else
+                state->channel_status.status = CHANNEL_STATUS_PARAMETERS_SET;
+
+        /* set mode and status for the different frontends */
+        for (index_frontend = 0; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++) {
+                dib9000_fw_set_diversity_in(state->fe[index_frontend], 1);
+
+                /* synchronization of the cache */
+                memcpy(&state->fe[index_frontend]->dtv_property_cache, &fe->dtv_property_cache, sizeof(struct dtv_frontend_properties));
+
+                state->fe[index_frontend]->dtv_property_cache.delivery_system = SYS_DVBT;
+                dib9000_fw_set_output_mode(state->fe[index_frontend], OUTMODE_HIGH_Z);
+
+                dib9000_set_channel_status(state->fe[index_frontend], &state->channel_status);
+                dib9000_set_tune_state(state->fe[index_frontend], CT_DEMOD_START);
+        }
+
+        /* actual tune */
+        exit_condition = 0;     /* 0: tune pending; 1: tune failed; 2:tune success */
+        index_frontend_success = 0;
+        do {
+                sleep_time = dib9000_fw_tune(state->fe[0], NULL);
+                for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++) {
+                        sleep_time_slave = dib9000_fw_tune(state->fe[index_frontend], NULL);
+                        if (sleep_time == FE_CALLBACK_TIME_NEVER)
+                                sleep_time = sleep_time_slave;
+                        else if ((sleep_time_slave != FE_CALLBACK_TIME_NEVER) && (sleep_time_slave > sleep_time))
+                                sleep_time = sleep_time_slave;
+                }
+                if (sleep_time != FE_CALLBACK_TIME_NEVER)
+                        msleep(sleep_time / 10);
+                else
+                        break;
+
+                nbr_pending = 0;
+                exit_condition = 0;
+                index_frontend_success = 0;
+                for (index_frontend = 0; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++) {
+                        frontend_status = -dib9000_get_status(state->fe[index_frontend]);
+                        if (frontend_status > -FE_STATUS_TUNE_PENDING) {
+                                exit_condition = 2;     /* tune success */
+                                index_frontend_success = index_frontend;
+                                break;
+                        }
+                        if (frontend_status == -FE_STATUS_TUNE_PENDING)
+                                nbr_pending++;  /* some frontends are still tuning */
+                }
+                if ((exit_condition != 2) && (nbr_pending == 0))
+                        exit_condition = 1;     /* if all tune are done and no success, exit: tune failed */
+
+        } while (exit_condition == 0);
+
+        /* check the tune result */
+        if (exit_condition == 1) {      /* tune failed */
+                dprintk("tune failed");
+                return 0;
+        }
+
+        dprintk("tune success on frontend%i", index_frontend_success);
+
+        /* synchronize all the channel cache */
+        dib9000_get_frontend(state->fe[0], fep);
+
+        /* retune the other frontends with the found channel */
+        channel_status.status = CHANNEL_STATUS_PARAMETERS_SET;
+        for (index_frontend = 0; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++) {
+                /* only retune the frontends which was not tuned success */
+                if (index_frontend != index_frontend_success) {
+                        dib9000_set_channel_status(state->fe[index_frontend], &channel_status);
+                        dib9000_set_tune_state(state->fe[index_frontend], CT_DEMOD_START);
+                }
+        }
+        do {
+                sleep_time = FE_CALLBACK_TIME_NEVER;
+                for (index_frontend = 0; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++) {
+                        if (index_frontend != index_frontend_success) {
+                                sleep_time_slave = dib9000_fw_tune(state->fe[index_frontend], NULL);
+                                if (sleep_time == FE_CALLBACK_TIME_NEVER)
+                                        sleep_time = sleep_time_slave;
+                                else if ((sleep_time_slave != FE_CALLBACK_TIME_NEVER) && (sleep_time_slave > sleep_time))
+                                        sleep_time = sleep_time_slave;
+                        }
+                }
+                if (sleep_time != FE_CALLBACK_TIME_NEVER)
+                        msleep(sleep_time / 10);
+                else
+                        break;
+
+                nbr_pending = 0;
+                for (index_frontend = 0; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++) {
+                        if (index_frontend != index_frontend_success) {
+                                frontend_status = -dib9000_get_status(state->fe[index_frontend]);
+                                if ((index_frontend != index_frontend_success) && (frontend_status == -FE_STATUS_TUNE_PENDING))
+                                        nbr_pending++;  /* some frontends are still tuning */
+                        }
+                }
+        } while (nbr_pending != 0);
+
+        /* set the output mode */
+        dib9000_fw_set_output_mode(state->fe[0], state->chip.d9.cfg.output_mode);
+        for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++)
+                dib9000_fw_set_output_mode(state->fe[index_frontend], OUTMODE_DIVERSITY);
+
+        /* turn off the diversity for the last frontend */
+        dib9000_fw_set_diversity_in(state->fe[index_frontend - 1], 0);
+
+        return 0;
+}
+
+static u16 dib9000_read_lock(struct dvb_frontend *fe)
+{
+        struct dib9000_state *state = fe->demodulator_priv;
+
+        return dib9000_read_word(state, 535);
+}
+
+static int dib9000_read_status(struct dvb_frontend *fe, fe_status_t * stat)
+{
+        struct dib9000_state *state = fe->demodulator_priv;
+        u8 index_frontend;
+        u16 lock = 0, lock_slave = 0;
+
+        for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++)
+                lock_slave |= dib9000_read_lock(state->fe[index_frontend]);
+
+        lock = dib9000_read_word(state, 535);
+
+        *stat = 0;
+
+        if ((lock & 0x8000) || (lock_slave & 0x8000))
+                *stat |= FE_HAS_SIGNAL;
+        if ((lock & 0x3000) || (lock_slave & 0x3000))
+                *stat |= FE_HAS_CARRIER;
+        if ((lock & 0x0100) || (lock_slave & 0x0100))
+                *stat |= FE_HAS_VITERBI;
+        if (((lock & 0x0038) == 0x38) || ((lock_slave & 0x0038) == 0x38))
+                *stat |= FE_HAS_SYNC;
+        if ((lock & 0x0008) || (lock_slave & 0x0008))
+                *stat |= FE_HAS_LOCK;
+
+        return 0;
+}
+
+static int dib9000_read_ber(struct dvb_frontend *fe, u32 * ber)
+{
+        struct dib9000_state *state = fe->demodulator_priv;
+        u16 *c;
+
+        DibAcquireLock(&state->platform.risc.mem_mbx_lock);
+        if (dib9000_fw_memmbx_sync(state, FE_SYNC_CHANNEL) < 0)
+                return -EIO;
+        dib9000_risc_mem_read(state, FE_MM_R_FE_MONITOR,
+                        state->i2c_read_buffer, 16 * 2);
+        DibReleaseLock(&state->platform.risc.mem_mbx_lock);
+
+        c = (u16 *)state->i2c_read_buffer;
+
+        *ber = c[10] << 16 | c[11];
+        return 0;
+}
+
+static int dib9000_read_signal_strength(struct dvb_frontend *fe, u16 * strength)
+{
+        struct dib9000_state *state = fe->demodulator_priv;
+        u8 index_frontend;
+        u16 *c = (u16 *)state->i2c_read_buffer;
+        u16 val;
+
+        *strength = 0;
+        for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++) {
+                state->fe[index_frontend]->ops.read_signal_strength(state->fe[index_frontend], &val);
+                if (val > 65535 - *strength)
+                        *strength = 65535;
+                else
+                        *strength += val;
+        }
+
+        DibAcquireLock(&state->platform.risc.mem_mbx_lock);
+        if (dib9000_fw_memmbx_sync(state, FE_SYNC_CHANNEL) < 0)
+                return -EIO;
+        dib9000_risc_mem_read(state, FE_MM_R_FE_MONITOR, (u8 *) c, 16 * 2);
+        DibReleaseLock(&state->platform.risc.mem_mbx_lock);
+
+        val = 65535 - c[4];
+        if (val > 65535 - *strength)
+                *strength = 65535;
+        else
+                *strength += val;
+        return 0;
+}
+
+static u32 dib9000_get_snr(struct dvb_frontend *fe)
+{
+        struct dib9000_state *state = fe->demodulator_priv;
+        u16 *c = (u16 *)state->i2c_read_buffer;
+        u32 n, s, exp;
+        u16 val;
+
+        DibAcquireLock(&state->platform.risc.mem_mbx_lock);
+        if (dib9000_fw_memmbx_sync(state, FE_SYNC_CHANNEL) < 0)
+                return -EIO;
+        dib9000_risc_mem_read(state, FE_MM_R_FE_MONITOR, (u8 *) c, 16 * 2);
+        DibReleaseLock(&state->platform.risc.mem_mbx_lock);
+
+        val = c[7];
+        n = (val >> 4) & 0xff;
+        exp = ((val & 0xf) << 2);
+        val = c[8];
+        exp += ((val >> 14) & 0x3);
+        if ((exp & 0x20) != 0)
+                exp -= 0x40;
+        n <<= exp + 16;
+
+        s = (val >> 6) & 0xFF;
+        exp = (val & 0x3F);
+        if ((exp & 0x20) != 0)
+                exp -= 0x40;
+        s <<= exp + 16;
+
+        if (n > 0) {
+                u32 t = (s / n) << 16;
+                return t + ((s << 16) - n * t) / n;
+        }
+        return 0xffffffff;
+}
+
+static int dib9000_read_snr(struct dvb_frontend *fe, u16 * snr)
+{
+        struct dib9000_state *state = fe->demodulator_priv;
+        u8 index_frontend;
+        u32 snr_master;
+
+        snr_master = dib9000_get_snr(fe);
+        for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL); index_frontend++)
+                snr_master += dib9000_get_snr(state->fe[index_frontend]);
+
+        if ((snr_master >> 16) != 0) {
+                snr_master = 10 * intlog10(snr_master >> 16);
+                *snr = snr_master / ((1 << 24) / 10);
+        } else
+                *snr = 0;
+
+        return 0;
+}
+
+static int dib9000_read_unc_blocks(struct dvb_frontend *fe, u32 * unc)
+{
+        struct dib9000_state *state = fe->demodulator_priv;
+        u16 *c = (u16 *)state->i2c_read_buffer;
+
+        DibAcquireLock(&state->platform.risc.mem_mbx_lock);
+        if (dib9000_fw_memmbx_sync(state, FE_SYNC_CHANNEL) < 0)
+                return -EIO;
+        dib9000_risc_mem_read(state, FE_MM_R_FE_MONITOR, (u8 *) c, 16 * 2);
+        DibReleaseLock(&state->platform.risc.mem_mbx_lock);
+
+        *unc = c[12];
+        return 0;
+}
+
+int dib9000_i2c_enumeration(struct i2c_adapter *i2c, int no_of_demods, u8 default_addr, u8 first_addr)
+{
+        int k = 0, ret = 0;
+        u8 new_addr = 0;
+        struct i2c_device client = {.i2c_adap = i2c };
+
+        client.i2c_write_buffer = kzalloc(4 * sizeof(u8), GFP_KERNEL);
+        if (!client.i2c_write_buffer) {
+                dprintk("%s: not enough memory", __func__);
+                return -ENOMEM;
+        }
+        client.i2c_read_buffer = kzalloc(4 * sizeof(u8), GFP_KERNEL);
+        if (!client.i2c_read_buffer) {
+                dprintk("%s: not enough memory", __func__);
+                ret = -ENOMEM;
+                goto error_memory;
+        }
+
+        client.i2c_addr = default_addr + 16;
+        dib9000_i2c_write16(&client, 1796, 0x0);
+
+        for (k = no_of_demods - 1; k >= 0; k--) {
+                /* designated i2c address */
+                new_addr = first_addr + (k << 1);
+                client.i2c_addr = default_addr;
+
+                dib9000_i2c_write16(&client, 1817, 3);
+                dib9000_i2c_write16(&client, 1796, 0);
+                dib9000_i2c_write16(&client, 1227, 1);
+                dib9000_i2c_write16(&client, 1227, 0);
+
+                client.i2c_addr = new_addr;
+                dib9000_i2c_write16(&client, 1817, 3);
+                dib9000_i2c_write16(&client, 1796, 0);
+                dib9000_i2c_write16(&client, 1227, 1);
+                dib9000_i2c_write16(&client, 1227, 0);
+
+                if (dib9000_identify(&client) == 0) {
+                        client.i2c_addr = default_addr;
+                        if (dib9000_identify(&client) == 0) {
+                                dprintk("DiB9000 #%d: not identified", k);
+                                ret = -EIO;
+                                goto error;
+                        }
+                }
+
+                dib9000_i2c_write16(&client, 1795, (1 << 10) | (4 << 6));
+                dib9000_i2c_write16(&client, 1794, (new_addr << 2) | 2);
+
+                dprintk("IC %d initialized (to i2c_address 0x%x)", k, new_addr);
+        }
+
+        for (k = 0; k < no_of_demods; k++) {
+                new_addr = first_addr | (k << 1);
+                client.i2c_addr = new_addr;
+
+                dib9000_i2c_write16(&client, 1794, (new_addr << 2));
+                dib9000_i2c_write16(&client, 1795, 0);
+        }
+
+error:
+        kfree(client.i2c_read_buffer);
+error_memory:
+        kfree(client.i2c_write_buffer);
+
+        return ret;
+}
+EXPORT_SYMBOL(dib9000_i2c_enumeration);
+
+int dib9000_set_slave_frontend(struct dvb_frontend *fe, struct dvb_frontend *fe_slave)
+{
+        struct dib9000_state *state = fe->demodulator_priv;
+        u8 index_frontend = 1;
+
+        while ((index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL))
+                index_frontend++;
+        if (index_frontend < MAX_NUMBER_OF_FRONTENDS) {
+                dprintk("set slave fe %p to index %i", fe_slave, index_frontend);
+                state->fe[index_frontend] = fe_slave;
+                return 0;
+        }
+
+        dprintk("too many slave frontend");
+        return -ENOMEM;
+}
+EXPORT_SYMBOL(dib9000_set_slave_frontend);
+
+int dib9000_remove_slave_frontend(struct dvb_frontend *fe)
+{
+        struct dib9000_state *state = fe->demodulator_priv;
+        u8 index_frontend = 1;
+
+        while ((index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL))
+                index_frontend++;
+        if (index_frontend != 1) {
+                dprintk("remove slave fe %p (index %i)", state->fe[index_frontend - 1], index_frontend - 1);
+                state->fe[index_frontend] = NULL;
+                return 0;
+        }
+
+        dprintk("no frontend to be removed");
+        return -ENODEV;
+}
+EXPORT_SYMBOL(dib9000_remove_slave_frontend);
+
+struct dvb_frontend *dib9000_get_slave_frontend(struct dvb_frontend *fe, int slave_index)
+{
+        struct dib9000_state *state = fe->demodulator_priv;
+
+        if (slave_index >= MAX_NUMBER_OF_FRONTENDS)
+                return NULL;
+        return state->fe[slave_index];
+}
+EXPORT_SYMBOL(dib9000_get_slave_frontend);
+
+static struct dvb_frontend_ops dib9000_ops;
+struct dvb_frontend *dib9000_attach(struct i2c_adapter *i2c_adap, u8 i2c_addr, const struct dib9000_config *cfg)
+{
+        struct dvb_frontend *fe;
+        struct dib9000_state *st;
+        st = kzalloc(sizeof(struct dib9000_state), GFP_KERNEL);
+        if (st == NULL)
+                return NULL;
+        fe = kzalloc(sizeof(struct dvb_frontend), GFP_KERNEL);
+        if (fe == NULL) {
+                kfree(st);
+                return NULL;
+        }
+
+        memcpy(&st->chip.d9.cfg, cfg, sizeof(struct dib9000_config));
+        st->i2c.i2c_adap = i2c_adap;
+        st->i2c.i2c_addr = i2c_addr;
+        st->i2c.i2c_write_buffer = st->i2c_write_buffer;
+        st->i2c.i2c_read_buffer = st->i2c_read_buffer;
+
+        st->gpio_dir = DIB9000_GPIO_DEFAULT_DIRECTIONS;
+        st->gpio_val = DIB9000_GPIO_DEFAULT_VALUES;
+        st->gpio_pwm_pos = DIB9000_GPIO_DEFAULT_PWM_POS;
+
+        DibInitLock(&st->platform.risc.mbx_if_lock);
+        DibInitLock(&st->platform.risc.mbx_lock);
+        DibInitLock(&st->platform.risc.mem_lock);
+        DibInitLock(&st->platform.risc.mem_mbx_lock);
+
+        st->fe[0] = fe;
+        fe->demodulator_priv = st;
+        memcpy(&st->fe[0]->ops, &dib9000_ops, sizeof(struct dvb_frontend_ops));
+
+        /* Ensure the output mode remains at the previous default if it's
+         * not specifically set by the caller.
+         */
+        if ((st->chip.d9.cfg.output_mode != OUTMODE_MPEG2_SERIAL) && (st->chip.d9.cfg.output_mode != OUTMODE_MPEG2_PAR_GATED_CLK))
+                st->chip.d9.cfg.output_mode = OUTMODE_MPEG2_FIFO;
+
+        if (dib9000_identify(&st->i2c) == 0)
+                goto error;
+
+        dibx000_init_i2c_master(&st->i2c_master, DIB7000MC, st->i2c.i2c_adap, st->i2c.i2c_addr);
+
+        st->tuner_adap.dev.parent = i2c_adap->dev.parent;
+        strncpy(st->tuner_adap.name, "DIB9000_FW TUNER ACCESS", sizeof(st->tuner_adap.name));
+        st->tuner_adap.algo = &dib9000_tuner_algo;
+        st->tuner_adap.algo_data = NULL;
+        i2c_set_adapdata(&st->tuner_adap, st);
+        if (i2c_add_adapter(&st->tuner_adap) < 0)
+                goto error;
+
+        st->component_bus.dev.parent = i2c_adap->dev.parent;
+        strncpy(st->component_bus.name, "DIB9000_FW COMPONENT BUS ACCESS", sizeof(st->component_bus.name));
+        st->component_bus.algo = &dib9000_component_bus_algo;
+        st->component_bus.algo_data = NULL;
+        st->component_bus_speed = 340;
+        i2c_set_adapdata(&st->component_bus, st);
+        if (i2c_add_adapter(&st->component_bus) < 0)
+                goto component_bus_add_error;
+
+        dib9000_fw_reset(fe);
+
+        return fe;
+
+component_bus_add_error:
+        i2c_del_adapter(&st->tuner_adap);
+error:
+        kfree(st);
+        return NULL;
+}
+EXPORT_SYMBOL(dib9000_attach);
+
+static struct dvb_frontend_ops dib9000_ops = {
+        .info = {
+                 .name = "DiBcom 9000",
+                 .type = FE_OFDM,
+                 .frequency_min = 44250000,
+                 .frequency_max = 867250000,
+                 .frequency_stepsize = 62500,
+                 .caps = FE_CAN_INVERSION_AUTO |
+                 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
+                 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
+                 FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_AUTO |
+                 FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_GUARD_INTERVAL_AUTO | FE_CAN_RECOVER | FE_CAN_HIERARCHY_AUTO,
+                 },
+
+        .release = dib9000_release,
+
+        .init = dib9000_wakeup,
+        .sleep = dib9000_sleep,
+
+        .set_frontend = dib9000_set_frontend,
+        .get_tune_settings = dib9000_fe_get_tune_settings,
+        .get_frontend = dib9000_get_frontend,
+
+        .read_status = dib9000_read_status,
+        .read_ber = dib9000_read_ber,
+        .read_signal_strength = dib9000_read_signal_strength,
+        .read_snr = dib9000_read_snr,
+        .read_ucblocks = dib9000_read_unc_blocks,
+};
+
+MODULE_AUTHOR("Patrick Boettcher <pboettcher@dibcom.fr>");
+MODULE_AUTHOR("Olivier Grenie <ogrenie@dibcom.fr>");
+MODULE_DESCRIPTION("Driver for the DiBcom 9000 COFDM demodulator");
+MODULE_LICENSE("GPL");
diff --git a/drivers/media/dvb/frontends/dib9000.h b/drivers/media/dvb/frontends/dib9000.h
new file mode 100644
index 000000000000..b5781a48034c
--- /dev/null
+++ b/drivers/media/dvb/frontends/dib9000.h
@@ -0,0 +1,131 @@
+#ifndef DIB9000_H
+#define DIB9000_H
+
+#include "dibx000_common.h"
+
+struct dib9000_config {
+        u8 dvbt_mode;
+        u8 output_mpeg2_in_188_bytes;
+        u8 hostbus_diversity;
+        struct dibx000_bandwidth_config *bw;
+
+        u16 if_drives;
+
+        u32 timing_frequency;
+        u32 xtal_clock_khz;
+        u32 vcxo_timer;
+        u32 demod_clock_khz;
+
+        const u8 *microcode_B_fe_buffer;
+        u32 microcode_B_fe_size;
+
+        struct dibGPIOFunction gpio_function[2];
+        struct dibSubbandSelection subband;
+
+        u8 output_mode;
+};
+
+#define DEFAULT_DIB9000_I2C_ADDRESS 18
+
+#if defined(CONFIG_DVB_DIB9000) || (defined(CONFIG_DVB_DIB9000_MODULE) && defined(MODULE))
+extern struct dvb_frontend *dib9000_attach(struct i2c_adapter *i2c_adap, u8 i2c_addr, const struct dib9000_config *cfg);
+extern int dib9000_i2c_enumeration(struct i2c_adapter *host, int no_of_demods, u8 default_addr, u8 first_addr);
+extern struct i2c_adapter *dib9000_get_tuner_interface(struct dvb_frontend *fe);
+extern struct i2c_adapter *dib9000_get_i2c_master(struct dvb_frontend *fe, enum dibx000_i2c_interface intf, int gating);
+extern int dib9000_set_gpio(struct dvb_frontend *fe, u8 num, u8 dir, u8 val);
+extern int dib9000_fw_pid_filter_ctrl(struct dvb_frontend *fe, u8 onoff);
+extern int dib9000_fw_pid_filter(struct dvb_frontend *fe, u8 id, u16 pid, u8 onoff);
+extern int dib9000_firmware_post_pll_init(struct dvb_frontend *fe);
+extern int dib9000_set_slave_frontend(struct dvb_frontend *fe, struct dvb_frontend *fe_slave);
+extern int dib9000_remove_slave_frontend(struct dvb_frontend *fe);
+extern struct dvb_frontend *dib9000_get_slave_frontend(struct dvb_frontend *fe, int slave_index);
+extern struct i2c_adapter *dib9000_get_component_bus_interface(struct dvb_frontend *fe);
+extern int dib9000_set_i2c_adapter(struct dvb_frontend *fe, struct i2c_adapter *i2c);
+extern int dib9000_fw_set_component_bus_speed(struct dvb_frontend *fe, u16 speed);
+#else
+static inline struct dvb_frontend *dib9000_attach(struct i2c_adapter *i2c_adap, u8 i2c_addr, struct dib9000_config *cfg)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return NULL;
+}
+
+static inline struct i2c_adapter *dib9000_get_i2c_master(struct dvb_frontend *fe, enum dibx000_i2c_interface intf, int gating)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return NULL;
+}
+
+static inline int dib9000_i2c_enumeration(struct i2c_adapter *host, int no_of_demods, u8 default_addr, u8 first_addr)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return -ENODEV;
+}
+
+static inline struct i2c_adapter *dib9000_get_tuner_interface(struct dvb_frontend *fe)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return NULL;
+}
+
+static inline int dib9000_set_gpio(struct dvb_frontend *fe, u8 num, u8 dir, u8 val)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return -ENODEV;
+}
+
+static inline int dib9000_fw_pid_filter_ctrl(struct dvb_frontend *fe, u8 onoff)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return -ENODEV;
+}
+
+static inline int dib9000_fw_pid_filter(struct dvb_frontend *fe, u8 id, u16 pid, u8 onoff)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return -ENODEV;
+}
+
+static inline int dib9000_firmware_post_pll_init(struct dvb_frontend *fe)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return -ENODEV;
+}
+
+static inline int dib9000_set_slave_frontend(struct dvb_frontend *fe, struct dvb_frontend *fe_slave)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return -ENODEV;
+}
+
+int dib9000_remove_slave_frontend(struct dvb_frontend *fe)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return -ENODEV;
+}
+
+static inline struct dvb_frontend *dib9000_get_slave_frontend(struct dvb_frontend *fe, int slave_index)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return NULL;
+}
+
+static inline struct i2c_adapter *dib9000_get_component_bus_interface(struct dvb_frontend *fe)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return NULL;
+}
+
+static inline int dib9000_set_i2c_adapter(struct dvb_frontend *fe, struct i2c_adapter *i2c)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return -ENODEV;
+}
+
+static inline int dib9000_fw_set_component_bus_speed(struct dvb_frontend *fe, u16 speed)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return -ENODEV;
+}
+#endif
+
+#endif
diff --git a/drivers/media/dvb/frontends/dibx000_common.c b/drivers/media/dvb/frontends/dibx000_common.c
index 980e02f1575e..dc5d17a67579 100644
--- a/drivers/media/dvb/frontends/dibx000_common.c
+++ b/drivers/media/dvb/frontends/dibx000_common.c
@@ -10,16 +10,161 @@ MODULE_PARM_DESC(debug, "turn on debugging (default: 0)");
 
 static int dibx000_write_word(struct dibx000_i2c_master *mst, u16 reg, u16 val)
 {
-        u8 b[4] = {
-                (reg >> 8) & 0xff, reg & 0xff,
-                (val >> 8) & 0xff, val & 0xff,
-        };
-        struct i2c_msg msg = {
-                .addr = mst->i2c_addr,.flags = 0,.buf = b,.len = 4
-        };
-        return i2c_transfer(mst->i2c_adap, &msg, 1) != 1 ? -EREMOTEIO : 0;
+        mst->i2c_write_buffer[0] = (reg >> 8) & 0xff;
+        mst->i2c_write_buffer[1] = reg & 0xff;
+        mst->i2c_write_buffer[2] = (val >> 8) & 0xff;
+        mst->i2c_write_buffer[3] = val & 0xff;
+
+        memset(mst->msg, 0, sizeof(struct i2c_msg));
+        mst->msg[0].addr = mst->i2c_addr;
+        mst->msg[0].flags = 0;
+        mst->msg[0].buf = mst->i2c_write_buffer;
+        mst->msg[0].len = 4;
+
+        return i2c_transfer(mst->i2c_adap, mst->msg, 1) != 1 ? -EREMOTEIO : 0;
 }
 
+static u16 dibx000_read_word(struct dibx000_i2c_master *mst, u16 reg)
+{
+        mst->i2c_write_buffer[0] = reg >> 8;
+        mst->i2c_write_buffer[1] = reg & 0xff;
+
+        memset(mst->msg, 0, 2 * sizeof(struct i2c_msg));
+        mst->msg[0].addr = mst->i2c_addr;
+        mst->msg[0].flags = 0;
+        mst->msg[0].buf = mst->i2c_write_buffer;
+        mst->msg[0].len = 2;
+        mst->msg[1].addr = mst->i2c_addr;
+        mst->msg[1].flags = I2C_M_RD;
+        mst->msg[1].buf = mst->i2c_read_buffer;
+        mst->msg[1].len = 2;
+
+        if (i2c_transfer(mst->i2c_adap, mst->msg, 2) != 2)
+                dprintk("i2c read error on %d", reg);
+
+        return (mst->i2c_read_buffer[0] << 8) | mst->i2c_read_buffer[1];
+}
+
+static int dibx000_is_i2c_done(struct dibx000_i2c_master *mst)
+{
+        int i = 100;
+        u16 status;
+
+        while (((status = dibx000_read_word(mst, mst->base_reg + 2)) & 0x0100) == 0 && --i > 0)
+                ;
+
+        /* i2c timed out */
+        if (i == 0)
+                return -EREMOTEIO;
+
+        /* no acknowledge */
+        if ((status & 0x0080) == 0)
+                return -EREMOTEIO;
+
+        return 0;
+}
+
+static int dibx000_master_i2c_write(struct dibx000_i2c_master *mst, struct i2c_msg *msg, u8 stop)
+{
+        u16 data;
+        u16 da;
+        u16 i;
+        u16 txlen = msg->len, len;
+        const u8 *b = msg->buf;
+
+        while (txlen) {
+                dibx000_read_word(mst, mst->base_reg + 2);
+
+                len = txlen > 8 ? 8 : txlen;
+                for (i = 0; i < len; i += 2) {
+                        data = *b++ << 8;
+                        if (i+1 < len)
+                                data |= *b++;
+                        dibx000_write_word(mst, mst->base_reg, data);
+                }
+                da = (((u8) (msg->addr))  << 9) |
+                        (1           << 8) |
+                        (1           << 7) |
+                        (0           << 6) |
+                        (0           << 5) |
+                        ((len & 0x7) << 2) |
+                        (0           << 1) |
+                        (0           << 0);
+
+                if (txlen == msg->len)
+                        da |= 1 << 5; /* start */
+
+                if (txlen-len == 0 && stop)
+                        da |= 1 << 6; /* stop */
+
+                dibx000_write_word(mst, mst->base_reg+1, da);
+
+                if (dibx000_is_i2c_done(mst) != 0)
+                        return -EREMOTEIO;
+                txlen -= len;
+        }
+
+        return 0;
+}
+
+static int dibx000_master_i2c_read(struct dibx000_i2c_master *mst, struct i2c_msg *msg)
+{
+        u16 da;
+        u8 *b = msg->buf;
+        u16 rxlen = msg->len, len;
+
+        while (rxlen) {
+                len = rxlen > 8 ? 8 : rxlen;
+                da = (((u8) (msg->addr)) << 9) |
+                        (1           << 8) |
+                        (1           << 7) |
+                        (0           << 6) |
+                        (0           << 5) |
+                        ((len & 0x7) << 2) |
+                        (1           << 1) |
+                        (0           << 0);
+
+                if (rxlen == msg->len)
+                        da |= 1 << 5; /* start */
+
+                if (rxlen-len == 0)
+                        da |= 1 << 6; /* stop */
+                dibx000_write_word(mst, mst->base_reg+1, da);
+
+                if (dibx000_is_i2c_done(mst) != 0)
+                        return -EREMOTEIO;
+
+                rxlen -= len;
+
+                while (len) {
+                        da = dibx000_read_word(mst, mst->base_reg);
+                        *b++ = (da >> 8) & 0xff;
+                        len--;
+                        if (len >= 1) {
+                                *b++ =  da   & 0xff;
+                                len--;
+                        }
+                }
+        }
+
+        return 0;
+}
+
+int dibx000_i2c_set_speed(struct i2c_adapter *i2c_adap, u16 speed)
+{
+        struct dibx000_i2c_master *mst = i2c_get_adapdata(i2c_adap);
+
+        if (mst->device_rev < DIB7000MC && speed < 235)
+                speed = 235;
+        return dibx000_write_word(mst, mst->base_reg + 3, (u16)(60000 / speed));
+
+}
+EXPORT_SYMBOL(dibx000_i2c_set_speed);
+
+static u32 dibx000_i2c_func(struct i2c_adapter *adapter)
+{
+        return I2C_FUNC_I2C;
+}
 
 static int dibx000_i2c_select_interface(struct dibx000_i2c_master *mst,
                                         enum dibx000_i2c_interface intf)
@@ -32,6 +177,60 @@ static int dibx000_i2c_select_interface(struct dibx000_i2c_master *mst,
         return 0;
 }
 
+static int dibx000_i2c_master_xfer_gpio12(struct i2c_adapter *i2c_adap, struct i2c_msg msg[], int num)
+{
+        struct dibx000_i2c_master *mst = i2c_get_adapdata(i2c_adap);
+        int msg_index;
+        int ret = 0;
+
+        dibx000_i2c_select_interface(mst, DIBX000_I2C_INTERFACE_GPIO_1_2);
+        for (msg_index = 0; msg_index < num; msg_index++) {
+                if (msg[msg_index].flags & I2C_M_RD) {
+                        ret = dibx000_master_i2c_read(mst, &msg[msg_index]);
+                        if (ret != 0)
+                                return 0;
+                } else {
+                        ret = dibx000_master_i2c_write(mst, &msg[msg_index], 1);
+                        if (ret != 0)
+                                return 0;
+                }
+        }
+
+        return num;
+}
+
+static int dibx000_i2c_master_xfer_gpio34(struct i2c_adapter *i2c_adap, struct i2c_msg msg[], int num)
+{
+        struct dibx000_i2c_master *mst = i2c_get_adapdata(i2c_adap);
+        int msg_index;
+        int ret = 0;
+
+        dibx000_i2c_select_interface(mst, DIBX000_I2C_INTERFACE_GPIO_3_4);
+        for (msg_index = 0; msg_index < num; msg_index++) {
+                if (msg[msg_index].flags & I2C_M_RD) {
+                        ret = dibx000_master_i2c_read(mst, &msg[msg_index]);
+                        if (ret != 0)
+                                return 0;
+                } else {
+                        ret = dibx000_master_i2c_write(mst, &msg[msg_index], 1);
+                        if (ret != 0)
+                                return 0;
+                }
+        }
+
+        return num;
+}
+
+static struct i2c_algorithm dibx000_i2c_master_gpio12_xfer_algo = {
+        .master_xfer = dibx000_i2c_master_xfer_gpio12,
+        .functionality = dibx000_i2c_func,
+};
+
+static struct i2c_algorithm dibx000_i2c_master_gpio34_xfer_algo = {
+        .master_xfer = dibx000_i2c_master_xfer_gpio34,
+        .functionality = dibx000_i2c_func,
+};
+
 static int dibx000_i2c_gate_ctrl(struct dibx000_i2c_master *mst, u8 tx[4],
                                  u8 addr, int onoff)
 {
@@ -54,35 +253,73 @@ static int dibx000_i2c_gate_ctrl(struct dibx000_i2c_master *mst, u8 tx[4],
         return 0;
 }
 
-static u32 dibx000_i2c_func(struct i2c_adapter *adapter)
+static int dibx000_i2c_gated_gpio67_xfer(struct i2c_adapter *i2c_adap,
+                                        struct i2c_msg msg[], int num)
 {
-        return I2C_FUNC_I2C;
+        struct dibx000_i2c_master *mst = i2c_get_adapdata(i2c_adap);
+
+        if (num > 32) {
+                dprintk("%s: too much I2C message to be transmitted (%i).\
+                                Maximum is 32", __func__, num);
+                return -ENOMEM;
+        }
+
+        memset(mst->msg, 0, sizeof(struct i2c_msg) * (2 + num));
+
+        dibx000_i2c_select_interface(mst, DIBX000_I2C_INTERFACE_GPIO_6_7);
+
+        /* open the gate */
+        dibx000_i2c_gate_ctrl(mst, &mst->i2c_write_buffer[0], msg[0].addr, 1);
+        mst->msg[0].addr = mst->i2c_addr;
+        mst->msg[0].buf = &mst->i2c_write_buffer[0];
+        mst->msg[0].len = 4;
+
+        memcpy(&mst->msg[1], msg, sizeof(struct i2c_msg) * num);
+
+        /* close the gate */
+        dibx000_i2c_gate_ctrl(mst, &mst->i2c_write_buffer[4], 0, 0);
+        mst->msg[num + 1].addr = mst->i2c_addr;
+        mst->msg[num + 1].buf = &mst->i2c_write_buffer[4];
+        mst->msg[num + 1].len = 4;
+
+        return i2c_transfer(mst->i2c_adap, mst->msg, 2 + num) == 2 + num ? num : -EIO;
 }
 
+static struct i2c_algorithm dibx000_i2c_gated_gpio67_algo = {
+        .master_xfer = dibx000_i2c_gated_gpio67_xfer,
+        .functionality = dibx000_i2c_func,
+};
+
 static int dibx000_i2c_gated_tuner_xfer(struct i2c_adapter *i2c_adap,
                                         struct i2c_msg msg[], int num)
 {
         struct dibx000_i2c_master *mst = i2c_get_adapdata(i2c_adap);
-        struct i2c_msg m[2 + num];
-        u8 tx_open[4], tx_close[4];
 
-        memset(m, 0, sizeof(struct i2c_msg) * (2 + num));
+        if (num > 32) {
+                dprintk("%s: too much I2C message to be transmitted (%i).\
+                                Maximum is 32", __func__, num);
+                return -ENOMEM;
+        }
+
+        memset(mst->msg, 0, sizeof(struct i2c_msg) * (2 + num));
 
         dibx000_i2c_select_interface(mst, DIBX000_I2C_INTERFACE_TUNER);
 
-        dibx000_i2c_gate_ctrl(mst, tx_open, msg[0].addr, 1);
-        m[0].addr = mst->i2c_addr;
-        m[0].buf = tx_open;
-        m[0].len = 4;
+        /* open the gate */
+        dibx000_i2c_gate_ctrl(mst, &mst->i2c_write_buffer[0], msg[0].addr, 1);
+        mst->msg[0].addr = mst->i2c_addr;
+        mst->msg[0].buf = &mst->i2c_write_buffer[0];
+        mst->msg[0].len = 4;
 
-        memcpy(&m[1], msg, sizeof(struct i2c_msg) * num);
+        memcpy(&mst->msg[1], msg, sizeof(struct i2c_msg) * num);
 
-        dibx000_i2c_gate_ctrl(mst, tx_close, 0, 0);
-        m[num + 1].addr = mst->i2c_addr;
-        m[num + 1].buf = tx_close;
-        m[num + 1].len = 4;
+        /* close the gate */
+        dibx000_i2c_gate_ctrl(mst, &mst->i2c_write_buffer[4], 0, 0);
+        mst->msg[num + 1].addr = mst->i2c_addr;
+        mst->msg[num + 1].buf = &mst->i2c_write_buffer[4];
+        mst->msg[num + 1].len = 4;
 
-        return i2c_transfer(mst->i2c_adap, m, 2 + num) == 2 + num ? num : -EIO;
+        return i2c_transfer(mst->i2c_adap, mst->msg, 2 + num) == 2 + num ? num : -EIO;
 }
 
 static struct i2c_algorithm dibx000_i2c_gated_tuner_algo = {
@@ -91,8 +328,8 @@ static struct i2c_algorithm dibx000_i2c_gated_tuner_algo = {
 };
 
 struct i2c_adapter *dibx000_get_i2c_adapter(struct dibx000_i2c_master *mst,
-                                            enum dibx000_i2c_interface intf,
-                                            int gating)
+                                                enum dibx000_i2c_interface intf,
+                                                int gating)
 {
         struct i2c_adapter *i2c = NULL;
 
@@ -101,6 +338,18 @@ struct i2c_adapter *dibx000_get_i2c_adapter(struct dibx000_i2c_master *mst,
                 if (gating)
                         i2c = &mst->gated_tuner_i2c_adap;
                 break;
+        case DIBX000_I2C_INTERFACE_GPIO_1_2:
+                if (!gating)
+                        i2c = &mst->master_i2c_adap_gpio12;
+                break;
+        case DIBX000_I2C_INTERFACE_GPIO_3_4:
+                if (!gating)
+                        i2c = &mst->master_i2c_adap_gpio34;
+                break;
+        case DIBX000_I2C_INTERFACE_GPIO_6_7:
+                if (gating)
+                        i2c = &mst->master_i2c_adap_gpio67;
+                break;
         default:
                 printk(KERN_ERR "DiBX000: incorrect I2C interface selected\n");
                 break;
@@ -126,11 +375,11 @@ void dibx000_reset_i2c_master(struct dibx000_i2c_master *mst)
 EXPORT_SYMBOL(dibx000_reset_i2c_master);
 
 static int i2c_adapter_init(struct i2c_adapter *i2c_adap,
-                            struct i2c_algorithm *algo, const char *name,
-                            struct dibx000_i2c_master *mst)
+                                struct i2c_algorithm *algo, const char *name,
+                                struct dibx000_i2c_master *mst)
 {
         strncpy(i2c_adap->name, name, sizeof(i2c_adap->name));
-        i2c_adap->class = I2C_CLASS_TV_DIGITAL, i2c_adap->algo = algo;
+        i2c_adap->algo = algo;
         i2c_adap->algo_data = NULL;
         i2c_set_adapdata(i2c_adap, mst);
         if (i2c_add_adapter(i2c_adap) < 0)
@@ -139,7 +388,7 @@ static int i2c_adapter_init(struct i2c_adapter *i2c_adap,
 }
 
 int dibx000_init_i2c_master(struct dibx000_i2c_master *mst, u16 device_rev,
-                            struct i2c_adapter *i2c_adap, u8 i2c_addr)
+                                struct i2c_adapter *i2c_adap, u8 i2c_addr)
 {
         u8 tx[4];
         struct i2c_msg m = {.addr = i2c_addr >> 1,.buf = tx,.len = 4 };
@@ -153,11 +402,33 @@ int dibx000_init_i2c_master(struct dibx000_i2c_master *mst, u16 device_rev,
         else
                 mst->base_reg = 768;
 
+        mst->gated_tuner_i2c_adap.dev.parent = mst->i2c_adap->dev.parent;
+        if (i2c_adapter_init
+                        (&mst->gated_tuner_i2c_adap, &dibx000_i2c_gated_tuner_algo,
+                         "DiBX000 tuner I2C bus", mst) != 0)
+                printk(KERN_ERR
+                                "DiBX000: could not initialize the tuner i2c_adapter\n");
+
+        mst->master_i2c_adap_gpio12.dev.parent = mst->i2c_adap->dev.parent;
+        if (i2c_adapter_init
+                        (&mst->master_i2c_adap_gpio12, &dibx000_i2c_master_gpio12_xfer_algo,
+                         "DiBX000 master GPIO12 I2C bus", mst) != 0)
+                printk(KERN_ERR
+                                "DiBX000: could not initialize the master i2c_adapter\n");
+
+        mst->master_i2c_adap_gpio34.dev.parent = mst->i2c_adap->dev.parent;
+        if (i2c_adapter_init
+                        (&mst->master_i2c_adap_gpio34, &dibx000_i2c_master_gpio34_xfer_algo,
+                         "DiBX000 master GPIO34 I2C bus", mst) != 0)
+                printk(KERN_ERR
+                                "DiBX000: could not initialize the master i2c_adapter\n");
+
+        mst->master_i2c_adap_gpio67.dev.parent = mst->i2c_adap->dev.parent;
         if (i2c_adapter_init
-            (&mst->gated_tuner_i2c_adap, &dibx000_i2c_gated_tuner_algo,
-             "DiBX000 tuner I2C bus", mst) != 0)
+                        (&mst->master_i2c_adap_gpio67, &dibx000_i2c_gated_gpio67_algo,
+                         "DiBX000 master GPIO67 I2C bus", mst) != 0)
                 printk(KERN_ERR
-                       "DiBX000: could not initialize the tuner i2c_adapter\n");
+                                "DiBX000: could not initialize the master i2c_adapter\n");
 
         /* initialize the i2c-master by closing the gate */
         dibx000_i2c_gate_ctrl(mst, tx, 0, 0);
@@ -170,16 +441,19 @@ EXPORT_SYMBOL(dibx000_init_i2c_master);
 void dibx000_exit_i2c_master(struct dibx000_i2c_master *mst)
 {
         i2c_del_adapter(&mst->gated_tuner_i2c_adap);
+        i2c_del_adapter(&mst->master_i2c_adap_gpio12);
+        i2c_del_adapter(&mst->master_i2c_adap_gpio34);
+        i2c_del_adapter(&mst->master_i2c_adap_gpio67);
 }
 EXPORT_SYMBOL(dibx000_exit_i2c_master);
 
 
 u32 systime(void)
 {
-    struct timespec t;
+        struct timespec t;
 
-    t = current_kernel_time();
-    return (t.tv_sec * 10000) + (t.tv_nsec / 100000);
+        t = current_kernel_time();
+        return (t.tv_sec * 10000) + (t.tv_nsec / 100000);
 }
 EXPORT_SYMBOL(systime);
 
diff --git a/drivers/media/dvb/frontends/dibx000_common.h b/drivers/media/dvb/frontends/dibx000_common.h
index 4f5d141a308d..f031165c0459 100644
--- a/drivers/media/dvb/frontends/dibx000_common.h
+++ b/drivers/media/dvb/frontends/dibx000_common.h
@@ -4,7 +4,8 @@
 enum dibx000_i2c_interface {
         DIBX000_I2C_INTERFACE_TUNER = 0,
         DIBX000_I2C_INTERFACE_GPIO_1_2 = 1,
-        DIBX000_I2C_INTERFACE_GPIO_3_4 = 2
+        DIBX000_I2C_INTERFACE_GPIO_3_4 = 2,
+        DIBX000_I2C_INTERFACE_GPIO_6_7 = 3
 };
 
 struct dibx000_i2c_master {
@@ -17,24 +18,33 @@ struct dibx000_i2c_master {
 
         enum dibx000_i2c_interface selected_interface;
 
-//      struct i2c_adapter  tuner_i2c_adap;
+/*      struct i2c_adapter  tuner_i2c_adap; */
         struct i2c_adapter gated_tuner_i2c_adap;
+        struct i2c_adapter master_i2c_adap_gpio12;
+        struct i2c_adapter master_i2c_adap_gpio34;
+        struct i2c_adapter master_i2c_adap_gpio67;
 
         struct i2c_adapter *i2c_adap;
         u8 i2c_addr;
 
         u16 base_reg;
+
+        /* for the I2C transfer */
+        struct i2c_msg msg[34];
+        u8 i2c_write_buffer[8];
+        u8 i2c_read_buffer[2];
 };
 
 extern int dibx000_init_i2c_master(struct dibx000_i2c_master *mst,
-                                   u16 device_rev, struct i2c_adapter *i2c_adap,
-                                   u8 i2c_addr);
+                                        u16 device_rev, struct i2c_adapter *i2c_adap,
+                                        u8 i2c_addr);
 extern struct i2c_adapter *dibx000_get_i2c_adapter(struct dibx000_i2c_master
-                                                   *mst,
-                                                   enum dibx000_i2c_interface
-                                                   intf, int gating);
+                                                        *mst,
+                                                        enum dibx000_i2c_interface
+                                                        intf, int gating);
 extern void dibx000_exit_i2c_master(struct dibx000_i2c_master *mst);
 extern void dibx000_reset_i2c_master(struct dibx000_i2c_master *mst);
+extern int dibx000_i2c_set_speed(struct i2c_adapter *i2c_adap, u16 speed);
 
 extern u32 systime(void);
 
@@ -42,7 +52,7 @@ extern u32 systime(void);
 #define BAND_UHF   0x02
 #define BAND_VHF   0x04
 #define BAND_SBAND 0x08
-#define BAND_FM    0x10
+#define BAND_FM    0x10
 #define BAND_CBAND 0x20
 
 #define BAND_OF_FREQUENCY(freq_kHz) ((freq_kHz) <= 170000 ? BAND_CBAND : \
@@ -135,9 +145,9 @@ enum dibx000_adc_states {
         DIBX000_VBG_DISABLE,
 };
 
-#define BANDWIDTH_TO_KHZ(v) ( (v) == BANDWIDTH_8_MHZ  ? 8000 : \
-                             (v) == BANDWIDTH_7_MHZ  ? 7000 : \
-                             (v) == BANDWIDTH_6_MHZ  ? 6000 : 8000 )
+#define BANDWIDTH_TO_KHZ(v) ((v) == BANDWIDTH_8_MHZ  ? 8000 : \
+                                (v) == BANDWIDTH_7_MHZ  ? 7000 : \
+                                (v) == BANDWIDTH_6_MHZ  ? 6000 : 8000)
 
 #define BANDWIDTH_TO_INDEX(v) ( \
         (v) == 8000 ? BANDWIDTH_8_MHZ : \
@@ -153,53 +163,57 @@ enum dibx000_adc_states {
 #define OUTMODE_MPEG2_FIFO          5
 #define OUTMODE_ANALOG_ADC          6
 
+#define INPUT_MODE_OFF                0x11
+#define INPUT_MODE_DIVERSITY          0x12
+#define INPUT_MODE_MPEG               0x13
+
 enum frontend_tune_state {
-    CT_TUNER_START = 10,
-    CT_TUNER_STEP_0,
-    CT_TUNER_STEP_1,
-    CT_TUNER_STEP_2,
-    CT_TUNER_STEP_3,
-    CT_TUNER_STEP_4,
-    CT_TUNER_STEP_5,
-    CT_TUNER_STEP_6,
-    CT_TUNER_STEP_7,
-    CT_TUNER_STOP,
-
-    CT_AGC_START = 20,
-    CT_AGC_STEP_0,
-    CT_AGC_STEP_1,
-    CT_AGC_STEP_2,
-    CT_AGC_STEP_3,
-    CT_AGC_STEP_4,
-    CT_AGC_STOP,
+        CT_TUNER_START = 10,
+        CT_TUNER_STEP_0,
+        CT_TUNER_STEP_1,
+        CT_TUNER_STEP_2,
+        CT_TUNER_STEP_3,
+        CT_TUNER_STEP_4,
+        CT_TUNER_STEP_5,
+        CT_TUNER_STEP_6,
+        CT_TUNER_STEP_7,
+        CT_TUNER_STOP,
+
+        CT_AGC_START = 20,
+        CT_AGC_STEP_0,
+        CT_AGC_STEP_1,
+        CT_AGC_STEP_2,
+        CT_AGC_STEP_3,
+        CT_AGC_STEP_4,
+        CT_AGC_STOP,
 
         CT_DEMOD_START = 30,
-    CT_DEMOD_STEP_1,
-    CT_DEMOD_STEP_2,
-    CT_DEMOD_STEP_3,
-    CT_DEMOD_STEP_4,
-    CT_DEMOD_STEP_5,
-    CT_DEMOD_STEP_6,
-    CT_DEMOD_STEP_7,
-    CT_DEMOD_STEP_8,
-    CT_DEMOD_STEP_9,
-    CT_DEMOD_STEP_10,
-    CT_DEMOD_SEARCH_NEXT = 41,
-    CT_DEMOD_STEP_LOCKED,
-    CT_DEMOD_STOP,
-
-    CT_DONE = 100,
-    CT_SHUTDOWN,
+        CT_DEMOD_STEP_1,
+        CT_DEMOD_STEP_2,
+        CT_DEMOD_STEP_3,
+        CT_DEMOD_STEP_4,
+        CT_DEMOD_STEP_5,
+        CT_DEMOD_STEP_6,
+        CT_DEMOD_STEP_7,
+        CT_DEMOD_STEP_8,
+        CT_DEMOD_STEP_9,
+        CT_DEMOD_STEP_10,
+        CT_DEMOD_SEARCH_NEXT = 41,
+        CT_DEMOD_STEP_LOCKED,
+        CT_DEMOD_STOP,
+
+        CT_DONE = 100,
+        CT_SHUTDOWN,
 
 };
 
 struct dvb_frontend_parametersContext {
 #define CHANNEL_STATUS_PARAMETERS_UNKNOWN   0x01
 #define CHANNEL_STATUS_PARAMETERS_SET       0x02
-    u8 status;
-    u32 tune_time_estimation[2];
-    s32 tps_available;
-    u16 tps[9];
+        u8 status;
+        u32 tune_time_estimation[2];
+        s32 tps_available;
+        u16 tps[9];
 };
 
 #define FE_STATUS_TUNE_FAILED          0
@@ -216,4 +230,49 @@ struct dvb_frontend_parametersContext {
 
 #define ABS(x) ((x < 0) ? (-x) : (x))
 
+#define DATA_BUS_ACCESS_MODE_8BIT                 0x01
+#define DATA_BUS_ACCESS_MODE_16BIT                0x02
+#define DATA_BUS_ACCESS_MODE_NO_ADDRESS_INCREMENT 0x10
+
+struct dibGPIOFunction {
+#define BOARD_GPIO_COMPONENT_BUS_ADAPTER 1
+#define BOARD_GPIO_COMPONENT_DEMOD       2
+        u8 component;
+
+#define BOARD_GPIO_FUNCTION_BOARD_ON      1
+#define BOARD_GPIO_FUNCTION_BOARD_OFF     2
+#define BOARD_GPIO_FUNCTION_COMPONENT_ON  3
+#define BOARD_GPIO_FUNCTION_COMPONENT_OFF 4
+#define BOARD_GPIO_FUNCTION_SUBBAND_PWM   5
+#define BOARD_GPIO_FUNCTION_SUBBAND_GPIO   6
+        u8 function;
+
+/* mask, direction and value are used specify which GPIO to change GPIO0
+ * is LSB and possible GPIO31 is MSB.  The same bit-position as in the
+ * mask is used for the direction and the value. Direction == 1 is OUT,
+ * 0 == IN. For direction "OUT" value is either 1 or 0, for direction IN
+ * value has no meaning.
+ *
+ * In case of BOARD_GPIO_FUNCTION_PWM mask is giving the GPIO to be
+ * used to do the PWM. Direction gives the PWModulator to be used.
+ * Value gives the PWM value in device-dependent scale.
+ */
+        u32 mask;
+        u32 direction;
+        u32 value;
+};
+
+#define MAX_NB_SUBBANDS   8
+struct dibSubbandSelection {
+        u8  size; /* Actual number of subbands. */
+        struct {
+                u16 f_mhz;
+                struct dibGPIOFunction gpio;
+        } subband[MAX_NB_SUBBANDS];
+};
+
+#define DEMOD_TIMF_SET    0x00
+#define DEMOD_TIMF_GET    0x01
+#define DEMOD_TIMF_UPDATE 0x02
+
 #endif
diff --git a/drivers/media/dvb/frontends/drx397xD.c b/drivers/media/dvb/frontends/drx397xD.c
deleted file mode 100644
index f74cca6dc26b..000000000000
--- a/drivers/media/dvb/frontends/drx397xD.c
+++ /dev/null
@@ -1,1511 +0,0 @@
-/*
- * Driver for Micronas drx397xD demodulator
- *
- * Copyright (C) 2007 Henk Vergonet <Henk.Vergonet@gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; If not, see <http://www.gnu.org/licenses/>.
- */
-
-#define DEBUG                   /* uncomment if you want debugging output */
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/moduleparam.h>
-#include <linux/init.h>
-#include <linux/device.h>
-#include <linux/delay.h>
-#include <linux/string.h>
-#include <linux/firmware.h>
-#include <linux/slab.h>
-#include <asm/div64.h>
-
-#include "dvb_frontend.h"
-#include "drx397xD.h"
-
-static const char mod_name[] = "drx397xD";
-
-#define MAX_CLOCK_DRIFT         200     /* maximal 200 PPM allowed */
-
-#define F_SET_0D0h      1
-#define F_SET_0D4h      2
-
-enum fw_ix {
-#define _FW_ENTRY(a, b, c)      b
-#include "drx397xD_fw.h"
-};
-
-/* chip specifics */
-struct drx397xD_state {
-        struct i2c_adapter *i2c;
-        struct dvb_frontend frontend;
-        struct drx397xD_config config;
-        enum fw_ix chip_rev;
-        int flags;
-        u32 bandwidth_parm;     /* internal bandwidth conversions */
-        u32 f_osc;              /* w90: actual osc frequency [Hz] */
-};
-
-/* Firmware */
-static const char *blob_name[] = {
-#define _BLOB_ENTRY(a, b)               a
-#include "drx397xD_fw.h"
-};
-
-enum blob_ix {
-#define _BLOB_ENTRY(a, b)               b
-#include "drx397xD_fw.h"
-};
-
-static struct {
-        const char *name;
-        const struct firmware *file;
-        rwlock_t lock;
-        int refcnt;
-        const u8 *data[ARRAY_SIZE(blob_name)];
-} fw[] = {
-#define _FW_ENTRY(a, b, c)      {                                       \
-                        .name   = a,                                    \
-                        .file   = NULL,                                 \
-                        .lock   = __RW_LOCK_UNLOCKED(fw[c].lock),       \
-                        .refcnt = 0,                                    \
-                        .data   = { }           }
-#include "drx397xD_fw.h"
-};
-
-/* use only with writer lock acquired */
-static void _drx_release_fw(struct drx397xD_state *s, enum fw_ix ix)
-{
-        memset(&fw[ix].data[0], 0, sizeof(fw[0].data));
-        if (fw[ix].file)
-                release_firmware(fw[ix].file);
-}
-
-static void drx_release_fw(struct drx397xD_state *s)
-{
-        enum fw_ix ix = s->chip_rev;
-
-        pr_debug("%s\n", __func__);
-
-        write_lock(&fw[ix].lock);
-        if (fw[ix].refcnt) {
-                fw[ix].refcnt--;
-                if (fw[ix].refcnt == 0)
-                        _drx_release_fw(s, ix);
-        }
-        write_unlock(&fw[ix].lock);
-}
-
-static int drx_load_fw(struct drx397xD_state *s, enum fw_ix ix)
-{
-        const u8 *data;
-        size_t size, len;
-        int i = 0, j, rc = -EINVAL;
-
-        pr_debug("%s\n", __func__);
-
-        if (ix < 0 || ix >= ARRAY_SIZE(fw))
-                return -EINVAL;
-        s->chip_rev = ix;
-
-        write_lock(&fw[ix].lock);
-        if (fw[ix].file) {
-                rc = 0;
-                goto exit_ok;
-        }
-        memset(&fw[ix].data[0], 0, sizeof(fw[0].data));
-
-        rc = request_firmware(&fw[ix].file, fw[ix].name, s->i2c->dev.parent);
-        if (rc != 0) {
-                printk(KERN_ERR "%s: Firmware \"%s\" not available\n",
-                       mod_name, fw[ix].name);
-                goto exit_err;
-        }
-
-        if (!fw[ix].file->data || fw[ix].file->size < 10)
-                goto exit_corrupt;
-
-        data = fw[ix].file->data;
-        size = fw[ix].file->size;
-
-        if (data[i++] != 2)     /* check firmware version */
-                goto exit_corrupt;
-
-        do {
-                switch (data[i++]) {
-                case 0x00:      /* bytecode */
-                        if (i >= size)
-                                break;
-                        i += data[i];
-                case 0x01:      /* reset */
-                case 0x02:      /* sleep */
-                        i++;
-                        break;
-                case 0xfe:      /* name */
-                        len = strnlen(&data[i], size - i);
-                        if (i + len + 1 >= size)
-                                goto exit_corrupt;
-                        if (data[i + len + 1] != 0)
-                                goto exit_corrupt;
-                        for (j = 0; j < ARRAY_SIZE(blob_name); j++) {
-                                if (strcmp(blob_name[j], &data[i]) == 0) {
-                                        fw[ix].data[j] = &data[i + len + 1];
-                                        pr_debug("Loading %s\n", blob_name[j]);
-                                }
-                        }
-                        i += len + 1;
-                        break;
-                case 0xff:      /* file terminator */
-                        if (i == size) {
-                                rc = 0;
-                                goto exit_ok;
-                        }
-                default:
-                        goto exit_corrupt;
-                }
-        } while (i < size);
-
-exit_corrupt:
-        printk(KERN_ERR "%s: Firmware is corrupt\n", mod_name);
-exit_err:
-        _drx_release_fw(s, ix);
-        fw[ix].refcnt--;
-exit_ok:
-        fw[ix].refcnt++;
-        write_unlock(&fw[ix].lock);
-
-        return rc;
-}
-
-/* i2c bus IO */
-static int write_fw(struct drx397xD_state *s, enum blob_ix ix)
-{
-        const u8 *data;
-        int len, rc = 0, i = 0;
-        struct i2c_msg msg = {
-                .addr = s->config.demod_address,
-                .flags = 0
-        };
-
-        if (ix < 0 || ix >= ARRAY_SIZE(blob_name)) {
-                pr_debug("%s drx_fw_ix_t out of range\n", __func__);
-                return -EINVAL;
-        }
-        pr_debug("%s %s\n", __func__, blob_name[ix]);
-
-        read_lock(&fw[s->chip_rev].lock);
-        data = fw[s->chip_rev].data[ix];
-        if (!data) {
-                rc = -EINVAL;
-                goto exit_rc;
-        }
-
-        for (;;) {
-                switch (data[i++]) {
-                case 0: /* bytecode */
-                        len = data[i++];
-                        msg.len = len;
-                        msg.buf = (__u8 *) &data[i];
-                        if (i2c_transfer(s->i2c, &msg, 1) != 1) {
-                                rc = -EIO;
-                                goto exit_rc;
-                        }
-                        i += len;
-                        break;
-                case 1: /* reset */
-                case 2: /* sleep */
-                        i++;
-                        break;
-                default:
-                        goto exit_rc;
-                }
-        }
-exit_rc:
-        read_unlock(&fw[s->chip_rev].lock);
-
-        return 0;
-}
-
-/* Function is not endian safe, use the RD16 wrapper below */
-static int _read16(struct drx397xD_state *s, __le32 i2c_adr)
-{
-        int rc;
-        u8 a[4];
-        __le16 v;
-        struct i2c_msg msg[2] = {
-                {
-                        .addr = s->config.demod_address,
-                        .flags = 0,
-                        .buf = a,
-                        .len = sizeof(a)
-                }, {
-                        .addr = s->config.demod_address,
-                        .flags = I2C_M_RD,
-                        .buf = (u8 *)&v,
-                        .len = sizeof(v)
-                }
-        };
-
-        *(__le32 *) a = i2c_adr;
-
-        rc = i2c_transfer(s->i2c, msg, 2);
-        if (rc != 2)
-                return -EIO;
-
-        return le16_to_cpu(v);
-}
-
-/* Function is not endian safe, use the WR16.. wrappers below */
-static int _write16(struct drx397xD_state *s, __le32 i2c_adr, __le16 val)
-{
-        u8 a[6];
-        int rc;
-        struct i2c_msg msg = {
-                .addr = s->config.demod_address,
-                .flags = 0,
-                .buf = a,
-                .len = sizeof(a)
-        };
-
-        *(__le32 *)a = i2c_adr;
-        *(__le16 *)&a[4] = val;
-
-        rc = i2c_transfer(s->i2c, &msg, 1);
-        if (rc != 1)
-                return -EIO;
-
-        return 0;
-}
-
-#define WR16(ss, adr, val) \
-                _write16(ss, I2C_ADR_C0(adr), cpu_to_le16(val))
-#define WR16_E0(ss, adr, val) \
-                _write16(ss, I2C_ADR_E0(adr), cpu_to_le16(val))
-#define RD16(ss, adr) \
-                _read16(ss, I2C_ADR_C0(adr))
-
-#define EXIT_RC(cmd)    \
-        if ((rc = (cmd)) < 0)   \
-                goto exit_rc
-
-/* Tuner callback */
-static int PLL_Set(struct drx397xD_state *s,
-                   struct dvb_frontend_parameters *fep, int *df_tuner)
-{
-        struct dvb_frontend *fe = &s->frontend;
-        u32 f_tuner, f = fep->frequency;
-        int rc;
-
-        pr_debug("%s\n", __func__);
-
-        if ((f > s->frontend.ops.tuner_ops.info.frequency_max) ||
-            (f < s->frontend.ops.tuner_ops.info.frequency_min))
-                return -EINVAL;
-
-        *df_tuner = 0;
-        if (!s->frontend.ops.tuner_ops.set_params ||
-            !s->frontend.ops.tuner_ops.get_frequency)
-                return -ENOSYS;
-
-        rc = s->frontend.ops.tuner_ops.set_params(fe, fep);
-        if (rc < 0)
-                return rc;
-
-        rc = s->frontend.ops.tuner_ops.get_frequency(fe, &f_tuner);
-        if (rc < 0)
-                return rc;
-
-        *df_tuner = f_tuner - f;
-        pr_debug("%s requested %d [Hz] tuner %d [Hz]\n", __func__, f,
-                 f_tuner);
-
-        return 0;
-}
-
-/* Demodulator helper functions */
-static int SC_WaitForReady(struct drx397xD_state *s)
-{
-        int cnt = 1000;
-        int rc;
-
-        pr_debug("%s\n", __func__);
-
-        while (cnt--) {
-                rc = RD16(s, 0x820043);
-                if (rc == 0)
-                        return 0;
-        }
-
-        return -1;
-}
-
-static int SC_SendCommand(struct drx397xD_state *s, int cmd)
-{
-        int rc;
-
-        pr_debug("%s\n", __func__);
-
-        WR16(s, 0x820043, cmd);
-        SC_WaitForReady(s);
-        rc = RD16(s, 0x820042);
-        if ((rc & 0xffff) == 0xffff)
-                return -1;
-
-        return 0;
-}
-
-static int HI_Command(struct drx397xD_state *s, u16 cmd)
-{
-        int rc, cnt = 1000;
-
-        pr_debug("%s\n", __func__);
-
-        rc = WR16(s, 0x420032, cmd);
-        if (rc < 0)
-                return rc;
-
-        do {
-                rc = RD16(s, 0x420032);
-                if (rc == 0) {
-                        rc = RD16(s, 0x420031);
-                        return rc;
-                }
-                if (rc < 0)
-                        return rc;
-        } while (--cnt);
-
-        return rc;
-}
-
-static int HI_CfgCommand(struct drx397xD_state *s)
-{
-
-        pr_debug("%s\n", __func__);
-
-        WR16(s, 0x420033, 0x3973);
-        WR16(s, 0x420034, s->config.w50);       /* code 4, log 4 */
-        WR16(s, 0x420035, s->config.w52);       /* code 15,  log 9 */
-        WR16(s, 0x420036, s->config.demod_address << 1);
-        WR16(s, 0x420037, s->config.w56);       /* code (set_i2c ??  initX 1 ), log 1 */
-        /* WR16(s, 0x420033, 0x3973); */
-        if ((s->config.w56 & 8) == 0)
-                return HI_Command(s, 3);
-
-        return WR16(s, 0x420032, 0x3);
-}
-
-static const u8 fastIncrDecLUT_15273[] = {
-        0x0e, 0x0f, 0x0f, 0x10, 0x11, 0x12, 0x12, 0x13, 0x14,
-        0x15, 0x16, 0x17, 0x18, 0x1a, 0x1b, 0x1c, 0x1d, 0x1f
-};
-
-static const u8 slowIncrDecLUT_15272[] = {
-        3, 4, 4, 5, 6
-};
-
-static int SetCfgIfAgc(struct drx397xD_state *s, struct drx397xD_CfgIfAgc *agc)
-{
-        u16 w06 = agc->w06;
-        u16 w08 = agc->w08;
-        u16 w0A = agc->w0A;
-        u16 w0C = agc->w0C;
-        int quot, rem, i, rc = -EINVAL;
-
-        pr_debug("%s\n", __func__);
-
-        if (agc->w04 > 0x3ff)
-                goto exit_rc;
-
-        if (agc->d00 == 1) {
-                EXIT_RC(RD16(s, 0x0c20010));
-                rc &= ~0x10;
-                EXIT_RC(WR16(s, 0x0c20010, rc));
-                return WR16(s, 0x0c20030, agc->w04 & 0x7ff);
-        }
-
-        if (agc->d00 != 0)
-                goto exit_rc;
-        if (w0A < w08)
-                goto exit_rc;
-        if (w0A > 0x3ff)
-                goto exit_rc;
-        if (w0C > 0x3ff)
-                goto exit_rc;
-        if (w06 > 0x3ff)
-                goto exit_rc;
-
-        EXIT_RC(RD16(s, 0x0c20010));
-        rc |= 0x10;
-        EXIT_RC(WR16(s, 0x0c20010, rc));
-
-        EXIT_RC(WR16(s, 0x0c20025, (w06 >> 1) & 0x1ff));
-        EXIT_RC(WR16(s, 0x0c20031, (w0A - w08) >> 1));
-        EXIT_RC(WR16(s, 0x0c20032, ((w0A + w08) >> 1) - 0x1ff));
-
-        quot = w0C / 113;
-        rem = w0C % 113;
-        if (quot <= 8) {
-                quot = 8 - quot;
-        } else {
-                quot = 0;
-                rem += 113;
-        }
-
-        EXIT_RC(WR16(s, 0x0c20024, quot));
-
-        i = fastIncrDecLUT_15273[rem / 8];
-        EXIT_RC(WR16(s, 0x0c2002d, i));
-        EXIT_RC(WR16(s, 0x0c2002e, i));
-
-        i = slowIncrDecLUT_15272[rem / 28];
-        EXIT_RC(WR16(s, 0x0c2002b, i));
-        rc = WR16(s, 0x0c2002c, i);
-exit_rc:
-        return rc;
-}
-
-static int SetCfgRfAgc(struct drx397xD_state *s, struct drx397xD_CfgRfAgc *agc)
-{
-        u16 w04 = agc->w04;
-        u16 w06 = agc->w06;
-        int rc = -1;
-
-        pr_debug("%s %d 0x%x 0x%x\n", __func__, agc->d00, w04, w06);
-
-        if (w04 > 0x3ff)
-                goto exit_rc;
-
-        switch (agc->d00) {
-        case 1:
-                if (w04 == 0x3ff)
-                        w04 = 0x400;
-
-                EXIT_RC(WR16(s, 0x0c20036, w04));
-                s->config.w9C &= ~2;
-                EXIT_RC(WR16(s, 0x0c20015, s->config.w9C));
-                EXIT_RC(RD16(s, 0x0c20010));
-                rc &= 0xbfdf;
-                EXIT_RC(WR16(s, 0x0c20010, rc));
-                EXIT_RC(RD16(s, 0x0c20013));
-                rc &= ~2;
-                break;
-        case 0:
-                /* loc_8000659 */
-                s->config.w9C &= ~2;
-                EXIT_RC(WR16(s, 0x0c20015, s->config.w9C));
-                EXIT_RC(RD16(s, 0x0c20010));
-                rc &= 0xbfdf;
-                rc |= 0x4000;
-                EXIT_RC(WR16(s, 0x0c20010, rc));
-                EXIT_RC(WR16(s, 0x0c20051, (w06 >> 4) & 0x3f));
-                EXIT_RC(RD16(s, 0x0c20013));
-                rc &= ~2;
-                break;
-        default:
-                s->config.w9C |= 2;
-                EXIT_RC(WR16(s, 0x0c20015, s->config.w9C));
-                EXIT_RC(RD16(s, 0x0c20010));
-                rc &= 0xbfdf;
-                EXIT_RC(WR16(s, 0x0c20010, rc));
-
-                EXIT_RC(WR16(s, 0x0c20036, 0));
-
-                EXIT_RC(RD16(s, 0x0c20013));
-                rc |= 2;
-        }
-        rc = WR16(s, 0x0c20013, rc);
-
-exit_rc:
-        return rc;
-}
-
-static int GetLockStatus(struct drx397xD_state *s, int *lockstat)
-{
-        int rc;
-
-        *lockstat = 0;
-
-        rc = RD16(s, 0x082004b);
-        if (rc < 0)
-                return rc;
-
-        if (s->config.d60 != 2)
-                return 0;
-
-        if ((rc & 7) == 7)
-                *lockstat |= 1;
-        if ((rc & 3) == 3)
-                *lockstat |= 2;
-        if (rc & 1)
-                *lockstat |= 4;
-        return 0;
-}
-
-static int CorrectSysClockDeviation(struct drx397xD_state *s)
-{
-        int rc = -EINVAL;
-        int lockstat;
-        u32 clk, clk_limit;
-
-        pr_debug("%s\n", __func__);
-
-        if (s->config.d5C == 0) {
-                EXIT_RC(WR16(s, 0x08200e8, 0x010));
-                EXIT_RC(WR16(s, 0x08200e9, 0x113));
-                s->config.d5C = 1;
-                return rc;
-        }
-        if (s->config.d5C != 1)
-                goto exit_rc;
-
-        rc = RD16(s, 0x0820048);
-
-        rc = GetLockStatus(s, &lockstat);
-        if (rc < 0)
-                goto exit_rc;
-        if ((lockstat & 1) == 0)
-                goto exit_rc;
-
-        EXIT_RC(WR16(s, 0x0420033, 0x200));
-        EXIT_RC(WR16(s, 0x0420034, 0xc5));
-        EXIT_RC(WR16(s, 0x0420035, 0x10));
-        EXIT_RC(WR16(s, 0x0420036, 0x1));
-        EXIT_RC(WR16(s, 0x0420037, 0xa));
-        EXIT_RC(HI_Command(s, 6));
-        EXIT_RC(RD16(s, 0x0420040));
-        clk = rc;
-        EXIT_RC(RD16(s, 0x0420041));
-        clk |= rc << 16;
-
-        if (clk <= 0x26ffff)
-                goto exit_rc;
-        if (clk > 0x610000)
-                goto exit_rc;
-
-        if (!s->bandwidth_parm)
-                return -EINVAL;
-
-        /* round & convert to Hz */
-        clk = ((u64) (clk + 0x800000) * s->bandwidth_parm + (1 << 20)) >> 21;
-        clk_limit = s->config.f_osc * MAX_CLOCK_DRIFT / 1000;
-
-        if (clk - s->config.f_osc * 1000 + clk_limit <= 2 * clk_limit) {
-                s->f_osc = clk;
-                pr_debug("%s: osc %d %d [Hz]\n", __func__,
-                         s->config.f_osc * 1000, clk - s->config.f_osc * 1000);
-        }
-        rc = WR16(s, 0x08200e8, 0);
-
-exit_rc:
-        return rc;
-}
-
-static int ConfigureMPEGOutput(struct drx397xD_state *s, int type)
-{
-        int rc, si, bp;
-
-        pr_debug("%s\n", __func__);
-
-        si = s->config.wA0;
-        if (s->config.w98 == 0) {
-                si |= 1;
-                bp = 0;
-        } else {
-                si &= ~1;
-                bp = 0x200;
-        }
-        if (s->config.w9A == 0)
-                si |= 0x80;
-        else
-                si &= ~0x80;
-
-        EXIT_RC(WR16(s, 0x2150045, 0));
-        EXIT_RC(WR16(s, 0x2150010, si));
-        EXIT_RC(WR16(s, 0x2150011, bp));
-        rc = WR16(s, 0x2150012, (type == 0 ? 0xfff : 0));
-
-exit_rc:
-        return rc;
-}
-
-static int drx_tune(struct drx397xD_state *s,
-                    struct dvb_frontend_parameters *fep)
-{
-        u16 v22 = 0;
-        u16 v1C = 0;
-        u16 v1A = 0;
-        u16 v18 = 0;
-        u32 edi = 0, ebx = 0, ebp = 0, edx = 0;
-        u16 v20 = 0, v1E = 0, v16 = 0, v14 = 0, v12 = 0, v10 = 0, v0E = 0;
-
-        int rc, df_tuner = 0;
-        int a, b, c, d;
-        pr_debug("%s %d\n", __func__, s->config.d60);
-
-        if (s->config.d60 != 2)
-                goto set_tuner;
-        rc = CorrectSysClockDeviation(s);
-        if (rc < 0)
-                goto set_tuner;
-
-        s->config.d60 = 1;
-        rc = ConfigureMPEGOutput(s, 0);
-        if (rc < 0)
-                goto set_tuner;
-set_tuner:
-
-        rc = PLL_Set(s, fep, &df_tuner);
-        if (rc < 0) {
-                printk(KERN_ERR "Error in pll_set\n");
-                goto exit_rc;
-        }
-        msleep(200);
-
-        a = rc = RD16(s, 0x2150016);
-        if (rc < 0)
-                goto exit_rc;
-        b = rc = RD16(s, 0x2150010);
-        if (rc < 0)
-                goto exit_rc;
-        c = rc = RD16(s, 0x2150034);
-        if (rc < 0)
-                goto exit_rc;
-        d = rc = RD16(s, 0x2150035);
-        if (rc < 0)
-                goto exit_rc;
-        rc = WR16(s, 0x2150014, c);
-        rc = WR16(s, 0x2150015, d);
-        rc = WR16(s, 0x2150010, 0);
-        rc = WR16(s, 0x2150000, 2);
-        rc = WR16(s, 0x2150036, 0x0fff);
-        rc = WR16(s, 0x2150016, a);
-
-        rc = WR16(s, 0x2150010, 2);
-        rc = WR16(s, 0x2150007, 0);
-        rc = WR16(s, 0x2150000, 1);
-        rc = WR16(s, 0x2110000, 0);
-        rc = WR16(s, 0x0800000, 0);
-        rc = WR16(s, 0x2800000, 0);
-        rc = WR16(s, 0x2110010, 0x664);
-
-        rc = write_fw(s, DRXD_ResetECRAM);
-        rc = WR16(s, 0x2110000, 1);
-
-        rc = write_fw(s, DRXD_InitSC);
-        if (rc < 0)
-                goto exit_rc;
-
-        rc = SetCfgIfAgc(s, &s->config.ifagc);
-        if (rc < 0)
-                goto exit_rc;
-
-        rc = SetCfgRfAgc(s, &s->config.rfagc);
-        if (rc < 0)
-                goto exit_rc;
-
-        if (fep->u.ofdm.transmission_mode != TRANSMISSION_MODE_2K)
-                v22 = 1;
-        switch (fep->u.ofdm.transmission_mode) {
-        case TRANSMISSION_MODE_8K:
-                edi = 1;
-                if (s->chip_rev == DRXD_FW_B1)
-                        break;
-
-                rc = WR16(s, 0x2010010, 0);
-                if (rc < 0)
-                        break;
-                v1C = 0x63;
-                v1A = 0x53;
-                v18 = 0x43;
-                break;
-        default:
-                edi = 0;
-                if (s->chip_rev == DRXD_FW_B1)
-                        break;
-
-                rc = WR16(s, 0x2010010, 1);
-                if (rc < 0)
-                        break;
-
-                v1C = 0x61;
-                v1A = 0x47;
-                v18 = 0x41;
-        }
-
-        switch (fep->u.ofdm.guard_interval) {
-        case GUARD_INTERVAL_1_4:
-                edi |= 0x0c;
-                break;
-        case GUARD_INTERVAL_1_8:
-                edi |= 0x08;
-                break;
-        case GUARD_INTERVAL_1_16:
-                edi |= 0x04;
-                break;
-        case GUARD_INTERVAL_1_32:
-                break;
-        default:
-                v22 |= 2;
-        }
-
-        ebx = 0;
-        ebp = 0;
-        v20 = 0;
-        v1E = 0;
-        v16 = 0;
-        v14 = 0;
-        v12 = 0;
-        v10 = 0;
-        v0E = 0;
-
-        switch (fep->u.ofdm.hierarchy_information) {
-        case HIERARCHY_1:
-                edi |= 0x40;
-                if (s->chip_rev == DRXD_FW_B1)
-                        break;
-                rc = WR16(s, 0x1c10047, 1);
-                if (rc < 0)
-                        goto exit_rc;
-                rc = WR16(s, 0x2010012, 1);
-                if (rc < 0)
-                        goto exit_rc;
-                ebx = 0x19f;
-                ebp = 0x1fb;
-                v20 = 0x0c0;
-                v1E = 0x195;
-                v16 = 0x1d6;
-                v14 = 0x1ef;
-                v12 = 4;
-                v10 = 5;
-                v0E = 5;
-                break;
-        case HIERARCHY_2:
-                edi |= 0x80;
-                if (s->chip_rev == DRXD_FW_B1)
-                        break;
-                rc = WR16(s, 0x1c10047, 2);
-                if (rc < 0)
-                        goto exit_rc;
-                rc = WR16(s, 0x2010012, 2);
-                if (rc < 0)
-                        goto exit_rc;
-                ebx = 0x08f;
-                ebp = 0x12f;
-                v20 = 0x0c0;
-                v1E = 0x11e;
-                v16 = 0x1d6;
-                v14 = 0x15e;
-                v12 = 4;
-                v10 = 5;
-                v0E = 5;
-                break;
-        case HIERARCHY_4:
-                edi |= 0xc0;
-                if (s->chip_rev == DRXD_FW_B1)
-                        break;
-                rc = WR16(s, 0x1c10047, 3);
-                if (rc < 0)
-                        goto exit_rc;
-                rc = WR16(s, 0x2010012, 3);
-                if (rc < 0)
-                        goto exit_rc;
-                ebx = 0x14d;
-                ebp = 0x197;
-                v20 = 0x0c0;
-                v1E = 0x1ce;
-                v16 = 0x1d6;
-                v14 = 0x11a;
-                v12 = 4;
-                v10 = 6;
-                v0E = 5;
-                break;
-        default:
-                v22 |= 8;
-                if (s->chip_rev == DRXD_FW_B1)
-                        break;
-                rc = WR16(s, 0x1c10047, 0);
-                if (rc < 0)
-                        goto exit_rc;
-                rc = WR16(s, 0x2010012, 0);
-                if (rc < 0)
-                        goto exit_rc;
-                                /* QPSK    QAM16  QAM64 */
-                ebx = 0x19f;    /*                 62   */
-                ebp = 0x1fb;    /*                 15   */
-                v20 = 0x16a;    /*  62                  */
-                v1E = 0x195;    /*         62           */
-                v16 = 0x1bb;    /*  15                  */
-                v14 = 0x1ef;    /*         15           */
-                v12 = 5;        /*  16                  */
-                v10 = 5;        /*         16           */
-                v0E = 5;        /*                 16   */
-        }
-
-        switch (fep->u.ofdm.constellation) {
-        default:
-                v22 |= 4;
-        case QPSK:
-                if (s->chip_rev == DRXD_FW_B1)
-                        break;
-
-                rc = WR16(s, 0x1c10046, 0);
-                if (rc < 0)
-                        goto exit_rc;
-                rc = WR16(s, 0x2010011, 0);
-                if (rc < 0)
-                        goto exit_rc;
-                rc = WR16(s, 0x201001a, 0x10);
-                if (rc < 0)
-                        goto exit_rc;
-                rc = WR16(s, 0x201001b, 0);
-                if (rc < 0)
-                        goto exit_rc;
-                rc = WR16(s, 0x201001c, 0);
-                if (rc < 0)
-                        goto exit_rc;
-                rc = WR16(s, 0x1c10062, v20);
-                if (rc < 0)
-                        goto exit_rc;
-                rc = WR16(s, 0x1c1002a, v1C);
-                if (rc < 0)
-                        goto exit_rc;
-                rc = WR16(s, 0x1c10015, v16);
-                if (rc < 0)
-                        goto exit_rc;
-                rc = WR16(s, 0x1c10016, v12);
-                if (rc < 0)
-                        goto exit_rc;
-                break;
-        case QAM_16:
-                edi |= 0x10;
-                if (s->chip_rev == DRXD_FW_B1)
-                        break;
-
-                rc = WR16(s, 0x1c10046, 1);
-                if (rc < 0)
-                        goto exit_rc;
-                rc = WR16(s, 0x2010011, 1);
-                if (rc < 0)
-                        goto exit_rc;
-                rc = WR16(s, 0x201001a, 0x10);
-                if (rc < 0)
-                        goto exit_rc;
-                rc = WR16(s, 0x201001b, 4);
-                if (rc < 0)
-                        goto exit_rc;
-                rc = WR16(s, 0x201001c, 0);
-                if (rc < 0)
-                        goto exit_rc;
-                rc = WR16(s, 0x1c10062, v1E);
-                if (rc < 0)
-                        goto exit_rc;
-                rc = WR16(s, 0x1c1002a, v1A);
-                if (rc < 0)
-                        goto exit_rc;
-                rc = WR16(s, 0x1c10015, v14);
-                if (rc < 0)
-                        goto exit_rc;
-                rc = WR16(s, 0x1c10016, v10);
-                if (rc < 0)
-                        goto exit_rc;
-                break;
-        case QAM_64:
-                edi |= 0x20;
-                rc = WR16(s, 0x1c10046, 2);
-                if (rc < 0)
-                        goto exit_rc;
-                rc = WR16(s, 0x2010011, 2);
-                if (rc < 0)
-                        goto exit_rc;
-                rc = WR16(s, 0x201001a, 0x20);
-                if (rc < 0)
-                        goto exit_rc;
-                rc = WR16(s, 0x201001b, 8);
-                if (rc < 0)
-                        goto exit_rc;
-                rc = WR16(s, 0x201001c, 2);
-                if (rc < 0)
-                        goto exit_rc;
-                rc = WR16(s, 0x1c10062, ebx);
-                if (rc < 0)
-                        goto exit_rc;
-                rc = WR16(s, 0x1c1002a, v18);
-                if (rc < 0)
-                        goto exit_rc;
-                rc = WR16(s, 0x1c10015, ebp);
-                if (rc < 0)
-                        goto exit_rc;
-                rc = WR16(s, 0x1c10016, v0E);
-                if (rc < 0)
-                        goto exit_rc;
-                break;
-        }
-
-        if (s->config.s20d24 == 1) {
-                rc = WR16(s, 0x2010013, 0);
-        } else {
-                rc = WR16(s, 0x2010013, 1);
-                edi |= 0x1000;
-        }
-
-        switch (fep->u.ofdm.code_rate_HP) {
-        default:
-                v22 |= 0x10;
-        case FEC_1_2:
-                if (s->chip_rev == DRXD_FW_B1)
-                        break;
-                rc = WR16(s, 0x2090011, 0);
-                break;
-        case FEC_2_3:
-                edi |= 0x200;
-                if (s->chip_rev == DRXD_FW_B1)
-                        break;
-                rc = WR16(s, 0x2090011, 1);
-                break;
-        case FEC_3_4:
-                edi |= 0x400;
-                if (s->chip_rev == DRXD_FW_B1)
-                        break;
-                rc = WR16(s, 0x2090011, 2);
-                break;
-        case FEC_5_6:           /* 5 */
-                edi |= 0x600;
-                if (s->chip_rev == DRXD_FW_B1)
-                        break;
-                rc = WR16(s, 0x2090011, 3);
-                break;
-        case FEC_7_8:           /* 7 */
-                edi |= 0x800;
-                if (s->chip_rev == DRXD_FW_B1)
-                        break;
-                rc = WR16(s, 0x2090011, 4);
-                break;
-        };
-        if (rc < 0)
-                goto exit_rc;
-
-        switch (fep->u.ofdm.bandwidth) {
-        default:
-                rc = -EINVAL;
-                goto exit_rc;
-        case BANDWIDTH_8_MHZ:   /* 0 */
-        case BANDWIDTH_AUTO:
-                rc = WR16(s, 0x0c2003f, 0x32);
-                s->bandwidth_parm = ebx = 0x8b8249;
-                edx = 0;
-                break;
-        case BANDWIDTH_7_MHZ:
-                rc = WR16(s, 0x0c2003f, 0x3b);
-                s->bandwidth_parm = ebx = 0x7a1200;
-                edx = 0x4807;
-                break;
-        case BANDWIDTH_6_MHZ:
-                rc = WR16(s, 0x0c2003f, 0x47);
-                s->bandwidth_parm = ebx = 0x68a1b6;
-                edx = 0x0f07;
-                break;
-        };
-
-        if (rc < 0)
-                goto exit_rc;
-
-        rc = WR16(s, 0x08200ec, edx);
-        if (rc < 0)
-                goto exit_rc;
-
-        rc = RD16(s, 0x0820050);
-        if (rc < 0)
-                goto exit_rc;
-        rc = WR16(s, 0x0820050, rc);
-
-        {
-                /* Configure bandwidth specific factor */
-                ebx = div64_u64(((u64) (s->f_osc) << 21) + (ebx >> 1),
-                                     (u64)ebx) - 0x800000;
-                EXIT_RC(WR16(s, 0x0c50010, ebx & 0xffff));
-                EXIT_RC(WR16(s, 0x0c50011, ebx >> 16));
-
-                /* drx397xD oscillator calibration */
-                ebx = div64_u64(((u64) (s->config.f_if + df_tuner) << 28) +
-                                     (s->f_osc >> 1), (u64)s->f_osc);
-        }
-        ebx &= 0xfffffff;
-        if (fep->inversion == INVERSION_ON)
-                ebx = 0x10000000 - ebx;
-
-        EXIT_RC(WR16(s, 0x0c30010, ebx & 0xffff));
-        EXIT_RC(WR16(s, 0x0c30011, ebx >> 16));
-
-        EXIT_RC(WR16(s, 0x0800000, 1));
-        EXIT_RC(RD16(s, 0x0800000));
-
-
-        EXIT_RC(SC_WaitForReady(s));
-        EXIT_RC(WR16(s, 0x0820042, 0));
-        EXIT_RC(WR16(s, 0x0820041, v22));
-        EXIT_RC(WR16(s, 0x0820040, edi));
-        EXIT_RC(SC_SendCommand(s, 3));
-
-        rc = RD16(s, 0x0800000);
-
-        SC_WaitForReady(s);
-        WR16(s, 0x0820042, 0);
-        WR16(s, 0x0820041, 1);
-        WR16(s, 0x0820040, 1);
-        SC_SendCommand(s, 1);
-
-
-        rc = WR16(s, 0x2150000, 2);
-        rc = WR16(s, 0x2150016, a);
-        rc = WR16(s, 0x2150010, 4);
-        rc = WR16(s, 0x2150036, 0);
-        rc = WR16(s, 0x2150000, 1);
-        s->config.d60 = 2;
-
-exit_rc:
-        return rc;
-}
-
-/*******************************************************************************
- * DVB interface
- ******************************************************************************/
-
-static int drx397x_init(struct dvb_frontend *fe)
-{
-        struct drx397xD_state *s = fe->demodulator_priv;
-        int rc;
-
-        pr_debug("%s\n", __func__);
-
-        s->config.rfagc.d00 = 2;        /* 0x7c */
-        s->config.rfagc.w04 = 0;
-        s->config.rfagc.w06 = 0x3ff;
-
-        s->config.ifagc.d00 = 0;        /* 0x68 */
-        s->config.ifagc.w04 = 0;
-        s->config.ifagc.w06 = 140;
-        s->config.ifagc.w08 = 0;
-        s->config.ifagc.w0A = 0x3ff;
-        s->config.ifagc.w0C = 0x388;
-
-        /* for signal strenght calculations */
-        s->config.ss76 = 820;
-        s->config.ss78 = 2200;
-        s->config.ss7A = 150;
-
-        /* HI_CfgCommand */
-        s->config.w50 = 4;
-        s->config.w52 = 9;
-
-        s->config.f_if = 42800000;      /* d14: intermediate frequency [Hz] */
-        s->config.f_osc = 48000;        /* s66 : oscillator frequency [kHz] */
-        s->config.w92 = 12000;
-
-        s->config.w9C = 0x000e;
-        s->config.w9E = 0x0000;
-
-        /* ConfigureMPEGOutput params */
-        s->config.wA0 = 4;
-        s->config.w98 = 1;
-        s->config.w9A = 1;
-
-        /* get chip revision */
-        rc = RD16(s, 0x2410019);
-        if (rc < 0)
-                return -ENODEV;
-
-        if (rc == 0) {
-                printk(KERN_INFO "%s: chip revision A2\n", mod_name);
-                rc = drx_load_fw(s, DRXD_FW_A2);
-        } else {
-
-                rc = (rc >> 12) - 3;
-                switch (rc) {
-                case 1:
-                        s->flags |= F_SET_0D4h;
-                case 0:
-                case 4:
-                        s->flags |= F_SET_0D0h;
-                        break;
-                case 2:
-                case 5:
-                        break;
-                case 3:
-                        s->flags |= F_SET_0D4h;
-                        break;
-                default:
-                        return -ENODEV;
-                };
-                printk(KERN_INFO "%s: chip revision B1.%d\n", mod_name, rc);
-                rc = drx_load_fw(s, DRXD_FW_B1);
-        }
-        if (rc < 0)
-                goto error;
-
-        rc = WR16(s, 0x0420033, 0x3973);
-        if (rc < 0)
-                goto error;
-
-        rc = HI_Command(s, 2);
-
-        msleep(1);
-
-        if (s->chip_rev == DRXD_FW_A2) {
-                rc = WR16(s, 0x043012d, 0x47F);
-                if (rc < 0)
-                        goto error;
-        }
-        rc = WR16_E0(s, 0x0400000, 0);
-        if (rc < 0)
-                goto error;
-
-        if (s->config.w92 > 20000 || s->config.w92 % 4000) {
-                printk(KERN_ERR "%s: invalid osc frequency\n", mod_name);
-                rc = -1;
-                goto error;
-        }
-
-        rc = WR16(s, 0x2410010, 1);
-        if (rc < 0)
-                goto error;
-        rc = WR16(s, 0x2410011, 0x15);
-        if (rc < 0)
-                goto error;
-        rc = WR16(s, 0x2410012, s->config.w92 / 4000);
-        if (rc < 0)
-                goto error;
-#ifdef ORIG_FW
-        rc = WR16(s, 0x2410015, 2);
-        if (rc < 0)
-                goto error;
-#endif
-        rc = WR16(s, 0x2410017, 0x3973);
-        if (rc < 0)
-                goto error;
-
-        s->f_osc = s->config.f_osc * 1000;      /* initial estimator */
-
-        s->config.w56 = 1;
-
-        rc = HI_CfgCommand(s);
-        if (rc < 0)
-                goto error;
-
-        rc = write_fw(s, DRXD_InitAtomicRead);
-        if (rc < 0)
-                goto error;
-
-        if (s->chip_rev == DRXD_FW_A2) {
-                rc = WR16(s, 0x2150013, 0);
-                if (rc < 0)
-                        goto error;
-        }
-
-        rc = WR16_E0(s, 0x0400002, 0);
-        if (rc < 0)
-                goto error;
-        rc = WR16(s, 0x0400002, 0);
-        if (rc < 0)
-                goto error;
-
-        if (s->chip_rev == DRXD_FW_A2) {
-                rc = write_fw(s, DRXD_ResetCEFR);
-                if (rc < 0)
-                        goto error;
-        }
-        rc = write_fw(s, DRXD_microcode);
-        if (rc < 0)
-                goto error;
-
-        s->config.w9C = 0x0e;
-        if (s->flags & F_SET_0D0h) {
-                s->config.w9C = 0;
-                rc = RD16(s, 0x0c20010);
-                if (rc < 0)
-                        goto write_DRXD_InitFE_1;
-
-                rc &= ~0x1000;
-                rc = WR16(s, 0x0c20010, rc);
-                if (rc < 0)
-                        goto write_DRXD_InitFE_1;
-
-                rc = RD16(s, 0x0c20011);
-                if (rc < 0)
-                        goto write_DRXD_InitFE_1;
-
-                rc &= ~0x8;
-                rc = WR16(s, 0x0c20011, rc);
-                if (rc < 0)
-                        goto write_DRXD_InitFE_1;
-
-                rc = WR16(s, 0x0c20012, 1);
-        }
-
-write_DRXD_InitFE_1:
-
-        rc = write_fw(s, DRXD_InitFE_1);
-        if (rc < 0)
-                goto error;
-
-        rc = 1;
-        if (s->chip_rev == DRXD_FW_B1) {
-                if (s->flags & F_SET_0D0h)
-                        rc = 0;
-        } else {
-                if (s->flags & F_SET_0D0h)
-                        rc = 4;
-        }
-
-        rc = WR16(s, 0x0C20012, rc);
-        if (rc < 0)
-                goto error;
-
-        rc = WR16(s, 0x0C20013, s->config.w9E);
-        if (rc < 0)
-                goto error;
-        rc = WR16(s, 0x0C20015, s->config.w9C);
-        if (rc < 0)
-                goto error;
-
-        rc = write_fw(s, DRXD_InitFE_2);
-        if (rc < 0)
-                goto error;
-        rc = write_fw(s, DRXD_InitFT);
-        if (rc < 0)
-                goto error;
-        rc = write_fw(s, DRXD_InitCP);
-        if (rc < 0)
-                goto error;
-        rc = write_fw(s, DRXD_InitCE);
-        if (rc < 0)
-                goto error;
-        rc = write_fw(s, DRXD_InitEQ);
-        if (rc < 0)
-                goto error;
-        rc = write_fw(s, DRXD_InitEC);
-        if (rc < 0)
-                goto error;
-        rc = write_fw(s, DRXD_InitSC);
-        if (rc < 0)
-                goto error;
-
-        rc = SetCfgIfAgc(s, &s->config.ifagc);
-        if (rc < 0)
-                goto error;
-
-        rc = SetCfgRfAgc(s, &s->config.rfagc);
-        if (rc < 0)
-                goto error;
-
-        rc = ConfigureMPEGOutput(s, 1);
-        rc = WR16(s, 0x08201fe, 0x0017);
-        rc = WR16(s, 0x08201ff, 0x0101);
-
-        s->config.d5C = 0;
-        s->config.d60 = 1;
-        s->config.d48 = 1;
-
-error:
-        return rc;
-}
-
-static int drx397x_get_frontend(struct dvb_frontend *fe,
-                                struct dvb_frontend_parameters *params)
-{
-        return 0;
-}
-
-static int drx397x_set_frontend(struct dvb_frontend *fe,
-                                struct dvb_frontend_parameters *params)
-{
-        struct drx397xD_state *s = fe->demodulator_priv;
-
-        s->config.s20d24 = 1;
-
-        return drx_tune(s, params);
-}
-
-static int drx397x_get_tune_settings(struct dvb_frontend *fe,
-                                     struct dvb_frontend_tune_settings
-                                     *fe_tune_settings)
-{
-        fe_tune_settings->min_delay_ms = 10000;
-        fe_tune_settings->step_size = 0;
-        fe_tune_settings->max_drift = 0;
-
-        return 0;
-}
-
-static int drx397x_read_status(struct dvb_frontend *fe, fe_status_t *status)
-{
-        struct drx397xD_state *s = fe->demodulator_priv;
-        int lockstat;
-
-        GetLockStatus(s, &lockstat);
-
-        *status = 0;
-        if (lockstat & 2) {
-                CorrectSysClockDeviation(s);
-                ConfigureMPEGOutput(s, 1);
-                *status = FE_HAS_LOCK | FE_HAS_SYNC | FE_HAS_VITERBI;
-        }
-        if (lockstat & 4)
-                *status |= FE_HAS_CARRIER | FE_HAS_SIGNAL;
-
-        return 0;
-}
-
-static int drx397x_read_ber(struct dvb_frontend *fe, unsigned int *ber)
-{
-        *ber = 0;
-
-        return 0;
-}
-
-static int drx397x_read_snr(struct dvb_frontend *fe, u16 *snr)
-{
-        *snr = 0;
-
-        return 0;
-}
-
-static int drx397x_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
-{
-        struct drx397xD_state *s = fe->demodulator_priv;
-        int rc;
-
-        if (s->config.ifagc.d00 == 2) {
-                *strength = 0xffff;
-                return 0;
-        }
-        rc = RD16(s, 0x0c20035);
-        if (rc < 0) {
-                *strength = 0;
-                return 0;
-        }
-        rc &= 0x3ff;
-        /* Signal strength is calculated using the following formula:
-         *
-         * a = 2200 * 150 / (2200 + 150);
-         * a = a * 3300 /  (a + 820);
-         * b = 2200 * 3300 / (2200 + 820);
-         * c = (((b-a) * rc) >> 10  + a) << 4;
-         * strength = ~c & 0xffff;
-         *
-         * The following does the same but with less rounding errors:
-         */
-        *strength = ~(7720 + (rc * 30744 >> 10));
-
-        return 0;
-}
-
-static int drx397x_read_ucblocks(struct dvb_frontend *fe,
-                                 unsigned int *ucblocks)
-{
-        *ucblocks = 0;
-
-        return 0;
-}
-
-static int drx397x_sleep(struct dvb_frontend *fe)
-{
-        return 0;
-}
-
-static void drx397x_release(struct dvb_frontend *fe)
-{
-        struct drx397xD_state *s = fe->demodulator_priv;
-        printk(KERN_INFO "%s: release demodulator\n", mod_name);
-        if (s) {
-                drx_release_fw(s);
-                kfree(s);
-        }
-
-}
-
-static struct dvb_frontend_ops drx397x_ops = {
-
-        .info = {
-                 .name                  = "Micronas DRX397xD DVB-T Frontend",
-                 .type                  = FE_OFDM,
-                 .frequency_min         = 47125000,
-                 .frequency_max         = 855250000,
-                 .frequency_stepsize    = 166667,
-                 .frequency_tolerance   = 0,
-                 .caps =                                  /* 0x0C01B2EAE */
-                         FE_CAN_FEC_1_2                 | /* = 0x2, */
-                         FE_CAN_FEC_2_3                 | /* = 0x4, */
-                         FE_CAN_FEC_3_4                 | /* = 0x8, */
-                         FE_CAN_FEC_5_6                 | /* = 0x20, */
-                         FE_CAN_FEC_7_8                 | /* = 0x80, */
-                         FE_CAN_FEC_AUTO                | /* = 0x200, */
-                         FE_CAN_QPSK                    | /* = 0x400, */
-                         FE_CAN_QAM_16                  | /* = 0x800, */
-                         FE_CAN_QAM_64                  | /* = 0x2000, */
-                         FE_CAN_QAM_AUTO                | /* = 0x10000, */
-                         FE_CAN_TRANSMISSION_MODE_AUTO  | /* = 0x20000, */
-                         FE_CAN_GUARD_INTERVAL_AUTO     | /* = 0x80000, */
-                         FE_CAN_HIERARCHY_AUTO          | /* = 0x100000, */
-                         FE_CAN_RECOVER                 | /* = 0x40000000, */
-                         FE_CAN_MUTE_TS                   /* = 0x80000000 */
-         },
-
-        .release = drx397x_release,
-        .init = drx397x_init,
-        .sleep = drx397x_sleep,
-
-        .set_frontend = drx397x_set_frontend,
-        .get_tune_settings = drx397x_get_tune_settings,
-        .get_frontend = drx397x_get_frontend,
-
-        .read_status = drx397x_read_status,
-        .read_snr = drx397x_read_snr,
-        .read_signal_strength = drx397x_read_signal_strength,
-        .read_ber = drx397x_read_ber,
-        .read_ucblocks = drx397x_read_ucblocks,
-};
-
-struct dvb_frontend *drx397xD_attach(const struct drx397xD_config *config,
-                                     struct i2c_adapter *i2c)
-{
-        struct drx397xD_state *state;
-
-        /* allocate memory for the internal state */
-        state = kzalloc(sizeof(struct drx397xD_state), GFP_KERNEL);
-        if (!state)
-                goto error;
-
-        /* setup the state */
-        state->i2c = i2c;
-        memcpy(&state->config, config, sizeof(struct drx397xD_config));
-
-        /* check if the demod is there */
-        if (RD16(state, 0x2410019) < 0)
-                goto error;
-
-        /* create dvb_frontend */
-        memcpy(&state->frontend.ops, &drx397x_ops,
-                        sizeof(struct dvb_frontend_ops));
-        state->frontend.demodulator_priv = state;
-
-        return &state->frontend;
-error:
-        kfree(state);
-
-        return NULL;
-}
-EXPORT_SYMBOL(drx397xD_attach);
-
-MODULE_DESCRIPTION("Micronas DRX397xD DVB-T Frontend");
-MODULE_AUTHOR("Henk Vergonet");
-MODULE_LICENSE("GPL");
-
diff --git a/drivers/media/dvb/frontends/drx397xD.h b/drivers/media/dvb/frontends/drx397xD.h
deleted file mode 100644
index ba05d17290c6..000000000000
--- a/drivers/media/dvb/frontends/drx397xD.h
+++ /dev/null
@@ -1,130 +0,0 @@
-/*
- *  Driver for Micronas DVB-T drx397xD demodulator
- *
- *  Copyright (C) 2007 Henk vergonet <Henk.Vergonet@gmail.com>
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License
- *  along with this program; if not, write to the Free Software
- *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.=
- */
-
-#ifndef _DRX397XD_H_INCLUDED
-#define _DRX397XD_H_INCLUDED
-
-#include <linux/dvb/frontend.h>
-
-#define DRX_F_STEPSIZE  166667
-#define DRX_F_OFFSET    36000000
-
-#define I2C_ADR_C0(x) \
-(       cpu_to_le32( \
-                (u32)( \
-                        (((u32)(x) & (u32)0x000000ffUL)      ) | \
-                        (((u32)(x) & (u32)0x0000ff00UL) << 16) | \
-                        (((u32)(x) & (u32)0x0fff0000UL) >>  8) | \
-                         (           (u32)0x00c00000UL)          \
-                      )) \
-)
-
-#define I2C_ADR_E0(x) \
-(       cpu_to_le32( \
-                (u32)( \
-                        (((u32)(x) & (u32)0x000000ffUL)      ) | \
-                        (((u32)(x) & (u32)0x0000ff00UL) << 16) | \
-                        (((u32)(x) & (u32)0x0fff0000UL) >>  8) | \
-                         (           (u32)0x00e00000UL)          \
-                      )) \
-)
-
-struct drx397xD_CfgRfAgc        /* 0x7c */
-{
-        int d00;        /* 2 */
-        u16 w04;
-        u16 w06;
-};
-
-struct drx397xD_CfgIfAgc        /* 0x68 */
-{
-        int d00;        /* 0 */
-        u16 w04;        /* 0 */
-        u16 w06;
-        u16 w08;
-        u16 w0A;
-        u16 w0C;
-};
-
-struct drx397xD_s20 {
-        int d04;
-        u32 d18;
-        u32 d1C;
-        u32 d20;
-        u32 d14;
-        u32 d24;
-        u32 d0C;
-        u32 d08;
-};
-
-struct drx397xD_config
-{
-        /* demodulator's I2C address */
-        u8      demod_address;          /* 0x0f */
-
-        struct drx397xD_CfgIfAgc  ifagc;  /* 0x68 */
-        struct drx397xD_CfgRfAgc  rfagc;  /* 0x7c */
-        u32     s20d24;
-
-        /* HI_CfgCommand parameters */
-        u16     w50, w52, /* w54, */ w56;
-
-        int     d5C;
-        int     d60;
-        int     d48;
-        int     d28;
-
-        u32     f_if;   /* d14: intermediate frequency [Hz]             */
-                        /*      36000000 on Cinergy 2400i DT            */
-                        /*      42800000 on Pinnacle Hybrid PRO 330e    */
-
-        u16     f_osc;  /* s66: 48000 oscillator frequency [kHz]        */
-
-        u16     w92;    /* 20000 */
-
-        u16     wA0;
-        u16     w98;
-        u16     w9A;
-
-        u16     w9C;    /* 0xe0 */
-        u16     w9E;    /* 0x00 */
-
-        /* used for signal strength calculations in
-           drx397x_read_signal_strength
-        */
-        u16     ss78;   // 2200
-        u16     ss7A;   // 150
-        u16     ss76;   // 820
-};
-
-#if defined(CONFIG_DVB_DRX397XD) || (defined(CONFIG_DVB_DRX397XD_MODULE) && defined(MODULE))
-extern struct dvb_frontend* drx397xD_attach(const struct drx397xD_config *config,
-                                           struct i2c_adapter *i2c);
-#else
-static inline struct dvb_frontend* drx397xD_attach(const struct drx397xD_config *config,
-                                           struct i2c_adapter *i2c)
-{
-        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
-        return NULL;
-}
-#endif /* CONFIG_DVB_DRX397XD */
-
-#endif /* _DRX397XD_H_INCLUDED */
diff --git a/drivers/media/dvb/frontends/drx397xD_fw.h b/drivers/media/dvb/frontends/drx397xD_fw.h
deleted file mode 100644
index c8b44c1e807f..000000000000
--- a/drivers/media/dvb/frontends/drx397xD_fw.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * Firmware definitions for Micronas drx397xD
- *
- * Copyright (C) 2007 Henk Vergonet <Henk.Vergonet@gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; If not, see <http://www.gnu.org/licenses/>.
- */
-
-#ifdef _FW_ENTRY
-        _FW_ENTRY("drx397xD.A2.fw",     DRXD_FW_A2 = 0, DRXD_FW_A2      ),
-        _FW_ENTRY("drx397xD.B1.fw",     DRXD_FW_B1,     DRXD_FW_B1      ),
-#undef _FW_ENTRY
-#endif /* _FW_ENTRY */
-
-#ifdef _BLOB_ENTRY
-        _BLOB_ENTRY("InitAtomicRead",   DRXD_InitAtomicRead = 0 ),
-        _BLOB_ENTRY("InitCE",           DRXD_InitCE             ),
-        _BLOB_ENTRY("InitCP",           DRXD_InitCP             ),
-        _BLOB_ENTRY("InitEC",           DRXD_InitEC             ),
-        _BLOB_ENTRY("InitEQ",           DRXD_InitEQ             ),
-        _BLOB_ENTRY("InitFE_1",         DRXD_InitFE_1           ),
-        _BLOB_ENTRY("InitFE_2",         DRXD_InitFE_2           ),
-        _BLOB_ENTRY("InitFT",           DRXD_InitFT             ),
-        _BLOB_ENTRY("InitSC",           DRXD_InitSC             ),
-        _BLOB_ENTRY("ResetCEFR",        DRXD_ResetCEFR          ),
-        _BLOB_ENTRY("ResetECRAM",       DRXD_ResetECRAM         ),
-        _BLOB_ENTRY("microcode",        DRXD_microcode          ),
-#undef _BLOB_ENTRY
-#endif /* _BLOB_ENTRY */
diff --git a/drivers/media/dvb/frontends/drxd.h b/drivers/media/dvb/frontends/drxd.h
new file mode 100644
index 000000000000..7113535844f2
--- /dev/null
+++ b/drivers/media/dvb/frontends/drxd.h
@@ -0,0 +1,61 @@
+/*
+ * drxd.h: DRXD DVB-T demodulator driver
+ *
+ * Copyright (C) 2005-2007 Micronas
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 only, as published by the Free Software Foundation.
+ *
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA
+ * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
+ */
+
+#ifndef _DRXD_H_
+#define _DRXD_H_
+
+#include <linux/types.h>
+#include <linux/i2c.h>
+
+struct drxd_config {
+        u8 index;
+
+        u8 pll_address;
+        u8 pll_type;
+#define DRXD_PLL_NONE     0
+#define DRXD_PLL_DTT7520X 1
+#define DRXD_PLL_MT3X0823 2
+
+        u32 clock;
+        u8 insert_rs_byte;
+
+        u8 demod_address;
+        u8 demoda_address;
+        u8 demod_revision;
+
+        /* If the tuner is not behind an i2c gate, be sure to flip this bit
+           or else the i2c bus could get wedged */
+        u8 disable_i2c_gate_ctrl;
+
+        u32 IF;
+        int (*pll_set) (void *priv, void *priv_params,
+                        u8 pll_addr, u8 demoda_addr, s32 *off);
+         s16(*osc_deviation) (void *priv, s16 dev, int flag);
+};
+
+extern
+struct dvb_frontend *drxd_attach(const struct drxd_config *config,
+                                 void *priv, struct i2c_adapter *i2c,
+                                 struct device *dev);
+extern int drxd_config_i2c(struct dvb_frontend *, int);
+#endif
diff --git a/drivers/media/dvb/frontends/drxd_firm.c b/drivers/media/dvb/frontends/drxd_firm.c
new file mode 100644
index 000000000000..5418b0b1dadc
--- /dev/null
+++ b/drivers/media/dvb/frontends/drxd_firm.c
@@ -0,0 +1,929 @@
+/*
+ * drxd_firm.c : DRXD firmware tables
+ *
+ * Copyright (C) 2006-2007 Micronas
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 only, as published by the Free Software Foundation.
+ *
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA
+ * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
+ */
+
+/* TODO: generate this file with a script from a settings file */
+
+/* Contains A2 firmware version: 1.4.2
+ * Contains B1 firmware version: 3.3.33
+ * Contains settings from driver 1.4.23
+*/
+
+#include "drxd_firm.h"
+
+#define ADDRESS(x)     ((x) & 0xFF), (((x)>>8) & 0xFF), (((x)>>16) & 0xFF), (((x)>>24) & 0xFF)
+#define LENGTH(x)      ((x) & 0xFF), (((x)>>8) & 0xFF)
+
+/* Is written via block write, must be little endian */
+#define DATA16(x)      ((x) & 0xFF), (((x)>>8) & 0xFF)
+
+#define WRBLOCK(a, l) ADDRESS(a), LENGTH(l)
+#define WR16(a, d) ADDRESS(a), LENGTH(1), DATA16(d)
+
+#define END_OF_TABLE      0xFF, 0xFF, 0xFF, 0xFF
+
+/* HI firmware patches */
+
+#define HI_TR_FUNC_ADDR HI_IF_RAM_USR_BEGIN__A
+#define HI_TR_FUNC_SIZE 9       /* size of this function in instruction words */
+
+u8 DRXD_InitAtomicRead[] = {
+        WRBLOCK(HI_TR_FUNC_ADDR, HI_TR_FUNC_SIZE),
+        0x26, 0x00,             /* 0         -> ring.rdy;           */
+        0x60, 0x04,             /* r0rami.dt -> ring.xba;           */
+        0x61, 0x04,             /* r0rami.dt -> ring.xad;           */
+        0xE3, 0x07,             /* HI_RA_RAM_USR_BEGIN -> ring.iad; */
+        0x40, 0x00,             /* (long immediate)                 */
+        0x64, 0x04,             /* r0rami.dt -> ring.len;           */
+        0x65, 0x04,             /* r0rami.dt -> ring.ctl;           */
+        0x26, 0x00,             /* 0         -> ring.rdy;           */
+        0x38, 0x00,             /* 0         -> jumps.ad;           */
+        END_OF_TABLE
+};
+
+/* Pins D0 and D1 of the parallel MPEG output can be used
+   to set the I2C address of a device. */
+
+#define HI_RST_FUNC_ADDR (HI_IF_RAM_USR_BEGIN__A + HI_TR_FUNC_SIZE)
+#define HI_RST_FUNC_SIZE 54     /* size of this function in instruction words */
+
+/* D0 Version */
+u8 DRXD_HiI2cPatch_1[] = {
+        WRBLOCK(HI_RST_FUNC_ADDR, HI_RST_FUNC_SIZE),
+        0xC8, 0x07, 0x01, 0x00, /* MASK      -> reg0.dt;                        */
+        0xE0, 0x07, 0x15, 0x02, /* (EC__BLK << 6) + EC_OC_REG__BNK -> ring.xba; */
+        0xE1, 0x07, 0x12, 0x00, /* EC_OC_REG_OC_MPG_SIO__A -> ring.xad;         */
+        0xA2, 0x00,             /* M_BNK_ID_DAT -> ring.iba;                    */
+        0x23, 0x00,             /* &data     -> ring.iad;                       */
+        0x24, 0x00,             /* 0         -> ring.len;                       */
+        0xA5, 0x02,             /* M_RC_CTR_SWAP | M_RC_CTR_READ -> ring.ctl;   */
+        0x26, 0x00,             /* 0         -> ring.rdy;                       */
+        0x42, 0x00,             /* &data+1   -> w0ram.ad;                       */
+        0xC0, 0x07, 0xFF, 0x0F, /* -1        -> w0ram.dt;                       */
+        0x63, 0x00,             /* &data+1   -> ring.iad;                       */
+        0x65, 0x02,             /* M_RC_CTR_SWAP | M_RC_CTR_WRITE -> ring.ctl;  */
+        0x26, 0x00,             /* 0         -> ring.rdy;                       */
+        0xE1, 0x07, 0x38, 0x00, /* EC_OC_REG_OCR_MPG_USR_DAT__A -> ring.xad;    */
+        0xA5, 0x02,             /* M_RC_CTR_SWAP | M_RC_CTR_READ -> ring.ctl;   */
+        0x26, 0x00,             /* 0         -> ring.rdy;                       */
+        0xE1, 0x07, 0x12, 0x00, /* EC_OC_REG_OC_MPG_SIO__A -> ring.xad;         */
+        0x23, 0x00,             /* &data     -> ring.iad;                       */
+        0x65, 0x02,             /* M_RC_CTR_SWAP | M_RC_CTR_WRITE -> ring.ctl;  */
+        0x26, 0x00,             /* 0         -> ring.rdy;                       */
+        0x42, 0x00,             /* &data+1   -> w0ram.ad;                       */
+        0x0F, 0x04,             /* r0ram.dt  -> and.op;                         */
+        0x1C, 0x06,             /* reg0.dt   -> and.tr;                         */
+        0xCF, 0x04,             /* and.rs    -> add.op;                         */
+        0xD0, 0x07, 0x70, 0x00, /* DEF_DEV_ID -> add.tr;                        */
+        0xD0, 0x04,             /* add.rs    -> add.tr;                         */
+        0xC8, 0x04,             /* add.rs    -> reg0.dt;                        */
+        0x60, 0x00,             /* reg0.dt   -> w0ram.dt;                       */
+        0xC2, 0x07, 0x10, 0x00, /* SLV0_BASE -> w0rami.ad;                      */
+        0x01, 0x00,             /* 0         -> w0rami.dt;                      */
+        0x01, 0x06,             /* reg0.dt   -> w0rami.dt;                      */
+        0xC2, 0x07, 0x20, 0x00, /* SLV1_BASE -> w0rami.ad;                      */
+        0x01, 0x00,             /* 0         -> w0rami.dt;                      */
+        0x01, 0x06,             /* reg0.dt   -> w0rami.dt;                      */
+        0xC2, 0x07, 0x30, 0x00, /* CMD_BASE  -> w0rami.ad;                      */
+        0x01, 0x00,             /* 0         -> w0rami.dt;                      */
+        0x01, 0x00,             /* 0         -> w0rami.dt;                      */
+        0x01, 0x00,             /* 0         -> w0rami.dt;                      */
+        0x68, 0x00,             /* M_IC_SEL_PT1 -> i2c.sel;                     */
+        0x29, 0x00,             /* M_IC_CMD_RESET -> i2c.cmd;                   */
+        0x28, 0x00,             /* M_IC_SEL_PT0 -> i2c.sel;                     */
+        0x29, 0x00,             /* M_IC_CMD_RESET -> i2c.cmd;                   */
+        0xF8, 0x07, 0x2F, 0x00, /* 0x2F      -> jumps.ad;                       */
+
+        WR16((B_HI_IF_RAM_TRP_BPT0__AX + ((2 * 0) + 1)),
+             (u16) (HI_RST_FUNC_ADDR & 0x3FF)),
+        WR16((B_HI_IF_RAM_TRP_BPT0__AX + ((2 * 1) + 1)),
+             (u16) (HI_RST_FUNC_ADDR & 0x3FF)),
+        WR16((B_HI_IF_RAM_TRP_BPT0__AX + ((2 * 2) + 1)),
+             (u16) (HI_RST_FUNC_ADDR & 0x3FF)),
+        WR16((B_HI_IF_RAM_TRP_BPT0__AX + ((2 * 3) + 1)),
+             (u16) (HI_RST_FUNC_ADDR & 0x3FF)),
+
+        /* Force quick and dirty reset */
+        WR16(B_HI_CT_REG_COMM_STATE__A, 0),
+        END_OF_TABLE
+};
+
+/* D0,D1 Version */
+u8 DRXD_HiI2cPatch_3[] = {
+        WRBLOCK(HI_RST_FUNC_ADDR, HI_RST_FUNC_SIZE),
+        0xC8, 0x07, 0x03, 0x00, /* MASK      -> reg0.dt;                        */
+        0xE0, 0x07, 0x15, 0x02, /* (EC__BLK << 6) + EC_OC_REG__BNK -> ring.xba; */
+        0xE1, 0x07, 0x12, 0x00, /* EC_OC_REG_OC_MPG_SIO__A -> ring.xad;         */
+        0xA2, 0x00,             /* M_BNK_ID_DAT -> ring.iba;                    */
+        0x23, 0x00,             /* &data     -> ring.iad;                       */
+        0x24, 0x00,             /* 0         -> ring.len;                       */
+        0xA5, 0x02,             /* M_RC_CTR_SWAP | M_RC_CTR_READ -> ring.ctl;   */
+        0x26, 0x00,             /* 0         -> ring.rdy;                       */
+        0x42, 0x00,             /* &data+1   -> w0ram.ad;                       */
+        0xC0, 0x07, 0xFF, 0x0F, /* -1        -> w0ram.dt;                       */
+        0x63, 0x00,             /* &data+1   -> ring.iad;                       */
+        0x65, 0x02,             /* M_RC_CTR_SWAP | M_RC_CTR_WRITE -> ring.ctl;  */
+        0x26, 0x00,             /* 0         -> ring.rdy;                       */
+        0xE1, 0x07, 0x38, 0x00, /* EC_OC_REG_OCR_MPG_USR_DAT__A -> ring.xad;    */
+        0xA5, 0x02,             /* M_RC_CTR_SWAP | M_RC_CTR_READ -> ring.ctl;   */
+        0x26, 0x00,             /* 0         -> ring.rdy;                       */
+        0xE1, 0x07, 0x12, 0x00, /* EC_OC_REG_OC_MPG_SIO__A -> ring.xad;         */
+        0x23, 0x00,             /* &data     -> ring.iad;                       */
+        0x65, 0x02,             /* M_RC_CTR_SWAP | M_RC_CTR_WRITE -> ring.ctl;  */
+        0x26, 0x00,             /* 0         -> ring.rdy;                       */
+        0x42, 0x00,             /* &data+1   -> w0ram.ad;                       */
+        0x0F, 0x04,             /* r0ram.dt  -> and.op;                         */
+        0x1C, 0x06,             /* reg0.dt   -> and.tr;                         */
+        0xCF, 0x04,             /* and.rs    -> add.op;                         */
+        0xD0, 0x07, 0x70, 0x00, /* DEF_DEV_ID -> add.tr;                        */
+        0xD0, 0x04,             /* add.rs    -> add.tr;                         */
+        0xC8, 0x04,             /* add.rs    -> reg0.dt;                        */
+        0x60, 0x00,             /* reg0.dt   -> w0ram.dt;                       */
+        0xC2, 0x07, 0x10, 0x00, /* SLV0_BASE -> w0rami.ad;                      */
+        0x01, 0x00,             /* 0         -> w0rami.dt;                      */
+        0x01, 0x06,             /* reg0.dt   -> w0rami.dt;                      */
+        0xC2, 0x07, 0x20, 0x00, /* SLV1_BASE -> w0rami.ad;                      */
+        0x01, 0x00,             /* 0         -> w0rami.dt;                      */
+        0x01, 0x06,             /* reg0.dt   -> w0rami.dt;                      */
+        0xC2, 0x07, 0x30, 0x00, /* CMD_BASE  -> w0rami.ad;                      */
+        0x01, 0x00,             /* 0         -> w0rami.dt;                      */
+        0x01, 0x00,             /* 0         -> w0rami.dt;                      */
+        0x01, 0x00,             /* 0         -> w0rami.dt;                      */
+        0x68, 0x00,             /* M_IC_SEL_PT1 -> i2c.sel;                     */
+        0x29, 0x00,             /* M_IC_CMD_RESET -> i2c.cmd;                   */
+        0x28, 0x00,             /* M_IC_SEL_PT0 -> i2c.sel;                     */
+        0x29, 0x00,             /* M_IC_CMD_RESET -> i2c.cmd;                   */
+        0xF8, 0x07, 0x2F, 0x00, /* 0x2F      -> jumps.ad;                       */
+
+        WR16((B_HI_IF_RAM_TRP_BPT0__AX + ((2 * 0) + 1)),
+             (u16) (HI_RST_FUNC_ADDR & 0x3FF)),
+        WR16((B_HI_IF_RAM_TRP_BPT0__AX + ((2 * 1) + 1)),
+             (u16) (HI_RST_FUNC_ADDR & 0x3FF)),
+        WR16((B_HI_IF_RAM_TRP_BPT0__AX + ((2 * 2) + 1)),
+             (u16) (HI_RST_FUNC_ADDR & 0x3FF)),
+        WR16((B_HI_IF_RAM_TRP_BPT0__AX + ((2 * 3) + 1)),
+             (u16) (HI_RST_FUNC_ADDR & 0x3FF)),
+
+        /* Force quick and dirty reset */
+        WR16(B_HI_CT_REG_COMM_STATE__A, 0),
+        END_OF_TABLE
+};
+
+u8 DRXD_ResetCEFR[] = {
+        WRBLOCK(CE_REG_FR_TREAL00__A, 57),
+        0x52, 0x00,             /* CE_REG_FR_TREAL00__A */
+        0x00, 0x00,             /* CE_REG_FR_TIMAG00__A */
+        0x52, 0x00,             /* CE_REG_FR_TREAL01__A */
+        0x00, 0x00,             /* CE_REG_FR_TIMAG01__A */
+        0x52, 0x00,             /* CE_REG_FR_TREAL02__A */
+        0x00, 0x00,             /* CE_REG_FR_TIMAG02__A */
+        0x52, 0x00,             /* CE_REG_FR_TREAL03__A */
+        0x00, 0x00,             /* CE_REG_FR_TIMAG03__A */
+        0x52, 0x00,             /* CE_REG_FR_TREAL04__A */
+        0x00, 0x00,             /* CE_REG_FR_TIMAG04__A */
+        0x52, 0x00,             /* CE_REG_FR_TREAL05__A */
+        0x00, 0x00,             /* CE_REG_FR_TIMAG05__A */
+        0x52, 0x00,             /* CE_REG_FR_TREAL06__A */
+        0x00, 0x00,             /* CE_REG_FR_TIMAG06__A */
+        0x52, 0x00,             /* CE_REG_FR_TREAL07__A */
+        0x00, 0x00,             /* CE_REG_FR_TIMAG07__A */
+        0x52, 0x00,             /* CE_REG_FR_TREAL08__A */
+        0x00, 0x00,             /* CE_REG_FR_TIMAG08__A */
+        0x52, 0x00,             /* CE_REG_FR_TREAL09__A */
+        0x00, 0x00,             /* CE_REG_FR_TIMAG09__A */
+        0x52, 0x00,             /* CE_REG_FR_TREAL10__A */
+        0x00, 0x00,             /* CE_REG_FR_TIMAG10__A */
+        0x52, 0x00,             /* CE_REG_FR_TREAL11__A */
+        0x00, 0x00,             /* CE_REG_FR_TIMAG11__A */
+
+        0x52, 0x00,             /* CE_REG_FR_MID_TAP__A */
+
+        0x0B, 0x00,             /* CE_REG_FR_SQS_G00__A */
+        0x0B, 0x00,             /* CE_REG_FR_SQS_G01__A */
+        0x0B, 0x00,             /* CE_REG_FR_SQS_G02__A */
+        0x0B, 0x00,             /* CE_REG_FR_SQS_G03__A */
+        0x0B, 0x00,             /* CE_REG_FR_SQS_G04__A */
+        0x0B, 0x00,             /* CE_REG_FR_SQS_G05__A */
+        0x0B, 0x00,             /* CE_REG_FR_SQS_G06__A */
+        0x0B, 0x00,             /* CE_REG_FR_SQS_G07__A */
+        0x0B, 0x00,             /* CE_REG_FR_SQS_G08__A */
+        0x0B, 0x00,             /* CE_REG_FR_SQS_G09__A */
+        0x0B, 0x00,             /* CE_REG_FR_SQS_G10__A */
+        0x0B, 0x00,             /* CE_REG_FR_SQS_G11__A */
+        0x0B, 0x00,             /* CE_REG_FR_SQS_G12__A */
+
+        0xFF, 0x01,             /* CE_REG_FR_RIO_G00__A */
+        0x90, 0x01,             /* CE_REG_FR_RIO_G01__A */
+        0x0B, 0x01,             /* CE_REG_FR_RIO_G02__A */
+        0xC8, 0x00,             /* CE_REG_FR_RIO_G03__A */
+        0xA0, 0x00,             /* CE_REG_FR_RIO_G04__A */
+        0x85, 0x00,             /* CE_REG_FR_RIO_G05__A */
+        0x72, 0x00,             /* CE_REG_FR_RIO_G06__A */
+        0x64, 0x00,             /* CE_REG_FR_RIO_G07__A */
+        0x59, 0x00,             /* CE_REG_FR_RIO_G08__A */
+        0x50, 0x00,             /* CE_REG_FR_RIO_G09__A */
+        0x49, 0x00,             /* CE_REG_FR_RIO_G10__A */
+
+        0x10, 0x00,             /* CE_REG_FR_MODE__A     */
+        0x78, 0x00,             /* CE_REG_FR_SQS_TRH__A  */
+        0x00, 0x00,             /* CE_REG_FR_RIO_GAIN__A */
+        0x00, 0x02,             /* CE_REG_FR_BYPASS__A   */
+        0x0D, 0x00,             /* CE_REG_FR_PM_SET__A   */
+        0x07, 0x00,             /* CE_REG_FR_ERR_SH__A   */
+        0x04, 0x00,             /* CE_REG_FR_MAN_SH__A   */
+        0x06, 0x00,             /* CE_REG_FR_TAP_SH__A   */
+
+        END_OF_TABLE
+};
+
+u8 DRXD_InitFEA2_1[] = {
+        WRBLOCK(FE_AD_REG_PD__A, 3),
+        0x00, 0x00,             /* FE_AD_REG_PD__A          */
+        0x01, 0x00,             /* FE_AD_REG_INVEXT__A      */
+        0x00, 0x00,             /* FE_AD_REG_CLKNEG__A      */
+
+        WRBLOCK(FE_AG_REG_DCE_AUR_CNT__A, 2),
+        0x10, 0x00,             /* FE_AG_REG_DCE_AUR_CNT__A */
+        0x10, 0x00,             /* FE_AG_REG_DCE_RUR_CNT__A */
+
+        WRBLOCK(FE_AG_REG_ACE_AUR_CNT__A, 2),
+        0x0E, 0x00,             /* FE_AG_REG_ACE_AUR_CNT__A */
+        0x00, 0x00,             /* FE_AG_REG_ACE_RUR_CNT__A */
+
+        WRBLOCK(FE_AG_REG_EGC_FLA_RGN__A, 5),
+        0x04, 0x00,             /* FE_AG_REG_EGC_FLA_RGN__A */
+        0x1F, 0x00,             /* FE_AG_REG_EGC_SLO_RGN__A */
+        0x00, 0x00,             /* FE_AG_REG_EGC_JMP_PSN__A */
+        0x00, 0x00,             /* FE_AG_REG_EGC_FLA_INC__A */
+        0x00, 0x00,             /* FE_AG_REG_EGC_FLA_DEC__A */
+
+        WRBLOCK(FE_AG_REG_GC1_AGC_MAX__A, 2),
+        0xFF, 0x01,             /* FE_AG_REG_GC1_AGC_MAX__A */
+        0x00, 0xFE,             /* FE_AG_REG_GC1_AGC_MIN__A */
+
+        WRBLOCK(FE_AG_REG_IND_WIN__A, 29),
+        0x00, 0x00,             /* FE_AG_REG_IND_WIN__A     */
+        0x05, 0x00,             /* FE_AG_REG_IND_THD_LOL__A */
+        0x0F, 0x00,             /* FE_AG_REG_IND_THD_HIL__A */
+        0x00, 0x00,             /* FE_AG_REG_IND_DEL__A     don't care */
+        0x1E, 0x00,             /* FE_AG_REG_IND_PD1_WRI__A */
+        0x0C, 0x00,             /* FE_AG_REG_PDA_AUR_CNT__A */
+        0x00, 0x00,             /* FE_AG_REG_PDA_RUR_CNT__A */
+        0x00, 0x00,             /* FE_AG_REG_PDA_AVE_DAT__A don't care  */
+        0x00, 0x00,             /* FE_AG_REG_PDC_RUR_CNT__A */
+        0x01, 0x00,             /* FE_AG_REG_PDC_SET_LVL__A */
+        0x02, 0x00,             /* FE_AG_REG_PDC_FLA_RGN__A */
+        0x00, 0x00,             /* FE_AG_REG_PDC_JMP_PSN__A don't care  */
+        0xFF, 0xFF,             /* FE_AG_REG_PDC_FLA_STP__A */
+        0xFF, 0xFF,             /* FE_AG_REG_PDC_SLO_STP__A */
+        0x00, 0x1F,             /* FE_AG_REG_PDC_PD2_WRI__A don't care  */
+        0x00, 0x00,             /* FE_AG_REG_PDC_MAP_DAT__A don't care  */
+        0x02, 0x00,             /* FE_AG_REG_PDC_MAX__A     */
+        0x0C, 0x00,             /* FE_AG_REG_TGA_AUR_CNT__A */
+        0x00, 0x00,             /* FE_AG_REG_TGA_RUR_CNT__A */
+        0x00, 0x00,             /* FE_AG_REG_TGA_AVE_DAT__A don't care  */
+        0x00, 0x00,             /* FE_AG_REG_TGC_RUR_CNT__A */
+        0x22, 0x00,             /* FE_AG_REG_TGC_SET_LVL__A */
+        0x15, 0x00,             /* FE_AG_REG_TGC_FLA_RGN__A */
+        0x00, 0x00,             /* FE_AG_REG_TGC_JMP_PSN__A don't care  */
+        0x01, 0x00,             /* FE_AG_REG_TGC_FLA_STP__A */
+        0x0A, 0x00,             /* FE_AG_REG_TGC_SLO_STP__A */
+        0x00, 0x00,             /* FE_AG_REG_TGC_MAP_DAT__A don't care  */
+        0x10, 0x00,             /* FE_AG_REG_FGA_AUR_CNT__A */
+        0x10, 0x00,             /* FE_AG_REG_FGA_RUR_CNT__A */
+
+        WRBLOCK(FE_AG_REG_BGC_FGC_WRI__A, 2),
+        0x00, 0x00,             /* FE_AG_REG_BGC_FGC_WRI__A */
+        0x00, 0x00,             /* FE_AG_REG_BGC_CGC_WRI__A */
+
+        WRBLOCK(FE_FD_REG_SCL__A, 3),
+        0x05, 0x00,             /* FE_FD_REG_SCL__A         */
+        0x03, 0x00,             /* FE_FD_REG_MAX_LEV__A     */
+        0x05, 0x00,             /* FE_FD_REG_NR__A          */
+
+        WRBLOCK(FE_CF_REG_SCL__A, 5),
+        0x16, 0x00,             /* FE_CF_REG_SCL__A         */
+        0x04, 0x00,             /* FE_CF_REG_MAX_LEV__A     */
+        0x06, 0x00,             /* FE_CF_REG_NR__A          */
+        0x00, 0x00,             /* FE_CF_REG_IMP_VAL__A     */
+        0x01, 0x00,             /* FE_CF_REG_MEAS_VAL__A    */
+
+        WRBLOCK(FE_CU_REG_FRM_CNT_RST__A, 2),
+        0x00, 0x08,             /* FE_CU_REG_FRM_CNT_RST__A */
+        0x00, 0x00,             /* FE_CU_REG_FRM_CNT_STR__A */
+
+        END_OF_TABLE
+};
+
+   /* with PGA */
+/*   WR16COND( DRXD_WITH_PGA, FE_AG_REG_AG_PGA_MODE__A   , 0x0004), */
+   /* without PGA */
+/*   WR16COND( DRXD_WITHOUT_PGA, FE_AG_REG_AG_PGA_MODE__A   , 0x0001), */
+/*   WR16(FE_AG_REG_AG_AGC_SIO__A,  (extAttr -> FeAgRegAgAgcSio), 0x0000 );*/
+/*   WR16(FE_AG_REG_AG_PWD__A        ,(extAttr -> FeAgRegAgPwd), 0x0000 );*/
+
+u8 DRXD_InitFEA2_2[] = {
+        WR16(FE_AG_REG_CDR_RUR_CNT__A, 0x0010),
+        WR16(FE_AG_REG_FGM_WRI__A, 48),
+        /* Activate measurement, activate scale */
+        WR16(FE_FD_REG_MEAS_VAL__A, 0x0001),
+
+        WR16(FE_CU_REG_COMM_EXEC__A, 0x0001),
+        WR16(FE_CF_REG_COMM_EXEC__A, 0x0001),
+        WR16(FE_IF_REG_COMM_EXEC__A, 0x0001),
+        WR16(FE_FD_REG_COMM_EXEC__A, 0x0001),
+        WR16(FE_FS_REG_COMM_EXEC__A, 0x0001),
+        WR16(FE_AD_REG_COMM_EXEC__A, 0x0001),
+        WR16(FE_AG_REG_COMM_EXEC__A, 0x0001),
+        WR16(FE_AG_REG_AG_MODE_LOP__A, 0x895E),
+
+        END_OF_TABLE
+};
+
+u8 DRXD_InitFEB1_1[] = {
+        WR16(B_FE_AD_REG_PD__A, 0x0000),
+        WR16(B_FE_AD_REG_CLKNEG__A, 0x0000),
+        WR16(B_FE_AG_REG_BGC_FGC_WRI__A, 0x0000),
+        WR16(B_FE_AG_REG_BGC_CGC_WRI__A, 0x0000),
+        WR16(B_FE_AG_REG_AG_MODE_LOP__A, 0x000a),
+        WR16(B_FE_AG_REG_IND_PD1_WRI__A, 35),
+        WR16(B_FE_AG_REG_IND_WIN__A, 0),
+        WR16(B_FE_AG_REG_IND_THD_LOL__A, 8),
+        WR16(B_FE_AG_REG_IND_THD_HIL__A, 8),
+        WR16(B_FE_CF_REG_IMP_VAL__A, 1),
+        WR16(B_FE_AG_REG_EGC_FLA_RGN__A, 7),
+        END_OF_TABLE
+};
+
+        /* with PGA */
+/*      WR16(B_FE_AG_REG_AG_PGA_MODE__A   , 0x0000, 0x0000); */
+       /* without PGA */
+/*      WR16(B_FE_AG_REG_AG_PGA_MODE__A   ,
+             B_FE_AG_REG_AG_PGA_MODE_PFN_PCN_AFY_REN, 0x0000);*/
+                                                                             /*   WR16(B_FE_AG_REG_AG_AGC_SIO__A,(extAttr -> FeAgRegAgAgcSio), 0x0000 );*//*added HS 23-05-2005 */
+/*   WR16(B_FE_AG_REG_AG_PWD__A    ,(extAttr -> FeAgRegAgPwd), 0x0000 );*/
+
+u8 DRXD_InitFEB1_2[] = {
+        WR16(B_FE_COMM_EXEC__A, 0x0001),
+
+        /* RF-AGC setup */
+        WR16(B_FE_AG_REG_PDA_AUR_CNT__A, 0x0C),
+        WR16(B_FE_AG_REG_PDC_SET_LVL__A, 0x01),
+        WR16(B_FE_AG_REG_PDC_FLA_RGN__A, 0x02),
+        WR16(B_FE_AG_REG_PDC_FLA_STP__A, 0xFFFF),
+        WR16(B_FE_AG_REG_PDC_SLO_STP__A, 0xFFFF),
+        WR16(B_FE_AG_REG_PDC_MAX__A, 0x02),
+        WR16(B_FE_AG_REG_TGA_AUR_CNT__A, 0x0C),
+        WR16(B_FE_AG_REG_TGC_SET_LVL__A, 0x22),
+        WR16(B_FE_AG_REG_TGC_FLA_RGN__A, 0x15),
+        WR16(B_FE_AG_REG_TGC_FLA_STP__A, 0x01),
+        WR16(B_FE_AG_REG_TGC_SLO_STP__A, 0x0A),
+
+        WR16(B_FE_CU_REG_DIV_NFC_CLP__A, 0),
+        WR16(B_FE_CU_REG_CTR_NFC_OCR__A, 25000),
+        WR16(B_FE_CU_REG_CTR_NFC_ICR__A, 1),
+        END_OF_TABLE
+};
+
+u8 DRXD_InitCPA2[] = {
+        WRBLOCK(CP_REG_BR_SPL_OFFSET__A, 2),
+        0x07, 0x00,             /* CP_REG_BR_SPL_OFFSET__A  */
+        0x0A, 0x00,             /* CP_REG_BR_STR_DEL__A     */
+
+        WRBLOCK(CP_REG_RT_ANG_INC0__A, 4),
+        0x00, 0x00,             /* CP_REG_RT_ANG_INC0__A    */
+        0x00, 0x00,             /* CP_REG_RT_ANG_INC1__A    */
+        0x03, 0x00,             /* CP_REG_RT_DETECT_ENA__A  */
+        0x03, 0x00,             /* CP_REG_RT_DETECT_TRH__A  */
+
+        WRBLOCK(CP_REG_AC_NEXP_OFFS__A, 5),
+        0x32, 0x00,             /* CP_REG_AC_NEXP_OFFS__A   */
+        0x62, 0x00,             /* CP_REG_AC_AVER_POW__A    */
+        0x82, 0x00,             /* CP_REG_AC_MAX_POW__A     */
+        0x26, 0x00,             /* CP_REG_AC_WEIGHT_MAN__A  */
+        0x0F, 0x00,             /* CP_REG_AC_WEIGHT_EXP__A  */
+
+        WRBLOCK(CP_REG_AC_AMP_MODE__A, 2),
+        0x02, 0x00,             /* CP_REG_AC_AMP_MODE__A    */
+        0x01, 0x00,             /* CP_REG_AC_AMP_FIX__A     */
+
+        WR16(CP_REG_INTERVAL__A, 0x0005),
+        WR16(CP_REG_RT_EXP_MARG__A, 0x0004),
+        WR16(CP_REG_AC_ANG_MODE__A, 0x0003),
+
+        WR16(CP_REG_COMM_EXEC__A, 0x0001),
+        END_OF_TABLE
+};
+
+u8 DRXD_InitCPB1[] = {
+        WR16(B_CP_REG_BR_SPL_OFFSET__A, 0x0008),
+        WR16(B_CP_COMM_EXEC__A, 0x0001),
+        END_OF_TABLE
+};
+
+u8 DRXD_InitCEA2[] = {
+        WRBLOCK(CE_REG_AVG_POW__A, 4),
+        0x62, 0x00,             /* CE_REG_AVG_POW__A        */
+        0x78, 0x00,             /* CE_REG_MAX_POW__A        */
+        0x62, 0x00,             /* CE_REG_ATT__A            */
+        0x17, 0x00,             /* CE_REG_NRED__A           */
+
+        WRBLOCK(CE_REG_NE_ERR_SELECT__A, 2),
+        0x07, 0x00,             /* CE_REG_NE_ERR_SELECT__A  */
+        0xEB, 0xFF,             /* CE_REG_NE_TD_CAL__A      */
+
+        WRBLOCK(CE_REG_NE_MIXAVG__A, 2),
+        0x06, 0x00,             /* CE_REG_NE_MIXAVG__A      */
+        0x00, 0x00,             /* CE_REG_NE_NUPD_OFS__A    */
+
+        WRBLOCK(CE_REG_PE_NEXP_OFFS__A, 2),
+        0x00, 0x00,             /* CE_REG_PE_NEXP_OFFS__A   */
+        0x00, 0x00,             /* CE_REG_PE_TIMESHIFT__A   */
+
+        WRBLOCK(CE_REG_TP_A0_TAP_NEW__A, 3),
+        0x00, 0x01,             /* CE_REG_TP_A0_TAP_NEW__A       */
+        0x01, 0x00,             /* CE_REG_TP_A0_TAP_NEW_VALID__A */
+        0x0E, 0x00,             /* CE_REG_TP_A0_MU_LMS_STEP__A   */
+
+        WRBLOCK(CE_REG_TP_A1_TAP_NEW__A, 3),
+        0x00, 0x00,             /* CE_REG_TP_A1_TAP_NEW__A        */
+        0x01, 0x00,             /* CE_REG_TP_A1_TAP_NEW_VALID__A  */
+        0x0A, 0x00,             /* CE_REG_TP_A1_MU_LMS_STEP__A    */
+
+        WRBLOCK(CE_REG_FI_SHT_INCR__A, 2),
+        0x12, 0x00,             /* CE_REG_FI_SHT_INCR__A          */
+        0x0C, 0x00,             /* CE_REG_FI_EXP_NORM__A          */
+
+        WRBLOCK(CE_REG_IR_INPUTSEL__A, 3),
+        0x00, 0x00,             /* CE_REG_IR_INPUTSEL__A          */
+        0x00, 0x00,             /* CE_REG_IR_STARTPOS__A          */
+        0xFF, 0x00,             /* CE_REG_IR_NEXP_THRES__A        */
+
+        WR16(CE_REG_TI_NEXP_OFFS__A, 0x0000),
+
+        END_OF_TABLE
+};
+
+u8 DRXD_InitCEB1[] = {
+        WR16(B_CE_REG_TI_PHN_ENABLE__A, 0x0001),
+        WR16(B_CE_REG_FR_PM_SET__A, 0x000D),
+
+        END_OF_TABLE
+};
+
+u8 DRXD_InitEQA2[] = {
+        WRBLOCK(EQ_REG_OT_QNT_THRES0__A, 4),
+        0x1E, 0x00,             /* EQ_REG_OT_QNT_THRES0__A        */
+        0x1F, 0x00,             /* EQ_REG_OT_QNT_THRES1__A        */
+        0x06, 0x00,             /* EQ_REG_OT_CSI_STEP__A          */
+        0x02, 0x00,             /* EQ_REG_OT_CSI_OFFSET__A        */
+
+        WR16(EQ_REG_TD_REQ_SMB_CNT__A, 0x0200),
+        WR16(EQ_REG_IS_CLIP_EXP__A, 0x001F),
+        WR16(EQ_REG_SN_OFFSET__A, (u16) (-7)),
+        WR16(EQ_REG_RC_SEL_CAR__A, 0x0002),
+        WR16(EQ_REG_COMM_EXEC__A, 0x0001),
+        END_OF_TABLE
+};
+
+u8 DRXD_InitEQB1[] = {
+        WR16(B_EQ_REG_COMM_EXEC__A, 0x0001),
+        END_OF_TABLE
+};
+
+u8 DRXD_ResetECRAM[] = {
+        /* Reset packet sync bytes in EC_VD ram */
+        WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (0 * 17), 0x0000),
+        WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (1 * 17), 0x0000),
+        WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (2 * 17), 0x0000),
+        WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (3 * 17), 0x0000),
+        WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (4 * 17), 0x0000),
+        WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (5 * 17), 0x0000),
+        WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (6 * 17), 0x0000),
+        WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (7 * 17), 0x0000),
+        WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (8 * 17), 0x0000),
+        WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (9 * 17), 0x0000),
+        WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (10 * 17), 0x0000),
+
+        /* Reset packet sync bytes in EC_RS ram */
+        WR16(EC_RS_EC_RAM__A, 0x0000),
+        WR16(EC_RS_EC_RAM__A + 204, 0x0000),
+        END_OF_TABLE
+};
+
+u8 DRXD_InitECA2[] = {
+        WRBLOCK(EC_SB_REG_CSI_HI__A, 6),
+        0x1F, 0x00,             /* EC_SB_REG_CSI_HI__A            */
+        0x1E, 0x00,             /* EC_SB_REG_CSI_LO__A            */
+        0x01, 0x00,             /* EC_SB_REG_SMB_TGL__A           */
+        0x7F, 0x00,             /* EC_SB_REG_SNR_HI__A            */
+        0x7F, 0x00,             /* EC_SB_REG_SNR_MID__A           */
+        0x7F, 0x00,             /* EC_SB_REG_SNR_LO__A            */
+
+        WRBLOCK(EC_RS_REG_REQ_PCK_CNT__A, 2),
+        0x00, 0x10,             /* EC_RS_REG_REQ_PCK_CNT__A       */
+        DATA16(EC_RS_REG_VAL_PCK),      /* EC_RS_REG_VAL__A               */
+
+        WRBLOCK(EC_OC_REG_TMD_TOP_MODE__A, 5),
+        0x03, 0x00,             /* EC_OC_REG_TMD_TOP_MODE__A      */
+        0xF4, 0x01,             /* EC_OC_REG_TMD_TOP_CNT__A       */
+        0xC0, 0x03,             /* EC_OC_REG_TMD_HIL_MAR__A       */
+        0x40, 0x00,             /* EC_OC_REG_TMD_LOL_MAR__A       */
+        0x03, 0x00,             /* EC_OC_REG_TMD_CUR_CNT__A       */
+
+        WRBLOCK(EC_OC_REG_AVR_ASH_CNT__A, 2),
+        0x06, 0x00,             /* EC_OC_REG_AVR_ASH_CNT__A       */
+        0x02, 0x00,             /* EC_OC_REG_AVR_BSH_CNT__A       */
+
+        WRBLOCK(EC_OC_REG_RCN_MODE__A, 7),
+        0x07, 0x00,             /* EC_OC_REG_RCN_MODE__A          */
+        0x00, 0x00,             /* EC_OC_REG_RCN_CRA_LOP__A       */
+        0xc0, 0x00,             /* EC_OC_REG_RCN_CRA_HIP__A       */
+        0x00, 0x10,             /* EC_OC_REG_RCN_CST_LOP__A       */
+        0x00, 0x00,             /* EC_OC_REG_RCN_CST_HIP__A       */
+        0xFF, 0x01,             /* EC_OC_REG_RCN_SET_LVL__A       */
+        0x0D, 0x00,             /* EC_OC_REG_RCN_GAI_LVL__A       */
+
+        WRBLOCK(EC_OC_REG_RCN_CLP_LOP__A, 2),
+        0x00, 0x00,             /* EC_OC_REG_RCN_CLP_LOP__A       */
+        0xC0, 0x00,             /* EC_OC_REG_RCN_CLP_HIP__A       */
+
+        WR16(EC_SB_REG_CSI_OFS__A, 0x0001),
+        WR16(EC_VD_REG_FORCE__A, 0x0002),
+        WR16(EC_VD_REG_REQ_SMB_CNT__A, 0x0001),
+        WR16(EC_VD_REG_RLK_ENA__A, 0x0001),
+        WR16(EC_OD_REG_SYNC__A, 0x0664),
+        WR16(EC_OC_REG_OC_MON_SIO__A, 0x0000),
+        WR16(EC_OC_REG_SNC_ISC_LVL__A, 0x0D0C),
+        /* Output zero on monitorbus pads, power saving */
+        WR16(EC_OC_REG_OCR_MON_UOS__A,
+             (EC_OC_REG_OCR_MON_UOS_DAT_0_ENABLE |
+              EC_OC_REG_OCR_MON_UOS_DAT_1_ENABLE |
+              EC_OC_REG_OCR_MON_UOS_DAT_2_ENABLE |
+              EC_OC_REG_OCR_MON_UOS_DAT_3_ENABLE |
+              EC_OC_REG_OCR_MON_UOS_DAT_4_ENABLE |
+              EC_OC_REG_OCR_MON_UOS_DAT_5_ENABLE |
+              EC_OC_REG_OCR_MON_UOS_DAT_6_ENABLE |
+              EC_OC_REG_OCR_MON_UOS_DAT_7_ENABLE |
+              EC_OC_REG_OCR_MON_UOS_DAT_8_ENABLE |
+              EC_OC_REG_OCR_MON_UOS_DAT_9_ENABLE |
+              EC_OC_REG_OCR_MON_UOS_VAL_ENABLE |
+              EC_OC_REG_OCR_MON_UOS_CLK_ENABLE)),
+        WR16(EC_OC_REG_OCR_MON_WRI__A,
+             EC_OC_REG_OCR_MON_WRI_INIT),
+
+/*   CHK_ERROR(ResetECRAM(demod)); */
+        /* Reset packet sync bytes in EC_VD ram */
+        WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (0 * 17), 0x0000),
+        WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (1 * 17), 0x0000),
+        WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (2 * 17), 0x0000),
+        WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (3 * 17), 0x0000),
+        WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (4 * 17), 0x0000),
+        WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (5 * 17), 0x0000),
+        WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (6 * 17), 0x0000),
+        WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (7 * 17), 0x0000),
+        WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (8 * 17), 0x0000),
+        WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (9 * 17), 0x0000),
+        WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (10 * 17), 0x0000),
+
+        /* Reset packet sync bytes in EC_RS ram */
+        WR16(EC_RS_EC_RAM__A, 0x0000),
+        WR16(EC_RS_EC_RAM__A + 204, 0x0000),
+
+        WR16(EC_SB_REG_COMM_EXEC__A, 0x0001),
+        WR16(EC_VD_REG_COMM_EXEC__A, 0x0001),
+        WR16(EC_OD_REG_COMM_EXEC__A, 0x0001),
+        WR16(EC_RS_REG_COMM_EXEC__A, 0x0001),
+        END_OF_TABLE
+};
+
+u8 DRXD_InitECB1[] = {
+        WR16(B_EC_SB_REG_CSI_OFS0__A, 0x0001),
+        WR16(B_EC_SB_REG_CSI_OFS1__A, 0x0001),
+        WR16(B_EC_SB_REG_CSI_OFS2__A, 0x0001),
+        WR16(B_EC_SB_REG_CSI_LO__A, 0x000c),
+        WR16(B_EC_SB_REG_CSI_HI__A, 0x0018),
+        WR16(B_EC_SB_REG_SNR_HI__A, 0x007f),
+        WR16(B_EC_SB_REG_SNR_MID__A, 0x007f),
+        WR16(B_EC_SB_REG_SNR_LO__A, 0x007f),
+
+        WR16(B_EC_OC_REG_DTO_CLKMODE__A, 0x0002),
+        WR16(B_EC_OC_REG_DTO_PER__A, 0x0006),
+        WR16(B_EC_OC_REG_DTO_BUR__A, 0x0001),
+        WR16(B_EC_OC_REG_RCR_CLKMODE__A, 0x0000),
+        WR16(B_EC_OC_REG_RCN_GAI_LVL__A, 0x000D),
+        WR16(B_EC_OC_REG_OC_MPG_SIO__A, 0x0000),
+
+        /* Needed because shadow registers do not have correct default value */
+        WR16(B_EC_OC_REG_RCN_CST_LOP__A, 0x1000),
+        WR16(B_EC_OC_REG_RCN_CST_HIP__A, 0x0000),
+        WR16(B_EC_OC_REG_RCN_CRA_LOP__A, 0x0000),
+        WR16(B_EC_OC_REG_RCN_CRA_HIP__A, 0x00C0),
+        WR16(B_EC_OC_REG_RCN_CLP_LOP__A, 0x0000),
+        WR16(B_EC_OC_REG_RCN_CLP_HIP__A, 0x00C0),
+        WR16(B_EC_OC_REG_DTO_INC_LOP__A, 0x0000),
+        WR16(B_EC_OC_REG_DTO_INC_HIP__A, 0x00C0),
+
+        WR16(B_EC_OD_REG_SYNC__A, 0x0664),
+        WR16(B_EC_RS_REG_REQ_PCK_CNT__A, 0x1000),
+
+/*   CHK_ERROR(ResetECRAM(demod)); */
+        /* Reset packet sync bytes in EC_VD ram */
+        WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (0 * 17), 0x0000),
+        WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (1 * 17), 0x0000),
+        WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (2 * 17), 0x0000),
+        WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (3 * 17), 0x0000),
+        WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (4 * 17), 0x0000),
+        WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (5 * 17), 0x0000),
+        WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (6 * 17), 0x0000),
+        WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (7 * 17), 0x0000),
+        WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (8 * 17), 0x0000),
+        WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (9 * 17), 0x0000),
+        WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (10 * 17), 0x0000),
+
+        /* Reset packet sync bytes in EC_RS ram */
+        WR16(EC_RS_EC_RAM__A, 0x0000),
+        WR16(EC_RS_EC_RAM__A + 204, 0x0000),
+
+        WR16(B_EC_SB_REG_COMM_EXEC__A, 0x0001),
+        WR16(B_EC_VD_REG_COMM_EXEC__A, 0x0001),
+        WR16(B_EC_OD_REG_COMM_EXEC__A, 0x0001),
+        WR16(B_EC_RS_REG_COMM_EXEC__A, 0x0001),
+        END_OF_TABLE
+};
+
+u8 DRXD_ResetECA2[] = {
+
+        WR16(EC_OC_REG_COMM_EXEC__A, 0x0000),
+        WR16(EC_OD_REG_COMM_EXEC__A, 0x0000),
+
+        WRBLOCK(EC_OC_REG_TMD_TOP_MODE__A, 5),
+        0x03, 0x00,             /* EC_OC_REG_TMD_TOP_MODE__A      */
+        0xF4, 0x01,             /* EC_OC_REG_TMD_TOP_CNT__A       */
+        0xC0, 0x03,             /* EC_OC_REG_TMD_HIL_MAR__A       */
+        0x40, 0x00,             /* EC_OC_REG_TMD_LOL_MAR__A       */
+        0x03, 0x00,             /* EC_OC_REG_TMD_CUR_CNT__A       */
+
+        WRBLOCK(EC_OC_REG_AVR_ASH_CNT__A, 2),
+        0x06, 0x00,             /* EC_OC_REG_AVR_ASH_CNT__A       */
+        0x02, 0x00,             /* EC_OC_REG_AVR_BSH_CNT__A       */
+
+        WRBLOCK(EC_OC_REG_RCN_MODE__A, 7),
+        0x07, 0x00,             /* EC_OC_REG_RCN_MODE__A          */
+        0x00, 0x00,             /* EC_OC_REG_RCN_CRA_LOP__A       */
+        0xc0, 0x00,             /* EC_OC_REG_RCN_CRA_HIP__A       */
+        0x00, 0x10,             /* EC_OC_REG_RCN_CST_LOP__A       */
+        0x00, 0x00,             /* EC_OC_REG_RCN_CST_HIP__A       */
+        0xFF, 0x01,             /* EC_OC_REG_RCN_SET_LVL__A       */
+        0x0D, 0x00,             /* EC_OC_REG_RCN_GAI_LVL__A       */
+
+        WRBLOCK(EC_OC_REG_RCN_CLP_LOP__A, 2),
+        0x00, 0x00,             /* EC_OC_REG_RCN_CLP_LOP__A       */
+        0xC0, 0x00,             /* EC_OC_REG_RCN_CLP_HIP__A       */
+
+        WR16(EC_OD_REG_SYNC__A, 0x0664),
+        WR16(EC_OC_REG_OC_MON_SIO__A, 0x0000),
+        WR16(EC_OC_REG_SNC_ISC_LVL__A, 0x0D0C),
+        /* Output zero on monitorbus pads, power saving */
+        WR16(EC_OC_REG_OCR_MON_UOS__A,
+             (EC_OC_REG_OCR_MON_UOS_DAT_0_ENABLE |
+              EC_OC_REG_OCR_MON_UOS_DAT_1_ENABLE |
+              EC_OC_REG_OCR_MON_UOS_DAT_2_ENABLE |
+              EC_OC_REG_OCR_MON_UOS_DAT_3_ENABLE |
+              EC_OC_REG_OCR_MON_UOS_DAT_4_ENABLE |
+              EC_OC_REG_OCR_MON_UOS_DAT_5_ENABLE |
+              EC_OC_REG_OCR_MON_UOS_DAT_6_ENABLE |
+              EC_OC_REG_OCR_MON_UOS_DAT_7_ENABLE |
+              EC_OC_REG_OCR_MON_UOS_DAT_8_ENABLE |
+              EC_OC_REG_OCR_MON_UOS_DAT_9_ENABLE |
+              EC_OC_REG_OCR_MON_UOS_VAL_ENABLE |
+              EC_OC_REG_OCR_MON_UOS_CLK_ENABLE)),
+        WR16(EC_OC_REG_OCR_MON_WRI__A,
+             EC_OC_REG_OCR_MON_WRI_INIT),
+
+/*   CHK_ERROR(ResetECRAM(demod)); */
+        /* Reset packet sync bytes in EC_VD ram */
+        WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (0 * 17), 0x0000),
+        WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (1 * 17), 0x0000),
+        WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (2 * 17), 0x0000),
+        WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (3 * 17), 0x0000),
+        WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (4 * 17), 0x0000),
+        WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (5 * 17), 0x0000),
+        WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (6 * 17), 0x0000),
+        WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (7 * 17), 0x0000),
+        WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (8 * 17), 0x0000),
+        WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (9 * 17), 0x0000),
+        WR16(EC_OD_DEINT_RAM__A + 0x3b7 + (10 * 17), 0x0000),
+
+        /* Reset packet sync bytes in EC_RS ram */
+        WR16(EC_RS_EC_RAM__A, 0x0000),
+        WR16(EC_RS_EC_RAM__A + 204, 0x0000),
+
+        WR16(EC_OD_REG_COMM_EXEC__A, 0x0001),
+        END_OF_TABLE
+};
+
+u8 DRXD_InitSC[] = {
+        WR16(SC_COMM_EXEC__A, 0),
+        WR16(SC_COMM_STATE__A, 0),
+
+#ifdef COMPILE_FOR_QT
+        WR16(SC_RA_RAM_BE_OPT_DELAY__A, 0x100),
+#endif
+
+        /* SC is not started, this is done in SetChannels() */
+        END_OF_TABLE
+};
+
+/* Diversity settings */
+
+u8 DRXD_InitDiversityFront[] = {
+        /* Start demod ********* RF in , diversity out **************************** */
+        WR16(B_SC_RA_RAM_CONFIG__A, B_SC_RA_RAM_CONFIG_FR_ENABLE__M |
+             B_SC_RA_RAM_CONFIG_FREQSCAN__M),
+
+        WR16(B_SC_RA_RAM_LC_ABS_2K__A, 0x7),
+        WR16(B_SC_RA_RAM_LC_ABS_8K__A, 0x7),
+        WR16(B_SC_RA_RAM_IR_COARSE_8K_LENGTH__A, IRLEN_COARSE_8K),
+        WR16(B_SC_RA_RAM_IR_COARSE_8K_FREQINC__A, 1 << (11 - IRLEN_COARSE_8K)),
+        WR16(B_SC_RA_RAM_IR_COARSE_8K_KAISINC__A, 1 << (17 - IRLEN_COARSE_8K)),
+        WR16(B_SC_RA_RAM_IR_FINE_8K_LENGTH__A, IRLEN_FINE_8K),
+        WR16(B_SC_RA_RAM_IR_FINE_8K_FREQINC__A, 1 << (11 - IRLEN_FINE_8K)),
+        WR16(B_SC_RA_RAM_IR_FINE_8K_KAISINC__A, 1 << (17 - IRLEN_FINE_8K)),
+
+        WR16(B_SC_RA_RAM_IR_COARSE_2K_LENGTH__A, IRLEN_COARSE_2K),
+        WR16(B_SC_RA_RAM_IR_COARSE_2K_FREQINC__A, 1 << (11 - IRLEN_COARSE_2K)),
+        WR16(B_SC_RA_RAM_IR_COARSE_2K_KAISINC__A, 1 << (17 - IRLEN_COARSE_2K)),
+        WR16(B_SC_RA_RAM_IR_FINE_2K_LENGTH__A, IRLEN_FINE_2K),
+        WR16(B_SC_RA_RAM_IR_FINE_2K_FREQINC__A, 1 << (11 - IRLEN_FINE_2K)),
+        WR16(B_SC_RA_RAM_IR_FINE_2K_KAISINC__A, 1 << (17 - IRLEN_FINE_2K)),
+
+        WR16(B_LC_RA_RAM_FILTER_CRMM_A__A, 7),
+        WR16(B_LC_RA_RAM_FILTER_CRMM_B__A, 4),
+        WR16(B_LC_RA_RAM_FILTER_SRMM_A__A, 7),
+        WR16(B_LC_RA_RAM_FILTER_SRMM_B__A, 4),
+        WR16(B_LC_RA_RAM_FILTER_SYM_SET__A, 500),
+
+        WR16(B_CC_REG_DIVERSITY__A, 0x0001),
+        WR16(B_EC_OC_REG_OC_MODE_HIP__A, 0x0010),
+        WR16(B_EQ_REG_RC_SEL_CAR__A, B_EQ_REG_RC_SEL_CAR_PASS_B_CE |
+             B_EQ_REG_RC_SEL_CAR_LOCAL_B_CE | B_EQ_REG_RC_SEL_CAR_MEAS_B_CE),
+
+        /*    0x2a ), *//* CE to PASS mux */
+
+        END_OF_TABLE
+};
+
+u8 DRXD_InitDiversityEnd[] = {
+        /* End demod *********** combining RF in and diversity in, MPEG TS out **** */
+        /* disable near/far; switch on timing slave mode */
+        WR16(B_SC_RA_RAM_CONFIG__A, B_SC_RA_RAM_CONFIG_FR_ENABLE__M |
+             B_SC_RA_RAM_CONFIG_FREQSCAN__M |
+             B_SC_RA_RAM_CONFIG_DIV_ECHO_ENABLE__M |
+             B_SC_RA_RAM_CONFIG_SLAVE__M |
+             B_SC_RA_RAM_CONFIG_DIV_BLANK_ENABLE__M
+/* MV from CtrlDiversity */
+            ),
+#ifdef DRXDDIV_SRMM_SLAVING
+        WR16(SC_RA_RAM_LC_ABS_2K__A, 0x3c7),
+        WR16(SC_RA_RAM_LC_ABS_8K__A, 0x3c7),
+#else
+        WR16(SC_RA_RAM_LC_ABS_2K__A, 0x7),
+        WR16(SC_RA_RAM_LC_ABS_8K__A, 0x7),
+#endif
+
+        WR16(B_SC_RA_RAM_IR_COARSE_8K_LENGTH__A, IRLEN_COARSE_8K),
+        WR16(B_SC_RA_RAM_IR_COARSE_8K_FREQINC__A, 1 << (11 - IRLEN_COARSE_8K)),
+        WR16(B_SC_RA_RAM_IR_COARSE_8K_KAISINC__A, 1 << (17 - IRLEN_COARSE_8K)),
+        WR16(B_SC_RA_RAM_IR_FINE_8K_LENGTH__A, IRLEN_FINE_8K),
+        WR16(B_SC_RA_RAM_IR_FINE_8K_FREQINC__A, 1 << (11 - IRLEN_FINE_8K)),
+        WR16(B_SC_RA_RAM_IR_FINE_8K_KAISINC__A, 1 << (17 - IRLEN_FINE_8K)),
+
+        WR16(B_SC_RA_RAM_IR_COARSE_2K_LENGTH__A, IRLEN_COARSE_2K),
+        WR16(B_SC_RA_RAM_IR_COARSE_2K_FREQINC__A, 1 << (11 - IRLEN_COARSE_2K)),
+        WR16(B_SC_RA_RAM_IR_COARSE_2K_KAISINC__A, 1 << (17 - IRLEN_COARSE_2K)),
+        WR16(B_SC_RA_RAM_IR_FINE_2K_LENGTH__A, IRLEN_FINE_2K),
+        WR16(B_SC_RA_RAM_IR_FINE_2K_FREQINC__A, 1 << (11 - IRLEN_FINE_2K)),
+        WR16(B_SC_RA_RAM_IR_FINE_2K_KAISINC__A, 1 << (17 - IRLEN_FINE_2K)),
+
+        WR16(B_LC_RA_RAM_FILTER_CRMM_A__A, 7),
+        WR16(B_LC_RA_RAM_FILTER_CRMM_B__A, 4),
+        WR16(B_LC_RA_RAM_FILTER_SRMM_A__A, 7),
+        WR16(B_LC_RA_RAM_FILTER_SRMM_B__A, 4),
+        WR16(B_LC_RA_RAM_FILTER_SYM_SET__A, 500),
+
+        WR16(B_CC_REG_DIVERSITY__A, 0x0001),
+        END_OF_TABLE
+};
+
+u8 DRXD_DisableDiversity[] = {
+        WR16(B_SC_RA_RAM_LC_ABS_2K__A, B_SC_RA_RAM_LC_ABS_2K__PRE),
+        WR16(B_SC_RA_RAM_LC_ABS_8K__A, B_SC_RA_RAM_LC_ABS_8K__PRE),
+        WR16(B_SC_RA_RAM_IR_COARSE_8K_LENGTH__A,
+             B_SC_RA_RAM_IR_COARSE_8K_LENGTH__PRE),
+        WR16(B_SC_RA_RAM_IR_COARSE_8K_FREQINC__A,
+             B_SC_RA_RAM_IR_COARSE_8K_FREQINC__PRE),
+        WR16(B_SC_RA_RAM_IR_COARSE_8K_KAISINC__A,
+             B_SC_RA_RAM_IR_COARSE_8K_KAISINC__PRE),
+        WR16(B_SC_RA_RAM_IR_FINE_8K_LENGTH__A,
+             B_SC_RA_RAM_IR_FINE_8K_LENGTH__PRE),
+        WR16(B_SC_RA_RAM_IR_FINE_8K_FREQINC__A,
+             B_SC_RA_RAM_IR_FINE_8K_FREQINC__PRE),
+        WR16(B_SC_RA_RAM_IR_FINE_8K_KAISINC__A,
+             B_SC_RA_RAM_IR_FINE_8K_KAISINC__PRE),
+
+        WR16(B_SC_RA_RAM_IR_COARSE_2K_LENGTH__A,
+             B_SC_RA_RAM_IR_COARSE_2K_LENGTH__PRE),
+        WR16(B_SC_RA_RAM_IR_COARSE_2K_FREQINC__A,
+             B_SC_RA_RAM_IR_COARSE_2K_FREQINC__PRE),
+        WR16(B_SC_RA_RAM_IR_COARSE_2K_KAISINC__A,
+             B_SC_RA_RAM_IR_COARSE_2K_KAISINC__PRE),
+        WR16(B_SC_RA_RAM_IR_FINE_2K_LENGTH__A,
+             B_SC_RA_RAM_IR_FINE_2K_LENGTH__PRE),
+        WR16(B_SC_RA_RAM_IR_FINE_2K_FREQINC__A,
+             B_SC_RA_RAM_IR_FINE_2K_FREQINC__PRE),
+        WR16(B_SC_RA_RAM_IR_FINE_2K_KAISINC__A,
+             B_SC_RA_RAM_IR_FINE_2K_KAISINC__PRE),
+
+        WR16(B_LC_RA_RAM_FILTER_CRMM_A__A, B_LC_RA_RAM_FILTER_CRMM_A__PRE),
+        WR16(B_LC_RA_RAM_FILTER_CRMM_B__A, B_LC_RA_RAM_FILTER_CRMM_B__PRE),
+        WR16(B_LC_RA_RAM_FILTER_SRMM_A__A, B_LC_RA_RAM_FILTER_SRMM_A__PRE),
+        WR16(B_LC_RA_RAM_FILTER_SRMM_B__A, B_LC_RA_RAM_FILTER_SRMM_B__PRE),
+        WR16(B_LC_RA_RAM_FILTER_SYM_SET__A, B_LC_RA_RAM_FILTER_SYM_SET__PRE),
+
+        WR16(B_CC_REG_DIVERSITY__A, 0x0000),
+        WR16(B_EQ_REG_RC_SEL_CAR__A, B_EQ_REG_RC_SEL_CAR_INIT), /* combining disabled */
+
+        END_OF_TABLE
+};
+
+u8 DRXD_StartDiversityFront[] = {
+        /* Start demod, RF in and diversity out, no combining */
+        WR16(B_FE_CF_REG_IMP_VAL__A, 0x0),
+        WR16(B_FE_AD_REG_FDB_IN__A, 0x0),
+        WR16(B_FE_AD_REG_INVEXT__A, 0x0),
+        WR16(B_EQ_REG_COMM_MB__A, 0x12),        /* EQ to MB out */
+        WR16(B_EQ_REG_RC_SEL_CAR__A, B_EQ_REG_RC_SEL_CAR_PASS_B_CE |    /* CE to PASS mux */
+             B_EQ_REG_RC_SEL_CAR_LOCAL_B_CE | B_EQ_REG_RC_SEL_CAR_MEAS_B_CE),
+
+        WR16(SC_RA_RAM_ECHO_SHIFT_LIM__A, 2),
+
+        END_OF_TABLE
+};
+
+u8 DRXD_StartDiversityEnd[] = {
+        /* End demod, combining RF in and diversity in, MPEG TS out */
+        WR16(B_FE_CF_REG_IMP_VAL__A, 0x0),      /* disable impulse noise cruncher */
+        WR16(B_FE_AD_REG_INVEXT__A, 0x0),       /* clock inversion (for sohard board) */
+        WR16(B_CP_REG_BR_STR_DEL__A, 10),       /* apperently no mb delay matching is best */
+
+        WR16(B_EQ_REG_RC_SEL_CAR__A, B_EQ_REG_RC_SEL_CAR_DIV_ON |       /* org = 0x81 combining enabled */
+             B_EQ_REG_RC_SEL_CAR_MEAS_A_CC |
+             B_EQ_REG_RC_SEL_CAR_PASS_A_CC | B_EQ_REG_RC_SEL_CAR_LOCAL_A_CC),
+
+        END_OF_TABLE
+};
+
+u8 DRXD_DiversityDelay8MHZ[] = {
+        WR16(B_SC_RA_RAM_DIVERSITY_DELAY_2K_32__A, 1150 - 50),
+        WR16(B_SC_RA_RAM_DIVERSITY_DELAY_2K_16__A, 1100 - 50),
+        WR16(B_SC_RA_RAM_DIVERSITY_DELAY_2K_8__A, 1000 - 50),
+        WR16(B_SC_RA_RAM_DIVERSITY_DELAY_2K_4__A, 800 - 50),
+        WR16(B_SC_RA_RAM_DIVERSITY_DELAY_8K_32__A, 5420 - 50),
+        WR16(B_SC_RA_RAM_DIVERSITY_DELAY_8K_16__A, 5200 - 50),
+        WR16(B_SC_RA_RAM_DIVERSITY_DELAY_8K_8__A, 4800 - 50),
+        WR16(B_SC_RA_RAM_DIVERSITY_DELAY_8K_4__A, 4000 - 50),
+        END_OF_TABLE
+};
+
+u8 DRXD_DiversityDelay6MHZ[] =  /* also used ok for 7 MHz */
+{
+        WR16(B_SC_RA_RAM_DIVERSITY_DELAY_2K_32__A, 1100 - 50),
+        WR16(B_SC_RA_RAM_DIVERSITY_DELAY_2K_16__A, 1000 - 50),
+        WR16(B_SC_RA_RAM_DIVERSITY_DELAY_2K_8__A, 900 - 50),
+        WR16(B_SC_RA_RAM_DIVERSITY_DELAY_2K_4__A, 600 - 50),
+        WR16(B_SC_RA_RAM_DIVERSITY_DELAY_8K_32__A, 5300 - 50),
+        WR16(B_SC_RA_RAM_DIVERSITY_DELAY_8K_16__A, 5000 - 50),
+        WR16(B_SC_RA_RAM_DIVERSITY_DELAY_8K_8__A, 4500 - 50),
+        WR16(B_SC_RA_RAM_DIVERSITY_DELAY_8K_4__A, 3500 - 50),
+        END_OF_TABLE
+};
diff --git a/drivers/media/dvb/frontends/drxd_firm.h b/drivers/media/dvb/frontends/drxd_firm.h
new file mode 100644
index 000000000000..41597e89941c
--- /dev/null
+++ b/drivers/media/dvb/frontends/drxd_firm.h
@@ -0,0 +1,115 @@
+/*
+ * drxd_firm.h
+ *
+ * Copyright (C) 2006-2007 Micronas
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 only, as published by the Free Software Foundation.
+ *
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA
+ * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
+ */
+
+#ifndef _DRXD_FIRM_H_
+#define _DRXD_FIRM_H_
+
+#include <linux/types.h>
+#include "drxd_map_firm.h"
+
+#define VERSION_MAJOR 1
+#define VERSION_MINOR 4
+#define VERSION_PATCH 23
+
+#define HI_TR_FUNC_ADDR HI_IF_RAM_USR_BEGIN__A
+
+#define DRXD_MAX_RETRIES (1000)
+#define HI_I2C_DELAY     84
+#define HI_I2C_BRIDGE_DELAY   750
+
+#define EQ_TD_TPS_PWR_UNKNOWN          0x00C0   /* Unknown configurations */
+#define EQ_TD_TPS_PWR_QPSK             0x016a
+#define EQ_TD_TPS_PWR_QAM16_ALPHAN     0x0195
+#define EQ_TD_TPS_PWR_QAM16_ALPHA1     0x0195
+#define EQ_TD_TPS_PWR_QAM16_ALPHA2     0x011E
+#define EQ_TD_TPS_PWR_QAM16_ALPHA4     0x01CE
+#define EQ_TD_TPS_PWR_QAM64_ALPHAN     0x019F
+#define EQ_TD_TPS_PWR_QAM64_ALPHA1     0x019F
+#define EQ_TD_TPS_PWR_QAM64_ALPHA2     0x00F8
+#define EQ_TD_TPS_PWR_QAM64_ALPHA4     0x014D
+
+#define DRXD_DEF_AG_PWD_CONSUMER 0x000E
+#define DRXD_DEF_AG_PWD_PRO 0x0000
+#define DRXD_DEF_AG_AGC_SIO 0x0000
+
+#define DRXD_FE_CTRL_MAX 1023
+
+#define DRXD_OSCDEV_DO_SCAN  (16)
+
+#define DRXD_OSCDEV_DONT_SCAN  (0)
+
+#define DRXD_OSCDEV_STEP  (275)
+
+#define DRXD_SCAN_TIMEOUT    (650)
+
+#define DRXD_BANDWIDTH_8MHZ_IN_HZ  (0x8B8249L)
+#define DRXD_BANDWIDTH_7MHZ_IN_HZ  (0x7A1200L)
+#define DRXD_BANDWIDTH_6MHZ_IN_HZ  (0x68A1B6L)
+
+#define IRLEN_COARSE_8K       (10)
+#define IRLEN_FINE_8K         (10)
+#define IRLEN_COARSE_2K       (7)
+#define IRLEN_FINE_2K         (9)
+#define DIFF_INVALID          (511)
+#define DIFF_TARGET           (4)
+#define DIFF_MARGIN           (1)
+
+extern u8 DRXD_InitAtomicRead[];
+extern u8 DRXD_HiI2cPatch_1[];
+extern u8 DRXD_HiI2cPatch_3[];
+
+extern u8 DRXD_InitSC[];
+
+extern u8 DRXD_ResetCEFR[];
+extern u8 DRXD_InitFEA2_1[];
+extern u8 DRXD_InitFEA2_2[];
+extern u8 DRXD_InitCPA2[];
+extern u8 DRXD_InitCEA2[];
+extern u8 DRXD_InitEQA2[];
+extern u8 DRXD_InitECA2[];
+extern u8 DRXD_ResetECA2[];
+extern u8 DRXD_ResetECRAM[];
+
+extern u8 DRXD_A2_microcode[];
+extern u32 DRXD_A2_microcode_length;
+
+extern u8 DRXD_InitFEB1_1[];
+extern u8 DRXD_InitFEB1_2[];
+extern u8 DRXD_InitCPB1[];
+extern u8 DRXD_InitCEB1[];
+extern u8 DRXD_InitEQB1[];
+extern u8 DRXD_InitECB1[];
+
+extern u8 DRXD_InitDiversityFront[];
+extern u8 DRXD_InitDiversityEnd[];
+extern u8 DRXD_DisableDiversity[];
+extern u8 DRXD_StartDiversityFront[];
+extern u8 DRXD_StartDiversityEnd[];
+
+extern u8 DRXD_DiversityDelay8MHZ[];
+extern u8 DRXD_DiversityDelay6MHZ[];
+
+extern u8 DRXD_B1_microcode[];
+extern u32 DRXD_B1_microcode_length;
+
+#endif
diff --git a/drivers/media/dvb/frontends/drxd_hard.c b/drivers/media/dvb/frontends/drxd_hard.c
new file mode 100644
index 000000000000..ea4c1c361d2b
--- /dev/null
+++ b/drivers/media/dvb/frontends/drxd_hard.c
@@ -0,0 +1,3001 @@
+/*
+ * drxd_hard.c: DVB-T Demodulator Micronas DRX3975D-A2,DRX397xD-B1
+ *
+ * Copyright (C) 2003-2007 Micronas
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 only, as published by the Free Software Foundation.
+ *
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA
+ * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/firmware.h>
+#include <linux/i2c.h>
+#include <linux/version.h>
+#include <asm/div64.h>
+
+#include "dvb_frontend.h"
+#include "drxd.h"
+#include "drxd_firm.h"
+
+#define DRX_FW_FILENAME_A2 "drxd-a2-1.1.fw"
+#define DRX_FW_FILENAME_B1 "drxd-b1-1.1.fw"
+
+#define CHUNK_SIZE 48
+
+#define DRX_I2C_RMW           0x10
+#define DRX_I2C_BROADCAST     0x20
+#define DRX_I2C_CLEARCRC      0x80
+#define DRX_I2C_SINGLE_MASTER 0xC0
+#define DRX_I2C_MODEFLAGS     0xC0
+#define DRX_I2C_FLAGS         0xF0
+
+#ifndef SIZEOF_ARRAY
+#define SIZEOF_ARRAY(array) (sizeof((array))/sizeof((array)[0]))
+#endif
+
+#define DEFAULT_LOCK_TIMEOUT    1100
+
+#define DRX_CHANNEL_AUTO 0
+#define DRX_CHANNEL_HIGH 1
+#define DRX_CHANNEL_LOW  2
+
+#define DRX_LOCK_MPEG  1
+#define DRX_LOCK_FEC   2
+#define DRX_LOCK_DEMOD 4
+
+/****************************************************************************/
+
+enum CSCDState {
+        CSCD_INIT = 0,
+        CSCD_SET,
+        CSCD_SAVED
+};
+
+enum CDrxdState {
+        DRXD_UNINITIALIZED = 0,
+        DRXD_STOPPED,
+        DRXD_STARTED
+};
+
+enum AGC_CTRL_MODE {
+        AGC_CTRL_AUTO = 0,
+        AGC_CTRL_USER,
+        AGC_CTRL_OFF
+};
+
+enum OperationMode {
+        OM_Default,
+        OM_DVBT_Diversity_Front,
+        OM_DVBT_Diversity_End
+};
+
+struct SCfgAgc {
+        enum AGC_CTRL_MODE ctrlMode;
+        u16 outputLevel;        /* range [0, ... , 1023], 1/n of fullscale range */
+        u16 settleLevel;        /* range [0, ... , 1023], 1/n of fullscale range */
+        u16 minOutputLevel;     /* range [0, ... , 1023], 1/n of fullscale range */
+        u16 maxOutputLevel;     /* range [0, ... , 1023], 1/n of fullscale range */
+        u16 speed;              /* range [0, ... , 1023], 1/n of fullscale range */
+
+        u16 R1;
+        u16 R2;
+        u16 R3;
+};
+
+struct SNoiseCal {
+        int cpOpt;
+        u16 cpNexpOfs;
+        u16 tdCal2k;
+        u16 tdCal8k;
+};
+
+enum app_env {
+        APPENV_STATIC = 0,
+        APPENV_PORTABLE = 1,
+        APPENV_MOBILE = 2
+};
+
+enum EIFFilter {
+        IFFILTER_SAW = 0,
+        IFFILTER_DISCRETE = 1
+};
+
+struct drxd_state {
+        struct dvb_frontend frontend;
+        struct dvb_frontend_ops ops;
+        struct dvb_frontend_parameters param;
+
+        const struct firmware *fw;
+        struct device *dev;
+
+        struct i2c_adapter *i2c;
+        void *priv;
+        struct drxd_config config;
+
+        int i2c_access;
+        int init_done;
+        struct mutex mutex;
+
+        u8 chip_adr;
+        u16 hi_cfg_timing_div;
+        u16 hi_cfg_bridge_delay;
+        u16 hi_cfg_wakeup_key;
+        u16 hi_cfg_ctrl;
+
+        u16 intermediate_freq;
+        u16 osc_clock_freq;
+
+        enum CSCDState cscd_state;
+        enum CDrxdState drxd_state;
+
+        u16 sys_clock_freq;
+        s16 osc_clock_deviation;
+        u16 expected_sys_clock_freq;
+
+        u16 insert_rs_byte;
+        u16 enable_parallel;
+
+        int operation_mode;
+
+        struct SCfgAgc if_agc_cfg;
+        struct SCfgAgc rf_agc_cfg;
+
+        struct SNoiseCal noise_cal;
+
+        u32 fe_fs_add_incr;
+        u32 org_fe_fs_add_incr;
+        u16 current_fe_if_incr;
+
+        u16 m_FeAgRegAgPwd;
+        u16 m_FeAgRegAgAgcSio;
+
+        u16 m_EcOcRegOcModeLop;
+        u16 m_EcOcRegSncSncLvl;
+        u8 *m_InitAtomicRead;
+        u8 *m_HiI2cPatch;
+
+        u8 *m_ResetCEFR;
+        u8 *m_InitFE_1;
+        u8 *m_InitFE_2;
+        u8 *m_InitCP;
+        u8 *m_InitCE;
+        u8 *m_InitEQ;
+        u8 *m_InitSC;
+        u8 *m_InitEC;
+        u8 *m_ResetECRAM;
+        u8 *m_InitDiversityFront;
+        u8 *m_InitDiversityEnd;
+        u8 *m_DisableDiversity;
+        u8 *m_StartDiversityFront;
+        u8 *m_StartDiversityEnd;
+
+        u8 *m_DiversityDelay8MHZ;
+        u8 *m_DiversityDelay6MHZ;
+
+        u8 *microcode;
+        u32 microcode_length;
+
+        int type_A;
+        int PGA;
+        int diversity;
+        int tuner_mirrors;
+
+        enum app_env app_env_default;
+        enum app_env app_env_diversity;
+
+};
+
+/****************************************************************************/
+/* I2C **********************************************************************/
+/****************************************************************************/
+
+static int i2c_write(struct i2c_adapter *adap, u8 adr, u8 * data, int len)
+{
+        struct i2c_msg msg = {.addr = adr, .flags = 0, .buf = data, .len = len };
+
+        if (i2c_transfer(adap, &msg, 1) != 1)
+                return -1;
+        return 0;
+}
+
+static int i2c_read(struct i2c_adapter *adap,
+                    u8 adr, u8 *msg, int len, u8 *answ, int alen)
+{
+        struct i2c_msg msgs[2] = {
+                {
+                        .addr = adr, .flags = 0,
+                        .buf = msg, .len = len
+                }, {
+                        .addr = adr, .flags = I2C_M_RD,
+                        .buf = answ, .len = alen
+                }
+        };
+        if (i2c_transfer(adap, msgs, 2) != 2)
+                return -1;
+        return 0;
+}
+
+inline u32 MulDiv32(u32 a, u32 b, u32 c)
+{
+        u64 tmp64;
+
+        tmp64 = (u64)a * (u64)b;
+        do_div(tmp64, c);
+
+        return (u32) tmp64;
+}
+
+static int Read16(struct drxd_state *state, u32 reg, u16 *data, u8 flags)
+{
+        u8 adr = state->config.demod_address;
+        u8 mm1[4] = { reg & 0xff, (reg >> 16) & 0xff,
+                flags | ((reg >> 24) & 0xff), (reg >> 8) & 0xff
+        };
+        u8 mm2[2];
+        if (i2c_read(state->i2c, adr, mm1, 4, mm2, 2) < 0)
+                return -1;
+        if (data)
+                *data = mm2[0] | (mm2[1] << 8);
+        return mm2[0] | (mm2[1] << 8);
+}
+
+static int Read32(struct drxd_state *state, u32 reg, u32 *data, u8 flags)
+{
+        u8 adr = state->config.demod_address;
+        u8 mm1[4] = { reg & 0xff, (reg >> 16) & 0xff,
+                flags | ((reg >> 24) & 0xff), (reg >> 8) & 0xff
+        };
+        u8 mm2[4];
+
+        if (i2c_read(state->i2c, adr, mm1, 4, mm2, 4) < 0)
+                return -1;
+        if (data)
+                *data =
+                    mm2[0] | (mm2[1] << 8) | (mm2[2] << 16) | (mm2[3] << 24);
+        return 0;
+}
+
+static int Write16(struct drxd_state *state, u32 reg, u16 data, u8 flags)
+{
+        u8 adr = state->config.demod_address;
+        u8 mm[6] = { reg & 0xff, (reg >> 16) & 0xff,
+                flags | ((reg >> 24) & 0xff), (reg >> 8) & 0xff,
+                data & 0xff, (data >> 8) & 0xff
+        };
+
+        if (i2c_write(state->i2c, adr, mm, 6) < 0)
+                return -1;
+        return 0;
+}
+
+static int Write32(struct drxd_state *state, u32 reg, u32 data, u8 flags)
+{
+        u8 adr = state->config.demod_address;
+        u8 mm[8] = { reg & 0xff, (reg >> 16) & 0xff,
+                flags | ((reg >> 24) & 0xff), (reg >> 8) & 0xff,
+                data & 0xff, (data >> 8) & 0xff,
+                (data >> 16) & 0xff, (data >> 24) & 0xff
+        };
+
+        if (i2c_write(state->i2c, adr, mm, 8) < 0)
+                return -1;
+        return 0;
+}
+
+static int write_chunk(struct drxd_state *state,
+                       u32 reg, u8 *data, u32 len, u8 flags)
+{
+        u8 adr = state->config.demod_address;
+        u8 mm[CHUNK_SIZE + 4] = { reg & 0xff, (reg >> 16) & 0xff,
+                flags | ((reg >> 24) & 0xff), (reg >> 8) & 0xff
+        };
+        int i;
+
+        for (i = 0; i < len; i++)
+                mm[4 + i] = data[i];
+        if (i2c_write(state->i2c, adr, mm, 4 + len) < 0) {
+                printk(KERN_ERR "error in write_chunk\n");
+                return -1;
+        }
+        return 0;
+}
+
+static int WriteBlock(struct drxd_state *state,
+                      u32 Address, u16 BlockSize, u8 *pBlock, u8 Flags)
+{
+        while (BlockSize > 0) {
+                u16 Chunk = BlockSize > CHUNK_SIZE ? CHUNK_SIZE : BlockSize;
+
+                if (write_chunk(state, Address, pBlock, Chunk, Flags) < 0)
+                        return -1;
+                pBlock += Chunk;
+                Address += (Chunk >> 1);
+                BlockSize -= Chunk;
+        }
+        return 0;
+}
+
+static int WriteTable(struct drxd_state *state, u8 * pTable)
+{
+        int status = 0;
+
+        if (pTable == NULL)
+                return 0;
+
+        while (!status) {
+                u16 Length;
+                u32 Address = pTable[0] | (pTable[1] << 8) |
+                    (pTable[2] << 16) | (pTable[3] << 24);
+
+                if (Address == 0xFFFFFFFF)
+                        break;
+                pTable += sizeof(u32);
+
+                Length = pTable[0] | (pTable[1] << 8);
+                pTable += sizeof(u16);
+                if (!Length)
+                        break;
+                status = WriteBlock(state, Address, Length * 2, pTable, 0);
+                pTable += (Length * 2);
+        }
+        return status;
+}
+
+/****************************************************************************/
+/****************************************************************************/
+/****************************************************************************/
+
+static int ResetCEFR(struct drxd_state *state)
+{
+        return WriteTable(state, state->m_ResetCEFR);
+}
+
+static int InitCP(struct drxd_state *state)
+{
+        return WriteTable(state, state->m_InitCP);
+}
+
+static int InitCE(struct drxd_state *state)
+{
+        int status;
+        enum app_env AppEnv = state->app_env_default;
+
+        do {
+                status = WriteTable(state, state->m_InitCE);
+                if (status < 0)
+                        break;
+
+                if (state->operation_mode == OM_DVBT_Diversity_Front ||
+                    state->operation_mode == OM_DVBT_Diversity_End) {
+                        AppEnv = state->app_env_diversity;
+                }
+                if (AppEnv == APPENV_STATIC) {
+                        status = Write16(state, CE_REG_TAPSET__A, 0x0000, 0);
+                        if (status < 0)
+                                break;
+                } else if (AppEnv == APPENV_PORTABLE) {
+                        status = Write16(state, CE_REG_TAPSET__A, 0x0001, 0);
+                        if (status < 0)
+                                break;
+                } else if (AppEnv == APPENV_MOBILE && state->type_A) {
+                        status = Write16(state, CE_REG_TAPSET__A, 0x0002, 0);
+                        if (status < 0)
+                                break;
+                } else if (AppEnv == APPENV_MOBILE && !state->type_A) {
+                        status = Write16(state, CE_REG_TAPSET__A, 0x0006, 0);
+                        if (status < 0)
+                                break;
+                }
+
+                /* start ce */
+                status = Write16(state, B_CE_REG_COMM_EXEC__A, 0x0001, 0);
+                if (status < 0)
+                        break;
+        } while (0);
+        return status;
+}
+
+static int StopOC(struct drxd_state *state)
+{
+        int status = 0;
+        u16 ocSyncLvl = 0;
+        u16 ocModeLop = state->m_EcOcRegOcModeLop;
+        u16 dtoIncLop = 0;
+        u16 dtoIncHip = 0;
+
+        do {
+                /* Store output configuration */
+                status = Read16(state, EC_OC_REG_SNC_ISC_LVL__A, &ocSyncLvl, 0);
+                if (status < 0)
+                        break;
+                /* CHK_ERROR(Read16(EC_OC_REG_OC_MODE_LOP__A, &ocModeLop)); */
+                state->m_EcOcRegSncSncLvl = ocSyncLvl;
+                /* m_EcOcRegOcModeLop = ocModeLop; */
+
+                /* Flush FIFO (byte-boundary) at fixed rate */
+                status = Read16(state, EC_OC_REG_RCN_MAP_LOP__A, &dtoIncLop, 0);
+                if (status < 0)
+                        break;
+                status = Read16(state, EC_OC_REG_RCN_MAP_HIP__A, &dtoIncHip, 0);
+                if (status < 0)
+                        break;
+                status = Write16(state, EC_OC_REG_DTO_INC_LOP__A, dtoIncLop, 0);
+                if (status < 0)
+                        break;
+                status = Write16(state, EC_OC_REG_DTO_INC_HIP__A, dtoIncHip, 0);
+                if (status < 0)
+                        break;
+                ocModeLop &= ~(EC_OC_REG_OC_MODE_LOP_DTO_CTR_SRC__M);
+                ocModeLop |= EC_OC_REG_OC_MODE_LOP_DTO_CTR_SRC_STATIC;
+                status = Write16(state, EC_OC_REG_OC_MODE_LOP__A, ocModeLop, 0);
+                if (status < 0)
+                        break;
+                status = Write16(state, EC_OC_REG_COMM_EXEC__A, EC_OC_REG_COMM_EXEC_CTL_HOLD, 0);
+                if (status < 0)
+                        break;
+
+                msleep(1);
+                /* Output pins to '0' */
+                status = Write16(state, EC_OC_REG_OCR_MPG_UOS__A, EC_OC_REG_OCR_MPG_UOS__M, 0);
+                if (status < 0)
+                        break;
+
+                /* Force the OC out of sync */
+                ocSyncLvl &= ~(EC_OC_REG_SNC_ISC_LVL_OSC__M);
+                status = Write16(state, EC_OC_REG_SNC_ISC_LVL__A, ocSyncLvl, 0);
+                if (status < 0)
+                        break;
+                ocModeLop &= ~(EC_OC_REG_OC_MODE_LOP_PAR_ENA__M);
+                ocModeLop |= EC_OC_REG_OC_MODE_LOP_PAR_ENA_ENABLE;
+                ocModeLop |= 0x2;       /* Magically-out-of-sync */
+                status = Write16(state, EC_OC_REG_OC_MODE_LOP__A, ocModeLop, 0);
+                if (status < 0)
+                        break;
+                status = Write16(state, EC_OC_REG_COMM_INT_STA__A, 0x0, 0);
+                if (status < 0)
+                        break;
+                status = Write16(state, EC_OC_REG_COMM_EXEC__A, EC_OC_REG_COMM_EXEC_CTL_ACTIVE, 0);
+                if (status < 0)
+                        break;
+        } while (0);
+
+        return status;
+}
+
+static int StartOC(struct drxd_state *state)
+{
+        int status = 0;
+
+        do {
+                /* Stop OC */
+                status = Write16(state, EC_OC_REG_COMM_EXEC__A, EC_OC_REG_COMM_EXEC_CTL_HOLD, 0);
+                if (status < 0)
+                        break;
+
+                /* Restore output configuration */
+                status = Write16(state, EC_OC_REG_SNC_ISC_LVL__A, state->m_EcOcRegSncSncLvl, 0);
+                if (status < 0)
+                        break;
+                status = Write16(state, EC_OC_REG_OC_MODE_LOP__A, state->m_EcOcRegOcModeLop, 0);
+                if (status < 0)
+                        break;
+
+                /* Output pins active again */
+                status = Write16(state, EC_OC_REG_OCR_MPG_UOS__A, EC_OC_REG_OCR_MPG_UOS_INIT, 0);
+                if (status < 0)
+                        break;
+
+                /* Start OC */
+                status = Write16(state, EC_OC_REG_COMM_EXEC__A, EC_OC_REG_COMM_EXEC_CTL_ACTIVE, 0);
+                if (status < 0)
+                        break;
+        } while (0);
+        return status;
+}
+
+static int InitEQ(struct drxd_state *state)
+{
+        return WriteTable(state, state->m_InitEQ);
+}
+
+static int InitEC(struct drxd_state *state)
+{
+        return WriteTable(state, state->m_InitEC);
+}
+
+static int InitSC(struct drxd_state *state)
+{
+        return WriteTable(state, state->m_InitSC);
+}
+
+static int InitAtomicRead(struct drxd_state *state)
+{
+        return WriteTable(state, state->m_InitAtomicRead);
+}
+
+static int CorrectSysClockDeviation(struct drxd_state *state);
+
+static int DRX_GetLockStatus(struct drxd_state *state, u32 * pLockStatus)
+{
+        u16 ScRaRamLock = 0;
+        const u16 mpeg_lock_mask = (SC_RA_RAM_LOCK_MPEG__M |
+                                    SC_RA_RAM_LOCK_FEC__M |
+                                    SC_RA_RAM_LOCK_DEMOD__M);
+        const u16 fec_lock_mask = (SC_RA_RAM_LOCK_FEC__M |
+                                   SC_RA_RAM_LOCK_DEMOD__M);
+        const u16 demod_lock_mask = SC_RA_RAM_LOCK_DEMOD__M;
+
+        int status;
+
+        *pLockStatus = 0;
+
+        status = Read16(state, SC_RA_RAM_LOCK__A, &ScRaRamLock, 0x0000);
+        if (status < 0) {
+                printk(KERN_ERR "Can't read SC_RA_RAM_LOCK__A status = %08x\n", status);
+                return status;
+        }
+
+        if (state->drxd_state != DRXD_STARTED)
+                return 0;
+
+        if ((ScRaRamLock & mpeg_lock_mask) == mpeg_lock_mask) {
+                *pLockStatus |= DRX_LOCK_MPEG;
+                CorrectSysClockDeviation(state);
+        }
+
+        if ((ScRaRamLock & fec_lock_mask) == fec_lock_mask)
+                *pLockStatus |= DRX_LOCK_FEC;
+
+        if ((ScRaRamLock & demod_lock_mask) == demod_lock_mask)
+                *pLockStatus |= DRX_LOCK_DEMOD;
+        return 0;
+}
+
+/****************************************************************************/
+
+static int SetCfgIfAgc(struct drxd_state *state, struct SCfgAgc *cfg)
+{
+        int status;
+
+        if (cfg->outputLevel > DRXD_FE_CTRL_MAX)
+                return -1;
+
+        if (cfg->ctrlMode == AGC_CTRL_USER) {
+                do {
+                        u16 FeAgRegPm1AgcWri;
+                        u16 FeAgRegAgModeLop;
+
+                        status = Read16(state, FE_AG_REG_AG_MODE_LOP__A, &FeAgRegAgModeLop, 0);
+                        if (status < 0)
+                                break;
+                        FeAgRegAgModeLop &= (~FE_AG_REG_AG_MODE_LOP_MODE_4__M);
+                        FeAgRegAgModeLop |= FE_AG_REG_AG_MODE_LOP_MODE_4_STATIC;
+                        status = Write16(state, FE_AG_REG_AG_MODE_LOP__A, FeAgRegAgModeLop, 0);
+                        if (status < 0)
+                                break;
+
+                        FeAgRegPm1AgcWri = (u16) (cfg->outputLevel &
+                                                  FE_AG_REG_PM1_AGC_WRI__M);
+                        status = Write16(state, FE_AG_REG_PM1_AGC_WRI__A, FeAgRegPm1AgcWri, 0);
+                        if (status < 0)
+                                break;
+                } while (0);
+        } else if (cfg->ctrlMode == AGC_CTRL_AUTO) {
+                if (((cfg->maxOutputLevel) < (cfg->minOutputLevel)) ||
+                    ((cfg->maxOutputLevel) > DRXD_FE_CTRL_MAX) ||
+                    ((cfg->speed) > DRXD_FE_CTRL_MAX) ||
+                    ((cfg->settleLevel) > DRXD_FE_CTRL_MAX)
+                    )
+                        return -1;
+                do {
+                        u16 FeAgRegAgModeLop;
+                        u16 FeAgRegEgcSetLvl;
+                        u16 slope, offset;
+
+                        /* == Mode == */
+
+                        status = Read16(state, FE_AG_REG_AG_MODE_LOP__A, &FeAgRegAgModeLop, 0);
+                        if (status < 0)
+                                break;
+                        FeAgRegAgModeLop &= (~FE_AG_REG_AG_MODE_LOP_MODE_4__M);
+                        FeAgRegAgModeLop |=
+                            FE_AG_REG_AG_MODE_LOP_MODE_4_DYNAMIC;
+                        status = Write16(state, FE_AG_REG_AG_MODE_LOP__A, FeAgRegAgModeLop, 0);
+                        if (status < 0)
+                                break;
+
+                        /* == Settle level == */
+
+                        FeAgRegEgcSetLvl = (u16) ((cfg->settleLevel >> 1) &
+                                                  FE_AG_REG_EGC_SET_LVL__M);
+                        status = Write16(state, FE_AG_REG_EGC_SET_LVL__A, FeAgRegEgcSetLvl, 0);
+                        if (status < 0)
+                                break;
+
+                        /* == Min/Max == */
+
+                        slope = (u16) ((cfg->maxOutputLevel -
+                                        cfg->minOutputLevel) / 2);
+                        offset = (u16) ((cfg->maxOutputLevel +
+                                         cfg->minOutputLevel) / 2 - 511);
+
+                        status = Write16(state, FE_AG_REG_GC1_AGC_RIC__A, slope, 0);
+                        if (status < 0)
+                                break;
+                        status = Write16(state, FE_AG_REG_GC1_AGC_OFF__A, offset, 0);
+                        if (status < 0)
+                                break;
+
+                        /* == Speed == */
+                        {
+                                const u16 maxRur = 8;
+                                const u16 slowIncrDecLUT[] = { 3, 4, 4, 5, 6 };
+                                const u16 fastIncrDecLUT[] = { 14, 15, 15, 16,
+                                        17, 18, 18, 19,
+                                        20, 21, 22, 23,
+                                        24, 26, 27, 28,
+                                        29, 31
+                                };
+
+                                u16 fineSteps = (DRXD_FE_CTRL_MAX + 1) /
+                                    (maxRur + 1);
+                                u16 fineSpeed = (u16) (cfg->speed -
+                                                       ((cfg->speed /
+                                                         fineSteps) *
+                                                        fineSteps));
+                                u16 invRurCount = (u16) (cfg->speed /
+                                                         fineSteps);
+                                u16 rurCount;
+                                if (invRurCount > maxRur) {
+                                        rurCount = 0;
+                                        fineSpeed += fineSteps;
+                                } else {
+                                        rurCount = maxRur - invRurCount;
+                                }
+
+                                /*
+                                   fastInc = default *
+                                   (2^(fineSpeed/fineSteps))
+                                   => range[default...2*default>
+                                   slowInc = default *
+                                   (2^(fineSpeed/fineSteps))
+                                 */
+                                {
+                                        u16 fastIncrDec =
+                                            fastIncrDecLUT[fineSpeed /
+                                                           ((fineSteps /
+                                                             (14 + 1)) + 1)];
+                                        u16 slowIncrDec =
+                                            slowIncrDecLUT[fineSpeed /
+                                                           (fineSteps /
+                                                            (3 + 1))];
+
+                                        status = Write16(state, FE_AG_REG_EGC_RUR_CNT__A, rurCount, 0);
+                                        if (status < 0)
+                                                break;
+                                        status = Write16(state, FE_AG_REG_EGC_FAS_INC__A, fastIncrDec, 0);
+                                        if (status < 0)
+                                                break;
+                                        status = Write16(state, FE_AG_REG_EGC_FAS_DEC__A, fastIncrDec, 0);
+                                        if (status < 0)
+                                                break;
+                                        status = Write16(state, FE_AG_REG_EGC_SLO_INC__A, slowIncrDec, 0);
+                                        if (status < 0)
+                                                break;
+                                        status = Write16(state, FE_AG_REG_EGC_SLO_DEC__A, slowIncrDec, 0);
+                                        if (status < 0)
+                                                break;
+                                }
+                        }
+                } while (0);
+
+        } else {
+                /* No OFF mode for IF control */
+                return -1;
+        }
+        return status;
+}
+
+static int SetCfgRfAgc(struct drxd_state *state, struct SCfgAgc *cfg)
+{
+        int status = 0;
+
+        if (cfg->outputLevel > DRXD_FE_CTRL_MAX)
+                return -1;
+
+        if (cfg->ctrlMode == AGC_CTRL_USER) {
+                do {
+                        u16 AgModeLop = 0;
+                        u16 level = (cfg->outputLevel);
+
+                        if (level == DRXD_FE_CTRL_MAX)
+                                level++;
+
+                        status = Write16(state, FE_AG_REG_PM2_AGC_WRI__A, level, 0x0000);
+                        if (status < 0)
+                                break;
+
+                        /*==== Mode ====*/
+
+                        /* Powerdown PD2, WRI source */
+                        state->m_FeAgRegAgPwd &= ~(FE_AG_REG_AG_PWD_PWD_PD2__M);
+                        state->m_FeAgRegAgPwd |=
+                            FE_AG_REG_AG_PWD_PWD_PD2_DISABLE;
+                        status = Write16(state, FE_AG_REG_AG_PWD__A, state->m_FeAgRegAgPwd, 0x0000);
+                        if (status < 0)
+                                break;
+
+                        status = Read16(state, FE_AG_REG_AG_MODE_LOP__A, &AgModeLop, 0x0000);
+                        if (status < 0)
+                                break;
+                        AgModeLop &= (~(FE_AG_REG_AG_MODE_LOP_MODE_5__M |
+                                        FE_AG_REG_AG_MODE_LOP_MODE_E__M));
+                        AgModeLop |= (FE_AG_REG_AG_MODE_LOP_MODE_5_STATIC |
+                                      FE_AG_REG_AG_MODE_LOP_MODE_E_STATIC);
+                        status = Write16(state, FE_AG_REG_AG_MODE_LOP__A, AgModeLop, 0x0000);
+                        if (status < 0)
+                                break;
+
+                        /* enable AGC2 pin */
+                        {
+                                u16 FeAgRegAgAgcSio = 0;
+                                status = Read16(state, FE_AG_REG_AG_AGC_SIO__A, &FeAgRegAgAgcSio, 0x0000);
+                                if (status < 0)
+                                        break;
+                                FeAgRegAgAgcSio &=
+                                    ~(FE_AG_REG_AG_AGC_SIO_AGC_SIO_2__M);
+                                FeAgRegAgAgcSio |=
+                                    FE_AG_REG_AG_AGC_SIO_AGC_SIO_2_OUTPUT;
+                                status = Write16(state, FE_AG_REG_AG_AGC_SIO__A, FeAgRegAgAgcSio, 0x0000);
+                                if (status < 0)
+                                        break;
+                        }
+
+                } while (0);
+        } else if (cfg->ctrlMode == AGC_CTRL_AUTO) {
+                u16 AgModeLop = 0;
+
+                do {
+                        u16 level;
+                        /* Automatic control */
+                        /* Powerup PD2, AGC2 as output, TGC source */
+                        (state->m_FeAgRegAgPwd) &=
+                            ~(FE_AG_REG_AG_PWD_PWD_PD2__M);
+                        (state->m_FeAgRegAgPwd) |=
+                            FE_AG_REG_AG_PWD_PWD_PD2_DISABLE;
+                        status = Write16(state, FE_AG_REG_AG_PWD__A, (state->m_FeAgRegAgPwd), 0x0000);
+                        if (status < 0)
+                                break;
+
+                        status = Read16(state, FE_AG_REG_AG_MODE_LOP__A, &AgModeLop, 0x0000);
+                        if (status < 0)
+                                break;
+                        AgModeLop &= (~(FE_AG_REG_AG_MODE_LOP_MODE_5__M |
+                                        FE_AG_REG_AG_MODE_LOP_MODE_E__M));
+                        AgModeLop |= (FE_AG_REG_AG_MODE_LOP_MODE_5_STATIC |
+                                      FE_AG_REG_AG_MODE_LOP_MODE_E_DYNAMIC);
+                        status = Write16(state, FE_AG_REG_AG_MODE_LOP__A, AgModeLop, 0x0000);
+                        if (status < 0)
+                                break;
+                        /* Settle level */
+                        level = (((cfg->settleLevel) >> 4) &
+                                 FE_AG_REG_TGC_SET_LVL__M);
+                        status = Write16(state, FE_AG_REG_TGC_SET_LVL__A, level, 0x0000);
+                        if (status < 0)
+                                break;
+
+                        /* Min/max: don't care */
+
+                        /* Speed: TODO */
+
+                        /* enable AGC2 pin */
+                        {
+                                u16 FeAgRegAgAgcSio = 0;
+                                status = Read16(state, FE_AG_REG_AG_AGC_SIO__A, &FeAgRegAgAgcSio, 0x0000);
+                                if (status < 0)
+                                        break;
+                                FeAgRegAgAgcSio &=
+                                    ~(FE_AG_REG_AG_AGC_SIO_AGC_SIO_2__M);
+                                FeAgRegAgAgcSio |=
+                                    FE_AG_REG_AG_AGC_SIO_AGC_SIO_2_OUTPUT;
+                                status = Write16(state, FE_AG_REG_AG_AGC_SIO__A, FeAgRegAgAgcSio, 0x0000);
+                                if (status < 0)
+                                        break;
+                        }
+
+                } while (0);
+        } else {
+                u16 AgModeLop = 0;
+
+                do {
+                        /* No RF AGC control */
+                        /* Powerdown PD2, AGC2 as output, WRI source */
+                        (state->m_FeAgRegAgPwd) &=
+                            ~(FE_AG_REG_AG_PWD_PWD_PD2__M);
+                        (state->m_FeAgRegAgPwd) |=
+                            FE_AG_REG_AG_PWD_PWD_PD2_ENABLE;
+                        status = Write16(state, FE_AG_REG_AG_PWD__A, (state->m_FeAgRegAgPwd), 0x0000);
+                        if (status < 0)
+                                break;
+
+                        status = Read16(state, FE_AG_REG_AG_MODE_LOP__A, &AgModeLop, 0x0000);
+                        if (status < 0)
+                                break;
+                        AgModeLop &= (~(FE_AG_REG_AG_MODE_LOP_MODE_5__M |
+                                        FE_AG_REG_AG_MODE_LOP_MODE_E__M));
+                        AgModeLop |= (FE_AG_REG_AG_MODE_LOP_MODE_5_STATIC |
+                                      FE_AG_REG_AG_MODE_LOP_MODE_E_STATIC);
+                        status = Write16(state, FE_AG_REG_AG_MODE_LOP__A, AgModeLop, 0x0000);
+                        if (status < 0)
+                                break;
+
+                        /* set FeAgRegAgAgcSio AGC2 (RF) as input */
+                        {
+                                u16 FeAgRegAgAgcSio = 0;
+                                status = Read16(state, FE_AG_REG_AG_AGC_SIO__A, &FeAgRegAgAgcSio, 0x0000);
+                                if (status < 0)
+                                        break;
+                                FeAgRegAgAgcSio &=
+                                    ~(FE_AG_REG_AG_AGC_SIO_AGC_SIO_2__M);
+                                FeAgRegAgAgcSio |=
+                                    FE_AG_REG_AG_AGC_SIO_AGC_SIO_2_INPUT;
+                                status = Write16(state, FE_AG_REG_AG_AGC_SIO__A, FeAgRegAgAgcSio, 0x0000);
+                                if (status < 0)
+                                        break;
+                        }
+                } while (0);
+        }
+        return status;
+}
+
+static int ReadIFAgc(struct drxd_state *state, u32 * pValue)
+{
+        int status = 0;
+
+        *pValue = 0;
+        if (state->if_agc_cfg.ctrlMode != AGC_CTRL_OFF) {
+                u16 Value;
+                status = Read16(state, FE_AG_REG_GC1_AGC_DAT__A, &Value, 0);
+                Value &= FE_AG_REG_GC1_AGC_DAT__M;
+                if (status >= 0) {
+                        /*           3.3V
+                           |
+                           R1
+                           |
+                           Vin - R3 - * -- Vout
+                           |
+                           R2
+                           |
+                           GND
+                         */
+                        u32 R1 = state->if_agc_cfg.R1;
+                        u32 R2 = state->if_agc_cfg.R2;
+                        u32 R3 = state->if_agc_cfg.R3;
+
+                        u32 Vmax = (3300 * R2) / (R1 + R2);
+                        u32 Rpar = (R2 * R3) / (R3 + R2);
+                        u32 Vmin = (3300 * Rpar) / (R1 + Rpar);
+                        u32 Vout = Vmin + ((Vmax - Vmin) * Value) / 1024;
+
+                        *pValue = Vout;
+                }
+        }
+        return status;
+}
+
+static int load_firmware(struct drxd_state *state, const char *fw_name)
+{
+        const struct firmware *fw;
+
+        if (request_firmware(&fw, fw_name, state->dev) < 0) {
+                printk(KERN_ERR "drxd: firmware load failure [%s]\n", fw_name);
+                return -EIO;
+        }
+
+        state->microcode = kzalloc(fw->size, GFP_KERNEL);
+        if (state->microcode == NULL) {
+                printk(KERN_ERR "drxd: firmware load failure: nomemory\n");
+                return -ENOMEM;
+        }
+
+        memcpy(state->microcode, fw->data, fw->size);
+        state->microcode_length = fw->size;
+        return 0;
+}
+
+static int DownloadMicrocode(struct drxd_state *state,
+                             const u8 *pMCImage, u32 Length)
+{
+        u8 *pSrc;
+        u16 Flags;
+        u32 Address;
+        u16 nBlocks;
+        u16 BlockSize;
+        u16 BlockCRC;
+        u32 offset = 0;
+        int i, status = 0;
+
+        pSrc = (u8 *) pMCImage;
+        Flags = (pSrc[0] << 8) | pSrc[1];
+        pSrc += sizeof(u16);
+        offset += sizeof(u16);
+        nBlocks = (pSrc[0] << 8) | pSrc[1];
+        pSrc += sizeof(u16);
+        offset += sizeof(u16);
+
+        for (i = 0; i < nBlocks; i++) {
+                Address = (pSrc[0] << 24) | (pSrc[1] << 16) |
+                    (pSrc[2] << 8) | pSrc[3];
+                pSrc += sizeof(u32);
+                offset += sizeof(u32);
+
+                BlockSize = ((pSrc[0] << 8) | pSrc[1]) * sizeof(u16);
+                pSrc += sizeof(u16);
+                offset += sizeof(u16);
+
+                Flags = (pSrc[0] << 8) | pSrc[1];
+                pSrc += sizeof(u16);
+                offset += sizeof(u16);
+
+                BlockCRC = (pSrc[0] << 8) | pSrc[1];
+                pSrc += sizeof(u16);
+                offset += sizeof(u16);
+
+                status = WriteBlock(state, Address, BlockSize,
+                                    pSrc, DRX_I2C_CLEARCRC);
+                if (status < 0)
+                        break;
+                pSrc += BlockSize;
+                offset += BlockSize;
+        }
+
+        return status;
+}
+
+static int HI_Command(struct drxd_state *state, u16 cmd, u16 * pResult)
+{
+        u32 nrRetries = 0;
+        u16 waitCmd;
+        int status;
+
+        status = Write16(state, HI_RA_RAM_SRV_CMD__A, cmd, 0);
+        if (status < 0)
+                return status;
+
+        do {
+                nrRetries += 1;
+                if (nrRetries > DRXD_MAX_RETRIES) {
+                        status = -1;
+                        break;
+                };
+                status = Read16(state, HI_RA_RAM_SRV_CMD__A, &waitCmd, 0);
+        } while (waitCmd != 0);
+
+        if (status >= 0)
+                status = Read16(state, HI_RA_RAM_SRV_RES__A, pResult, 0);
+        return status;
+}
+
+static int HI_CfgCommand(struct drxd_state *state)
+{
+        int status = 0;
+
+        mutex_lock(&state->mutex);
+        Write16(state, HI_RA_RAM_SRV_CFG_KEY__A, HI_RA_RAM_SRV_RST_KEY_ACT, 0);
+        Write16(state, HI_RA_RAM_SRV_CFG_DIV__A, state->hi_cfg_timing_div, 0);
+        Write16(state, HI_RA_RAM_SRV_CFG_BDL__A, state->hi_cfg_bridge_delay, 0);
+        Write16(state, HI_RA_RAM_SRV_CFG_WUP__A, state->hi_cfg_wakeup_key, 0);
+        Write16(state, HI_RA_RAM_SRV_CFG_ACT__A, state->hi_cfg_ctrl, 0);
+
+        Write16(state, HI_RA_RAM_SRV_CFG_KEY__A, HI_RA_RAM_SRV_RST_KEY_ACT, 0);
+
+        if ((state->hi_cfg_ctrl & HI_RA_RAM_SRV_CFG_ACT_PWD_EXE) ==
+            HI_RA_RAM_SRV_CFG_ACT_PWD_EXE)
+                status = Write16(state, HI_RA_RAM_SRV_CMD__A,
+                                 HI_RA_RAM_SRV_CMD_CONFIG, 0);
+        else
+                status = HI_Command(state, HI_RA_RAM_SRV_CMD_CONFIG, 0);
+        mutex_unlock(&state->mutex);
+        return status;
+}
+
+static int InitHI(struct drxd_state *state)
+{
+        state->hi_cfg_wakeup_key = (state->chip_adr);
+        /* port/bridge/power down ctrl */
+        state->hi_cfg_ctrl = HI_RA_RAM_SRV_CFG_ACT_SLV0_ON;
+        return HI_CfgCommand(state);
+}
+
+static int HI_ResetCommand(struct drxd_state *state)
+{
+        int status;
+
+        mutex_lock(&state->mutex);
+        status = Write16(state, HI_RA_RAM_SRV_RST_KEY__A,
+                         HI_RA_RAM_SRV_RST_KEY_ACT, 0);
+        if (status == 0)
+                status = HI_Command(state, HI_RA_RAM_SRV_CMD_RESET, 0);
+        mutex_unlock(&state->mutex);
+        msleep(1);
+        return status;
+}
+
+static int DRX_ConfigureI2CBridge(struct drxd_state *state, int bEnableBridge)
+{
+        state->hi_cfg_ctrl &= (~HI_RA_RAM_SRV_CFG_ACT_BRD__M);
+        if (bEnableBridge)
+                state->hi_cfg_ctrl |= HI_RA_RAM_SRV_CFG_ACT_BRD_ON;
+        else
+                state->hi_cfg_ctrl |= HI_RA_RAM_SRV_CFG_ACT_BRD_OFF;
+
+        return HI_CfgCommand(state);
+}
+
+#define HI_TR_WRITE      0x9
+#define HI_TR_READ       0xA
+#define HI_TR_READ_WRITE 0xB
+#define HI_TR_BROADCAST  0x4
+
+#if 0
+static int AtomicReadBlock(struct drxd_state *state,
+                           u32 Addr, u16 DataSize, u8 *pData, u8 Flags)
+{
+        int status;
+        int i = 0;
+
+        /* Parameter check */
+        if ((!pData) || ((DataSize & 1) != 0))
+                return -1;
+
+        mutex_lock(&state->mutex);
+
+        do {
+                /* Instruct HI to read n bytes */
+                /* TODO use proper names forthese egisters */
+                status = Write16(state, HI_RA_RAM_SRV_CFG_KEY__A, (HI_TR_FUNC_ADDR & 0xFFFF), 0);
+                if (status < 0)
+                        break;
+                status = Write16(state, HI_RA_RAM_SRV_CFG_DIV__A, (u16) (Addr >> 16), 0);
+                if (status < 0)
+                        break;
+                status = Write16(state, HI_RA_RAM_SRV_CFG_BDL__A, (u16) (Addr & 0xFFFF), 0);
+                if (status < 0)
+                        break;
+                status = Write16(state, HI_RA_RAM_SRV_CFG_WUP__A, (u16) ((DataSize / 2) - 1), 0);
+                if (status < 0)
+                        break;
+                status = Write16(state, HI_RA_RAM_SRV_CFG_ACT__A, HI_TR_READ, 0);
+                if (status < 0)
+                        break;
+
+                status = HI_Command(state, HI_RA_RAM_SRV_CMD_EXECUTE, 0);
+                if (status < 0)
+                        break;
+
+        } while (0);
+
+        if (status >= 0) {
+                for (i = 0; i < (DataSize / 2); i += 1) {
+                        u16 word;
+
+                        status = Read16(state, (HI_RA_RAM_USR_BEGIN__A + i),
+                                        &word, 0);
+                        if (status < 0)
+                                break;
+                        pData[2 * i] = (u8) (word & 0xFF);
+                        pData[(2 * i) + 1] = (u8) (word >> 8);
+                }
+        }
+        mutex_unlock(&state->mutex);
+        return status;
+}
+
+static int AtomicReadReg32(struct drxd_state *state,
+                           u32 Addr, u32 *pData, u8 Flags)
+{
+        u8 buf[sizeof(u32)];
+        int status;
+
+        if (!pData)
+                return -1;
+        status = AtomicReadBlock(state, Addr, sizeof(u32), buf, Flags);
+        *pData = (((u32) buf[0]) << 0) +
+            (((u32) buf[1]) << 8) +
+            (((u32) buf[2]) << 16) + (((u32) buf[3]) << 24);
+        return status;
+}
+#endif
+
+static int StopAllProcessors(struct drxd_state *state)
+{
+        return Write16(state, HI_COMM_EXEC__A,
+                       SC_COMM_EXEC_CTL_STOP, DRX_I2C_BROADCAST);
+}
+
+static int EnableAndResetMB(struct drxd_state *state)
+{
+        if (state->type_A) {
+                /* disable? monitor bus observe @ EC_OC */
+                Write16(state, EC_OC_REG_OC_MON_SIO__A, 0x0000, 0x0000);
+        }
+
+        /* do inverse broadcast, followed by explicit write to HI */
+        Write16(state, HI_COMM_MB__A, 0x0000, DRX_I2C_BROADCAST);
+        Write16(state, HI_COMM_MB__A, 0x0000, 0x0000);
+        return 0;
+}
+
+static int InitCC(struct drxd_state *state)
+{
+        if (state->osc_clock_freq == 0 ||
+            state->osc_clock_freq > 20000 ||
+            (state->osc_clock_freq % 4000) != 0) {
+                printk(KERN_ERR "invalid osc frequency %d\n", state->osc_clock_freq);
+                return -1;
+        }
+
+        Write16(state, CC_REG_OSC_MODE__A, CC_REG_OSC_MODE_M20, 0);
+        Write16(state, CC_REG_PLL_MODE__A, CC_REG_PLL_MODE_BYPASS_PLL |
+                CC_REG_PLL_MODE_PUMP_CUR_12, 0);
+        Write16(state, CC_REG_REF_DIVIDE__A, state->osc_clock_freq / 4000, 0);
+        Write16(state, CC_REG_PWD_MODE__A, CC_REG_PWD_MODE_DOWN_PLL, 0);
+        Write16(state, CC_REG_UPDATE__A, CC_REG_UPDATE_KEY, 0);
+
+        return 0;
+}
+
+static int ResetECOD(struct drxd_state *state)
+{
+        int status = 0;
+
+        if (state->type_A)
+                status = Write16(state, EC_OD_REG_SYNC__A, 0x0664, 0);
+        else
+                status = Write16(state, B_EC_OD_REG_SYNC__A, 0x0664, 0);
+
+        if (!(status < 0))
+                status = WriteTable(state, state->m_ResetECRAM);
+        if (!(status < 0))
+                status = Write16(state, EC_OD_REG_COMM_EXEC__A, 0x0001, 0);
+        return status;
+}
+
+/* Configure PGA switch */
+
+static int SetCfgPga(struct drxd_state *state, int pgaSwitch)
+{
+        int status;
+        u16 AgModeLop = 0;
+        u16 AgModeHip = 0;
+        do {
+                if (pgaSwitch) {
+                        /* PGA on */
+                        /* fine gain */
+                        status = Read16(state, B_FE_AG_REG_AG_MODE_LOP__A, &AgModeLop, 0x0000);
+                        if (status < 0)
+                                break;
+                        AgModeLop &= (~(B_FE_AG_REG_AG_MODE_LOP_MODE_C__M));
+                        AgModeLop |= B_FE_AG_REG_AG_MODE_LOP_MODE_C_DYNAMIC;
+                        status = Write16(state, B_FE_AG_REG_AG_MODE_LOP__A, AgModeLop, 0x0000);
+                        if (status < 0)
+                                break;
+
+                        /* coarse gain */
+                        status = Read16(state, B_FE_AG_REG_AG_MODE_HIP__A, &AgModeHip, 0x0000);
+                        if (status < 0)
+                                break;
+                        AgModeHip &= (~(B_FE_AG_REG_AG_MODE_HIP_MODE_J__M));
+                        AgModeHip |= B_FE_AG_REG_AG_MODE_HIP_MODE_J_DYNAMIC;
+                        status = Write16(state, B_FE_AG_REG_AG_MODE_HIP__A, AgModeHip, 0x0000);
+                        if (status < 0)
+                                break;
+
+                        /* enable fine and coarse gain, enable AAF,
+                           no ext resistor */
+                        status = Write16(state, B_FE_AG_REG_AG_PGA_MODE__A, B_FE_AG_REG_AG_PGA_MODE_PFY_PCY_AFY_REN, 0x0000);
+                        if (status < 0)
+                                break;
+                } else {
+                        /* PGA off, bypass */
+
+                        /* fine gain */
+                        status = Read16(state, B_FE_AG_REG_AG_MODE_LOP__A, &AgModeLop, 0x0000);
+                        if (status < 0)
+                                break;
+                        AgModeLop &= (~(B_FE_AG_REG_AG_MODE_LOP_MODE_C__M));
+                        AgModeLop |= B_FE_AG_REG_AG_MODE_LOP_MODE_C_STATIC;
+                        status = Write16(state, B_FE_AG_REG_AG_MODE_LOP__A, AgModeLop, 0x0000);
+                        if (status < 0)
+                                break;
+
+                        /* coarse gain */
+                        status = Read16(state, B_FE_AG_REG_AG_MODE_HIP__A, &AgModeHip, 0x0000);
+                        if (status < 0)
+                                break;
+                        AgModeHip &= (~(B_FE_AG_REG_AG_MODE_HIP_MODE_J__M));
+                        AgModeHip |= B_FE_AG_REG_AG_MODE_HIP_MODE_J_STATIC;
+                        status = Write16(state, B_FE_AG_REG_AG_MODE_HIP__A, AgModeHip, 0x0000);
+                        if (status < 0)
+                                break;
+
+                        /* disable fine and coarse gain, enable AAF,
+                           no ext resistor */
+                        status = Write16(state, B_FE_AG_REG_AG_PGA_MODE__A, B_FE_AG_REG_AG_PGA_MODE_PFN_PCN_AFY_REN, 0x0000);
+                        if (status < 0)
+                                break;
+                }
+        } while (0);
+        return status;
+}
+
+static int InitFE(struct drxd_state *state)
+{
+        int status;
+
+        do {
+                status = WriteTable(state, state->m_InitFE_1);
+                if (status < 0)
+                        break;
+
+                if (state->type_A) {
+                        status = Write16(state, FE_AG_REG_AG_PGA_MODE__A,
+                                         FE_AG_REG_AG_PGA_MODE_PFN_PCN_AFY_REN,
+                                         0);
+                } else {
+                        if (state->PGA)
+                                status = SetCfgPga(state, 0);
+                        else
+                                status =
+                                    Write16(state, B_FE_AG_REG_AG_PGA_MODE__A,
+                                            B_FE_AG_REG_AG_PGA_MODE_PFN_PCN_AFY_REN,
+                                            0);
+                }
+
+                if (status < 0)
+                        break;
+                status = Write16(state, FE_AG_REG_AG_AGC_SIO__A, state->m_FeAgRegAgAgcSio, 0x0000);
+                if (status < 0)
+                        break;
+                status = Write16(state, FE_AG_REG_AG_PWD__A, state->m_FeAgRegAgPwd, 0x0000);
+                if (status < 0)
+                        break;
+
+                status = WriteTable(state, state->m_InitFE_2);
+                if (status < 0)
+                        break;
+
+        } while (0);
+
+        return status;
+}
+
+static int InitFT(struct drxd_state *state)
+{
+        /*
+           norm OFFSET,  MB says =2 voor 8K en =3 voor 2K waarschijnlijk
+           SC stuff
+         */
+        return Write16(state, FT_REG_COMM_EXEC__A, 0x0001, 0x0000);
+}
+
+static int SC_WaitForReady(struct drxd_state *state)
+{
+        u16 curCmd;
+        int i;
+
+        for (i = 0; i < DRXD_MAX_RETRIES; i += 1) {
+                int status = Read16(state, SC_RA_RAM_CMD__A, &curCmd, 0);
+                if (status == 0 || curCmd == 0)
+                        return status;
+        }
+        return -1;
+}
+
+static int SC_SendCommand(struct drxd_state *state, u16 cmd)
+{
+        int status = 0;
+        u16 errCode;
+
+        Write16(state, SC_RA_RAM_CMD__A, cmd, 0);
+        SC_WaitForReady(state);
+
+        Read16(state, SC_RA_RAM_CMD_ADDR__A, &errCode, 0);
+
+        if (errCode == 0xFFFF) {
+                printk(KERN_ERR "Command Error\n");
+                status = -1;
+        }
+
+        return status;
+}
+
+static int SC_ProcStartCommand(struct drxd_state *state,
+                               u16 subCmd, u16 param0, u16 param1)
+{
+        int status = 0;
+        u16 scExec;
+
+        mutex_lock(&state->mutex);
+        do {
+                Read16(state, SC_COMM_EXEC__A, &scExec, 0);
+                if (scExec != 1) {
+                        status = -1;
+                        break;
+                }
+                SC_WaitForReady(state);
+                Write16(state, SC_RA_RAM_CMD_ADDR__A, subCmd, 0);
+                Write16(state, SC_RA_RAM_PARAM1__A, param1, 0);
+                Write16(state, SC_RA_RAM_PARAM0__A, param0, 0);
+
+                SC_SendCommand(state, SC_RA_RAM_CMD_PROC_START);
+        } while (0);
+        mutex_unlock(&state->mutex);
+        return status;
+}
+
+static int SC_SetPrefParamCommand(struct drxd_state *state,
+                                  u16 subCmd, u16 param0, u16 param1)
+{
+        int status;
+
+        mutex_lock(&state->mutex);
+        do {
+                status = SC_WaitForReady(state);
+                if (status < 0)
+                        break;
+                status = Write16(state, SC_RA_RAM_CMD_ADDR__A, subCmd, 0);
+                if (status < 0)
+                        break;
+                status = Write16(state, SC_RA_RAM_PARAM1__A, param1, 0);
+                if (status < 0)
+                        break;
+                status = Write16(state, SC_RA_RAM_PARAM0__A, param0, 0);
+                if (status < 0)
+                        break;
+
+                status = SC_SendCommand(state, SC_RA_RAM_CMD_SET_PREF_PARAM);
+                if (status < 0)
+                        break;
+        } while (0);
+        mutex_unlock(&state->mutex);
+        return status;
+}
+
+#if 0
+static int SC_GetOpParamCommand(struct drxd_state *state, u16 * result)
+{
+        int status = 0;
+
+        mutex_lock(&state->mutex);
+        do {
+                status = SC_WaitForReady(state);
+                if (status < 0)
+                        break;
+                status = SC_SendCommand(state, SC_RA_RAM_CMD_GET_OP_PARAM);
+                if (status < 0)
+                        break;
+                status = Read16(state, SC_RA_RAM_PARAM0__A, result, 0);
+                if (status < 0)
+                        break;
+        } while (0);
+        mutex_unlock(&state->mutex);
+        return status;
+}
+#endif
+
+static int ConfigureMPEGOutput(struct drxd_state *state, int bEnableOutput)
+{
+        int status;
+
+        do {
+                u16 EcOcRegIprInvMpg = 0;
+                u16 EcOcRegOcModeLop = 0;
+                u16 EcOcRegOcModeHip = 0;
+                u16 EcOcRegOcMpgSio = 0;
+
+                /*CHK_ERROR(Read16(state, EC_OC_REG_OC_MODE_LOP__A, &EcOcRegOcModeLop, 0)); */
+
+                if (state->operation_mode == OM_DVBT_Diversity_Front) {
+                        if (bEnableOutput) {
+                                EcOcRegOcModeHip |=
+                                    B_EC_OC_REG_OC_MODE_HIP_MPG_BUS_SRC_MONITOR;
+                        } else
+                                EcOcRegOcMpgSio |= EC_OC_REG_OC_MPG_SIO__M;
+                        EcOcRegOcModeLop |=
+                            EC_OC_REG_OC_MODE_LOP_PAR_ENA_DISABLE;
+                } else {
+                        EcOcRegOcModeLop = state->m_EcOcRegOcModeLop;
+
+                        if (bEnableOutput)
+                                EcOcRegOcMpgSio &= (~(EC_OC_REG_OC_MPG_SIO__M));
+                        else
+                                EcOcRegOcMpgSio |= EC_OC_REG_OC_MPG_SIO__M;
+
+                        /* Don't Insert RS Byte */
+                        if (state->insert_rs_byte) {
+                                EcOcRegOcModeLop &=
+                                    (~(EC_OC_REG_OC_MODE_LOP_PAR_ENA__M));
+                                EcOcRegOcModeHip &=
+                                    (~EC_OC_REG_OC_MODE_HIP_MPG_PAR_VAL__M);
+                                EcOcRegOcModeHip |=
+                                    EC_OC_REG_OC_MODE_HIP_MPG_PAR_VAL_ENABLE;
+                        } else {
+                                EcOcRegOcModeLop |=
+                                    EC_OC_REG_OC_MODE_LOP_PAR_ENA_DISABLE;
+                                EcOcRegOcModeHip &=
+                                    (~EC_OC_REG_OC_MODE_HIP_MPG_PAR_VAL__M);
+                                EcOcRegOcModeHip |=
+                                    EC_OC_REG_OC_MODE_HIP_MPG_PAR_VAL_DISABLE;
+                        }
+
+                        /* Mode = Parallel */
+                        if (state->enable_parallel)
+                                EcOcRegOcModeLop &=
+                                    (~(EC_OC_REG_OC_MODE_LOP_MPG_TRM_MDE__M));
+                        else
+                                EcOcRegOcModeLop |=
+                                    EC_OC_REG_OC_MODE_LOP_MPG_TRM_MDE_SERIAL;
+                }
+                /* Invert Data */
+                /* EcOcRegIprInvMpg |= 0x00FF; */
+                EcOcRegIprInvMpg &= (~(0x00FF));
+
+                /* Invert Error ( we don't use the pin ) */
+                /*  EcOcRegIprInvMpg |= 0x0100; */
+                EcOcRegIprInvMpg &= (~(0x0100));
+
+                /* Invert Start ( we don't use the pin ) */
+                /* EcOcRegIprInvMpg |= 0x0200; */
+                EcOcRegIprInvMpg &= (~(0x0200));
+
+                /* Invert Valid ( we don't use the pin ) */
+                /* EcOcRegIprInvMpg |= 0x0400; */
+                EcOcRegIprInvMpg &= (~(0x0400));
+
+                /* Invert Clock */
+                /* EcOcRegIprInvMpg |= 0x0800; */
+                EcOcRegIprInvMpg &= (~(0x0800));
+
+                /* EcOcRegOcModeLop =0x05; */
+                status = Write16(state, EC_OC_REG_IPR_INV_MPG__A, EcOcRegIprInvMpg, 0);
+                if (status < 0)
+                        break;
+                status = Write16(state, EC_OC_REG_OC_MODE_LOP__A, EcOcRegOcModeLop, 0);
+                if (status < 0)
+                        break;
+                status = Write16(state, EC_OC_REG_OC_MODE_HIP__A, EcOcRegOcModeHip, 0x0000);
+                if (status < 0)
+                        break;
+                status = Write16(state, EC_OC_REG_OC_MPG_SIO__A, EcOcRegOcMpgSio, 0);
+                if (status < 0)
+                        break;
+        } while (0);
+        return status;
+}
+
+static int SetDeviceTypeId(struct drxd_state *state)
+{
+        int status = 0;
+        u16 deviceId = 0;
+
+        do {
+                status = Read16(state, CC_REG_JTAGID_L__A, &deviceId, 0);
+                if (status < 0)
+                        break;
+                /* TODO: why twice? */
+                status = Read16(state, CC_REG_JTAGID_L__A, &deviceId, 0);
+                if (status < 0)
+                        break;
+                printk(KERN_INFO "drxd: deviceId = %04x\n", deviceId);
+
+                state->type_A = 0;
+                state->PGA = 0;
+                state->diversity = 0;
+                if (deviceId == 0) {    /* on A2 only 3975 available */
+                        state->type_A = 1;
+                        printk(KERN_INFO "DRX3975D-A2\n");
+                } else {
+                        deviceId >>= 12;
+                        printk(KERN_INFO "DRX397%dD-B1\n", deviceId);
+                        switch (deviceId) {
+                        case 4:
+                                state->diversity = 1;
+                        case 3:
+                        case 7:
+                                state->PGA = 1;
+                                break;
+                        case 6:
+                                state->diversity = 1;
+                        case 5:
+                        case 8:
+                                break;
+                        default:
+                                status = -1;
+                                break;
+                        }
+                }
+        } while (0);
+
+        if (status < 0)
+                return status;
+
+        /* Init Table selection */
+        state->m_InitAtomicRead = DRXD_InitAtomicRead;
+        state->m_InitSC = DRXD_InitSC;
+        state->m_ResetECRAM = DRXD_ResetECRAM;
+        if (state->type_A) {
+                state->m_ResetCEFR = DRXD_ResetCEFR;
+                state->m_InitFE_1 = DRXD_InitFEA2_1;
+                state->m_InitFE_2 = DRXD_InitFEA2_2;
+                state->m_InitCP = DRXD_InitCPA2;
+                state->m_InitCE = DRXD_InitCEA2;
+                state->m_InitEQ = DRXD_InitEQA2;
+                state->m_InitEC = DRXD_InitECA2;
+                if (load_firmware(state, DRX_FW_FILENAME_A2))
+                        return -EIO;
+        } else {
+                state->m_ResetCEFR = NULL;
+                state->m_InitFE_1 = DRXD_InitFEB1_1;
+                state->m_InitFE_2 = DRXD_InitFEB1_2;
+                state->m_InitCP = DRXD_InitCPB1;
+                state->m_InitCE = DRXD_InitCEB1;
+                state->m_InitEQ = DRXD_InitEQB1;
+                state->m_InitEC = DRXD_InitECB1;
+                if (load_firmware(state, DRX_FW_FILENAME_B1))
+                        return -EIO;
+        }
+        if (state->diversity) {
+                state->m_InitDiversityFront = DRXD_InitDiversityFront;
+                state->m_InitDiversityEnd = DRXD_InitDiversityEnd;
+                state->m_DisableDiversity = DRXD_DisableDiversity;
+                state->m_StartDiversityFront = DRXD_StartDiversityFront;
+                state->m_StartDiversityEnd = DRXD_StartDiversityEnd;
+                state->m_DiversityDelay8MHZ = DRXD_DiversityDelay8MHZ;
+                state->m_DiversityDelay6MHZ = DRXD_DiversityDelay6MHZ;
+        } else {
+                state->m_InitDiversityFront = NULL;
+                state->m_InitDiversityEnd = NULL;
+                state->m_DisableDiversity = NULL;
+                state->m_StartDiversityFront = NULL;
+                state->m_StartDiversityEnd = NULL;
+                state->m_DiversityDelay8MHZ = NULL;
+                state->m_DiversityDelay6MHZ = NULL;
+        }
+
+        return status;
+}
+
+static int CorrectSysClockDeviation(struct drxd_state *state)
+{
+        int status;
+        s32 incr = 0;
+        s32 nomincr = 0;
+        u32 bandwidth = 0;
+        u32 sysClockInHz = 0;
+        u32 sysClockFreq = 0;   /* in kHz */
+        s16 oscClockDeviation;
+        s16 Diff;
+
+        do {
+                /* Retrieve bandwidth and incr, sanity check */
+
+                /* These accesses should be AtomicReadReg32, but that
+                   causes trouble (at least for diversity */
+                status = Read32(state, LC_RA_RAM_IFINCR_NOM_L__A, ((u32 *) &nomincr), 0);
+                if (status < 0)
+                        break;
+                status = Read32(state, FE_IF_REG_INCR0__A, (u32 *) &incr, 0);
+                if (status < 0)
+                        break;
+
+                if (state->type_A) {
+                        if ((nomincr - incr < -500) || (nomincr - incr > 500))
+                                break;
+                } else {
+                        if ((nomincr - incr < -2000) || (nomincr - incr > 2000))
+                                break;
+                }
+
+                switch (state->param.u.ofdm.bandwidth) {
+                case BANDWIDTH_8_MHZ:
+                        bandwidth = DRXD_BANDWIDTH_8MHZ_IN_HZ;
+                        break;
+                case BANDWIDTH_7_MHZ:
+                        bandwidth = DRXD_BANDWIDTH_7MHZ_IN_HZ;
+                        break;
+                case BANDWIDTH_6_MHZ:
+                        bandwidth = DRXD_BANDWIDTH_6MHZ_IN_HZ;
+                        break;
+                default:
+                        return -1;
+                        break;
+                }
+
+                /* Compute new sysclock value
+                   sysClockFreq = (((incr + 2^23)*bandwidth)/2^21)/1000 */
+                incr += (1 << 23);
+                sysClockInHz = MulDiv32(incr, bandwidth, 1 << 21);
+                sysClockFreq = (u32) (sysClockInHz / 1000);
+                /* rounding */
+                if ((sysClockInHz % 1000) > 500)
+                        sysClockFreq++;
+
+                /* Compute clock deviation in ppm */
+                oscClockDeviation = (u16) ((((s32) (sysClockFreq) -
+                                             (s32)
+                                             (state->expected_sys_clock_freq)) *
+                                            1000000L) /
+                                           (s32)
+                                           (state->expected_sys_clock_freq));
+
+                Diff = oscClockDeviation - state->osc_clock_deviation;
+                /*printk(KERN_INFO "sysclockdiff=%d\n", Diff); */
+                if (Diff >= -200 && Diff <= 200) {
+                        state->sys_clock_freq = (u16) sysClockFreq;
+                        if (oscClockDeviation != state->osc_clock_deviation) {
+                                if (state->config.osc_deviation) {
+                                        state->config.osc_deviation(state->priv,
+                                                                    oscClockDeviation,
+                                                                    1);
+                                        state->osc_clock_deviation =
+                                            oscClockDeviation;
+                                }
+                        }
+                        /* switch OFF SRMM scan in SC */
+                        status = Write16(state, SC_RA_RAM_SAMPLE_RATE_COUNT__A, DRXD_OSCDEV_DONT_SCAN, 0);
+                        if (status < 0)
+                                break;
+                        /* overrule FE_IF internal value for
+                           proper re-locking */
+                        status = Write16(state, SC_RA_RAM_IF_SAVE__AX, state->current_fe_if_incr, 0);
+                        if (status < 0)
+                                break;
+                        state->cscd_state = CSCD_SAVED;
+                }
+        } while (0);
+
+        return status;
+}
+
+static int DRX_Stop(struct drxd_state *state)
+{
+        int status;
+
+        if (state->drxd_state != DRXD_STARTED)
+                return 0;
+
+        do {
+                if (state->cscd_state != CSCD_SAVED) {
+                        u32 lock;
+                        status = DRX_GetLockStatus(state, &lock);
+                        if (status < 0)
+                                break;
+                }
+
+                status = StopOC(state);
+                if (status < 0)
+                        break;
+
+                state->drxd_state = DRXD_STOPPED;
+
+                status = ConfigureMPEGOutput(state, 0);
+                if (status < 0)
+                        break;
+
+                if (state->type_A) {
+                        /* Stop relevant processors off the device */
+                        status = Write16(state, EC_OD_REG_COMM_EXEC__A, 0x0000, 0x0000);
+                        if (status < 0)
+                                break;
+
+                        status = Write16(state, SC_COMM_EXEC__A, SC_COMM_EXEC_CTL_STOP, 0);
+                        if (status < 0)
+                                break;
+                        status = Write16(state, LC_COMM_EXEC__A, SC_COMM_EXEC_CTL_STOP, 0);
+                        if (status < 0)
+                                break;
+                } else {
+                        /* Stop all processors except HI & CC & FE */
+                        status = Write16(state, B_SC_COMM_EXEC__A, SC_COMM_EXEC_CTL_STOP, 0);
+                        if (status < 0)
+                                break;
+                        status = Write16(state, B_LC_COMM_EXEC__A, SC_COMM_EXEC_CTL_STOP, 0);
+                        if (status < 0)
+                                break;
+                        status = Write16(state, B_FT_COMM_EXEC__A, SC_COMM_EXEC_CTL_STOP, 0);
+                        if (status < 0)
+                                break;
+                        status = Write16(state, B_CP_COMM_EXEC__A, SC_COMM_EXEC_CTL_STOP, 0);
+                        if (status < 0)
+                                break;
+                        status = Write16(state, B_CE_COMM_EXEC__A, SC_COMM_EXEC_CTL_STOP, 0);
+                        if (status < 0)
+                                break;
+                        status = Write16(state, B_EQ_COMM_EXEC__A, SC_COMM_EXEC_CTL_STOP, 0);
+                        if (status < 0)
+                                break;
+                        status = Write16(state, EC_OD_REG_COMM_EXEC__A, 0x0000, 0);
+                        if (status < 0)
+                                break;
+                }
+
+        } while (0);
+        return status;
+}
+
+int SetOperationMode(struct drxd_state *state, int oMode)
+{
+        int status;
+
+        do {
+                if (state->drxd_state != DRXD_STOPPED) {
+                        status = -1;
+                        break;
+                }
+
+                if (oMode == state->operation_mode) {
+                        status = 0;
+                        break;
+                }
+
+                if (oMode != OM_Default && !state->diversity) {
+                        status = -1;
+                        break;
+                }
+
+                switch (oMode) {
+                case OM_DVBT_Diversity_Front:
+                        status = WriteTable(state, state->m_InitDiversityFront);
+                        break;
+                case OM_DVBT_Diversity_End:
+                        status = WriteTable(state, state->m_InitDiversityEnd);
+                        break;
+                case OM_Default:
+                        /* We need to check how to
+                           get DRXD out of diversity */
+                default:
+                        status = WriteTable(state, state->m_DisableDiversity);
+                        break;
+                }
+        } while (0);
+
+        if (!status)
+                state->operation_mode = oMode;
+        return status;
+}
+
+static int StartDiversity(struct drxd_state *state)
+{
+        int status = 0;
+        u16 rcControl;
+
+        do {
+                if (state->operation_mode == OM_DVBT_Diversity_Front) {
+                        status = WriteTable(state, state->m_StartDiversityFront);
+                        if (status < 0)
+                                break;
+                } else if (state->operation_mode == OM_DVBT_Diversity_End) {
+                        status = WriteTable(state, state->m_StartDiversityEnd);
+                        if (status < 0)
+                                break;
+                        if (state->param.u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
+                                status = WriteTable(state, state->m_DiversityDelay8MHZ);
+                                if (status < 0)
+                                        break;
+                        } else {
+                                status = WriteTable(state, state->m_DiversityDelay6MHZ);
+                                if (status < 0)
+                                        break;
+                        }
+
+                        status = Read16(state, B_EQ_REG_RC_SEL_CAR__A, &rcControl, 0);
+                        if (status < 0)
+                                break;
+                        rcControl &= ~(B_EQ_REG_RC_SEL_CAR_FFTMODE__M);
+                        rcControl |= B_EQ_REG_RC_SEL_CAR_DIV_ON |
+                            /*  combining enabled */
+                            B_EQ_REG_RC_SEL_CAR_MEAS_A_CC |
+                            B_EQ_REG_RC_SEL_CAR_PASS_A_CC |
+                            B_EQ_REG_RC_SEL_CAR_LOCAL_A_CC;
+                        status = Write16(state, B_EQ_REG_RC_SEL_CAR__A, rcControl, 0);
+                        if (status < 0)
+                                break;
+                }
+        } while (0);
+        return status;
+}
+
+static int SetFrequencyShift(struct drxd_state *state,
+                             u32 offsetFreq, int channelMirrored)
+{
+        int negativeShift = (state->tuner_mirrors == channelMirrored);
+
+        /* Handle all mirroring
+         *
+         * Note: ADC mirroring (aliasing) is implictly handled by limiting
+         * feFsRegAddInc to 28 bits below
+         * (if the result before masking is more than 28 bits, this means
+         *  that the ADC is mirroring.
+         * The masking is in fact the aliasing of the ADC)
+         *
+         */
+
+        /* Compute register value, unsigned computation */
+        state->fe_fs_add_incr = MulDiv32(state->intermediate_freq +
+                                         offsetFreq,
+                                         1 << 28, state->sys_clock_freq);
+        /* Remove integer part */
+        state->fe_fs_add_incr &= 0x0FFFFFFFL;
+        if (negativeShift)
+                state->fe_fs_add_incr = ((1 << 28) - state->fe_fs_add_incr);
+
+        /* Save the frequency shift without tunerOffset compensation
+           for CtrlGetChannel. */
+        state->org_fe_fs_add_incr = MulDiv32(state->intermediate_freq,
+                                             1 << 28, state->sys_clock_freq);
+        /* Remove integer part */
+        state->org_fe_fs_add_incr &= 0x0FFFFFFFL;
+        if (negativeShift)
+                state->org_fe_fs_add_incr = ((1L << 28) -
+                                             state->org_fe_fs_add_incr);
+
+        return Write32(state, FE_FS_REG_ADD_INC_LOP__A,
+                       state->fe_fs_add_incr, 0);
+}
+
+static int SetCfgNoiseCalibration(struct drxd_state *state,
+                                  struct SNoiseCal *noiseCal)
+{
+        u16 beOptEna;
+        int status = 0;
+
+        do {
+                status = Read16(state, SC_RA_RAM_BE_OPT_ENA__A, &beOptEna, 0);
+                if (status < 0)
+                        break;
+                if (noiseCal->cpOpt) {
+                        beOptEna |= (1 << SC_RA_RAM_BE_OPT_ENA_CP_OPT);
+                } else {
+                        beOptEna &= ~(1 << SC_RA_RAM_BE_OPT_ENA_CP_OPT);
+                        status = Write16(state, CP_REG_AC_NEXP_OFFS__A, noiseCal->cpNexpOfs, 0);
+                        if (status < 0)
+                                break;
+                }
+                status = Write16(state, SC_RA_RAM_BE_OPT_ENA__A, beOptEna, 0);
+                if (status < 0)
+                        break;
+
+                if (!state->type_A) {
+                        status = Write16(state, B_SC_RA_RAM_CO_TD_CAL_2K__A, noiseCal->tdCal2k, 0);
+                        if (status < 0)
+                                break;
+                        status = Write16(state, B_SC_RA_RAM_CO_TD_CAL_8K__A, noiseCal->tdCal8k, 0);
+                        if (status < 0)
+                                break;
+                }
+        } while (0);
+
+        return status;
+}
+
+static int DRX_Start(struct drxd_state *state, s32 off)
+{
+        struct dvb_ofdm_parameters *p = &state->param.u.ofdm;
+        int status;
+
+        u16 transmissionParams = 0;
+        u16 operationMode = 0;
+        u16 qpskTdTpsPwr = 0;
+        u16 qam16TdTpsPwr = 0;
+        u16 qam64TdTpsPwr = 0;
+        u32 feIfIncr = 0;
+        u32 bandwidth = 0;
+        int mirrorFreqSpect;
+
+        u16 qpskSnCeGain = 0;
+        u16 qam16SnCeGain = 0;
+        u16 qam64SnCeGain = 0;
+        u16 qpskIsGainMan = 0;
+        u16 qam16IsGainMan = 0;
+        u16 qam64IsGainMan = 0;
+        u16 qpskIsGainExp = 0;
+        u16 qam16IsGainExp = 0;
+        u16 qam64IsGainExp = 0;
+        u16 bandwidthParam = 0;
+
+        if (off < 0)
+                off = (off - 500) / 1000;
+        else
+                off = (off + 500) / 1000;
+
+        do {
+                if (state->drxd_state != DRXD_STOPPED)
+                        return -1;
+                status = ResetECOD(state);
+                if (status < 0)
+                        break;
+                if (state->type_A) {
+                        status = InitSC(state);
+                        if (status < 0)
+                                break;
+                } else {
+                        status = InitFT(state);
+                        if (status < 0)
+                                break;
+                        status = InitCP(state);
+                        if (status < 0)
+                                break;
+                        status = InitCE(state);
+                        if (status < 0)
+                                break;
+                        status = InitEQ(state);
+                        if (status < 0)
+                                break;
+                        status = InitSC(state);
+                        if (status < 0)
+                                break;
+                }
+
+                /* Restore current IF & RF AGC settings */
+
+                status = SetCfgIfAgc(state, &state->if_agc_cfg);
+                if (status < 0)
+                        break;
+                status = SetCfgRfAgc(state, &state->rf_agc_cfg);
+                if (status < 0)
+                        break;
+
+                mirrorFreqSpect = (state->param.inversion == INVERSION_ON);
+
+                switch (p->transmission_mode) {
+                default:        /* Not set, detect it automatically */
+                        operationMode |= SC_RA_RAM_OP_AUTO_MODE__M;
+                        /* fall through , try first guess DRX_FFTMODE_8K */
+                case TRANSMISSION_MODE_8K:
+                        transmissionParams |= SC_RA_RAM_OP_PARAM_MODE_8K;
+                        if (state->type_A) {
+                                status = Write16(state, EC_SB_REG_TR_MODE__A, EC_SB_REG_TR_MODE_8K, 0x0000);
+                                if (status < 0)
+                                        break;
+                                qpskSnCeGain = 99;
+                                qam16SnCeGain = 83;
+                                qam64SnCeGain = 67;
+                        }
+                        break;
+                case TRANSMISSION_MODE_2K:
+                        transmissionParams |= SC_RA_RAM_OP_PARAM_MODE_2K;
+                        if (state->type_A) {
+                                status = Write16(state, EC_SB_REG_TR_MODE__A, EC_SB_REG_TR_MODE_2K, 0x0000);
+                                if (status < 0)
+                                        break;
+                                qpskSnCeGain = 97;
+                                qam16SnCeGain = 71;
+                                qam64SnCeGain = 65;
+                        }
+                        break;
+                }
+
+                switch (p->guard_interval) {
+                case GUARD_INTERVAL_1_4:
+                        transmissionParams |= SC_RA_RAM_OP_PARAM_GUARD_4;
+                        break;
+                case GUARD_INTERVAL_1_8:
+                        transmissionParams |= SC_RA_RAM_OP_PARAM_GUARD_8;
+                        break;
+                case GUARD_INTERVAL_1_16:
+                        transmissionParams |= SC_RA_RAM_OP_PARAM_GUARD_16;
+                        break;
+                case GUARD_INTERVAL_1_32:
+                        transmissionParams |= SC_RA_RAM_OP_PARAM_GUARD_32;
+                        break;
+                default:        /* Not set, detect it automatically */
+                        operationMode |= SC_RA_RAM_OP_AUTO_GUARD__M;
+                        /* try first guess 1/4 */
+                        transmissionParams |= SC_RA_RAM_OP_PARAM_GUARD_4;
+                        break;
+                }
+
+                switch (p->hierarchy_information) {
+                case HIERARCHY_1:
+                        transmissionParams |= SC_RA_RAM_OP_PARAM_HIER_A1;
+                        if (state->type_A) {
+                                status = Write16(state, EQ_REG_OT_ALPHA__A, 0x0001, 0x0000);
+                                if (status < 0)
+                                        break;
+                                status = Write16(state, EC_SB_REG_ALPHA__A, 0x0001, 0x0000);
+                                if (status < 0)
+                                        break;
+
+                                qpskTdTpsPwr = EQ_TD_TPS_PWR_UNKNOWN;
+                                qam16TdTpsPwr = EQ_TD_TPS_PWR_QAM16_ALPHA1;
+                                qam64TdTpsPwr = EQ_TD_TPS_PWR_QAM64_ALPHA1;
+
+                                qpskIsGainMan =
+                                    SC_RA_RAM_EQ_IS_GAIN_UNKNOWN_MAN__PRE;
+                                qam16IsGainMan =
+                                    SC_RA_RAM_EQ_IS_GAIN_16QAM_MAN__PRE;
+                                qam64IsGainMan =
+                                    SC_RA_RAM_EQ_IS_GAIN_64QAM_MAN__PRE;
+
+                                qpskIsGainExp =
+                                    SC_RA_RAM_EQ_IS_GAIN_UNKNOWN_EXP__PRE;
+                                qam16IsGainExp =
+                                    SC_RA_RAM_EQ_IS_GAIN_16QAM_EXP__PRE;
+                                qam64IsGainExp =
+                                    SC_RA_RAM_EQ_IS_GAIN_64QAM_EXP__PRE;
+                        }
+                        break;
+
+                case HIERARCHY_2:
+                        transmissionParams |= SC_RA_RAM_OP_PARAM_HIER_A2;
+                        if (state->type_A) {
+                                status = Write16(state, EQ_REG_OT_ALPHA__A, 0x0002, 0x0000);
+                                if (status < 0)
+                                        break;
+                                status = Write16(state, EC_SB_REG_ALPHA__A, 0x0002, 0x0000);
+                                if (status < 0)
+                                        break;
+
+                                qpskTdTpsPwr = EQ_TD_TPS_PWR_UNKNOWN;
+                                qam16TdTpsPwr = EQ_TD_TPS_PWR_QAM16_ALPHA2;
+                                qam64TdTpsPwr = EQ_TD_TPS_PWR_QAM64_ALPHA2;
+
+                                qpskIsGainMan =
+                                    SC_RA_RAM_EQ_IS_GAIN_UNKNOWN_MAN__PRE;
+                                qam16IsGainMan =
+                                    SC_RA_RAM_EQ_IS_GAIN_16QAM_A2_MAN__PRE;
+                                qam64IsGainMan =
+                                    SC_RA_RAM_EQ_IS_GAIN_64QAM_A2_MAN__PRE;
+
+                                qpskIsGainExp =
+                                    SC_RA_RAM_EQ_IS_GAIN_UNKNOWN_EXP__PRE;
+                                qam16IsGainExp =
+                                    SC_RA_RAM_EQ_IS_GAIN_16QAM_A2_EXP__PRE;
+                                qam64IsGainExp =
+                                    SC_RA_RAM_EQ_IS_GAIN_64QAM_A2_EXP__PRE;
+                        }
+                        break;
+                case HIERARCHY_4:
+                        transmissionParams |= SC_RA_RAM_OP_PARAM_HIER_A4;
+                        if (state->type_A) {
+                                status = Write16(state, EQ_REG_OT_ALPHA__A, 0x0003, 0x0000);
+                                if (status < 0)
+                                        break;
+                                status = Write16(state, EC_SB_REG_ALPHA__A, 0x0003, 0x0000);
+                                if (status < 0)
+                                        break;
+
+                                qpskTdTpsPwr = EQ_TD_TPS_PWR_UNKNOWN;
+                                qam16TdTpsPwr = EQ_TD_TPS_PWR_QAM16_ALPHA4;
+                                qam64TdTpsPwr = EQ_TD_TPS_PWR_QAM64_ALPHA4;
+
+                                qpskIsGainMan =
+                                    SC_RA_RAM_EQ_IS_GAIN_UNKNOWN_MAN__PRE;
+                                qam16IsGainMan =
+                                    SC_RA_RAM_EQ_IS_GAIN_16QAM_A4_MAN__PRE;
+                                qam64IsGainMan =
+                                    SC_RA_RAM_EQ_IS_GAIN_64QAM_A4_MAN__PRE;
+
+                                qpskIsGainExp =
+                                    SC_RA_RAM_EQ_IS_GAIN_UNKNOWN_EXP__PRE;
+                                qam16IsGainExp =
+                                    SC_RA_RAM_EQ_IS_GAIN_16QAM_A4_EXP__PRE;
+                                qam64IsGainExp =
+                                    SC_RA_RAM_EQ_IS_GAIN_64QAM_A4_EXP__PRE;
+                        }
+                        break;
+                case HIERARCHY_AUTO:
+                default:
+                        /* Not set, detect it automatically, start with none */
+                        operationMode |= SC_RA_RAM_OP_AUTO_HIER__M;
+                        transmissionParams |= SC_RA_RAM_OP_PARAM_HIER_NO;
+                        if (state->type_A) {
+                                status = Write16(state, EQ_REG_OT_ALPHA__A, 0x0000, 0x0000);
+                                if (status < 0)
+                                        break;
+                                status = Write16(state, EC_SB_REG_ALPHA__A, 0x0000, 0x0000);
+                                if (status < 0)
+                                        break;
+
+                                qpskTdTpsPwr = EQ_TD_TPS_PWR_QPSK;
+                                qam16TdTpsPwr = EQ_TD_TPS_PWR_QAM16_ALPHAN;
+                                qam64TdTpsPwr = EQ_TD_TPS_PWR_QAM64_ALPHAN;
+
+                                qpskIsGainMan =
+                                    SC_RA_RAM_EQ_IS_GAIN_QPSK_MAN__PRE;
+                                qam16IsGainMan =
+                                    SC_RA_RAM_EQ_IS_GAIN_16QAM_MAN__PRE;
+                                qam64IsGainMan =
+                                    SC_RA_RAM_EQ_IS_GAIN_64QAM_MAN__PRE;
+
+                                qpskIsGainExp =
+                                    SC_RA_RAM_EQ_IS_GAIN_QPSK_EXP__PRE;
+                                qam16IsGainExp =
+                                    SC_RA_RAM_EQ_IS_GAIN_16QAM_EXP__PRE;
+                                qam64IsGainExp =
+                                    SC_RA_RAM_EQ_IS_GAIN_64QAM_EXP__PRE;
+                        }
+                        break;
+                }
+                status = status;
+                if (status < 0)
+                        break;
+
+                switch (p->constellation) {
+                default:
+                        operationMode |= SC_RA_RAM_OP_AUTO_CONST__M;
+                        /* fall through , try first guess
+                           DRX_CONSTELLATION_QAM64 */
+                case QAM_64:
+                        transmissionParams |= SC_RA_RAM_OP_PARAM_CONST_QAM64;
+                        if (state->type_A) {
+                                status = Write16(state, EQ_REG_OT_CONST__A, 0x0002, 0x0000);
+                                if (status < 0)
+                                        break;
+                                status = Write16(state, EC_SB_REG_CONST__A, EC_SB_REG_CONST_64QAM, 0x0000);
+                                if (status < 0)
+                                        break;
+                                status = Write16(state, EC_SB_REG_SCALE_MSB__A, 0x0020, 0x0000);
+                                if (status < 0)
+                                        break;
+                                status = Write16(state, EC_SB_REG_SCALE_BIT2__A, 0x0008, 0x0000);
+                                if (status < 0)
+                                        break;
+                                status = Write16(state, EC_SB_REG_SCALE_LSB__A, 0x0002, 0x0000);
+                                if (status < 0)
+                                        break;
+
+                                status = Write16(state, EQ_REG_TD_TPS_PWR_OFS__A, qam64TdTpsPwr, 0x0000);
+                                if (status < 0)
+                                        break;
+                                status = Write16(state, EQ_REG_SN_CEGAIN__A, qam64SnCeGain, 0x0000);
+                                if (status < 0)
+                                        break;
+                                status = Write16(state, EQ_REG_IS_GAIN_MAN__A, qam64IsGainMan, 0x0000);
+                                if (status < 0)
+                                        break;
+                                status = Write16(state, EQ_REG_IS_GAIN_EXP__A, qam64IsGainExp, 0x0000);
+                                if (status < 0)
+                                        break;
+                        }
+                        break;
+                case QPSK:
+                        transmissionParams |= SC_RA_RAM_OP_PARAM_CONST_QPSK;
+                        if (state->type_A) {
+                                status = Write16(state, EQ_REG_OT_CONST__A, 0x0000, 0x0000);
+                                if (status < 0)
+                                        break;
+                                status = Write16(state, EC_SB_REG_CONST__A, EC_SB_REG_CONST_QPSK, 0x0000);
+                                if (status < 0)
+                                        break;
+                                status = Write16(state, EC_SB_REG_SCALE_MSB__A, 0x0010, 0x0000);
+                                if (status < 0)
+                                        break;
+                                status = Write16(state, EC_SB_REG_SCALE_BIT2__A, 0x0000, 0x0000);
+                                if (status < 0)
+                                        break;
+                                status = Write16(state, EC_SB_REG_SCALE_LSB__A, 0x0000, 0x0000);
+                                if (status < 0)
+                                        break;
+
+                                status = Write16(state, EQ_REG_TD_TPS_PWR_OFS__A, qpskTdTpsPwr, 0x0000);
+                                if (status < 0)
+                                        break;
+                                status = Write16(state, EQ_REG_SN_CEGAIN__A, qpskSnCeGain, 0x0000);
+                                if (status < 0)
+                                        break;
+                                status = Write16(state, EQ_REG_IS_GAIN_MAN__A, qpskIsGainMan, 0x0000);
+                                if (status < 0)
+                                        break;
+                                status = Write16(state, EQ_REG_IS_GAIN_EXP__A, qpskIsGainExp, 0x0000);
+                                if (status < 0)
+                                        break;
+                        }
+                        break;
+
+                case QAM_16:
+                        transmissionParams |= SC_RA_RAM_OP_PARAM_CONST_QAM16;
+                        if (state->type_A) {
+                                status = Write16(state, EQ_REG_OT_CONST__A, 0x0001, 0x0000);
+                                if (status < 0)
+                                        break;
+                                status = Write16(state, EC_SB_REG_CONST__A, EC_SB_REG_CONST_16QAM, 0x0000);
+                                if (status < 0)
+                                        break;
+                                status = Write16(state, EC_SB_REG_SCALE_MSB__A, 0x0010, 0x0000);
+                                if (status < 0)
+                                        break;
+                                status = Write16(state, EC_SB_REG_SCALE_BIT2__A, 0x0004, 0x0000);
+                                if (status < 0)
+                                        break;
+                                status = Write16(state, EC_SB_REG_SCALE_LSB__A, 0x0000, 0x0000);
+                                if (status < 0)
+                                        break;
+
+                                status = Write16(state, EQ_REG_TD_TPS_PWR_OFS__A, qam16TdTpsPwr, 0x0000);
+                                if (status < 0)
+                                        break;
+                                status = Write16(state, EQ_REG_SN_CEGAIN__A, qam16SnCeGain, 0x0000);
+                                if (status < 0)
+                                        break;
+                                status = Write16(state, EQ_REG_IS_GAIN_MAN__A, qam16IsGainMan, 0x0000);
+                                if (status < 0)
+                                        break;
+                                status = Write16(state, EQ_REG_IS_GAIN_EXP__A, qam16IsGainExp, 0x0000);
+                                if (status < 0)
+                                        break;
+                        }
+                        break;
+
+                }
+                status = status;
+                if (status < 0)
+                        break;
+
+                switch (DRX_CHANNEL_HIGH) {
+                default:
+                case DRX_CHANNEL_AUTO:
+                case DRX_CHANNEL_LOW:
+                        transmissionParams |= SC_RA_RAM_OP_PARAM_PRIO_LO;
+                        status = Write16(state, EC_SB_REG_PRIOR__A, EC_SB_REG_PRIOR_LO, 0x0000);
+                        if (status < 0)
+                                break;
+                        break;
+                case DRX_CHANNEL_HIGH:
+                        transmissionParams |= SC_RA_RAM_OP_PARAM_PRIO_HI;
+                        status = Write16(state, EC_SB_REG_PRIOR__A, EC_SB_REG_PRIOR_HI, 0x0000);
+                        if (status < 0)
+                                break;
+                        break;
+
+                }
+
+                switch (p->code_rate_HP) {
+                case FEC_1_2:
+                        transmissionParams |= SC_RA_RAM_OP_PARAM_RATE_1_2;
+                        if (state->type_A) {
+                                status = Write16(state, EC_VD_REG_SET_CODERATE__A, EC_VD_REG_SET_CODERATE_C1_2, 0x0000);
+                                if (status < 0)
+                                        break;
+                        }
+                        break;
+                default:
+                        operationMode |= SC_RA_RAM_OP_AUTO_RATE__M;
+                case FEC_2_3:
+                        transmissionParams |= SC_RA_RAM_OP_PARAM_RATE_2_3;
+                        if (state->type_A) {
+                                status = Write16(state, EC_VD_REG_SET_CODERATE__A, EC_VD_REG_SET_CODERATE_C2_3, 0x0000);
+                                if (status < 0)
+                                        break;
+                        }
+                        break;
+                case FEC_3_4:
+                        transmissionParams |= SC_RA_RAM_OP_PARAM_RATE_3_4;
+                        if (state->type_A) {
+                                status = Write16(state, EC_VD_REG_SET_CODERATE__A, EC_VD_REG_SET_CODERATE_C3_4, 0x0000);
+                                if (status < 0)
+                                        break;
+                        }
+                        break;
+                case FEC_5_6:
+                        transmissionParams |= SC_RA_RAM_OP_PARAM_RATE_5_6;
+                        if (state->type_A) {
+                                status = Write16(state, EC_VD_REG_SET_CODERATE__A, EC_VD_REG_SET_CODERATE_C5_6, 0x0000);
+                                if (status < 0)
+                                        break;
+                        }
+                        break;
+                case FEC_7_8:
+                        transmissionParams |= SC_RA_RAM_OP_PARAM_RATE_7_8;
+                        if (state->type_A) {
+                                status = Write16(state, EC_VD_REG_SET_CODERATE__A, EC_VD_REG_SET_CODERATE_C7_8, 0x0000);
+                                if (status < 0)
+                                        break;
+                        }
+                        break;
+                }
+                status = status;
+                if (status < 0)
+                        break;
+
+                /* First determine real bandwidth (Hz) */
+                /* Also set delay for impulse noise cruncher (only A2) */
+                /* Also set parameters for EC_OC fix, note
+                   EC_OC_REG_TMD_HIL_MAR is changed
+                   by SC for fix for some 8K,1/8 guard but is restored by
+                   InitEC and ResetEC
+                   functions */
+                switch (p->bandwidth) {
+                case BANDWIDTH_AUTO:
+                case BANDWIDTH_8_MHZ:
+                        /* (64/7)*(8/8)*1000000 */
+                        bandwidth = DRXD_BANDWIDTH_8MHZ_IN_HZ;
+
+                        bandwidthParam = 0;
+                        status = Write16(state,
+                                         FE_AG_REG_IND_DEL__A, 50, 0x0000);
+                        break;
+                case BANDWIDTH_7_MHZ:
+                        /* (64/7)*(7/8)*1000000 */
+                        bandwidth = DRXD_BANDWIDTH_7MHZ_IN_HZ;
+                        bandwidthParam = 0x4807;        /*binary:0100 1000 0000 0111 */
+                        status = Write16(state,
+                                         FE_AG_REG_IND_DEL__A, 59, 0x0000);
+                        break;
+                case BANDWIDTH_6_MHZ:
+                        /* (64/7)*(6/8)*1000000 */
+                        bandwidth = DRXD_BANDWIDTH_6MHZ_IN_HZ;
+                        bandwidthParam = 0x0F07;        /*binary: 0000 1111 0000 0111 */
+                        status = Write16(state,
+                                         FE_AG_REG_IND_DEL__A, 71, 0x0000);
+                        break;
+                default:
+                        status = -EINVAL;
+                }
+                if (status < 0)
+                        break;
+
+                status = Write16(state, SC_RA_RAM_BAND__A, bandwidthParam, 0x0000);
+                if (status < 0)
+                        break;
+
+                {
+                        u16 sc_config;
+                        status = Read16(state, SC_RA_RAM_CONFIG__A, &sc_config, 0);
+                        if (status < 0)
+                                break;
+
+                        /* enable SLAVE mode in 2k 1/32 to
+                           prevent timing change glitches */
+                        if ((p->transmission_mode == TRANSMISSION_MODE_2K) &&
+                            (p->guard_interval == GUARD_INTERVAL_1_32)) {
+                                /* enable slave */
+                                sc_config |= SC_RA_RAM_CONFIG_SLAVE__M;
+                        } else {
+                                /* disable slave */
+                                sc_config &= ~SC_RA_RAM_CONFIG_SLAVE__M;
+                        }
+                        status = Write16(state, SC_RA_RAM_CONFIG__A, sc_config, 0);
+                        if (status < 0)
+                                break;
+                }
+
+                status = SetCfgNoiseCalibration(state, &state->noise_cal);
+                if (status < 0)
+                        break;
+
+                if (state->cscd_state == CSCD_INIT) {
+                        /* switch on SRMM scan in SC */
+                        status = Write16(state, SC_RA_RAM_SAMPLE_RATE_COUNT__A, DRXD_OSCDEV_DO_SCAN, 0x0000);
+                        if (status < 0)
+                                break;
+/*            CHK_ERROR(Write16(SC_RA_RAM_SAMPLE_RATE_STEP__A, DRXD_OSCDEV_STEP, 0x0000));*/
+                        state->cscd_state = CSCD_SET;
+                }
+
+                /* Now compute FE_IF_REG_INCR */
+                /*((( SysFreq/BandWidth)/2)/2) -1) * 2^23) =>
+                   ((SysFreq / BandWidth) * (2^21) ) - (2^23) */
+                feIfIncr = MulDiv32(state->sys_clock_freq * 1000,
+                                    (1ULL << 21), bandwidth) - (1 << 23);
+                status = Write16(state, FE_IF_REG_INCR0__A, (u16) (feIfIncr & FE_IF_REG_INCR0__M), 0x0000);
+                if (status < 0)
+                        break;
+                status = Write16(state, FE_IF_REG_INCR1__A, (u16) ((feIfIncr >> FE_IF_REG_INCR0__W) & FE_IF_REG_INCR1__M), 0x0000);
+                if (status < 0)
+                        break;
+                /* Bandwidth setting done */
+
+                /* Mirror & frequency offset */
+                SetFrequencyShift(state, off, mirrorFreqSpect);
+
+                /* Start SC, write channel settings to SC */
+
+                /* Enable SC after setting all other parameters */
+                status = Write16(state, SC_COMM_STATE__A, 0, 0x0000);
+                if (status < 0)
+                        break;
+                status = Write16(state, SC_COMM_EXEC__A, 1, 0x0000);
+                if (status < 0)
+                        break;
+
+                /* Write SC parameter registers, operation mode */
+#if 1
+                operationMode = (SC_RA_RAM_OP_AUTO_MODE__M |
+                                 SC_RA_RAM_OP_AUTO_GUARD__M |
+                                 SC_RA_RAM_OP_AUTO_CONST__M |
+                                 SC_RA_RAM_OP_AUTO_HIER__M |
+                                 SC_RA_RAM_OP_AUTO_RATE__M);
+#endif
+                status = SC_SetPrefParamCommand(state, 0x0000, transmissionParams, operationMode);
+                if (status < 0)
+                        break;
+
+                /* Start correct processes to get in lock */
+                status = SC_ProcStartCommand(state, SC_RA_RAM_PROC_LOCKTRACK, SC_RA_RAM_SW_EVENT_RUN_NMASK__M, SC_RA_RAM_LOCKTRACK_MIN);
+                if (status < 0)
+                        break;
+
+                status = StartOC(state);
+                if (status < 0)
+                        break;
+
+                if (state->operation_mode != OM_Default) {
+                        status = StartDiversity(state);
+                        if (status < 0)
+                                break;
+                }
+
+                state->drxd_state = DRXD_STARTED;
+        } while (0);
+
+        return status;
+}
+
+static int CDRXD(struct drxd_state *state, u32 IntermediateFrequency)
+{
+        u32 ulRfAgcOutputLevel = 0xffffffff;
+        u32 ulRfAgcSettleLevel = 528;   /* Optimum value for MT2060 */
+        u32 ulRfAgcMinLevel = 0;        /* Currently unused */
+        u32 ulRfAgcMaxLevel = DRXD_FE_CTRL_MAX; /* Currently unused */
+        u32 ulRfAgcSpeed = 0;   /* Currently unused */
+        u32 ulRfAgcMode = 0;    /*2;   Off */
+        u32 ulRfAgcR1 = 820;
+        u32 ulRfAgcR2 = 2200;
+        u32 ulRfAgcR3 = 150;
+        u32 ulIfAgcMode = 0;    /* Auto */
+        u32 ulIfAgcOutputLevel = 0xffffffff;
+        u32 ulIfAgcSettleLevel = 0xffffffff;
+        u32 ulIfAgcMinLevel = 0xffffffff;
+        u32 ulIfAgcMaxLevel = 0xffffffff;
+        u32 ulIfAgcSpeed = 0xffffffff;
+        u32 ulIfAgcR1 = 820;
+        u32 ulIfAgcR2 = 2200;
+        u32 ulIfAgcR3 = 150;
+        u32 ulClock = state->config.clock;
+        u32 ulSerialMode = 0;
+        u32 ulEcOcRegOcModeLop = 4;     /* Dynamic DTO source */
+        u32 ulHiI2cDelay = HI_I2C_DELAY;
+        u32 ulHiI2cBridgeDelay = HI_I2C_BRIDGE_DELAY;
+        u32 ulHiI2cPatch = 0;
+        u32 ulEnvironment = APPENV_PORTABLE;
+        u32 ulEnvironmentDiversity = APPENV_MOBILE;
+        u32 ulIFFilter = IFFILTER_SAW;
+
+        state->if_agc_cfg.ctrlMode = AGC_CTRL_AUTO;
+        state->if_agc_cfg.outputLevel = 0;
+        state->if_agc_cfg.settleLevel = 140;
+        state->if_agc_cfg.minOutputLevel = 0;
+        state->if_agc_cfg.maxOutputLevel = 1023;
+        state->if_agc_cfg.speed = 904;
+
+        if (ulIfAgcMode == 1 && ulIfAgcOutputLevel <= DRXD_FE_CTRL_MAX) {
+                state->if_agc_cfg.ctrlMode = AGC_CTRL_USER;
+                state->if_agc_cfg.outputLevel = (u16) (ulIfAgcOutputLevel);
+        }
+
+        if (ulIfAgcMode == 0 &&
+            ulIfAgcSettleLevel <= DRXD_FE_CTRL_MAX &&
+            ulIfAgcMinLevel <= DRXD_FE_CTRL_MAX &&
+            ulIfAgcMaxLevel <= DRXD_FE_CTRL_MAX &&
+            ulIfAgcSpeed <= DRXD_FE_CTRL_MAX) {
+                state->if_agc_cfg.ctrlMode = AGC_CTRL_AUTO;
+                state->if_agc_cfg.settleLevel = (u16) (ulIfAgcSettleLevel);
+                state->if_agc_cfg.minOutputLevel = (u16) (ulIfAgcMinLevel);
+                state->if_agc_cfg.maxOutputLevel = (u16) (ulIfAgcMaxLevel);
+                state->if_agc_cfg.speed = (u16) (ulIfAgcSpeed);
+        }
+
+        state->if_agc_cfg.R1 = (u16) (ulIfAgcR1);
+        state->if_agc_cfg.R2 = (u16) (ulIfAgcR2);
+        state->if_agc_cfg.R3 = (u16) (ulIfAgcR3);
+
+        state->rf_agc_cfg.R1 = (u16) (ulRfAgcR1);
+        state->rf_agc_cfg.R2 = (u16) (ulRfAgcR2);
+        state->rf_agc_cfg.R3 = (u16) (ulRfAgcR3);
+
+        state->rf_agc_cfg.ctrlMode = AGC_CTRL_AUTO;
+        /* rest of the RFAgcCfg structure currently unused */
+        if (ulRfAgcMode == 1 && ulRfAgcOutputLevel <= DRXD_FE_CTRL_MAX) {
+                state->rf_agc_cfg.ctrlMode = AGC_CTRL_USER;
+                state->rf_agc_cfg.outputLevel = (u16) (ulRfAgcOutputLevel);
+        }
+
+        if (ulRfAgcMode == 0 &&
+            ulRfAgcSettleLevel <= DRXD_FE_CTRL_MAX &&
+            ulRfAgcMinLevel <= DRXD_FE_CTRL_MAX &&
+            ulRfAgcMaxLevel <= DRXD_FE_CTRL_MAX &&
+            ulRfAgcSpeed <= DRXD_FE_CTRL_MAX) {
+                state->rf_agc_cfg.ctrlMode = AGC_CTRL_AUTO;
+                state->rf_agc_cfg.settleLevel = (u16) (ulRfAgcSettleLevel);
+                state->rf_agc_cfg.minOutputLevel = (u16) (ulRfAgcMinLevel);
+                state->rf_agc_cfg.maxOutputLevel = (u16) (ulRfAgcMaxLevel);
+                state->rf_agc_cfg.speed = (u16) (ulRfAgcSpeed);
+        }
+
+        if (ulRfAgcMode == 2)
+                state->rf_agc_cfg.ctrlMode = AGC_CTRL_OFF;
+
+        if (ulEnvironment <= 2)
+                state->app_env_default = (enum app_env)
+                    (ulEnvironment);
+        if (ulEnvironmentDiversity <= 2)
+                state->app_env_diversity = (enum app_env)
+                    (ulEnvironmentDiversity);
+
+        if (ulIFFilter == IFFILTER_DISCRETE) {
+                /* discrete filter */
+                state->noise_cal.cpOpt = 0;
+                state->noise_cal.cpNexpOfs = 40;
+                state->noise_cal.tdCal2k = -40;
+                state->noise_cal.tdCal8k = -24;
+        } else {
+                /* SAW filter */
+                state->noise_cal.cpOpt = 1;
+                state->noise_cal.cpNexpOfs = 0;
+                state->noise_cal.tdCal2k = -21;
+                state->noise_cal.tdCal8k = -24;
+        }
+        state->m_EcOcRegOcModeLop = (u16) (ulEcOcRegOcModeLop);
+
+        state->chip_adr = (state->config.demod_address << 1) | 1;
+        switch (ulHiI2cPatch) {
+        case 1:
+                state->m_HiI2cPatch = DRXD_HiI2cPatch_1;
+                break;
+        case 3:
+                state->m_HiI2cPatch = DRXD_HiI2cPatch_3;
+                break;
+        default:
+                state->m_HiI2cPatch = NULL;
+        }
+
+        /* modify tuner and clock attributes */
+        state->intermediate_freq = (u16) (IntermediateFrequency / 1000);
+        /* expected system clock frequency in kHz */
+        state->expected_sys_clock_freq = 48000;
+        /* real system clock frequency in kHz */
+        state->sys_clock_freq = 48000;
+        state->osc_clock_freq = (u16) ulClock;
+        state->osc_clock_deviation = 0;
+        state->cscd_state = CSCD_INIT;
+        state->drxd_state = DRXD_UNINITIALIZED;
+
+        state->PGA = 0;
+        state->type_A = 0;
+        state->tuner_mirrors = 0;
+
+        /* modify MPEG output attributes */
+        state->insert_rs_byte = state->config.insert_rs_byte;
+        state->enable_parallel = (ulSerialMode != 1);
+
+        /* Timing div, 250ns/Psys */
+        /* Timing div, = ( delay (nano seconds) * sysclk (kHz) )/ 1000 */
+
+        state->hi_cfg_timing_div = (u16) ((state->sys_clock_freq / 1000) *
+                                          ulHiI2cDelay) / 1000;
+        /* Bridge delay, uses oscilator clock */
+        /* Delay = ( delay (nano seconds) * oscclk (kHz) )/ 1000 */
+        state->hi_cfg_bridge_delay = (u16) ((state->osc_clock_freq / 1000) *
+                                            ulHiI2cBridgeDelay) / 1000;
+
+        state->m_FeAgRegAgPwd = DRXD_DEF_AG_PWD_CONSUMER;
+        /* state->m_FeAgRegAgPwd = DRXD_DEF_AG_PWD_PRO; */
+        state->m_FeAgRegAgAgcSio = DRXD_DEF_AG_AGC_SIO;
+        return 0;
+}
+
+int DRXD_init(struct drxd_state *state, const u8 * fw, u32 fw_size)
+{
+        int status = 0;
+        u32 driverVersion;
+
+        if (state->init_done)
+                return 0;
+
+        CDRXD(state, state->config.IF ? state->config.IF : 36000000);
+
+        do {
+                state->operation_mode = OM_Default;
+
+                status = SetDeviceTypeId(state);
+                if (status < 0)
+                        break;
+
+                /* Apply I2c address patch to B1 */
+                if (!state->type_A && state->m_HiI2cPatch != NULL)
+                        status = WriteTable(state, state->m_HiI2cPatch);
+                        if (status < 0)
+                                break;
+
+                if (state->type_A) {
+                        /* HI firmware patch for UIO readout,
+                           avoid clearing of result register */
+                        status = Write16(state, 0x43012D, 0x047f, 0);
+                        if (status < 0)
+                                break;
+                }
+
+                status = HI_ResetCommand(state);
+                if (status < 0)
+                        break;
+
+                status = StopAllProcessors(state);
+                if (status < 0)
+                        break;
+                status = InitCC(state);
+                if (status < 0)
+                        break;
+
+                state->osc_clock_deviation = 0;
+
+                if (state->config.osc_deviation)
+                        state->osc_clock_deviation =
+                            state->config.osc_deviation(state->priv, 0, 0);
+                {
+                        /* Handle clock deviation */
+                        s32 devB;
+                        s32 devA = (s32) (state->osc_clock_deviation) *
+                            (s32) (state->expected_sys_clock_freq);
+                        /* deviation in kHz */
+                        s32 deviation = (devA / (1000000L));
+                        /* rounding, signed */
+                        if (devA > 0)
+                                devB = (2);
+                        else
+                                devB = (-2);
+                        if ((devB * (devA % 1000000L) > 1000000L)) {
+                                /* add +1 or -1 */
+                                deviation += (devB / 2);
+                        }
+
+                        state->sys_clock_freq =
+                            (u16) ((state->expected_sys_clock_freq) +
+                                   deviation);
+                }
+                status = InitHI(state);
+                if (status < 0)
+                        break;
+                status = InitAtomicRead(state);
+                if (status < 0)
+                        break;
+
+                status = EnableAndResetMB(state);
+                if (status < 0)
+                        break;
+                if (state->type_A)
+                        status = ResetCEFR(state);
+                        if (status < 0)
+                                break;
+
+                if (fw) {
+                        status = DownloadMicrocode(state, fw, fw_size);
+                        if (status < 0)
+                                break;
+                } else {
+                        status = DownloadMicrocode(state, state->microcode, state->microcode_length);
+                        if (status < 0)
+                                break;
+                }
+
+                if (state->PGA) {
+                        state->m_FeAgRegAgPwd = DRXD_DEF_AG_PWD_PRO;
+                        SetCfgPga(state, 0);    /* PGA = 0 dB */
+                } else {
+                        state->m_FeAgRegAgPwd = DRXD_DEF_AG_PWD_CONSUMER;
+                }
+
+                state->m_FeAgRegAgAgcSio = DRXD_DEF_AG_AGC_SIO;
+
+                status = InitFE(state);
+                if (status < 0)
+                        break;
+                status = InitFT(state);
+                if (status < 0)
+                        break;
+                status = InitCP(state);
+                if (status < 0)
+                        break;
+                status = InitCE(state);
+                if (status < 0)
+                        break;
+                status = InitEQ(state);
+                if (status < 0)
+                        break;
+                status = InitEC(state);
+                if (status < 0)
+                        break;
+                status = InitSC(state);
+                if (status < 0)
+                        break;
+
+                status = SetCfgIfAgc(state, &state->if_agc_cfg);
+                if (status < 0)
+                        break;
+                status = SetCfgRfAgc(state, &state->rf_agc_cfg);
+                if (status < 0)
+                        break;
+
+                state->cscd_state = CSCD_INIT;
+                status = Write16(state, SC_COMM_EXEC__A, SC_COMM_EXEC_CTL_STOP, 0);
+                if (status < 0)
+                        break;
+                status = Write16(state, LC_COMM_EXEC__A, SC_COMM_EXEC_CTL_STOP, 0);
+                if (status < 0)
+                        break;
+
+                driverVersion = (((VERSION_MAJOR / 10) << 4) +
+                                 (VERSION_MAJOR % 10)) << 24;
+                driverVersion += (((VERSION_MINOR / 10) << 4) +
+                                  (VERSION_MINOR % 10)) << 16;
+                driverVersion += ((VERSION_PATCH / 1000) << 12) +
+                    ((VERSION_PATCH / 100) << 8) +
+                    ((VERSION_PATCH / 10) << 4) + (VERSION_PATCH % 10);
+
+                status = Write32(state, SC_RA_RAM_DRIVER_VERSION__AX, driverVersion, 0);
+                if (status < 0)
+                        break;
+
+                status = StopOC(state);
+                if (status < 0)
+                        break;
+
+                state->drxd_state = DRXD_STOPPED;
+                state->init_done = 1;
+                status = 0;
+        } while (0);
+        return status;
+}
+
+int DRXD_status(struct drxd_state *state, u32 * pLockStatus)
+{
+        DRX_GetLockStatus(state, pLockStatus);
+
+        /*if (*pLockStatus&DRX_LOCK_MPEG) */
+        if (*pLockStatus & DRX_LOCK_FEC) {
+                ConfigureMPEGOutput(state, 1);
+                /* Get status again, in case we have MPEG lock now */
+                /*DRX_GetLockStatus(state, pLockStatus); */
+        }
+
+        return 0;
+}
+
+/****************************************************************************/
+/****************************************************************************/
+/****************************************************************************/
+
+static int drxd_read_signal_strength(struct dvb_frontend *fe, u16 * strength)
+{
+        struct drxd_state *state = fe->demodulator_priv;
+        u32 value;
+        int res;
+
+        res = ReadIFAgc(state, &value);
+        if (res < 0)
+                *strength = 0;
+        else
+                *strength = 0xffff - (value << 4);
+        return 0;
+}
+
+static int drxd_read_status(struct dvb_frontend *fe, fe_status_t * status)
+{
+        struct drxd_state *state = fe->demodulator_priv;
+        u32 lock;
+
+        DRXD_status(state, &lock);
+        *status = 0;
+        /* No MPEG lock in V255 firmware, bug ? */
+#if 1
+        if (lock & DRX_LOCK_MPEG)
+                *status |= FE_HAS_LOCK;
+#else
+        if (lock & DRX_LOCK_FEC)
+                *status |= FE_HAS_LOCK;
+#endif
+        if (lock & DRX_LOCK_FEC)
+                *status |= FE_HAS_VITERBI | FE_HAS_SYNC;
+        if (lock & DRX_LOCK_DEMOD)
+                *status |= FE_HAS_CARRIER | FE_HAS_SIGNAL;
+
+        return 0;
+}
+
+static int drxd_init(struct dvb_frontend *fe)
+{
+        struct drxd_state *state = fe->demodulator_priv;
+        int err = 0;
+
+/*      if (request_firmware(&state->fw, "drxd.fw", state->dev)<0) */
+        return DRXD_init(state, 0, 0);
+
+        err = DRXD_init(state, state->fw->data, state->fw->size);
+        release_firmware(state->fw);
+        return err;
+}
+
+int drxd_config_i2c(struct dvb_frontend *fe, int onoff)
+{
+        struct drxd_state *state = fe->demodulator_priv;
+
+        if (state->config.disable_i2c_gate_ctrl == 1)
+                return 0;
+
+        return DRX_ConfigureI2CBridge(state, onoff);
+}
+EXPORT_SYMBOL(drxd_config_i2c);
+
+static int drxd_get_tune_settings(struct dvb_frontend *fe,
+                                  struct dvb_frontend_tune_settings *sets)
+{
+        sets->min_delay_ms = 10000;
+        sets->max_drift = 0;
+        sets->step_size = 0;
+        return 0;
+}
+
+static int drxd_read_ber(struct dvb_frontend *fe, u32 * ber)
+{
+        *ber = 0;
+        return 0;
+}
+
+static int drxd_read_snr(struct dvb_frontend *fe, u16 * snr)
+{
+        *snr = 0;
+        return 0;
+}
+
+static int drxd_read_ucblocks(struct dvb_frontend *fe, u32 * ucblocks)
+{
+        *ucblocks = 0;
+        return 0;
+}
+
+static int drxd_sleep(struct dvb_frontend *fe)
+{
+        struct drxd_state *state = fe->demodulator_priv;
+
+        ConfigureMPEGOutput(state, 0);
+        return 0;
+}
+
+static int drxd_get_frontend(struct dvb_frontend *fe,
+                             struct dvb_frontend_parameters *param)
+{
+        return 0;
+}
+
+static int drxd_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
+{
+        return drxd_config_i2c(fe, enable);
+}
+
+static int drxd_set_frontend(struct dvb_frontend *fe,
+                             struct dvb_frontend_parameters *param)
+{
+        struct drxd_state *state = fe->demodulator_priv;
+        s32 off = 0;
+
+        state->param = *param;
+        DRX_Stop(state);
+
+        if (fe->ops.tuner_ops.set_params) {
+                fe->ops.tuner_ops.set_params(fe, param);
+                if (fe->ops.i2c_gate_ctrl)
+                        fe->ops.i2c_gate_ctrl(fe, 0);
+        }
+
+        /* FIXME: move PLL drivers */
+        if (state->config.pll_set &&
+            state->config.pll_set(state->priv, param,
+                                  state->config.pll_address,
+                                  state->config.demoda_address, &off) < 0) {
+                printk(KERN_ERR "Error in pll_set\n");
+                return -1;
+        }
+
+        msleep(200);
+
+        return DRX_Start(state, off);
+}
+
+static void drxd_release(struct dvb_frontend *fe)
+{
+        struct drxd_state *state = fe->demodulator_priv;
+
+        kfree(state);
+}
+
+static struct dvb_frontend_ops drxd_ops = {
+
+        .info = {
+                 .name = "Micronas DRXD DVB-T",
+                 .type = FE_OFDM,
+                 .frequency_min = 47125000,
+                 .frequency_max = 855250000,
+                 .frequency_stepsize = 166667,
+                 .frequency_tolerance = 0,
+                 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 |
+                 FE_CAN_FEC_3_4 | FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 |
+                 FE_CAN_FEC_AUTO |
+                 FE_CAN_QAM_16 | FE_CAN_QAM_64 |
+                 FE_CAN_QAM_AUTO |
+                 FE_CAN_TRANSMISSION_MODE_AUTO |
+                 FE_CAN_GUARD_INTERVAL_AUTO |
+                 FE_CAN_HIERARCHY_AUTO | FE_CAN_RECOVER | FE_CAN_MUTE_TS},
+
+        .release = drxd_release,
+        .init = drxd_init,
+        .sleep = drxd_sleep,
+        .i2c_gate_ctrl = drxd_i2c_gate_ctrl,
+
+        .set_frontend = drxd_set_frontend,
+        .get_frontend = drxd_get_frontend,
+        .get_tune_settings = drxd_get_tune_settings,
+
+        .read_status = drxd_read_status,
+        .read_ber = drxd_read_ber,
+        .read_signal_strength = drxd_read_signal_strength,
+        .read_snr = drxd_read_snr,
+        .read_ucblocks = drxd_read_ucblocks,
+};
+
+struct dvb_frontend *drxd_attach(const struct drxd_config *config,
+                                 void *priv, struct i2c_adapter *i2c,
+                                 struct device *dev)
+{
+        struct drxd_state *state = NULL;
+
+        state = kmalloc(sizeof(struct drxd_state), GFP_KERNEL);
+        if (!state)
+                return NULL;
+        memset(state, 0, sizeof(*state));
+
+        memcpy(&state->ops, &drxd_ops, sizeof(struct dvb_frontend_ops));
+        state->dev = dev;
+        state->config = *config;
+        state->i2c = i2c;
+        state->priv = priv;
+
+        mutex_init(&state->mutex);
+
+        if (Read16(state, 0, 0, 0) < 0)
+                goto error;
+
+        memcpy(&state->frontend.ops, &drxd_ops,
+               sizeof(struct dvb_frontend_ops));
+        state->frontend.demodulator_priv = state;
+        ConfigureMPEGOutput(state, 0);
+        return &state->frontend;
+
+error:
+        printk(KERN_ERR "drxd: not found\n");
+        kfree(state);
+        return NULL;
+}
+EXPORT_SYMBOL(drxd_attach);
+
+MODULE_DESCRIPTION("DRXD driver");
+MODULE_AUTHOR("Micronas");
+MODULE_LICENSE("GPL");
diff --git a/drivers/media/dvb/frontends/drxd_map_firm.h b/drivers/media/dvb/frontends/drxd_map_firm.h
new file mode 100644
index 000000000000..6bc553abf215
--- /dev/null
+++ b/drivers/media/dvb/frontends/drxd_map_firm.h
@@ -0,0 +1,1013 @@
+/*
+ * drx3973d_map_firm.h
+ *
+ * Copyright (C) 2006-2007 Micronas
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 only, as published by the Free Software Foundation.
+ *
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA
+ * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
+ */
+
+#ifndef __DRX3973D_MAP__H__
+#define __DRX3973D_MAP__H__
+
+/*
+ * Note: originally, this file contained 12000+ lines of data
+ * Probably a few lines for every firwmare assembler instruction. However,
+ * only a few defines were actually used. So, removed all uneeded lines.
+ * If ever needed, the other lines can be easily obtained via git history.
+ */
+
+#define HI_COMM_EXEC__A                                              0x400000
+#define HI_COMM_MB__A                                                0x400002
+#define HI_CT_REG_COMM_STATE__A                                      0x410001
+#define HI_RA_RAM_SRV_RES__A                                         0x420031
+#define HI_RA_RAM_SRV_CMD__A                                         0x420032
+#define   HI_RA_RAM_SRV_CMD_RESET                                    0x2
+#define   HI_RA_RAM_SRV_CMD_CONFIG                                   0x3
+#define   HI_RA_RAM_SRV_CMD_EXECUTE                                  0x6
+#define HI_RA_RAM_SRV_RST_KEY__A                                     0x420033
+#define   HI_RA_RAM_SRV_RST_KEY_ACT                                  0x3973
+#define HI_RA_RAM_SRV_CFG_KEY__A                                     0x420033
+#define HI_RA_RAM_SRV_CFG_DIV__A                                     0x420034
+#define HI_RA_RAM_SRV_CFG_BDL__A                                     0x420035
+#define HI_RA_RAM_SRV_CFG_WUP__A                                     0x420036
+#define HI_RA_RAM_SRV_CFG_ACT__A                                     0x420037
+#define     HI_RA_RAM_SRV_CFG_ACT_SLV0_ON                            0x1
+#define   HI_RA_RAM_SRV_CFG_ACT_BRD__M                               0x4
+#define     HI_RA_RAM_SRV_CFG_ACT_BRD_OFF                            0x0
+#define     HI_RA_RAM_SRV_CFG_ACT_BRD_ON                             0x4
+#define     HI_RA_RAM_SRV_CFG_ACT_PWD_EXE                            0x8
+#define HI_RA_RAM_USR_BEGIN__A                                       0x420040
+#define HI_IF_RAM_TRP_BPT0__AX                                       0x430000
+#define HI_IF_RAM_USR_BEGIN__A                                       0x430200
+#define SC_COMM_EXEC__A                                              0x800000
+#define     SC_COMM_EXEC_CTL_STOP                                    0x0
+#define SC_COMM_STATE__A                                             0x800001
+#define SC_RA_RAM_PARAM0__A                                          0x820040
+#define SC_RA_RAM_PARAM1__A                                          0x820041
+#define SC_RA_RAM_CMD_ADDR__A                                        0x820042
+#define SC_RA_RAM_CMD__A                                             0x820043
+#define   SC_RA_RAM_CMD_PROC_START                                   0x1
+#define   SC_RA_RAM_CMD_SET_PREF_PARAM                               0x3
+#define   SC_RA_RAM_CMD_GET_OP_PARAM                                 0x5
+#define   SC_RA_RAM_SW_EVENT_RUN_NMASK__M                            0x1
+#define   SC_RA_RAM_LOCKTRACK_MIN                                    0x1
+#define     SC_RA_RAM_OP_PARAM_MODE_2K                               0x0
+#define     SC_RA_RAM_OP_PARAM_MODE_8K                               0x1
+#define     SC_RA_RAM_OP_PARAM_GUARD_32                              0x0
+#define     SC_RA_RAM_OP_PARAM_GUARD_16                              0x4
+#define     SC_RA_RAM_OP_PARAM_GUARD_8                               0x8
+#define     SC_RA_RAM_OP_PARAM_GUARD_4                               0xC
+#define     SC_RA_RAM_OP_PARAM_CONST_QPSK                            0x0
+#define     SC_RA_RAM_OP_PARAM_CONST_QAM16                           0x10
+#define     SC_RA_RAM_OP_PARAM_CONST_QAM64                           0x20
+#define     SC_RA_RAM_OP_PARAM_HIER_NO                               0x0
+#define     SC_RA_RAM_OP_PARAM_HIER_A1                               0x40
+#define     SC_RA_RAM_OP_PARAM_HIER_A2                               0x80
+#define     SC_RA_RAM_OP_PARAM_HIER_A4                               0xC0
+#define     SC_RA_RAM_OP_PARAM_RATE_1_2                              0x0
+#define     SC_RA_RAM_OP_PARAM_RATE_2_3                              0x200
+#define     SC_RA_RAM_OP_PARAM_RATE_3_4                              0x400
+#define     SC_RA_RAM_OP_PARAM_RATE_5_6                              0x600
+#define     SC_RA_RAM_OP_PARAM_RATE_7_8                              0x800
+#define     SC_RA_RAM_OP_PARAM_PRIO_HI                               0x0
+#define     SC_RA_RAM_OP_PARAM_PRIO_LO                               0x1000
+#define   SC_RA_RAM_OP_AUTO_MODE__M                                  0x1
+#define   SC_RA_RAM_OP_AUTO_GUARD__M                                 0x2
+#define   SC_RA_RAM_OP_AUTO_CONST__M                                 0x4
+#define   SC_RA_RAM_OP_AUTO_HIER__M                                  0x8
+#define   SC_RA_RAM_OP_AUTO_RATE__M                                  0x10
+#define SC_RA_RAM_LOCK__A                                            0x82004B
+#define   SC_RA_RAM_LOCK_DEMOD__M                                    0x1
+#define   SC_RA_RAM_LOCK_FEC__M                                      0x2
+#define   SC_RA_RAM_LOCK_MPEG__M                                     0x4
+#define SC_RA_RAM_BE_OPT_ENA__A                                      0x82004C
+#define   SC_RA_RAM_BE_OPT_ENA_CP_OPT                                0x1
+#define SC_RA_RAM_BE_OPT_DELAY__A                                    0x82004D
+#define SC_RA_RAM_CONFIG__A                                          0x820050
+#define   SC_RA_RAM_CONFIG_FR_ENABLE__M                              0x4
+#define   SC_RA_RAM_CONFIG_FREQSCAN__M                               0x10
+#define   SC_RA_RAM_CONFIG_SLAVE__M                                  0x20
+#define SC_RA_RAM_IF_SAVE__AX                                        0x82008E
+#define SC_RA_RAM_IR_COARSE_2K_LENGTH__A                             0x8200D1
+#define SC_RA_RAM_IR_COARSE_2K_LENGTH__PRE                           0x9
+#define SC_RA_RAM_IR_COARSE_2K_FREQINC__A                            0x8200D2
+#define SC_RA_RAM_IR_COARSE_2K_FREQINC__PRE                          0x4
+#define SC_RA_RAM_IR_COARSE_2K_KAISINC__A                            0x8200D3
+#define SC_RA_RAM_IR_COARSE_2K_KAISINC__PRE                          0x100
+#define SC_RA_RAM_IR_COARSE_8K_LENGTH__A                             0x8200D4
+#define SC_RA_RAM_IR_COARSE_8K_LENGTH__PRE                           0x8
+#define SC_RA_RAM_IR_COARSE_8K_FREQINC__A                            0x8200D5
+#define SC_RA_RAM_IR_COARSE_8K_FREQINC__PRE                          0x8
+#define SC_RA_RAM_IR_COARSE_8K_KAISINC__A                            0x8200D6
+#define SC_RA_RAM_IR_COARSE_8K_KAISINC__PRE                          0x200
+#define SC_RA_RAM_IR_FINE_2K_LENGTH__A                               0x8200D7
+#define SC_RA_RAM_IR_FINE_2K_LENGTH__PRE                             0x9
+#define SC_RA_RAM_IR_FINE_2K_FREQINC__A                              0x8200D8
+#define SC_RA_RAM_IR_FINE_2K_FREQINC__PRE                            0x4
+#define SC_RA_RAM_IR_FINE_2K_KAISINC__A                              0x8200D9
+#define SC_RA_RAM_IR_FINE_2K_KAISINC__PRE                            0x100
+#define SC_RA_RAM_IR_FINE_8K_LENGTH__A                               0x8200DA
+#define SC_RA_RAM_IR_FINE_8K_LENGTH__PRE                             0xB
+#define SC_RA_RAM_IR_FINE_8K_FREQINC__A                              0x8200DB
+#define SC_RA_RAM_IR_FINE_8K_FREQINC__PRE                            0x1
+#define SC_RA_RAM_IR_FINE_8K_KAISINC__A                              0x8200DC
+#define SC_RA_RAM_IR_FINE_8K_KAISINC__PRE                            0x40
+#define SC_RA_RAM_ECHO_SHIFT_LIM__A                                  0x8200DD
+#define SC_RA_RAM_SAMPLE_RATE_COUNT__A                               0x8200E8
+#define SC_RA_RAM_SAMPLE_RATE_STEP__A                                0x8200E9
+#define SC_RA_RAM_BAND__A                                            0x8200EC
+#define SC_RA_RAM_LC_ABS_2K__A                                       0x8200F4
+#define SC_RA_RAM_LC_ABS_2K__PRE                                     0x1F
+#define SC_RA_RAM_LC_ABS_8K__A                                       0x8200F5
+#define SC_RA_RAM_LC_ABS_8K__PRE                                     0x1F
+#define SC_RA_RAM_EQ_IS_GAIN_UNKNOWN_MAN__PRE                        0x1D6
+#define SC_RA_RAM_EQ_IS_GAIN_UNKNOWN_EXP__PRE                        0x4
+#define SC_RA_RAM_EQ_IS_GAIN_QPSK_MAN__PRE                           0x1BB
+#define SC_RA_RAM_EQ_IS_GAIN_QPSK_EXP__PRE                           0x5
+#define SC_RA_RAM_EQ_IS_GAIN_16QAM_MAN__PRE                          0x1EF
+#define SC_RA_RAM_EQ_IS_GAIN_16QAM_EXP__PRE                          0x5
+#define SC_RA_RAM_EQ_IS_GAIN_16QAM_A2_MAN__PRE                       0x15E
+#define SC_RA_RAM_EQ_IS_GAIN_16QAM_A2_EXP__PRE                       0x5
+#define SC_RA_RAM_EQ_IS_GAIN_16QAM_A4_MAN__PRE                       0x11A
+#define SC_RA_RAM_EQ_IS_GAIN_16QAM_A4_EXP__PRE                       0x6
+#define SC_RA_RAM_EQ_IS_GAIN_64QAM_MAN__PRE                          0x1FB
+#define SC_RA_RAM_EQ_IS_GAIN_64QAM_EXP__PRE                          0x5
+#define SC_RA_RAM_EQ_IS_GAIN_64QAM_A2_MAN__PRE                       0x12F
+#define SC_RA_RAM_EQ_IS_GAIN_64QAM_A2_EXP__PRE                       0x5
+#define SC_RA_RAM_EQ_IS_GAIN_64QAM_A4_MAN__PRE                       0x197
+#define SC_RA_RAM_EQ_IS_GAIN_64QAM_A4_EXP__PRE                       0x5
+#define SC_RA_RAM_DRIVER_VERSION__AX                                 0x8201FE
+#define   SC_RA_RAM_PROC_LOCKTRACK                                   0x0
+#define FE_COMM_EXEC__A                                              0xC00000
+#define FE_AD_REG_COMM_EXEC__A                                       0xC10000
+#define FE_AD_REG_FDB_IN__A                                          0xC10012
+#define FE_AD_REG_PD__A                                              0xC10013
+#define FE_AD_REG_INVEXT__A                                          0xC10014
+#define FE_AD_REG_CLKNEG__A                                          0xC10015
+#define FE_AG_REG_COMM_EXEC__A                                       0xC20000
+#define FE_AG_REG_AG_MODE_LOP__A                                     0xC20010
+#define   FE_AG_REG_AG_MODE_LOP_MODE_4__M                            0x10
+#define     FE_AG_REG_AG_MODE_LOP_MODE_4_STATIC                      0x0
+#define     FE_AG_REG_AG_MODE_LOP_MODE_4_DYNAMIC                     0x10
+#define   FE_AG_REG_AG_MODE_LOP_MODE_5__M                            0x20
+#define     FE_AG_REG_AG_MODE_LOP_MODE_5_STATIC                      0x0
+#define   FE_AG_REG_AG_MODE_LOP_MODE_C__M                            0x1000
+#define     FE_AG_REG_AG_MODE_LOP_MODE_C_STATIC                      0x0
+#define     FE_AG_REG_AG_MODE_LOP_MODE_C_DYNAMIC                     0x1000
+#define   FE_AG_REG_AG_MODE_LOP_MODE_E__M                            0x4000
+#define     FE_AG_REG_AG_MODE_LOP_MODE_E_STATIC                      0x0
+#define     FE_AG_REG_AG_MODE_LOP_MODE_E_DYNAMIC                     0x4000
+#define FE_AG_REG_AG_MODE_HIP__A                                     0xC20011
+#define FE_AG_REG_AG_PGA_MODE__A                                     0xC20012
+#define   FE_AG_REG_AG_PGA_MODE_PFY_PCY_AFY_REN                      0x0
+#define   FE_AG_REG_AG_PGA_MODE_PFN_PCN_AFY_REN                      0x1
+#define FE_AG_REG_AG_AGC_SIO__A                                      0xC20013
+#define   FE_AG_REG_AG_AGC_SIO_AGC_SIO_2__M                          0x2
+#define     FE_AG_REG_AG_AGC_SIO_AGC_SIO_2_OUTPUT                    0x0
+#define     FE_AG_REG_AG_AGC_SIO_AGC_SIO_2_INPUT                     0x2
+#define FE_AG_REG_AG_PWD__A                                          0xC20015
+#define   FE_AG_REG_AG_PWD_PWD_PD2__M                                0x2
+#define     FE_AG_REG_AG_PWD_PWD_PD2_DISABLE                         0x0
+#define     FE_AG_REG_AG_PWD_PWD_PD2_ENABLE                          0x2
+#define FE_AG_REG_DCE_AUR_CNT__A                                     0xC20016
+#define FE_AG_REG_DCE_RUR_CNT__A                                     0xC20017
+#define FE_AG_REG_ACE_AUR_CNT__A                                     0xC2001A
+#define FE_AG_REG_ACE_RUR_CNT__A                                     0xC2001B
+#define FE_AG_REG_CDR_RUR_CNT__A                                     0xC20020
+#define FE_AG_REG_EGC_RUR_CNT__A                                     0xC20024
+#define FE_AG_REG_EGC_SET_LVL__A                                     0xC20025
+#define FE_AG_REG_EGC_SET_LVL__M                                     0x1FF
+#define FE_AG_REG_EGC_FLA_RGN__A                                     0xC20026
+#define FE_AG_REG_EGC_SLO_RGN__A                                     0xC20027
+#define FE_AG_REG_EGC_JMP_PSN__A                                     0xC20028
+#define FE_AG_REG_EGC_FLA_INC__A                                     0xC20029
+#define FE_AG_REG_EGC_FLA_DEC__A                                     0xC2002A
+#define FE_AG_REG_EGC_SLO_INC__A                                     0xC2002B
+#define FE_AG_REG_EGC_SLO_DEC__A                                     0xC2002C
+#define FE_AG_REG_EGC_FAS_INC__A                                     0xC2002D
+#define FE_AG_REG_EGC_FAS_DEC__A                                     0xC2002E
+#define FE_AG_REG_PM1_AGC_WRI__A                                     0xC20030
+#define FE_AG_REG_PM1_AGC_WRI__M                                     0x7FF
+#define FE_AG_REG_GC1_AGC_RIC__A                                     0xC20031
+#define FE_AG_REG_GC1_AGC_OFF__A                                     0xC20032
+#define FE_AG_REG_GC1_AGC_MAX__A                                     0xC20033
+#define FE_AG_REG_GC1_AGC_MIN__A                                     0xC20034
+#define FE_AG_REG_GC1_AGC_DAT__A                                     0xC20035
+#define FE_AG_REG_GC1_AGC_DAT__M                                     0x3FF
+#define FE_AG_REG_PM2_AGC_WRI__A                                     0xC20036
+#define FE_AG_REG_IND_WIN__A                                         0xC2003C
+#define FE_AG_REG_IND_THD_LOL__A                                     0xC2003D
+#define FE_AG_REG_IND_THD_HIL__A                                     0xC2003E
+#define FE_AG_REG_IND_DEL__A                                         0xC2003F
+#define FE_AG_REG_IND_PD1_WRI__A                                     0xC20040
+#define FE_AG_REG_PDA_AUR_CNT__A                                     0xC20041
+#define FE_AG_REG_PDA_RUR_CNT__A                                     0xC20042
+#define FE_AG_REG_PDA_AVE_DAT__A                                     0xC20043
+#define FE_AG_REG_PDC_RUR_CNT__A                                     0xC20044
+#define FE_AG_REG_PDC_SET_LVL__A                                     0xC20045
+#define FE_AG_REG_PDC_FLA_RGN__A                                     0xC20046
+#define FE_AG_REG_PDC_JMP_PSN__A                                     0xC20047
+#define FE_AG_REG_PDC_FLA_STP__A                                     0xC20048
+#define FE_AG_REG_PDC_SLO_STP__A                                     0xC20049
+#define FE_AG_REG_PDC_PD2_WRI__A                                     0xC2004A
+#define FE_AG_REG_PDC_MAP_DAT__A                                     0xC2004B
+#define FE_AG_REG_PDC_MAX__A                                         0xC2004C
+#define FE_AG_REG_TGA_AUR_CNT__A                                     0xC2004D
+#define FE_AG_REG_TGA_RUR_CNT__A                                     0xC2004E
+#define FE_AG_REG_TGA_AVE_DAT__A                                     0xC2004F
+#define FE_AG_REG_TGC_RUR_CNT__A                                     0xC20050
+#define FE_AG_REG_TGC_SET_LVL__A                                     0xC20051
+#define FE_AG_REG_TGC_SET_LVL__M                                     0x3F
+#define FE_AG_REG_TGC_FLA_RGN__A                                     0xC20052
+#define FE_AG_REG_TGC_JMP_PSN__A                                     0xC20053
+#define FE_AG_REG_TGC_FLA_STP__A                                     0xC20054
+#define FE_AG_REG_TGC_SLO_STP__A                                     0xC20055
+#define FE_AG_REG_TGC_MAP_DAT__A                                     0xC20056
+#define FE_AG_REG_FGA_AUR_CNT__A                                     0xC20057
+#define FE_AG_REG_FGA_RUR_CNT__A                                     0xC20058
+#define FE_AG_REG_FGM_WRI__A                                         0xC20061
+#define FE_AG_REG_BGC_FGC_WRI__A                                     0xC20068
+#define FE_AG_REG_BGC_CGC_WRI__A                                     0xC20069
+#define FE_FS_REG_COMM_EXEC__A                                       0xC30000
+#define FE_FS_REG_ADD_INC_LOP__A                                     0xC30010
+#define FE_FD_REG_COMM_EXEC__A                                       0xC40000
+#define FE_FD_REG_SCL__A                                             0xC40010
+#define FE_FD_REG_MAX_LEV__A                                         0xC40011
+#define FE_FD_REG_NR__A                                              0xC40012
+#define FE_FD_REG_MEAS_VAL__A                                        0xC40014
+#define FE_IF_REG_COMM_EXEC__A                                       0xC50000
+#define FE_IF_REG_INCR0__A                                           0xC50010
+#define FE_IF_REG_INCR0__W                                           16
+#define FE_IF_REG_INCR0__M                                           0xFFFF
+#define FE_IF_REG_INCR1__A                                           0xC50011
+#define FE_IF_REG_INCR1__M                                           0xFF
+#define FE_CF_REG_COMM_EXEC__A                                       0xC60000
+#define FE_CF_REG_SCL__A                                             0xC60010
+#define FE_CF_REG_MAX_LEV__A                                         0xC60011
+#define FE_CF_REG_NR__A                                              0xC60012
+#define FE_CF_REG_IMP_VAL__A                                         0xC60013
+#define FE_CF_REG_MEAS_VAL__A                                        0xC60014
+#define FE_CU_REG_COMM_EXEC__A                                       0xC70000
+#define FE_CU_REG_FRM_CNT_RST__A                                     0xC70011
+#define FE_CU_REG_FRM_CNT_STR__A                                     0xC70012
+#define FT_COMM_EXEC__A                                              0x1000000
+#define FT_REG_COMM_EXEC__A                                          0x1010000
+#define CP_COMM_EXEC__A                                              0x1400000
+#define CP_REG_COMM_EXEC__A                                          0x1410000
+#define CP_REG_INTERVAL__A                                           0x1410011
+#define CP_REG_BR_SPL_OFFSET__A                                      0x1410023
+#define CP_REG_BR_STR_DEL__A                                         0x1410024
+#define CP_REG_RT_ANG_INC0__A                                        0x1410030
+#define CP_REG_RT_ANG_INC1__A                                        0x1410031
+#define CP_REG_RT_DETECT_ENA__A                                      0x1410032
+#define CP_REG_RT_DETECT_TRH__A                                      0x1410033
+#define CP_REG_RT_EXP_MARG__A                                        0x141003E
+#define CP_REG_AC_NEXP_OFFS__A                                       0x1410040
+#define CP_REG_AC_AVER_POW__A                                        0x1410041
+#define CP_REG_AC_MAX_POW__A                                         0x1410042
+#define CP_REG_AC_WEIGHT_MAN__A                                      0x1410043
+#define CP_REG_AC_WEIGHT_EXP__A                                      0x1410044
+#define CP_REG_AC_AMP_MODE__A                                        0x1410047
+#define CP_REG_AC_AMP_FIX__A                                         0x1410048
+#define CP_REG_AC_ANG_MODE__A                                        0x141004A
+#define CE_COMM_EXEC__A                                              0x1800000
+#define CE_REG_COMM_EXEC__A                                          0x1810000
+#define CE_REG_TAPSET__A                                             0x1810011
+#define CE_REG_AVG_POW__A                                            0x1810012
+#define CE_REG_MAX_POW__A                                            0x1810013
+#define CE_REG_ATT__A                                                0x1810014
+#define CE_REG_NRED__A                                               0x1810015
+#define CE_REG_NE_ERR_SELECT__A                                      0x1810043
+#define CE_REG_NE_TD_CAL__A                                          0x1810044
+#define CE_REG_NE_MIXAVG__A                                          0x1810046
+#define CE_REG_NE_NUPD_OFS__A                                        0x1810047
+#define CE_REG_PE_NEXP_OFFS__A                                       0x1810050
+#define CE_REG_PE_TIMESHIFT__A                                       0x1810051
+#define CE_REG_TP_A0_TAP_NEW__A                                      0x1810064
+#define CE_REG_TP_A0_TAP_NEW_VALID__A                                0x1810065
+#define CE_REG_TP_A0_MU_LMS_STEP__A                                  0x1810066
+#define CE_REG_TP_A1_TAP_NEW__A                                      0x1810068
+#define CE_REG_TP_A1_TAP_NEW_VALID__A                                0x1810069
+#define CE_REG_TP_A1_MU_LMS_STEP__A                                  0x181006A
+#define CE_REG_TI_NEXP_OFFS__A                                       0x1810070
+#define CE_REG_FI_SHT_INCR__A                                        0x1810090
+#define CE_REG_FI_EXP_NORM__A                                        0x1810091
+#define CE_REG_IR_INPUTSEL__A                                        0x18100A0
+#define CE_REG_IR_STARTPOS__A                                        0x18100A1
+#define CE_REG_IR_NEXP_THRES__A                                      0x18100A2
+#define CE_REG_FR_TREAL00__A                                         0x1820010
+#define CE_REG_FR_TIMAG00__A                                         0x1820011
+#define CE_REG_FR_TREAL01__A                                         0x1820012
+#define CE_REG_FR_TIMAG01__A                                         0x1820013
+#define CE_REG_FR_TREAL02__A                                         0x1820014
+#define CE_REG_FR_TIMAG02__A                                         0x1820015
+#define CE_REG_FR_TREAL03__A                                         0x1820016
+#define CE_REG_FR_TIMAG03__A                                         0x1820017
+#define CE_REG_FR_TREAL04__A                                         0x1820018
+#define CE_REG_FR_TIMAG04__A                                         0x1820019
+#define CE_REG_FR_TREAL05__A                                         0x182001A
+#define CE_REG_FR_TIMAG05__A                                         0x182001B
+#define CE_REG_FR_TREAL06__A                                         0x182001C
+#define CE_REG_FR_TIMAG06__A                                         0x182001D
+#define CE_REG_FR_TREAL07__A                                         0x182001E
+#define CE_REG_FR_TIMAG07__A                                         0x182001F
+#define CE_REG_FR_TREAL08__A                                         0x1820020
+#define CE_REG_FR_TIMAG08__A                                         0x1820021
+#define CE_REG_FR_TREAL09__A                                         0x1820022
+#define CE_REG_FR_TIMAG09__A                                         0x1820023
+#define CE_REG_FR_TREAL10__A                                         0x1820024
+#define CE_REG_FR_TIMAG10__A                                         0x1820025
+#define CE_REG_FR_TREAL11__A                                         0x1820026
+#define CE_REG_FR_TIMAG11__A                                         0x1820027
+#define CE_REG_FR_MID_TAP__A                                         0x1820028
+#define CE_REG_FR_SQS_G00__A                                         0x1820029
+#define CE_REG_FR_SQS_G01__A                                         0x182002A
+#define CE_REG_FR_SQS_G02__A                                         0x182002B
+#define CE_REG_FR_SQS_G03__A                                         0x182002C
+#define CE_REG_FR_SQS_G04__A                                         0x182002D
+#define CE_REG_FR_SQS_G05__A                                         0x182002E
+#define CE_REG_FR_SQS_G06__A                                         0x182002F
+#define CE_REG_FR_SQS_G07__A                                         0x1820030
+#define CE_REG_FR_SQS_G08__A                                         0x1820031
+#define CE_REG_FR_SQS_G09__A                                         0x1820032
+#define CE_REG_FR_SQS_G10__A                                         0x1820033
+#define CE_REG_FR_SQS_G11__A                                         0x1820034
+#define CE_REG_FR_SQS_G12__A                                         0x1820035
+#define CE_REG_FR_RIO_G00__A                                         0x1820036
+#define CE_REG_FR_RIO_G01__A                                         0x1820037
+#define CE_REG_FR_RIO_G02__A                                         0x1820038
+#define CE_REG_FR_RIO_G03__A                                         0x1820039
+#define CE_REG_FR_RIO_G04__A                                         0x182003A
+#define CE_REG_FR_RIO_G05__A                                         0x182003B
+#define CE_REG_FR_RIO_G06__A                                         0x182003C
+#define CE_REG_FR_RIO_G07__A                                         0x182003D
+#define CE_REG_FR_RIO_G08__A                                         0x182003E
+#define CE_REG_FR_RIO_G09__A                                         0x182003F
+#define CE_REG_FR_RIO_G10__A                                         0x1820040
+#define CE_REG_FR_MODE__A                                            0x1820041
+#define CE_REG_FR_SQS_TRH__A                                         0x1820042
+#define CE_REG_FR_RIO_GAIN__A                                        0x1820043
+#define CE_REG_FR_BYPASS__A                                          0x1820044
+#define CE_REG_FR_PM_SET__A                                          0x1820045
+#define CE_REG_FR_ERR_SH__A                                          0x1820046
+#define CE_REG_FR_MAN_SH__A                                          0x1820047
+#define CE_REG_FR_TAP_SH__A                                          0x1820048
+#define EQ_COMM_EXEC__A                                              0x1C00000
+#define EQ_REG_COMM_EXEC__A                                          0x1C10000
+#define EQ_REG_COMM_MB__A                                            0x1C10002
+#define EQ_REG_IS_GAIN_MAN__A                                        0x1C10015
+#define EQ_REG_IS_GAIN_EXP__A                                        0x1C10016
+#define EQ_REG_IS_CLIP_EXP__A                                        0x1C10017
+#define EQ_REG_SN_CEGAIN__A                                          0x1C1002A
+#define EQ_REG_SN_OFFSET__A                                          0x1C1002B
+#define EQ_REG_RC_SEL_CAR__A                                         0x1C10032
+#define   EQ_REG_RC_SEL_CAR_INIT                                     0x0
+#define     EQ_REG_RC_SEL_CAR_DIV_ON                                 0x1
+#define     EQ_REG_RC_SEL_CAR_PASS_A_CC                              0x0
+#define     EQ_REG_RC_SEL_CAR_PASS_B_CE                              0x2
+#define     EQ_REG_RC_SEL_CAR_LOCAL_A_CC                             0x0
+#define     EQ_REG_RC_SEL_CAR_LOCAL_B_CE                             0x8
+#define     EQ_REG_RC_SEL_CAR_MEAS_A_CC                              0x0
+#define     EQ_REG_RC_SEL_CAR_MEAS_B_CE                              0x20
+#define EQ_REG_OT_CONST__A                                           0x1C10046
+#define EQ_REG_OT_ALPHA__A                                           0x1C10047
+#define EQ_REG_OT_QNT_THRES0__A                                      0x1C10048
+#define EQ_REG_OT_QNT_THRES1__A                                      0x1C10049
+#define EQ_REG_OT_CSI_STEP__A                                        0x1C1004A
+#define EQ_REG_OT_CSI_OFFSET__A                                      0x1C1004B
+#define EQ_REG_TD_REQ_SMB_CNT__A                                     0x1C10061
+#define EQ_REG_TD_TPS_PWR_OFS__A                                     0x1C10062
+#define EC_SB_REG_COMM_EXEC__A                                       0x2010000
+#define EC_SB_REG_TR_MODE__A                                         0x2010010
+#define   EC_SB_REG_TR_MODE_8K                                       0x0
+#define   EC_SB_REG_TR_MODE_2K                                       0x1
+#define EC_SB_REG_CONST__A                                           0x2010011
+#define   EC_SB_REG_CONST_QPSK                                       0x0
+#define   EC_SB_REG_CONST_16QAM                                      0x1
+#define   EC_SB_REG_CONST_64QAM                                      0x2
+#define EC_SB_REG_ALPHA__A                                           0x2010012
+#define EC_SB_REG_PRIOR__A                                           0x2010013
+#define   EC_SB_REG_PRIOR_HI                                         0x0
+#define   EC_SB_REG_PRIOR_LO                                         0x1
+#define EC_SB_REG_CSI_HI__A                                          0x2010014
+#define EC_SB_REG_CSI_LO__A                                          0x2010015
+#define EC_SB_REG_SMB_TGL__A                                         0x2010016
+#define EC_SB_REG_SNR_HI__A                                          0x2010017
+#define EC_SB_REG_SNR_MID__A                                         0x2010018
+#define EC_SB_REG_SNR_LO__A                                          0x2010019
+#define EC_SB_REG_SCALE_MSB__A                                       0x201001A
+#define EC_SB_REG_SCALE_BIT2__A                                      0x201001B
+#define EC_SB_REG_SCALE_LSB__A                                       0x201001C
+#define EC_SB_REG_CSI_OFS__A                                         0x201001D
+#define EC_VD_REG_COMM_EXEC__A                                       0x2090000
+#define EC_VD_REG_FORCE__A                                           0x2090010
+#define EC_VD_REG_SET_CODERATE__A                                    0x2090011
+#define   EC_VD_REG_SET_CODERATE_C1_2                                0x0
+#define   EC_VD_REG_SET_CODERATE_C2_3                                0x1
+#define   EC_VD_REG_SET_CODERATE_C3_4                                0x2
+#define   EC_VD_REG_SET_CODERATE_C5_6                                0x3
+#define   EC_VD_REG_SET_CODERATE_C7_8                                0x4
+#define EC_VD_REG_REQ_SMB_CNT__A                                     0x2090012
+#define EC_VD_REG_RLK_ENA__A                                         0x2090014
+#define EC_OD_REG_COMM_EXEC__A                                       0x2110000
+#define EC_OD_REG_SYNC__A                                            0x2110010
+#define EC_OD_DEINT_RAM__A                                           0x2120000
+#define EC_RS_REG_COMM_EXEC__A                                       0x2130000
+#define EC_RS_REG_REQ_PCK_CNT__A                                     0x2130010
+#define EC_RS_REG_VAL__A                                             0x2130011
+#define   EC_RS_REG_VAL_PCK                                          0x1
+#define EC_RS_EC_RAM__A                                              0x2140000
+#define EC_OC_REG_COMM_EXEC__A                                       0x2150000
+#define     EC_OC_REG_COMM_EXEC_CTL_ACTIVE                           0x1
+#define     EC_OC_REG_COMM_EXEC_CTL_HOLD                             0x2
+#define EC_OC_REG_COMM_INT_STA__A                                    0x2150007
+#define EC_OC_REG_OC_MODE_LOP__A                                     0x2150010
+#define   EC_OC_REG_OC_MODE_LOP_PAR_ENA__M                           0x1
+#define     EC_OC_REG_OC_MODE_LOP_PAR_ENA_ENABLE                     0x0
+#define     EC_OC_REG_OC_MODE_LOP_PAR_ENA_DISABLE                    0x1
+#define   EC_OC_REG_OC_MODE_LOP_DTO_CTR_SRC__M                       0x4
+#define     EC_OC_REG_OC_MODE_LOP_DTO_CTR_SRC_STATIC                 0x0
+#define   EC_OC_REG_OC_MODE_LOP_MPG_TRM_MDE__M                       0x80
+#define     EC_OC_REG_OC_MODE_LOP_MPG_TRM_MDE_SERIAL                 0x80
+#define EC_OC_REG_OC_MODE_HIP__A                                     0x2150011
+#define     EC_OC_REG_OC_MODE_HIP_MPG_BUS_SRC_MONITOR                0x10
+#define   EC_OC_REG_OC_MODE_HIP_MPG_PAR_VAL__M                       0x200
+#define     EC_OC_REG_OC_MODE_HIP_MPG_PAR_VAL_DISABLE                0x0
+#define     EC_OC_REG_OC_MODE_HIP_MPG_PAR_VAL_ENABLE                 0x200
+#define EC_OC_REG_OC_MPG_SIO__A                                      0x2150012
+#define EC_OC_REG_OC_MPG_SIO__M                                      0xFFF
+#define EC_OC_REG_OC_MON_SIO__A                                      0x2150013
+#define EC_OC_REG_DTO_INC_LOP__A                                     0x2150014
+#define EC_OC_REG_DTO_INC_HIP__A                                     0x2150015
+#define EC_OC_REG_SNC_ISC_LVL__A                                     0x2150016
+#define   EC_OC_REG_SNC_ISC_LVL_OSC__M                               0xF0
+#define EC_OC_REG_TMD_TOP_MODE__A                                    0x215001D
+#define EC_OC_REG_TMD_TOP_CNT__A                                     0x215001E
+#define EC_OC_REG_TMD_HIL_MAR__A                                     0x215001F
+#define EC_OC_REG_TMD_LOL_MAR__A                                     0x2150020
+#define EC_OC_REG_TMD_CUR_CNT__A                                     0x2150021
+#define EC_OC_REG_AVR_ASH_CNT__A                                     0x2150023
+#define EC_OC_REG_AVR_BSH_CNT__A                                     0x2150024
+#define EC_OC_REG_RCN_MODE__A                                        0x2150027
+#define EC_OC_REG_RCN_CRA_LOP__A                                     0x2150028
+#define EC_OC_REG_RCN_CRA_HIP__A                                     0x2150029
+#define EC_OC_REG_RCN_CST_LOP__A                                     0x215002A
+#define EC_OC_REG_RCN_CST_HIP__A                                     0x215002B
+#define EC_OC_REG_RCN_SET_LVL__A                                     0x215002C
+#define EC_OC_REG_RCN_GAI_LVL__A                                     0x215002D
+#define EC_OC_REG_RCN_CLP_LOP__A                                     0x2150032
+#define EC_OC_REG_RCN_CLP_HIP__A                                     0x2150033
+#define EC_OC_REG_RCN_MAP_LOP__A                                     0x2150034
+#define EC_OC_REG_RCN_MAP_HIP__A                                     0x2150035
+#define EC_OC_REG_OCR_MPG_UOS__A                                     0x2150036
+#define EC_OC_REG_OCR_MPG_UOS__M                                     0xFFF
+#define   EC_OC_REG_OCR_MPG_UOS_INIT                                 0x0
+#define EC_OC_REG_OCR_MPG_USR_DAT__A                                 0x2150038
+#define EC_OC_REG_OCR_MON_UOS__A                                     0x2150039
+#define     EC_OC_REG_OCR_MON_UOS_DAT_0_ENABLE                       0x1
+#define     EC_OC_REG_OCR_MON_UOS_DAT_1_ENABLE                       0x2
+#define     EC_OC_REG_OCR_MON_UOS_DAT_2_ENABLE                       0x4
+#define     EC_OC_REG_OCR_MON_UOS_DAT_3_ENABLE                       0x8
+#define     EC_OC_REG_OCR_MON_UOS_DAT_4_ENABLE                       0x10
+#define     EC_OC_REG_OCR_MON_UOS_DAT_5_ENABLE                       0x20
+#define     EC_OC_REG_OCR_MON_UOS_DAT_6_ENABLE                       0x40
+#define     EC_OC_REG_OCR_MON_UOS_DAT_7_ENABLE                       0x80
+#define     EC_OC_REG_OCR_MON_UOS_DAT_8_ENABLE                       0x100
+#define     EC_OC_REG_OCR_MON_UOS_DAT_9_ENABLE                       0x200
+#define     EC_OC_REG_OCR_MON_UOS_VAL_ENABLE                         0x400
+#define     EC_OC_REG_OCR_MON_UOS_CLK_ENABLE                         0x800
+#define EC_OC_REG_OCR_MON_WRI__A                                     0x215003A
+#define   EC_OC_REG_OCR_MON_WRI_INIT                                 0x0
+#define EC_OC_REG_IPR_INV_MPG__A                                     0x2150045
+#define CC_REG_OSC_MODE__A                                           0x2410010
+#define   CC_REG_OSC_MODE_M20                                        0x1
+#define CC_REG_PLL_MODE__A                                           0x2410011
+#define     CC_REG_PLL_MODE_BYPASS_PLL                               0x1
+#define     CC_REG_PLL_MODE_PUMP_CUR_12                              0x14
+#define CC_REG_REF_DIVIDE__A                                         0x2410012
+#define CC_REG_PWD_MODE__A                                           0x2410015
+#define   CC_REG_PWD_MODE_DOWN_PLL                                   0x2
+#define CC_REG_UPDATE__A                                             0x2410017
+#define   CC_REG_UPDATE_KEY                                          0x3973
+#define CC_REG_JTAGID_L__A                                           0x2410019
+#define LC_COMM_EXEC__A                                              0x2800000
+#define LC_RA_RAM_IFINCR_NOM_L__A                                    0x282000C
+#define LC_RA_RAM_FILTER_SYM_SET__A                                  0x282001A
+#define LC_RA_RAM_FILTER_SYM_SET__PRE                                0x3E8
+#define LC_RA_RAM_FILTER_CRMM_A__A                                   0x2820060
+#define LC_RA_RAM_FILTER_CRMM_A__PRE                                 0x4
+#define LC_RA_RAM_FILTER_CRMM_B__A                                   0x2820061
+#define LC_RA_RAM_FILTER_CRMM_B__PRE                                 0x1
+#define LC_RA_RAM_FILTER_SRMM_A__A                                   0x2820068
+#define LC_RA_RAM_FILTER_SRMM_A__PRE                                 0x4
+#define LC_RA_RAM_FILTER_SRMM_B__A                                   0x2820069
+#define LC_RA_RAM_FILTER_SRMM_B__PRE                                 0x1
+#define B_HI_COMM_EXEC__A                                            0x400000
+#define B_HI_COMM_MB__A                                              0x400002
+#define B_HI_CT_REG_COMM_STATE__A                                    0x410001
+#define B_HI_RA_RAM_SRV_RES__A                                       0x420031
+#define B_HI_RA_RAM_SRV_CMD__A                                       0x420032
+#define   B_HI_RA_RAM_SRV_CMD_RESET                                  0x2
+#define   B_HI_RA_RAM_SRV_CMD_CONFIG                                 0x3
+#define   B_HI_RA_RAM_SRV_CMD_EXECUTE                                0x6
+#define B_HI_RA_RAM_SRV_RST_KEY__A                                   0x420033
+#define   B_HI_RA_RAM_SRV_RST_KEY_ACT                                0x3973
+#define B_HI_RA_RAM_SRV_CFG_KEY__A                                   0x420033
+#define B_HI_RA_RAM_SRV_CFG_DIV__A                                   0x420034
+#define B_HI_RA_RAM_SRV_CFG_BDL__A                                   0x420035
+#define B_HI_RA_RAM_SRV_CFG_WUP__A                                   0x420036
+#define B_HI_RA_RAM_SRV_CFG_ACT__A                                   0x420037
+#define     B_HI_RA_RAM_SRV_CFG_ACT_SLV0_ON                          0x1
+#define   B_HI_RA_RAM_SRV_CFG_ACT_BRD__M                             0x4
+#define     B_HI_RA_RAM_SRV_CFG_ACT_BRD_OFF                          0x0
+#define     B_HI_RA_RAM_SRV_CFG_ACT_BRD_ON                           0x4
+#define     B_HI_RA_RAM_SRV_CFG_ACT_PWD_EXE                          0x8
+#define B_HI_RA_RAM_USR_BEGIN__A                                     0x420040
+#define B_HI_IF_RAM_TRP_BPT0__AX                                     0x430000
+#define B_HI_IF_RAM_USR_BEGIN__A                                     0x430200
+#define B_SC_COMM_EXEC__A                                            0x800000
+#define     B_SC_COMM_EXEC_CTL_STOP                                  0x0
+#define B_SC_COMM_STATE__A                                           0x800001
+#define B_SC_RA_RAM_PARAM0__A                                        0x820040
+#define B_SC_RA_RAM_PARAM1__A                                        0x820041
+#define B_SC_RA_RAM_CMD_ADDR__A                                      0x820042
+#define B_SC_RA_RAM_CMD__A                                           0x820043
+#define   B_SC_RA_RAM_CMD_PROC_START                                 0x1
+#define   B_SC_RA_RAM_CMD_SET_PREF_PARAM                             0x3
+#define   B_SC_RA_RAM_CMD_GET_OP_PARAM                               0x5
+#define   B_SC_RA_RAM_SW_EVENT_RUN_NMASK__M                          0x1
+#define   B_SC_RA_RAM_LOCKTRACK_MIN                                  0x1
+#define     B_SC_RA_RAM_OP_PARAM_MODE_2K                             0x0
+#define     B_SC_RA_RAM_OP_PARAM_MODE_8K                             0x1
+#define     B_SC_RA_RAM_OP_PARAM_GUARD_32                            0x0
+#define     B_SC_RA_RAM_OP_PARAM_GUARD_16                            0x4
+#define     B_SC_RA_RAM_OP_PARAM_GUARD_8                             0x8
+#define     B_SC_RA_RAM_OP_PARAM_GUARD_4                             0xC
+#define     B_SC_RA_RAM_OP_PARAM_CONST_QPSK                          0x0
+#define     B_SC_RA_RAM_OP_PARAM_CONST_QAM16                         0x10
+#define     B_SC_RA_RAM_OP_PARAM_CONST_QAM64                         0x20
+#define     B_SC_RA_RAM_OP_PARAM_HIER_NO                             0x0
+#define     B_SC_RA_RAM_OP_PARAM_HIER_A1                             0x40
+#define     B_SC_RA_RAM_OP_PARAM_HIER_A2                             0x80
+#define     B_SC_RA_RAM_OP_PARAM_HIER_A4                             0xC0
+#define     B_SC_RA_RAM_OP_PARAM_RATE_1_2                            0x0
+#define     B_SC_RA_RAM_OP_PARAM_RATE_2_3                            0x200
+#define     B_SC_RA_RAM_OP_PARAM_RATE_3_4                            0x400
+#define     B_SC_RA_RAM_OP_PARAM_RATE_5_6                            0x600
+#define     B_SC_RA_RAM_OP_PARAM_RATE_7_8                            0x800
+#define     B_SC_RA_RAM_OP_PARAM_PRIO_HI                             0x0
+#define     B_SC_RA_RAM_OP_PARAM_PRIO_LO                             0x1000
+#define   B_SC_RA_RAM_OP_AUTO_MODE__M                                0x1
+#define   B_SC_RA_RAM_OP_AUTO_GUARD__M                               0x2
+#define   B_SC_RA_RAM_OP_AUTO_CONST__M                               0x4
+#define   B_SC_RA_RAM_OP_AUTO_HIER__M                                0x8
+#define   B_SC_RA_RAM_OP_AUTO_RATE__M                                0x10
+#define B_SC_RA_RAM_LOCK__A                                          0x82004B
+#define   B_SC_RA_RAM_LOCK_DEMOD__M                                  0x1
+#define   B_SC_RA_RAM_LOCK_FEC__M                                    0x2
+#define   B_SC_RA_RAM_LOCK_MPEG__M                                   0x4
+#define B_SC_RA_RAM_BE_OPT_ENA__A                                    0x82004C
+#define   B_SC_RA_RAM_BE_OPT_ENA_CP_OPT                              0x1
+#define B_SC_RA_RAM_BE_OPT_DELAY__A                                  0x82004D
+#define B_SC_RA_RAM_CONFIG__A                                        0x820050
+#define   B_SC_RA_RAM_CONFIG_FR_ENABLE__M                            0x4
+#define   B_SC_RA_RAM_CONFIG_FREQSCAN__M                             0x10
+#define   B_SC_RA_RAM_CONFIG_SLAVE__M                                0x20
+#define   B_SC_RA_RAM_CONFIG_DIV_BLANK_ENABLE__M                     0x200
+#define   B_SC_RA_RAM_CONFIG_DIV_ECHO_ENABLE__M                      0x400
+#define B_SC_RA_RAM_CO_TD_CAL_2K__A                                  0x82005D
+#define B_SC_RA_RAM_CO_TD_CAL_8K__A                                  0x82005E
+#define B_SC_RA_RAM_IF_SAVE__AX                                      0x82008E
+#define B_SC_RA_RAM_DIVERSITY_DELAY_2K_32__A                         0x820098
+#define B_SC_RA_RAM_DIVERSITY_DELAY_2K_16__A                         0x820099
+#define B_SC_RA_RAM_DIVERSITY_DELAY_2K_8__A                          0x82009A
+#define B_SC_RA_RAM_DIVERSITY_DELAY_2K_4__A                          0x82009B
+#define B_SC_RA_RAM_DIVERSITY_DELAY_8K_32__A                         0x82009C
+#define B_SC_RA_RAM_DIVERSITY_DELAY_8K_16__A                         0x82009D
+#define B_SC_RA_RAM_DIVERSITY_DELAY_8K_8__A                          0x82009E
+#define B_SC_RA_RAM_DIVERSITY_DELAY_8K_4__A                          0x82009F
+#define B_SC_RA_RAM_IR_COARSE_2K_LENGTH__A                           0x8200D1
+#define B_SC_RA_RAM_IR_COARSE_2K_LENGTH__PRE                         0x9
+#define B_SC_RA_RAM_IR_COARSE_2K_FREQINC__A                          0x8200D2
+#define B_SC_RA_RAM_IR_COARSE_2K_FREQINC__PRE                        0x4
+#define B_SC_RA_RAM_IR_COARSE_2K_KAISINC__A                          0x8200D3
+#define B_SC_RA_RAM_IR_COARSE_2K_KAISINC__PRE                        0x100
+#define B_SC_RA_RAM_IR_COARSE_8K_LENGTH__A                           0x8200D4
+#define B_SC_RA_RAM_IR_COARSE_8K_LENGTH__PRE                         0x8
+#define B_SC_RA_RAM_IR_COARSE_8K_FREQINC__A                          0x8200D5
+#define B_SC_RA_RAM_IR_COARSE_8K_FREQINC__PRE                        0x8
+#define B_SC_RA_RAM_IR_COARSE_8K_KAISINC__A                          0x8200D6
+#define B_SC_RA_RAM_IR_COARSE_8K_KAISINC__PRE                        0x200
+#define B_SC_RA_RAM_IR_FINE_2K_LENGTH__A                             0x8200D7
+#define B_SC_RA_RAM_IR_FINE_2K_LENGTH__PRE                           0x9
+#define B_SC_RA_RAM_IR_FINE_2K_FREQINC__A                            0x8200D8
+#define B_SC_RA_RAM_IR_FINE_2K_FREQINC__PRE                          0x4
+#define B_SC_RA_RAM_IR_FINE_2K_KAISINC__A                            0x8200D9
+#define B_SC_RA_RAM_IR_FINE_2K_KAISINC__PRE                          0x100
+#define B_SC_RA_RAM_IR_FINE_8K_LENGTH__A                             0x8200DA
+#define B_SC_RA_RAM_IR_FINE_8K_LENGTH__PRE                           0xB
+#define B_SC_RA_RAM_IR_FINE_8K_FREQINC__A                            0x8200DB
+#define B_SC_RA_RAM_IR_FINE_8K_FREQINC__PRE                          0x1
+#define B_SC_RA_RAM_IR_FINE_8K_KAISINC__A                            0x8200DC
+#define B_SC_RA_RAM_IR_FINE_8K_KAISINC__PRE                          0x40
+#define B_SC_RA_RAM_ECHO_SHIFT_LIM__A                                0x8200DD
+#define B_SC_RA_RAM_SAMPLE_RATE_COUNT__A                             0x8200E8
+#define B_SC_RA_RAM_SAMPLE_RATE_STEP__A                              0x8200E9
+#define B_SC_RA_RAM_BAND__A                                          0x8200EC
+#define B_SC_RA_RAM_LC_ABS_2K__A                                     0x8200F4
+#define B_SC_RA_RAM_LC_ABS_2K__PRE                                   0x1F
+#define B_SC_RA_RAM_LC_ABS_8K__A                                     0x8200F5
+#define B_SC_RA_RAM_LC_ABS_8K__PRE                                   0x1F
+#define B_SC_RA_RAM_EQ_IS_GAIN_UNKNOWN_MAN__PRE                      0x100
+#define B_SC_RA_RAM_EQ_IS_GAIN_UNKNOWN_EXP__PRE                      0x4
+#define B_SC_RA_RAM_EQ_IS_GAIN_QPSK_MAN__PRE                         0x1E2
+#define B_SC_RA_RAM_EQ_IS_GAIN_QPSK_EXP__PRE                         0x4
+#define B_SC_RA_RAM_EQ_IS_GAIN_16QAM_MAN__PRE                        0x10D
+#define B_SC_RA_RAM_EQ_IS_GAIN_16QAM_EXP__PRE                        0x5
+#define B_SC_RA_RAM_EQ_IS_GAIN_16QAM_A2_MAN__PRE                     0x17D
+#define B_SC_RA_RAM_EQ_IS_GAIN_16QAM_A2_EXP__PRE                     0x4
+#define B_SC_RA_RAM_EQ_IS_GAIN_16QAM_A4_MAN__PRE                     0x133
+#define B_SC_RA_RAM_EQ_IS_GAIN_16QAM_A4_EXP__PRE                     0x5
+#define B_SC_RA_RAM_EQ_IS_GAIN_64QAM_MAN__PRE                        0x114
+#define B_SC_RA_RAM_EQ_IS_GAIN_64QAM_EXP__PRE                        0x5
+#define B_SC_RA_RAM_EQ_IS_GAIN_64QAM_A2_MAN__PRE                     0x14A
+#define B_SC_RA_RAM_EQ_IS_GAIN_64QAM_A2_EXP__PRE                     0x4
+#define B_SC_RA_RAM_EQ_IS_GAIN_64QAM_A4_MAN__PRE                     0x1BB
+#define B_SC_RA_RAM_EQ_IS_GAIN_64QAM_A4_EXP__PRE                     0x4
+#define B_SC_RA_RAM_DRIVER_VERSION__AX                               0x8201FE
+#define   B_SC_RA_RAM_PROC_LOCKTRACK                                 0x0
+#define B_FE_COMM_EXEC__A                                            0xC00000
+#define B_FE_AD_REG_COMM_EXEC__A                                     0xC10000
+#define B_FE_AD_REG_FDB_IN__A                                        0xC10012
+#define B_FE_AD_REG_PD__A                                            0xC10013
+#define B_FE_AD_REG_INVEXT__A                                        0xC10014
+#define B_FE_AD_REG_CLKNEG__A                                        0xC10015
+#define B_FE_AG_REG_COMM_EXEC__A                                     0xC20000
+#define B_FE_AG_REG_AG_MODE_LOP__A                                   0xC20010
+#define   B_FE_AG_REG_AG_MODE_LOP_MODE_4__M                          0x10
+#define     B_FE_AG_REG_AG_MODE_LOP_MODE_4_STATIC                    0x0
+#define     B_FE_AG_REG_AG_MODE_LOP_MODE_4_DYNAMIC                   0x10
+#define   B_FE_AG_REG_AG_MODE_LOP_MODE_5__M                          0x20
+#define     B_FE_AG_REG_AG_MODE_LOP_MODE_5_STATIC                    0x0
+#define   B_FE_AG_REG_AG_MODE_LOP_MODE_C__M                          0x1000
+#define     B_FE_AG_REG_AG_MODE_LOP_MODE_C_STATIC                    0x0
+#define     B_FE_AG_REG_AG_MODE_LOP_MODE_C_DYNAMIC                   0x1000
+#define   B_FE_AG_REG_AG_MODE_LOP_MODE_E__M                          0x4000
+#define     B_FE_AG_REG_AG_MODE_LOP_MODE_E_STATIC                    0x0
+#define     B_FE_AG_REG_AG_MODE_LOP_MODE_E_DYNAMIC                   0x4000
+#define B_FE_AG_REG_AG_MODE_HIP__A                                   0xC20011
+#define   B_FE_AG_REG_AG_MODE_HIP_MODE_J__M                          0x8
+#define     B_FE_AG_REG_AG_MODE_HIP_MODE_J_STATIC                    0x0
+#define     B_FE_AG_REG_AG_MODE_HIP_MODE_J_DYNAMIC                   0x8
+#define B_FE_AG_REG_AG_PGA_MODE__A                                   0xC20012
+#define   B_FE_AG_REG_AG_PGA_MODE_PFY_PCY_AFY_REN                    0x0
+#define   B_FE_AG_REG_AG_PGA_MODE_PFN_PCN_AFY_REN                    0x1
+#define B_FE_AG_REG_AG_AGC_SIO__A                                    0xC20013
+#define   B_FE_AG_REG_AG_AGC_SIO_AGC_SIO_2__M                        0x2
+#define     B_FE_AG_REG_AG_AGC_SIO_AGC_SIO_2_OUTPUT                  0x0
+#define     B_FE_AG_REG_AG_AGC_SIO_AGC_SIO_2_INPUT                   0x2
+#define B_FE_AG_REG_AG_PWD__A                                        0xC20015
+#define   B_FE_AG_REG_AG_PWD_PWD_PD2__M                              0x2
+#define     B_FE_AG_REG_AG_PWD_PWD_PD2_DISABLE                       0x0
+#define     B_FE_AG_REG_AG_PWD_PWD_PD2_ENABLE                        0x2
+#define B_FE_AG_REG_DCE_AUR_CNT__A                                   0xC20016
+#define B_FE_AG_REG_DCE_RUR_CNT__A                                   0xC20017
+#define B_FE_AG_REG_ACE_AUR_CNT__A                                   0xC2001A
+#define B_FE_AG_REG_ACE_RUR_CNT__A                                   0xC2001B
+#define B_FE_AG_REG_CDR_RUR_CNT__A                                   0xC20020
+#define B_FE_AG_REG_EGC_RUR_CNT__A                                   0xC20024
+#define B_FE_AG_REG_EGC_SET_LVL__A                                   0xC20025
+#define B_FE_AG_REG_EGC_SET_LVL__M                                   0x1FF
+#define B_FE_AG_REG_EGC_FLA_RGN__A                                   0xC20026
+#define B_FE_AG_REG_EGC_SLO_RGN__A                                   0xC20027
+#define B_FE_AG_REG_EGC_JMP_PSN__A                                   0xC20028
+#define B_FE_AG_REG_EGC_FLA_INC__A                                   0xC20029
+#define B_FE_AG_REG_EGC_FLA_DEC__A                                   0xC2002A
+#define B_FE_AG_REG_EGC_SLO_INC__A                                   0xC2002B
+#define B_FE_AG_REG_EGC_SLO_DEC__A                                   0xC2002C
+#define B_FE_AG_REG_EGC_FAS_INC__A                                   0xC2002D
+#define B_FE_AG_REG_EGC_FAS_DEC__A                                   0xC2002E
+#define B_FE_AG_REG_PM1_AGC_WRI__A                                   0xC20030
+#define B_FE_AG_REG_PM1_AGC_WRI__M                                   0x7FF
+#define B_FE_AG_REG_GC1_AGC_RIC__A                                   0xC20031
+#define B_FE_AG_REG_GC1_AGC_OFF__A                                   0xC20032
+#define B_FE_AG_REG_GC1_AGC_MAX__A                                   0xC20033
+#define B_FE_AG_REG_GC1_AGC_MIN__A                                   0xC20034
+#define B_FE_AG_REG_GC1_AGC_DAT__A                                   0xC20035
+#define B_FE_AG_REG_GC1_AGC_DAT__M                                   0x3FF
+#define B_FE_AG_REG_PM2_AGC_WRI__A                                   0xC20036
+#define B_FE_AG_REG_IND_WIN__A                                       0xC2003C
+#define B_FE_AG_REG_IND_THD_LOL__A                                   0xC2003D
+#define B_FE_AG_REG_IND_THD_HIL__A                                   0xC2003E
+#define B_FE_AG_REG_IND_DEL__A                                       0xC2003F
+#define B_FE_AG_REG_IND_PD1_WRI__A                                   0xC20040
+#define B_FE_AG_REG_PDA_AUR_CNT__A                                   0xC20041
+#define B_FE_AG_REG_PDA_RUR_CNT__A                                   0xC20042
+#define B_FE_AG_REG_PDA_AVE_DAT__A                                   0xC20043
+#define B_FE_AG_REG_PDC_RUR_CNT__A                                   0xC20044
+#define B_FE_AG_REG_PDC_SET_LVL__A                                   0xC20045
+#define B_FE_AG_REG_PDC_FLA_RGN__A                                   0xC20046
+#define B_FE_AG_REG_PDC_JMP_PSN__A                                   0xC20047
+#define B_FE_AG_REG_PDC_FLA_STP__A                                   0xC20048
+#define B_FE_AG_REG_PDC_SLO_STP__A                                   0xC20049
+#define B_FE_AG_REG_PDC_PD2_WRI__A                                   0xC2004A
+#define B_FE_AG_REG_PDC_MAP_DAT__A                                   0xC2004B
+#define B_FE_AG_REG_PDC_MAX__A                                       0xC2004C
+#define B_FE_AG_REG_TGA_AUR_CNT__A                                   0xC2004D
+#define B_FE_AG_REG_TGA_RUR_CNT__A                                   0xC2004E
+#define B_FE_AG_REG_TGA_AVE_DAT__A                                   0xC2004F
+#define B_FE_AG_REG_TGC_RUR_CNT__A                                   0xC20050
+#define B_FE_AG_REG_TGC_SET_LVL__A                                   0xC20051
+#define B_FE_AG_REG_TGC_SET_LVL__M                                   0x3F
+#define B_FE_AG_REG_TGC_FLA_RGN__A                                   0xC20052
+#define B_FE_AG_REG_TGC_JMP_PSN__A                                   0xC20053
+#define B_FE_AG_REG_TGC_FLA_STP__A                                   0xC20054
+#define B_FE_AG_REG_TGC_SLO_STP__A                                   0xC20055
+#define B_FE_AG_REG_TGC_MAP_DAT__A                                   0xC20056
+#define B_FE_AG_REG_FGM_WRI__A                                       0xC20061
+#define B_FE_AG_REG_BGC_FGC_WRI__A                                   0xC20068
+#define B_FE_AG_REG_BGC_CGC_WRI__A                                   0xC20069
+#define B_FE_FS_REG_COMM_EXEC__A                                     0xC30000
+#define B_FE_FS_REG_ADD_INC_LOP__A                                   0xC30010
+#define B_FE_FD_REG_COMM_EXEC__A                                     0xC40000
+#define B_FE_FD_REG_SCL__A                                           0xC40010
+#define B_FE_FD_REG_MAX_LEV__A                                       0xC40011
+#define B_FE_FD_REG_NR__A                                            0xC40012
+#define B_FE_FD_REG_MEAS_VAL__A                                      0xC40014
+#define B_FE_IF_REG_COMM_EXEC__A                                     0xC50000
+#define B_FE_IF_REG_INCR0__A                                         0xC50010
+#define B_FE_IF_REG_INCR0__W                                         16
+#define B_FE_IF_REG_INCR0__M                                         0xFFFF
+#define B_FE_IF_REG_INCR1__A                                         0xC50011
+#define B_FE_IF_REG_INCR1__M                                         0xFF
+#define B_FE_CF_REG_COMM_EXEC__A                                     0xC60000
+#define B_FE_CF_REG_SCL__A                                           0xC60010
+#define B_FE_CF_REG_MAX_LEV__A                                       0xC60011
+#define B_FE_CF_REG_NR__A                                            0xC60012
+#define B_FE_CF_REG_IMP_VAL__A                                       0xC60013
+#define B_FE_CF_REG_MEAS_VAL__A                                      0xC60014
+#define B_FE_CU_REG_COMM_EXEC__A                                     0xC70000
+#define B_FE_CU_REG_FRM_CNT_RST__A                                   0xC70011
+#define B_FE_CU_REG_FRM_CNT_STR__A                                   0xC70012
+#define B_FE_CU_REG_CTR_NFC_ICR__A                                   0xC70020
+#define B_FE_CU_REG_CTR_NFC_OCR__A                                   0xC70021
+#define B_FE_CU_REG_DIV_NFC_CLP__A                                   0xC70027
+#define B_FT_COMM_EXEC__A                                            0x1000000
+#define B_FT_REG_COMM_EXEC__A                                        0x1010000
+#define B_CP_COMM_EXEC__A                                            0x1400000
+#define B_CP_REG_COMM_EXEC__A                                        0x1410000
+#define B_CP_REG_INTERVAL__A                                         0x1410011
+#define B_CP_REG_BR_SPL_OFFSET__A                                    0x1410023
+#define B_CP_REG_BR_STR_DEL__A                                       0x1410024
+#define B_CP_REG_RT_ANG_INC0__A                                      0x1410030
+#define B_CP_REG_RT_ANG_INC1__A                                      0x1410031
+#define B_CP_REG_RT_DETECT_TRH__A                                    0x1410033
+#define B_CP_REG_AC_NEXP_OFFS__A                                     0x1410040
+#define B_CP_REG_AC_AVER_POW__A                                      0x1410041
+#define B_CP_REG_AC_MAX_POW__A                                       0x1410042
+#define B_CP_REG_AC_WEIGHT_MAN__A                                    0x1410043
+#define B_CP_REG_AC_WEIGHT_EXP__A                                    0x1410044
+#define B_CP_REG_AC_AMP_MODE__A                                      0x1410047
+#define B_CP_REG_AC_AMP_FIX__A                                       0x1410048
+#define B_CP_REG_AC_ANG_MODE__A                                      0x141004A
+#define B_CE_COMM_EXEC__A                                            0x1800000
+#define B_CE_REG_COMM_EXEC__A                                        0x1810000
+#define B_CE_REG_TAPSET__A                                           0x1810011
+#define B_CE_REG_AVG_POW__A                                          0x1810012
+#define B_CE_REG_MAX_POW__A                                          0x1810013
+#define B_CE_REG_ATT__A                                              0x1810014
+#define B_CE_REG_NRED__A                                             0x1810015
+#define B_CE_REG_NE_ERR_SELECT__A                                    0x1810043
+#define B_CE_REG_NE_TD_CAL__A                                        0x1810044
+#define B_CE_REG_NE_MIXAVG__A                                        0x1810046
+#define B_CE_REG_NE_NUPD_OFS__A                                      0x1810047
+#define B_CE_REG_PE_NEXP_OFFS__A                                     0x1810050
+#define B_CE_REG_PE_TIMESHIFT__A                                     0x1810051
+#define B_CE_REG_TP_A0_TAP_NEW__A                                    0x1810064
+#define B_CE_REG_TP_A0_TAP_NEW_VALID__A                              0x1810065
+#define B_CE_REG_TP_A0_MU_LMS_STEP__A                                0x1810066
+#define B_CE_REG_TP_A1_TAP_NEW__A                                    0x1810068
+#define B_CE_REG_TP_A1_TAP_NEW_VALID__A                              0x1810069
+#define B_CE_REG_TP_A1_MU_LMS_STEP__A                                0x181006A
+#define B_CE_REG_TI_PHN_ENABLE__A                                    0x1810073
+#define B_CE_REG_FI_SHT_INCR__A                                      0x1810090
+#define B_CE_REG_FI_EXP_NORM__A                                      0x1810091
+#define B_CE_REG_IR_INPUTSEL__A                                      0x18100A0
+#define B_CE_REG_IR_STARTPOS__A                                      0x18100A1
+#define B_CE_REG_IR_NEXP_THRES__A                                    0x18100A2
+#define B_CE_REG_FR_TREAL00__A                                       0x1820010
+#define B_CE_REG_FR_TIMAG00__A                                       0x1820011
+#define B_CE_REG_FR_TREAL01__A                                       0x1820012
+#define B_CE_REG_FR_TIMAG01__A                                       0x1820013
+#define B_CE_REG_FR_TREAL02__A                                       0x1820014
+#define B_CE_REG_FR_TIMAG02__A                                       0x1820015
+#define B_CE_REG_FR_TREAL03__A                                       0x1820016
+#define B_CE_REG_FR_TIMAG03__A                                       0x1820017
+#define B_CE_REG_FR_TREAL04__A                                       0x1820018
+#define B_CE_REG_FR_TIMAG04__A                                       0x1820019
+#define B_CE_REG_FR_TREAL05__A                                       0x182001A
+#define B_CE_REG_FR_TIMAG05__A                                       0x182001B
+#define B_CE_REG_FR_TREAL06__A                                       0x182001C
+#define B_CE_REG_FR_TIMAG06__A                                       0x182001D
+#define B_CE_REG_FR_TREAL07__A                                       0x182001E
+#define B_CE_REG_FR_TIMAG07__A                                       0x182001F
+#define B_CE_REG_FR_TREAL08__A                                       0x1820020
+#define B_CE_REG_FR_TIMAG08__A                                       0x1820021
+#define B_CE_REG_FR_TREAL09__A                                       0x1820022
+#define B_CE_REG_FR_TIMAG09__A                                       0x1820023
+#define B_CE_REG_FR_TREAL10__A                                       0x1820024
+#define B_CE_REG_FR_TIMAG10__A                                       0x1820025
+#define B_CE_REG_FR_TREAL11__A                                       0x1820026
+#define B_CE_REG_FR_TIMAG11__A                                       0x1820027
+#define B_CE_REG_FR_MID_TAP__A                                       0x1820028
+#define B_CE_REG_FR_SQS_G00__A                                       0x1820029
+#define B_CE_REG_FR_SQS_G01__A                                       0x182002A
+#define B_CE_REG_FR_SQS_G02__A                                       0x182002B
+#define B_CE_REG_FR_SQS_G03__A                                       0x182002C
+#define B_CE_REG_FR_SQS_G04__A                                       0x182002D
+#define B_CE_REG_FR_SQS_G05__A                                       0x182002E
+#define B_CE_REG_FR_SQS_G06__A                                       0x182002F
+#define B_CE_REG_FR_SQS_G07__A                                       0x1820030
+#define B_CE_REG_FR_SQS_G08__A                                       0x1820031
+#define B_CE_REG_FR_SQS_G09__A                                       0x1820032
+#define B_CE_REG_FR_SQS_G10__A                                       0x1820033
+#define B_CE_REG_FR_SQS_G11__A                                       0x1820034
+#define B_CE_REG_FR_SQS_G12__A                                       0x1820035
+#define B_CE_REG_FR_RIO_G00__A                                       0x1820036
+#define B_CE_REG_FR_RIO_G01__A                                       0x1820037
+#define B_CE_REG_FR_RIO_G02__A                                       0x1820038
+#define B_CE_REG_FR_RIO_G03__A                                       0x1820039
+#define B_CE_REG_FR_RIO_G04__A                                       0x182003A
+#define B_CE_REG_FR_RIO_G05__A                                       0x182003B
+#define B_CE_REG_FR_RIO_G06__A                                       0x182003C
+#define B_CE_REG_FR_RIO_G07__A                                       0x182003D
+#define B_CE_REG_FR_RIO_G08__A                                       0x182003E
+#define B_CE_REG_FR_RIO_G09__A                                       0x182003F
+#define B_CE_REG_FR_RIO_G10__A                                       0x1820040
+#define B_CE_REG_FR_MODE__A                                          0x1820041
+#define B_CE_REG_FR_SQS_TRH__A                                       0x1820042
+#define B_CE_REG_FR_RIO_GAIN__A                                      0x1820043
+#define B_CE_REG_FR_BYPASS__A                                        0x1820044
+#define B_CE_REG_FR_PM_SET__A                                        0x1820045
+#define B_CE_REG_FR_ERR_SH__A                                        0x1820046
+#define B_CE_REG_FR_MAN_SH__A                                        0x1820047
+#define B_CE_REG_FR_TAP_SH__A                                        0x1820048
+#define B_EQ_COMM_EXEC__A                                            0x1C00000
+#define B_EQ_REG_COMM_EXEC__A                                        0x1C10000
+#define B_EQ_REG_COMM_MB__A                                          0x1C10002
+#define B_EQ_REG_IS_GAIN_MAN__A                                      0x1C10015
+#define B_EQ_REG_IS_GAIN_EXP__A                                      0x1C10016
+#define B_EQ_REG_IS_CLIP_EXP__A                                      0x1C10017
+#define B_EQ_REG_SN_CEGAIN__A                                        0x1C1002A
+#define B_EQ_REG_SN_OFFSET__A                                        0x1C1002B
+#define B_EQ_REG_RC_SEL_CAR__A                                       0x1C10032
+#define   B_EQ_REG_RC_SEL_CAR_INIT                                   0x2
+#define     B_EQ_REG_RC_SEL_CAR_DIV_ON                               0x1
+#define     B_EQ_REG_RC_SEL_CAR_PASS_A_CC                            0x0
+#define     B_EQ_REG_RC_SEL_CAR_PASS_B_CE                            0x2
+#define     B_EQ_REG_RC_SEL_CAR_LOCAL_A_CC                           0x0
+#define     B_EQ_REG_RC_SEL_CAR_LOCAL_B_CE                           0x8
+#define     B_EQ_REG_RC_SEL_CAR_MEAS_A_CC                            0x0
+#define     B_EQ_REG_RC_SEL_CAR_MEAS_B_CE                            0x20
+#define   B_EQ_REG_RC_SEL_CAR_FFTMODE__M                             0x80
+#define B_EQ_REG_OT_CONST__A                                         0x1C10046
+#define B_EQ_REG_OT_ALPHA__A                                         0x1C10047
+#define B_EQ_REG_OT_QNT_THRES0__A                                    0x1C10048
+#define B_EQ_REG_OT_QNT_THRES1__A                                    0x1C10049
+#define B_EQ_REG_OT_CSI_STEP__A                                      0x1C1004A
+#define B_EQ_REG_OT_CSI_OFFSET__A                                    0x1C1004B
+#define B_EQ_REG_TD_REQ_SMB_CNT__A                                   0x1C10061
+#define B_EQ_REG_TD_TPS_PWR_OFS__A                                   0x1C10062
+#define B_EC_SB_REG_COMM_EXEC__A                                     0x2010000
+#define B_EC_SB_REG_TR_MODE__A                                       0x2010010
+#define   B_EC_SB_REG_TR_MODE_8K                                     0x0
+#define   B_EC_SB_REG_TR_MODE_2K                                     0x1
+#define B_EC_SB_REG_CONST__A                                         0x2010011
+#define   B_EC_SB_REG_CONST_QPSK                                     0x0
+#define   B_EC_SB_REG_CONST_16QAM                                    0x1
+#define   B_EC_SB_REG_CONST_64QAM                                    0x2
+#define B_EC_SB_REG_ALPHA__A                                         0x2010012
+#define B_EC_SB_REG_PRIOR__A                                         0x2010013
+#define   B_EC_SB_REG_PRIOR_HI                                       0x0
+#define   B_EC_SB_REG_PRIOR_LO                                       0x1
+#define B_EC_SB_REG_CSI_HI__A                                        0x2010014
+#define B_EC_SB_REG_CSI_LO__A                                        0x2010015
+#define B_EC_SB_REG_SMB_TGL__A                                       0x2010016
+#define B_EC_SB_REG_SNR_HI__A                                        0x2010017
+#define B_EC_SB_REG_SNR_MID__A                                       0x2010018
+#define B_EC_SB_REG_SNR_LO__A                                        0x2010019
+#define B_EC_SB_REG_SCALE_MSB__A                                     0x201001A
+#define B_EC_SB_REG_SCALE_BIT2__A                                    0x201001B
+#define B_EC_SB_REG_SCALE_LSB__A                                     0x201001C
+#define B_EC_SB_REG_CSI_OFS0__A                                      0x201001D
+#define B_EC_SB_REG_CSI_OFS1__A                                      0x201001E
+#define B_EC_SB_REG_CSI_OFS2__A                                      0x201001F
+#define B_EC_VD_REG_COMM_EXEC__A                                     0x2090000
+#define B_EC_VD_REG_FORCE__A                                         0x2090010
+#define B_EC_VD_REG_SET_CODERATE__A                                  0x2090011
+#define   B_EC_VD_REG_SET_CODERATE_C1_2                              0x0
+#define   B_EC_VD_REG_SET_CODERATE_C2_3                              0x1
+#define   B_EC_VD_REG_SET_CODERATE_C3_4                              0x2
+#define   B_EC_VD_REG_SET_CODERATE_C5_6                              0x3
+#define   B_EC_VD_REG_SET_CODERATE_C7_8                              0x4
+#define B_EC_VD_REG_REQ_SMB_CNT__A                                   0x2090012
+#define B_EC_VD_REG_RLK_ENA__A                                       0x2090014
+#define B_EC_OD_REG_COMM_EXEC__A                                     0x2110000
+#define B_EC_OD_REG_SYNC__A                                          0x2110664
+#define B_EC_OD_DEINT_RAM__A                                         0x2120000
+#define B_EC_RS_REG_COMM_EXEC__A                                     0x2130000
+#define B_EC_RS_REG_REQ_PCK_CNT__A                                   0x2130010
+#define B_EC_RS_REG_VAL__A                                           0x2130011
+#define   B_EC_RS_REG_VAL_PCK                                        0x1
+#define B_EC_RS_EC_RAM__A                                            0x2140000
+#define B_EC_OC_REG_COMM_EXEC__A                                     0x2150000
+#define     B_EC_OC_REG_COMM_EXEC_CTL_ACTIVE                         0x1
+#define     B_EC_OC_REG_COMM_EXEC_CTL_HOLD                           0x2
+#define B_EC_OC_REG_COMM_INT_STA__A                                  0x2150007
+#define B_EC_OC_REG_OC_MODE_LOP__A                                   0x2150010
+#define   B_EC_OC_REG_OC_MODE_LOP_PAR_ENA__M                         0x1
+#define     B_EC_OC_REG_OC_MODE_LOP_PAR_ENA_ENABLE                   0x0
+#define     B_EC_OC_REG_OC_MODE_LOP_PAR_ENA_DISABLE                  0x1
+#define   B_EC_OC_REG_OC_MODE_LOP_DTO_CTR_SRC__M                     0x4
+#define     B_EC_OC_REG_OC_MODE_LOP_DTO_CTR_SRC_STATIC               0x0
+#define   B_EC_OC_REG_OC_MODE_LOP_MPG_TRM_MDE__M                     0x80
+#define     B_EC_OC_REG_OC_MODE_LOP_MPG_TRM_MDE_SERIAL               0x80
+#define B_EC_OC_REG_OC_MODE_HIP__A                                   0x2150011
+#define     B_EC_OC_REG_OC_MODE_HIP_MPG_BUS_SRC_MONITOR              0x10
+#define   B_EC_OC_REG_OC_MODE_HIP_MPG_PAR_VAL__M                     0x200
+#define     B_EC_OC_REG_OC_MODE_HIP_MPG_PAR_VAL_DISABLE              0x0
+#define     B_EC_OC_REG_OC_MODE_HIP_MPG_PAR_VAL_ENABLE               0x200
+#define B_EC_OC_REG_OC_MPG_SIO__A                                    0x2150012
+#define B_EC_OC_REG_OC_MPG_SIO__M                                    0xFFF
+#define B_EC_OC_REG_DTO_INC_LOP__A                                   0x2150014
+#define B_EC_OC_REG_DTO_INC_HIP__A                                   0x2150015
+#define B_EC_OC_REG_SNC_ISC_LVL__A                                   0x2150016
+#define   B_EC_OC_REG_SNC_ISC_LVL_OSC__M                             0xF0
+#define B_EC_OC_REG_TMD_TOP_MODE__A                                  0x215001D
+#define B_EC_OC_REG_TMD_TOP_CNT__A                                   0x215001E
+#define B_EC_OC_REG_TMD_HIL_MAR__A                                   0x215001F
+#define B_EC_OC_REG_TMD_LOL_MAR__A                                   0x2150020
+#define B_EC_OC_REG_TMD_CUR_CNT__A                                   0x2150021
+#define B_EC_OC_REG_AVR_ASH_CNT__A                                   0x2150023
+#define B_EC_OC_REG_AVR_BSH_CNT__A                                   0x2150024
+#define B_EC_OC_REG_RCN_MODE__A                                      0x2150027
+#define B_EC_OC_REG_RCN_CRA_LOP__A                                   0x2150028
+#define B_EC_OC_REG_RCN_CRA_HIP__A                                   0x2150029
+#define B_EC_OC_REG_RCN_CST_LOP__A                                   0x215002A
+#define B_EC_OC_REG_RCN_CST_HIP__A                                   0x215002B
+#define B_EC_OC_REG_RCN_SET_LVL__A                                   0x215002C
+#define B_EC_OC_REG_RCN_GAI_LVL__A                                   0x215002D
+#define B_EC_OC_REG_RCN_CLP_LOP__A                                   0x2150032
+#define B_EC_OC_REG_RCN_CLP_HIP__A                                   0x2150033
+#define B_EC_OC_REG_RCN_MAP_LOP__A                                   0x2150034
+#define B_EC_OC_REG_RCN_MAP_HIP__A                                   0x2150035
+#define B_EC_OC_REG_OCR_MPG_UOS__A                                   0x2150036
+#define B_EC_OC_REG_OCR_MPG_UOS__M                                   0xFFF
+#define   B_EC_OC_REG_OCR_MPG_UOS_INIT                               0x0
+#define B_EC_OC_REG_OCR_MPG_USR_DAT__A                               0x2150038
+#define B_EC_OC_REG_IPR_INV_MPG__A                                   0x2150045
+#define B_EC_OC_REG_DTO_CLKMODE__A                                   0x2150047
+#define B_EC_OC_REG_DTO_PER__A                                       0x2150048
+#define B_EC_OC_REG_DTO_BUR__A                                       0x2150049
+#define B_EC_OC_REG_RCR_CLKMODE__A                                   0x215004A
+#define B_CC_REG_OSC_MODE__A                                         0x2410010
+#define   B_CC_REG_OSC_MODE_M20                                      0x1
+#define B_CC_REG_PLL_MODE__A                                         0x2410011
+#define     B_CC_REG_PLL_MODE_BYPASS_PLL                             0x1
+#define     B_CC_REG_PLL_MODE_PUMP_CUR_12                            0x14
+#define B_CC_REG_REF_DIVIDE__A                                       0x2410012
+#define B_CC_REG_PWD_MODE__A                                         0x2410015
+#define   B_CC_REG_PWD_MODE_DOWN_PLL                                 0x2
+#define B_CC_REG_UPDATE__A                                           0x2410017
+#define   B_CC_REG_UPDATE_KEY                                        0x3973
+#define B_CC_REG_JTAGID_L__A                                         0x2410019
+#define B_CC_REG_DIVERSITY__A                                        0x241001B
+#define B_LC_COMM_EXEC__A                                            0x2800000
+#define B_LC_RA_RAM_IFINCR_NOM_L__A                                  0x282000C
+#define B_LC_RA_RAM_FILTER_SYM_SET__A                                0x282001A
+#define B_LC_RA_RAM_FILTER_SYM_SET__PRE                              0x3E8
+#define B_LC_RA_RAM_FILTER_CRMM_A__A                                 0x2820060
+#define B_LC_RA_RAM_FILTER_CRMM_A__PRE                               0x4
+#define B_LC_RA_RAM_FILTER_CRMM_B__A                                 0x2820061
+#define B_LC_RA_RAM_FILTER_CRMM_B__PRE                               0x1
+#define B_LC_RA_RAM_FILTER_SRMM_A__A                                 0x2820068
+#define B_LC_RA_RAM_FILTER_SRMM_A__PRE                               0x4
+#define B_LC_RA_RAM_FILTER_SRMM_B__A                                 0x2820069
+#define B_LC_RA_RAM_FILTER_SRMM_B__PRE                               0x1
+
+#endif
diff --git a/drivers/media/dvb/frontends/ds3000.c b/drivers/media/dvb/frontends/ds3000.c
index fc61d9230db8..90bf573308b0 100644
--- a/drivers/media/dvb/frontends/ds3000.c
+++ b/drivers/media/dvb/frontends/ds3000.c
@@ -229,31 +229,11 @@ static u8 ds3000_dvbs2_init_tab[] = {
         0xb8, 0x00,
 };
 
-/* DS3000 doesn't need some parameters as input and auto-detects them */
-/* save input from the application of those parameters */
-struct ds3000_tuning {
-        u32 frequency;
-        u32 symbol_rate;
-        fe_spectral_inversion_t inversion;
-        enum fe_code_rate fec;
-
-        /* input values */
-        u8 inversion_val;
-        fe_modulation_t delivery;
-        u8 rolloff;
-};
-
 struct ds3000_state {
         struct i2c_adapter *i2c;
         const struct ds3000_config *config;
-
         struct dvb_frontend frontend;
-
-        struct ds3000_tuning dcur;
-        struct ds3000_tuning dnxt;
-
         u8 skip_fw_load;
-
         /* previous uncorrected block counter for DVB-S2 */
         u16 prevUCBS2;
 };
@@ -305,7 +285,7 @@ static int ds3000_writeFW(struct ds3000_state *state, int reg,
         struct i2c_msg msg;
         u8 *buf;
 
-        buf = kmalloc(3, GFP_KERNEL);
+        buf = kmalloc(33, GFP_KERNEL);
         if (buf == NULL) {
                 printk(KERN_ERR "Unable to kmalloc\n");
                 ret = -ENOMEM;
@@ -317,10 +297,10 @@ static int ds3000_writeFW(struct ds3000_state *state, int reg,
         msg.addr = state->config->demod_address;
         msg.flags = 0;
         msg.buf = buf;
-        msg.len = 3;
+        msg.len = 33;
 
-        for (i = 0; i < len; i += 2) {
-                memcpy(buf + 1, data + i, 2);
+        for (i = 0; i < len; i += 32) {
+                memcpy(buf + 1, data + i, 32);
 
                 dprintk("%s: write reg 0x%02x, len = %d\n", __func__, reg, len);
 
@@ -401,45 +381,6 @@ static int ds3000_tuner_readreg(struct ds3000_state *state, u8 reg)
         return b1[0];
 }
 
-static int ds3000_set_inversion(struct ds3000_state *state,
-                                        fe_spectral_inversion_t inversion)
-{
-        dprintk("%s(%d)\n", __func__, inversion);
-
-        switch (inversion) {
-        case INVERSION_OFF:
-        case INVERSION_ON:
-        case INVERSION_AUTO:
-                break;
-        default:
-                return -EINVAL;
-        }
-
-        state->dnxt.inversion = inversion;
-
-        return 0;
-}
-
-static int ds3000_set_symbolrate(struct ds3000_state *state, u32 rate)
-{
-        int ret = 0;
-
-        dprintk("%s()\n", __func__);
-
-        dprintk("%s() symbol_rate = %d\n", __func__, state->dnxt.symbol_rate);
-
-        /*  check if symbol rate is within limits */
-        if ((state->dnxt.symbol_rate >
-                                state->frontend.ops.info.symbol_rate_max) ||
-            (state->dnxt.symbol_rate <
-                                state->frontend.ops.info.symbol_rate_min))
-                ret = -EOPNOTSUPP;
-
-        state->dnxt.symbol_rate = rate;
-
-        return ret;
-}
-
 static int ds3000_load_firmware(struct dvb_frontend *fe,
                                         const struct firmware *fw);
 
@@ -509,23 +450,31 @@ static int ds3000_load_firmware(struct dvb_frontend *fe,
         return 0;
 }
 
-static void ds3000_dump_registers(struct dvb_frontend *fe)
+static int ds3000_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
 {
         struct ds3000_state *state = fe->demodulator_priv;
-        int x, y, reg = 0, val;
-
-        for (y = 0; y < 16; y++) {
-                dprintk("%s: %02x: ", __func__, y);
-                for (x = 0; x < 16; x++) {
-                        reg = (y << 4) + x;
-                        val = ds3000_readreg(state, reg);
-                        if (x != 15)
-                                dprintk("%02x ",  val);
-                        else
-                                dprintk("%02x\n", val);
-                }
+        u8 data;
+
+        dprintk("%s(%d)\n", __func__, voltage);
+
+        data = ds3000_readreg(state, 0xa2);
+        data |= 0x03; /* bit0 V/H, bit1 off/on */
+
+        switch (voltage) {
+        case SEC_VOLTAGE_18:
+                data &= ~0x03;
+                break;
+        case SEC_VOLTAGE_13:
+                data &= ~0x03;
+                data |= 0x01;
+                break;
+        case SEC_VOLTAGE_OFF:
+                break;
         }
-        dprintk("%s: -- DS3000 DUMP DONE --\n", __func__);
+
+        ds3000_writereg(state, 0xa2, data);
+
+        return 0;
 }
 
 static int ds3000_read_status(struct dvb_frontend *fe, fe_status_t* status)
@@ -562,16 +511,6 @@ static int ds3000_read_status(struct dvb_frontend *fe, fe_status_t* status)
         return 0;
 }
 
-#define FE_IS_TUNED (FE_HAS_SIGNAL + FE_HAS_LOCK)
-static int ds3000_is_tuned(struct dvb_frontend *fe)
-{
-        fe_status_t tunerstat;
-
-        ds3000_read_status(fe, &tunerstat);
-
-        return ((tunerstat & FE_IS_TUNED) == FE_IS_TUNED);
-}
-
 /* read DS3000 BER value */
 static int ds3000_read_ber(struct dvb_frontend *fe, u32* ber)
 {
@@ -792,13 +731,6 @@ static int ds3000_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
         return 0;
 }
 
-/* Overwrite the current tuning params, we are about to tune */
-static void ds3000_clone_params(struct dvb_frontend *fe)
-{
-        struct ds3000_state *state = fe->demodulator_priv;
-        memcpy(&state->dcur, &state->dnxt, sizeof(state->dcur));
-}
-
 static int ds3000_set_tone(struct dvb_frontend *fe, fe_sec_tone_mode_t tone)
 {
         struct ds3000_state *state = fe->demodulator_priv;
@@ -1016,287 +948,298 @@ static int ds3000_get_property(struct dvb_frontend *fe,
         return 0;
 }
 
-static int ds3000_tune(struct dvb_frontend *fe,
+static int ds3000_set_carrier_offset(struct dvb_frontend *fe,
+                                        s32 carrier_offset_khz)
+{
+        struct ds3000_state *state = fe->demodulator_priv;
+        s32 tmp;
+
+        tmp = carrier_offset_khz;
+        tmp *= 65536;
+        tmp = (2 * tmp + DS3000_SAMPLE_RATE) / (2 * DS3000_SAMPLE_RATE);
+
+        if (tmp < 0)
+                tmp += 65536;
+
+        ds3000_writereg(state, 0x5f, tmp >> 8);
+        ds3000_writereg(state, 0x5e, tmp & 0xff);
+
+        return 0;
+}
+
+static int ds3000_set_frontend(struct dvb_frontend *fe,
                                 struct dvb_frontend_parameters *p)
 {
         struct ds3000_state *state = fe->demodulator_priv;
         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 
-        int ret = 0, retune, i;
-        u8 status, mlpf, mlpf_new, mlpf_max, mlpf_min, nlpf;
+        int i;
+        fe_status_t status;
+        u8 mlpf, mlpf_new, mlpf_max, mlpf_min, nlpf, div4;
+        s32 offset_khz;
         u16 value, ndiv;
         u32 f3db;
 
         dprintk("%s() ", __func__);
 
-        /* Load the firmware if required */
-        ret = ds3000_firmware_ondemand(fe);
-        if (ret != 0) {
-                printk(KERN_ERR "%s: Unable initialise the firmware\n",
-                                                                __func__);
-                return ret;
+        if (state->config->set_ts_params)
+                state->config->set_ts_params(fe, 0);
+        /* Tune */
+        /* unknown */
+        ds3000_tuner_writereg(state, 0x07, 0x02);
+        ds3000_tuner_writereg(state, 0x10, 0x00);
+        ds3000_tuner_writereg(state, 0x60, 0x79);
+        ds3000_tuner_writereg(state, 0x08, 0x01);
+        ds3000_tuner_writereg(state, 0x00, 0x01);
+        div4 = 0;
+
+        /* calculate and set freq divider */
+        if (p->frequency < 1146000) {
+                ds3000_tuner_writereg(state, 0x10, 0x11);
+                div4 = 1;
+                ndiv = ((p->frequency * (6 + 8) * 4) +
+                                (DS3000_XTAL_FREQ / 2)) /
+                                DS3000_XTAL_FREQ - 1024;
+        } else {
+                ds3000_tuner_writereg(state, 0x10, 0x01);
+                ndiv = ((p->frequency * (6 + 8) * 2) +
+                                (DS3000_XTAL_FREQ / 2)) /
+                                DS3000_XTAL_FREQ - 1024;
         }
 
-        state->dnxt.delivery = c->modulation;
-        state->dnxt.frequency = c->frequency;
-        state->dnxt.rolloff = 2; /* fixme */
-        state->dnxt.fec = c->fec_inner;
+        ds3000_tuner_writereg(state, 0x01, (ndiv & 0x0f00) >> 8);
+        ds3000_tuner_writereg(state, 0x02, ndiv & 0x00ff);
+
+        /* set pll */
+        ds3000_tuner_writereg(state, 0x03, 0x06);
+        ds3000_tuner_writereg(state, 0x51, 0x0f);
+        ds3000_tuner_writereg(state, 0x51, 0x1f);
+        ds3000_tuner_writereg(state, 0x50, 0x10);
+        ds3000_tuner_writereg(state, 0x50, 0x00);
+        msleep(5);
+
+        /* unknown */
+        ds3000_tuner_writereg(state, 0x51, 0x17);
+        ds3000_tuner_writereg(state, 0x51, 0x1f);
+        ds3000_tuner_writereg(state, 0x50, 0x08);
+        ds3000_tuner_writereg(state, 0x50, 0x00);
+        msleep(5);
+
+        value = ds3000_tuner_readreg(state, 0x3d);
+        value &= 0x0f;
+        if ((value > 4) && (value < 15)) {
+                value -= 3;
+                if (value < 4)
+                        value = 4;
+                value = ((value << 3) | 0x01) & 0x79;
+        }
 
-        ret = ds3000_set_inversion(state, p->inversion);
-        if (ret !=  0)
-                return ret;
+        ds3000_tuner_writereg(state, 0x60, value);
+        ds3000_tuner_writereg(state, 0x51, 0x17);
+        ds3000_tuner_writereg(state, 0x51, 0x1f);
+        ds3000_tuner_writereg(state, 0x50, 0x08);
+        ds3000_tuner_writereg(state, 0x50, 0x00);
+
+        /* set low-pass filter period */
+        ds3000_tuner_writereg(state, 0x04, 0x2e);
+        ds3000_tuner_writereg(state, 0x51, 0x1b);
+        ds3000_tuner_writereg(state, 0x51, 0x1f);
+        ds3000_tuner_writereg(state, 0x50, 0x04);
+        ds3000_tuner_writereg(state, 0x50, 0x00);
+        msleep(5);
+
+        f3db = ((c->symbol_rate / 1000) << 2) / 5 + 2000;
+        if ((c->symbol_rate / 1000) < 5000)
+                f3db += 3000;
+        if (f3db < 7000)
+                f3db = 7000;
+        if (f3db > 40000)
+                f3db = 40000;
+
+        /* set low-pass filter baseband */
+        value = ds3000_tuner_readreg(state, 0x26);
+        mlpf = 0x2e * 207 / ((value << 1) + 151);
+        mlpf_max = mlpf * 135 / 100;
+        mlpf_min = mlpf * 78 / 100;
+        if (mlpf_max > 63)
+                mlpf_max = 63;
+
+        /* rounded to the closest integer */
+        nlpf = ((mlpf * f3db * 1000) + (2766 * DS3000_XTAL_FREQ / 2))
+                        / (2766 * DS3000_XTAL_FREQ);
+        if (nlpf > 23)
+                nlpf = 23;
+        if (nlpf < 1)
+                nlpf = 1;
+
+        /* rounded to the closest integer */
+        mlpf_new = ((DS3000_XTAL_FREQ * nlpf * 2766) +
+                        (1000 * f3db / 2)) / (1000 * f3db);
+
+        if (mlpf_new < mlpf_min) {
+                nlpf++;
+                mlpf_new = ((DS3000_XTAL_FREQ * nlpf * 2766) +
+                                (1000 * f3db / 2)) / (1000 * f3db);
+        }
 
-        ret = ds3000_set_symbolrate(state, c->symbol_rate);
-        if (ret !=  0)
-                return ret;
+        if (mlpf_new > mlpf_max)
+                mlpf_new = mlpf_max;
+
+        ds3000_tuner_writereg(state, 0x04, mlpf_new);
+        ds3000_tuner_writereg(state, 0x06, nlpf);
+        ds3000_tuner_writereg(state, 0x51, 0x1b);
+        ds3000_tuner_writereg(state, 0x51, 0x1f);
+        ds3000_tuner_writereg(state, 0x50, 0x04);
+        ds3000_tuner_writereg(state, 0x50, 0x00);
+        msleep(5);
+
+        /* unknown */
+        ds3000_tuner_writereg(state, 0x51, 0x1e);
+        ds3000_tuner_writereg(state, 0x51, 0x1f);
+        ds3000_tuner_writereg(state, 0x50, 0x01);
+        ds3000_tuner_writereg(state, 0x50, 0x00);
+        msleep(60);
+
+        offset_khz = (ndiv - ndiv % 2 + 1024) * DS3000_XTAL_FREQ
+                / (6 + 8) / (div4 + 1) / 2 - p->frequency;
+
+        /* ds3000 global reset */
+        ds3000_writereg(state, 0x07, 0x80);
+        ds3000_writereg(state, 0x07, 0x00);
+        /* ds3000 build-in uC reset */
+        ds3000_writereg(state, 0xb2, 0x01);
+        /* ds3000 software reset */
+        ds3000_writereg(state, 0x00, 0x01);
 
-        /* discard the 'current' tuning parameters and prepare to tune */
-        ds3000_clone_params(fe);
-
-        retune = 1;     /* try 1 times */
-        dprintk("%s:   retune = %d\n", __func__, retune);
-        dprintk("%s:   frequency   = %d\n", __func__, state->dcur.frequency);
-        dprintk("%s:   symbol_rate = %d\n", __func__, state->dcur.symbol_rate);
-        dprintk("%s:   FEC       = %d \n", __func__,
-                state->dcur.fec);
-        dprintk("%s:   Inversion   = %d\n", __func__, state->dcur.inversion);
-
-        do {
-                /* Reset status register */
-                status = 0;
-                /* Tune */
-                /* TS2020 init */
-                ds3000_tuner_writereg(state, 0x42, 0x73);
-                ds3000_tuner_writereg(state, 0x05, 0x01);
-                ds3000_tuner_writereg(state, 0x62, 0xf5);
-                /* unknown */
-                ds3000_tuner_writereg(state, 0x07, 0x02);
-                ds3000_tuner_writereg(state, 0x10, 0x00);
-                ds3000_tuner_writereg(state, 0x60, 0x79);
-                ds3000_tuner_writereg(state, 0x08, 0x01);
-                ds3000_tuner_writereg(state, 0x00, 0x01);
-                /* calculate and set freq divider */
-                if (state->dcur.frequency < 1146000) {
-                        ds3000_tuner_writereg(state, 0x10, 0x11);
-                        ndiv = ((state->dcur.frequency * (6 + 8) * 4) +
-                                        (DS3000_XTAL_FREQ / 2)) /
-                                        DS3000_XTAL_FREQ - 1024;
-                } else {
-                        ds3000_tuner_writereg(state, 0x10, 0x01);
-                        ndiv = ((state->dcur.frequency * (6 + 8) * 2) +
-                                        (DS3000_XTAL_FREQ / 2)) /
-                                        DS3000_XTAL_FREQ - 1024;
-                }
+        switch (c->delivery_system) {
+        case SYS_DVBS:
+                /* initialise the demod in DVB-S mode */
+                for (i = 0; i < sizeof(ds3000_dvbs_init_tab); i += 2)
+                        ds3000_writereg(state,
+                                ds3000_dvbs_init_tab[i],
+                                ds3000_dvbs_init_tab[i + 1]);
+                value = ds3000_readreg(state, 0xfe);
+                value &= 0xc0;
+                value |= 0x1b;
+                ds3000_writereg(state, 0xfe, value);
+                break;
+        case SYS_DVBS2:
+                /* initialise the demod in DVB-S2 mode */
+                for (i = 0; i < sizeof(ds3000_dvbs2_init_tab); i += 2)
+                        ds3000_writereg(state,
+                                ds3000_dvbs2_init_tab[i],
+                                ds3000_dvbs2_init_tab[i + 1]);
+                ds3000_writereg(state, 0xfe, 0x98);
+                break;
+        default:
+                return 1;
+        }
 
-                ds3000_tuner_writereg(state, 0x01, (ndiv & 0x0f00) >> 8);
-                ds3000_tuner_writereg(state, 0x02, ndiv & 0x00ff);
-
-                /* set pll */
-                ds3000_tuner_writereg(state, 0x03, 0x06);
-                ds3000_tuner_writereg(state, 0x51, 0x0f);
-                ds3000_tuner_writereg(state, 0x51, 0x1f);
-                ds3000_tuner_writereg(state, 0x50, 0x10);
-                ds3000_tuner_writereg(state, 0x50, 0x00);
-                msleep(5);
-
-                /* unknown */
-                ds3000_tuner_writereg(state, 0x51, 0x17);
-                ds3000_tuner_writereg(state, 0x51, 0x1f);
-                ds3000_tuner_writereg(state, 0x50, 0x08);
-                ds3000_tuner_writereg(state, 0x50, 0x00);
-                msleep(5);
-
-                value = ds3000_tuner_readreg(state, 0x3d);
-                value &= 0x0f;
-                if ((value > 4) && (value < 15)) {
-                        value -= 3;
-                        if (value < 4)
-                                value = 4;
-                        value = ((value << 3) | 0x01) & 0x79;
-                }
+        /* enable 27MHz clock output */
+        ds3000_writereg(state, 0x29, 0x80);
+        /* enable ac coupling */
+        ds3000_writereg(state, 0x25, 0x8a);
+
+        /* enhance symbol rate performance */
+        if ((c->symbol_rate / 1000) <= 5000) {
+                value = 29777 / (c->symbol_rate / 1000) + 1;
+                if (value % 2 != 0)
+                        value++;
+                ds3000_writereg(state, 0xc3, 0x0d);
+                ds3000_writereg(state, 0xc8, value);
+                ds3000_writereg(state, 0xc4, 0x10);
+                ds3000_writereg(state, 0xc7, 0x0e);
+        } else if ((c->symbol_rate / 1000) <= 10000) {
+                value = 92166 / (c->symbol_rate / 1000) + 1;
+                if (value % 2 != 0)
+                        value++;
+                ds3000_writereg(state, 0xc3, 0x07);
+                ds3000_writereg(state, 0xc8, value);
+                ds3000_writereg(state, 0xc4, 0x09);
+                ds3000_writereg(state, 0xc7, 0x12);
+        } else if ((c->symbol_rate / 1000) <= 20000) {
+                value = 64516 / (c->symbol_rate / 1000) + 1;
+                ds3000_writereg(state, 0xc3, value);
+                ds3000_writereg(state, 0xc8, 0x0e);
+                ds3000_writereg(state, 0xc4, 0x07);
+                ds3000_writereg(state, 0xc7, 0x18);
+        } else {
+                value = 129032 / (c->symbol_rate / 1000) + 1;
+                ds3000_writereg(state, 0xc3, value);
+                ds3000_writereg(state, 0xc8, 0x0a);
+                ds3000_writereg(state, 0xc4, 0x05);
+                ds3000_writereg(state, 0xc7, 0x24);
+        }
 
-                ds3000_tuner_writereg(state, 0x60, value);
-                ds3000_tuner_writereg(state, 0x51, 0x17);
-                ds3000_tuner_writereg(state, 0x51, 0x1f);
-                ds3000_tuner_writereg(state, 0x50, 0x08);
-                ds3000_tuner_writereg(state, 0x50, 0x00);
-
-                /* set low-pass filter period */
-                ds3000_tuner_writereg(state, 0x04, 0x2e);
-                ds3000_tuner_writereg(state, 0x51, 0x1b);
-                ds3000_tuner_writereg(state, 0x51, 0x1f);
-                ds3000_tuner_writereg(state, 0x50, 0x04);
-                ds3000_tuner_writereg(state, 0x50, 0x00);
-                msleep(5);
-
-                f3db = ((state->dcur.symbol_rate / 1000) << 2) / 5 + 2000;
-                if ((state->dcur.symbol_rate / 1000) < 5000)
-                        f3db += 3000;
-                if (f3db < 7000)
-                        f3db = 7000;
-                if (f3db > 40000)
-                        f3db = 40000;
-
-                /* set low-pass filter baseband */
-                value = ds3000_tuner_readreg(state, 0x26);
-                mlpf = 0x2e * 207 / ((value << 1) + 151);
-                mlpf_max = mlpf * 135 / 100;
-                mlpf_min = mlpf * 78 / 100;
-                if (mlpf_max > 63)
-                        mlpf_max = 63;
-
-                /* rounded to the closest integer */
-                nlpf = ((mlpf * f3db * 1000) + (2766 * DS3000_XTAL_FREQ / 2))
-                                / (2766 * DS3000_XTAL_FREQ);
-                if (nlpf > 23)
-                        nlpf = 23;
-                if (nlpf < 1)
-                        nlpf = 1;
-
-                /* rounded to the closest integer */
-                mlpf_new = ((DS3000_XTAL_FREQ * nlpf * 2766) +
-                                (1000 * f3db / 2)) / (1000 * f3db);
+        /* normalized symbol rate rounded to the closest integer */
+        value = (((c->symbol_rate / 1000) << 16) +
+                        (DS3000_SAMPLE_RATE / 2)) / DS3000_SAMPLE_RATE;
+        ds3000_writereg(state, 0x61, value & 0x00ff);
+        ds3000_writereg(state, 0x62, (value & 0xff00) >> 8);
 
-                if (mlpf_new < mlpf_min) {
-                        nlpf++;
-                        mlpf_new = ((DS3000_XTAL_FREQ * nlpf * 2766) +
-                                        (1000 * f3db / 2)) / (1000 * f3db);
-                }
+        /* co-channel interference cancellation disabled */
+        ds3000_writereg(state, 0x56, 0x00);
+
+        /* equalizer disabled */
+        ds3000_writereg(state, 0x76, 0x00);
 
-                if (mlpf_new > mlpf_max)
-                        mlpf_new = mlpf_max;
-
-                ds3000_tuner_writereg(state, 0x04, mlpf_new);
-                ds3000_tuner_writereg(state, 0x06, nlpf);
-                ds3000_tuner_writereg(state, 0x51, 0x1b);
-                ds3000_tuner_writereg(state, 0x51, 0x1f);
-                ds3000_tuner_writereg(state, 0x50, 0x04);
-                ds3000_tuner_writereg(state, 0x50, 0x00);
-                msleep(5);
-
-                /* unknown */
-                ds3000_tuner_writereg(state, 0x51, 0x1e);
-                ds3000_tuner_writereg(state, 0x51, 0x1f);
-                ds3000_tuner_writereg(state, 0x50, 0x01);
-                ds3000_tuner_writereg(state, 0x50, 0x00);
-                msleep(60);
-
-                /* ds3000 global reset */
-                ds3000_writereg(state, 0x07, 0x80);
-                ds3000_writereg(state, 0x07, 0x00);
-                /* ds3000 build-in uC reset */
-                ds3000_writereg(state, 0xb2, 0x01);
-                /* ds3000 software reset */
-                ds3000_writereg(state, 0x00, 0x01);
+        /*ds3000_writereg(state, 0x08, 0x03);
+        ds3000_writereg(state, 0xfd, 0x22);
+        ds3000_writereg(state, 0x08, 0x07);
+        ds3000_writereg(state, 0xfd, 0x42);
+        ds3000_writereg(state, 0x08, 0x07);*/
 
+        if (state->config->ci_mode) {
                 switch (c->delivery_system) {
                 case SYS_DVBS:
-                        /* initialise the demod in DVB-S mode */
-                        for (i = 0; i < sizeof(ds3000_dvbs_init_tab); i += 2)
-                                ds3000_writereg(state,
-                                        ds3000_dvbs_init_tab[i],
-                                        ds3000_dvbs_init_tab[i + 1]);
-                        value = ds3000_readreg(state, 0xfe);
-                        value &= 0xc0;
-                        value |= 0x1b;
-                        ds3000_writereg(state, 0xfe, value);
-                        break;
+                default:
+                        ds3000_writereg(state, 0xfd, 0x80);
+                break;
                 case SYS_DVBS2:
-                        /* initialise the demod in DVB-S2 mode */
-                        for (i = 0; i < sizeof(ds3000_dvbs2_init_tab); i += 2)
-                                ds3000_writereg(state,
-                                        ds3000_dvbs2_init_tab[i],
-                                        ds3000_dvbs2_init_tab[i + 1]);
-                        ds3000_writereg(state, 0xfe, 0x54);
+                        ds3000_writereg(state, 0xfd, 0x01);
                         break;
-                default:
-                        return 1;
                 }
+        }
 
-                /* enable 27MHz clock output */
-                ds3000_writereg(state, 0x29, 0x80);
-                /* enable ac coupling */
-                ds3000_writereg(state, 0x25, 0x8a);
-
-                /* enhance symbol rate performance */
-                if ((state->dcur.symbol_rate / 1000) <= 5000) {
-                        value = 29777 / (state->dcur.symbol_rate / 1000) + 1;
-                        if (value % 2 != 0)
-                                value++;
-                        ds3000_writereg(state, 0xc3, 0x0d);
-                        ds3000_writereg(state, 0xc8, value);
-                        ds3000_writereg(state, 0xc4, 0x10);
-                        ds3000_writereg(state, 0xc7, 0x0e);
-                } else if ((state->dcur.symbol_rate / 1000) <= 10000) {
-                        value = 92166 / (state->dcur.symbol_rate / 1000) + 1;
-                        if (value % 2 != 0)
-                                value++;
-                        ds3000_writereg(state, 0xc3, 0x07);
-                        ds3000_writereg(state, 0xc8, value);
-                        ds3000_writereg(state, 0xc4, 0x09);
-                        ds3000_writereg(state, 0xc7, 0x12);
-                } else if ((state->dcur.symbol_rate / 1000) <= 20000) {
-                        value = 64516 / (state->dcur.symbol_rate / 1000) + 1;
-                        ds3000_writereg(state, 0xc3, value);
-                        ds3000_writereg(state, 0xc8, 0x0e);
-                        ds3000_writereg(state, 0xc4, 0x07);
-                        ds3000_writereg(state, 0xc7, 0x18);
-                } else {
-                        value = 129032 / (state->dcur.symbol_rate / 1000) + 1;
-                        ds3000_writereg(state, 0xc3, value);
-                        ds3000_writereg(state, 0xc8, 0x0a);
-                        ds3000_writereg(state, 0xc4, 0x05);
-                        ds3000_writereg(state, 0xc7, 0x24);
-                }
+        /* ds3000 out of software reset */
+        ds3000_writereg(state, 0x00, 0x00);
+        /* start ds3000 build-in uC */
+        ds3000_writereg(state, 0xb2, 0x00);
 
-                /* normalized symbol rate rounded to the closest integer */
-                value = (((state->dcur.symbol_rate / 1000) << 16) +
-                                (DS3000_SAMPLE_RATE / 2)) / DS3000_SAMPLE_RATE;
-                ds3000_writereg(state, 0x61, value & 0x00ff);
-                ds3000_writereg(state, 0x62, (value & 0xff00) >> 8);
-
-                /* co-channel interference cancellation disabled */
-                ds3000_writereg(state, 0x56, 0x00);
-
-                /* equalizer disabled */
-                ds3000_writereg(state, 0x76, 0x00);
-
-                /*ds3000_writereg(state, 0x08, 0x03);
-                ds3000_writereg(state, 0xfd, 0x22);
-                ds3000_writereg(state, 0x08, 0x07);
-                ds3000_writereg(state, 0xfd, 0x42);
-                ds3000_writereg(state, 0x08, 0x07);*/
-
-                /* ds3000 out of software reset */
-                ds3000_writereg(state, 0x00, 0x00);
-                /* start ds3000 build-in uC */
-                ds3000_writereg(state, 0xb2, 0x00);
-
-                /* TODO: calculate and set carrier offset */
-
-                /* wait before retrying */
-                for (i = 0; i < 30 ; i++) {
-                        if (ds3000_is_tuned(fe)) {
-                                dprintk("%s: Tuned\n", __func__);
-                                ds3000_dump_registers(fe);
-                                goto tuned;
-                        }
-                        msleep(1);
-                }
+        ds3000_set_carrier_offset(fe, offset_khz);
 
-                dprintk("%s: Not tuned\n", __func__);
-                ds3000_dump_registers(fe);
+        for (i = 0; i < 30 ; i++) {
+                ds3000_read_status(fe, &status);
+                if (status && FE_HAS_LOCK)
+                        break;
 
-        } while (--retune);
+                msleep(10);
+        }
 
-tuned:
-        return ret;
+        return 0;
+}
+
+static int ds3000_tune(struct dvb_frontend *fe,
+                        struct dvb_frontend_parameters *p,
+                        unsigned int mode_flags,
+                        unsigned int *delay,
+                        fe_status_t *status)
+{
+        if (p) {
+                int ret = ds3000_set_frontend(fe, p);
+                if (ret)
+                        return ret;
+        }
+
+        *delay = HZ / 5;
+
+        return ds3000_read_status(fe, status);
 }
 
 static enum dvbfe_algo ds3000_get_algo(struct dvb_frontend *fe)
 {
         dprintk("%s()\n", __func__);
-        return DVBFE_ALGO_SW;
+        return DVBFE_ALGO_HW;
 }
 
 /*
@@ -1306,7 +1249,25 @@ static enum dvbfe_algo ds3000_get_algo(struct dvb_frontend *fe)
  */
 static int ds3000_initfe(struct dvb_frontend *fe)
 {
+        struct ds3000_state *state = fe->demodulator_priv;
+        int ret;
+
         dprintk("%s()\n", __func__);
+        /* hard reset */
+        ds3000_writereg(state, 0x08, 0x01 | ds3000_readreg(state, 0x08));
+        msleep(1);
+
+        /* TS2020 init */
+        ds3000_tuner_writereg(state, 0x42, 0x73);
+        ds3000_tuner_writereg(state, 0x05, 0x01);
+        ds3000_tuner_writereg(state, 0x62, 0xf5);
+        /* Load the firmware if required */
+        ret = ds3000_firmware_ondemand(fe);
+        if (ret != 0) {
+                printk(KERN_ERR "%s: Unable initialize firmware\n", __func__);
+                return ret;
+        }
+
         return 0;
 }
 
@@ -1345,6 +1306,7 @@ static struct dvb_frontend_ops ds3000_ops = {
         .read_signal_strength = ds3000_read_signal_strength,
         .read_snr = ds3000_read_snr,
         .read_ucblocks = ds3000_read_ucblocks,
+        .set_voltage = ds3000_set_voltage,
         .set_tone = ds3000_set_tone,
         .diseqc_send_master_cmd = ds3000_send_diseqc_msg,
         .diseqc_send_burst = ds3000_diseqc_send_burst,
@@ -1352,7 +1314,8 @@ static struct dvb_frontend_ops ds3000_ops = {
 
         .set_property = ds3000_set_property,
         .get_property = ds3000_get_property,
-        .set_frontend = ds3000_tune,
+        .set_frontend = ds3000_set_frontend,
+        .tune = ds3000_tune,
 };
 
 module_param(debug, int, 0644);
diff --git a/drivers/media/dvb/frontends/ds3000.h b/drivers/media/dvb/frontends/ds3000.h
index 67f67038740a..1b736888ea37 100644
--- a/drivers/media/dvb/frontends/ds3000.h
+++ b/drivers/media/dvb/frontends/ds3000.h
@@ -27,6 +27,9 @@
 struct ds3000_config {
         /* the demodulator's i2c address */
         u8 demod_address;
+        u8 ci_mode;
+        /* Set device param to start dma */
+        int (*set_ts_params)(struct dvb_frontend *fe, int is_punctured);
 };
 
 #if defined(CONFIG_DVB_DS3000) || \
diff --git a/drivers/media/dvb/frontends/dvb-pll.c b/drivers/media/dvb/frontends/dvb-pll.c
index 4d4d0bb5920a..62a65efdf8d6 100644
--- a/drivers/media/dvb/frontends/dvb-pll.c
+++ b/drivers/media/dvb/frontends/dvb-pll.c
@@ -64,6 +64,7 @@ struct dvb_pll_desc {
         void (*set)(struct dvb_frontend *fe, u8 *buf,
                     const struct dvb_frontend_parameters *params);
         u8   *initdata;
+        u8   *initdata2;
         u8   *sleepdata;
         int  count;
         struct {
@@ -321,26 +322,73 @@ static struct dvb_pll_desc dvb_pll_philips_sd1878_tda8261 = {
 static void opera1_bw(struct dvb_frontend *fe, u8 *buf,
                       const struct dvb_frontend_parameters *params)
 {
-        if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ)
-                buf[2] |= 0x08;
+        struct dvb_pll_priv *priv = fe->tuner_priv;
+        u32 b_w  = (params->u.qpsk.symbol_rate * 27) / 32000;
+        struct i2c_msg msg = {
+                .addr = priv->pll_i2c_address,
+                .flags = 0,
+                .buf = buf,
+                .len = 4
+        };
+        int result;
+        u8 lpf;
+
+        if (fe->ops.i2c_gate_ctrl)
+                fe->ops.i2c_gate_ctrl(fe, 1);
+
+        result = i2c_transfer(priv->i2c, &msg, 1);
+        if (result != 1)
+                printk(KERN_ERR "%s: i2c_transfer failed:%d",
+                        __func__, result);
+
+        if (b_w <= 10000)
+                lpf = 0xc;
+        else if (b_w <= 12000)
+                lpf = 0x2;
+        else if (b_w <= 14000)
+                lpf = 0xa;
+        else if (b_w <= 16000)
+                lpf = 0x6;
+        else if (b_w <= 18000)
+                lpf = 0xe;
+        else if (b_w <= 20000)
+                lpf = 0x1;
+        else if (b_w <= 22000)
+                lpf = 0x9;
+        else if (b_w <= 24000)
+                lpf = 0x5;
+        else if (b_w <= 26000)
+                lpf = 0xd;
+        else if (b_w <= 28000)
+                lpf = 0x3;
+                else
+                lpf = 0xb;
+        buf[2] ^= 0x1c; /* Flip bits 3-5 */
+        /* Set lpf */
+        buf[2] |= ((lpf >> 2) & 0x3) << 3;
+        buf[3] |= (lpf & 0x3) << 2;
+
+        return;
 }
 
 static struct dvb_pll_desc dvb_pll_opera1 = {
         .name  = "Opera Tuner",
         .min   =  900000,
         .max   = 2250000,
+        .initdata = (u8[]){ 4, 0x08, 0xe5, 0xe1, 0x00 },
+        .initdata2 = (u8[]){ 4, 0x08, 0xe5, 0xe5, 0x00 },
         .iffreq= 0,
         .set   = opera1_bw,
         .count = 8,
         .entries = {
-                { 1064000, 500, 0xe5, 0xc6 },
-                { 1169000, 500, 0xe5, 0xe6 },
-                { 1299000, 500, 0xe5, 0x24 },
-                { 1444000, 500, 0xe5, 0x44 },
-                { 1606000, 500, 0xe5, 0x64 },
-                { 1777000, 500, 0xe5, 0x84 },
-                { 1941000, 500, 0xe5, 0xa4 },
-                { 2250000, 500, 0xe5, 0xc4 },
+                { 1064000, 500, 0xf9, 0xc2 },
+                { 1169000, 500, 0xf9, 0xe2 },
+                { 1299000, 500, 0xf9, 0x20 },
+                { 1444000, 500, 0xf9, 0x40 },
+                { 1606000, 500, 0xf9, 0x60 },
+                { 1777000, 500, 0xf9, 0x80 },
+                { 1941000, 500, 0xf9, 0xa0 },
+                { 2250000, 500, 0xf9, 0xc0 },
         }
 };
 
@@ -648,8 +696,17 @@ static int dvb_pll_init(struct dvb_frontend *fe)
                 int result;
                 if (fe->ops.i2c_gate_ctrl)
                         fe->ops.i2c_gate_ctrl(fe, 1);
-                if ((result = i2c_transfer(priv->i2c, &msg, 1)) != 1) {
+                result = i2c_transfer(priv->i2c, &msg, 1);
+                if (result != 1)
                         return result;
+                if (priv->pll_desc->initdata2) {
+                        msg.buf = priv->pll_desc->initdata2 + 1;
+                        msg.len = priv->pll_desc->initdata2[0];
+                        if (fe->ops.i2c_gate_ctrl)
+                                fe->ops.i2c_gate_ctrl(fe, 1);
+                        result = i2c_transfer(priv->i2c, &msg, 1);
+                        if (result != 1)
+                                return result;
                 }
                 return 0;
         }
diff --git a/drivers/media/dvb/frontends/eds1547.h b/drivers/media/dvb/frontends/eds1547.h
index fa79b7c83dd2..c983f2f85802 100644
--- a/drivers/media/dvb/frontends/eds1547.h
+++ b/drivers/media/dvb/frontends/eds1547.h
@@ -61,7 +61,7 @@ static u8 stv0288_earda_inittab[] = {
         0x3d, 0x30,
         0x40, 0x63,
         0x41, 0x04,
-        0x42, 0x60,
+        0x42, 0x20,
         0x43, 0x00,
         0x44, 0x00,
         0x45, 0x00,
diff --git a/drivers/media/dvb/frontends/ix2505v.c b/drivers/media/dvb/frontends/ix2505v.c
new file mode 100644
index 000000000000..9a517a4bf96d
--- /dev/null
+++ b/drivers/media/dvb/frontends/ix2505v.c
@@ -0,0 +1,325 @@
+/**
+ * Driver for Sharp IX2505V (marked B0017) DVB-S silicon tuner
+ *
+ * Copyright (C) 2010 Malcolm Priestley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License Version 2, as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/dvb/frontend.h>
+#include <linux/slab.h>
+#include <linux/types.h>
+
+#include "ix2505v.h"
+
+static int ix2505v_debug;
+#define dprintk(level, args...) do { \
+        if (ix2505v_debug & level) \
+                printk(KERN_DEBUG "ix2505v: " args); \
+} while (0)
+
+#define deb_info(args...)  dprintk(0x01, args)
+#define deb_i2c(args...)  dprintk(0x02, args)
+
+struct ix2505v_state {
+        struct i2c_adapter *i2c;
+        const struct ix2505v_config *config;
+        u32 frequency;
+};
+
+/**
+ *  Data read format of the Sharp IX2505V B0017
+ *
+ *  byte1:   1   |   1   |   0   |   0   |   0   |  MA1  |  MA0  |  1
+ *  byte2:  POR  |   FL  |  RD2  |  RD1  |  RD0  |   X   |   X   |  X
+ *
+ *  byte1 = address
+ *  byte2;
+ *      POR = Power on Reset (VCC H=<2.2v L=>2.2v)
+ *      FL  = Phase Lock (H=lock L=unlock)
+ *      RD0-2 = Reserved internal operations
+ *
+ * Only POR can be used to check the tuner is present
+ *
+ * Caution: after byte2 the I2C reverts to write mode continuing to read
+ *          may corrupt tuning data.
+ *
+ */
+
+static int ix2505v_read_status_reg(struct ix2505v_state *state)
+{
+        u8 addr = state->config->tuner_address;
+        u8 b2[] = {0};
+        int ret;
+
+        struct i2c_msg msg[1] = {
+                { .addr = addr, .flags = I2C_M_RD, .buf = b2, .len = 1 }
+        };
+
+        ret = i2c_transfer(state->i2c, msg, 1);
+        deb_i2c("Read %s ", __func__);
+
+        return (ret == 1) ? (int) b2[0] : -1;
+}
+
+static int ix2505v_write(struct ix2505v_state *state, u8 buf[], u8 count)
+{
+        struct i2c_msg msg[1] = {
+                { .addr = state->config->tuner_address, .flags = 0,
+                  .buf = buf, .len = count },
+        };
+
+        int ret;
+
+        ret = i2c_transfer(state->i2c, msg, 1);
+
+        if (ret != 1) {
+                deb_i2c("%s: i2c error, ret=%d\n", __func__, ret);
+                return -EIO;
+        }
+
+        return 0;
+}
+
+static int ix2505v_release(struct dvb_frontend *fe)
+{
+        struct ix2505v_state *state = fe->tuner_priv;
+
+        fe->tuner_priv = NULL;
+        kfree(state);
+
+        return 0;
+}
+
+/**
+ *  Data write format of the Sharp IX2505V B0017
+ *
+ *  byte1:   1   |   1   |   0   |   0   |   0   | 0(MA1)| 0(MA0)|  0
+ *  byte2:   0   |  BG1  |  BG2  |   N8  |   N7  |   N6  |  N5   |  N4
+ *  byte3:   N3  |   N2  |   N1  |   A5  |   A4  |   A3  |   A2  |  A1
+ *  byte4:   1   | 1(C1) | 1(C0) |  PD5  |  PD4  |   TM  | 0(RTS)| 1(REF)
+ *  byte5:   BA2 |   BA1 |  BA0  |  PSC  |  PD3  |PD2/TS2|DIV/TS1|PD0/TS0
+ *
+ *  byte1 = address
+ *
+ *  Write order
+ *  1) byte1 -> byte2 -> byte3 -> byte4 -> byte5
+ *  2) byte1 -> byte4 -> byte5 -> byte2 -> byte3
+ *  3) byte1 -> byte2 -> byte3 -> byte4
+ *  4) byte1 -> byte4 -> byte5 -> byte2
+ *  5) byte1 -> byte2 -> byte3
+ *  6) byte1 -> byte4 -> byte5
+ *  7) byte1 -> byte2
+ *  8) byte1 -> byte4
+ *
+ *  Recommended Setup
+ *  1 -> 8 -> 6
+ */
+
+static int ix2505v_set_params(struct dvb_frontend *fe,
+                struct dvb_frontend_parameters *params)
+{
+        struct ix2505v_state *state = fe->tuner_priv;
+        u32 frequency = params->frequency;
+        u32 b_w  = (params->u.qpsk.symbol_rate * 27) / 32000;
+        u32 div_factor, N , A, x;
+        int ret = 0, len;
+        u8 gain, cc, ref, psc, local_osc, lpf;
+        u8 data[4] = {0};
+
+        if ((frequency < fe->ops.info.frequency_min)
+        ||  (frequency > fe->ops.info.frequency_max))
+                return -EINVAL;
+
+        if (state->config->tuner_gain)
+                gain = (state->config->tuner_gain < 4)
+                        ? state->config->tuner_gain : 0;
+        else
+                gain = 0x0;
+
+        if (state->config->tuner_chargepump)
+                cc = state->config->tuner_chargepump;
+        else
+                cc = 0x3;
+
+        ref = 8; /* REF =1 */
+        psc = 32; /* PSC = 0 */
+
+        div_factor = (frequency * ref) / 40; /* local osc = 4Mhz */
+        x = div_factor / psc;
+        N = x/100;
+        A = ((x - (N * 100)) * psc) / 100;
+
+        data[0] = ((gain & 0x3) << 5) | (N >> 3);
+        data[1] = (N << 5) | (A & 0x1f);
+        data[2] = 0x81 | ((cc & 0x3) << 5) ; /*PD5,PD4 & TM = 0|C1,C0|REF=1*/
+
+        deb_info("Frq=%d x=%d N=%d A=%d\n", frequency, x, N, A);
+
+        if (frequency <= 1065000)
+                local_osc = (6 << 5) | 2;
+        else if (frequency <= 1170000)
+                local_osc = (7 << 5) | 2;
+        else if (frequency <= 1300000)
+                local_osc = (1 << 5);
+        else if (frequency <= 1445000)
+                local_osc = (2 << 5);
+        else if (frequency <= 1607000)
+                local_osc = (3 << 5);
+        else if (frequency <= 1778000)
+                local_osc = (4 << 5);
+        else if (frequency <= 1942000)
+                local_osc = (5 << 5);
+        else            /*frequency up to 2150000*/
+                local_osc = (6 << 5);
+
+        data[3] = local_osc; /* all other bits set 0 */
+
+        if (b_w <= 10000)
+                lpf = 0xc;
+        else if (b_w <= 12000)
+                lpf = 0x2;
+        else if (b_w <= 14000)
+                lpf = 0xa;
+        else if (b_w <= 16000)
+                lpf = 0x6;
+        else if (b_w <= 18000)
+                lpf = 0xe;
+        else if (b_w <= 20000)
+                lpf = 0x1;
+        else if (b_w <= 22000)
+                lpf = 0x9;
+        else if (b_w <= 24000)
+                lpf = 0x5;
+        else if (b_w <= 26000)
+                lpf = 0xd;
+        else if (b_w <= 28000)
+                lpf = 0x3;
+                else
+                lpf = 0xb;
+
+        deb_info("Osc=%x b_w=%x lpf=%x\n", local_osc, b_w, lpf);
+        deb_info("Data 0=[%x%x%x%x]\n", data[0], data[1], data[2], data[3]);
+
+        if (fe->ops.i2c_gate_ctrl)
+                fe->ops.i2c_gate_ctrl(fe, 1);
+
+        len = sizeof(data);
+        ret |= ix2505v_write(state, data, len);
+
+        data[2] |= 0x4; /* set TM = 1 other bits same */
+
+        if (fe->ops.i2c_gate_ctrl)
+                fe->ops.i2c_gate_ctrl(fe, 1);
+
+        len = 1;
+        ret |= ix2505v_write(state, &data[2], len); /* write byte 4 only */
+
+        msleep(10);
+
+        data[2] |= ((lpf >> 2) & 0x3) << 3; /* lpf */
+        data[3] |= (lpf & 0x3) << 2;
+
+        deb_info("Data 2=[%x%x]\n", data[2], data[3]);
+
+        if (fe->ops.i2c_gate_ctrl)
+                fe->ops.i2c_gate_ctrl(fe, 1);
+
+        len = 2;
+        ret |= ix2505v_write(state, &data[2], len); /* write byte 4 & 5 */
+
+        if (state->config->min_delay_ms)
+                msleep(state->config->min_delay_ms);
+
+        state->frequency = frequency;
+
+        return ret;
+}
+
+static int ix2505v_get_frequency(struct dvb_frontend *fe, u32 *frequency)
+{
+        struct ix2505v_state *state = fe->tuner_priv;
+
+        *frequency = state->frequency;
+
+        return 0;
+}
+
+static struct dvb_tuner_ops ix2505v_tuner_ops = {
+        .info = {
+                .name = "Sharp IX2505V (B0017)",
+                .frequency_min = 950000,
+                .frequency_max = 2175000
+        },
+        .release = ix2505v_release,
+        .set_params = ix2505v_set_params,
+        .get_frequency = ix2505v_get_frequency,
+};
+
+struct dvb_frontend *ix2505v_attach(struct dvb_frontend *fe,
+                                    const struct ix2505v_config *config,
+                                    struct i2c_adapter *i2c)
+{
+        struct ix2505v_state *state = NULL;
+        int ret;
+
+        if (NULL == config) {
+                deb_i2c("%s: no config ", __func__);
+                goto error;
+        }
+
+        state = kzalloc(sizeof(struct ix2505v_state), GFP_KERNEL);
+        if (NULL == state)
+                return NULL;
+
+        state->config = config;
+        state->i2c = i2c;
+
+        if (state->config->tuner_write_only) {
+                if (fe->ops.i2c_gate_ctrl)
+                        fe->ops.i2c_gate_ctrl(fe, 1);
+
+                ret = ix2505v_read_status_reg(state);
+
+                if (ret & 0x80) {
+                        deb_i2c("%s: No IX2505V found\n", __func__);
+                        goto error;
+                }
+
+                if (fe->ops.i2c_gate_ctrl)
+                        fe->ops.i2c_gate_ctrl(fe, 0);
+        }
+
+        fe->tuner_priv = state;
+
+        memcpy(&fe->ops.tuner_ops, &ix2505v_tuner_ops,
+                sizeof(struct dvb_tuner_ops));
+        deb_i2c("%s: initialization (%s addr=0x%02x) ok\n",
+                __func__, fe->ops.tuner_ops.info.name, config->tuner_address);
+
+        return fe;
+
+error:
+        kfree(state);
+        return NULL;
+}
+EXPORT_SYMBOL(ix2505v_attach);
+
+module_param_named(debug, ix2505v_debug, int, 0644);
+MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
+MODULE_DESCRIPTION("DVB IX2505V tuner driver");
+MODULE_AUTHOR("Malcolm Priestley");
+MODULE_LICENSE("GPL");
diff --git a/drivers/media/dvb/frontends/ix2505v.h b/drivers/media/dvb/frontends/ix2505v.h
new file mode 100644
index 000000000000..67e89d616d50
--- /dev/null
+++ b/drivers/media/dvb/frontends/ix2505v.h
@@ -0,0 +1,64 @@
+/**
+ * Driver for Sharp IX2505V (marked B0017) DVB-S silicon tuner
+ *
+ * Copyright (C) 2010 Malcolm Priestley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License Version 2, as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef DVB_IX2505V_H
+#define DVB_IX2505V_H
+
+#include <linux/i2c.h>
+#include "dvb_frontend.h"
+
+/**
+ * Attach a ix2505v tuner to the supplied frontend structure.
+ *
+ * @param fe Frontend to attach to.
+ * @param config ix2505v_config structure
+ * @return FE pointer on success, NULL on failure.
+ */
+
+struct ix2505v_config {
+        u8 tuner_address;
+
+        /*Baseband AMP gain control 0/1=0dB(default) 2=-2bB 3=-4dB */
+        u8 tuner_gain;
+
+        /*Charge pump output +/- 0=120 1=260 2=555 3=1200(default) */
+        u8 tuner_chargepump;
+
+        /* delay after tune */
+        int min_delay_ms;
+
+        /* disables reads*/
+        u8 tuner_write_only;
+
+};
+
+#if defined(CONFIG_DVB_IX2505V) || \
+        (defined(CONFIG_DVB_IX2505V_MODULE) && defined(MODULE))
+extern struct dvb_frontend *ix2505v_attach(struct dvb_frontend *fe,
+        const struct ix2505v_config *config, struct i2c_adapter *i2c);
+#else
+static inline struct dvb_frontend *ix2505v_attach(struct dvb_frontend *fe,
+        const struct ix2505v_config *config, struct i2c_adapter *i2c)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return NULL;
+}
+#endif
+
+#endif /* DVB_IX2505V_H */
diff --git a/drivers/media/dvb/frontends/lgdt3304.c b/drivers/media/dvb/frontends/lgdt3304.c
deleted file mode 100644
index 45a529b06b9d..000000000000
--- a/drivers/media/dvb/frontends/lgdt3304.c
+++ /dev/null
@@ -1,380 +0,0 @@
-/*
- * Driver for LG ATSC lgdt3304 driver
- *
- * Copyright (C) 2008 Markus Rechberger <mrechberger@sundtek.de>
- *
- */
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/slab.h>
-#include <linux/delay.h>
-#include "dvb_frontend.h"
-#include "lgdt3304.h"
-
-static  unsigned int debug = 0;
-module_param(debug, int, 0644);
-MODULE_PARM_DESC(debug,"lgdt3304 debugging (default off)");
-
-#define dprintk(fmt, args...) if (debug) do {\
-                        printk("lgdt3304 debug: " fmt, ##args); } while (0)
-
-struct lgdt3304_state
-{
-        struct dvb_frontend frontend;
-        fe_modulation_t current_modulation;
-        __u32 snr;
-        __u32 current_frequency;
-        __u8 addr;
-        struct i2c_adapter *i2c;
-};
-
-static int i2c_write_demod_bytes (struct dvb_frontend *fe, __u8 *buf, int len)
-{
-        struct lgdt3304_state *state = fe->demodulator_priv;
-        struct i2c_msg i2cmsgs = {
-                .addr = state->addr,
-                .flags = 0,
-                .len = 3,
-                .buf = buf
-        };
-        int i;
-        int err;
-
-        for (i=0; i<len-1; i+=3){
-                if((err = i2c_transfer(state->i2c, &i2cmsgs, 1))<0) {
-                        printk("%s i2c_transfer error %d\n", __func__, err);
-                        if (err < 0)
-                                return err;
-                        else
-                                return -EREMOTEIO;
-                }
-                i2cmsgs.buf += 3;
-        }
-        return 0;
-}
-
-static int lgdt3304_i2c_read_reg(struct dvb_frontend *fe, unsigned int reg)
-{
-        struct lgdt3304_state *state = fe->demodulator_priv;
-        struct i2c_msg i2cmsgs[2];
-        int ret;
-        __u8 buf;
-
-        __u8 regbuf[2] = { reg>>8, reg&0xff };
-
-        i2cmsgs[0].addr = state->addr;
-        i2cmsgs[0].flags = 0;
-        i2cmsgs[0].len = 2;
-        i2cmsgs[0].buf = regbuf;
-
-        i2cmsgs[1].addr = state->addr;
-        i2cmsgs[1].flags = I2C_M_RD;
-        i2cmsgs[1].len = 1;
-        i2cmsgs[1].buf = &buf;
-
-        if((ret = i2c_transfer(state->i2c, i2cmsgs, 2))<0) {
-                printk("%s i2c_transfer error %d\n", __func__, ret);
-                return ret;
-        }
-
-        return buf;
-}
-
-static int lgdt3304_i2c_write_reg(struct dvb_frontend *fe, int reg, int val)
-{
-        struct lgdt3304_state *state = fe->demodulator_priv;
-        char buffer[3] = { reg>>8, reg&0xff, val };
-        int ret;
-
-        struct i2c_msg i2cmsgs = {
-                .addr = state->addr,
-                .flags = 0,
-                .len = 3,
-                .buf=buffer
-        };
-        ret = i2c_transfer(state->i2c, &i2cmsgs, 1);
-        if (ret != 1) {
-                printk("%s i2c_transfer error %d\n", __func__, ret);
-                return ret;
-        }
-
-        return 0;
-}
-
-
-static int lgdt3304_soft_Reset(struct dvb_frontend *fe)
-{
-        lgdt3304_i2c_write_reg(fe, 0x0002, 0x9a);
-        lgdt3304_i2c_write_reg(fe, 0x0002, 0x9b);
-        mdelay(200);
-        return 0;
-}
-
-static int lgdt3304_set_parameters(struct dvb_frontend *fe, struct dvb_frontend_parameters *param) {
-        int err = 0;
-
-        static __u8 lgdt3304_vsb8_data[] = {
-                /* 16bit  , 8bit */
-                /* regs   , val  */
-                0x00, 0x00, 0x02,
-                0x00, 0x00, 0x13,
-                0x00, 0x0d, 0x02,
-                0x00, 0x0e, 0x02,
-                0x00, 0x12, 0x32,
-                0x00, 0x13, 0xc4,
-                0x01, 0x12, 0x17,
-                0x01, 0x13, 0x15,
-                0x01, 0x14, 0x18,
-                0x01, 0x15, 0xff,
-                0x01, 0x16, 0x2c,
-                0x02, 0x14, 0x67,
-                0x02, 0x24, 0x8d,
-                0x04, 0x27, 0x12,
-                0x04, 0x28, 0x4f,
-                0x03, 0x08, 0x80,
-                0x03, 0x09, 0x00,
-                0x03, 0x0d, 0x00,
-                0x03, 0x0e, 0x1c,
-                0x03, 0x14, 0xe1,
-                0x05, 0x0e, 0x5b,
-        };
-
-        /* not yet tested .. */
-        static __u8 lgdt3304_qam64_data[] = {
-                /* 16bit  , 8bit */
-                /* regs   , val  */
-                0x00, 0x00, 0x18,
-                0x00, 0x0d, 0x02,
-                //0x00, 0x0e, 0x02,
-                0x00, 0x12, 0x2a,
-                0x00, 0x13, 0x00,
-                0x03, 0x14, 0xe3,
-                0x03, 0x0e, 0x1c,
-                0x03, 0x08, 0x66,
-                0x03, 0x09, 0x66,
-                0x03, 0x0a, 0x08,
-                0x03, 0x0b, 0x9b,
-                0x05, 0x0e, 0x5b,
-        };
-
-
-        /* tested with KWorld a340 */
-        static __u8 lgdt3304_qam256_data[] = {
-                /* 16bit  , 8bit */
-                /* regs   , val  */
-                0x00, 0x00, 0x01,  //0x19,
-                0x00, 0x12, 0x2a,
-                0x00, 0x13, 0x80,
-                0x00, 0x0d, 0x02,
-                0x03, 0x14, 0xe3,
-
-                0x03, 0x0e, 0x1c,
-                0x03, 0x08, 0x66,
-                0x03, 0x09, 0x66,
-                0x03, 0x0a, 0x08,
-                0x03, 0x0b, 0x9b,
-
-                0x03, 0x0d, 0x14,
-                //0x05, 0x0e, 0x5b,
-                0x01, 0x06, 0x4a,
-                0x01, 0x07, 0x3d,
-                0x01, 0x08, 0x70,
-                0x01, 0x09, 0xa3,
-
-                0x05, 0x04, 0xfd,
-
-                0x00, 0x0d, 0x82,
-
-                0x05, 0x0e, 0x5b,
-
-                0x05, 0x0e, 0x5b,
-
-                0x00, 0x02, 0x9a,
-
-                0x00, 0x02, 0x9b,
-
-                0x00, 0x00, 0x01,
-                0x00, 0x12, 0x2a,
-                0x00, 0x13, 0x80,
-                0x00, 0x0d, 0x02,
-                0x03, 0x14, 0xe3,
-
-                0x03, 0x0e, 0x1c,
-                0x03, 0x08, 0x66,
-                0x03, 0x09, 0x66,
-                0x03, 0x0a, 0x08,
-                0x03, 0x0b, 0x9b,
-
-                0x03, 0x0d, 0x14,
-                0x01, 0x06, 0x4a,
-                0x01, 0x07, 0x3d,
-                0x01, 0x08, 0x70,
-                0x01, 0x09, 0xa3,
-
-                0x05, 0x04, 0xfd,
-
-                0x00, 0x0d, 0x82,
-
-                0x05, 0x0e, 0x5b,
-        };
-
-        struct lgdt3304_state *state = fe->demodulator_priv;
-        if (state->current_modulation != param->u.vsb.modulation) {
-                switch(param->u.vsb.modulation) {
-                case VSB_8:
-                        err = i2c_write_demod_bytes(fe, lgdt3304_vsb8_data,
-                                        sizeof(lgdt3304_vsb8_data));
-                        break;
-                case QAM_64:
-                        err = i2c_write_demod_bytes(fe, lgdt3304_qam64_data,
-                                        sizeof(lgdt3304_qam64_data));
-                        break;
-                case QAM_256:
-                        err = i2c_write_demod_bytes(fe, lgdt3304_qam256_data,
-                                        sizeof(lgdt3304_qam256_data));
-                        break;
-                default:
-                        break;
-                }
-
-                if (err) {
-                        printk("%s error setting modulation\n", __func__);
-                } else {
-                        state->current_modulation = param->u.vsb.modulation;
-                }
-        }
-        state->current_frequency = param->frequency;
-
-        lgdt3304_soft_Reset(fe);
-
-
-        if (fe->ops.tuner_ops.set_params)
-                fe->ops.tuner_ops.set_params(fe, param);
-
-        return 0;
-}
-
-static int lgdt3304_init(struct dvb_frontend *fe) {
-        return 0;
-}
-
-static int lgdt3304_sleep(struct dvb_frontend *fe) {
-        return 0;
-}
-
-
-static int lgdt3304_read_status(struct dvb_frontend *fe, fe_status_t *status)
-{
-        struct lgdt3304_state *state = fe->demodulator_priv;
-        int r011d;
-        int qam_lck;
-
-        *status = 0;
-        dprintk("lgdt read status\n");
-
-        r011d = lgdt3304_i2c_read_reg(fe, 0x011d);
-
-        dprintk("%02x\n", r011d);
-
-        switch(state->current_modulation) {
-        case VSB_8:
-                if (r011d & 0x80) {
-                        dprintk("VSB Locked\n");
-                        *status |= FE_HAS_CARRIER;
-                        *status |= FE_HAS_LOCK;
-                        *status |= FE_HAS_SYNC;
-                        *status |= FE_HAS_SIGNAL;
-                }
-                break;
-        case QAM_64:
-        case QAM_256:
-                qam_lck = r011d & 0x7;
-                switch(qam_lck) {
-                        case 0x0: dprintk("Unlock\n");
-                                  break;
-                        case 0x4: dprintk("1st Lock in acquisition state\n");
-                                  break;
-                        case 0x6: dprintk("2nd Lock in acquisition state\n");
-                                  break;
-                        case 0x7: dprintk("Final Lock in good reception state\n");
-                                  *status |= FE_HAS_CARRIER;
-                                  *status |= FE_HAS_LOCK;
-                                  *status |= FE_HAS_SYNC;
-                                  *status |= FE_HAS_SIGNAL;
-                                  break;
-                }
-                break;
-        default:
-                printk("%s unhandled modulation\n", __func__);
-        }
-
-
-        return 0;
-}
-
-static int lgdt3304_read_ber(struct dvb_frontend *fe, __u32 *ber)
-{
-        dprintk("read ber\n");
-        return 0;
-}
-
-static int lgdt3304_read_snr(struct dvb_frontend *fe, __u16 *snr)
-{
-        dprintk("read snr\n");
-        return 0;
-}
-
-static int lgdt3304_read_ucblocks(struct dvb_frontend *fe, __u32 *ucblocks)
-{
-        dprintk("read ucblocks\n");
-        return 0;
-}
-
-static void lgdt3304_release(struct dvb_frontend *fe)
-{
-        struct lgdt3304_state *state = (struct lgdt3304_state *)fe->demodulator_priv;
-        kfree(state);
-}
-
-static struct dvb_frontend_ops demod_lgdt3304={
-        .info = {
-                .name = "LG 3304",
-                .type = FE_ATSC,
-                .frequency_min = 54000000,
-                .frequency_max = 858000000,
-                .frequency_stepsize = 62500,
-                .symbol_rate_min = 5056941,
-                .symbol_rate_max = 10762000,
-                .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
-        },
-        .init = lgdt3304_init,
-        .sleep = lgdt3304_sleep,
-        .set_frontend = lgdt3304_set_parameters,
-        .read_snr = lgdt3304_read_snr,
-        .read_ber = lgdt3304_read_ber,
-        .read_status = lgdt3304_read_status,
-        .read_ucblocks = lgdt3304_read_ucblocks,
-        .release = lgdt3304_release,
-};
-
-struct dvb_frontend* lgdt3304_attach(const struct lgdt3304_config *config,
-                                           struct i2c_adapter *i2c)
-{
-
-        struct lgdt3304_state *state;
-        state = kzalloc(sizeof(struct lgdt3304_state), GFP_KERNEL);
-        if (state == NULL)
-                return NULL;
-        state->addr = config->i2c_address;
-        state->i2c = i2c;
-
-        memcpy(&state->frontend.ops, &demod_lgdt3304, sizeof(struct dvb_frontend_ops));
-        state->frontend.demodulator_priv = state;
-        return &state->frontend;
-}
-
-EXPORT_SYMBOL_GPL(lgdt3304_attach);
-MODULE_AUTHOR("Markus Rechberger <mrechberger@empiatech.com>");
-MODULE_DESCRIPTION("LGE LGDT3304 DVB-T demodulator driver");
-MODULE_LICENSE("GPL");
diff --git a/drivers/media/dvb/frontends/lgdt3304.h b/drivers/media/dvb/frontends/lgdt3304.h
deleted file mode 100644
index fc409fe59acb..000000000000
--- a/drivers/media/dvb/frontends/lgdt3304.h
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- *  Driver for DVB-T lgdt3304 demodulator
- *
- *  Copyright (C) 2008 Markus Rechberger <mrechberger@gmail.com>
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License
- *  along with this program; if not, write to the Free Software
- *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.=
- */
-
-#ifndef LGDT3304_H
-#define LGDT3304_H
-
-#include <linux/dvb/frontend.h>
-
-struct lgdt3304_config
-{
-        /* demodulator's I2C address */
-        u8 i2c_address;
-};
-
-#if defined(CONFIG_DVB_LGDT3304) || (defined(CONFIG_DVB_LGDT3304_MODULE) && defined(MODULE))
-extern struct dvb_frontend* lgdt3304_attach(const struct lgdt3304_config *config,
-                                           struct i2c_adapter *i2c);
-#else
-static inline struct dvb_frontend* lgdt3304_attach(const struct lgdt3304_config *config,
-                                           struct i2c_adapter *i2c)
-{
-        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
-        return NULL;
-}
-#endif /* CONFIG_DVB_LGDT */
-
-#endif /* LGDT3304_H */
diff --git a/drivers/media/dvb/frontends/lgs8gxx.c b/drivers/media/dvb/frontends/lgs8gxx.c
index 5ea28ae2ba8f..1172b54689f8 100644
--- a/drivers/media/dvb/frontends/lgs8gxx.c
+++ b/drivers/media/dvb/frontends/lgs8gxx.c
@@ -60,13 +60,12 @@ static int lgs8gxx_write_reg(struct lgs8gxx_state *priv, u8 reg, u8 data)
                 msg.addr += 0x02;
 
         if (debug >= 2)
-                printk(KERN_DEBUG "%s: reg=0x%02X, data=0x%02X\n",
-                        __func__, reg, data);
+                dprintk("%s: reg=0x%02X, data=0x%02X\n", __func__, reg, data);
 
         ret = i2c_transfer(priv->i2c, &msg, 1);
 
         if (ret != 1)
-                dprintk(KERN_DEBUG "%s: error reg=0x%x, data=0x%x, ret=%i\n",
+                dprintk("%s: error reg=0x%x, data=0x%x, ret=%i\n",
                         __func__, reg, data, ret);
 
         return (ret != 1) ? -1 : 0;
@@ -91,15 +90,13 @@ static int lgs8gxx_read_reg(struct lgs8gxx_state *priv, u8 reg, u8 *p_data)
 
         ret = i2c_transfer(priv->i2c, msg, 2);
         if (ret != 2) {
-                dprintk(KERN_DEBUG "%s: error reg=0x%x, ret=%i\n",
-                        __func__, reg, ret);
+                dprintk("%s: error reg=0x%x, ret=%i\n", __func__, reg, ret);
                 return -1;
         }
 
         *p_data = b1[0];
         if (debug >= 2)
-                printk(KERN_DEBUG "%s: reg=0x%02X, data=0x%02X\n",
-                        __func__, reg, b1[0]);
+                dprintk("%s: reg=0x%02X, data=0x%02X\n", __func__, reg, b1[0]);
         return 0;
 }
 
@@ -662,7 +659,7 @@ static void lgs8gxx_release(struct dvb_frontend *fe)
 }
 
 
-static int lgs8gxx_write(struct dvb_frontend *fe, u8 *buf, int len)
+static int lgs8gxx_write(struct dvb_frontend *fe, const u8 buf[], int len)
 {
         struct lgs8gxx_state *priv = fe->demodulator_priv;
 
diff --git a/drivers/media/dvb/frontends/mb86a16.c b/drivers/media/dvb/frontends/mb86a16.c
index 33b63235b86e..c283112051b1 100644
--- a/drivers/media/dvb/frontends/mb86a16.c
+++ b/drivers/media/dvb/frontends/mb86a16.c
@@ -1630,7 +1630,7 @@ static enum dvbfe_search mb86a16_search(struct dvb_frontend *fe,
         state->srate = p->u.qpsk.symbol_rate / 1000;
 
         if (!mb86a16_set_fe(state)) {
-                dprintk(verbose, MB86A16_ERROR, 1, "Succesfully acquired LOCK");
+                dprintk(verbose, MB86A16_ERROR, 1, "Successfully acquired LOCK");
                 return DVBFE_ALGO_SEARCH_SUCCESS;
         }
 
diff --git a/drivers/media/dvb/frontends/mb86a20s.c b/drivers/media/dvb/frontends/mb86a20s.c
new file mode 100644
index 000000000000..0f867a5055fb
--- /dev/null
+++ b/drivers/media/dvb/frontends/mb86a20s.c
@@ -0,0 +1,639 @@
+/*
+ *   Fujitu mb86a20s ISDB-T/ISDB-Tsb Module driver
+ *
+ *   Copyright (C) 2010 Mauro Carvalho Chehab <mchehab@redhat.com>
+ *   Copyright (C) 2009-2010 Douglas Landgraf <dougsland@redhat.com>
+ *
+ *   FIXME: Need to port to DVB v5.2 API
+ *
+ *   This program is free software; you can redistribute it and/or
+ *   modify it under the terms of the GNU General Public License as
+ *   published by the Free Software Foundation version 2.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ *   General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <asm/div64.h>
+
+#include "dvb_frontend.h"
+#include "mb86a20s.h"
+
+static int debug = 1;
+module_param(debug, int, 0644);
+MODULE_PARM_DESC(debug, "Activates frontend debugging (default:0)");
+
+#define rc(args...)  do {                                               \
+        printk(KERN_ERR  "mb86a20s: " args);                            \
+} while (0)
+
+#define dprintk(args...)                                                \
+        do {                                                            \
+                if (debug) {                                            \
+                        printk(KERN_DEBUG "mb86a20s: %s: ", __func__);  \
+                        printk(args);                                   \
+                }                                                       \
+        } while (0)
+
+struct mb86a20s_state {
+        struct i2c_adapter *i2c;
+        const struct mb86a20s_config *config;
+
+        struct dvb_frontend frontend;
+
+        bool need_init;
+};
+
+struct regdata {
+        u8 reg;
+        u8 data;
+};
+
+/*
+ * Initialization sequence: Use whatevere default values that PV SBTVD
+ * does on its initialisation, obtained via USB snoop
+ */
+static struct regdata mb86a20s_init[] = {
+        { 0x70, 0x0f },
+        { 0x70, 0xff },
+        { 0x08, 0x01 },
+        { 0x09, 0x3e },
+        { 0x50, 0xd1 },
+        { 0x51, 0x22 },
+        { 0x39, 0x01 },
+        { 0x71, 0x00 },
+        { 0x28, 0x2a },
+        { 0x29, 0x00 },
+        { 0x2a, 0xff },
+        { 0x2b, 0x80 },
+        { 0x28, 0x20 },
+        { 0x29, 0x33 },
+        { 0x2a, 0xdf },
+        { 0x2b, 0xa9 },
+        { 0x3b, 0x21 },
+        { 0x3c, 0x3a },
+        { 0x01, 0x0d },
+        { 0x04, 0x08 },
+        { 0x05, 0x05 },
+        { 0x04, 0x0e },
+        { 0x05, 0x00 },
+        { 0x04, 0x0f },
+        { 0x05, 0x14 },
+        { 0x04, 0x0b },
+        { 0x05, 0x8c },
+        { 0x04, 0x00 },
+        { 0x05, 0x00 },
+        { 0x04, 0x01 },
+        { 0x05, 0x07 },
+        { 0x04, 0x02 },
+        { 0x05, 0x0f },
+        { 0x04, 0x03 },
+        { 0x05, 0xa0 },
+        { 0x04, 0x09 },
+        { 0x05, 0x00 },
+        { 0x04, 0x0a },
+        { 0x05, 0xff },
+        { 0x04, 0x27 },
+        { 0x05, 0x64 },
+        { 0x04, 0x28 },
+        { 0x05, 0x00 },
+        { 0x04, 0x1e },
+        { 0x05, 0xff },
+        { 0x04, 0x29 },
+        { 0x05, 0x0a },
+        { 0x04, 0x32 },
+        { 0x05, 0x0a },
+        { 0x04, 0x14 },
+        { 0x05, 0x02 },
+        { 0x04, 0x04 },
+        { 0x05, 0x00 },
+        { 0x04, 0x05 },
+        { 0x05, 0x22 },
+        { 0x04, 0x06 },
+        { 0x05, 0x0e },
+        { 0x04, 0x07 },
+        { 0x05, 0xd8 },
+        { 0x04, 0x12 },
+        { 0x05, 0x00 },
+        { 0x04, 0x13 },
+        { 0x05, 0xff },
+        { 0x52, 0x01 },
+        { 0x50, 0xa7 },
+        { 0x51, 0x00 },
+        { 0x50, 0xa8 },
+        { 0x51, 0xff },
+        { 0x50, 0xa9 },
+        { 0x51, 0xff },
+        { 0x50, 0xaa },
+        { 0x51, 0x00 },
+        { 0x50, 0xab },
+        { 0x51, 0xff },
+        { 0x50, 0xac },
+        { 0x51, 0xff },
+        { 0x50, 0xad },
+        { 0x51, 0x00 },
+        { 0x50, 0xae },
+        { 0x51, 0xff },
+        { 0x50, 0xaf },
+        { 0x51, 0xff },
+        { 0x5e, 0x07 },
+        { 0x50, 0xdc },
+        { 0x51, 0x01 },
+        { 0x50, 0xdd },
+        { 0x51, 0xf4 },
+        { 0x50, 0xde },
+        { 0x51, 0x01 },
+        { 0x50, 0xdf },
+        { 0x51, 0xf4 },
+        { 0x50, 0xe0 },
+        { 0x51, 0x01 },
+        { 0x50, 0xe1 },
+        { 0x51, 0xf4 },
+        { 0x50, 0xb0 },
+        { 0x51, 0x07 },
+        { 0x50, 0xb2 },
+        { 0x51, 0xff },
+        { 0x50, 0xb3 },
+        { 0x51, 0xff },
+        { 0x50, 0xb4 },
+        { 0x51, 0xff },
+        { 0x50, 0xb5 },
+        { 0x51, 0xff },
+        { 0x50, 0xb6 },
+        { 0x51, 0xff },
+        { 0x50, 0xb7 },
+        { 0x51, 0xff },
+        { 0x50, 0x50 },
+        { 0x51, 0x02 },
+        { 0x50, 0x51 },
+        { 0x51, 0x04 },
+        { 0x45, 0x04 },
+        { 0x48, 0x04 },
+        { 0x50, 0xd5 },
+        { 0x51, 0x01 },         /* Serial */
+        { 0x50, 0xd6 },
+        { 0x51, 0x1f },
+        { 0x50, 0xd2 },
+        { 0x51, 0x03 },
+        { 0x50, 0xd7 },
+        { 0x51, 0x3f },
+        { 0x1c, 0x01 },
+        { 0x28, 0x06 },
+        { 0x29, 0x00 },
+        { 0x2a, 0x00 },
+        { 0x2b, 0x03 },
+        { 0x28, 0x07 },
+        { 0x29, 0x00 },
+        { 0x2a, 0x00 },
+        { 0x2b, 0x0d },
+        { 0x28, 0x08 },
+        { 0x29, 0x00 },
+        { 0x2a, 0x00 },
+        { 0x2b, 0x02 },
+        { 0x28, 0x09 },
+        { 0x29, 0x00 },
+        { 0x2a, 0x00 },
+        { 0x2b, 0x01 },
+        { 0x28, 0x0a },
+        { 0x29, 0x00 },
+        { 0x2a, 0x00 },
+        { 0x2b, 0x21 },
+        { 0x28, 0x0b },
+        { 0x29, 0x00 },
+        { 0x2a, 0x00 },
+        { 0x2b, 0x29 },
+        { 0x28, 0x0c },
+        { 0x29, 0x00 },
+        { 0x2a, 0x00 },
+        { 0x2b, 0x16 },
+        { 0x28, 0x0d },
+        { 0x29, 0x00 },
+        { 0x2a, 0x00 },
+        { 0x2b, 0x31 },
+        { 0x28, 0x0e },
+        { 0x29, 0x00 },
+        { 0x2a, 0x00 },
+        { 0x2b, 0x0e },
+        { 0x28, 0x0f },
+        { 0x29, 0x00 },
+        { 0x2a, 0x00 },
+        { 0x2b, 0x4e },
+        { 0x28, 0x10 },
+        { 0x29, 0x00 },
+        { 0x2a, 0x00 },
+        { 0x2b, 0x46 },
+        { 0x28, 0x11 },
+        { 0x29, 0x00 },
+        { 0x2a, 0x00 },
+        { 0x2b, 0x0f },
+        { 0x28, 0x12 },
+        { 0x29, 0x00 },
+        { 0x2a, 0x00 },
+        { 0x2b, 0x56 },
+        { 0x28, 0x13 },
+        { 0x29, 0x00 },
+        { 0x2a, 0x00 },
+        { 0x2b, 0x35 },
+        { 0x28, 0x14 },
+        { 0x29, 0x00 },
+        { 0x2a, 0x01 },
+        { 0x2b, 0xbe },
+        { 0x28, 0x15 },
+        { 0x29, 0x00 },
+        { 0x2a, 0x01 },
+        { 0x2b, 0x84 },
+        { 0x28, 0x16 },
+        { 0x29, 0x00 },
+        { 0x2a, 0x03 },
+        { 0x2b, 0xee },
+        { 0x28, 0x17 },
+        { 0x29, 0x00 },
+        { 0x2a, 0x00 },
+        { 0x2b, 0x98 },
+        { 0x28, 0x18 },
+        { 0x29, 0x00 },
+        { 0x2a, 0x00 },
+        { 0x2b, 0x9f },
+        { 0x28, 0x19 },
+        { 0x29, 0x00 },
+        { 0x2a, 0x07 },
+        { 0x2b, 0xb2 },
+        { 0x28, 0x1a },
+        { 0x29, 0x00 },
+        { 0x2a, 0x06 },
+        { 0x2b, 0xc2 },
+        { 0x28, 0x1b },
+        { 0x29, 0x00 },
+        { 0x2a, 0x07 },
+        { 0x2b, 0x4a },
+        { 0x28, 0x1c },
+        { 0x29, 0x00 },
+        { 0x2a, 0x01 },
+        { 0x2b, 0xbc },
+        { 0x28, 0x1d },
+        { 0x29, 0x00 },
+        { 0x2a, 0x04 },
+        { 0x2b, 0xba },
+        { 0x28, 0x1e },
+        { 0x29, 0x00 },
+        { 0x2a, 0x06 },
+        { 0x2b, 0x14 },
+        { 0x50, 0x1e },
+        { 0x51, 0x5d },
+        { 0x50, 0x22 },
+        { 0x51, 0x00 },
+        { 0x50, 0x23 },
+        { 0x51, 0xc8 },
+        { 0x50, 0x24 },
+        { 0x51, 0x00 },
+        { 0x50, 0x25 },
+        { 0x51, 0xf0 },
+        { 0x50, 0x26 },
+        { 0x51, 0x00 },
+        { 0x50, 0x27 },
+        { 0x51, 0xc3 },
+        { 0x50, 0x39 },
+        { 0x51, 0x02 },
+        { 0x50, 0xd5 },
+        { 0x51, 0x01 },
+        { 0xd0, 0x00 },
+};
+
+static struct regdata mb86a20s_reset_reception[] = {
+        { 0x70, 0xf0 },
+        { 0x70, 0xff },
+        { 0x08, 0x01 },
+        { 0x08, 0x00 },
+};
+
+static int mb86a20s_i2c_writereg(struct mb86a20s_state *state,
+                             u8 i2c_addr, int reg, int data)
+{
+        u8 buf[] = { reg, data };
+        struct i2c_msg msg = {
+                .addr = i2c_addr, .flags = 0, .buf = buf, .len = 2
+        };
+        int rc;
+
+        rc = i2c_transfer(state->i2c, &msg, 1);
+        if (rc != 1) {
+                printk("%s: writereg error (rc == %i, reg == 0x%02x,"
+                         " data == 0x%02x)\n", __func__, rc, reg, data);
+                return rc;
+        }
+
+        return 0;
+}
+
+static int mb86a20s_i2c_writeregdata(struct mb86a20s_state *state,
+                                     u8 i2c_addr, struct regdata *rd, int size)
+{
+        int i, rc;
+
+        for (i = 0; i < size; i++) {
+                rc = mb86a20s_i2c_writereg(state, i2c_addr, rd[i].reg,
+                                           rd[i].data);
+                if (rc < 0)
+                        return rc;
+        }
+        return 0;
+}
+
+static int mb86a20s_i2c_readreg(struct mb86a20s_state *state,
+                                u8 i2c_addr, u8 reg)
+{
+        u8 val;
+        int rc;
+        struct i2c_msg msg[] = {
+                { .addr = i2c_addr, .flags = 0, .buf = &reg, .len = 1 },
+                { .addr = i2c_addr, .flags = I2C_M_RD, .buf = &val, .len = 1 }
+        };
+
+        rc = i2c_transfer(state->i2c, msg, 2);
+
+        if (rc != 2) {
+                rc("%s: reg=0x%x (error=%d)\n", __func__, reg, rc);
+                return rc;
+        }
+
+        return val;
+}
+
+#define mb86a20s_readreg(state, reg) \
+        mb86a20s_i2c_readreg(state, state->config->demod_address, reg)
+#define mb86a20s_writereg(state, reg, val) \
+        mb86a20s_i2c_writereg(state, state->config->demod_address, reg, val)
+#define mb86a20s_writeregdata(state, regdata) \
+        mb86a20s_i2c_writeregdata(state, state->config->demod_address, \
+        regdata, ARRAY_SIZE(regdata))
+
+static int mb86a20s_initfe(struct dvb_frontend *fe)
+{
+        struct mb86a20s_state *state = fe->demodulator_priv;
+        int rc;
+        u8  regD5 = 1;
+
+        dprintk("\n");
+
+        if (fe->ops.i2c_gate_ctrl)
+                fe->ops.i2c_gate_ctrl(fe, 0);
+
+        /* Initialize the frontend */
+        rc = mb86a20s_writeregdata(state, mb86a20s_init);
+        if (rc < 0)
+                goto err;
+
+        if (!state->config->is_serial) {
+                regD5 &= ~1;
+
+                rc = mb86a20s_writereg(state, 0x50, 0xd5);
+                if (rc < 0)
+                        goto err;
+                rc = mb86a20s_writereg(state, 0x51, regD5);
+                if (rc < 0)
+                        goto err;
+        }
+
+        if (fe->ops.i2c_gate_ctrl)
+                fe->ops.i2c_gate_ctrl(fe, 1);
+
+err:
+        if (rc < 0) {
+                state->need_init = true;
+                printk(KERN_INFO "mb86a20s: Init failed. Will try again later\n");
+        } else {
+                state->need_init = false;
+                dprintk("Initialization succeeded.\n");
+        }
+        return rc;
+}
+
+static int mb86a20s_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
+{
+        struct mb86a20s_state *state = fe->demodulator_priv;
+        unsigned rf_max, rf_min, rf;
+        u8       val;
+
+        dprintk("\n");
+
+        if (fe->ops.i2c_gate_ctrl)
+                fe->ops.i2c_gate_ctrl(fe, 0);
+
+        /* Does a binary search to get RF strength */
+        rf_max = 0xfff;
+        rf_min = 0;
+        do {
+                rf = (rf_max + rf_min) / 2;
+                mb86a20s_writereg(state, 0x04, 0x1f);
+                mb86a20s_writereg(state, 0x05, rf >> 8);
+                mb86a20s_writereg(state, 0x04, 0x20);
+                mb86a20s_writereg(state, 0x04, rf);
+
+                val = mb86a20s_readreg(state, 0x02);
+                if (val & 0x08)
+                        rf_min = (rf_max + rf_min) / 2;
+                else
+                        rf_max = (rf_max + rf_min) / 2;
+                if (rf_max - rf_min < 4) {
+                        *strength = (((rf_max + rf_min) / 2) * 65535) / 4095;
+                        break;
+                }
+        } while (1);
+
+        dprintk("signal strength = %d\n", *strength);
+
+        if (fe->ops.i2c_gate_ctrl)
+                fe->ops.i2c_gate_ctrl(fe, 1);
+
+        return 0;
+}
+
+static int mb86a20s_read_status(struct dvb_frontend *fe, fe_status_t *status)
+{
+        struct mb86a20s_state *state = fe->demodulator_priv;
+        u8 val;
+
+        dprintk("\n");
+        *status = 0;
+
+        if (fe->ops.i2c_gate_ctrl)
+                fe->ops.i2c_gate_ctrl(fe, 0);
+        val = mb86a20s_readreg(state, 0x0a) & 0xf;
+        if (fe->ops.i2c_gate_ctrl)
+                fe->ops.i2c_gate_ctrl(fe, 1);
+
+        if (val >= 2)
+                *status |= FE_HAS_SIGNAL;
+
+        if (val >= 4)
+                *status |= FE_HAS_CARRIER;
+
+        if (val >= 5)
+                *status |= FE_HAS_VITERBI;
+
+        if (val >= 7)
+                *status |= FE_HAS_SYNC;
+
+        if (val >= 8)                           /* Maybe 9? */
+                *status |= FE_HAS_LOCK;
+
+        dprintk("val = %d, status = 0x%02x\n", val, *status);
+
+        return 0;
+}
+
+static int mb86a20s_set_frontend(struct dvb_frontend *fe,
+        struct dvb_frontend_parameters *p)
+{
+        struct mb86a20s_state *state = fe->demodulator_priv;
+        int rc;
+
+        dprintk("\n");
+
+        if (fe->ops.i2c_gate_ctrl)
+                fe->ops.i2c_gate_ctrl(fe, 1);
+        dprintk("Calling tuner set parameters\n");
+        fe->ops.tuner_ops.set_params(fe, p);
+
+        /*
+         * Make it more reliable: if, for some reason, the initial
+         * device initialization doesn't happen, initialize it when
+         * a SBTVD parameters are adjusted.
+         *
+         * Unfortunately, due to a hard to track bug at tda829x/tda18271,
+         * the agc callback logic is not called during DVB attach time,
+         * causing mb86a20s to not be initialized with Kworld SBTVD.
+         * So, this hack is needed, in order to make Kworld SBTVD to work.
+         */
+        if (state->need_init)
+                mb86a20s_initfe(fe);
+
+        if (fe->ops.i2c_gate_ctrl)
+                fe->ops.i2c_gate_ctrl(fe, 0);
+        rc = mb86a20s_writeregdata(state, mb86a20s_reset_reception);
+        if (fe->ops.i2c_gate_ctrl)
+                fe->ops.i2c_gate_ctrl(fe, 1);
+
+        return rc;
+}
+
+static int mb86a20s_get_frontend(struct dvb_frontend *fe,
+        struct dvb_frontend_parameters *p)
+{
+
+        /* FIXME: For now, it does nothing */
+
+        fe->dtv_property_cache.bandwidth_hz = 6000000;
+        fe->dtv_property_cache.transmission_mode = TRANSMISSION_MODE_AUTO;
+        fe->dtv_property_cache.guard_interval = GUARD_INTERVAL_AUTO;
+        fe->dtv_property_cache.isdbt_partial_reception = 0;
+
+        return 0;
+}
+
+static int mb86a20s_tune(struct dvb_frontend *fe,
+                        struct dvb_frontend_parameters *params,
+                        unsigned int mode_flags,
+                        unsigned int *delay,
+                        fe_status_t *status)
+{
+        int rc = 0;
+
+        dprintk("\n");
+
+        if (params != NULL)
+                rc = mb86a20s_set_frontend(fe, params);
+
+        if (!(mode_flags & FE_TUNE_MODE_ONESHOT))
+                mb86a20s_read_status(fe, status);
+
+        return rc;
+}
+
+static void mb86a20s_release(struct dvb_frontend *fe)
+{
+        struct mb86a20s_state *state = fe->demodulator_priv;
+
+        dprintk("\n");
+
+        kfree(state);
+}
+
+static struct dvb_frontend_ops mb86a20s_ops;
+
+struct dvb_frontend *mb86a20s_attach(const struct mb86a20s_config *config,
+                                    struct i2c_adapter *i2c)
+{
+        u8      rev;
+
+        /* allocate memory for the internal state */
+        struct mb86a20s_state *state =
+                kzalloc(sizeof(struct mb86a20s_state), GFP_KERNEL);
+
+        dprintk("\n");
+        if (state == NULL) {
+                rc("Unable to kzalloc\n");
+                goto error;
+        }
+
+        /* setup the state */
+        state->config = config;
+        state->i2c = i2c;
+
+        /* create dvb_frontend */
+        memcpy(&state->frontend.ops, &mb86a20s_ops,
+                sizeof(struct dvb_frontend_ops));
+        state->frontend.demodulator_priv = state;
+
+        /* Check if it is a mb86a20s frontend */
+        rev = mb86a20s_readreg(state, 0);
+
+        if (rev == 0x13) {
+                printk(KERN_INFO "Detected a Fujitsu mb86a20s frontend\n");
+        } else {
+                printk(KERN_ERR "Frontend revision %d is unknown - aborting.\n",
+                       rev);
+                goto error;
+        }
+
+        return &state->frontend;
+
+error:
+        kfree(state);
+        return NULL;
+}
+EXPORT_SYMBOL(mb86a20s_attach);
+
+static struct dvb_frontend_ops mb86a20s_ops = {
+        /* Use dib8000 values per default */
+        .info = {
+                .name = "Fujitsu mb86A20s",
+                .type = FE_OFDM,
+                .caps = FE_CAN_INVERSION_AUTO | FE_CAN_RECOVER |
+                        FE_CAN_FEC_1_2  | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
+                        FE_CAN_FEC_5_6  | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
+                        FE_CAN_QPSK     | FE_CAN_QAM_16  | FE_CAN_QAM_64 |
+                        FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_QAM_AUTO |
+                        FE_CAN_GUARD_INTERVAL_AUTO    | FE_CAN_HIERARCHY_AUTO,
+                /* Actually, those values depend on the used tuner */
+                .frequency_min = 45000000,
+                .frequency_max = 864000000,
+                .frequency_stepsize = 62500,
+        },
+
+        .release = mb86a20s_release,
+
+        .init = mb86a20s_initfe,
+        .set_frontend = mb86a20s_set_frontend,
+        .get_frontend = mb86a20s_get_frontend,
+        .read_status = mb86a20s_read_status,
+        .read_signal_strength = mb86a20s_read_signal_strength,
+        .tune = mb86a20s_tune,
+};
+
+MODULE_DESCRIPTION("DVB Frontend module for Fujitsu mb86A20s hardware");
+MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@redhat.com>");
+MODULE_LICENSE("GPL");
diff --git a/drivers/media/dvb/frontends/mb86a20s.h b/drivers/media/dvb/frontends/mb86a20s.h
new file mode 100644
index 000000000000..bf22e77888b9
--- /dev/null
+++ b/drivers/media/dvb/frontends/mb86a20s.h
@@ -0,0 +1,52 @@
+/*
+ *   Fujitsu mb86a20s driver
+ *
+ *   Copyright (C) 2010 Mauro Carvalho Chehab <mchehab@redhat.com>
+ *
+ *   This program is free software; you can redistribute it and/or
+ *   modify it under the terms of the GNU General Public License as
+ *   published by the Free Software Foundation version 2.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ *   General Public License for more details.
+ */
+
+#ifndef MB86A20S_H
+#define MB86A20S_H
+
+#include <linux/dvb/frontend.h>
+
+/**
+ * struct mb86a20s_config - Define the per-device attributes of the frontend
+ *
+ * @demod_address:      the demodulator's i2c address
+ */
+
+struct mb86a20s_config {
+        u8 demod_address;
+        bool is_serial;
+};
+
+#if defined(CONFIG_DVB_MB86A20S) || (defined(CONFIG_DVB_MB86A20S_MODULE) \
+        && defined(MODULE))
+extern struct dvb_frontend *mb86a20s_attach(const struct mb86a20s_config *config,
+                                           struct i2c_adapter *i2c);
+extern struct i2c_adapter *mb86a20s_get_tuner_i2c_adapter(struct dvb_frontend *);
+#else
+static inline struct dvb_frontend *mb86a20s_attach(
+        const struct mb86a20s_config *config, struct i2c_adapter *i2c)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return NULL;
+}
+static struct i2c_adapter *
+        mb86a20s_get_tuner_i2c_adapter(struct dvb_frontend *fe)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return NULL;
+}
+#endif
+
+#endif /* MB86A20S */
diff --git a/drivers/media/dvb/frontends/mt312.c b/drivers/media/dvb/frontends/mt312.c
index 472907d43460..83e6f1a1b700 100644
--- a/drivers/media/dvb/frontends/mt312.c
+++ b/drivers/media/dvb/frontends/mt312.c
@@ -670,7 +670,7 @@ static int mt312_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
                 if (ret < 0)
                         goto error;
 
-                /* preserve this bit to not accidently shutdown ADC */
+                /* preserve this bit to not accidentally shutdown ADC */
                 val &= 0x80;
                 break;
         }
diff --git a/drivers/media/dvb/frontends/mt352.c b/drivers/media/dvb/frontends/mt352.c
index beba5aa0db50..319672f8e1a7 100644
--- a/drivers/media/dvb/frontends/mt352.c
+++ b/drivers/media/dvb/frontends/mt352.c
@@ -69,7 +69,7 @@ static int mt352_single_write(struct dvb_frontend *fe, u8 reg, u8 val)
         return 0;
 }
 
-static int _mt352_write(struct dvb_frontend* fe, u8* ibuf, int ilen)
+static int _mt352_write(struct dvb_frontend* fe, const u8 ibuf[], int ilen)
 {
         int err,i;
         for (i=0; i < ilen-1; i++)
diff --git a/drivers/media/dvb/frontends/mt352.h b/drivers/media/dvb/frontends/mt352.h
index 595092f9f0c4..ca2562d6f289 100644
--- a/drivers/media/dvb/frontends/mt352.h
+++ b/drivers/media/dvb/frontends/mt352.h
@@ -63,7 +63,7 @@ static inline struct dvb_frontend* mt352_attach(const struct mt352_config* confi
 }
 #endif // CONFIG_DVB_MT352
 
-static inline int mt352_write(struct dvb_frontend *fe, u8 *buf, int len) {
+static inline int mt352_write(struct dvb_frontend *fe, const u8 buf[], int len) {
         int r = 0;
         if (fe->ops.write)
                 r = fe->ops.write(fe, buf, len);
diff --git a/drivers/media/dvb/frontends/s5h1420.c b/drivers/media/dvb/frontends/s5h1420.c
index 2e9fd2893ede..17f8cdf8afef 100644
--- a/drivers/media/dvb/frontends/s5h1420.c
+++ b/drivers/media/dvb/frontends/s5h1420.c
@@ -225,7 +225,7 @@ static int s5h1420_recv_slave_reply (struct dvb_frontend* fe,
         unsigned long timeout;
         int result = 0;
 
-        /* setup for DISEQC recieve */
+        /* setup for DISEQC receive */
         val = s5h1420_readreg(state, 0x3b);
         s5h1420_writereg(state, 0x3b, 0x82); /* FIXME: guess - do we need to set DIS_RDY(0x08) in receive mode? */
         msleep(15);
@@ -920,7 +920,6 @@ struct dvb_frontend *s5h1420_attach(const struct s5h1420_config *config,
         /* create tuner i2c adapter */
         strlcpy(state->tuner_i2c_adapter.name, "S5H1420-PN1010 tuner I2C bus",
                 sizeof(state->tuner_i2c_adapter.name));
-        state->tuner_i2c_adapter.class     = I2C_CLASS_TV_DIGITAL,
         state->tuner_i2c_adapter.algo      = &s5h1420_tuner_i2c_algo;
         state->tuner_i2c_adapter.algo_data = NULL;
         i2c_set_adapdata(&state->tuner_i2c_adapter, state);
diff --git a/drivers/media/dvb/frontends/s5h1432.c b/drivers/media/dvb/frontends/s5h1432.c
new file mode 100644
index 000000000000..0c6dcb90d168
--- /dev/null
+++ b/drivers/media/dvb/frontends/s5h1432.c
@@ -0,0 +1,415 @@
+/*
+ *  Samsung s5h1432 DVB-T demodulator driver
+ *
+ *  Copyright (C) 2009 Bill Liu <Bill.Liu@Conexant.com>
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/string.h>
+#include <linux/slab.h>
+#include <linux/delay.h>
+#include "dvb_frontend.h"
+#include "s5h1432.h"
+
+struct s5h1432_state {
+
+        struct i2c_adapter *i2c;
+
+        /* configuration settings */
+        const struct s5h1432_config *config;
+
+        struct dvb_frontend frontend;
+
+        fe_modulation_t current_modulation;
+        unsigned int first_tune:1;
+
+        u32 current_frequency;
+        int if_freq;
+
+        u8 inversion;
+};
+
+static int debug;
+
+#define dprintk(arg...) do {    \
+        if (debug)              \
+                printk(arg);    \
+        } while (0)
+
+static int s5h1432_writereg(struct s5h1432_state *state,
+                            u8 addr, u8 reg, u8 data)
+{
+        int ret;
+        u8 buf[] = { reg, data };
+
+        struct i2c_msg msg = {.addr = addr, .flags = 0, .buf = buf, .len = 2 };
+
+        ret = i2c_transfer(state->i2c, &msg, 1);
+
+        if (ret != 1)
+                printk(KERN_ERR "%s: writereg error 0x%02x 0x%02x 0x%04x, "
+                       "ret == %i)\n", __func__, addr, reg, data, ret);
+
+        return (ret != 1) ? -1 : 0;
+}
+
+static u8 s5h1432_readreg(struct s5h1432_state *state, u8 addr, u8 reg)
+{
+        int ret;
+        u8 b0[] = { reg };
+        u8 b1[] = { 0 };
+
+        struct i2c_msg msg[] = {
+                {.addr = addr, .flags = 0, .buf = b0, .len = 1},
+                {.addr = addr, .flags = I2C_M_RD, .buf = b1, .len = 1}
+        };
+
+        ret = i2c_transfer(state->i2c, msg, 2);
+
+        if (ret != 2)
+                printk(KERN_ERR "%s: readreg error (ret == %i)\n",
+                       __func__, ret);
+        return b1[0];
+}
+
+static int s5h1432_sleep(struct dvb_frontend *fe)
+{
+        return 0;
+}
+
+static int s5h1432_set_channel_bandwidth(struct dvb_frontend *fe,
+                                         u32 bandwidth)
+{
+        struct s5h1432_state *state = fe->demodulator_priv;
+
+        u8 reg = 0;
+
+        /* Register [0x2E] bit 3:2 : 8MHz = 0; 7MHz = 1; 6MHz = 2 */
+        reg = s5h1432_readreg(state, S5H1432_I2C_TOP_ADDR, 0x2E);
+        reg &= ~(0x0C);
+        switch (bandwidth) {
+        case 6:
+                reg |= 0x08;
+                break;
+        case 7:
+                reg |= 0x04;
+                break;
+        case 8:
+                reg |= 0x00;
+                break;
+        default:
+                return 0;
+        }
+        s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x2E, reg);
+        return 1;
+}
+
+static int s5h1432_set_IF(struct dvb_frontend *fe, u32 ifFreqHz)
+{
+        struct s5h1432_state *state = fe->demodulator_priv;
+
+        switch (ifFreqHz) {
+        case TAIWAN_HI_IF_FREQ_44_MHZ:
+                s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe4, 0x55);
+                s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe5, 0x55);
+                s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe7, 0x15);
+                break;
+        case EUROPE_HI_IF_FREQ_36_MHZ:
+                s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe4, 0x00);
+                s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe5, 0x00);
+                s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe7, 0x40);
+                break;
+        case IF_FREQ_6_MHZ:
+                s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe4, 0x00);
+                s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe5, 0x00);
+                s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe7, 0xe0);
+                break;
+        case IF_FREQ_3point3_MHZ:
+                s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe4, 0x66);
+                s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe5, 0x66);
+                s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe7, 0xEE);
+                break;
+        case IF_FREQ_3point5_MHZ:
+                s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe4, 0x55);
+                s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe5, 0x55);
+                s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe7, 0xED);
+                break;
+        case IF_FREQ_4_MHZ:
+                s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe4, 0xAA);
+                s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe5, 0xAA);
+                s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe7, 0xEA);
+                break;
+        default:
+                {
+                        u32 value = 0;
+                        value = (u32) (((48000 - (ifFreqHz / 1000)) * 512 *
+                                        (u32) 32768) / (48 * 1000));
+                        printk(KERN_INFO
+                               "Default IFFreq %d :reg value = 0x%x\n",
+                               ifFreqHz, value);
+                        s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe4,
+                                         (u8) value & 0xFF);
+                        s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe5,
+                                         (u8) (value >> 8) & 0xFF);
+                        s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe7,
+                                         (u8) (value >> 16) & 0xFF);
+                        break;
+                }
+
+        }
+
+        return 1;
+}
+
+/* Talk to the demod, set the FEC, GUARD, QAM settings etc */
+static int s5h1432_set_frontend(struct dvb_frontend *fe,
+                                struct dvb_frontend_parameters *p)
+{
+        u32 dvb_bandwidth = 8;
+        struct s5h1432_state *state = fe->demodulator_priv;
+
+        if (p->frequency == state->current_frequency) {
+                /*current_frequency = p->frequency; */
+                /*state->current_frequency = p->frequency; */
+        } else {
+                fe->ops.tuner_ops.set_params(fe, p);
+                msleep(300);
+                s5h1432_set_channel_bandwidth(fe, dvb_bandwidth);
+                switch (p->u.ofdm.bandwidth) {
+                case BANDWIDTH_6_MHZ:
+                        dvb_bandwidth = 6;
+                        s5h1432_set_IF(fe, IF_FREQ_4_MHZ);
+                        break;
+                case BANDWIDTH_7_MHZ:
+                        dvb_bandwidth = 7;
+                        s5h1432_set_IF(fe, IF_FREQ_4_MHZ);
+                        break;
+                case BANDWIDTH_8_MHZ:
+                        dvb_bandwidth = 8;
+                        s5h1432_set_IF(fe, IF_FREQ_4_MHZ);
+                        break;
+                default:
+                        return 0;
+                }
+                /*fe->ops.tuner_ops.set_params(fe, p); */
+/*Soft Reset chip*/
+                msleep(30);
+                s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x09, 0x1a);
+                msleep(30);
+                s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x09, 0x1b);
+
+                s5h1432_set_channel_bandwidth(fe, dvb_bandwidth);
+                switch (p->u.ofdm.bandwidth) {
+                case BANDWIDTH_6_MHZ:
+                        dvb_bandwidth = 6;
+                        s5h1432_set_IF(fe, IF_FREQ_4_MHZ);
+                        break;
+                case BANDWIDTH_7_MHZ:
+                        dvb_bandwidth = 7;
+                        s5h1432_set_IF(fe, IF_FREQ_4_MHZ);
+                        break;
+                case BANDWIDTH_8_MHZ:
+                        dvb_bandwidth = 8;
+                        s5h1432_set_IF(fe, IF_FREQ_4_MHZ);
+                        break;
+                default:
+                        return 0;
+                }
+                /*fe->ops.tuner_ops.set_params(fe,p); */
+                /*Soft Reset chip*/
+                msleep(30);
+                s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x09, 0x1a);
+                msleep(30);
+                s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x09, 0x1b);
+
+        }
+
+        state->current_frequency = p->frequency;
+
+        return 0;
+}
+
+static int s5h1432_init(struct dvb_frontend *fe)
+{
+        struct s5h1432_state *state = fe->demodulator_priv;
+
+        u8 reg = 0;
+        state->current_frequency = 0;
+        printk(KERN_INFO " s5h1432_init().\n");
+
+        /*Set VSB mode as default, this also does a soft reset */
+        /*Initialize registers */
+
+        s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x04, 0xa8);
+        s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x05, 0x01);
+        s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x07, 0x70);
+        s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x19, 0x80);
+        s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x1b, 0x9D);
+        s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x1c, 0x30);
+        s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x1d, 0x20);
+        s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x1e, 0x1B);
+        s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x2e, 0x40);
+        s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x42, 0x84);
+        s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x50, 0x5a);
+        s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x5a, 0xd3);
+        s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x68, 0x50);
+        s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xb8, 0x3c);
+        s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xc4, 0x10);
+        s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xcc, 0x9c);
+        s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xDA, 0x00);
+        s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe1, 0x94);
+        /* s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xf4, 0xa1); */
+        s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xf9, 0x00);
+
+        /*For NXP tuner*/
+
+        /*Set 3.3MHz as default IF frequency */
+        s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe4, 0x66);
+        s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe5, 0x66);
+        s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe7, 0xEE);
+        /* Set reg 0x1E to get the full dynamic range */
+        s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x1e, 0x31);
+
+        /* Mode setting in demod */
+        reg = s5h1432_readreg(state, S5H1432_I2C_TOP_ADDR, 0x42);
+        reg |= 0x80;
+        s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x42, reg);
+        /* Serial mode */
+
+        /* Soft Reset chip */
+
+        s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x09, 0x1a);
+        msleep(30);
+        s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x09, 0x1b);
+
+
+        return 0;
+}
+
+static int s5h1432_read_status(struct dvb_frontend *fe, fe_status_t *status)
+{
+        return 0;
+}
+
+static int s5h1432_read_signal_strength(struct dvb_frontend *fe,
+                                        u16 *signal_strength)
+{
+        return 0;
+}
+
+static int s5h1432_read_snr(struct dvb_frontend *fe, u16 *snr)
+{
+        return 0;
+}
+
+static int s5h1432_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
+{
+
+        return 0;
+}
+
+static int s5h1432_read_ber(struct dvb_frontend *fe, u32 *ber)
+{
+        return 0;
+}
+
+static int s5h1432_get_frontend(struct dvb_frontend *fe,
+                                struct dvb_frontend_parameters *p)
+{
+        return 0;
+}
+
+static int s5h1432_get_tune_settings(struct dvb_frontend *fe,
+                                     struct dvb_frontend_tune_settings *tune)
+{
+        return 0;
+}
+
+static void s5h1432_release(struct dvb_frontend *fe)
+{
+        struct s5h1432_state *state = fe->demodulator_priv;
+        kfree(state);
+}
+
+static struct dvb_frontend_ops s5h1432_ops;
+
+struct dvb_frontend *s5h1432_attach(const struct s5h1432_config *config,
+                                    struct i2c_adapter *i2c)
+{
+        struct s5h1432_state *state = NULL;
+
+        printk(KERN_INFO " Enter s5h1432_attach(). attach success!\n");
+        /* allocate memory for the internal state */
+        state = kmalloc(sizeof(struct s5h1432_state), GFP_KERNEL);
+        if (state == NULL)
+                goto error;
+
+        /* setup the state */
+        state->config = config;
+        state->i2c = i2c;
+        state->current_modulation = QAM_16;
+        state->inversion = state->config->inversion;
+
+        /* create dvb_frontend */
+        memcpy(&state->frontend.ops, &s5h1432_ops,
+               sizeof(struct dvb_frontend_ops));
+
+        state->frontend.demodulator_priv = state;
+
+        return &state->frontend;
+
+error:
+        kfree(state);
+        return NULL;
+}
+EXPORT_SYMBOL(s5h1432_attach);
+
+static struct dvb_frontend_ops s5h1432_ops = {
+
+        .info = {
+                 .name = "Samsung s5h1432 DVB-T Frontend",
+                 .type = FE_OFDM,
+                 .frequency_min = 177000000,
+                 .frequency_max = 858000000,
+                 .frequency_stepsize = 166666,
+                 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
+                 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
+                 FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_AUTO |
+                 FE_CAN_HIERARCHY_AUTO | FE_CAN_GUARD_INTERVAL_AUTO |
+                 FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_RECOVER},
+
+        .init = s5h1432_init,
+        .sleep = s5h1432_sleep,
+        .set_frontend = s5h1432_set_frontend,
+        .get_frontend = s5h1432_get_frontend,
+        .get_tune_settings = s5h1432_get_tune_settings,
+        .read_status = s5h1432_read_status,
+        .read_ber = s5h1432_read_ber,
+        .read_signal_strength = s5h1432_read_signal_strength,
+        .read_snr = s5h1432_read_snr,
+        .read_ucblocks = s5h1432_read_ucblocks,
+        .release = s5h1432_release,
+};
+
+module_param(debug, int, 0644);
+MODULE_PARM_DESC(debug, "Enable verbose debug messages");
+
+MODULE_DESCRIPTION("Samsung s5h1432 DVB-T Demodulator driver");
+MODULE_AUTHOR("Bill Liu");
+MODULE_LICENSE("GPL");
diff --git a/drivers/media/dvb/frontends/s5h1432.h b/drivers/media/dvb/frontends/s5h1432.h
new file mode 100644
index 000000000000..b57438c32546
--- /dev/null
+++ b/drivers/media/dvb/frontends/s5h1432.h
@@ -0,0 +1,91 @@
+/*
+ *  Samsung s5h1432 VSB/QAM demodulator driver
+ *
+ *  Copyright (C) 2009 Bill Liu <Bill.Liu@Conexant.com>
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+
+#ifndef __S5H1432_H__
+#define __S5H1432_H__
+
+#include <linux/dvb/frontend.h>
+
+#define S5H1432_I2C_TOP_ADDR (0x02 >> 1)
+
+#define TAIWAN_HI_IF_FREQ_44_MHZ 44000000
+#define EUROPE_HI_IF_FREQ_36_MHZ 36000000
+#define IF_FREQ_6_MHZ             6000000
+#define IF_FREQ_3point3_MHZ       3300000
+#define IF_FREQ_3point5_MHZ       3500000
+#define IF_FREQ_4_MHZ             4000000
+
+struct s5h1432_config {
+
+        /* serial/parallel output */
+#define S5H1432_PARALLEL_OUTPUT 0
+#define S5H1432_SERIAL_OUTPUT   1
+        u8 output_mode;
+
+        /* GPIO Setting */
+#define S5H1432_GPIO_OFF 0
+#define S5H1432_GPIO_ON  1
+        u8 gpio;
+
+        /* MPEG signal timing */
+#define S5H1432_MPEGTIMING_CONTINOUS_INVERTING_CLOCK       0
+#define S5H1432_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK    1
+#define S5H1432_MPEGTIMING_NONCONTINOUS_INVERTING_CLOCK    2
+#define S5H1432_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK 3
+        u16 mpeg_timing;
+
+        /* IF Freq for QAM and VSB in KHz */
+#define S5H1432_IF_3250  3250
+#define S5H1432_IF_3500  3500
+#define S5H1432_IF_4000  4000
+#define S5H1432_IF_5380  5380
+#define S5H1432_IF_44000 44000
+#define S5H1432_VSB_IF_DEFAULT s5h1432_IF_44000
+#define S5H1432_QAM_IF_DEFAULT s5h1432_IF_44000
+        u16 qam_if;
+        u16 vsb_if;
+
+        /* Spectral Inversion */
+#define S5H1432_INVERSION_OFF 0
+#define S5H1432_INVERSION_ON  1
+        u8 inversion;
+
+        /* Return lock status based on tuner lock, or demod lock */
+#define S5H1432_TUNERLOCKING 0
+#define S5H1432_DEMODLOCKING 1
+        u8 status_mode;
+};
+
+#if defined(CONFIG_DVB_S5H1432) || \
+        (defined(CONFIG_DVB_S5H1432_MODULE) && defined(MODULE))
+extern struct dvb_frontend *s5h1432_attach(const struct s5h1432_config *config,
+                                           struct i2c_adapter *i2c);
+#else
+static inline struct dvb_frontend *s5h1432_attach(const struct s5h1432_config
+                                                  *config,
+                                                  struct i2c_adapter *i2c)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return NULL;
+}
+#endif /* CONFIG_DVB_s5h1432 */
+
+#endif /* __s5h1432_H__ */
diff --git a/drivers/media/dvb/frontends/s921.c b/drivers/media/dvb/frontends/s921.c
new file mode 100644
index 000000000000..ca0103d5f148
--- /dev/null
+++ b/drivers/media/dvb/frontends/s921.c
@@ -0,0 +1,548 @@
+/*
+ *   Sharp VA3A5JZ921 One Seg Broadcast Module driver
+ *   This device is labeled as just S. 921 at the top of the frontend can
+ *
+ *   Copyright (C) 2009-2010 Mauro Carvalho Chehab <mchehab@redhat.com>
+ *   Copyright (C) 2009-2010 Douglas Landgraf <dougsland@redhat.com>
+ *
+ *   Developed for Leadership SBTVD 1seg device sold in Brazil
+ *
+ *   Frontend module based on cx24123 driver, getting some info from
+ *      the old s921 driver.
+ *
+ *   FIXME: Need to port to DVB v5.2 API
+ *
+ *   This program is free software; you can redistribute it and/or
+ *   modify it under the terms of the GNU General Public License as
+ *   published by the Free Software Foundation version 2.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ *   General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <asm/div64.h>
+
+#include "dvb_frontend.h"
+#include "s921.h"
+
+static int debug = 1;
+module_param(debug, int, 0644);
+MODULE_PARM_DESC(debug, "Activates frontend debugging (default:0)");
+
+#define rc(args...)  do {                                               \
+        printk(KERN_ERR  "s921: " args);                                \
+} while (0)
+
+#define dprintk(args...)                                                \
+        do {                                                            \
+                if (debug) {                                            \
+                        printk(KERN_DEBUG "s921: %s: ", __func__);      \
+                        printk(args);                                   \
+                }                                                       \
+        } while (0)
+
+struct s921_state {
+        struct i2c_adapter *i2c;
+        const struct s921_config *config;
+
+        struct dvb_frontend frontend;
+
+        /* The Demod can't easily provide these, we cache them */
+        u32 currentfreq;
+};
+
+/*
+ * Various tuner defaults need to be established for a given frequency kHz.
+ * fixme: The bounds on the bands do not match the doc in real life.
+ * fixme: Some of them have been moved, other might need adjustment.
+ */
+static struct s921_bandselect_val {
+        u32 freq_low;
+        u8  band_reg;
+} s921_bandselect[] = {
+        {         0, 0x7b },
+        { 485140000, 0x5b },
+        { 515140000, 0x3b },
+        { 545140000, 0x1b },
+        { 599140000, 0xfb },
+        { 623140000, 0xdb },
+        { 659140000, 0xbb },
+        { 713140000, 0x9b },
+};
+
+struct regdata {
+        u8 reg;
+        u8 data;
+};
+
+static struct regdata s921_init[] = {
+        { 0x01, 0x80 },         /* Probably, a reset sequence */
+        { 0x01, 0x40 },
+        { 0x01, 0x80 },
+        { 0x01, 0x40 },
+
+        { 0x02, 0x00 },
+        { 0x03, 0x40 },
+        { 0x04, 0x01 },
+        { 0x05, 0x00 },
+        { 0x06, 0x00 },
+        { 0x07, 0x00 },
+        { 0x08, 0x00 },
+        { 0x09, 0x00 },
+        { 0x0a, 0x00 },
+        { 0x0b, 0x5a },
+        { 0x0c, 0x00 },
+        { 0x0d, 0x00 },
+        { 0x0f, 0x00 },
+        { 0x13, 0x1b },
+        { 0x14, 0x80 },
+        { 0x15, 0x40 },
+        { 0x17, 0x70 },
+        { 0x18, 0x01 },
+        { 0x19, 0x12 },
+        { 0x1a, 0x01 },
+        { 0x1b, 0x12 },
+        { 0x1c, 0xa0 },
+        { 0x1d, 0x00 },
+        { 0x1e, 0x0a },
+        { 0x1f, 0x08 },
+        { 0x20, 0x40 },
+        { 0x21, 0xff },
+        { 0x22, 0x4c },
+        { 0x23, 0x4e },
+        { 0x24, 0x4c },
+        { 0x25, 0x00 },
+        { 0x26, 0x00 },
+        { 0x27, 0xf4 },
+        { 0x28, 0x60 },
+        { 0x29, 0x88 },
+        { 0x2a, 0x40 },
+        { 0x2b, 0x40 },
+        { 0x2c, 0xff },
+        { 0x2d, 0x00 },
+        { 0x2e, 0xff },
+        { 0x2f, 0x00 },
+        { 0x30, 0x20 },
+        { 0x31, 0x06 },
+        { 0x32, 0x0c },
+        { 0x34, 0x0f },
+        { 0x37, 0xfe },
+        { 0x38, 0x00 },
+        { 0x39, 0x63 },
+        { 0x3a, 0x10 },
+        { 0x3b, 0x10 },
+        { 0x47, 0x00 },
+        { 0x49, 0xe5 },
+        { 0x4b, 0x00 },
+        { 0x50, 0xc0 },
+        { 0x52, 0x20 },
+        { 0x54, 0x5a },
+        { 0x55, 0x5b },
+        { 0x56, 0x40 },
+        { 0x57, 0x70 },
+        { 0x5c, 0x50 },
+        { 0x5d, 0x00 },
+        { 0x62, 0x17 },
+        { 0x63, 0x2f },
+        { 0x64, 0x6f },
+        { 0x68, 0x00 },
+        { 0x69, 0x89 },
+        { 0x6a, 0x00 },
+        { 0x6b, 0x00 },
+        { 0x6c, 0x00 },
+        { 0x6d, 0x00 },
+        { 0x6e, 0x00 },
+        { 0x70, 0x10 },
+        { 0x71, 0x00 },
+        { 0x75, 0x00 },
+        { 0x76, 0x30 },
+        { 0x77, 0x01 },
+        { 0xaf, 0x00 },
+        { 0xb0, 0xa0 },
+        { 0xb2, 0x3d },
+        { 0xb3, 0x25 },
+        { 0xb4, 0x8b },
+        { 0xb5, 0x4b },
+        { 0xb6, 0x3f },
+        { 0xb7, 0xff },
+        { 0xb8, 0xff },
+        { 0xb9, 0xfc },
+        { 0xba, 0x00 },
+        { 0xbb, 0x00 },
+        { 0xbc, 0x00 },
+        { 0xd0, 0x30 },
+        { 0xe4, 0x84 },
+        { 0xf0, 0x48 },
+        { 0xf1, 0x19 },
+        { 0xf2, 0x5a },
+        { 0xf3, 0x8e },
+        { 0xf4, 0x2d },
+        { 0xf5, 0x07 },
+        { 0xf6, 0x5a },
+        { 0xf7, 0xba },
+        { 0xf8, 0xd7 },
+};
+
+static struct regdata s921_prefreq[] = {
+        { 0x47, 0x60 },
+        { 0x68, 0x00 },
+        { 0x69, 0x89 },
+        { 0xf0, 0x48 },
+        { 0xf1, 0x19 },
+};
+
+static struct regdata s921_postfreq[] = {
+        { 0xf5, 0xae },
+        { 0xf6, 0xb7 },
+        { 0xf7, 0xba },
+        { 0xf8, 0xd7 },
+        { 0x68, 0x0a },
+        { 0x69, 0x09 },
+};
+
+static int s921_i2c_writereg(struct s921_state *state,
+                             u8 i2c_addr, int reg, int data)
+{
+        u8 buf[] = { reg, data };
+        struct i2c_msg msg = {
+                .addr = i2c_addr, .flags = 0, .buf = buf, .len = 2
+        };
+        int rc;
+
+        rc = i2c_transfer(state->i2c, &msg, 1);
+        if (rc != 1) {
+                printk("%s: writereg rcor(rc == %i, reg == 0x%02x,"
+                         " data == 0x%02x)\n", __func__, rc, reg, data);
+                return rc;
+        }
+
+        return 0;
+}
+
+static int s921_i2c_writeregdata(struct s921_state *state, u8 i2c_addr,
+                                 struct regdata *rd, int size)
+{
+        int i, rc;
+
+        for (i = 0; i < size; i++) {
+                rc = s921_i2c_writereg(state, i2c_addr, rd[i].reg, rd[i].data);
+                if (rc < 0)
+                        return rc;
+        }
+        return 0;
+}
+
+static int s921_i2c_readreg(struct s921_state *state, u8 i2c_addr, u8 reg)
+{
+        u8 val;
+        int rc;
+        struct i2c_msg msg[] = {
+                { .addr = i2c_addr, .flags = 0, .buf = &reg, .len = 1 },
+                { .addr = i2c_addr, .flags = I2C_M_RD, .buf = &val, .len = 1 }
+        };
+
+        rc = i2c_transfer(state->i2c, msg, 2);
+
+        if (rc != 2) {
+                rc("%s: reg=0x%x (rcor=%d)\n", __func__, reg, rc);
+                return rc;
+        }
+
+        return val;
+}
+
+#define s921_readreg(state, reg) \
+        s921_i2c_readreg(state, state->config->demod_address, reg)
+#define s921_writereg(state, reg, val) \
+        s921_i2c_writereg(state, state->config->demod_address, reg, val)
+#define s921_writeregdata(state, regdata) \
+        s921_i2c_writeregdata(state, state->config->demod_address, \
+        regdata, ARRAY_SIZE(regdata))
+
+static int s921_pll_tune(struct dvb_frontend *fe,
+        struct dvb_frontend_parameters *p)
+{
+        struct s921_state *state = fe->demodulator_priv;
+        int band, rc, i;
+        unsigned long f_offset;
+        u8 f_switch;
+        u64 offset;
+
+        dprintk("frequency=%i\n", p->frequency);
+
+        for (band = 0; band < ARRAY_SIZE(s921_bandselect); band++)
+                if (p->frequency < s921_bandselect[band].freq_low)
+                        break;
+        band--;
+
+        if (band < 0) {
+                rc("%s: frequency out of range\n", __func__);
+                return -EINVAL;
+        }
+
+        f_switch = s921_bandselect[band].band_reg;
+
+        offset = ((u64)p->frequency) * 258;
+        do_div(offset, 6000000);
+        f_offset = ((unsigned long)offset) + 2321;
+
+        rc = s921_writeregdata(state, s921_prefreq);
+        if (rc < 0)
+                return rc;
+
+        rc = s921_writereg(state, 0xf2, (f_offset >> 8) & 0xff);
+        if (rc < 0)
+                return rc;
+
+        rc = s921_writereg(state, 0xf3, f_offset & 0xff);
+        if (rc < 0)
+                return rc;
+
+        rc = s921_writereg(state, 0xf4, f_switch);
+        if (rc < 0)
+                return rc;
+
+        rc = s921_writeregdata(state, s921_postfreq);
+        if (rc < 0)
+                return rc;
+
+        for (i = 0 ; i < 6; i++) {
+                rc = s921_readreg(state, 0x80);
+                dprintk("status 0x80: %02x\n", rc);
+        }
+        rc = s921_writereg(state, 0x01, 0x40);
+        if (rc < 0)
+                return rc;
+
+        rc = s921_readreg(state, 0x01);
+        dprintk("status 0x01: %02x\n", rc);
+
+        rc = s921_readreg(state, 0x80);
+        dprintk("status 0x80: %02x\n", rc);
+
+        rc = s921_readreg(state, 0x80);
+        dprintk("status 0x80: %02x\n", rc);
+
+        rc = s921_readreg(state, 0x32);
+        dprintk("status 0x32: %02x\n", rc);
+
+        dprintk("pll tune band=%d, pll=%d\n", f_switch, (int)f_offset);
+
+        return 0;
+}
+
+static int s921_initfe(struct dvb_frontend *fe)
+{
+        struct s921_state *state = fe->demodulator_priv;
+        int rc;
+
+        dprintk("\n");
+
+        rc = s921_writeregdata(state, s921_init);
+        if (rc < 0)
+                return rc;
+
+        return 0;
+}
+
+static int s921_read_status(struct dvb_frontend *fe, fe_status_t *status)
+{
+        struct s921_state *state = fe->demodulator_priv;
+        int regstatus, rc;
+
+        *status = 0;
+
+        rc = s921_readreg(state, 0x81);
+        if (rc < 0)
+                return rc;
+
+        regstatus = rc << 8;
+
+        rc = s921_readreg(state, 0x82);
+        if (rc < 0)
+                return rc;
+
+        regstatus |= rc;
+
+        dprintk("status = %04x\n", regstatus);
+
+        /* Full Sync - We don't know what each bit means on regs 0x81/0x82 */
+        if ((regstatus & 0xff) == 0x40) {
+                *status = FE_HAS_SIGNAL  |
+                          FE_HAS_CARRIER |
+                          FE_HAS_VITERBI |
+                          FE_HAS_SYNC    |
+                          FE_HAS_LOCK;
+        } else if (regstatus & 0x40) {
+                /* This is close to Full Sync, but not enough to get useful info */
+                *status = FE_HAS_SIGNAL  |
+                          FE_HAS_CARRIER |
+                          FE_HAS_VITERBI |
+                          FE_HAS_SYNC;
+        }
+
+        return 0;
+}
+
+static int s921_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
+{
+        fe_status_t     status;
+        struct s921_state *state = fe->demodulator_priv;
+        int rc;
+
+        /* FIXME: Use the proper register for it... 0x80? */
+        rc = s921_read_status(fe, &status);
+        if (rc < 0)
+                return rc;
+
+        *strength = (status & FE_HAS_LOCK) ? 0xffff : 0;
+
+        dprintk("strength = 0x%04x\n", *strength);
+
+        rc = s921_readreg(state, 0x01);
+        dprintk("status 0x01: %02x\n", rc);
+
+        rc = s921_readreg(state, 0x80);
+        dprintk("status 0x80: %02x\n", rc);
+
+        rc = s921_readreg(state, 0x32);
+        dprintk("status 0x32: %02x\n", rc);
+
+        return 0;
+}
+
+static int s921_set_frontend(struct dvb_frontend *fe,
+        struct dvb_frontend_parameters *p)
+{
+        struct s921_state *state = fe->demodulator_priv;
+        int rc;
+
+        dprintk("\n");
+
+        /* FIXME: We don't know how to use non-auto mode */
+
+        rc = s921_pll_tune(fe, p);
+        if (rc < 0)
+                return rc;
+
+        state->currentfreq = p->frequency;
+
+        return 0;
+}
+
+static int s921_get_frontend(struct dvb_frontend *fe,
+        struct dvb_frontend_parameters *p)
+{
+        struct s921_state *state = fe->demodulator_priv;
+
+        /* FIXME: Probably it is possible to get it from regs f1 and f2 */
+        p->frequency = state->currentfreq;
+
+        return 0;
+}
+
+static int s921_tune(struct dvb_frontend *fe,
+                        struct dvb_frontend_parameters *params,
+                        unsigned int mode_flags,
+                        unsigned int *delay,
+                        fe_status_t *status)
+{
+        int rc = 0;
+
+        dprintk("\n");
+
+        if (params != NULL)
+                rc = s921_set_frontend(fe, params);
+
+        if (!(mode_flags & FE_TUNE_MODE_ONESHOT))
+                s921_read_status(fe, status);
+
+        return rc;
+}
+
+static int s921_get_algo(struct dvb_frontend *fe)
+{
+        return 1; /* FE_ALGO_HW */
+}
+
+static void s921_release(struct dvb_frontend *fe)
+{
+        struct s921_state *state = fe->demodulator_priv;
+
+        dprintk("\n");
+        kfree(state);
+}
+
+static struct dvb_frontend_ops s921_ops;
+
+struct dvb_frontend *s921_attach(const struct s921_config *config,
+                                    struct i2c_adapter *i2c)
+{
+        /* allocate memory for the internal state */
+        struct s921_state *state =
+                kzalloc(sizeof(struct s921_state), GFP_KERNEL);
+
+        dprintk("\n");
+        if (state == NULL) {
+                rc("Unable to kzalloc\n");
+                goto rcor;
+        }
+
+        /* setup the state */
+        state->config = config;
+        state->i2c = i2c;
+
+        /* create dvb_frontend */
+        memcpy(&state->frontend.ops, &s921_ops,
+                sizeof(struct dvb_frontend_ops));
+        state->frontend.demodulator_priv = state;
+
+        return &state->frontend;
+
+rcor:
+        kfree(state);
+
+        return NULL;
+}
+EXPORT_SYMBOL(s921_attach);
+
+static struct dvb_frontend_ops s921_ops = {
+        /* Use dib8000 values per default */
+        .info = {
+                .name = "Sharp S921",
+                .type = FE_OFDM,
+                .frequency_min = 470000000,
+                /*
+                 * Max should be 770MHz instead, according with Sharp docs,
+                 * but Leadership doc says it works up to 806 MHz. This is
+                 * required to get channel 69, used in Brazil
+                 */
+                .frequency_max = 806000000,
+                .frequency_tolerance = 0,
+                 .caps = FE_CAN_INVERSION_AUTO |
+                         FE_CAN_FEC_1_2  | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
+                         FE_CAN_FEC_5_6  | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
+                         FE_CAN_QPSK     | FE_CAN_QAM_16 | FE_CAN_QAM_64 |
+                         FE_CAN_QAM_AUTO | FE_CAN_TRANSMISSION_MODE_AUTO |
+                         FE_CAN_GUARD_INTERVAL_AUTO | FE_CAN_RECOVER |
+                         FE_CAN_HIERARCHY_AUTO,
+        },
+
+        .release = s921_release,
+
+        .init = s921_initfe,
+        .set_frontend = s921_set_frontend,
+        .get_frontend = s921_get_frontend,
+        .read_status = s921_read_status,
+        .read_signal_strength = s921_read_signal_strength,
+        .tune = s921_tune,
+        .get_frontend_algo = s921_get_algo,
+};
+
+MODULE_DESCRIPTION("DVB Frontend module for Sharp S921 hardware");
+MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@redhat.com>");
+MODULE_AUTHOR("Douglas Landgraf <dougsland@redhat.com>");
+MODULE_LICENSE("GPL");
diff --git a/drivers/media/dvb/frontends/s921.h b/drivers/media/dvb/frontends/s921.h
new file mode 100644
index 000000000000..f220d8299c81
--- /dev/null
+++ b/drivers/media/dvb/frontends/s921.h
@@ -0,0 +1,47 @@
+/*
+ *   Sharp s921 driver
+ *
+ *   Copyright (C) 2009 Mauro Carvalho Chehab <mchehab@redhat.com>
+ *   Copyright (C) 2009 Douglas Landgraf <dougsland@redhat.com>
+ *
+ *   This program is free software; you can redistribute it and/or
+ *   modify it under the terms of the GNU General Public License as
+ *   published by the Free Software Foundation version 2.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ *   General Public License for more details.
+ */
+
+#ifndef S921_H
+#define S921_H
+
+#include <linux/dvb/frontend.h>
+
+struct s921_config {
+        /* the demodulator's i2c address */
+        u8 demod_address;
+};
+
+#if defined(CONFIG_DVB_S921) || (defined(CONFIG_DVB_S921_MODULE) \
+        && defined(MODULE))
+extern struct dvb_frontend *s921_attach(const struct s921_config *config,
+                                           struct i2c_adapter *i2c);
+extern struct i2c_adapter *s921_get_tuner_i2c_adapter(struct dvb_frontend *);
+#else
+static inline struct dvb_frontend *s921_attach(
+        const struct s921_config *config, struct i2c_adapter *i2c)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return NULL;
+}
+static struct i2c_adapter *
+        s921_get_tuner_i2c_adapter(struct dvb_frontend *fe)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return NULL;
+}
+#endif
+
+#endif /* S921_H */
diff --git a/drivers/media/dvb/frontends/s921_core.c b/drivers/media/dvb/frontends/s921_core.c
deleted file mode 100644
index 974b52be9aea..000000000000
--- a/drivers/media/dvb/frontends/s921_core.c
+++ /dev/null
@@ -1,216 +0,0 @@
-/*
- * Driver for Sharp s921 driver
- *
- * Copyright (C) 2008 Markus Rechberger <mrechberger@sundtek.de>
- *
- */
-
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/delay.h>
-#include "s921_core.h"
-
-static int s921_isdb_init(struct s921_isdb_t *dev);
-static int s921_isdb_set_parameters(struct s921_isdb_t *dev, struct s921_isdb_t_transmission_mode_params *params);
-static int s921_isdb_tune(struct s921_isdb_t *dev, struct s921_isdb_t_tune_params *params);
-static int s921_isdb_get_status(struct s921_isdb_t *dev, void *data);
-
-static u8 init_table[]={ 0x01, 0x40, 0x02, 0x00, 0x03, 0x40, 0x04, 0x01,
-                         0x05, 0x00, 0x06, 0x00, 0x07, 0x00, 0x08, 0x00,
-                         0x09, 0x00, 0x0a, 0x00, 0x0b, 0x5a, 0x0c, 0x00,
-                         0x0d, 0x00, 0x0f, 0x00, 0x13, 0x1b, 0x14, 0x80,
-                         0x15, 0x40, 0x17, 0x70, 0x18, 0x01, 0x19, 0x12,
-                         0x1a, 0x01, 0x1b, 0x12, 0x1c, 0xa0, 0x1d, 0x00,
-                         0x1e, 0x0a, 0x1f, 0x08, 0x20, 0x40, 0x21, 0xff,
-                         0x22, 0x4c, 0x23, 0x4e, 0x24, 0x4c, 0x25, 0x00,
-                         0x26, 0x00, 0x27, 0xf4, 0x28, 0x60, 0x29, 0x88,
-                         0x2a, 0x40, 0x2b, 0x40, 0x2c, 0xff, 0x2d, 0x00,
-                         0x2e, 0xff, 0x2f, 0x00, 0x30, 0x20, 0x31, 0x06,
-                         0x32, 0x0c, 0x34, 0x0f, 0x37, 0xfe, 0x38, 0x00,
-                         0x39, 0x63, 0x3a, 0x10, 0x3b, 0x10, 0x47, 0x00,
-                         0x49, 0xe5, 0x4b, 0x00, 0x50, 0xc0, 0x52, 0x20,
-                         0x54, 0x5a, 0x55, 0x5b, 0x56, 0x40, 0x57, 0x70,
-                         0x5c, 0x50, 0x5d, 0x00, 0x62, 0x17, 0x63, 0x2f,
-                         0x64, 0x6f, 0x68, 0x00, 0x69, 0x89, 0x6a, 0x00,
-                         0x6b, 0x00, 0x6c, 0x00, 0x6d, 0x00, 0x6e, 0x00,
-                         0x70, 0x00, 0x71, 0x00, 0x75, 0x00, 0x76, 0x30,
-                         0x77, 0x01, 0xaf, 0x00, 0xb0, 0xa0, 0xb2, 0x3d,
-                         0xb3, 0x25, 0xb4, 0x8b, 0xb5, 0x4b, 0xb6, 0x3f,
-                         0xb7, 0xff, 0xb8, 0xff, 0xb9, 0xfc, 0xba, 0x00,
-                         0xbb, 0x00, 0xbc, 0x00, 0xd0, 0x30, 0xe4, 0x84,
-                         0xf0, 0x48, 0xf1, 0x19, 0xf2, 0x5a, 0xf3, 0x8e,
-                         0xf4, 0x2d, 0xf5, 0x07, 0xf6, 0x5a, 0xf7, 0xba,
-                         0xf8, 0xd7 };
-
-static u8 c_table[]={ 0x58, 0x8a, 0x7b, 0x59, 0x8c, 0x7b, 0x5a, 0x8e, 0x5b,
-                      0x5b, 0x90, 0x5b, 0x5c, 0x92, 0x5b, 0x5d, 0x94, 0x5b,
-                      0x5e, 0x96, 0x5b, 0x5f, 0x98, 0x3b, 0x60, 0x9a, 0x3b,
-                      0x61, 0x9c, 0x3b, 0x62, 0x9e, 0x3b, 0x63, 0xa0, 0x3b,
-                      0x64, 0xa2, 0x1b, 0x65, 0xa4, 0x1b, 0x66, 0xa6, 0x1b,
-                      0x67, 0xa8, 0x1b, 0x68, 0xaa, 0x1b, 0x69, 0xac, 0x1b,
-                      0x6a, 0xae, 0x1b, 0x6b, 0xb0, 0x1b, 0x6c, 0xb2, 0x1b,
-                      0x6d, 0xb4, 0xfb, 0x6e, 0xb6, 0xfb, 0x6f, 0xb8, 0xfb,
-                      0x70, 0xba, 0xfb, 0x71, 0xbc, 0xdb, 0x72, 0xbe, 0xdb,
-                      0x73, 0xc0, 0xdb, 0x74, 0xc2, 0xdb, 0x75, 0xc4, 0xdb,
-                      0x76, 0xc6, 0xdb, 0x77, 0xc8, 0xbb, 0x78, 0xca, 0xbb,
-                      0x79, 0xcc, 0xbb, 0x7a, 0xce, 0xbb, 0x7b, 0xd0, 0xbb,
-                      0x7c, 0xd2, 0xbb, 0x7d, 0xd4, 0xbb, 0x7e, 0xd6, 0xbb,
-                      0x7f, 0xd8, 0xbb, 0x80, 0xda, 0x9b, 0x81, 0xdc, 0x9b,
-                      0x82, 0xde, 0x9b, 0x83, 0xe0, 0x9b, 0x84, 0xe2, 0x9b,
-                      0x85, 0xe4, 0x9b, 0x86, 0xe6, 0x9b, 0x87, 0xe8, 0x9b,
-                      0x88, 0xea, 0x9b, 0x89, 0xec, 0x9b };
-
-int s921_isdb_cmd(struct s921_isdb_t *dev, u32 cmd, void *data) {
-        switch(cmd) {
-        case ISDB_T_CMD_INIT:
-                s921_isdb_init(dev);
-                break;
-        case ISDB_T_CMD_SET_PARAM:
-                s921_isdb_set_parameters(dev, data);
-                break;
-        case ISDB_T_CMD_TUNE:
-                s921_isdb_tune(dev, data);
-                break;
-        case ISDB_T_CMD_GET_STATUS:
-                s921_isdb_get_status(dev, data);
-                break;
-        default:
-                printk("unhandled command\n");
-                return -EINVAL;
-        }
-        return 0;
-}
-
-static int s921_isdb_init(struct s921_isdb_t *dev) {
-        unsigned int i;
-        unsigned int ret;
-        printk("isdb_init\n");
-        for (i = 0; i < sizeof(init_table); i+=2) {
-                ret = dev->i2c_write(dev->priv_dev, init_table[i], init_table[i+1]);
-                if (ret != 0) {
-                        printk("i2c write failed\n");
-                        return ret;
-                }
-        }
-        return 0;
-}
-
-static int s921_isdb_set_parameters(struct s921_isdb_t *dev, struct s921_isdb_t_transmission_mode_params *params) {
-
-        int ret;
-        /* auto is sufficient for now, lateron this should be reflected in an extra interface */
-
-
-
-        ret = dev->i2c_write(dev->priv_dev, 0xb0, 0xa0); //mod_b2);
-        ret = dev->i2c_write(dev->priv_dev, 0xb2, 0x3d); //mod_b2);
-
-        if (ret < 0)
-                return -EINVAL;
-
-        ret = dev->i2c_write(dev->priv_dev, 0xb3, 0x25); //mod_b3);
-        if (ret < 0)
-                return -EINVAL;
-
-        ret = dev->i2c_write(dev->priv_dev, 0xb4, 0x8b); //mod_b4);
-        if (ret < 0)
-                return -EINVAL;
-
-        ret = dev->i2c_write(dev->priv_dev, 0xb5, 0x4b); //mod_b5);
-        if (ret < 0)
-                return -EINVAL;
-
-        ret = dev->i2c_write(dev->priv_dev, 0xb6, 0x3f); //mod_b6);
-        if (ret < 0)
-                return -EINVAL;
-
-        ret = dev->i2c_write(dev->priv_dev, 0xb7, 0x3f); //mod_b7);
-        if (ret < 0)
-                return -EINVAL;
-
-        return E_OK;
-}
-
-static int s921_isdb_tune(struct s921_isdb_t *dev, struct s921_isdb_t_tune_params *params) {
-
-        int ret;
-        int index;
-
-        index = (params->frequency - 473143000)/6000000;
-
-        if (index > 48) {
-                return -EINVAL;
-        }
-
-        dev->i2c_write(dev->priv_dev, 0x47, 0x60);
-
-        ret = dev->i2c_write(dev->priv_dev, 0x68, 0x00);
-        if (ret < 0)
-                return -EINVAL;
-
-        ret = dev->i2c_write(dev->priv_dev, 0x69, 0x89);
-        if (ret < 0)
-                return -EINVAL;
-
-        ret = dev->i2c_write(dev->priv_dev, 0xf0, 0x48);
-        if (ret < 0)
-                return -EINVAL;
-
-        ret = dev->i2c_write(dev->priv_dev, 0xf1, 0x19);
-        if (ret < 0)
-                return -EINVAL;
-
-        ret = dev->i2c_write(dev->priv_dev, 0xf2, c_table[index*3]);
-        if (ret < 0)
-                return -EINVAL;
-
-        ret = dev->i2c_write(dev->priv_dev, 0xf3, c_table[index*3+1]);
-        if (ret < 0)
-                return -EINVAL;
-
-        ret = dev->i2c_write(dev->priv_dev, 0xf4, c_table[index*3+2]);
-        if (ret < 0)
-                return -EINVAL;
-
-        ret = dev->i2c_write(dev->priv_dev, 0xf5, 0xae);
-        if (ret < 0)
-                return -EINVAL;
-
-        ret = dev->i2c_write(dev->priv_dev, 0xf6, 0xb7);
-        if (ret < 0)
-                return -EINVAL;
-
-        ret = dev->i2c_write(dev->priv_dev, 0xf7, 0xba);
-        if (ret < 0)
-                return -EINVAL;
-
-        ret = dev->i2c_write(dev->priv_dev, 0xf8, 0xd7);
-        if (ret < 0)
-                return -EINVAL;
-
-        ret = dev->i2c_write(dev->priv_dev, 0x68, 0x0a);
-        if (ret < 0)
-                return -EINVAL;
-
-        ret = dev->i2c_write(dev->priv_dev, 0x69, 0x09);
-        if (ret < 0)
-                return -EINVAL;
-
-        dev->i2c_write(dev->priv_dev, 0x01, 0x40);
-        return 0;
-}
-
-static int s921_isdb_get_status(struct s921_isdb_t *dev, void *data) {
-        unsigned int *ret = (unsigned int*)data;
-        u8 ifagc_dt;
-        u8 rfagc_dt;
-
-        mdelay(10);
-        ifagc_dt = dev->i2c_read(dev->priv_dev, 0x81);
-        rfagc_dt = dev->i2c_read(dev->priv_dev, 0x82);
-        if (rfagc_dt == 0x40) {
-                *ret = 1;
-        }
-        return 0;
-}
diff --git a/drivers/media/dvb/frontends/s921_core.h b/drivers/media/dvb/frontends/s921_core.h
deleted file mode 100644
index de2f10a44e72..000000000000
--- a/drivers/media/dvb/frontends/s921_core.h
+++ /dev/null
@@ -1,114 +0,0 @@
-#ifndef _S921_CORE_H
-#define _S921_CORE_H
-//#define u8 unsigned int
-//#define u32 unsigned int
-
-
-
-//#define EINVAL -1
-#define E_OK 0
-
-struct s921_isdb_t {
-        void *priv_dev;
-        int (*i2c_write)(void *dev, u8 reg, u8 val);
-        int (*i2c_read)(void *dev, u8 reg);
-};
-
-#define ISDB_T_CMD_INIT       0
-#define ISDB_T_CMD_SET_PARAM  1
-#define ISDB_T_CMD_TUNE       2
-#define ISDB_T_CMD_GET_STATUS 3
-
-struct s921_isdb_t_tune_params {
-        u32 frequency;
-};
-
-struct s921_isdb_t_status {
-};
-
-struct s921_isdb_t_transmission_mode_params {
-        u8 mode;
-        u8 layer_a_mode;
-#define ISDB_T_LA_MODE_1 0
-#define ISDB_T_LA_MODE_2 1
-#define ISDB_T_LA_MODE_3 2
-        u8 layer_a_carrier_modulation;
-#define ISDB_T_LA_CM_DQPSK 0
-#define ISDB_T_LA_CM_QPSK  1
-#define ISDB_T_LA_CM_16QAM 2
-#define ISDB_T_LA_CM_64QAM 3
-#define ISDB_T_LA_CM_NOLAYER 4
-        u8 layer_a_code_rate;
-#define ISDB_T_LA_CR_1_2   0
-#define ISDB_T_LA_CR_2_3   1
-#define ISDB_T_LA_CR_3_4   2
-#define ISDB_T_LA_CR_5_6   4
-#define ISDB_T_LA_CR_7_8   8
-#define ISDB_T_LA_CR_NOLAYER   16
-        u8 layer_a_time_interleave;
-#define ISDB_T_LA_TI_0  0
-#define ISDB_T_LA_TI_1  1
-#define ISDB_T_LA_TI_2  2
-#define ISDB_T_LA_TI_4  4
-#define ISDB_T_LA_TI_8  8
-#define ISDB_T_LA_TI_16 16
-#define ISDB_T_LA_TI_32 32
-        u8 layer_a_nseg;
-
-        u8 layer_b_mode;
-#define ISDB_T_LB_MODE_1 0
-#define ISDB_T_LB_MODE_2 1
-#define ISDB_T_LB_MODE_3 2
-        u8 layer_b_carrier_modulation;
-#define ISDB_T_LB_CM_DQPSK 0
-#define ISDB_T_LB_CM_QPSK  1
-#define ISDB_T_LB_CM_16QAM 2
-#define ISDB_T_LB_CM_64QAM 3
-#define ISDB_T_LB_CM_NOLAYER 4
-        u8 layer_b_code_rate;
-#define ISDB_T_LB_CR_1_2   0
-#define ISDB_T_LB_CR_2_3   1
-#define ISDB_T_LB_CR_3_4   2
-#define ISDB_T_LB_CR_5_6   4
-#define ISDB_T_LB_CR_7_8   8
-#define ISDB_T_LB_CR_NOLAYER   16
-        u8 layer_b_time_interleave;
-#define ISDB_T_LB_TI_0  0
-#define ISDB_T_LB_TI_1  1
-#define ISDB_T_LB_TI_2  2
-#define ISDB_T_LB_TI_4  4
-#define ISDB_T_LB_TI_8  8
-#define ISDB_T_LB_TI_16 16
-#define ISDB_T_LB_TI_32 32
-        u8 layer_b_nseg;
-
-        u8 layer_c_mode;
-#define ISDB_T_LC_MODE_1 0
-#define ISDB_T_LC_MODE_2 1
-#define ISDB_T_LC_MODE_3 2
-        u8 layer_c_carrier_modulation;
-#define ISDB_T_LC_CM_DQPSK 0
-#define ISDB_T_LC_CM_QPSK  1
-#define ISDB_T_LC_CM_16QAM 2
-#define ISDB_T_LC_CM_64QAM 3
-#define ISDB_T_LC_CM_NOLAYER 4
-        u8 layer_c_code_rate;
-#define ISDB_T_LC_CR_1_2   0
-#define ISDB_T_LC_CR_2_3   1
-#define ISDB_T_LC_CR_3_4   2
-#define ISDB_T_LC_CR_5_6   4
-#define ISDB_T_LC_CR_7_8   8
-#define ISDB_T_LC_CR_NOLAYER   16
-        u8 layer_c_time_interleave;
-#define ISDB_T_LC_TI_0  0
-#define ISDB_T_LC_TI_1  1
-#define ISDB_T_LC_TI_2  2
-#define ISDB_T_LC_TI_4  4
-#define ISDB_T_LC_TI_8  8
-#define ISDB_T_LC_TI_16 16
-#define ISDB_T_LC_TI_32 32
-        u8 layer_c_nseg;
-};
-
-int s921_isdb_cmd(struct s921_isdb_t *dev, u32 cmd, void *data);
-#endif
diff --git a/drivers/media/dvb/frontends/s921_module.c b/drivers/media/dvb/frontends/s921_module.c
deleted file mode 100644
index 0eefff61cc50..000000000000
--- a/drivers/media/dvb/frontends/s921_module.c
+++ /dev/null
@@ -1,192 +0,0 @@
-/*
- * Driver for Sharp s921 driver
- *
- * Copyright (C) 2008 Markus Rechberger <mrechberger@sundtek.de>
- *
- * All rights reserved.
- *
- */
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/slab.h>
-#include <linux/delay.h>
-#include "dvb_frontend.h"
-#include "s921_module.h"
-#include "s921_core.h"
-
-static  unsigned int debug = 0;
-module_param(debug, int, 0644);
-MODULE_PARM_DESC(debug,"s921 debugging (default off)");
-
-#define dprintk(fmt, args...) if (debug) do {\
-                        printk("s921 debug: " fmt, ##args); } while (0)
-
-struct s921_state
-{
-        struct dvb_frontend frontend;
-        fe_modulation_t current_modulation;
-        __u32 snr;
-        __u32 current_frequency;
-        __u8 addr;
-        struct s921_isdb_t dev;
-        struct i2c_adapter *i2c;
-};
-
-static int s921_set_parameters(struct dvb_frontend *fe, struct dvb_frontend_parameters *param) {
-        struct s921_state *state = (struct s921_state *)fe->demodulator_priv;
-        struct s921_isdb_t_transmission_mode_params params;
-        struct s921_isdb_t_tune_params tune_params;
-
-        tune_params.frequency = param->frequency;
-        s921_isdb_cmd(&state->dev, ISDB_T_CMD_SET_PARAM, &params);
-        s921_isdb_cmd(&state->dev, ISDB_T_CMD_TUNE, &tune_params);
-        mdelay(100);
-        return 0;
-}
-
-static int s921_init(struct dvb_frontend *fe) {
-        printk("s921 init\n");
-        return 0;
-}
-
-static int s921_sleep(struct dvb_frontend *fe) {
-        printk("s921 sleep\n");
-        return 0;
-}
-
-static int s921_read_status(struct dvb_frontend *fe, fe_status_t *status)
-{
-        struct s921_state *state = (struct s921_state *)fe->demodulator_priv;
-        unsigned int ret;
-        mdelay(5);
-        s921_isdb_cmd(&state->dev, ISDB_T_CMD_GET_STATUS, &ret);
-        *status = 0;
-
-        printk("status: %02x\n", ret);
-        if (ret == 1) {
-                *status |= FE_HAS_CARRIER;
-                *status |= FE_HAS_VITERBI;
-                *status |= FE_HAS_LOCK;
-                *status |= FE_HAS_SYNC;
-                *status |= FE_HAS_SIGNAL;
-        }
-
-        return 0;
-}
-
-static int s921_read_ber(struct dvb_frontend *fe, __u32 *ber)
-{
-        dprintk("read ber\n");
-        return 0;
-}
-
-static int s921_read_snr(struct dvb_frontend *fe, __u16 *snr)
-{
-        dprintk("read snr\n");
-        return 0;
-}
-
-static int s921_read_ucblocks(struct dvb_frontend *fe, __u32 *ucblocks)
-{
-        dprintk("read ucblocks\n");
-        return 0;
-}
-
-static void s921_release(struct dvb_frontend *fe)
-{
-        struct s921_state *state = (struct s921_state *)fe->demodulator_priv;
-        kfree(state);
-}
-
-static struct dvb_frontend_ops demod_s921={
-        .info = {
-                .name                   = "SHARP S921",
-                .type                   = FE_OFDM,
-                .frequency_min          = 473143000,
-                .frequency_max          = 767143000,
-                .frequency_stepsize     =   6000000,
-                .frequency_tolerance    = 0,
-                .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 |
-                        FE_CAN_FEC_3_4 | FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 |
-                        FE_CAN_FEC_AUTO |
-                        FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_AUTO |
-                        FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_GUARD_INTERVAL_AUTO |
-                        FE_CAN_HIERARCHY_AUTO | FE_CAN_RECOVER |
-                        FE_CAN_MUTE_TS
-        },
-        .init = s921_init,
-        .sleep = s921_sleep,
-        .set_frontend = s921_set_parameters,
-        .read_snr = s921_read_snr,
-        .read_ber = s921_read_ber,
-        .read_status = s921_read_status,
-        .read_ucblocks = s921_read_ucblocks,
-        .release = s921_release,
-};
-
-static int s921_write(void *dev, u8 reg, u8 val) {
-        struct s921_state *state = dev;
-        char buf[2]={reg,val};
-        int err;
-        struct i2c_msg i2cmsgs = {
-                .addr = state->addr,
-                .flags = 0,
-                .len = 2,
-                .buf = buf
-        };
-
-        if((err = i2c_transfer(state->i2c, &i2cmsgs, 1))<0) {
-                printk("%s i2c_transfer error %d\n", __func__, err);
-                if (err < 0)
-                        return err;
-                else
-                        return -EREMOTEIO;
-        }
-
-        return 0;
-}
-
-static int s921_read(void *dev, u8 reg) {
-        struct s921_state *state = dev;
-        u8 b1;
-        int ret;
-        struct i2c_msg msg[2] = { { .addr = state->addr,
-                                    .flags = 0,
-                                    .buf = &reg, .len = 1 },
-                                  { .addr = state->addr,
-                                    .flags = I2C_M_RD,
-                                    .buf = &b1, .len = 1 } };
-
-        ret = i2c_transfer(state->i2c, msg, 2);
-        if (ret != 2)
-                return ret;
-        return b1;
-}
-
-struct dvb_frontend* s921_attach(const struct s921_config *config,
-                                           struct i2c_adapter *i2c)
-{
-
-        struct s921_state *state;
-        state = kzalloc(sizeof(struct s921_state), GFP_KERNEL);
-        if (state == NULL)
-                return NULL;
-
-        state->addr = config->i2c_address;
-        state->i2c = i2c;
-        state->dev.i2c_write = &s921_write;
-        state->dev.i2c_read = &s921_read;
-        state->dev.priv_dev = state;
-
-        s921_isdb_cmd(&state->dev, ISDB_T_CMD_INIT, NULL);
-
-        memcpy(&state->frontend.ops, &demod_s921, sizeof(struct dvb_frontend_ops));
-        state->frontend.demodulator_priv = state;
-        return &state->frontend;
-}
-
-EXPORT_SYMBOL_GPL(s921_attach);
-MODULE_AUTHOR("Markus Rechberger <mrechberger@empiatech.com>");
-MODULE_DESCRIPTION("Sharp S921 ISDB-T 1Seg");
-MODULE_LICENSE("GPL");
diff --git a/drivers/media/dvb/frontends/s921_module.h b/drivers/media/dvb/frontends/s921_module.h
deleted file mode 100644
index 78660424ba95..000000000000
--- a/drivers/media/dvb/frontends/s921_module.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- *  Driver for DVB-T s921 demodulator
- *
- *  Copyright (C) 2008 Markus Rechberger <mrechberger@sundtek.de>
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License
- *  along with this program; if not, write to the Free Software
- *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.=
- */
-
-#ifndef S921_MODULE_H
-#define S921_MODULE_H
-
-#include <linux/dvb/frontend.h>
-#include "s921_core.h"
-
-int s921_isdb_init(struct s921_isdb_t *dev);
-int s921_isdb_cmd(struct s921_isdb_t *dev, u32 cmd, void *data);
-
-struct s921_config
-{
-        /* demodulator's I2C address */
-        u8 i2c_address;
-};
-
-#if defined(CONFIG_DVB_S921) || (defined(CONFIG_DVB_S921_MODULE) && defined(MODULE))
-extern struct dvb_frontend* s921_attach(const struct s921_config *config,
-                                           struct i2c_adapter *i2c);
-#else
-static inline struct dvb_frontend* s921_attach(const struct s921_config *config,
-                                           struct i2c_adapter *i2c)
-{
-        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
-        return NULL;
-}
-#endif /* CONFIG_DVB_S921 */
-
-#endif /* S921_H */
diff --git a/drivers/media/dvb/frontends/si21xx.c b/drivers/media/dvb/frontends/si21xx.c
index d21a327db629..4b0c99a08a85 100644
--- a/drivers/media/dvb/frontends/si21xx.c
+++ b/drivers/media/dvb/frontends/si21xx.c
@@ -268,7 +268,7 @@ static int si21_writereg(struct si21xx_state *state, u8 reg, u8 data)
         return (ret != 1) ? -EREMOTEIO : 0;
 }
 
-static int si21_write(struct dvb_frontend *fe, u8 *buf, int len)
+static int si21_write(struct dvb_frontend *fe, const u8 buf[], int len)
 {
         struct si21xx_state *state = fe->demodulator_priv;
 
diff --git a/drivers/media/dvb/frontends/stb0899_algo.c b/drivers/media/dvb/frontends/stb0899_algo.c
index 2da55ec20392..d70eee00f33a 100644
--- a/drivers/media/dvb/frontends/stb0899_algo.c
+++ b/drivers/media/dvb/frontends/stb0899_algo.c
@@ -23,7 +23,7 @@
 #include "stb0899_priv.h"
 #include "stb0899_reg.h"
 
-inline u32 stb0899_do_div(u64 n, u32 d)
+static inline u32 stb0899_do_div(u64 n, u32 d)
 {
         /* wrap do_div() for ease of use */
 
diff --git a/drivers/media/dvb/frontends/stb0899_drv.c b/drivers/media/dvb/frontends/stb0899_drv.c
index 8e38fcee564e..37a222d9ddb3 100644
--- a/drivers/media/dvb/frontends/stb0899_drv.c
+++ b/drivers/media/dvb/frontends/stb0899_drv.c
@@ -714,7 +714,7 @@ static int stb0899_send_diseqc_msg(struct dvb_frontend *fe, struct dvb_diseqc_ma
         reg = stb0899_read_reg(state, STB0899_DISCNTRL1);
         STB0899_SETFIELD_VAL(DISPRECHARGE, reg, 0);
         stb0899_write_reg(state, STB0899_DISCNTRL1, reg);
-
+        msleep(100);
         return 0;
 }
 
diff --git a/drivers/media/dvb/frontends/stb6100.c b/drivers/media/dvb/frontends/stb6100.c
index f73c13323e90..bc1a8af4f6e1 100644
--- a/drivers/media/dvb/frontends/stb6100.c
+++ b/drivers/media/dvb/frontends/stb6100.c
@@ -51,7 +51,7 @@ module_param(verbose, int, 0644);
                 if (x > y)                                                              \
                         printk(format, ##arg);                                          \
         }                                                                               \
-} while(0)
+} while (0)
 
 struct stb6100_lkup {
         u32 val_low;
@@ -117,7 +117,10 @@ static const struct stb6100_regmask stb6100_template[] = {
         [STB6100_TEST3]         = { 0x00, 0xde },
 };
 
-static void stb6100_normalise_regs(u8 regs[])
+/*
+ * Currently unused. Some boards might need it in the future
+ */
+static inline void stb6100_normalise_regs(u8 regs[])
 {
         int i;
 
@@ -157,13 +160,25 @@ static int stb6100_read_reg(struct stb6100_state *state, u8 reg)
         u8 regs[STB6100_NUMREGS];
         int rc;
 
+        struct i2c_msg msg = {
+                .addr   = state->config->tuner_address + reg,
+                .flags  = I2C_M_RD,
+                .buf    = regs,
+                .len    = 1
+        };
+
+        rc = i2c_transfer(state->i2c, &msg, 1);
+
         if (unlikely(reg >= STB6100_NUMREGS)) {
                 dprintk(verbose, FE_ERROR, 1, "Invalid register offset 0x%x", reg);
                 return -EINVAL;
         }
-        if ((rc = stb6100_read_regs(state, regs)) < 0)
-                return rc;
-        return (unsigned int)regs[reg];
+        if (unlikely(verbose > FE_DEBUG)) {
+                dprintk(verbose, FE_DEBUG, 1, "    Read from 0x%02x", state->config->tuner_address);
+                dprintk(verbose, FE_DEBUG, 1, "        %s: 0x%02x", stb6100_regnames[reg], regs[0]);
+        }
+
+        return (unsigned int)regs[0];
 }
 
 static int stb6100_write_reg_range(struct stb6100_state *state, u8 buf[], int start, int len)
@@ -211,20 +226,17 @@ static int stb6100_write_reg(struct stb6100_state *state, u8 reg, u8 data)
         return stb6100_write_reg_range(state, &data, reg, 1);
 }
 
-static int stb6100_write_regs(struct stb6100_state *state, u8 regs[])
-{
-        stb6100_normalise_regs(regs);
-        return stb6100_write_reg_range(state, &regs[1], 1, STB6100_NUMREGS - 1);
-}
 
 static int stb6100_get_status(struct dvb_frontend *fe, u32 *status)
 {
         int rc;
         struct stb6100_state *state = fe->tuner_priv;
 
-        if ((rc = stb6100_read_reg(state, STB6100_LD)) < 0)
+        rc = stb6100_read_reg(state, STB6100_LD);
+        if (rc < 0) {
+                dprintk(verbose, FE_ERROR, 1, "%s failed", __func__);
                 return rc;
-
+        }
         return (rc & STB6100_LD_LOCK) ? TUNER_STATUS_LOCKED : 0;
 }
 
@@ -234,7 +246,8 @@ static int stb6100_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
         u8 f;
         struct stb6100_state *state = fe->tuner_priv;
 
-        if ((rc = stb6100_read_reg(state, STB6100_F)) < 0)
+        rc = stb6100_read_reg(state, STB6100_F);
+        if (rc < 0)
                 return rc;
         f = rc & STB6100_F_F;
 
@@ -265,14 +278,21 @@ static int stb6100_set_bandwidth(struct dvb_frontend *fe, u32 bandwidth)
         /* Turn on LPF bandwidth setting clock control,
          * set bandwidth, wait 10ms, turn off.
          */
-        if ((rc = stb6100_write_reg(state, STB6100_FCCK, 0x0d | STB6100_FCCK_FCCK)) < 0)
+        rc = stb6100_write_reg(state, STB6100_FCCK, 0x0d | STB6100_FCCK_FCCK);
+        if (rc < 0)
                 return rc;
-        if ((rc = stb6100_write_reg(state, STB6100_F, 0xc0 | tmp)) < 0)
+        rc = stb6100_write_reg(state, STB6100_F, 0xc0 | tmp);
+        if (rc < 0)
                 return rc;
-        msleep(1);
-        if ((rc = stb6100_write_reg(state, STB6100_FCCK, 0x0d)) < 0)
+
+        msleep(5);  /*  This is dangerous as another (related) thread may start */
+
+        rc = stb6100_write_reg(state, STB6100_FCCK, 0x0d);
+        if (rc < 0)
                 return rc;
 
+        msleep(10);  /*  This is dangerous as another (related) thread may start */
+
         return 0;
 }
 
@@ -284,7 +304,8 @@ static int stb6100_get_frequency(struct dvb_frontend *fe, u32 *frequency)
         struct stb6100_state *state = fe->tuner_priv;
         u8 regs[STB6100_NUMREGS];
 
-        if ((rc = stb6100_read_regs(state, regs)) < 0)
+        rc = stb6100_read_regs(state, regs);
+        if (rc < 0)
                 return rc;
 
         odiv = (regs[STB6100_VCO] & STB6100_VCO_ODIV) >> STB6100_VCO_ODIV_SHIFT;
@@ -312,8 +333,7 @@ static int stb6100_set_frequency(struct dvb_frontend *fe, u32 frequency)
         u8 regs[STB6100_NUMREGS];
         u8 g, psd2, odiv;
 
-        if ((rc = stb6100_read_regs(state, regs)) < 0)
-                return rc;
+        dprintk(verbose, FE_DEBUG, 1, "Version 2010-8-14 13:51");
 
         if (fe->ops.get_frontend) {
                 dprintk(verbose, FE_DEBUG, 1, "Get frontend parameters");
@@ -321,96 +341,140 @@ static int stb6100_set_frequency(struct dvb_frontend *fe, u32 frequency)
         }
         srate = p.u.qpsk.symbol_rate;
 
-        regs[STB6100_DLB] = 0xdc;
-        /* Disable LPEN */
-        regs[STB6100_LPEN] &= ~STB6100_LPEN_LPEN; /* PLL Loop disabled */
+        /* Set up tuner cleanly, LPF calibration on */
+        rc = stb6100_write_reg(state, STB6100_FCCK, 0x4d | STB6100_FCCK_FCCK);
+        if (rc < 0)
+                return rc;  /* allow LPF calibration */
 
-        if ((rc = stb6100_write_regs(state, regs)) < 0)
+        /* PLL Loop disabled, bias on, VCO on, synth on */
+        regs[STB6100_LPEN] = 0xeb;
+        rc = stb6100_write_reg(state, STB6100_LPEN, regs[STB6100_LPEN]);
+        if (rc < 0)
                 return rc;
 
-        /* Baseband gain.       */
-        if (srate >= 15000000)
-                g = 9;  //  +4 dB
-        else if (srate >= 5000000)
-                g = 11; //  +8 dB
-        else
-                g = 14; // +14 dB
-
-        regs[STB6100_G] = (regs[STB6100_G] & ~STB6100_G_G) | g;
-        regs[STB6100_G] &= ~STB6100_G_GCT; /* mask GCT */
-        regs[STB6100_G] |= (1 << 5); /* 2Vp-p Mode */
+        /* Program the registers with their data values */
 
         /* VCO divide ratio (LO divide ratio, VCO prescaler enable).    */
         if (frequency <= 1075000)
                 odiv = 1;
         else
                 odiv = 0;
-        regs[STB6100_VCO] = (regs[STB6100_VCO] & ~STB6100_VCO_ODIV) | (odiv << STB6100_VCO_ODIV_SHIFT);
 
-        if ((frequency > 1075000) && (frequency <= 1325000))
-                psd2 = 0;
-        else
-                psd2 = 1;
-        regs[STB6100_K] = (regs[STB6100_K] & ~STB6100_K_PSD2) | (psd2 << STB6100_K_PSD2_SHIFT);
+        /* VCO enabled, search clock off as per LL3.7, 3.4.1 */
+        regs[STB6100_VCO] = 0xe0 | (odiv << STB6100_VCO_ODIV_SHIFT);
 
         /* OSM  */
         for (ptr = lkup;
              (ptr->val_high != 0) && !CHKRANGE(frequency, ptr->val_low, ptr->val_high);
              ptr++);
+
         if (ptr->val_high == 0) {
                 printk(KERN_ERR "%s: frequency out of range: %u kHz\n", __func__, frequency);
                 return -EINVAL;
         }
         regs[STB6100_VCO] = (regs[STB6100_VCO] & ~STB6100_VCO_OSM) | ptr->reg;
+        rc = stb6100_write_reg(state, STB6100_VCO, regs[STB6100_VCO]);
+        if (rc < 0)
+                return rc;
 
+        if ((frequency > 1075000) && (frequency <= 1325000))
+                psd2 = 0;
+        else
+                psd2 = 1;
         /* F(VCO) = F(LO) * (ODIV == 0 ? 2 : 4)                 */
         fvco = frequency << (1 + odiv);
         /* N(I) = floor(f(VCO) / (f(XTAL) * (PSD2 ? 2 : 1)))    */
         nint = fvco / (state->reference << psd2);
         /* N(F) = round(f(VCO) / f(XTAL) * (PSD2 ? 2 : 1) - N(I)) * 2 ^ 9       */
         nfrac = DIV_ROUND_CLOSEST((fvco - (nint * state->reference << psd2))
-                                         << (9 - psd2),
-                                  state->reference);
+                                         << (9 - psd2), state->reference);
+
+        /* NI */
+        regs[STB6100_NI] = nint;
+        rc = stb6100_write_reg(state, STB6100_NI, regs[STB6100_NI]);
+        if (rc < 0)
+                return rc;
+
+        /* NF */
+        regs[STB6100_NF_LSB] = nfrac;
+        rc = stb6100_write_reg(state, STB6100_NF_LSB, regs[STB6100_NF_LSB]);
+        if (rc < 0)
+                return rc;
+
+        /* K */
+        regs[STB6100_K] = (0x38 & ~STB6100_K_PSD2) | (psd2 << STB6100_K_PSD2_SHIFT);
+        regs[STB6100_K] = (regs[STB6100_K] & ~STB6100_K_NF_MSB) | ((nfrac >> 8) & STB6100_K_NF_MSB);
+        rc = stb6100_write_reg(state, STB6100_K, regs[STB6100_K]);
+        if (rc < 0)
+                return rc;
+
+        /* G Baseband gain. */
+        if (srate >= 15000000)
+                g = 9;  /*  +4 dB */
+        else if (srate >= 5000000)
+                g = 11; /*  +8 dB */
+        else
+                g = 14; /* +14 dB */
+
+        regs[STB6100_G] = (0x10 & ~STB6100_G_G) | g;
+        regs[STB6100_G] &= ~STB6100_G_GCT; /* mask GCT */
+        regs[STB6100_G] |= (1 << 5); /* 2Vp-p Mode */
+        rc = stb6100_write_reg(state, STB6100_G, regs[STB6100_G]);
+        if (rc < 0)
+                return rc;
+
+        /* F we don't write as it is set up in BW set */
+
+        /* DLB set DC servo loop BW to 160Hz (LLA 3.8 / 2.1) */
+        regs[STB6100_DLB] = 0xcc;
+        rc = stb6100_write_reg(state, STB6100_DLB, regs[STB6100_DLB]);
+        if (rc < 0)
+                return rc;
+
         dprintk(verbose, FE_DEBUG, 1,
                 "frequency = %u, srate = %u, g = %u, odiv = %u, psd2 = %u, fxtal = %u, osm = %u, fvco = %u, N(I) = %u, N(F) = %u",
                 frequency, srate, (unsigned int)g, (unsigned int)odiv,
                 (unsigned int)psd2, state->reference,
                 ptr->reg, fvco, nint, nfrac);
-        regs[STB6100_NI] = nint;
-        regs[STB6100_NF_LSB] = nfrac;
-        regs[STB6100_K] = (regs[STB6100_K] & ~STB6100_K_NF_MSB) | ((nfrac >> 8) & STB6100_K_NF_MSB);
-        regs[STB6100_VCO] |= STB6100_VCO_OSCH;          /* VCO search enabled           */
-        regs[STB6100_VCO] |= STB6100_VCO_OCK;           /* VCO search clock off         */
-        regs[STB6100_FCCK] |= STB6100_FCCK_FCCK;        /* LPF BW setting clock enabled */
-        regs[STB6100_LPEN] &= ~STB6100_LPEN_LPEN;       /* PLL loop disabled            */
-        /* Power up. */
-        regs[STB6100_LPEN] |= STB6100_LPEN_SYNP | STB6100_LPEN_OSCP | STB6100_LPEN_BEN;
 
-        msleep(2);
-        if ((rc = stb6100_write_regs(state, regs)) < 0)
+        /* Set up the test registers */
+        regs[STB6100_TEST1] = 0x8f;
+        rc = stb6100_write_reg(state, STB6100_TEST1, regs[STB6100_TEST1]);
+        if (rc < 0)
+                return rc;
+        regs[STB6100_TEST3] = 0xde;
+        rc = stb6100_write_reg(state, STB6100_TEST3, regs[STB6100_TEST3]);
+        if (rc < 0)
                 return rc;
 
-        msleep(2);
-        regs[STB6100_LPEN] |= STB6100_LPEN_LPEN;        /* PLL loop enabled             */
-        if ((rc = stb6100_write_reg(state, STB6100_LPEN, regs[STB6100_LPEN])) < 0)
+        /* Bring up tuner according to LLA 3.7 3.4.1, step 2 */
+        regs[STB6100_LPEN] = 0xfb; /* PLL Loop enabled, bias on, VCO on, synth on */
+        rc = stb6100_write_reg(state, STB6100_LPEN, regs[STB6100_LPEN]);
+        if (rc < 0)
                 return rc;
 
+        msleep(2);
+
+        /* Bring up tuner according to LLA 3.7 3.4.1, step 3 */
         regs[STB6100_VCO] &= ~STB6100_VCO_OCK;          /* VCO fast search              */
-        if ((rc = stb6100_write_reg(state, STB6100_VCO, regs[STB6100_VCO])) < 0)
+        rc = stb6100_write_reg(state, STB6100_VCO, regs[STB6100_VCO]);
+        if (rc < 0)
                 return rc;
 
-        msleep(10);                                     /* wait for LO to lock          */
+        msleep(10);  /*  This is dangerous as another (related) thread may start */ /* wait for LO to lock */
+
         regs[STB6100_VCO] &= ~STB6100_VCO_OSCH;         /* vco search disabled          */
         regs[STB6100_VCO] |= STB6100_VCO_OCK;           /* search clock off             */
-        if ((rc = stb6100_write_reg(state, STB6100_VCO, regs[STB6100_VCO])) < 0)
-                return rc;
-        regs[STB6100_FCCK] &= ~STB6100_FCCK_FCCK;       /* LPF BW clock disabled        */
-        stb6100_normalise_regs(regs);
-        if ((rc = stb6100_write_reg_range(state, &regs[1], 1, STB6100_NUMREGS - 3)) < 0)
+        rc = stb6100_write_reg(state, STB6100_VCO, regs[STB6100_VCO]);
+        if (rc < 0)
                 return rc;
 
-        msleep(100);
+        rc = stb6100_write_reg(state, STB6100_FCCK, 0x0d);
+        if (rc < 0)
+                return rc;  /* Stop LPF calibration */
 
+        msleep(10);  /*  This is dangerous as another (related) thread may start */
+                     /* wait for stabilisation, (should not be necessary)               */
         return 0;
 }
 
@@ -433,8 +497,8 @@ static int stb6100_init(struct dvb_frontend *fe)
         state->bandwidth        = status->bandwidth * 1000;     /* Hz   */
         state->reference        = status->refclock / 1000;      /* kHz  */
 
-        /* Set default bandwidth.       */
-        return stb6100_set_bandwidth(fe, state->bandwidth);
+        /* Set default bandwidth. Modified, PN 13-May-10        */
+        return 0;
 }
 
 static int stb6100_get_state(struct dvb_frontend *fe,
@@ -506,7 +570,7 @@ static struct dvb_tuner_ops stb6100_ops = {
 };
 
 struct dvb_frontend *stb6100_attach(struct dvb_frontend *fe,
-                                    struct stb6100_config *config,
+                                    const struct stb6100_config *config,
                                     struct i2c_adapter *i2c)
 {
         struct stb6100_state *state = NULL;
diff --git a/drivers/media/dvb/frontends/stb6100.h b/drivers/media/dvb/frontends/stb6100.h
index 395d056599a6..2ab096614b3f 100644
--- a/drivers/media/dvb/frontends/stb6100.h
+++ b/drivers/media/dvb/frontends/stb6100.h
@@ -97,13 +97,13 @@ struct stb6100_state {
 #if defined(CONFIG_DVB_STB6100) || (defined(CONFIG_DVB_STB6100_MODULE) && defined(MODULE))
 
 extern struct dvb_frontend *stb6100_attach(struct dvb_frontend *fe,
-                                           struct stb6100_config *config,
+                                           const struct stb6100_config *config,
                                            struct i2c_adapter *i2c);
 
 #else
 
 static inline struct dvb_frontend *stb6100_attach(struct dvb_frontend *fe,
-                                                  struct stb6100_config *config,
+                                                  const struct stb6100_config *config,
                                                   struct i2c_adapter *i2c)
 {
         printk(KERN_WARNING "%s: Driver disabled by Kconfig\n", __func__);
diff --git a/drivers/media/dvb/frontends/stv0288.c b/drivers/media/dvb/frontends/stv0288.c
index 2930a5d6768a..8e0cfadba688 100644
--- a/drivers/media/dvb/frontends/stv0288.c
+++ b/drivers/media/dvb/frontends/stv0288.c
@@ -6,6 +6,8 @@
         Copyright (C) 2008 Igor M. Liplianin <liplianin@me.by>
                 Removed stb6000 specific tuner code and revised some
                 procedures.
+        2010-09-01 Josef Pavlik <josef@pavlik.it>
+                Fixed diseqc_msg, diseqc_burst and set_tone problems
 
         This program is free software; you can redistribute it and/or modify
         it under the terms of the GNU General Public License as published by
@@ -78,7 +80,7 @@ static int stv0288_writeregI(struct stv0288_state *state, u8 reg, u8 data)
         return (ret != 1) ? -EREMOTEIO : 0;
 }
 
-static int stv0288_write(struct dvb_frontend *fe, u8 *buf, int len)
+static int stv0288_write(struct dvb_frontend *fe, const u8 buf[], int len)
 {
         struct stv0288_state *state = fe->demodulator_priv;
 
@@ -156,14 +158,13 @@ static int stv0288_send_diseqc_msg(struct dvb_frontend *fe,
 
         stv0288_writeregI(state, 0x09, 0);
         msleep(30);
-        stv0288_writeregI(state, 0x05, 0x16);
+        stv0288_writeregI(state, 0x05, 0x12);/* modulated mode, single shot */
 
         for (i = 0; i < m->msg_len; i++) {
                 if (stv0288_writeregI(state, 0x06, m->msg[i]))
                         return -EREMOTEIO;
-                msleep(12);
         }
-
+        msleep(m->msg_len*12);
         return 0;
 }
 
@@ -174,13 +175,14 @@ static int stv0288_send_diseqc_burst(struct dvb_frontend *fe,
 
         dprintk("%s\n", __func__);
 
-        if (stv0288_writeregI(state, 0x05, 0x16))/* burst mode */
+        if (stv0288_writeregI(state, 0x05, 0x03))/* burst mode, single shot */
                 return -EREMOTEIO;
 
         if (stv0288_writeregI(state, 0x06, burst == SEC_MINI_A ? 0x00 : 0xff))
                 return -EREMOTEIO;
 
-        if (stv0288_writeregI(state, 0x06, 0x12))
+        msleep(15);
+        if (stv0288_writeregI(state, 0x05, 0x12))
                 return -EREMOTEIO;
 
         return 0;
@@ -192,18 +194,19 @@ static int stv0288_set_tone(struct dvb_frontend *fe, fe_sec_tone_mode_t tone)
 
         switch (tone) {
         case SEC_TONE_ON:
-                if (stv0288_writeregI(state, 0x05, 0x10))/* burst mode */
+                if (stv0288_writeregI(state, 0x05, 0x10))/* cont carrier */
                         return -EREMOTEIO;
-                return stv0288_writeregI(state, 0x06, 0xff);
+        break;
 
         case SEC_TONE_OFF:
-                if (stv0288_writeregI(state, 0x05, 0x13))/* burst mode */
+                if (stv0288_writeregI(state, 0x05, 0x12))/* burst mode off*/
                         return -EREMOTEIO;
-                return stv0288_writeregI(state, 0x06, 0x00);
+        break;
 
         default:
                 return -EINVAL;
         }
+        return 0;
 }
 
 static u8 stv0288_inittab[] = {
@@ -250,7 +253,7 @@ static u8 stv0288_inittab[] = {
         0x3d, 0x30,
         0x40, 0x63,
         0x41, 0x04,
-        0x42, 0x60,
+        0x42, 0x20,
         0x43, 0x00,
         0x44, 0x00,
         0x45, 0x00,
@@ -364,8 +367,11 @@ static int stv0288_read_status(struct dvb_frontend *fe, fe_status_t *status)
         dprintk("%s : FE_READ_STATUS : VSTATUS: 0x%02x\n", __func__, sync);
 
         *status = 0;
-
-        if ((sync & 0x08) == 0x08) {
+        if (sync & 0x80)
+                *status |= FE_HAS_CARRIER | FE_HAS_SIGNAL;
+        if (sync & 0x10)
+                *status |= FE_HAS_VITERBI;
+        if (sync & 0x08) {
                 *status |= FE_HAS_LOCK;
                 dprintk("stv0288 has locked\n");
         }
@@ -486,7 +492,7 @@ static int stv0288_set_frontend(struct dvb_frontend *fe,
         tda[2] = 0x0; /* CFRL */
         for (tm = -6; tm < 7;) {
                 /* Viterbi status */
-                if (stv0288_readreg(state, 0x24) & 0x80)
+                if (stv0288_readreg(state, 0x24) & 0x8)
                         break;
 
                 tda[2] += 40;
diff --git a/drivers/media/dvb/frontends/stv0297.c b/drivers/media/dvb/frontends/stv0297.c
index 4fd7479bb62b..84d88f33275e 100644
--- a/drivers/media/dvb/frontends/stv0297.c
+++ b/drivers/media/dvb/frontends/stv0297.c
@@ -435,7 +435,7 @@ static int stv0297_set_frontend(struct dvb_frontend *fe, struct dvb_frontend_par
                 return -EINVAL;
         }
 
-        // determine inversion dependant parameters
+        // determine inversion dependent parameters
         inversion = p->inversion;
         if (state->config->invert)
                 inversion = (inversion == INVERSION_ON) ? INVERSION_OFF : INVERSION_ON;
diff --git a/drivers/media/dvb/frontends/stv0299.c b/drivers/media/dvb/frontends/stv0299.c
index 968874469726..42684bec8883 100644
--- a/drivers/media/dvb/frontends/stv0299.c
+++ b/drivers/media/dvb/frontends/stv0299.c
@@ -64,6 +64,7 @@ struct stv0299_state {
         fe_code_rate_t fec_inner;
         int errmode;
         u32 ucblocks;
+        u8 mcr_reg;
 };
 
 #define STATUS_BER 0
@@ -92,7 +93,7 @@ static int stv0299_writeregI (struct stv0299_state* state, u8 reg, u8 data)
         return (ret != 1) ? -EREMOTEIO : 0;
 }
 
-static int stv0299_write(struct dvb_frontend* fe, u8 *buf, int len)
+static int stv0299_write(struct dvb_frontend* fe, const u8 buf[], int len)
 {
         struct stv0299_state* state = fe->demodulator_priv;
 
@@ -457,6 +458,9 @@ static int stv0299_init (struct dvb_frontend* fe)
 
         dprintk("stv0299: init chip\n");
 
+        stv0299_writeregI(state, 0x02, 0x30 | state->mcr_reg);
+        msleep(50);
+
         for (i = 0; ; i += 2)  {
                 reg = state->config->inittab[i];
                 val = state->config->inittab[i+1];
@@ -464,6 +468,8 @@ static int stv0299_init (struct dvb_frontend* fe)
                         break;
                 if (reg == 0x0c && state->config->op0_off)
                         val &= ~0x10;
+                if (reg == 0x2)
+                        state->mcr_reg = val & 0xf;
                 stv0299_writeregI(state, reg, val);
         }
 
@@ -618,7 +624,7 @@ static int stv0299_sleep(struct dvb_frontend* fe)
 {
         struct stv0299_state* state = fe->demodulator_priv;
 
-        stv0299_writeregI(state, 0x02, 0x80);
+        stv0299_writeregI(state, 0x02, 0xb0 | state->mcr_reg);
         state->initialised = 0;
 
         return 0;
@@ -680,7 +686,7 @@ struct dvb_frontend* stv0299_attach(const struct stv0299_config* config,
         state->errmode = STATUS_BER;
 
         /* check if the demod is there */
-        stv0299_writeregI(state, 0x02, 0x34); /* standby off */
+        stv0299_writeregI(state, 0x02, 0x30); /* standby off */
         msleep(200);
         id = stv0299_readreg(state, 0x00);
 
diff --git a/drivers/media/dvb/frontends/stv0299.h b/drivers/media/dvb/frontends/stv0299.h
index 0fd96e22b650..ba219b767a69 100644
--- a/drivers/media/dvb/frontends/stv0299.h
+++ b/drivers/media/dvb/frontends/stv0299.h
@@ -65,7 +65,7 @@ struct stv0299_config
          * First of each pair is the register, second is the value.
          * List should be terminated with an 0xff, 0xff pair.
          */
-        u8* inittab;
+        const u8* inittab;
 
         /* master clock to use */
         u32 mclk;
diff --git a/drivers/media/dvb/frontends/stv0367.c b/drivers/media/dvb/frontends/stv0367.c
new file mode 100644
index 000000000000..e57ab53e2e27
--- /dev/null
+++ b/drivers/media/dvb/frontends/stv0367.c
@@ -0,0 +1,3459 @@
+/*
+ * stv0367.c
+ *
+ * Driver for ST STV0367 DVB-T & DVB-C demodulator IC.
+ *
+ * Copyright (C) ST Microelectronics.
+ * Copyright (C) 2010,2011 NetUP Inc.
+ * Copyright (C) 2010,2011 Igor M. Liplianin <liplianin@netup.ru>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/string.h>
+#include <linux/slab.h>
+#include <linux/i2c.h>
+
+#include "stv0367.h"
+#include "stv0367_regs.h"
+#include "stv0367_priv.h"
+
+static int stvdebug;
+module_param_named(debug, stvdebug, int, 0644);
+
+static int i2cdebug;
+module_param_named(i2c_debug, i2cdebug, int, 0644);
+
+#define dprintk(args...) \
+        do { \
+                if (stvdebug) \
+                        printk(KERN_DEBUG args); \
+        } while (0)
+        /* DVB-C */
+
+struct stv0367cab_state {
+        enum stv0367_cab_signal_type    state;
+        u32     mclk;
+        u32     adc_clk;
+        s32     search_range;
+        s32     derot_offset;
+        /* results */
+        int locked;                     /* channel found                */
+        u32 freq_khz;                   /* found frequency (in kHz)     */
+        u32 symbol_rate;                /* found symbol rate (in Bds)   */
+        enum stv0367cab_mod modulation; /* modulation                   */
+        fe_spectral_inversion_t spect_inv; /* Spectrum Inversion        */
+};
+
+struct stv0367ter_state {
+        /* DVB-T */
+        enum stv0367_ter_signal_type state;
+        enum stv0367_ter_if_iq_mode if_iq_mode;
+        enum stv0367_ter_mode mode;/* mode 2K or 8K */
+        fe_guard_interval_t guard;
+        enum stv0367_ter_hierarchy hierarchy;
+        u32 frequency;
+        fe_spectral_inversion_t  sense; /*  current search spectrum */
+        u8  force; /* force mode/guard */
+        u8  bw; /* channel width 6, 7 or 8 in MHz */
+        u8  pBW; /* channel width used during previous lock */
+        u32 pBER;
+        u32 pPER;
+        u32 ucblocks;
+        s8  echo_pos; /* echo position */
+        u8  first_lock;
+        u8  unlock_counter;
+        u32 agc_val;
+};
+
+struct stv0367_state {
+        struct dvb_frontend fe;
+        struct i2c_adapter *i2c;
+        /* config settings */
+        const struct stv0367_config *config;
+        u8 chip_id;
+        /* DVB-C */
+        struct stv0367cab_state *cab_state;
+        /* DVB-T */
+        struct stv0367ter_state *ter_state;
+};
+
+struct st_register {
+        u16     addr;
+        u8      value;
+};
+
+/* values for STV4100 XTAL=30M int clk=53.125M*/
+static struct st_register def0367ter[STV0367TER_NBREGS] = {
+        {R367TER_ID,            0x60},
+        {R367TER_I2CRPT,        0xa0},
+        /* {R367TER_I2CRPT,     0x22},*/
+        {R367TER_TOPCTRL,       0x00},/* for xc5000; was 0x02 */
+        {R367TER_IOCFG0,        0x40},
+        {R367TER_DAC0R,         0x00},
+        {R367TER_IOCFG1,        0x00},
+        {R367TER_DAC1R,         0x00},
+        {R367TER_IOCFG2,        0x62},
+        {R367TER_SDFR,          0x00},
+        {R367TER_STATUS,        0xf8},
+        {R367TER_AUX_CLK,       0x0a},
+        {R367TER_FREESYS1,      0x00},
+        {R367TER_FREESYS2,      0x00},
+        {R367TER_FREESYS3,      0x00},
+        {R367TER_GPIO_CFG,      0x55},
+        {R367TER_GPIO_CMD,      0x00},
+        {R367TER_AGC2MAX,       0xff},
+        {R367TER_AGC2MIN,       0x00},
+        {R367TER_AGC1MAX,       0xff},
+        {R367TER_AGC1MIN,       0x00},
+        {R367TER_AGCR,          0xbc},
+        {R367TER_AGC2TH,        0x00},
+        {R367TER_AGC12C,        0x00},
+        {R367TER_AGCCTRL1,      0x85},
+        {R367TER_AGCCTRL2,      0x1f},
+        {R367TER_AGC1VAL1,      0x00},
+        {R367TER_AGC1VAL2,      0x00},
+        {R367TER_AGC2VAL1,      0x6f},
+        {R367TER_AGC2VAL2,      0x05},
+        {R367TER_AGC2PGA,       0x00},
+        {R367TER_OVF_RATE1,     0x00},
+        {R367TER_OVF_RATE2,     0x00},
+        {R367TER_GAIN_SRC1,     0xaa},/* for xc5000; was 0x2b */
+        {R367TER_GAIN_SRC2,     0xd6},/* for xc5000; was 0x04 */
+        {R367TER_INC_DEROT1,    0x55},
+        {R367TER_INC_DEROT2,    0x55},
+        {R367TER_PPM_CPAMP_DIR, 0x2c},
+        {R367TER_PPM_CPAMP_INV, 0x00},
+        {R367TER_FREESTFE_1,    0x00},
+        {R367TER_FREESTFE_2,    0x1c},
+        {R367TER_DCOFFSET,      0x00},
+        {R367TER_EN_PROCESS,    0x05},
+        {R367TER_SDI_SMOOTHER,  0x80},
+        {R367TER_FE_LOOP_OPEN,  0x1c},
+        {R367TER_FREQOFF1,      0x00},
+        {R367TER_FREQOFF2,      0x00},
+        {R367TER_FREQOFF3,      0x00},
+        {R367TER_TIMOFF1,       0x00},
+        {R367TER_TIMOFF2,       0x00},
+        {R367TER_EPQ,           0x02},
+        {R367TER_EPQAUTO,       0x01},
+        {R367TER_SYR_UPDATE,    0xf5},
+        {R367TER_CHPFREE,       0x00},
+        {R367TER_PPM_STATE_MAC, 0x23},
+        {R367TER_INR_THRESHOLD, 0xff},
+        {R367TER_EPQ_TPS_ID_CELL, 0xf9},
+        {R367TER_EPQ_CFG,       0x00},
+        {R367TER_EPQ_STATUS,    0x01},
+        {R367TER_AUTORELOCK,    0x81},
+        {R367TER_BER_THR_VMSB,  0x00},
+        {R367TER_BER_THR_MSB,   0x00},
+        {R367TER_BER_THR_LSB,   0x00},
+        {R367TER_CCD,           0x83},
+        {R367TER_SPECTR_CFG,    0x00},
+        {R367TER_CHC_DUMMY,     0x18},
+        {R367TER_INC_CTL,       0x88},
+        {R367TER_INCTHRES_COR1, 0xb4},
+        {R367TER_INCTHRES_COR2, 0x96},
+        {R367TER_INCTHRES_DET1, 0x0e},
+        {R367TER_INCTHRES_DET2, 0x11},
+        {R367TER_IIR_CELLNB,    0x8d},
+        {R367TER_IIRCX_COEFF1_MSB, 0x00},
+        {R367TER_IIRCX_COEFF1_LSB, 0x00},
+        {R367TER_IIRCX_COEFF2_MSB, 0x09},
+        {R367TER_IIRCX_COEFF2_LSB, 0x18},
+        {R367TER_IIRCX_COEFF3_MSB, 0x14},
+        {R367TER_IIRCX_COEFF3_LSB, 0x9c},
+        {R367TER_IIRCX_COEFF4_MSB, 0x00},
+        {R367TER_IIRCX_COEFF4_LSB, 0x00},
+        {R367TER_IIRCX_COEFF5_MSB, 0x36},
+        {R367TER_IIRCX_COEFF5_LSB, 0x42},
+        {R367TER_FEPATH_CFG,    0x00},
+        {R367TER_PMC1_FUNC,     0x65},
+        {R367TER_PMC1_FOR,      0x00},
+        {R367TER_PMC2_FUNC,     0x00},
+        {R367TER_STATUS_ERR_DA, 0xe0},
+        {R367TER_DIG_AGC_R,     0xfe},
+        {R367TER_COMAGC_TARMSB, 0x0b},
+        {R367TER_COM_AGC_TAR_ENMODE, 0x41},
+        {R367TER_COM_AGC_CFG,   0x3e},
+        {R367TER_COM_AGC_GAIN1, 0x39},
+        {R367TER_AUT_AGC_TARGETMSB, 0x0b},
+        {R367TER_LOCK_DET_MSB,  0x01},
+        {R367TER_AGCTAR_LOCK_LSBS, 0x40},
+        {R367TER_AUT_GAIN_EN,   0xf4},
+        {R367TER_AUT_CFG,       0xf0},
+        {R367TER_LOCKN,         0x23},
+        {R367TER_INT_X_3,       0x00},
+        {R367TER_INT_X_2,       0x03},
+        {R367TER_INT_X_1,       0x8d},
+        {R367TER_INT_X_0,       0xa0},
+        {R367TER_MIN_ERRX_MSB,  0x00},
+        {R367TER_COR_CTL,       0x23},
+        {R367TER_COR_STAT,      0xf6},
+        {R367TER_COR_INTEN,     0x00},
+        {R367TER_COR_INTSTAT,   0x3f},
+        {R367TER_COR_MODEGUARD, 0x03},
+        {R367TER_AGC_CTL,       0x08},
+        {R367TER_AGC_MANUAL1,   0x00},
+        {R367TER_AGC_MANUAL2,   0x00},
+        {R367TER_AGC_TARG,      0x16},
+        {R367TER_AGC_GAIN1,     0x53},
+        {R367TER_AGC_GAIN2,     0x1d},
+        {R367TER_RESERVED_1,    0x00},
+        {R367TER_RESERVED_2,    0x00},
+        {R367TER_RESERVED_3,    0x00},
+        {R367TER_CAS_CTL,       0x44},
+        {R367TER_CAS_FREQ,      0xb3},
+        {R367TER_CAS_DAGCGAIN,  0x12},
+        {R367TER_SYR_CTL,       0x04},
+        {R367TER_SYR_STAT,      0x10},
+        {R367TER_SYR_NCO1,      0x00},
+        {R367TER_SYR_NCO2,      0x00},
+        {R367TER_SYR_OFFSET1,   0x00},
+        {R367TER_SYR_OFFSET2,   0x00},
+        {R367TER_FFT_CTL,       0x00},
+        {R367TER_SCR_CTL,       0x70},
+        {R367TER_PPM_CTL1,      0xf8},
+        {R367TER_TRL_CTL,       0x14},/* for xc5000; was 0xac */
+        {R367TER_TRL_NOMRATE1,  0xae},/* for xc5000; was 0x1e */
+        {R367TER_TRL_NOMRATE2,  0x56},/* for xc5000; was 0x58 */
+        {R367TER_TRL_TIME1,     0x1d},
+        {R367TER_TRL_TIME2,     0xfc},
+        {R367TER_CRL_CTL,       0x24},
+        {R367TER_CRL_FREQ1,     0xad},
+        {R367TER_CRL_FREQ2,     0x9d},
+        {R367TER_CRL_FREQ3,     0xff},
+        {R367TER_CHC_CTL,       0x01},
+        {R367TER_CHC_SNR,       0xf0},
+        {R367TER_BDI_CTL,       0x00},
+        {R367TER_DMP_CTL,       0x00},
+        {R367TER_TPS_RCVD1,     0x30},
+        {R367TER_TPS_RCVD2,     0x02},
+        {R367TER_TPS_RCVD3,     0x01},
+        {R367TER_TPS_RCVD4,     0x00},
+        {R367TER_TPS_ID_CELL1,  0x00},
+        {R367TER_TPS_ID_CELL2,  0x00},
+        {R367TER_TPS_RCVD5_SET1, 0x02},
+        {R367TER_TPS_SET2,      0x02},
+        {R367TER_TPS_SET3,      0x01},
+        {R367TER_TPS_CTL,       0x00},
+        {R367TER_CTL_FFTOSNUM,  0x34},
+        {R367TER_TESTSELECT,    0x09},
+        {R367TER_MSC_REV,       0x0a},
+        {R367TER_PIR_CTL,       0x00},
+        {R367TER_SNR_CARRIER1,  0xa1},
+        {R367TER_SNR_CARRIER2,  0x9a},
+        {R367TER_PPM_CPAMP,     0x2c},
+        {R367TER_TSM_AP0,       0x00},
+        {R367TER_TSM_AP1,       0x00},
+        {R367TER_TSM_AP2 ,      0x00},
+        {R367TER_TSM_AP3,       0x00},
+        {R367TER_TSM_AP4,       0x00},
+        {R367TER_TSM_AP5,       0x00},
+        {R367TER_TSM_AP6,       0x00},
+        {R367TER_TSM_AP7,       0x00},
+        {R367TER_TSTRES,        0x00},
+        {R367TER_ANACTRL,       0x0D},/* PLL stoped, restart at init!!! */
+        {R367TER_TSTBUS,        0x00},
+        {R367TER_TSTRATE,       0x00},
+        {R367TER_CONSTMODE,     0x01},
+        {R367TER_CONSTCARR1,    0x00},
+        {R367TER_CONSTCARR2,    0x00},
+        {R367TER_ICONSTEL,      0x0a},
+        {R367TER_QCONSTEL,      0x15},
+        {R367TER_TSTBISTRES0,   0x00},
+        {R367TER_TSTBISTRES1,   0x00},
+        {R367TER_TSTBISTRES2,   0x28},
+        {R367TER_TSTBISTRES3,   0x00},
+        {R367TER_RF_AGC1,       0xff},
+        {R367TER_RF_AGC2,       0x83},
+        {R367TER_ANADIGCTRL,    0x19},
+        {R367TER_PLLMDIV,       0x01},/* for xc5000; was 0x0c */
+        {R367TER_PLLNDIV,       0x06},/* for xc5000; was 0x55 */
+        {R367TER_PLLSETUP,      0x18},
+        {R367TER_DUAL_AD12,     0x0C},/* for xc5000 AGC voltage 1.6V */
+        {R367TER_TSTBIST,       0x00},
+        {R367TER_PAD_COMP_CTRL, 0x00},
+        {R367TER_PAD_COMP_WR,   0x00},
+        {R367TER_PAD_COMP_RD,   0xe0},
+        {R367TER_SYR_TARGET_FFTADJT_MSB, 0x00},
+        {R367TER_SYR_TARGET_FFTADJT_LSB, 0x00},
+        {R367TER_SYR_TARGET_CHCADJT_MSB, 0x00},
+        {R367TER_SYR_TARGET_CHCADJT_LSB, 0x00},
+        {R367TER_SYR_FLAG,      0x00},
+        {R367TER_CRL_TARGET1,   0x00},
+        {R367TER_CRL_TARGET2,   0x00},
+        {R367TER_CRL_TARGET3,   0x00},
+        {R367TER_CRL_TARGET4,   0x00},
+        {R367TER_CRL_FLAG,      0x00},
+        {R367TER_TRL_TARGET1,   0x00},
+        {R367TER_TRL_TARGET2,   0x00},
+        {R367TER_TRL_CHC,       0x00},
+        {R367TER_CHC_SNR_TARG,  0x00},
+        {R367TER_TOP_TRACK,     0x00},
+        {R367TER_TRACKER_FREE1, 0x00},
+        {R367TER_ERROR_CRL1,    0x00},
+        {R367TER_ERROR_CRL2,    0x00},
+        {R367TER_ERROR_CRL3,    0x00},
+        {R367TER_ERROR_CRL4,    0x00},
+        {R367TER_DEC_NCO1,      0x2c},
+        {R367TER_DEC_NCO2,      0x0f},
+        {R367TER_DEC_NCO3,      0x20},
+        {R367TER_SNR,           0xf1},
+        {R367TER_SYR_FFTADJ1,   0x00},
+        {R367TER_SYR_FFTADJ2,   0x00},
+        {R367TER_SYR_CHCADJ1,   0x00},
+        {R367TER_SYR_CHCADJ2,   0x00},
+        {R367TER_SYR_OFF,       0x00},
+        {R367TER_PPM_OFFSET1,   0x00},
+        {R367TER_PPM_OFFSET2,   0x03},
+        {R367TER_TRACKER_FREE2, 0x00},
+        {R367TER_DEBG_LT10,     0x00},
+        {R367TER_DEBG_LT11,     0x00},
+        {R367TER_DEBG_LT12,     0x00},
+        {R367TER_DEBG_LT13,     0x00},
+        {R367TER_DEBG_LT14,     0x00},
+        {R367TER_DEBG_LT15,     0x00},
+        {R367TER_DEBG_LT16,     0x00},
+        {R367TER_DEBG_LT17,     0x00},
+        {R367TER_DEBG_LT18,     0x00},
+        {R367TER_DEBG_LT19,     0x00},
+        {R367TER_DEBG_LT1A,     0x00},
+        {R367TER_DEBG_LT1B,     0x00},
+        {R367TER_DEBG_LT1C,     0x00},
+        {R367TER_DEBG_LT1D,     0x00},
+        {R367TER_DEBG_LT1E,     0x00},
+        {R367TER_DEBG_LT1F,     0x00},
+        {R367TER_RCCFGH,        0x00},
+        {R367TER_RCCFGM,        0x00},
+        {R367TER_RCCFGL,        0x00},
+        {R367TER_RCINSDELH,     0x00},
+        {R367TER_RCINSDELM,     0x00},
+        {R367TER_RCINSDELL,     0x00},
+        {R367TER_RCSTATUS,      0x00},
+        {R367TER_RCSPEED,       0x6f},
+        {R367TER_RCDEBUGM,      0xe7},
+        {R367TER_RCDEBUGL,      0x9b},
+        {R367TER_RCOBSCFG,      0x00},
+        {R367TER_RCOBSM,        0x00},
+        {R367TER_RCOBSL,        0x00},
+        {R367TER_RCFECSPY,      0x00},
+        {R367TER_RCFSPYCFG,     0x00},
+        {R367TER_RCFSPYDATA,    0x00},
+        {R367TER_RCFSPYOUT,     0x00},
+        {R367TER_RCFSTATUS,     0x00},
+        {R367TER_RCFGOODPACK,   0x00},
+        {R367TER_RCFPACKCNT,    0x00},
+        {R367TER_RCFSPYMISC,    0x00},
+        {R367TER_RCFBERCPT4,    0x00},
+        {R367TER_RCFBERCPT3,    0x00},
+        {R367TER_RCFBERCPT2,    0x00},
+        {R367TER_RCFBERCPT1,    0x00},
+        {R367TER_RCFBERCPT0,    0x00},
+        {R367TER_RCFBERERR2,    0x00},
+        {R367TER_RCFBERERR1,    0x00},
+        {R367TER_RCFBERERR0,    0x00},
+        {R367TER_RCFSTATESM,    0x00},
+        {R367TER_RCFSTATESL,    0x00},
+        {R367TER_RCFSPYBER,     0x00},
+        {R367TER_RCFSPYDISTM,   0x00},
+        {R367TER_RCFSPYDISTL,   0x00},
+        {R367TER_RCFSPYOBS7,    0x00},
+        {R367TER_RCFSPYOBS6,    0x00},
+        {R367TER_RCFSPYOBS5,    0x00},
+        {R367TER_RCFSPYOBS4,    0x00},
+        {R367TER_RCFSPYOBS3,    0x00},
+        {R367TER_RCFSPYOBS2,    0x00},
+        {R367TER_RCFSPYOBS1,    0x00},
+        {R367TER_RCFSPYOBS0,    0x00},
+        {R367TER_TSGENERAL,     0x00},
+        {R367TER_RC1SPEED,      0x6f},
+        {R367TER_TSGSTATUS,     0x18},
+        {R367TER_FECM,          0x01},
+        {R367TER_VTH12,         0xff},
+        {R367TER_VTH23,         0xa1},
+        {R367TER_VTH34,         0x64},
+        {R367TER_VTH56,         0x40},
+        {R367TER_VTH67,         0x00},
+        {R367TER_VTH78,         0x2c},
+        {R367TER_VITCURPUN,     0x12},
+        {R367TER_VERROR,        0x01},
+        {R367TER_PRVIT,         0x3f},
+        {R367TER_VAVSRVIT,      0x00},
+        {R367TER_VSTATUSVIT,    0xbd},
+        {R367TER_VTHINUSE,      0xa1},
+        {R367TER_KDIV12,        0x20},
+        {R367TER_KDIV23,        0x40},
+        {R367TER_KDIV34,        0x20},
+        {R367TER_KDIV56,        0x30},
+        {R367TER_KDIV67,        0x00},
+        {R367TER_KDIV78,        0x30},
+        {R367TER_SIGPOWER,      0x54},
+        {R367TER_DEMAPVIT,      0x40},
+        {R367TER_VITSCALE,      0x00},
+        {R367TER_FFEC1PRG,      0x00},
+        {R367TER_FVITCURPUN,    0x12},
+        {R367TER_FVERROR,       0x01},
+        {R367TER_FVSTATUSVIT,   0xbd},
+        {R367TER_DEBUG_LT1,     0x00},
+        {R367TER_DEBUG_LT2,     0x00},
+        {R367TER_DEBUG_LT3,     0x00},
+        {R367TER_TSTSFMET,      0x00},
+        {R367TER_SELOUT,        0x00},
+        {R367TER_TSYNC,         0x00},
+        {R367TER_TSTERR,        0x00},
+        {R367TER_TSFSYNC,       0x00},
+        {R367TER_TSTSFERR,      0x00},
+        {R367TER_TSTTSSF1,      0x01},
+        {R367TER_TSTTSSF2,      0x1f},
+        {R367TER_TSTTSSF3,      0x00},
+        {R367TER_TSTTS1,        0x00},
+        {R367TER_TSTTS2,        0x1f},
+        {R367TER_TSTTS3,        0x01},
+        {R367TER_TSTTS4,        0x00},
+        {R367TER_TSTTSRC,       0x00},
+        {R367TER_TSTTSRS,       0x00},
+        {R367TER_TSSTATEM,      0xb0},
+        {R367TER_TSSTATEL,      0x40},
+        {R367TER_TSCFGH,        0xC0},
+        {R367TER_TSCFGM,        0xc0},/* for xc5000; was 0x00 */
+        {R367TER_TSCFGL,        0x20},
+        {R367TER_TSSYNC,        0x00},
+        {R367TER_TSINSDELH,     0x00},
+        {R367TER_TSINSDELM,     0x00},
+        {R367TER_TSINSDELL,     0x00},
+        {R367TER_TSDIVN,        0x03},
+        {R367TER_TSDIVPM,       0x00},
+        {R367TER_TSDIVPL,       0x00},
+        {R367TER_TSDIVQM,       0x00},
+        {R367TER_TSDIVQL,       0x00},
+        {R367TER_TSDILSTKM,     0x00},
+        {R367TER_TSDILSTKL,     0x00},
+        {R367TER_TSSPEED,       0x40},/* for xc5000; was 0x6f */
+        {R367TER_TSSTATUS,      0x81},
+        {R367TER_TSSTATUS2,     0x6a},
+        {R367TER_TSBITRATEM,    0x0f},
+        {R367TER_TSBITRATEL,    0xc6},
+        {R367TER_TSPACKLENM,    0x00},
+        {R367TER_TSPACKLENL,    0xfc},
+        {R367TER_TSBLOCLENM,    0x0a},
+        {R367TER_TSBLOCLENL,    0x80},
+        {R367TER_TSDLYH,        0x90},
+        {R367TER_TSDLYM,        0x68},
+        {R367TER_TSDLYL,        0x01},
+        {R367TER_TSNPDAV,       0x00},
+        {R367TER_TSBUFSTATH,    0x00},
+        {R367TER_TSBUFSTATM,    0x00},
+        {R367TER_TSBUFSTATL,    0x00},
+        {R367TER_TSDEBUGM,      0xcf},
+        {R367TER_TSDEBUGL,      0x1e},
+        {R367TER_TSDLYSETH,     0x00},
+        {R367TER_TSDLYSETM,     0x68},
+        {R367TER_TSDLYSETL,     0x00},
+        {R367TER_TSOBSCFG,      0x00},
+        {R367TER_TSOBSM,        0x47},
+        {R367TER_TSOBSL,        0x1f},
+        {R367TER_ERRCTRL1,      0x95},
+        {R367TER_ERRCNT1H,      0x80},
+        {R367TER_ERRCNT1M,      0x00},
+        {R367TER_ERRCNT1L,      0x00},
+        {R367TER_ERRCTRL2,      0x95},
+        {R367TER_ERRCNT2H,      0x00},
+        {R367TER_ERRCNT2M,      0x00},
+        {R367TER_ERRCNT2L,      0x00},
+        {R367TER_FECSPY,        0x88},
+        {R367TER_FSPYCFG,       0x2c},
+        {R367TER_FSPYDATA,      0x3a},
+        {R367TER_FSPYOUT,       0x06},
+        {R367TER_FSTATUS,       0x61},
+        {R367TER_FGOODPACK,     0xff},
+        {R367TER_FPACKCNT,      0xff},
+        {R367TER_FSPYMISC,      0x66},
+        {R367TER_FBERCPT4,      0x00},
+        {R367TER_FBERCPT3,      0x00},
+        {R367TER_FBERCPT2,      0x36},
+        {R367TER_FBERCPT1,      0x36},
+        {R367TER_FBERCPT0,      0x14},
+        {R367TER_FBERERR2,      0x00},
+        {R367TER_FBERERR1,      0x03},
+        {R367TER_FBERERR0,      0x28},
+        {R367TER_FSTATESM,      0x00},
+        {R367TER_FSTATESL,      0x02},
+        {R367TER_FSPYBER,       0x00},
+        {R367TER_FSPYDISTM,     0x01},
+        {R367TER_FSPYDISTL,     0x9f},
+        {R367TER_FSPYOBS7,      0xc9},
+        {R367TER_FSPYOBS6,      0x99},
+        {R367TER_FSPYOBS5,      0x08},
+        {R367TER_FSPYOBS4,      0xec},
+        {R367TER_FSPYOBS3,      0x01},
+        {R367TER_FSPYOBS2,      0x0f},
+        {R367TER_FSPYOBS1,      0xf5},
+        {R367TER_FSPYOBS0,      0x08},
+        {R367TER_SFDEMAP,       0x40},
+        {R367TER_SFERROR,       0x00},
+        {R367TER_SFAVSR,        0x30},
+        {R367TER_SFECSTATUS,    0xcc},
+        {R367TER_SFKDIV12,      0x20},
+        {R367TER_SFKDIV23,      0x40},
+        {R367TER_SFKDIV34,      0x20},
+        {R367TER_SFKDIV56,      0x20},
+        {R367TER_SFKDIV67,      0x00},
+        {R367TER_SFKDIV78,      0x20},
+        {R367TER_SFDILSTKM,     0x00},
+        {R367TER_SFDILSTKL,     0x00},
+        {R367TER_SFSTATUS,      0xb5},
+        {R367TER_SFDLYH,        0x90},
+        {R367TER_SFDLYM,        0x60},
+        {R367TER_SFDLYL,        0x01},
+        {R367TER_SFDLYSETH,     0xc0},
+        {R367TER_SFDLYSETM,     0x60},
+        {R367TER_SFDLYSETL,     0x00},
+        {R367TER_SFOBSCFG,      0x00},
+        {R367TER_SFOBSM,        0x47},
+        {R367TER_SFOBSL,        0x05},
+        {R367TER_SFECINFO,      0x40},
+        {R367TER_SFERRCTRL,     0x74},
+        {R367TER_SFERRCNTH,     0x80},
+        {R367TER_SFERRCNTM ,    0x00},
+        {R367TER_SFERRCNTL,     0x00},
+        {R367TER_SYMBRATEM,     0x2f},
+        {R367TER_SYMBRATEL,     0x50},
+        {R367TER_SYMBSTATUS,    0x7f},
+        {R367TER_SYMBCFG,       0x00},
+        {R367TER_SYMBFIFOM,     0xf4},
+        {R367TER_SYMBFIFOL,     0x0d},
+        {R367TER_SYMBOFFSM,     0xf0},
+        {R367TER_SYMBOFFSL,     0x2d},
+        {R367TER_DEBUG_LT4,     0x00},
+        {R367TER_DEBUG_LT5,     0x00},
+        {R367TER_DEBUG_LT6,     0x00},
+        {R367TER_DEBUG_LT7,     0x00},
+        {R367TER_DEBUG_LT8,     0x00},
+        {R367TER_DEBUG_LT9,     0x00},
+};
+
+#define RF_LOOKUP_TABLE_SIZE  31
+#define RF_LOOKUP_TABLE2_SIZE 16
+/* RF Level (for RF AGC->AGC1) Lookup Table, depends on the board and tuner.*/
+s32 stv0367cab_RF_LookUp1[RF_LOOKUP_TABLE_SIZE][RF_LOOKUP_TABLE_SIZE] = {
+        {/*AGC1*/
+                48, 50, 51, 53, 54, 56, 57, 58, 60, 61, 62, 63,
+                64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75,
+                76, 77, 78, 80, 83, 85, 88,
+        }, {/*RF(dbm)*/
+                22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,
+                34, 35, 36, 37, 38, 39, 41, 42, 43, 44, 46, 47,
+                49, 50, 52, 53, 54, 55, 56,
+        }
+};
+/* RF Level (for IF AGC->AGC2) Lookup Table, depends on the board and tuner.*/
+s32 stv0367cab_RF_LookUp2[RF_LOOKUP_TABLE2_SIZE][RF_LOOKUP_TABLE2_SIZE] = {
+        {/*AGC2*/
+                28, 29, 31, 32, 34, 35, 36, 37,
+                38, 39, 40, 41, 42, 43, 44, 45,
+        }, {/*RF(dbm)*/
+                57, 58, 59, 60, 61, 62, 63, 64,
+                65, 66, 67, 68, 69, 70, 71, 72,
+        }
+};
+
+static struct st_register def0367cab[STV0367CAB_NBREGS] = {
+        {R367CAB_ID,            0x60},
+        {R367CAB_I2CRPT,        0xa0},
+        /*{R367CAB_I2CRPT,      0x22},*/
+        {R367CAB_TOPCTRL,       0x10},
+        {R367CAB_IOCFG0,        0x80},
+        {R367CAB_DAC0R,         0x00},
+        {R367CAB_IOCFG1,        0x00},
+        {R367CAB_DAC1R,         0x00},
+        {R367CAB_IOCFG2,        0x00},
+        {R367CAB_SDFR,          0x00},
+        {R367CAB_AUX_CLK,       0x00},
+        {R367CAB_FREESYS1,      0x00},
+        {R367CAB_FREESYS2,      0x00},
+        {R367CAB_FREESYS3,      0x00},
+        {R367CAB_GPIO_CFG,      0x55},
+        {R367CAB_GPIO_CMD,      0x01},
+        {R367CAB_TSTRES,        0x00},
+        {R367CAB_ANACTRL,       0x0d},/* was 0x00 need to check - I.M.L.*/
+        {R367CAB_TSTBUS,        0x00},
+        {R367CAB_RF_AGC1,       0xea},
+        {R367CAB_RF_AGC2,       0x82},
+        {R367CAB_ANADIGCTRL,    0x0b},
+        {R367CAB_PLLMDIV,       0x01},
+        {R367CAB_PLLNDIV,       0x08},
+        {R367CAB_PLLSETUP,      0x18},
+        {R367CAB_DUAL_AD12,     0x0C}, /* for xc5000 AGC voltage 1.6V */
+        {R367CAB_TSTBIST,       0x00},
+        {R367CAB_CTRL_1,        0x00},
+        {R367CAB_CTRL_2,        0x03},
+        {R367CAB_IT_STATUS1,    0x2b},
+        {R367CAB_IT_STATUS2,    0x08},
+        {R367CAB_IT_EN1,        0x00},
+        {R367CAB_IT_EN2,        0x00},
+        {R367CAB_CTRL_STATUS,   0x04},
+        {R367CAB_TEST_CTL,      0x00},
+        {R367CAB_AGC_CTL,       0x73},
+        {R367CAB_AGC_IF_CFG,    0x50},
+        {R367CAB_AGC_RF_CFG,    0x00},
+        {R367CAB_AGC_PWM_CFG,   0x03},
+        {R367CAB_AGC_PWR_REF_L, 0x5a},
+        {R367CAB_AGC_PWR_REF_H, 0x00},
+        {R367CAB_AGC_RF_TH_L,   0xff},
+        {R367CAB_AGC_RF_TH_H,   0x07},
+        {R367CAB_AGC_IF_LTH_L,  0x00},
+        {R367CAB_AGC_IF_LTH_H,  0x08},
+        {R367CAB_AGC_IF_HTH_L,  0xff},
+        {R367CAB_AGC_IF_HTH_H,  0x07},
+        {R367CAB_AGC_PWR_RD_L,  0xa0},
+        {R367CAB_AGC_PWR_RD_M,  0xe9},
+        {R367CAB_AGC_PWR_RD_H,  0x03},
+        {R367CAB_AGC_PWM_IFCMD_L,       0xe4},
+        {R367CAB_AGC_PWM_IFCMD_H,       0x00},
+        {R367CAB_AGC_PWM_RFCMD_L,       0xff},
+        {R367CAB_AGC_PWM_RFCMD_H,       0x07},
+        {R367CAB_IQDEM_CFG,     0x01},
+        {R367CAB_MIX_NCO_LL,    0x22},
+        {R367CAB_MIX_NCO_HL,    0x96},
+        {R367CAB_MIX_NCO_HH,    0x55},
+        {R367CAB_SRC_NCO_LL,    0xff},
+        {R367CAB_SRC_NCO_LH,    0x0c},
+        {R367CAB_SRC_NCO_HL,    0xf5},
+        {R367CAB_SRC_NCO_HH,    0x20},
+        {R367CAB_IQDEM_GAIN_SRC_L,      0x06},
+        {R367CAB_IQDEM_GAIN_SRC_H,      0x01},
+        {R367CAB_IQDEM_DCRM_CFG_LL,     0xfe},
+        {R367CAB_IQDEM_DCRM_CFG_LH,     0xff},
+        {R367CAB_IQDEM_DCRM_CFG_HL,     0x0f},
+        {R367CAB_IQDEM_DCRM_CFG_HH,     0x00},
+        {R367CAB_IQDEM_ADJ_COEFF0,      0x34},
+        {R367CAB_IQDEM_ADJ_COEFF1,      0xae},
+        {R367CAB_IQDEM_ADJ_COEFF2,      0x46},
+        {R367CAB_IQDEM_ADJ_COEFF3,      0x77},
+        {R367CAB_IQDEM_ADJ_COEFF4,      0x96},
+        {R367CAB_IQDEM_ADJ_COEFF5,      0x69},
+        {R367CAB_IQDEM_ADJ_COEFF6,      0xc7},
+        {R367CAB_IQDEM_ADJ_COEFF7,      0x01},
+        {R367CAB_IQDEM_ADJ_EN,  0x04},
+        {R367CAB_IQDEM_ADJ_AGC_REF,     0x94},
+        {R367CAB_ALLPASSFILT1,  0xc9},
+        {R367CAB_ALLPASSFILT2,  0x2d},
+        {R367CAB_ALLPASSFILT3,  0xa3},
+        {R367CAB_ALLPASSFILT4,  0xfb},
+        {R367CAB_ALLPASSFILT5,  0xf6},
+        {R367CAB_ALLPASSFILT6,  0x45},
+        {R367CAB_ALLPASSFILT7,  0x6f},
+        {R367CAB_ALLPASSFILT8,  0x7e},
+        {R367CAB_ALLPASSFILT9,  0x05},
+        {R367CAB_ALLPASSFILT10, 0x0a},
+        {R367CAB_ALLPASSFILT11, 0x51},
+        {R367CAB_TRL_AGC_CFG,   0x20},
+        {R367CAB_TRL_LPF_CFG,   0x28},
+        {R367CAB_TRL_LPF_ACQ_GAIN,      0x44},
+        {R367CAB_TRL_LPF_TRK_GAIN,      0x22},
+        {R367CAB_TRL_LPF_OUT_GAIN,      0x03},
+        {R367CAB_TRL_LOCKDET_LTH,       0x04},
+        {R367CAB_TRL_LOCKDET_HTH,       0x11},
+        {R367CAB_TRL_LOCKDET_TRGVAL,    0x20},
+        {R367CAB_IQ_QAM,        0x01},
+        {R367CAB_FSM_STATE,     0xa0},
+        {R367CAB_FSM_CTL,       0x08},
+        {R367CAB_FSM_STS,       0x0c},
+        {R367CAB_FSM_SNR0_HTH,  0x00},
+        {R367CAB_FSM_SNR1_HTH,  0x00},
+        {R367CAB_FSM_SNR2_HTH,  0x23},/* 0x00 */
+        {R367CAB_FSM_SNR0_LTH,  0x00},
+        {R367CAB_FSM_SNR1_LTH,  0x00},
+        {R367CAB_FSM_EQA1_HTH,  0x00},
+        {R367CAB_FSM_TEMPO,     0x32},
+        {R367CAB_FSM_CONFIG,    0x03},
+        {R367CAB_EQU_I_TESTTAP_L,       0x11},
+        {R367CAB_EQU_I_TESTTAP_M,       0x00},
+        {R367CAB_EQU_I_TESTTAP_H,       0x00},
+        {R367CAB_EQU_TESTAP_CFG,        0x00},
+        {R367CAB_EQU_Q_TESTTAP_L,       0xff},
+        {R367CAB_EQU_Q_TESTTAP_M,       0x00},
+        {R367CAB_EQU_Q_TESTTAP_H,       0x00},
+        {R367CAB_EQU_TAP_CTRL,  0x00},
+        {R367CAB_EQU_CTR_CRL_CONTROL_L, 0x11},
+        {R367CAB_EQU_CTR_CRL_CONTROL_H, 0x05},
+        {R367CAB_EQU_CTR_HIPOW_L,       0x00},
+        {R367CAB_EQU_CTR_HIPOW_H,       0x00},
+        {R367CAB_EQU_I_EQU_LO,  0xef},
+        {R367CAB_EQU_I_EQU_HI,  0x00},
+        {R367CAB_EQU_Q_EQU_LO,  0xee},
+        {R367CAB_EQU_Q_EQU_HI,  0x00},
+        {R367CAB_EQU_MAPPER,    0xc5},
+        {R367CAB_EQU_SWEEP_RATE,        0x80},
+        {R367CAB_EQU_SNR_LO,    0x64},
+        {R367CAB_EQU_SNR_HI,    0x03},
+        {R367CAB_EQU_GAMMA_LO,  0x00},
+        {R367CAB_EQU_GAMMA_HI,  0x00},
+        {R367CAB_EQU_ERR_GAIN,  0x36},
+        {R367CAB_EQU_RADIUS,    0xaa},
+        {R367CAB_EQU_FFE_MAINTAP,       0x00},
+        {R367CAB_EQU_FFE_LEAKAGE,       0x63},
+        {R367CAB_EQU_FFE_MAINTAP_POS,   0xdf},
+        {R367CAB_EQU_GAIN_WIDE, 0x88},
+        {R367CAB_EQU_GAIN_NARROW,       0x41},
+        {R367CAB_EQU_CTR_LPF_GAIN,      0xd1},
+        {R367CAB_EQU_CRL_LPF_GAIN,      0xa7},
+        {R367CAB_EQU_GLOBAL_GAIN,       0x06},
+        {R367CAB_EQU_CRL_LD_SEN,        0x85},
+        {R367CAB_EQU_CRL_LD_VAL,        0xe2},
+        {R367CAB_EQU_CRL_TFR,   0x20},
+        {R367CAB_EQU_CRL_BISTH_LO,      0x00},
+        {R367CAB_EQU_CRL_BISTH_HI,      0x00},
+        {R367CAB_EQU_SWEEP_RANGE_LO,    0x00},
+        {R367CAB_EQU_SWEEP_RANGE_HI,    0x00},
+        {R367CAB_EQU_CRL_LIMITER,       0x40},
+        {R367CAB_EQU_MODULUS_MAP,       0x90},
+        {R367CAB_EQU_PNT_GAIN,  0xa7},
+        {R367CAB_FEC_AC_CTR_0,  0x16},
+        {R367CAB_FEC_AC_CTR_1,  0x0b},
+        {R367CAB_FEC_AC_CTR_2,  0x88},
+        {R367CAB_FEC_AC_CTR_3,  0x02},
+        {R367CAB_FEC_STATUS,    0x12},
+        {R367CAB_RS_COUNTER_0,  0x7d},
+        {R367CAB_RS_COUNTER_1,  0xd0},
+        {R367CAB_RS_COUNTER_2,  0x19},
+        {R367CAB_RS_COUNTER_3,  0x0b},
+        {R367CAB_RS_COUNTER_4,  0xa3},
+        {R367CAB_RS_COUNTER_5,  0x00},
+        {R367CAB_BERT_0,        0x01},
+        {R367CAB_BERT_1,        0x25},
+        {R367CAB_BERT_2,        0x41},
+        {R367CAB_BERT_3,        0x39},
+        {R367CAB_OUTFORMAT_0,   0xc2},
+        {R367CAB_OUTFORMAT_1,   0x22},
+        {R367CAB_SMOOTHER_2,    0x28},
+        {R367CAB_TSMF_CTRL_0,   0x01},
+        {R367CAB_TSMF_CTRL_1,   0xc6},
+        {R367CAB_TSMF_CTRL_3,   0x43},
+        {R367CAB_TS_ON_ID_0,    0x00},
+        {R367CAB_TS_ON_ID_1,    0x00},
+        {R367CAB_TS_ON_ID_2,    0x00},
+        {R367CAB_TS_ON_ID_3,    0x00},
+        {R367CAB_RE_STATUS_0,   0x00},
+        {R367CAB_RE_STATUS_1,   0x00},
+        {R367CAB_RE_STATUS_2,   0x00},
+        {R367CAB_RE_STATUS_3,   0x00},
+        {R367CAB_TS_STATUS_0,   0x00},
+        {R367CAB_TS_STATUS_1,   0x00},
+        {R367CAB_TS_STATUS_2,   0xa0},
+        {R367CAB_TS_STATUS_3,   0x00},
+        {R367CAB_T_O_ID_0,      0x00},
+        {R367CAB_T_O_ID_1,      0x00},
+        {R367CAB_T_O_ID_2,      0x00},
+        {R367CAB_T_O_ID_3,      0x00},
+};
+
+static
+int stv0367_writeregs(struct stv0367_state *state, u16 reg, u8 *data, int len)
+{
+        u8 buf[len + 2];
+        struct i2c_msg msg = {
+                .addr = state->config->demod_address,
+                .flags = 0,
+                .buf = buf,
+                .len = len + 2
+        };
+        int ret;
+
+        buf[0] = MSB(reg);
+        buf[1] = LSB(reg);
+        memcpy(buf + 2, data, len);
+
+        if (i2cdebug)
+                printk(KERN_DEBUG "%s: %02x: %02x\n", __func__, reg, buf[2]);
+
+        ret = i2c_transfer(state->i2c, &msg, 1);
+        if (ret != 1)
+                printk(KERN_ERR "%s: i2c write error!\n", __func__);
+
+        return (ret != 1) ? -EREMOTEIO : 0;
+}
+
+static int stv0367_writereg(struct stv0367_state *state, u16 reg, u8 data)
+{
+        return stv0367_writeregs(state, reg, &data, 1);
+}
+
+static u8 stv0367_readreg(struct stv0367_state *state, u16 reg)
+{
+        u8 b0[] = { 0, 0 };
+        u8 b1[] = { 0 };
+        struct i2c_msg msg[] = {
+                {
+                        .addr = state->config->demod_address,
+                        .flags = 0,
+                        .buf = b0,
+                        .len = 2
+                }, {
+                        .addr = state->config->demod_address,
+                        .flags = I2C_M_RD,
+                        .buf = b1,
+                        .len = 1
+                }
+        };
+        int ret;
+
+        b0[0] = MSB(reg);
+        b0[1] = LSB(reg);
+
+        ret = i2c_transfer(state->i2c, msg, 2);
+        if (ret != 2)
+                printk(KERN_ERR "%s: i2c read error\n", __func__);
+
+        if (i2cdebug)
+                printk(KERN_DEBUG "%s: %02x: %02x\n", __func__, reg, b1[0]);
+
+        return b1[0];
+}
+
+static void extract_mask_pos(u32 label, u8 *mask, u8 *pos)
+{
+        u8 position = 0, i = 0;
+
+        (*mask) = label & 0xff;
+
+        while ((position == 0) && (i < 8)) {
+                position = ((*mask) >> i) & 0x01;
+                i++;
+        }
+
+        (*pos) = (i - 1);
+}
+
+static void stv0367_writebits(struct stv0367_state *state, u32 label, u8 val)
+{
+        u8 reg, mask, pos;
+
+        reg = stv0367_readreg(state, (label >> 16) & 0xffff);
+        extract_mask_pos(label, &mask, &pos);
+
+        val = mask & (val << pos);
+
+        reg = (reg & (~mask)) | val;
+        stv0367_writereg(state, (label >> 16) & 0xffff, reg);
+
+}
+
+static void stv0367_setbits(u8 *reg, u32 label, u8 val)
+{
+        u8 mask, pos;
+
+        extract_mask_pos(label, &mask, &pos);
+
+        val = mask & (val << pos);
+
+        (*reg) = ((*reg) & (~mask)) | val;
+}
+
+static u8 stv0367_readbits(struct stv0367_state *state, u32 label)
+{
+        u8 val = 0xff;
+        u8 mask, pos;
+
+        extract_mask_pos(label, &mask, &pos);
+
+        val = stv0367_readreg(state, label >> 16);
+        val = (val & mask) >> pos;
+
+        return val;
+}
+
+u8 stv0367_getbits(u8 reg, u32 label)
+{
+        u8 mask, pos;
+
+        extract_mask_pos(label, &mask, &pos);
+
+        return (reg & mask) >> pos;
+}
+
+static int stv0367ter_gate_ctrl(struct dvb_frontend *fe, int enable)
+{
+        struct stv0367_state *state = fe->demodulator_priv;
+        u8 tmp = stv0367_readreg(state, R367TER_I2CRPT);
+
+        dprintk("%s:\n", __func__);
+
+        if (enable) {
+                stv0367_setbits(&tmp, F367TER_STOP_ENABLE, 0);
+                stv0367_setbits(&tmp, F367TER_I2CT_ON, 1);
+        } else {
+                stv0367_setbits(&tmp, F367TER_STOP_ENABLE, 1);
+                stv0367_setbits(&tmp, F367TER_I2CT_ON, 0);
+        }
+
+        stv0367_writereg(state, R367TER_I2CRPT, tmp);
+
+        return 0;
+}
+
+static u32 stv0367_get_tuner_freq(struct dvb_frontend *fe)
+{
+        struct dvb_frontend_ops *frontend_ops = NULL;
+        struct dvb_tuner_ops    *tuner_ops = NULL;
+        u32 freq = 0;
+        int err = 0;
+
+        dprintk("%s:\n", __func__);
+
+
+        if (&fe->ops)
+                frontend_ops = &fe->ops;
+        if (&frontend_ops->tuner_ops)
+                tuner_ops = &frontend_ops->tuner_ops;
+        if (tuner_ops->get_frequency) {
+                err = tuner_ops->get_frequency(fe, &freq);
+                if (err < 0) {
+                        printk(KERN_ERR "%s: Invalid parameter\n", __func__);
+                        return err;
+                }
+
+                dprintk("%s: frequency=%d\n", __func__, freq);
+
+        } else
+                return -1;
+
+        return freq;
+}
+
+static u16 CellsCoeffs_8MHz_367cofdm[3][6][5] = {
+        {
+                {0x10EF, 0xE205, 0x10EF, 0xCE49, 0x6DA7}, /* CELL 1 COEFFS 27M*/
+                {0x2151, 0xc557, 0x2151, 0xc705, 0x6f93}, /* CELL 2 COEFFS */
+                {0x2503, 0xc000, 0x2503, 0xc375, 0x7194}, /* CELL 3 COEFFS */
+                {0x20E9, 0xca94, 0x20e9, 0xc153, 0x7194}, /* CELL 4 COEFFS */
+                {0x06EF, 0xF852, 0x06EF, 0xC057, 0x7207}, /* CELL 5 COEFFS */
+                {0x0000, 0x0ECC, 0x0ECC, 0x0000, 0x3647} /* CELL 6 COEFFS */
+        }, {
+                {0x10A0, 0xE2AF, 0x10A1, 0xCE76, 0x6D6D}, /* CELL 1 COEFFS 25M*/
+                {0x20DC, 0xC676, 0x20D9, 0xC80A, 0x6F29},
+                {0x2532, 0xC000, 0x251D, 0xC391, 0x706F},
+                {0x1F7A, 0xCD2B, 0x2032, 0xC15E, 0x711F},
+                {0x0698, 0xFA5E, 0x0568, 0xC059, 0x7193},
+                {0x0000, 0x0918, 0x149C, 0x0000, 0x3642} /* CELL 6 COEFFS */
+        }, {
+                {0x0000, 0x0000, 0x0000, 0x0000, 0x0000}, /* 30M */
+                {0x0000, 0x0000, 0x0000, 0x0000, 0x0000},
+                {0x0000, 0x0000, 0x0000, 0x0000, 0x0000},
+                {0x0000, 0x0000, 0x0000, 0x0000, 0x0000},
+                {0x0000, 0x0000, 0x0000, 0x0000, 0x0000},
+                {0x0000, 0x0000, 0x0000, 0x0000, 0x0000}
+        }
+};
+
+static u16 CellsCoeffs_7MHz_367cofdm[3][6][5] = {
+        {
+                {0x12CA, 0xDDAF, 0x12CA, 0xCCEB, 0x6FB1}, /* CELL 1 COEFFS 27M*/
+                {0x2329, 0xC000, 0x2329, 0xC6B0, 0x725F}, /* CELL 2 COEFFS */
+                {0x2394, 0xC000, 0x2394, 0xC2C7, 0x7410}, /* CELL 3 COEFFS */
+                {0x251C, 0xC000, 0x251C, 0xC103, 0x74D9}, /* CELL 4 COEFFS */
+                {0x0804, 0xF546, 0x0804, 0xC040, 0x7544}, /* CELL 5 COEFFS */
+                {0x0000, 0x0CD9, 0x0CD9, 0x0000, 0x370A} /* CELL 6 COEFFS */
+        }, {
+                {0x1285, 0xDE47, 0x1285, 0xCD17, 0x6F76}, /*25M*/
+                {0x234C, 0xC000, 0x2348, 0xC6DA, 0x7206},
+                {0x23B4, 0xC000, 0x23AC, 0xC2DB, 0x73B3},
+                {0x253D, 0xC000, 0x25B6, 0xC10B, 0x747F},
+                {0x0721, 0xF79C, 0x065F, 0xC041, 0x74EB},
+                {0x0000, 0x08FA, 0x1162, 0x0000, 0x36FF}
+        }, {
+                {0x0000, 0x0000, 0x0000, 0x0000, 0x0000}, /* 30M */
+                {0x0000, 0x0000, 0x0000, 0x0000, 0x0000},
+                {0x0000, 0x0000, 0x0000, 0x0000, 0x0000},
+                {0x0000, 0x0000, 0x0000, 0x0000, 0x0000},
+                {0x0000, 0x0000, 0x0000, 0x0000, 0x0000},
+                {0x0000, 0x0000, 0x0000, 0x0000, 0x0000}
+        }
+};
+
+static u16 CellsCoeffs_6MHz_367cofdm[3][6][5] = {
+        {
+                {0x1699, 0xD5B8, 0x1699, 0xCBC3, 0x713B}, /* CELL 1 COEFFS 27M*/
+                {0x2245, 0xC000, 0x2245, 0xC568, 0x74D5}, /* CELL 2 COEFFS */
+                {0x227F, 0xC000, 0x227F, 0xC1FC, 0x76C6}, /* CELL 3 COEFFS */
+                {0x235E, 0xC000, 0x235E, 0xC0A7, 0x778A}, /* CELL 4 COEFFS */
+                {0x0ECB, 0xEA0B, 0x0ECB, 0xC027, 0x77DD}, /* CELL 5 COEFFS */
+                {0x0000, 0x0B68, 0x0B68, 0x0000, 0xC89A}, /* CELL 6 COEFFS */
+        }, {
+                {0x1655, 0xD64E, 0x1658, 0xCBEF, 0x70FE}, /*25M*/
+                {0x225E, 0xC000, 0x2256, 0xC589, 0x7489},
+                {0x2293, 0xC000, 0x2295, 0xC209, 0x767E},
+                {0x2377, 0xC000, 0x23AA, 0xC0AB, 0x7746},
+                {0x0DC7, 0xEBC8, 0x0D07, 0xC027, 0x7799},
+                {0x0000, 0x0888, 0x0E9C, 0x0000, 0x3757}
+
+        }, {
+                {0x0000, 0x0000, 0x0000, 0x0000, 0x0000}, /* 30M */
+                {0x0000, 0x0000, 0x0000, 0x0000, 0x0000},
+                {0x0000, 0x0000, 0x0000, 0x0000, 0x0000},
+                {0x0000, 0x0000, 0x0000, 0x0000, 0x0000},
+                {0x0000, 0x0000, 0x0000, 0x0000, 0x0000},
+                {0x0000, 0x0000, 0x0000, 0x0000, 0x0000}
+        }
+};
+
+static u32 stv0367ter_get_mclk(struct stv0367_state *state, u32 ExtClk_Hz)
+{
+        u32 mclk_Hz = 0; /* master clock frequency (Hz) */
+        u32 m, n, p;
+
+        dprintk("%s:\n", __func__);
+
+        if (stv0367_readbits(state, F367TER_BYPASS_PLLXN) == 0) {
+                n = (u32)stv0367_readbits(state, F367TER_PLL_NDIV);
+                if (n == 0)
+                        n = n + 1;
+
+                m = (u32)stv0367_readbits(state, F367TER_PLL_MDIV);
+                if (m == 0)
+                        m = m + 1;
+
+                p = (u32)stv0367_readbits(state, F367TER_PLL_PDIV);
+                if (p > 5)
+                        p = 5;
+
+                mclk_Hz = ((ExtClk_Hz / 2) * n) / (m * (1 << p));
+
+                dprintk("N=%d M=%d P=%d mclk_Hz=%d ExtClk_Hz=%d\n",
+                                n, m, p, mclk_Hz, ExtClk_Hz);
+        } else
+                mclk_Hz = ExtClk_Hz;
+
+        dprintk("%s: mclk_Hz=%d\n", __func__, mclk_Hz);
+
+        return mclk_Hz;
+}
+
+static int stv0367ter_filt_coeff_init(struct stv0367_state *state,
+                                u16 CellsCoeffs[3][6][5], u32 DemodXtal)
+{
+        int i, j, k, freq;
+
+        dprintk("%s:\n", __func__);
+
+        freq = stv0367ter_get_mclk(state, DemodXtal);
+
+        if (freq == 53125000)
+                k = 1; /* equivalent to Xtal 25M on 362*/
+        else if (freq == 54000000)
+                k = 0; /* equivalent to Xtal 27M on 362*/
+        else if (freq == 52500000)
+                k = 2; /* equivalent to Xtal 30M on 362*/
+        else
+                return 0;
+
+        for (i = 1; i <= 6; i++) {
+                stv0367_writebits(state, F367TER_IIR_CELL_NB, i - 1);
+
+                for (j = 1; j <= 5; j++) {
+                        stv0367_writereg(state,
+                                (R367TER_IIRCX_COEFF1_MSB + 2 * (j - 1)),
+                                MSB(CellsCoeffs[k][i-1][j-1]));
+                        stv0367_writereg(state,
+                                (R367TER_IIRCX_COEFF1_LSB + 2 * (j - 1)),
+                                LSB(CellsCoeffs[k][i-1][j-1]));
+                }
+        }
+
+        return 1;
+
+}
+
+static void stv0367ter_agc_iir_lock_detect_set(struct stv0367_state *state)
+{
+        dprintk("%s:\n", __func__);
+
+        stv0367_writebits(state, F367TER_LOCK_DETECT_LSB, 0x00);
+
+        /* Lock detect 1 */
+        stv0367_writebits(state, F367TER_LOCK_DETECT_CHOICE, 0x00);
+        stv0367_writebits(state, F367TER_LOCK_DETECT_MSB, 0x06);
+        stv0367_writebits(state, F367TER_AUT_AGC_TARGET_LSB, 0x04);
+
+        /* Lock detect 2 */
+        stv0367_writebits(state, F367TER_LOCK_DETECT_CHOICE, 0x01);
+        stv0367_writebits(state, F367TER_LOCK_DETECT_MSB, 0x06);
+        stv0367_writebits(state, F367TER_AUT_AGC_TARGET_LSB, 0x04);
+
+        /* Lock detect 3 */
+        stv0367_writebits(state, F367TER_LOCK_DETECT_CHOICE, 0x02);
+        stv0367_writebits(state, F367TER_LOCK_DETECT_MSB, 0x01);
+        stv0367_writebits(state, F367TER_AUT_AGC_TARGET_LSB, 0x00);
+
+        /* Lock detect 4 */
+        stv0367_writebits(state, F367TER_LOCK_DETECT_CHOICE, 0x03);
+        stv0367_writebits(state, F367TER_LOCK_DETECT_MSB, 0x01);
+        stv0367_writebits(state, F367TER_AUT_AGC_TARGET_LSB, 0x00);
+
+}
+
+static int stv0367_iir_filt_init(struct stv0367_state *state, u8 Bandwidth,
+                                                        u32 DemodXtalValue)
+{
+        dprintk("%s:\n", __func__);
+
+        stv0367_writebits(state, F367TER_NRST_IIR, 0);
+
+        switch (Bandwidth) {
+        case 6:
+                if (!stv0367ter_filt_coeff_init(state,
+                                CellsCoeffs_6MHz_367cofdm,
+                                DemodXtalValue))
+                        return 0;
+                break;
+        case 7:
+                if (!stv0367ter_filt_coeff_init(state,
+                                CellsCoeffs_7MHz_367cofdm,
+                                DemodXtalValue))
+                        return 0;
+                break;
+        case 8:
+                if (!stv0367ter_filt_coeff_init(state,
+                                CellsCoeffs_8MHz_367cofdm,
+                                DemodXtalValue))
+                        return 0;
+                break;
+        default:
+                return 0;
+        }
+
+        stv0367_writebits(state, F367TER_NRST_IIR, 1);
+
+        return 1;
+}
+
+static void stv0367ter_agc_iir_rst(struct stv0367_state *state)
+{
+
+        u8 com_n;
+
+        dprintk("%s:\n", __func__);
+
+        com_n = stv0367_readbits(state, F367TER_COM_N);
+
+        stv0367_writebits(state, F367TER_COM_N, 0x07);
+
+        stv0367_writebits(state, F367TER_COM_SOFT_RSTN, 0x00);
+        stv0367_writebits(state, F367TER_COM_AGC_ON, 0x00);
+
+        stv0367_writebits(state, F367TER_COM_SOFT_RSTN, 0x01);
+        stv0367_writebits(state, F367TER_COM_AGC_ON, 0x01);
+
+        stv0367_writebits(state, F367TER_COM_N, com_n);
+
+}
+
+static int stv0367ter_duration(s32 mode, int tempo1, int tempo2, int tempo3)
+{
+        int local_tempo = 0;
+        switch (mode) {
+        case 0:
+                local_tempo = tempo1;
+                break;
+        case 1:
+                local_tempo = tempo2;
+                break ;
+
+        case 2:
+                local_tempo = tempo3;
+                break;
+
+        default:
+                break;
+        }
+        /*      msleep(local_tempo);  */
+        return local_tempo;
+}
+
+static enum
+stv0367_ter_signal_type stv0367ter_check_syr(struct stv0367_state *state)
+{
+        int wd = 100;
+        unsigned short int SYR_var;
+        s32 SYRStatus;
+
+        dprintk("%s:\n", __func__);
+
+        SYR_var = stv0367_readbits(state, F367TER_SYR_LOCK);
+
+        while ((!SYR_var) && (wd > 0)) {
+                usleep_range(2000, 3000);
+                wd -= 2;
+                SYR_var = stv0367_readbits(state, F367TER_SYR_LOCK);
+        }
+
+        if (!SYR_var)
+                SYRStatus = FE_TER_NOSYMBOL;
+        else
+                SYRStatus =  FE_TER_SYMBOLOK;
+
+        dprintk("stv0367ter_check_syr SYRStatus %s\n",
+                                SYR_var == 0 ? "No Symbol" : "OK");
+
+        return SYRStatus;
+}
+
+static enum
+stv0367_ter_signal_type stv0367ter_check_cpamp(struct stv0367_state *state,
+                                                                s32 FFTmode)
+{
+
+        s32  CPAMPvalue = 0, CPAMPStatus, CPAMPMin;
+        int wd = 0;
+
+        dprintk("%s:\n", __func__);
+
+        switch (FFTmode) {
+        case 0: /*2k mode*/
+                CPAMPMin = 20;
+                wd = 10;
+                break;
+        case 1: /*8k mode*/
+                CPAMPMin = 80;
+                wd = 55;
+                break;
+        case 2: /*4k mode*/
+                CPAMPMin = 40;
+                wd = 30;
+                break;
+        default:
+                CPAMPMin = 0xffff;  /*drives to NOCPAMP */
+                break;
+        }
+
+        dprintk("%s: CPAMPMin=%d wd=%d\n", __func__, CPAMPMin, wd);
+
+        CPAMPvalue = stv0367_readbits(state, F367TER_PPM_CPAMP_DIRECT);
+        while ((CPAMPvalue < CPAMPMin) && (wd > 0)) {
+                usleep_range(1000, 2000);
+                wd -= 1;
+                CPAMPvalue = stv0367_readbits(state, F367TER_PPM_CPAMP_DIRECT);
+                /*dprintk("CPAMPvalue= %d at wd=%d\n",CPAMPvalue,wd); */
+        }
+        dprintk("******last CPAMPvalue= %d at wd=%d\n", CPAMPvalue, wd);
+        if (CPAMPvalue < CPAMPMin) {
+                CPAMPStatus = FE_TER_NOCPAMP;
+                printk(KERN_ERR "CPAMP failed\n");
+        } else {
+                printk(KERN_ERR "CPAMP OK !\n");
+                CPAMPStatus = FE_TER_CPAMPOK;
+        }
+
+        return CPAMPStatus;
+}
+
+enum
+stv0367_ter_signal_type stv0367ter_lock_algo(struct stv0367_state *state)
+{
+        enum stv0367_ter_signal_type ret_flag;
+        short int wd, tempo;
+        u8 try, u_var1 = 0, u_var2 = 0, u_var3 = 0, u_var4 = 0, mode, guard;
+        u8 tmp, tmp2;
+
+        dprintk("%s:\n", __func__);
+
+        if (state == NULL)
+                return FE_TER_SWNOK;
+
+        try = 0;
+        do {
+                ret_flag = FE_TER_LOCKOK;
+
+                stv0367_writebits(state, F367TER_CORE_ACTIVE, 0);
+
+                if (state->config->if_iq_mode != 0)
+                        stv0367_writebits(state, F367TER_COM_N, 0x07);
+
+                stv0367_writebits(state, F367TER_GUARD, 3);/* suggest 2k 1/4 */
+                stv0367_writebits(state, F367TER_MODE, 0);
+                stv0367_writebits(state, F367TER_SYR_TR_DIS, 0);
+                usleep_range(5000, 10000);
+
+                stv0367_writebits(state, F367TER_CORE_ACTIVE, 1);
+
+
+                if (stv0367ter_check_syr(state) == FE_TER_NOSYMBOL)
+                        return FE_TER_NOSYMBOL;
+                else { /*
+                        if chip locked on wrong mode first try,
+                        it must lock correctly second try */
+                        mode = stv0367_readbits(state, F367TER_SYR_MODE);
+                        if (stv0367ter_check_cpamp(state, mode) ==
+                                                        FE_TER_NOCPAMP) {
+                                if (try == 0)
+                                        ret_flag = FE_TER_NOCPAMP;
+
+                        }
+                }
+
+                try++;
+        } while ((try < 10) && (ret_flag != FE_TER_LOCKOK));
+
+        tmp  = stv0367_readreg(state, R367TER_SYR_STAT);
+        tmp2 = stv0367_readreg(state, R367TER_STATUS);
+        dprintk("state=%p\n", state);
+        dprintk("LOCK OK! mode=%d SYR_STAT=0x%x R367TER_STATUS=0x%x\n",
+                                                        mode, tmp, tmp2);
+
+        tmp  = stv0367_readreg(state, R367TER_PRVIT);
+        tmp2 = stv0367_readreg(state, R367TER_I2CRPT);
+        dprintk("PRVIT=0x%x I2CRPT=0x%x\n", tmp, tmp2);
+
+        tmp  = stv0367_readreg(state, R367TER_GAIN_SRC1);
+        dprintk("GAIN_SRC1=0x%x\n", tmp);
+
+        if ((mode != 0) && (mode != 1) && (mode != 2))
+                return FE_TER_SWNOK;
+
+        /*guard=stv0367_readbits(state,F367TER_SYR_GUARD); */
+
+        /*suppress EPQ auto for SYR_GARD 1/16 or 1/32
+        and set channel predictor in automatic */
+#if 0
+        switch (guard) {
+
+        case 0:
+        case 1:
+                stv0367_writebits(state, F367TER_AUTO_LE_EN, 0);
+                stv0367_writereg(state, R367TER_CHC_CTL, 0x01);
+                break;
+        case 2:
+        case 3:
+                stv0367_writebits(state, F367TER_AUTO_LE_EN, 1);
+                stv0367_writereg(state, R367TER_CHC_CTL, 0x11);
+                break;
+
+        default:
+                return FE_TER_SWNOK;
+        }
+#endif
+
+        /*reset fec an reedsolo FOR 367 only*/
+        stv0367_writebits(state, F367TER_RST_SFEC, 1);
+        stv0367_writebits(state, F367TER_RST_REEDSOLO, 1);
+        usleep_range(1000, 2000);
+        stv0367_writebits(state, F367TER_RST_SFEC, 0);
+        stv0367_writebits(state, F367TER_RST_REEDSOLO, 0);
+
+        u_var1 = stv0367_readbits(state, F367TER_LK);
+        u_var2 = stv0367_readbits(state, F367TER_PRF);
+        u_var3 = stv0367_readbits(state, F367TER_TPS_LOCK);
+        /*      u_var4=stv0367_readbits(state,F367TER_TSFIFO_LINEOK); */
+
+        wd = stv0367ter_duration(mode, 125, 500, 250);
+        tempo = stv0367ter_duration(mode, 4, 16, 8);
+
+        /*while ( ((!u_var1)||(!u_var2)||(!u_var3)||(!u_var4))  && (wd>=0)) */
+        while (((!u_var1) || (!u_var2) || (!u_var3)) && (wd >= 0)) {
+                usleep_range(1000 * tempo, 1000 * (tempo + 1));
+                wd -= tempo;
+                u_var1 = stv0367_readbits(state, F367TER_LK);
+                u_var2 = stv0367_readbits(state, F367TER_PRF);
+                u_var3 = stv0367_readbits(state, F367TER_TPS_LOCK);
+                /*u_var4=stv0367_readbits(state, F367TER_TSFIFO_LINEOK); */
+        }
+
+        if (!u_var1)
+                return FE_TER_NOLOCK;
+
+
+        if (!u_var2)
+                return FE_TER_NOPRFOUND;
+
+        if (!u_var3)
+                return FE_TER_NOTPS;
+
+        guard = stv0367_readbits(state, F367TER_SYR_GUARD);
+        stv0367_writereg(state, R367TER_CHC_CTL, 0x11);
+        switch (guard) {
+        case 0:
+        case 1:
+                stv0367_writebits(state, F367TER_AUTO_LE_EN, 0);
+                /*stv0367_writereg(state,R367TER_CHC_CTL, 0x1);*/
+                stv0367_writebits(state, F367TER_SYR_FILTER, 0);
+                break;
+        case 2:
+        case 3:
+                stv0367_writebits(state, F367TER_AUTO_LE_EN, 1);
+                /*stv0367_writereg(state,R367TER_CHC_CTL, 0x11);*/
+                stv0367_writebits(state, F367TER_SYR_FILTER, 1);
+                break;
+
+        default:
+                return FE_TER_SWNOK;
+        }
+
+        /* apply Sfec workaround if 8K 64QAM CR!=1/2*/
+        if ((stv0367_readbits(state, F367TER_TPS_CONST) == 2) &&
+                        (mode == 1) &&
+                        (stv0367_readbits(state, F367TER_TPS_HPCODE) != 0)) {
+                stv0367_writereg(state, R367TER_SFDLYSETH, 0xc0);
+                stv0367_writereg(state, R367TER_SFDLYSETM, 0x60);
+                stv0367_writereg(state, R367TER_SFDLYSETL, 0x0);
+        } else
+                stv0367_writereg(state, R367TER_SFDLYSETH, 0x0);
+
+        wd = stv0367ter_duration(mode, 125, 500, 250);
+        u_var4 = stv0367_readbits(state, F367TER_TSFIFO_LINEOK);
+
+        while ((!u_var4) && (wd >= 0)) {
+                usleep_range(1000 * tempo, 1000 * (tempo + 1));
+                wd -= tempo;
+                u_var4 = stv0367_readbits(state, F367TER_TSFIFO_LINEOK);
+        }
+
+        if (!u_var4)
+                return FE_TER_NOLOCK;
+
+        /* for 367 leave COM_N at 0x7 for IQ_mode*/
+        /*if(ter_state->if_iq_mode!=FE_TER_NORMAL_IF_TUNER) {
+                tempo=0;
+                while ((stv0367_readbits(state,F367TER_COM_USEGAINTRK)!=1) &&
+                (stv0367_readbits(state,F367TER_COM_AGCLOCK)!=1)&&(tempo<100)) {
+                        ChipWaitOrAbort(state,1);
+                        tempo+=1;
+                }
+
+                stv0367_writebits(state,F367TER_COM_N,0x17);
+        } */
+
+        stv0367_writebits(state, F367TER_SYR_TR_DIS, 1);
+
+        dprintk("FE_TER_LOCKOK !!!\n");
+
+        return  FE_TER_LOCKOK;
+
+}
+
+static void stv0367ter_set_ts_mode(struct stv0367_state *state,
+                                        enum stv0367_ts_mode PathTS)
+{
+
+        dprintk("%s:\n", __func__);
+
+        if (state == NULL)
+                return;
+
+        stv0367_writebits(state, F367TER_TS_DIS, 0);
+        switch (PathTS) {
+        default:
+                /*for removing warning :default we can assume in parallel mode*/
+        case STV0367_PARALLEL_PUNCT_CLOCK:
+                stv0367_writebits(state, F367TER_TSFIFO_SERIAL, 0);
+                stv0367_writebits(state, F367TER_TSFIFO_DVBCI, 0);
+                break;
+        case STV0367_SERIAL_PUNCT_CLOCK:
+                stv0367_writebits(state, F367TER_TSFIFO_SERIAL, 1);
+                stv0367_writebits(state, F367TER_TSFIFO_DVBCI, 1);
+                break;
+        }
+}
+
+static void stv0367ter_set_clk_pol(struct stv0367_state *state,
+                                        enum stv0367_clk_pol clock)
+{
+
+        dprintk("%s:\n", __func__);
+
+        if (state == NULL)
+                return;
+
+        switch (clock) {
+        case STV0367_RISINGEDGE_CLOCK:
+                stv0367_writebits(state, F367TER_TS_BYTE_CLK_INV, 1);
+                break;
+        case STV0367_FALLINGEDGE_CLOCK:
+                stv0367_writebits(state, F367TER_TS_BYTE_CLK_INV, 0);
+                break;
+                /*case FE_TER_CLOCK_POLARITY_DEFAULT:*/
+        default:
+                stv0367_writebits(state, F367TER_TS_BYTE_CLK_INV, 0);
+                break;
+        }
+}
+
+#if 0
+static void stv0367ter_core_sw(struct stv0367_state *state)
+{
+
+        dprintk("%s:\n", __func__);
+
+        stv0367_writebits(state, F367TER_CORE_ACTIVE, 0);
+        stv0367_writebits(state, F367TER_CORE_ACTIVE, 1);
+        msleep(350);
+}
+#endif
+static int stv0367ter_standby(struct dvb_frontend *fe, u8 standby_on)
+{
+        struct stv0367_state *state = fe->demodulator_priv;
+
+        dprintk("%s:\n", __func__);
+
+        if (standby_on) {
+                stv0367_writebits(state, F367TER_STDBY, 1);
+                stv0367_writebits(state, F367TER_STDBY_FEC, 1);
+                stv0367_writebits(state, F367TER_STDBY_CORE, 1);
+        } else {
+                stv0367_writebits(state, F367TER_STDBY, 0);
+                stv0367_writebits(state, F367TER_STDBY_FEC, 0);
+                stv0367_writebits(state, F367TER_STDBY_CORE, 0);
+        }
+
+        return 0;
+}
+
+static int stv0367ter_sleep(struct dvb_frontend *fe)
+{
+        return stv0367ter_standby(fe, 1);
+}
+
+int stv0367ter_init(struct dvb_frontend *fe)
+{
+        struct stv0367_state *state = fe->demodulator_priv;
+        struct stv0367ter_state *ter_state = state->ter_state;
+        int i;
+
+        dprintk("%s:\n", __func__);
+
+        ter_state->pBER = 0;
+
+        for (i = 0; i < STV0367TER_NBREGS; i++)
+                stv0367_writereg(state, def0367ter[i].addr,
+                                        def0367ter[i].value);
+
+        switch (state->config->xtal) {
+                /*set internal freq to 53.125MHz */
+        case 25000000:
+                stv0367_writereg(state, R367TER_PLLMDIV, 0xa);
+                stv0367_writereg(state, R367TER_PLLNDIV, 0x55);
+                stv0367_writereg(state, R367TER_PLLSETUP, 0x18);
+                break;
+        default:
+        case 27000000:
+                dprintk("FE_STV0367TER_SetCLKgen for 27Mhz\n");
+                stv0367_writereg(state, R367TER_PLLMDIV, 0x1);
+                stv0367_writereg(state, R367TER_PLLNDIV, 0x8);
+                stv0367_writereg(state, R367TER_PLLSETUP, 0x18);
+                break;
+        case 30000000:
+                stv0367_writereg(state, R367TER_PLLMDIV, 0xc);
+                stv0367_writereg(state, R367TER_PLLNDIV, 0x55);
+                stv0367_writereg(state, R367TER_PLLSETUP, 0x18);
+                break;
+        }
+
+        stv0367_writereg(state, R367TER_I2CRPT, 0xa0);
+        stv0367_writereg(state, R367TER_ANACTRL, 0x00);
+
+        /*Set TS1 and TS2 to serial or parallel mode */
+        stv0367ter_set_ts_mode(state, state->config->ts_mode);
+        stv0367ter_set_clk_pol(state, state->config->clk_pol);
+
+        state->chip_id = stv0367_readreg(state, R367TER_ID);
+        ter_state->first_lock = 0;
+        ter_state->unlock_counter = 2;
+
+        return 0;
+}
+
+static int stv0367ter_algo(struct dvb_frontend *fe,
+                                struct dvb_frontend_parameters *param)
+{
+        struct stv0367_state *state = fe->demodulator_priv;
+        struct stv0367ter_state *ter_state = state->ter_state;
+        int offset = 0, tempo = 0;
+        u8 u_var;
+        u8 /*constell,*/ counter, tps_rcvd[2];
+        s8 step;
+        s32 timing_offset = 0;
+        u32 trl_nomrate = 0, InternalFreq = 0, temp = 0;
+
+        dprintk("%s:\n", __func__);
+
+        ter_state->frequency = param->frequency;
+        ter_state->force = FE_TER_FORCENONE
+                        + stv0367_readbits(state, F367TER_FORCE) * 2;
+        ter_state->if_iq_mode = state->config->if_iq_mode;
+        switch (state->config->if_iq_mode) {
+        case FE_TER_NORMAL_IF_TUNER:  /* Normal IF mode */
+                dprintk("ALGO: FE_TER_NORMAL_IF_TUNER selected\n");
+                stv0367_writebits(state, F367TER_TUNER_BB, 0);
+                stv0367_writebits(state, F367TER_LONGPATH_IF, 0);
+                stv0367_writebits(state, F367TER_DEMUX_SWAP, 0);
+                break;
+        case FE_TER_LONGPATH_IF_TUNER:  /* Long IF mode */
+                dprintk("ALGO: FE_TER_LONGPATH_IF_TUNER selected\n");
+                stv0367_writebits(state, F367TER_TUNER_BB, 0);
+                stv0367_writebits(state, F367TER_LONGPATH_IF, 1);
+                stv0367_writebits(state, F367TER_DEMUX_SWAP, 1);
+                break;
+        case FE_TER_IQ_TUNER:  /* IQ mode */
+                dprintk("ALGO: FE_TER_IQ_TUNER selected\n");
+                stv0367_writebits(state, F367TER_TUNER_BB, 1);
+                stv0367_writebits(state, F367TER_PPM_INVSEL, 0);
+                break;
+        default:
+                printk(KERN_ERR "ALGO: wrong TUNER type selected\n");
+                return -EINVAL;
+        }
+
+        usleep_range(5000, 7000);
+
+        switch (param->inversion) {
+        case INVERSION_AUTO:
+        default:
+                dprintk("%s: inversion AUTO\n", __func__);
+                if (ter_state->if_iq_mode == FE_TER_IQ_TUNER)
+                        stv0367_writebits(state, F367TER_IQ_INVERT,
+                                                ter_state->sense);
+                else
+                        stv0367_writebits(state, F367TER_INV_SPECTR,
+                                                ter_state->sense);
+
+                break;
+        case INVERSION_ON:
+        case INVERSION_OFF:
+                if (ter_state->if_iq_mode == FE_TER_IQ_TUNER)
+                        stv0367_writebits(state, F367TER_IQ_INVERT,
+                                                param->inversion);
+                else
+                        stv0367_writebits(state, F367TER_INV_SPECTR,
+                                                param->inversion);
+
+                break;
+        }
+
+        if ((ter_state->if_iq_mode != FE_TER_NORMAL_IF_TUNER) &&
+                                (ter_state->pBW != ter_state->bw)) {
+                stv0367ter_agc_iir_lock_detect_set(state);
+
+                /*set fine agc target to 180 for LPIF or IQ mode*/
+                /* set Q_AGCTarget */
+                stv0367_writebits(state, F367TER_SEL_IQNTAR, 1);
+                stv0367_writebits(state, F367TER_AUT_AGC_TARGET_MSB, 0xB);
+                /*stv0367_writebits(state,AUT_AGC_TARGET_LSB,0x04); */
+
+                /* set Q_AGCTarget */
+                stv0367_writebits(state, F367TER_SEL_IQNTAR, 0);
+                stv0367_writebits(state, F367TER_AUT_AGC_TARGET_MSB, 0xB);
+                /*stv0367_writebits(state,AUT_AGC_TARGET_LSB,0x04); */
+
+                if (!stv0367_iir_filt_init(state, ter_state->bw,
+                                                state->config->xtal))
+                        return -EINVAL;
+                /*set IIR filter once for 6,7 or 8MHz BW*/
+                ter_state->pBW = ter_state->bw;
+
+                stv0367ter_agc_iir_rst(state);
+        }
+
+        if (ter_state->hierarchy == FE_TER_HIER_LOW_PRIO)
+                stv0367_writebits(state, F367TER_BDI_LPSEL, 0x01);
+        else
+                stv0367_writebits(state, F367TER_BDI_LPSEL, 0x00);
+
+        InternalFreq = stv0367ter_get_mclk(state, state->config->xtal) / 1000;
+        temp = (int)
+                ((((ter_state->bw * 64 * (1 << 15) * 100)
+                                                / (InternalFreq)) * 10) / 7);
+
+        stv0367_writebits(state, F367TER_TRL_NOMRATE_LSB, temp % 2);
+        temp = temp / 2;
+        stv0367_writebits(state, F367TER_TRL_NOMRATE_HI, temp / 256);
+        stv0367_writebits(state, F367TER_TRL_NOMRATE_LO, temp % 256);
+
+        temp = stv0367_readbits(state, F367TER_TRL_NOMRATE_HI) * 512 +
+                        stv0367_readbits(state, F367TER_TRL_NOMRATE_LO) * 2 +
+                        stv0367_readbits(state, F367TER_TRL_NOMRATE_LSB);
+        temp = (int)(((1 << 17) * ter_state->bw * 1000) / (7 * (InternalFreq)));
+        stv0367_writebits(state, F367TER_GAIN_SRC_HI, temp / 256);
+        stv0367_writebits(state, F367TER_GAIN_SRC_LO, temp % 256);
+        temp = stv0367_readbits(state, F367TER_GAIN_SRC_HI) * 256 +
+                        stv0367_readbits(state, F367TER_GAIN_SRC_LO);
+
+        temp = (int)
+                ((InternalFreq - state->config->if_khz) * (1 << 16)
+                                                        / (InternalFreq));
+
+        dprintk("DEROT temp=0x%x\n", temp);
+        stv0367_writebits(state, F367TER_INC_DEROT_HI, temp / 256);
+        stv0367_writebits(state, F367TER_INC_DEROT_LO, temp % 256);
+
+        ter_state->echo_pos = 0;
+        ter_state->ucblocks = 0; /* liplianin */
+        ter_state->pBER = 0; /* liplianin */
+        stv0367_writebits(state, F367TER_LONG_ECHO, ter_state->echo_pos);
+
+        if (stv0367ter_lock_algo(state) != FE_TER_LOCKOK)
+                return 0;
+
+        ter_state->state = FE_TER_LOCKOK;
+        /* update results */
+        tps_rcvd[0] = stv0367_readreg(state, R367TER_TPS_RCVD2);
+        tps_rcvd[1] = stv0367_readreg(state, R367TER_TPS_RCVD3);
+
+        ter_state->mode = stv0367_readbits(state, F367TER_SYR_MODE);
+        ter_state->guard = stv0367_readbits(state, F367TER_SYR_GUARD);
+
+        ter_state->first_lock = 1; /* we know sense now :) */
+
+        ter_state->agc_val =
+                        (stv0367_readbits(state, F367TER_AGC1_VAL_LO) << 16) +
+                        (stv0367_readbits(state, F367TER_AGC1_VAL_HI) << 24) +
+                        stv0367_readbits(state, F367TER_AGC2_VAL_LO) +
+                        (stv0367_readbits(state, F367TER_AGC2_VAL_HI) << 8);
+
+        /* Carrier offset calculation */
+        stv0367_writebits(state, F367TER_FREEZE, 1);
+        offset = (stv0367_readbits(state, F367TER_CRL_FOFFSET_VHI) << 16) ;
+        offset += (stv0367_readbits(state, F367TER_CRL_FOFFSET_HI) << 8);
+        offset += (stv0367_readbits(state, F367TER_CRL_FOFFSET_LO));
+        stv0367_writebits(state, F367TER_FREEZE, 0);
+        if (offset > 8388607)
+                offset -= 16777216;
+
+        offset = offset * 2 / 16384;
+
+        if (ter_state->mode == FE_TER_MODE_2K)
+                offset = (offset * 4464) / 1000;/*** 1 FFT BIN=4.464khz***/
+        else if (ter_state->mode == FE_TER_MODE_4K)
+                offset = (offset * 223) / 100;/*** 1 FFT BIN=2.23khz***/
+        else  if (ter_state->mode == FE_TER_MODE_8K)
+                offset = (offset * 111) / 100;/*** 1 FFT BIN=1.1khz***/
+
+        if (stv0367_readbits(state, F367TER_PPM_INVSEL) == 1) {
+                if ((stv0367_readbits(state, F367TER_INV_SPECTR) ==
+                                (stv0367_readbits(state,
+                                        F367TER_STATUS_INV_SPECRUM) == 1)))
+                        offset = offset * -1;
+        }
+
+        if (ter_state->bw == 6)
+                offset = (offset * 6) / 8;
+        else if (ter_state->bw == 7)
+                offset = (offset * 7) / 8;
+
+        ter_state->frequency += offset;
+
+        tempo = 10;  /* exit even if timing_offset stays null */
+        while ((timing_offset == 0) && (tempo > 0)) {
+                usleep_range(10000, 20000);     /*was 20ms  */
+                /* fine tuning of timing offset if required */
+                timing_offset = stv0367_readbits(state, F367TER_TRL_TOFFSET_LO)
+                                + 256 * stv0367_readbits(state,
+                                                        F367TER_TRL_TOFFSET_HI);
+                if (timing_offset >= 32768)
+                        timing_offset -= 65536;
+                trl_nomrate = (512 * stv0367_readbits(state,
+                                                        F367TER_TRL_NOMRATE_HI)
+                        + stv0367_readbits(state, F367TER_TRL_NOMRATE_LO) * 2
+                        + stv0367_readbits(state, F367TER_TRL_NOMRATE_LSB));
+
+                timing_offset = ((signed)(1000000 / trl_nomrate) *
+                                                        timing_offset) / 2048;
+                tempo--;
+        }
+
+        if (timing_offset <= 0) {
+                timing_offset = (timing_offset - 11) / 22;
+                step = -1;
+        } else {
+                timing_offset = (timing_offset + 11) / 22;
+                step = 1;
+        }
+
+        for (counter = 0; counter < abs(timing_offset); counter++) {
+                trl_nomrate += step;
+                stv0367_writebits(state, F367TER_TRL_NOMRATE_LSB,
+                                                trl_nomrate % 2);
+                stv0367_writebits(state, F367TER_TRL_NOMRATE_LO,
+                                                trl_nomrate / 2);
+                usleep_range(1000, 2000);
+        }
+
+        usleep_range(5000, 6000);
+        /* unlocks could happen in case of trl centring big step,
+        then a core off/on restarts demod */
+        u_var = stv0367_readbits(state, F367TER_LK);
+
+        if (!u_var) {
+                stv0367_writebits(state, F367TER_CORE_ACTIVE, 0);
+                msleep(20);
+                stv0367_writebits(state, F367TER_CORE_ACTIVE, 1);
+        }
+
+        return 0;
+}
+
+static int stv0367ter_set_frontend(struct dvb_frontend *fe,
+                                struct dvb_frontend_parameters *param)
+{
+        struct dvb_ofdm_parameters *op = &param->u.ofdm;
+        struct stv0367_state *state = fe->demodulator_priv;
+        struct stv0367ter_state *ter_state = state->ter_state;
+
+        /*u8 trials[2]; */
+        s8 num_trials, index;
+        u8 SenseTrials[] = { INVERSION_ON, INVERSION_OFF };
+
+        stv0367ter_init(fe);
+
+        if (fe->ops.tuner_ops.set_params) {
+                if (fe->ops.i2c_gate_ctrl)
+                        fe->ops.i2c_gate_ctrl(fe, 1);
+                fe->ops.tuner_ops.set_params(fe, param);
+                if (fe->ops.i2c_gate_ctrl)
+                        fe->ops.i2c_gate_ctrl(fe, 0);
+        }
+
+        switch (op->transmission_mode) {
+        default:
+        case TRANSMISSION_MODE_AUTO:
+        case TRANSMISSION_MODE_2K:
+                ter_state->mode = FE_TER_MODE_2K;
+                break;
+/*      case TRANSMISSION_MODE_4K:
+                pLook.mode = FE_TER_MODE_4K;
+                break;*/
+        case TRANSMISSION_MODE_8K:
+                ter_state->mode = FE_TER_MODE_8K;
+                break;
+        }
+
+        switch (op->guard_interval) {
+        default:
+        case GUARD_INTERVAL_1_32:
+        case GUARD_INTERVAL_1_16:
+        case GUARD_INTERVAL_1_8:
+        case GUARD_INTERVAL_1_4:
+                ter_state->guard = op->guard_interval;
+                break;
+        case GUARD_INTERVAL_AUTO:
+                ter_state->guard = GUARD_INTERVAL_1_32;
+                break;
+        }
+
+        switch (op->bandwidth) {
+        case BANDWIDTH_6_MHZ:
+                ter_state->bw = FE_TER_CHAN_BW_6M;
+                break;
+        case BANDWIDTH_7_MHZ:
+                ter_state->bw = FE_TER_CHAN_BW_7M;
+                break;
+        case BANDWIDTH_8_MHZ:
+        default:
+                ter_state->bw = FE_TER_CHAN_BW_8M;
+        }
+
+        ter_state->hierarchy = FE_TER_HIER_NONE;
+
+        switch (param->inversion) {
+        case INVERSION_OFF:
+        case INVERSION_ON:
+                num_trials = 1;
+                break;
+        default:
+                num_trials = 2;
+                if (ter_state->first_lock)
+                        num_trials = 1;
+                break;
+        }
+
+        ter_state->state = FE_TER_NOLOCK;
+        index = 0;
+
+        while (((index) < num_trials) && (ter_state->state != FE_TER_LOCKOK)) {
+                if (!ter_state->first_lock) {
+                        if (param->inversion == INVERSION_AUTO)
+                                ter_state->sense = SenseTrials[index];
+
+                }
+                stv0367ter_algo(fe,/* &pLook, result,*/ param);
+
+                if ((ter_state->state == FE_TER_LOCKOK) &&
+                                (param->inversion == INVERSION_AUTO) &&
+                                                                (index == 1)) {
+                        /* invert spectrum sense */
+                        SenseTrials[index] = SenseTrials[0];
+                        SenseTrials[(index + 1) % 2] = (SenseTrials[1] + 1) % 2;
+                }
+
+                index++;
+        }
+
+        return 0;
+}
+
+static int stv0367ter_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
+{
+        struct stv0367_state *state = fe->demodulator_priv;
+        struct stv0367ter_state *ter_state = state->ter_state;
+        u32 errs = 0;
+
+        /*wait for counting completion*/
+        if (stv0367_readbits(state, F367TER_SFERRC_OLDVALUE) == 0) {
+                errs =
+                        ((u32)stv0367_readbits(state, F367TER_ERR_CNT1)
+                        * (1 << 16))
+                        + ((u32)stv0367_readbits(state, F367TER_ERR_CNT1_HI)
+                        * (1 << 8))
+                        + ((u32)stv0367_readbits(state, F367TER_ERR_CNT1_LO));
+                ter_state->ucblocks = errs;
+        }
+
+        (*ucblocks) = ter_state->ucblocks;
+
+        return 0;
+}
+
+static int stv0367ter_get_frontend(struct dvb_frontend *fe,
+                                  struct dvb_frontend_parameters *param)
+{
+        struct stv0367_state *state = fe->demodulator_priv;
+        struct stv0367ter_state *ter_state = state->ter_state;
+        struct dvb_ofdm_parameters *op = &param->u.ofdm;
+        struct dtv_frontend_properties *c = &fe->dtv_property_cache;
+
+        int error = 0;
+        enum stv0367_ter_mode mode;
+        int constell = 0,/* snr = 0,*/ Data = 0;
+
+        param->frequency = stv0367_get_tuner_freq(fe);
+        if ((int)param->frequency < 0)
+                param->frequency = c->frequency;
+
+        constell = stv0367_readbits(state, F367TER_TPS_CONST);
+        if (constell == 0)
+                op->constellation = QPSK;
+        else if (constell == 1)
+                op->constellation = QAM_16;
+        else
+                op->constellation = QAM_64;
+
+        param->inversion = stv0367_readbits(state, F367TER_INV_SPECTR);
+
+        /* Get the Hierarchical mode */
+        Data = stv0367_readbits(state, F367TER_TPS_HIERMODE);
+
+        switch (Data) {
+        case 0:
+                op->hierarchy_information = HIERARCHY_NONE;
+                break;
+        case 1:
+                op->hierarchy_information = HIERARCHY_1;
+                break;
+        case 2:
+                op->hierarchy_information = HIERARCHY_2;
+                break;
+        case 3:
+                op->hierarchy_information = HIERARCHY_4;
+                break;
+        default:
+                op->hierarchy_information = HIERARCHY_AUTO;
+                break; /* error */
+        }
+
+        /* Get the FEC Rate */
+        if (ter_state->hierarchy == FE_TER_HIER_LOW_PRIO)
+                Data = stv0367_readbits(state, F367TER_TPS_LPCODE);
+        else
+                Data = stv0367_readbits(state, F367TER_TPS_HPCODE);
+
+        switch (Data) {
+        case 0:
+                op->code_rate_HP = FEC_1_2;
+                break;
+        case 1:
+                op->code_rate_HP = FEC_2_3;
+                break;
+        case 2:
+                op->code_rate_HP = FEC_3_4;
+                break;
+        case 3:
+                op->code_rate_HP = FEC_5_6;
+                break;
+        case 4:
+                op->code_rate_HP = FEC_7_8;
+                break;
+        default:
+                op->code_rate_HP = FEC_AUTO;
+                break; /* error */
+        }
+
+        mode = stv0367_readbits(state, F367TER_SYR_MODE);
+
+        switch (mode) {
+        case FE_TER_MODE_2K:
+                op->transmission_mode = TRANSMISSION_MODE_2K;
+                break;
+/*      case FE_TER_MODE_4K:
+                op->transmission_mode = TRANSMISSION_MODE_4K;
+                break;*/
+        case FE_TER_MODE_8K:
+                op->transmission_mode = TRANSMISSION_MODE_8K;
+                break;
+        default:
+                op->transmission_mode = TRANSMISSION_MODE_AUTO;
+        }
+
+        op->guard_interval = stv0367_readbits(state, F367TER_SYR_GUARD);
+
+        return error;
+}
+
+static int stv0367ter_read_snr(struct dvb_frontend *fe, u16 *snr)
+{
+        struct stv0367_state *state = fe->demodulator_priv;
+        u32 snru32 = 0;
+        int cpt = 0;
+        u8 cut = stv0367_readbits(state, F367TER_IDENTIFICATIONREG);
+
+        while (cpt < 10) {
+                usleep_range(2000, 3000);
+                if (cut == 0x50) /*cut 1.0 cut 1.1*/
+                        snru32 += stv0367_readbits(state, F367TER_CHCSNR) / 4;
+                else /*cu2.0*/
+                        snru32 += 125 * stv0367_readbits(state, F367TER_CHCSNR);
+
+                cpt++;
+        }
+
+        snru32 /= 10;/*average on 10 values*/
+
+        *snr = snru32 / 1000;
+
+        return 0;
+}
+
+#if 0
+static int stv0367ter_status(struct dvb_frontend *fe)
+{
+
+        struct stv0367_state *state = fe->demodulator_priv;
+        struct stv0367ter_state *ter_state = state->ter_state;
+        int locked = FALSE;
+
+        locked = (stv0367_readbits(state, F367TER_LK));
+        if (!locked)
+                ter_state->unlock_counter += 1;
+        else
+                ter_state->unlock_counter = 0;
+
+        if (ter_state->unlock_counter > 2) {
+                if (!stv0367_readbits(state, F367TER_TPS_LOCK) ||
+                                (!stv0367_readbits(state, F367TER_LK))) {
+                        stv0367_writebits(state, F367TER_CORE_ACTIVE, 0);
+                        usleep_range(2000, 3000);
+                        stv0367_writebits(state, F367TER_CORE_ACTIVE, 1);
+                        msleep(350);
+                        locked = (stv0367_readbits(state, F367TER_TPS_LOCK)) &&
+                                        (stv0367_readbits(state, F367TER_LK));
+                }
+
+        }
+
+        return locked;
+}
+#endif
+static int stv0367ter_read_status(struct dvb_frontend *fe, fe_status_t *status)
+{
+        struct stv0367_state *state = fe->demodulator_priv;
+
+        dprintk("%s:\n", __func__);
+
+        *status = 0;
+
+        if (stv0367_readbits(state, F367TER_LK)) {
+                *status |= FE_HAS_LOCK;
+                dprintk("%s: stv0367 has locked\n", __func__);
+        }
+
+        return 0;
+}
+
+static int stv0367ter_read_ber(struct dvb_frontend *fe, u32 *ber)
+{
+        struct stv0367_state *state = fe->demodulator_priv;
+        struct stv0367ter_state *ter_state = state->ter_state;
+        u32 Errors = 0, tber = 0, temporary = 0;
+        int abc = 0, def = 0;
+
+
+        /*wait for counting completion*/
+        if (stv0367_readbits(state, F367TER_SFERRC_OLDVALUE) == 0)
+                Errors = ((u32)stv0367_readbits(state, F367TER_SFEC_ERR_CNT)
+                        * (1 << 16))
+                        + ((u32)stv0367_readbits(state, F367TER_SFEC_ERR_CNT_HI)
+                        * (1 << 8))
+                        + ((u32)stv0367_readbits(state,
+                                                F367TER_SFEC_ERR_CNT_LO));
+        /*measurement not completed, load previous value*/
+        else {
+                tber = ter_state->pBER;
+                return 0;
+        }
+
+        abc = stv0367_readbits(state, F367TER_SFEC_ERR_SOURCE);
+        def = stv0367_readbits(state, F367TER_SFEC_NUM_EVENT);
+
+        if (Errors == 0) {
+                tber = 0;
+        } else if (abc == 0x7) {
+                if (Errors <= 4) {
+                        temporary = (Errors * 1000000000) / (8 * (1 << 14));
+                        temporary =  temporary;
+                } else if (Errors <= 42) {
+                        temporary = (Errors * 100000000) / (8 * (1 << 14));
+                        temporary = temporary * 10;
+                } else if (Errors <= 429) {
+                        temporary = (Errors * 10000000) / (8 * (1 << 14));
+                        temporary = temporary * 100;
+                } else if (Errors <= 4294) {
+                        temporary = (Errors * 1000000) / (8 * (1 << 14));
+                        temporary = temporary * 1000;
+                } else if (Errors <= 42949) {
+                        temporary = (Errors * 100000) / (8 * (1 << 14));
+                        temporary = temporary * 10000;
+                } else if (Errors <= 429496) {
+                        temporary = (Errors * 10000) / (8 * (1 << 14));
+                        temporary = temporary * 100000;
+                } else { /*if (Errors<4294967) 2^22 max error*/
+                        temporary = (Errors * 1000) / (8 * (1 << 14));
+                        temporary = temporary * 100000; /* still to *10 */
+                }
+
+                /* Byte error*/
+                if (def == 2)
+                        /*tber=Errors/(8*(1 <<14));*/
+                        tber = temporary;
+                else if (def == 3)
+                        /*tber=Errors/(8*(1 <<16));*/
+                        tber = temporary / 4;
+                else if (def == 4)
+                        /*tber=Errors/(8*(1 <<18));*/
+                        tber = temporary / 16;
+                else if (def == 5)
+                        /*tber=Errors/(8*(1 <<20));*/
+                        tber = temporary / 64;
+                else if (def == 6)
+                        /*tber=Errors/(8*(1 <<22));*/
+                        tber = temporary / 256;
+                else
+                        /* should not pass here*/
+                        tber = 0;
+
+                if ((Errors < 4294967) && (Errors > 429496))
+                        tber *= 10;
+
+        }
+
+        /* save actual value */
+        ter_state->pBER = tber;
+
+        (*ber) = tber;
+
+        return 0;
+}
+#if 0
+static u32 stv0367ter_get_per(struct stv0367_state *state)
+{
+        struct stv0367ter_state *ter_state = state->ter_state;
+        u32 Errors = 0, Per = 0, temporary = 0;
+        int abc = 0, def = 0, cpt = 0;
+
+        while (((stv0367_readbits(state, F367TER_SFERRC_OLDVALUE) == 1) &&
+                        (cpt < 400)) || ((Errors == 0) && (cpt < 400))) {
+                usleep_range(1000, 2000);
+                Errors = ((u32)stv0367_readbits(state, F367TER_ERR_CNT1)
+                        * (1 << 16))
+                        + ((u32)stv0367_readbits(state, F367TER_ERR_CNT1_HI)
+                        * (1 << 8))
+                        + ((u32)stv0367_readbits(state, F367TER_ERR_CNT1_LO));
+                cpt++;
+        }
+        abc = stv0367_readbits(state, F367TER_ERR_SRC1);
+        def = stv0367_readbits(state, F367TER_NUM_EVT1);
+
+        if (Errors == 0)
+                Per = 0;
+        else if (abc == 0x9) {
+                if (Errors <= 4) {
+                        temporary = (Errors * 1000000000) / (8 * (1 << 8));
+                        temporary =  temporary;
+                } else if (Errors <= 42) {
+                        temporary = (Errors * 100000000) / (8 * (1 << 8));
+                        temporary = temporary * 10;
+                } else if (Errors <= 429) {
+                        temporary = (Errors * 10000000) / (8 * (1 << 8));
+                        temporary = temporary * 100;
+                } else if (Errors <= 4294) {
+                        temporary = (Errors * 1000000) / (8 * (1 << 8));
+                        temporary = temporary * 1000;
+                } else if (Errors <= 42949) {
+                        temporary = (Errors * 100000) / (8 * (1 << 8));
+                        temporary = temporary * 10000;
+                } else { /*if(Errors<=429496)  2^16 errors max*/
+                        temporary = (Errors * 10000) / (8 * (1 << 8));
+                        temporary = temporary * 100000;
+                }
+
+                /* pkt error*/
+                if (def == 2)
+                        /*Per=Errors/(1 << 8);*/
+                        Per = temporary;
+                else if (def == 3)
+                        /*Per=Errors/(1 << 10);*/
+                        Per = temporary / 4;
+                else if (def == 4)
+                        /*Per=Errors/(1 << 12);*/
+                        Per = temporary / 16;
+                else if (def == 5)
+                        /*Per=Errors/(1 << 14);*/
+                        Per = temporary / 64;
+                else if (def == 6)
+                        /*Per=Errors/(1 << 16);*/
+                        Per = temporary / 256;
+                else
+                        Per = 0;
+
+        }
+        /* save actual value */
+        ter_state->pPER = Per;
+
+        return Per;
+}
+#endif
+static int stv0367_get_tune_settings(struct dvb_frontend *fe,
+                                        struct dvb_frontend_tune_settings
+                                        *fe_tune_settings)
+{
+        fe_tune_settings->min_delay_ms = 1000;
+        fe_tune_settings->step_size = 0;
+        fe_tune_settings->max_drift = 0;
+
+        return 0;
+}
+
+static void stv0367_release(struct dvb_frontend *fe)
+{
+        struct stv0367_state *state = fe->demodulator_priv;
+
+        kfree(state->ter_state);
+        kfree(state->cab_state);
+        kfree(state);
+}
+
+static struct dvb_frontend_ops stv0367ter_ops = {
+        .info = {
+                .name                   = "ST STV0367 DVB-T",
+                .type                   = FE_OFDM,
+                .frequency_min          = 47000000,
+                .frequency_max          = 862000000,
+                .frequency_stepsize     = 15625,
+                .frequency_tolerance    = 0,
+                .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 |
+                        FE_CAN_FEC_3_4 | FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 |
+                        FE_CAN_FEC_AUTO |
+                        FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 |
+                        FE_CAN_QAM_128 | FE_CAN_QAM_256 | FE_CAN_QAM_AUTO |
+                        FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_RECOVER |
+                        FE_CAN_INVERSION_AUTO |
+                        FE_CAN_MUTE_TS
+        },
+        .release = stv0367_release,
+        .init = stv0367ter_init,
+        .sleep = stv0367ter_sleep,
+        .i2c_gate_ctrl = stv0367ter_gate_ctrl,
+        .set_frontend = stv0367ter_set_frontend,
+        .get_frontend = stv0367ter_get_frontend,
+        .get_tune_settings = stv0367_get_tune_settings,
+        .read_status = stv0367ter_read_status,
+        .read_ber = stv0367ter_read_ber,/* too slow */
+/*      .read_signal_strength = stv0367_read_signal_strength,*/
+        .read_snr = stv0367ter_read_snr,
+        .read_ucblocks = stv0367ter_read_ucblocks,
+};
+
+struct dvb_frontend *stv0367ter_attach(const struct stv0367_config *config,
+                                   struct i2c_adapter *i2c)
+{
+        struct stv0367_state *state = NULL;
+        struct stv0367ter_state *ter_state = NULL;
+
+        /* allocate memory for the internal state */
+        state = kzalloc(sizeof(struct stv0367_state), GFP_KERNEL);
+        if (state == NULL)
+                goto error;
+        ter_state = kzalloc(sizeof(struct stv0367ter_state), GFP_KERNEL);
+        if (ter_state == NULL)
+                goto error;
+
+        /* setup the state */
+        state->i2c = i2c;
+        state->config = config;
+        state->ter_state = ter_state;
+        state->fe.ops = stv0367ter_ops;
+        state->fe.demodulator_priv = state;
+        state->chip_id = stv0367_readreg(state, 0xf000);
+
+        dprintk("%s: chip_id = 0x%x\n", __func__, state->chip_id);
+
+        /* check if the demod is there */
+        if ((state->chip_id != 0x50) && (state->chip_id != 0x60))
+                goto error;
+
+        return &state->fe;
+
+error:
+        kfree(ter_state);
+        kfree(state);
+        return NULL;
+}
+EXPORT_SYMBOL(stv0367ter_attach);
+
+static int stv0367cab_gate_ctrl(struct dvb_frontend *fe, int enable)
+{
+        struct stv0367_state *state = fe->demodulator_priv;
+
+        dprintk("%s:\n", __func__);
+
+        stv0367_writebits(state, F367CAB_I2CT_ON, (enable > 0) ? 1 : 0);
+
+        return 0;
+}
+
+static u32 stv0367cab_get_mclk(struct dvb_frontend *fe, u32 ExtClk_Hz)
+{
+        struct stv0367_state *state = fe->demodulator_priv;
+        u32 mclk_Hz = 0;/* master clock frequency (Hz) */
+        u32 M, N, P;
+
+
+        if (stv0367_readbits(state, F367CAB_BYPASS_PLLXN) == 0) {
+                N = (u32)stv0367_readbits(state, F367CAB_PLL_NDIV);
+                if (N == 0)
+                        N = N + 1;
+
+                M = (u32)stv0367_readbits(state, F367CAB_PLL_MDIV);
+                if (M == 0)
+                        M = M + 1;
+
+                P = (u32)stv0367_readbits(state, F367CAB_PLL_PDIV);
+
+                if (P > 5)
+                        P = 5;
+
+                mclk_Hz = ((ExtClk_Hz / 2) * N) / (M * (1 << P));
+                dprintk("stv0367cab_get_mclk BYPASS_PLLXN mclk_Hz=%d\n",
+                                                                mclk_Hz);
+        } else
+                mclk_Hz = ExtClk_Hz;
+
+        dprintk("stv0367cab_get_mclk final mclk_Hz=%d\n", mclk_Hz);
+
+        return mclk_Hz;
+}
+
+static u32 stv0367cab_get_adc_freq(struct dvb_frontend *fe, u32 ExtClk_Hz)
+{
+        u32 ADCClk_Hz = ExtClk_Hz;
+
+        ADCClk_Hz = stv0367cab_get_mclk(fe, ExtClk_Hz);
+
+        return ADCClk_Hz;
+}
+
+enum stv0367cab_mod stv0367cab_SetQamSize(struct stv0367_state *state,
+                                        u32 SymbolRate,
+                                        enum stv0367cab_mod QAMSize)
+{
+        /* Set QAM size */
+        stv0367_writebits(state, F367CAB_QAM_MODE, QAMSize);
+
+        /* Set Registers settings specific to the QAM size */
+        switch (QAMSize) {
+        case FE_CAB_MOD_QAM4:
+                stv0367_writereg(state, R367CAB_IQDEM_ADJ_AGC_REF, 0x00);
+                break;
+        case FE_CAB_MOD_QAM16:
+                stv0367_writereg(state, R367CAB_AGC_PWR_REF_L, 0x64);
+                stv0367_writereg(state, R367CAB_IQDEM_ADJ_AGC_REF, 0x00);
+                stv0367_writereg(state, R367CAB_FSM_STATE, 0x90);
+                stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xc1);
+                stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0xa7);
+                stv0367_writereg(state, R367CAB_EQU_CRL_LD_SEN, 0x95);
+                stv0367_writereg(state, R367CAB_EQU_CRL_LIMITER, 0x40);
+                stv0367_writereg(state, R367CAB_EQU_PNT_GAIN, 0x8a);
+                break;
+        case FE_CAB_MOD_QAM32:
+                stv0367_writereg(state, R367CAB_IQDEM_ADJ_AGC_REF, 0x00);
+                stv0367_writereg(state, R367CAB_AGC_PWR_REF_L, 0x6e);
+                stv0367_writereg(state, R367CAB_FSM_STATE, 0xb0);
+                stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xc1);
+                stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0xb7);
+                stv0367_writereg(state, R367CAB_EQU_CRL_LD_SEN, 0x9d);
+                stv0367_writereg(state, R367CAB_EQU_CRL_LIMITER, 0x7f);
+                stv0367_writereg(state, R367CAB_EQU_PNT_GAIN, 0xa7);
+                break;
+        case FE_CAB_MOD_QAM64:
+                stv0367_writereg(state, R367CAB_IQDEM_ADJ_AGC_REF, 0x82);
+                stv0367_writereg(state, R367CAB_AGC_PWR_REF_L, 0x5a);
+                if (SymbolRate > 45000000) {
+                        stv0367_writereg(state, R367CAB_FSM_STATE, 0xb0);
+                        stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xc1);
+                        stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0xa5);
+                } else if (SymbolRate > 25000000) {
+                        stv0367_writereg(state, R367CAB_FSM_STATE, 0xa0);
+                        stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xc1);
+                        stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0xa6);
+                } else {
+                        stv0367_writereg(state, R367CAB_FSM_STATE, 0xa0);
+                        stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xd1);
+                        stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0xa7);
+                }
+                stv0367_writereg(state, R367CAB_EQU_CRL_LD_SEN, 0x95);
+                stv0367_writereg(state, R367CAB_EQU_CRL_LIMITER, 0x40);
+                stv0367_writereg(state, R367CAB_EQU_PNT_GAIN, 0x99);
+                break;
+        case FE_CAB_MOD_QAM128:
+                stv0367_writereg(state, R367CAB_IQDEM_ADJ_AGC_REF, 0x00);
+                stv0367_writereg(state, R367CAB_AGC_PWR_REF_L, 0x76);
+                stv0367_writereg(state, R367CAB_FSM_STATE, 0x90);
+                stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xb1);
+                if (SymbolRate > 45000000)
+                        stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0xa7);
+                else if (SymbolRate > 25000000)
+                        stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0xa6);
+                else
+                        stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0x97);
+
+                stv0367_writereg(state, R367CAB_EQU_CRL_LD_SEN, 0x8e);
+                stv0367_writereg(state, R367CAB_EQU_CRL_LIMITER, 0x7f);
+                stv0367_writereg(state, R367CAB_EQU_PNT_GAIN, 0xa7);
+                break;
+        case FE_CAB_MOD_QAM256:
+                stv0367_writereg(state, R367CAB_IQDEM_ADJ_AGC_REF, 0x94);
+                stv0367_writereg(state, R367CAB_AGC_PWR_REF_L, 0x5a);
+                stv0367_writereg(state, R367CAB_FSM_STATE, 0xa0);
+                if (SymbolRate > 45000000)
+                        stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xc1);
+                else if (SymbolRate > 25000000)
+                        stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xc1);
+                else
+                        stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xd1);
+
+                stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0xa7);
+                stv0367_writereg(state, R367CAB_EQU_CRL_LD_SEN, 0x85);
+                stv0367_writereg(state, R367CAB_EQU_CRL_LIMITER, 0x40);
+                stv0367_writereg(state, R367CAB_EQU_PNT_GAIN, 0xa7);
+                break;
+        case FE_CAB_MOD_QAM512:
+                stv0367_writereg(state, R367CAB_IQDEM_ADJ_AGC_REF, 0x00);
+                break;
+        case FE_CAB_MOD_QAM1024:
+                stv0367_writereg(state, R367CAB_IQDEM_ADJ_AGC_REF, 0x00);
+                break;
+        default:
+                break;
+        }
+
+        return QAMSize;
+}
+
+static u32 stv0367cab_set_derot_freq(struct stv0367_state *state,
+                                        u32 adc_hz, s32 derot_hz)
+{
+        u32 sampled_if = 0;
+        u32 adc_khz;
+
+        adc_khz = adc_hz / 1000;
+
+        dprintk("%s: adc_hz=%d derot_hz=%d\n", __func__, adc_hz, derot_hz);
+
+        if (adc_khz != 0) {
+                if (derot_hz < 1000000)
+                        derot_hz = adc_hz / 4; /* ZIF operation */
+                if (derot_hz > adc_hz)
+                        derot_hz = derot_hz - adc_hz;
+                sampled_if = (u32)derot_hz / 1000;
+                sampled_if *= 32768;
+                sampled_if /= adc_khz;
+                sampled_if *= 256;
+        }
+
+        if (sampled_if > 8388607)
+                sampled_if = 8388607;
+
+        dprintk("%s: sampled_if=0x%x\n", __func__, sampled_if);
+
+        stv0367_writereg(state, R367CAB_MIX_NCO_LL, sampled_if);
+        stv0367_writereg(state, R367CAB_MIX_NCO_HL, (sampled_if >> 8));
+        stv0367_writebits(state, F367CAB_MIX_NCO_INC_HH, (sampled_if >> 16));
+
+        return derot_hz;
+}
+
+static u32 stv0367cab_get_derot_freq(struct stv0367_state *state, u32 adc_hz)
+{
+        u32 sampled_if;
+
+        sampled_if = stv0367_readbits(state, F367CAB_MIX_NCO_INC_LL) +
+                        (stv0367_readbits(state, F367CAB_MIX_NCO_INC_HL) << 8) +
+                        (stv0367_readbits(state, F367CAB_MIX_NCO_INC_HH) << 16);
+
+        sampled_if /= 256;
+        sampled_if *= (adc_hz / 1000);
+        sampled_if += 1;
+        sampled_if /= 32768;
+
+        return sampled_if;
+}
+
+static u32 stv0367cab_set_srate(struct stv0367_state *state, u32 adc_hz,
+                        u32 mclk_hz, u32 SymbolRate,
+                        enum stv0367cab_mod QAMSize)
+{
+        u32 QamSizeCorr = 0;
+        u32 u32_tmp = 0, u32_tmp1 = 0;
+        u32 adp_khz;
+
+        dprintk("%s:\n", __func__);
+
+        /* Set Correction factor of SRC gain */
+        switch (QAMSize) {
+        case FE_CAB_MOD_QAM4:
+                QamSizeCorr = 1110;
+                break;
+        case FE_CAB_MOD_QAM16:
+                QamSizeCorr = 1032;
+                break;
+        case FE_CAB_MOD_QAM32:
+                QamSizeCorr =  954;
+                break;
+        case FE_CAB_MOD_QAM64:
+                QamSizeCorr =  983;
+                break;
+        case FE_CAB_MOD_QAM128:
+                QamSizeCorr =  957;
+                break;
+        case FE_CAB_MOD_QAM256:
+                QamSizeCorr =  948;
+                break;
+        case FE_CAB_MOD_QAM512:
+                QamSizeCorr =    0;
+                break;
+        case FE_CAB_MOD_QAM1024:
+                QamSizeCorr =  944;
+                break;
+        default:
+                break;
+        }
+
+        /* Transfer ratio calculation */
+        if (adc_hz != 0) {
+                u32_tmp = 256 * SymbolRate;
+                u32_tmp = u32_tmp / adc_hz;
+        }
+        stv0367_writereg(state, R367CAB_EQU_CRL_TFR, (u8)u32_tmp);
+
+        /* Symbol rate and SRC gain calculation */
+        adp_khz = (mclk_hz >> 1) / 1000;/* TRL works at half the system clock */
+        if (adp_khz != 0) {
+                u32_tmp = SymbolRate;
+                u32_tmp1 = SymbolRate;
+
+                if (u32_tmp < 2097152) { /* 2097152 = 2^21 */
+                        /* Symbol rate calculation */
+                        u32_tmp *= 2048; /* 2048 = 2^11 */
+                        u32_tmp = u32_tmp / adp_khz;
+                        u32_tmp = u32_tmp * 16384; /* 16384 = 2^14 */
+                        u32_tmp /= 125 ; /* 125 = 1000/2^3 */
+                        u32_tmp = u32_tmp * 8; /* 8 = 2^3 */
+
+                        /* SRC Gain Calculation */
+                        u32_tmp1 *= 2048; /* *2*2^10 */
+                        u32_tmp1 /= 439; /* *2/878 */
+                        u32_tmp1 *= 256; /* *2^8 */
+                        u32_tmp1 = u32_tmp1 / adp_khz; /* /(AdpClk in kHz) */
+                        u32_tmp1 *= QamSizeCorr * 9; /* *1000*corr factor */
+                        u32_tmp1 = u32_tmp1 / 10000000;
+
+                } else if (u32_tmp < 4194304) { /* 4194304 = 2**22 */
+                        /* Symbol rate calculation */
+                        u32_tmp *= 1024 ; /* 1024 = 2**10 */
+                        u32_tmp = u32_tmp / adp_khz;
+                        u32_tmp = u32_tmp * 16384; /* 16384 = 2**14 */
+                        u32_tmp /= 125 ; /* 125 = 1000/2**3 */
+                        u32_tmp = u32_tmp * 16; /* 16 = 2**4 */
+
+                        /* SRC Gain Calculation */
+                        u32_tmp1 *= 1024; /* *2*2^9 */
+                        u32_tmp1 /= 439; /* *2/878 */
+                        u32_tmp1 *= 256; /* *2^8 */
+                        u32_tmp1 = u32_tmp1 / adp_khz; /* /(AdpClk in kHz)*/
+                        u32_tmp1 *= QamSizeCorr * 9; /* *1000*corr factor */
+                        u32_tmp1 = u32_tmp1 / 5000000;
+                } else if (u32_tmp < 8388607) { /* 8388607 = 2**23 */
+                        /* Symbol rate calculation */
+                        u32_tmp *= 512 ; /* 512 = 2**9 */
+                        u32_tmp = u32_tmp / adp_khz;
+                        u32_tmp = u32_tmp * 16384; /* 16384 = 2**14 */
+                        u32_tmp /= 125 ; /* 125 = 1000/2**3 */
+                        u32_tmp = u32_tmp * 32; /* 32 = 2**5 */
+
+                        /* SRC Gain Calculation */
+                        u32_tmp1 *= 512; /* *2*2^8 */
+                        u32_tmp1 /= 439; /* *2/878 */
+                        u32_tmp1 *= 256; /* *2^8 */
+                        u32_tmp1 = u32_tmp1 / adp_khz; /* /(AdpClk in kHz) */
+                        u32_tmp1 *= QamSizeCorr * 9; /* *1000*corr factor */
+                        u32_tmp1 = u32_tmp1 / 2500000;
+                } else {
+                        /* Symbol rate calculation */
+                        u32_tmp *= 256 ; /* 256 = 2**8 */
+                        u32_tmp = u32_tmp / adp_khz;
+                        u32_tmp = u32_tmp * 16384; /* 16384 = 2**13 */
+                        u32_tmp /= 125 ; /* 125 = 1000/2**3 */
+                        u32_tmp = u32_tmp * 64; /* 64 = 2**6 */
+
+                        /* SRC Gain Calculation */
+                        u32_tmp1 *= 256; /* 2*2^7 */
+                        u32_tmp1 /= 439; /* *2/878 */
+                        u32_tmp1 *= 256; /* *2^8 */
+                        u32_tmp1 = u32_tmp1 / adp_khz; /* /(AdpClk in kHz) */
+                        u32_tmp1 *= QamSizeCorr * 9; /* *1000*corr factor */
+                        u32_tmp1 = u32_tmp1 / 1250000;
+                }
+        }
+#if 0
+        /* Filters' coefficients are calculated and written
+        into registers only if the filters are enabled */
+        if (stv0367_readbits(state, F367CAB_ADJ_EN)) {
+                stv0367cab_SetIirAdjacentcoefficient(state, mclk_hz,
+                                                                SymbolRate);
+                /* AllPass filter must be enabled
+                when the adjacents filter is used */
+                stv0367_writebits(state, F367CAB_ALLPASSFILT_EN, 1);
+                stv0367cab_SetAllPasscoefficient(state, mclk_hz, SymbolRate);
+        } else
+                /* AllPass filter must be disabled
+                when the adjacents filter is not used */
+#endif
+        stv0367_writebits(state, F367CAB_ALLPASSFILT_EN, 0);
+
+        stv0367_writereg(state, R367CAB_SRC_NCO_LL, u32_tmp);
+        stv0367_writereg(state, R367CAB_SRC_NCO_LH, (u32_tmp >> 8));
+        stv0367_writereg(state, R367CAB_SRC_NCO_HL, (u32_tmp >> 16));
+        stv0367_writereg(state, R367CAB_SRC_NCO_HH, (u32_tmp >> 24));
+
+        stv0367_writereg(state, R367CAB_IQDEM_GAIN_SRC_L, u32_tmp1 & 0x00ff);
+        stv0367_writebits(state, F367CAB_GAIN_SRC_HI, (u32_tmp1 >> 8) & 0x00ff);
+
+        return SymbolRate ;
+}
+
+static u32 stv0367cab_GetSymbolRate(struct stv0367_state *state, u32 mclk_hz)
+{
+        u32 regsym;
+        u32 adp_khz;
+
+        regsym = stv0367_readreg(state, R367CAB_SRC_NCO_LL) +
+                (stv0367_readreg(state, R367CAB_SRC_NCO_LH) << 8) +
+                (stv0367_readreg(state, R367CAB_SRC_NCO_HL) << 16) +
+                (stv0367_readreg(state, R367CAB_SRC_NCO_HH) << 24);
+
+        adp_khz = (mclk_hz >> 1) / 1000;/* TRL works at half the system clock */
+
+        if (regsym < 134217728) {               /* 134217728L = 2**27*/
+                regsym = regsym * 32;           /* 32 = 2**5 */
+                regsym = regsym / 32768;        /* 32768L = 2**15 */
+                regsym = adp_khz * regsym;      /* AdpClk in kHz */
+                regsym = regsym / 128;          /* 128 = 2**7 */
+                regsym *= 125 ;                 /* 125 = 1000/2**3 */
+                regsym /= 2048 ;                /* 2048 = 2**11 */
+        } else if (regsym < 268435456) {        /* 268435456L = 2**28 */
+                regsym = regsym * 16;           /* 16 = 2**4 */
+                regsym = regsym / 32768;        /* 32768L = 2**15 */
+                regsym = adp_khz * regsym;      /* AdpClk in kHz */
+                regsym = regsym / 128;          /* 128 = 2**7 */
+                regsym *= 125 ;                 /* 125 = 1000/2**3*/
+                regsym /= 1024 ;                /* 256 = 2**10*/
+        } else if (regsym < 536870912) {        /* 536870912L = 2**29*/
+                regsym = regsym * 8;            /* 8 = 2**3 */
+                regsym = regsym / 32768;        /* 32768L = 2**15 */
+                regsym = adp_khz * regsym;      /* AdpClk in kHz */
+                regsym = regsym / 128;          /* 128 = 2**7 */
+                regsym *= 125 ;                 /* 125 = 1000/2**3 */
+                regsym /= 512 ;                 /* 128 = 2**9 */
+        } else {
+                regsym = regsym * 4;            /* 4 = 2**2 */
+                regsym = regsym / 32768;        /* 32768L = 2**15 */
+                regsym = adp_khz * regsym;      /* AdpClk in kHz */
+                regsym = regsym / 128;          /* 128 = 2**7 */
+                regsym *= 125 ;                 /* 125 = 1000/2**3 */
+                regsym /= 256 ;                 /* 64 = 2**8 */
+        }
+
+        return regsym;
+}
+
+static int stv0367cab_read_status(struct dvb_frontend *fe, fe_status_t *status)
+{
+        struct stv0367_state *state = fe->demodulator_priv;
+
+        dprintk("%s:\n", __func__);
+
+        *status = 0;
+
+        if (stv0367_readbits(state, F367CAB_QAMFEC_LOCK)) {
+                *status |= FE_HAS_LOCK;
+                dprintk("%s: stv0367 has locked\n", __func__);
+        }
+
+        return 0;
+}
+
+static int stv0367cab_standby(struct dvb_frontend *fe, u8 standby_on)
+{
+        struct stv0367_state *state = fe->demodulator_priv;
+
+        dprintk("%s:\n", __func__);
+
+        if (standby_on) {
+                stv0367_writebits(state, F367CAB_BYPASS_PLLXN, 0x03);
+                stv0367_writebits(state, F367CAB_STDBY_PLLXN, 0x01);
+                stv0367_writebits(state, F367CAB_STDBY, 1);
+                stv0367_writebits(state, F367CAB_STDBY_CORE, 1);
+                stv0367_writebits(state, F367CAB_EN_BUFFER_I, 0);
+                stv0367_writebits(state, F367CAB_EN_BUFFER_Q, 0);
+                stv0367_writebits(state, F367CAB_POFFQ, 1);
+                stv0367_writebits(state, F367CAB_POFFI, 1);
+        } else {
+                stv0367_writebits(state, F367CAB_STDBY_PLLXN, 0x00);
+                stv0367_writebits(state, F367CAB_BYPASS_PLLXN, 0x00);
+                stv0367_writebits(state, F367CAB_STDBY, 0);
+                stv0367_writebits(state, F367CAB_STDBY_CORE, 0);
+                stv0367_writebits(state, F367CAB_EN_BUFFER_I, 1);
+                stv0367_writebits(state, F367CAB_EN_BUFFER_Q, 1);
+                stv0367_writebits(state, F367CAB_POFFQ, 0);
+                stv0367_writebits(state, F367CAB_POFFI, 0);
+        }
+
+        return 0;
+}
+
+static int stv0367cab_sleep(struct dvb_frontend *fe)
+{
+        return stv0367cab_standby(fe, 1);
+}
+
+int stv0367cab_init(struct dvb_frontend *fe)
+{
+        struct stv0367_state *state = fe->demodulator_priv;
+        struct stv0367cab_state *cab_state = state->cab_state;
+        int i;
+
+        dprintk("%s:\n", __func__);
+
+        for (i = 0; i < STV0367CAB_NBREGS; i++)
+                stv0367_writereg(state, def0367cab[i].addr,
+                                                def0367cab[i].value);
+
+        switch (state->config->ts_mode) {
+        case STV0367_DVBCI_CLOCK:
+                dprintk("Setting TSMode = STV0367_DVBCI_CLOCK\n");
+                stv0367_writebits(state, F367CAB_OUTFORMAT, 0x03);
+                break;
+        case STV0367_SERIAL_PUNCT_CLOCK:
+        case STV0367_SERIAL_CONT_CLOCK:
+                stv0367_writebits(state, F367CAB_OUTFORMAT, 0x01);
+                break;
+        case STV0367_PARALLEL_PUNCT_CLOCK:
+        case STV0367_OUTPUTMODE_DEFAULT:
+                stv0367_writebits(state, F367CAB_OUTFORMAT, 0x00);
+                break;
+        }
+
+        switch (state->config->clk_pol) {
+        case STV0367_RISINGEDGE_CLOCK:
+                stv0367_writebits(state, F367CAB_CLK_POLARITY, 0x00);
+                break;
+        case STV0367_FALLINGEDGE_CLOCK:
+        case STV0367_CLOCKPOLARITY_DEFAULT:
+                stv0367_writebits(state, F367CAB_CLK_POLARITY, 0x01);
+                break;
+        }
+
+        stv0367_writebits(state, F367CAB_SYNC_STRIP, 0x00);
+
+        stv0367_writebits(state, F367CAB_CT_NBST, 0x01);
+
+        stv0367_writebits(state, F367CAB_TS_SWAP, 0x01);
+
+        stv0367_writebits(state, F367CAB_FIFO_BYPASS, 0x00);
+
+        stv0367_writereg(state, R367CAB_ANACTRL, 0x00);/*PLL enabled and used */
+
+        cab_state->mclk = stv0367cab_get_mclk(fe, state->config->xtal);
+        cab_state->adc_clk = stv0367cab_get_adc_freq(fe, state->config->xtal);
+
+        return 0;
+}
+static
+enum stv0367_cab_signal_type stv0367cab_algo(struct stv0367_state *state,
+                                struct dvb_frontend_parameters *param)
+{
+        struct dvb_qam_parameters *op = &param->u.qam;
+        struct stv0367cab_state *cab_state = state->cab_state;
+        enum stv0367_cab_signal_type signalType = FE_CAB_NOAGC;
+        u32     QAMFEC_Lock, QAM_Lock, u32_tmp,
+                LockTime, TRLTimeOut, AGCTimeOut, CRLSymbols,
+                CRLTimeOut, EQLTimeOut, DemodTimeOut, FECTimeOut;
+        u8      TrackAGCAccum;
+        s32     tmp;
+
+        dprintk("%s:\n", __func__);
+
+        /* Timeouts calculation */
+        /* A max lock time of 25 ms is allowed for delayed AGC */
+        AGCTimeOut = 25;
+        /* 100000 symbols needed by the TRL as a maximum value */
+        TRLTimeOut = 100000000 / op->symbol_rate;
+        /* CRLSymbols is the needed number of symbols to achieve a lock
+           within [-4%, +4%] of the symbol rate.
+           CRL timeout is calculated
+           for a lock within [-search_range, +search_range].
+           EQL timeout can be changed depending on
+           the micro-reflections we want to handle.
+           A characterization must be performed
+           with these echoes to get new timeout values.
+        */
+        switch (op->modulation) {
+        case QAM_16:
+                CRLSymbols = 150000;
+                EQLTimeOut = 100;
+                break;
+        case QAM_32:
+                CRLSymbols = 250000;
+                EQLTimeOut = 100;
+                break;
+        case QAM_64:
+                CRLSymbols = 200000;
+                EQLTimeOut = 100;
+                break;
+        case QAM_128:
+                CRLSymbols = 250000;
+                EQLTimeOut = 100;
+                break;
+        case QAM_256:
+                CRLSymbols = 250000;
+                EQLTimeOut = 100;
+                break;
+        default:
+                CRLSymbols = 200000;
+                EQLTimeOut = 100;
+                break;
+        }
+#if 0
+        if (pIntParams->search_range < 0) {
+                CRLTimeOut = (25 * CRLSymbols *
+                                (-pIntParams->search_range / 1000)) /
+                                        (pIntParams->symbol_rate / 1000);
+        } else
+#endif
+        CRLTimeOut = (25 * CRLSymbols * (cab_state->search_range / 1000)) /
+                                        (op->symbol_rate / 1000);
+
+        CRLTimeOut = (1000 * CRLTimeOut) / op->symbol_rate;
+        /* Timeouts below 50ms are coerced */
+        if (CRLTimeOut < 50)
+                CRLTimeOut = 50;
+        /* A maximum of 100 TS packets is needed to get FEC lock even in case
+        the spectrum inversion needs to be changed.
+           This is equal to 20 ms in case of the lowest symbol rate of 0.87Msps
+        */
+        FECTimeOut = 20;
+        DemodTimeOut = AGCTimeOut + TRLTimeOut + CRLTimeOut + EQLTimeOut;
+
+        dprintk("%s: DemodTimeOut=%d\n", __func__, DemodTimeOut);
+
+        /* Reset the TRL to ensure nothing starts until the
+           AGC is stable which ensures a better lock time
+        */
+        stv0367_writereg(state, R367CAB_CTRL_1, 0x04);
+        /* Set AGC accumulation time to minimum and lock threshold to maximum
+        in order to speed up the AGC lock */
+        TrackAGCAccum = stv0367_readbits(state, F367CAB_AGC_ACCUMRSTSEL);
+        stv0367_writebits(state, F367CAB_AGC_ACCUMRSTSEL, 0x0);
+        /* Modulus Mapper is disabled */
+        stv0367_writebits(state, F367CAB_MODULUSMAP_EN, 0);
+        /* Disable the sweep function */
+        stv0367_writebits(state, F367CAB_SWEEP_EN, 0);
+        /* The sweep function is never used, Sweep rate must be set to 0 */
+        /* Set the derotator frequency in Hz */
+        stv0367cab_set_derot_freq(state, cab_state->adc_clk,
+                (1000 * (s32)state->config->if_khz + cab_state->derot_offset));
+        /* Disable the Allpass Filter when the symbol rate is out of range */
+        if ((op->symbol_rate > 10800000) | (op->symbol_rate < 1800000)) {
+                stv0367_writebits(state, F367CAB_ADJ_EN, 0);
+                stv0367_writebits(state, F367CAB_ALLPASSFILT_EN, 0);
+        }
+#if 0
+        /* Check if the tuner is locked */
+        tuner_lock = stv0367cab_tuner_get_status(fe);
+        if (tuner_lock == 0)
+                return FE_367CAB_NOTUNER;
+#endif
+        /* Relase the TRL to start demodulator acquisition */
+        /* Wait for QAM lock */
+        LockTime = 0;
+        stv0367_writereg(state, R367CAB_CTRL_1, 0x00);
+        do {
+                QAM_Lock = stv0367_readbits(state, F367CAB_FSM_STATUS);
+                if ((LockTime >= (DemodTimeOut - EQLTimeOut)) &&
+                                                        (QAM_Lock == 0x04))
+                        /*
+                         * We don't wait longer, the frequency/phase offset
+                         * must be too big
+                         */
+                        LockTime = DemodTimeOut;
+                else if ((LockTime >= (AGCTimeOut + TRLTimeOut)) &&
+                                                        (QAM_Lock == 0x02))
+                        /*
+                         * We don't wait longer, either there is no signal or
+                         * it is not the right symbol rate or it is an analog
+                         * carrier
+                         */
+                {
+                        LockTime = DemodTimeOut;
+                        u32_tmp = stv0367_readbits(state,
+                                                F367CAB_AGC_PWR_WORD_LO) +
+                                        (stv0367_readbits(state,
+                                                F367CAB_AGC_PWR_WORD_ME) << 8) +
+                                        (stv0367_readbits(state,
+                                                F367CAB_AGC_PWR_WORD_HI) << 16);
+                        if (u32_tmp >= 131072)
+                                u32_tmp = 262144 - u32_tmp;
+                        u32_tmp = u32_tmp / (1 << (11 - stv0367_readbits(state,
+                                                        F367CAB_AGC_IF_BWSEL)));
+
+                        if (u32_tmp < stv0367_readbits(state,
+                                                F367CAB_AGC_PWRREF_LO) +
+                                        256 * stv0367_readbits(state,
+                                                F367CAB_AGC_PWRREF_HI) - 10)
+                                QAM_Lock = 0x0f;
+                } else {
+                        usleep_range(10000, 20000);
+                        LockTime += 10;
+                }
+                dprintk("QAM_Lock=0x%x LockTime=%d\n", QAM_Lock, LockTime);
+                tmp = stv0367_readreg(state, R367CAB_IT_STATUS1);
+
+                dprintk("R367CAB_IT_STATUS1=0x%x\n", tmp);
+
+        } while (((QAM_Lock != 0x0c) && (QAM_Lock != 0x0b)) &&
+                                                (LockTime < DemodTimeOut));
+
+        dprintk("QAM_Lock=0x%x\n", QAM_Lock);
+
+        tmp = stv0367_readreg(state, R367CAB_IT_STATUS1);
+        dprintk("R367CAB_IT_STATUS1=0x%x\n", tmp);
+        tmp = stv0367_readreg(state, R367CAB_IT_STATUS2);
+        dprintk("R367CAB_IT_STATUS2=0x%x\n", tmp);
+
+        tmp  = stv0367cab_get_derot_freq(state, cab_state->adc_clk);
+        dprintk("stv0367cab_get_derot_freq=0x%x\n", tmp);
+
+        if ((QAM_Lock == 0x0c) || (QAM_Lock == 0x0b)) {
+                /* Wait for FEC lock */
+                LockTime = 0;
+                do {
+                        usleep_range(5000, 7000);
+                        LockTime += 5;
+                        QAMFEC_Lock = stv0367_readbits(state,
+                                                        F367CAB_QAMFEC_LOCK);
+                } while (!QAMFEC_Lock && (LockTime < FECTimeOut));
+        } else
+                QAMFEC_Lock = 0;
+
+        if (QAMFEC_Lock) {
+                signalType = FE_CAB_DATAOK;
+                cab_state->modulation = op->modulation;
+                cab_state->spect_inv = stv0367_readbits(state,
+                                                        F367CAB_QUAD_INV);
+#if 0
+/* not clear for me */
+                if (state->config->if_khz != 0) {
+                        if (state->config->if_khz > cab_state->adc_clk / 1000) {
+                                cab_state->freq_khz =
+                                        FE_Cab_TunerGetFrequency(pIntParams->hTuner)
+                                - stv0367cab_get_derot_freq(state, cab_state->adc_clk)
+                                - cab_state->adc_clk / 1000 + state->config->if_khz;
+                        } else {
+                                cab_state->freq_khz =
+                                                FE_Cab_TunerGetFrequency(pIntParams->hTuner)
+                                                - stv0367cab_get_derot_freq(state, cab_state->adc_clk)
+                                                                                + state->config->if_khz;
+                        }
+                } else {
+                        cab_state->freq_khz =
+                                FE_Cab_TunerGetFrequency(pIntParams->hTuner) +
+                                stv0367cab_get_derot_freq(state,
+                                                        cab_state->adc_clk) -
+                                cab_state->adc_clk / 4000;
+                }
+#endif
+                cab_state->symbol_rate = stv0367cab_GetSymbolRate(state,
+                                                        cab_state->mclk);
+                cab_state->locked = 1;
+
+                /* stv0367_setbits(state, F367CAB_AGC_ACCUMRSTSEL,7);*/
+        } else {
+                switch (QAM_Lock) {
+                case 1:
+                        signalType = FE_CAB_NOAGC;
+                        break;
+                case 2:
+                        signalType = FE_CAB_NOTIMING;
+                        break;
+                case 3:
+                        signalType = FE_CAB_TIMINGOK;
+                        break;
+                case 4:
+                        signalType = FE_CAB_NOCARRIER;
+                        break;
+                case 5:
+                        signalType = FE_CAB_CARRIEROK;
+                        break;
+                case 7:
+                        signalType = FE_CAB_NOBLIND;
+                        break;
+                case 8:
+                        signalType = FE_CAB_BLINDOK;
+                        break;
+                case 10:
+                        signalType = FE_CAB_NODEMOD;
+                        break;
+                case 11:
+                        signalType = FE_CAB_DEMODOK;
+                        break;
+                case 12:
+                        signalType = FE_CAB_DEMODOK;
+                        break;
+                case 13:
+                        signalType = FE_CAB_NODEMOD;
+                        break;
+                case 14:
+                        signalType = FE_CAB_NOBLIND;
+                        break;
+                case 15:
+                        signalType = FE_CAB_NOSIGNAL;
+                        break;
+                default:
+                        break;
+                }
+
+        }
+
+        /* Set the AGC control values to tracking values */
+        stv0367_writebits(state, F367CAB_AGC_ACCUMRSTSEL, TrackAGCAccum);
+        return signalType;
+}
+
+static int stv0367cab_set_frontend(struct dvb_frontend *fe,
+                                struct dvb_frontend_parameters *param)
+{
+        struct stv0367_state *state = fe->demodulator_priv;
+        struct stv0367cab_state *cab_state = state->cab_state;
+        struct dvb_qam_parameters *op = &param->u.qam;
+        enum stv0367cab_mod QAMSize = 0;
+
+        dprintk("%s: freq = %d, srate = %d\n", __func__,
+                                        param->frequency, op->symbol_rate);
+
+        cab_state->derot_offset = 0;
+
+        switch (op->modulation) {
+        case QAM_16:
+                QAMSize = FE_CAB_MOD_QAM16;
+                break;
+        case QAM_32:
+                QAMSize = FE_CAB_MOD_QAM32;
+                break;
+        case QAM_64:
+                QAMSize = FE_CAB_MOD_QAM64;
+                break;
+        case QAM_128:
+                QAMSize = FE_CAB_MOD_QAM128;
+                break;
+        case QAM_256:
+                QAMSize = FE_CAB_MOD_QAM256;
+                break;
+        default:
+                break;
+        }
+
+        stv0367cab_init(fe);
+
+        /* Tuner Frequency Setting */
+        if (fe->ops.tuner_ops.set_params) {
+                if (fe->ops.i2c_gate_ctrl)
+                        fe->ops.i2c_gate_ctrl(fe, 1);
+                fe->ops.tuner_ops.set_params(fe, param);
+                if (fe->ops.i2c_gate_ctrl)
+                        fe->ops.i2c_gate_ctrl(fe, 0);
+        }
+
+        stv0367cab_SetQamSize(
+                        state,
+                        op->symbol_rate,
+                        QAMSize);
+
+        stv0367cab_set_srate(state,
+                        cab_state->adc_clk,
+                        cab_state->mclk,
+                        op->symbol_rate,
+                        QAMSize);
+        /* Search algorithm launch, [-1.1*RangeOffset, +1.1*RangeOffset] scan */
+        cab_state->state = stv0367cab_algo(state, param);
+        return 0;
+}
+
+static int stv0367cab_get_frontend(struct dvb_frontend *fe,
+                                  struct dvb_frontend_parameters *param)
+{
+        struct stv0367_state *state = fe->demodulator_priv;
+        struct stv0367cab_state *cab_state = state->cab_state;
+        struct dvb_qam_parameters *op = &param->u.qam;
+
+        enum stv0367cab_mod QAMSize;
+
+        dprintk("%s:\n", __func__);
+
+        op->symbol_rate = stv0367cab_GetSymbolRate(state, cab_state->mclk);
+
+        QAMSize = stv0367_readbits(state, F367CAB_QAM_MODE);
+        switch (QAMSize) {
+        case FE_CAB_MOD_QAM16:
+                op->modulation = QAM_16;
+                break;
+        case FE_CAB_MOD_QAM32:
+                op->modulation = QAM_32;
+                break;
+        case FE_CAB_MOD_QAM64:
+                op->modulation = QAM_64;
+                break;
+        case FE_CAB_MOD_QAM128:
+                op->modulation = QAM_128;
+                break;
+        case QAM_256:
+                op->modulation = QAM_256;
+                break;
+        default:
+                break;
+        }
+
+        param->frequency = stv0367_get_tuner_freq(fe);
+
+        dprintk("%s: tuner frequency = %d\n", __func__, param->frequency);
+
+        if (state->config->if_khz == 0) {
+                param->frequency +=
+                        (stv0367cab_get_derot_freq(state, cab_state->adc_clk) -
+                        cab_state->adc_clk / 4000);
+                return 0;
+        }
+
+        if (state->config->if_khz > cab_state->adc_clk / 1000)
+                param->frequency += (state->config->if_khz
+                        - stv0367cab_get_derot_freq(state, cab_state->adc_clk)
+                        - cab_state->adc_clk / 1000);
+        else
+                param->frequency += (state->config->if_khz
+                        - stv0367cab_get_derot_freq(state, cab_state->adc_clk));
+
+        return 0;
+}
+
+#if 0
+void stv0367cab_GetErrorCount(state, enum stv0367cab_mod QAMSize,
+                        u32 symbol_rate, FE_367qam_Monitor *Monitor_results)
+{
+        stv0367cab_OptimiseNByteAndGetBER(state, QAMSize, symbol_rate, Monitor_results);
+        stv0367cab_GetPacketsCount(state, Monitor_results);
+
+        return;
+}
+
+static int stv0367cab_read_ber(struct dvb_frontend *fe, u32 *ber)
+{
+        struct stv0367_state *state = fe->demodulator_priv;
+
+        return 0;
+}
+#endif
+static s32 stv0367cab_get_rf_lvl(struct stv0367_state *state)
+{
+        s32 rfLevel = 0;
+        s32 RfAgcPwm = 0, IfAgcPwm = 0;
+        u8 i;
+
+        stv0367_writebits(state, F367CAB_STDBY_ADCGP, 0x0);
+
+        RfAgcPwm =
+                (stv0367_readbits(state, F367CAB_RF_AGC1_LEVEL_LO) & 0x03) +
+                (stv0367_readbits(state, F367CAB_RF_AGC1_LEVEL_HI) << 2);
+        RfAgcPwm = 100 * RfAgcPwm / 1023;
+
+        IfAgcPwm =
+                stv0367_readbits(state, F367CAB_AGC_IF_PWMCMD_LO) +
+                (stv0367_readbits(state, F367CAB_AGC_IF_PWMCMD_HI) << 8);
+        if (IfAgcPwm >= 2048)
+                IfAgcPwm -= 2048;
+        else
+                IfAgcPwm += 2048;
+
+        IfAgcPwm = 100 * IfAgcPwm / 4095;
+
+        /* For DTT75467 on NIM */
+        if (RfAgcPwm < 90  && IfAgcPwm < 28) {
+                for (i = 0; i < RF_LOOKUP_TABLE_SIZE; i++) {
+                        if (RfAgcPwm <= stv0367cab_RF_LookUp1[0][i]) {
+                                rfLevel = (-1) * stv0367cab_RF_LookUp1[1][i];
+                                break;
+                        }
+                }
+                if (i == RF_LOOKUP_TABLE_SIZE)
+                        rfLevel = -56;
+        } else { /*if IF AGC>10*/
+                for (i = 0; i < RF_LOOKUP_TABLE2_SIZE; i++) {
+                        if (IfAgcPwm <= stv0367cab_RF_LookUp2[0][i]) {
+                                rfLevel = (-1) * stv0367cab_RF_LookUp2[1][i];
+                                break;
+                        }
+                }
+                if (i == RF_LOOKUP_TABLE2_SIZE)
+                        rfLevel = -72;
+        }
+        return rfLevel;
+}
+
+static int stv0367cab_read_strength(struct dvb_frontend *fe, u16 *strength)
+{
+        struct stv0367_state *state = fe->demodulator_priv;
+
+        s32 signal =  stv0367cab_get_rf_lvl(state);
+
+        dprintk("%s: signal=%d dBm\n", __func__, signal);
+
+        if (signal <= -72)
+                *strength = 65535;
+        else
+                *strength = (22 + signal) * (-1311);
+
+        dprintk("%s: strength=%d\n", __func__, (*strength));
+
+        return 0;
+}
+
+static int stv0367cab_read_snr(struct dvb_frontend *fe, u16 *snr)
+{
+        struct stv0367_state *state = fe->demodulator_priv;
+        u32 noisepercentage;
+        enum stv0367cab_mod QAMSize;
+        u32 regval = 0, temp = 0;
+        int power, i;
+
+        QAMSize = stv0367_readbits(state, F367CAB_QAM_MODE);
+        switch (QAMSize) {
+        case FE_CAB_MOD_QAM4:
+                power = 21904;
+                break;
+        case FE_CAB_MOD_QAM16:
+                power = 20480;
+                break;
+        case FE_CAB_MOD_QAM32:
+                power = 23040;
+                break;
+        case FE_CAB_MOD_QAM64:
+                power = 21504;
+                break;
+        case FE_CAB_MOD_QAM128:
+                power = 23616;
+                break;
+        case FE_CAB_MOD_QAM256:
+                power = 21760;
+                break;
+        case FE_CAB_MOD_QAM512:
+                power = 1;
+                break;
+        case FE_CAB_MOD_QAM1024:
+                power = 21280;
+                break;
+        default:
+                power = 1;
+                break;
+        }
+
+        for (i = 0; i < 10; i++) {
+                regval += (stv0367_readbits(state, F367CAB_SNR_LO)
+                        + 256 * stv0367_readbits(state, F367CAB_SNR_HI));
+        }
+
+        regval /= 10; /*for average over 10 times in for loop above*/
+        if (regval != 0) {
+                temp = power
+                        * (1 << (3 + stv0367_readbits(state, F367CAB_SNR_PER)));
+                temp /= regval;
+        }
+
+        /* table values, not needed to calculate logarithms */
+        if (temp >= 5012)
+                noisepercentage = 100;
+        else if (temp >= 3981)
+                noisepercentage = 93;
+        else if (temp >= 3162)
+                noisepercentage = 86;
+        else if (temp >= 2512)
+                noisepercentage = 79;
+        else if (temp >= 1995)
+                noisepercentage = 72;
+        else if (temp >= 1585)
+                noisepercentage = 65;
+        else if (temp >= 1259)
+                noisepercentage = 58;
+        else if (temp >= 1000)
+                noisepercentage = 50;
+        else if (temp >= 794)
+                noisepercentage = 43;
+        else if (temp >= 501)
+                noisepercentage = 36;
+        else if (temp >= 316)
+                noisepercentage = 29;
+        else if (temp >= 200)
+                noisepercentage = 22;
+        else if (temp >= 158)
+                noisepercentage = 14;
+        else if (temp >= 126)
+                noisepercentage = 7;
+        else
+                noisepercentage = 0;
+
+        dprintk("%s: noisepercentage=%d\n", __func__, noisepercentage);
+
+        *snr = (noisepercentage * 65535) / 100;
+
+        return 0;
+}
+
+static int stv0367cab_read_ucblcks(struct dvb_frontend *fe, u32 *ucblocks)
+{
+        struct stv0367_state *state = fe->demodulator_priv;
+        int corrected, tscount;
+
+        *ucblocks = (stv0367_readreg(state, R367CAB_RS_COUNTER_5) << 8)
+                        | stv0367_readreg(state, R367CAB_RS_COUNTER_4);
+        corrected = (stv0367_readreg(state, R367CAB_RS_COUNTER_3) << 8)
+                        | stv0367_readreg(state, R367CAB_RS_COUNTER_2);
+        tscount = (stv0367_readreg(state, R367CAB_RS_COUNTER_2) << 8)
+                        | stv0367_readreg(state, R367CAB_RS_COUNTER_1);
+
+        dprintk("%s: uncorrected blocks=%d corrected blocks=%d tscount=%d\n",
+                                __func__, *ucblocks, corrected, tscount);
+
+        return 0;
+};
+
+static struct dvb_frontend_ops stv0367cab_ops = {
+        .info = {
+                .name = "ST STV0367 DVB-C",
+                .type = FE_QAM,
+                .frequency_min = 47000000,
+                .frequency_max = 862000000,
+                .frequency_stepsize = 62500,
+                .symbol_rate_min = 870000,
+                .symbol_rate_max = 11700000,
+                .caps = 0x400 |/* FE_CAN_QAM_4 */
+                        FE_CAN_QAM_16 | FE_CAN_QAM_32  |
+                        FE_CAN_QAM_64 | FE_CAN_QAM_128 |
+                        FE_CAN_QAM_256 | FE_CAN_FEC_AUTO
+        },
+        .release                                = stv0367_release,
+        .init                                   = stv0367cab_init,
+        .sleep                                  = stv0367cab_sleep,
+        .i2c_gate_ctrl                          = stv0367cab_gate_ctrl,
+        .set_frontend                           = stv0367cab_set_frontend,
+        .get_frontend                           = stv0367cab_get_frontend,
+        .read_status                            = stv0367cab_read_status,
+/*      .read_ber                               = stv0367cab_read_ber, */
+        .read_signal_strength                   = stv0367cab_read_strength,
+        .read_snr                               = stv0367cab_read_snr,
+        .read_ucblocks                          = stv0367cab_read_ucblcks,
+        .get_tune_settings                      = stv0367_get_tune_settings,
+};
+
+struct dvb_frontend *stv0367cab_attach(const struct stv0367_config *config,
+                                   struct i2c_adapter *i2c)
+{
+        struct stv0367_state *state = NULL;
+        struct stv0367cab_state *cab_state = NULL;
+
+        /* allocate memory for the internal state */
+        state = kzalloc(sizeof(struct stv0367_state), GFP_KERNEL);
+        if (state == NULL)
+                goto error;
+        cab_state = kzalloc(sizeof(struct stv0367cab_state), GFP_KERNEL);
+        if (cab_state == NULL)
+                goto error;
+
+        /* setup the state */
+        state->i2c = i2c;
+        state->config = config;
+        cab_state->search_range = 280000;
+        state->cab_state = cab_state;
+        state->fe.ops = stv0367cab_ops;
+        state->fe.demodulator_priv = state;
+        state->chip_id = stv0367_readreg(state, 0xf000);
+
+        dprintk("%s: chip_id = 0x%x\n", __func__, state->chip_id);
+
+        /* check if the demod is there */
+        if ((state->chip_id != 0x50) && (state->chip_id != 0x60))
+                goto error;
+
+        return &state->fe;
+
+error:
+        kfree(cab_state);
+        kfree(state);
+        return NULL;
+}
+EXPORT_SYMBOL(stv0367cab_attach);
+
+MODULE_PARM_DESC(debug, "Set debug");
+MODULE_PARM_DESC(i2c_debug, "Set i2c debug");
+
+MODULE_AUTHOR("Igor M. Liplianin");
+MODULE_DESCRIPTION("ST STV0367 DVB-C/T demodulator driver");
+MODULE_LICENSE("GPL");
diff --git a/drivers/media/dvb/frontends/stv0367.h b/drivers/media/dvb/frontends/stv0367.h
new file mode 100644
index 000000000000..93cc4a57eea0
--- /dev/null
+++ b/drivers/media/dvb/frontends/stv0367.h
@@ -0,0 +1,66 @@
+/*
+ * stv0367.h
+ *
+ * Driver for ST STV0367 DVB-T & DVB-C demodulator IC.
+ *
+ * Copyright (C) ST Microelectronics.
+ * Copyright (C) 2010,2011 NetUP Inc.
+ * Copyright (C) 2010,2011 Igor M. Liplianin <liplianin@netup.ru>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef STV0367_H
+#define STV0367_H
+
+#include <linux/dvb/frontend.h>
+#include "dvb_frontend.h"
+
+struct stv0367_config {
+        u8 demod_address;
+        u32 xtal;
+        u32 if_khz;/*4500*/
+        int if_iq_mode;
+        int ts_mode;
+        int clk_pol;
+};
+
+#if defined(CONFIG_DVB_STV0367) || (defined(CONFIG_DVB_STV0367_MODULE) \
+                                                        && defined(MODULE))
+extern struct
+dvb_frontend *stv0367ter_attach(const struct stv0367_config *config,
+                                        struct i2c_adapter *i2c);
+extern struct
+dvb_frontend *stv0367cab_attach(const struct stv0367_config *config,
+                                        struct i2c_adapter *i2c);
+#else
+static inline struct
+dvb_frontend *stv0367ter_attach(const struct stv0367_config *config,
+                                        struct i2c_adapter *i2c)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return NULL;
+}
+static inline struct
+dvb_frontend *stv0367cab_attach(const struct stv0367_config *config,
+                                        struct i2c_adapter *i2c)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return NULL;
+}
+#endif
+
+#endif
diff --git a/drivers/media/dvb/frontends/stv0367_priv.h b/drivers/media/dvb/frontends/stv0367_priv.h
new file mode 100644
index 000000000000..995db0689ddd
--- /dev/null
+++ b/drivers/media/dvb/frontends/stv0367_priv.h
@@ -0,0 +1,212 @@
+/*
+ * stv0367_priv.h
+ *
+ * Driver for ST STV0367 DVB-T & DVB-C demodulator IC.
+ *
+ * Copyright (C) ST Microelectronics.
+ * Copyright (C) 2010,2011 NetUP Inc.
+ * Copyright (C) 2010,2011 Igor M. Liplianin <liplianin@netup.ru>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+/* Common driver error constants */
+
+#ifndef STV0367_PRIV_H
+#define STV0367_PRIV_H
+
+#ifndef TRUE
+    #define TRUE (1 == 1)
+#endif
+#ifndef FALSE
+    #define FALSE (!TRUE)
+#endif
+
+#ifndef NULL
+#define NULL 0
+#endif
+
+/* MACRO definitions */
+#define ABS(X) ((X) < 0 ? (-1 * (X)) : (X))
+#define MAX(X, Y) ((X) >= (Y) ? (X) : (Y))
+#define MIN(X, Y) ((X) <= (Y) ? (X) : (Y))
+#define INRANGE(X, Y, Z) \
+        ((((X) <= (Y)) && ((Y) <= (Z))) || \
+        (((Z) <= (Y)) && ((Y) <= (X))) ? 1 : 0)
+
+#ifndef MAKEWORD
+#define MAKEWORD(X, Y) (((X) << 8) + (Y))
+#endif
+
+#define LSB(X) (((X) & 0xff))
+#define MSB(Y) (((Y) >> 8) & 0xff)
+#define MMSB(Y)(((Y) >> 16) & 0xff)
+
+enum stv0367_ter_signal_type {
+        FE_TER_NOAGC = 0,
+        FE_TER_AGCOK = 5,
+        FE_TER_NOTPS = 6,
+        FE_TER_TPSOK = 7,
+        FE_TER_NOSYMBOL = 8,
+        FE_TER_BAD_CPQ = 9,
+        FE_TER_PRFOUNDOK = 10,
+        FE_TER_NOPRFOUND = 11,
+        FE_TER_LOCKOK = 12,
+        FE_TER_NOLOCK = 13,
+        FE_TER_SYMBOLOK = 15,
+        FE_TER_CPAMPOK = 16,
+        FE_TER_NOCPAMP = 17,
+        FE_TER_SWNOK = 18
+};
+
+enum stv0367_ts_mode {
+        STV0367_OUTPUTMODE_DEFAULT,
+        STV0367_SERIAL_PUNCT_CLOCK,
+        STV0367_SERIAL_CONT_CLOCK,
+        STV0367_PARALLEL_PUNCT_CLOCK,
+        STV0367_DVBCI_CLOCK
+};
+
+enum stv0367_clk_pol {
+        STV0367_CLOCKPOLARITY_DEFAULT,
+        STV0367_RISINGEDGE_CLOCK,
+        STV0367_FALLINGEDGE_CLOCK
+};
+
+enum stv0367_ter_bw {
+        FE_TER_CHAN_BW_6M = 6,
+        FE_TER_CHAN_BW_7M = 7,
+        FE_TER_CHAN_BW_8M = 8
+};
+
+#if 0
+enum FE_TER_Rate_TPS {
+        FE_TER_TPS_1_2 = 0,
+        FE_TER_TPS_2_3 = 1,
+        FE_TER_TPS_3_4 = 2,
+        FE_TER_TPS_5_6 = 3,
+        FE_TER_TPS_7_8 = 4
+};
+#endif
+
+enum stv0367_ter_mode {
+        FE_TER_MODE_2K,
+        FE_TER_MODE_8K,
+        FE_TER_MODE_4K
+};
+#if 0
+enum FE_TER_Hierarchy_Alpha {
+        FE_TER_HIER_ALPHA_NONE, /* Regular modulation */
+        FE_TER_HIER_ALPHA_1,    /* Hierarchical modulation a = 1*/
+        FE_TER_HIER_ALPHA_2,    /* Hierarchical modulation a = 2*/
+        FE_TER_HIER_ALPHA_4     /* Hierarchical modulation a = 4*/
+};
+#endif
+enum stv0367_ter_hierarchy {
+        FE_TER_HIER_NONE,       /*Hierarchy None*/
+        FE_TER_HIER_LOW_PRIO,   /*Hierarchy : Low Priority*/
+        FE_TER_HIER_HIGH_PRIO,  /*Hierarchy : High Priority*/
+        FE_TER_HIER_PRIO_ANY    /*Hierarchy  :Any*/
+};
+
+#if 0
+enum fe_stv0367_ter_spec {
+        FE_TER_INVERSION_NONE = 0,
+        FE_TER_INVERSION = 1,
+        FE_TER_INVERSION_AUTO = 2,
+        FE_TER_INVERSION_UNK  = 4
+};
+#endif
+
+enum stv0367_ter_if_iq_mode {
+        FE_TER_NORMAL_IF_TUNER = 0,
+        FE_TER_LONGPATH_IF_TUNER = 1,
+        FE_TER_IQ_TUNER = 2
+
+};
+
+#if 0
+enum FE_TER_FECRate {
+        FE_TER_FEC_NONE = 0x00, /* no FEC rate specified */
+        FE_TER_FEC_ALL = 0xFF,   /* Logical OR of all FECs */
+        FE_TER_FEC_1_2 = 1,
+        FE_TER_FEC_2_3 = (1 << 1),
+        FE_TER_FEC_3_4 = (1 << 2),
+        FE_TER_FEC_4_5 = (1 << 3),
+        FE_TER_FEC_5_6 = (1 << 4),
+        FE_TER_FEC_6_7 = (1 << 5),
+        FE_TER_FEC_7_8 = (1 << 6),
+        FE_TER_FEC_8_9 = (1 << 7)
+};
+
+enum FE_TER_Rate {
+        FE_TER_FE_1_2 = 0,
+        FE_TER_FE_2_3 = 1,
+        FE_TER_FE_3_4 = 2,
+        FE_TER_FE_5_6 = 3,
+        FE_TER_FE_6_7 = 4,
+        FE_TER_FE_7_8 = 5
+};
+#endif
+
+enum stv0367_ter_force {
+        FE_TER_FORCENONE = 0,
+        FE_TER_FORCE_M_G = 1
+};
+
+enum  stv0367cab_mod {
+        FE_CAB_MOD_QAM4,
+        FE_CAB_MOD_QAM16,
+        FE_CAB_MOD_QAM32,
+        FE_CAB_MOD_QAM64,
+        FE_CAB_MOD_QAM128,
+        FE_CAB_MOD_QAM256,
+        FE_CAB_MOD_QAM512,
+        FE_CAB_MOD_QAM1024
+};
+#if 0
+enum {
+        FE_CAB_FEC_A = 1,       /* J83 Annex A */
+        FE_CAB_FEC_B = (1 << 1),/* J83 Annex B */
+        FE_CAB_FEC_C = (1 << 2) /* J83 Annex C */
+} FE_CAB_FECType_t;
+#endif
+struct stv0367_cab_signal_info {
+        int locked;
+        u32 frequency; /* kHz */
+        u32 symbol_rate; /* Mbds */
+        enum stv0367cab_mod modulation;
+        fe_spectral_inversion_t spect_inv;
+        s32 Power_dBmx10;       /* Power of the RF signal (dBm x 10) */
+        u32     CN_dBx10;       /* Carrier to noise ratio (dB x 10) */
+        u32     BER;            /* Bit error rate (x 10000000)  */
+};
+
+enum stv0367_cab_signal_type {
+        FE_CAB_NOTUNER,
+        FE_CAB_NOAGC,
+        FE_CAB_NOSIGNAL,
+        FE_CAB_NOTIMING,
+        FE_CAB_TIMINGOK,
+        FE_CAB_NOCARRIER,
+        FE_CAB_CARRIEROK,
+        FE_CAB_NOBLIND,
+        FE_CAB_BLINDOK,
+        FE_CAB_NODEMOD,
+        FE_CAB_DEMODOK,
+        FE_CAB_DATAOK
+};
+
+#endif
diff --git a/drivers/media/dvb/frontends/stv0367_regs.h b/drivers/media/dvb/frontends/stv0367_regs.h
new file mode 100644
index 000000000000..a96fbdc7e25e
--- /dev/null
+++ b/drivers/media/dvb/frontends/stv0367_regs.h
@@ -0,0 +1,3614 @@
+/*
+ * stv0367_regs.h
+ *
+ * Driver for ST STV0367 DVB-T & DVB-C demodulator IC.
+ *
+ * Copyright (C) ST Microelectronics.
+ * Copyright (C) 2010,2011 NetUP Inc.
+ * Copyright (C) 2010,2011 Igor M. Liplianin <liplianin@netup.ru>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef STV0367_REGS_H
+#define STV0367_REGS_H
+
+/* ID */
+#define R367TER_ID      0xf000
+#define F367TER_IDENTIFICATIONREG       0xf00000ff
+
+/* I2CRPT */
+#define R367TER_I2CRPT  0xf001
+#define F367TER_I2CT_ON 0xf0010080
+#define F367TER_ENARPT_LEVEL    0xf0010070
+#define F367TER_SCLT_DELAY      0xf0010008
+#define F367TER_SCLT_NOD        0xf0010004
+#define F367TER_STOP_ENABLE     0xf0010002
+#define F367TER_SDAT_NOD        0xf0010001
+
+/* TOPCTRL */
+#define R367TER_TOPCTRL 0xf002
+#define F367TER_STDBY   0xf0020080
+#define F367TER_STDBY_FEC       0xf0020040
+#define F367TER_STDBY_CORE      0xf0020020
+#define F367TER_QAM_COFDM       0xf0020010
+#define F367TER_TS_DIS  0xf0020008
+#define F367TER_DIR_CLK_216     0xf0020004
+#define F367TER_TUNER_BB        0xf0020002
+#define F367TER_DVBT_H  0xf0020001
+
+/* IOCFG0 */
+#define R367TER_IOCFG0  0xf003
+#define F367TER_OP0_SD  0xf0030080
+#define F367TER_OP0_VAL 0xf0030040
+#define F367TER_OP0_OD  0xf0030020
+#define F367TER_OP0_INV 0xf0030010
+#define F367TER_OP0_DACVALUE_HI 0xf003000f
+
+/* DAc0R */
+#define R367TER_DAC0R   0xf004
+#define F367TER_OP0_DACVALUE_LO 0xf00400ff
+
+/* IOCFG1 */
+#define R367TER_IOCFG1  0xf005
+#define F367TER_IP0     0xf0050040
+#define F367TER_OP1_OD  0xf0050020
+#define F367TER_OP1_INV 0xf0050010
+#define F367TER_OP1_DACVALUE_HI 0xf005000f
+
+/* DAC1R */
+#define R367TER_DAC1R   0xf006
+#define F367TER_OP1_DACVALUE_LO 0xf00600ff
+
+/* IOCFG2 */
+#define R367TER_IOCFG2  0xf007
+#define F367TER_OP2_LOCK_CONF   0xf00700e0
+#define F367TER_OP2_OD  0xf0070010
+#define F367TER_OP2_VAL 0xf0070008
+#define F367TER_OP1_LOCK_CONF   0xf0070007
+
+/* SDFR */
+#define R367TER_SDFR    0xf008
+#define F367TER_OP0_FREQ        0xf00800f0
+#define F367TER_OP1_FREQ        0xf008000f
+
+/* STATUS */
+#define R367TER_STATUS  0xf009
+#define F367TER_TPS_LOCK        0xf0090080
+#define F367TER_SYR_LOCK        0xf0090040
+#define F367TER_AGC_LOCK        0xf0090020
+#define F367TER_PRF     0xf0090010
+#define F367TER_LK      0xf0090008
+#define F367TER_PR      0xf0090007
+
+/* AUX_CLK */
+#define R367TER_AUX_CLK 0xf00a
+#define F367TER_AUXFEC_CTL      0xf00a00c0
+#define F367TER_DIS_CKX4        0xf00a0020
+#define F367TER_CKSEL   0xf00a0018
+#define F367TER_CKDIV_PROG      0xf00a0006
+#define F367TER_AUXCLK_ENA      0xf00a0001
+
+/* FREESYS1 */
+#define R367TER_FREESYS1        0xf00b
+#define F367TER_FREE_SYS1       0xf00b00ff
+
+/* FREESYS2 */
+#define R367TER_FREESYS2        0xf00c
+#define F367TER_FREE_SYS2       0xf00c00ff
+
+/* FREESYS3 */
+#define R367TER_FREESYS3        0xf00d
+#define F367TER_FREE_SYS3       0xf00d00ff
+
+/* GPIO_CFG */
+#define R367TER_GPIO_CFG        0xf00e
+#define F367TER_GPIO7_NOD       0xf00e0080
+#define F367TER_GPIO7_CFG       0xf00e0040
+#define F367TER_GPIO6_NOD       0xf00e0020
+#define F367TER_GPIO6_CFG       0xf00e0010
+#define F367TER_GPIO5_NOD       0xf00e0008
+#define F367TER_GPIO5_CFG       0xf00e0004
+#define F367TER_GPIO4_NOD       0xf00e0002
+#define F367TER_GPIO4_CFG       0xf00e0001
+
+/* GPIO_CMD */
+#define R367TER_GPIO_CMD        0xf00f
+#define F367TER_GPIO7_VAL       0xf00f0008
+#define F367TER_GPIO6_VAL       0xf00f0004
+#define F367TER_GPIO5_VAL       0xf00f0002
+#define F367TER_GPIO4_VAL       0xf00f0001
+
+/* AGC2MAX */
+#define R367TER_AGC2MAX 0xf010
+#define F367TER_AGC2_MAX        0xf01000ff
+
+/* AGC2MIN */
+#define R367TER_AGC2MIN 0xf011
+#define F367TER_AGC2_MIN        0xf01100ff
+
+/* AGC1MAX */
+#define R367TER_AGC1MAX 0xf012
+#define F367TER_AGC1_MAX        0xf01200ff
+
+/* AGC1MIN */
+#define R367TER_AGC1MIN 0xf013
+#define F367TER_AGC1_MIN        0xf01300ff
+
+/* AGCR */
+#define R367TER_AGCR    0xf014
+#define F367TER_RATIO_A 0xf01400e0
+#define F367TER_RATIO_B 0xf0140018
+#define F367TER_RATIO_C 0xf0140007
+
+/* AGC2TH */
+#define R367TER_AGC2TH  0xf015
+#define F367TER_AGC2_THRES      0xf01500ff
+
+/* AGC12c */
+#define R367TER_AGC12C  0xf016
+#define F367TER_AGC1_IV 0xf0160080
+#define F367TER_AGC1_OD 0xf0160040
+#define F367TER_AGC1_LOAD       0xf0160020
+#define F367TER_AGC2_IV 0xf0160010
+#define F367TER_AGC2_OD 0xf0160008
+#define F367TER_AGC2_LOAD       0xf0160004
+#define F367TER_AGC12_MODE      0xf0160003
+
+/* AGCCTRL1 */
+#define R367TER_AGCCTRL1        0xf017
+#define F367TER_DAGC_ON 0xf0170080
+#define F367TER_INVERT_AGC12    0xf0170040
+#define F367TER_AGC1_MODE       0xf0170008
+#define F367TER_AGC2_MODE       0xf0170007
+
+/* AGCCTRL2 */
+#define R367TER_AGCCTRL2        0xf018
+#define F367TER_FRZ2_CTRL       0xf0180060
+#define F367TER_FRZ1_CTRL       0xf0180018
+#define F367TER_TIME_CST        0xf0180007
+
+/* AGC1VAL1 */
+#define R367TER_AGC1VAL1        0xf019
+#define F367TER_AGC1_VAL_LO     0xf01900ff
+
+/* AGC1VAL2 */
+#define R367TER_AGC1VAL2        0xf01a
+#define F367TER_AGC1_VAL_HI     0xf01a000f
+
+/* AGC2VAL1 */
+#define R367TER_AGC2VAL1        0xf01b
+#define F367TER_AGC2_VAL_LO     0xf01b00ff
+
+/* AGC2VAL2 */
+#define R367TER_AGC2VAL2        0xf01c
+#define F367TER_AGC2_VAL_HI     0xf01c000f
+
+/* AGC2PGA */
+#define R367TER_AGC2PGA 0xf01d
+#define F367TER_AGC2_PGA        0xf01d00ff
+
+/* OVF_RATE1 */
+#define R367TER_OVF_RATE1       0xf01e
+#define F367TER_OVF_RATE_HI     0xf01e000f
+
+/* OVF_RATE2 */
+#define R367TER_OVF_RATE2       0xf01f
+#define F367TER_OVF_RATE_LO     0xf01f00ff
+
+/* GAIN_SRC1 */
+#define R367TER_GAIN_SRC1       0xf020
+#define F367TER_INV_SPECTR      0xf0200080
+#define F367TER_IQ_INVERT       0xf0200040
+#define F367TER_INR_BYPASS      0xf0200020
+#define F367TER_STATUS_INV_SPECRUM      0xf0200010
+#define F367TER_GAIN_SRC_HI     0xf020000f
+
+/* GAIN_SRC2 */
+#define R367TER_GAIN_SRC2       0xf021
+#define F367TER_GAIN_SRC_LO     0xf02100ff
+
+/* INC_DEROT1 */
+#define R367TER_INC_DEROT1      0xf022
+#define F367TER_INC_DEROT_HI    0xf02200ff
+
+/* INC_DEROT2 */
+#define R367TER_INC_DEROT2      0xf023
+#define F367TER_INC_DEROT_LO    0xf02300ff
+
+/* PPM_CPAMP_DIR */
+#define R367TER_PPM_CPAMP_DIR   0xf024
+#define F367TER_PPM_CPAMP_DIRECT        0xf02400ff
+
+/* PPM_CPAMP_INV */
+#define R367TER_PPM_CPAMP_INV   0xf025
+#define F367TER_PPM_CPAMP_INVER 0xf02500ff
+
+/* FREESTFE_1 */
+#define R367TER_FREESTFE_1      0xf026
+#define F367TER_SYMBOL_NUMBER_INC       0xf02600c0
+#define F367TER_SEL_LSB 0xf0260004
+#define F367TER_AVERAGE_ON      0xf0260002
+#define F367TER_DC_ADJ  0xf0260001
+
+/* FREESTFE_2 */
+#define R367TER_FREESTFE_2      0xf027
+#define F367TER_SEL_SRCOUT      0xf02700c0
+#define F367TER_SEL_SYRTHR      0xf027001f
+
+/* DCOFFSET */
+#define R367TER_DCOFFSET        0xf028
+#define F367TER_SELECT_I_Q      0xf0280080
+#define F367TER_DC_OFFSET       0xf028007f
+
+/* EN_PROCESS */
+#define R367TER_EN_PROCESS      0xf029
+#define F367TER_FREE    0xf02900f0
+#define F367TER_ENAB_MANUAL     0xf0290001
+
+/* SDI_SMOOTHER */
+#define R367TER_SDI_SMOOTHER    0xf02a
+#define F367TER_DIS_SMOOTH      0xf02a0080
+#define F367TER_SDI_INC_SMOOTHER        0xf02a007f
+
+/* FE_LOOP_OPEN */
+#define R367TER_FE_LOOP_OPEN    0xf02b
+#define F367TER_TRL_LOOP_OP     0xf02b0002
+#define F367TER_CRL_LOOP_OP     0xf02b0001
+
+/* FREQOFF1 */
+#define R367TER_FREQOFF1        0xf02c
+#define F367TER_FREQ_OFFSET_LOOP_OPEN_VHI       0xf02c00ff
+
+/* FREQOFF2 */
+#define R367TER_FREQOFF2        0xf02d
+#define F367TER_FREQ_OFFSET_LOOP_OPEN_HI        0xf02d00ff
+
+/* FREQOFF3 */
+#define R367TER_FREQOFF3        0xf02e
+#define F367TER_FREQ_OFFSET_LOOP_OPEN_LO        0xf02e00ff
+
+/* TIMOFF1 */
+#define R367TER_TIMOFF1 0xf02f
+#define F367TER_TIM_OFFSET_LOOP_OPEN_HI 0xf02f00ff
+
+/* TIMOFF2 */
+#define R367TER_TIMOFF2 0xf030
+#define F367TER_TIM_OFFSET_LOOP_OPEN_LO 0xf03000ff
+
+/* EPQ */
+#define R367TER_EPQ     0xf031
+#define F367TER_EPQ1    0xf03100ff
+
+/* EPQAUTO */
+#define R367TER_EPQAUTO 0xf032
+#define F367TER_EPQ2    0xf03200ff
+
+/* SYR_UPDATE */
+#define R367TER_SYR_UPDATE      0xf033
+#define F367TER_SYR_PROTV       0xf0330080
+#define F367TER_SYR_PROTV_GAIN  0xf0330060
+#define F367TER_SYR_FILTER      0xf0330010
+#define F367TER_SYR_TRACK_THRES 0xf033000c
+
+/* CHPFREE */
+#define R367TER_CHPFREE 0xf034
+#define F367TER_CHP_FREE        0xf03400ff
+
+/* PPM_STATE_MAC */
+#define R367TER_PPM_STATE_MAC   0xf035
+#define F367TER_PPM_STATE_MACHINE_DECODER       0xf035003f
+
+/* INR_THRESHOLD */
+#define R367TER_INR_THRESHOLD   0xf036
+#define F367TER_INR_THRESH      0xf03600ff
+
+/* EPQ_TPS_ID_CELL */
+#define R367TER_EPQ_TPS_ID_CELL 0xf037
+#define F367TER_ENABLE_LGTH_TO_CF       0xf0370080
+#define F367TER_DIS_TPS_RSVD    0xf0370040
+#define F367TER_DIS_BCH 0xf0370020
+#define F367TER_DIS_ID_CEL      0xf0370010
+#define F367TER_TPS_ADJUST_SYM  0xf037000f
+
+/* EPQ_CFG */
+#define R367TER_EPQ_CFG 0xf038
+#define F367TER_EPQ_RANGE       0xf0380002
+#define F367TER_EPQ_SOFT        0xf0380001
+
+/* EPQ_STATUS */
+#define R367TER_EPQ_STATUS      0xf039
+#define F367TER_SLOPE_INC       0xf03900fc
+#define F367TER_TPS_FIELD       0xf0390003
+
+/* AUTORELOCK */
+#define R367TER_AUTORELOCK      0xf03a
+#define F367TER_BYPASS_BER_TEMPO        0xf03a0080
+#define F367TER_BER_TEMPO       0xf03a0070
+#define F367TER_BYPASS_COFDM_TEMPO      0xf03a0008
+#define F367TER_COFDM_TEMPO     0xf03a0007
+
+/* BER_THR_VMSB */
+#define R367TER_BER_THR_VMSB    0xf03b
+#define F367TER_BER_THRESHOLD_HI        0xf03b00ff
+
+/* BER_THR_MSB */
+#define R367TER_BER_THR_MSB     0xf03c
+#define F367TER_BER_THRESHOLD_MID       0xf03c00ff
+
+/* BER_THR_LSB */
+#define R367TER_BER_THR_LSB     0xf03d
+#define F367TER_BER_THRESHOLD_LO        0xf03d00ff
+
+/* CCD */
+#define R367TER_CCD     0xf03e
+#define F367TER_CCD_DETECTED    0xf03e0080
+#define F367TER_CCD_RESET       0xf03e0040
+#define F367TER_CCD_THRESHOLD   0xf03e000f
+
+/* SPECTR_CFG */
+#define R367TER_SPECTR_CFG      0xf03f
+#define F367TER_SPECT_CFG       0xf03f0003
+
+/* CONSTMU_MSB */
+#define R367TER_CONSTMU_MSB     0xf040
+#define F367TER_CONSTMU_FREEZE  0xf0400080
+#define F367TER_CONSTNU_FORCE_EN        0xf0400040
+#define F367TER_CONST_MU_MSB    0xf040003f
+
+/* CONSTMU_LSB */
+#define R367TER_CONSTMU_LSB     0xf041
+#define F367TER_CONST_MU_LSB    0xf04100ff
+
+/* CONSTMU_MAX_MSB */
+#define R367TER_CONSTMU_MAX_MSB 0xf042
+#define F367TER_CONST_MU_MAX_MSB        0xf042003f
+
+/* CONSTMU_MAX_LSB */
+#define R367TER_CONSTMU_MAX_LSB 0xf043
+#define F367TER_CONST_MU_MAX_LSB        0xf04300ff
+
+/* ALPHANOISE */
+#define R367TER_ALPHANOISE      0xf044
+#define F367TER_USE_ALLFILTER   0xf0440080
+#define F367TER_INTER_ON        0xf0440040
+#define F367TER_ALPHA_NOISE     0xf044001f
+
+/* MAXGP_MSB */
+#define R367TER_MAXGP_MSB       0xf045
+#define F367TER_MUFILTER_LENGTH 0xf04500f0
+#define F367TER_MAX_GP_MSB      0xf045000f
+
+/* MAXGP_LSB */
+#define R367TER_MAXGP_LSB       0xf046
+#define F367TER_MAX_GP_LSB      0xf04600ff
+
+/* ALPHAMSB */
+#define R367TER_ALPHAMSB        0xf047
+#define F367TER_CHC_DATARATE    0xf04700c0
+#define F367TER_ALPHA_MSB       0xf047003f
+
+/* ALPHALSB */
+#define R367TER_ALPHALSB        0xf048
+#define F367TER_ALPHA_LSB       0xf04800ff
+
+/* PILOT_ACCU */
+#define R367TER_PILOT_ACCU      0xf049
+#define F367TER_USE_SCAT4ADDAPT 0xf0490080
+#define F367TER_PILOT_ACC       0xf049001f
+
+/* PILOTMU_ACCU */
+#define R367TER_PILOTMU_ACCU    0xf04a
+#define F367TER_DISCARD_BAD_SP  0xf04a0080
+#define F367TER_DISCARD_BAD_CP  0xf04a0040
+#define F367TER_PILOT_MU_ACCU   0xf04a001f
+
+/* FILT_CHANNEL_EST */
+#define R367TER_FILT_CHANNEL_EST        0xf04b
+#define F367TER_USE_FILT_PILOT  0xf04b0080
+#define F367TER_FILT_CHANNEL    0xf04b007f
+
+/* ALPHA_NOPISE_FREQ */
+#define R367TER_ALPHA_NOPISE_FREQ       0xf04c
+#define F367TER_NOISE_FREQ_FILT 0xf04c0040
+#define F367TER_ALPHA_NOISE_FREQ        0xf04c003f
+
+/* RATIO_PILOT */
+#define R367TER_RATIO_PILOT     0xf04d
+#define F367TER_RATIO_MEAN_SP   0xf04d00f0
+#define F367TER_RATIO_MEAN_CP   0xf04d000f
+
+/* CHC_CTL */
+#define R367TER_CHC_CTL 0xf04e
+#define F367TER_TRACK_EN        0xf04e0080
+#define F367TER_NOISE_NORM_EN   0xf04e0040
+#define F367TER_FORCE_CHC_RESET 0xf04e0020
+#define F367TER_SHORT_TIME      0xf04e0010
+#define F367TER_FORCE_STATE_EN  0xf04e0008
+#define F367TER_FORCE_STATE     0xf04e0007
+
+/* EPQ_ADJUST */
+#define R367TER_EPQ_ADJUST      0xf04f
+#define F367TER_ADJUST_SCAT_IND 0xf04f00c0
+#define F367TER_ONE_SYMBOL      0xf04f0010
+#define F367TER_EPQ_DECAY       0xf04f000e
+#define F367TER_HOLD_SLOPE      0xf04f0001
+
+/* EPQ_THRES */
+#define R367TER_EPQ_THRES       0xf050
+#define F367TER_EPQ_THR 0xf05000ff
+
+/* OMEGA_CTL */
+#define R367TER_OMEGA_CTL       0xf051
+#define F367TER_OMEGA_RST       0xf0510080
+#define F367TER_FREEZE_OMEGA    0xf0510040
+#define F367TER_OMEGA_SEL       0xf051003f
+
+/* GP_CTL */
+#define R367TER_GP_CTL  0xf052
+#define F367TER_CHC_STATE       0xf05200e0
+#define F367TER_FREEZE_GP       0xf0520010
+#define F367TER_GP_SEL  0xf052000f
+
+/* MUMSB */
+#define R367TER_MUMSB   0xf053
+#define F367TER_MU_MSB  0xf053007f
+
+/* MULSB */
+#define R367TER_MULSB   0xf054
+#define F367TER_MU_LSB  0xf05400ff
+
+/* GPMSB */
+#define R367TER_GPMSB   0xf055
+#define F367TER_CSI_THRESHOLD   0xf05500e0
+#define F367TER_GP_MSB  0xf055000f
+
+/* GPLSB */
+#define R367TER_GPLSB   0xf056
+#define F367TER_GP_LSB  0xf05600ff
+
+/* OMEGAMSB */
+#define R367TER_OMEGAMSB        0xf057
+#define F367TER_OMEGA_MSB       0xf057007f
+
+/* OMEGALSB */
+#define R367TER_OMEGALSB        0xf058
+#define F367TER_OMEGA_LSB       0xf05800ff
+
+/* SCAT_NB */
+#define R367TER_SCAT_NB 0xf059
+#define F367TER_CHC_TEST        0xf05900f8
+#define F367TER_SCAT_NUMB       0xf0590003
+
+/* CHC_DUMMY */
+#define R367TER_CHC_DUMMY       0xf05a
+#define F367TER_CHC_DUM 0xf05a00ff
+
+/* INC_CTL */
+#define R367TER_INC_CTL 0xf05b
+#define F367TER_INC_BYPASS      0xf05b0080
+#define F367TER_INC_NDEPTH      0xf05b000c
+#define F367TER_INC_MADEPTH     0xf05b0003
+
+/* INCTHRES_COR1 */
+#define R367TER_INCTHRES_COR1   0xf05c
+#define F367TER_INC_THRES_COR1  0xf05c00ff
+
+/* INCTHRES_COR2 */
+#define R367TER_INCTHRES_COR2   0xf05d
+#define F367TER_INC_THRES_COR2  0xf05d00ff
+
+/* INCTHRES_DET1 */
+#define R367TER_INCTHRES_DET1   0xf05e
+#define F367TER_INC_THRES_DET1  0xf05e003f
+
+/* INCTHRES_DET2 */
+#define R367TER_INCTHRES_DET2   0xf05f
+#define F367TER_INC_THRES_DET2  0xf05f003f
+
+/* IIR_CELLNB */
+#define R367TER_IIR_CELLNB      0xf060
+#define F367TER_NRST_IIR        0xf0600080
+#define F367TER_IIR_CELL_NB     0xf0600007
+
+/* IIRCX_COEFF1_MSB */
+#define R367TER_IIRCX_COEFF1_MSB        0xf061
+#define F367TER_IIR_CX_COEFF1_MSB       0xf06100ff
+
+/* IIRCX_COEFF1_LSB */
+#define R367TER_IIRCX_COEFF1_LSB        0xf062
+#define F367TER_IIR_CX_COEFF1_LSB       0xf06200ff
+
+/* IIRCX_COEFF2_MSB */
+#define R367TER_IIRCX_COEFF2_MSB        0xf063
+#define F367TER_IIR_CX_COEFF2_MSB       0xf06300ff
+
+/* IIRCX_COEFF2_LSB */
+#define R367TER_IIRCX_COEFF2_LSB        0xf064
+#define F367TER_IIR_CX_COEFF2_LSB       0xf06400ff
+
+/* IIRCX_COEFF3_MSB */
+#define R367TER_IIRCX_COEFF3_MSB        0xf065
+#define F367TER_IIR_CX_COEFF3_MSB       0xf06500ff
+
+/* IIRCX_COEFF3_LSB */
+#define R367TER_IIRCX_COEFF3_LSB        0xf066
+#define F367TER_IIR_CX_COEFF3_LSB       0xf06600ff
+
+/* IIRCX_COEFF4_MSB */
+#define R367TER_IIRCX_COEFF4_MSB        0xf067
+#define F367TER_IIR_CX_COEFF4_MSB       0xf06700ff
+
+/* IIRCX_COEFF4_LSB */
+#define R367TER_IIRCX_COEFF4_LSB        0xf068
+#define F367TER_IIR_CX_COEFF4_LSB       0xf06800ff
+
+/* IIRCX_COEFF5_MSB */
+#define R367TER_IIRCX_COEFF5_MSB        0xf069
+#define F367TER_IIR_CX_COEFF5_MSB       0xf06900ff
+
+/* IIRCX_COEFF5_LSB */
+#define R367TER_IIRCX_COEFF5_LSB        0xf06a
+#define F367TER_IIR_CX_COEFF5_LSB       0xf06a00ff
+
+/* FEPATH_CFG */
+#define R367TER_FEPATH_CFG      0xf06b
+#define F367TER_DEMUX_SWAP      0xf06b0004
+#define F367TER_DIGAGC_SWAP     0xf06b0002
+#define F367TER_LONGPATH_IF     0xf06b0001
+
+/* PMC1_FUNC */
+#define R367TER_PMC1_FUNC       0xf06c
+#define F367TER_SOFT_RSTN       0xf06c0080
+#define F367TER_PMC1_AVERAGE_TIME       0xf06c0078
+#define F367TER_PMC1_WAIT_TIME  0xf06c0006
+#define F367TER_PMC1_2N_SEL     0xf06c0001
+
+/* PMC1_FOR */
+#define R367TER_PMC1_FOR        0xf06d
+#define F367TER_PMC1_FORCE      0xf06d0080
+#define F367TER_PMC1_FORCE_VALUE        0xf06d007c
+
+/* PMC2_FUNC */
+#define R367TER_PMC2_FUNC       0xf06e
+#define F367TER_PMC2_SOFT_STN   0xf06e0080
+#define F367TER_PMC2_ACCU_TIME  0xf06e0070
+#define F367TER_PMC2_CMDP_MN    0xf06e0008
+#define F367TER_PMC2_SWAP       0xf06e0004
+
+/* STATUS_ERR_DA */
+#define R367TER_STATUS_ERR_DA   0xf06f
+#define F367TER_COM_USEGAINTRK  0xf06f0080
+#define F367TER_COM_AGCLOCK     0xf06f0040
+#define F367TER_AUT_AGCLOCK     0xf06f0020
+#define F367TER_MIN_ERR_X_LSB   0xf06f000f
+
+/* DIG_AGC_R */
+#define R367TER_DIG_AGC_R       0xf070
+#define F367TER_COM_SOFT_RSTN   0xf0700080
+#define F367TER_COM_AGC_ON      0xf0700040
+#define F367TER_COM_EARLY       0xf0700020
+#define F367TER_AUT_SOFT_RESETN 0xf0700010
+#define F367TER_AUT_AGC_ON      0xf0700008
+#define F367TER_AUT_EARLY       0xf0700004
+#define F367TER_AUT_ROT_EN      0xf0700002
+#define F367TER_LOCK_SOFT_RESETN        0xf0700001
+
+/* COMAGC_TARMSB */
+#define R367TER_COMAGC_TARMSB   0xf071
+#define F367TER_COM_AGC_TARGET_MSB      0xf07100ff
+
+/* COM_AGC_TAR_ENMODE */
+#define R367TER_COM_AGC_TAR_ENMODE      0xf072
+#define F367TER_COM_AGC_TARGET_LSB      0xf07200f0
+#define F367TER_COM_ENMODE      0xf072000f
+
+/* COM_AGC_CFG */
+#define R367TER_COM_AGC_CFG     0xf073
+#define F367TER_COM_N   0xf07300f8
+#define F367TER_COM_STABMODE    0xf0730006
+#define F367TER_ERR_SEL 0xf0730001
+
+/* COM_AGC_GAIN1 */
+#define R367TER_COM_AGC_GAIN1   0xf074
+#define F367TER_COM_GAIN1aCK    0xf07400f0
+#define F367TER_COM_GAIN1TRK    0xf074000f
+
+/* AUT_AGC_TARGETMSB */
+#define R367TER_AUT_AGC_TARGETMSB       0xf075
+#define F367TER_AUT_AGC_TARGET_MSB      0xf07500ff
+
+/* LOCK_DET_MSB */
+#define R367TER_LOCK_DET_MSB    0xf076
+#define F367TER_LOCK_DETECT_MSB 0xf07600ff
+
+/* AGCTAR_LOCK_LSBS */
+#define R367TER_AGCTAR_LOCK_LSBS        0xf077
+#define F367TER_AUT_AGC_TARGET_LSB      0xf07700f0
+#define F367TER_LOCK_DETECT_LSB 0xf077000f
+
+/* AUT_GAIN_EN */
+#define R367TER_AUT_GAIN_EN     0xf078
+#define F367TER_AUT_ENMODE      0xf07800f0
+#define F367TER_AUT_GAIN2       0xf078000f
+
+/* AUT_CFG */
+#define R367TER_AUT_CFG 0xf079
+#define F367TER_AUT_N   0xf07900f8
+#define F367TER_INT_CHOICE      0xf0790006
+#define F367TER_INT_LOAD        0xf0790001
+
+/* LOCKN */
+#define R367TER_LOCKN   0xf07a
+#define F367TER_LOCK_N  0xf07a00f8
+#define F367TER_SEL_IQNTAR      0xf07a0004
+#define F367TER_LOCK_DETECT_CHOICE      0xf07a0003
+
+/* INT_X_3 */
+#define R367TER_INT_X_3 0xf07b
+#define F367TER_INT_X3  0xf07b00ff
+
+/* INT_X_2 */
+#define R367TER_INT_X_2 0xf07c
+#define F367TER_INT_X2  0xf07c00ff
+
+/* INT_X_1 */
+#define R367TER_INT_X_1 0xf07d
+#define F367TER_INT_X1  0xf07d00ff
+
+/* INT_X_0 */
+#define R367TER_INT_X_0 0xf07e
+#define F367TER_INT_X0  0xf07e00ff
+
+/* MIN_ERRX_MSB */
+#define R367TER_MIN_ERRX_MSB    0xf07f
+#define F367TER_MIN_ERR_X_MSB   0xf07f00ff
+
+/* COR_CTL */
+#define R367TER_COR_CTL 0xf080
+#define F367TER_CORE_ACTIVE     0xf0800020
+#define F367TER_HOLD    0xf0800010
+#define F367TER_CORE_STATE_CTL  0xf080000f
+
+/* COR_STAT */
+#define R367TER_COR_STAT        0xf081
+#define F367TER_SCATT_LOCKED    0xf0810080
+#define F367TER_TPS_LOCKED      0xf0810040
+#define F367TER_SYR_LOCKED_COR  0xf0810020
+#define F367TER_AGC_LOCKED_STAT 0xf0810010
+#define F367TER_CORE_STATE_STAT 0xf081000f
+
+/* COR_INTEN */
+#define R367TER_COR_INTEN       0xf082
+#define F367TER_INTEN   0xf0820080
+#define F367TER_INTEN_SYR       0xf0820020
+#define F367TER_INTEN_FFT       0xf0820010
+#define F367TER_INTEN_AGC       0xf0820008
+#define F367TER_INTEN_TPS1      0xf0820004
+#define F367TER_INTEN_TPS2      0xf0820002
+#define F367TER_INTEN_TPS3      0xf0820001
+
+/* COR_INTSTAT */
+#define R367TER_COR_INTSTAT     0xf083
+#define F367TER_INTSTAT_SYR     0xf0830020
+#define F367TER_INTSTAT_FFT     0xf0830010
+#define F367TER_INTSAT_AGC      0xf0830008
+#define F367TER_INTSTAT_TPS1    0xf0830004
+#define F367TER_INTSTAT_TPS2    0xf0830002
+#define F367TER_INTSTAT_TPS3    0xf0830001
+
+/* COR_MODEGUARD */
+#define R367TER_COR_MODEGUARD   0xf084
+#define F367TER_FORCE   0xf0840010
+#define F367TER_MODE    0xf084000c
+#define F367TER_GUARD   0xf0840003
+
+/* AGC_CTL */
+#define R367TER_AGC_CTL 0xf085
+#define F367TER_AGC_TIMING_FACTOR       0xf08500e0
+#define F367TER_AGC_LAST        0xf0850010
+#define F367TER_AGC_GAIN        0xf085000c
+#define F367TER_AGC_NEG 0xf0850002
+#define F367TER_AGC_SET 0xf0850001
+
+/* AGC_MANUAL1 */
+#define R367TER_AGC_MANUAL1     0xf086
+#define F367TER_AGC_VAL_LO      0xf08600ff
+
+/* AGC_MANUAL2 */
+#define R367TER_AGC_MANUAL2     0xf087
+#define F367TER_AGC_VAL_HI      0xf087000f
+
+/* AGC_TARG */
+#define R367TER_AGC_TARG        0xf088
+#define F367TER_AGC_TARGET      0xf08800ff
+
+/* AGC_GAIN1 */
+#define R367TER_AGC_GAIN1       0xf089
+#define F367TER_AGC_GAIN_LO     0xf08900ff
+
+/* AGC_GAIN2 */
+#define R367TER_AGC_GAIN2       0xf08a
+#define F367TER_AGC_LOCKED_GAIN2        0xf08a0010
+#define F367TER_AGC_GAIN_HI     0xf08a000f
+
+/* RESERVED_1 */
+#define R367TER_RESERVED_1      0xf08b
+#define F367TER_RESERVED1       0xf08b00ff
+
+/* RESERVED_2 */
+#define R367TER_RESERVED_2      0xf08c
+#define F367TER_RESERVED2       0xf08c00ff
+
+/* RESERVED_3 */
+#define R367TER_RESERVED_3      0xf08d
+#define F367TER_RESERVED3       0xf08d00ff
+
+/* CAS_CTL */
+#define R367TER_CAS_CTL 0xf08e
+#define F367TER_CCS_ENABLE      0xf08e0080
+#define F367TER_ACS_DISABLE     0xf08e0040
+#define F367TER_DAGC_DIS        0xf08e0020
+#define F367TER_DAGC_GAIN       0xf08e0018
+#define F367TER_CCSMU   0xf08e0007
+
+/* CAS_FREQ */
+#define R367TER_CAS_FREQ        0xf08f
+#define F367TER_CCS_FREQ        0xf08f00ff
+
+/* CAS_DAGCGAIN */
+#define R367TER_CAS_DAGCGAIN    0xf090
+#define F367TER_CAS_DAGC_GAIN   0xf09000ff
+
+/* SYR_CTL */
+#define R367TER_SYR_CTL 0xf091
+#define F367TER_SICTH_ENABLE    0xf0910080
+#define F367TER_LONG_ECHO       0xf0910078
+#define F367TER_AUTO_LE_EN      0xf0910004
+#define F367TER_SYR_BYPASS      0xf0910002
+#define F367TER_SYR_TR_DIS      0xf0910001
+
+/* SYR_STAT */
+#define R367TER_SYR_STAT        0xf092
+#define F367TER_SYR_LOCKED_STAT 0xf0920010
+#define F367TER_SYR_MODE        0xf092000c
+#define F367TER_SYR_GUARD       0xf0920003
+
+/* SYR_NCO1 */
+#define R367TER_SYR_NCO1        0xf093
+#define F367TER_SYR_NCO_LO      0xf09300ff
+
+/* SYR_NCO2 */
+#define R367TER_SYR_NCO2        0xf094
+#define F367TER_SYR_NCO_HI      0xf094003f
+
+/* SYR_OFFSET1 */
+#define R367TER_SYR_OFFSET1     0xf095
+#define F367TER_SYR_OFFSET_LO   0xf09500ff
+
+/* SYR_OFFSET2 */
+#define R367TER_SYR_OFFSET2     0xf096
+#define F367TER_SYR_OFFSET_HI   0xf096003f
+
+/* FFT_CTL */
+#define R367TER_FFT_CTL 0xf097
+#define F367TER_SHIFT_FFT_TRIG  0xf0970018
+#define F367TER_FFT_TRIGGER     0xf0970004
+#define F367TER_FFT_MANUAL      0xf0970002
+#define F367TER_IFFT_MODE       0xf0970001
+
+/* SCR_CTL */
+#define R367TER_SCR_CTL 0xf098
+#define F367TER_SYRADJDECAY     0xf0980070
+#define F367TER_SCR_CPEDIS      0xf0980002
+#define F367TER_SCR_DIS 0xf0980001
+
+/* PPM_CTL1 */
+#define R367TER_PPM_CTL1        0xf099
+#define F367TER_PPM_MAXFREQ     0xf0990030
+#define F367TER_PPM_MAXTIM      0xf0990008
+#define F367TER_PPM_INVSEL      0xf0990004
+#define F367TER_PPM_SCATDIS     0xf0990002
+#define F367TER_PPM_BYP 0xf0990001
+
+/* TRL_CTL */
+#define R367TER_TRL_CTL 0xf09a
+#define F367TER_TRL_NOMRATE_LSB 0xf09a0080
+#define F367TER_TRL_GAIN_FACTOR 0xf09a0078
+#define F367TER_TRL_LOOPGAIN    0xf09a0007
+
+/* TRL_NOMRATE1 */
+#define R367TER_TRL_NOMRATE1    0xf09b
+#define F367TER_TRL_NOMRATE_LO  0xf09b00ff
+
+/* TRL_NOMRATE2 */
+#define R367TER_TRL_NOMRATE2    0xf09c
+#define F367TER_TRL_NOMRATE_HI  0xf09c00ff
+
+/* TRL_TIME1 */
+#define R367TER_TRL_TIME1       0xf09d
+#define F367TER_TRL_TOFFSET_LO  0xf09d00ff
+
+/* TRL_TIME2 */
+#define R367TER_TRL_TIME2       0xf09e
+#define F367TER_TRL_TOFFSET_HI  0xf09e00ff
+
+/* CRL_CTL */
+#define R367TER_CRL_CTL 0xf09f
+#define F367TER_CRL_DIS 0xf09f0080
+#define F367TER_CRL_GAIN_FACTOR 0xf09f0078
+#define F367TER_CRL_LOOPGAIN    0xf09f0007
+
+/* CRL_FREQ1 */
+#define R367TER_CRL_FREQ1       0xf0a0
+#define F367TER_CRL_FOFFSET_LO  0xf0a000ff
+
+/* CRL_FREQ2 */
+#define R367TER_CRL_FREQ2       0xf0a1
+#define F367TER_CRL_FOFFSET_HI  0xf0a100ff
+
+/* CRL_FREQ3 */
+#define R367TER_CRL_FREQ3       0xf0a2
+#define F367TER_CRL_FOFFSET_VHI 0xf0a200ff
+
+/* TPS_SFRAME_CTL */
+#define R367TER_TPS_SFRAME_CTL  0xf0a3
+#define F367TER_TPS_SFRAME_SYNC 0xf0a30001
+
+/* CHC_SNR */
+#define R367TER_CHC_SNR 0xf0a4
+#define F367TER_CHCSNR  0xf0a400ff
+
+/* BDI_CTL */
+#define R367TER_BDI_CTL 0xf0a5
+#define F367TER_BDI_LPSEL       0xf0a50002
+#define F367TER_BDI_SERIAL      0xf0a50001
+
+/* DMP_CTL */
+#define R367TER_DMP_CTL 0xf0a6
+#define F367TER_DMP_SCALING_FACTOR      0xf0a6001e
+#define F367TER_DMP_SDDIS       0xf0a60001
+
+/* TPS_RCVD1 */
+#define R367TER_TPS_RCVD1       0xf0a7
+#define F367TER_TPS_CHANGE      0xf0a70040
+#define F367TER_BCH_OK  0xf0a70020
+#define F367TER_TPS_SYNC        0xf0a70010
+#define F367TER_TPS_FRAME       0xf0a70003
+
+/* TPS_RCVD2 */
+#define R367TER_TPS_RCVD2       0xf0a8
+#define F367TER_TPS_HIERMODE    0xf0a80070
+#define F367TER_TPS_CONST       0xf0a80003
+
+/* TPS_RCVD3 */
+#define R367TER_TPS_RCVD3       0xf0a9
+#define F367TER_TPS_LPCODE      0xf0a90070
+#define F367TER_TPS_HPCODE      0xf0a90007
+
+/* TPS_RCVD4 */
+#define R367TER_TPS_RCVD4       0xf0aa
+#define F367TER_TPS_GUARD       0xf0aa0030
+#define F367TER_TPS_MODE        0xf0aa0003
+
+/* TPS_ID_CELL1 */
+#define R367TER_TPS_ID_CELL1    0xf0ab
+#define F367TER_TPS_ID_CELL_LO  0xf0ab00ff
+
+/* TPS_ID_CELL2 */
+#define R367TER_TPS_ID_CELL2    0xf0ac
+#define F367TER_TPS_ID_CELL_HI  0xf0ac00ff
+
+/* TPS_RCVD5_SET1 */
+#define R367TER_TPS_RCVD5_SET1  0xf0ad
+#define F367TER_TPS_NA  0xf0ad00fC
+#define F367TER_TPS_SETFRAME    0xf0ad0003
+
+/* TPS_SET2 */
+#define R367TER_TPS_SET2        0xf0ae
+#define F367TER_TPS_SETHIERMODE 0xf0ae0070
+#define F367TER_TPS_SETCONST    0xf0ae0003
+
+/* TPS_SET3 */
+#define R367TER_TPS_SET3        0xf0af
+#define F367TER_TPS_SETLPCODE   0xf0af0070
+#define F367TER_TPS_SETHPCODE   0xf0af0007
+
+/* TPS_CTL */
+#define R367TER_TPS_CTL 0xf0b0
+#define F367TER_TPS_IMM 0xf0b00004
+#define F367TER_TPS_BCHDIS      0xf0b00002
+#define F367TER_TPS_UPDDIS      0xf0b00001
+
+/* CTL_FFTOSNUM */
+#define R367TER_CTL_FFTOSNUM    0xf0b1
+#define F367TER_SYMBOL_NUMBER   0xf0b1007f
+
+/* TESTSELECT */
+#define R367TER_TESTSELECT      0xf0b2
+#define F367TER_TEST_SELECT     0xf0b2001f
+
+/* MSC_REV */
+#define R367TER_MSC_REV 0xf0b3
+#define F367TER_REV_NUMBER      0xf0b300ff
+
+/* PIR_CTL */
+#define R367TER_PIR_CTL 0xf0b4
+#define F367TER_FREEZE  0xf0b40001
+
+/* SNR_CARRIER1 */
+#define R367TER_SNR_CARRIER1    0xf0b5
+#define F367TER_SNR_CARRIER_LO  0xf0b500ff
+
+/* SNR_CARRIER2 */
+#define R367TER_SNR_CARRIER2    0xf0b6
+#define F367TER_MEAN    0xf0b600c0
+#define F367TER_SNR_CARRIER_HI  0xf0b6001f
+
+/* PPM_CPAMP */
+#define R367TER_PPM_CPAMP       0xf0b7
+#define F367TER_PPM_CPC 0xf0b700ff
+
+/* TSM_AP0 */
+#define R367TER_TSM_AP0 0xf0b8
+#define F367TER_ADDRESS_BYTE_0  0xf0b800ff
+
+/* TSM_AP1 */
+#define R367TER_TSM_AP1 0xf0b9
+#define F367TER_ADDRESS_BYTE_1  0xf0b900ff
+
+/* TSM_AP2 */
+#define R367TER_TSM_AP2 0xf0bA
+#define F367TER_DATA_BYTE_0     0xf0ba00ff
+
+/* TSM_AP3 */
+#define R367TER_TSM_AP3 0xf0bB
+#define F367TER_DATA_BYTE_1     0xf0bb00ff
+
+/* TSM_AP4 */
+#define R367TER_TSM_AP4 0xf0bC
+#define F367TER_DATA_BYTE_2     0xf0bc00ff
+
+/* TSM_AP5 */
+#define R367TER_TSM_AP5 0xf0bD
+#define F367TER_DATA_BYTE_3     0xf0bd00ff
+
+/* TSM_AP6 */
+#define R367TER_TSM_AP6 0xf0bE
+#define F367TER_TSM_AP_6        0xf0be00ff
+
+/* TSM_AP7 */
+#define R367TER_TSM_AP7 0xf0bF
+#define F367TER_MEM_SELECT_BYTE 0xf0bf00ff
+
+/* TSTRES */
+#define R367TER_TSTRES  0xf0c0
+#define F367TER_FRES_DISPLAY    0xf0c00080
+#define F367TER_FRES_FIFO_AD    0xf0c00020
+#define F367TER_FRESRS  0xf0c00010
+#define F367TER_FRESACS 0xf0c00008
+#define F367TER_FRESFEC 0xf0c00004
+#define F367TER_FRES_PRIF       0xf0c00002
+#define F367TER_FRESCORE        0xf0c00001
+
+/* ANACTRL */
+#define R367TER_ANACTRL 0xf0c1
+#define F367TER_BYPASS_XTAL     0xf0c10040
+#define F367TER_BYPASS_PLLXN    0xf0c1000c
+#define F367TER_DIS_PAD_OSC     0xf0c10002
+#define F367TER_STDBY_PLLXN     0xf0c10001
+
+/* TSTBUS */
+#define R367TER_TSTBUS  0xf0c2
+#define F367TER_TS_BYTE_CLK_INV 0xf0c20080
+#define F367TER_CFG_IP  0xf0c20070
+#define F367TER_CFG_TST 0xf0c2000f
+
+/* TSTRATE */
+#define R367TER_TSTRATE 0xf0c6
+#define F367TER_FORCEPHA        0xf0c60080
+#define F367TER_FNEWPHA 0xf0c60010
+#define F367TER_FROT90  0xf0c60008
+#define F367TER_FR      0xf0c60007
+
+/* CONSTMODE */
+#define R367TER_CONSTMODE       0xf0cb
+#define F367TER_TST_PRIF        0xf0cb00e0
+#define F367TER_CAR_TYPE        0xf0cb0018
+#define F367TER_CONST_MODE      0xf0cb0003
+
+/* CONSTCARR1 */
+#define R367TER_CONSTCARR1      0xf0cc
+#define F367TER_CONST_CARR_LO   0xf0cc00ff
+
+/* CONSTCARR2 */
+#define R367TER_CONSTCARR2      0xf0cd
+#define F367TER_CONST_CARR_HI   0xf0cd001f
+
+/* ICONSTEL */
+#define R367TER_ICONSTEL        0xf0ce
+#define F367TER_PICONSTEL       0xf0ce00ff
+
+/* QCONSTEL */
+#define R367TER_QCONSTEL        0xf0cf
+#define F367TER_PQCONSTEL       0xf0cf00ff
+
+/* TSTBISTRES0 */
+#define R367TER_TSTBISTRES0     0xf0d0
+#define F367TER_BEND_PPM        0xf0d00080
+#define F367TER_BBAD_PPM        0xf0d00040
+#define F367TER_BEND_FFTW       0xf0d00020
+#define F367TER_BBAD_FFTW       0xf0d00010
+#define F367TER_BEND_FFT_BUF    0xf0d00008
+#define F367TER_BBAD_FFT_BUF    0xf0d00004
+#define F367TER_BEND_SYR        0xf0d00002
+#define F367TER_BBAD_SYR        0xf0d00001
+
+/* TSTBISTRES1 */
+#define R367TER_TSTBISTRES1     0xf0d1
+#define F367TER_BEND_CHC_CP     0xf0d10080
+#define F367TER_BBAD_CHC_CP     0xf0d10040
+#define F367TER_BEND_CHCI       0xf0d10020
+#define F367TER_BBAD_CHCI       0xf0d10010
+#define F367TER_BEND_BDI        0xf0d10008
+#define F367TER_BBAD_BDI        0xf0d10004
+#define F367TER_BEND_SDI        0xf0d10002
+#define F367TER_BBAD_SDI        0xf0d10001
+
+/* TSTBISTRES2 */
+#define R367TER_TSTBISTRES2     0xf0d2
+#define F367TER_BEND_CHC_INC    0xf0d20080
+#define F367TER_BBAD_CHC_INC    0xf0d20040
+#define F367TER_BEND_CHC_SPP    0xf0d20020
+#define F367TER_BBAD_CHC_SPP    0xf0d20010
+#define F367TER_BEND_CHC_CPP    0xf0d20008
+#define F367TER_BBAD_CHC_CPP    0xf0d20004
+#define F367TER_BEND_CHC_SP     0xf0d20002
+#define F367TER_BBAD_CHC_SP     0xf0d20001
+
+/* TSTBISTRES3 */
+#define R367TER_TSTBISTRES3     0xf0d3
+#define F367TER_BEND_QAM        0xf0d30080
+#define F367TER_BBAD_QAM        0xf0d30040
+#define F367TER_BEND_SFEC_VIT   0xf0d30020
+#define F367TER_BBAD_SFEC_VIT   0xf0d30010
+#define F367TER_BEND_SFEC_DLINE 0xf0d30008
+#define F367TER_BBAD_SFEC_DLINE 0xf0d30004
+#define F367TER_BEND_SFEC_HW    0xf0d30002
+#define F367TER_BBAD_SFEC_HW    0xf0d30001
+
+/* RF_AGC1 */
+#define R367TER_RF_AGC1 0xf0d4
+#define F367TER_RF_AGC1_LEVEL_HI        0xf0d400ff
+
+/* RF_AGC2 */
+#define R367TER_RF_AGC2 0xf0d5
+#define F367TER_REF_ADGP        0xf0d50080
+#define F367TER_STDBY_ADCGP     0xf0d50020
+#define F367TER_CHANNEL_SEL     0xf0d5001c
+#define F367TER_RF_AGC1_LEVEL_LO        0xf0d50003
+
+/* ANADIGCTRL */
+#define R367TER_ANADIGCTRL      0xf0d7
+#define F367TER_SEL_CLKDEM      0xf0d70020
+#define F367TER_EN_BUFFER_Q     0xf0d70010
+#define F367TER_EN_BUFFER_I     0xf0d70008
+#define F367TER_ADC_RIS_EGDE    0xf0d70004
+#define F367TER_SGN_ADC 0xf0d70002
+#define F367TER_SEL_AD12_SYNC   0xf0d70001
+
+/* PLLMDIV */
+#define R367TER_PLLMDIV 0xf0d8
+#define F367TER_PLL_MDIV        0xf0d800ff
+
+/* PLLNDIV */
+#define R367TER_PLLNDIV 0xf0d9
+#define F367TER_PLL_NDIV        0xf0d900ff
+
+/* PLLSETUP */
+#define R367TER_PLLSETUP        0xf0dA
+#define F367TER_PLL_PDIV        0xf0da0070
+#define F367TER_PLL_KDIV        0xf0da000f
+
+/* DUAL_AD12 */
+#define R367TER_DUAL_AD12       0xf0dB
+#define F367TER_FS20M   0xf0db0020
+#define F367TER_FS50M   0xf0db0010
+#define F367TER_INMODe0 0xf0db0008
+#define F367TER_POFFQ   0xf0db0004
+#define F367TER_POFFI   0xf0db0002
+#define F367TER_INMODE1 0xf0db0001
+
+/* TSTBIST */
+#define R367TER_TSTBIST 0xf0dC
+#define F367TER_TST_BYP_CLK     0xf0dc0080
+#define F367TER_TST_GCLKENA_STD 0xf0dc0040
+#define F367TER_TST_GCLKENA     0xf0dc0020
+#define F367TER_TST_MEMBIST     0xf0dc001f
+
+/* PAD_COMP_CTRL */
+#define R367TER_PAD_COMP_CTRL   0xf0dD
+#define F367TER_COMPTQ  0xf0dd0010
+#define F367TER_COMPEN  0xf0dd0008
+#define F367TER_FREEZE2 0xf0dd0004
+#define F367TER_SLEEP_INHBT     0xf0dd0002
+#define F367TER_CHIP_SLEEP      0xf0dd0001
+
+/* PAD_COMP_WR */
+#define R367TER_PAD_COMP_WR     0xf0de
+#define F367TER_WR_ASRC 0xf0de007f
+
+/* PAD_COMP_RD */
+#define R367TER_PAD_COMP_RD     0xf0df
+#define F367TER_COMPOK  0xf0df0080
+#define F367TER_RD_ASRC 0xf0df007f
+
+/* SYR_TARGET_FFTADJT_MSB */
+#define R367TER_SYR_TARGET_FFTADJT_MSB  0xf100
+#define F367TER_SYR_START       0xf1000080
+#define F367TER_SYR_TARGET_FFTADJ_HI    0xf100000f
+
+/* SYR_TARGET_FFTADJT_LSB */
+#define R367TER_SYR_TARGET_FFTADJT_LSB  0xf101
+#define F367TER_SYR_TARGET_FFTADJ_LO    0xf10100ff
+
+/* SYR_TARGET_CHCADJT_MSB */
+#define R367TER_SYR_TARGET_CHCADJT_MSB  0xf102
+#define F367TER_SYR_TARGET_CHCADJ_HI    0xf102000f
+
+/* SYR_TARGET_CHCADJT_LSB */
+#define R367TER_SYR_TARGET_CHCADJT_LSB  0xf103
+#define F367TER_SYR_TARGET_CHCADJ_LO    0xf10300ff
+
+/* SYR_FLAG */
+#define R367TER_SYR_FLAG        0xf104
+#define F367TER_TRIG_FLG1       0xf1040080
+#define F367TER_TRIG_FLG0       0xf1040040
+#define F367TER_FFT_FLG1        0xf1040008
+#define F367TER_FFT_FLG0        0xf1040004
+#define F367TER_CHC_FLG1        0xf1040002
+#define F367TER_CHC_FLG0        0xf1040001
+
+/* CRL_TARGET1 */
+#define R367TER_CRL_TARGET1     0xf105
+#define F367TER_CRL_START       0xf1050080
+#define F367TER_CRL_TARGET_VHI  0xf105000f
+
+/* CRL_TARGET2 */
+#define R367TER_CRL_TARGET2     0xf106
+#define F367TER_CRL_TARGET_HI   0xf10600ff
+
+/* CRL_TARGET3 */
+#define R367TER_CRL_TARGET3     0xf107
+#define F367TER_CRL_TARGET_LO   0xf10700ff
+
+/* CRL_TARGET4 */
+#define R367TER_CRL_TARGET4     0xf108
+#define F367TER_CRL_TARGET_VLO  0xf10800ff
+
+/* CRL_FLAG */
+#define R367TER_CRL_FLAG        0xf109
+#define F367TER_CRL_FLAG1       0xf1090002
+#define F367TER_CRL_FLAG0       0xf1090001
+
+/* TRL_TARGET1 */
+#define R367TER_TRL_TARGET1     0xf10a
+#define F367TER_TRL_TARGET_HI   0xf10a00ff
+
+/* TRL_TARGET2 */
+#define R367TER_TRL_TARGET2     0xf10b
+#define F367TER_TRL_TARGET_LO   0xf10b00ff
+
+/* TRL_CHC */
+#define R367TER_TRL_CHC 0xf10c
+#define F367TER_TRL_START       0xf10c0080
+#define F367TER_CHC_START       0xf10c0040
+#define F367TER_TRL_FLAG1       0xf10c0002
+#define F367TER_TRL_FLAG0       0xf10c0001
+
+/* CHC_SNR_TARG */
+#define R367TER_CHC_SNR_TARG    0xf10d
+#define F367TER_CHC_SNR_TARGET  0xf10d00ff
+
+/* TOP_TRACK */
+#define R367TER_TOP_TRACK       0xf10e
+#define F367TER_TOP_START       0xf10e0080
+#define F367TER_FIRST_FLAG      0xf10e0070
+#define F367TER_TOP_FLAG1       0xf10e0008
+#define F367TER_TOP_FLAG0       0xf10e0004
+#define F367TER_CHC_FLAG1       0xf10e0002
+#define F367TER_CHC_FLAG0       0xf10e0001
+
+/* TRACKER_FREE1 */
+#define R367TER_TRACKER_FREE1   0xf10f
+#define F367TER_TRACKER_FREE_1  0xf10f00ff
+
+/* ERROR_CRL1 */
+#define R367TER_ERROR_CRL1      0xf110
+#define F367TER_ERROR_CRL_VHI   0xf11000ff
+
+/* ERROR_CRL2 */
+#define R367TER_ERROR_CRL2      0xf111
+#define F367TER_ERROR_CRL_HI    0xf11100ff
+
+/* ERROR_CRL3 */
+#define R367TER_ERROR_CRL3      0xf112
+#define F367TER_ERROR_CRL_LOI   0xf11200ff
+
+/* ERROR_CRL4 */
+#define R367TER_ERROR_CRL4      0xf113
+#define F367TER_ERROR_CRL_VLO   0xf11300ff
+
+/* DEC_NCO1 */
+#define R367TER_DEC_NCO1        0xf114
+#define F367TER_DEC_NCO_VHI     0xf11400ff
+
+/* DEC_NCO2 */
+#define R367TER_DEC_NCO2        0xf115
+#define F367TER_DEC_NCO_HI      0xf11500ff
+
+/* DEC_NCO3 */
+#define R367TER_DEC_NCO3        0xf116
+#define F367TER_DEC_NCO_LO      0xf11600ff
+
+/* SNR */
+#define R367TER_SNR     0xf117
+#define F367TER_SNRATIO 0xf11700ff
+
+/* SYR_FFTADJ1 */
+#define R367TER_SYR_FFTADJ1     0xf118
+#define F367TER_SYR_FFTADJ_HI   0xf11800ff
+
+/* SYR_FFTADJ2 */
+#define R367TER_SYR_FFTADJ2     0xf119
+#define F367TER_SYR_FFTADJ_LO   0xf11900ff
+
+/* SYR_CHCADJ1 */
+#define R367TER_SYR_CHCADJ1     0xf11a
+#define F367TER_SYR_CHCADJ_HI   0xf11a00ff
+
+/* SYR_CHCADJ2 */
+#define R367TER_SYR_CHCADJ2     0xf11b
+#define F367TER_SYR_CHCADJ_LO   0xf11b00ff
+
+/* SYR_OFF */
+#define R367TER_SYR_OFF 0xf11c
+#define F367TER_SYR_OFFSET      0xf11c00ff
+
+/* PPM_OFFSET1 */
+#define R367TER_PPM_OFFSET1     0xf11d
+#define F367TER_PPM_OFFSET_HI   0xf11d00ff
+
+/* PPM_OFFSET2 */
+#define R367TER_PPM_OFFSET2     0xf11e
+#define F367TER_PPM_OFFSET_LO   0xf11e00ff
+
+/* TRACKER_FREE2 */
+#define R367TER_TRACKER_FREE2   0xf11f
+#define F367TER_TRACKER_FREE_2  0xf11f00ff
+
+/* DEBG_LT10 */
+#define R367TER_DEBG_LT10       0xf120
+#define F367TER_DEBUG_LT10      0xf12000ff
+
+/* DEBG_LT11 */
+#define R367TER_DEBG_LT11       0xf121
+#define F367TER_DEBUG_LT11      0xf12100ff
+
+/* DEBG_LT12 */
+#define R367TER_DEBG_LT12       0xf122
+#define F367TER_DEBUG_LT12      0xf12200ff
+
+/* DEBG_LT13 */
+#define R367TER_DEBG_LT13       0xf123
+#define F367TER_DEBUG_LT13      0xf12300ff
+
+/* DEBG_LT14 */
+#define R367TER_DEBG_LT14       0xf124
+#define F367TER_DEBUG_LT14      0xf12400ff
+
+/* DEBG_LT15 */
+#define R367TER_DEBG_LT15       0xf125
+#define F367TER_DEBUG_LT15      0xf12500ff
+
+/* DEBG_LT16 */
+#define R367TER_DEBG_LT16       0xf126
+#define F367TER_DEBUG_LT16      0xf12600ff
+
+/* DEBG_LT17 */
+#define R367TER_DEBG_LT17       0xf127
+#define F367TER_DEBUG_LT17      0xf12700ff
+
+/* DEBG_LT18 */
+#define R367TER_DEBG_LT18       0xf128
+#define F367TER_DEBUG_LT18      0xf12800ff
+
+/* DEBG_LT19 */
+#define R367TER_DEBG_LT19       0xf129
+#define F367TER_DEBUG_LT19      0xf12900ff
+
+/* DEBG_LT1a */
+#define R367TER_DEBG_LT1A       0xf12a
+#define F367TER_DEBUG_LT1A      0xf12a00ff
+
+/* DEBG_LT1b */
+#define R367TER_DEBG_LT1B       0xf12b
+#define F367TER_DEBUG_LT1B      0xf12b00ff
+
+/* DEBG_LT1c */
+#define R367TER_DEBG_LT1C       0xf12c
+#define F367TER_DEBUG_LT1C      0xf12c00ff
+
+/* DEBG_LT1D */
+#define R367TER_DEBG_LT1D       0xf12d
+#define F367TER_DEBUG_LT1D      0xf12d00ff
+
+/* DEBG_LT1E */
+#define R367TER_DEBG_LT1E       0xf12e
+#define F367TER_DEBUG_LT1E      0xf12e00ff
+
+/* DEBG_LT1F */
+#define R367TER_DEBG_LT1F       0xf12f
+#define F367TER_DEBUG_LT1F      0xf12f00ff
+
+/* RCCFGH */
+#define R367TER_RCCFGH  0xf200
+#define F367TER_TSRCFIFO_DVBCI  0xf2000080
+#define F367TER_TSRCFIFO_SERIAL 0xf2000040
+#define F367TER_TSRCFIFO_DISABLE        0xf2000020
+#define F367TER_TSFIFO_2TORC    0xf2000010
+#define F367TER_TSRCFIFO_HSGNLOUT       0xf2000008
+#define F367TER_TSRCFIFO_ERRMODE        0xf2000006
+#define F367TER_RCCFGH_0        0xf2000001
+
+/* RCCFGM */
+#define R367TER_RCCFGM  0xf201
+#define F367TER_TSRCFIFO_MANSPEED       0xf20100c0
+#define F367TER_TSRCFIFO_PERMDATA       0xf2010020
+#define F367TER_TSRCFIFO_NONEWSGNL      0xf2010010
+#define F367TER_RCBYTE_OVERSAMPLING     0xf201000e
+#define F367TER_TSRCFIFO_INVDATA        0xf2010001
+
+/* RCCFGL */
+#define R367TER_RCCFGL  0xf202
+#define F367TER_TSRCFIFO_BCLKDEL1cK     0xf20200c0
+#define F367TER_RCCFGL_5        0xf2020020
+#define F367TER_TSRCFIFO_DUTY50 0xf2020010
+#define F367TER_TSRCFIFO_NSGNL2dATA     0xf2020008
+#define F367TER_TSRCFIFO_DISSERMUX      0xf2020004
+#define F367TER_RCCFGL_1        0xf2020002
+#define F367TER_TSRCFIFO_STOPCKDIS      0xf2020001
+
+/* RCINSDELH */
+#define R367TER_RCINSDELH       0xf203
+#define F367TER_TSRCDEL_SYNCBYTE        0xf2030080
+#define F367TER_TSRCDEL_XXHEADER        0xf2030040
+#define F367TER_TSRCDEL_BBHEADER        0xf2030020
+#define F367TER_TSRCDEL_DATAFIELD       0xf2030010
+#define F367TER_TSRCINSDEL_ISCR 0xf2030008
+#define F367TER_TSRCINSDEL_NPD  0xf2030004
+#define F367TER_TSRCINSDEL_RSPARITY     0xf2030002
+#define F367TER_TSRCINSDEL_CRC8 0xf2030001
+
+/* RCINSDELM */
+#define R367TER_RCINSDELM       0xf204
+#define F367TER_TSRCINS_BBPADDING       0xf2040080
+#define F367TER_TSRCINS_BCHFEC  0xf2040040
+#define F367TER_TSRCINS_LDPCFEC 0xf2040020
+#define F367TER_TSRCINS_EMODCOD 0xf2040010
+#define F367TER_TSRCINS_TOKEN   0xf2040008
+#define F367TER_TSRCINS_XXXERR  0xf2040004
+#define F367TER_TSRCINS_MATYPE  0xf2040002
+#define F367TER_TSRCINS_UPL     0xf2040001
+
+/* RCINSDELL */
+#define R367TER_RCINSDELL       0xf205
+#define F367TER_TSRCINS_DFL     0xf2050080
+#define F367TER_TSRCINS_SYNCD   0xf2050040
+#define F367TER_TSRCINS_BLOCLEN 0xf2050020
+#define F367TER_TSRCINS_SIGPCOUNT       0xf2050010
+#define F367TER_TSRCINS_FIFO    0xf2050008
+#define F367TER_TSRCINS_REALPACK        0xf2050004
+#define F367TER_TSRCINS_TSCONFIG        0xf2050002
+#define F367TER_TSRCINS_LATENCY 0xf2050001
+
+/* RCSTATUS */
+#define R367TER_RCSTATUS        0xf206
+#define F367TER_TSRCFIFO_LINEOK 0xf2060080
+#define F367TER_TSRCFIFO_ERROR  0xf2060040
+#define F367TER_TSRCFIFO_DATA7  0xf2060020
+#define F367TER_RCSTATUS_4      0xf2060010
+#define F367TER_TSRCFIFO_DEMODSEL       0xf2060008
+#define F367TER_TSRC1FIFOSPEED_STORE    0xf2060004
+#define F367TER_RCSTATUS_1      0xf2060002
+#define F367TER_TSRCSERIAL_IMPOSSIBLE   0xf2060001
+
+/* RCSPEED */
+#define R367TER_RCSPEED 0xf207
+#define F367TER_TSRCFIFO_OUTSPEED       0xf20700ff
+
+/* RCDEBUGM */
+#define R367TER_RCDEBUGM        0xf208
+#define F367TER_SD_UNSYNC       0xf2080080
+#define F367TER_ULFLOCK_DETECTM 0xf2080040
+#define F367TER_SUL_SELECTOS    0xf2080020
+#define F367TER_DILUL_NOSCRBLE  0xf2080010
+#define F367TER_NUL_SCRB        0xf2080008
+#define F367TER_UL_SCRB 0xf2080004
+#define F367TER_SCRAULBAD       0xf2080002
+#define F367TER_SCRAUL_UNSYNC   0xf2080001
+
+/* RCDEBUGL */
+#define R367TER_RCDEBUGL        0xf209
+#define F367TER_RS_ERR  0xf2090080
+#define F367TER_LLFLOCK_DETECTM 0xf2090040
+#define F367TER_NOT_SUL_SELECTOS        0xf2090020
+#define F367TER_DILLL_NOSCRBLE  0xf2090010
+#define F367TER_NLL_SCRB        0xf2090008
+#define F367TER_LL_SCRB 0xf2090004
+#define F367TER_SCRALLBAD       0xf2090002
+#define F367TER_SCRALL_UNSYNC   0xf2090001
+
+/* RCOBSCFG */
+#define R367TER_RCOBSCFG        0xf20a
+#define F367TER_TSRCFIFO_OBSCFG 0xf20a00ff
+
+/* RCOBSM */
+#define R367TER_RCOBSM  0xf20b
+#define F367TER_TSRCFIFO_OBSDATA_HI     0xf20b00ff
+
+/* RCOBSL */
+#define R367TER_RCOBSL  0xf20c
+#define F367TER_TSRCFIFO_OBSDATA_LO     0xf20c00ff
+
+/* RCFECSPY */
+#define R367TER_RCFECSPY        0xf210
+#define F367TER_SPYRC_ENABLE    0xf2100080
+#define F367TER_RCNO_SYNCBYTE   0xf2100040
+#define F367TER_RCSERIAL_MODE   0xf2100020
+#define F367TER_RCUNUSUAL_PACKET        0xf2100010
+#define F367TER_BERRCMETER_DATAMODE     0xf210000c
+#define F367TER_BERRCMETER_LMODE        0xf2100002
+#define F367TER_BERRCMETER_RESET        0xf2100001
+
+/* RCFSPYCFG */
+#define R367TER_RCFSPYCFG       0xf211
+#define F367TER_FECSPYRC_INPUT  0xf21100c0
+#define F367TER_RCRST_ON_ERROR  0xf2110020
+#define F367TER_RCONE_SHOT      0xf2110010
+#define F367TER_RCI2C_MODE      0xf211000c
+#define F367TER_SPYRC_HSTERESIS 0xf2110003
+
+/* RCFSPYDATA */
+#define R367TER_RCFSPYDATA      0xf212
+#define F367TER_SPYRC_STUFFING  0xf2120080
+#define F367TER_RCNOERR_PKTJITTER       0xf2120040
+#define F367TER_SPYRC_CNULLPKT  0xf2120020
+#define F367TER_SPYRC_OUTDATA_MODE      0xf212001f
+
+/* RCFSPYOUT */
+#define R367TER_RCFSPYOUT       0xf213
+#define F367TER_FSPYRC_DIRECT   0xf2130080
+#define F367TER_RCFSPYOUT_6     0xf2130040
+#define F367TER_SPYRC_OUTDATA_BUS       0xf2130038
+#define F367TER_RCSTUFF_MODE    0xf2130007
+
+/* RCFSTATUS */
+#define R367TER_RCFSTATUS       0xf214
+#define F367TER_SPYRC_ENDSIM    0xf2140080
+#define F367TER_RCVALID_SIM     0xf2140040
+#define F367TER_RCFOUND_SIGNAL  0xf2140020
+#define F367TER_RCDSS_SYNCBYTE  0xf2140010
+#define F367TER_RCRESULT_STATE  0xf214000f
+
+/* RCFGOODPACK */
+#define R367TER_RCFGOODPACK     0xf215
+#define F367TER_RCGOOD_PACKET   0xf21500ff
+
+/* RCFPACKCNT */
+#define R367TER_RCFPACKCNT      0xf216
+#define F367TER_RCPACKET_COUNTER        0xf21600ff
+
+/* RCFSPYMISC */
+#define R367TER_RCFSPYMISC      0xf217
+#define F367TER_RCLABEL_COUNTER 0xf21700ff
+
+/* RCFBERCPT4 */
+#define R367TER_RCFBERCPT4      0xf218
+#define F367TER_FBERRCMETER_CPT_MMMMSB  0xf21800ff
+
+/* RCFBERCPT3 */
+#define R367TER_RCFBERCPT3      0xf219
+#define F367TER_FBERRCMETER_CPT_MMMSB   0xf21900ff
+
+/* RCFBERCPT2 */
+#define R367TER_RCFBERCPT2      0xf21a
+#define F367TER_FBERRCMETER_CPT_MMSB    0xf21a00ff
+
+/* RCFBERCPT1 */
+#define R367TER_RCFBERCPT1      0xf21b
+#define F367TER_FBERRCMETER_CPT_MSB     0xf21b00ff
+
+/* RCFBERCPT0 */
+#define R367TER_RCFBERCPT0      0xf21c
+#define F367TER_FBERRCMETER_CPT_LSB     0xf21c00ff
+
+/* RCFBERERR2 */
+#define R367TER_RCFBERERR2      0xf21d
+#define F367TER_FBERRCMETER_ERR_HI      0xf21d00ff
+
+/* RCFBERERR1 */
+#define R367TER_RCFBERERR1      0xf21e
+#define F367TER_FBERRCMETER_ERR 0xf21e00ff
+
+/* RCFBERERR0 */
+#define R367TER_RCFBERERR0      0xf21f
+#define F367TER_FBERRCMETER_ERR_LO      0xf21f00ff
+
+/* RCFSTATESM */
+#define R367TER_RCFSTATESM      0xf220
+#define F367TER_RCRSTATE_F      0xf2200080
+#define F367TER_RCRSTATE_E      0xf2200040
+#define F367TER_RCRSTATE_D      0xf2200020
+#define F367TER_RCRSTATE_C      0xf2200010
+#define F367TER_RCRSTATE_B      0xf2200008
+#define F367TER_RCRSTATE_A      0xf2200004
+#define F367TER_RCRSTATE_9      0xf2200002
+#define F367TER_RCRSTATE_8      0xf2200001
+
+/* RCFSTATESL */
+#define R367TER_RCFSTATESL      0xf221
+#define F367TER_RCRSTATE_7      0xf2210080
+#define F367TER_RCRSTATE_6      0xf2210040
+#define F367TER_RCRSTATE_5      0xf2210020
+#define F367TER_RCRSTATE_4      0xf2210010
+#define F367TER_RCRSTATE_3      0xf2210008
+#define F367TER_RCRSTATE_2      0xf2210004
+#define F367TER_RCRSTATE_1      0xf2210002
+#define F367TER_RCRSTATE_0      0xf2210001
+
+/* RCFSPYBER */
+#define R367TER_RCFSPYBER       0xf222
+#define F367TER_RCFSPYBER_7     0xf2220080
+#define F367TER_SPYRCOBS_XORREAD        0xf2220040
+#define F367TER_FSPYRCBER_OBSMODE       0xf2220020
+#define F367TER_FSPYRCBER_SYNCBYT       0xf2220010
+#define F367TER_FSPYRCBER_UNSYNC        0xf2220008
+#define F367TER_FSPYRCBER_CTIME 0xf2220007
+
+/* RCFSPYDISTM */
+#define R367TER_RCFSPYDISTM     0xf223
+#define F367TER_RCPKTTIME_DISTANCE_HI   0xf22300ff
+
+/* RCFSPYDISTL */
+#define R367TER_RCFSPYDISTL     0xf224
+#define F367TER_RCPKTTIME_DISTANCE_LO   0xf22400ff
+
+/* RCFSPYOBS7 */
+#define R367TER_RCFSPYOBS7      0xf228
+#define F367TER_RCSPYOBS_SPYFAIL        0xf2280080
+#define F367TER_RCSPYOBS_SPYFAIL1       0xf2280040
+#define F367TER_RCSPYOBS_ERROR  0xf2280020
+#define F367TER_RCSPYOBS_STROUT 0xf2280010
+#define F367TER_RCSPYOBS_RESULTSTATE1   0xf228000f
+
+/* RCFSPYOBS6 */
+#define R367TER_RCFSPYOBS6      0xf229
+#define F367TER_RCSPYOBS_RESULTSTATe0   0xf22900f0
+#define F367TER_RCSPYOBS_RESULTSTATEM1  0xf229000f
+
+/* RCFSPYOBS5 */
+#define R367TER_RCFSPYOBS5      0xf22a
+#define F367TER_RCSPYOBS_BYTEOFPACKET1  0xf22a00ff
+
+/* RCFSPYOBS4 */
+#define R367TER_RCFSPYOBS4      0xf22b
+#define F367TER_RCSPYOBS_BYTEVALUE1     0xf22b00ff
+
+/* RCFSPYOBS3 */
+#define R367TER_RCFSPYOBS3      0xf22c
+#define F367TER_RCSPYOBS_DATA1  0xf22c00ff
+
+/* RCFSPYOBS2 */
+#define R367TER_RCFSPYOBS2      0xf22d
+#define F367TER_RCSPYOBS_DATa0  0xf22d00ff
+
+/* RCFSPYOBS1 */
+#define R367TER_RCFSPYOBS1      0xf22e
+#define F367TER_RCSPYOBS_DATAM1 0xf22e00ff
+
+/* RCFSPYOBS0 */
+#define R367TER_RCFSPYOBS0      0xf22f
+#define F367TER_RCSPYOBS_DATAM2 0xf22f00ff
+
+/* TSGENERAL */
+#define R367TER_TSGENERAL       0xf230
+#define F367TER_TSGENERAL_7     0xf2300080
+#define F367TER_TSGENERAL_6     0xf2300040
+#define F367TER_TSFIFO_BCLK1aLL 0xf2300020
+#define F367TER_TSGENERAL_4     0xf2300010
+#define F367TER_MUXSTREAM_OUTMODE       0xf2300008
+#define F367TER_TSFIFO_PERMPARAL        0xf2300006
+#define F367TER_RST_REEDSOLO    0xf2300001
+
+/* RC1SPEED */
+#define R367TER_RC1SPEED        0xf231
+#define F367TER_TSRCFIFO1_OUTSPEED      0xf23100ff
+
+/* TSGSTATUS */
+#define R367TER_TSGSTATUS       0xf232
+#define F367TER_TSGSTATUS_7     0xf2320080
+#define F367TER_TSGSTATUS_6     0xf2320040
+#define F367TER_RSMEM_FULL      0xf2320020
+#define F367TER_RS_MULTCALC     0xf2320010
+#define F367TER_RSIN_OVERTIME   0xf2320008
+#define F367TER_TSFIFO3_DEMODSEL        0xf2320004
+#define F367TER_TSFIFO2_DEMODSEL        0xf2320002
+#define F367TER_TSFIFO1_DEMODSEL        0xf2320001
+
+
+/* FECM */
+#define R367TER_FECM    0xf233
+#define F367TER_DSS_DVB 0xf2330080
+#define F367TER_DEMOD_BYPASS    0xf2330040
+#define F367TER_CMP_SLOWMODE    0xf2330020
+#define F367TER_DSS_SRCH        0xf2330010
+#define F367TER_FECM_3  0xf2330008
+#define F367TER_DIFF_MODEVIT    0xf2330004
+#define F367TER_SYNCVIT 0xf2330002
+#define F367TER_I2CSYM  0xf2330001
+
+/* VTH12 */
+#define R367TER_VTH12   0xf234
+#define F367TER_VTH_12  0xf23400ff
+
+/* VTH23 */
+#define R367TER_VTH23   0xf235
+#define F367TER_VTH_23  0xf23500ff
+
+/* VTH34 */
+#define R367TER_VTH34   0xf236
+#define F367TER_VTH_34  0xf23600ff
+
+/* VTH56 */
+#define R367TER_VTH56   0xf237
+#define F367TER_VTH_56  0xf23700ff
+
+/* VTH67 */
+#define R367TER_VTH67   0xf238
+#define F367TER_VTH_67  0xf23800ff
+
+/* VTH78 */
+#define R367TER_VTH78   0xf239
+#define F367TER_VTH_78  0xf23900ff
+
+/* VITCURPUN */
+#define R367TER_VITCURPUN       0xf23a
+#define F367TER_VIT_MAPPING     0xf23a00e0
+#define F367TER_VIT_CURPUN      0xf23a001f
+
+/* VERROR */
+#define R367TER_VERROR  0xf23b
+#define F367TER_REGERR_VIT      0xf23b00ff
+
+/* PRVIT */
+#define R367TER_PRVIT   0xf23c
+#define F367TER_PRVIT_7 0xf23c0080
+#define F367TER_DIS_VTHLOCK     0xf23c0040
+#define F367TER_E7_8VIT 0xf23c0020
+#define F367TER_E6_7VIT 0xf23c0010
+#define F367TER_E5_6VIT 0xf23c0008
+#define F367TER_E3_4VIT 0xf23c0004
+#define F367TER_E2_3VIT 0xf23c0002
+#define F367TER_E1_2VIT 0xf23c0001
+
+/* VAVSRVIT */
+#define R367TER_VAVSRVIT        0xf23d
+#define F367TER_AMVIT   0xf23d0080
+#define F367TER_FROZENVIT       0xf23d0040
+#define F367TER_SNVIT   0xf23d0030
+#define F367TER_TOVVIT  0xf23d000c
+#define F367TER_HYPVIT  0xf23d0003
+
+/* VSTATUSVIT */
+#define R367TER_VSTATUSVIT      0xf23e
+#define F367TER_VITERBI_ON      0xf23e0080
+#define F367TER_END_LOOPVIT     0xf23e0040
+#define F367TER_VITERBI_DEPRF   0xf23e0020
+#define F367TER_PRFVIT  0xf23e0010
+#define F367TER_LOCKEDVIT       0xf23e0008
+#define F367TER_VITERBI_DELOCK  0xf23e0004
+#define F367TER_VIT_DEMODSEL    0xf23e0002
+#define F367TER_VITERBI_COMPOUT 0xf23e0001
+
+/* VTHINUSE */
+#define R367TER_VTHINUSE        0xf23f
+#define F367TER_VIT_INUSE       0xf23f00ff
+
+/* KDIV12 */
+#define R367TER_KDIV12  0xf240
+#define F367TER_KDIV12_MANUAL   0xf2400080
+#define F367TER_K_DIVIDER_12    0xf240007f
+
+/* KDIV23 */
+#define R367TER_KDIV23  0xf241
+#define F367TER_KDIV23_MANUAL   0xf2410080
+#define F367TER_K_DIVIDER_23    0xf241007f
+
+/* KDIV34 */
+#define R367TER_KDIV34  0xf242
+#define F367TER_KDIV34_MANUAL   0xf2420080
+#define F367TER_K_DIVIDER_34    0xf242007f
+
+/* KDIV56 */
+#define R367TER_KDIV56  0xf243
+#define F367TER_KDIV56_MANUAL   0xf2430080
+#define F367TER_K_DIVIDER_56    0xf243007f
+
+/* KDIV67 */
+#define R367TER_KDIV67  0xf244
+#define F367TER_KDIV67_MANUAL   0xf2440080
+#define F367TER_K_DIVIDER_67    0xf244007f
+
+/* KDIV78 */
+#define R367TER_KDIV78  0xf245
+#define F367TER_KDIV78_MANUAL   0xf2450080
+#define F367TER_K_DIVIDER_78    0xf245007f
+
+/* SIGPOWER */
+#define R367TER_SIGPOWER        0xf246
+#define F367TER_SIGPOWER_MANUAL 0xf2460080
+#define F367TER_SIG_POWER       0xf246007f
+
+/* DEMAPVIT */
+#define R367TER_DEMAPVIT        0xf247
+#define F367TER_DEMAPVIT_7      0xf2470080
+#define F367TER_K_DIVIDER_VIT   0xf247007f
+
+/* VITSCALE */
+#define R367TER_VITSCALE        0xf248
+#define F367TER_NVTH_NOSRANGE   0xf2480080
+#define F367TER_VERROR_MAXMODE  0xf2480040
+#define F367TER_KDIV_MODE       0xf2480030
+#define F367TER_NSLOWSN_LOCKED  0xf2480008
+#define F367TER_DELOCK_PRFLOSS  0xf2480004
+#define F367TER_DIS_RSFLOCK     0xf2480002
+#define F367TER_VITSCALE_0      0xf2480001
+
+/* FFEC1PRG */
+#define R367TER_FFEC1PRG        0xf249
+#define F367TER_FDSS_DVB        0xf2490080
+#define F367TER_FDSS_SRCH       0xf2490040
+#define F367TER_FFECPROG_5      0xf2490020
+#define F367TER_FFECPROG_4      0xf2490010
+#define F367TER_FFECPROG_3      0xf2490008
+#define F367TER_FFECPROG_2      0xf2490004
+#define F367TER_FTS1_DISABLE    0xf2490002
+#define F367TER_FTS2_DISABLE    0xf2490001
+
+/* FVITCURPUN */
+#define R367TER_FVITCURPUN      0xf24a
+#define F367TER_FVIT_MAPPING    0xf24a00e0
+#define F367TER_FVIT_CURPUN     0xf24a001f
+
+/* FVERROR */
+#define R367TER_FVERROR 0xf24b
+#define F367TER_FREGERR_VIT     0xf24b00ff
+
+/* FVSTATUSVIT */
+#define R367TER_FVSTATUSVIT     0xf24c
+#define F367TER_FVITERBI_ON     0xf24c0080
+#define F367TER_F1END_LOOPVIT   0xf24c0040
+#define F367TER_FVITERBI_DEPRF  0xf24c0020
+#define F367TER_FPRFVIT 0xf24c0010
+#define F367TER_FLOCKEDVIT      0xf24c0008
+#define F367TER_FVITERBI_DELOCK 0xf24c0004
+#define F367TER_FVIT_DEMODSEL   0xf24c0002
+#define F367TER_FVITERBI_COMPOUT        0xf24c0001
+
+/* DEBUG_LT1 */
+#define R367TER_DEBUG_LT1       0xf24d
+#define F367TER_DBG_LT1 0xf24d00ff
+
+/* DEBUG_LT2 */
+#define R367TER_DEBUG_LT2       0xf24e
+#define F367TER_DBG_LT2 0xf24e00ff
+
+/* DEBUG_LT3 */
+#define R367TER_DEBUG_LT3       0xf24f
+#define F367TER_DBG_LT3 0xf24f00ff
+
+/*      TSTSFMET */
+#define R367TER_TSTSFMET        0xf250
+#define F367TER_TSTSFEC_METRIQUES       0xf25000ff
+
+/*      SELOUT */
+#define R367TER_SELOUT  0xf252
+#define F367TER_EN_SYNC 0xf2520080
+#define F367TER_EN_TBUSDEMAP    0xf2520040
+#define F367TER_SELOUT_5        0xf2520020
+#define F367TER_SELOUT_4        0xf2520010
+#define F367TER_TSTSYNCHRO_MODE 0xf2520002
+
+/*      TSYNC */
+#define R367TER_TSYNC   0xf253
+#define F367TER_CURPUN_INCMODE  0xf2530080
+#define F367TER_CERR_TSTMODE    0xf2530040
+#define F367TER_SHIFTSOF_MODE   0xf2530030
+#define F367TER_SLOWPHA_MODE    0xf2530008
+#define F367TER_PXX_BYPALL      0xf2530004
+#define F367TER_FROTA45_FIRST   0xf2530002
+#define F367TER_TST_BCHERROR    0xf2530001
+
+/*      TSTERR */
+#define R367TER_TSTERR  0xf254
+#define F367TER_TST_LONGPKT     0xf2540080
+#define F367TER_TST_ISSYION     0xf2540040
+#define F367TER_TST_NPDON       0xf2540020
+#define F367TER_TSTERR_4        0xf2540010
+#define F367TER_TRACEBACK_MODE  0xf2540008
+#define F367TER_TST_RSPARITY    0xf2540004
+#define F367TER_METRIQUE_MODE   0xf2540003
+
+/*      TSFSYNC */
+#define R367TER_TSFSYNC 0xf255
+#define F367TER_EN_SFECSYNC     0xf2550080
+#define F367TER_EN_SFECDEMAP    0xf2550040
+#define F367TER_SFCERR_TSTMODE  0xf2550020
+#define F367TER_SFECPXX_BYPALL  0xf2550010
+#define F367TER_SFECTSTSYNCHRO_MODE 0xf255000f
+
+/*      TSTSFERR */
+#define R367TER_TSTSFERR        0xf256
+#define F367TER_TSTSTERR_7      0xf2560080
+#define F367TER_TSTSTERR_6      0xf2560040
+#define F367TER_TSTSTERR_5      0xf2560020
+#define F367TER_TSTSTERR_4      0xf2560010
+#define F367TER_SFECTRACEBACK_MODE      0xf2560008
+#define F367TER_SFEC_NCONVPROG  0xf2560004
+#define F367TER_SFECMETRIQUE_MODE       0xf2560003
+
+/*      TSTTSSF1 */
+#define R367TER_TSTTSSF1        0xf258
+#define F367TER_TSTERSSF        0xf2580080
+#define F367TER_TSTTSSFEN       0xf2580040
+#define F367TER_SFEC_OUTMODE    0xf2580030
+#define F367TER_XLSF_NOFTHRESHOLD  0xf2580008
+#define F367TER_TSTTSSF_STACKSEL        0xf2580007
+
+/*      TSTTSSF2 */
+#define R367TER_TSTTSSF2        0xf259
+#define F367TER_DILSF_DBBHEADER 0xf2590080
+#define F367TER_TSTTSSF_DISBUG  0xf2590040
+#define F367TER_TSTTSSF_NOBADSTART      0xf2590020
+#define F367TER_TSTTSSF_SELECT  0xf259001f
+
+/*      TSTTSSF3 */
+#define R367TER_TSTTSSF3        0xf25a
+#define F367TER_TSTTSSF3_7      0xf25a0080
+#define F367TER_TSTTSSF3_6      0xf25a0040
+#define F367TER_TSTTSSF3_5      0xf25a0020
+#define F367TER_TSTTSSF3_4      0xf25a0010
+#define F367TER_TSTTSSF3_3      0xf25a0008
+#define F367TER_TSTTSSF3_2      0xf25a0004
+#define F367TER_TSTTSSF3_1      0xf25a0002
+#define F367TER_DISSF_CLKENABLE 0xf25a0001
+
+/*      TSTTS1 */
+#define R367TER_TSTTS1  0xf25c
+#define F367TER_TSTERS  0xf25c0080
+#define F367TER_TSFIFO_DSSSYNCB 0xf25c0040
+#define F367TER_TSTTS_FSPYBEFRS 0xf25c0020
+#define F367TER_NFORCE_SYNCBYTE 0xf25c0010
+#define F367TER_XL_NOFTHRESHOLD 0xf25c0008
+#define F367TER_TSTTS_FRFORCEPKT        0xf25c0004
+#define F367TER_DESCR_NOTAUTO   0xf25c0002
+#define F367TER_TSTTSEN 0xf25c0001
+
+/*      TSTTS2 */
+#define R367TER_TSTTS2  0xf25d
+#define F367TER_DIL_DBBHEADER   0xf25d0080
+#define F367TER_TSTTS_NOBADXXX  0xf25d0040
+#define F367TER_TSFIFO_DELSPEEDUP       0xf25d0020
+#define F367TER_TSTTS_SELECT    0xf25d001f
+
+/*      TSTTS3 */
+#define R367TER_TSTTS3  0xf25e
+#define F367TER_TSTTS_NOPKTGAIN 0xf25e0080
+#define F367TER_TSTTS_NOPKTENE  0xf25e0040
+#define F367TER_TSTTS_ISOLATION 0xf25e0020
+#define F367TER_TSTTS_DISBUG    0xf25e0010
+#define F367TER_TSTTS_NOBADSTART        0xf25e0008
+#define F367TER_TSTTS_STACKSEL  0xf25e0007
+
+/*      TSTTS4 */
+#define R367TER_TSTTS4  0xf25f
+#define F367TER_TSTTS4_7        0xf25f0080
+#define F367TER_TSTTS4_6        0xf25f0040
+#define F367TER_TSTTS4_5        0xf25f0020
+#define F367TER_TSTTS_DISDSTATE 0xf25f0010
+#define F367TER_TSTTS_FASTNOSYNC        0xf25f0008
+#define F367TER_EXT_FECSPYIN    0xf25f0004
+#define F367TER_TSTTS_NODPZERO  0xf25f0002
+#define F367TER_TSTTS_NODIV3    0xf25f0001
+
+/*      TSTTSRC */
+#define R367TER_TSTTSRC 0xf26c
+#define F367TER_TSTTSRC_7       0xf26c0080
+#define F367TER_TSRCFIFO_DSSSYNCB       0xf26c0040
+#define F367TER_TSRCFIFO_DPUNACTIVE     0xf26c0020
+#define F367TER_TSRCFIFO_DELSPEEDUP     0xf26c0010
+#define F367TER_TSTTSRC_NODIV3  0xf26c0008
+#define F367TER_TSTTSRC_FRFORCEPKT      0xf26c0004
+#define F367TER_SAT25_SDDORIGINE        0xf26c0002
+#define F367TER_TSTTSRC_INACTIVE        0xf26c0001
+
+/*      TSTTSRS */
+#define R367TER_TSTTSRS 0xf26d
+#define F367TER_TSTTSRS_7       0xf26d0080
+#define F367TER_TSTTSRS_6       0xf26d0040
+#define F367TER_TSTTSRS_5       0xf26d0020
+#define F367TER_TSTTSRS_4       0xf26d0010
+#define F367TER_TSTTSRS_3       0xf26d0008
+#define F367TER_TSTTSRS_2       0xf26d0004
+#define F367TER_TSTRS_DISRS2    0xf26d0002
+#define F367TER_TSTRS_DISRS1    0xf26d0001
+
+/* TSSTATEM */
+#define R367TER_TSSTATEM        0xf270
+#define F367TER_TSDIL_ON        0xf2700080
+#define F367TER_TSSKIPRS_ON     0xf2700040
+#define F367TER_TSRS_ON 0xf2700020
+#define F367TER_TSDESCRAMB_ON   0xf2700010
+#define F367TER_TSFRAME_MODE    0xf2700008
+#define F367TER_TS_DISABLE      0xf2700004
+#define F367TER_TSACM_MODE      0xf2700002
+#define F367TER_TSOUT_NOSYNC    0xf2700001
+
+/* TSSTATEL */
+#define R367TER_TSSTATEL        0xf271
+#define F367TER_TSNOSYNCBYTE    0xf2710080
+#define F367TER_TSPARITY_ON     0xf2710040
+#define F367TER_TSSYNCOUTRS_ON  0xf2710020
+#define F367TER_TSDVBS2_MODE    0xf2710010
+#define F367TER_TSISSYI_ON      0xf2710008
+#define F367TER_TSNPD_ON        0xf2710004
+#define F367TER_TSCRC8_ON       0xf2710002
+#define F367TER_TSDSS_PACKET    0xf2710001
+
+/* TSCFGH */
+#define R367TER_TSCFGH  0xf272
+#define F367TER_TSFIFO_DVBCI    0xf2720080
+#define F367TER_TSFIFO_SERIAL   0xf2720040
+#define F367TER_TSFIFO_TEIUPDATE        0xf2720020
+#define F367TER_TSFIFO_DUTY50   0xf2720010
+#define F367TER_TSFIFO_HSGNLOUT 0xf2720008
+#define F367TER_TSFIFO_ERRMODE  0xf2720006
+#define F367TER_RST_HWARE       0xf2720001
+
+/* TSCFGM */
+#define R367TER_TSCFGM  0xf273
+#define F367TER_TSFIFO_MANSPEED 0xf27300c0
+#define F367TER_TSFIFO_PERMDATA 0xf2730020
+#define F367TER_TSFIFO_NONEWSGNL        0xf2730010
+#define F367TER_TSFIFO_BITSPEED 0xf2730008
+#define F367TER_NPD_SPECDVBS2   0xf2730004
+#define F367TER_TSFIFO_STOPCKDIS        0xf2730002
+#define F367TER_TSFIFO_INVDATA  0xf2730001
+
+/* TSCFGL */
+#define R367TER_TSCFGL  0xf274
+#define F367TER_TSFIFO_BCLKDEL1cK       0xf27400c0
+#define F367TER_BCHERROR_MODE   0xf2740030
+#define F367TER_TSFIFO_NSGNL2dATA       0xf2740008
+#define F367TER_TSFIFO_EMBINDVB 0xf2740004
+#define F367TER_TSFIFO_DPUNACT  0xf2740002
+#define F367TER_TSFIFO_NPDOFF   0xf2740001
+
+/* TSSYNC */
+#define R367TER_TSSYNC  0xf275
+#define F367TER_TSFIFO_PERMUTE  0xf2750080
+#define F367TER_TSFIFO_FISCR3B  0xf2750060
+#define F367TER_TSFIFO_SYNCMODE 0xf2750018
+#define F367TER_TSFIFO_SYNCSEL  0xf2750007
+
+/* TSINSDELH */
+#define R367TER_TSINSDELH       0xf276
+#define F367TER_TSDEL_SYNCBYTE  0xf2760080
+#define F367TER_TSDEL_XXHEADER  0xf2760040
+#define F367TER_TSDEL_BBHEADER  0xf2760020
+#define F367TER_TSDEL_DATAFIELD 0xf2760010
+#define F367TER_TSINSDEL_ISCR   0xf2760008
+#define F367TER_TSINSDEL_NPD    0xf2760004
+#define F367TER_TSINSDEL_RSPARITY       0xf2760002
+#define F367TER_TSINSDEL_CRC8   0xf2760001
+
+/* TSINSDELM */
+#define R367TER_TSINSDELM       0xf277
+#define F367TER_TSINS_BBPADDING 0xf2770080
+#define F367TER_TSINS_BCHFEC    0xf2770040
+#define F367TER_TSINS_LDPCFEC   0xf2770020
+#define F367TER_TSINS_EMODCOD   0xf2770010
+#define F367TER_TSINS_TOKEN     0xf2770008
+#define F367TER_TSINS_XXXERR    0xf2770004
+#define F367TER_TSINS_MATYPE    0xf2770002
+#define F367TER_TSINS_UPL       0xf2770001
+
+/* TSINSDELL */
+#define R367TER_TSINSDELL       0xf278
+#define F367TER_TSINS_DFL       0xf2780080
+#define F367TER_TSINS_SYNCD     0xf2780040
+#define F367TER_TSINS_BLOCLEN   0xf2780020
+#define F367TER_TSINS_SIGPCOUNT 0xf2780010
+#define F367TER_TSINS_FIFO      0xf2780008
+#define F367TER_TSINS_REALPACK  0xf2780004
+#define F367TER_TSINS_TSCONFIG  0xf2780002
+#define F367TER_TSINS_LATENCY   0xf2780001
+
+/* TSDIVN */
+#define R367TER_TSDIVN  0xf279
+#define F367TER_TSFIFO_LOWSPEED 0xf2790080
+#define F367TER_BYTE_OVERSAMPLING       0xf2790070
+#define F367TER_TSMANUAL_PACKETNBR      0xf279000f
+
+/* TSDIVPM */
+#define R367TER_TSDIVPM 0xf27a
+#define F367TER_TSMANUAL_P_HI   0xf27a00ff
+
+/* TSDIVPL */
+#define R367TER_TSDIVPL 0xf27b
+#define F367TER_TSMANUAL_P_LO   0xf27b00ff
+
+/* TSDIVQM */
+#define R367TER_TSDIVQM 0xf27c
+#define F367TER_TSMANUAL_Q_HI   0xf27c00ff
+
+/* TSDIVQL */
+#define R367TER_TSDIVQL 0xf27d
+#define F367TER_TSMANUAL_Q_LO   0xf27d00ff
+
+/* TSDILSTKM */
+#define R367TER_TSDILSTKM       0xf27e
+#define F367TER_TSFIFO_DILSTK_HI        0xf27e00ff
+
+/* TSDILSTKL */
+#define R367TER_TSDILSTKL       0xf27f
+#define F367TER_TSFIFO_DILSTK_LO        0xf27f00ff
+
+/* TSSPEED */
+#define R367TER_TSSPEED 0xf280
+#define F367TER_TSFIFO_OUTSPEED 0xf28000ff
+
+/* TSSTATUS */
+#define R367TER_TSSTATUS        0xf281
+#define F367TER_TSFIFO_LINEOK   0xf2810080
+#define F367TER_TSFIFO_ERROR    0xf2810040
+#define F367TER_TSFIFO_DATA7    0xf2810020
+#define F367TER_TSFIFO_NOSYNC   0xf2810010
+#define F367TER_ISCR_INITIALIZED        0xf2810008
+#define F367TER_ISCR_UPDATED    0xf2810004
+#define F367TER_SOFFIFO_UNREGUL 0xf2810002
+#define F367TER_DIL_READY       0xf2810001
+
+/* TSSTATUS2 */
+#define R367TER_TSSTATUS2       0xf282
+#define F367TER_TSFIFO_DEMODSEL 0xf2820080
+#define F367TER_TSFIFOSPEED_STORE       0xf2820040
+#define F367TER_DILXX_RESET     0xf2820020
+#define F367TER_TSSERIAL_IMPOSSIBLE     0xf2820010
+#define F367TER_TSFIFO_UNDERSPEED       0xf2820008
+#define F367TER_BITSPEED_EVENT  0xf2820004
+#define F367TER_UL_SCRAMBDETECT 0xf2820002
+#define F367TER_ULDTV67_FALSELOCK       0xf2820001
+
+/* TSBITRATEM */
+#define R367TER_TSBITRATEM      0xf283
+#define F367TER_TSFIFO_BITRATE_HI       0xf28300ff
+
+/* TSBITRATEL */
+#define R367TER_TSBITRATEL      0xf284
+#define F367TER_TSFIFO_BITRATE_LO       0xf28400ff
+
+/* TSPACKLENM */
+#define R367TER_TSPACKLENM      0xf285
+#define F367TER_TSFIFO_PACKCPT  0xf28500e0
+#define F367TER_DIL_RPLEN_HI    0xf285001f
+
+/* TSPACKLENL */
+#define R367TER_TSPACKLENL      0xf286
+#define F367TER_DIL_RPLEN_LO    0xf28600ff
+
+/* TSBLOCLENM */
+#define R367TER_TSBLOCLENM      0xf287
+#define F367TER_TSFIFO_PFLEN_HI 0xf28700ff
+
+/* TSBLOCLENL */
+#define R367TER_TSBLOCLENL      0xf288
+#define F367TER_TSFIFO_PFLEN_LO 0xf28800ff
+
+/* TSDLYH */
+#define R367TER_TSDLYH  0xf289
+#define F367TER_SOFFIFO_TSTIMEVALID     0xf2890080
+#define F367TER_SOFFIFO_SPEEDUP 0xf2890040
+#define F367TER_SOFFIFO_STOP    0xf2890020
+#define F367TER_SOFFIFO_REGULATED       0xf2890010
+#define F367TER_SOFFIFO_REALSBOFF_HI    0xf289000f
+
+/* TSDLYM */
+#define R367TER_TSDLYM  0xf28a
+#define F367TER_SOFFIFO_REALSBOFF_MED   0xf28a00ff
+
+/* TSDLYL */
+#define R367TER_TSDLYL  0xf28b
+#define F367TER_SOFFIFO_REALSBOFF_LO    0xf28b00ff
+
+/* TSNPDAV */
+#define R367TER_TSNPDAV 0xf28c
+#define F367TER_TSNPD_AVERAGE   0xf28c00ff
+
+/* TSBUFSTATH */
+#define R367TER_TSBUFSTATH      0xf28d
+#define F367TER_TSISCR_3BYTES   0xf28d0080
+#define F367TER_TSISCR_NEWDATA  0xf28d0040
+#define F367TER_TSISCR_BUFSTAT_HI       0xf28d003f
+
+/* TSBUFSTATM */
+#define R367TER_TSBUFSTATM      0xf28e
+#define F367TER_TSISCR_BUFSTAT_MED      0xf28e00ff
+
+/* TSBUFSTATL */
+#define R367TER_TSBUFSTATL      0xf28f
+#define F367TER_TSISCR_BUFSTAT_LO       0xf28f00ff
+
+/* TSDEBUGM */
+#define R367TER_TSDEBUGM        0xf290
+#define F367TER_TSFIFO_ILLPACKET        0xf2900080
+#define F367TER_DIL_NOSYNC      0xf2900040
+#define F367TER_DIL_ISCR        0xf2900020
+#define F367TER_DILOUT_BSYNCB   0xf2900010
+#define F367TER_TSFIFO_EMPTYPKT 0xf2900008
+#define F367TER_TSFIFO_EMPTYRD  0xf2900004
+#define F367TER_SOFFIFO_STOPM   0xf2900002
+#define F367TER_SOFFIFO_SPEEDUPM        0xf2900001
+
+/* TSDEBUGL */
+#define R367TER_TSDEBUGL        0xf291
+#define F367TER_TSFIFO_PACKLENFAIL      0xf2910080
+#define F367TER_TSFIFO_SYNCBFAIL        0xf2910040
+#define F367TER_TSFIFO_VITLIBRE 0xf2910020
+#define F367TER_TSFIFO_BOOSTSPEEDM      0xf2910010
+#define F367TER_TSFIFO_UNDERSPEEDM      0xf2910008
+#define F367TER_TSFIFO_ERROR_EVNT       0xf2910004
+#define F367TER_TSFIFO_FULL     0xf2910002
+#define F367TER_TSFIFO_OVERFLOWM        0xf2910001
+
+/* TSDLYSETH */
+#define R367TER_TSDLYSETH       0xf292
+#define F367TER_SOFFIFO_OFFSET  0xf29200e0
+#define F367TER_SOFFIFO_SYMBOFFSET_HI   0xf292001f
+
+/* TSDLYSETM */
+#define R367TER_TSDLYSETM       0xf293
+#define F367TER_SOFFIFO_SYMBOFFSET_MED  0xf29300ff
+
+/* TSDLYSETL */
+#define R367TER_TSDLYSETL       0xf294
+#define F367TER_SOFFIFO_SYMBOFFSET_LO   0xf29400ff
+
+/* TSOBSCFG */
+#define R367TER_TSOBSCFG        0xf295
+#define F367TER_TSFIFO_OBSCFG   0xf29500ff
+
+/* TSOBSM */
+#define R367TER_TSOBSM  0xf296
+#define F367TER_TSFIFO_OBSDATA_HI       0xf29600ff
+
+/* TSOBSL */
+#define R367TER_TSOBSL  0xf297
+#define F367TER_TSFIFO_OBSDATA_LO       0xf29700ff
+
+/* ERRCTRL1 */
+#define R367TER_ERRCTRL1        0xf298
+#define F367TER_ERR_SRC1        0xf29800f0
+#define F367TER_ERRCTRL1_3      0xf2980008
+#define F367TER_NUM_EVT1        0xf2980007
+
+/* ERRCNT1H */
+#define R367TER_ERRCNT1H        0xf299
+#define F367TER_ERRCNT1_OLDVALUE        0xf2990080
+#define F367TER_ERR_CNT1        0xf299007f
+
+/* ERRCNT1M */
+#define R367TER_ERRCNT1M        0xf29a
+#define F367TER_ERR_CNT1_HI     0xf29a00ff
+
+/* ERRCNT1L */
+#define R367TER_ERRCNT1L        0xf29b
+#define F367TER_ERR_CNT1_LO     0xf29b00ff
+
+/* ERRCTRL2 */
+#define R367TER_ERRCTRL2        0xf29c
+#define F367TER_ERR_SRC2        0xf29c00f0
+#define F367TER_ERRCTRL2_3      0xf29c0008
+#define F367TER_NUM_EVT2        0xf29c0007
+
+/* ERRCNT2H */
+#define R367TER_ERRCNT2H        0xf29d
+#define F367TER_ERRCNT2_OLDVALUE        0xf29d0080
+#define F367TER_ERR_CNT2_HI     0xf29d007f
+
+/* ERRCNT2M */
+#define R367TER_ERRCNT2M        0xf29e
+#define F367TER_ERR_CNT2_MED    0xf29e00ff
+
+/* ERRCNT2L */
+#define R367TER_ERRCNT2L        0xf29f
+#define F367TER_ERR_CNT2_LO     0xf29f00ff
+
+/* FECSPY */
+#define R367TER_FECSPY  0xf2a0
+#define F367TER_SPY_ENABLE      0xf2a00080
+#define F367TER_NO_SYNCBYTE     0xf2a00040
+#define F367TER_SERIAL_MODE     0xf2a00020
+#define F367TER_UNUSUAL_PACKET  0xf2a00010
+#define F367TER_BERMETER_DATAMODE       0xf2a0000c
+#define F367TER_BERMETER_LMODE  0xf2a00002
+#define F367TER_BERMETER_RESET  0xf2a00001
+
+/* FSPYCFG */
+#define R367TER_FSPYCFG 0xf2a1
+#define F367TER_FECSPY_INPUT    0xf2a100c0
+#define F367TER_RST_ON_ERROR    0xf2a10020
+#define F367TER_ONE_SHOT        0xf2a10010
+#define F367TER_I2C_MOD 0xf2a1000c
+#define F367TER_SPY_HYSTERESIS  0xf2a10003
+
+/* FSPYDATA */
+#define R367TER_FSPYDATA        0xf2a2
+#define F367TER_SPY_STUFFING    0xf2a20080
+#define F367TER_NOERROR_PKTJITTER       0xf2a20040
+#define F367TER_SPY_CNULLPKT    0xf2a20020
+#define F367TER_SPY_OUTDATA_MODE        0xf2a2001f
+
+/* FSPYOUT */
+#define R367TER_FSPYOUT 0xf2a3
+#define F367TER_FSPY_DIRECT     0xf2a30080
+#define F367TER_FSPYOUT_6       0xf2a30040
+#define F367TER_SPY_OUTDATA_BUS 0xf2a30038
+#define F367TER_STUFF_MODE      0xf2a30007
+
+/* FSTATUS */
+#define R367TER_FSTATUS 0xf2a4
+#define F367TER_SPY_ENDSIM      0xf2a40080
+#define F367TER_VALID_SIM       0xf2a40040
+#define F367TER_FOUND_SIGNAL    0xf2a40020
+#define F367TER_DSS_SYNCBYTE    0xf2a40010
+#define F367TER_RESULT_STATE    0xf2a4000f
+
+/* FGOODPACK */
+#define R367TER_FGOODPACK       0xf2a5
+#define F367TER_FGOOD_PACKET    0xf2a500ff
+
+/* FPACKCNT */
+#define R367TER_FPACKCNT        0xf2a6
+#define F367TER_FPACKET_COUNTER 0xf2a600ff
+
+/* FSPYMISC */
+#define R367TER_FSPYMISC        0xf2a7
+#define F367TER_FLABEL_COUNTER  0xf2a700ff
+
+/* FBERCPT4 */
+#define R367TER_FBERCPT4        0xf2a8
+#define F367TER_FBERMETER_CPT5  0xf2a800ff
+
+/* FBERCPT3 */
+#define R367TER_FBERCPT3        0xf2a9
+#define F367TER_FBERMETER_CPT4  0xf2a900ff
+
+/* FBERCPT2 */
+#define R367TER_FBERCPT2        0xf2aa
+#define F367TER_FBERMETER_CPT3  0xf2aa00ff
+
+/* FBERCPT1 */
+#define R367TER_FBERCPT1        0xf2ab
+#define F367TER_FBERMETER_CPT2  0xf2ab00ff
+
+/* FBERCPT0 */
+#define R367TER_FBERCPT0        0xf2ac
+#define F367TER_FBERMETER_CPT1  0xf2ac00ff
+
+/* FBERERR2 */
+#define R367TER_FBERERR2        0xf2ad
+#define F367TER_FBERMETER_ERR_HI        0xf2ad00ff
+
+/* FBERERR1 */
+#define R367TER_FBERERR1        0xf2ae
+#define F367TER_FBERMETER_ERR_MED       0xf2ae00ff
+
+/* FBERERR0 */
+#define R367TER_FBERERR0        0xf2af
+#define F367TER_FBERMETER_ERR_LO        0xf2af00ff
+
+/* FSTATESM */
+#define R367TER_FSTATESM        0xf2b0
+#define F367TER_RSTATE_F        0xf2b00080
+#define F367TER_RSTATE_E        0xf2b00040
+#define F367TER_RSTATE_D        0xf2b00020
+#define F367TER_RSTATE_C        0xf2b00010
+#define F367TER_RSTATE_B        0xf2b00008
+#define F367TER_RSTATE_A        0xf2b00004
+#define F367TER_RSTATE_9        0xf2b00002
+#define F367TER_RSTATE_8        0xf2b00001
+
+/* FSTATESL */
+#define R367TER_FSTATESL        0xf2b1
+#define F367TER_RSTATE_7        0xf2b10080
+#define F367TER_RSTATE_6        0xf2b10040
+#define F367TER_RSTATE_5        0xf2b10020
+#define F367TER_RSTATE_4        0xf2b10010
+#define F367TER_RSTATE_3        0xf2b10008
+#define F367TER_RSTATE_2        0xf2b10004
+#define F367TER_RSTATE_1        0xf2b10002
+#define F367TER_RSTATE_0        0xf2b10001
+
+/* FSPYBER */
+#define R367TER_FSPYBER 0xf2b2
+#define F367TER_FSPYBER_7       0xf2b20080
+#define F367TER_FSPYOBS_XORREAD 0xf2b20040
+#define F367TER_FSPYBER_OBSMODE 0xf2b20020
+#define F367TER_FSPYBER_SYNCBYTE        0xf2b20010
+#define F367TER_FSPYBER_UNSYNC  0xf2b20008
+#define F367TER_FSPYBER_CTIME   0xf2b20007
+
+/* FSPYDISTM */
+#define R367TER_FSPYDISTM       0xf2b3
+#define F367TER_PKTTIME_DISTANCE_HI     0xf2b300ff
+
+/* FSPYDISTL */
+#define R367TER_FSPYDISTL       0xf2b4
+#define F367TER_PKTTIME_DISTANCE_LO     0xf2b400ff
+
+/* FSPYOBS7 */
+#define R367TER_FSPYOBS7        0xf2b8
+#define F367TER_FSPYOBS_SPYFAIL 0xf2b80080
+#define F367TER_FSPYOBS_SPYFAIL1        0xf2b80040
+#define F367TER_FSPYOBS_ERROR   0xf2b80020
+#define F367TER_FSPYOBS_STROUT  0xf2b80010
+#define F367TER_FSPYOBS_RESULTSTATE1    0xf2b8000f
+
+/* FSPYOBS6 */
+#define R367TER_FSPYOBS6        0xf2b9
+#define F367TER_FSPYOBS_RESULTSTATe0    0xf2b900f0
+#define F367TER_FSPYOBS_RESULTSTATEM1   0xf2b9000f
+
+/* FSPYOBS5 */
+#define R367TER_FSPYOBS5        0xf2ba
+#define F367TER_FSPYOBS_BYTEOFPACKET1   0xf2ba00ff
+
+/* FSPYOBS4 */
+#define R367TER_FSPYOBS4        0xf2bb
+#define F367TER_FSPYOBS_BYTEVALUE1      0xf2bb00ff
+
+/* FSPYOBS3 */
+#define R367TER_FSPYOBS3        0xf2bc
+#define F367TER_FSPYOBS_DATA1   0xf2bc00ff
+
+/* FSPYOBS2 */
+#define R367TER_FSPYOBS2        0xf2bd
+#define F367TER_FSPYOBS_DATa0   0xf2bd00ff
+
+/* FSPYOBS1 */
+#define R367TER_FSPYOBS1        0xf2be
+#define F367TER_FSPYOBS_DATAM1  0xf2be00ff
+
+/* FSPYOBS0 */
+#define R367TER_FSPYOBS0        0xf2bf
+#define F367TER_FSPYOBS_DATAM2  0xf2bf00ff
+
+/* SFDEMAP */
+#define R367TER_SFDEMAP 0xf2c0
+#define F367TER_SFDEMAP_7       0xf2c00080
+#define F367TER_SFEC_K_DIVIDER_VIT      0xf2c0007f
+
+/* SFERROR */
+#define R367TER_SFERROR 0xf2c1
+#define F367TER_SFEC_REGERR_VIT 0xf2c100ff
+
+/* SFAVSR */
+#define R367TER_SFAVSR  0xf2c2
+#define F367TER_SFEC_SUMERRORS  0xf2c20080
+#define F367TER_SERROR_MAXMODE  0xf2c20040
+#define F367TER_SN_SFEC 0xf2c20030
+#define F367TER_KDIV_MODE_SFEC  0xf2c2000c
+#define F367TER_SFAVSR_1        0xf2c20002
+#define F367TER_SFAVSR_0        0xf2c20001
+
+/* SFECSTATUS */
+#define R367TER_SFECSTATUS      0xf2c3
+#define F367TER_SFEC_ON 0xf2c30080
+#define F367TER_SFSTATUS_6      0xf2c30040
+#define F367TER_SFSTATUS_5      0xf2c30020
+#define F367TER_SFSTATUS_4      0xf2c30010
+#define F367TER_LOCKEDSFEC      0xf2c30008
+#define F367TER_SFEC_DELOCK     0xf2c30004
+#define F367TER_SFEC_DEMODSEL1  0xf2c30002
+#define F367TER_SFEC_OVFON      0xf2c30001
+
+/* SFKDIV12 */
+#define R367TER_SFKDIV12        0xf2c4
+#define F367TER_SFECKDIV12_MAN  0xf2c40080
+#define F367TER_SFEC_K_DIVIDER_12       0xf2c4007f
+
+/* SFKDIV23 */
+#define R367TER_SFKDIV23        0xf2c5
+#define F367TER_SFECKDIV23_MAN  0xf2c50080
+#define F367TER_SFEC_K_DIVIDER_23       0xf2c5007f
+
+/* SFKDIV34 */
+#define R367TER_SFKDIV34        0xf2c6
+#define F367TER_SFECKDIV34_MAN  0xf2c60080
+#define F367TER_SFEC_K_DIVIDER_34       0xf2c6007f
+
+/* SFKDIV56 */
+#define R367TER_SFKDIV56        0xf2c7
+#define F367TER_SFECKDIV56_MAN  0xf2c70080
+#define F367TER_SFEC_K_DIVIDER_56       0xf2c7007f
+
+/* SFKDIV67 */
+#define R367TER_SFKDIV67        0xf2c8
+#define F367TER_SFECKDIV67_MAN  0xf2c80080
+#define F367TER_SFEC_K_DIVIDER_67       0xf2c8007f
+
+/* SFKDIV78 */
+#define R367TER_SFKDIV78        0xf2c9
+#define F367TER_SFECKDIV78_MAN  0xf2c90080
+#define F367TER_SFEC_K_DIVIDER_78       0xf2c9007f
+
+/* SFDILSTKM */
+#define R367TER_SFDILSTKM       0xf2ca
+#define F367TER_SFEC_PACKCPT    0xf2ca00e0
+#define F367TER_SFEC_DILSTK_HI  0xf2ca001f
+
+/* SFDILSTKL */
+#define R367TER_SFDILSTKL       0xf2cb
+#define F367TER_SFEC_DILSTK_LO  0xf2cb00ff
+
+/* SFSTATUS */
+#define R367TER_SFSTATUS        0xf2cc
+#define F367TER_SFEC_LINEOK     0xf2cc0080
+#define F367TER_SFEC_ERROR      0xf2cc0040
+#define F367TER_SFEC_DATA7      0xf2cc0020
+#define F367TER_SFEC_OVERFLOW   0xf2cc0010
+#define F367TER_SFEC_DEMODSEL2  0xf2cc0008
+#define F367TER_SFEC_NOSYNC     0xf2cc0004
+#define F367TER_SFEC_UNREGULA   0xf2cc0002
+#define F367TER_SFEC_READY      0xf2cc0001
+
+/* SFDLYH */
+#define R367TER_SFDLYH  0xf2cd
+#define F367TER_SFEC_TSTIMEVALID        0xf2cd0080
+#define F367TER_SFEC_SPEEDUP    0xf2cd0040
+#define F367TER_SFEC_STOP       0xf2cd0020
+#define F367TER_SFEC_REGULATED  0xf2cd0010
+#define F367TER_SFEC_REALSYMBOFFSET     0xf2cd000f
+
+/* SFDLYM */
+#define R367TER_SFDLYM  0xf2ce
+#define F367TER_SFEC_REALSYMBOFFSET_HI  0xf2ce00ff
+
+/* SFDLYL */
+#define R367TER_SFDLYL  0xf2cf
+#define F367TER_SFEC_REALSYMBOFFSET_LO  0xf2cf00ff
+
+/* SFDLYSETH */
+#define R367TER_SFDLYSETH       0xf2d0
+#define F367TER_SFEC_OFFSET     0xf2d000e0
+#define F367TER_SFECDLYSETH_4   0xf2d00010
+#define F367TER_RST_SFEC        0xf2d00008
+#define F367TER_SFECDLYSETH_2   0xf2d00004
+#define F367TER_SFEC_DISABLE    0xf2d00002
+#define F367TER_SFEC_UNREGUL    0xf2d00001
+
+/* SFDLYSETM */
+#define R367TER_SFDLYSETM       0xf2d1
+#define F367TER_SFECDLYSETM_7   0xf2d10080
+#define F367TER_SFEC_SYMBOFFSET_HI      0xf2d1007f
+
+/* SFDLYSETL */
+#define R367TER_SFDLYSETL       0xf2d2
+#define F367TER_SFEC_SYMBOFFSET_LO      0xf2d200ff
+
+/* SFOBSCFG */
+#define R367TER_SFOBSCFG        0xf2d3
+#define F367TER_SFEC_OBSCFG     0xf2d300ff
+
+/* SFOBSM */
+#define R367TER_SFOBSM  0xf2d4
+#define F367TER_SFEC_OBSDATA_HI 0xf2d400ff
+
+/* SFOBSL */
+#define R367TER_SFOBSL  0xf2d5
+#define F367TER_SFEC_OBSDATA_LO 0xf2d500ff
+
+/* SFECINFO */
+#define R367TER_SFECINFO        0xf2d6
+#define F367TER_SFECINFO_7      0xf2d60080
+#define F367TER_SFEC_SYNCDLSB   0xf2d60070
+#define F367TER_SFCE_S1cPHASE   0xf2d6000f
+
+/* SFERRCTRL */
+#define R367TER_SFERRCTRL       0xf2d8
+#define F367TER_SFEC_ERR_SOURCE 0xf2d800f0
+#define F367TER_SFERRCTRL_3     0xf2d80008
+#define F367TER_SFEC_NUM_EVENT  0xf2d80007
+
+/* SFERRCNTH */
+#define R367TER_SFERRCNTH       0xf2d9
+#define F367TER_SFERRC_OLDVALUE 0xf2d90080
+#define F367TER_SFEC_ERR_CNT    0xf2d9007f
+
+/* SFERRCNTM */
+#define R367TER_SFERRCNTM       0xf2da
+#define F367TER_SFEC_ERR_CNT_HI 0xf2da00ff
+
+/* SFERRCNTL */
+#define R367TER_SFERRCNTL       0xf2db
+#define F367TER_SFEC_ERR_CNT_LO 0xf2db00ff
+
+/* SYMBRATEM */
+#define R367TER_SYMBRATEM       0xf2e0
+#define F367TER_DEFGEN_SYMBRATE_HI      0xf2e000ff
+
+/* SYMBRATEL */
+#define R367TER_SYMBRATEL       0xf2e1
+#define F367TER_DEFGEN_SYMBRATE_LO      0xf2e100ff
+
+/* SYMBSTATUS */
+#define R367TER_SYMBSTATUS      0xf2e2
+#define F367TER_SYMBDLINE2_OFF  0xf2e20080
+#define F367TER_SDDL_REINIT1    0xf2e20040
+#define F367TER_SDD_REINIT1     0xf2e20020
+#define F367TER_TOKENID_ERROR   0xf2e20010
+#define F367TER_SYMBRATE_OVERFLOW       0xf2e20008
+#define F367TER_SYMBRATE_UNDERFLOW      0xf2e20004
+#define F367TER_TOKENID_RSTEVENT        0xf2e20002
+#define F367TER_TOKENID_RESET1  0xf2e20001
+
+/* SYMBCFG */
+#define R367TER_SYMBCFG 0xf2e3
+#define F367TER_SYMBCFG_7       0xf2e30080
+#define F367TER_SYMBCFG_6       0xf2e30040
+#define F367TER_SYMBCFG_5       0xf2e30020
+#define F367TER_SYMBCFG_4       0xf2e30010
+#define F367TER_SYMRATE_FSPEED  0xf2e3000c
+#define F367TER_SYMRATE_SSPEED  0xf2e30003
+
+/* SYMBFIFOM */
+#define R367TER_SYMBFIFOM       0xf2e4
+#define F367TER_SYMBFIFOM_7     0xf2e40080
+#define F367TER_SYMBFIFOM_6     0xf2e40040
+#define F367TER_DEFGEN_SYMFIFO_HI       0xf2e4003f
+
+/* SYMBFIFOL */
+#define R367TER_SYMBFIFOL       0xf2e5
+#define F367TER_DEFGEN_SYMFIFO_LO       0xf2e500ff
+
+/* SYMBOFFSM */
+#define R367TER_SYMBOFFSM       0xf2e6
+#define F367TER_TOKENID_RESET2  0xf2e60080
+#define F367TER_SDDL_REINIT2    0xf2e60040
+#define F367TER_SDD_REINIT2     0xf2e60020
+#define F367TER_SYMBOFFSM_4     0xf2e60010
+#define F367TER_SYMBOFFSM_3     0xf2e60008
+#define F367TER_DEFGEN_SYMBOFFSET_HI    0xf2e60007
+
+/* SYMBOFFSL */
+#define R367TER_SYMBOFFSL       0xf2e7
+#define F367TER_DEFGEN_SYMBOFFSET_LO    0xf2e700ff
+
+/* DEBUG_LT4 */
+#define R367TER_DEBUG_LT4       0xf400
+#define F367TER_F_DEBUG_LT4     0xf40000ff
+
+/* DEBUG_LT5 */
+#define R367TER_DEBUG_LT5       0xf401
+#define F367TER_F_DEBUG_LT5     0xf40100ff
+
+/* DEBUG_LT6 */
+#define R367TER_DEBUG_LT6       0xf402
+#define F367TER_F_DEBUG_LT6     0xf40200ff
+
+/* DEBUG_LT7 */
+#define R367TER_DEBUG_LT7       0xf403
+#define F367TER_F_DEBUG_LT7     0xf40300ff
+
+/* DEBUG_LT8 */
+#define R367TER_DEBUG_LT8       0xf404
+#define F367TER_F_DEBUG_LT8     0xf40400ff
+
+/* DEBUG_LT9 */
+#define R367TER_DEBUG_LT9       0xf405
+#define F367TER_F_DEBUG_LT9     0xf40500ff
+
+#define STV0367TER_NBREGS       445
+
+/* ID */
+#define R367CAB_ID      0xf000
+#define F367CAB_IDENTIFICATIONREGISTER  0xf00000ff
+
+/* I2CRPT */
+#define R367CAB_I2CRPT  0xf001
+#define F367CAB_I2CT_ON 0xf0010080
+#define F367CAB_ENARPT_LEVEL    0xf0010070
+#define F367CAB_SCLT_DELAY      0xf0010008
+#define F367CAB_SCLT_NOD        0xf0010004
+#define F367CAB_STOP_ENABLE     0xf0010002
+#define F367CAB_SDAT_NOD        0xf0010001
+
+/* TOPCTRL */
+#define R367CAB_TOPCTRL 0xf002
+#define F367CAB_STDBY   0xf0020080
+#define F367CAB_STDBY_CORE      0xf0020020
+#define F367CAB_QAM_COFDM       0xf0020010
+#define F367CAB_TS_DIS  0xf0020008
+#define F367CAB_DIR_CLK_216     0xf0020004
+
+/* IOCFG0 */
+#define R367CAB_IOCFG0  0xf003
+#define F367CAB_OP0_SD  0xf0030080
+#define F367CAB_OP0_VAL 0xf0030040
+#define F367CAB_OP0_OD  0xf0030020
+#define F367CAB_OP0_INV 0xf0030010
+#define F367CAB_OP0_DACVALUE_HI 0xf003000f
+
+/* DAc0R */
+#define R367CAB_DAC0R   0xf004
+#define F367CAB_OP0_DACVALUE_LO 0xf00400ff
+
+/* IOCFG1 */
+#define R367CAB_IOCFG1  0xf005
+#define F367CAB_IP0     0xf0050040
+#define F367CAB_OP1_OD  0xf0050020
+#define F367CAB_OP1_INV 0xf0050010
+#define F367CAB_OP1_DACVALUE_HI 0xf005000f
+
+/* DAC1R */
+#define R367CAB_DAC1R   0xf006
+#define F367CAB_OP1_DACVALUE_LO 0xf00600ff
+
+/* IOCFG2 */
+#define R367CAB_IOCFG2  0xf007
+#define F367CAB_OP2_LOCK_CONF   0xf00700e0
+#define F367CAB_OP2_OD  0xf0070010
+#define F367CAB_OP2_VAL 0xf0070008
+#define F367CAB_OP1_LOCK_CONF   0xf0070007
+
+/* SDFR */
+#define R367CAB_SDFR    0xf008
+#define F367CAB_OP0_FREQ        0xf00800f0
+#define F367CAB_OP1_FREQ        0xf008000f
+
+/* AUX_CLK */
+#define R367CAB_AUX_CLK 0xf00a
+#define F367CAB_AUXFEC_CTL      0xf00a00c0
+#define F367CAB_DIS_CKX4        0xf00a0020
+#define F367CAB_CKSEL   0xf00a0018
+#define F367CAB_CKDIV_PROG      0xf00a0006
+#define F367CAB_AUXCLK_ENA      0xf00a0001
+
+/* FREESYS1 */
+#define R367CAB_FREESYS1        0xf00b
+#define F367CAB_FREESYS_1       0xf00b00ff
+
+/* FREESYS2 */
+#define R367CAB_FREESYS2        0xf00c
+#define F367CAB_FREESYS_2       0xf00c00ff
+
+/* FREESYS3 */
+#define R367CAB_FREESYS3        0xf00d
+#define F367CAB_FREESYS_3       0xf00d00ff
+
+/* GPIO_CFG */
+#define R367CAB_GPIO_CFG        0xf00e
+#define F367CAB_GPIO7_OD        0xf00e0080
+#define F367CAB_GPIO7_CFG       0xf00e0040
+#define F367CAB_GPIO6_OD        0xf00e0020
+#define F367CAB_GPIO6_CFG       0xf00e0010
+#define F367CAB_GPIO5_OD        0xf00e0008
+#define F367CAB_GPIO5_CFG       0xf00e0004
+#define F367CAB_GPIO4_OD        0xf00e0002
+#define F367CAB_GPIO4_CFG       0xf00e0001
+
+/* GPIO_CMD */
+#define R367CAB_GPIO_CMD        0xf00f
+#define F367CAB_GPIO7_VAL       0xf00f0008
+#define F367CAB_GPIO6_VAL       0xf00f0004
+#define F367CAB_GPIO5_VAL       0xf00f0002
+#define F367CAB_GPIO4_VAL       0xf00f0001
+
+/* TSTRES */
+#define R367CAB_TSTRES  0xf0c0
+#define F367CAB_FRES_DISPLAY    0xf0c00080
+#define F367CAB_FRES_FIFO_AD    0xf0c00020
+#define F367CAB_FRESRS  0xf0c00010
+#define F367CAB_FRESACS 0xf0c00008
+#define F367CAB_FRESFEC 0xf0c00004
+#define F367CAB_FRES_PRIF       0xf0c00002
+#define F367CAB_FRESCORE        0xf0c00001
+
+/* ANACTRL */
+#define R367CAB_ANACTRL 0xf0c1
+#define F367CAB_BYPASS_XTAL     0xf0c10040
+#define F367CAB_BYPASS_PLLXN    0xf0c1000c
+#define F367CAB_DIS_PAD_OSC     0xf0c10002
+#define F367CAB_STDBY_PLLXN     0xf0c10001
+
+/* TSTBUS */
+#define R367CAB_TSTBUS  0xf0c2
+#define F367CAB_TS_BYTE_CLK_INV 0xf0c20080
+#define F367CAB_CFG_IP  0xf0c20070
+#define F367CAB_CFG_TST 0xf0c2000f
+
+/* RF_AGC1 */
+#define R367CAB_RF_AGC1 0xf0d4
+#define F367CAB_RF_AGC1_LEVEL_HI        0xf0d400ff
+
+/* RF_AGC2 */
+#define R367CAB_RF_AGC2 0xf0d5
+#define F367CAB_REF_ADGP        0xf0d50080
+#define F367CAB_STDBY_ADCGP     0xf0d50020
+#define F367CAB_RF_AGC1_LEVEL_LO        0xf0d50003
+
+/* ANADIGCTRL */
+#define R367CAB_ANADIGCTRL      0xf0d7
+#define F367CAB_SEL_CLKDEM      0xf0d70020
+#define F367CAB_EN_BUFFER_Q     0xf0d70010
+#define F367CAB_EN_BUFFER_I     0xf0d70008
+#define F367CAB_ADC_RIS_EGDE    0xf0d70004
+#define F367CAB_SGN_ADC 0xf0d70002
+#define F367CAB_SEL_AD12_SYNC   0xf0d70001
+
+/* PLLMDIV */
+#define R367CAB_PLLMDIV 0xf0d8
+#define F367CAB_PLL_MDIV        0xf0d800ff
+
+/* PLLNDIV */
+#define R367CAB_PLLNDIV 0xf0d9
+#define F367CAB_PLL_NDIV        0xf0d900ff
+
+/* PLLSETUP */
+#define R367CAB_PLLSETUP        0xf0da
+#define F367CAB_PLL_PDIV        0xf0da0070
+#define F367CAB_PLL_KDIV        0xf0da000f
+
+/* DUAL_AD12 */
+#define R367CAB_DUAL_AD12       0xf0db
+#define F367CAB_FS20M   0xf0db0020
+#define F367CAB_FS50M   0xf0db0010
+#define F367CAB_INMODe0 0xf0db0008
+#define F367CAB_POFFQ   0xf0db0004
+#define F367CAB_POFFI   0xf0db0002
+#define F367CAB_INMODE1 0xf0db0001
+
+/* TSTBIST */
+#define R367CAB_TSTBIST 0xf0dc
+#define F367CAB_TST_BYP_CLK     0xf0dc0080
+#define F367CAB_TST_GCLKENA_STD 0xf0dc0040
+#define F367CAB_TST_GCLKENA     0xf0dc0020
+#define F367CAB_TST_MEMBIST     0xf0dc001f
+
+/* CTRL_1 */
+#define R367CAB_CTRL_1  0xf402
+#define F367CAB_SOFT_RST        0xf4020080
+#define F367CAB_EQU_RST 0xf4020008
+#define F367CAB_CRL_RST 0xf4020004
+#define F367CAB_TRL_RST 0xf4020002
+#define F367CAB_AGC_RST 0xf4020001
+
+/* CTRL_2 */
+#define R367CAB_CTRL_2  0xf403
+#define F367CAB_DEINT_RST       0xf4030008
+#define F367CAB_RS_RST  0xf4030004
+
+/* IT_STATUS1 */
+#define R367CAB_IT_STATUS1      0xf408
+#define F367CAB_SWEEP_OUT       0xf4080080
+#define F367CAB_FSM_CRL 0xf4080040
+#define F367CAB_CRL_LOCK        0xf4080020
+#define F367CAB_MFSM    0xf4080010
+#define F367CAB_TRL_LOCK        0xf4080008
+#define F367CAB_TRL_AGC_LIMIT   0xf4080004
+#define F367CAB_ADJ_AGC_LOCK    0xf4080002
+#define F367CAB_AGC_QAM_LOCK    0xf4080001
+
+/* IT_STATUS2 */
+#define R367CAB_IT_STATUS2      0xf409
+#define F367CAB_TSMF_CNT        0xf4090080
+#define F367CAB_TSMF_EOF        0xf4090040
+#define F367CAB_TSMF_RDY        0xf4090020
+#define F367CAB_FEC_NOCORR      0xf4090010
+#define F367CAB_SYNCSTATE       0xf4090008
+#define F367CAB_DEINT_LOCK      0xf4090004
+#define F367CAB_FADDING_FRZ     0xf4090002
+#define F367CAB_TAPMON_ALARM    0xf4090001
+
+/* IT_EN1 */
+#define R367CAB_IT_EN1  0xf40a
+#define F367CAB_SWEEP_OUTE      0xf40a0080
+#define F367CAB_FSM_CRLE        0xf40a0040
+#define F367CAB_CRL_LOCKE       0xf40a0020
+#define F367CAB_MFSME   0xf40a0010
+#define F367CAB_TRL_LOCKE       0xf40a0008
+#define F367CAB_TRL_AGC_LIMITE  0xf40a0004
+#define F367CAB_ADJ_AGC_LOCKE   0xf40a0002
+#define F367CAB_AGC_LOCKE       0xf40a0001
+
+/* IT_EN2 */
+#define R367CAB_IT_EN2  0xf40b
+#define F367CAB_TSMF_CNTE       0xf40b0080
+#define F367CAB_TSMF_EOFE       0xf40b0040
+#define F367CAB_TSMF_RDYE       0xf40b0020
+#define F367CAB_FEC_NOCORRE     0xf40b0010
+#define F367CAB_SYNCSTATEE      0xf40b0008
+#define F367CAB_DEINT_LOCKE     0xf40b0004
+#define F367CAB_FADDING_FRZE    0xf40b0002
+#define F367CAB_TAPMON_ALARME   0xf40b0001
+
+/* CTRL_STATUS */
+#define R367CAB_CTRL_STATUS     0xf40c
+#define F367CAB_QAMFEC_LOCK     0xf40c0004
+#define F367CAB_TSMF_LOCK       0xf40c0002
+#define F367CAB_TSMF_ERROR      0xf40c0001
+
+/* TEST_CTL */
+#define R367CAB_TEST_CTL        0xf40f
+#define F367CAB_TST_BLK_SEL     0xf40f0060
+#define F367CAB_TST_BUS_SEL     0xf40f001f
+
+/* AGC_CTL */
+#define R367CAB_AGC_CTL 0xf410
+#define F367CAB_AGC_LCK_TH      0xf41000f0
+#define F367CAB_AGC_ACCUMRSTSEL 0xf4100007
+
+/* AGC_IF_CFG */
+#define R367CAB_AGC_IF_CFG      0xf411
+#define F367CAB_AGC_IF_BWSEL    0xf41100f0
+#define F367CAB_AGC_IF_FREEZE   0xf4110002
+
+/* AGC_RF_CFG */
+#define R367CAB_AGC_RF_CFG      0xf412
+#define F367CAB_AGC_RF_BWSEL    0xf4120070
+#define F367CAB_AGC_RF_FREEZE   0xf4120002
+
+/* AGC_PWM_CFG */
+#define R367CAB_AGC_PWM_CFG     0xf413
+#define F367CAB_AGC_RF_PWM_TST  0xf4130080
+#define F367CAB_AGC_RF_PWM_INV  0xf4130040
+#define F367CAB_AGC_IF_PWM_TST  0xf4130008
+#define F367CAB_AGC_IF_PWM_INV  0xf4130004
+#define F367CAB_AGC_PWM_CLKDIV  0xf4130003
+
+/* AGC_PWR_REF_L */
+#define R367CAB_AGC_PWR_REF_L   0xf414
+#define F367CAB_AGC_PWRREF_LO   0xf41400ff
+
+/* AGC_PWR_REF_H */
+#define R367CAB_AGC_PWR_REF_H   0xf415
+#define F367CAB_AGC_PWRREF_HI   0xf4150003
+
+/* AGC_RF_TH_L */
+#define R367CAB_AGC_RF_TH_L     0xf416
+#define F367CAB_AGC_RF_TH_LO    0xf41600ff
+
+/* AGC_RF_TH_H */
+#define R367CAB_AGC_RF_TH_H     0xf417
+#define F367CAB_AGC_RF_TH_HI    0xf417000f
+
+/* AGC_IF_LTH_L */
+#define R367CAB_AGC_IF_LTH_L    0xf418
+#define F367CAB_AGC_IF_THLO_LO  0xf41800ff
+
+/* AGC_IF_LTH_H */
+#define R367CAB_AGC_IF_LTH_H    0xf419
+#define F367CAB_AGC_IF_THLO_HI  0xf419000f
+
+/* AGC_IF_HTH_L */
+#define R367CAB_AGC_IF_HTH_L    0xf41a
+#define F367CAB_AGC_IF_THHI_LO  0xf41a00ff
+
+/* AGC_IF_HTH_H */
+#define R367CAB_AGC_IF_HTH_H    0xf41b
+#define F367CAB_AGC_IF_THHI_HI  0xf41b000f
+
+/* AGC_PWR_RD_L */
+#define R367CAB_AGC_PWR_RD_L    0xf41c
+#define F367CAB_AGC_PWR_WORD_LO 0xf41c00ff
+
+/* AGC_PWR_RD_M */
+#define R367CAB_AGC_PWR_RD_M    0xf41d
+#define F367CAB_AGC_PWR_WORD_ME 0xf41d00ff
+
+/* AGC_PWR_RD_H */
+#define R367CAB_AGC_PWR_RD_H    0xf41e
+#define F367CAB_AGC_PWR_WORD_HI 0xf41e0003
+
+/* AGC_PWM_IFCMD_L */
+#define R367CAB_AGC_PWM_IFCMD_L 0xf420
+#define F367CAB_AGC_IF_PWMCMD_LO        0xf42000ff
+
+/* AGC_PWM_IFCMD_H */
+#define R367CAB_AGC_PWM_IFCMD_H 0xf421
+#define F367CAB_AGC_IF_PWMCMD_HI        0xf421000f
+
+/* AGC_PWM_RFCMD_L */
+#define R367CAB_AGC_PWM_RFCMD_L 0xf422
+#define F367CAB_AGC_RF_PWMCMD_LO        0xf42200ff
+
+/* AGC_PWM_RFCMD_H */
+#define R367CAB_AGC_PWM_RFCMD_H 0xf423
+#define F367CAB_AGC_RF_PWMCMD_HI        0xf423000f
+
+/* IQDEM_CFG */
+#define R367CAB_IQDEM_CFG       0xf424
+#define F367CAB_IQDEM_CLK_SEL   0xf4240004
+#define F367CAB_IQDEM_INVIQ     0xf4240002
+#define F367CAB_IQDEM_A2dTYPE   0xf4240001
+
+/* MIX_NCO_LL */
+#define R367CAB_MIX_NCO_LL      0xf425
+#define F367CAB_MIX_NCO_INC_LL  0xf42500ff
+
+/* MIX_NCO_HL */
+#define R367CAB_MIX_NCO_HL      0xf426
+#define F367CAB_MIX_NCO_INC_HL  0xf42600ff
+
+/* MIX_NCO_HH */
+#define R367CAB_MIX_NCO_HH      0xf427
+#define F367CAB_MIX_NCO_INVCNST 0xf4270080
+#define F367CAB_MIX_NCO_INC_HH  0xf427007f
+
+/* SRC_NCO_LL */
+#define R367CAB_SRC_NCO_LL      0xf428
+#define F367CAB_SRC_NCO_INC_LL  0xf42800ff
+
+/* SRC_NCO_LH */
+#define R367CAB_SRC_NCO_LH      0xf429
+#define F367CAB_SRC_NCO_INC_LH  0xf42900ff
+
+/* SRC_NCO_HL */
+#define R367CAB_SRC_NCO_HL      0xf42a
+#define F367CAB_SRC_NCO_INC_HL  0xf42a00ff
+
+/* SRC_NCO_HH */
+#define R367CAB_SRC_NCO_HH      0xf42b
+#define F367CAB_SRC_NCO_INC_HH  0xf42b007f
+
+/* IQDEM_GAIN_SRC_L */
+#define R367CAB_IQDEM_GAIN_SRC_L        0xf42c
+#define F367CAB_GAIN_SRC_LO     0xf42c00ff
+
+/* IQDEM_GAIN_SRC_H */
+#define R367CAB_IQDEM_GAIN_SRC_H        0xf42d
+#define F367CAB_GAIN_SRC_HI     0xf42d0003
+
+/* IQDEM_DCRM_CFG_LL */
+#define R367CAB_IQDEM_DCRM_CFG_LL       0xf430
+#define F367CAB_DCRM0_DCIN_L    0xf43000ff
+
+/* IQDEM_DCRM_CFG_LH */
+#define R367CAB_IQDEM_DCRM_CFG_LH       0xf431
+#define F367CAB_DCRM1_I_DCIN_L  0xf43100fc
+#define F367CAB_DCRM0_DCIN_H    0xf4310003
+
+/* IQDEM_DCRM_CFG_HL */
+#define R367CAB_IQDEM_DCRM_CFG_HL       0xf432
+#define F367CAB_DCRM1_Q_DCIN_L  0xf43200f0
+#define F367CAB_DCRM1_I_DCIN_H  0xf432000f
+
+/* IQDEM_DCRM_CFG_HH */
+#define R367CAB_IQDEM_DCRM_CFG_HH       0xf433
+#define F367CAB_DCRM1_FRZ       0xf4330080
+#define F367CAB_DCRM0_FRZ       0xf4330040
+#define F367CAB_DCRM1_Q_DCIN_H  0xf433003f
+
+/* IQDEM_ADJ_COEFf0 */
+#define R367CAB_IQDEM_ADJ_COEFF0        0xf434
+#define F367CAB_ADJIIR_COEFF10_L        0xf43400ff
+
+/* IQDEM_ADJ_COEFF1 */
+#define R367CAB_IQDEM_ADJ_COEFF1        0xf435
+#define F367CAB_ADJIIR_COEFF11_L        0xf43500fc
+#define F367CAB_ADJIIR_COEFF10_H        0xf4350003
+
+/* IQDEM_ADJ_COEFF2 */
+#define R367CAB_IQDEM_ADJ_COEFF2        0xf436
+#define F367CAB_ADJIIR_COEFF12_L        0xf43600f0
+#define F367CAB_ADJIIR_COEFF11_H        0xf436000f
+
+/* IQDEM_ADJ_COEFF3 */
+#define R367CAB_IQDEM_ADJ_COEFF3        0xf437
+#define F367CAB_ADJIIR_COEFF20_L        0xf43700c0
+#define F367CAB_ADJIIR_COEFF12_H        0xf437003f
+
+/* IQDEM_ADJ_COEFF4 */
+#define R367CAB_IQDEM_ADJ_COEFF4        0xf438
+#define F367CAB_ADJIIR_COEFF20_H        0xf43800ff
+
+/* IQDEM_ADJ_COEFF5 */
+#define R367CAB_IQDEM_ADJ_COEFF5        0xf439
+#define F367CAB_ADJIIR_COEFF21_L        0xf43900ff
+
+/* IQDEM_ADJ_COEFF6 */
+#define R367CAB_IQDEM_ADJ_COEFF6        0xf43a
+#define F367CAB_ADJIIR_COEFF22_L        0xf43a00fc
+#define F367CAB_ADJIIR_COEFF21_H        0xf43a0003
+
+/* IQDEM_ADJ_COEFF7 */
+#define R367CAB_IQDEM_ADJ_COEFF7        0xf43b
+#define F367CAB_ADJIIR_COEFF22_H        0xf43b000f
+
+/* IQDEM_ADJ_EN */
+#define R367CAB_IQDEM_ADJ_EN    0xf43c
+#define F367CAB_ALLPASSFILT_EN  0xf43c0008
+#define F367CAB_ADJ_AGC_EN      0xf43c0004
+#define F367CAB_ADJ_COEFF_FRZ   0xf43c0002
+#define F367CAB_ADJ_EN  0xf43c0001
+
+/* IQDEM_ADJ_AGC_REF */
+#define R367CAB_IQDEM_ADJ_AGC_REF       0xf43d
+#define F367CAB_ADJ_AGC_REF     0xf43d00ff
+
+/* ALLPASSFILT1 */
+#define R367CAB_ALLPASSFILT1    0xf440
+#define F367CAB_ALLPASSFILT_COEFF1_LO   0xf44000ff
+
+/* ALLPASSFILT2 */
+#define R367CAB_ALLPASSFILT2    0xf441
+#define F367CAB_ALLPASSFILT_COEFF1_ME   0xf44100ff
+
+/* ALLPASSFILT3 */
+#define R367CAB_ALLPASSFILT3    0xf442
+#define F367CAB_ALLPASSFILT_COEFF2_LO   0xf44200c0
+#define F367CAB_ALLPASSFILT_COEFF1_HI   0xf442003f
+
+/* ALLPASSFILT4 */
+#define R367CAB_ALLPASSFILT4    0xf443
+#define F367CAB_ALLPASSFILT_COEFF2_MEL  0xf44300ff
+
+/* ALLPASSFILT5 */
+#define R367CAB_ALLPASSFILT5    0xf444
+#define F367CAB_ALLPASSFILT_COEFF2_MEH  0xf44400ff
+
+/* ALLPASSFILT6 */
+#define R367CAB_ALLPASSFILT6    0xf445
+#define F367CAB_ALLPASSFILT_COEFF3_LO   0xf44500f0
+#define F367CAB_ALLPASSFILT_COEFF2_HI   0xf445000f
+
+/* ALLPASSFILT7 */
+#define R367CAB_ALLPASSFILT7    0xf446
+#define F367CAB_ALLPASSFILT_COEFF3_MEL  0xf44600ff
+
+/* ALLPASSFILT8 */
+#define R367CAB_ALLPASSFILT8    0xf447
+#define F367CAB_ALLPASSFILT_COEFF3_MEH  0xf44700ff
+
+/* ALLPASSFILT9 */
+#define R367CAB_ALLPASSFILT9    0xf448
+#define F367CAB_ALLPASSFILT_COEFF4_LO   0xf44800fc
+#define F367CAB_ALLPASSFILT_COEFF3_HI   0xf4480003
+
+/* ALLPASSFILT10 */
+#define R367CAB_ALLPASSFILT10   0xf449
+#define F367CAB_ALLPASSFILT_COEFF4_ME   0xf44900ff
+
+/* ALLPASSFILT11 */
+#define R367CAB_ALLPASSFILT11   0xf44a
+#define F367CAB_ALLPASSFILT_COEFF4_HI   0xf44a00ff
+
+/* TRL_AGC_CFG */
+#define R367CAB_TRL_AGC_CFG     0xf450
+#define F367CAB_TRL_AGC_FREEZE  0xf4500080
+#define F367CAB_TRL_AGC_REF     0xf450007f
+
+/* TRL_LPF_CFG */
+#define R367CAB_TRL_LPF_CFG     0xf454
+#define F367CAB_NYQPOINT_INV    0xf4540040
+#define F367CAB_TRL_SHIFT       0xf4540030
+#define F367CAB_NYQ_COEFF_SEL   0xf454000c
+#define F367CAB_TRL_LPF_FREEZE  0xf4540002
+#define F367CAB_TRL_LPF_CRT     0xf4540001
+
+/* TRL_LPF_ACQ_GAIN */
+#define R367CAB_TRL_LPF_ACQ_GAIN        0xf455
+#define F367CAB_TRL_GDIR_ACQ    0xf4550070
+#define F367CAB_TRL_GINT_ACQ    0xf4550007
+
+/* TRL_LPF_TRK_GAIN */
+#define R367CAB_TRL_LPF_TRK_GAIN        0xf456
+#define F367CAB_TRL_GDIR_TRK    0xf4560070
+#define F367CAB_TRL_GINT_TRK    0xf4560007
+
+/* TRL_LPF_OUT_GAIN */
+#define R367CAB_TRL_LPF_OUT_GAIN        0xf457
+#define F367CAB_TRL_GAIN_OUT    0xf4570007
+
+/* TRL_LOCKDET_LTH */
+#define R367CAB_TRL_LOCKDET_LTH 0xf458
+#define F367CAB_TRL_LCK_THLO    0xf4580007
+
+/* TRL_LOCKDET_HTH */
+#define R367CAB_TRL_LOCKDET_HTH 0xf459
+#define F367CAB_TRL_LCK_THHI    0xf45900ff
+
+/* TRL_LOCKDET_TRGVAL */
+#define R367CAB_TRL_LOCKDET_TRGVAL      0xf45a
+#define F367CAB_TRL_LCK_TRG     0xf45a00ff
+
+/* IQ_QAM */
+#define R367CAB_IQ_QAM  0xf45c
+#define F367CAB_IQ_INPUT        0xf45c0008
+#define F367CAB_DETECT_MODE     0xf45c0007
+
+/* FSM_STATE */
+#define R367CAB_FSM_STATE       0xf460
+#define F367CAB_CRL_DFE 0xf4600080
+#define F367CAB_DFE_START       0xf4600040
+#define F367CAB_CTRLG_START     0xf4600030
+#define F367CAB_FSM_FORCESTATE  0xf460000f
+
+/* FSM_CTL */
+#define R367CAB_FSM_CTL 0xf461
+#define F367CAB_FEC2_EN 0xf4610040
+#define F367CAB_SIT_EN  0xf4610020
+#define F367CAB_TRL_AHEAD       0xf4610010
+#define F367CAB_TRL2_EN 0xf4610008
+#define F367CAB_FSM_EQA1_EN     0xf4610004
+#define F367CAB_FSM_BKP_DIS     0xf4610002
+#define F367CAB_FSM_FORCE_EN    0xf4610001
+
+/* FSM_STS */
+#define R367CAB_FSM_STS 0xf462
+#define F367CAB_FSM_STATUS      0xf462000f
+
+/* FSM_SNR0_HTH */
+#define R367CAB_FSM_SNR0_HTH    0xf463
+#define F367CAB_SNR0_HTH        0xf46300ff
+
+/* FSM_SNR1_HTH */
+#define R367CAB_FSM_SNR1_HTH    0xf464
+#define F367CAB_SNR1_HTH        0xf46400ff
+
+/* FSM_SNR2_HTH */
+#define R367CAB_FSM_SNR2_HTH    0xf465
+#define F367CAB_SNR2_HTH        0xf46500ff
+
+/* FSM_SNR0_LTH */
+#define R367CAB_FSM_SNR0_LTH    0xf466
+#define F367CAB_SNR0_LTH        0xf46600ff
+
+/* FSM_SNR1_LTH */
+#define R367CAB_FSM_SNR1_LTH    0xf467
+#define F367CAB_SNR1_LTH        0xf46700ff
+
+/* FSM_EQA1_HTH */
+#define R367CAB_FSM_EQA1_HTH    0xf468
+#define F367CAB_SNR3_HTH_LO     0xf46800f0
+#define F367CAB_EQA1_HTH        0xf468000f
+
+/* FSM_TEMPO */
+#define R367CAB_FSM_TEMPO       0xf469
+#define F367CAB_SIT     0xf46900c0
+#define F367CAB_WST     0xf4690038
+#define F367CAB_ELT     0xf4690006
+#define F367CAB_SNR3_HTH_HI     0xf4690001
+
+/* FSM_CONFIG */
+#define R367CAB_FSM_CONFIG      0xf46a
+#define F367CAB_FEC2_DFEOFF     0xf46a0004
+#define F367CAB_PRIT_STATE      0xf46a0002
+#define F367CAB_MODMAP_STATE    0xf46a0001
+
+/* EQU_I_TESTTAP_L */
+#define R367CAB_EQU_I_TESTTAP_L 0xf474
+#define F367CAB_I_TEST_TAP_L    0xf47400ff
+
+/* EQU_I_TESTTAP_M */
+#define R367CAB_EQU_I_TESTTAP_M 0xf475
+#define F367CAB_I_TEST_TAP_M    0xf47500ff
+
+/* EQU_I_TESTTAP_H */
+#define R367CAB_EQU_I_TESTTAP_H 0xf476
+#define F367CAB_I_TEST_TAP_H    0xf476001f
+
+/* EQU_TESTAP_CFG */
+#define R367CAB_EQU_TESTAP_CFG  0xf477
+#define F367CAB_TEST_FFE_DFE_SEL        0xf4770040
+#define F367CAB_TEST_TAP_SELECT 0xf477003f
+
+/* EQU_Q_TESTTAP_L */
+#define R367CAB_EQU_Q_TESTTAP_L 0xf478
+#define F367CAB_Q_TEST_TAP_L    0xf47800ff
+
+/* EQU_Q_TESTTAP_M */
+#define R367CAB_EQU_Q_TESTTAP_M 0xf479
+#define F367CAB_Q_TEST_TAP_M    0xf47900ff
+
+/* EQU_Q_TESTTAP_H */
+#define R367CAB_EQU_Q_TESTTAP_H 0xf47a
+#define F367CAB_Q_TEST_TAP_H    0xf47a001f
+
+/* EQU_TAP_CTRL */
+#define R367CAB_EQU_TAP_CTRL    0xf47b
+#define F367CAB_MTAP_FRZ        0xf47b0010
+#define F367CAB_PRE_FREEZE      0xf47b0008
+#define F367CAB_DFE_TAPMON_EN   0xf47b0004
+#define F367CAB_FFE_TAPMON_EN   0xf47b0002
+#define F367CAB_MTAP_ONLY       0xf47b0001
+
+/* EQU_CTR_CRL_CONTROL_L */
+#define R367CAB_EQU_CTR_CRL_CONTROL_L   0xf47c
+#define F367CAB_EQU_CTR_CRL_CONTROL_LO  0xf47c00ff
+
+/* EQU_CTR_CRL_CONTROL_H */
+#define R367CAB_EQU_CTR_CRL_CONTROL_H   0xf47d
+#define F367CAB_EQU_CTR_CRL_CONTROL_HI  0xf47d00ff
+
+/* EQU_CTR_HIPOW_L */
+#define R367CAB_EQU_CTR_HIPOW_L 0xf47e
+#define F367CAB_CTR_HIPOW_L     0xf47e00ff
+
+/* EQU_CTR_HIPOW_H */
+#define R367CAB_EQU_CTR_HIPOW_H 0xf47f
+#define F367CAB_CTR_HIPOW_H     0xf47f00ff
+
+/* EQU_I_EQU_LO */
+#define R367CAB_EQU_I_EQU_LO    0xf480
+#define F367CAB_EQU_I_EQU_L     0xf48000ff
+
+/* EQU_I_EQU_HI */
+#define R367CAB_EQU_I_EQU_HI    0xf481
+#define F367CAB_EQU_I_EQU_H     0xf4810003
+
+/* EQU_Q_EQU_LO */
+#define R367CAB_EQU_Q_EQU_LO    0xf482
+#define F367CAB_EQU_Q_EQU_L     0xf48200ff
+
+/* EQU_Q_EQU_HI */
+#define R367CAB_EQU_Q_EQU_HI    0xf483
+#define F367CAB_EQU_Q_EQU_H     0xf4830003
+
+/* EQU_MAPPER */
+#define R367CAB_EQU_MAPPER      0xf484
+#define F367CAB_QUAD_AUTO       0xf4840080
+#define F367CAB_QUAD_INV        0xf4840040
+#define F367CAB_QAM_MODE        0xf4840007
+
+/* EQU_SWEEP_RATE */
+#define R367CAB_EQU_SWEEP_RATE  0xf485
+#define F367CAB_SNR_PER 0xf48500c0
+#define F367CAB_SWEEP_RATE      0xf485003f
+
+/* EQU_SNR_LO */
+#define R367CAB_EQU_SNR_LO      0xf486
+#define F367CAB_SNR_LO  0xf48600ff
+
+/* EQU_SNR_HI */
+#define R367CAB_EQU_SNR_HI      0xf487
+#define F367CAB_SNR_HI  0xf48700ff
+
+/* EQU_GAMMA_LO */
+#define R367CAB_EQU_GAMMA_LO    0xf488
+#define F367CAB_GAMMA_LO        0xf48800ff
+
+/* EQU_GAMMA_HI */
+#define R367CAB_EQU_GAMMA_HI    0xf489
+#define F367CAB_GAMMA_ME        0xf48900ff
+
+/* EQU_ERR_GAIN */
+#define R367CAB_EQU_ERR_GAIN    0xf48a
+#define F367CAB_EQA1MU  0xf48a0070
+#define F367CAB_CRL2MU  0xf48a000e
+#define F367CAB_GAMMA_HI        0xf48a0001
+
+/* EQU_RADIUS */
+#define R367CAB_EQU_RADIUS      0xf48b
+#define F367CAB_RADIUS  0xf48b00ff
+
+/* EQU_FFE_MAINTAP */
+#define R367CAB_EQU_FFE_MAINTAP 0xf48c
+#define F367CAB_FFE_MAINTAP_INIT        0xf48c00ff
+
+/* EQU_FFE_LEAKAGE */
+#define R367CAB_EQU_FFE_LEAKAGE 0xf48e
+#define F367CAB_LEAK_PER        0xf48e00f0
+#define F367CAB_EQU_OUTSEL      0xf48e0002
+#define F367CAB_PNT2dFE 0xf48e0001
+
+/* EQU_FFE_MAINTAP_POS */
+#define R367CAB_EQU_FFE_MAINTAP_POS     0xf48f
+#define F367CAB_FFE_LEAK_EN     0xf48f0080
+#define F367CAB_DFE_LEAK_EN     0xf48f0040
+#define F367CAB_FFE_MAINTAP_POS 0xf48f003f
+
+/* EQU_GAIN_WIDE */
+#define R367CAB_EQU_GAIN_WIDE   0xf490
+#define F367CAB_DFE_GAIN_WIDE   0xf49000f0
+#define F367CAB_FFE_GAIN_WIDE   0xf490000f
+
+/* EQU_GAIN_NARROW */
+#define R367CAB_EQU_GAIN_NARROW 0xf491
+#define F367CAB_DFE_GAIN_NARROW 0xf49100f0
+#define F367CAB_FFE_GAIN_NARROW 0xf491000f
+
+/* EQU_CTR_LPF_GAIN */
+#define R367CAB_EQU_CTR_LPF_GAIN        0xf492
+#define F367CAB_CTR_GTO 0xf4920080
+#define F367CAB_CTR_GDIR        0xf4920070
+#define F367CAB_SWEEP_EN        0xf4920008
+#define F367CAB_CTR_GINT        0xf4920007
+
+/* EQU_CRL_LPF_GAIN */
+#define R367CAB_EQU_CRL_LPF_GAIN        0xf493
+#define F367CAB_CRL_GTO 0xf4930080
+#define F367CAB_CRL_GDIR        0xf4930070
+#define F367CAB_SWEEP_DIR       0xf4930008
+#define F367CAB_CRL_GINT        0xf4930007
+
+/* EQU_GLOBAL_GAIN */
+#define R367CAB_EQU_GLOBAL_GAIN 0xf494
+#define F367CAB_CRL_GAIN        0xf49400f8
+#define F367CAB_CTR_INC_GAIN    0xf4940004
+#define F367CAB_CTR_FRAC        0xf4940003
+
+/* EQU_CRL_LD_SEN */
+#define R367CAB_EQU_CRL_LD_SEN  0xf495
+#define F367CAB_CTR_BADPOINT_EN 0xf4950080
+#define F367CAB_CTR_GAIN        0xf4950070
+#define F367CAB_LIMANEN 0xf4950008
+#define F367CAB_CRL_LD_SEN      0xf4950007
+
+/* EQU_CRL_LD_VAL */
+#define R367CAB_EQU_CRL_LD_VAL  0xf496
+#define F367CAB_CRL_BISTH_LIMIT 0xf4960080
+#define F367CAB_CARE_EN 0xf4960040
+#define F367CAB_CRL_LD_PER      0xf4960030
+#define F367CAB_CRL_LD_WST      0xf496000c
+#define F367CAB_CRL_LD_TFS      0xf4960003
+
+/* EQU_CRL_TFR */
+#define R367CAB_EQU_CRL_TFR     0xf497
+#define F367CAB_CRL_LD_TFR      0xf49700ff
+
+/* EQU_CRL_BISTH_LO */
+#define R367CAB_EQU_CRL_BISTH_LO        0xf498
+#define F367CAB_CRL_BISTH_LO    0xf49800ff
+
+/* EQU_CRL_BISTH_HI */
+#define R367CAB_EQU_CRL_BISTH_HI        0xf499
+#define F367CAB_CRL_BISTH_HI    0xf49900ff
+
+/* EQU_SWEEP_RANGE_LO */
+#define R367CAB_EQU_SWEEP_RANGE_LO      0xf49a
+#define F367CAB_SWEEP_RANGE_LO  0xf49a00ff
+
+/* EQU_SWEEP_RANGE_HI */
+#define R367CAB_EQU_SWEEP_RANGE_HI      0xf49b
+#define F367CAB_SWEEP_RANGE_HI  0xf49b00ff
+
+/* EQU_CRL_LIMITER */
+#define R367CAB_EQU_CRL_LIMITER 0xf49c
+#define F367CAB_BISECTOR_EN     0xf49c0080
+#define F367CAB_PHEST128_EN     0xf49c0040
+#define F367CAB_CRL_LIM 0xf49c003f
+
+/* EQU_MODULUS_MAP */
+#define R367CAB_EQU_MODULUS_MAP 0xf49d
+#define F367CAB_PNT_DEPTH       0xf49d00e0
+#define F367CAB_MODULUS_CMP     0xf49d001f
+
+/* EQU_PNT_GAIN */
+#define R367CAB_EQU_PNT_GAIN    0xf49e
+#define F367CAB_PNT_EN  0xf49e0080
+#define F367CAB_MODULUSMAP_EN   0xf49e0040
+#define F367CAB_PNT_GAIN        0xf49e003f
+
+/* FEC_AC_CTR_0 */
+#define R367CAB_FEC_AC_CTR_0    0xf4a8
+#define F367CAB_BE_BYPASS       0xf4a80020
+#define F367CAB_REFRESH47       0xf4a80010
+#define F367CAB_CT_NBST 0xf4a80008
+#define F367CAB_TEI_ENA 0xf4a80004
+#define F367CAB_DS_ENA  0xf4a80002
+#define F367CAB_TSMF_EN 0xf4a80001
+
+/* FEC_AC_CTR_1 */
+#define R367CAB_FEC_AC_CTR_1    0xf4a9
+#define F367CAB_DEINT_DEPTH     0xf4a900ff
+
+/* FEC_AC_CTR_2 */
+#define R367CAB_FEC_AC_CTR_2    0xf4aa
+#define F367CAB_DEINT_M 0xf4aa00f8
+#define F367CAB_DIS_UNLOCK      0xf4aa0004
+#define F367CAB_DESCR_MODE      0xf4aa0003
+
+/* FEC_AC_CTR_3 */
+#define R367CAB_FEC_AC_CTR_3    0xf4ab
+#define F367CAB_DI_UNLOCK       0xf4ab0080
+#define F367CAB_DI_FREEZE       0xf4ab0040
+#define F367CAB_MISMATCH        0xf4ab0030
+#define F367CAB_ACQ_MODE        0xf4ab000c
+#define F367CAB_TRK_MODE        0xf4ab0003
+
+/* FEC_STATUS */
+#define R367CAB_FEC_STATUS      0xf4ac
+#define F367CAB_DEINT_SMCNTR    0xf4ac00e0
+#define F367CAB_DEINT_SYNCSTATE 0xf4ac0018
+#define F367CAB_DEINT_SYNLOST   0xf4ac0004
+#define F367CAB_DESCR_SYNCSTATE 0xf4ac0002
+
+/* RS_COUNTER_0 */
+#define R367CAB_RS_COUNTER_0    0xf4ae
+#define F367CAB_BK_CT_L 0xf4ae00ff
+
+/* RS_COUNTER_1 */
+#define R367CAB_RS_COUNTER_1    0xf4af
+#define F367CAB_BK_CT_H 0xf4af00ff
+
+/* RS_COUNTER_2 */
+#define R367CAB_RS_COUNTER_2    0xf4b0
+#define F367CAB_CORR_CT_L       0xf4b000ff
+
+/* RS_COUNTER_3 */
+#define R367CAB_RS_COUNTER_3    0xf4b1
+#define F367CAB_CORR_CT_H       0xf4b100ff
+
+/* RS_COUNTER_4 */
+#define R367CAB_RS_COUNTER_4    0xf4b2
+#define F367CAB_UNCORR_CT_L     0xf4b200ff
+
+/* RS_COUNTER_5 */
+#define R367CAB_RS_COUNTER_5    0xf4b3
+#define F367CAB_UNCORR_CT_H     0xf4b300ff
+
+/* BERT_0 */
+#define R367CAB_BERT_0  0xf4b4
+#define F367CAB_RS_NOCORR       0xf4b40004
+#define F367CAB_CT_HOLD 0xf4b40002
+#define F367CAB_CT_CLEAR        0xf4b40001
+
+/* BERT_1 */
+#define R367CAB_BERT_1  0xf4b5
+#define F367CAB_BERT_ON 0xf4b50020
+#define F367CAB_BERT_ERR_SRC    0xf4b50010
+#define F367CAB_BERT_ERR_MODE   0xf4b50008
+#define F367CAB_BERT_NBYTE      0xf4b50007
+
+/* BERT_2 */
+#define R367CAB_BERT_2  0xf4b6
+#define F367CAB_BERT_ERRCOUNT_L 0xf4b600ff
+
+/* BERT_3 */
+#define R367CAB_BERT_3  0xf4b7
+#define F367CAB_BERT_ERRCOUNT_H 0xf4b700ff
+
+/* OUTFORMAT_0 */
+#define R367CAB_OUTFORMAT_0     0xf4b8
+#define F367CAB_CLK_POLARITY    0xf4b80080
+#define F367CAB_FEC_TYPE        0xf4b80040
+#define F367CAB_SYNC_STRIP      0xf4b80008
+#define F367CAB_TS_SWAP 0xf4b80004
+#define F367CAB_OUTFORMAT       0xf4b80003
+
+/* OUTFORMAT_1 */
+#define R367CAB_OUTFORMAT_1     0xf4b9
+#define F367CAB_CI_DIVRANGE     0xf4b900ff
+
+/* SMOOTHER_2 */
+#define R367CAB_SMOOTHER_2      0xf4be
+#define F367CAB_FIFO_BYPASS     0xf4be0020
+
+/* TSMF_CTRL_0 */
+#define R367CAB_TSMF_CTRL_0     0xf4c0
+#define F367CAB_TS_NUMBER       0xf4c0001e
+#define F367CAB_SEL_MODE        0xf4c00001
+
+/* TSMF_CTRL_1 */
+#define R367CAB_TSMF_CTRL_1     0xf4c1
+#define F367CAB_CHECK_ERROR_BIT 0xf4c10080
+#define F367CAB_CHCK_F_SYNC     0xf4c10040
+#define F367CAB_H_MODE  0xf4c10008
+#define F367CAB_D_V_MODE        0xf4c10004
+#define F367CAB_MODE    0xf4c10003
+
+/* TSMF_CTRL_3 */
+#define R367CAB_TSMF_CTRL_3     0xf4c3
+#define F367CAB_SYNC_IN_COUNT   0xf4c300f0
+#define F367CAB_SYNC_OUT_COUNT  0xf4c3000f
+
+/* TS_ON_ID_0 */
+#define R367CAB_TS_ON_ID_0      0xf4c4
+#define F367CAB_TS_ID_L 0xf4c400ff
+
+/* TS_ON_ID_1 */
+#define R367CAB_TS_ON_ID_1      0xf4c5
+#define F367CAB_TS_ID_H 0xf4c500ff
+
+/* TS_ON_ID_2 */
+#define R367CAB_TS_ON_ID_2      0xf4c6
+#define F367CAB_ON_ID_L 0xf4c600ff
+
+/* TS_ON_ID_3 */
+#define R367CAB_TS_ON_ID_3      0xf4c7
+#define F367CAB_ON_ID_H 0xf4c700ff
+
+/* RE_STATUS_0 */
+#define R367CAB_RE_STATUS_0     0xf4c8
+#define F367CAB_RECEIVE_STATUS_L        0xf4c800ff
+
+/* RE_STATUS_1 */
+#define R367CAB_RE_STATUS_1     0xf4c9
+#define F367CAB_RECEIVE_STATUS_LH       0xf4c900ff
+
+/* RE_STATUS_2 */
+#define R367CAB_RE_STATUS_2     0xf4ca
+#define F367CAB_RECEIVE_STATUS_HL       0xf4ca00ff
+
+/* RE_STATUS_3 */
+#define R367CAB_RE_STATUS_3     0xf4cb
+#define F367CAB_RECEIVE_STATUS_HH       0xf4cb003f
+
+/* TS_STATUS_0 */
+#define R367CAB_TS_STATUS_0     0xf4cc
+#define F367CAB_TS_STATUS_L     0xf4cc00ff
+
+/* TS_STATUS_1 */
+#define R367CAB_TS_STATUS_1     0xf4cd
+#define F367CAB_TS_STATUS_H     0xf4cd007f
+
+/* TS_STATUS_2 */
+#define R367CAB_TS_STATUS_2     0xf4ce
+#define F367CAB_ERROR   0xf4ce0080
+#define F367CAB_EMERGENCY       0xf4ce0040
+#define F367CAB_CRE_TS  0xf4ce0030
+#define F367CAB_VER     0xf4ce000e
+#define F367CAB_M_LOCK  0xf4ce0001
+
+/* TS_STATUS_3 */
+#define R367CAB_TS_STATUS_3     0xf4cf
+#define F367CAB_UPDATE_READY    0xf4cf0080
+#define F367CAB_END_FRAME_HEADER        0xf4cf0040
+#define F367CAB_CONTCNT 0xf4cf0020
+#define F367CAB_TS_IDENTIFIER_SEL       0xf4cf000f
+
+/* T_O_ID_0 */
+#define R367CAB_T_O_ID_0        0xf4d0
+#define F367CAB_ON_ID_I_L       0xf4d000ff
+
+/* T_O_ID_1 */
+#define R367CAB_T_O_ID_1        0xf4d1
+#define F367CAB_ON_ID_I_H       0xf4d100ff
+
+/* T_O_ID_2 */
+#define R367CAB_T_O_ID_2        0xf4d2
+#define F367CAB_TS_ID_I_L       0xf4d200ff
+
+/* T_O_ID_3 */
+#define R367CAB_T_O_ID_3        0xf4d3
+#define F367CAB_TS_ID_I_H       0xf4d300ff
+
+#define STV0367CAB_NBREGS       187
+
+#endif
diff --git a/drivers/media/dvb/frontends/stv0900.h b/drivers/media/dvb/frontends/stv0900.h
index e3e35d1ce838..91c7ee8b2313 100644
--- a/drivers/media/dvb/frontends/stv0900.h
+++ b/drivers/media/dvb/frontends/stv0900.h
@@ -53,6 +53,8 @@ struct stv0900_config {
         u8 tun2_type;
         /* Set device param to start dma */
         int (*set_ts_params)(struct dvb_frontend *fe, int is_punctured);
+        /* Hook for Lock LED */
+        void (*set_lock_led)(struct dvb_frontend *fe, int offon);
 };
 
 #if defined(CONFIG_DVB_STV0900) || (defined(CONFIG_DVB_STV0900_MODULE) \
diff --git a/drivers/media/dvb/frontends/stv0900_core.c b/drivers/media/dvb/frontends/stv0900_core.c
index 4f5e7d3a0e61..0ca316d6fffa 100644
--- a/drivers/media/dvb/frontends/stv0900_core.c
+++ b/drivers/media/dvb/frontends/stv0900_core.c
@@ -1604,6 +1604,9 @@ static enum dvbfe_search stv0900_search(struct dvb_frontend *fe,
         p_search.standard = STV0900_AUTO_SEARCH;
         p_search.iq_inversion = STV0900_IQ_AUTO;
         p_search.search_algo = STV0900_BLIND_SEARCH;
+        /* Speeds up DVB-S searching */
+        if (c->delivery_system == SYS_DVBS)
+                p_search.standard = STV0900_SEARCH_DVBS1;
 
         intp->srch_standard[demod] = p_search.standard;
         intp->symbol_rate[demod] = p_search.symbol_rate;
@@ -1660,8 +1663,14 @@ static int stv0900_read_status(struct dvb_frontend *fe, enum fe_status *status)
                         | FE_HAS_VITERBI
                         | FE_HAS_SYNC
                         | FE_HAS_LOCK;
-        } else
+                if (state->config->set_lock_led)
+                        state->config->set_lock_led(fe, 1);
+        } else {
+                *status = 0;
+                if (state->config->set_lock_led)
+                        state->config->set_lock_led(fe, 0);
                 dprintk("DEMOD LOCK FAIL\n");
+        }
 
         return 0;
 }
@@ -1831,6 +1840,9 @@ static void stv0900_release(struct dvb_frontend *fe)
 
         dprintk("%s\n", __func__);
 
+        if (state->config->set_lock_led)
+                state->config->set_lock_led(fe, 0);
+
         if ((--(state->internal->dmds_used)) <= 0) {
 
                 dprintk("%s: Actually removing\n", __func__);
@@ -1842,6 +1854,18 @@ static void stv0900_release(struct dvb_frontend *fe)
         kfree(state);
 }
 
+static int stv0900_sleep(struct dvb_frontend *fe)
+{
+        struct stv0900_state *state = fe->demodulator_priv;
+
+        dprintk("%s\n", __func__);
+
+        if (state->config->set_lock_led)
+                state->config->set_lock_led(fe, 0);
+
+        return 0;
+}
+
 static int stv0900_get_frontend(struct dvb_frontend *fe,
                                 struct dvb_frontend_parameters *p)
 {
@@ -1876,6 +1900,7 @@ static struct dvb_frontend_ops stv0900_ops = {
         .release                        = stv0900_release,
         .init                           = stv0900_init,
         .get_frontend                   = stv0900_get_frontend,
+        .sleep                          = stv0900_sleep,
         .get_frontend_algo              = stv0900_frontend_algo,
         .i2c_gate_ctrl                  = stv0900_i2c_gate_ctrl,
         .diseqc_send_master_cmd         = stv0900_send_master_cmd,
diff --git a/drivers/media/dvb/frontends/stv0900_priv.h b/drivers/media/dvb/frontends/stv0900_priv.h
index b62b0f0a4fef..e0ea74c8e093 100644
--- a/drivers/media/dvb/frontends/stv0900_priv.h
+++ b/drivers/media/dvb/frontends/stv0900_priv.h
@@ -238,7 +238,7 @@ enum fe_stv0900_demod_mode {
 };
 
 struct stv0900_init_params{
-        u32     dmd_ref_clk;/* Refrence,Input clock for the demod in Hz */
+        u32     dmd_ref_clk;/* Reference,Input clock for the demod in Hz */
 
         /* Demodulator Type (single demod or dual demod) */
         enum fe_stv0900_demod_mode      demod_mode;
diff --git a/drivers/media/dvb/frontends/stv090x.c b/drivers/media/dvb/frontends/stv090x.c
index 425e7a43ae19..52d8712411e5 100644
--- a/drivers/media/dvb/frontends/stv090x.c
+++ b/drivers/media/dvb/frontends/stv090x.c
@@ -767,8 +767,12 @@ static int stv090x_i2c_gate_ctrl(struct stv090x_state *state, int enable)
          * In case of any error, the lock is unlocked and exit within the
          * relevant operations themselves.
          */
-        if (enable)
-                mutex_lock(&state->internal->tuner_lock);
+        if (enable) {
+                if (state->config->tuner_i2c_lock)
+                        state->config->tuner_i2c_lock(&state->frontend, 1);
+                else
+                        mutex_lock(&state->internal->tuner_lock);
+        }
 
         reg = STV090x_READ_DEMOD(state, I2CRPT);
         if (enable) {
@@ -784,13 +788,20 @@ static int stv090x_i2c_gate_ctrl(struct stv090x_state *state, int enable)
                         goto err;
         }
 
-        if (!enable)
-                mutex_unlock(&state->internal->tuner_lock);
+        if (!enable) {
+                if (state->config->tuner_i2c_lock)
+                        state->config->tuner_i2c_lock(&state->frontend, 0);
+                else
+                        mutex_unlock(&state->internal->tuner_lock);
+        }
 
         return 0;
 err:
         dprintk(FE_ERROR, 1, "I/O error");
-        mutex_unlock(&state->internal->tuner_lock);
+        if (state->config->tuner_i2c_lock)
+                state->config->tuner_i2c_lock(&state->frontend, 0);
+        else
+                mutex_unlock(&state->internal->tuner_lock);
         return -1;
 }
 
@@ -1413,7 +1424,7 @@ static int stv090x_start_search(struct stv090x_state *state)
                         if (STV090x_WRITE_DEMOD(state, CFRLOW0, 0x00) < 0)
                                 goto err;
 
-                        /*enlarge the timing bandwith for Low SR*/
+                        /*enlarge the timing bandwidth for Low SR*/
                         if (STV090x_WRITE_DEMOD(state, RTCS2, 0x68) < 0)
                                 goto err;
                 } else {
@@ -1421,17 +1432,17 @@ static int stv090x_start_search(struct stv090x_state *state)
                         Set The carrier search up and low to auto mode */
                         if (STV090x_WRITE_DEMOD(state, CARCFG, 0xc4) < 0)
                                 goto err;
-                        /*reduce the timing bandwith for high SR*/
+                        /*reduce the timing bandwidth for high SR*/
                         if (STV090x_WRITE_DEMOD(state, RTCS2, 0x44) < 0)
                                 goto err;
                 }
         } else {
                 /* >= Cut 3 */
                 if (state->srate <= 5000000) {
-                        /* enlarge the timing bandwith for Low SR */
+                        /* enlarge the timing bandwidth for Low SR */
                         STV090x_WRITE_DEMOD(state, RTCS2, 0x68);
                 } else {
-                        /* reduce timing bandwith for high SR */
+                        /* reduce timing bandwidth for high SR */
                         STV090x_WRITE_DEMOD(state, RTCS2, 0x44);
                 }
 
@@ -1483,8 +1494,8 @@ static int stv090x_start_search(struct stv090x_state *state)
                 if (STV090x_WRITE_DEMOD(state, FFECFG, 0x41) < 0)
                         goto err;
 
-                if ((state->search_mode == STV090x_DVBS1)       ||
-                        (state->search_mode == STV090x_DSS)     ||
+                if ((state->search_mode == STV090x_SEARCH_DVBS1)        ||
+                        (state->search_mode == STV090x_SEARCH_DSS)      ||
                         (state->search_mode == STV090x_SEARCH_AUTO)) {
 
                         if (STV090x_WRITE_DEMOD(state, VITSCALE, 0x82) < 0)
@@ -2471,7 +2482,7 @@ static int stv090x_sw_algo(struct stv090x_state *state)
                                         dvbs2_fly_wheel = STV090x_GETFIELD_Px(reg, FLYWHEEL_CPT_FIELD);
                                 }
                                 if (dvbs2_fly_wheel < 0xd) {
-                                        /*FALSE lock, The demod is loosing lock */
+                                        /*FALSE lock, The demod is losing lock */
                                         lock = 0;
                                         if (trials < 2) {
                                                 if (state->internal->dev_ver >= 0x20) {
@@ -2883,10 +2894,12 @@ static int stv090x_optimize_track(struct stv090x_state *state)
                 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
                         goto err;
-                if (STV090x_WRITE_DEMOD(state, ACLC, 0) < 0)
-                        goto err;
-                if (STV090x_WRITE_DEMOD(state, BCLC, 0) < 0)
-                        goto err;
+                if (state->internal->dev_ver >= 0x30) {
+                        if (STV090x_WRITE_DEMOD(state, ACLC, 0) < 0)
+                                goto err;
+                        if (STV090x_WRITE_DEMOD(state, BCLC, 0) < 0)
+                                goto err;
+                }
                 if (state->frame_len == STV090x_LONG_FRAME) {
                         reg = STV090x_READ_DEMOD(state, DMDMODCOD);
                         modcod = STV090x_GETFIELD_Px(reg, DEMOD_MODCOD_FIELD);
@@ -2940,7 +2953,7 @@ static int stv090x_optimize_track(struct stv090x_state *state)
                 STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x67); /* PER */
                 break;
 
-        case STV090x_UNKNOWN:
+        case STV090x_ERROR:
         default:
                 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
                 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
@@ -3189,7 +3202,7 @@ static enum stv090x_signal_state stv090x_algo(struct stv090x_state *state)
                         goto err;
                 if (STV090x_WRITE_DEMOD(state, CORRELMANT, 0x70) < 0)
                         goto err;
-                if (stv090x_set_srate(state, 1000000) < 0) /* inital srate = 1Msps */
+                if (stv090x_set_srate(state, 1000000) < 0) /* initial srate = 1Msps */
                         goto err;
         } else {
                 /* known srate */
@@ -3846,6 +3859,7 @@ static int stv090x_sleep(struct dvb_frontend *fe)
 {
         struct stv090x_state *state = fe->demodulator_priv;
         u32 reg;
+        u8 full_standby = 0;
 
         if (stv090x_i2c_gate_ctrl(state, 1) < 0)
                 goto err;
@@ -3858,24 +3872,119 @@ static int stv090x_sleep(struct dvb_frontend *fe)
         if (stv090x_i2c_gate_ctrl(state, 0) < 0)
                 goto err;
 
-        dprintk(FE_DEBUG, 1, "Set %s to sleep",
-                state->device == STV0900 ? "STV0900" : "STV0903");
+        dprintk(FE_DEBUG, 1, "Set %s(%d) to sleep",
+                state->device == STV0900 ? "STV0900" : "STV0903",
+                state->demod);
 
-        reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
-        STV090x_SETFIELD(reg, STANDBY_FIELD, 0x01);
-        if (stv090x_write_reg(state, STV090x_SYNTCTRL, reg) < 0)
-                goto err;
+        mutex_lock(&state->internal->demod_lock);
 
-        reg = stv090x_read_reg(state, STV090x_TSTTNR1);
-        STV090x_SETFIELD(reg, ADC1_PON_FIELD, 0);
-        if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0)
-                goto err;
+        switch (state->demod) {
+        case STV090x_DEMODULATOR_0:
+                /* power off ADC 1 */
+                reg = stv090x_read_reg(state, STV090x_TSTTNR1);
+                STV090x_SETFIELD(reg, ADC1_PON_FIELD, 0);
+                if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0)
+                        goto err;
+                /* power off DiSEqC 1 */
+                reg = stv090x_read_reg(state, STV090x_TSTTNR2);
+                STV090x_SETFIELD(reg, DISEQC1_PON_FIELD, 0);
+                if (stv090x_write_reg(state, STV090x_TSTTNR2, reg) < 0)
+                        goto err;
+
+                /* check whether path 2 is already sleeping, that is when
+                   ADC2 is off */
+                reg = stv090x_read_reg(state, STV090x_TSTTNR3);
+                if (STV090x_GETFIELD(reg, ADC2_PON_FIELD) == 0)
+                        full_standby = 1;
+
+                /* stop clocks */
+                reg = stv090x_read_reg(state, STV090x_STOPCLK1);
+                /* packet delineator 1 clock */
+                STV090x_SETFIELD(reg, STOP_CLKPKDT1_FIELD, 1);
+                /* ADC 1 clock */
+                STV090x_SETFIELD(reg, STOP_CLKADCI1_FIELD, 1);
+                /* FEC clock is shared between the two paths, only stop it
+                   when full standby is possible */
+                if (full_standby)
+                        STV090x_SETFIELD(reg, STOP_CLKFEC_FIELD, 1);
+                if (stv090x_write_reg(state, STV090x_STOPCLK1, reg) < 0)
+                        goto err;
+                reg = stv090x_read_reg(state, STV090x_STOPCLK2);
+                /* sampling 1 clock */
+                STV090x_SETFIELD(reg, STOP_CLKSAMP1_FIELD, 1);
+                /* viterbi 1 clock */
+                STV090x_SETFIELD(reg, STOP_CLKVIT1_FIELD, 1);
+                /* TS clock is shared between the two paths, only stop it
+                   when full standby is possible */
+                if (full_standby)
+                        STV090x_SETFIELD(reg, STOP_CLKTS_FIELD, 1);
+                if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
+                        goto err;
+                break;
+
+        case STV090x_DEMODULATOR_1:
+                /* power off ADC 2 */
+                reg = stv090x_read_reg(state, STV090x_TSTTNR3);
+                STV090x_SETFIELD(reg, ADC2_PON_FIELD, 0);
+                if (stv090x_write_reg(state, STV090x_TSTTNR3, reg) < 0)
+                        goto err;
+                /* power off DiSEqC 2 */
+                reg = stv090x_read_reg(state, STV090x_TSTTNR4);
+                STV090x_SETFIELD(reg, DISEQC2_PON_FIELD, 0);
+                if (stv090x_write_reg(state, STV090x_TSTTNR4, reg) < 0)
+                        goto err;
+
+                /* check whether path 1 is already sleeping, that is when
+                   ADC1 is off */
+                reg = stv090x_read_reg(state, STV090x_TSTTNR1);
+                if (STV090x_GETFIELD(reg, ADC1_PON_FIELD) == 0)
+                        full_standby = 1;
+
+                /* stop clocks */
+                reg = stv090x_read_reg(state, STV090x_STOPCLK1);
+                /* packet delineator 2 clock */
+                STV090x_SETFIELD(reg, STOP_CLKPKDT2_FIELD, 1);
+                /* ADC 2 clock */
+                STV090x_SETFIELD(reg, STOP_CLKADCI2_FIELD, 1);
+                /* FEC clock is shared between the two paths, only stop it
+                   when full standby is possible */
+                if (full_standby)
+                        STV090x_SETFIELD(reg, STOP_CLKFEC_FIELD, 1);
+                if (stv090x_write_reg(state, STV090x_STOPCLK1, reg) < 0)
+                        goto err;
+                reg = stv090x_read_reg(state, STV090x_STOPCLK2);
+                /* sampling 2 clock */
+                STV090x_SETFIELD(reg, STOP_CLKSAMP2_FIELD, 1);
+                /* viterbi 2 clock */
+                STV090x_SETFIELD(reg, STOP_CLKVIT2_FIELD, 1);
+                /* TS clock is shared between the two paths, only stop it
+                   when full standby is possible */
+                if (full_standby)
+                        STV090x_SETFIELD(reg, STOP_CLKTS_FIELD, 1);
+                if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
+                        goto err;
+                break;
 
+        default:
+                dprintk(FE_ERROR, 1, "Wrong demodulator!");
+                break;
+        }
+
+        if (full_standby) {
+                /* general power off */
+                reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
+                STV090x_SETFIELD(reg, STANDBY_FIELD, 0x01);
+                if (stv090x_write_reg(state, STV090x_SYNTCTRL, reg) < 0)
+                        goto err;
+        }
+
+        mutex_unlock(&state->internal->demod_lock);
         return 0;
 
 err_gateoff:
         stv090x_i2c_gate_ctrl(state, 0);
 err:
+        mutex_unlock(&state->internal->demod_lock);
         dprintk(FE_ERROR, 1, "I/O error");
         return -1;
 }
@@ -3885,21 +3994,94 @@ static int stv090x_wakeup(struct dvb_frontend *fe)
         struct stv090x_state *state = fe->demodulator_priv;
         u32 reg;
 
-        dprintk(FE_DEBUG, 1, "Wake %s from standby",
-                state->device == STV0900 ? "STV0900" : "STV0903");
+        dprintk(FE_DEBUG, 1, "Wake %s(%d) from standby",
+                state->device == STV0900 ? "STV0900" : "STV0903",
+                state->demod);
+
+        mutex_lock(&state->internal->demod_lock);
 
+        /* general power on */
         reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
         STV090x_SETFIELD(reg, STANDBY_FIELD, 0x00);
         if (stv090x_write_reg(state, STV090x_SYNTCTRL, reg) < 0)
                 goto err;
 
-        reg = stv090x_read_reg(state, STV090x_TSTTNR1);
-        STV090x_SETFIELD(reg, ADC1_PON_FIELD, 1);
-        if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0)
-                goto err;
+        switch (state->demod) {
+        case STV090x_DEMODULATOR_0:
+                /* power on ADC 1 */
+                reg = stv090x_read_reg(state, STV090x_TSTTNR1);
+                STV090x_SETFIELD(reg, ADC1_PON_FIELD, 1);
+                if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0)
+                        goto err;
+                /* power on DiSEqC 1 */
+                reg = stv090x_read_reg(state, STV090x_TSTTNR2);
+                STV090x_SETFIELD(reg, DISEQC1_PON_FIELD, 1);
+                if (stv090x_write_reg(state, STV090x_TSTTNR2, reg) < 0)
+                        goto err;
+
+                /* activate clocks */
+                reg = stv090x_read_reg(state, STV090x_STOPCLK1);
+                /* packet delineator 1 clock */
+                STV090x_SETFIELD(reg, STOP_CLKPKDT1_FIELD, 0);
+                /* ADC 1 clock */
+                STV090x_SETFIELD(reg, STOP_CLKADCI1_FIELD, 0);
+                /* FEC clock */
+                STV090x_SETFIELD(reg, STOP_CLKFEC_FIELD, 0);
+                if (stv090x_write_reg(state, STV090x_STOPCLK1, reg) < 0)
+                        goto err;
+                reg = stv090x_read_reg(state, STV090x_STOPCLK2);
+                /* sampling 1 clock */
+                STV090x_SETFIELD(reg, STOP_CLKSAMP1_FIELD, 0);
+                /* viterbi 1 clock */
+                STV090x_SETFIELD(reg, STOP_CLKVIT1_FIELD, 0);
+                /* TS clock */
+                STV090x_SETFIELD(reg, STOP_CLKTS_FIELD, 0);
+                if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
+                        goto err;
+                break;
 
+        case STV090x_DEMODULATOR_1:
+                /* power on ADC 2 */
+                reg = stv090x_read_reg(state, STV090x_TSTTNR3);
+                STV090x_SETFIELD(reg, ADC2_PON_FIELD, 1);
+                if (stv090x_write_reg(state, STV090x_TSTTNR3, reg) < 0)
+                        goto err;
+                /* power on DiSEqC 2 */
+                reg = stv090x_read_reg(state, STV090x_TSTTNR4);
+                STV090x_SETFIELD(reg, DISEQC2_PON_FIELD, 1);
+                if (stv090x_write_reg(state, STV090x_TSTTNR4, reg) < 0)
+                        goto err;
+
+                /* activate clocks */
+                reg = stv090x_read_reg(state, STV090x_STOPCLK1);
+                /* packet delineator 2 clock */
+                STV090x_SETFIELD(reg, STOP_CLKPKDT2_FIELD, 0);
+                /* ADC 2 clock */
+                STV090x_SETFIELD(reg, STOP_CLKADCI2_FIELD, 0);
+                /* FEC clock */
+                STV090x_SETFIELD(reg, STOP_CLKFEC_FIELD, 0);
+                if (stv090x_write_reg(state, STV090x_STOPCLK1, reg) < 0)
+                        goto err;
+                reg = stv090x_read_reg(state, STV090x_STOPCLK2);
+                /* sampling 2 clock */
+                STV090x_SETFIELD(reg, STOP_CLKSAMP2_FIELD, 0);
+                /* viterbi 2 clock */
+                STV090x_SETFIELD(reg, STOP_CLKVIT2_FIELD, 0);
+                /* TS clock */
+                STV090x_SETFIELD(reg, STOP_CLKTS_FIELD, 0);
+                if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
+                        goto err;
+                break;
+
+        default:
+                dprintk(FE_ERROR, 1, "Wrong demodulator!");
+                break;
+        }
+
+        mutex_unlock(&state->internal->demod_lock);
         return 0;
 err:
+        mutex_unlock(&state->internal->demod_lock);
         dprintk(FE_ERROR, 1, "I/O error");
         return -1;
 }
@@ -4169,6 +4351,7 @@ static int stv090x_set_tspath(struct stv090x_state *state)
         switch (state->config->ts1_mode) {
         case STV090x_TSMODE_PARALLEL_PUNCTURED:
                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
+                STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts1_tei);
                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
                 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
@@ -4177,6 +4360,7 @@ static int stv090x_set_tspath(struct stv090x_state *state)
 
         case STV090x_TSMODE_DVBCI:
                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
+                STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts1_tei);
                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
                 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
@@ -4185,6 +4369,7 @@ static int stv090x_set_tspath(struct stv090x_state *state)
 
         case STV090x_TSMODE_SERIAL_PUNCTURED:
                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
+                STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts1_tei);
                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
                 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
@@ -4193,6 +4378,7 @@ static int stv090x_set_tspath(struct stv090x_state *state)
 
         case STV090x_TSMODE_SERIAL_CONTINUOUS:
                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
+                STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts1_tei);
                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
                 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
@@ -4206,6 +4392,7 @@ static int stv090x_set_tspath(struct stv090x_state *state)
         switch (state->config->ts2_mode) {
         case STV090x_TSMODE_PARALLEL_PUNCTURED:
                 reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
+                STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts2_tei);
                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
                 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
@@ -4214,6 +4401,7 @@ static int stv090x_set_tspath(struct stv090x_state *state)
 
         case STV090x_TSMODE_DVBCI:
                 reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
+                STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts2_tei);
                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
                 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
@@ -4222,6 +4410,7 @@ static int stv090x_set_tspath(struct stv090x_state *state)
 
         case STV090x_TSMODE_SERIAL_PUNCTURED:
                 reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
+                STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts2_tei);
                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
                 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
@@ -4230,6 +4419,7 @@ static int stv090x_set_tspath(struct stv090x_state *state)
 
         case STV090x_TSMODE_SERIAL_CONTINUOUS:
                 reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
+                STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts2_tei);
                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
                 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
@@ -4506,16 +4696,26 @@ static int stv090x_setup(struct dvb_frontend *fe)
         if (stv090x_write_reg(state, STV090x_TSTRES0, 0x00) < 0)
                 goto err;
 
-        /* workaround for stuck DiSEqC output */
-        if (config->diseqc_envelope_mode)
-                stv090x_send_diseqc_burst(fe, SEC_MINI_A);
-
         return 0;
 err:
         dprintk(FE_ERROR, 1, "I/O error");
         return -1;
 }
 
+int stv090x_set_gpio(struct dvb_frontend *fe, u8 gpio, u8 dir, u8 value,
+                u8 xor_value)
+{
+        struct stv090x_state *state = fe->demodulator_priv;
+        u8 reg = 0;
+
+        STV090x_SETFIELD(reg, GPIOx_OPD_FIELD, dir);
+        STV090x_SETFIELD(reg, GPIOx_CONFIG_FIELD, value);
+        STV090x_SETFIELD(reg, GPIOx_XOR_FIELD, xor_value);
+
+        return stv090x_write_reg(state, STV090x_GPIOxCFG(gpio), reg);
+}
+EXPORT_SYMBOL(stv090x_set_gpio);
+
 static struct dvb_frontend_ops stv090x_ops = {
 
         .info = {
@@ -4580,39 +4780,35 @@ struct dvb_frontend *stv090x_attach(const struct stv090x_config *config,
                 state->internal = temp_int->internal;
                 state->internal->num_used++;
                 dprintk(FE_INFO, 1, "Found Internal Structure!");
-                dprintk(FE_ERROR, 1, "Attaching %s demodulator(%d) Cut=0x%02x",
-                        state->device == STV0900 ? "STV0900" : "STV0903",
-                        demod,
-                        state->internal->dev_ver);
-                return &state->frontend;
         } else {
                 state->internal = kmalloc(sizeof(struct stv090x_internal),
                                           GFP_KERNEL);
+                if (!state->internal)
+                        goto error;
                 temp_int = append_internal(state->internal);
+                if (!temp_int) {
+                        kfree(state->internal);
+                        goto error;
+                }
                 state->internal->num_used = 1;
                 state->internal->mclk = 0;
                 state->internal->dev_ver = 0;
                 state->internal->i2c_adap = state->i2c;
                 state->internal->i2c_addr = state->config->address;
                 dprintk(FE_INFO, 1, "Create New Internal Structure!");
-        }
 
-        mutex_init(&state->internal->demod_lock);
-        mutex_init(&state->internal->tuner_lock);
+                mutex_init(&state->internal->demod_lock);
+                mutex_init(&state->internal->tuner_lock);
 
-        if (stv090x_sleep(&state->frontend) < 0) {
-                dprintk(FE_ERROR, 1, "Error putting device to sleep");
-                goto error;
+                if (stv090x_setup(&state->frontend) < 0) {
+                        dprintk(FE_ERROR, 1, "Error setting up device");
+                        goto err_remove;
+                }
         }
 
-        if (stv090x_setup(&state->frontend) < 0) {
-                dprintk(FE_ERROR, 1, "Error setting up device");
-                goto error;
-        }
-        if (stv090x_wakeup(&state->frontend) < 0) {
-                dprintk(FE_ERROR, 1, "Error waking device");
-                goto error;
-        }
+        /* workaround for stuck DiSEqC output */
+        if (config->diseqc_envelope_mode)
+                stv090x_send_diseqc_burst(&state->frontend, SEC_MINI_A);
 
         dprintk(FE_ERROR, 1, "Attaching %s demodulator(%d) Cut=0x%02x",
                state->device == STV0900 ? "STV0900" : "STV0903",
@@ -4621,6 +4817,9 @@ struct dvb_frontend *stv090x_attach(const struct stv090x_config *config,
 
         return &state->frontend;
 
+err_remove:
+        remove_dev(state->internal);
+        kfree(state->internal);
 error:
         kfree(state);
         return NULL;
diff --git a/drivers/media/dvb/frontends/stv090x.h b/drivers/media/dvb/frontends/stv090x.h
index dd1b93ae4e9d..29cdc2b71314 100644
--- a/drivers/media/dvb/frontends/stv090x.h
+++ b/drivers/media/dvb/frontends/stv090x.h
@@ -78,6 +78,9 @@ struct stv090x_config {
         u32 ts1_clk;
         u32 ts2_clk;
 
+        u8 ts1_tei : 1;
+        u8 ts2_tei : 1;
+
         enum stv090x_i2crpt     repeater_level;
 
         u8                      tuner_bbgain; /* default: 10db */
@@ -97,6 +100,7 @@ struct stv090x_config {
         int (*tuner_get_bbgain) (struct dvb_frontend *fe, u32 *gain);
         int (*tuner_set_refclk)  (struct dvb_frontend *fe, u32 refclk);
         int (*tuner_get_status) (struct dvb_frontend *fe, u32 *status);
+        void (*tuner_i2c_lock) (struct dvb_frontend *fe, int lock);
 };
 
 #if defined(CONFIG_DVB_STV090x) || (defined(CONFIG_DVB_STV090x_MODULE) && defined(MODULE))
@@ -104,6 +108,11 @@ struct stv090x_config {
 extern struct dvb_frontend *stv090x_attach(const struct stv090x_config *config,
                                            struct i2c_adapter *i2c,
                                            enum stv090x_demodulator demod);
+
+/* dir = 0 -> output, dir = 1 -> input/open-drain */
+extern int stv090x_set_gpio(struct dvb_frontend *fe, u8 gpio,
+                u8 dir, u8 value, u8 xor_value);
+
 #else
 
 static inline struct dvb_frontend *stv090x_attach(const struct stv090x_config *config,
@@ -113,6 +122,13 @@ static inline struct dvb_frontend *stv090x_attach(const struct stv090x_config *c
         printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
         return NULL;
 }
+
+static inline int stv090x_set_gpio(struct dvb_frontend *fe, u8 gpio,
+                u8 opd, u8 value, u8 xor_value)
+{
+        printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+        return -ENODEV;
+}
 #endif /* CONFIG_DVB_STV090x */
 
 #endif /* __STV090x_H */
diff --git a/drivers/media/dvb/frontends/stv090x_reg.h b/drivers/media/dvb/frontends/stv090x_reg.h
index 2502855dd784..93741ee14297 100644
--- a/drivers/media/dvb/frontends/stv090x_reg.h
+++ b/drivers/media/dvb/frontends/stv090x_reg.h
@@ -1327,10 +1327,10 @@
 #define STV090x_WIDTH_Px_NOSPLHT_UNNORMED_FIELD 8
 
 #define STV090x_Px_NOSPLHy(__x, __y)            (0xf48f - (__x - 1) * 0x200 - __y * 0x1)
-#define STv090x_P1_NOSPLH0                      STV090x_Px_NOSPLHy(1, 0)
-#define STv090x_P1_NOSPLH1                      STV090x_Px_NOSPLHy(1, 1)
-#define STv090x_P2_NOSPLH0                      STV090x_Px_NOSPLHy(2, 0)
-#define STv090x_P2_NOSPLH1                      STV090x_Px_NOSPLHy(2, 1)
+#define STV090x_P1_NOSPLH0                      STV090x_Px_NOSPLHy(1, 0)
+#define STV090x_P1_NOSPLH1                      STV090x_Px_NOSPLHy(1, 1)
+#define STV090x_P2_NOSPLH0                      STV090x_Px_NOSPLHy(2, 0)
+#define STV090x_P2_NOSPLH1                      STV090x_Px_NOSPLHy(2, 1)
 #define STV090x_OFFST_Px_NOSPLH_UNNORMED_FIELD  0
 #define STV090x_WIDTH_Px_NOSPLH_UNNORMED_FIELD  8
 
@@ -1406,7 +1406,7 @@
 
 #define STV090x_Px_BCLC2S28(__x)                (0xf49d - (__x - 1) * 0x200)
 #define STV090x_P1_BCLC2S28                     STV090x_Px_BCLC2S28(1)
-#define STV090x_P2_BCLC2S28                     STV090x_Px_BCLC2S28(1)
+#define STV090x_P2_BCLC2S28                     STV090x_Px_BCLC2S28(2)
 #define STV090x_OFFST_Px_CAR2S2_8_BETA_M_FIELD  4
 #define STV090x_WIDTH_Px_CAR2S2_8_BETA_M_FIELD  2
 #define STV090x_OFFST_Px_CAR2S2_8_BETA_E_FIELD  0
@@ -1414,7 +1414,7 @@
 
 #define STV090x_Px_BCLC2S216A(__x)              (0xf49e - (__x - 1) * 0x200)
 #define STV090x_P1_BCLC2S216A                   STV090x_Px_BCLC2S216A(1)
-#define STV090x_P2_BCLC2S216A                   STV090x_Px_BCLC2S216A(1)
+#define STV090x_P2_BCLC2S216A                   STV090x_Px_BCLC2S216A(2)
 #define STV090x_OFFST_Px_CAR2S2_16A_BETA_M_FIELD        4
 #define STV090x_WIDTH_Px_CAR2S2_16A_BETA_M_FIELD        2
 #define STV090x_OFFST_Px_CAR2S2_16A_BETA_E_FIELD        0
@@ -1422,7 +1422,7 @@
 
 #define STV090x_Px_BCLC2S232A(__x)              (0xf49f - (__x - 1) * 0x200)
 #define STV090x_P1_BCLC2S232A                   STV090x_Px_BCLC2S232A(1)
-#define STV090x_P2_BCLC2S232A                   STV090x_Px_BCLC2S232A(1)
+#define STV090x_P2_BCLC2S232A                   STV090x_Px_BCLC2S232A(2)
 #define STV090x_OFFST_Px_CAR2S2_32A_BETA_M_FIELD        4
 #define STV090x_WIDTH_Px_CAR2S2_32A_BETA_M_FIELD        2
 #define STV090x_OFFST_Px_CAR2S2_32A_BETA_E_FIELD        0
@@ -1602,7 +1602,7 @@
 
 #define STV090x_Px_CCIACC(__x)                  (0xf4c4 - (__x - 1) * 0x200)
 #define STV090x_P1_CCIACC                       STV090x_Px_CCIACC(1)
-#define STV090x_P2_CCIACC                       STV090x_Px_CCIACC(1)
+#define STV090x_P2_CCIACC                       STV090x_Px_CCIACC(2)
 #define STV090x_OFFST_Px_CCI_VALUE_FIELD        0
 #define STV090x_WIDTH_Px_CCI_VALUE_FIELD        8
 
diff --git a/drivers/media/dvb/frontends/tda1004x.c b/drivers/media/dvb/frontends/tda1004x.c
index f2a8abe0a243..ea485d923550 100644
--- a/drivers/media/dvb/frontends/tda1004x.c
+++ b/drivers/media/dvb/frontends/tda1004x.c
@@ -598,7 +598,7 @@ static int tda1004x_decode_fec(int tdafec)
         return -1;
 }
 
-static int tda1004x_write(struct dvb_frontend* fe, u8 *buf, int len)
+static int tda1004x_write(struct dvb_frontend* fe, const u8 buf[], int len)
 {
         struct tda1004x_state* state = fe->demodulator_priv;
 
diff --git a/drivers/media/dvb/frontends/tda8261.c b/drivers/media/dvb/frontends/tda8261.c
index 1742056a34e8..53c7d8f1df28 100644
--- a/drivers/media/dvb/frontends/tda8261.c
+++ b/drivers/media/dvb/frontends/tda8261.c
@@ -224,7 +224,6 @@ exit:
 }
 
 EXPORT_SYMBOL(tda8261_attach);
-MODULE_PARM_DESC(verbose, "Set verbosity level");
 
 MODULE_AUTHOR("Manu Abraham");
 MODULE_DESCRIPTION("TDA8261 8PSK/QPSK Tuner");
diff --git a/drivers/media/dvb/frontends/z0194a.h b/drivers/media/dvb/frontends/z0194a.h
index 07f3fc0998f6..96d86d6eb473 100644
--- a/drivers/media/dvb/frontends/z0194a.h
+++ b/drivers/media/dvb/frontends/z0194a.h
@@ -42,7 +42,7 @@ static int sharp_z0194a_set_symbol_rate(struct dvb_frontend *fe,
 
 static u8 sharp_z0194a_inittab[] = {
         0x01, 0x15,
-        0x02, 0x00,
+        0x02, 0x30,
         0x03, 0x00,
         0x04, 0x7d,   /* F22FR = 0x7d, F22 = f_VCO / 128 / 0x7d = 22 kHz */
         0x05, 0x35,   /* I2CT = 0, SCLT = 1, SDAT = 1 */
diff --git a/drivers/media/dvb/frontends/zl10036.c b/drivers/media/dvb/frontends/zl10036.c
index 4627f491656b..81aa984c551f 100644
--- a/drivers/media/dvb/frontends/zl10036.c
+++ b/drivers/media/dvb/frontends/zl10036.c
@@ -463,16 +463,16 @@ struct dvb_frontend *zl10036_attach(struct dvb_frontend *fe,
                                     const struct zl10036_config *config,
                                     struct i2c_adapter *i2c)
 {
-        struct zl10036_state *state = NULL;
+        struct zl10036_state *state;
         int ret;
 
-        if (NULL == config) {
+        if (!config) {
                 printk(KERN_ERR "%s: no config specified", __func__);
-                goto error;
+                return NULL;
         }
 
         state = kzalloc(sizeof(struct zl10036_state), GFP_KERNEL);
-        if (NULL == state)
+        if (!state)
                 return NULL;
 
         state->config = config;
@@ -507,7 +507,7 @@ struct dvb_frontend *zl10036_attach(struct dvb_frontend *fe,
         return fe;
 
 error:
-        zl10036_release(fe);
+        kfree(state);
         return NULL;
 }
 EXPORT_SYMBOL(zl10036_attach);
diff --git a/drivers/media/dvb/frontends/zl10353.c b/drivers/media/dvb/frontends/zl10353.c
index 8c612719adfc..adbbf6d3d044 100644
--- a/drivers/media/dvb/frontends/zl10353.c
+++ b/drivers/media/dvb/frontends/zl10353.c
@@ -64,7 +64,7 @@ static int zl10353_single_write(struct dvb_frontend *fe, u8 reg, u8 val)
         return 0;
 }
 
-static int zl10353_write(struct dvb_frontend *fe, u8 *ibuf, int ilen)
+static int zl10353_write(struct dvb_frontend *fe, const u8 ibuf[], int ilen)
 {
         int err, i;
         for (i = 0; i < ilen - 1; i++)
diff --git a/drivers/media/dvb/mantis/Kconfig b/drivers/media/dvb/mantis/Kconfig
index fd0830ed10d8..a13a50503134 100644
--- a/drivers/media/dvb/mantis/Kconfig
+++ b/drivers/media/dvb/mantis/Kconfig
@@ -1,6 +1,6 @@
 config MANTIS_CORE
         tristate "Mantis/Hopper PCI bridge based devices"
-        depends on PCI && I2C && INPUT && IR_CORE
+        depends on PCI && I2C && INPUT && RC_CORE
 
         help
           Support for PCI cards based on the Mantis and Hopper PCi bridge.
diff --git a/drivers/media/dvb/mantis/hopper_cards.c b/drivers/media/dvb/mantis/hopper_cards.c
index 09e9fc785189..1402062f2c89 100644
--- a/drivers/media/dvb/mantis/hopper_cards.c
+++ b/drivers/media/dvb/mantis/hopper_cards.c
@@ -44,7 +44,7 @@
 
 static unsigned int verbose;
 module_param(verbose, int, 0644);
-MODULE_PARM_DESC(verbose, "verbose startup messages, default is 1 (yes)");
+MODULE_PARM_DESC(verbose, "verbose startup messages, default is 0 (no)");
 
 #define DRIVER_NAME     "Hopper"
 
@@ -251,6 +251,8 @@ static struct pci_device_id hopper_pci_table[] = {
         { }
 };
 
+MODULE_DEVICE_TABLE(pci, hopper_pci_table);
+
 static struct pci_driver hopper_pci_driver = {
         .name           = DRIVER_NAME,
         .id_table       = hopper_pci_table,
diff --git a/drivers/media/dvb/mantis/hopper_vp3028.c b/drivers/media/dvb/mantis/hopper_vp3028.c
index 96674c78e86b..68a29f8bdf73 100644
--- a/drivers/media/dvb/mantis/hopper_vp3028.c
+++ b/drivers/media/dvb/mantis/hopper_vp3028.c
@@ -47,17 +47,17 @@ static int vp3028_frontend_init(struct mantis_pci *mantis, struct dvb_frontend *
         struct mantis_hwconfig *config  = mantis->hwconfig;
         int err = 0;
 
-        gpio_set_bits(mantis, config->reset, 0);
+        mantis_gpio_set_bits(mantis, config->reset, 0);
         msleep(100);
         err = mantis_frontend_power(mantis, POWER_ON);
         msleep(100);
-        gpio_set_bits(mantis, config->reset, 1);
+        mantis_gpio_set_bits(mantis, config->reset, 1);
 
         err = mantis_frontend_power(mantis, POWER_ON);
         if (err == 0) {
                 msleep(250);
                 dprintk(MANTIS_ERROR, 1, "Probing for 10353 (DVB-T)");
-                fe = zl10353_attach(&hopper_vp3028_config, adapter);
+                fe = dvb_attach(zl10353_attach, &hopper_vp3028_config, adapter);
 
                 if (!fe)
                         return -1;
diff --git a/drivers/media/dvb/mantis/mantis_cards.c b/drivers/media/dvb/mantis/mantis_cards.c
index cf4b39ffdaad..05cbb9d95727 100644
--- a/drivers/media/dvb/mantis/mantis_cards.c
+++ b/drivers/media/dvb/mantis/mantis_cards.c
@@ -52,7 +52,7 @@
 
 static unsigned int verbose;
 module_param(verbose, int, 0644);
-MODULE_PARM_DESC(verbose, "verbose startup messages, default is 1 (yes)");
+MODULE_PARM_DESC(verbose, "verbose startup messages, default is 0 (no)");
 
 static int devs;
 
@@ -281,6 +281,8 @@ static struct pci_device_id mantis_pci_table[] = {
         { }
 };
 
+MODULE_DEVICE_TABLE(pci, mantis_pci_table);
+
 static struct pci_driver mantis_pci_driver = {
         .name           = DRIVER_NAME,
         .id_table       = mantis_pci_table,
diff --git a/drivers/media/dvb/mantis/mantis_common.h b/drivers/media/dvb/mantis/mantis_common.h
index d0b645a483c9..bd400d21b81f 100644
--- a/drivers/media/dvb/mantis/mantis_common.h
+++ b/drivers/media/dvb/mantis/mantis_common.h
@@ -171,7 +171,9 @@ struct mantis_pci {
         struct work_struct      uart_work;
         spinlock_t              uart_lock;
 
-        struct input_dev        *rc;
+        struct rc_dev           *rc;
+        char                    input_name[80];
+        char                    input_phys[80];
 };
 
 #define MANTIS_HIF_STATUS       (mantis->gpio_status)
diff --git a/drivers/media/dvb/mantis/mantis_core.c b/drivers/media/dvb/mantis/mantis_core.c
index 8113b23ce448..22524a8e6f61 100644
--- a/drivers/media/dvb/mantis/mantis_core.c
+++ b/drivers/media/dvb/mantis/mantis_core.c
@@ -91,10 +91,7 @@ static int get_mac_address(struct mantis_pci *mantis)
                 return err;
         }
         dprintk(verbose, MANTIS_ERROR, 0,
-                "    MAC Address=[%02x:%02x:%02x:%02x:%02x:%02x]\n",
-                mantis->mac_address[0], mantis->mac_address[1],
-                mantis->mac_address[2], mantis->mac_address[3],
-                mantis->mac_address[4], mantis->mac_address[5]);
+                "    MAC Address=[%pM]\n", mantis->mac_address);
 
         return 0;
 }
diff --git a/drivers/media/dvb/mantis/mantis_dvb.c b/drivers/media/dvb/mantis/mantis_dvb.c
index 99d82eec3b03..e5180e45d310 100644
--- a/drivers/media/dvb/mantis/mantis_dvb.c
+++ b/drivers/media/dvb/mantis/mantis_dvb.c
@@ -47,15 +47,15 @@ int mantis_frontend_power(struct mantis_pci *mantis, enum mantis_power power)
         switch (power) {
         case POWER_ON:
                 dprintk(MANTIS_DEBUG, 1, "Power ON");
-                gpio_set_bits(mantis, config->power, POWER_ON);
+                mantis_gpio_set_bits(mantis, config->power, POWER_ON);
                 msleep(100);
-                gpio_set_bits(mantis, config->power, POWER_ON);
+                mantis_gpio_set_bits(mantis, config->power, POWER_ON);
                 msleep(100);
                 break;
 
         case POWER_OFF:
                 dprintk(MANTIS_DEBUG, 1, "Power OFF");
-                gpio_set_bits(mantis, config->power, POWER_OFF);
+                mantis_gpio_set_bits(mantis, config->power, POWER_OFF);
                 msleep(100);
                 break;
 
@@ -73,13 +73,13 @@ void mantis_frontend_soft_reset(struct mantis_pci *mantis)
         struct mantis_hwconfig *config = mantis->hwconfig;
 
         dprintk(MANTIS_DEBUG, 1, "Frontend RESET");
-        gpio_set_bits(mantis, config->reset, 0);
+        mantis_gpio_set_bits(mantis, config->reset, 0);
         msleep(100);
-        gpio_set_bits(mantis, config->reset, 0);
+        mantis_gpio_set_bits(mantis, config->reset, 0);
         msleep(100);
-        gpio_set_bits(mantis, config->reset, 1);
+        mantis_gpio_set_bits(mantis, config->reset, 1);
         msleep(100);
-        gpio_set_bits(mantis, config->reset, 1);
+        mantis_gpio_set_bits(mantis, config->reset, 1);
         msleep(100);
 
         return;
@@ -117,6 +117,7 @@ static int mantis_dvb_start_feed(struct dvb_demux_feed *dvbdmxfeed)
         if (mantis->feeds == 1)  {
                 dprintk(MANTIS_DEBUG, 1, "mantis start feed & dma");
                 mantis_dma_start(mantis);
+                tasklet_enable(&mantis->tasklet);
         }
 
         return mantis->feeds;
@@ -136,6 +137,7 @@ static int mantis_dvb_stop_feed(struct dvb_demux_feed *dvbdmxfeed)
         mantis->feeds--;
         if (mantis->feeds == 0) {
                 dprintk(MANTIS_DEBUG, 1, "mantis stop feed and dma");
+                tasklet_disable(&mantis->tasklet);
                 mantis_dma_stop(mantis);
         }
 
@@ -216,6 +218,7 @@ int __devinit mantis_dvb_init(struct mantis_pci *mantis)
 
         dvb_net_init(&mantis->dvb_adapter, &mantis->dvbnet, &mantis->demux.dmx);
         tasklet_init(&mantis->tasklet, mantis_dma_xfer, (unsigned long) mantis);
+        tasklet_disable(&mantis->tasklet);
         if (mantis->hwconfig) {
                 result = config->frontend_init(mantis, mantis->fe);
                 if (result < 0) {
diff --git a/drivers/media/dvb/mantis/mantis_evm.c b/drivers/media/dvb/mantis/mantis_evm.c
index a7b369a439d6..9f73c2cfc9ea 100644
--- a/drivers/media/dvb/mantis/mantis_evm.c
+++ b/drivers/media/dvb/mantis/mantis_evm.c
@@ -111,7 +111,7 @@ void mantis_evmgr_exit(struct mantis_ca *ca)
         struct mantis_pci *mantis = ca->ca_priv;
 
         dprintk(MANTIS_DEBUG, 1, "Mantis Host I/F Event manager exiting");
-        flush_scheduled_work();
+        flush_work_sync(&ca->hif_evm_work);
         mantis_hif_exit(ca);
         mantis_pcmcia_exit(ca);
 }
diff --git a/drivers/media/dvb/mantis/mantis_i2c.c b/drivers/media/dvb/mantis/mantis_i2c.c
index 7870bcf9689a..e7794517fe26 100644
--- a/drivers/media/dvb/mantis/mantis_i2c.c
+++ b/drivers/media/dvb/mantis/mantis_i2c.c
@@ -229,7 +229,6 @@ int __devinit mantis_i2c_init(struct mantis_pci *mantis)
         i2c_set_adapdata(i2c_adapter, mantis);
 
         i2c_adapter->owner      = THIS_MODULE;
-        i2c_adapter->class      = I2C_CLASS_TV_DIGITAL;
         i2c_adapter->algo       = &mantis_algo;
         i2c_adapter->algo_data  = NULL;
         i2c_adapter->timeout    = 500;
diff --git a/drivers/media/dvb/mantis/mantis_input.c b/drivers/media/dvb/mantis/mantis_input.c
index a99489b8418b..db6d54d3fec0 100644
--- a/drivers/media/dvb/mantis/mantis_input.c
+++ b/drivers/media/dvb/mantis/mantis_input.c
@@ -18,8 +18,7 @@
         Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */
 
-#include <linux/input.h>
-#include <media/ir-core.h>
+#include <media/rc-core.h>
 #include <linux/pci.h>
 
 #include "dmxdev.h"
@@ -33,8 +32,9 @@
 #include "mantis_uart.h"
 
 #define MODULE_NAME "mantis_core"
+#define RC_MAP_MANTIS "rc-mantis"
 
-static struct ir_scancode mantis_ir_table[] = {
+static struct rc_map_table mantis_ir_table[] = {
         { 0x29, KEY_POWER       },
         { 0x28, KEY_FAVORITES   },
         { 0x30, KEY_TEXT        },
@@ -95,53 +95,65 @@ static struct ir_scancode mantis_ir_table[] = {
         { 0x00, KEY_BLUE        },
 };
 
-struct ir_scancode_table ir_mantis = {
-        .scan = mantis_ir_table,
-        .size = ARRAY_SIZE(mantis_ir_table),
+static struct rc_map_list ir_mantis_map = {
+        .map = {
+                .scan = mantis_ir_table,
+                .size = ARRAY_SIZE(mantis_ir_table),
+                .rc_type = RC_TYPE_UNKNOWN,
+                .name = RC_MAP_MANTIS,
+        }
 };
-EXPORT_SYMBOL_GPL(ir_mantis);
 
 int mantis_input_init(struct mantis_pci *mantis)
 {
-        struct input_dev *rc;
-        char name[80], dev[80];
+        struct rc_dev *dev;
         int err;
 
-        rc = input_allocate_device();
-        if (!rc) {
-                dprintk(MANTIS_ERROR, 1, "Input device allocate failed");
-                return -ENOMEM;
-        }
+        err = rc_map_register(&ir_mantis_map);
+        if (err)
+                goto out;
 
-        sprintf(name, "Mantis %s IR receiver", mantis->hwconfig->model_name);
-        sprintf(dev, "pci-%s/ir0", pci_name(mantis->pdev));
+        dev = rc_allocate_device();
+        if (!dev) {
+                dprintk(MANTIS_ERROR, 1, "Remote device allocation failed");
+                err = -ENOMEM;
+                goto out_map;
+        }
 
-        rc->name = name;
-        rc->phys = dev;
+        sprintf(mantis->input_name, "Mantis %s IR receiver", mantis->hwconfig->model_name);
+        sprintf(mantis->input_phys, "pci-%s/ir0", pci_name(mantis->pdev));
 
-        rc->id.bustype  = BUS_PCI;
-        rc->id.vendor   = mantis->vendor_id;
-        rc->id.product  = mantis->device_id;
-        rc->id.version  = 1;
-        rc->dev         = mantis->pdev->dev;
+        dev->input_name         = mantis->input_name;
+        dev->input_phys         = mantis->input_phys;
+        dev->input_id.bustype   = BUS_PCI;
+        dev->input_id.vendor    = mantis->vendor_id;
+        dev->input_id.product   = mantis->device_id;
+        dev->input_id.version   = 1;
+        dev->driver_name        = MODULE_NAME;
+        dev->map_name           = RC_MAP_MANTIS;
+        dev->dev.parent         = &mantis->pdev->dev;
 
-        err = __ir_input_register(rc, &ir_mantis, NULL, MODULE_NAME);
+        err = rc_register_device(dev);
         if (err) {
                 dprintk(MANTIS_ERROR, 1, "IR device registration failed, ret = %d", err);
-                input_free_device(rc);
-                return -ENODEV;
+                goto out_dev;
         }
 
-        mantis->rc = rc;
-
+        mantis->rc = dev;
         return 0;
+
+out_dev:
+        rc_free_device(dev);
+out_map:
+        rc_map_unregister(&ir_mantis_map);
+out:
+        return err;
 }
 
 int mantis_exit(struct mantis_pci *mantis)
 {
-        struct input_dev *rc = mantis->rc;
-
-        ir_input_unregister(rc);
-
+        rc_unregister_device(mantis->rc);
+        rc_map_unregister(&ir_mantis_map);
         return 0;
 }
+
diff --git a/drivers/media/dvb/mantis/mantis_ioc.c b/drivers/media/dvb/mantis/mantis_ioc.c
index de148ded52d8..479086dbb9a8 100644
--- a/drivers/media/dvb/mantis/mantis_ioc.c
+++ b/drivers/media/dvb/mantis/mantis_ioc.c
@@ -68,21 +68,14 @@ int mantis_get_mac(struct mantis_pci *mantis)
                 return err;
         }
 
-        dprintk(MANTIS_ERROR, 0,
-                "    MAC Address=[%02x:%02x:%02x:%02x:%02x:%02x]\n",
-                mac_addr[0],
-                mac_addr[1],
-                mac_addr[2],
-                mac_addr[3],
-                mac_addr[4],
-                mac_addr[5]);
+        dprintk(MANTIS_ERROR, 0, "    MAC Address=[%pM]\n", mac_addr);
 
         return 0;
 }
 EXPORT_SYMBOL_GPL(mantis_get_mac);
 
 /* Turn the given bit on or off. */
-void gpio_set_bits(struct mantis_pci *mantis, u32 bitpos, u8 value)
+void mantis_gpio_set_bits(struct mantis_pci *mantis, u32 bitpos, u8 value)
 {
         u32 cur;
 
@@ -97,7 +90,7 @@ void gpio_set_bits(struct mantis_pci *mantis, u32 bitpos, u8 value)
         mmwrite(mantis->gpio_status, MANTIS_GPIF_ADDR);
         mmwrite(0x00, MANTIS_GPIF_DOUT);
 }
-EXPORT_SYMBOL_GPL(gpio_set_bits);
+EXPORT_SYMBOL_GPL(mantis_gpio_set_bits);
 
 int mantis_stream_control(struct mantis_pci *mantis, enum mantis_stream_control stream_ctl)
 {
diff --git a/drivers/media/dvb/mantis/mantis_ioc.h b/drivers/media/dvb/mantis/mantis_ioc.h
index 188fe5a81614..d56e002b2955 100644
--- a/drivers/media/dvb/mantis/mantis_ioc.h
+++ b/drivers/media/dvb/mantis/mantis_ioc.h
@@ -44,7 +44,7 @@ enum mantis_stream_control {
 };
 
 extern int mantis_get_mac(struct mantis_pci *mantis);
-extern void gpio_set_bits(struct mantis_pci *mantis, u32 bitpos, u8 value);
+extern void mantis_gpio_set_bits(struct mantis_pci *mantis, u32 bitpos, u8 value);
 
 extern int mantis_stream_control(struct mantis_pci *mantis, enum mantis_stream_control stream_ctl);
 
diff --git a/drivers/media/dvb/mantis/mantis_pci.c b/drivers/media/dvb/mantis/mantis_pci.c
index 59feeb84aec7..371558af2d96 100644
--- a/drivers/media/dvb/mantis/mantis_pci.c
+++ b/drivers/media/dvb/mantis/mantis_pci.c
@@ -22,7 +22,6 @@
 #include <linux/moduleparam.h>
 #include <linux/kernel.h>
 #include <asm/io.h>
-#include <asm/pgtable.h>
 #include <asm/page.h>
 #include <linux/kmod.h>
 #include <linux/vmalloc.h>
@@ -49,7 +48,7 @@
 
 int __devinit mantis_pci_init(struct mantis_pci *mantis)
 {
-        u8 revision, latency;
+        u8 latency;
         struct mantis_hwconfig *config  = mantis->hwconfig;
         struct pci_dev *pdev            = mantis->pdev;
         int err, ret = 0;
@@ -96,9 +95,8 @@ int __devinit mantis_pci_init(struct mantis_pci *mantis)
         }
 
         pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &latency);
-        pci_read_config_byte(pdev, PCI_CLASS_REVISION, &revision);
         mantis->latency = latency;
-        mantis->revision = revision;
+        mantis->revision = pdev->revision;
 
         dprintk(MANTIS_ERROR, 0, "    Mantis Rev %d [%04x:%04x], ",
                 mantis->revision,
diff --git a/drivers/media/dvb/mantis/mantis_uart.c b/drivers/media/dvb/mantis/mantis_uart.c
index 7d2f2398fa8b..f807c8ba26e4 100644
--- a/drivers/media/dvb/mantis/mantis_uart.c
+++ b/drivers/media/dvb/mantis/mantis_uart.c
@@ -172,7 +172,7 @@ int mantis_uart_init(struct mantis_pci *mantis)
         mmwrite(mmread(MANTIS_UART_CTL) | MANTIS_UART_RXINT, MANTIS_UART_CTL);
 
         schedule_work(&mantis->uart_work);
-        dprintk(MANTIS_DEBUG, 1, "UART succesfully initialized");
+        dprintk(MANTIS_DEBUG, 1, "UART successfully initialized");
 
         return 0;
 }
@@ -182,5 +182,6 @@ void mantis_uart_exit(struct mantis_pci *mantis)
 {
         /* disable interrupt */
         mmwrite(mmread(MANTIS_UART_CTL) & 0xffef, MANTIS_UART_CTL);
+        flush_work_sync(&mantis->uart_work);
 }
 EXPORT_SYMBOL_GPL(mantis_uart_exit);
diff --git a/drivers/media/dvb/mantis/mantis_vp1033.c b/drivers/media/dvb/mantis/mantis_vp1033.c
index 4a723bda0031..2ae0afa7756b 100644
--- a/drivers/media/dvb/mantis/mantis_vp1033.c
+++ b/drivers/media/dvb/mantis/mantis_vp1033.c
@@ -37,7 +37,7 @@
 
 u8 lgtdqcs001f_inittab[] = {
         0x01, 0x15,
-        0x02, 0x00,
+        0x02, 0x30,
         0x03, 0x00,
         0x04, 0x2a,
         0x05, 0x85,
@@ -173,7 +173,7 @@ static int vp1033_frontend_init(struct mantis_pci *mantis, struct dvb_frontend *
                 msleep(250);
 
                 dprintk(MANTIS_ERROR, 1, "Probing for STV0299 (DVB-S)");
-                fe = stv0299_attach(&lgtdqcs001f_config, adapter);
+                fe = dvb_attach(stv0299_attach, &lgtdqcs001f_config, adapter);
 
                 if (fe) {
                         fe->ops.tuner_ops.set_params = lgtdqcs001f_tuner_set;
diff --git a/drivers/media/dvb/mantis/mantis_vp1034.c b/drivers/media/dvb/mantis/mantis_vp1034.c
index 8e6ae558ee57..26bc0cbe84d4 100644
--- a/drivers/media/dvb/mantis/mantis_vp1034.c
+++ b/drivers/media/dvb/mantis/mantis_vp1034.c
@@ -50,13 +50,13 @@ int vp1034_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
         switch (voltage) {
         case SEC_VOLTAGE_13:
                 dprintk(MANTIS_ERROR, 1, "Polarization=[13V]");
-                gpio_set_bits(mantis, 13, 1);
-                gpio_set_bits(mantis, 14, 0);
+                mantis_gpio_set_bits(mantis, 13, 1);
+                mantis_gpio_set_bits(mantis, 14, 0);
                 break;
         case SEC_VOLTAGE_18:
                 dprintk(MANTIS_ERROR, 1, "Polarization=[18V]");
-                gpio_set_bits(mantis, 13, 1);
-                gpio_set_bits(mantis, 14, 1);
+                mantis_gpio_set_bits(mantis, 13, 1);
+                mantis_gpio_set_bits(mantis, 14, 1);
                 break;
         case SEC_VOLTAGE_OFF:
                 dprintk(MANTIS_ERROR, 1, "Frontend (dummy) POWERDOWN");
@@ -82,7 +82,7 @@ static int vp1034_frontend_init(struct mantis_pci *mantis, struct dvb_frontend *
                 msleep(250);
 
                 dprintk(MANTIS_ERROR, 1, "Probing for MB86A16 (DVB-S/DSS)");
-                fe = mb86a16_attach(&vp1034_mb86a16_config, adapter);
+                fe = dvb_attach(mb86a16_attach, &vp1034_mb86a16_config, adapter);
                 if (fe) {
                         dprintk(MANTIS_ERROR, 1,
                         "found MB86A16 DVB-S/DSS frontend @0x%02x",
diff --git a/drivers/media/dvb/mantis/mantis_vp1041.c b/drivers/media/dvb/mantis/mantis_vp1041.c
index d1aa2bc0c155..38a436ca2fdf 100644
--- a/drivers/media/dvb/mantis/mantis_vp1041.c
+++ b/drivers/media/dvb/mantis/mantis_vp1041.c
@@ -316,14 +316,14 @@ static int vp1041_frontend_init(struct mantis_pci *mantis, struct dvb_frontend *
         if (err == 0) {
                 mantis_frontend_soft_reset(mantis);
                 msleep(250);
-                mantis->fe = stb0899_attach(&vp1041_stb0899_config, adapter);
+                mantis->fe = dvb_attach(stb0899_attach, &vp1041_stb0899_config, adapter);
                 if (mantis->fe) {
                         dprintk(MANTIS_ERROR, 1,
                                 "found STB0899 DVB-S/DVB-S2 frontend @0x%02x",
                                 vp1041_stb0899_config.demod_address);
 
-                        if (stb6100_attach(mantis->fe, &vp1041_stb6100_config, adapter)) {
-                                if (!lnbp21_attach(mantis->fe, adapter, 0, 0))
+                        if (dvb_attach(stb6100_attach, mantis->fe, &vp1041_stb6100_config, adapter)) {
+                                if (!dvb_attach(lnbp21_attach, mantis->fe, adapter, 0, 0))
                                         dprintk(MANTIS_ERROR, 1, "No LNBP21 found!");
                         }
                 } else {
diff --git a/drivers/media/dvb/mantis/mantis_vp2033.c b/drivers/media/dvb/mantis/mantis_vp2033.c
index 10ce81790a8c..06da0ddf05a7 100644
--- a/drivers/media/dvb/mantis/mantis_vp2033.c
+++ b/drivers/media/dvb/mantis/mantis_vp2033.c
@@ -132,7 +132,7 @@ static int vp2033_frontend_init(struct mantis_pci *mantis, struct dvb_frontend *
                 msleep(250);
 
                 dprintk(MANTIS_ERROR, 1, "Probing for CU1216 (DVB-C)");
-                fe = tda10021_attach(&vp2033_tda1002x_cu1216_config,
+                fe = dvb_attach(tda10021_attach, &vp2033_tda1002x_cu1216_config,
                                      adapter,
                                      read_pwm(mantis));
 
@@ -141,7 +141,7 @@ static int vp2033_frontend_init(struct mantis_pci *mantis, struct dvb_frontend *
                                 "found Philips CU1216 DVB-C frontend (TDA10021) @ 0x%02x",
                                 vp2033_tda1002x_cu1216_config.demod_address);
                 } else {
-                        fe = tda10023_attach(&vp2033_tda10023_cu1216_config,
+                        fe = dvb_attach(tda10023_attach, &vp2033_tda10023_cu1216_config,
                                              adapter,
                                              read_pwm(mantis));
 
diff --git a/drivers/media/dvb/mantis/mantis_vp2040.c b/drivers/media/dvb/mantis/mantis_vp2040.c
index a7ca233e800b..f72b137b7652 100644
--- a/drivers/media/dvb/mantis/mantis_vp2040.c
+++ b/drivers/media/dvb/mantis/mantis_vp2040.c
@@ -132,7 +132,7 @@ static int vp2040_frontend_init(struct mantis_pci *mantis, struct dvb_frontend *
                 msleep(250);
 
                 dprintk(MANTIS_ERROR, 1, "Probing for CU1216 (DVB-C)");
-                fe = tda10021_attach(&vp2040_tda1002x_cu1216_config,
+                fe = dvb_attach(tda10021_attach, &vp2040_tda1002x_cu1216_config,
                                      adapter,
                                      read_pwm(mantis));
 
@@ -141,7 +141,7 @@ static int vp2040_frontend_init(struct mantis_pci *mantis, struct dvb_frontend *
                                 "found Philips CU1216 DVB-C frontend (TDA10021) @ 0x%02x",
                                 vp2040_tda1002x_cu1216_config.demod_address);
                 } else {
-                        fe = tda10023_attach(&vp2040_tda10023_cu1216_config,
+                        fe = dvb_attach(tda10023_attach, &vp2040_tda10023_cu1216_config,
                                              adapter,
                                              read_pwm(mantis));
 
diff --git a/drivers/media/dvb/mantis/mantis_vp3030.c b/drivers/media/dvb/mantis/mantis_vp3030.c
index 1f4334214953..c09308cd3ac6 100644
--- a/drivers/media/dvb/mantis/mantis_vp3030.c
+++ b/drivers/media/dvb/mantis/mantis_vp3030.c
@@ -59,21 +59,21 @@ static int vp3030_frontend_init(struct mantis_pci *mantis, struct dvb_frontend *
         struct mantis_hwconfig *config  = mantis->hwconfig;
         int err = 0;
 
-        gpio_set_bits(mantis, config->reset, 0);
+        mantis_gpio_set_bits(mantis, config->reset, 0);
         msleep(100);
         err = mantis_frontend_power(mantis, POWER_ON);
         msleep(100);
-        gpio_set_bits(mantis, config->reset, 1);
+        mantis_gpio_set_bits(mantis, config->reset, 1);
 
         if (err == 0) {
                 msleep(250);
                 dprintk(MANTIS_ERROR, 1, "Probing for 10353 (DVB-T)");
-                fe = zl10353_attach(&mantis_vp3030_config, adapter);
+                fe = dvb_attach(zl10353_attach, &mantis_vp3030_config, adapter);
 
                 if (!fe)
                         return -1;
 
-                tda665x_attach(fe, &env57h12d5_config, adapter);
+                dvb_attach(tda665x_attach, fe, &env57h12d5_config, adapter);
         } else {
                 dprintk(MANTIS_ERROR, 1, "Frontend on <%s> POWER ON failed! <%d>",
                         adapter->name,
diff --git a/drivers/media/dvb/ngene/Makefile b/drivers/media/dvb/ngene/Makefile
index 0608aabb14ee..2bc96874d044 100644
--- a/drivers/media/dvb/ngene/Makefile
+++ b/drivers/media/dvb/ngene/Makefile
@@ -9,3 +9,6 @@ obj-$(CONFIG_DVB_NGENE) += ngene.o
 EXTRA_CFLAGS += -Idrivers/media/dvb/dvb-core/
 EXTRA_CFLAGS += -Idrivers/media/dvb/frontends/
 EXTRA_CFLAGS += -Idrivers/media/common/tuners/
+
+# For the staging CI driver cxd2099
+EXTRA_CFLAGS += -Idrivers/staging/cxd2099/
diff --git a/drivers/media/dvb/ngene/ngene-cards.c b/drivers/media/dvb/ngene/ngene-cards.c
index 4692a41ad95b..fcf4be901ec8 100644
--- a/drivers/media/dvb/ngene/ngene-cards.c
+++ b/drivers/media/dvb/ngene/ngene-cards.c
@@ -48,20 +48,27 @@
 
 static int tuner_attach_stv6110(struct ngene_channel *chan)
 {
+        struct i2c_adapter *i2c;
         struct stv090x_config *feconf = (struct stv090x_config *)
                 chan->dev->card_info->fe_config[chan->number];
         struct stv6110x_config *tunerconf = (struct stv6110x_config *)
                 chan->dev->card_info->tuner_config[chan->number];
         struct stv6110x_devctl *ctl;
 
-        ctl = dvb_attach(stv6110x_attach, chan->fe, tunerconf,
-                         &chan->i2c_adapter);
+        /* tuner 1+2: i2c adapter #0, tuner 3+4: i2c adapter #1 */
+        if (chan->number < 2)
+                i2c = &chan->dev->channel[0].i2c_adapter;
+        else
+                i2c = &chan->dev->channel[1].i2c_adapter;
+
+        ctl = dvb_attach(stv6110x_attach, chan->fe, tunerconf, i2c);
         if (ctl == NULL) {
                 printk(KERN_ERR DEVICE_NAME ": No STV6110X found!\n");
                 return -ENODEV;
         }
 
         feconf->tuner_init          = ctl->tuner_init;
+        feconf->tuner_sleep         = ctl->tuner_sleep;
         feconf->tuner_set_mode      = ctl->tuner_set_mode;
         feconf->tuner_set_frequency = ctl->tuner_set_frequency;
         feconf->tuner_get_frequency = ctl->tuner_get_frequency;
@@ -78,29 +85,106 @@ static int tuner_attach_stv6110(struct ngene_channel *chan)
 
 static int demod_attach_stv0900(struct ngene_channel *chan)
 {
+        struct i2c_adapter *i2c;
         struct stv090x_config *feconf = (struct stv090x_config *)
                 chan->dev->card_info->fe_config[chan->number];
 
-        chan->fe = dvb_attach(stv090x_attach,
-                        feconf,
-                        &chan->i2c_adapter,
-                        chan->number == 0 ? STV090x_DEMODULATOR_0 :
-                                            STV090x_DEMODULATOR_1);
+        /* tuner 1+2: i2c adapter #0, tuner 3+4: i2c adapter #1 */
+        /* Note: Both adapters share the same i2c bus, but the demod     */
+        /*       driver requires that each demod has its own i2c adapter */
+        if (chan->number < 2)
+                i2c = &chan->dev->channel[0].i2c_adapter;
+        else
+                i2c = &chan->dev->channel[1].i2c_adapter;
+
+        chan->fe = dvb_attach(stv090x_attach, feconf, i2c,
+                        (chan->number & 1) == 0 ? STV090x_DEMODULATOR_0
+                                                : STV090x_DEMODULATOR_1);
         if (chan->fe == NULL) {
                 printk(KERN_ERR DEVICE_NAME ": No STV0900 found!\n");
                 return -ENODEV;
         }
 
-        if (!dvb_attach(lnbh24_attach, chan->fe, &chan->i2c_adapter, 0,
+        /* store channel info */
+        if (feconf->tuner_i2c_lock)
+                chan->fe->analog_demod_priv = chan;
+
+        if (!dvb_attach(lnbh24_attach, chan->fe, i2c, 0,
                         0, chan->dev->card_info->lnb[chan->number])) {
                 printk(KERN_ERR DEVICE_NAME ": No LNBH24 found!\n");
                 dvb_frontend_detach(chan->fe);
+                chan->fe = NULL;
+                return -ENODEV;
+        }
+
+        return 0;
+}
+
+static void cineS2_tuner_i2c_lock(struct dvb_frontend *fe, int lock)
+{
+        struct ngene_channel *chan = fe->analog_demod_priv;
+
+        if (lock)
+                down(&chan->dev->pll_mutex);
+        else
+                up(&chan->dev->pll_mutex);
+}
+
+static int cineS2_probe(struct ngene_channel *chan)
+{
+        struct i2c_adapter *i2c;
+        struct stv090x_config *fe_conf;
+        u8 buf[3];
+        struct i2c_msg i2c_msg = { .flags = 0, .buf = buf };
+        int rc;
+
+        /* tuner 1+2: i2c adapter #0, tuner 3+4: i2c adapter #1 */
+        if (chan->number < 2)
+                i2c = &chan->dev->channel[0].i2c_adapter;
+        else
+                i2c = &chan->dev->channel[1].i2c_adapter;
+
+        fe_conf = chan->dev->card_info->fe_config[chan->number];
+        i2c_msg.addr = fe_conf->address;
+
+        /* probe demod */
+        i2c_msg.len = 2;
+        buf[0] = 0xf1;
+        buf[1] = 0x00;
+        rc = i2c_transfer(i2c, &i2c_msg, 1);
+        if (rc != 1)
+                return -ENODEV;
+
+        /* demod found, attach it */
+        rc = demod_attach_stv0900(chan);
+        if (rc < 0 || chan->number < 2)
+                return rc;
+
+        /* demod #2: reprogram outputs DPN1 & DPN2 */
+        i2c_msg.len = 3;
+        buf[0] = 0xf1;
+        switch (chan->number) {
+        case 2:
+                buf[1] = 0x5c;
+                buf[2] = 0xc2;
+                break;
+        case 3:
+                buf[1] = 0x61;
+                buf[2] = 0xcc;
+                break;
+        default:
                 return -ENODEV;
         }
+        rc = i2c_transfer(i2c, &i2c_msg, 1);
+        if (rc != 1) {
+                printk(KERN_ERR DEVICE_NAME ": could not setup DPNx\n");
+                return -EIO;
+        }
 
         return 0;
 }
 
+
 static struct lgdt330x_config aver_m780 = {
         .demod_address = 0xb2 >> 1,
         .demod_chip    = LGDT3303,
@@ -151,6 +235,29 @@ static struct stv090x_config fe_cineS2 = {
         .adc2_range     = STV090x_ADC_1Vpp,
 
         .diseqc_envelope_mode = true,
+
+        .tuner_i2c_lock = cineS2_tuner_i2c_lock,
+};
+
+static struct stv090x_config fe_cineS2_2 = {
+        .device         = STV0900,
+        .demod_mode     = STV090x_DUAL,
+        .clk_mode       = STV090x_CLK_EXT,
+
+        .xtal           = 27000000,
+        .address        = 0x69,
+
+        .ts1_mode       = STV090x_TSMODE_SERIAL_PUNCTURED,
+        .ts2_mode       = STV090x_TSMODE_SERIAL_PUNCTURED,
+
+        .repeater_level = STV090x_RPTLEVEL_16,
+
+        .adc1_range     = STV090x_ADC_1Vpp,
+        .adc2_range     = STV090x_ADC_1Vpp,
+
+        .diseqc_envelope_mode = true,
+
+        .tuner_i2c_lock = cineS2_tuner_i2c_lock,
 };
 
 static struct stv6110x_config tuner_cineS2_0 = {
@@ -175,7 +282,8 @@ static struct ngene_info ngene_info_cineS2 = {
         .tuner_config   = {&tuner_cineS2_0, &tuner_cineS2_1},
         .lnb            = {0x0b, 0x08},
         .tsf            = {3, 3},
-        .fw_version     = 15,
+        .fw_version     = 18,
+        .msi_supported  = true,
 };
 
 static struct ngene_info ngene_info_satixS2 = {
@@ -188,46 +296,54 @@ static struct ngene_info ngene_info_satixS2 = {
         .tuner_config   = {&tuner_cineS2_0, &tuner_cineS2_1},
         .lnb            = {0x0b, 0x08},
         .tsf            = {3, 3},
-        .fw_version     = 15,
+        .fw_version     = 18,
+        .msi_supported  = true,
 };
 
 static struct ngene_info ngene_info_satixS2v2 = {
         .type           = NGENE_SIDEWINDER,
         .name           = "Mystique SaTiX-S2 Dual (v2)",
-        .io_type        = {NGENE_IO_TSIN, NGENE_IO_TSIN},
-        .demod_attach   = {demod_attach_stv0900, demod_attach_stv0900},
-        .tuner_attach   = {tuner_attach_stv6110, tuner_attach_stv6110},
-        .fe_config      = {&fe_cineS2, &fe_cineS2},
-        .tuner_config   = {&tuner_cineS2_0, &tuner_cineS2_1},
-        .lnb            = {0x0a, 0x08},
+        .io_type        = {NGENE_IO_TSIN, NGENE_IO_TSIN, NGENE_IO_TSIN, NGENE_IO_TSIN,
+                           NGENE_IO_TSOUT},
+        .demod_attach   = {demod_attach_stv0900, demod_attach_stv0900, cineS2_probe, cineS2_probe},
+        .tuner_attach   = {tuner_attach_stv6110, tuner_attach_stv6110, tuner_attach_stv6110, tuner_attach_stv6110},
+        .fe_config      = {&fe_cineS2, &fe_cineS2, &fe_cineS2_2, &fe_cineS2_2},
+        .tuner_config   = {&tuner_cineS2_0, &tuner_cineS2_1, &tuner_cineS2_0, &tuner_cineS2_1},
+        .lnb            = {0x0a, 0x08, 0x0b, 0x09},
         .tsf            = {3, 3},
-        .fw_version     = 15,
+        .fw_version     = 18,
+        .msi_supported  = true,
 };
 
 static struct ngene_info ngene_info_cineS2v5 = {
         .type           = NGENE_SIDEWINDER,
         .name           = "Linux4Media cineS2 DVB-S2 Twin Tuner (v5)",
-        .io_type        = {NGENE_IO_TSIN, NGENE_IO_TSIN},
-        .demod_attach   = {demod_attach_stv0900, demod_attach_stv0900},
-        .tuner_attach   = {tuner_attach_stv6110, tuner_attach_stv6110},
-        .fe_config      = {&fe_cineS2, &fe_cineS2},
-        .tuner_config   = {&tuner_cineS2_0, &tuner_cineS2_1},
-        .lnb            = {0x0a, 0x08},
+        .io_type        = {NGENE_IO_TSIN, NGENE_IO_TSIN, NGENE_IO_TSIN, NGENE_IO_TSIN,
+                           NGENE_IO_TSOUT},
+        .demod_attach   = {demod_attach_stv0900, demod_attach_stv0900, cineS2_probe, cineS2_probe},
+        .tuner_attach   = {tuner_attach_stv6110, tuner_attach_stv6110, tuner_attach_stv6110, tuner_attach_stv6110},
+        .fe_config      = {&fe_cineS2, &fe_cineS2, &fe_cineS2_2, &fe_cineS2_2},
+        .tuner_config   = {&tuner_cineS2_0, &tuner_cineS2_1, &tuner_cineS2_0, &tuner_cineS2_1},
+        .lnb            = {0x0a, 0x08, 0x0b, 0x09},
         .tsf            = {3, 3},
-        .fw_version     = 15,
+        .fw_version     = 18,
+        .msi_supported  = true,
 };
 
+
 static struct ngene_info ngene_info_duoFlexS2 = {
         .type           = NGENE_SIDEWINDER,
         .name           = "Digital Devices DuoFlex S2 miniPCIe",
-        .io_type        = {NGENE_IO_TSIN, NGENE_IO_TSIN},
-        .demod_attach   = {demod_attach_stv0900, demod_attach_stv0900},
-        .tuner_attach   = {tuner_attach_stv6110, tuner_attach_stv6110},
-        .fe_config      = {&fe_cineS2, &fe_cineS2},
-        .tuner_config   = {&tuner_cineS2_0, &tuner_cineS2_1},
-        .lnb            = {0x0a, 0x08},
+        .io_type        = {NGENE_IO_TSIN, NGENE_IO_TSIN, NGENE_IO_TSIN, NGENE_IO_TSIN,
+                           NGENE_IO_TSOUT},
+        .demod_attach   = {cineS2_probe, cineS2_probe, cineS2_probe, cineS2_probe},
+        .tuner_attach   = {tuner_attach_stv6110, tuner_attach_stv6110, tuner_attach_stv6110, tuner_attach_stv6110},
+        .fe_config      = {&fe_cineS2, &fe_cineS2, &fe_cineS2_2, &fe_cineS2_2},
+        .tuner_config   = {&tuner_cineS2_0, &tuner_cineS2_1, &tuner_cineS2_0, &tuner_cineS2_1},
+        .lnb            = {0x0a, 0x08, 0x0b, 0x09},
         .tsf            = {3, 3},
-        .fw_version     = 15,
+        .fw_version     = 18,
+        .msi_supported  = true,
 };
 
 static struct ngene_info ngene_info_m780 = {
@@ -321,6 +437,7 @@ static struct pci_driver ngene_pci_driver = {
         .probe       = ngene_probe,
         .remove      = __devexit_p(ngene_remove),
         .err_handler = &ngene_errors,
+        .shutdown    = ngene_shutdown,
 };
 
 static __init int module_init_ngene(void)
diff --git a/drivers/media/dvb/ngene/ngene-core.c b/drivers/media/dvb/ngene/ngene-core.c
index 4caeb163a666..6927c726ce35 100644
--- a/drivers/media/dvb/ngene/ngene-core.c
+++ b/drivers/media/dvb/ngene/ngene-core.c
@@ -34,7 +34,6 @@
 #include <linux/io.h>
 #include <asm/div64.h>
 #include <linux/pci.h>
-#include <linux/smp_lock.h>
 #include <linux/timer.h>
 #include <linux/byteorder/generic.h>
 #include <linux/firmware.h>
@@ -46,6 +45,9 @@ static int one_adapter = 1;
 module_param(one_adapter, int, 0444);
 MODULE_PARM_DESC(one_adapter, "Use only one adapter.");
 
+static int shutdown_workaround;
+module_param(shutdown_workaround, int, 0644);
+MODULE_PARM_DESC(shutdown_workaround, "Activate workaround for shutdown problem with some chipsets.");
 
 static int debug;
 module_param(debug, int, 0444);
@@ -120,7 +122,7 @@ static void demux_tasklet(unsigned long data)
                                                 Cur->ngeneBuffer.SR.Flags &=
                                                         ~0x40;
                                                 break;
-                                                /* Stop proccessing stream */
+                                                /* Stop processing stream */
                                         }
                                 } else {
                                         /* We got a valid buffer,
@@ -131,7 +133,7 @@ static void demux_tasklet(unsigned long data)
                                 printk(KERN_ERR DEVICE_NAME ": OOPS\n");
                                 if (chan->HWState == HWSTATE_RUN) {
                                         Cur->ngeneBuffer.SR.Flags &= ~0x40;
-                                        break;  /* Stop proccessing stream */
+                                        break;  /* Stop processing stream */
                                 }
                         }
                         if (chan->AudioDTOUpdated) {
@@ -144,7 +146,7 @@ static void demux_tasklet(unsigned long data)
                         }
                 } else {
                         if (chan->HWState == HWSTATE_RUN) {
-                                u32 Flags = 0;
+                                u32 Flags = chan->DataFormatFlags;
                                 IBufferExchange *exch1 = chan->pBufferExchange;
                                 IBufferExchange *exch2 = chan->pBufferExchange2;
                                 if (Cur->ngeneBuffer.SR.Flags & 0x01)
@@ -475,9 +477,9 @@ static u8 SPDIFConfiguration[10] = {
 
 /* Set NGENE I2S Config to transport stream compatible mode */
 
-static u8 TS_I2SConfiguration[4] = { 0x3E, 0x1A, 0x00, 0x00 }; /*3e 18 00 00 ?*/
+static u8 TS_I2SConfiguration[4] = { 0x3E, 0x18, 0x00, 0x00 };
 
-static u8 TS_I2SOutConfiguration[4] = { 0x80, 0x20, 0x00, 0x00 };
+static u8 TS_I2SOutConfiguration[4] = { 0x80, 0x04, 0x00, 0x00 };
 
 static u8 ITUDecoderSetup[4][16] = {
         {0x1c, 0x13, 0x01, 0x68, 0x3d, 0x90, 0x14, 0x20,  /* SDTV */
@@ -750,13 +752,11 @@ void set_transfer(struct ngene_channel *chan, int state)
                 if (chan->mode & NGENE_IO_TSOUT) {
                         chan->pBufferExchange = tsout_exchange;
                         /* 0x66666666 = 50MHz *2^33 /250MHz */
-                        chan->AudioDTOValue = 0x66666666;
-                        /* set_dto(chan, 38810700+1000); */
-                        /* set_dto(chan, 19392658); */
+                        chan->AudioDTOValue = 0x80000000;
+                        chan->AudioDTOUpdated = 1;
                 }
                 if (chan->mode & NGENE_IO_TSIN)
                         chan->pBufferExchange = tsin_exchange;
-                /* ngwritel(0, 0x9310); */
                 spin_unlock_irq(&chan->state_lock);
         } else
                 ;/* printk(KERN_INFO DEVICE_NAME ": lock=%08x\n",
@@ -1169,6 +1169,7 @@ static void ngene_release_buffers(struct ngene *dev)
                 iounmap(dev->iomem);
         free_common_buffers(dev);
         vfree(dev->tsout_buf);
+        vfree(dev->tsin_buf);
         vfree(dev->ain_buf);
         vfree(dev->vin_buf);
         vfree(dev);
@@ -1185,6 +1186,13 @@ static int ngene_get_buffers(struct ngene *dev)
                 dvb_ringbuffer_init(&dev->tsout_rbuf,
                                     dev->tsout_buf, TSOUT_BUF_SIZE);
         }
+        if (dev->card_info->io_type[2]&NGENE_IO_TSIN) {
+                dev->tsin_buf = vmalloc(TSIN_BUF_SIZE);
+                if (!dev->tsin_buf)
+                        return -ENOMEM;
+                dvb_ringbuffer_init(&dev->tsin_rbuf,
+                                    dev->tsin_buf, TSIN_BUF_SIZE);
+        }
         if (dev->card_info->io_type[2] & NGENE_IO_AIN) {
                 dev->ain_buf = vmalloc(AIN_BUF_SIZE);
                 if (!dev->ain_buf)
@@ -1258,6 +1266,10 @@ static int ngene_load_firm(struct ngene *dev)
                 fw_name = "ngene_17.fw";
                 dev->cmd_timeout_workaround = true;
                 break;
+        case 18:
+                size = 0;
+                fw_name = "ngene_18.fw";
+                break;
         }
 
         if (request_firmware(&fw, fw_name, &dev->pci_dev->dev) < 0) {
@@ -1267,6 +1279,8 @@ static int ngene_load_firm(struct ngene *dev)
                         ": Copy %s to your hotplug directory!\n", fw_name);
                 return -1;
         }
+        if (size == 0)
+                size = fw->size;
         if (size != fw->size) {
                 printk(KERN_ERR DEVICE_NAME
                         ": Firmware %s has invalid size!", fw_name);
@@ -1302,10 +1316,38 @@ static void ngene_stop(struct ngene *dev)
 #endif
 }
 
+static int ngene_buffer_config(struct ngene *dev)
+{
+        int stat;
+
+        if (dev->card_info->fw_version >= 17) {
+                u8 tsin12_config[6]   = { 0x60, 0x60, 0x00, 0x00, 0x00, 0x00 };
+                u8 tsin1234_config[6] = { 0x30, 0x30, 0x00, 0x30, 0x30, 0x00 };
+                u8 tsio1235_config[6] = { 0x30, 0x30, 0x00, 0x28, 0x00, 0x38 };
+                u8 *bconf = tsin12_config;
+
+                if (dev->card_info->io_type[2]&NGENE_IO_TSIN &&
+                    dev->card_info->io_type[3]&NGENE_IO_TSIN) {
+                        bconf = tsin1234_config;
+                        if (dev->card_info->io_type[4]&NGENE_IO_TSOUT &&
+                            dev->ci.en)
+                                bconf = tsio1235_config;
+                }
+                stat = ngene_command_config_free_buf(dev, bconf);
+        } else {
+                int bconf = BUFFER_CONFIG_4422;
+
+                if (dev->card_info->io_type[3] == NGENE_IO_TSIN)
+                        bconf = BUFFER_CONFIG_3333;
+                stat = ngene_command_config_buf(dev, bconf);
+        }
+        return stat;
+}
+
+
 static int ngene_start(struct ngene *dev)
 {
         int stat;
-        unsigned long flags;
         int i;
 
         pci_set_master(dev->pci_dev);
@@ -1338,6 +1380,8 @@ static int ngene_start(struct ngene *dev)
 #ifdef CONFIG_PCI_MSI
         /* enable MSI if kernel and card support it */
         if (pci_msi_enabled() && dev->card_info->msi_supported) {
+                unsigned long flags;
+
                 ngwritel(0, NGENE_INT_ENABLE);
                 free_irq(dev->pci_dev->irq, dev);
                 stat = pci_enable_msi(dev->pci_dev);
@@ -1365,23 +1409,6 @@ static int ngene_start(struct ngene *dev)
         if (stat < 0)
                 goto fail;
 
-        if (dev->card_info->fw_version == 17) {
-                u8 tsin4_config[6] = {
-                        3072 / 64, 3072 / 64, 0, 3072 / 64, 3072 / 64, 0};
-                u8 default_config[6] = {
-                        4096 / 64, 4096 / 64, 0, 2048 / 64, 2048 / 64, 0};
-                u8 *bconf = default_config;
-
-                if (dev->card_info->io_type[3] == NGENE_IO_TSIN)
-                        bconf = tsin4_config;
-                dprintk(KERN_DEBUG DEVICE_NAME ": FW 17 buffer config\n");
-                stat = ngene_command_config_free_buf(dev, bconf);
-        } else {
-                int bconf = BUFFER_CONFIG_4422;
-                if (dev->card_info->io_type[3] == NGENE_IO_TSIN)
-                        bconf = BUFFER_CONFIG_3333;
-                stat = ngene_command_config_buf(dev, bconf);
-        }
         if (!stat)
                 return stat;
 
@@ -1397,9 +1424,6 @@ fail2:
         return stat;
 }
 
-
-
-
 /****************************************************************************/
 /****************************************************************************/
 /****************************************************************************/
@@ -1408,20 +1432,25 @@ static void release_channel(struct ngene_channel *chan)
 {
         struct dvb_demux *dvbdemux = &chan->demux;
         struct ngene *dev = chan->dev;
-        struct ngene_info *ni = dev->card_info;
-        int io = ni->io_type[chan->number];
 
-        if (chan->dev->cmd_timeout_workaround && chan->running)
+        if (chan->running)
                 set_transfer(chan, 0);
 
         tasklet_kill(&chan->demux_tasklet);
 
-        if (io & (NGENE_IO_TSIN | NGENE_IO_TSOUT)) {
-                if (chan->fe) {
-                        dvb_unregister_frontend(chan->fe);
-                        dvb_frontend_detach(chan->fe);
-                        chan->fe = NULL;
-                }
+        if (chan->ci_dev) {
+                dvb_unregister_device(chan->ci_dev);
+                chan->ci_dev = NULL;
+        }
+
+        if (chan->fe) {
+                dvb_unregister_frontend(chan->fe);
+                dvb_frontend_detach(chan->fe);
+                chan->fe = NULL;
+        }
+
+        if (chan->has_demux) {
+                dvb_net_release(&chan->dvbnet);
                 dvbdemux->dmx.close(&dvbdemux->dmx);
                 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx,
                                               &chan->hw_frontend);
@@ -1429,9 +1458,12 @@ static void release_channel(struct ngene_channel *chan)
                                               &chan->mem_frontend);
                 dvb_dmxdev_release(&chan->dmxdev);
                 dvb_dmx_release(&chan->demux);
+                chan->has_demux = false;
+        }
 
-                if (chan->number == 0 || !one_adapter)
-                        dvb_unregister_adapter(&dev->adapter[chan->number]);
+        if (chan->has_adapter) {
+                dvb_unregister_adapter(&dev->adapter[chan->number]);
+                chan->has_adapter = false;
         }
 }
 
@@ -1449,9 +1481,27 @@ static int init_channel(struct ngene_channel *chan)
         chan->type = io;
         chan->mode = chan->type;        /* for now only one mode */
 
+        if (io & NGENE_IO_TSIN) {
+                chan->fe = NULL;
+                if (ni->demod_attach[nr]) {
+                        ret = ni->demod_attach[nr](chan);
+                        if (ret < 0)
+                                goto err;
+                }
+                if (chan->fe && ni->tuner_attach[nr]) {
+                        ret = ni->tuner_attach[nr](chan);
+                        if (ret < 0)
+                                goto err;
+                }
+        }
+
+        if (!dev->ci.en && (io & NGENE_IO_TSOUT))
+                return 0;
+
         if (io & (NGENE_IO_TSIN | NGENE_IO_TSOUT)) {
                 if (nr >= STREAM_AUDIOIN1)
                         chan->DataFormatFlags = DF_SWAP32;
+
                 if (nr == 0 || !one_adapter || dev->first_adapter == NULL) {
                         adapter = &dev->adapter[nr];
                         ret = dvb_register_adapter(adapter, "nGene",
@@ -1459,40 +1509,51 @@ static int init_channel(struct ngene_channel *chan)
                                                    &chan->dev->pci_dev->dev,
                                                    adapter_nr);
                         if (ret < 0)
-                                return ret;
+                                goto err;
                         if (dev->first_adapter == NULL)
                                 dev->first_adapter = adapter;
-                } else {
+                        chan->has_adapter = true;
+                } else
                         adapter = dev->first_adapter;
-                }
+        }
+
+        if (dev->ci.en && (io & NGENE_IO_TSOUT)) {
+                dvb_ca_en50221_init(adapter, dev->ci.en, 0, 1);
+                set_transfer(chan, 1);
+                chan->dev->channel[2].DataFormatFlags = DF_SWAP32;
+                set_transfer(&chan->dev->channel[2], 1);
+                dvb_register_device(adapter, &chan->ci_dev,
+                                    &ngene_dvbdev_ci, (void *) chan,
+                                    DVB_DEVICE_SEC);
+                if (!chan->ci_dev)
+                        goto err;
+        }
 
+        if (chan->fe) {
+                if (dvb_register_frontend(adapter, chan->fe) < 0)
+                        goto err;
+                chan->has_demux = true;
+        }
+
+        if (chan->has_demux) {
                 ret = my_dvb_dmx_ts_card_init(dvbdemux, "SW demux",
                                               ngene_start_feed,
                                               ngene_stop_feed, chan);
                 ret = my_dvb_dmxdev_ts_card_init(&chan->dmxdev, &chan->demux,
                                                  &chan->hw_frontend,
                                                  &chan->mem_frontend, adapter);
+                ret = dvb_net_init(adapter, &chan->dvbnet, &chan->demux.dmx);
         }
 
-        if (io & NGENE_IO_TSIN) {
+        return ret;
+
+err:
+        if (chan->fe) {
+                dvb_frontend_detach(chan->fe);
                 chan->fe = NULL;
-                if (ni->demod_attach[nr])
-                        ni->demod_attach[nr](chan);
-                if (chan->fe) {
-                        if (dvb_register_frontend(adapter, chan->fe) < 0) {
-                                if (chan->fe->ops.release)
-                                        chan->fe->ops.release(chan->fe);
-                                chan->fe = NULL;
-                        }
-                }
-                if (chan->fe && ni->tuner_attach[nr])
-                        if (ni->tuner_attach[nr] (chan) < 0) {
-                                printk(KERN_ERR DEVICE_NAME
-                                       ": Tuner attach failed on channel %d!\n",
-                                       nr);
-                        }
         }
-        return ret;
+        release_channel(chan);
+        return 0;
 }
 
 static int init_channels(struct ngene *dev)
@@ -1510,18 +1571,71 @@ static int init_channels(struct ngene *dev)
         return 0;
 }
 
+static void cxd_attach(struct ngene *dev)
+{
+        struct ngene_ci *ci = &dev->ci;
+
+        ci->en = cxd2099_attach(0x40, dev, &dev->channel[0].i2c_adapter);
+        ci->dev = dev;
+        return;
+}
+
+static void cxd_detach(struct ngene *dev)
+{
+        struct ngene_ci *ci = &dev->ci;
+
+        dvb_ca_en50221_release(ci->en);
+        kfree(ci->en);
+        ci->en = 0;
+}
+
+/***********************************/
+/* workaround for shutdown failure */
+/***********************************/
+
+static void ngene_unlink(struct ngene *dev)
+{
+        struct ngene_command com;
+
+        com.cmd.hdr.Opcode = CMD_MEM_WRITE;
+        com.cmd.hdr.Length = 3;
+        com.cmd.MemoryWrite.address = 0x910c;
+        com.cmd.MemoryWrite.data = 0xff;
+        com.in_len = 3;
+        com.out_len = 1;
+
+        down(&dev->cmd_mutex);
+        ngwritel(0, NGENE_INT_ENABLE);
+        ngene_command_mutex(dev, &com);
+        up(&dev->cmd_mutex);
+}
+
+void ngene_shutdown(struct pci_dev *pdev)
+{
+        struct ngene *dev = (struct ngene *)pci_get_drvdata(pdev);
+
+        if (!dev || !shutdown_workaround)
+                return;
+
+        printk(KERN_INFO DEVICE_NAME ": shutdown workaround...\n");
+        ngene_unlink(dev);
+        pci_disable_device(pdev);
+}
+
 /****************************************************************************/
 /* device probe/remove calls ************************************************/
 /****************************************************************************/
 
 void __devexit ngene_remove(struct pci_dev *pdev)
 {
-        struct ngene *dev = (struct ngene *)pci_get_drvdata(pdev);
+        struct ngene *dev = pci_get_drvdata(pdev);
         int i;
 
         tasklet_kill(&dev->event_tasklet);
         for (i = MAX_STREAM - 1; i >= 0; i--)
                 release_channel(&dev->channel[i]);
+        if (dev->ci.en)
+                cxd_detach(dev);
         ngene_stop(dev);
         ngene_release_buffers(dev);
         pci_set_drvdata(pdev, NULL);
@@ -1537,12 +1651,11 @@ int __devinit ngene_probe(struct pci_dev *pci_dev,
         if (pci_enable_device(pci_dev) < 0)
                 return -ENODEV;
 
-        dev = vmalloc(sizeof(struct ngene));
+        dev = vzalloc(sizeof(struct ngene));
         if (dev == NULL) {
                 stat = -ENOMEM;
                 goto fail0;
         }
-        memset(dev, 0, sizeof(struct ngene));
 
         dev->pci_dev = pci_dev;
         dev->card_info = (struct ngene_info *)id->driver_data;
@@ -1558,6 +1671,13 @@ int __devinit ngene_probe(struct pci_dev *pci_dev,
         if (stat < 0)
                 goto fail1;
 
+        cxd_attach(dev);
+
+        stat = ngene_buffer_config(dev);
+        if (stat < 0)
+                goto fail1;
+
+
         dev->i2c_current_bus = -1;
 
         /* Register DVB adapters and devices for both channels */
diff --git a/drivers/media/dvb/ngene/ngene-dvb.c b/drivers/media/dvb/ngene/ngene-dvb.c
index 48f980b21d66..0b4943233166 100644
--- a/drivers/media/dvb/ngene/ngene-dvb.c
+++ b/drivers/media/dvb/ngene/ngene-dvb.c
@@ -35,7 +35,6 @@
 #include <linux/io.h>
 #include <asm/div64.h>
 #include <linux/pci.h>
-#include <linux/smp_lock.h>
 #include <linux/timer.h>
 #include <linux/byteorder/generic.h>
 #include <linux/firmware.h>
@@ -48,6 +47,64 @@
 /* COMMAND API interface ****************************************************/
 /****************************************************************************/
 
+static ssize_t ts_write(struct file *file, const char *buf,
+                        size_t count, loff_t *ppos)
+{
+        struct dvb_device *dvbdev = file->private_data;
+        struct ngene_channel *chan = dvbdev->priv;
+        struct ngene *dev = chan->dev;
+
+        if (wait_event_interruptible(dev->tsout_rbuf.queue,
+                                     dvb_ringbuffer_free
+                                     (&dev->tsout_rbuf) >= count) < 0)
+                return 0;
+
+        dvb_ringbuffer_write(&dev->tsout_rbuf, buf, count);
+
+        return count;
+}
+
+static ssize_t ts_read(struct file *file, char *buf,
+                       size_t count, loff_t *ppos)
+{
+        struct dvb_device *dvbdev = file->private_data;
+        struct ngene_channel *chan = dvbdev->priv;
+        struct ngene *dev = chan->dev;
+        int left, avail;
+
+        left = count;
+        while (left) {
+                if (wait_event_interruptible(
+                            dev->tsin_rbuf.queue,
+                            dvb_ringbuffer_avail(&dev->tsin_rbuf) > 0) < 0)
+                        return -EAGAIN;
+                avail = dvb_ringbuffer_avail(&dev->tsin_rbuf);
+                if (avail > left)
+                        avail = left;
+                dvb_ringbuffer_read_user(&dev->tsin_rbuf, buf, avail);
+                left -= avail;
+                buf += avail;
+        }
+        return count;
+}
+
+static const struct file_operations ci_fops = {
+        .owner   = THIS_MODULE,
+        .read    = ts_read,
+        .write   = ts_write,
+        .open    = dvb_generic_open,
+        .release = dvb_generic_release,
+};
+
+struct dvb_device ngene_dvbdev_ci = {
+        .priv    = 0,
+        .readers = -1,
+        .writers = -1,
+        .users   = -1,
+        .fops    = &ci_fops,
+};
+
+
 /****************************************************************************/
 /* DVB functions and API interface ******************************************/
 /****************************************************************************/
@@ -64,10 +121,21 @@ static void swap_buffer(u32 *p, u32 len)
 void *tsin_exchange(void *priv, void *buf, u32 len, u32 clock, u32 flags)
 {
         struct ngene_channel *chan = priv;
+        struct ngene *dev = chan->dev;
 
 
-        if (chan->users > 0)
+        if (flags & DF_SWAP32)
+                swap_buffer(buf, len);
+        if (dev->ci.en && chan->number == 2) {
+                if (dvb_ringbuffer_free(&dev->tsin_rbuf) > len) {
+                        dvb_ringbuffer_write(&dev->tsin_rbuf, buf, len);
+                        wake_up_interruptible(&dev->tsin_rbuf.queue);
+                }
+                return 0;
+        }
+        if (chan->users > 0) {
                 dvb_dmx_swfilter(&chan->demux, buf, len);
+        }
         return NULL;
 }
 
diff --git a/drivers/media/dvb/ngene/ngene-i2c.c b/drivers/media/dvb/ngene/ngene-i2c.c
index 477fe0aade86..d28554f8ce99 100644
--- a/drivers/media/dvb/ngene/ngene-i2c.c
+++ b/drivers/media/dvb/ngene/ngene-i2c.c
@@ -37,7 +37,6 @@
 #include <asm/div64.h>
 #include <linux/pci.h>
 #include <linux/pci_ids.h>
-#include <linux/smp_lock.h>
 #include <linux/timer.h>
 #include <linux/byteorder/generic.h>
 #include <linux/firmware.h>
@@ -165,7 +164,6 @@ int ngene_i2c_init(struct ngene *dev, int dev_nr)
         struct i2c_adapter *adap = &(dev->channel[dev_nr].i2c_adapter);
 
         i2c_set_adapdata(adap, &(dev->channel[dev_nr]));
-        adap->class = I2C_CLASS_TV_DIGITAL | I2C_CLASS_TV_ANALOG;
 
         strcpy(adap->name, "nGene");
 
diff --git a/drivers/media/dvb/ngene/ngene.h b/drivers/media/dvb/ngene/ngene.h
index 8fb4200f83f8..40fce9e3ae66 100644
--- a/drivers/media/dvb/ngene/ngene.h
+++ b/drivers/media/dvb/ngene/ngene.h
@@ -36,8 +36,11 @@
 #include "dmxdev.h"
 #include "dvbdev.h"
 #include "dvb_demux.h"
+#include "dvb_ca_en50221.h"
 #include "dvb_frontend.h"
 #include "dvb_ringbuffer.h"
+#include "dvb_net.h"
+#include "cxd2099.h"
 
 #define DEVICE_NAME "ngene"
 
@@ -636,14 +639,18 @@ struct ngene_channel {
         int                   number;
         int                   type;
         int                   mode;
+        bool                  has_adapter;
+        bool                  has_demux;
 
         struct dvb_frontend  *fe;
         struct dmxdev         dmxdev;
         struct dvb_demux      demux;
+        struct dvb_net        dvbnet;
         struct dmx_frontend   hw_frontend;
         struct dmx_frontend   mem_frontend;
         int                   users;
         struct video_device  *v4l_dev;
+        struct dvb_device    *ci_dev;
         struct tasklet_struct demux_tasklet;
 
         struct SBufferHeader *nextBuffer;
@@ -710,6 +717,15 @@ struct ngene_channel {
         int running;
 };
 
+
+struct ngene_ci {
+        struct device         device;
+        struct i2c_adapter    i2c_adapter;
+
+        struct ngene         *dev;
+        struct dvb_ca_en50221 *en;
+};
+
 struct ngene;
 
 typedef void (rx_cb_t)(struct ngene *, u32, u8);
@@ -774,6 +790,10 @@ struct ngene {
 #define TSOUT_BUF_SIZE (512*188*8)
         struct dvb_ringbuffer tsout_rbuf;
 
+        u8                   *tsin_buf;
+#define TSIN_BUF_SIZE (512*188*8)
+        struct dvb_ringbuffer tsin_rbuf;
+
         u8                   *ain_buf;
 #define AIN_BUF_SIZE (128*1024)
         struct dvb_ringbuffer ain_rbuf;
@@ -785,6 +805,8 @@ struct ngene {
 
         unsigned long         exp_val;
         int prev_cmd;
+
+        struct ngene_ci       ci;
 };
 
 struct ngene_info {
@@ -863,6 +885,7 @@ struct ngene_buffer {
 int __devinit ngene_probe(struct pci_dev *pci_dev,
                           const struct pci_device_id *id);
 void __devexit ngene_remove(struct pci_dev *pdev);
+void ngene_shutdown(struct pci_dev *pdev);
 int ngene_command(struct ngene *dev, struct ngene_command *com);
 int ngene_command_gpio_set(struct ngene *dev, u8 select, u8 level);
 void set_transfer(struct ngene_channel *chan, int state);
@@ -872,6 +895,7 @@ void FillTSBuffer(void *Buffer, int Length, u32 Flags);
 int ngene_i2c_init(struct ngene *dev, int dev_nr);
 
 /* Provided by ngene-dvb.c */
+extern struct dvb_device ngene_dvbdev_ci;
 void *tsout_exchange(void *priv, void *buf, u32 len, u32 clock, u32 flags);
 void *tsin_exchange(void *priv, void *buf, u32 len, u32 clock, u32 flags);
 int ngene_start_feed(struct dvb_demux_feed *dvbdmxfeed);
diff --git a/drivers/media/dvb/pluto2/pluto2.c b/drivers/media/dvb/pluto2/pluto2.c
index 1c798219dc7c..7cb79ec685f0 100644
--- a/drivers/media/dvb/pluto2/pluto2.c
+++ b/drivers/media/dvb/pluto2/pluto2.c
@@ -294,13 +294,13 @@ static void pluto_dma_end(struct pluto *pluto, unsigned int nbpackets)
 
         /* Workaround for broken hardware:
          * [1] On startup NBPACKETS seems to contain an uninitialized value,
-         *     but no packets have been transfered.
+         *     but no packets have been transferred.
          * [2] Sometimes (actually very often) NBPACKETS stays at zero
-         *     although one packet has been transfered.
+         *     although one packet has been transferred.
          * [3] Sometimes (actually rarely), the card gets into an erroneous
          *     mode where it continuously generates interrupts, claiming it
-         *     has recieved nbpackets>TS_DMA_PACKETS packets, but no packet
-         *     has been transfered. Only a reset seems to solve this
+         *     has received nbpackets>TS_DMA_PACKETS packets, but no packet
+         *     has been transferred. Only a reset seems to solve this
          */
         if ((nbpackets == 0) || (nbpackets > TS_DMA_PACKETS)) {
                 unsigned int i = 0;
@@ -332,7 +332,7 @@ static irqreturn_t pluto_irq(int irq, void *dev_id)
         struct pluto *pluto = dev_id;
         u32 tscr;
 
-        /* check whether an interrupt occured on this device */
+        /* check whether an interrupt occurred on this device */
         tscr = pluto_readreg(pluto, REG_TSCR);
         if (!(tscr & (TSCR_DE | TSCR_OVR)))
                 return IRQ_NONE;
@@ -647,7 +647,6 @@ static int __devinit pluto2_probe(struct pci_dev *pdev,
         i2c_set_adapdata(&pluto->i2c_adap, pluto);
         strcpy(pluto->i2c_adap.name, DRIVER_NAME);
         pluto->i2c_adap.owner = THIS_MODULE;
-        pluto->i2c_adap.class = I2C_CLASS_TV_DIGITAL;
         pluto->i2c_adap.dev.parent = &pdev->dev;
         pluto->i2c_adap.algo_data = &pluto->i2c_bit;
         pluto->i2c_bit.data = pluto;
diff --git a/drivers/media/dvb/pt1/pt1.c b/drivers/media/dvb/pt1/pt1.c
index 69ad94934ec2..b81df5fafe26 100644
--- a/drivers/media/dvb/pt1/pt1.c
+++ b/drivers/media/dvb/pt1/pt1.c
@@ -1087,10 +1087,10 @@ pt1_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
         pt1_update_power(pt1);
 
         i2c_adap = &pt1->i2c_adap;
-        i2c_adap->class = I2C_CLASS_TV_DIGITAL;
         i2c_adap->algo = &pt1_i2c_algo;
         i2c_adap->algo_data = NULL;
         i2c_adap->dev.parent = &pdev->dev;
+        strcpy(i2c_adap->name, DRIVER_NAME);
         i2c_set_adapdata(i2c_adap, pt1);
         ret = i2c_add_adapter(i2c_adap);
         if (ret < 0)
@@ -1157,10 +1157,10 @@ err_pt1_disable_ram:
         pt1->power = 0;
         pt1->reset = 1;
         pt1_update_power(pt1);
-err_pt1_cleanup_adapters:
-        pt1_cleanup_adapters(pt1);
 err_i2c_del_adapter:
         i2c_del_adapter(i2c_adap);
+err_pt1_cleanup_adapters:
+        pt1_cleanup_adapters(pt1);
 err_kfree:
         pci_set_drvdata(pdev, NULL);
         kfree(pt1);
diff --git a/drivers/media/dvb/siano/Kconfig b/drivers/media/dvb/siano/Kconfig
index e520bceee0af..bc6456eb2c4f 100644
--- a/drivers/media/dvb/siano/Kconfig
+++ b/drivers/media/dvb/siano/Kconfig
@@ -4,7 +4,7 @@
 
 config SMS_SIANO_MDTV
         tristate "Siano SMS1xxx based MDTV receiver"
-        depends on DVB_CORE && IR_CORE && HAS_DMA
+        depends on DVB_CORE && RC_CORE && HAS_DMA
         ---help---
           Choose Y or M here if you have MDTV receiver with a Siano chipset.
 
diff --git a/drivers/media/dvb/siano/sms-cards.c b/drivers/media/dvb/siano/sms-cards.c
index 25b43e587fa6..af121db88ea0 100644
--- a/drivers/media/dvb/siano/sms-cards.c
+++ b/drivers/media/dvb/siano/sms-cards.c
@@ -64,7 +64,7 @@ static struct sms_board sms_boards[] = {
                 .type   = SMS_NOVA_B0,
                 .fw[DEVICE_MODE_ISDBT_BDA] = "sms1xxx-hcw-55xxx-isdbt-02.fw",
                 .fw[DEVICE_MODE_DVBT_BDA] = "sms1xxx-hcw-55xxx-dvbt-02.fw",
-                .rc_codes = RC_MAP_RC5_HAUPPAUGE_NEW,
+                .rc_codes = RC_MAP_HAUPPAUGE,
                 .board_cfg.leds_power = 26,
                 .board_cfg.led0 = 27,
                 .board_cfg.led1 = 28,
diff --git a/drivers/media/dvb/siano/smscoreapi.c b/drivers/media/dvb/siano/smscoreapi.c
index ff3b0fa901b3..78765ed28063 100644
--- a/drivers/media/dvb/siano/smscoreapi.c
+++ b/drivers/media/dvb/siano/smscoreapi.c
@@ -438,7 +438,7 @@ static int smscore_init_ir(struct smscore_device_t *coredev)
         int rc;
         void *buffer;
 
-        coredev->ir.input_dev = NULL;
+        coredev->ir.dev = NULL;
         ir_io = sms_get_board(smscore_get_board_id(coredev))->board_cfg.ir;
         if (ir_io) {/* only if IR port exist we use IR sub-module */
                 sms_info("IR loading");
@@ -1504,8 +1504,7 @@ int smscore_gpio_set_level(struct smscore_device_t *coredev, u8 PinNum,
                 u32 msgData[3]; /* keep it 3 ! */
         } *pMsg;
 
-        if ((NewLevel > 1) || (PinNum > MAX_GPIO_PIN_NUMBER) ||
-                        (PinNum > MAX_GPIO_PIN_NUMBER))
+        if ((NewLevel > 1) || (PinNum > MAX_GPIO_PIN_NUMBER))
                 return -EINVAL;
 
         totalLen = sizeof(struct SmsMsgHdr_ST) +
diff --git a/drivers/media/dvb/siano/smsdvb.c b/drivers/media/dvb/siano/smsdvb.c
index b80d09b035a1..37c594f82782 100644
--- a/drivers/media/dvb/siano/smsdvb.c
+++ b/drivers/media/dvb/siano/smsdvb.c
@@ -650,7 +650,7 @@ static int smsdvb_dvbt_set_frontend(struct dvb_frontend *fe,
                 if (status & FE_HAS_LOCK)
                         return ret;
 
-                /* previous tune didnt lock - enable LNA and tune again */
+                /* previous tune didn't lock - enable LNA and tune again */
                 sms_board_lna_control(client->coredev, 1);
         }
 
diff --git a/drivers/media/dvb/siano/smsir.c b/drivers/media/dvb/siano/smsir.c
index d0e4639ee9db..37bc5c4b8ad8 100644
--- a/drivers/media/dvb/siano/smsir.c
+++ b/drivers/media/dvb/siano/smsir.c
@@ -40,30 +40,29 @@ void sms_ir_event(struct smscore_device_t *coredev, const char *buf, int len)
         const s32 *samples = (const void *)buf;
 
         for (i = 0; i < len >> 2; i++) {
-                struct ir_raw_event ev;
+                DEFINE_IR_RAW_EVENT(ev);
 
                 ev.duration = abs(samples[i]) * 1000; /* Convert to ns */
                 ev.pulse = (samples[i] > 0) ? false : true;
 
-                ir_raw_event_store(coredev->ir.input_dev, &ev);
+                ir_raw_event_store(coredev->ir.dev, &ev);
         }
-        ir_raw_event_handle(coredev->ir.input_dev);
+        ir_raw_event_handle(coredev->ir.dev);
 }
 
 int sms_ir_init(struct smscore_device_t *coredev)
 {
-        struct input_dev *input_dev;
+        int err;
         int board_id = smscore_get_board_id(coredev);
+        struct rc_dev *dev;
 
-        sms_log("Allocating input device");
-        input_dev = input_allocate_device();
-        if (!input_dev) {
+        sms_log("Allocating rc device");
+        dev = rc_allocate_device();
+        if (!dev) {
                 sms_err("Not enough memory");
                 return -ENOMEM;
         }
 
-        coredev->ir.input_dev = input_dev;
-
         coredev->ir.controller = 0;     /* Todo: vega/nova SPI number */
         coredev->ir.timeout = IR_DEFAULT_TIMEOUT;
         sms_log("IR port %d, timeout %d ms",
@@ -75,38 +74,41 @@ int sms_ir_init(struct smscore_device_t *coredev)
         strlcpy(coredev->ir.phys, coredev->devpath, sizeof(coredev->ir.phys));
         strlcat(coredev->ir.phys, "/ir0", sizeof(coredev->ir.phys));
 
-        input_dev->name = coredev->ir.name;
-        input_dev->phys = coredev->ir.phys;
-        input_dev->dev.parent = coredev->device;
+        dev->input_name = coredev->ir.name;
+        dev->input_phys = coredev->ir.phys;
+        dev->dev.parent = coredev->device;
 
 #if 0
         /* TODO: properly initialize the parameters bellow */
-        input_dev->id.bustype = BUS_USB;
-        input_dev->id.version = 1;
-        input_dev->id.vendor = le16_to_cpu(dev->udev->descriptor.idVendor);
-        input_dev->id.product = le16_to_cpu(dev->udev->descriptor.idProduct);
+        dev->input_id.bustype = BUS_USB;
+        dev->input_id.version = 1;
+        dev->input_id.vendor = le16_to_cpu(dev->udev->descriptor.idVendor);
+        dev->input_id.product = le16_to_cpu(dev->udev->descriptor.idProduct);
 #endif
 
-        coredev->ir.props.priv = coredev;
-        coredev->ir.props.driver_type = RC_DRIVER_IR_RAW;
-        coredev->ir.props.allowed_protos = IR_TYPE_ALL;
+        dev->priv = coredev;
+        dev->driver_type = RC_DRIVER_IR_RAW;
+        dev->allowed_protos = RC_TYPE_ALL;
+        dev->map_name = sms_get_board(board_id)->rc_codes;
+        dev->driver_name = MODULE_NAME;
 
-        sms_log("Input device (IR) %s is set for key events", input_dev->name);
+        sms_log("Input device (IR) %s is set for key events", dev->input_name);
 
-        if (ir_input_register(input_dev, sms_get_board(board_id)->rc_codes,
-                              &coredev->ir.props, MODULE_NAME)) {
+        err = rc_register_device(dev);
+        if (err < 0) {
                 sms_err("Failed to register device");
-                input_free_device(input_dev);
-                return -EACCES;
+                rc_free_device(dev);
+                return err;
         }
 
+        coredev->ir.dev = dev;
         return 0;
 }
 
 void sms_ir_exit(struct smscore_device_t *coredev)
 {
-        if (coredev->ir.input_dev)
-                ir_input_unregister(coredev->ir.input_dev);
+        if (coredev->ir.dev)
+                rc_unregister_device(coredev->ir.dev);
 
         sms_log("");
 }
diff --git a/drivers/media/dvb/siano/smsir.h b/drivers/media/dvb/siano/smsir.h
index 926e247523bd..ae92b3a8587e 100644
--- a/drivers/media/dvb/siano/smsir.h
+++ b/drivers/media/dvb/siano/smsir.h
@@ -28,20 +28,19 @@ along with this program.  If not, see <http://www.gnu.org/licenses/>.
 #define __SMS_IR_H__
 
 #include <linux/input.h>
-#include <media/ir-core.h>
+#include <media/rc-core.h>
 
 #define IR_DEFAULT_TIMEOUT              100
 
 struct smscore_device_t;
 
 struct ir_t {
-        struct input_dev *input_dev;
+        struct rc_dev *dev;
         char name[40];
         char phys[32];
 
         char *rc_codes;
         u64 protocol;
-        struct ir_dev_props props;
 
         u32 timeout;
         u32 controller;
diff --git a/drivers/media/dvb/siano/smsusb.c b/drivers/media/dvb/siano/smsusb.c
index 50d4338610e0..0c8164a2cc36 100644
--- a/drivers/media/dvb/siano/smsusb.c
+++ b/drivers/media/dvb/siano/smsusb.c
@@ -288,8 +288,7 @@ static int smsusb1_setmode(void *context, int mode)
 
 static void smsusb_term_device(struct usb_interface *intf)
 {
-        struct smsusb_device_t *dev =
-                (struct smsusb_device_t *) usb_get_intfdata(intf);
+        struct smsusb_device_t *dev = usb_get_intfdata(intf);
 
         if (dev) {
                 smsusb_stop_streaming(dev);
@@ -298,9 +297,8 @@ static void smsusb_term_device(struct usb_interface *intf)
                 if (dev->coredev)
                         smscore_unregister_device(dev->coredev);
 
-                kfree(dev);
-
                 sms_info("device %p destroyed", dev);
+                kfree(dev);
         }
 
         usb_set_intfdata(intf, NULL);
@@ -445,8 +443,7 @@ static void smsusb_disconnect(struct usb_interface *intf)
 
 static int smsusb_suspend(struct usb_interface *intf, pm_message_t msg)
 {
-        struct smsusb_device_t *dev =
-                (struct smsusb_device_t *)usb_get_intfdata(intf);
+        struct smsusb_device_t *dev = usb_get_intfdata(intf);
         printk(KERN_INFO "%s: Entering status %d.\n", __func__, msg.event);
         smsusb_stop_streaming(dev);
         return 0;
@@ -455,8 +452,7 @@ static int smsusb_suspend(struct usb_interface *intf, pm_message_t msg)
 static int smsusb_resume(struct usb_interface *intf)
 {
         int rc, i;
-        struct smsusb_device_t *dev =
-                (struct smsusb_device_t *)usb_get_intfdata(intf);
+        struct smsusb_device_t *dev = usb_get_intfdata(intf);
         struct usb_device *udev = interface_to_usbdev(intf);
 
         printk(KERN_INFO "%s: Entering.\n", __func__);
diff --git a/drivers/media/dvb/ttpci/Kconfig b/drivers/media/dvb/ttpci/Kconfig
index debea8d1d31c..9d83ced69dd6 100644
--- a/drivers/media/dvb/ttpci/Kconfig
+++ b/drivers/media/dvb/ttpci/Kconfig
@@ -89,16 +89,17 @@ config DVB_BUDGET
 config DVB_BUDGET_CI
         tristate "Budget cards with onboard CI connector"
         depends on DVB_BUDGET_CORE && I2C
-        depends on INPUT # due to IR
         select DVB_STV0297 if !DVB_FE_CUSTOMISE
         select DVB_STV0299 if !DVB_FE_CUSTOMISE
         select DVB_TDA1004X if !DVB_FE_CUSTOMISE
         select DVB_STB0899 if !DVB_FE_CUSTOMISE
         select DVB_STB6100 if !DVB_FE_CUSTOMISE
         select DVB_LNBP21 if !DVB_FE_CUSTOMISE
+        select DVB_STV0288 if !DVB_FE_CUSTOMISE
+        select DVB_STB6000 if !DVB_FE_CUSTOMISE
         select DVB_TDA10023 if !DVB_FE_CUSTOMISE
         select MEDIA_TUNER_TDA827X if !MEDIA_TUNER_CUSTOMISE
-        depends on VIDEO_IR
+        depends on RC_CORE
         help
           Support for simple SAA7146 based DVB cards
           (so called Budget- or Nova-PCI cards) without onboard
diff --git a/drivers/media/dvb/ttpci/av7110.c b/drivers/media/dvb/ttpci/av7110.c
index a6be529eec5c..3d20719fce1a 100644
--- a/drivers/media/dvb/ttpci/av7110.c
+++ b/drivers/media/dvb/ttpci/av7110.c
@@ -26,7 +26,7 @@
  * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
  *
  *
- * the project's page is at http://www.linuxtv.org/dvb/
+ * the project's page is at http://www.linuxtv.org/ 
  */
 
 
@@ -730,6 +730,7 @@ static const struct file_operations dvb_osd_fops = {
         .unlocked_ioctl = dvb_generic_ioctl,
         .open           = dvb_generic_open,
         .release        = dvb_generic_release,
+        .llseek         = noop_llseek,
 };
 
 static struct dvb_device dvbdev_osd = {
@@ -2290,12 +2291,7 @@ static int frontend_init(struct av7110 *av7110)
 /* Budgetpatch note:
  * Original hardware design by Roberto Deza:
  * There is a DVB_Wiki at
- * http://212.227.36.83/linuxtv/wiki/index.php/Main_Page
- * where is described this 'DVB TT Budget Patch', on Card Modding:
- * http://212.227.36.83/linuxtv/wiki/index.php/DVB_TT_Budget_Patch
- * On the short description there is also a link to a external file,
- * with more details:
- * http://perso.wanadoo.es/jesussolano/Ttf_tsc1.zip
+ * http://www.linuxtv.org/
  *
  * New software triggering design by Emard that works on
  * original Roberto Deza's hardware:
@@ -2336,7 +2332,7 @@ static int frontend_init(struct av7110 *av7110)
  * increment. That's how the 7146 is programmed to do event
  * counting in this budget-patch.c
  * I *think* HPS setting has something to do with the phase
- * of HS but I cant be 100% sure in that.
+ * of HS but I can't be 100% sure in that.
  *
  * hardware debug note: a working budget card (including budget patch)
  * with vpeirq() interrupt setup in mode "0x90" (every 64K) will
@@ -2476,7 +2472,6 @@ static int __devinit av7110_attach(struct saa7146_dev* dev,
            get recognized before the main driver is fully loaded */
         saa7146_write(dev, GPIO_CTRL, 0x500000);
 
-        av7110->i2c_adap.class = I2C_CLASS_TV_DIGITAL;
         strlcpy(av7110->i2c_adap.name, pci_ext->ext_priv, sizeof(av7110->i2c_adap.name));
 
         saa7146_i2c_adapter_prepare(dev, &av7110->i2c_adap, SAA7146_I2C_BUS_BIT_RATE_120); /* 275 kHz */
@@ -2890,7 +2885,7 @@ MODULE_DEVICE_TABLE(pci, pci_tbl);
 
 
 static struct saa7146_extension av7110_extension_driver = {
-        .name           = "dvb",
+        .name           = "av7110",
         .flags          = SAA7146_USE_I2C_IRQ,
 
         .module         = THIS_MODULE,
diff --git a/drivers/media/dvb/ttpci/av7110_av.c b/drivers/media/dvb/ttpci/av7110_av.c
index 13efba942dac..952b33dbac4f 100644
--- a/drivers/media/dvb/ttpci/av7110_av.c
+++ b/drivers/media/dvb/ttpci/av7110_av.c
@@ -25,7 +25,7 @@
  * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
  *
  *
- * the project's page is at http://www.linuxtv.org/dvb/
+ * the project's page is at http://www.linuxtv.org/ 
  */
 
 #include <linux/types.h>
@@ -245,8 +245,11 @@ int av7110_pes_play(void *dest, struct dvb_ringbuffer *buf, int dlen)
                 return -1;
         }
         while (1) {
-                if ((len = dvb_ringbuffer_avail(buf)) < 6)
+                len = dvb_ringbuffer_avail(buf);
+                if (len < 6) {
+                        wake_up(&buf->queue);
                         return -1;
+                }
                 sync =  DVB_RINGBUFFER_PEEK(buf, 0) << 24;
                 sync |= DVB_RINGBUFFER_PEEK(buf, 1) << 16;
                 sync |= DVB_RINGBUFFER_PEEK(buf, 2) << 8;
@@ -1521,6 +1524,7 @@ static const struct file_operations dvb_video_fops = {
         .open           = dvb_video_open,
         .release        = dvb_video_release,
         .poll           = dvb_video_poll,
+        .llseek         = noop_llseek,
 };
 
 static struct dvb_device dvbdev_video = {
@@ -1539,6 +1543,7 @@ static const struct file_operations dvb_audio_fops = {
         .open           = dvb_audio_open,
         .release        = dvb_audio_release,
         .poll           = dvb_audio_poll,
+        .llseek         = noop_llseek,
 };
 
 static struct dvb_device dvbdev_audio = {
diff --git a/drivers/media/dvb/ttpci/av7110_ca.c b/drivers/media/dvb/ttpci/av7110_ca.c
index 4eba35a018e3..9fc1dd0ba4c3 100644
--- a/drivers/media/dvb/ttpci/av7110_ca.c
+++ b/drivers/media/dvb/ttpci/av7110_ca.c
@@ -25,7 +25,7 @@
  * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
  *
  *
- * the project's page is at http://www.linuxtv.org/dvb/
+ * the project's page is at http://www.linuxtv.org/ 
  */
 
 #include <linux/kernel.h>
@@ -277,7 +277,7 @@ static int dvb_ca_ioctl(struct file *file, unsigned int cmd, void *parg)
         {
                 ca_slot_info_t *info=(ca_slot_info_t *)parg;
 
-                if (info->num > 1)
+                if (info->num < 0 || info->num > 1)
                         return -EINVAL;
                 av7110->ci_slot[info->num].num = info->num;
                 av7110->ci_slot[info->num].type = FW_CI_LL_SUPPORT(av7110->arm_app) ?
@@ -353,6 +353,7 @@ static const struct file_operations dvb_ca_fops = {
         .open           = dvb_ca_open,
         .release        = dvb_generic_release,
         .poll           = dvb_ca_poll,
+        .llseek         = default_llseek,
 };
 
 static struct dvb_device dvbdev_ca = {
diff --git a/drivers/media/dvb/ttpci/av7110_hw.c b/drivers/media/dvb/ttpci/av7110_hw.c
index e162691b515d..f1cbfe526989 100644
--- a/drivers/media/dvb/ttpci/av7110_hw.c
+++ b/drivers/media/dvb/ttpci/av7110_hw.c
@@ -22,7 +22,7 @@
  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
  *
- * the project's page is at http://www.linuxtv.org/dvb/
+ * the project's page is at http://www.linuxtv.org/ 
  */
 
 /* for debugging ARM communication: */
diff --git a/drivers/media/dvb/ttpci/av7110_ir.c b/drivers/media/dvb/ttpci/av7110_ir.c
index b070e88d8c6b..908f272fe26c 100644
--- a/drivers/media/dvb/ttpci/av7110_ir.c
+++ b/drivers/media/dvb/ttpci/av7110_ir.c
@@ -312,6 +312,7 @@ static ssize_t av7110_ir_proc_write(struct file *file, const char __user *buffer
 static const struct file_operations av7110_ir_proc_fops = {
         .owner          = THIS_MODULE,
         .write          = av7110_ir_proc_write,
+        .llseek         = noop_llseek,
 };
 
 /* interrupt handler */
diff --git a/drivers/media/dvb/ttpci/av7110_v4l.c b/drivers/media/dvb/ttpci/av7110_v4l.c
index 8986d967d2f4..cdd31cae46c4 100644
--- a/drivers/media/dvb/ttpci/av7110_v4l.c
+++ b/drivers/media/dvb/ttpci/av7110_v4l.c
@@ -22,7 +22,7 @@
  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
  *
- * the project's page is at http://www.linuxtv.org/dvb/
+ * the project's page is at http://www.linuxtv.org/ 
  */
 
 #include <linux/kernel.h>
@@ -100,6 +100,7 @@ static struct v4l2_input inputs[4] = {
                 .tuner          = 0, /* ignored */
                 .std            = V4L2_STD_PAL_BG|V4L2_STD_NTSC_M,
                 .status         = 0,
+                .capabilities   = V4L2_IN_CAP_STD,
         }, {
                 .index          = 1,
                 .name           = "Television",
@@ -108,6 +109,7 @@ static struct v4l2_input inputs[4] = {
                 .tuner          = 0,
                 .std            = V4L2_STD_PAL_BG|V4L2_STD_NTSC_M,
                 .status         = 0,
+                .capabilities   = V4L2_IN_CAP_STD,
         }, {
                 .index          = 2,
                 .name           = "Video",
@@ -116,6 +118,7 @@ static struct v4l2_input inputs[4] = {
                 .tuner          = 0,
                 .std            = V4L2_STD_PAL_BG|V4L2_STD_NTSC_M,
                 .status         = 0,
+                .capabilities   = V4L2_IN_CAP_STD,
         }, {
                 .index          = 3,
                 .name           = "Y/C",
@@ -124,6 +127,7 @@ static struct v4l2_input inputs[4] = {
                 .tuner          = 0,
                 .std            = V4L2_STD_PAL_BG|V4L2_STD_NTSC_M,
                 .status         = 0,
+                .capabilities   = V4L2_IN_CAP_STD,
         }
 };
 
diff --git a/drivers/media/dvb/ttpci/budget-av.c b/drivers/media/dvb/ttpci/budget-av.c
index 983672aa2450..e957d7690bcc 100644
--- a/drivers/media/dvb/ttpci/budget-av.c
+++ b/drivers/media/dvb/ttpci/budget-av.c
@@ -30,7 +30,7 @@
  * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
  *
  *
- * the project's page is at http://www.linuxtv.org/dvb/
+ * the project's page is at http://www.linuxtv.org/ 
  */
 
 #include "budget.h"
@@ -1406,8 +1406,10 @@ static int budget_av_detach(struct saa7146_dev *dev)
 
 #define KNC1_INPUTS 2
 static struct v4l2_input knc1_inputs[KNC1_INPUTS] = {
-        {0, "Composite", V4L2_INPUT_TYPE_TUNER, 1, 0, V4L2_STD_PAL_BG | V4L2_STD_NTSC_M, 0},
-        {1, "S-Video", V4L2_INPUT_TYPE_CAMERA, 2, 0, V4L2_STD_PAL_BG | V4L2_STD_NTSC_M, 0},
+        { 0, "Composite", V4L2_INPUT_TYPE_TUNER, 1, 0,
+                V4L2_STD_PAL_BG | V4L2_STD_NTSC_M, 0, V4L2_IN_CAP_STD },
+        { 1, "S-Video", V4L2_INPUT_TYPE_CAMERA, 2, 0,
+                V4L2_STD_PAL_BG | V4L2_STD_NTSC_M, 0, V4L2_IN_CAP_STD },
 };
 
 static int vidioc_enum_input(struct file *file, void *fh, struct v4l2_input *i)
diff --git a/drivers/media/dvb/ttpci/budget-ci.c b/drivers/media/dvb/ttpci/budget-ci.c
index 13ac9e3ab121..926f299b5225 100644
--- a/drivers/media/dvb/ttpci/budget-ci.c
+++ b/drivers/media/dvb/ttpci/budget-ci.c
@@ -26,16 +26,15 @@
  * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
  *
  *
- * the project's page is at http://www.linuxtv.org/dvb/
+ * the project's page is at http://www.linuxtv.org/
  */
 
 #include <linux/module.h>
 #include <linux/errno.h>
 #include <linux/slab.h>
 #include <linux/interrupt.h>
-#include <linux/input.h>
 #include <linux/spinlock.h>
-#include <media/ir-core.h>
+#include <media/rc-core.h>
 
 #include "budget.h"
 
@@ -53,6 +52,7 @@
 #include "bsru6.h"
 #include "tda1002x.h"
 #include "tda827x.h"
+#include "bsbe1-d01a.h"
 
 #define MODULE_NAME "budget_ci"
 
@@ -96,13 +96,14 @@ MODULE_PARM_DESC(ir_debug, "enable debugging information for IR decoding");
 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
 
 struct budget_ci_ir {
-        struct input_dev *dev;
+        struct rc_dev *dev;
         struct tasklet_struct msp430_irq_tasklet;
         char name[72]; /* 40 + 32 for (struct saa7146_dev).name */
         char phys[32];
         int rc5_device;
         u32 ir_key;
         bool have_command;
+        bool full_rc5;          /* Outputs a full RC5 code */
 };
 
 struct budget_ci {
@@ -118,7 +119,7 @@ struct budget_ci {
 static void msp430_ir_interrupt(unsigned long data)
 {
         struct budget_ci *budget_ci = (struct budget_ci *) data;
-        struct input_dev *dev = budget_ci->ir.dev;
+        struct rc_dev *dev = budget_ci->ir.dev;
         u32 command = ttpci_budget_debiread(&budget_ci->budget, DEBINOSWAP, DEBIADDR_IR, 2, 1, 0) >> 8;
 
         /*
@@ -155,24 +156,29 @@ static void msp430_ir_interrupt(unsigned long data)
                 return;
         budget_ci->ir.have_command = false;
 
-        /* FIXME: We should generate complete scancodes with device info */
         if (budget_ci->ir.rc5_device != IR_DEVICE_ANY &&
             budget_ci->ir.rc5_device != (command & 0x1f))
                 return;
 
-        ir_keydown(dev, budget_ci->ir.ir_key, (command & 0x20) ? 1 : 0);
+        if (budget_ci->ir.full_rc5) {
+                rc_keydown(dev,
+                           budget_ci->ir.rc5_device <<8 | budget_ci->ir.ir_key,
+                           (command & 0x20) ? 1 : 0);
+                return;
+        }
+
+        /* FIXME: We should generate complete scancodes for all devices */
+        rc_keydown(dev, budget_ci->ir.ir_key, (command & 0x20) ? 1 : 0);
 }
 
 static int msp430_ir_init(struct budget_ci *budget_ci)
 {
         struct saa7146_dev *saa = budget_ci->budget.dev;
-        struct input_dev *input_dev = budget_ci->ir.dev;
+        struct rc_dev *dev;
         int error;
-        char *ir_codes = NULL;
 
-
-        budget_ci->ir.dev = input_dev = input_allocate_device();
-        if (!input_dev) {
+        dev = rc_allocate_device();
+        if (!dev) {
                 printk(KERN_ERR "budget_ci: IR interface initialisation failed\n");
                 return -ENOMEM;
         }
@@ -182,19 +188,20 @@ static int msp430_ir_init(struct budget_ci *budget_ci)
         snprintf(budget_ci->ir.phys, sizeof(budget_ci->ir.phys),
                  "pci-%s/ir0", pci_name(saa->pci));
 
-        input_dev->name = budget_ci->ir.name;
-
-        input_dev->phys = budget_ci->ir.phys;
-        input_dev->id.bustype = BUS_PCI;
-        input_dev->id.version = 1;
+        dev->driver_name = MODULE_NAME;
+        dev->input_name = budget_ci->ir.name;
+        dev->input_phys = budget_ci->ir.phys;
+        dev->input_id.bustype = BUS_PCI;
+        dev->input_id.version = 1;
+        dev->scanmask = 0xff;
         if (saa->pci->subsystem_vendor) {
-                input_dev->id.vendor = saa->pci->subsystem_vendor;
-                input_dev->id.product = saa->pci->subsystem_device;
+                dev->input_id.vendor = saa->pci->subsystem_vendor;
+                dev->input_id.product = saa->pci->subsystem_device;
         } else {
-                input_dev->id.vendor = saa->pci->vendor;
-                input_dev->id.product = saa->pci->device;
+                dev->input_id.vendor = saa->pci->vendor;
+                dev->input_id.product = saa->pci->device;
         }
-        input_dev->dev.parent = &saa->pci->dev;
+        dev->dev.parent = &saa->pci->dev;
 
         if (rc5_device < 0)
                 budget_ci->ir.rc5_device = IR_DEVICE_ANY;
@@ -208,7 +215,8 @@ static int msp430_ir_init(struct budget_ci *budget_ci)
         case 0x1011:
         case 0x1012:
                 /* The hauppauge keymap is a superset of these remotes */
-                ir_codes = RC_MAP_HAUPPAUGE_NEW;
+                dev->map_name = RC_MAP_HAUPPAUGE;
+                budget_ci->ir.full_rc5 = true;
 
                 if (rc5_device < 0)
                         budget_ci->ir.rc5_device = 0x1f;
@@ -217,24 +225,24 @@ static int msp430_ir_init(struct budget_ci *budget_ci)
         case 0x1017:
         case 0x1019:
         case 0x101a:
+        case 0x101b:
                 /* for the Technotrend 1500 bundled remote */
-                ir_codes = RC_MAP_TT_1500;
+                dev->map_name = RC_MAP_TT_1500;
                 break;
         default:
                 /* unknown remote */
-                ir_codes = RC_MAP_BUDGET_CI_OLD;
+                dev->map_name = RC_MAP_BUDGET_CI_OLD;
                 break;
         }
 
-        error = ir_input_register(input_dev, ir_codes, NULL, MODULE_NAME);
+        error = rc_register_device(dev);
         if (error) {
                 printk(KERN_ERR "budget_ci: could not init driver for IR device (code %d)\n", error);
+                rc_free_device(dev);
                 return error;
         }
 
-        /* note: these must be after input_register_device */
-        input_dev->rep[REP_DELAY] = 400;
-        input_dev->rep[REP_PERIOD] = 250;
+        budget_ci->ir.dev = dev;
 
         tasklet_init(&budget_ci->ir.msp430_irq_tasklet, msp430_ir_interrupt,
                      (unsigned long) budget_ci);
@@ -248,13 +256,12 @@ static int msp430_ir_init(struct budget_ci *budget_ci)
 static void msp430_ir_deinit(struct budget_ci *budget_ci)
 {
         struct saa7146_dev *saa = budget_ci->budget.dev;
-        struct input_dev *dev = budget_ci->ir.dev;
 
         SAA7146_IER_DISABLE(saa, MASK_06);
         saa7146_setgpio(saa, 3, SAA7146_GPIO_INPUT);
         tasklet_kill(&budget_ci->ir.msp430_irq_tasklet);
 
-        ir_input_unregister(dev);
+        rc_unregister_device(budget_ci->ir.dev);
 }
 
 static int ciintf_read_attribute_mem(struct dvb_ca_en50221 *ca, int slot, int address)
@@ -1383,6 +1390,23 @@ static void frontend_init(struct budget_ci *budget_ci)
                 }
                 break;
 
+        case 0x101b: /* TT S-1500B (BSBE1-D01A - STV0288/STB6000/LNBP21) */
+                budget_ci->budget.dvb_frontend = dvb_attach(stv0288_attach, &stv0288_bsbe1_d01a_config, &budget_ci->budget.i2c_adap);
+                if (budget_ci->budget.dvb_frontend) {
+                        if (dvb_attach(stb6000_attach, budget_ci->budget.dvb_frontend, 0x63, &budget_ci->budget.i2c_adap)) {
+                                if (!dvb_attach(lnbp21_attach, budget_ci->budget.dvb_frontend, &budget_ci->budget.i2c_adap, 0, 0)) {
+                                        printk(KERN_ERR "%s: No LNBP21 found!\n", __func__);
+                                        dvb_frontend_detach(budget_ci->budget.dvb_frontend);
+                                        budget_ci->budget.dvb_frontend = NULL;
+                                }
+                        } else {
+                                printk(KERN_ERR "%s: No STB6000 found!\n", __func__);
+                                dvb_frontend_detach(budget_ci->budget.dvb_frontend);
+                                budget_ci->budget.dvb_frontend = NULL;
+                        }
+                }
+                break;
+
         case 0x1019:            // TT S2-3200 PCI
                 /*
                  * NOTE! on some STB0899 versions, the internal PLL takes a longer time
@@ -1513,6 +1537,7 @@ MAKE_BUDGET_INFO(ttbtci, "TT-Budget-T-CI PCI", BUDGET_TT);
 MAKE_BUDGET_INFO(ttbcci, "TT-Budget-C-CI PCI", BUDGET_TT);
 MAKE_BUDGET_INFO(ttc1501, "TT-Budget C-1501 PCI", BUDGET_TT);
 MAKE_BUDGET_INFO(tt3200, "TT-Budget S2-3200 PCI", BUDGET_TT);
+MAKE_BUDGET_INFO(ttbs1500b, "TT-Budget S-1500B PCI", BUDGET_TT);
 
 static struct pci_device_id pci_tbl[] = {
         MAKE_EXTENSION_PCI(ttbci, 0x13c2, 0x100c),
@@ -1523,6 +1548,7 @@ static struct pci_device_id pci_tbl[] = {
         MAKE_EXTENSION_PCI(ttbs2, 0x13c2, 0x1017),
         MAKE_EXTENSION_PCI(ttc1501, 0x13c2, 0x101a),
         MAKE_EXTENSION_PCI(tt3200, 0x13c2, 0x1019),
+        MAKE_EXTENSION_PCI(ttbs1500b, 0x13c2, 0x101b),
         {
          .vendor = 0,
          }
diff --git a/drivers/media/dvb/ttpci/budget-core.c b/drivers/media/dvb/ttpci/budget-core.c
index ba18e56d5f11..37666d4edab6 100644
--- a/drivers/media/dvb/ttpci/budget-core.c
+++ b/drivers/media/dvb/ttpci/budget-core.c
@@ -31,7 +31,7 @@
  * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
  *
  *
- * the project's page is at http://www.linuxtv.org/dvb/
+ * the project's page is at http://www.linuxtv.org/ 
  */
 
 
@@ -495,8 +495,6 @@ int ttpci_budget_init(struct budget *budget, struct saa7146_dev *dev,
         if (bi->type != BUDGET_FS_ACTIVY)
                 saa7146_write(dev, GPIO_CTRL, 0x500000);        /* GPIO 3 = 1 */
 
-        budget->i2c_adap.class = I2C_CLASS_TV_DIGITAL;
-
         strlcpy(budget->i2c_adap.name, budget->card->name, sizeof(budget->i2c_adap.name));
 
         saa7146_i2c_adapter_prepare(dev, &budget->i2c_adap, SAA7146_I2C_BUS_BIT_RATE_120);
diff --git a/drivers/media/dvb/ttpci/budget-patch.c b/drivers/media/dvb/ttpci/budget-patch.c
index 9c92f9ddd223..3395d1a90516 100644
--- a/drivers/media/dvb/ttpci/budget-patch.c
+++ b/drivers/media/dvb/ttpci/budget-patch.c
@@ -27,7 +27,7 @@
  * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
  *
  *
- * the project's page is at http://www.linuxtv.org/dvb/
+ * the project's page is at http://www.linuxtv.org/ 
  */
 
 #include "av7110.h"
@@ -539,7 +539,7 @@ static int budget_patch_attach (struct saa7146_dev* dev, struct saa7146_pci_exte
 **      increment. That's how the 7146 is programmed to do event
 **      counting in this budget-patch.c
 **      I *think* HPS setting has something to do with the phase
-**      of HS but I cant be 100% sure in that.
+**      of HS but I can't be 100% sure in that.
 
 **      hardware debug note: a working budget card (including budget patch)
 **      with vpeirq() interrupt setup in mode "0x90" (every 64K) will
diff --git a/drivers/media/dvb/ttpci/budget.c b/drivers/media/dvb/ttpci/budget.c
index 874a10a9d493..d238fb9371a7 100644
--- a/drivers/media/dvb/ttpci/budget.c
+++ b/drivers/media/dvb/ttpci/budget.c
@@ -31,7 +31,7 @@
  * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
  *
  *
- * the project's page is at http://www.linuxtv.org/dvb/
+ * the project's page is at http://www.linuxtv.org/ 
  */
 
 #include "budget.h"
diff --git a/drivers/media/dvb/ttusb-budget/dvb-ttusb-budget.c b/drivers/media/dvb/ttusb-budget/dvb-ttusb-budget.c
index 4a3f2b8ea37d..420bb42d5233 100644
--- a/drivers/media/dvb/ttusb-budget/dvb-ttusb-budget.c
+++ b/drivers/media/dvb/ttusb-budget/dvb-ttusb-budget.c
@@ -52,7 +52,7 @@
     my TTUSB, so let it undef'd unless you want to implement another
     frontend. never tested.
 
-  DEBUG:
+  debug:
     define it to > 3 for really hardcore debugging. you probably don't want
     this unless the device doesn't load at all. > 2 for bandwidth statistics.
 */
@@ -134,20 +134,19 @@ struct ttusb {
 /* ugly workaround ... don't know why it's necessary to read */
 /* all result codes. */
 
-#define DEBUG 0
 static int ttusb_cmd(struct ttusb *ttusb,
               const u8 * data, int len, int needresult)
 {
         int actual_len;
         int err;
-#if DEBUG >= 3
         int i;
 
-        printk(">");
-        for (i = 0; i < len; ++i)
-                printk(" %02x", data[i]);
-        printk("\n");
-#endif
+        if (debug >= 3) {
+                printk(KERN_DEBUG ">");
+                for (i = 0; i < len; ++i)
+                        printk(KERN_CONT " %02x", data[i]);
+                printk(KERN_CONT "\n");
+        }
 
         if (mutex_lock_interruptible(&ttusb->semusb) < 0)
                 return -EAGAIN;
@@ -176,13 +175,15 @@ static int ttusb_cmd(struct ttusb *ttusb,
                 mutex_unlock(&ttusb->semusb);
                 return err;
         }
-#if DEBUG >= 3
-        actual_len = ttusb->last_result[3] + 4;
-        printk("<");
-        for (i = 0; i < actual_len; ++i)
-                printk(" %02x", ttusb->last_result[i]);
-        printk("\n");
-#endif
+
+        if (debug >= 3) {
+                actual_len = ttusb->last_result[3] + 4;
+                printk(KERN_DEBUG "<");
+                for (i = 0; i < actual_len; ++i)
+                        printk(KERN_CONT " %02x", ttusb->last_result[i]);
+                printk(KERN_CONT "\n");
+        }
+
         if (!needresult)
                 mutex_unlock(&ttusb->semusb);
         return 0;
@@ -334,6 +335,7 @@ static int ttusb_boot_dsp(struct ttusb *ttusb)
         err = ttusb_cmd(ttusb, b, 4, 0);
 
       done:
+        release_firmware(fw);
         if (err) {
                 dprintk("%s: usb_bulk_msg() failed, return value %i!\n",
                         __func__, err);
@@ -635,16 +637,13 @@ static void ttusb_process_frame(struct ttusb *ttusb, u8 * data, int len)
                                 ++ttusb->mux_state;
                         else {
                                 ttusb->mux_state = 0;
-#if DEBUG > 3
-                                if (ttusb->insync)
-                                        printk("%02x ", data[-1]);
-#else
                                 if (ttusb->insync) {
-                                        printk("%s: lost sync.\n",
+                                        dprintk("%s: %02x\n",
+                                                __func__, data[-1]);
+                                        printk(KERN_INFO "%s: lost sync.\n",
                                                __func__);
                                         ttusb->insync = 0;
                                 }
-#endif
                         }
                         break;
                 case 3:
@@ -743,6 +742,9 @@ static void ttusb_process_frame(struct ttusb *ttusb, u8 * data, int len)
 static void ttusb_iso_irq(struct urb *urb)
 {
         struct ttusb *ttusb = urb->context;
+        struct usb_iso_packet_descriptor *d;
+        u8 *data;
+        int len, i;
 
         if (!ttusb->iso_streaming)
                 return;
@@ -754,21 +756,14 @@ static void ttusb_iso_irq(struct urb *urb)
 #endif
 
         if (!urb->status) {
-                int i;
                 for (i = 0; i < urb->number_of_packets; ++i) {
-                        struct usb_iso_packet_descriptor *d;
-                        u8 *data;
-                        int len;
                         numpkt++;
                         if (time_after_eq(jiffies, lastj + HZ)) {
-#if DEBUG > 2
-                                printk
-                                    ("frames/s: %d (ts: %d, stuff %d, sec: %d, invalid: %d, all: %d)\n",
-                                     numpkt * HZ / (jiffies - lastj),
-                                     numts, numstuff, numsec, numinvalid,
-                                     numts + numstuff + numsec +
-                                     numinvalid);
-#endif
+                                dprintk("frames/s: %lu (ts: %d, stuff %d, "
+                                        "sec: %d, invalid: %d, all: %d)\n",
+                                        numpkt * HZ / (jiffies - lastj),
+                                        numts, numstuff, numsec, numinvalid,
+                                        numts + numstuff + numsec + numinvalid);
                                 numts = numstuff = numsec = numinvalid = 0;
                                 lastj = jiffies;
                                 numpkt = 0;
@@ -1694,7 +1689,6 @@ static int ttusb_probe(struct usb_interface *intf, const struct usb_device_id *i
 
         i2c_set_adapdata(&ttusb->i2c_adap, ttusb);
 
-        ttusb->i2c_adap.class             = I2C_CLASS_TV_DIGITAL;
         ttusb->i2c_adap.algo              = &ttusb_dec_algo;
         ttusb->i2c_adap.algo_data         = NULL;
         ttusb->i2c_adap.dev.parent        = &udev->dev;
diff --git a/drivers/media/dvb/ttusb-dec/ttusb_dec.c b/drivers/media/dvb/ttusb-dec/ttusb_dec.c
index fe1b8037b247..f893bffa08a3 100644
--- a/drivers/media/dvb/ttusb-dec/ttusb_dec.c
+++ b/drivers/media/dvb/ttusb-dec/ttusb_dec.c
@@ -234,7 +234,7 @@ static void ttusb_dec_handle_irq( struct urb *urb)
                  * (with buffer[3] == 0x40) in an intervall of ~100ms.
                  * But to handle this correctly we had to imlemenent some
                  * kind of timer which signals a 'key up' event if no
-                 * keyrepeat signal is recieved for lets say 200ms.
+                 * keyrepeat signal is received for lets say 200ms.
                  * this should/could be added later ...
                  * for now lets report each signal as a key down and up*/
                 dprintk("%s:rc signal:%d\n", __func__, buffer[4]);