diff options
Diffstat (limited to 'drivers/infiniband/hw')
93 files changed, 2800 insertions, 1189 deletions
diff --git a/drivers/infiniband/hw/amso1100/Kbuild b/drivers/infiniband/hw/amso1100/Kbuild index 06964c4af849..950dfabcd89d 100644 --- a/drivers/infiniband/hw/amso1100/Kbuild +++ b/drivers/infiniband/hw/amso1100/Kbuild | |||
@@ -1,6 +1,4 @@ | |||
1 | ifdef CONFIG_INFINIBAND_AMSO1100_DEBUG | 1 | ccflags-$(CONFIG_INFINIBAND_AMSO1100_DEBUG) := -DDEBUG |
2 | EXTRA_CFLAGS += -DDEBUG | ||
3 | endif | ||
4 | 2 | ||
5 | obj-$(CONFIG_INFINIBAND_AMSO1100) += iw_c2.o | 3 | obj-$(CONFIG_INFINIBAND_AMSO1100) += iw_c2.o |
6 | 4 | ||
diff --git a/drivers/infiniband/hw/amso1100/c2.c b/drivers/infiniband/hw/amso1100/c2.c index dc85d777578e..0cfc455630d0 100644 --- a/drivers/infiniband/hw/amso1100/c2.c +++ b/drivers/infiniband/hw/amso1100/c2.c | |||
@@ -47,6 +47,7 @@ | |||
47 | #include <linux/init.h> | 47 | #include <linux/init.h> |
48 | #include <linux/dma-mapping.h> | 48 | #include <linux/dma-mapping.h> |
49 | #include <linux/slab.h> | 49 | #include <linux/slab.h> |
50 | #include <linux/prefetch.h> | ||
50 | 51 | ||
51 | #include <asm/io.h> | 52 | #include <asm/io.h> |
52 | #include <asm/irq.h> | 53 | #include <asm/irq.h> |
diff --git a/drivers/infiniband/hw/amso1100/c2_ae.c b/drivers/infiniband/hw/amso1100/c2_ae.c index 62af74295dbe..24f9e3a90e8e 100644 --- a/drivers/infiniband/hw/amso1100/c2_ae.c +++ b/drivers/infiniband/hw/amso1100/c2_ae.c | |||
@@ -157,7 +157,7 @@ void c2_ae_event(struct c2_dev *c2dev, u32 mq_index) | |||
157 | int status; | 157 | int status; |
158 | 158 | ||
159 | /* | 159 | /* |
160 | * retreive the message | 160 | * retrieve the message |
161 | */ | 161 | */ |
162 | wr = c2_mq_consume(mq); | 162 | wr = c2_mq_consume(mq); |
163 | if (!wr) | 163 | if (!wr) |
diff --git a/drivers/infiniband/hw/amso1100/c2_intr.c b/drivers/infiniband/hw/amso1100/c2_intr.c index 3b5095470cb3..0ebe4e806b86 100644 --- a/drivers/infiniband/hw/amso1100/c2_intr.c +++ b/drivers/infiniband/hw/amso1100/c2_intr.c | |||
@@ -62,8 +62,8 @@ void c2_rnic_interrupt(struct c2_dev *c2dev) | |||
62 | static void handle_mq(struct c2_dev *c2dev, u32 mq_index) | 62 | static void handle_mq(struct c2_dev *c2dev, u32 mq_index) |
63 | { | 63 | { |
64 | if (c2dev->qptr_array[mq_index] == NULL) { | 64 | if (c2dev->qptr_array[mq_index] == NULL) { |
65 | pr_debug(KERN_INFO "handle_mq: stray activity for mq_index=%d\n", | 65 | pr_debug("handle_mq: stray activity for mq_index=%d\n", |
66 | mq_index); | 66 | mq_index); |
67 | return; | 67 | return; |
68 | } | 68 | } |
69 | 69 | ||
diff --git a/drivers/infiniband/hw/amso1100/c2_qp.c b/drivers/infiniband/hw/amso1100/c2_qp.c index d8f4bb8bf42e..0d7b6f23caff 100644 --- a/drivers/infiniband/hw/amso1100/c2_qp.c +++ b/drivers/infiniband/hw/amso1100/c2_qp.c | |||
@@ -612,7 +612,7 @@ void c2_free_qp(struct c2_dev *c2dev, struct c2_qp *qp) | |||
612 | c2_unlock_cqs(send_cq, recv_cq); | 612 | c2_unlock_cqs(send_cq, recv_cq); |
613 | 613 | ||
614 | /* | 614 | /* |
615 | * Destory qp in the rnic... | 615 | * Destroy qp in the rnic... |
616 | */ | 616 | */ |
617 | destroy_qp(c2dev, qp); | 617 | destroy_qp(c2dev, qp); |
618 | 618 | ||
diff --git a/drivers/infiniband/hw/amso1100/c2_rnic.c b/drivers/infiniband/hw/amso1100/c2_rnic.c index 85cfae4cad71..8c81992fa6db 100644 --- a/drivers/infiniband/hw/amso1100/c2_rnic.c +++ b/drivers/infiniband/hw/amso1100/c2_rnic.c | |||
@@ -459,13 +459,12 @@ int __devinit c2_rnic_init(struct c2_dev *c2dev) | |||
459 | IB_DEVICE_MEM_WINDOW); | 459 | IB_DEVICE_MEM_WINDOW); |
460 | 460 | ||
461 | /* Allocate the qptr_array */ | 461 | /* Allocate the qptr_array */ |
462 | c2dev->qptr_array = vmalloc(C2_MAX_CQS * sizeof(void *)); | 462 | c2dev->qptr_array = vzalloc(C2_MAX_CQS * sizeof(void *)); |
463 | if (!c2dev->qptr_array) { | 463 | if (!c2dev->qptr_array) { |
464 | return -ENOMEM; | 464 | return -ENOMEM; |
465 | } | 465 | } |
466 | 466 | ||
467 | /* Inialize the qptr_array */ | 467 | /* Initialize the qptr_array */ |
468 | memset(c2dev->qptr_array, 0, C2_MAX_CQS * sizeof(void *)); | ||
469 | c2dev->qptr_array[0] = (void *) &c2dev->req_vq; | 468 | c2dev->qptr_array[0] = (void *) &c2dev->req_vq; |
470 | c2dev->qptr_array[1] = (void *) &c2dev->rep_vq; | 469 | c2dev->qptr_array[1] = (void *) &c2dev->rep_vq; |
471 | c2dev->qptr_array[2] = (void *) &c2dev->aeq; | 470 | c2dev->qptr_array[2] = (void *) &c2dev->aeq; |
diff --git a/drivers/infiniband/hw/amso1100/c2_vq.c b/drivers/infiniband/hw/amso1100/c2_vq.c index 9ce7819b7b2e..2ec716fb2edb 100644 --- a/drivers/infiniband/hw/amso1100/c2_vq.c +++ b/drivers/infiniband/hw/amso1100/c2_vq.c | |||
@@ -107,7 +107,7 @@ struct c2_vq_req *vq_req_alloc(struct c2_dev *c2dev) | |||
107 | r = kmalloc(sizeof(struct c2_vq_req), GFP_KERNEL); | 107 | r = kmalloc(sizeof(struct c2_vq_req), GFP_KERNEL); |
108 | if (r) { | 108 | if (r) { |
109 | init_waitqueue_head(&r->wait_object); | 109 | init_waitqueue_head(&r->wait_object); |
110 | r->reply_msg = (u64) NULL; | 110 | r->reply_msg = 0; |
111 | r->event = 0; | 111 | r->event = 0; |
112 | r->cm_id = NULL; | 112 | r->cm_id = NULL; |
113 | r->qp = NULL; | 113 | r->qp = NULL; |
@@ -123,7 +123,7 @@ struct c2_vq_req *vq_req_alloc(struct c2_dev *c2dev) | |||
123 | */ | 123 | */ |
124 | void vq_req_free(struct c2_dev *c2dev, struct c2_vq_req *r) | 124 | void vq_req_free(struct c2_dev *c2dev, struct c2_vq_req *r) |
125 | { | 125 | { |
126 | r->reply_msg = (u64) NULL; | 126 | r->reply_msg = 0; |
127 | if (atomic_dec_and_test(&r->refcnt)) { | 127 | if (atomic_dec_and_test(&r->refcnt)) { |
128 | kfree(r); | 128 | kfree(r); |
129 | } | 129 | } |
@@ -151,7 +151,7 @@ void vq_req_get(struct c2_dev *c2dev, struct c2_vq_req *r) | |||
151 | void vq_req_put(struct c2_dev *c2dev, struct c2_vq_req *r) | 151 | void vq_req_put(struct c2_dev *c2dev, struct c2_vq_req *r) |
152 | { | 152 | { |
153 | if (atomic_dec_and_test(&r->refcnt)) { | 153 | if (atomic_dec_and_test(&r->refcnt)) { |
154 | if (r->reply_msg != (u64) NULL) | 154 | if (r->reply_msg != 0) |
155 | vq_repbuf_free(c2dev, | 155 | vq_repbuf_free(c2dev, |
156 | (void *) (unsigned long) r->reply_msg); | 156 | (void *) (unsigned long) r->reply_msg); |
157 | kfree(r); | 157 | kfree(r); |
diff --git a/drivers/infiniband/hw/amso1100/c2_wr.h b/drivers/infiniband/hw/amso1100/c2_wr.h index c65fbdd6e469..8d4b4ca463ca 100644 --- a/drivers/infiniband/hw/amso1100/c2_wr.h +++ b/drivers/infiniband/hw/amso1100/c2_wr.h | |||
@@ -131,7 +131,7 @@ enum c2wr_ids { | |||
131 | * All the preceding IDs are fixed, and must not change. | 131 | * All the preceding IDs are fixed, and must not change. |
132 | * You can add new IDs, but must not remove or reorder | 132 | * You can add new IDs, but must not remove or reorder |
133 | * any IDs. If you do, YOU will ruin any hope of | 133 | * any IDs. If you do, YOU will ruin any hope of |
134 | * compatability between versions. | 134 | * compatibility between versions. |
135 | */ | 135 | */ |
136 | CCWR_LAST, | 136 | CCWR_LAST, |
137 | 137 | ||
@@ -242,7 +242,7 @@ enum c2_acf { | |||
242 | /* | 242 | /* |
243 | * to fix bug 1815 we define the max size allowable of the | 243 | * to fix bug 1815 we define the max size allowable of the |
244 | * terminate message (per the IETF spec).Refer to the IETF | 244 | * terminate message (per the IETF spec).Refer to the IETF |
245 | * protocal specification, section 12.1.6, page 64) | 245 | * protocol specification, section 12.1.6, page 64) |
246 | * The message is prefixed by 20 types of DDP info. | 246 | * The message is prefixed by 20 types of DDP info. |
247 | * | 247 | * |
248 | * Then the message has 6 bytes for the terminate control | 248 | * Then the message has 6 bytes for the terminate control |
diff --git a/drivers/infiniband/hw/cxgb3/Kconfig b/drivers/infiniband/hw/cxgb3/Kconfig index 2acec3fadf69..2b6352b85485 100644 --- a/drivers/infiniband/hw/cxgb3/Kconfig +++ b/drivers/infiniband/hw/cxgb3/Kconfig | |||
@@ -10,7 +10,7 @@ config INFINIBAND_CXGB3 | |||
10 | our website at <http://www.chelsio.com>. | 10 | our website at <http://www.chelsio.com>. |
11 | 11 | ||
12 | For customer support, please visit our customer support page at | 12 | For customer support, please visit our customer support page at |
13 | <http://www.chelsio.com/support.htm>. | 13 | <http://www.chelsio.com/support.html>. |
14 | 14 | ||
15 | Please send feedback to <linux-bugs@chelsio.com>. | 15 | Please send feedback to <linux-bugs@chelsio.com>. |
16 | 16 | ||
diff --git a/drivers/infiniband/hw/cxgb3/Makefile b/drivers/infiniband/hw/cxgb3/Makefile index 7e7b5a66f042..621619c794e5 100644 --- a/drivers/infiniband/hw/cxgb3/Makefile +++ b/drivers/infiniband/hw/cxgb3/Makefile | |||
@@ -1,10 +1,8 @@ | |||
1 | EXTRA_CFLAGS += -Idrivers/net/cxgb3 | 1 | ccflags-y := -Idrivers/net/cxgb3 |
2 | 2 | ||
3 | obj-$(CONFIG_INFINIBAND_CXGB3) += iw_cxgb3.o | 3 | obj-$(CONFIG_INFINIBAND_CXGB3) += iw_cxgb3.o |
4 | 4 | ||
5 | iw_cxgb3-y := iwch_cm.o iwch_ev.o iwch_cq.o iwch_qp.o iwch_mem.o \ | 5 | iw_cxgb3-y := iwch_cm.o iwch_ev.o iwch_cq.o iwch_qp.o iwch_mem.o \ |
6 | iwch_provider.o iwch.o cxio_hal.o cxio_resource.o | 6 | iwch_provider.o iwch.o cxio_hal.o cxio_resource.o |
7 | 7 | ||
8 | ifdef CONFIG_INFINIBAND_CXGB3_DEBUG | 8 | ccflags-$(CONFIG_INFINIBAND_CXGB3_DEBUG) += -DDEBUG |
9 | EXTRA_CFLAGS += -DDEBUG | ||
10 | endif | ||
diff --git a/drivers/infiniband/hw/cxgb3/cxio_hal.c b/drivers/infiniband/hw/cxgb3/cxio_hal.c index 005b7b52bc1e..c3f5aca4ef00 100644 --- a/drivers/infiniband/hw/cxgb3/cxio_hal.c +++ b/drivers/infiniband/hw/cxgb3/cxio_hal.c | |||
@@ -160,6 +160,7 @@ int cxio_create_cq(struct cxio_rdev *rdev_p, struct t3_cq *cq, int kernel) | |||
160 | struct rdma_cq_setup setup; | 160 | struct rdma_cq_setup setup; |
161 | int size = (1UL << (cq->size_log2)) * sizeof(struct t3_cqe); | 161 | int size = (1UL << (cq->size_log2)) * sizeof(struct t3_cqe); |
162 | 162 | ||
163 | size += 1; /* one extra page for storing cq-in-err state */ | ||
163 | cq->cqid = cxio_hal_get_cqid(rdev_p->rscp); | 164 | cq->cqid = cxio_hal_get_cqid(rdev_p->rscp); |
164 | if (!cq->cqid) | 165 | if (!cq->cqid) |
165 | return -ENOMEM; | 166 | return -ENOMEM; |
@@ -188,6 +189,7 @@ int cxio_create_cq(struct cxio_rdev *rdev_p, struct t3_cq *cq, int kernel) | |||
188 | return (rdev_p->t3cdev_p->ctl(rdev_p->t3cdev_p, RDMA_CQ_SETUP, &setup)); | 189 | return (rdev_p->t3cdev_p->ctl(rdev_p->t3cdev_p, RDMA_CQ_SETUP, &setup)); |
189 | } | 190 | } |
190 | 191 | ||
192 | #ifdef notyet | ||
191 | int cxio_resize_cq(struct cxio_rdev *rdev_p, struct t3_cq *cq) | 193 | int cxio_resize_cq(struct cxio_rdev *rdev_p, struct t3_cq *cq) |
192 | { | 194 | { |
193 | struct rdma_cq_setup setup; | 195 | struct rdma_cq_setup setup; |
@@ -199,6 +201,7 @@ int cxio_resize_cq(struct cxio_rdev *rdev_p, struct t3_cq *cq) | |||
199 | setup.ovfl_mode = 1; | 201 | setup.ovfl_mode = 1; |
200 | return (rdev_p->t3cdev_p->ctl(rdev_p->t3cdev_p, RDMA_CQ_SETUP, &setup)); | 202 | return (rdev_p->t3cdev_p->ctl(rdev_p->t3cdev_p, RDMA_CQ_SETUP, &setup)); |
201 | } | 203 | } |
204 | #endif | ||
202 | 205 | ||
203 | static u32 get_qpid(struct cxio_rdev *rdev_p, struct cxio_ucontext *uctx) | 206 | static u32 get_qpid(struct cxio_rdev *rdev_p, struct cxio_ucontext *uctx) |
204 | { | 207 | { |
diff --git a/drivers/infiniband/hw/cxgb3/cxio_wr.h b/drivers/infiniband/hw/cxgb3/cxio_wr.h index e5ddb63e7d23..83d2e19d31ae 100644 --- a/drivers/infiniband/hw/cxgb3/cxio_wr.h +++ b/drivers/infiniband/hw/cxgb3/cxio_wr.h | |||
@@ -689,7 +689,7 @@ struct t3_swrq { | |||
689 | * A T3 WQ implements both the SQ and RQ. | 689 | * A T3 WQ implements both the SQ and RQ. |
690 | */ | 690 | */ |
691 | struct t3_wq { | 691 | struct t3_wq { |
692 | union t3_wr *queue; /* DMA accessable memory */ | 692 | union t3_wr *queue; /* DMA accessible memory */ |
693 | dma_addr_t dma_addr; /* DMA address for HW */ | 693 | dma_addr_t dma_addr; /* DMA address for HW */ |
694 | DEFINE_DMA_UNMAP_ADDR(mapping); /* unmap kruft */ | 694 | DEFINE_DMA_UNMAP_ADDR(mapping); /* unmap kruft */ |
695 | u32 error; /* 1 once we go to ERROR */ | 695 | u32 error; /* 1 once we go to ERROR */ |
@@ -728,6 +728,22 @@ struct t3_cq { | |||
728 | #define CQ_VLD_ENTRY(ptr,size_log2,cqe) (Q_GENBIT(ptr,size_log2) == \ | 728 | #define CQ_VLD_ENTRY(ptr,size_log2,cqe) (Q_GENBIT(ptr,size_log2) == \ |
729 | CQE_GENBIT(*cqe)) | 729 | CQE_GENBIT(*cqe)) |
730 | 730 | ||
731 | struct t3_cq_status_page { | ||
732 | u32 cq_err; | ||
733 | }; | ||
734 | |||
735 | static inline int cxio_cq_in_error(struct t3_cq *cq) | ||
736 | { | ||
737 | return ((struct t3_cq_status_page *) | ||
738 | &cq->queue[1 << cq->size_log2])->cq_err; | ||
739 | } | ||
740 | |||
741 | static inline void cxio_set_cq_in_error(struct t3_cq *cq) | ||
742 | { | ||
743 | ((struct t3_cq_status_page *) | ||
744 | &cq->queue[1 << cq->size_log2])->cq_err = 1; | ||
745 | } | ||
746 | |||
731 | static inline void cxio_set_wq_in_error(struct t3_wq *wq) | 747 | static inline void cxio_set_wq_in_error(struct t3_wq *wq) |
732 | { | 748 | { |
733 | wq->queue->wq_in_err.err |= 1; | 749 | wq->queue->wq_in_err.err |= 1; |
diff --git a/drivers/infiniband/hw/cxgb3/iwch_cm.c b/drivers/infiniband/hw/cxgb3/iwch_cm.c index 13c88871dc3b..0a5008fbebac 100644 --- a/drivers/infiniband/hw/cxgb3/iwch_cm.c +++ b/drivers/infiniband/hw/cxgb3/iwch_cm.c | |||
@@ -338,23 +338,12 @@ static struct rtable *find_route(struct t3cdev *dev, __be32 local_ip, | |||
338 | __be16 peer_port, u8 tos) | 338 | __be16 peer_port, u8 tos) |
339 | { | 339 | { |
340 | struct rtable *rt; | 340 | struct rtable *rt; |
341 | struct flowi fl = { | 341 | struct flowi4 fl4; |
342 | .oif = 0, | 342 | |
343 | .nl_u = { | 343 | rt = ip_route_output_ports(&init_net, &fl4, NULL, peer_ip, local_ip, |
344 | .ip4_u = { | 344 | peer_port, local_port, IPPROTO_TCP, |
345 | .daddr = peer_ip, | 345 | tos, 0); |
346 | .saddr = local_ip, | 346 | if (IS_ERR(rt)) |
347 | .tos = tos} | ||
348 | }, | ||
349 | .proto = IPPROTO_TCP, | ||
350 | .uli_u = { | ||
351 | .ports = { | ||
352 | .sport = local_port, | ||
353 | .dport = peer_port} | ||
354 | } | ||
355 | }; | ||
356 | |||
357 | if (ip_route_output_flow(&init_net, &rt, &fl, NULL, 0)) | ||
358 | return NULL; | 347 | return NULL; |
359 | return rt; | 348 | return rt; |
360 | } | 349 | } |
@@ -925,7 +914,7 @@ static void process_mpa_reply(struct iwch_ep *ep, struct sk_buff *skb) | |||
925 | goto err; | 914 | goto err; |
926 | 915 | ||
927 | if (peer2peer && iwch_rqes_posted(ep->com.qp) == 0) { | 916 | if (peer2peer && iwch_rqes_posted(ep->com.qp) == 0) { |
928 | iwch_post_zb_read(ep->com.qp); | 917 | iwch_post_zb_read(ep); |
929 | } | 918 | } |
930 | 919 | ||
931 | goto out; | 920 | goto out; |
@@ -1089,37 +1078,45 @@ static int tx_ack(struct t3cdev *tdev, struct sk_buff *skb, void *ctx) | |||
1089 | struct iwch_ep *ep = ctx; | 1078 | struct iwch_ep *ep = ctx; |
1090 | struct cpl_wr_ack *hdr = cplhdr(skb); | 1079 | struct cpl_wr_ack *hdr = cplhdr(skb); |
1091 | unsigned int credits = ntohs(hdr->credits); | 1080 | unsigned int credits = ntohs(hdr->credits); |
1081 | unsigned long flags; | ||
1082 | int post_zb = 0; | ||
1092 | 1083 | ||
1093 | PDBG("%s ep %p credits %u\n", __func__, ep, credits); | 1084 | PDBG("%s ep %p credits %u\n", __func__, ep, credits); |
1094 | 1085 | ||
1095 | if (credits == 0) { | 1086 | if (credits == 0) { |
1096 | PDBG(KERN_ERR "%s 0 credit ack ep %p state %u\n", | 1087 | PDBG("%s 0 credit ack ep %p state %u\n", |
1097 | __func__, ep, state_read(&ep->com)); | 1088 | __func__, ep, state_read(&ep->com)); |
1098 | return CPL_RET_BUF_DONE; | 1089 | return CPL_RET_BUF_DONE; |
1099 | } | 1090 | } |
1100 | 1091 | ||
1092 | spin_lock_irqsave(&ep->com.lock, flags); | ||
1101 | BUG_ON(credits != 1); | 1093 | BUG_ON(credits != 1); |
1102 | dst_confirm(ep->dst); | 1094 | dst_confirm(ep->dst); |
1103 | if (!ep->mpa_skb) { | 1095 | if (!ep->mpa_skb) { |
1104 | PDBG("%s rdma_init wr_ack ep %p state %u\n", | 1096 | PDBG("%s rdma_init wr_ack ep %p state %u\n", |
1105 | __func__, ep, state_read(&ep->com)); | 1097 | __func__, ep, ep->com.state); |
1106 | if (ep->mpa_attr.initiator) { | 1098 | if (ep->mpa_attr.initiator) { |
1107 | PDBG("%s initiator ep %p state %u\n", | 1099 | PDBG("%s initiator ep %p state %u\n", |
1108 | __func__, ep, state_read(&ep->com)); | 1100 | __func__, ep, ep->com.state); |
1109 | if (peer2peer) | 1101 | if (peer2peer && ep->com.state == FPDU_MODE) |
1110 | iwch_post_zb_read(ep->com.qp); | 1102 | post_zb = 1; |
1111 | } else { | 1103 | } else { |
1112 | PDBG("%s responder ep %p state %u\n", | 1104 | PDBG("%s responder ep %p state %u\n", |
1113 | __func__, ep, state_read(&ep->com)); | 1105 | __func__, ep, ep->com.state); |
1114 | ep->com.rpl_done = 1; | 1106 | if (ep->com.state == MPA_REQ_RCVD) { |
1115 | wake_up(&ep->com.waitq); | 1107 | ep->com.rpl_done = 1; |
1108 | wake_up(&ep->com.waitq); | ||
1109 | } | ||
1116 | } | 1110 | } |
1117 | } else { | 1111 | } else { |
1118 | PDBG("%s lsm ack ep %p state %u freeing skb\n", | 1112 | PDBG("%s lsm ack ep %p state %u freeing skb\n", |
1119 | __func__, ep, state_read(&ep->com)); | 1113 | __func__, ep, ep->com.state); |
1120 | kfree_skb(ep->mpa_skb); | 1114 | kfree_skb(ep->mpa_skb); |
1121 | ep->mpa_skb = NULL; | 1115 | ep->mpa_skb = NULL; |
1122 | } | 1116 | } |
1117 | spin_unlock_irqrestore(&ep->com.lock, flags); | ||
1118 | if (post_zb) | ||
1119 | iwch_post_zb_read(ep); | ||
1123 | return CPL_RET_BUF_DONE; | 1120 | return CPL_RET_BUF_DONE; |
1124 | } | 1121 | } |
1125 | 1122 | ||
diff --git a/drivers/infiniband/hw/cxgb3/iwch_ev.c b/drivers/infiniband/hw/cxgb3/iwch_ev.c index 6afc89e7572c..71e0d845da3d 100644 --- a/drivers/infiniband/hw/cxgb3/iwch_ev.c +++ b/drivers/infiniband/hw/cxgb3/iwch_ev.c | |||
@@ -76,6 +76,14 @@ static void post_qp_event(struct iwch_dev *rnicp, struct iwch_cq *chp, | |||
76 | atomic_inc(&qhp->refcnt); | 76 | atomic_inc(&qhp->refcnt); |
77 | spin_unlock(&rnicp->lock); | 77 | spin_unlock(&rnicp->lock); |
78 | 78 | ||
79 | if (qhp->attr.state == IWCH_QP_STATE_RTS) { | ||
80 | attrs.next_state = IWCH_QP_STATE_TERMINATE; | ||
81 | iwch_modify_qp(qhp->rhp, qhp, IWCH_QP_ATTR_NEXT_STATE, | ||
82 | &attrs, 1); | ||
83 | if (send_term) | ||
84 | iwch_post_terminate(qhp, rsp_msg); | ||
85 | } | ||
86 | |||
79 | event.event = ib_event; | 87 | event.event = ib_event; |
80 | event.device = chp->ibcq.device; | 88 | event.device = chp->ibcq.device; |
81 | if (ib_event == IB_EVENT_CQ_ERR) | 89 | if (ib_event == IB_EVENT_CQ_ERR) |
@@ -86,13 +94,7 @@ static void post_qp_event(struct iwch_dev *rnicp, struct iwch_cq *chp, | |||
86 | if (qhp->ibqp.event_handler) | 94 | if (qhp->ibqp.event_handler) |
87 | (*qhp->ibqp.event_handler)(&event, qhp->ibqp.qp_context); | 95 | (*qhp->ibqp.event_handler)(&event, qhp->ibqp.qp_context); |
88 | 96 | ||
89 | if (qhp->attr.state == IWCH_QP_STATE_RTS) { | 97 | (*chp->ibcq.comp_handler)(&chp->ibcq, chp->ibcq.cq_context); |
90 | attrs.next_state = IWCH_QP_STATE_TERMINATE; | ||
91 | iwch_modify_qp(qhp->rhp, qhp, IWCH_QP_ATTR_NEXT_STATE, | ||
92 | &attrs, 1); | ||
93 | if (send_term) | ||
94 | iwch_post_terminate(qhp, rsp_msg); | ||
95 | } | ||
96 | 98 | ||
97 | if (atomic_dec_and_test(&qhp->refcnt)) | 99 | if (atomic_dec_and_test(&qhp->refcnt)) |
98 | wake_up(&qhp->wait); | 100 | wake_up(&qhp->wait); |
@@ -179,7 +181,6 @@ void iwch_ev_dispatch(struct cxio_rdev *rdev_p, struct sk_buff *skb) | |||
179 | case TPT_ERR_BOUND: | 181 | case TPT_ERR_BOUND: |
180 | case TPT_ERR_INVALIDATE_SHARED_MR: | 182 | case TPT_ERR_INVALIDATE_SHARED_MR: |
181 | case TPT_ERR_INVALIDATE_MR_WITH_MW_BOUND: | 183 | case TPT_ERR_INVALIDATE_MR_WITH_MW_BOUND: |
182 | (*chp->ibcq.comp_handler)(&chp->ibcq, chp->ibcq.cq_context); | ||
183 | post_qp_event(rnicp, chp, rsp_msg, IB_EVENT_QP_ACCESS_ERR, 1); | 184 | post_qp_event(rnicp, chp, rsp_msg, IB_EVENT_QP_ACCESS_ERR, 1); |
184 | break; | 185 | break; |
185 | 186 | ||
diff --git a/drivers/infiniband/hw/cxgb3/iwch_provider.c b/drivers/infiniband/hw/cxgb3/iwch_provider.c index fca0b4b747e4..2e2741307af4 100644 --- a/drivers/infiniband/hw/cxgb3/iwch_provider.c +++ b/drivers/infiniband/hw/cxgb3/iwch_provider.c | |||
@@ -154,6 +154,8 @@ static struct ib_cq *iwch_create_cq(struct ib_device *ibdev, int entries, int ve | |||
154 | struct iwch_create_cq_resp uresp; | 154 | struct iwch_create_cq_resp uresp; |
155 | struct iwch_create_cq_req ureq; | 155 | struct iwch_create_cq_req ureq; |
156 | struct iwch_ucontext *ucontext = NULL; | 156 | struct iwch_ucontext *ucontext = NULL; |
157 | static int warned; | ||
158 | size_t resplen; | ||
157 | 159 | ||
158 | PDBG("%s ib_dev %p entries %d\n", __func__, ibdev, entries); | 160 | PDBG("%s ib_dev %p entries %d\n", __func__, ibdev, entries); |
159 | rhp = to_iwch_dev(ibdev); | 161 | rhp = to_iwch_dev(ibdev); |
@@ -217,15 +219,26 @@ static struct ib_cq *iwch_create_cq(struct ib_device *ibdev, int entries, int ve | |||
217 | uresp.key = ucontext->key; | 219 | uresp.key = ucontext->key; |
218 | ucontext->key += PAGE_SIZE; | 220 | ucontext->key += PAGE_SIZE; |
219 | spin_unlock(&ucontext->mmap_lock); | 221 | spin_unlock(&ucontext->mmap_lock); |
220 | if (ib_copy_to_udata(udata, &uresp, sizeof (uresp))) { | 222 | mm->key = uresp.key; |
223 | mm->addr = virt_to_phys(chp->cq.queue); | ||
224 | if (udata->outlen < sizeof uresp) { | ||
225 | if (!warned++) | ||
226 | printk(KERN_WARNING MOD "Warning - " | ||
227 | "downlevel libcxgb3 (non-fatal).\n"); | ||
228 | mm->len = PAGE_ALIGN((1UL << uresp.size_log2) * | ||
229 | sizeof(struct t3_cqe)); | ||
230 | resplen = sizeof(struct iwch_create_cq_resp_v0); | ||
231 | } else { | ||
232 | mm->len = PAGE_ALIGN(((1UL << uresp.size_log2) + 1) * | ||
233 | sizeof(struct t3_cqe)); | ||
234 | uresp.memsize = mm->len; | ||
235 | resplen = sizeof uresp; | ||
236 | } | ||
237 | if (ib_copy_to_udata(udata, &uresp, resplen)) { | ||
221 | kfree(mm); | 238 | kfree(mm); |
222 | iwch_destroy_cq(&chp->ibcq); | 239 | iwch_destroy_cq(&chp->ibcq); |
223 | return ERR_PTR(-EFAULT); | 240 | return ERR_PTR(-EFAULT); |
224 | } | 241 | } |
225 | mm->key = uresp.key; | ||
226 | mm->addr = virt_to_phys(chp->cq.queue); | ||
227 | mm->len = PAGE_ALIGN((1UL << uresp.size_log2) * | ||
228 | sizeof (struct t3_cqe)); | ||
229 | insert_mmap(ucontext, mm); | 242 | insert_mmap(ucontext, mm); |
230 | } | 243 | } |
231 | PDBG("created cqid 0x%0x chp %p size 0x%0x, dma_addr 0x%0llx\n", | 244 | PDBG("created cqid 0x%0x chp %p size 0x%0x, dma_addr 0x%0llx\n", |
@@ -1414,6 +1427,7 @@ int iwch_register_device(struct iwch_dev *dev) | |||
1414 | dev->ibdev.post_send = iwch_post_send; | 1427 | dev->ibdev.post_send = iwch_post_send; |
1415 | dev->ibdev.post_recv = iwch_post_receive; | 1428 | dev->ibdev.post_recv = iwch_post_receive; |
1416 | dev->ibdev.get_protocol_stats = iwch_get_mib; | 1429 | dev->ibdev.get_protocol_stats = iwch_get_mib; |
1430 | dev->ibdev.uverbs_abi_ver = IWCH_UVERBS_ABI_VERSION; | ||
1417 | 1431 | ||
1418 | dev->ibdev.iwcm = kmalloc(sizeof(struct iw_cm_verbs), GFP_KERNEL); | 1432 | dev->ibdev.iwcm = kmalloc(sizeof(struct iw_cm_verbs), GFP_KERNEL); |
1419 | if (!dev->ibdev.iwcm) | 1433 | if (!dev->ibdev.iwcm) |
diff --git a/drivers/infiniband/hw/cxgb3/iwch_provider.h b/drivers/infiniband/hw/cxgb3/iwch_provider.h index a237d49bdcc9..9a342c9b220d 100644 --- a/drivers/infiniband/hw/cxgb3/iwch_provider.h +++ b/drivers/infiniband/hw/cxgb3/iwch_provider.h | |||
@@ -332,11 +332,9 @@ int iwch_bind_mw(struct ib_qp *qp, | |||
332 | struct ib_mw_bind *mw_bind); | 332 | struct ib_mw_bind *mw_bind); |
333 | int iwch_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc); | 333 | int iwch_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc); |
334 | int iwch_post_terminate(struct iwch_qp *qhp, struct respQ_msg_t *rsp_msg); | 334 | int iwch_post_terminate(struct iwch_qp *qhp, struct respQ_msg_t *rsp_msg); |
335 | int iwch_post_zb_read(struct iwch_qp *qhp); | 335 | int iwch_post_zb_read(struct iwch_ep *ep); |
336 | int iwch_register_device(struct iwch_dev *dev); | 336 | int iwch_register_device(struct iwch_dev *dev); |
337 | void iwch_unregister_device(struct iwch_dev *dev); | 337 | void iwch_unregister_device(struct iwch_dev *dev); |
338 | int iwch_quiesce_qps(struct iwch_cq *chp); | ||
339 | int iwch_resume_qps(struct iwch_cq *chp); | ||
340 | void stop_read_rep_timer(struct iwch_qp *qhp); | 338 | void stop_read_rep_timer(struct iwch_qp *qhp); |
341 | int iwch_register_mem(struct iwch_dev *rhp, struct iwch_pd *php, | 339 | int iwch_register_mem(struct iwch_dev *rhp, struct iwch_pd *php, |
342 | struct iwch_mr *mhp, int shift); | 340 | struct iwch_mr *mhp, int shift); |
diff --git a/drivers/infiniband/hw/cxgb3/iwch_qp.c b/drivers/infiniband/hw/cxgb3/iwch_qp.c index c64d27bf2c15..ecd313f359a4 100644 --- a/drivers/infiniband/hw/cxgb3/iwch_qp.c +++ b/drivers/infiniband/hw/cxgb3/iwch_qp.c | |||
@@ -738,7 +738,7 @@ static inline void build_term_codes(struct respQ_msg_t *rsp_msg, | |||
738 | } | 738 | } |
739 | } | 739 | } |
740 | 740 | ||
741 | int iwch_post_zb_read(struct iwch_qp *qhp) | 741 | int iwch_post_zb_read(struct iwch_ep *ep) |
742 | { | 742 | { |
743 | union t3_wr *wqe; | 743 | union t3_wr *wqe; |
744 | struct sk_buff *skb; | 744 | struct sk_buff *skb; |
@@ -761,10 +761,10 @@ int iwch_post_zb_read(struct iwch_qp *qhp) | |||
761 | wqe->read.local_len = cpu_to_be32(0); | 761 | wqe->read.local_len = cpu_to_be32(0); |
762 | wqe->read.local_to = cpu_to_be64(1); | 762 | wqe->read.local_to = cpu_to_be64(1); |
763 | wqe->send.wrh.op_seop_flags = cpu_to_be32(V_FW_RIWR_OP(T3_WR_READ)); | 763 | wqe->send.wrh.op_seop_flags = cpu_to_be32(V_FW_RIWR_OP(T3_WR_READ)); |
764 | wqe->send.wrh.gen_tid_len = cpu_to_be32(V_FW_RIWR_TID(qhp->ep->hwtid)| | 764 | wqe->send.wrh.gen_tid_len = cpu_to_be32(V_FW_RIWR_TID(ep->hwtid)| |
765 | V_FW_RIWR_LEN(flit_cnt)); | 765 | V_FW_RIWR_LEN(flit_cnt)); |
766 | skb->priority = CPL_PRIORITY_DATA; | 766 | skb->priority = CPL_PRIORITY_DATA; |
767 | return iwch_cxgb3_ofld_send(qhp->rhp->rdev.t3cdev_p, skb); | 767 | return iwch_cxgb3_ofld_send(ep->com.qp->rhp->rdev.t3cdev_p, skb); |
768 | } | 768 | } |
769 | 769 | ||
770 | /* | 770 | /* |
@@ -802,14 +802,12 @@ int iwch_post_terminate(struct iwch_qp *qhp, struct respQ_msg_t *rsp_msg) | |||
802 | /* | 802 | /* |
803 | * Assumes qhp lock is held. | 803 | * Assumes qhp lock is held. |
804 | */ | 804 | */ |
805 | static void __flush_qp(struct iwch_qp *qhp, unsigned long *flag) | 805 | static void __flush_qp(struct iwch_qp *qhp, struct iwch_cq *rchp, |
806 | struct iwch_cq *schp, unsigned long *flag) | ||
806 | { | 807 | { |
807 | struct iwch_cq *rchp, *schp; | ||
808 | int count; | 808 | int count; |
809 | int flushed; | 809 | int flushed; |
810 | 810 | ||
811 | rchp = get_chp(qhp->rhp, qhp->attr.rcq); | ||
812 | schp = get_chp(qhp->rhp, qhp->attr.scq); | ||
813 | 811 | ||
814 | PDBG("%s qhp %p rchp %p schp %p\n", __func__, qhp, rchp, schp); | 812 | PDBG("%s qhp %p rchp %p schp %p\n", __func__, qhp, rchp, schp); |
815 | /* take a ref on the qhp since we must release the lock */ | 813 | /* take a ref on the qhp since we must release the lock */ |
@@ -847,10 +845,23 @@ static void __flush_qp(struct iwch_qp *qhp, unsigned long *flag) | |||
847 | 845 | ||
848 | static void flush_qp(struct iwch_qp *qhp, unsigned long *flag) | 846 | static void flush_qp(struct iwch_qp *qhp, unsigned long *flag) |
849 | { | 847 | { |
850 | if (qhp->ibqp.uobject) | 848 | struct iwch_cq *rchp, *schp; |
849 | |||
850 | rchp = get_chp(qhp->rhp, qhp->attr.rcq); | ||
851 | schp = get_chp(qhp->rhp, qhp->attr.scq); | ||
852 | |||
853 | if (qhp->ibqp.uobject) { | ||
851 | cxio_set_wq_in_error(&qhp->wq); | 854 | cxio_set_wq_in_error(&qhp->wq); |
852 | else | 855 | cxio_set_cq_in_error(&rchp->cq); |
853 | __flush_qp(qhp, flag); | 856 | (*rchp->ibcq.comp_handler)(&rchp->ibcq, rchp->ibcq.cq_context); |
857 | if (schp != rchp) { | ||
858 | cxio_set_cq_in_error(&schp->cq); | ||
859 | (*schp->ibcq.comp_handler)(&schp->ibcq, | ||
860 | schp->ibcq.cq_context); | ||
861 | } | ||
862 | return; | ||
863 | } | ||
864 | __flush_qp(qhp, rchp, schp, flag); | ||
854 | } | 865 | } |
855 | 866 | ||
856 | 867 | ||
@@ -1138,59 +1149,3 @@ out: | |||
1138 | PDBG("%s exit state %d\n", __func__, qhp->attr.state); | 1149 | PDBG("%s exit state %d\n", __func__, qhp->attr.state); |
1139 | return ret; | 1150 | return ret; |
1140 | } | 1151 | } |
1141 | |||
1142 | static int quiesce_qp(struct iwch_qp *qhp) | ||
1143 | { | ||
1144 | spin_lock_irq(&qhp->lock); | ||
1145 | iwch_quiesce_tid(qhp->ep); | ||
1146 | qhp->flags |= QP_QUIESCED; | ||
1147 | spin_unlock_irq(&qhp->lock); | ||
1148 | return 0; | ||
1149 | } | ||
1150 | |||
1151 | static int resume_qp(struct iwch_qp *qhp) | ||
1152 | { | ||
1153 | spin_lock_irq(&qhp->lock); | ||
1154 | iwch_resume_tid(qhp->ep); | ||
1155 | qhp->flags &= ~QP_QUIESCED; | ||
1156 | spin_unlock_irq(&qhp->lock); | ||
1157 | return 0; | ||
1158 | } | ||
1159 | |||
1160 | int iwch_quiesce_qps(struct iwch_cq *chp) | ||
1161 | { | ||
1162 | int i; | ||
1163 | struct iwch_qp *qhp; | ||
1164 | |||
1165 | for (i=0; i < T3_MAX_NUM_QP; i++) { | ||
1166 | qhp = get_qhp(chp->rhp, i); | ||
1167 | if (!qhp) | ||
1168 | continue; | ||
1169 | if ((qhp->attr.rcq == chp->cq.cqid) && !qp_quiesced(qhp)) { | ||
1170 | quiesce_qp(qhp); | ||
1171 | continue; | ||
1172 | } | ||
1173 | if ((qhp->attr.scq == chp->cq.cqid) && !qp_quiesced(qhp)) | ||
1174 | quiesce_qp(qhp); | ||
1175 | } | ||
1176 | return 0; | ||
1177 | } | ||
1178 | |||
1179 | int iwch_resume_qps(struct iwch_cq *chp) | ||
1180 | { | ||
1181 | int i; | ||
1182 | struct iwch_qp *qhp; | ||
1183 | |||
1184 | for (i=0; i < T3_MAX_NUM_QP; i++) { | ||
1185 | qhp = get_qhp(chp->rhp, i); | ||
1186 | if (!qhp) | ||
1187 | continue; | ||
1188 | if ((qhp->attr.rcq == chp->cq.cqid) && qp_quiesced(qhp)) { | ||
1189 | resume_qp(qhp); | ||
1190 | continue; | ||
1191 | } | ||
1192 | if ((qhp->attr.scq == chp->cq.cqid) && qp_quiesced(qhp)) | ||
1193 | resume_qp(qhp); | ||
1194 | } | ||
1195 | return 0; | ||
1196 | } | ||
diff --git a/drivers/infiniband/hw/cxgb3/iwch_user.h b/drivers/infiniband/hw/cxgb3/iwch_user.h index cb7086f558c1..a277c31fcaf7 100644 --- a/drivers/infiniband/hw/cxgb3/iwch_user.h +++ b/drivers/infiniband/hw/cxgb3/iwch_user.h | |||
@@ -45,10 +45,18 @@ struct iwch_create_cq_req { | |||
45 | __u64 user_rptr_addr; | 45 | __u64 user_rptr_addr; |
46 | }; | 46 | }; |
47 | 47 | ||
48 | struct iwch_create_cq_resp_v0 { | ||
49 | __u64 key; | ||
50 | __u32 cqid; | ||
51 | __u32 size_log2; | ||
52 | }; | ||
53 | |||
48 | struct iwch_create_cq_resp { | 54 | struct iwch_create_cq_resp { |
49 | __u64 key; | 55 | __u64 key; |
50 | __u32 cqid; | 56 | __u32 cqid; |
51 | __u32 size_log2; | 57 | __u32 size_log2; |
58 | __u32 memsize; | ||
59 | __u32 reserved; | ||
52 | }; | 60 | }; |
53 | 61 | ||
54 | struct iwch_create_qp_resp { | 62 | struct iwch_create_qp_resp { |
diff --git a/drivers/infiniband/hw/cxgb4/Kconfig b/drivers/infiniband/hw/cxgb4/Kconfig index ccb85eaaad75..6b7e6c543534 100644 --- a/drivers/infiniband/hw/cxgb4/Kconfig +++ b/drivers/infiniband/hw/cxgb4/Kconfig | |||
@@ -10,7 +10,7 @@ config INFINIBAND_CXGB4 | |||
10 | our website at <http://www.chelsio.com>. | 10 | our website at <http://www.chelsio.com>. |
11 | 11 | ||
12 | For customer support, please visit our customer support page at | 12 | For customer support, please visit our customer support page at |
13 | <http://www.chelsio.com/support.htm>. | 13 | <http://www.chelsio.com/support.html>. |
14 | 14 | ||
15 | Please send feedback to <linux-bugs@chelsio.com>. | 15 | Please send feedback to <linux-bugs@chelsio.com>. |
16 | 16 | ||
diff --git a/drivers/infiniband/hw/cxgb4/Makefile b/drivers/infiniband/hw/cxgb4/Makefile index e31a499f0172..cd20b1342aec 100644 --- a/drivers/infiniband/hw/cxgb4/Makefile +++ b/drivers/infiniband/hw/cxgb4/Makefile | |||
@@ -1,4 +1,4 @@ | |||
1 | EXTRA_CFLAGS += -Idrivers/net/cxgb4 | 1 | ccflags-y := -Idrivers/net/cxgb4 |
2 | 2 | ||
3 | obj-$(CONFIG_INFINIBAND_CXGB4) += iw_cxgb4.o | 3 | obj-$(CONFIG_INFINIBAND_CXGB4) += iw_cxgb4.o |
4 | 4 | ||
diff --git a/drivers/infiniband/hw/cxgb4/cm.c b/drivers/infiniband/hw/cxgb4/cm.c index 32d352a88d50..31fb44085c9b 100644 --- a/drivers/infiniband/hw/cxgb4/cm.c +++ b/drivers/infiniband/hw/cxgb4/cm.c | |||
@@ -61,9 +61,9 @@ static char *states[] = { | |||
61 | NULL, | 61 | NULL, |
62 | }; | 62 | }; |
63 | 63 | ||
64 | static int dack_mode; | 64 | static int dack_mode = 1; |
65 | module_param(dack_mode, int, 0644); | 65 | module_param(dack_mode, int, 0644); |
66 | MODULE_PARM_DESC(dack_mode, "Delayed ack mode (default=0)"); | 66 | MODULE_PARM_DESC(dack_mode, "Delayed ack mode (default=1)"); |
67 | 67 | ||
68 | int c4iw_max_read_depth = 8; | 68 | int c4iw_max_read_depth = 8; |
69 | module_param(c4iw_max_read_depth, int, 0644); | 69 | module_param(c4iw_max_read_depth, int, 0644); |
@@ -117,9 +117,9 @@ static int rcv_win = 256 * 1024; | |||
117 | module_param(rcv_win, int, 0644); | 117 | module_param(rcv_win, int, 0644); |
118 | MODULE_PARM_DESC(rcv_win, "TCP receive window in bytes (default=256KB)"); | 118 | MODULE_PARM_DESC(rcv_win, "TCP receive window in bytes (default=256KB)"); |
119 | 119 | ||
120 | static int snd_win = 32 * 1024; | 120 | static int snd_win = 128 * 1024; |
121 | module_param(snd_win, int, 0644); | 121 | module_param(snd_win, int, 0644); |
122 | MODULE_PARM_DESC(snd_win, "TCP send window in bytes (default=32KB)"); | 122 | MODULE_PARM_DESC(snd_win, "TCP send window in bytes (default=128KB)"); |
123 | 123 | ||
124 | static struct workqueue_struct *workq; | 124 | static struct workqueue_struct *workq; |
125 | 125 | ||
@@ -172,7 +172,7 @@ static int c4iw_l2t_send(struct c4iw_rdev *rdev, struct sk_buff *skb, | |||
172 | error = cxgb4_l2t_send(rdev->lldi.ports[0], skb, l2e); | 172 | error = cxgb4_l2t_send(rdev->lldi.ports[0], skb, l2e); |
173 | if (error < 0) | 173 | if (error < 0) |
174 | kfree_skb(skb); | 174 | kfree_skb(skb); |
175 | return error; | 175 | return error < 0 ? error : 0; |
176 | } | 176 | } |
177 | 177 | ||
178 | int c4iw_ofld_send(struct c4iw_rdev *rdev, struct sk_buff *skb) | 178 | int c4iw_ofld_send(struct c4iw_rdev *rdev, struct sk_buff *skb) |
@@ -187,7 +187,7 @@ int c4iw_ofld_send(struct c4iw_rdev *rdev, struct sk_buff *skb) | |||
187 | error = cxgb4_ofld_send(rdev->lldi.ports[0], skb); | 187 | error = cxgb4_ofld_send(rdev->lldi.ports[0], skb); |
188 | if (error < 0) | 188 | if (error < 0) |
189 | kfree_skb(skb); | 189 | kfree_skb(skb); |
190 | return error; | 190 | return error < 0 ? error : 0; |
191 | } | 191 | } |
192 | 192 | ||
193 | static void release_tid(struct c4iw_rdev *rdev, u32 hwtid, struct sk_buff *skb) | 193 | static void release_tid(struct c4iw_rdev *rdev, u32 hwtid, struct sk_buff *skb) |
@@ -219,12 +219,11 @@ static void set_emss(struct c4iw_ep *ep, u16 opt) | |||
219 | 219 | ||
220 | static enum c4iw_ep_state state_read(struct c4iw_ep_common *epc) | 220 | static enum c4iw_ep_state state_read(struct c4iw_ep_common *epc) |
221 | { | 221 | { |
222 | unsigned long flags; | ||
223 | enum c4iw_ep_state state; | 222 | enum c4iw_ep_state state; |
224 | 223 | ||
225 | spin_lock_irqsave(&epc->lock, flags); | 224 | mutex_lock(&epc->mutex); |
226 | state = epc->state; | 225 | state = epc->state; |
227 | spin_unlock_irqrestore(&epc->lock, flags); | 226 | mutex_unlock(&epc->mutex); |
228 | return state; | 227 | return state; |
229 | } | 228 | } |
230 | 229 | ||
@@ -235,12 +234,10 @@ static void __state_set(struct c4iw_ep_common *epc, enum c4iw_ep_state new) | |||
235 | 234 | ||
236 | static void state_set(struct c4iw_ep_common *epc, enum c4iw_ep_state new) | 235 | static void state_set(struct c4iw_ep_common *epc, enum c4iw_ep_state new) |
237 | { | 236 | { |
238 | unsigned long flags; | 237 | mutex_lock(&epc->mutex); |
239 | |||
240 | spin_lock_irqsave(&epc->lock, flags); | ||
241 | PDBG("%s - %s -> %s\n", __func__, states[epc->state], states[new]); | 238 | PDBG("%s - %s -> %s\n", __func__, states[epc->state], states[new]); |
242 | __state_set(epc, new); | 239 | __state_set(epc, new); |
243 | spin_unlock_irqrestore(&epc->lock, flags); | 240 | mutex_unlock(&epc->mutex); |
244 | return; | 241 | return; |
245 | } | 242 | } |
246 | 243 | ||
@@ -251,8 +248,8 @@ static void *alloc_ep(int size, gfp_t gfp) | |||
251 | epc = kzalloc(size, gfp); | 248 | epc = kzalloc(size, gfp); |
252 | if (epc) { | 249 | if (epc) { |
253 | kref_init(&epc->kref); | 250 | kref_init(&epc->kref); |
254 | spin_lock_init(&epc->lock); | 251 | mutex_init(&epc->mutex); |
255 | init_waitqueue_head(&epc->waitq); | 252 | c4iw_init_wr_wait(&epc->wr_wait); |
256 | } | 253 | } |
257 | PDBG("%s alloc ep %p\n", __func__, epc); | 254 | PDBG("%s alloc ep %p\n", __func__, epc); |
258 | return epc; | 255 | return epc; |
@@ -318,23 +315,12 @@ static struct rtable *find_route(struct c4iw_dev *dev, __be32 local_ip, | |||
318 | __be16 peer_port, u8 tos) | 315 | __be16 peer_port, u8 tos) |
319 | { | 316 | { |
320 | struct rtable *rt; | 317 | struct rtable *rt; |
321 | struct flowi fl = { | 318 | struct flowi4 fl4; |
322 | .oif = 0, | 319 | |
323 | .nl_u = { | 320 | rt = ip_route_output_ports(&init_net, &fl4, NULL, peer_ip, local_ip, |
324 | .ip4_u = { | 321 | peer_port, local_port, IPPROTO_TCP, |
325 | .daddr = peer_ip, | 322 | tos, 0); |
326 | .saddr = local_ip, | 323 | if (IS_ERR(rt)) |
327 | .tos = tos} | ||
328 | }, | ||
329 | .proto = IPPROTO_TCP, | ||
330 | .uli_u = { | ||
331 | .ports = { | ||
332 | .sport = local_port, | ||
333 | .dport = peer_port} | ||
334 | } | ||
335 | }; | ||
336 | |||
337 | if (ip_route_output_flow(&init_net, &rt, &fl, NULL, 0)) | ||
338 | return NULL; | 324 | return NULL; |
339 | return rt; | 325 | return rt; |
340 | } | 326 | } |
@@ -383,7 +369,7 @@ static void send_flowc(struct c4iw_ep *ep, struct sk_buff *skb) | |||
383 | 16)) | FW_WR_FLOWID(ep->hwtid)); | 369 | 16)) | FW_WR_FLOWID(ep->hwtid)); |
384 | 370 | ||
385 | flowc->mnemval[0].mnemonic = FW_FLOWC_MNEM_PFNVFN; | 371 | flowc->mnemval[0].mnemonic = FW_FLOWC_MNEM_PFNVFN; |
386 | flowc->mnemval[0].val = cpu_to_be32(0); | 372 | flowc->mnemval[0].val = cpu_to_be32(PCI_FUNC(ep->com.dev->rdev.lldi.pdev->devfn) << 8); |
387 | flowc->mnemval[1].mnemonic = FW_FLOWC_MNEM_CH; | 373 | flowc->mnemval[1].mnemonic = FW_FLOWC_MNEM_CH; |
388 | flowc->mnemval[1].val = cpu_to_be32(ep->tx_chan); | 374 | flowc->mnemval[1].val = cpu_to_be32(ep->tx_chan); |
389 | flowc->mnemval[2].mnemonic = FW_FLOWC_MNEM_PORT; | 375 | flowc->mnemval[2].mnemonic = FW_FLOWC_MNEM_PORT; |
@@ -485,6 +471,7 @@ static int send_connect(struct c4iw_ep *ep) | |||
485 | TX_CHAN(ep->tx_chan) | | 471 | TX_CHAN(ep->tx_chan) | |
486 | SMAC_SEL(ep->smac_idx) | | 472 | SMAC_SEL(ep->smac_idx) | |
487 | DSCP(ep->tos) | | 473 | DSCP(ep->tos) | |
474 | ULP_MODE(ULP_MODE_TCPDDP) | | ||
488 | RCV_BUFSIZ(rcv_win>>10); | 475 | RCV_BUFSIZ(rcv_win>>10); |
489 | opt2 = RX_CHANNEL(0) | | 476 | opt2 = RX_CHANNEL(0) | |
490 | RSS_QUEUE_VALID | RSS_QUEUE(ep->rss_qid); | 477 | RSS_QUEUE_VALID | RSS_QUEUE(ep->rss_qid); |
@@ -1131,7 +1118,6 @@ static int abort_rpl(struct c4iw_dev *dev, struct sk_buff *skb) | |||
1131 | { | 1118 | { |
1132 | struct c4iw_ep *ep; | 1119 | struct c4iw_ep *ep; |
1133 | struct cpl_abort_rpl_rss *rpl = cplhdr(skb); | 1120 | struct cpl_abort_rpl_rss *rpl = cplhdr(skb); |
1134 | unsigned long flags; | ||
1135 | int release = 0; | 1121 | int release = 0; |
1136 | unsigned int tid = GET_TID(rpl); | 1122 | unsigned int tid = GET_TID(rpl); |
1137 | struct tid_info *t = dev->rdev.lldi.tids; | 1123 | struct tid_info *t = dev->rdev.lldi.tids; |
@@ -1139,7 +1125,7 @@ static int abort_rpl(struct c4iw_dev *dev, struct sk_buff *skb) | |||
1139 | ep = lookup_tid(t, tid); | 1125 | ep = lookup_tid(t, tid); |
1140 | PDBG("%s ep %p tid %u\n", __func__, ep, ep->hwtid); | 1126 | PDBG("%s ep %p tid %u\n", __func__, ep, ep->hwtid); |
1141 | BUG_ON(!ep); | 1127 | BUG_ON(!ep); |
1142 | spin_lock_irqsave(&ep->com.lock, flags); | 1128 | mutex_lock(&ep->com.mutex); |
1143 | switch (ep->com.state) { | 1129 | switch (ep->com.state) { |
1144 | case ABORTING: | 1130 | case ABORTING: |
1145 | __state_set(&ep->com, DEAD); | 1131 | __state_set(&ep->com, DEAD); |
@@ -1150,7 +1136,7 @@ static int abort_rpl(struct c4iw_dev *dev, struct sk_buff *skb) | |||
1150 | __func__, ep, ep->com.state); | 1136 | __func__, ep, ep->com.state); |
1151 | break; | 1137 | break; |
1152 | } | 1138 | } |
1153 | spin_unlock_irqrestore(&ep->com.lock, flags); | 1139 | mutex_unlock(&ep->com.mutex); |
1154 | 1140 | ||
1155 | if (release) | 1141 | if (release) |
1156 | release_ep_resources(ep); | 1142 | release_ep_resources(ep); |
@@ -1213,9 +1199,7 @@ static int pass_open_rpl(struct c4iw_dev *dev, struct sk_buff *skb) | |||
1213 | } | 1199 | } |
1214 | PDBG("%s ep %p status %d error %d\n", __func__, ep, | 1200 | PDBG("%s ep %p status %d error %d\n", __func__, ep, |
1215 | rpl->status, status2errno(rpl->status)); | 1201 | rpl->status, status2errno(rpl->status)); |
1216 | ep->com.rpl_err = status2errno(rpl->status); | 1202 | c4iw_wake_up(&ep->com.wr_wait, status2errno(rpl->status)); |
1217 | ep->com.rpl_done = 1; | ||
1218 | wake_up(&ep->com.waitq); | ||
1219 | 1203 | ||
1220 | return 0; | 1204 | return 0; |
1221 | } | 1205 | } |
@@ -1249,9 +1233,7 @@ static int close_listsrv_rpl(struct c4iw_dev *dev, struct sk_buff *skb) | |||
1249 | struct c4iw_listen_ep *ep = lookup_stid(t, stid); | 1233 | struct c4iw_listen_ep *ep = lookup_stid(t, stid); |
1250 | 1234 | ||
1251 | PDBG("%s ep %p\n", __func__, ep); | 1235 | PDBG("%s ep %p\n", __func__, ep); |
1252 | ep->com.rpl_err = status2errno(rpl->status); | 1236 | c4iw_wake_up(&ep->com.wr_wait, status2errno(rpl->status)); |
1253 | ep->com.rpl_done = 1; | ||
1254 | wake_up(&ep->com.waitq); | ||
1255 | return 0; | 1237 | return 0; |
1256 | } | 1238 | } |
1257 | 1239 | ||
@@ -1278,6 +1260,7 @@ static void accept_cr(struct c4iw_ep *ep, __be32 peer_ip, struct sk_buff *skb, | |||
1278 | TX_CHAN(ep->tx_chan) | | 1260 | TX_CHAN(ep->tx_chan) | |
1279 | SMAC_SEL(ep->smac_idx) | | 1261 | SMAC_SEL(ep->smac_idx) | |
1280 | DSCP(ep->tos) | | 1262 | DSCP(ep->tos) | |
1263 | ULP_MODE(ULP_MODE_TCPDDP) | | ||
1281 | RCV_BUFSIZ(rcv_win>>10); | 1264 | RCV_BUFSIZ(rcv_win>>10); |
1282 | opt2 = RX_CHANNEL(0) | | 1265 | opt2 = RX_CHANNEL(0) | |
1283 | RSS_QUEUE_VALID | RSS_QUEUE(ep->rss_qid); | 1266 | RSS_QUEUE_VALID | RSS_QUEUE(ep->rss_qid); |
@@ -1478,18 +1461,17 @@ static int peer_close(struct c4iw_dev *dev, struct sk_buff *skb) | |||
1478 | struct cpl_peer_close *hdr = cplhdr(skb); | 1461 | struct cpl_peer_close *hdr = cplhdr(skb); |
1479 | struct c4iw_ep *ep; | 1462 | struct c4iw_ep *ep; |
1480 | struct c4iw_qp_attributes attrs; | 1463 | struct c4iw_qp_attributes attrs; |
1481 | unsigned long flags; | ||
1482 | int disconnect = 1; | 1464 | int disconnect = 1; |
1483 | int release = 0; | 1465 | int release = 0; |
1484 | int closing = 0; | ||
1485 | struct tid_info *t = dev->rdev.lldi.tids; | 1466 | struct tid_info *t = dev->rdev.lldi.tids; |
1486 | unsigned int tid = GET_TID(hdr); | 1467 | unsigned int tid = GET_TID(hdr); |
1468 | int ret; | ||
1487 | 1469 | ||
1488 | ep = lookup_tid(t, tid); | 1470 | ep = lookup_tid(t, tid); |
1489 | PDBG("%s ep %p tid %u\n", __func__, ep, ep->hwtid); | 1471 | PDBG("%s ep %p tid %u\n", __func__, ep, ep->hwtid); |
1490 | dst_confirm(ep->dst); | 1472 | dst_confirm(ep->dst); |
1491 | 1473 | ||
1492 | spin_lock_irqsave(&ep->com.lock, flags); | 1474 | mutex_lock(&ep->com.mutex); |
1493 | switch (ep->com.state) { | 1475 | switch (ep->com.state) { |
1494 | case MPA_REQ_WAIT: | 1476 | case MPA_REQ_WAIT: |
1495 | __state_set(&ep->com, CLOSING); | 1477 | __state_set(&ep->com, CLOSING); |
@@ -1507,23 +1489,24 @@ static int peer_close(struct c4iw_dev *dev, struct sk_buff *skb) | |||
1507 | * in rdma connection migration (see c4iw_accept_cr()). | 1489 | * in rdma connection migration (see c4iw_accept_cr()). |
1508 | */ | 1490 | */ |
1509 | __state_set(&ep->com, CLOSING); | 1491 | __state_set(&ep->com, CLOSING); |
1510 | ep->com.rpl_done = 1; | ||
1511 | ep->com.rpl_err = -ECONNRESET; | ||
1512 | PDBG("waking up ep %p tid %u\n", ep, ep->hwtid); | 1492 | PDBG("waking up ep %p tid %u\n", ep, ep->hwtid); |
1513 | wake_up(&ep->com.waitq); | 1493 | c4iw_wake_up(&ep->com.wr_wait, -ECONNRESET); |
1514 | break; | 1494 | break; |
1515 | case MPA_REP_SENT: | 1495 | case MPA_REP_SENT: |
1516 | __state_set(&ep->com, CLOSING); | 1496 | __state_set(&ep->com, CLOSING); |
1517 | ep->com.rpl_done = 1; | ||
1518 | ep->com.rpl_err = -ECONNRESET; | ||
1519 | PDBG("waking up ep %p tid %u\n", ep, ep->hwtid); | 1497 | PDBG("waking up ep %p tid %u\n", ep, ep->hwtid); |
1520 | wake_up(&ep->com.waitq); | 1498 | c4iw_wake_up(&ep->com.wr_wait, -ECONNRESET); |
1521 | break; | 1499 | break; |
1522 | case FPDU_MODE: | 1500 | case FPDU_MODE: |
1523 | start_ep_timer(ep); | 1501 | start_ep_timer(ep); |
1524 | __state_set(&ep->com, CLOSING); | 1502 | __state_set(&ep->com, CLOSING); |
1525 | closing = 1; | 1503 | attrs.next_state = C4IW_QP_STATE_CLOSING; |
1526 | peer_close_upcall(ep); | 1504 | ret = c4iw_modify_qp(ep->com.qp->rhp, ep->com.qp, |
1505 | C4IW_QP_ATTR_NEXT_STATE, &attrs, 1); | ||
1506 | if (ret != -ECONNRESET) { | ||
1507 | peer_close_upcall(ep); | ||
1508 | disconnect = 1; | ||
1509 | } | ||
1527 | break; | 1510 | break; |
1528 | case ABORTING: | 1511 | case ABORTING: |
1529 | disconnect = 0; | 1512 | disconnect = 0; |
@@ -1550,12 +1533,7 @@ static int peer_close(struct c4iw_dev *dev, struct sk_buff *skb) | |||
1550 | default: | 1533 | default: |
1551 | BUG_ON(1); | 1534 | BUG_ON(1); |
1552 | } | 1535 | } |
1553 | spin_unlock_irqrestore(&ep->com.lock, flags); | 1536 | mutex_unlock(&ep->com.mutex); |
1554 | if (closing) { | ||
1555 | attrs.next_state = C4IW_QP_STATE_CLOSING; | ||
1556 | c4iw_modify_qp(ep->com.qp->rhp, ep->com.qp, | ||
1557 | C4IW_QP_ATTR_NEXT_STATE, &attrs, 1); | ||
1558 | } | ||
1559 | if (disconnect) | 1537 | if (disconnect) |
1560 | c4iw_ep_disconnect(ep, 0, GFP_KERNEL); | 1538 | c4iw_ep_disconnect(ep, 0, GFP_KERNEL); |
1561 | if (release) | 1539 | if (release) |
@@ -1581,7 +1559,6 @@ static int peer_abort(struct c4iw_dev *dev, struct sk_buff *skb) | |||
1581 | struct c4iw_qp_attributes attrs; | 1559 | struct c4iw_qp_attributes attrs; |
1582 | int ret; | 1560 | int ret; |
1583 | int release = 0; | 1561 | int release = 0; |
1584 | unsigned long flags; | ||
1585 | struct tid_info *t = dev->rdev.lldi.tids; | 1562 | struct tid_info *t = dev->rdev.lldi.tids; |
1586 | unsigned int tid = GET_TID(req); | 1563 | unsigned int tid = GET_TID(req); |
1587 | 1564 | ||
@@ -1591,9 +1568,15 @@ static int peer_abort(struct c4iw_dev *dev, struct sk_buff *skb) | |||
1591 | ep->hwtid); | 1568 | ep->hwtid); |
1592 | return 0; | 1569 | return 0; |
1593 | } | 1570 | } |
1594 | spin_lock_irqsave(&ep->com.lock, flags); | ||
1595 | PDBG("%s ep %p tid %u state %u\n", __func__, ep, ep->hwtid, | 1571 | PDBG("%s ep %p tid %u state %u\n", __func__, ep, ep->hwtid, |
1596 | ep->com.state); | 1572 | ep->com.state); |
1573 | |||
1574 | /* | ||
1575 | * Wake up any threads in rdma_init() or rdma_fini(). | ||
1576 | */ | ||
1577 | c4iw_wake_up(&ep->com.wr_wait, -ECONNRESET); | ||
1578 | |||
1579 | mutex_lock(&ep->com.mutex); | ||
1597 | switch (ep->com.state) { | 1580 | switch (ep->com.state) { |
1598 | case CONNECTING: | 1581 | case CONNECTING: |
1599 | break; | 1582 | break; |
@@ -1605,23 +1588,8 @@ static int peer_abort(struct c4iw_dev *dev, struct sk_buff *skb) | |||
1605 | connect_reply_upcall(ep, -ECONNRESET); | 1588 | connect_reply_upcall(ep, -ECONNRESET); |
1606 | break; | 1589 | break; |
1607 | case MPA_REP_SENT: | 1590 | case MPA_REP_SENT: |
1608 | ep->com.rpl_done = 1; | ||
1609 | ep->com.rpl_err = -ECONNRESET; | ||
1610 | PDBG("waking up ep %p\n", ep); | ||
1611 | wake_up(&ep->com.waitq); | ||
1612 | break; | 1591 | break; |
1613 | case MPA_REQ_RCVD: | 1592 | case MPA_REQ_RCVD: |
1614 | |||
1615 | /* | ||
1616 | * We're gonna mark this puppy DEAD, but keep | ||
1617 | * the reference on it until the ULP accepts or | ||
1618 | * rejects the CR. Also wake up anyone waiting | ||
1619 | * in rdma connection migration (see c4iw_accept_cr()). | ||
1620 | */ | ||
1621 | ep->com.rpl_done = 1; | ||
1622 | ep->com.rpl_err = -ECONNRESET; | ||
1623 | PDBG("waking up ep %p tid %u\n", ep, ep->hwtid); | ||
1624 | wake_up(&ep->com.waitq); | ||
1625 | break; | 1593 | break; |
1626 | case MORIBUND: | 1594 | case MORIBUND: |
1627 | case CLOSING: | 1595 | case CLOSING: |
@@ -1644,7 +1612,7 @@ static int peer_abort(struct c4iw_dev *dev, struct sk_buff *skb) | |||
1644 | break; | 1612 | break; |
1645 | case DEAD: | 1613 | case DEAD: |
1646 | PDBG("%s PEER_ABORT IN DEAD STATE!!!!\n", __func__); | 1614 | PDBG("%s PEER_ABORT IN DEAD STATE!!!!\n", __func__); |
1647 | spin_unlock_irqrestore(&ep->com.lock, flags); | 1615 | mutex_unlock(&ep->com.mutex); |
1648 | return 0; | 1616 | return 0; |
1649 | default: | 1617 | default: |
1650 | BUG_ON(1); | 1618 | BUG_ON(1); |
@@ -1655,7 +1623,7 @@ static int peer_abort(struct c4iw_dev *dev, struct sk_buff *skb) | |||
1655 | __state_set(&ep->com, DEAD); | 1623 | __state_set(&ep->com, DEAD); |
1656 | release = 1; | 1624 | release = 1; |
1657 | } | 1625 | } |
1658 | spin_unlock_irqrestore(&ep->com.lock, flags); | 1626 | mutex_unlock(&ep->com.mutex); |
1659 | 1627 | ||
1660 | rpl_skb = get_skb(skb, sizeof(*rpl), GFP_KERNEL); | 1628 | rpl_skb = get_skb(skb, sizeof(*rpl), GFP_KERNEL); |
1661 | if (!rpl_skb) { | 1629 | if (!rpl_skb) { |
@@ -1681,7 +1649,6 @@ static int close_con_rpl(struct c4iw_dev *dev, struct sk_buff *skb) | |||
1681 | struct c4iw_ep *ep; | 1649 | struct c4iw_ep *ep; |
1682 | struct c4iw_qp_attributes attrs; | 1650 | struct c4iw_qp_attributes attrs; |
1683 | struct cpl_close_con_rpl *rpl = cplhdr(skb); | 1651 | struct cpl_close_con_rpl *rpl = cplhdr(skb); |
1684 | unsigned long flags; | ||
1685 | int release = 0; | 1652 | int release = 0; |
1686 | struct tid_info *t = dev->rdev.lldi.tids; | 1653 | struct tid_info *t = dev->rdev.lldi.tids; |
1687 | unsigned int tid = GET_TID(rpl); | 1654 | unsigned int tid = GET_TID(rpl); |
@@ -1692,7 +1659,7 @@ static int close_con_rpl(struct c4iw_dev *dev, struct sk_buff *skb) | |||
1692 | BUG_ON(!ep); | 1659 | BUG_ON(!ep); |
1693 | 1660 | ||
1694 | /* The cm_id may be null if we failed to connect */ | 1661 | /* The cm_id may be null if we failed to connect */ |
1695 | spin_lock_irqsave(&ep->com.lock, flags); | 1662 | mutex_lock(&ep->com.mutex); |
1696 | switch (ep->com.state) { | 1663 | switch (ep->com.state) { |
1697 | case CLOSING: | 1664 | case CLOSING: |
1698 | __state_set(&ep->com, MORIBUND); | 1665 | __state_set(&ep->com, MORIBUND); |
@@ -1717,7 +1684,7 @@ static int close_con_rpl(struct c4iw_dev *dev, struct sk_buff *skb) | |||
1717 | BUG_ON(1); | 1684 | BUG_ON(1); |
1718 | break; | 1685 | break; |
1719 | } | 1686 | } |
1720 | spin_unlock_irqrestore(&ep->com.lock, flags); | 1687 | mutex_unlock(&ep->com.mutex); |
1721 | if (release) | 1688 | if (release) |
1722 | release_ep_resources(ep); | 1689 | release_ep_resources(ep); |
1723 | return 0; | 1690 | return 0; |
@@ -1725,23 +1692,24 @@ static int close_con_rpl(struct c4iw_dev *dev, struct sk_buff *skb) | |||
1725 | 1692 | ||
1726 | static int terminate(struct c4iw_dev *dev, struct sk_buff *skb) | 1693 | static int terminate(struct c4iw_dev *dev, struct sk_buff *skb) |
1727 | { | 1694 | { |
1728 | struct c4iw_ep *ep; | 1695 | struct cpl_rdma_terminate *rpl = cplhdr(skb); |
1729 | struct cpl_rdma_terminate *term = cplhdr(skb); | ||
1730 | struct tid_info *t = dev->rdev.lldi.tids; | 1696 | struct tid_info *t = dev->rdev.lldi.tids; |
1731 | unsigned int tid = GET_TID(term); | 1697 | unsigned int tid = GET_TID(rpl); |
1698 | struct c4iw_ep *ep; | ||
1699 | struct c4iw_qp_attributes attrs; | ||
1732 | 1700 | ||
1733 | ep = lookup_tid(t, tid); | 1701 | ep = lookup_tid(t, tid); |
1702 | BUG_ON(!ep); | ||
1734 | 1703 | ||
1735 | if (state_read(&ep->com) != FPDU_MODE) | 1704 | if (ep && ep->com.qp) { |
1736 | return 0; | 1705 | printk(KERN_WARNING MOD "TERM received tid %u qpid %u\n", tid, |
1706 | ep->com.qp->wq.sq.qid); | ||
1707 | attrs.next_state = C4IW_QP_STATE_TERMINATE; | ||
1708 | c4iw_modify_qp(ep->com.qp->rhp, ep->com.qp, | ||
1709 | C4IW_QP_ATTR_NEXT_STATE, &attrs, 1); | ||
1710 | } else | ||
1711 | printk(KERN_WARNING MOD "TERM received tid %u no ep/qp\n", tid); | ||
1737 | 1712 | ||
1738 | PDBG("%s ep %p tid %u\n", __func__, ep, ep->hwtid); | ||
1739 | skb_pull(skb, sizeof *term); | ||
1740 | PDBG("%s saving %d bytes of term msg\n", __func__, skb->len); | ||
1741 | skb_copy_from_linear_data(skb, ep->com.qp->attr.terminate_buffer, | ||
1742 | skb->len); | ||
1743 | ep->com.qp->attr.terminate_msg_len = skb->len; | ||
1744 | ep->com.qp->attr.is_terminate_local = 0; | ||
1745 | return 0; | 1713 | return 0; |
1746 | } | 1714 | } |
1747 | 1715 | ||
@@ -1762,8 +1730,8 @@ static int fw4_ack(struct c4iw_dev *dev, struct sk_buff *skb) | |||
1762 | ep = lookup_tid(t, tid); | 1730 | ep = lookup_tid(t, tid); |
1763 | PDBG("%s ep %p tid %u credits %u\n", __func__, ep, ep->hwtid, credits); | 1731 | PDBG("%s ep %p tid %u credits %u\n", __func__, ep, ep->hwtid, credits); |
1764 | if (credits == 0) { | 1732 | if (credits == 0) { |
1765 | PDBG(KERN_ERR "%s 0 credit ack ep %p tid %u state %u\n", | 1733 | PDBG("%s 0 credit ack ep %p tid %u state %u\n", |
1766 | __func__, ep, ep->hwtid, state_read(&ep->com)); | 1734 | __func__, ep, ep->hwtid, state_read(&ep->com)); |
1767 | return 0; | 1735 | return 0; |
1768 | } | 1736 | } |
1769 | 1737 | ||
@@ -2042,6 +2010,7 @@ int c4iw_create_listen(struct iw_cm_id *cm_id, int backlog) | |||
2042 | } | 2010 | } |
2043 | 2011 | ||
2044 | state_set(&ep->com, LISTEN); | 2012 | state_set(&ep->com, LISTEN); |
2013 | c4iw_init_wr_wait(&ep->com.wr_wait); | ||
2045 | err = cxgb4_create_server(ep->com.dev->rdev.lldi.ports[0], ep->stid, | 2014 | err = cxgb4_create_server(ep->com.dev->rdev.lldi.ports[0], ep->stid, |
2046 | ep->com.local_addr.sin_addr.s_addr, | 2015 | ep->com.local_addr.sin_addr.s_addr, |
2047 | ep->com.local_addr.sin_port, | 2016 | ep->com.local_addr.sin_port, |
@@ -2050,15 +2019,8 @@ int c4iw_create_listen(struct iw_cm_id *cm_id, int backlog) | |||
2050 | goto fail3; | 2019 | goto fail3; |
2051 | 2020 | ||
2052 | /* wait for pass_open_rpl */ | 2021 | /* wait for pass_open_rpl */ |
2053 | wait_event_timeout(ep->com.waitq, ep->com.rpl_done, C4IW_WR_TO); | 2022 | err = c4iw_wait_for_reply(&ep->com.dev->rdev, &ep->com.wr_wait, 0, 0, |
2054 | if (ep->com.rpl_done) | 2023 | __func__); |
2055 | err = ep->com.rpl_err; | ||
2056 | else { | ||
2057 | printk(KERN_ERR MOD "Device %s not responding!\n", | ||
2058 | pci_name(ep->com.dev->rdev.lldi.pdev)); | ||
2059 | ep->com.dev->rdev.flags = T4_FATAL_ERROR; | ||
2060 | err = -EIO; | ||
2061 | } | ||
2062 | if (!err) { | 2024 | if (!err) { |
2063 | cm_id->provider_data = ep; | 2025 | cm_id->provider_data = ep; |
2064 | goto out; | 2026 | goto out; |
@@ -2082,20 +2044,12 @@ int c4iw_destroy_listen(struct iw_cm_id *cm_id) | |||
2082 | 2044 | ||
2083 | might_sleep(); | 2045 | might_sleep(); |
2084 | state_set(&ep->com, DEAD); | 2046 | state_set(&ep->com, DEAD); |
2085 | ep->com.rpl_done = 0; | 2047 | c4iw_init_wr_wait(&ep->com.wr_wait); |
2086 | ep->com.rpl_err = 0; | ||
2087 | err = listen_stop(ep); | 2048 | err = listen_stop(ep); |
2088 | if (err) | 2049 | if (err) |
2089 | goto done; | 2050 | goto done; |
2090 | wait_event_timeout(ep->com.waitq, ep->com.rpl_done, C4IW_WR_TO); | 2051 | err = c4iw_wait_for_reply(&ep->com.dev->rdev, &ep->com.wr_wait, 0, 0, |
2091 | if (ep->com.rpl_done) | 2052 | __func__); |
2092 | err = ep->com.rpl_err; | ||
2093 | else { | ||
2094 | printk(KERN_ERR MOD "Device %s not responding!\n", | ||
2095 | pci_name(ep->com.dev->rdev.lldi.pdev)); | ||
2096 | ep->com.dev->rdev.flags = T4_FATAL_ERROR; | ||
2097 | err = -EIO; | ||
2098 | } | ||
2099 | cxgb4_free_stid(ep->com.dev->rdev.lldi.tids, ep->stid, PF_INET); | 2053 | cxgb4_free_stid(ep->com.dev->rdev.lldi.tids, ep->stid, PF_INET); |
2100 | done: | 2054 | done: |
2101 | cm_id->rem_ref(cm_id); | 2055 | cm_id->rem_ref(cm_id); |
@@ -2106,12 +2060,11 @@ done: | |||
2106 | int c4iw_ep_disconnect(struct c4iw_ep *ep, int abrupt, gfp_t gfp) | 2060 | int c4iw_ep_disconnect(struct c4iw_ep *ep, int abrupt, gfp_t gfp) |
2107 | { | 2061 | { |
2108 | int ret = 0; | 2062 | int ret = 0; |
2109 | unsigned long flags; | ||
2110 | int close = 0; | 2063 | int close = 0; |
2111 | int fatal = 0; | 2064 | int fatal = 0; |
2112 | struct c4iw_rdev *rdev; | 2065 | struct c4iw_rdev *rdev; |
2113 | 2066 | ||
2114 | spin_lock_irqsave(&ep->com.lock, flags); | 2067 | mutex_lock(&ep->com.mutex); |
2115 | 2068 | ||
2116 | PDBG("%s ep %p state %s, abrupt %d\n", __func__, ep, | 2069 | PDBG("%s ep %p state %s, abrupt %d\n", __func__, ep, |
2117 | states[ep->com.state], abrupt); | 2070 | states[ep->com.state], abrupt); |
@@ -2158,20 +2111,28 @@ int c4iw_ep_disconnect(struct c4iw_ep *ep, int abrupt, gfp_t gfp) | |||
2158 | break; | 2111 | break; |
2159 | } | 2112 | } |
2160 | 2113 | ||
2161 | spin_unlock_irqrestore(&ep->com.lock, flags); | ||
2162 | if (close) { | 2114 | if (close) { |
2163 | if (abrupt) | 2115 | if (abrupt) { |
2164 | ret = abort_connection(ep, NULL, gfp); | 2116 | close_complete_upcall(ep); |
2165 | else | 2117 | ret = send_abort(ep, NULL, gfp); |
2118 | } else | ||
2166 | ret = send_halfclose(ep, gfp); | 2119 | ret = send_halfclose(ep, gfp); |
2167 | if (ret) | 2120 | if (ret) |
2168 | fatal = 1; | 2121 | fatal = 1; |
2169 | } | 2122 | } |
2123 | mutex_unlock(&ep->com.mutex); | ||
2170 | if (fatal) | 2124 | if (fatal) |
2171 | release_ep_resources(ep); | 2125 | release_ep_resources(ep); |
2172 | return ret; | 2126 | return ret; |
2173 | } | 2127 | } |
2174 | 2128 | ||
2129 | static int async_event(struct c4iw_dev *dev, struct sk_buff *skb) | ||
2130 | { | ||
2131 | struct cpl_fw6_msg *rpl = cplhdr(skb); | ||
2132 | c4iw_ev_dispatch(dev, (struct t4_cqe *)&rpl->data[0]); | ||
2133 | return 0; | ||
2134 | } | ||
2135 | |||
2175 | /* | 2136 | /* |
2176 | * These are the real handlers that are called from a | 2137 | * These are the real handlers that are called from a |
2177 | * work queue. | 2138 | * work queue. |
@@ -2190,7 +2151,8 @@ static c4iw_handler_func work_handlers[NUM_CPL_CMDS] = { | |||
2190 | [CPL_ABORT_REQ_RSS] = peer_abort, | 2151 | [CPL_ABORT_REQ_RSS] = peer_abort, |
2191 | [CPL_CLOSE_CON_RPL] = close_con_rpl, | 2152 | [CPL_CLOSE_CON_RPL] = close_con_rpl, |
2192 | [CPL_RDMA_TERMINATE] = terminate, | 2153 | [CPL_RDMA_TERMINATE] = terminate, |
2193 | [CPL_FW4_ACK] = fw4_ack | 2154 | [CPL_FW4_ACK] = fw4_ack, |
2155 | [CPL_FW6_MSG] = async_event | ||
2194 | }; | 2156 | }; |
2195 | 2157 | ||
2196 | static void process_timeout(struct c4iw_ep *ep) | 2158 | static void process_timeout(struct c4iw_ep *ep) |
@@ -2198,7 +2160,7 @@ static void process_timeout(struct c4iw_ep *ep) | |||
2198 | struct c4iw_qp_attributes attrs; | 2160 | struct c4iw_qp_attributes attrs; |
2199 | int abort = 1; | 2161 | int abort = 1; |
2200 | 2162 | ||
2201 | spin_lock_irq(&ep->com.lock); | 2163 | mutex_lock(&ep->com.mutex); |
2202 | PDBG("%s ep %p tid %u state %d\n", __func__, ep, ep->hwtid, | 2164 | PDBG("%s ep %p tid %u state %d\n", __func__, ep, ep->hwtid, |
2203 | ep->com.state); | 2165 | ep->com.state); |
2204 | switch (ep->com.state) { | 2166 | switch (ep->com.state) { |
@@ -2225,7 +2187,7 @@ static void process_timeout(struct c4iw_ep *ep) | |||
2225 | WARN_ON(1); | 2187 | WARN_ON(1); |
2226 | abort = 0; | 2188 | abort = 0; |
2227 | } | 2189 | } |
2228 | spin_unlock_irq(&ep->com.lock); | 2190 | mutex_unlock(&ep->com.mutex); |
2229 | if (abort) | 2191 | if (abort) |
2230 | abort_connection(ep, NULL, GFP_KERNEL); | 2192 | abort_connection(ep, NULL, GFP_KERNEL); |
2231 | c4iw_put_ep(&ep->com); | 2193 | c4iw_put_ep(&ep->com); |
@@ -2309,6 +2271,7 @@ static int set_tcb_rpl(struct c4iw_dev *dev, struct sk_buff *skb) | |||
2309 | printk(KERN_ERR MOD "Unexpected SET_TCB_RPL status %u " | 2271 | printk(KERN_ERR MOD "Unexpected SET_TCB_RPL status %u " |
2310 | "for tid %u\n", rpl->status, GET_TID(rpl)); | 2272 | "for tid %u\n", rpl->status, GET_TID(rpl)); |
2311 | } | 2273 | } |
2274 | kfree_skb(skb); | ||
2312 | return 0; | 2275 | return 0; |
2313 | } | 2276 | } |
2314 | 2277 | ||
@@ -2323,25 +2286,49 @@ static int fw6_msg(struct c4iw_dev *dev, struct sk_buff *skb) | |||
2323 | switch (rpl->type) { | 2286 | switch (rpl->type) { |
2324 | case 1: | 2287 | case 1: |
2325 | ret = (int)((be64_to_cpu(rpl->data[0]) >> 8) & 0xff); | 2288 | ret = (int)((be64_to_cpu(rpl->data[0]) >> 8) & 0xff); |
2326 | wr_waitp = (__force struct c4iw_wr_wait *)rpl->data[1]; | 2289 | wr_waitp = (struct c4iw_wr_wait *)(__force unsigned long) rpl->data[1]; |
2327 | PDBG("%s wr_waitp %p ret %u\n", __func__, wr_waitp, ret); | 2290 | PDBG("%s wr_waitp %p ret %u\n", __func__, wr_waitp, ret); |
2328 | if (wr_waitp) { | 2291 | if (wr_waitp) |
2329 | wr_waitp->ret = ret; | 2292 | c4iw_wake_up(wr_waitp, ret ? -ret : 0); |
2330 | wr_waitp->done = 1; | 2293 | kfree_skb(skb); |
2331 | wake_up(&wr_waitp->wait); | ||
2332 | } | ||
2333 | break; | 2294 | break; |
2334 | case 2: | 2295 | case 2: |
2335 | c4iw_ev_dispatch(dev, (struct t4_cqe *)&rpl->data[0]); | 2296 | sched(dev, skb); |
2336 | break; | 2297 | break; |
2337 | default: | 2298 | default: |
2338 | printk(KERN_ERR MOD "%s unexpected fw6 msg type %u\n", __func__, | 2299 | printk(KERN_ERR MOD "%s unexpected fw6 msg type %u\n", __func__, |
2339 | rpl->type); | 2300 | rpl->type); |
2301 | kfree_skb(skb); | ||
2340 | break; | 2302 | break; |
2341 | } | 2303 | } |
2342 | return 0; | 2304 | return 0; |
2343 | } | 2305 | } |
2344 | 2306 | ||
2307 | static int peer_abort_intr(struct c4iw_dev *dev, struct sk_buff *skb) | ||
2308 | { | ||
2309 | struct cpl_abort_req_rss *req = cplhdr(skb); | ||
2310 | struct c4iw_ep *ep; | ||
2311 | struct tid_info *t = dev->rdev.lldi.tids; | ||
2312 | unsigned int tid = GET_TID(req); | ||
2313 | |||
2314 | ep = lookup_tid(t, tid); | ||
2315 | if (is_neg_adv_abort(req->status)) { | ||
2316 | PDBG("%s neg_adv_abort ep %p tid %u\n", __func__, ep, | ||
2317 | ep->hwtid); | ||
2318 | kfree_skb(skb); | ||
2319 | return 0; | ||
2320 | } | ||
2321 | PDBG("%s ep %p tid %u state %u\n", __func__, ep, ep->hwtid, | ||
2322 | ep->com.state); | ||
2323 | |||
2324 | /* | ||
2325 | * Wake up any threads in rdma_init() or rdma_fini(). | ||
2326 | */ | ||
2327 | c4iw_wake_up(&ep->com.wr_wait, -ECONNRESET); | ||
2328 | sched(dev, skb); | ||
2329 | return 0; | ||
2330 | } | ||
2331 | |||
2345 | /* | 2332 | /* |
2346 | * Most upcalls from the T4 Core go to sched() to | 2333 | * Most upcalls from the T4 Core go to sched() to |
2347 | * schedule the processing on a work queue. | 2334 | * schedule the processing on a work queue. |
@@ -2358,7 +2345,7 @@ c4iw_handler_func c4iw_handlers[NUM_CPL_CMDS] = { | |||
2358 | [CPL_PASS_ESTABLISH] = sched, | 2345 | [CPL_PASS_ESTABLISH] = sched, |
2359 | [CPL_PEER_CLOSE] = sched, | 2346 | [CPL_PEER_CLOSE] = sched, |
2360 | [CPL_CLOSE_CON_RPL] = sched, | 2347 | [CPL_CLOSE_CON_RPL] = sched, |
2361 | [CPL_ABORT_REQ_RSS] = sched, | 2348 | [CPL_ABORT_REQ_RSS] = peer_abort_intr, |
2362 | [CPL_RDMA_TERMINATE] = sched, | 2349 | [CPL_RDMA_TERMINATE] = sched, |
2363 | [CPL_FW4_ACK] = sched, | 2350 | [CPL_FW4_ACK] = sched, |
2364 | [CPL_SET_TCB_RPL] = set_tcb_rpl, | 2351 | [CPL_SET_TCB_RPL] = set_tcb_rpl, |
diff --git a/drivers/infiniband/hw/cxgb4/cq.c b/drivers/infiniband/hw/cxgb4/cq.c index b3daf39eed4a..1720dc790d13 100644 --- a/drivers/infiniband/hw/cxgb4/cq.c +++ b/drivers/infiniband/hw/cxgb4/cq.c | |||
@@ -55,7 +55,7 @@ static int destroy_cq(struct c4iw_rdev *rdev, struct t4_cq *cq, | |||
55 | V_FW_RI_RES_WR_NRES(1) | | 55 | V_FW_RI_RES_WR_NRES(1) | |
56 | FW_WR_COMPL(1)); | 56 | FW_WR_COMPL(1)); |
57 | res_wr->len16_pkd = cpu_to_be32(DIV_ROUND_UP(wr_len, 16)); | 57 | res_wr->len16_pkd = cpu_to_be32(DIV_ROUND_UP(wr_len, 16)); |
58 | res_wr->cookie = (u64)&wr_wait; | 58 | res_wr->cookie = (unsigned long) &wr_wait; |
59 | res = res_wr->res; | 59 | res = res_wr->res; |
60 | res->u.cq.restype = FW_RI_RES_TYPE_CQ; | 60 | res->u.cq.restype = FW_RI_RES_TYPE_CQ; |
61 | res->u.cq.op = FW_RI_RES_OP_RESET; | 61 | res->u.cq.op = FW_RI_RES_OP_RESET; |
@@ -64,14 +64,7 @@ static int destroy_cq(struct c4iw_rdev *rdev, struct t4_cq *cq, | |||
64 | c4iw_init_wr_wait(&wr_wait); | 64 | c4iw_init_wr_wait(&wr_wait); |
65 | ret = c4iw_ofld_send(rdev, skb); | 65 | ret = c4iw_ofld_send(rdev, skb); |
66 | if (!ret) { | 66 | if (!ret) { |
67 | wait_event_timeout(wr_wait.wait, wr_wait.done, C4IW_WR_TO); | 67 | ret = c4iw_wait_for_reply(rdev, &wr_wait, 0, 0, __func__); |
68 | if (!wr_wait.done) { | ||
69 | printk(KERN_ERR MOD "Device %s not responding!\n", | ||
70 | pci_name(rdev->lldi.pdev)); | ||
71 | rdev->flags = T4_FATAL_ERROR; | ||
72 | ret = -EIO; | ||
73 | } else | ||
74 | ret = wr_wait.ret; | ||
75 | } | 68 | } |
76 | 69 | ||
77 | kfree(cq->sw_queue); | 70 | kfree(cq->sw_queue); |
@@ -132,7 +125,7 @@ static int create_cq(struct c4iw_rdev *rdev, struct t4_cq *cq, | |||
132 | V_FW_RI_RES_WR_NRES(1) | | 125 | V_FW_RI_RES_WR_NRES(1) | |
133 | FW_WR_COMPL(1)); | 126 | FW_WR_COMPL(1)); |
134 | res_wr->len16_pkd = cpu_to_be32(DIV_ROUND_UP(wr_len, 16)); | 127 | res_wr->len16_pkd = cpu_to_be32(DIV_ROUND_UP(wr_len, 16)); |
135 | res_wr->cookie = (u64)&wr_wait; | 128 | res_wr->cookie = (unsigned long) &wr_wait; |
136 | res = res_wr->res; | 129 | res = res_wr->res; |
137 | res->u.cq.restype = FW_RI_RES_TYPE_CQ; | 130 | res->u.cq.restype = FW_RI_RES_TYPE_CQ; |
138 | res->u.cq.op = FW_RI_RES_OP_WRITE; | 131 | res->u.cq.op = FW_RI_RES_OP_WRITE; |
@@ -157,14 +150,7 @@ static int create_cq(struct c4iw_rdev *rdev, struct t4_cq *cq, | |||
157 | if (ret) | 150 | if (ret) |
158 | goto err4; | 151 | goto err4; |
159 | PDBG("%s wait_event wr_wait %p\n", __func__, &wr_wait); | 152 | PDBG("%s wait_event wr_wait %p\n", __func__, &wr_wait); |
160 | wait_event_timeout(wr_wait.wait, wr_wait.done, C4IW_WR_TO); | 153 | ret = c4iw_wait_for_reply(rdev, &wr_wait, 0, 0, __func__); |
161 | if (!wr_wait.done) { | ||
162 | printk(KERN_ERR MOD "Device %s not responding!\n", | ||
163 | pci_name(rdev->lldi.pdev)); | ||
164 | rdev->flags = T4_FATAL_ERROR; | ||
165 | ret = -EIO; | ||
166 | } else | ||
167 | ret = wr_wait.ret; | ||
168 | if (ret) | 154 | if (ret) |
169 | goto err4; | 155 | goto err4; |
170 | 156 | ||
@@ -476,6 +462,11 @@ static int poll_cq(struct t4_wq *wq, struct t4_cq *cq, struct t4_cqe *cqe, | |||
476 | goto proc_cqe; | 462 | goto proc_cqe; |
477 | } | 463 | } |
478 | 464 | ||
465 | if (CQE_OPCODE(hw_cqe) == FW_RI_TERMINATE) { | ||
466 | ret = -EAGAIN; | ||
467 | goto skip_cqe; | ||
468 | } | ||
469 | |||
479 | /* | 470 | /* |
480 | * RECV completion. | 471 | * RECV completion. |
481 | */ | 472 | */ |
@@ -696,6 +687,7 @@ static int c4iw_poll_cq_one(struct c4iw_cq *chp, struct ib_wc *wc) | |||
696 | case T4_ERR_MSN_RANGE: | 687 | case T4_ERR_MSN_RANGE: |
697 | case T4_ERR_IRD_OVERFLOW: | 688 | case T4_ERR_IRD_OVERFLOW: |
698 | case T4_ERR_OPCODE: | 689 | case T4_ERR_OPCODE: |
690 | case T4_ERR_INTERNAL_ERR: | ||
699 | wc->status = IB_WC_FATAL_ERR; | 691 | wc->status = IB_WC_FATAL_ERR; |
700 | break; | 692 | break; |
701 | case T4_ERR_SWFLUSH: | 693 | case T4_ERR_SWFLUSH: |
@@ -809,6 +801,10 @@ struct ib_cq *c4iw_create_cq(struct ib_device *ibdev, int entries, | |||
809 | if (ucontext) { | 801 | if (ucontext) { |
810 | memsize = roundup(memsize, PAGE_SIZE); | 802 | memsize = roundup(memsize, PAGE_SIZE); |
811 | hwentries = memsize / sizeof *chp->cq.queue; | 803 | hwentries = memsize / sizeof *chp->cq.queue; |
804 | while (hwentries > T4_MAX_IQ_SIZE) { | ||
805 | memsize -= PAGE_SIZE; | ||
806 | hwentries = memsize / sizeof *chp->cq.queue; | ||
807 | } | ||
812 | } | 808 | } |
813 | chp->cq.size = hwentries; | 809 | chp->cq.size = hwentries; |
814 | chp->cq.memsize = memsize; | 810 | chp->cq.memsize = memsize; |
diff --git a/drivers/infiniband/hw/cxgb4/device.c b/drivers/infiniband/hw/cxgb4/device.c index 9bbf491d5d9e..40a13cc633a3 100644 --- a/drivers/infiniband/hw/cxgb4/device.c +++ b/drivers/infiniband/hw/cxgb4/device.c | |||
@@ -44,34 +44,38 @@ MODULE_DESCRIPTION("Chelsio T4 RDMA Driver"); | |||
44 | MODULE_LICENSE("Dual BSD/GPL"); | 44 | MODULE_LICENSE("Dual BSD/GPL"); |
45 | MODULE_VERSION(DRV_VERSION); | 45 | MODULE_VERSION(DRV_VERSION); |
46 | 46 | ||
47 | static LIST_HEAD(dev_list); | 47 | static LIST_HEAD(uld_ctx_list); |
48 | static DEFINE_MUTEX(dev_mutex); | 48 | static DEFINE_MUTEX(dev_mutex); |
49 | 49 | ||
50 | static struct dentry *c4iw_debugfs_root; | 50 | static struct dentry *c4iw_debugfs_root; |
51 | 51 | ||
52 | struct debugfs_qp_data { | 52 | struct c4iw_debugfs_data { |
53 | struct c4iw_dev *devp; | 53 | struct c4iw_dev *devp; |
54 | char *buf; | 54 | char *buf; |
55 | int bufsize; | 55 | int bufsize; |
56 | int pos; | 56 | int pos; |
57 | }; | 57 | }; |
58 | 58 | ||
59 | static int count_qps(int id, void *p, void *data) | 59 | static int count_idrs(int id, void *p, void *data) |
60 | { | 60 | { |
61 | struct c4iw_qp *qp = p; | ||
62 | int *countp = data; | 61 | int *countp = data; |
63 | 62 | ||
64 | if (id != qp->wq.sq.qid) | ||
65 | return 0; | ||
66 | |||
67 | *countp = *countp + 1; | 63 | *countp = *countp + 1; |
68 | return 0; | 64 | return 0; |
69 | } | 65 | } |
70 | 66 | ||
71 | static int dump_qps(int id, void *p, void *data) | 67 | static ssize_t debugfs_read(struct file *file, char __user *buf, size_t count, |
68 | loff_t *ppos) | ||
69 | { | ||
70 | struct c4iw_debugfs_data *d = file->private_data; | ||
71 | |||
72 | return simple_read_from_buffer(buf, count, ppos, d->buf, d->pos); | ||
73 | } | ||
74 | |||
75 | static int dump_qp(int id, void *p, void *data) | ||
72 | { | 76 | { |
73 | struct c4iw_qp *qp = p; | 77 | struct c4iw_qp *qp = p; |
74 | struct debugfs_qp_data *qpd = data; | 78 | struct c4iw_debugfs_data *qpd = data; |
75 | int space; | 79 | int space; |
76 | int cc; | 80 | int cc; |
77 | 81 | ||
@@ -83,17 +87,22 @@ static int dump_qps(int id, void *p, void *data) | |||
83 | return 1; | 87 | return 1; |
84 | 88 | ||
85 | if (qp->ep) | 89 | if (qp->ep) |
86 | cc = snprintf(qpd->buf + qpd->pos, space, "qp id %u state %u " | 90 | cc = snprintf(qpd->buf + qpd->pos, space, |
91 | "qp sq id %u rq id %u state %u onchip %u " | ||
87 | "ep tid %u state %u %pI4:%u->%pI4:%u\n", | 92 | "ep tid %u state %u %pI4:%u->%pI4:%u\n", |
88 | qp->wq.sq.qid, (int)qp->attr.state, | 93 | qp->wq.sq.qid, qp->wq.rq.qid, (int)qp->attr.state, |
94 | qp->wq.sq.flags & T4_SQ_ONCHIP, | ||
89 | qp->ep->hwtid, (int)qp->ep->com.state, | 95 | qp->ep->hwtid, (int)qp->ep->com.state, |
90 | &qp->ep->com.local_addr.sin_addr.s_addr, | 96 | &qp->ep->com.local_addr.sin_addr.s_addr, |
91 | ntohs(qp->ep->com.local_addr.sin_port), | 97 | ntohs(qp->ep->com.local_addr.sin_port), |
92 | &qp->ep->com.remote_addr.sin_addr.s_addr, | 98 | &qp->ep->com.remote_addr.sin_addr.s_addr, |
93 | ntohs(qp->ep->com.remote_addr.sin_port)); | 99 | ntohs(qp->ep->com.remote_addr.sin_port)); |
94 | else | 100 | else |
95 | cc = snprintf(qpd->buf + qpd->pos, space, "qp id %u state %u\n", | 101 | cc = snprintf(qpd->buf + qpd->pos, space, |
96 | qp->wq.sq.qid, (int)qp->attr.state); | 102 | "qp sq id %u rq id %u state %u onchip %u\n", |
103 | qp->wq.sq.qid, qp->wq.rq.qid, | ||
104 | (int)qp->attr.state, | ||
105 | qp->wq.sq.flags & T4_SQ_ONCHIP); | ||
97 | if (cc < space) | 106 | if (cc < space) |
98 | qpd->pos += cc; | 107 | qpd->pos += cc; |
99 | return 0; | 108 | return 0; |
@@ -101,7 +110,7 @@ static int dump_qps(int id, void *p, void *data) | |||
101 | 110 | ||
102 | static int qp_release(struct inode *inode, struct file *file) | 111 | static int qp_release(struct inode *inode, struct file *file) |
103 | { | 112 | { |
104 | struct debugfs_qp_data *qpd = file->private_data; | 113 | struct c4iw_debugfs_data *qpd = file->private_data; |
105 | if (!qpd) { | 114 | if (!qpd) { |
106 | printk(KERN_INFO "%s null qpd?\n", __func__); | 115 | printk(KERN_INFO "%s null qpd?\n", __func__); |
107 | return 0; | 116 | return 0; |
@@ -113,7 +122,7 @@ static int qp_release(struct inode *inode, struct file *file) | |||
113 | 122 | ||
114 | static int qp_open(struct inode *inode, struct file *file) | 123 | static int qp_open(struct inode *inode, struct file *file) |
115 | { | 124 | { |
116 | struct debugfs_qp_data *qpd; | 125 | struct c4iw_debugfs_data *qpd; |
117 | int ret = 0; | 126 | int ret = 0; |
118 | int count = 1; | 127 | int count = 1; |
119 | 128 | ||
@@ -126,7 +135,7 @@ static int qp_open(struct inode *inode, struct file *file) | |||
126 | qpd->pos = 0; | 135 | qpd->pos = 0; |
127 | 136 | ||
128 | spin_lock_irq(&qpd->devp->lock); | 137 | spin_lock_irq(&qpd->devp->lock); |
129 | idr_for_each(&qpd->devp->qpidr, count_qps, &count); | 138 | idr_for_each(&qpd->devp->qpidr, count_idrs, &count); |
130 | spin_unlock_irq(&qpd->devp->lock); | 139 | spin_unlock_irq(&qpd->devp->lock); |
131 | 140 | ||
132 | qpd->bufsize = count * 128; | 141 | qpd->bufsize = count * 128; |
@@ -137,7 +146,7 @@ static int qp_open(struct inode *inode, struct file *file) | |||
137 | } | 146 | } |
138 | 147 | ||
139 | spin_lock_irq(&qpd->devp->lock); | 148 | spin_lock_irq(&qpd->devp->lock); |
140 | idr_for_each(&qpd->devp->qpidr, dump_qps, qpd); | 149 | idr_for_each(&qpd->devp->qpidr, dump_qp, qpd); |
141 | spin_unlock_irq(&qpd->devp->lock); | 150 | spin_unlock_irq(&qpd->devp->lock); |
142 | 151 | ||
143 | qpd->buf[qpd->pos++] = 0; | 152 | qpd->buf[qpd->pos++] = 0; |
@@ -149,43 +158,86 @@ out: | |||
149 | return ret; | 158 | return ret; |
150 | } | 159 | } |
151 | 160 | ||
152 | static ssize_t qp_read(struct file *file, char __user *buf, size_t count, | 161 | static const struct file_operations qp_debugfs_fops = { |
153 | loff_t *ppos) | 162 | .owner = THIS_MODULE, |
163 | .open = qp_open, | ||
164 | .release = qp_release, | ||
165 | .read = debugfs_read, | ||
166 | .llseek = default_llseek, | ||
167 | }; | ||
168 | |||
169 | static int dump_stag(int id, void *p, void *data) | ||
154 | { | 170 | { |
155 | struct debugfs_qp_data *qpd = file->private_data; | 171 | struct c4iw_debugfs_data *stagd = data; |
156 | loff_t pos = *ppos; | 172 | int space; |
157 | loff_t avail = qpd->pos; | 173 | int cc; |
174 | |||
175 | space = stagd->bufsize - stagd->pos - 1; | ||
176 | if (space == 0) | ||
177 | return 1; | ||
178 | |||
179 | cc = snprintf(stagd->buf + stagd->pos, space, "0x%x\n", id<<8); | ||
180 | if (cc < space) | ||
181 | stagd->pos += cc; | ||
182 | return 0; | ||
183 | } | ||
158 | 184 | ||
159 | if (pos < 0) | 185 | static int stag_release(struct inode *inode, struct file *file) |
160 | return -EINVAL; | 186 | { |
161 | if (pos >= avail) | 187 | struct c4iw_debugfs_data *stagd = file->private_data; |
188 | if (!stagd) { | ||
189 | printk(KERN_INFO "%s null stagd?\n", __func__); | ||
162 | return 0; | 190 | return 0; |
163 | if (count > avail - pos) | 191 | } |
164 | count = avail - pos; | 192 | kfree(stagd->buf); |
193 | kfree(stagd); | ||
194 | return 0; | ||
195 | } | ||
165 | 196 | ||
166 | while (count) { | 197 | static int stag_open(struct inode *inode, struct file *file) |
167 | size_t len = 0; | 198 | { |
199 | struct c4iw_debugfs_data *stagd; | ||
200 | int ret = 0; | ||
201 | int count = 1; | ||
168 | 202 | ||
169 | len = min((int)count, (int)qpd->pos - (int)pos); | 203 | stagd = kmalloc(sizeof *stagd, GFP_KERNEL); |
170 | if (copy_to_user(buf, qpd->buf + pos, len)) | 204 | if (!stagd) { |
171 | return -EFAULT; | 205 | ret = -ENOMEM; |
172 | if (len == 0) | 206 | goto out; |
173 | return -EINVAL; | 207 | } |
208 | stagd->devp = inode->i_private; | ||
209 | stagd->pos = 0; | ||
210 | |||
211 | spin_lock_irq(&stagd->devp->lock); | ||
212 | idr_for_each(&stagd->devp->mmidr, count_idrs, &count); | ||
213 | spin_unlock_irq(&stagd->devp->lock); | ||
174 | 214 | ||
175 | buf += len; | 215 | stagd->bufsize = count * sizeof("0x12345678\n"); |
176 | pos += len; | 216 | stagd->buf = kmalloc(stagd->bufsize, GFP_KERNEL); |
177 | count -= len; | 217 | if (!stagd->buf) { |
218 | ret = -ENOMEM; | ||
219 | goto err1; | ||
178 | } | 220 | } |
179 | count = pos - *ppos; | 221 | |
180 | *ppos = pos; | 222 | spin_lock_irq(&stagd->devp->lock); |
181 | return count; | 223 | idr_for_each(&stagd->devp->mmidr, dump_stag, stagd); |
224 | spin_unlock_irq(&stagd->devp->lock); | ||
225 | |||
226 | stagd->buf[stagd->pos++] = 0; | ||
227 | file->private_data = stagd; | ||
228 | goto out; | ||
229 | err1: | ||
230 | kfree(stagd); | ||
231 | out: | ||
232 | return ret; | ||
182 | } | 233 | } |
183 | 234 | ||
184 | static const struct file_operations qp_debugfs_fops = { | 235 | static const struct file_operations stag_debugfs_fops = { |
185 | .owner = THIS_MODULE, | 236 | .owner = THIS_MODULE, |
186 | .open = qp_open, | 237 | .open = stag_open, |
187 | .release = qp_release, | 238 | .release = stag_release, |
188 | .read = qp_read, | 239 | .read = debugfs_read, |
240 | .llseek = default_llseek, | ||
189 | }; | 241 | }; |
190 | 242 | ||
191 | static int setup_debugfs(struct c4iw_dev *devp) | 243 | static int setup_debugfs(struct c4iw_dev *devp) |
@@ -199,6 +251,11 @@ static int setup_debugfs(struct c4iw_dev *devp) | |||
199 | (void *)devp, &qp_debugfs_fops); | 251 | (void *)devp, &qp_debugfs_fops); |
200 | if (de && de->d_inode) | 252 | if (de && de->d_inode) |
201 | de->d_inode->i_size = 4096; | 253 | de->d_inode->i_size = 4096; |
254 | |||
255 | de = debugfs_create_file("stags", S_IWUSR, devp->debugfs_root, | ||
256 | (void *)devp, &stag_debugfs_fops); | ||
257 | if (de && de->d_inode) | ||
258 | de->d_inode->i_size = 4096; | ||
202 | return 0; | 259 | return 0; |
203 | } | 260 | } |
204 | 261 | ||
@@ -290,7 +347,14 @@ static int c4iw_rdev_open(struct c4iw_rdev *rdev) | |||
290 | printk(KERN_ERR MOD "error %d initializing rqt pool\n", err); | 347 | printk(KERN_ERR MOD "error %d initializing rqt pool\n", err); |
291 | goto err3; | 348 | goto err3; |
292 | } | 349 | } |
350 | err = c4iw_ocqp_pool_create(rdev); | ||
351 | if (err) { | ||
352 | printk(KERN_ERR MOD "error %d initializing ocqp pool\n", err); | ||
353 | goto err4; | ||
354 | } | ||
293 | return 0; | 355 | return 0; |
356 | err4: | ||
357 | c4iw_rqtpool_destroy(rdev); | ||
294 | err3: | 358 | err3: |
295 | c4iw_pblpool_destroy(rdev); | 359 | c4iw_pblpool_destroy(rdev); |
296 | err2: | 360 | err2: |
@@ -306,18 +370,23 @@ static void c4iw_rdev_close(struct c4iw_rdev *rdev) | |||
306 | c4iw_destroy_resource(&rdev->resource); | 370 | c4iw_destroy_resource(&rdev->resource); |
307 | } | 371 | } |
308 | 372 | ||
309 | static void c4iw_remove(struct c4iw_dev *dev) | 373 | struct uld_ctx { |
374 | struct list_head entry; | ||
375 | struct cxgb4_lld_info lldi; | ||
376 | struct c4iw_dev *dev; | ||
377 | }; | ||
378 | |||
379 | static void c4iw_remove(struct uld_ctx *ctx) | ||
310 | { | 380 | { |
311 | PDBG("%s c4iw_dev %p\n", __func__, dev); | 381 | PDBG("%s c4iw_dev %p\n", __func__, ctx->dev); |
312 | cancel_delayed_work_sync(&dev->db_drop_task); | 382 | c4iw_unregister_device(ctx->dev); |
313 | list_del(&dev->entry); | 383 | c4iw_rdev_close(&ctx->dev->rdev); |
314 | if (dev->registered) | 384 | idr_destroy(&ctx->dev->cqidr); |
315 | c4iw_unregister_device(dev); | 385 | idr_destroy(&ctx->dev->qpidr); |
316 | c4iw_rdev_close(&dev->rdev); | 386 | idr_destroy(&ctx->dev->mmidr); |
317 | idr_destroy(&dev->cqidr); | 387 | iounmap(ctx->dev->rdev.oc_mw_kva); |
318 | idr_destroy(&dev->qpidr); | 388 | ib_dealloc_device(&ctx->dev->ibdev); |
319 | idr_destroy(&dev->mmidr); | 389 | ctx->dev = NULL; |
320 | ib_dealloc_device(&dev->ibdev); | ||
321 | } | 390 | } |
322 | 391 | ||
323 | static struct c4iw_dev *c4iw_alloc(const struct cxgb4_lld_info *infop) | 392 | static struct c4iw_dev *c4iw_alloc(const struct cxgb4_lld_info *infop) |
@@ -328,26 +397,33 @@ static struct c4iw_dev *c4iw_alloc(const struct cxgb4_lld_info *infop) | |||
328 | devp = (struct c4iw_dev *)ib_alloc_device(sizeof(*devp)); | 397 | devp = (struct c4iw_dev *)ib_alloc_device(sizeof(*devp)); |
329 | if (!devp) { | 398 | if (!devp) { |
330 | printk(KERN_ERR MOD "Cannot allocate ib device\n"); | 399 | printk(KERN_ERR MOD "Cannot allocate ib device\n"); |
331 | return NULL; | 400 | return ERR_PTR(-ENOMEM); |
332 | } | 401 | } |
333 | devp->rdev.lldi = *infop; | 402 | devp->rdev.lldi = *infop; |
334 | 403 | ||
335 | mutex_lock(&dev_mutex); | 404 | devp->rdev.oc_mw_pa = pci_resource_start(devp->rdev.lldi.pdev, 2) + |
405 | (pci_resource_len(devp->rdev.lldi.pdev, 2) - | ||
406 | roundup_pow_of_two(devp->rdev.lldi.vr->ocq.size)); | ||
407 | devp->rdev.oc_mw_kva = ioremap_wc(devp->rdev.oc_mw_pa, | ||
408 | devp->rdev.lldi.vr->ocq.size); | ||
409 | |||
410 | PDBG(KERN_INFO MOD "ocq memory: " | ||
411 | "hw_start 0x%x size %u mw_pa 0x%lx mw_kva %p\n", | ||
412 | devp->rdev.lldi.vr->ocq.start, devp->rdev.lldi.vr->ocq.size, | ||
413 | devp->rdev.oc_mw_pa, devp->rdev.oc_mw_kva); | ||
336 | 414 | ||
337 | ret = c4iw_rdev_open(&devp->rdev); | 415 | ret = c4iw_rdev_open(&devp->rdev); |
338 | if (ret) { | 416 | if (ret) { |
339 | mutex_unlock(&dev_mutex); | 417 | mutex_unlock(&dev_mutex); |
340 | printk(KERN_ERR MOD "Unable to open CXIO rdev err %d\n", ret); | 418 | printk(KERN_ERR MOD "Unable to open CXIO rdev err %d\n", ret); |
341 | ib_dealloc_device(&devp->ibdev); | 419 | ib_dealloc_device(&devp->ibdev); |
342 | return NULL; | 420 | return ERR_PTR(ret); |
343 | } | 421 | } |
344 | 422 | ||
345 | idr_init(&devp->cqidr); | 423 | idr_init(&devp->cqidr); |
346 | idr_init(&devp->qpidr); | 424 | idr_init(&devp->qpidr); |
347 | idr_init(&devp->mmidr); | 425 | idr_init(&devp->mmidr); |
348 | spin_lock_init(&devp->lock); | 426 | spin_lock_init(&devp->lock); |
349 | list_add_tail(&devp->entry, &dev_list); | ||
350 | mutex_unlock(&dev_mutex); | ||
351 | 427 | ||
352 | if (c4iw_debugfs_root) { | 428 | if (c4iw_debugfs_root) { |
353 | devp->debugfs_root = debugfs_create_dir( | 429 | devp->debugfs_root = debugfs_create_dir( |
@@ -360,7 +436,7 @@ static struct c4iw_dev *c4iw_alloc(const struct cxgb4_lld_info *infop) | |||
360 | 436 | ||
361 | static void *c4iw_uld_add(const struct cxgb4_lld_info *infop) | 437 | static void *c4iw_uld_add(const struct cxgb4_lld_info *infop) |
362 | { | 438 | { |
363 | struct c4iw_dev *dev; | 439 | struct uld_ctx *ctx; |
364 | static int vers_printed; | 440 | static int vers_printed; |
365 | int i; | 441 | int i; |
366 | 442 | ||
@@ -368,65 +444,33 @@ static void *c4iw_uld_add(const struct cxgb4_lld_info *infop) | |||
368 | printk(KERN_INFO MOD "Chelsio T4 RDMA Driver - version %s\n", | 444 | printk(KERN_INFO MOD "Chelsio T4 RDMA Driver - version %s\n", |
369 | DRV_VERSION); | 445 | DRV_VERSION); |
370 | 446 | ||
371 | dev = c4iw_alloc(infop); | 447 | ctx = kzalloc(sizeof *ctx, GFP_KERNEL); |
372 | if (!dev) | 448 | if (!ctx) { |
449 | ctx = ERR_PTR(-ENOMEM); | ||
373 | goto out; | 450 | goto out; |
451 | } | ||
452 | ctx->lldi = *infop; | ||
374 | 453 | ||
375 | PDBG("%s found device %s nchan %u nrxq %u ntxq %u nports %u\n", | 454 | PDBG("%s found device %s nchan %u nrxq %u ntxq %u nports %u\n", |
376 | __func__, pci_name(dev->rdev.lldi.pdev), | 455 | __func__, pci_name(ctx->lldi.pdev), |
377 | dev->rdev.lldi.nchan, dev->rdev.lldi.nrxq, | 456 | ctx->lldi.nchan, ctx->lldi.nrxq, |
378 | dev->rdev.lldi.ntxq, dev->rdev.lldi.nports); | 457 | ctx->lldi.ntxq, ctx->lldi.nports); |
379 | 458 | ||
380 | for (i = 0; i < dev->rdev.lldi.nrxq; i++) | 459 | mutex_lock(&dev_mutex); |
381 | PDBG("rxqid[%u] %u\n", i, dev->rdev.lldi.rxq_ids[i]); | 460 | list_add_tail(&ctx->entry, &uld_ctx_list); |
382 | out: | 461 | mutex_unlock(&dev_mutex); |
383 | return dev; | ||
384 | } | ||
385 | |||
386 | static struct sk_buff *t4_pktgl_to_skb(const struct pkt_gl *gl, | ||
387 | unsigned int skb_len, | ||
388 | unsigned int pull_len) | ||
389 | { | ||
390 | struct sk_buff *skb; | ||
391 | struct skb_shared_info *ssi; | ||
392 | 462 | ||
393 | if (gl->tot_len <= 512) { | 463 | for (i = 0; i < ctx->lldi.nrxq; i++) |
394 | skb = alloc_skb(gl->tot_len, GFP_ATOMIC); | 464 | PDBG("rxqid[%u] %u\n", i, ctx->lldi.rxq_ids[i]); |
395 | if (unlikely(!skb)) | ||
396 | goto out; | ||
397 | __skb_put(skb, gl->tot_len); | ||
398 | skb_copy_to_linear_data(skb, gl->va, gl->tot_len); | ||
399 | } else { | ||
400 | skb = alloc_skb(skb_len, GFP_ATOMIC); | ||
401 | if (unlikely(!skb)) | ||
402 | goto out; | ||
403 | __skb_put(skb, pull_len); | ||
404 | skb_copy_to_linear_data(skb, gl->va, pull_len); | ||
405 | |||
406 | ssi = skb_shinfo(skb); | ||
407 | ssi->frags[0].page = gl->frags[0].page; | ||
408 | ssi->frags[0].page_offset = gl->frags[0].page_offset + pull_len; | ||
409 | ssi->frags[0].size = gl->frags[0].size - pull_len; | ||
410 | if (gl->nfrags > 1) | ||
411 | memcpy(&ssi->frags[1], &gl->frags[1], | ||
412 | (gl->nfrags - 1) * sizeof(skb_frag_t)); | ||
413 | ssi->nr_frags = gl->nfrags; | ||
414 | |||
415 | skb->len = gl->tot_len; | ||
416 | skb->data_len = skb->len - pull_len; | ||
417 | skb->truesize += skb->data_len; | ||
418 | |||
419 | /* Get a reference for the last page, we don't own it */ | ||
420 | get_page(gl->frags[gl->nfrags - 1].page); | ||
421 | } | ||
422 | out: | 465 | out: |
423 | return skb; | 466 | return ctx; |
424 | } | 467 | } |
425 | 468 | ||
426 | static int c4iw_uld_rx_handler(void *handle, const __be64 *rsp, | 469 | static int c4iw_uld_rx_handler(void *handle, const __be64 *rsp, |
427 | const struct pkt_gl *gl) | 470 | const struct pkt_gl *gl) |
428 | { | 471 | { |
429 | struct c4iw_dev *dev = handle; | 472 | struct uld_ctx *ctx = handle; |
473 | struct c4iw_dev *dev = ctx->dev; | ||
430 | struct sk_buff *skb; | 474 | struct sk_buff *skb; |
431 | const struct cpl_act_establish *rpl; | 475 | const struct cpl_act_establish *rpl; |
432 | unsigned int opcode; | 476 | unsigned int opcode; |
@@ -447,7 +491,7 @@ static int c4iw_uld_rx_handler(void *handle, const __be64 *rsp, | |||
447 | c4iw_ev_handler(dev, qid); | 491 | c4iw_ev_handler(dev, qid); |
448 | return 0; | 492 | return 0; |
449 | } else { | 493 | } else { |
450 | skb = t4_pktgl_to_skb(gl, 128, 128); | 494 | skb = cxgb4_pktgl_to_skb(gl, 128, 128); |
451 | if (unlikely(!skb)) | 495 | if (unlikely(!skb)) |
452 | goto nomem; | 496 | goto nomem; |
453 | } | 497 | } |
@@ -468,39 +512,49 @@ nomem: | |||
468 | 512 | ||
469 | static int c4iw_uld_state_change(void *handle, enum cxgb4_state new_state) | 513 | static int c4iw_uld_state_change(void *handle, enum cxgb4_state new_state) |
470 | { | 514 | { |
471 | struct c4iw_dev *dev = handle; | 515 | struct uld_ctx *ctx = handle; |
472 | 516 | ||
473 | PDBG("%s new_state %u\n", __func__, new_state); | 517 | PDBG("%s new_state %u\n", __func__, new_state); |
474 | switch (new_state) { | 518 | switch (new_state) { |
475 | case CXGB4_STATE_UP: | 519 | case CXGB4_STATE_UP: |
476 | printk(KERN_INFO MOD "%s: Up\n", pci_name(dev->rdev.lldi.pdev)); | 520 | printk(KERN_INFO MOD "%s: Up\n", pci_name(ctx->lldi.pdev)); |
477 | if (!dev->registered) { | 521 | if (!ctx->dev) { |
478 | int ret; | 522 | int ret = 0; |
479 | ret = c4iw_register_device(dev); | 523 | |
480 | if (ret) | 524 | ctx->dev = c4iw_alloc(&ctx->lldi); |
525 | if (!IS_ERR(ctx->dev)) | ||
526 | ret = c4iw_register_device(ctx->dev); | ||
527 | if (IS_ERR(ctx->dev) || ret) | ||
481 | printk(KERN_ERR MOD | 528 | printk(KERN_ERR MOD |
482 | "%s: RDMA registration failed: %d\n", | 529 | "%s: RDMA registration failed: %d\n", |
483 | pci_name(dev->rdev.lldi.pdev), ret); | 530 | pci_name(ctx->lldi.pdev), ret); |
484 | } | 531 | } |
485 | break; | 532 | break; |
486 | case CXGB4_STATE_DOWN: | 533 | case CXGB4_STATE_DOWN: |
487 | printk(KERN_INFO MOD "%s: Down\n", | 534 | printk(KERN_INFO MOD "%s: Down\n", |
488 | pci_name(dev->rdev.lldi.pdev)); | 535 | pci_name(ctx->lldi.pdev)); |
489 | if (dev->registered) | 536 | if (ctx->dev) |
490 | c4iw_unregister_device(dev); | 537 | c4iw_remove(ctx); |
491 | break; | 538 | break; |
492 | case CXGB4_STATE_START_RECOVERY: | 539 | case CXGB4_STATE_START_RECOVERY: |
493 | printk(KERN_INFO MOD "%s: Fatal Error\n", | 540 | printk(KERN_INFO MOD "%s: Fatal Error\n", |
494 | pci_name(dev->rdev.lldi.pdev)); | 541 | pci_name(ctx->lldi.pdev)); |
495 | if (dev->registered) | 542 | if (ctx->dev) { |
496 | c4iw_unregister_device(dev); | 543 | struct ib_event event; |
544 | |||
545 | ctx->dev->rdev.flags |= T4_FATAL_ERROR; | ||
546 | memset(&event, 0, sizeof event); | ||
547 | event.event = IB_EVENT_DEVICE_FATAL; | ||
548 | event.device = &ctx->dev->ibdev; | ||
549 | ib_dispatch_event(&event); | ||
550 | c4iw_remove(ctx); | ||
551 | } | ||
497 | break; | 552 | break; |
498 | case CXGB4_STATE_DETACH: | 553 | case CXGB4_STATE_DETACH: |
499 | printk(KERN_INFO MOD "%s: Detach\n", | 554 | printk(KERN_INFO MOD "%s: Detach\n", |
500 | pci_name(dev->rdev.lldi.pdev)); | 555 | pci_name(ctx->lldi.pdev)); |
501 | mutex_lock(&dev_mutex); | 556 | if (ctx->dev) |
502 | c4iw_remove(dev); | 557 | c4iw_remove(ctx); |
503 | mutex_unlock(&dev_mutex); | ||
504 | break; | 558 | break; |
505 | } | 559 | } |
506 | return 0; | 560 | return 0; |
@@ -533,11 +587,13 @@ static int __init c4iw_init_module(void) | |||
533 | 587 | ||
534 | static void __exit c4iw_exit_module(void) | 588 | static void __exit c4iw_exit_module(void) |
535 | { | 589 | { |
536 | struct c4iw_dev *dev, *tmp; | 590 | struct uld_ctx *ctx, *tmp; |
537 | 591 | ||
538 | mutex_lock(&dev_mutex); | 592 | mutex_lock(&dev_mutex); |
539 | list_for_each_entry_safe(dev, tmp, &dev_list, entry) { | 593 | list_for_each_entry_safe(ctx, tmp, &uld_ctx_list, entry) { |
540 | c4iw_remove(dev); | 594 | if (ctx->dev) |
595 | c4iw_remove(ctx); | ||
596 | kfree(ctx); | ||
541 | } | 597 | } |
542 | mutex_unlock(&dev_mutex); | 598 | mutex_unlock(&dev_mutex); |
543 | cxgb4_unregister_uld(CXGB4_ULD_RDMA); | 599 | cxgb4_unregister_uld(CXGB4_ULD_RDMA); |
diff --git a/drivers/infiniband/hw/cxgb4/ev.c b/drivers/infiniband/hw/cxgb4/ev.c index 491e76a0327f..c13041a0aeba 100644 --- a/drivers/infiniband/hw/cxgb4/ev.c +++ b/drivers/infiniband/hw/cxgb4/ev.c | |||
@@ -60,7 +60,7 @@ static void post_qp_event(struct c4iw_dev *dev, struct c4iw_cq *chp, | |||
60 | if (qhp->attr.state == C4IW_QP_STATE_RTS) { | 60 | if (qhp->attr.state == C4IW_QP_STATE_RTS) { |
61 | attrs.next_state = C4IW_QP_STATE_TERMINATE; | 61 | attrs.next_state = C4IW_QP_STATE_TERMINATE; |
62 | c4iw_modify_qp(qhp->rhp, qhp, C4IW_QP_ATTR_NEXT_STATE, | 62 | c4iw_modify_qp(qhp->rhp, qhp, C4IW_QP_ATTR_NEXT_STATE, |
63 | &attrs, 1); | 63 | &attrs, 0); |
64 | } | 64 | } |
65 | 65 | ||
66 | event.event = ib_event; | 66 | event.event = ib_event; |
diff --git a/drivers/infiniband/hw/cxgb4/iw_cxgb4.h b/drivers/infiniband/hw/cxgb4/iw_cxgb4.h index ed459b8f800f..4f045375c8e2 100644 --- a/drivers/infiniband/hw/cxgb4/iw_cxgb4.h +++ b/drivers/infiniband/hw/cxgb4/iw_cxgb4.h | |||
@@ -35,7 +35,7 @@ | |||
35 | #include <linux/list.h> | 35 | #include <linux/list.h> |
36 | #include <linux/spinlock.h> | 36 | #include <linux/spinlock.h> |
37 | #include <linux/idr.h> | 37 | #include <linux/idr.h> |
38 | #include <linux/workqueue.h> | 38 | #include <linux/completion.h> |
39 | #include <linux/netdevice.h> | 39 | #include <linux/netdevice.h> |
40 | #include <linux/sched.h> | 40 | #include <linux/sched.h> |
41 | #include <linux/pci.h> | 41 | #include <linux/pci.h> |
@@ -79,21 +79,6 @@ static inline void *cplhdr(struct sk_buff *skb) | |||
79 | return skb->data; | 79 | return skb->data; |
80 | } | 80 | } |
81 | 81 | ||
82 | #define C4IW_WR_TO (10*HZ) | ||
83 | |||
84 | struct c4iw_wr_wait { | ||
85 | wait_queue_head_t wait; | ||
86 | int done; | ||
87 | int ret; | ||
88 | }; | ||
89 | |||
90 | static inline void c4iw_init_wr_wait(struct c4iw_wr_wait *wr_waitp) | ||
91 | { | ||
92 | wr_waitp->ret = 0; | ||
93 | wr_waitp->done = 0; | ||
94 | init_waitqueue_head(&wr_waitp->wait); | ||
95 | } | ||
96 | |||
97 | struct c4iw_resource { | 82 | struct c4iw_resource { |
98 | struct kfifo tpt_fifo; | 83 | struct kfifo tpt_fifo; |
99 | spinlock_t tpt_fifo_lock; | 84 | spinlock_t tpt_fifo_lock; |
@@ -127,8 +112,11 @@ struct c4iw_rdev { | |||
127 | struct c4iw_dev_ucontext uctx; | 112 | struct c4iw_dev_ucontext uctx; |
128 | struct gen_pool *pbl_pool; | 113 | struct gen_pool *pbl_pool; |
129 | struct gen_pool *rqt_pool; | 114 | struct gen_pool *rqt_pool; |
115 | struct gen_pool *ocqp_pool; | ||
130 | u32 flags; | 116 | u32 flags; |
131 | struct cxgb4_lld_info lldi; | 117 | struct cxgb4_lld_info lldi; |
118 | unsigned long oc_mw_pa; | ||
119 | void __iomem *oc_mw_kva; | ||
132 | }; | 120 | }; |
133 | 121 | ||
134 | static inline int c4iw_fatal_error(struct c4iw_rdev *rdev) | 122 | static inline int c4iw_fatal_error(struct c4iw_rdev *rdev) |
@@ -141,6 +129,52 @@ static inline int c4iw_num_stags(struct c4iw_rdev *rdev) | |||
141 | return min((int)T4_MAX_NUM_STAG, (int)(rdev->lldi.vr->stag.size >> 5)); | 129 | return min((int)T4_MAX_NUM_STAG, (int)(rdev->lldi.vr->stag.size >> 5)); |
142 | } | 130 | } |
143 | 131 | ||
132 | #define C4IW_WR_TO (10*HZ) | ||
133 | |||
134 | struct c4iw_wr_wait { | ||
135 | struct completion completion; | ||
136 | int ret; | ||
137 | }; | ||
138 | |||
139 | static inline void c4iw_init_wr_wait(struct c4iw_wr_wait *wr_waitp) | ||
140 | { | ||
141 | wr_waitp->ret = 0; | ||
142 | init_completion(&wr_waitp->completion); | ||
143 | } | ||
144 | |||
145 | static inline void c4iw_wake_up(struct c4iw_wr_wait *wr_waitp, int ret) | ||
146 | { | ||
147 | wr_waitp->ret = ret; | ||
148 | complete(&wr_waitp->completion); | ||
149 | } | ||
150 | |||
151 | static inline int c4iw_wait_for_reply(struct c4iw_rdev *rdev, | ||
152 | struct c4iw_wr_wait *wr_waitp, | ||
153 | u32 hwtid, u32 qpid, | ||
154 | const char *func) | ||
155 | { | ||
156 | unsigned to = C4IW_WR_TO; | ||
157 | int ret; | ||
158 | |||
159 | do { | ||
160 | ret = wait_for_completion_timeout(&wr_waitp->completion, to); | ||
161 | if (!ret) { | ||
162 | printk(KERN_ERR MOD "%s - Device %s not responding - " | ||
163 | "tid %u qpid %u\n", func, | ||
164 | pci_name(rdev->lldi.pdev), hwtid, qpid); | ||
165 | if (c4iw_fatal_error(rdev)) { | ||
166 | wr_waitp->ret = -EIO; | ||
167 | break; | ||
168 | } | ||
169 | to = to << 2; | ||
170 | } | ||
171 | } while (!ret); | ||
172 | if (wr_waitp->ret) | ||
173 | PDBG("%s: FW reply %d tid %u qpid %u\n", | ||
174 | pci_name(rdev->lldi.pdev), wr_waitp->ret, hwtid, qpid); | ||
175 | return wr_waitp->ret; | ||
176 | } | ||
177 | |||
144 | struct c4iw_dev { | 178 | struct c4iw_dev { |
145 | struct ib_device ibdev; | 179 | struct ib_device ibdev; |
146 | struct c4iw_rdev rdev; | 180 | struct c4iw_rdev rdev; |
@@ -149,10 +183,7 @@ struct c4iw_dev { | |||
149 | struct idr qpidr; | 183 | struct idr qpidr; |
150 | struct idr mmidr; | 184 | struct idr mmidr; |
151 | spinlock_t lock; | 185 | spinlock_t lock; |
152 | struct list_head entry; | ||
153 | struct delayed_work db_drop_task; | ||
154 | struct dentry *debugfs_root; | 186 | struct dentry *debugfs_root; |
155 | u8 registered; | ||
156 | }; | 187 | }; |
157 | 188 | ||
158 | static inline struct c4iw_dev *to_c4iw_dev(struct ib_device *ibdev) | 189 | static inline struct c4iw_dev *to_c4iw_dev(struct ib_device *ibdev) |
@@ -327,6 +358,7 @@ struct c4iw_qp { | |||
327 | struct c4iw_qp_attributes attr; | 358 | struct c4iw_qp_attributes attr; |
328 | struct t4_wq wq; | 359 | struct t4_wq wq; |
329 | spinlock_t lock; | 360 | spinlock_t lock; |
361 | struct mutex mutex; | ||
330 | atomic_t refcnt; | 362 | atomic_t refcnt; |
331 | wait_queue_head_t wait; | 363 | wait_queue_head_t wait; |
332 | struct timer_list timer; | 364 | struct timer_list timer; |
@@ -579,12 +611,10 @@ struct c4iw_ep_common { | |||
579 | struct c4iw_dev *dev; | 611 | struct c4iw_dev *dev; |
580 | enum c4iw_ep_state state; | 612 | enum c4iw_ep_state state; |
581 | struct kref kref; | 613 | struct kref kref; |
582 | spinlock_t lock; | 614 | struct mutex mutex; |
583 | struct sockaddr_in local_addr; | 615 | struct sockaddr_in local_addr; |
584 | struct sockaddr_in remote_addr; | 616 | struct sockaddr_in remote_addr; |
585 | wait_queue_head_t waitq; | 617 | struct c4iw_wr_wait wr_wait; |
586 | int rpl_done; | ||
587 | int rpl_err; | ||
588 | unsigned long flags; | 618 | unsigned long flags; |
589 | }; | 619 | }; |
590 | 620 | ||
@@ -654,8 +684,10 @@ int c4iw_init_resource(struct c4iw_rdev *rdev, u32 nr_tpt, u32 nr_pdid); | |||
654 | int c4iw_init_ctrl_qp(struct c4iw_rdev *rdev); | 684 | int c4iw_init_ctrl_qp(struct c4iw_rdev *rdev); |
655 | int c4iw_pblpool_create(struct c4iw_rdev *rdev); | 685 | int c4iw_pblpool_create(struct c4iw_rdev *rdev); |
656 | int c4iw_rqtpool_create(struct c4iw_rdev *rdev); | 686 | int c4iw_rqtpool_create(struct c4iw_rdev *rdev); |
687 | int c4iw_ocqp_pool_create(struct c4iw_rdev *rdev); | ||
657 | void c4iw_pblpool_destroy(struct c4iw_rdev *rdev); | 688 | void c4iw_pblpool_destroy(struct c4iw_rdev *rdev); |
658 | void c4iw_rqtpool_destroy(struct c4iw_rdev *rdev); | 689 | void c4iw_rqtpool_destroy(struct c4iw_rdev *rdev); |
690 | void c4iw_ocqp_pool_destroy(struct c4iw_rdev *rdev); | ||
659 | void c4iw_destroy_resource(struct c4iw_resource *rscp); | 691 | void c4iw_destroy_resource(struct c4iw_resource *rscp); |
660 | int c4iw_destroy_ctrl_qp(struct c4iw_rdev *rdev); | 692 | int c4iw_destroy_ctrl_qp(struct c4iw_rdev *rdev); |
661 | int c4iw_register_device(struct c4iw_dev *dev); | 693 | int c4iw_register_device(struct c4iw_dev *dev); |
@@ -721,6 +753,8 @@ u32 c4iw_rqtpool_alloc(struct c4iw_rdev *rdev, int size); | |||
721 | void c4iw_rqtpool_free(struct c4iw_rdev *rdev, u32 addr, int size); | 753 | void c4iw_rqtpool_free(struct c4iw_rdev *rdev, u32 addr, int size); |
722 | u32 c4iw_pblpool_alloc(struct c4iw_rdev *rdev, int size); | 754 | u32 c4iw_pblpool_alloc(struct c4iw_rdev *rdev, int size); |
723 | void c4iw_pblpool_free(struct c4iw_rdev *rdev, u32 addr, int size); | 755 | void c4iw_pblpool_free(struct c4iw_rdev *rdev, u32 addr, int size); |
756 | u32 c4iw_ocqp_pool_alloc(struct c4iw_rdev *rdev, int size); | ||
757 | void c4iw_ocqp_pool_free(struct c4iw_rdev *rdev, u32 addr, int size); | ||
724 | int c4iw_ofld_send(struct c4iw_rdev *rdev, struct sk_buff *skb); | 758 | int c4iw_ofld_send(struct c4iw_rdev *rdev, struct sk_buff *skb); |
725 | void c4iw_flush_hw_cq(struct t4_cq *cq); | 759 | void c4iw_flush_hw_cq(struct t4_cq *cq); |
726 | void c4iw_count_rcqes(struct t4_cq *cq, struct t4_wq *wq, int *count); | 760 | void c4iw_count_rcqes(struct t4_cq *cq, struct t4_wq *wq, int *count); |
@@ -730,7 +764,6 @@ int c4iw_flush_rq(struct t4_wq *wq, struct t4_cq *cq, int count); | |||
730 | int c4iw_flush_sq(struct t4_wq *wq, struct t4_cq *cq, int count); | 764 | int c4iw_flush_sq(struct t4_wq *wq, struct t4_cq *cq, int count); |
731 | int c4iw_ev_handler(struct c4iw_dev *rnicp, u32 qid); | 765 | int c4iw_ev_handler(struct c4iw_dev *rnicp, u32 qid); |
732 | u16 c4iw_rqes_posted(struct c4iw_qp *qhp); | 766 | u16 c4iw_rqes_posted(struct c4iw_qp *qhp); |
733 | int c4iw_post_zb_read(struct c4iw_qp *qhp); | ||
734 | int c4iw_post_terminate(struct c4iw_qp *qhp, struct t4_cqe *err_cqe); | 767 | int c4iw_post_terminate(struct c4iw_qp *qhp, struct t4_cqe *err_cqe); |
735 | u32 c4iw_get_cqid(struct c4iw_rdev *rdev, struct c4iw_dev_ucontext *uctx); | 768 | u32 c4iw_get_cqid(struct c4iw_rdev *rdev, struct c4iw_dev_ucontext *uctx); |
736 | void c4iw_put_cqid(struct c4iw_rdev *rdev, u32 qid, | 769 | void c4iw_put_cqid(struct c4iw_rdev *rdev, u32 qid, |
diff --git a/drivers/infiniband/hw/cxgb4/mem.c b/drivers/infiniband/hw/cxgb4/mem.c index 269373a62f22..0347eed4a167 100644 --- a/drivers/infiniband/hw/cxgb4/mem.c +++ b/drivers/infiniband/hw/cxgb4/mem.c | |||
@@ -71,7 +71,7 @@ static int write_adapter_mem(struct c4iw_rdev *rdev, u32 addr, u32 len, | |||
71 | if (i == (num_wqe-1)) { | 71 | if (i == (num_wqe-1)) { |
72 | req->wr.wr_hi = cpu_to_be32(FW_WR_OP(FW_ULPTX_WR) | | 72 | req->wr.wr_hi = cpu_to_be32(FW_WR_OP(FW_ULPTX_WR) | |
73 | FW_WR_COMPL(1)); | 73 | FW_WR_COMPL(1)); |
74 | req->wr.wr_lo = (__force __be64)&wr_wait; | 74 | req->wr.wr_lo = (__force __be64)(unsigned long) &wr_wait; |
75 | } else | 75 | } else |
76 | req->wr.wr_hi = cpu_to_be32(FW_WR_OP(FW_ULPTX_WR)); | 76 | req->wr.wr_hi = cpu_to_be32(FW_WR_OP(FW_ULPTX_WR)); |
77 | req->wr.wr_mid = cpu_to_be32( | 77 | req->wr.wr_mid = cpu_to_be32( |
@@ -103,14 +103,7 @@ static int write_adapter_mem(struct c4iw_rdev *rdev, u32 addr, u32 len, | |||
103 | len -= C4IW_MAX_INLINE_SIZE; | 103 | len -= C4IW_MAX_INLINE_SIZE; |
104 | } | 104 | } |
105 | 105 | ||
106 | wait_event_timeout(wr_wait.wait, wr_wait.done, C4IW_WR_TO); | 106 | ret = c4iw_wait_for_reply(rdev, &wr_wait, 0, 0, __func__); |
107 | if (!wr_wait.done) { | ||
108 | printk(KERN_ERR MOD "Device %s not responding!\n", | ||
109 | pci_name(rdev->lldi.pdev)); | ||
110 | rdev->flags = T4_FATAL_ERROR; | ||
111 | ret = -EIO; | ||
112 | } else | ||
113 | ret = wr_wait.ret; | ||
114 | return ret; | 107 | return ret; |
115 | } | 108 | } |
116 | 109 | ||
@@ -632,7 +625,7 @@ pbl_done: | |||
632 | mhp->attr.perms = c4iw_ib_to_tpt_access(acc); | 625 | mhp->attr.perms = c4iw_ib_to_tpt_access(acc); |
633 | mhp->attr.va_fbo = virt; | 626 | mhp->attr.va_fbo = virt; |
634 | mhp->attr.page_size = shift - 12; | 627 | mhp->attr.page_size = shift - 12; |
635 | mhp->attr.len = (u32) length; | 628 | mhp->attr.len = length; |
636 | 629 | ||
637 | err = register_mem(rhp, php, mhp, shift); | 630 | err = register_mem(rhp, php, mhp, shift); |
638 | if (err) | 631 | if (err) |
diff --git a/drivers/infiniband/hw/cxgb4/provider.c b/drivers/infiniband/hw/cxgb4/provider.c index 8f645c83a125..5b9e4220ca08 100644 --- a/drivers/infiniband/hw/cxgb4/provider.c +++ b/drivers/infiniband/hw/cxgb4/provider.c | |||
@@ -54,9 +54,9 @@ | |||
54 | 54 | ||
55 | #include "iw_cxgb4.h" | 55 | #include "iw_cxgb4.h" |
56 | 56 | ||
57 | static int fastreg_support; | 57 | static int fastreg_support = 1; |
58 | module_param(fastreg_support, int, 0644); | 58 | module_param(fastreg_support, int, 0644); |
59 | MODULE_PARM_DESC(fastreg_support, "Advertise fastreg support (default=0)"); | 59 | MODULE_PARM_DESC(fastreg_support, "Advertise fastreg support (default=1)"); |
60 | 60 | ||
61 | static int c4iw_modify_port(struct ib_device *ibdev, | 61 | static int c4iw_modify_port(struct ib_device *ibdev, |
62 | u8 port, int port_modify_mask, | 62 | u8 port, int port_modify_mask, |
@@ -149,19 +149,28 @@ static int c4iw_mmap(struct ib_ucontext *context, struct vm_area_struct *vma) | |||
149 | addr = mm->addr; | 149 | addr = mm->addr; |
150 | kfree(mm); | 150 | kfree(mm); |
151 | 151 | ||
152 | if ((addr >= pci_resource_start(rdev->lldi.pdev, 2)) && | 152 | if ((addr >= pci_resource_start(rdev->lldi.pdev, 0)) && |
153 | (addr < (pci_resource_start(rdev->lldi.pdev, 2) + | 153 | (addr < (pci_resource_start(rdev->lldi.pdev, 0) + |
154 | pci_resource_len(rdev->lldi.pdev, 2)))) { | 154 | pci_resource_len(rdev->lldi.pdev, 0)))) { |
155 | 155 | ||
156 | /* | 156 | /* |
157 | * Map T4 DB register. | 157 | * MA_SYNC register... |
158 | */ | 158 | */ |
159 | if (vma->vm_flags & VM_READ) | ||
160 | return -EPERM; | ||
161 | |||
162 | vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); | 159 | vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); |
163 | vma->vm_flags |= VM_DONTCOPY | VM_DONTEXPAND; | 160 | ret = io_remap_pfn_range(vma, vma->vm_start, |
164 | vma->vm_flags &= ~VM_MAYREAD; | 161 | addr >> PAGE_SHIFT, |
162 | len, vma->vm_page_prot); | ||
163 | } else if ((addr >= pci_resource_start(rdev->lldi.pdev, 2)) && | ||
164 | (addr < (pci_resource_start(rdev->lldi.pdev, 2) + | ||
165 | pci_resource_len(rdev->lldi.pdev, 2)))) { | ||
166 | |||
167 | /* | ||
168 | * Map user DB or OCQP memory... | ||
169 | */ | ||
170 | if (addr >= rdev->oc_mw_pa) | ||
171 | vma->vm_page_prot = t4_pgprot_wc(vma->vm_page_prot); | ||
172 | else | ||
173 | vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); | ||
165 | ret = io_remap_pfn_range(vma, vma->vm_start, | 174 | ret = io_remap_pfn_range(vma, vma->vm_start, |
166 | addr >> PAGE_SHIFT, | 175 | addr >> PAGE_SHIFT, |
167 | len, vma->vm_page_prot); | 176 | len, vma->vm_page_prot); |
@@ -382,7 +391,17 @@ static ssize_t show_board(struct device *dev, struct device_attribute *attr, | |||
382 | static int c4iw_get_mib(struct ib_device *ibdev, | 391 | static int c4iw_get_mib(struct ib_device *ibdev, |
383 | union rdma_protocol_stats *stats) | 392 | union rdma_protocol_stats *stats) |
384 | { | 393 | { |
385 | return -ENOSYS; | 394 | struct tp_tcp_stats v4, v6; |
395 | struct c4iw_dev *c4iw_dev = to_c4iw_dev(ibdev); | ||
396 | |||
397 | cxgb4_get_tcp_stats(c4iw_dev->rdev.lldi.pdev, &v4, &v6); | ||
398 | memset(stats, 0, sizeof *stats); | ||
399 | stats->iw.tcpInSegs = v4.tcpInSegs + v6.tcpInSegs; | ||
400 | stats->iw.tcpOutSegs = v4.tcpOutSegs + v6.tcpOutSegs; | ||
401 | stats->iw.tcpRetransSegs = v4.tcpRetransSegs + v6.tcpRetransSegs; | ||
402 | stats->iw.tcpOutRsts = v4.tcpOutRsts + v6.tcpOutSegs; | ||
403 | |||
404 | return 0; | ||
386 | } | 405 | } |
387 | 406 | ||
388 | static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL); | 407 | static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL); |
@@ -472,6 +491,7 @@ int c4iw_register_device(struct c4iw_dev *dev) | |||
472 | dev->ibdev.post_send = c4iw_post_send; | 491 | dev->ibdev.post_send = c4iw_post_send; |
473 | dev->ibdev.post_recv = c4iw_post_receive; | 492 | dev->ibdev.post_recv = c4iw_post_receive; |
474 | dev->ibdev.get_protocol_stats = c4iw_get_mib; | 493 | dev->ibdev.get_protocol_stats = c4iw_get_mib; |
494 | dev->ibdev.uverbs_abi_ver = C4IW_UVERBS_ABI_VERSION; | ||
475 | 495 | ||
476 | dev->ibdev.iwcm = kmalloc(sizeof(struct iw_cm_verbs), GFP_KERNEL); | 496 | dev->ibdev.iwcm = kmalloc(sizeof(struct iw_cm_verbs), GFP_KERNEL); |
477 | if (!dev->ibdev.iwcm) | 497 | if (!dev->ibdev.iwcm) |
@@ -496,7 +516,6 @@ int c4iw_register_device(struct c4iw_dev *dev) | |||
496 | if (ret) | 516 | if (ret) |
497 | goto bail2; | 517 | goto bail2; |
498 | } | 518 | } |
499 | dev->registered = 1; | ||
500 | return 0; | 519 | return 0; |
501 | bail2: | 520 | bail2: |
502 | ib_unregister_device(&dev->ibdev); | 521 | ib_unregister_device(&dev->ibdev); |
@@ -515,6 +534,5 @@ void c4iw_unregister_device(struct c4iw_dev *dev) | |||
515 | c4iw_class_attributes[i]); | 534 | c4iw_class_attributes[i]); |
516 | ib_unregister_device(&dev->ibdev); | 535 | ib_unregister_device(&dev->ibdev); |
517 | kfree(dev->ibdev.iwcm); | 536 | kfree(dev->ibdev.iwcm); |
518 | dev->registered = 0; | ||
519 | return; | 537 | return; |
520 | } | 538 | } |
diff --git a/drivers/infiniband/hw/cxgb4/qp.c b/drivers/infiniband/hw/cxgb4/qp.c index 93f6e5bf0ec5..a41578e48c7b 100644 --- a/drivers/infiniband/hw/cxgb4/qp.c +++ b/drivers/infiniband/hw/cxgb4/qp.c | |||
@@ -31,6 +31,63 @@ | |||
31 | */ | 31 | */ |
32 | #include "iw_cxgb4.h" | 32 | #include "iw_cxgb4.h" |
33 | 33 | ||
34 | static int ocqp_support = 1; | ||
35 | module_param(ocqp_support, int, 0644); | ||
36 | MODULE_PARM_DESC(ocqp_support, "Support on-chip SQs (default=1)"); | ||
37 | |||
38 | static void set_state(struct c4iw_qp *qhp, enum c4iw_qp_state state) | ||
39 | { | ||
40 | unsigned long flag; | ||
41 | spin_lock_irqsave(&qhp->lock, flag); | ||
42 | qhp->attr.state = state; | ||
43 | spin_unlock_irqrestore(&qhp->lock, flag); | ||
44 | } | ||
45 | |||
46 | static void dealloc_oc_sq(struct c4iw_rdev *rdev, struct t4_sq *sq) | ||
47 | { | ||
48 | c4iw_ocqp_pool_free(rdev, sq->dma_addr, sq->memsize); | ||
49 | } | ||
50 | |||
51 | static void dealloc_host_sq(struct c4iw_rdev *rdev, struct t4_sq *sq) | ||
52 | { | ||
53 | dma_free_coherent(&(rdev->lldi.pdev->dev), sq->memsize, sq->queue, | ||
54 | pci_unmap_addr(sq, mapping)); | ||
55 | } | ||
56 | |||
57 | static void dealloc_sq(struct c4iw_rdev *rdev, struct t4_sq *sq) | ||
58 | { | ||
59 | if (t4_sq_onchip(sq)) | ||
60 | dealloc_oc_sq(rdev, sq); | ||
61 | else | ||
62 | dealloc_host_sq(rdev, sq); | ||
63 | } | ||
64 | |||
65 | static int alloc_oc_sq(struct c4iw_rdev *rdev, struct t4_sq *sq) | ||
66 | { | ||
67 | if (!ocqp_support || !t4_ocqp_supported()) | ||
68 | return -ENOSYS; | ||
69 | sq->dma_addr = c4iw_ocqp_pool_alloc(rdev, sq->memsize); | ||
70 | if (!sq->dma_addr) | ||
71 | return -ENOMEM; | ||
72 | sq->phys_addr = rdev->oc_mw_pa + sq->dma_addr - | ||
73 | rdev->lldi.vr->ocq.start; | ||
74 | sq->queue = (__force union t4_wr *)(rdev->oc_mw_kva + sq->dma_addr - | ||
75 | rdev->lldi.vr->ocq.start); | ||
76 | sq->flags |= T4_SQ_ONCHIP; | ||
77 | return 0; | ||
78 | } | ||
79 | |||
80 | static int alloc_host_sq(struct c4iw_rdev *rdev, struct t4_sq *sq) | ||
81 | { | ||
82 | sq->queue = dma_alloc_coherent(&(rdev->lldi.pdev->dev), sq->memsize, | ||
83 | &(sq->dma_addr), GFP_KERNEL); | ||
84 | if (!sq->queue) | ||
85 | return -ENOMEM; | ||
86 | sq->phys_addr = virt_to_phys(sq->queue); | ||
87 | pci_unmap_addr_set(sq, mapping, sq->dma_addr); | ||
88 | return 0; | ||
89 | } | ||
90 | |||
34 | static int destroy_qp(struct c4iw_rdev *rdev, struct t4_wq *wq, | 91 | static int destroy_qp(struct c4iw_rdev *rdev, struct t4_wq *wq, |
35 | struct c4iw_dev_ucontext *uctx) | 92 | struct c4iw_dev_ucontext *uctx) |
36 | { | 93 | { |
@@ -41,9 +98,7 @@ static int destroy_qp(struct c4iw_rdev *rdev, struct t4_wq *wq, | |||
41 | dma_free_coherent(&(rdev->lldi.pdev->dev), | 98 | dma_free_coherent(&(rdev->lldi.pdev->dev), |
42 | wq->rq.memsize, wq->rq.queue, | 99 | wq->rq.memsize, wq->rq.queue, |
43 | dma_unmap_addr(&wq->rq, mapping)); | 100 | dma_unmap_addr(&wq->rq, mapping)); |
44 | dma_free_coherent(&(rdev->lldi.pdev->dev), | 101 | dealloc_sq(rdev, &wq->sq); |
45 | wq->sq.memsize, wq->sq.queue, | ||
46 | dma_unmap_addr(&wq->sq, mapping)); | ||
47 | c4iw_rqtpool_free(rdev, wq->rq.rqt_hwaddr, wq->rq.rqt_size); | 102 | c4iw_rqtpool_free(rdev, wq->rq.rqt_hwaddr, wq->rq.rqt_size); |
48 | kfree(wq->rq.sw_rq); | 103 | kfree(wq->rq.sw_rq); |
49 | kfree(wq->sq.sw_sq); | 104 | kfree(wq->sq.sw_sq); |
@@ -93,11 +148,12 @@ static int create_qp(struct c4iw_rdev *rdev, struct t4_wq *wq, | |||
93 | if (!wq->rq.rqt_hwaddr) | 148 | if (!wq->rq.rqt_hwaddr) |
94 | goto err4; | 149 | goto err4; |
95 | 150 | ||
96 | wq->sq.queue = dma_alloc_coherent(&(rdev->lldi.pdev->dev), | 151 | if (user) { |
97 | wq->sq.memsize, &(wq->sq.dma_addr), | 152 | if (alloc_oc_sq(rdev, &wq->sq) && alloc_host_sq(rdev, &wq->sq)) |
98 | GFP_KERNEL); | 153 | goto err5; |
99 | if (!wq->sq.queue) | 154 | } else |
100 | goto err5; | 155 | if (alloc_host_sq(rdev, &wq->sq)) |
156 | goto err5; | ||
101 | memset(wq->sq.queue, 0, wq->sq.memsize); | 157 | memset(wq->sq.queue, 0, wq->sq.memsize); |
102 | dma_unmap_addr_set(&wq->sq, mapping, wq->sq.dma_addr); | 158 | dma_unmap_addr_set(&wq->sq, mapping, wq->sq.dma_addr); |
103 | 159 | ||
@@ -144,7 +200,7 @@ static int create_qp(struct c4iw_rdev *rdev, struct t4_wq *wq, | |||
144 | V_FW_RI_RES_WR_NRES(2) | | 200 | V_FW_RI_RES_WR_NRES(2) | |
145 | FW_WR_COMPL(1)); | 201 | FW_WR_COMPL(1)); |
146 | res_wr->len16_pkd = cpu_to_be32(DIV_ROUND_UP(wr_len, 16)); | 202 | res_wr->len16_pkd = cpu_to_be32(DIV_ROUND_UP(wr_len, 16)); |
147 | res_wr->cookie = (u64)&wr_wait; | 203 | res_wr->cookie = (unsigned long) &wr_wait; |
148 | res = res_wr->res; | 204 | res = res_wr->res; |
149 | res->u.sqrq.restype = FW_RI_RES_TYPE_SQ; | 205 | res->u.sqrq.restype = FW_RI_RES_TYPE_SQ; |
150 | res->u.sqrq.op = FW_RI_RES_OP_WRITE; | 206 | res->u.sqrq.op = FW_RI_RES_OP_WRITE; |
@@ -158,12 +214,13 @@ static int create_qp(struct c4iw_rdev *rdev, struct t4_wq *wq, | |||
158 | V_FW_RI_RES_WR_HOSTFCMODE(0) | /* no host cidx updates */ | 214 | V_FW_RI_RES_WR_HOSTFCMODE(0) | /* no host cidx updates */ |
159 | V_FW_RI_RES_WR_CPRIO(0) | /* don't keep in chip cache */ | 215 | V_FW_RI_RES_WR_CPRIO(0) | /* don't keep in chip cache */ |
160 | V_FW_RI_RES_WR_PCIECHN(0) | /* set by uP at ri_init time */ | 216 | V_FW_RI_RES_WR_PCIECHN(0) | /* set by uP at ri_init time */ |
217 | (t4_sq_onchip(&wq->sq) ? F_FW_RI_RES_WR_ONCHIP : 0) | | ||
161 | V_FW_RI_RES_WR_IQID(scq->cqid)); | 218 | V_FW_RI_RES_WR_IQID(scq->cqid)); |
162 | res->u.sqrq.dcaen_to_eqsize = cpu_to_be32( | 219 | res->u.sqrq.dcaen_to_eqsize = cpu_to_be32( |
163 | V_FW_RI_RES_WR_DCAEN(0) | | 220 | V_FW_RI_RES_WR_DCAEN(0) | |
164 | V_FW_RI_RES_WR_DCACPU(0) | | 221 | V_FW_RI_RES_WR_DCACPU(0) | |
165 | V_FW_RI_RES_WR_FBMIN(2) | | 222 | V_FW_RI_RES_WR_FBMIN(2) | |
166 | V_FW_RI_RES_WR_FBMAX(3) | | 223 | V_FW_RI_RES_WR_FBMAX(2) | |
167 | V_FW_RI_RES_WR_CIDXFTHRESHO(0) | | 224 | V_FW_RI_RES_WR_CIDXFTHRESHO(0) | |
168 | V_FW_RI_RES_WR_CIDXFTHRESH(0) | | 225 | V_FW_RI_RES_WR_CIDXFTHRESH(0) | |
169 | V_FW_RI_RES_WR_EQSIZE(eqsize)); | 226 | V_FW_RI_RES_WR_EQSIZE(eqsize)); |
@@ -186,7 +243,7 @@ static int create_qp(struct c4iw_rdev *rdev, struct t4_wq *wq, | |||
186 | V_FW_RI_RES_WR_DCAEN(0) | | 243 | V_FW_RI_RES_WR_DCAEN(0) | |
187 | V_FW_RI_RES_WR_DCACPU(0) | | 244 | V_FW_RI_RES_WR_DCACPU(0) | |
188 | V_FW_RI_RES_WR_FBMIN(2) | | 245 | V_FW_RI_RES_WR_FBMIN(2) | |
189 | V_FW_RI_RES_WR_FBMAX(3) | | 246 | V_FW_RI_RES_WR_FBMAX(2) | |
190 | V_FW_RI_RES_WR_CIDXFTHRESHO(0) | | 247 | V_FW_RI_RES_WR_CIDXFTHRESHO(0) | |
191 | V_FW_RI_RES_WR_CIDXFTHRESH(0) | | 248 | V_FW_RI_RES_WR_CIDXFTHRESH(0) | |
192 | V_FW_RI_RES_WR_EQSIZE(eqsize)); | 249 | V_FW_RI_RES_WR_EQSIZE(eqsize)); |
@@ -198,14 +255,7 @@ static int create_qp(struct c4iw_rdev *rdev, struct t4_wq *wq, | |||
198 | ret = c4iw_ofld_send(rdev, skb); | 255 | ret = c4iw_ofld_send(rdev, skb); |
199 | if (ret) | 256 | if (ret) |
200 | goto err7; | 257 | goto err7; |
201 | wait_event_timeout(wr_wait.wait, wr_wait.done, C4IW_WR_TO); | 258 | ret = c4iw_wait_for_reply(rdev, &wr_wait, 0, wq->sq.qid, __func__); |
202 | if (!wr_wait.done) { | ||
203 | printk(KERN_ERR MOD "Device %s not responding!\n", | ||
204 | pci_name(rdev->lldi.pdev)); | ||
205 | rdev->flags = T4_FATAL_ERROR; | ||
206 | ret = -EIO; | ||
207 | } else | ||
208 | ret = wr_wait.ret; | ||
209 | if (ret) | 259 | if (ret) |
210 | goto err7; | 260 | goto err7; |
211 | 261 | ||
@@ -219,9 +269,7 @@ err7: | |||
219 | wq->rq.memsize, wq->rq.queue, | 269 | wq->rq.memsize, wq->rq.queue, |
220 | dma_unmap_addr(&wq->rq, mapping)); | 270 | dma_unmap_addr(&wq->rq, mapping)); |
221 | err6: | 271 | err6: |
222 | dma_free_coherent(&(rdev->lldi.pdev->dev), | 272 | dealloc_sq(rdev, &wq->sq); |
223 | wq->sq.memsize, wq->sq.queue, | ||
224 | dma_unmap_addr(&wq->sq, mapping)); | ||
225 | err5: | 273 | err5: |
226 | c4iw_rqtpool_free(rdev, wq->rq.rqt_hwaddr, wq->rq.rqt_size); | 274 | c4iw_rqtpool_free(rdev, wq->rq.rqt_hwaddr, wq->rq.rqt_size); |
227 | err4: | 275 | err4: |
@@ -263,6 +311,9 @@ static int build_immd(struct t4_sq *sq, struct fw_ri_immd *immdp, | |||
263 | rem -= len; | 311 | rem -= len; |
264 | } | 312 | } |
265 | } | 313 | } |
314 | len = roundup(plen + sizeof *immdp, 16) - (plen + sizeof *immdp); | ||
315 | if (len) | ||
316 | memset(dstp, 0, len); | ||
266 | immdp->op = FW_RI_DATA_IMMD; | 317 | immdp->op = FW_RI_DATA_IMMD; |
267 | immdp->r1 = 0; | 318 | immdp->r1 = 0; |
268 | immdp->r2 = 0; | 319 | immdp->r2 = 0; |
@@ -292,6 +343,7 @@ static int build_isgl(__be64 *queue_start, __be64 *queue_end, | |||
292 | if (++flitp == queue_end) | 343 | if (++flitp == queue_end) |
293 | flitp = queue_start; | 344 | flitp = queue_start; |
294 | } | 345 | } |
346 | *flitp = (__force __be64)0; | ||
295 | isglp->op = FW_RI_DATA_ISGL; | 347 | isglp->op = FW_RI_DATA_ISGL; |
296 | isglp->r1 = 0; | 348 | isglp->r1 = 0; |
297 | isglp->nsge = cpu_to_be16(num_sge); | 349 | isglp->nsge = cpu_to_be16(num_sge); |
@@ -453,13 +505,15 @@ static int build_rdma_recv(struct c4iw_qp *qhp, union t4_recv_wr *wqe, | |||
453 | return 0; | 505 | return 0; |
454 | } | 506 | } |
455 | 507 | ||
456 | static int build_fastreg(union t4_wr *wqe, struct ib_send_wr *wr, u8 *len16) | 508 | static int build_fastreg(struct t4_sq *sq, union t4_wr *wqe, |
509 | struct ib_send_wr *wr, u8 *len16) | ||
457 | { | 510 | { |
458 | 511 | ||
459 | struct fw_ri_immd *imdp; | 512 | struct fw_ri_immd *imdp; |
460 | __be64 *p; | 513 | __be64 *p; |
461 | int i; | 514 | int i; |
462 | int pbllen = roundup(wr->wr.fast_reg.page_list_len * sizeof(u64), 32); | 515 | int pbllen = roundup(wr->wr.fast_reg.page_list_len * sizeof(u64), 32); |
516 | int rem; | ||
463 | 517 | ||
464 | if (wr->wr.fast_reg.page_list_len > T4_MAX_FR_DEPTH) | 518 | if (wr->wr.fast_reg.page_list_len > T4_MAX_FR_DEPTH) |
465 | return -EINVAL; | 519 | return -EINVAL; |
@@ -474,32 +528,28 @@ static int build_fastreg(union t4_wr *wqe, struct ib_send_wr *wr, u8 *len16) | |||
474 | wqe->fr.va_hi = cpu_to_be32(wr->wr.fast_reg.iova_start >> 32); | 528 | wqe->fr.va_hi = cpu_to_be32(wr->wr.fast_reg.iova_start >> 32); |
475 | wqe->fr.va_lo_fbo = cpu_to_be32(wr->wr.fast_reg.iova_start & | 529 | wqe->fr.va_lo_fbo = cpu_to_be32(wr->wr.fast_reg.iova_start & |
476 | 0xffffffff); | 530 | 0xffffffff); |
477 | if (pbllen > T4_MAX_FR_IMMD) { | 531 | WARN_ON(pbllen > T4_MAX_FR_IMMD); |
478 | struct c4iw_fr_page_list *c4pl = | 532 | imdp = (struct fw_ri_immd *)(&wqe->fr + 1); |
479 | to_c4iw_fr_page_list(wr->wr.fast_reg.page_list); | 533 | imdp->op = FW_RI_DATA_IMMD; |
480 | struct fw_ri_dsgl *sglp; | 534 | imdp->r1 = 0; |
481 | 535 | imdp->r2 = 0; | |
482 | sglp = (struct fw_ri_dsgl *)(&wqe->fr + 1); | 536 | imdp->immdlen = cpu_to_be32(pbllen); |
483 | sglp->op = FW_RI_DATA_DSGL; | 537 | p = (__be64 *)(imdp + 1); |
484 | sglp->r1 = 0; | 538 | rem = pbllen; |
485 | sglp->nsge = cpu_to_be16(1); | 539 | for (i = 0; i < wr->wr.fast_reg.page_list_len; i++) { |
486 | sglp->addr0 = cpu_to_be64(c4pl->dma_addr); | 540 | *p = cpu_to_be64((u64)wr->wr.fast_reg.page_list->page_list[i]); |
487 | sglp->len0 = cpu_to_be32(pbllen); | 541 | rem -= sizeof *p; |
488 | 542 | if (++p == (__be64 *)&sq->queue[sq->size]) | |
489 | *len16 = DIV_ROUND_UP(sizeof wqe->fr + sizeof *sglp, 16); | 543 | p = (__be64 *)sq->queue; |
490 | } else { | ||
491 | imdp = (struct fw_ri_immd *)(&wqe->fr + 1); | ||
492 | imdp->op = FW_RI_DATA_IMMD; | ||
493 | imdp->r1 = 0; | ||
494 | imdp->r2 = 0; | ||
495 | imdp->immdlen = cpu_to_be32(pbllen); | ||
496 | p = (__be64 *)(imdp + 1); | ||
497 | for (i = 0; i < wr->wr.fast_reg.page_list_len; i++, p++) | ||
498 | *p = cpu_to_be64( | ||
499 | (u64)wr->wr.fast_reg.page_list->page_list[i]); | ||
500 | *len16 = DIV_ROUND_UP(sizeof wqe->fr + sizeof *imdp + pbllen, | ||
501 | 16); | ||
502 | } | 544 | } |
545 | BUG_ON(rem < 0); | ||
546 | while (rem) { | ||
547 | *p = 0; | ||
548 | rem -= sizeof *p; | ||
549 | if (++p == (__be64 *)&sq->queue[sq->size]) | ||
550 | p = (__be64 *)sq->queue; | ||
551 | } | ||
552 | *len16 = DIV_ROUND_UP(sizeof wqe->fr + sizeof *imdp + pbllen, 16); | ||
503 | return 0; | 553 | return 0; |
504 | } | 554 | } |
505 | 555 | ||
@@ -587,7 +637,7 @@ int c4iw_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, | |||
587 | fw_opcode = FW_RI_RDMA_READ_WR; | 637 | fw_opcode = FW_RI_RDMA_READ_WR; |
588 | swsqe->opcode = FW_RI_READ_REQ; | 638 | swsqe->opcode = FW_RI_READ_REQ; |
589 | if (wr->opcode == IB_WR_RDMA_READ_WITH_INV) | 639 | if (wr->opcode == IB_WR_RDMA_READ_WITH_INV) |
590 | fw_flags |= FW_RI_RDMA_READ_INVALIDATE; | 640 | fw_flags = FW_RI_RDMA_READ_INVALIDATE; |
591 | else | 641 | else |
592 | fw_flags = 0; | 642 | fw_flags = 0; |
593 | err = build_rdma_read(wqe, wr, &len16); | 643 | err = build_rdma_read(wqe, wr, &len16); |
@@ -600,7 +650,7 @@ int c4iw_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, | |||
600 | case IB_WR_FAST_REG_MR: | 650 | case IB_WR_FAST_REG_MR: |
601 | fw_opcode = FW_RI_FR_NSMR_WR; | 651 | fw_opcode = FW_RI_FR_NSMR_WR; |
602 | swsqe->opcode = FW_RI_FAST_REGISTER; | 652 | swsqe->opcode = FW_RI_FAST_REGISTER; |
603 | err = build_fastreg(wqe, wr, &len16); | 653 | err = build_fastreg(&qhp->wq.sq, wqe, wr, &len16); |
604 | break; | 654 | break; |
605 | case IB_WR_LOCAL_INV: | 655 | case IB_WR_LOCAL_INV: |
606 | if (wr->send_flags & IB_SEND_FENCE) | 656 | if (wr->send_flags & IB_SEND_FENCE) |
@@ -842,36 +892,6 @@ static inline void build_term_codes(struct t4_cqe *err_cqe, u8 *layer_type, | |||
842 | } | 892 | } |
843 | } | 893 | } |
844 | 894 | ||
845 | int c4iw_post_zb_read(struct c4iw_qp *qhp) | ||
846 | { | ||
847 | union t4_wr *wqe; | ||
848 | struct sk_buff *skb; | ||
849 | u8 len16; | ||
850 | |||
851 | PDBG("%s enter\n", __func__); | ||
852 | skb = alloc_skb(40, GFP_KERNEL); | ||
853 | if (!skb) { | ||
854 | printk(KERN_ERR "%s cannot send zb_read!!\n", __func__); | ||
855 | return -ENOMEM; | ||
856 | } | ||
857 | set_wr_txq(skb, CPL_PRIORITY_DATA, qhp->ep->txq_idx); | ||
858 | |||
859 | wqe = (union t4_wr *)skb_put(skb, sizeof wqe->read); | ||
860 | memset(wqe, 0, sizeof wqe->read); | ||
861 | wqe->read.r2 = cpu_to_be64(0); | ||
862 | wqe->read.stag_sink = cpu_to_be32(1); | ||
863 | wqe->read.to_sink_hi = cpu_to_be32(0); | ||
864 | wqe->read.to_sink_lo = cpu_to_be32(1); | ||
865 | wqe->read.stag_src = cpu_to_be32(1); | ||
866 | wqe->read.plen = cpu_to_be32(0); | ||
867 | wqe->read.to_src_hi = cpu_to_be32(0); | ||
868 | wqe->read.to_src_lo = cpu_to_be32(1); | ||
869 | len16 = DIV_ROUND_UP(sizeof wqe->read, 16); | ||
870 | init_wr_hdr(wqe, 0, FW_RI_RDMA_READ_WR, FW_RI_COMPLETION_FLAG, len16); | ||
871 | |||
872 | return c4iw_ofld_send(&qhp->rhp->rdev, skb); | ||
873 | } | ||
874 | |||
875 | static void post_terminate(struct c4iw_qp *qhp, struct t4_cqe *err_cqe, | 895 | static void post_terminate(struct c4iw_qp *qhp, struct t4_cqe *err_cqe, |
876 | gfp_t gfp) | 896 | gfp_t gfp) |
877 | { | 897 | { |
@@ -905,46 +925,38 @@ static void post_terminate(struct c4iw_qp *qhp, struct t4_cqe *err_cqe, | |||
905 | * Assumes qhp lock is held. | 925 | * Assumes qhp lock is held. |
906 | */ | 926 | */ |
907 | static void __flush_qp(struct c4iw_qp *qhp, struct c4iw_cq *rchp, | 927 | static void __flush_qp(struct c4iw_qp *qhp, struct c4iw_cq *rchp, |
908 | struct c4iw_cq *schp, unsigned long *flag) | 928 | struct c4iw_cq *schp) |
909 | { | 929 | { |
910 | int count; | 930 | int count; |
911 | int flushed; | 931 | int flushed; |
932 | unsigned long flag; | ||
912 | 933 | ||
913 | PDBG("%s qhp %p rchp %p schp %p\n", __func__, qhp, rchp, schp); | 934 | PDBG("%s qhp %p rchp %p schp %p\n", __func__, qhp, rchp, schp); |
914 | /* take a ref on the qhp since we must release the lock */ | ||
915 | atomic_inc(&qhp->refcnt); | ||
916 | spin_unlock_irqrestore(&qhp->lock, *flag); | ||
917 | 935 | ||
918 | /* locking hierarchy: cq lock first, then qp lock. */ | 936 | /* locking hierarchy: cq lock first, then qp lock. */ |
919 | spin_lock_irqsave(&rchp->lock, *flag); | 937 | spin_lock_irqsave(&rchp->lock, flag); |
920 | spin_lock(&qhp->lock); | 938 | spin_lock(&qhp->lock); |
921 | c4iw_flush_hw_cq(&rchp->cq); | 939 | c4iw_flush_hw_cq(&rchp->cq); |
922 | c4iw_count_rcqes(&rchp->cq, &qhp->wq, &count); | 940 | c4iw_count_rcqes(&rchp->cq, &qhp->wq, &count); |
923 | flushed = c4iw_flush_rq(&qhp->wq, &rchp->cq, count); | 941 | flushed = c4iw_flush_rq(&qhp->wq, &rchp->cq, count); |
924 | spin_unlock(&qhp->lock); | 942 | spin_unlock(&qhp->lock); |
925 | spin_unlock_irqrestore(&rchp->lock, *flag); | 943 | spin_unlock_irqrestore(&rchp->lock, flag); |
926 | if (flushed) | 944 | if (flushed) |
927 | (*rchp->ibcq.comp_handler)(&rchp->ibcq, rchp->ibcq.cq_context); | 945 | (*rchp->ibcq.comp_handler)(&rchp->ibcq, rchp->ibcq.cq_context); |
928 | 946 | ||
929 | /* locking hierarchy: cq lock first, then qp lock. */ | 947 | /* locking hierarchy: cq lock first, then qp lock. */ |
930 | spin_lock_irqsave(&schp->lock, *flag); | 948 | spin_lock_irqsave(&schp->lock, flag); |
931 | spin_lock(&qhp->lock); | 949 | spin_lock(&qhp->lock); |
932 | c4iw_flush_hw_cq(&schp->cq); | 950 | c4iw_flush_hw_cq(&schp->cq); |
933 | c4iw_count_scqes(&schp->cq, &qhp->wq, &count); | 951 | c4iw_count_scqes(&schp->cq, &qhp->wq, &count); |
934 | flushed = c4iw_flush_sq(&qhp->wq, &schp->cq, count); | 952 | flushed = c4iw_flush_sq(&qhp->wq, &schp->cq, count); |
935 | spin_unlock(&qhp->lock); | 953 | spin_unlock(&qhp->lock); |
936 | spin_unlock_irqrestore(&schp->lock, *flag); | 954 | spin_unlock_irqrestore(&schp->lock, flag); |
937 | if (flushed) | 955 | if (flushed) |
938 | (*schp->ibcq.comp_handler)(&schp->ibcq, schp->ibcq.cq_context); | 956 | (*schp->ibcq.comp_handler)(&schp->ibcq, schp->ibcq.cq_context); |
939 | |||
940 | /* deref */ | ||
941 | if (atomic_dec_and_test(&qhp->refcnt)) | ||
942 | wake_up(&qhp->wait); | ||
943 | |||
944 | spin_lock_irqsave(&qhp->lock, *flag); | ||
945 | } | 957 | } |
946 | 958 | ||
947 | static void flush_qp(struct c4iw_qp *qhp, unsigned long *flag) | 959 | static void flush_qp(struct c4iw_qp *qhp) |
948 | { | 960 | { |
949 | struct c4iw_cq *rchp, *schp; | 961 | struct c4iw_cq *rchp, *schp; |
950 | 962 | ||
@@ -958,7 +970,7 @@ static void flush_qp(struct c4iw_qp *qhp, unsigned long *flag) | |||
958 | t4_set_cq_in_error(&schp->cq); | 970 | t4_set_cq_in_error(&schp->cq); |
959 | return; | 971 | return; |
960 | } | 972 | } |
961 | __flush_qp(qhp, rchp, schp, flag); | 973 | __flush_qp(qhp, rchp, schp); |
962 | } | 974 | } |
963 | 975 | ||
964 | static int rdma_fini(struct c4iw_dev *rhp, struct c4iw_qp *qhp, | 976 | static int rdma_fini(struct c4iw_dev *rhp, struct c4iw_qp *qhp, |
@@ -966,7 +978,6 @@ static int rdma_fini(struct c4iw_dev *rhp, struct c4iw_qp *qhp, | |||
966 | { | 978 | { |
967 | struct fw_ri_wr *wqe; | 979 | struct fw_ri_wr *wqe; |
968 | int ret; | 980 | int ret; |
969 | struct c4iw_wr_wait wr_wait; | ||
970 | struct sk_buff *skb; | 981 | struct sk_buff *skb; |
971 | 982 | ||
972 | PDBG("%s qhp %p qid 0x%x tid %u\n", __func__, qhp, qhp->wq.sq.qid, | 983 | PDBG("%s qhp %p qid 0x%x tid %u\n", __func__, qhp, qhp->wq.sq.qid, |
@@ -985,28 +996,15 @@ static int rdma_fini(struct c4iw_dev *rhp, struct c4iw_qp *qhp, | |||
985 | wqe->flowid_len16 = cpu_to_be32( | 996 | wqe->flowid_len16 = cpu_to_be32( |
986 | FW_WR_FLOWID(ep->hwtid) | | 997 | FW_WR_FLOWID(ep->hwtid) | |
987 | FW_WR_LEN16(DIV_ROUND_UP(sizeof *wqe, 16))); | 998 | FW_WR_LEN16(DIV_ROUND_UP(sizeof *wqe, 16))); |
988 | wqe->cookie = (u64)&wr_wait; | 999 | wqe->cookie = (unsigned long) &ep->com.wr_wait; |
989 | 1000 | ||
990 | wqe->u.fini.type = FW_RI_TYPE_FINI; | 1001 | wqe->u.fini.type = FW_RI_TYPE_FINI; |
991 | c4iw_init_wr_wait(&wr_wait); | ||
992 | ret = c4iw_ofld_send(&rhp->rdev, skb); | 1002 | ret = c4iw_ofld_send(&rhp->rdev, skb); |
993 | if (ret) | 1003 | if (ret) |
994 | goto out; | 1004 | goto out; |
995 | 1005 | ||
996 | wait_event_timeout(wr_wait.wait, wr_wait.done, C4IW_WR_TO); | 1006 | ret = c4iw_wait_for_reply(&rhp->rdev, &ep->com.wr_wait, qhp->ep->hwtid, |
997 | if (!wr_wait.done) { | 1007 | qhp->wq.sq.qid, __func__); |
998 | printk(KERN_ERR MOD "Device %s not responding!\n", | ||
999 | pci_name(rhp->rdev.lldi.pdev)); | ||
1000 | rhp->rdev.flags = T4_FATAL_ERROR; | ||
1001 | ret = -EIO; | ||
1002 | } else { | ||
1003 | ret = wr_wait.ret; | ||
1004 | if (ret) | ||
1005 | printk(KERN_WARNING MOD | ||
1006 | "%s: Abnormal close qpid %d ret %u\n", | ||
1007 | pci_name(rhp->rdev.lldi.pdev), qhp->wq.sq.qid, | ||
1008 | ret); | ||
1009 | } | ||
1010 | out: | 1008 | out: |
1011 | PDBG("%s ret %d\n", __func__, ret); | 1009 | PDBG("%s ret %d\n", __func__, ret); |
1012 | return ret; | 1010 | return ret; |
@@ -1040,7 +1038,6 @@ static int rdma_init(struct c4iw_dev *rhp, struct c4iw_qp *qhp) | |||
1040 | { | 1038 | { |
1041 | struct fw_ri_wr *wqe; | 1039 | struct fw_ri_wr *wqe; |
1042 | int ret; | 1040 | int ret; |
1043 | struct c4iw_wr_wait wr_wait; | ||
1044 | struct sk_buff *skb; | 1041 | struct sk_buff *skb; |
1045 | 1042 | ||
1046 | PDBG("%s qhp %p qid 0x%x tid %u\n", __func__, qhp, qhp->wq.sq.qid, | 1043 | PDBG("%s qhp %p qid 0x%x tid %u\n", __func__, qhp, qhp->wq.sq.qid, |
@@ -1060,7 +1057,7 @@ static int rdma_init(struct c4iw_dev *rhp, struct c4iw_qp *qhp) | |||
1060 | FW_WR_FLOWID(qhp->ep->hwtid) | | 1057 | FW_WR_FLOWID(qhp->ep->hwtid) | |
1061 | FW_WR_LEN16(DIV_ROUND_UP(sizeof *wqe, 16))); | 1058 | FW_WR_LEN16(DIV_ROUND_UP(sizeof *wqe, 16))); |
1062 | 1059 | ||
1063 | wqe->cookie = (u64)&wr_wait; | 1060 | wqe->cookie = (unsigned long) &qhp->ep->com.wr_wait; |
1064 | 1061 | ||
1065 | wqe->u.init.type = FW_RI_TYPE_INIT; | 1062 | wqe->u.init.type = FW_RI_TYPE_INIT; |
1066 | wqe->u.init.mpareqbit_p2ptype = | 1063 | wqe->u.init.mpareqbit_p2ptype = |
@@ -1097,19 +1094,12 @@ static int rdma_init(struct c4iw_dev *rhp, struct c4iw_qp *qhp) | |||
1097 | if (qhp->attr.mpa_attr.initiator) | 1094 | if (qhp->attr.mpa_attr.initiator) |
1098 | build_rtr_msg(qhp->attr.mpa_attr.p2p_type, &wqe->u.init); | 1095 | build_rtr_msg(qhp->attr.mpa_attr.p2p_type, &wqe->u.init); |
1099 | 1096 | ||
1100 | c4iw_init_wr_wait(&wr_wait); | ||
1101 | ret = c4iw_ofld_send(&rhp->rdev, skb); | 1097 | ret = c4iw_ofld_send(&rhp->rdev, skb); |
1102 | if (ret) | 1098 | if (ret) |
1103 | goto out; | 1099 | goto out; |
1104 | 1100 | ||
1105 | wait_event_timeout(wr_wait.wait, wr_wait.done, C4IW_WR_TO); | 1101 | ret = c4iw_wait_for_reply(&rhp->rdev, &qhp->ep->com.wr_wait, |
1106 | if (!wr_wait.done) { | 1102 | qhp->ep->hwtid, qhp->wq.sq.qid, __func__); |
1107 | printk(KERN_ERR MOD "Device %s not responding!\n", | ||
1108 | pci_name(rhp->rdev.lldi.pdev)); | ||
1109 | rhp->rdev.flags = T4_FATAL_ERROR; | ||
1110 | ret = -EIO; | ||
1111 | } else | ||
1112 | ret = wr_wait.ret; | ||
1113 | out: | 1103 | out: |
1114 | PDBG("%s ret %d\n", __func__, ret); | 1104 | PDBG("%s ret %d\n", __func__, ret); |
1115 | return ret; | 1105 | return ret; |
@@ -1122,7 +1112,6 @@ int c4iw_modify_qp(struct c4iw_dev *rhp, struct c4iw_qp *qhp, | |||
1122 | { | 1112 | { |
1123 | int ret = 0; | 1113 | int ret = 0; |
1124 | struct c4iw_qp_attributes newattr = qhp->attr; | 1114 | struct c4iw_qp_attributes newattr = qhp->attr; |
1125 | unsigned long flag; | ||
1126 | int disconnect = 0; | 1115 | int disconnect = 0; |
1127 | int terminate = 0; | 1116 | int terminate = 0; |
1128 | int abort = 0; | 1117 | int abort = 0; |
@@ -1133,7 +1122,7 @@ int c4iw_modify_qp(struct c4iw_dev *rhp, struct c4iw_qp *qhp, | |||
1133 | qhp, qhp->wq.sq.qid, qhp->wq.rq.qid, qhp->ep, qhp->attr.state, | 1122 | qhp, qhp->wq.sq.qid, qhp->wq.rq.qid, qhp->ep, qhp->attr.state, |
1134 | (mask & C4IW_QP_ATTR_NEXT_STATE) ? attrs->next_state : -1); | 1123 | (mask & C4IW_QP_ATTR_NEXT_STATE) ? attrs->next_state : -1); |
1135 | 1124 | ||
1136 | spin_lock_irqsave(&qhp->lock, flag); | 1125 | mutex_lock(&qhp->mutex); |
1137 | 1126 | ||
1138 | /* Process attr changes if in IDLE */ | 1127 | /* Process attr changes if in IDLE */ |
1139 | if (mask & C4IW_QP_ATTR_VALID_MODIFY) { | 1128 | if (mask & C4IW_QP_ATTR_VALID_MODIFY) { |
@@ -1184,7 +1173,7 @@ int c4iw_modify_qp(struct c4iw_dev *rhp, struct c4iw_qp *qhp, | |||
1184 | qhp->attr.mpa_attr = attrs->mpa_attr; | 1173 | qhp->attr.mpa_attr = attrs->mpa_attr; |
1185 | qhp->attr.llp_stream_handle = attrs->llp_stream_handle; | 1174 | qhp->attr.llp_stream_handle = attrs->llp_stream_handle; |
1186 | qhp->ep = qhp->attr.llp_stream_handle; | 1175 | qhp->ep = qhp->attr.llp_stream_handle; |
1187 | qhp->attr.state = C4IW_QP_STATE_RTS; | 1176 | set_state(qhp, C4IW_QP_STATE_RTS); |
1188 | 1177 | ||
1189 | /* | 1178 | /* |
1190 | * Ref the endpoint here and deref when we | 1179 | * Ref the endpoint here and deref when we |
@@ -1193,15 +1182,13 @@ int c4iw_modify_qp(struct c4iw_dev *rhp, struct c4iw_qp *qhp, | |||
1193 | * transition. | 1182 | * transition. |
1194 | */ | 1183 | */ |
1195 | c4iw_get_ep(&qhp->ep->com); | 1184 | c4iw_get_ep(&qhp->ep->com); |
1196 | spin_unlock_irqrestore(&qhp->lock, flag); | ||
1197 | ret = rdma_init(rhp, qhp); | 1185 | ret = rdma_init(rhp, qhp); |
1198 | spin_lock_irqsave(&qhp->lock, flag); | ||
1199 | if (ret) | 1186 | if (ret) |
1200 | goto err; | 1187 | goto err; |
1201 | break; | 1188 | break; |
1202 | case C4IW_QP_STATE_ERROR: | 1189 | case C4IW_QP_STATE_ERROR: |
1203 | qhp->attr.state = C4IW_QP_STATE_ERROR; | 1190 | set_state(qhp, C4IW_QP_STATE_ERROR); |
1204 | flush_qp(qhp, &flag); | 1191 | flush_qp(qhp); |
1205 | break; | 1192 | break; |
1206 | default: | 1193 | default: |
1207 | ret = -EINVAL; | 1194 | ret = -EINVAL; |
@@ -1212,38 +1199,34 @@ int c4iw_modify_qp(struct c4iw_dev *rhp, struct c4iw_qp *qhp, | |||
1212 | switch (attrs->next_state) { | 1199 | switch (attrs->next_state) { |
1213 | case C4IW_QP_STATE_CLOSING: | 1200 | case C4IW_QP_STATE_CLOSING: |
1214 | BUG_ON(atomic_read(&qhp->ep->com.kref.refcount) < 2); | 1201 | BUG_ON(atomic_read(&qhp->ep->com.kref.refcount) < 2); |
1215 | qhp->attr.state = C4IW_QP_STATE_CLOSING; | 1202 | set_state(qhp, C4IW_QP_STATE_CLOSING); |
1216 | ep = qhp->ep; | 1203 | ep = qhp->ep; |
1217 | if (!internal) { | 1204 | if (!internal) { |
1218 | abort = 0; | 1205 | abort = 0; |
1219 | disconnect = 1; | 1206 | disconnect = 1; |
1220 | c4iw_get_ep(&ep->com); | 1207 | c4iw_get_ep(&qhp->ep->com); |
1221 | } | 1208 | } |
1222 | spin_unlock_irqrestore(&qhp->lock, flag); | ||
1223 | ret = rdma_fini(rhp, qhp, ep); | 1209 | ret = rdma_fini(rhp, qhp, ep); |
1224 | spin_lock_irqsave(&qhp->lock, flag); | 1210 | if (ret) |
1225 | if (ret) { | ||
1226 | c4iw_get_ep(&ep->com); | ||
1227 | disconnect = abort = 1; | ||
1228 | goto err; | 1211 | goto err; |
1229 | } | ||
1230 | break; | 1212 | break; |
1231 | case C4IW_QP_STATE_TERMINATE: | 1213 | case C4IW_QP_STATE_TERMINATE: |
1232 | qhp->attr.state = C4IW_QP_STATE_TERMINATE; | 1214 | set_state(qhp, C4IW_QP_STATE_TERMINATE); |
1233 | if (qhp->ibqp.uobject) | 1215 | if (qhp->ibqp.uobject) |
1234 | t4_set_wq_in_error(&qhp->wq); | 1216 | t4_set_wq_in_error(&qhp->wq); |
1235 | ep = qhp->ep; | 1217 | ep = qhp->ep; |
1236 | c4iw_get_ep(&ep->com); | 1218 | if (!internal) |
1237 | terminate = 1; | 1219 | terminate = 1; |
1238 | disconnect = 1; | 1220 | disconnect = 1; |
1221 | c4iw_get_ep(&qhp->ep->com); | ||
1239 | break; | 1222 | break; |
1240 | case C4IW_QP_STATE_ERROR: | 1223 | case C4IW_QP_STATE_ERROR: |
1241 | qhp->attr.state = C4IW_QP_STATE_ERROR; | 1224 | set_state(qhp, C4IW_QP_STATE_ERROR); |
1242 | if (!internal) { | 1225 | if (!internal) { |
1243 | abort = 1; | 1226 | abort = 1; |
1244 | disconnect = 1; | 1227 | disconnect = 1; |
1245 | ep = qhp->ep; | 1228 | ep = qhp->ep; |
1246 | c4iw_get_ep(&ep->com); | 1229 | c4iw_get_ep(&qhp->ep->com); |
1247 | } | 1230 | } |
1248 | goto err; | 1231 | goto err; |
1249 | break; | 1232 | break; |
@@ -1259,8 +1242,8 @@ int c4iw_modify_qp(struct c4iw_dev *rhp, struct c4iw_qp *qhp, | |||
1259 | } | 1242 | } |
1260 | switch (attrs->next_state) { | 1243 | switch (attrs->next_state) { |
1261 | case C4IW_QP_STATE_IDLE: | 1244 | case C4IW_QP_STATE_IDLE: |
1262 | flush_qp(qhp, &flag); | 1245 | flush_qp(qhp); |
1263 | qhp->attr.state = C4IW_QP_STATE_IDLE; | 1246 | set_state(qhp, C4IW_QP_STATE_IDLE); |
1264 | qhp->attr.llp_stream_handle = NULL; | 1247 | qhp->attr.llp_stream_handle = NULL; |
1265 | c4iw_put_ep(&qhp->ep->com); | 1248 | c4iw_put_ep(&qhp->ep->com); |
1266 | qhp->ep = NULL; | 1249 | qhp->ep = NULL; |
@@ -1282,7 +1265,7 @@ int c4iw_modify_qp(struct c4iw_dev *rhp, struct c4iw_qp *qhp, | |||
1282 | ret = -EINVAL; | 1265 | ret = -EINVAL; |
1283 | goto out; | 1266 | goto out; |
1284 | } | 1267 | } |
1285 | qhp->attr.state = C4IW_QP_STATE_IDLE; | 1268 | set_state(qhp, C4IW_QP_STATE_IDLE); |
1286 | break; | 1269 | break; |
1287 | case C4IW_QP_STATE_TERMINATE: | 1270 | case C4IW_QP_STATE_TERMINATE: |
1288 | if (!internal) { | 1271 | if (!internal) { |
@@ -1305,15 +1288,16 @@ err: | |||
1305 | 1288 | ||
1306 | /* disassociate the LLP connection */ | 1289 | /* disassociate the LLP connection */ |
1307 | qhp->attr.llp_stream_handle = NULL; | 1290 | qhp->attr.llp_stream_handle = NULL; |
1308 | ep = qhp->ep; | 1291 | if (!ep) |
1292 | ep = qhp->ep; | ||
1309 | qhp->ep = NULL; | 1293 | qhp->ep = NULL; |
1310 | qhp->attr.state = C4IW_QP_STATE_ERROR; | 1294 | set_state(qhp, C4IW_QP_STATE_ERROR); |
1311 | free = 1; | 1295 | free = 1; |
1312 | wake_up(&qhp->wait); | 1296 | wake_up(&qhp->wait); |
1313 | BUG_ON(!ep); | 1297 | BUG_ON(!ep); |
1314 | flush_qp(qhp, &flag); | 1298 | flush_qp(qhp); |
1315 | out: | 1299 | out: |
1316 | spin_unlock_irqrestore(&qhp->lock, flag); | 1300 | mutex_unlock(&qhp->mutex); |
1317 | 1301 | ||
1318 | if (terminate) | 1302 | if (terminate) |
1319 | post_terminate(qhp, NULL, internal ? GFP_ATOMIC : GFP_KERNEL); | 1303 | post_terminate(qhp, NULL, internal ? GFP_ATOMIC : GFP_KERNEL); |
@@ -1335,7 +1319,6 @@ out: | |||
1335 | */ | 1319 | */ |
1336 | if (free) | 1320 | if (free) |
1337 | c4iw_put_ep(&ep->com); | 1321 | c4iw_put_ep(&ep->com); |
1338 | |||
1339 | PDBG("%s exit state %d\n", __func__, qhp->attr.state); | 1322 | PDBG("%s exit state %d\n", __func__, qhp->attr.state); |
1340 | return ret; | 1323 | return ret; |
1341 | } | 1324 | } |
@@ -1380,7 +1363,7 @@ struct ib_qp *c4iw_create_qp(struct ib_pd *pd, struct ib_qp_init_attr *attrs, | |||
1380 | int sqsize, rqsize; | 1363 | int sqsize, rqsize; |
1381 | struct c4iw_ucontext *ucontext; | 1364 | struct c4iw_ucontext *ucontext; |
1382 | int ret; | 1365 | int ret; |
1383 | struct c4iw_mm_entry *mm1, *mm2, *mm3, *mm4; | 1366 | struct c4iw_mm_entry *mm1, *mm2, *mm3, *mm4, *mm5 = NULL; |
1384 | 1367 | ||
1385 | PDBG("%s ib_pd %p\n", __func__, pd); | 1368 | PDBG("%s ib_pd %p\n", __func__, pd); |
1386 | 1369 | ||
@@ -1450,6 +1433,7 @@ struct ib_qp *c4iw_create_qp(struct ib_pd *pd, struct ib_qp_init_attr *attrs, | |||
1450 | qhp->attr.max_ord = 1; | 1433 | qhp->attr.max_ord = 1; |
1451 | qhp->attr.max_ird = 1; | 1434 | qhp->attr.max_ird = 1; |
1452 | spin_lock_init(&qhp->lock); | 1435 | spin_lock_init(&qhp->lock); |
1436 | mutex_init(&qhp->mutex); | ||
1453 | init_waitqueue_head(&qhp->wait); | 1437 | init_waitqueue_head(&qhp->wait); |
1454 | atomic_set(&qhp->refcnt, 1); | 1438 | atomic_set(&qhp->refcnt, 1); |
1455 | 1439 | ||
@@ -1478,7 +1462,15 @@ struct ib_qp *c4iw_create_qp(struct ib_pd *pd, struct ib_qp_init_attr *attrs, | |||
1478 | ret = -ENOMEM; | 1462 | ret = -ENOMEM; |
1479 | goto err6; | 1463 | goto err6; |
1480 | } | 1464 | } |
1481 | 1465 | if (t4_sq_onchip(&qhp->wq.sq)) { | |
1466 | mm5 = kmalloc(sizeof *mm5, GFP_KERNEL); | ||
1467 | if (!mm5) { | ||
1468 | ret = -ENOMEM; | ||
1469 | goto err7; | ||
1470 | } | ||
1471 | uresp.flags = C4IW_QPF_ONCHIP; | ||
1472 | } else | ||
1473 | uresp.flags = 0; | ||
1482 | uresp.qid_mask = rhp->rdev.qpmask; | 1474 | uresp.qid_mask = rhp->rdev.qpmask; |
1483 | uresp.sqid = qhp->wq.sq.qid; | 1475 | uresp.sqid = qhp->wq.sq.qid; |
1484 | uresp.sq_size = qhp->wq.sq.size; | 1476 | uresp.sq_size = qhp->wq.sq.size; |
@@ -1487,6 +1479,10 @@ struct ib_qp *c4iw_create_qp(struct ib_pd *pd, struct ib_qp_init_attr *attrs, | |||
1487 | uresp.rq_size = qhp->wq.rq.size; | 1479 | uresp.rq_size = qhp->wq.rq.size; |
1488 | uresp.rq_memsize = qhp->wq.rq.memsize; | 1480 | uresp.rq_memsize = qhp->wq.rq.memsize; |
1489 | spin_lock(&ucontext->mmap_lock); | 1481 | spin_lock(&ucontext->mmap_lock); |
1482 | if (mm5) { | ||
1483 | uresp.ma_sync_key = ucontext->key; | ||
1484 | ucontext->key += PAGE_SIZE; | ||
1485 | } | ||
1490 | uresp.sq_key = ucontext->key; | 1486 | uresp.sq_key = ucontext->key; |
1491 | ucontext->key += PAGE_SIZE; | 1487 | ucontext->key += PAGE_SIZE; |
1492 | uresp.rq_key = ucontext->key; | 1488 | uresp.rq_key = ucontext->key; |
@@ -1498,9 +1494,9 @@ struct ib_qp *c4iw_create_qp(struct ib_pd *pd, struct ib_qp_init_attr *attrs, | |||
1498 | spin_unlock(&ucontext->mmap_lock); | 1494 | spin_unlock(&ucontext->mmap_lock); |
1499 | ret = ib_copy_to_udata(udata, &uresp, sizeof uresp); | 1495 | ret = ib_copy_to_udata(udata, &uresp, sizeof uresp); |
1500 | if (ret) | 1496 | if (ret) |
1501 | goto err7; | 1497 | goto err8; |
1502 | mm1->key = uresp.sq_key; | 1498 | mm1->key = uresp.sq_key; |
1503 | mm1->addr = virt_to_phys(qhp->wq.sq.queue); | 1499 | mm1->addr = qhp->wq.sq.phys_addr; |
1504 | mm1->len = PAGE_ALIGN(qhp->wq.sq.memsize); | 1500 | mm1->len = PAGE_ALIGN(qhp->wq.sq.memsize); |
1505 | insert_mmap(ucontext, mm1); | 1501 | insert_mmap(ucontext, mm1); |
1506 | mm2->key = uresp.rq_key; | 1502 | mm2->key = uresp.rq_key; |
@@ -1515,6 +1511,13 @@ struct ib_qp *c4iw_create_qp(struct ib_pd *pd, struct ib_qp_init_attr *attrs, | |||
1515 | mm4->addr = qhp->wq.rq.udb; | 1511 | mm4->addr = qhp->wq.rq.udb; |
1516 | mm4->len = PAGE_SIZE; | 1512 | mm4->len = PAGE_SIZE; |
1517 | insert_mmap(ucontext, mm4); | 1513 | insert_mmap(ucontext, mm4); |
1514 | if (mm5) { | ||
1515 | mm5->key = uresp.ma_sync_key; | ||
1516 | mm5->addr = (pci_resource_start(rhp->rdev.lldi.pdev, 0) | ||
1517 | + A_PCIE_MA_SYNC) & PAGE_MASK; | ||
1518 | mm5->len = PAGE_SIZE; | ||
1519 | insert_mmap(ucontext, mm5); | ||
1520 | } | ||
1518 | } | 1521 | } |
1519 | qhp->ibqp.qp_num = qhp->wq.sq.qid; | 1522 | qhp->ibqp.qp_num = qhp->wq.sq.qid; |
1520 | init_timer(&(qhp->timer)); | 1523 | init_timer(&(qhp->timer)); |
@@ -1522,6 +1525,8 @@ struct ib_qp *c4iw_create_qp(struct ib_pd *pd, struct ib_qp_init_attr *attrs, | |||
1522 | __func__, qhp, qhp->attr.sq_num_entries, qhp->attr.rq_num_entries, | 1525 | __func__, qhp, qhp->attr.sq_num_entries, qhp->attr.rq_num_entries, |
1523 | qhp->wq.sq.qid); | 1526 | qhp->wq.sq.qid); |
1524 | return &qhp->ibqp; | 1527 | return &qhp->ibqp; |
1528 | err8: | ||
1529 | kfree(mm5); | ||
1525 | err7: | 1530 | err7: |
1526 | kfree(mm4); | 1531 | kfree(mm4); |
1527 | err6: | 1532 | err6: |
diff --git a/drivers/infiniband/hw/cxgb4/resource.c b/drivers/infiniband/hw/cxgb4/resource.c index 83b23dfa250d..4fb50d58b493 100644 --- a/drivers/infiniband/hw/cxgb4/resource.c +++ b/drivers/infiniband/hw/cxgb4/resource.c | |||
@@ -311,6 +311,9 @@ u32 c4iw_pblpool_alloc(struct c4iw_rdev *rdev, int size) | |||
311 | { | 311 | { |
312 | unsigned long addr = gen_pool_alloc(rdev->pbl_pool, size); | 312 | unsigned long addr = gen_pool_alloc(rdev->pbl_pool, size); |
313 | PDBG("%s addr 0x%x size %d\n", __func__, (u32)addr, size); | 313 | PDBG("%s addr 0x%x size %d\n", __func__, (u32)addr, size); |
314 | if (!addr && printk_ratelimit()) | ||
315 | printk(KERN_WARNING MOD "%s: Out of PBL memory\n", | ||
316 | pci_name(rdev->lldi.pdev)); | ||
314 | return (u32)addr; | 317 | return (u32)addr; |
315 | } | 318 | } |
316 | 319 | ||
@@ -370,6 +373,9 @@ u32 c4iw_rqtpool_alloc(struct c4iw_rdev *rdev, int size) | |||
370 | { | 373 | { |
371 | unsigned long addr = gen_pool_alloc(rdev->rqt_pool, size << 6); | 374 | unsigned long addr = gen_pool_alloc(rdev->rqt_pool, size << 6); |
372 | PDBG("%s addr 0x%x size %d\n", __func__, (u32)addr, size << 6); | 375 | PDBG("%s addr 0x%x size %d\n", __func__, (u32)addr, size << 6); |
376 | if (!addr && printk_ratelimit()) | ||
377 | printk(KERN_WARNING MOD "%s: Out of RQT memory\n", | ||
378 | pci_name(rdev->lldi.pdev)); | ||
373 | return (u32)addr; | 379 | return (u32)addr; |
374 | } | 380 | } |
375 | 381 | ||
@@ -416,3 +422,59 @@ void c4iw_rqtpool_destroy(struct c4iw_rdev *rdev) | |||
416 | { | 422 | { |
417 | gen_pool_destroy(rdev->rqt_pool); | 423 | gen_pool_destroy(rdev->rqt_pool); |
418 | } | 424 | } |
425 | |||
426 | /* | ||
427 | * On-Chip QP Memory. | ||
428 | */ | ||
429 | #define MIN_OCQP_SHIFT 12 /* 4KB == min ocqp size */ | ||
430 | |||
431 | u32 c4iw_ocqp_pool_alloc(struct c4iw_rdev *rdev, int size) | ||
432 | { | ||
433 | unsigned long addr = gen_pool_alloc(rdev->ocqp_pool, size); | ||
434 | PDBG("%s addr 0x%x size %d\n", __func__, (u32)addr, size); | ||
435 | return (u32)addr; | ||
436 | } | ||
437 | |||
438 | void c4iw_ocqp_pool_free(struct c4iw_rdev *rdev, u32 addr, int size) | ||
439 | { | ||
440 | PDBG("%s addr 0x%x size %d\n", __func__, addr, size); | ||
441 | gen_pool_free(rdev->ocqp_pool, (unsigned long)addr, size); | ||
442 | } | ||
443 | |||
444 | int c4iw_ocqp_pool_create(struct c4iw_rdev *rdev) | ||
445 | { | ||
446 | unsigned start, chunk, top; | ||
447 | |||
448 | rdev->ocqp_pool = gen_pool_create(MIN_OCQP_SHIFT, -1); | ||
449 | if (!rdev->ocqp_pool) | ||
450 | return -ENOMEM; | ||
451 | |||
452 | start = rdev->lldi.vr->ocq.start; | ||
453 | chunk = rdev->lldi.vr->ocq.size; | ||
454 | top = start + chunk; | ||
455 | |||
456 | while (start < top) { | ||
457 | chunk = min(top - start + 1, chunk); | ||
458 | if (gen_pool_add(rdev->ocqp_pool, start, chunk, -1)) { | ||
459 | PDBG("%s failed to add OCQP chunk (%x/%x)\n", | ||
460 | __func__, start, chunk); | ||
461 | if (chunk <= 1024 << MIN_OCQP_SHIFT) { | ||
462 | printk(KERN_WARNING MOD | ||
463 | "Failed to add all OCQP chunks (%x/%x)\n", | ||
464 | start, top - start); | ||
465 | return 0; | ||
466 | } | ||
467 | chunk >>= 1; | ||
468 | } else { | ||
469 | PDBG("%s added OCQP chunk (%x/%x)\n", | ||
470 | __func__, start, chunk); | ||
471 | start += chunk; | ||
472 | } | ||
473 | } | ||
474 | return 0; | ||
475 | } | ||
476 | |||
477 | void c4iw_ocqp_pool_destroy(struct c4iw_rdev *rdev) | ||
478 | { | ||
479 | gen_pool_destroy(rdev->ocqp_pool); | ||
480 | } | ||
diff --git a/drivers/infiniband/hw/cxgb4/t4.h b/drivers/infiniband/hw/cxgb4/t4.h index 24f369046ef3..c0221eec8817 100644 --- a/drivers/infiniband/hw/cxgb4/t4.h +++ b/drivers/infiniband/hw/cxgb4/t4.h | |||
@@ -52,6 +52,7 @@ | |||
52 | #define T4_STAG_UNSET 0xffffffff | 52 | #define T4_STAG_UNSET 0xffffffff |
53 | #define T4_FW_MAJ 0 | 53 | #define T4_FW_MAJ 0 |
54 | #define T4_EQ_STATUS_ENTRIES (L1_CACHE_BYTES > 64 ? 2 : 1) | 54 | #define T4_EQ_STATUS_ENTRIES (L1_CACHE_BYTES > 64 ? 2 : 1) |
55 | #define A_PCIE_MA_SYNC 0x30b4 | ||
55 | 56 | ||
56 | struct t4_status_page { | 57 | struct t4_status_page { |
57 | __be32 rsvd1; /* flit 0 - hw owns */ | 58 | __be32 rsvd1; /* flit 0 - hw owns */ |
@@ -65,7 +66,7 @@ struct t4_status_page { | |||
65 | 66 | ||
66 | #define T4_EQ_ENTRY_SIZE 64 | 67 | #define T4_EQ_ENTRY_SIZE 64 |
67 | 68 | ||
68 | #define T4_SQ_NUM_SLOTS 4 | 69 | #define T4_SQ_NUM_SLOTS 5 |
69 | #define T4_SQ_NUM_BYTES (T4_EQ_ENTRY_SIZE * T4_SQ_NUM_SLOTS) | 70 | #define T4_SQ_NUM_BYTES (T4_EQ_ENTRY_SIZE * T4_SQ_NUM_SLOTS) |
70 | #define T4_MAX_SEND_SGE ((T4_SQ_NUM_BYTES - sizeof(struct fw_ri_send_wr) - \ | 71 | #define T4_MAX_SEND_SGE ((T4_SQ_NUM_BYTES - sizeof(struct fw_ri_send_wr) - \ |
71 | sizeof(struct fw_ri_isgl)) / sizeof(struct fw_ri_sge)) | 72 | sizeof(struct fw_ri_isgl)) / sizeof(struct fw_ri_sge)) |
@@ -78,7 +79,7 @@ struct t4_status_page { | |||
78 | sizeof(struct fw_ri_rdma_write_wr) - \ | 79 | sizeof(struct fw_ri_rdma_write_wr) - \ |
79 | sizeof(struct fw_ri_isgl)) / sizeof(struct fw_ri_sge)) | 80 | sizeof(struct fw_ri_isgl)) / sizeof(struct fw_ri_sge)) |
80 | #define T4_MAX_FR_IMMD ((T4_SQ_NUM_BYTES - sizeof(struct fw_ri_fr_nsmr_wr) - \ | 81 | #define T4_MAX_FR_IMMD ((T4_SQ_NUM_BYTES - sizeof(struct fw_ri_fr_nsmr_wr) - \ |
81 | sizeof(struct fw_ri_immd))) | 82 | sizeof(struct fw_ri_immd)) & ~31UL) |
82 | #define T4_MAX_FR_DEPTH (T4_MAX_FR_IMMD / sizeof(u64)) | 83 | #define T4_MAX_FR_DEPTH (T4_MAX_FR_IMMD / sizeof(u64)) |
83 | 84 | ||
84 | #define T4_RQ_NUM_SLOTS 2 | 85 | #define T4_RQ_NUM_SLOTS 2 |
@@ -266,10 +267,33 @@ struct t4_swsqe { | |||
266 | u16 idx; | 267 | u16 idx; |
267 | }; | 268 | }; |
268 | 269 | ||
270 | static inline pgprot_t t4_pgprot_wc(pgprot_t prot) | ||
271 | { | ||
272 | #if defined(__i386__) || defined(__x86_64__) || defined(CONFIG_PPC64) | ||
273 | return pgprot_writecombine(prot); | ||
274 | #else | ||
275 | return pgprot_noncached(prot); | ||
276 | #endif | ||
277 | } | ||
278 | |||
279 | static inline int t4_ocqp_supported(void) | ||
280 | { | ||
281 | #if defined(__i386__) || defined(__x86_64__) || defined(CONFIG_PPC64) | ||
282 | return 1; | ||
283 | #else | ||
284 | return 0; | ||
285 | #endif | ||
286 | } | ||
287 | |||
288 | enum { | ||
289 | T4_SQ_ONCHIP = (1<<0), | ||
290 | }; | ||
291 | |||
269 | struct t4_sq { | 292 | struct t4_sq { |
270 | union t4_wr *queue; | 293 | union t4_wr *queue; |
271 | dma_addr_t dma_addr; | 294 | dma_addr_t dma_addr; |
272 | DEFINE_DMA_UNMAP_ADDR(mapping); | 295 | DEFINE_DMA_UNMAP_ADDR(mapping); |
296 | unsigned long phys_addr; | ||
273 | struct t4_swsqe *sw_sq; | 297 | struct t4_swsqe *sw_sq; |
274 | struct t4_swsqe *oldest_read; | 298 | struct t4_swsqe *oldest_read; |
275 | u64 udb; | 299 | u64 udb; |
@@ -280,6 +304,7 @@ struct t4_sq { | |||
280 | u16 cidx; | 304 | u16 cidx; |
281 | u16 pidx; | 305 | u16 pidx; |
282 | u16 wq_pidx; | 306 | u16 wq_pidx; |
307 | u16 flags; | ||
283 | }; | 308 | }; |
284 | 309 | ||
285 | struct t4_swrqe { | 310 | struct t4_swrqe { |
@@ -350,6 +375,11 @@ static inline void t4_rq_consume(struct t4_wq *wq) | |||
350 | wq->rq.cidx = 0; | 375 | wq->rq.cidx = 0; |
351 | } | 376 | } |
352 | 377 | ||
378 | static inline int t4_sq_onchip(struct t4_sq *sq) | ||
379 | { | ||
380 | return sq->flags & T4_SQ_ONCHIP; | ||
381 | } | ||
382 | |||
353 | static inline int t4_sq_empty(struct t4_wq *wq) | 383 | static inline int t4_sq_empty(struct t4_wq *wq) |
354 | { | 384 | { |
355 | return wq->sq.in_use == 0; | 385 | return wq->sq.in_use == 0; |
@@ -396,30 +426,27 @@ static inline void t4_ring_rq_db(struct t4_wq *wq, u16 inc) | |||
396 | 426 | ||
397 | static inline int t4_wq_in_error(struct t4_wq *wq) | 427 | static inline int t4_wq_in_error(struct t4_wq *wq) |
398 | { | 428 | { |
399 | return wq->sq.queue[wq->sq.size].status.qp_err; | 429 | return wq->rq.queue[wq->rq.size].status.qp_err; |
400 | } | 430 | } |
401 | 431 | ||
402 | static inline void t4_set_wq_in_error(struct t4_wq *wq) | 432 | static inline void t4_set_wq_in_error(struct t4_wq *wq) |
403 | { | 433 | { |
404 | wq->sq.queue[wq->sq.size].status.qp_err = 1; | ||
405 | wq->rq.queue[wq->rq.size].status.qp_err = 1; | 434 | wq->rq.queue[wq->rq.size].status.qp_err = 1; |
406 | } | 435 | } |
407 | 436 | ||
408 | static inline void t4_disable_wq_db(struct t4_wq *wq) | 437 | static inline void t4_disable_wq_db(struct t4_wq *wq) |
409 | { | 438 | { |
410 | wq->sq.queue[wq->sq.size].status.db_off = 1; | ||
411 | wq->rq.queue[wq->rq.size].status.db_off = 1; | 439 | wq->rq.queue[wq->rq.size].status.db_off = 1; |
412 | } | 440 | } |
413 | 441 | ||
414 | static inline void t4_enable_wq_db(struct t4_wq *wq) | 442 | static inline void t4_enable_wq_db(struct t4_wq *wq) |
415 | { | 443 | { |
416 | wq->sq.queue[wq->sq.size].status.db_off = 0; | ||
417 | wq->rq.queue[wq->rq.size].status.db_off = 0; | 444 | wq->rq.queue[wq->rq.size].status.db_off = 0; |
418 | } | 445 | } |
419 | 446 | ||
420 | static inline int t4_wq_db_enabled(struct t4_wq *wq) | 447 | static inline int t4_wq_db_enabled(struct t4_wq *wq) |
421 | { | 448 | { |
422 | return !wq->sq.queue[wq->sq.size].status.db_off; | 449 | return !wq->rq.queue[wq->rq.size].status.db_off; |
423 | } | 450 | } |
424 | 451 | ||
425 | struct t4_cq { | 452 | struct t4_cq { |
@@ -477,8 +504,14 @@ static inline void t4_swcq_consume(struct t4_cq *cq) | |||
477 | static inline void t4_hwcq_consume(struct t4_cq *cq) | 504 | static inline void t4_hwcq_consume(struct t4_cq *cq) |
478 | { | 505 | { |
479 | cq->bits_type_ts = cq->queue[cq->cidx].bits_type_ts; | 506 | cq->bits_type_ts = cq->queue[cq->cidx].bits_type_ts; |
480 | if (++cq->cidx_inc == cq->size) | 507 | if (++cq->cidx_inc == (cq->size >> 4)) { |
508 | u32 val; | ||
509 | |||
510 | val = SEINTARM(0) | CIDXINC(cq->cidx_inc) | TIMERREG(7) | | ||
511 | INGRESSQID(cq->cqid); | ||
512 | writel(val, cq->gts); | ||
481 | cq->cidx_inc = 0; | 513 | cq->cidx_inc = 0; |
514 | } | ||
482 | if (++cq->cidx == cq->size) { | 515 | if (++cq->cidx == cq->size) { |
483 | cq->cidx = 0; | 516 | cq->cidx = 0; |
484 | cq->gen ^= 1; | 517 | cq->gen ^= 1; |
diff --git a/drivers/infiniband/hw/cxgb4/user.h b/drivers/infiniband/hw/cxgb4/user.h index ed6414abde02..e6669d54770e 100644 --- a/drivers/infiniband/hw/cxgb4/user.h +++ b/drivers/infiniband/hw/cxgb4/user.h | |||
@@ -50,7 +50,13 @@ struct c4iw_create_cq_resp { | |||
50 | __u32 qid_mask; | 50 | __u32 qid_mask; |
51 | }; | 51 | }; |
52 | 52 | ||
53 | |||
54 | enum { | ||
55 | C4IW_QPF_ONCHIP = (1<<0) | ||
56 | }; | ||
57 | |||
53 | struct c4iw_create_qp_resp { | 58 | struct c4iw_create_qp_resp { |
59 | __u64 ma_sync_key; | ||
54 | __u64 sq_key; | 60 | __u64 sq_key; |
55 | __u64 rq_key; | 61 | __u64 rq_key; |
56 | __u64 sq_db_gts_key; | 62 | __u64 sq_db_gts_key; |
@@ -62,5 +68,6 @@ struct c4iw_create_qp_resp { | |||
62 | __u32 sq_size; | 68 | __u32 sq_size; |
63 | __u32 rq_size; | 69 | __u32 rq_size; |
64 | __u32 qid_mask; | 70 | __u32 qid_mask; |
71 | __u32 flags; | ||
65 | }; | 72 | }; |
66 | #endif | 73 | #endif |
diff --git a/drivers/infiniband/hw/ehca/ehca_mrmw.c b/drivers/infiniband/hw/ehca/ehca_mrmw.c index 53f4cd4fc19a..43cae84005f0 100644 --- a/drivers/infiniband/hw/ehca/ehca_mrmw.c +++ b/drivers/infiniband/hw/ehca/ehca_mrmw.c | |||
@@ -171,7 +171,7 @@ struct ib_mr *ehca_get_dma_mr(struct ib_pd *pd, int mr_access_flags) | |||
171 | } | 171 | } |
172 | 172 | ||
173 | ret = ehca_reg_maxmr(shca, e_maxmr, | 173 | ret = ehca_reg_maxmr(shca, e_maxmr, |
174 | (void *)ehca_map_vaddr((void *)KERNELBASE), | 174 | (void *)ehca_map_vaddr((void *)(KERNELBASE + PHYSICAL_START)), |
175 | mr_access_flags, e_pd, | 175 | mr_access_flags, e_pd, |
176 | &e_maxmr->ib.ib_mr.lkey, | 176 | &e_maxmr->ib.ib_mr.lkey, |
177 | &e_maxmr->ib.ib_mr.rkey); | 177 | &e_maxmr->ib.ib_mr.rkey); |
@@ -1636,7 +1636,7 @@ int ehca_reg_internal_maxmr( | |||
1636 | 1636 | ||
1637 | /* register internal max-MR on HCA */ | 1637 | /* register internal max-MR on HCA */ |
1638 | size_maxmr = ehca_mr_len; | 1638 | size_maxmr = ehca_mr_len; |
1639 | iova_start = (u64 *)ehca_map_vaddr((void *)KERNELBASE); | 1639 | iova_start = (u64 *)ehca_map_vaddr((void *)(KERNELBASE + PHYSICAL_START)); |
1640 | ib_pbuf.addr = 0; | 1640 | ib_pbuf.addr = 0; |
1641 | ib_pbuf.size = size_maxmr; | 1641 | ib_pbuf.size = size_maxmr; |
1642 | num_kpages = NUM_CHUNKS(((u64)iova_start % PAGE_SIZE) + size_maxmr, | 1642 | num_kpages = NUM_CHUNKS(((u64)iova_start % PAGE_SIZE) + size_maxmr, |
@@ -2209,7 +2209,7 @@ int ehca_mr_is_maxmr(u64 size, | |||
2209 | { | 2209 | { |
2210 | /* a MR is treated as max-MR only if it fits following: */ | 2210 | /* a MR is treated as max-MR only if it fits following: */ |
2211 | if ((size == ehca_mr_len) && | 2211 | if ((size == ehca_mr_len) && |
2212 | (iova_start == (void *)ehca_map_vaddr((void *)KERNELBASE))) { | 2212 | (iova_start == (void *)ehca_map_vaddr((void *)(KERNELBASE + PHYSICAL_START)))) { |
2213 | ehca_gen_dbg("this is a max-MR"); | 2213 | ehca_gen_dbg("this is a max-MR"); |
2214 | return 1; | 2214 | return 1; |
2215 | } else | 2215 | } else |
diff --git a/drivers/infiniband/hw/ehca/ipz_pt_fn.c b/drivers/infiniband/hw/ehca/ipz_pt_fn.c index 1596e3085344..1898d6e7cce5 100644 --- a/drivers/infiniband/hw/ehca/ipz_pt_fn.c +++ b/drivers/infiniband/hw/ehca/ipz_pt_fn.c | |||
@@ -222,15 +222,14 @@ int ipz_queue_ctor(struct ehca_pd *pd, struct ipz_queue *queue, | |||
222 | queue->small_page = NULL; | 222 | queue->small_page = NULL; |
223 | 223 | ||
224 | /* allocate queue page pointers */ | 224 | /* allocate queue page pointers */ |
225 | queue->queue_pages = kmalloc(nr_of_pages * sizeof(void *), GFP_KERNEL); | 225 | queue->queue_pages = kzalloc(nr_of_pages * sizeof(void *), GFP_KERNEL); |
226 | if (!queue->queue_pages) { | 226 | if (!queue->queue_pages) { |
227 | queue->queue_pages = vmalloc(nr_of_pages * sizeof(void *)); | 227 | queue->queue_pages = vzalloc(nr_of_pages * sizeof(void *)); |
228 | if (!queue->queue_pages) { | 228 | if (!queue->queue_pages) { |
229 | ehca_gen_err("Couldn't allocate queue page list"); | 229 | ehca_gen_err("Couldn't allocate queue page list"); |
230 | return 0; | 230 | return 0; |
231 | } | 231 | } |
232 | } | 232 | } |
233 | memset(queue->queue_pages, 0, nr_of_pages * sizeof(void *)); | ||
234 | 233 | ||
235 | /* allocate actual queue pages */ | 234 | /* allocate actual queue pages */ |
236 | if (is_small) { | 235 | if (is_small) { |
diff --git a/drivers/infiniband/hw/ipath/Makefile b/drivers/infiniband/hw/ipath/Makefile index fa3df82681df..4496f2820c92 100644 --- a/drivers/infiniband/hw/ipath/Makefile +++ b/drivers/infiniband/hw/ipath/Makefile | |||
@@ -1,4 +1,4 @@ | |||
1 | EXTRA_CFLAGS += -DIPATH_IDSTR='"QLogic kernel.org driver"' \ | 1 | ccflags-y := -DIPATH_IDSTR='"QLogic kernel.org driver"' \ |
2 | -DIPATH_KERN_TYPE=0 | 2 | -DIPATH_KERN_TYPE=0 |
3 | 3 | ||
4 | obj-$(CONFIG_INFINIBAND_IPATH) += ib_ipath.o | 4 | obj-$(CONFIG_INFINIBAND_IPATH) += ib_ipath.o |
diff --git a/drivers/infiniband/hw/ipath/ipath_diag.c b/drivers/infiniband/hw/ipath/ipath_diag.c index d4ce8b63e19e..daef61d5e5bb 100644 --- a/drivers/infiniband/hw/ipath/ipath_diag.c +++ b/drivers/infiniband/hw/ipath/ipath_diag.c | |||
@@ -65,7 +65,8 @@ static const struct file_operations diag_file_ops = { | |||
65 | .write = ipath_diag_write, | 65 | .write = ipath_diag_write, |
66 | .read = ipath_diag_read, | 66 | .read = ipath_diag_read, |
67 | .open = ipath_diag_open, | 67 | .open = ipath_diag_open, |
68 | .release = ipath_diag_release | 68 | .release = ipath_diag_release, |
69 | .llseek = default_llseek, | ||
69 | }; | 70 | }; |
70 | 71 | ||
71 | static ssize_t ipath_diagpkt_write(struct file *fp, | 72 | static ssize_t ipath_diagpkt_write(struct file *fp, |
@@ -75,6 +76,7 @@ static ssize_t ipath_diagpkt_write(struct file *fp, | |||
75 | static const struct file_operations diagpkt_file_ops = { | 76 | static const struct file_operations diagpkt_file_ops = { |
76 | .owner = THIS_MODULE, | 77 | .owner = THIS_MODULE, |
77 | .write = ipath_diagpkt_write, | 78 | .write = ipath_diagpkt_write, |
79 | .llseek = noop_llseek, | ||
78 | }; | 80 | }; |
79 | 81 | ||
80 | static atomic_t diagpkt_count = ATOMIC_INIT(0); | 82 | static atomic_t diagpkt_count = ATOMIC_INIT(0); |
diff --git a/drivers/infiniband/hw/ipath/ipath_driver.c b/drivers/infiniband/hw/ipath/ipath_driver.c index 765f0fc1da76..be24ac726114 100644 --- a/drivers/infiniband/hw/ipath/ipath_driver.c +++ b/drivers/infiniband/hw/ipath/ipath_driver.c | |||
@@ -199,12 +199,11 @@ static struct ipath_devdata *ipath_alloc_devdata(struct pci_dev *pdev) | |||
199 | goto bail; | 199 | goto bail; |
200 | } | 200 | } |
201 | 201 | ||
202 | dd = vmalloc(sizeof(*dd)); | 202 | dd = vzalloc(sizeof(*dd)); |
203 | if (!dd) { | 203 | if (!dd) { |
204 | dd = ERR_PTR(-ENOMEM); | 204 | dd = ERR_PTR(-ENOMEM); |
205 | goto bail; | 205 | goto bail; |
206 | } | 206 | } |
207 | memset(dd, 0, sizeof(*dd)); | ||
208 | dd->ipath_unit = -1; | 207 | dd->ipath_unit = -1; |
209 | 208 | ||
210 | spin_lock_irqsave(&ipath_devs_lock, flags); | 209 | spin_lock_irqsave(&ipath_devs_lock, flags); |
@@ -399,7 +398,6 @@ static int __devinit ipath_init_one(struct pci_dev *pdev, | |||
399 | struct ipath_devdata *dd; | 398 | struct ipath_devdata *dd; |
400 | unsigned long long addr; | 399 | unsigned long long addr; |
401 | u32 bar0 = 0, bar1 = 0; | 400 | u32 bar0 = 0, bar1 = 0; |
402 | u8 rev; | ||
403 | 401 | ||
404 | dd = ipath_alloc_devdata(pdev); | 402 | dd = ipath_alloc_devdata(pdev); |
405 | if (IS_ERR(dd)) { | 403 | if (IS_ERR(dd)) { |
@@ -530,9 +528,8 @@ static int __devinit ipath_init_one(struct pci_dev *pdev, | |||
530 | for (j = 0; j < 6; j++) { | 528 | for (j = 0; j < 6; j++) { |
531 | if (!pdev->resource[j].start) | 529 | if (!pdev->resource[j].start) |
532 | continue; | 530 | continue; |
533 | ipath_cdbg(VERBOSE, "BAR %d start %llx, end %llx, len %llx\n", | 531 | ipath_cdbg(VERBOSE, "BAR %d %pR, len %llx\n", |
534 | j, (unsigned long long)pdev->resource[j].start, | 532 | j, &pdev->resource[j], |
535 | (unsigned long long)pdev->resource[j].end, | ||
536 | (unsigned long long)pci_resource_len(pdev, j)); | 533 | (unsigned long long)pci_resource_len(pdev, j)); |
537 | } | 534 | } |
538 | 535 | ||
@@ -542,13 +539,7 @@ static int __devinit ipath_init_one(struct pci_dev *pdev, | |||
542 | goto bail_regions; | 539 | goto bail_regions; |
543 | } | 540 | } |
544 | 541 | ||
545 | ret = pci_read_config_byte(pdev, PCI_REVISION_ID, &rev); | 542 | dd->ipath_pcirev = pdev->revision; |
546 | if (ret) { | ||
547 | ipath_dev_err(dd, "Failed to read PCI revision ID unit " | ||
548 | "%u: err %d\n", dd->ipath_unit, -ret); | ||
549 | goto bail_regions; /* shouldn't ever happen */ | ||
550 | } | ||
551 | dd->ipath_pcirev = rev; | ||
552 | 543 | ||
553 | #if defined(__powerpc__) | 544 | #if defined(__powerpc__) |
554 | /* There isn't a generic way to specify writethrough mappings */ | 545 | /* There isn't a generic way to specify writethrough mappings */ |
@@ -757,7 +748,7 @@ static void __devexit ipath_remove_one(struct pci_dev *pdev) | |||
757 | */ | 748 | */ |
758 | ipath_shutdown_device(dd); | 749 | ipath_shutdown_device(dd); |
759 | 750 | ||
760 | flush_scheduled_work(); | 751 | flush_workqueue(ib_wq); |
761 | 752 | ||
762 | if (dd->verbs_dev) | 753 | if (dd->verbs_dev) |
763 | ipath_unregister_ib_device(dd->verbs_dev); | 754 | ipath_unregister_ib_device(dd->verbs_dev); |
@@ -2394,7 +2385,7 @@ void ipath_shutdown_device(struct ipath_devdata *dd) | |||
2394 | /* | 2385 | /* |
2395 | * clear SerdesEnable and turn the leds off; do this here because | 2386 | * clear SerdesEnable and turn the leds off; do this here because |
2396 | * we are unloading, so don't count on interrupts to move along | 2387 | * we are unloading, so don't count on interrupts to move along |
2397 | * Turn the LEDs off explictly for the same reason. | 2388 | * Turn the LEDs off explicitly for the same reason. |
2398 | */ | 2389 | */ |
2399 | dd->ipath_f_quiet_serdes(dd); | 2390 | dd->ipath_f_quiet_serdes(dd); |
2400 | 2391 | ||
diff --git a/drivers/infiniband/hw/ipath/ipath_file_ops.c b/drivers/infiniband/hw/ipath/ipath_file_ops.c index 65eb8929db22..ee79a2d97b14 100644 --- a/drivers/infiniband/hw/ipath/ipath_file_ops.c +++ b/drivers/infiniband/hw/ipath/ipath_file_ops.c | |||
@@ -40,7 +40,6 @@ | |||
40 | #include <linux/highmem.h> | 40 | #include <linux/highmem.h> |
41 | #include <linux/io.h> | 41 | #include <linux/io.h> |
42 | #include <linux/jiffies.h> | 42 | #include <linux/jiffies.h> |
43 | #include <linux/smp_lock.h> | ||
44 | #include <asm/pgtable.h> | 43 | #include <asm/pgtable.h> |
45 | 44 | ||
46 | #include "ipath_kernel.h" | 45 | #include "ipath_kernel.h" |
@@ -63,7 +62,8 @@ static const struct file_operations ipath_file_ops = { | |||
63 | .open = ipath_open, | 62 | .open = ipath_open, |
64 | .release = ipath_close, | 63 | .release = ipath_close, |
65 | .poll = ipath_poll, | 64 | .poll = ipath_poll, |
66 | .mmap = ipath_mmap | 65 | .mmap = ipath_mmap, |
66 | .llseek = noop_llseek, | ||
67 | }; | 67 | }; |
68 | 68 | ||
69 | /* | 69 | /* |
@@ -1530,7 +1530,7 @@ static int init_subports(struct ipath_devdata *dd, | |||
1530 | } | 1530 | } |
1531 | 1531 | ||
1532 | num_subports = uinfo->spu_subport_cnt; | 1532 | num_subports = uinfo->spu_subport_cnt; |
1533 | pd->subport_uregbase = vmalloc(PAGE_SIZE * num_subports); | 1533 | pd->subport_uregbase = vzalloc(PAGE_SIZE * num_subports); |
1534 | if (!pd->subport_uregbase) { | 1534 | if (!pd->subport_uregbase) { |
1535 | ret = -ENOMEM; | 1535 | ret = -ENOMEM; |
1536 | goto bail; | 1536 | goto bail; |
@@ -1538,13 +1538,13 @@ static int init_subports(struct ipath_devdata *dd, | |||
1538 | /* Note: pd->port_rcvhdrq_size isn't initialized yet. */ | 1538 | /* Note: pd->port_rcvhdrq_size isn't initialized yet. */ |
1539 | size = ALIGN(dd->ipath_rcvhdrcnt * dd->ipath_rcvhdrentsize * | 1539 | size = ALIGN(dd->ipath_rcvhdrcnt * dd->ipath_rcvhdrentsize * |
1540 | sizeof(u32), PAGE_SIZE) * num_subports; | 1540 | sizeof(u32), PAGE_SIZE) * num_subports; |
1541 | pd->subport_rcvhdr_base = vmalloc(size); | 1541 | pd->subport_rcvhdr_base = vzalloc(size); |
1542 | if (!pd->subport_rcvhdr_base) { | 1542 | if (!pd->subport_rcvhdr_base) { |
1543 | ret = -ENOMEM; | 1543 | ret = -ENOMEM; |
1544 | goto bail_ureg; | 1544 | goto bail_ureg; |
1545 | } | 1545 | } |
1546 | 1546 | ||
1547 | pd->subport_rcvegrbuf = vmalloc(pd->port_rcvegrbuf_chunks * | 1547 | pd->subport_rcvegrbuf = vzalloc(pd->port_rcvegrbuf_chunks * |
1548 | pd->port_rcvegrbuf_size * | 1548 | pd->port_rcvegrbuf_size * |
1549 | num_subports); | 1549 | num_subports); |
1550 | if (!pd->subport_rcvegrbuf) { | 1550 | if (!pd->subport_rcvegrbuf) { |
@@ -1556,11 +1556,6 @@ static int init_subports(struct ipath_devdata *dd, | |||
1556 | pd->port_subport_id = uinfo->spu_subport_id; | 1556 | pd->port_subport_id = uinfo->spu_subport_id; |
1557 | pd->active_slaves = 1; | 1557 | pd->active_slaves = 1; |
1558 | set_bit(IPATH_PORT_MASTER_UNINIT, &pd->port_flag); | 1558 | set_bit(IPATH_PORT_MASTER_UNINIT, &pd->port_flag); |
1559 | memset(pd->subport_uregbase, 0, PAGE_SIZE * num_subports); | ||
1560 | memset(pd->subport_rcvhdr_base, 0, size); | ||
1561 | memset(pd->subport_rcvegrbuf, 0, pd->port_rcvegrbuf_chunks * | ||
1562 | pd->port_rcvegrbuf_size * | ||
1563 | num_subports); | ||
1564 | goto bail; | 1559 | goto bail; |
1565 | 1560 | ||
1566 | bail_rhdr: | 1561 | bail_rhdr: |
@@ -1977,7 +1972,7 @@ static int ipath_do_user_init(struct file *fp, | |||
1977 | * 0 to 1. So for those chips, we turn it off and then back on. | 1972 | * 0 to 1. So for those chips, we turn it off and then back on. |
1978 | * This will (very briefly) affect any other open ports, but the | 1973 | * This will (very briefly) affect any other open ports, but the |
1979 | * duration is very short, and therefore isn't an issue. We | 1974 | * duration is very short, and therefore isn't an issue. We |
1980 | * explictly set the in-memory tail copy to 0 beforehand, so we | 1975 | * explicitly set the in-memory tail copy to 0 beforehand, so we |
1981 | * don't have to wait to be sure the DMA update has happened | 1976 | * don't have to wait to be sure the DMA update has happened |
1982 | * (chip resets head/tail to 0 on transition to enable). | 1977 | * (chip resets head/tail to 0 on transition to enable). |
1983 | */ | 1978 | */ |
diff --git a/drivers/infiniband/hw/ipath/ipath_fs.c b/drivers/infiniband/hw/ipath/ipath_fs.c index 2fca70836dae..31ae1b108aea 100644 --- a/drivers/infiniband/hw/ipath/ipath_fs.c +++ b/drivers/infiniband/hw/ipath/ipath_fs.c | |||
@@ -57,6 +57,7 @@ static int ipathfs_mknod(struct inode *dir, struct dentry *dentry, | |||
57 | goto bail; | 57 | goto bail; |
58 | } | 58 | } |
59 | 59 | ||
60 | inode->i_ino = get_next_ino(); | ||
60 | inode->i_mode = mode; | 61 | inode->i_mode = mode; |
61 | inode->i_atime = inode->i_mtime = inode->i_ctime = CURRENT_TIME; | 62 | inode->i_atime = inode->i_mtime = inode->i_ctime = CURRENT_TIME; |
62 | inode->i_private = data; | 63 | inode->i_private = data; |
@@ -103,6 +104,7 @@ static ssize_t atomic_stats_read(struct file *file, char __user *buf, | |||
103 | 104 | ||
104 | static const struct file_operations atomic_stats_ops = { | 105 | static const struct file_operations atomic_stats_ops = { |
105 | .read = atomic_stats_read, | 106 | .read = atomic_stats_read, |
107 | .llseek = default_llseek, | ||
106 | }; | 108 | }; |
107 | 109 | ||
108 | static ssize_t atomic_counters_read(struct file *file, char __user *buf, | 110 | static ssize_t atomic_counters_read(struct file *file, char __user *buf, |
@@ -120,6 +122,7 @@ static ssize_t atomic_counters_read(struct file *file, char __user *buf, | |||
120 | 122 | ||
121 | static const struct file_operations atomic_counters_ops = { | 123 | static const struct file_operations atomic_counters_ops = { |
122 | .read = atomic_counters_read, | 124 | .read = atomic_counters_read, |
125 | .llseek = default_llseek, | ||
123 | }; | 126 | }; |
124 | 127 | ||
125 | static ssize_t flash_read(struct file *file, char __user *buf, | 128 | static ssize_t flash_read(struct file *file, char __user *buf, |
@@ -224,6 +227,7 @@ bail: | |||
224 | static const struct file_operations flash_ops = { | 227 | static const struct file_operations flash_ops = { |
225 | .read = flash_read, | 228 | .read = flash_read, |
226 | .write = flash_write, | 229 | .write = flash_write, |
230 | .llseek = default_llseek, | ||
227 | }; | 231 | }; |
228 | 232 | ||
229 | static int create_device_files(struct super_block *sb, | 233 | static int create_device_files(struct super_block *sb, |
@@ -273,18 +277,14 @@ static int remove_file(struct dentry *parent, char *name) | |||
273 | goto bail; | 277 | goto bail; |
274 | } | 278 | } |
275 | 279 | ||
276 | spin_lock(&dcache_lock); | ||
277 | spin_lock(&tmp->d_lock); | 280 | spin_lock(&tmp->d_lock); |
278 | if (!(d_unhashed(tmp) && tmp->d_inode)) { | 281 | if (!(d_unhashed(tmp) && tmp->d_inode)) { |
279 | dget_locked(tmp); | 282 | dget_dlock(tmp); |
280 | __d_drop(tmp); | 283 | __d_drop(tmp); |
281 | spin_unlock(&tmp->d_lock); | 284 | spin_unlock(&tmp->d_lock); |
282 | spin_unlock(&dcache_lock); | ||
283 | simple_unlink(parent->d_inode, tmp); | 285 | simple_unlink(parent->d_inode, tmp); |
284 | } else { | 286 | } else |
285 | spin_unlock(&tmp->d_lock); | 287 | spin_unlock(&tmp->d_lock); |
286 | spin_unlock(&dcache_lock); | ||
287 | } | ||
288 | 288 | ||
289 | ret = 0; | 289 | ret = 0; |
290 | bail: | 290 | bail: |
@@ -358,13 +358,13 @@ bail: | |||
358 | return ret; | 358 | return ret; |
359 | } | 359 | } |
360 | 360 | ||
361 | static int ipathfs_get_sb(struct file_system_type *fs_type, int flags, | 361 | static struct dentry *ipathfs_mount(struct file_system_type *fs_type, |
362 | const char *dev_name, void *data, struct vfsmount *mnt) | 362 | int flags, const char *dev_name, void *data) |
363 | { | 363 | { |
364 | int ret = get_sb_single(fs_type, flags, data, | 364 | struct dentry *ret; |
365 | ipathfs_fill_super, mnt); | 365 | ret = mount_single(fs_type, flags, data, ipathfs_fill_super); |
366 | if (ret >= 0) | 366 | if (!IS_ERR(ret)) |
367 | ipath_super = mnt->mnt_sb; | 367 | ipath_super = ret->d_sb; |
368 | return ret; | 368 | return ret; |
369 | } | 369 | } |
370 | 370 | ||
@@ -407,7 +407,7 @@ bail: | |||
407 | static struct file_system_type ipathfs_fs_type = { | 407 | static struct file_system_type ipathfs_fs_type = { |
408 | .owner = THIS_MODULE, | 408 | .owner = THIS_MODULE, |
409 | .name = "ipathfs", | 409 | .name = "ipathfs", |
410 | .get_sb = ipathfs_get_sb, | 410 | .mount = ipathfs_mount, |
411 | .kill_sb = ipathfs_kill_super, | 411 | .kill_sb = ipathfs_kill_super, |
412 | }; | 412 | }; |
413 | 413 | ||
diff --git a/drivers/infiniband/hw/ipath/ipath_init_chip.c b/drivers/infiniband/hw/ipath/ipath_init_chip.c index 776938299e4c..7c1eebe8c7c9 100644 --- a/drivers/infiniband/hw/ipath/ipath_init_chip.c +++ b/drivers/infiniband/hw/ipath/ipath_init_chip.c | |||
@@ -335,7 +335,7 @@ done: | |||
335 | * @dd: the infinipath device | 335 | * @dd: the infinipath device |
336 | * | 336 | * |
337 | * sanity check at least some of the values after reset, and | 337 | * sanity check at least some of the values after reset, and |
338 | * ensure no receive or transmit (explictly, in case reset | 338 | * ensure no receive or transmit (explicitly, in case reset |
339 | * failed | 339 | * failed |
340 | */ | 340 | */ |
341 | static int init_chip_reset(struct ipath_devdata *dd) | 341 | static int init_chip_reset(struct ipath_devdata *dd) |
@@ -442,7 +442,7 @@ static void init_shadow_tids(struct ipath_devdata *dd) | |||
442 | struct page **pages; | 442 | struct page **pages; |
443 | dma_addr_t *addrs; | 443 | dma_addr_t *addrs; |
444 | 444 | ||
445 | pages = vmalloc(dd->ipath_cfgports * dd->ipath_rcvtidcnt * | 445 | pages = vzalloc(dd->ipath_cfgports * dd->ipath_rcvtidcnt * |
446 | sizeof(struct page *)); | 446 | sizeof(struct page *)); |
447 | if (!pages) { | 447 | if (!pages) { |
448 | ipath_dev_err(dd, "failed to allocate shadow page * " | 448 | ipath_dev_err(dd, "failed to allocate shadow page * " |
@@ -461,9 +461,6 @@ static void init_shadow_tids(struct ipath_devdata *dd) | |||
461 | return; | 461 | return; |
462 | } | 462 | } |
463 | 463 | ||
464 | memset(pages, 0, dd->ipath_cfgports * dd->ipath_rcvtidcnt * | ||
465 | sizeof(struct page *)); | ||
466 | |||
467 | dd->ipath_pageshadow = pages; | 464 | dd->ipath_pageshadow = pages; |
468 | dd->ipath_physshadow = addrs; | 465 | dd->ipath_physshadow = addrs; |
469 | } | 466 | } |
diff --git a/drivers/infiniband/hw/ipath/ipath_sysfs.c b/drivers/infiniband/hw/ipath/ipath_sysfs.c index b8cb2f145ae4..8991677e9a08 100644 --- a/drivers/infiniband/hw/ipath/ipath_sysfs.c +++ b/drivers/infiniband/hw/ipath/ipath_sysfs.c | |||
@@ -557,6 +557,7 @@ static ssize_t store_reset(struct device *dev, | |||
557 | dev_info(dev,"Unit %d is disabled, can't reset\n", | 557 | dev_info(dev,"Unit %d is disabled, can't reset\n", |
558 | dd->ipath_unit); | 558 | dd->ipath_unit); |
559 | ret = -EINVAL; | 559 | ret = -EINVAL; |
560 | goto bail; | ||
560 | } | 561 | } |
561 | ret = ipath_reset_device(dd->ipath_unit); | 562 | ret = ipath_reset_device(dd->ipath_unit); |
562 | bail: | 563 | bail: |
diff --git a/drivers/infiniband/hw/ipath/ipath_ud.c b/drivers/infiniband/hw/ipath/ipath_ud.c index 7420715256a9..e8a2a915251e 100644 --- a/drivers/infiniband/hw/ipath/ipath_ud.c +++ b/drivers/infiniband/hw/ipath/ipath_ud.c | |||
@@ -86,7 +86,7 @@ static void ipath_ud_loopback(struct ipath_qp *sqp, struct ipath_swqe *swqe) | |||
86 | } | 86 | } |
87 | 87 | ||
88 | /* | 88 | /* |
89 | * A GRH is expected to preceed the data even if not | 89 | * A GRH is expected to precede the data even if not |
90 | * present on the wire. | 90 | * present on the wire. |
91 | */ | 91 | */ |
92 | length = swqe->length; | 92 | length = swqe->length; |
@@ -515,7 +515,7 @@ void ipath_ud_rcv(struct ipath_ibdev *dev, struct ipath_ib_header *hdr, | |||
515 | } | 515 | } |
516 | 516 | ||
517 | /* | 517 | /* |
518 | * A GRH is expected to preceed the data even if not | 518 | * A GRH is expected to precede the data even if not |
519 | * present on the wire. | 519 | * present on the wire. |
520 | */ | 520 | */ |
521 | wc.byte_len = tlen + sizeof(struct ib_grh); | 521 | wc.byte_len = tlen + sizeof(struct ib_grh); |
diff --git a/drivers/infiniband/hw/ipath/ipath_user_pages.c b/drivers/infiniband/hw/ipath/ipath_user_pages.c index 5e86d73eba2a..cfed5399f074 100644 --- a/drivers/infiniband/hw/ipath/ipath_user_pages.c +++ b/drivers/infiniband/hw/ipath/ipath_user_pages.c | |||
@@ -53,8 +53,8 @@ static void __ipath_release_user_pages(struct page **p, size_t num_pages, | |||
53 | } | 53 | } |
54 | 54 | ||
55 | /* call with current->mm->mmap_sem held */ | 55 | /* call with current->mm->mmap_sem held */ |
56 | static int __get_user_pages(unsigned long start_page, size_t num_pages, | 56 | static int __ipath_get_user_pages(unsigned long start_page, size_t num_pages, |
57 | struct page **p, struct vm_area_struct **vma) | 57 | struct page **p, struct vm_area_struct **vma) |
58 | { | 58 | { |
59 | unsigned long lock_limit; | 59 | unsigned long lock_limit; |
60 | size_t got; | 60 | size_t got; |
@@ -165,7 +165,7 @@ int ipath_get_user_pages(unsigned long start_page, size_t num_pages, | |||
165 | 165 | ||
166 | down_write(¤t->mm->mmap_sem); | 166 | down_write(¤t->mm->mmap_sem); |
167 | 167 | ||
168 | ret = __get_user_pages(start_page, num_pages, p, NULL); | 168 | ret = __ipath_get_user_pages(start_page, num_pages, p, NULL); |
169 | 169 | ||
170 | up_write(¤t->mm->mmap_sem); | 170 | up_write(¤t->mm->mmap_sem); |
171 | 171 | ||
@@ -220,7 +220,7 @@ void ipath_release_user_pages_on_close(struct page **p, size_t num_pages) | |||
220 | work->mm = mm; | 220 | work->mm = mm; |
221 | work->num_pages = num_pages; | 221 | work->num_pages = num_pages; |
222 | 222 | ||
223 | schedule_work(&work->work); | 223 | queue_work(ib_wq, &work->work); |
224 | return; | 224 | return; |
225 | 225 | ||
226 | bail_mm: | 226 | bail_mm: |
diff --git a/drivers/infiniband/hw/ipath/ipath_user_sdma.c b/drivers/infiniband/hw/ipath/ipath_user_sdma.c index be78f6643c06..f5cb13b21445 100644 --- a/drivers/infiniband/hw/ipath/ipath_user_sdma.c +++ b/drivers/infiniband/hw/ipath/ipath_user_sdma.c | |||
@@ -236,7 +236,7 @@ static int ipath_user_sdma_num_pages(const struct iovec *iov) | |||
236 | return 1 + ((epage - spage) >> PAGE_SHIFT); | 236 | return 1 + ((epage - spage) >> PAGE_SHIFT); |
237 | } | 237 | } |
238 | 238 | ||
239 | /* truncate length to page boundry */ | 239 | /* truncate length to page boundary */ |
240 | static int ipath_user_sdma_page_length(unsigned long addr, unsigned long len) | 240 | static int ipath_user_sdma_page_length(unsigned long addr, unsigned long len) |
241 | { | 241 | { |
242 | const unsigned long offset = addr & ~PAGE_MASK; | 242 | const unsigned long offset = addr & ~PAGE_MASK; |
diff --git a/drivers/infiniband/hw/mlx4/Kconfig b/drivers/infiniband/hw/mlx4/Kconfig index 4175a4bd0c78..bd995b2b50d8 100644 --- a/drivers/infiniband/hw/mlx4/Kconfig +++ b/drivers/infiniband/hw/mlx4/Kconfig | |||
@@ -1,5 +1,6 @@ | |||
1 | config MLX4_INFINIBAND | 1 | config MLX4_INFINIBAND |
2 | tristate "Mellanox ConnectX HCA support" | 2 | tristate "Mellanox ConnectX HCA support" |
3 | depends on NETDEVICES && NETDEV_10000 && PCI | ||
3 | select MLX4_CORE | 4 | select MLX4_CORE |
4 | ---help--- | 5 | ---help--- |
5 | This driver provides low-level InfiniBand support for | 6 | This driver provides low-level InfiniBand support for |
diff --git a/drivers/infiniband/hw/mlx4/ah.c b/drivers/infiniband/hw/mlx4/ah.c index 11a236f8d884..4b8f9c49397e 100644 --- a/drivers/infiniband/hw/mlx4/ah.c +++ b/drivers/infiniband/hw/mlx4/ah.c | |||
@@ -30,66 +30,163 @@ | |||
30 | * SOFTWARE. | 30 | * SOFTWARE. |
31 | */ | 31 | */ |
32 | 32 | ||
33 | #include <rdma/ib_addr.h> | ||
34 | #include <rdma/ib_cache.h> | ||
35 | |||
33 | #include <linux/slab.h> | 36 | #include <linux/slab.h> |
37 | #include <linux/inet.h> | ||
38 | #include <linux/string.h> | ||
34 | 39 | ||
35 | #include "mlx4_ib.h" | 40 | #include "mlx4_ib.h" |
36 | 41 | ||
37 | struct ib_ah *mlx4_ib_create_ah(struct ib_pd *pd, struct ib_ah_attr *ah_attr) | 42 | int mlx4_ib_resolve_grh(struct mlx4_ib_dev *dev, const struct ib_ah_attr *ah_attr, |
43 | u8 *mac, int *is_mcast, u8 port) | ||
38 | { | 44 | { |
39 | struct mlx4_dev *dev = to_mdev(pd->device)->dev; | 45 | struct in6_addr in6; |
40 | struct mlx4_ib_ah *ah; | ||
41 | 46 | ||
42 | ah = kmalloc(sizeof *ah, GFP_ATOMIC); | 47 | *is_mcast = 0; |
43 | if (!ah) | ||
44 | return ERR_PTR(-ENOMEM); | ||
45 | 48 | ||
46 | memset(&ah->av, 0, sizeof ah->av); | 49 | memcpy(&in6, ah_attr->grh.dgid.raw, sizeof in6); |
50 | if (rdma_link_local_addr(&in6)) | ||
51 | rdma_get_ll_mac(&in6, mac); | ||
52 | else if (rdma_is_multicast_addr(&in6)) { | ||
53 | rdma_get_mcast_mac(&in6, mac); | ||
54 | *is_mcast = 1; | ||
55 | } else | ||
56 | return -EINVAL; | ||
47 | 57 | ||
48 | ah->av.port_pd = cpu_to_be32(to_mpd(pd)->pdn | (ah_attr->port_num << 24)); | 58 | return 0; |
49 | ah->av.g_slid = ah_attr->src_path_bits; | 59 | } |
50 | ah->av.dlid = cpu_to_be16(ah_attr->dlid); | 60 | |
51 | if (ah_attr->static_rate) { | 61 | static struct ib_ah *create_ib_ah(struct ib_pd *pd, struct ib_ah_attr *ah_attr, |
52 | ah->av.stat_rate = ah_attr->static_rate + MLX4_STAT_RATE_OFFSET; | 62 | struct mlx4_ib_ah *ah) |
53 | while (ah->av.stat_rate > IB_RATE_2_5_GBPS + MLX4_STAT_RATE_OFFSET && | 63 | { |
54 | !(1 << ah->av.stat_rate & dev->caps.stat_rate_support)) | 64 | struct mlx4_dev *dev = to_mdev(pd->device)->dev; |
55 | --ah->av.stat_rate; | 65 | |
56 | } | 66 | ah->av.ib.port_pd = cpu_to_be32(to_mpd(pd)->pdn | (ah_attr->port_num << 24)); |
57 | ah->av.sl_tclass_flowlabel = cpu_to_be32(ah_attr->sl << 28); | 67 | ah->av.ib.g_slid = ah_attr->src_path_bits; |
58 | if (ah_attr->ah_flags & IB_AH_GRH) { | 68 | if (ah_attr->ah_flags & IB_AH_GRH) { |
59 | ah->av.g_slid |= 0x80; | 69 | ah->av.ib.g_slid |= 0x80; |
60 | ah->av.gid_index = ah_attr->grh.sgid_index; | 70 | ah->av.ib.gid_index = ah_attr->grh.sgid_index; |
61 | ah->av.hop_limit = ah_attr->grh.hop_limit; | 71 | ah->av.ib.hop_limit = ah_attr->grh.hop_limit; |
62 | ah->av.sl_tclass_flowlabel |= | 72 | ah->av.ib.sl_tclass_flowlabel |= |
63 | cpu_to_be32((ah_attr->grh.traffic_class << 20) | | 73 | cpu_to_be32((ah_attr->grh.traffic_class << 20) | |
64 | ah_attr->grh.flow_label); | 74 | ah_attr->grh.flow_label); |
65 | memcpy(ah->av.dgid, ah_attr->grh.dgid.raw, 16); | 75 | memcpy(ah->av.ib.dgid, ah_attr->grh.dgid.raw, 16); |
76 | } | ||
77 | |||
78 | ah->av.ib.dlid = cpu_to_be16(ah_attr->dlid); | ||
79 | if (ah_attr->static_rate) { | ||
80 | ah->av.ib.stat_rate = ah_attr->static_rate + MLX4_STAT_RATE_OFFSET; | ||
81 | while (ah->av.ib.stat_rate > IB_RATE_2_5_GBPS + MLX4_STAT_RATE_OFFSET && | ||
82 | !(1 << ah->av.ib.stat_rate & dev->caps.stat_rate_support)) | ||
83 | --ah->av.ib.stat_rate; | ||
66 | } | 84 | } |
85 | ah->av.ib.sl_tclass_flowlabel = cpu_to_be32(ah_attr->sl << 28); | ||
67 | 86 | ||
68 | return &ah->ibah; | 87 | return &ah->ibah; |
69 | } | 88 | } |
70 | 89 | ||
90 | static struct ib_ah *create_iboe_ah(struct ib_pd *pd, struct ib_ah_attr *ah_attr, | ||
91 | struct mlx4_ib_ah *ah) | ||
92 | { | ||
93 | struct mlx4_ib_dev *ibdev = to_mdev(pd->device); | ||
94 | struct mlx4_dev *dev = ibdev->dev; | ||
95 | union ib_gid sgid; | ||
96 | u8 mac[6]; | ||
97 | int err; | ||
98 | int is_mcast; | ||
99 | u16 vlan_tag; | ||
100 | |||
101 | err = mlx4_ib_resolve_grh(ibdev, ah_attr, mac, &is_mcast, ah_attr->port_num); | ||
102 | if (err) | ||
103 | return ERR_PTR(err); | ||
104 | |||
105 | memcpy(ah->av.eth.mac, mac, 6); | ||
106 | err = ib_get_cached_gid(pd->device, ah_attr->port_num, ah_attr->grh.sgid_index, &sgid); | ||
107 | if (err) | ||
108 | return ERR_PTR(err); | ||
109 | vlan_tag = rdma_get_vlan_id(&sgid); | ||
110 | if (vlan_tag < 0x1000) | ||
111 | vlan_tag |= (ah_attr->sl & 7) << 13; | ||
112 | ah->av.eth.port_pd = cpu_to_be32(to_mpd(pd)->pdn | (ah_attr->port_num << 24)); | ||
113 | ah->av.eth.gid_index = ah_attr->grh.sgid_index; | ||
114 | ah->av.eth.vlan = cpu_to_be16(vlan_tag); | ||
115 | if (ah_attr->static_rate) { | ||
116 | ah->av.eth.stat_rate = ah_attr->static_rate + MLX4_STAT_RATE_OFFSET; | ||
117 | while (ah->av.eth.stat_rate > IB_RATE_2_5_GBPS + MLX4_STAT_RATE_OFFSET && | ||
118 | !(1 << ah->av.eth.stat_rate & dev->caps.stat_rate_support)) | ||
119 | --ah->av.eth.stat_rate; | ||
120 | } | ||
121 | |||
122 | /* | ||
123 | * HW requires multicast LID so we just choose one. | ||
124 | */ | ||
125 | if (is_mcast) | ||
126 | ah->av.ib.dlid = cpu_to_be16(0xc000); | ||
127 | |||
128 | memcpy(ah->av.eth.dgid, ah_attr->grh.dgid.raw, 16); | ||
129 | ah->av.eth.sl_tclass_flowlabel = cpu_to_be32(ah_attr->sl << 28); | ||
130 | |||
131 | return &ah->ibah; | ||
132 | } | ||
133 | |||
134 | struct ib_ah *mlx4_ib_create_ah(struct ib_pd *pd, struct ib_ah_attr *ah_attr) | ||
135 | { | ||
136 | struct mlx4_ib_ah *ah; | ||
137 | struct ib_ah *ret; | ||
138 | |||
139 | ah = kzalloc(sizeof *ah, GFP_ATOMIC); | ||
140 | if (!ah) | ||
141 | return ERR_PTR(-ENOMEM); | ||
142 | |||
143 | if (rdma_port_get_link_layer(pd->device, ah_attr->port_num) == IB_LINK_LAYER_ETHERNET) { | ||
144 | if (!(ah_attr->ah_flags & IB_AH_GRH)) { | ||
145 | ret = ERR_PTR(-EINVAL); | ||
146 | } else { | ||
147 | /* | ||
148 | * TBD: need to handle the case when we get | ||
149 | * called in an atomic context and there we | ||
150 | * might sleep. We don't expect this | ||
151 | * currently since we're working with link | ||
152 | * local addresses which we can translate | ||
153 | * without going to sleep. | ||
154 | */ | ||
155 | ret = create_iboe_ah(pd, ah_attr, ah); | ||
156 | } | ||
157 | |||
158 | if (IS_ERR(ret)) | ||
159 | kfree(ah); | ||
160 | |||
161 | return ret; | ||
162 | } else | ||
163 | return create_ib_ah(pd, ah_attr, ah); /* never fails */ | ||
164 | } | ||
165 | |||
71 | int mlx4_ib_query_ah(struct ib_ah *ibah, struct ib_ah_attr *ah_attr) | 166 | int mlx4_ib_query_ah(struct ib_ah *ibah, struct ib_ah_attr *ah_attr) |
72 | { | 167 | { |
73 | struct mlx4_ib_ah *ah = to_mah(ibah); | 168 | struct mlx4_ib_ah *ah = to_mah(ibah); |
169 | enum rdma_link_layer ll; | ||
74 | 170 | ||
75 | memset(ah_attr, 0, sizeof *ah_attr); | 171 | memset(ah_attr, 0, sizeof *ah_attr); |
76 | ah_attr->dlid = be16_to_cpu(ah->av.dlid); | 172 | ah_attr->sl = be32_to_cpu(ah->av.ib.sl_tclass_flowlabel) >> 28; |
77 | ah_attr->sl = be32_to_cpu(ah->av.sl_tclass_flowlabel) >> 28; | 173 | ah_attr->port_num = be32_to_cpu(ah->av.ib.port_pd) >> 24; |
78 | ah_attr->port_num = be32_to_cpu(ah->av.port_pd) >> 24; | 174 | ll = rdma_port_get_link_layer(ibah->device, ah_attr->port_num); |
79 | if (ah->av.stat_rate) | 175 | ah_attr->dlid = ll == IB_LINK_LAYER_INFINIBAND ? be16_to_cpu(ah->av.ib.dlid) : 0; |
80 | ah_attr->static_rate = ah->av.stat_rate - MLX4_STAT_RATE_OFFSET; | 176 | if (ah->av.ib.stat_rate) |
81 | ah_attr->src_path_bits = ah->av.g_slid & 0x7F; | 177 | ah_attr->static_rate = ah->av.ib.stat_rate - MLX4_STAT_RATE_OFFSET; |
178 | ah_attr->src_path_bits = ah->av.ib.g_slid & 0x7F; | ||
82 | 179 | ||
83 | if (mlx4_ib_ah_grh_present(ah)) { | 180 | if (mlx4_ib_ah_grh_present(ah)) { |
84 | ah_attr->ah_flags = IB_AH_GRH; | 181 | ah_attr->ah_flags = IB_AH_GRH; |
85 | 182 | ||
86 | ah_attr->grh.traffic_class = | 183 | ah_attr->grh.traffic_class = |
87 | be32_to_cpu(ah->av.sl_tclass_flowlabel) >> 20; | 184 | be32_to_cpu(ah->av.ib.sl_tclass_flowlabel) >> 20; |
88 | ah_attr->grh.flow_label = | 185 | ah_attr->grh.flow_label = |
89 | be32_to_cpu(ah->av.sl_tclass_flowlabel) & 0xfffff; | 186 | be32_to_cpu(ah->av.ib.sl_tclass_flowlabel) & 0xfffff; |
90 | ah_attr->grh.hop_limit = ah->av.hop_limit; | 187 | ah_attr->grh.hop_limit = ah->av.ib.hop_limit; |
91 | ah_attr->grh.sgid_index = ah->av.gid_index; | 188 | ah_attr->grh.sgid_index = ah->av.ib.gid_index; |
92 | memcpy(ah_attr->grh.dgid.raw, ah->av.dgid, 16); | 189 | memcpy(ah_attr->grh.dgid.raw, ah->av.ib.dgid, 16); |
93 | } | 190 | } |
94 | 191 | ||
95 | return 0; | 192 | return 0; |
diff --git a/drivers/infiniband/hw/mlx4/cq.c b/drivers/infiniband/hw/mlx4/cq.c index 5a219a2fdf16..e8df155bc3b0 100644 --- a/drivers/infiniband/hw/mlx4/cq.c +++ b/drivers/infiniband/hw/mlx4/cq.c | |||
@@ -397,10 +397,14 @@ int mlx4_ib_resize_cq(struct ib_cq *ibcq, int entries, struct ib_udata *udata) | |||
397 | cq->resize_buf = NULL; | 397 | cq->resize_buf = NULL; |
398 | cq->resize_umem = NULL; | 398 | cq->resize_umem = NULL; |
399 | } else { | 399 | } else { |
400 | struct mlx4_ib_cq_buf tmp_buf; | ||
401 | int tmp_cqe = 0; | ||
402 | |||
400 | spin_lock_irq(&cq->lock); | 403 | spin_lock_irq(&cq->lock); |
401 | if (cq->resize_buf) { | 404 | if (cq->resize_buf) { |
402 | mlx4_ib_cq_resize_copy_cqes(cq); | 405 | mlx4_ib_cq_resize_copy_cqes(cq); |
403 | mlx4_ib_free_cq_buf(dev, &cq->buf, cq->ibcq.cqe); | 406 | tmp_buf = cq->buf; |
407 | tmp_cqe = cq->ibcq.cqe; | ||
404 | cq->buf = cq->resize_buf->buf; | 408 | cq->buf = cq->resize_buf->buf; |
405 | cq->ibcq.cqe = cq->resize_buf->cqe; | 409 | cq->ibcq.cqe = cq->resize_buf->cqe; |
406 | 410 | ||
@@ -408,6 +412,9 @@ int mlx4_ib_resize_cq(struct ib_cq *ibcq, int entries, struct ib_udata *udata) | |||
408 | cq->resize_buf = NULL; | 412 | cq->resize_buf = NULL; |
409 | } | 413 | } |
410 | spin_unlock_irq(&cq->lock); | 414 | spin_unlock_irq(&cq->lock); |
415 | |||
416 | if (tmp_cqe) | ||
417 | mlx4_ib_free_cq_buf(dev, &tmp_buf, tmp_cqe); | ||
411 | } | 418 | } |
412 | 419 | ||
413 | goto out; | 420 | goto out; |
diff --git a/drivers/infiniband/hw/mlx4/mad.c b/drivers/infiniband/hw/mlx4/mad.c index f38d5b118927..57ffa50f509e 100644 --- a/drivers/infiniband/hw/mlx4/mad.c +++ b/drivers/infiniband/hw/mlx4/mad.c | |||
@@ -211,6 +211,8 @@ static void forward_trap(struct mlx4_ib_dev *dev, u8 port_num, struct ib_mad *ma | |||
211 | if (agent) { | 211 | if (agent) { |
212 | send_buf = ib_create_send_mad(agent, qpn, 0, 0, IB_MGMT_MAD_HDR, | 212 | send_buf = ib_create_send_mad(agent, qpn, 0, 0, IB_MGMT_MAD_HDR, |
213 | IB_MGMT_MAD_DATA, GFP_ATOMIC); | 213 | IB_MGMT_MAD_DATA, GFP_ATOMIC); |
214 | if (IS_ERR(send_buf)) | ||
215 | return; | ||
214 | /* | 216 | /* |
215 | * We rely here on the fact that MLX QPs don't use the | 217 | * We rely here on the fact that MLX QPs don't use the |
216 | * address handle after the send is posted (this is | 218 | * address handle after the send is posted (this is |
@@ -311,19 +313,25 @@ int mlx4_ib_mad_init(struct mlx4_ib_dev *dev) | |||
311 | struct ib_mad_agent *agent; | 313 | struct ib_mad_agent *agent; |
312 | int p, q; | 314 | int p, q; |
313 | int ret; | 315 | int ret; |
316 | enum rdma_link_layer ll; | ||
314 | 317 | ||
315 | for (p = 0; p < dev->num_ports; ++p) | 318 | for (p = 0; p < dev->num_ports; ++p) { |
319 | ll = rdma_port_get_link_layer(&dev->ib_dev, p + 1); | ||
316 | for (q = 0; q <= 1; ++q) { | 320 | for (q = 0; q <= 1; ++q) { |
317 | agent = ib_register_mad_agent(&dev->ib_dev, p + 1, | 321 | if (ll == IB_LINK_LAYER_INFINIBAND) { |
318 | q ? IB_QPT_GSI : IB_QPT_SMI, | 322 | agent = ib_register_mad_agent(&dev->ib_dev, p + 1, |
319 | NULL, 0, send_handler, | 323 | q ? IB_QPT_GSI : IB_QPT_SMI, |
320 | NULL, NULL); | 324 | NULL, 0, send_handler, |
321 | if (IS_ERR(agent)) { | 325 | NULL, NULL); |
322 | ret = PTR_ERR(agent); | 326 | if (IS_ERR(agent)) { |
323 | goto err; | 327 | ret = PTR_ERR(agent); |
324 | } | 328 | goto err; |
325 | dev->send_agent[p][q] = agent; | 329 | } |
330 | dev->send_agent[p][q] = agent; | ||
331 | } else | ||
332 | dev->send_agent[p][q] = NULL; | ||
326 | } | 333 | } |
334 | } | ||
327 | 335 | ||
328 | return 0; | 336 | return 0; |
329 | 337 | ||
@@ -344,8 +352,10 @@ void mlx4_ib_mad_cleanup(struct mlx4_ib_dev *dev) | |||
344 | for (p = 0; p < dev->num_ports; ++p) { | 352 | for (p = 0; p < dev->num_ports; ++p) { |
345 | for (q = 0; q <= 1; ++q) { | 353 | for (q = 0; q <= 1; ++q) { |
346 | agent = dev->send_agent[p][q]; | 354 | agent = dev->send_agent[p][q]; |
347 | dev->send_agent[p][q] = NULL; | 355 | if (agent) { |
348 | ib_unregister_mad_agent(agent); | 356 | dev->send_agent[p][q] = NULL; |
357 | ib_unregister_mad_agent(agent); | ||
358 | } | ||
349 | } | 359 | } |
350 | 360 | ||
351 | if (dev->sm_ah[p]) | 361 | if (dev->sm_ah[p]) |
diff --git a/drivers/infiniband/hw/mlx4/main.c b/drivers/infiniband/hw/mlx4/main.c index 4e94e360e43b..fbe1973f77b0 100644 --- a/drivers/infiniband/hw/mlx4/main.c +++ b/drivers/infiniband/hw/mlx4/main.c | |||
@@ -35,9 +35,14 @@ | |||
35 | #include <linux/init.h> | 35 | #include <linux/init.h> |
36 | #include <linux/slab.h> | 36 | #include <linux/slab.h> |
37 | #include <linux/errno.h> | 37 | #include <linux/errno.h> |
38 | #include <linux/netdevice.h> | ||
39 | #include <linux/inetdevice.h> | ||
40 | #include <linux/rtnetlink.h> | ||
41 | #include <linux/if_vlan.h> | ||
38 | 42 | ||
39 | #include <rdma/ib_smi.h> | 43 | #include <rdma/ib_smi.h> |
40 | #include <rdma/ib_user_verbs.h> | 44 | #include <rdma/ib_user_verbs.h> |
45 | #include <rdma/ib_addr.h> | ||
41 | 46 | ||
42 | #include <linux/mlx4/driver.h> | 47 | #include <linux/mlx4/driver.h> |
43 | #include <linux/mlx4/cmd.h> | 48 | #include <linux/mlx4/cmd.h> |
@@ -58,6 +63,15 @@ static const char mlx4_ib_version[] = | |||
58 | DRV_NAME ": Mellanox ConnectX InfiniBand driver v" | 63 | DRV_NAME ": Mellanox ConnectX InfiniBand driver v" |
59 | DRV_VERSION " (" DRV_RELDATE ")\n"; | 64 | DRV_VERSION " (" DRV_RELDATE ")\n"; |
60 | 65 | ||
66 | struct update_gid_work { | ||
67 | struct work_struct work; | ||
68 | union ib_gid gids[128]; | ||
69 | struct mlx4_ib_dev *dev; | ||
70 | int port; | ||
71 | }; | ||
72 | |||
73 | static struct workqueue_struct *wq; | ||
74 | |||
61 | static void init_query_mad(struct ib_smp *mad) | 75 | static void init_query_mad(struct ib_smp *mad) |
62 | { | 76 | { |
63 | mad->base_version = 1; | 77 | mad->base_version = 1; |
@@ -66,6 +80,8 @@ static void init_query_mad(struct ib_smp *mad) | |||
66 | mad->method = IB_MGMT_METHOD_GET; | 80 | mad->method = IB_MGMT_METHOD_GET; |
67 | } | 81 | } |
68 | 82 | ||
83 | static union ib_gid zgid; | ||
84 | |||
69 | static int mlx4_ib_query_device(struct ib_device *ibdev, | 85 | static int mlx4_ib_query_device(struct ib_device *ibdev, |
70 | struct ib_device_attr *props) | 86 | struct ib_device_attr *props) |
71 | { | 87 | { |
@@ -135,7 +151,7 @@ static int mlx4_ib_query_device(struct ib_device *ibdev, | |||
135 | props->max_srq = dev->dev->caps.num_srqs - dev->dev->caps.reserved_srqs; | 151 | props->max_srq = dev->dev->caps.num_srqs - dev->dev->caps.reserved_srqs; |
136 | props->max_srq_wr = dev->dev->caps.max_srq_wqes - 1; | 152 | props->max_srq_wr = dev->dev->caps.max_srq_wqes - 1; |
137 | props->max_srq_sge = dev->dev->caps.max_srq_sge; | 153 | props->max_srq_sge = dev->dev->caps.max_srq_sge; |
138 | props->max_fast_reg_page_list_len = PAGE_SIZE / sizeof (u64); | 154 | props->max_fast_reg_page_list_len = MLX4_MAX_FAST_REG_PAGES; |
139 | props->local_ca_ack_delay = dev->dev->caps.local_ca_ack_delay; | 155 | props->local_ca_ack_delay = dev->dev->caps.local_ca_ack_delay; |
140 | props->atomic_cap = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ? | 156 | props->atomic_cap = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ? |
141 | IB_ATOMIC_HCA : IB_ATOMIC_NONE; | 157 | IB_ATOMIC_HCA : IB_ATOMIC_NONE; |
@@ -154,28 +170,19 @@ out: | |||
154 | return err; | 170 | return err; |
155 | } | 171 | } |
156 | 172 | ||
157 | static int mlx4_ib_query_port(struct ib_device *ibdev, u8 port, | 173 | static enum rdma_link_layer |
158 | struct ib_port_attr *props) | 174 | mlx4_ib_port_link_layer(struct ib_device *device, u8 port_num) |
159 | { | 175 | { |
160 | struct ib_smp *in_mad = NULL; | 176 | struct mlx4_dev *dev = to_mdev(device)->dev; |
161 | struct ib_smp *out_mad = NULL; | ||
162 | int err = -ENOMEM; | ||
163 | |||
164 | in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); | ||
165 | out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); | ||
166 | if (!in_mad || !out_mad) | ||
167 | goto out; | ||
168 | |||
169 | memset(props, 0, sizeof *props); | ||
170 | |||
171 | init_query_mad(in_mad); | ||
172 | in_mad->attr_id = IB_SMP_ATTR_PORT_INFO; | ||
173 | in_mad->attr_mod = cpu_to_be32(port); | ||
174 | 177 | ||
175 | err = mlx4_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad, out_mad); | 178 | return dev->caps.port_mask & (1 << (port_num - 1)) ? |
176 | if (err) | 179 | IB_LINK_LAYER_INFINIBAND : IB_LINK_LAYER_ETHERNET; |
177 | goto out; | 180 | } |
178 | 181 | ||
182 | static int ib_link_query_port(struct ib_device *ibdev, u8 port, | ||
183 | struct ib_port_attr *props, | ||
184 | struct ib_smp *out_mad) | ||
185 | { | ||
179 | props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16)); | 186 | props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16)); |
180 | props->lmc = out_mad->data[34] & 0x7; | 187 | props->lmc = out_mad->data[34] & 0x7; |
181 | props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18)); | 188 | props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18)); |
@@ -196,6 +203,80 @@ static int mlx4_ib_query_port(struct ib_device *ibdev, u8 port, | |||
196 | props->max_vl_num = out_mad->data[37] >> 4; | 203 | props->max_vl_num = out_mad->data[37] >> 4; |
197 | props->init_type_reply = out_mad->data[41] >> 4; | 204 | props->init_type_reply = out_mad->data[41] >> 4; |
198 | 205 | ||
206 | return 0; | ||
207 | } | ||
208 | |||
209 | static u8 state_to_phys_state(enum ib_port_state state) | ||
210 | { | ||
211 | return state == IB_PORT_ACTIVE ? 5 : 3; | ||
212 | } | ||
213 | |||
214 | static int eth_link_query_port(struct ib_device *ibdev, u8 port, | ||
215 | struct ib_port_attr *props, | ||
216 | struct ib_smp *out_mad) | ||
217 | { | ||
218 | struct mlx4_ib_iboe *iboe = &to_mdev(ibdev)->iboe; | ||
219 | struct net_device *ndev; | ||
220 | enum ib_mtu tmp; | ||
221 | |||
222 | props->active_width = IB_WIDTH_1X; | ||
223 | props->active_speed = 4; | ||
224 | props->port_cap_flags = IB_PORT_CM_SUP; | ||
225 | props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port]; | ||
226 | props->max_msg_sz = to_mdev(ibdev)->dev->caps.max_msg_sz; | ||
227 | props->pkey_tbl_len = 1; | ||
228 | props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46)); | ||
229 | props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48)); | ||
230 | props->max_mtu = IB_MTU_2048; | ||
231 | props->subnet_timeout = 0; | ||
232 | props->max_vl_num = out_mad->data[37] >> 4; | ||
233 | props->init_type_reply = 0; | ||
234 | props->state = IB_PORT_DOWN; | ||
235 | props->phys_state = state_to_phys_state(props->state); | ||
236 | props->active_mtu = IB_MTU_256; | ||
237 | spin_lock(&iboe->lock); | ||
238 | ndev = iboe->netdevs[port - 1]; | ||
239 | if (!ndev) | ||
240 | goto out; | ||
241 | |||
242 | tmp = iboe_get_mtu(ndev->mtu); | ||
243 | props->active_mtu = tmp ? min(props->max_mtu, tmp) : IB_MTU_256; | ||
244 | |||
245 | props->state = (netif_running(ndev) && netif_carrier_ok(ndev)) ? | ||
246 | IB_PORT_ACTIVE : IB_PORT_DOWN; | ||
247 | props->phys_state = state_to_phys_state(props->state); | ||
248 | |||
249 | out: | ||
250 | spin_unlock(&iboe->lock); | ||
251 | return 0; | ||
252 | } | ||
253 | |||
254 | static int mlx4_ib_query_port(struct ib_device *ibdev, u8 port, | ||
255 | struct ib_port_attr *props) | ||
256 | { | ||
257 | struct ib_smp *in_mad = NULL; | ||
258 | struct ib_smp *out_mad = NULL; | ||
259 | int err = -ENOMEM; | ||
260 | |||
261 | in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); | ||
262 | out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); | ||
263 | if (!in_mad || !out_mad) | ||
264 | goto out; | ||
265 | |||
266 | memset(props, 0, sizeof *props); | ||
267 | |||
268 | init_query_mad(in_mad); | ||
269 | in_mad->attr_id = IB_SMP_ATTR_PORT_INFO; | ||
270 | in_mad->attr_mod = cpu_to_be32(port); | ||
271 | |||
272 | err = mlx4_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad, out_mad); | ||
273 | if (err) | ||
274 | goto out; | ||
275 | |||
276 | err = mlx4_ib_port_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND ? | ||
277 | ib_link_query_port(ibdev, port, props, out_mad) : | ||
278 | eth_link_query_port(ibdev, port, props, out_mad); | ||
279 | |||
199 | out: | 280 | out: |
200 | kfree(in_mad); | 281 | kfree(in_mad); |
201 | kfree(out_mad); | 282 | kfree(out_mad); |
@@ -203,8 +284,8 @@ out: | |||
203 | return err; | 284 | return err; |
204 | } | 285 | } |
205 | 286 | ||
206 | static int mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index, | 287 | static int __mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index, |
207 | union ib_gid *gid) | 288 | union ib_gid *gid) |
208 | { | 289 | { |
209 | struct ib_smp *in_mad = NULL; | 290 | struct ib_smp *in_mad = NULL; |
210 | struct ib_smp *out_mad = NULL; | 291 | struct ib_smp *out_mad = NULL; |
@@ -241,6 +322,25 @@ out: | |||
241 | return err; | 322 | return err; |
242 | } | 323 | } |
243 | 324 | ||
325 | static int iboe_query_gid(struct ib_device *ibdev, u8 port, int index, | ||
326 | union ib_gid *gid) | ||
327 | { | ||
328 | struct mlx4_ib_dev *dev = to_mdev(ibdev); | ||
329 | |||
330 | *gid = dev->iboe.gid_table[port - 1][index]; | ||
331 | |||
332 | return 0; | ||
333 | } | ||
334 | |||
335 | static int mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index, | ||
336 | union ib_gid *gid) | ||
337 | { | ||
338 | if (rdma_port_get_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND) | ||
339 | return __mlx4_ib_query_gid(ibdev, port, index, gid); | ||
340 | else | ||
341 | return iboe_query_gid(ibdev, port, index, gid); | ||
342 | } | ||
343 | |||
244 | static int mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, | 344 | static int mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, |
245 | u16 *pkey) | 345 | u16 *pkey) |
246 | { | 346 | { |
@@ -272,14 +372,32 @@ out: | |||
272 | static int mlx4_ib_modify_device(struct ib_device *ibdev, int mask, | 372 | static int mlx4_ib_modify_device(struct ib_device *ibdev, int mask, |
273 | struct ib_device_modify *props) | 373 | struct ib_device_modify *props) |
274 | { | 374 | { |
375 | struct mlx4_cmd_mailbox *mailbox; | ||
376 | |||
275 | if (mask & ~IB_DEVICE_MODIFY_NODE_DESC) | 377 | if (mask & ~IB_DEVICE_MODIFY_NODE_DESC) |
276 | return -EOPNOTSUPP; | 378 | return -EOPNOTSUPP; |
277 | 379 | ||
278 | if (mask & IB_DEVICE_MODIFY_NODE_DESC) { | 380 | if (!(mask & IB_DEVICE_MODIFY_NODE_DESC)) |
279 | spin_lock(&to_mdev(ibdev)->sm_lock); | 381 | return 0; |
280 | memcpy(ibdev->node_desc, props->node_desc, 64); | 382 | |
281 | spin_unlock(&to_mdev(ibdev)->sm_lock); | 383 | spin_lock(&to_mdev(ibdev)->sm_lock); |
282 | } | 384 | memcpy(ibdev->node_desc, props->node_desc, 64); |
385 | spin_unlock(&to_mdev(ibdev)->sm_lock); | ||
386 | |||
387 | /* | ||
388 | * If possible, pass node desc to FW, so it can generate | ||
389 | * a 144 trap. If cmd fails, just ignore. | ||
390 | */ | ||
391 | mailbox = mlx4_alloc_cmd_mailbox(to_mdev(ibdev)->dev); | ||
392 | if (IS_ERR(mailbox)) | ||
393 | return 0; | ||
394 | |||
395 | memset(mailbox->buf, 0, 256); | ||
396 | memcpy(mailbox->buf, props->node_desc, 64); | ||
397 | mlx4_cmd(to_mdev(ibdev)->dev, mailbox->dma, 1, 0, | ||
398 | MLX4_CMD_SET_NODE, MLX4_CMD_TIME_CLASS_A); | ||
399 | |||
400 | mlx4_free_cmd_mailbox(to_mdev(ibdev)->dev, mailbox); | ||
283 | 401 | ||
284 | return 0; | 402 | return 0; |
285 | } | 403 | } |
@@ -289,6 +407,7 @@ static int mlx4_SET_PORT(struct mlx4_ib_dev *dev, u8 port, int reset_qkey_viols, | |||
289 | { | 407 | { |
290 | struct mlx4_cmd_mailbox *mailbox; | 408 | struct mlx4_cmd_mailbox *mailbox; |
291 | int err; | 409 | int err; |
410 | u8 is_eth = dev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH; | ||
292 | 411 | ||
293 | mailbox = mlx4_alloc_cmd_mailbox(dev->dev); | 412 | mailbox = mlx4_alloc_cmd_mailbox(dev->dev); |
294 | if (IS_ERR(mailbox)) | 413 | if (IS_ERR(mailbox)) |
@@ -304,7 +423,7 @@ static int mlx4_SET_PORT(struct mlx4_ib_dev *dev, u8 port, int reset_qkey_viols, | |||
304 | ((__be32 *) mailbox->buf)[1] = cpu_to_be32(cap_mask); | 423 | ((__be32 *) mailbox->buf)[1] = cpu_to_be32(cap_mask); |
305 | } | 424 | } |
306 | 425 | ||
307 | err = mlx4_cmd(dev->dev, mailbox->dma, port, 0, MLX4_CMD_SET_PORT, | 426 | err = mlx4_cmd(dev->dev, mailbox->dma, port, is_eth, MLX4_CMD_SET_PORT, |
308 | MLX4_CMD_TIME_CLASS_B); | 427 | MLX4_CMD_TIME_CLASS_B); |
309 | 428 | ||
310 | mlx4_free_cmd_mailbox(dev->dev, mailbox); | 429 | mlx4_free_cmd_mailbox(dev->dev, mailbox); |
@@ -447,18 +566,133 @@ static int mlx4_ib_dealloc_pd(struct ib_pd *pd) | |||
447 | return 0; | 566 | return 0; |
448 | } | 567 | } |
449 | 568 | ||
569 | static int add_gid_entry(struct ib_qp *ibqp, union ib_gid *gid) | ||
570 | { | ||
571 | struct mlx4_ib_qp *mqp = to_mqp(ibqp); | ||
572 | struct mlx4_ib_dev *mdev = to_mdev(ibqp->device); | ||
573 | struct mlx4_ib_gid_entry *ge; | ||
574 | |||
575 | ge = kzalloc(sizeof *ge, GFP_KERNEL); | ||
576 | if (!ge) | ||
577 | return -ENOMEM; | ||
578 | |||
579 | ge->gid = *gid; | ||
580 | if (mlx4_ib_add_mc(mdev, mqp, gid)) { | ||
581 | ge->port = mqp->port; | ||
582 | ge->added = 1; | ||
583 | } | ||
584 | |||
585 | mutex_lock(&mqp->mutex); | ||
586 | list_add_tail(&ge->list, &mqp->gid_list); | ||
587 | mutex_unlock(&mqp->mutex); | ||
588 | |||
589 | return 0; | ||
590 | } | ||
591 | |||
592 | int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp, | ||
593 | union ib_gid *gid) | ||
594 | { | ||
595 | u8 mac[6]; | ||
596 | struct net_device *ndev; | ||
597 | int ret = 0; | ||
598 | |||
599 | if (!mqp->port) | ||
600 | return 0; | ||
601 | |||
602 | spin_lock(&mdev->iboe.lock); | ||
603 | ndev = mdev->iboe.netdevs[mqp->port - 1]; | ||
604 | if (ndev) | ||
605 | dev_hold(ndev); | ||
606 | spin_unlock(&mdev->iboe.lock); | ||
607 | |||
608 | if (ndev) { | ||
609 | rdma_get_mcast_mac((struct in6_addr *)gid, mac); | ||
610 | rtnl_lock(); | ||
611 | dev_mc_add(mdev->iboe.netdevs[mqp->port - 1], mac); | ||
612 | ret = 1; | ||
613 | rtnl_unlock(); | ||
614 | dev_put(ndev); | ||
615 | } | ||
616 | |||
617 | return ret; | ||
618 | } | ||
619 | |||
450 | static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) | 620 | static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) |
451 | { | 621 | { |
452 | return mlx4_multicast_attach(to_mdev(ibqp->device)->dev, | 622 | int err; |
453 | &to_mqp(ibqp)->mqp, gid->raw, | 623 | struct mlx4_ib_dev *mdev = to_mdev(ibqp->device); |
454 | !!(to_mqp(ibqp)->flags & | 624 | struct mlx4_ib_qp *mqp = to_mqp(ibqp); |
455 | MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK)); | 625 | |
626 | err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, | ||
627 | !!(mqp->flags & MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK), | ||
628 | MLX4_PROT_IB_IPV6); | ||
629 | if (err) | ||
630 | return err; | ||
631 | |||
632 | err = add_gid_entry(ibqp, gid); | ||
633 | if (err) | ||
634 | goto err_add; | ||
635 | |||
636 | return 0; | ||
637 | |||
638 | err_add: | ||
639 | mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw, MLX4_PROT_IB_IPV6); | ||
640 | return err; | ||
641 | } | ||
642 | |||
643 | static struct mlx4_ib_gid_entry *find_gid_entry(struct mlx4_ib_qp *qp, u8 *raw) | ||
644 | { | ||
645 | struct mlx4_ib_gid_entry *ge; | ||
646 | struct mlx4_ib_gid_entry *tmp; | ||
647 | struct mlx4_ib_gid_entry *ret = NULL; | ||
648 | |||
649 | list_for_each_entry_safe(ge, tmp, &qp->gid_list, list) { | ||
650 | if (!memcmp(raw, ge->gid.raw, 16)) { | ||
651 | ret = ge; | ||
652 | break; | ||
653 | } | ||
654 | } | ||
655 | |||
656 | return ret; | ||
456 | } | 657 | } |
457 | 658 | ||
458 | static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) | 659 | static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) |
459 | { | 660 | { |
460 | return mlx4_multicast_detach(to_mdev(ibqp->device)->dev, | 661 | int err; |
461 | &to_mqp(ibqp)->mqp, gid->raw); | 662 | struct mlx4_ib_dev *mdev = to_mdev(ibqp->device); |
663 | struct mlx4_ib_qp *mqp = to_mqp(ibqp); | ||
664 | u8 mac[6]; | ||
665 | struct net_device *ndev; | ||
666 | struct mlx4_ib_gid_entry *ge; | ||
667 | |||
668 | err = mlx4_multicast_detach(mdev->dev, | ||
669 | &mqp->mqp, gid->raw, MLX4_PROT_IB_IPV6); | ||
670 | if (err) | ||
671 | return err; | ||
672 | |||
673 | mutex_lock(&mqp->mutex); | ||
674 | ge = find_gid_entry(mqp, gid->raw); | ||
675 | if (ge) { | ||
676 | spin_lock(&mdev->iboe.lock); | ||
677 | ndev = ge->added ? mdev->iboe.netdevs[ge->port - 1] : NULL; | ||
678 | if (ndev) | ||
679 | dev_hold(ndev); | ||
680 | spin_unlock(&mdev->iboe.lock); | ||
681 | rdma_get_mcast_mac((struct in6_addr *)gid, mac); | ||
682 | if (ndev) { | ||
683 | rtnl_lock(); | ||
684 | dev_mc_del(mdev->iboe.netdevs[ge->port - 1], mac); | ||
685 | rtnl_unlock(); | ||
686 | dev_put(ndev); | ||
687 | } | ||
688 | list_del(&ge->list); | ||
689 | kfree(ge); | ||
690 | } else | ||
691 | printk(KERN_WARNING "could not find mgid entry\n"); | ||
692 | |||
693 | mutex_unlock(&mqp->mutex); | ||
694 | |||
695 | return 0; | ||
462 | } | 696 | } |
463 | 697 | ||
464 | static int init_node_data(struct mlx4_ib_dev *dev) | 698 | static int init_node_data(struct mlx4_ib_dev *dev) |
@@ -487,7 +721,6 @@ static int init_node_data(struct mlx4_ib_dev *dev) | |||
487 | if (err) | 721 | if (err) |
488 | goto out; | 722 | goto out; |
489 | 723 | ||
490 | dev->dev->rev_id = be32_to_cpup((__be32 *) (out_mad->data + 32)); | ||
491 | memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8); | 724 | memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8); |
492 | 725 | ||
493 | out: | 726 | out: |
@@ -543,15 +776,215 @@ static struct device_attribute *mlx4_class_attributes[] = { | |||
543 | &dev_attr_board_id | 776 | &dev_attr_board_id |
544 | }; | 777 | }; |
545 | 778 | ||
779 | static void mlx4_addrconf_ifid_eui48(u8 *eui, u16 vlan_id, struct net_device *dev) | ||
780 | { | ||
781 | memcpy(eui, dev->dev_addr, 3); | ||
782 | memcpy(eui + 5, dev->dev_addr + 3, 3); | ||
783 | if (vlan_id < 0x1000) { | ||
784 | eui[3] = vlan_id >> 8; | ||
785 | eui[4] = vlan_id & 0xff; | ||
786 | } else { | ||
787 | eui[3] = 0xff; | ||
788 | eui[4] = 0xfe; | ||
789 | } | ||
790 | eui[0] ^= 2; | ||
791 | } | ||
792 | |||
793 | static void update_gids_task(struct work_struct *work) | ||
794 | { | ||
795 | struct update_gid_work *gw = container_of(work, struct update_gid_work, work); | ||
796 | struct mlx4_cmd_mailbox *mailbox; | ||
797 | union ib_gid *gids; | ||
798 | int err; | ||
799 | struct mlx4_dev *dev = gw->dev->dev; | ||
800 | struct ib_event event; | ||
801 | |||
802 | mailbox = mlx4_alloc_cmd_mailbox(dev); | ||
803 | if (IS_ERR(mailbox)) { | ||
804 | printk(KERN_WARNING "update gid table failed %ld\n", PTR_ERR(mailbox)); | ||
805 | return; | ||
806 | } | ||
807 | |||
808 | gids = mailbox->buf; | ||
809 | memcpy(gids, gw->gids, sizeof gw->gids); | ||
810 | |||
811 | err = mlx4_cmd(dev, mailbox->dma, MLX4_SET_PORT_GID_TABLE << 8 | gw->port, | ||
812 | 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B); | ||
813 | if (err) | ||
814 | printk(KERN_WARNING "set port command failed\n"); | ||
815 | else { | ||
816 | memcpy(gw->dev->iboe.gid_table[gw->port - 1], gw->gids, sizeof gw->gids); | ||
817 | event.device = &gw->dev->ib_dev; | ||
818 | event.element.port_num = gw->port; | ||
819 | event.event = IB_EVENT_LID_CHANGE; | ||
820 | ib_dispatch_event(&event); | ||
821 | } | ||
822 | |||
823 | mlx4_free_cmd_mailbox(dev, mailbox); | ||
824 | kfree(gw); | ||
825 | } | ||
826 | |||
827 | static int update_ipv6_gids(struct mlx4_ib_dev *dev, int port, int clear) | ||
828 | { | ||
829 | struct net_device *ndev = dev->iboe.netdevs[port - 1]; | ||
830 | struct update_gid_work *work; | ||
831 | struct net_device *tmp; | ||
832 | int i; | ||
833 | u8 *hits; | ||
834 | int ret; | ||
835 | union ib_gid gid; | ||
836 | int free; | ||
837 | int found; | ||
838 | int need_update = 0; | ||
839 | u16 vid; | ||
840 | |||
841 | work = kzalloc(sizeof *work, GFP_ATOMIC); | ||
842 | if (!work) | ||
843 | return -ENOMEM; | ||
844 | |||
845 | hits = kzalloc(128, GFP_ATOMIC); | ||
846 | if (!hits) { | ||
847 | ret = -ENOMEM; | ||
848 | goto out; | ||
849 | } | ||
850 | |||
851 | rcu_read_lock(); | ||
852 | for_each_netdev_rcu(&init_net, tmp) { | ||
853 | if (ndev && (tmp == ndev || rdma_vlan_dev_real_dev(tmp) == ndev)) { | ||
854 | gid.global.subnet_prefix = cpu_to_be64(0xfe80000000000000LL); | ||
855 | vid = rdma_vlan_dev_vlan_id(tmp); | ||
856 | mlx4_addrconf_ifid_eui48(&gid.raw[8], vid, ndev); | ||
857 | found = 0; | ||
858 | free = -1; | ||
859 | for (i = 0; i < 128; ++i) { | ||
860 | if (free < 0 && | ||
861 | !memcmp(&dev->iboe.gid_table[port - 1][i], &zgid, sizeof zgid)) | ||
862 | free = i; | ||
863 | if (!memcmp(&dev->iboe.gid_table[port - 1][i], &gid, sizeof gid)) { | ||
864 | hits[i] = 1; | ||
865 | found = 1; | ||
866 | break; | ||
867 | } | ||
868 | } | ||
869 | |||
870 | if (!found) { | ||
871 | if (tmp == ndev && | ||
872 | (memcmp(&dev->iboe.gid_table[port - 1][0], | ||
873 | &gid, sizeof gid) || | ||
874 | !memcmp(&dev->iboe.gid_table[port - 1][0], | ||
875 | &zgid, sizeof gid))) { | ||
876 | dev->iboe.gid_table[port - 1][0] = gid; | ||
877 | ++need_update; | ||
878 | hits[0] = 1; | ||
879 | } else if (free >= 0) { | ||
880 | dev->iboe.gid_table[port - 1][free] = gid; | ||
881 | hits[free] = 1; | ||
882 | ++need_update; | ||
883 | } | ||
884 | } | ||
885 | } | ||
886 | } | ||
887 | rcu_read_unlock(); | ||
888 | |||
889 | for (i = 0; i < 128; ++i) | ||
890 | if (!hits[i]) { | ||
891 | if (memcmp(&dev->iboe.gid_table[port - 1][i], &zgid, sizeof zgid)) | ||
892 | ++need_update; | ||
893 | dev->iboe.gid_table[port - 1][i] = zgid; | ||
894 | } | ||
895 | |||
896 | if (need_update) { | ||
897 | memcpy(work->gids, dev->iboe.gid_table[port - 1], sizeof work->gids); | ||
898 | INIT_WORK(&work->work, update_gids_task); | ||
899 | work->port = port; | ||
900 | work->dev = dev; | ||
901 | queue_work(wq, &work->work); | ||
902 | } else | ||
903 | kfree(work); | ||
904 | |||
905 | kfree(hits); | ||
906 | return 0; | ||
907 | |||
908 | out: | ||
909 | kfree(work); | ||
910 | return ret; | ||
911 | } | ||
912 | |||
913 | static void handle_en_event(struct mlx4_ib_dev *dev, int port, unsigned long event) | ||
914 | { | ||
915 | switch (event) { | ||
916 | case NETDEV_UP: | ||
917 | case NETDEV_CHANGEADDR: | ||
918 | update_ipv6_gids(dev, port, 0); | ||
919 | break; | ||
920 | |||
921 | case NETDEV_DOWN: | ||
922 | update_ipv6_gids(dev, port, 1); | ||
923 | dev->iboe.netdevs[port - 1] = NULL; | ||
924 | } | ||
925 | } | ||
926 | |||
927 | static void netdev_added(struct mlx4_ib_dev *dev, int port) | ||
928 | { | ||
929 | update_ipv6_gids(dev, port, 0); | ||
930 | } | ||
931 | |||
932 | static void netdev_removed(struct mlx4_ib_dev *dev, int port) | ||
933 | { | ||
934 | update_ipv6_gids(dev, port, 1); | ||
935 | } | ||
936 | |||
937 | static int mlx4_ib_netdev_event(struct notifier_block *this, unsigned long event, | ||
938 | void *ptr) | ||
939 | { | ||
940 | struct net_device *dev = ptr; | ||
941 | struct mlx4_ib_dev *ibdev; | ||
942 | struct net_device *oldnd; | ||
943 | struct mlx4_ib_iboe *iboe; | ||
944 | int port; | ||
945 | |||
946 | if (!net_eq(dev_net(dev), &init_net)) | ||
947 | return NOTIFY_DONE; | ||
948 | |||
949 | ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb); | ||
950 | iboe = &ibdev->iboe; | ||
951 | |||
952 | spin_lock(&iboe->lock); | ||
953 | mlx4_foreach_ib_transport_port(port, ibdev->dev) { | ||
954 | oldnd = iboe->netdevs[port - 1]; | ||
955 | iboe->netdevs[port - 1] = | ||
956 | mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port); | ||
957 | if (oldnd != iboe->netdevs[port - 1]) { | ||
958 | if (iboe->netdevs[port - 1]) | ||
959 | netdev_added(ibdev, port); | ||
960 | else | ||
961 | netdev_removed(ibdev, port); | ||
962 | } | ||
963 | } | ||
964 | |||
965 | if (dev == iboe->netdevs[0] || | ||
966 | (iboe->netdevs[0] && rdma_vlan_dev_real_dev(dev) == iboe->netdevs[0])) | ||
967 | handle_en_event(ibdev, 1, event); | ||
968 | else if (dev == iboe->netdevs[1] | ||
969 | || (iboe->netdevs[1] && rdma_vlan_dev_real_dev(dev) == iboe->netdevs[1])) | ||
970 | handle_en_event(ibdev, 2, event); | ||
971 | |||
972 | spin_unlock(&iboe->lock); | ||
973 | |||
974 | return NOTIFY_DONE; | ||
975 | } | ||
976 | |||
546 | static void *mlx4_ib_add(struct mlx4_dev *dev) | 977 | static void *mlx4_ib_add(struct mlx4_dev *dev) |
547 | { | 978 | { |
548 | struct mlx4_ib_dev *ibdev; | 979 | struct mlx4_ib_dev *ibdev; |
549 | int num_ports = 0; | 980 | int num_ports = 0; |
550 | int i; | 981 | int i; |
982 | int err; | ||
983 | struct mlx4_ib_iboe *iboe; | ||
551 | 984 | ||
552 | printk_once(KERN_INFO "%s", mlx4_ib_version); | 985 | printk_once(KERN_INFO "%s", mlx4_ib_version); |
553 | 986 | ||
554 | mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) | 987 | mlx4_foreach_ib_transport_port(i, dev) |
555 | num_ports++; | 988 | num_ports++; |
556 | 989 | ||
557 | /* No point in registering a device with no ports... */ | 990 | /* No point in registering a device with no ports... */ |
@@ -564,13 +997,16 @@ static void *mlx4_ib_add(struct mlx4_dev *dev) | |||
564 | return NULL; | 997 | return NULL; |
565 | } | 998 | } |
566 | 999 | ||
1000 | iboe = &ibdev->iboe; | ||
1001 | |||
567 | if (mlx4_pd_alloc(dev, &ibdev->priv_pdn)) | 1002 | if (mlx4_pd_alloc(dev, &ibdev->priv_pdn)) |
568 | goto err_dealloc; | 1003 | goto err_dealloc; |
569 | 1004 | ||
570 | if (mlx4_uar_alloc(dev, &ibdev->priv_uar)) | 1005 | if (mlx4_uar_alloc(dev, &ibdev->priv_uar)) |
571 | goto err_pd; | 1006 | goto err_pd; |
572 | 1007 | ||
573 | ibdev->uar_map = ioremap(ibdev->priv_uar.pfn << PAGE_SHIFT, PAGE_SIZE); | 1008 | ibdev->uar_map = ioremap((phys_addr_t) ibdev->priv_uar.pfn << PAGE_SHIFT, |
1009 | PAGE_SIZE); | ||
574 | if (!ibdev->uar_map) | 1010 | if (!ibdev->uar_map) |
575 | goto err_uar; | 1011 | goto err_uar; |
576 | MLX4_INIT_DOORBELL_LOCK(&ibdev->uar_lock); | 1012 | MLX4_INIT_DOORBELL_LOCK(&ibdev->uar_lock); |
@@ -612,6 +1048,7 @@ static void *mlx4_ib_add(struct mlx4_dev *dev) | |||
612 | 1048 | ||
613 | ibdev->ib_dev.query_device = mlx4_ib_query_device; | 1049 | ibdev->ib_dev.query_device = mlx4_ib_query_device; |
614 | ibdev->ib_dev.query_port = mlx4_ib_query_port; | 1050 | ibdev->ib_dev.query_port = mlx4_ib_query_port; |
1051 | ibdev->ib_dev.get_link_layer = mlx4_ib_port_link_layer; | ||
615 | ibdev->ib_dev.query_gid = mlx4_ib_query_gid; | 1052 | ibdev->ib_dev.query_gid = mlx4_ib_query_gid; |
616 | ibdev->ib_dev.query_pkey = mlx4_ib_query_pkey; | 1053 | ibdev->ib_dev.query_pkey = mlx4_ib_query_pkey; |
617 | ibdev->ib_dev.modify_device = mlx4_ib_modify_device; | 1054 | ibdev->ib_dev.modify_device = mlx4_ib_modify_device; |
@@ -656,6 +1093,8 @@ static void *mlx4_ib_add(struct mlx4_dev *dev) | |||
656 | ibdev->ib_dev.unmap_fmr = mlx4_ib_unmap_fmr; | 1093 | ibdev->ib_dev.unmap_fmr = mlx4_ib_unmap_fmr; |
657 | ibdev->ib_dev.dealloc_fmr = mlx4_ib_fmr_dealloc; | 1094 | ibdev->ib_dev.dealloc_fmr = mlx4_ib_fmr_dealloc; |
658 | 1095 | ||
1096 | spin_lock_init(&iboe->lock); | ||
1097 | |||
659 | if (init_node_data(ibdev)) | 1098 | if (init_node_data(ibdev)) |
660 | goto err_map; | 1099 | goto err_map; |
661 | 1100 | ||
@@ -668,16 +1107,28 @@ static void *mlx4_ib_add(struct mlx4_dev *dev) | |||
668 | if (mlx4_ib_mad_init(ibdev)) | 1107 | if (mlx4_ib_mad_init(ibdev)) |
669 | goto err_reg; | 1108 | goto err_reg; |
670 | 1109 | ||
1110 | if (dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE && !iboe->nb.notifier_call) { | ||
1111 | iboe->nb.notifier_call = mlx4_ib_netdev_event; | ||
1112 | err = register_netdevice_notifier(&iboe->nb); | ||
1113 | if (err) | ||
1114 | goto err_reg; | ||
1115 | } | ||
1116 | |||
671 | for (i = 0; i < ARRAY_SIZE(mlx4_class_attributes); ++i) { | 1117 | for (i = 0; i < ARRAY_SIZE(mlx4_class_attributes); ++i) { |
672 | if (device_create_file(&ibdev->ib_dev.dev, | 1118 | if (device_create_file(&ibdev->ib_dev.dev, |
673 | mlx4_class_attributes[i])) | 1119 | mlx4_class_attributes[i])) |
674 | goto err_reg; | 1120 | goto err_notif; |
675 | } | 1121 | } |
676 | 1122 | ||
677 | ibdev->ib_active = true; | 1123 | ibdev->ib_active = true; |
678 | 1124 | ||
679 | return ibdev; | 1125 | return ibdev; |
680 | 1126 | ||
1127 | err_notif: | ||
1128 | if (unregister_netdevice_notifier(&ibdev->iboe.nb)) | ||
1129 | printk(KERN_WARNING "failure unregistering notifier\n"); | ||
1130 | flush_workqueue(wq); | ||
1131 | |||
681 | err_reg: | 1132 | err_reg: |
682 | ib_unregister_device(&ibdev->ib_dev); | 1133 | ib_unregister_device(&ibdev->ib_dev); |
683 | 1134 | ||
@@ -703,11 +1154,16 @@ static void mlx4_ib_remove(struct mlx4_dev *dev, void *ibdev_ptr) | |||
703 | 1154 | ||
704 | mlx4_ib_mad_cleanup(ibdev); | 1155 | mlx4_ib_mad_cleanup(ibdev); |
705 | ib_unregister_device(&ibdev->ib_dev); | 1156 | ib_unregister_device(&ibdev->ib_dev); |
1157 | if (ibdev->iboe.nb.notifier_call) { | ||
1158 | if (unregister_netdevice_notifier(&ibdev->iboe.nb)) | ||
1159 | printk(KERN_WARNING "failure unregistering notifier\n"); | ||
1160 | ibdev->iboe.nb.notifier_call = NULL; | ||
1161 | } | ||
1162 | iounmap(ibdev->uar_map); | ||
706 | 1163 | ||
707 | for (p = 1; p <= ibdev->num_ports; ++p) | 1164 | mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB) |
708 | mlx4_CLOSE_PORT(dev, p); | 1165 | mlx4_CLOSE_PORT(dev, p); |
709 | 1166 | ||
710 | iounmap(ibdev->uar_map); | ||
711 | mlx4_uar_free(dev, &ibdev->priv_uar); | 1167 | mlx4_uar_free(dev, &ibdev->priv_uar); |
712 | mlx4_pd_free(dev, ibdev->priv_pdn); | 1168 | mlx4_pd_free(dev, ibdev->priv_pdn); |
713 | ib_dealloc_device(&ibdev->ib_dev); | 1169 | ib_dealloc_device(&ibdev->ib_dev); |
@@ -747,19 +1203,33 @@ static void mlx4_ib_event(struct mlx4_dev *dev, void *ibdev_ptr, | |||
747 | } | 1203 | } |
748 | 1204 | ||
749 | static struct mlx4_interface mlx4_ib_interface = { | 1205 | static struct mlx4_interface mlx4_ib_interface = { |
750 | .add = mlx4_ib_add, | 1206 | .add = mlx4_ib_add, |
751 | .remove = mlx4_ib_remove, | 1207 | .remove = mlx4_ib_remove, |
752 | .event = mlx4_ib_event | 1208 | .event = mlx4_ib_event, |
1209 | .protocol = MLX4_PROT_IB_IPV6 | ||
753 | }; | 1210 | }; |
754 | 1211 | ||
755 | static int __init mlx4_ib_init(void) | 1212 | static int __init mlx4_ib_init(void) |
756 | { | 1213 | { |
757 | return mlx4_register_interface(&mlx4_ib_interface); | 1214 | int err; |
1215 | |||
1216 | wq = create_singlethread_workqueue("mlx4_ib"); | ||
1217 | if (!wq) | ||
1218 | return -ENOMEM; | ||
1219 | |||
1220 | err = mlx4_register_interface(&mlx4_ib_interface); | ||
1221 | if (err) { | ||
1222 | destroy_workqueue(wq); | ||
1223 | return err; | ||
1224 | } | ||
1225 | |||
1226 | return 0; | ||
758 | } | 1227 | } |
759 | 1228 | ||
760 | static void __exit mlx4_ib_cleanup(void) | 1229 | static void __exit mlx4_ib_cleanup(void) |
761 | { | 1230 | { |
762 | mlx4_unregister_interface(&mlx4_ib_interface); | 1231 | mlx4_unregister_interface(&mlx4_ib_interface); |
1232 | destroy_workqueue(wq); | ||
763 | } | 1233 | } |
764 | 1234 | ||
765 | module_init(mlx4_ib_init); | 1235 | module_init(mlx4_ib_init); |
diff --git a/drivers/infiniband/hw/mlx4/mlx4_ib.h b/drivers/infiniband/hw/mlx4/mlx4_ib.h index 3486d7675e56..2a322f21049f 100644 --- a/drivers/infiniband/hw/mlx4/mlx4_ib.h +++ b/drivers/infiniband/hw/mlx4/mlx4_ib.h | |||
@@ -112,6 +112,13 @@ enum mlx4_ib_qp_flags { | |||
112 | MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK = 1 << 1, | 112 | MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK = 1 << 1, |
113 | }; | 113 | }; |
114 | 114 | ||
115 | struct mlx4_ib_gid_entry { | ||
116 | struct list_head list; | ||
117 | union ib_gid gid; | ||
118 | int added; | ||
119 | u8 port; | ||
120 | }; | ||
121 | |||
115 | struct mlx4_ib_qp { | 122 | struct mlx4_ib_qp { |
116 | struct ib_qp ibqp; | 123 | struct ib_qp ibqp; |
117 | struct mlx4_qp mqp; | 124 | struct mlx4_qp mqp; |
@@ -138,6 +145,8 @@ struct mlx4_ib_qp { | |||
138 | u8 resp_depth; | 145 | u8 resp_depth; |
139 | u8 sq_no_prefetch; | 146 | u8 sq_no_prefetch; |
140 | u8 state; | 147 | u8 state; |
148 | int mlx_type; | ||
149 | struct list_head gid_list; | ||
141 | }; | 150 | }; |
142 | 151 | ||
143 | struct mlx4_ib_srq { | 152 | struct mlx4_ib_srq { |
@@ -157,7 +166,14 @@ struct mlx4_ib_srq { | |||
157 | 166 | ||
158 | struct mlx4_ib_ah { | 167 | struct mlx4_ib_ah { |
159 | struct ib_ah ibah; | 168 | struct ib_ah ibah; |
160 | struct mlx4_av av; | 169 | union mlx4_ext_av av; |
170 | }; | ||
171 | |||
172 | struct mlx4_ib_iboe { | ||
173 | spinlock_t lock; | ||
174 | struct net_device *netdevs[MLX4_MAX_PORTS]; | ||
175 | struct notifier_block nb; | ||
176 | union ib_gid gid_table[MLX4_MAX_PORTS][128]; | ||
161 | }; | 177 | }; |
162 | 178 | ||
163 | struct mlx4_ib_dev { | 179 | struct mlx4_ib_dev { |
@@ -176,6 +192,7 @@ struct mlx4_ib_dev { | |||
176 | 192 | ||
177 | struct mutex cap_mask_mutex; | 193 | struct mutex cap_mask_mutex; |
178 | bool ib_active; | 194 | bool ib_active; |
195 | struct mlx4_ib_iboe iboe; | ||
179 | }; | 196 | }; |
180 | 197 | ||
181 | static inline struct mlx4_ib_dev *to_mdev(struct ib_device *ibdev) | 198 | static inline struct mlx4_ib_dev *to_mdev(struct ib_device *ibdev) |
@@ -314,9 +331,20 @@ int mlx4_ib_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list, int npages, | |||
314 | int mlx4_ib_unmap_fmr(struct list_head *fmr_list); | 331 | int mlx4_ib_unmap_fmr(struct list_head *fmr_list); |
315 | int mlx4_ib_fmr_dealloc(struct ib_fmr *fmr); | 332 | int mlx4_ib_fmr_dealloc(struct ib_fmr *fmr); |
316 | 333 | ||
334 | int mlx4_ib_resolve_grh(struct mlx4_ib_dev *dev, const struct ib_ah_attr *ah_attr, | ||
335 | u8 *mac, int *is_mcast, u8 port); | ||
336 | |||
317 | static inline int mlx4_ib_ah_grh_present(struct mlx4_ib_ah *ah) | 337 | static inline int mlx4_ib_ah_grh_present(struct mlx4_ib_ah *ah) |
318 | { | 338 | { |
319 | return !!(ah->av.g_slid & 0x80); | 339 | u8 port = be32_to_cpu(ah->av.ib.port_pd) >> 24 & 3; |
340 | |||
341 | if (rdma_port_get_link_layer(ah->ibah.device, port) == IB_LINK_LAYER_ETHERNET) | ||
342 | return 1; | ||
343 | |||
344 | return !!(ah->av.ib.g_slid & 0x80); | ||
320 | } | 345 | } |
321 | 346 | ||
347 | int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp, | ||
348 | union ib_gid *gid); | ||
349 | |||
322 | #endif /* MLX4_IB_H */ | 350 | #endif /* MLX4_IB_H */ |
diff --git a/drivers/infiniband/hw/mlx4/mr.c b/drivers/infiniband/hw/mlx4/mr.c index 1d27b9a8e2d6..dca55b19a6f1 100644 --- a/drivers/infiniband/hw/mlx4/mr.c +++ b/drivers/infiniband/hw/mlx4/mr.c | |||
@@ -226,7 +226,7 @@ struct ib_fast_reg_page_list *mlx4_ib_alloc_fast_reg_page_list(struct ib_device | |||
226 | struct mlx4_ib_fast_reg_page_list *mfrpl; | 226 | struct mlx4_ib_fast_reg_page_list *mfrpl; |
227 | int size = page_list_len * sizeof (u64); | 227 | int size = page_list_len * sizeof (u64); |
228 | 228 | ||
229 | if (size > PAGE_SIZE) | 229 | if (page_list_len > MLX4_MAX_FAST_REG_PAGES) |
230 | return ERR_PTR(-EINVAL); | 230 | return ERR_PTR(-EINVAL); |
231 | 231 | ||
232 | mfrpl = kmalloc(sizeof *mfrpl, GFP_KERNEL); | 232 | mfrpl = kmalloc(sizeof *mfrpl, GFP_KERNEL); |
diff --git a/drivers/infiniband/hw/mlx4/qp.c b/drivers/infiniband/hw/mlx4/qp.c index 6a60827b2301..2001f20a4361 100644 --- a/drivers/infiniband/hw/mlx4/qp.c +++ b/drivers/infiniband/hw/mlx4/qp.c | |||
@@ -33,9 +33,11 @@ | |||
33 | 33 | ||
34 | #include <linux/log2.h> | 34 | #include <linux/log2.h> |
35 | #include <linux/slab.h> | 35 | #include <linux/slab.h> |
36 | #include <linux/netdevice.h> | ||
36 | 37 | ||
37 | #include <rdma/ib_cache.h> | 38 | #include <rdma/ib_cache.h> |
38 | #include <rdma/ib_pack.h> | 39 | #include <rdma/ib_pack.h> |
40 | #include <rdma/ib_addr.h> | ||
39 | 41 | ||
40 | #include <linux/mlx4/qp.h> | 42 | #include <linux/mlx4/qp.h> |
41 | 43 | ||
@@ -48,17 +50,26 @@ enum { | |||
48 | 50 | ||
49 | enum { | 51 | enum { |
50 | MLX4_IB_DEFAULT_SCHED_QUEUE = 0x83, | 52 | MLX4_IB_DEFAULT_SCHED_QUEUE = 0x83, |
51 | MLX4_IB_DEFAULT_QP0_SCHED_QUEUE = 0x3f | 53 | MLX4_IB_DEFAULT_QP0_SCHED_QUEUE = 0x3f, |
54 | MLX4_IB_LINK_TYPE_IB = 0, | ||
55 | MLX4_IB_LINK_TYPE_ETH = 1 | ||
52 | }; | 56 | }; |
53 | 57 | ||
54 | enum { | 58 | enum { |
55 | /* | 59 | /* |
56 | * Largest possible UD header: send with GRH and immediate data. | 60 | * Largest possible UD header: send with GRH and immediate |
61 | * data plus 18 bytes for an Ethernet header with VLAN/802.1Q | ||
62 | * tag. (LRH would only use 8 bytes, so Ethernet is the | ||
63 | * biggest case) | ||
57 | */ | 64 | */ |
58 | MLX4_IB_UD_HEADER_SIZE = 72, | 65 | MLX4_IB_UD_HEADER_SIZE = 82, |
59 | MLX4_IB_LSO_HEADER_SPARE = 128, | 66 | MLX4_IB_LSO_HEADER_SPARE = 128, |
60 | }; | 67 | }; |
61 | 68 | ||
69 | enum { | ||
70 | MLX4_IB_IBOE_ETHERTYPE = 0x8915 | ||
71 | }; | ||
72 | |||
62 | struct mlx4_ib_sqp { | 73 | struct mlx4_ib_sqp { |
63 | struct mlx4_ib_qp qp; | 74 | struct mlx4_ib_qp qp; |
64 | int pkey_index; | 75 | int pkey_index; |
@@ -462,6 +473,7 @@ static int create_qp_common(struct mlx4_ib_dev *dev, struct ib_pd *pd, | |||
462 | mutex_init(&qp->mutex); | 473 | mutex_init(&qp->mutex); |
463 | spin_lock_init(&qp->sq.lock); | 474 | spin_lock_init(&qp->sq.lock); |
464 | spin_lock_init(&qp->rq.lock); | 475 | spin_lock_init(&qp->rq.lock); |
476 | INIT_LIST_HEAD(&qp->gid_list); | ||
465 | 477 | ||
466 | qp->state = IB_QPS_RESET; | 478 | qp->state = IB_QPS_RESET; |
467 | if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) | 479 | if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) |
@@ -649,6 +661,16 @@ static void mlx4_ib_unlock_cqs(struct mlx4_ib_cq *send_cq, struct mlx4_ib_cq *re | |||
649 | } | 661 | } |
650 | } | 662 | } |
651 | 663 | ||
664 | static void del_gid_entries(struct mlx4_ib_qp *qp) | ||
665 | { | ||
666 | struct mlx4_ib_gid_entry *ge, *tmp; | ||
667 | |||
668 | list_for_each_entry_safe(ge, tmp, &qp->gid_list, list) { | ||
669 | list_del(&ge->list); | ||
670 | kfree(ge); | ||
671 | } | ||
672 | } | ||
673 | |||
652 | static void destroy_qp_common(struct mlx4_ib_dev *dev, struct mlx4_ib_qp *qp, | 674 | static void destroy_qp_common(struct mlx4_ib_dev *dev, struct mlx4_ib_qp *qp, |
653 | int is_user) | 675 | int is_user) |
654 | { | 676 | { |
@@ -695,6 +717,8 @@ static void destroy_qp_common(struct mlx4_ib_dev *dev, struct mlx4_ib_qp *qp, | |||
695 | if (!qp->ibqp.srq) | 717 | if (!qp->ibqp.srq) |
696 | mlx4_db_free(dev->dev, &qp->db); | 718 | mlx4_db_free(dev->dev, &qp->db); |
697 | } | 719 | } |
720 | |||
721 | del_gid_entries(qp); | ||
698 | } | 722 | } |
699 | 723 | ||
700 | struct ib_qp *mlx4_ib_create_qp(struct ib_pd *pd, | 724 | struct ib_qp *mlx4_ib_create_qp(struct ib_pd *pd, |
@@ -852,6 +876,14 @@ static void mlx4_set_sched(struct mlx4_qp_path *path, u8 port) | |||
852 | static int mlx4_set_path(struct mlx4_ib_dev *dev, const struct ib_ah_attr *ah, | 876 | static int mlx4_set_path(struct mlx4_ib_dev *dev, const struct ib_ah_attr *ah, |
853 | struct mlx4_qp_path *path, u8 port) | 877 | struct mlx4_qp_path *path, u8 port) |
854 | { | 878 | { |
879 | int err; | ||
880 | int is_eth = rdma_port_get_link_layer(&dev->ib_dev, port) == | ||
881 | IB_LINK_LAYER_ETHERNET; | ||
882 | u8 mac[6]; | ||
883 | int is_mcast; | ||
884 | u16 vlan_tag; | ||
885 | int vidx; | ||
886 | |||
855 | path->grh_mylmc = ah->src_path_bits & 0x7f; | 887 | path->grh_mylmc = ah->src_path_bits & 0x7f; |
856 | path->rlid = cpu_to_be16(ah->dlid); | 888 | path->rlid = cpu_to_be16(ah->dlid); |
857 | if (ah->static_rate) { | 889 | if (ah->static_rate) { |
@@ -879,12 +911,49 @@ static int mlx4_set_path(struct mlx4_ib_dev *dev, const struct ib_ah_attr *ah, | |||
879 | memcpy(path->rgid, ah->grh.dgid.raw, 16); | 911 | memcpy(path->rgid, ah->grh.dgid.raw, 16); |
880 | } | 912 | } |
881 | 913 | ||
882 | path->sched_queue = MLX4_IB_DEFAULT_SCHED_QUEUE | | 914 | if (is_eth) { |
883 | ((port - 1) << 6) | ((ah->sl & 0xf) << 2); | 915 | path->sched_queue = MLX4_IB_DEFAULT_SCHED_QUEUE | |
916 | ((port - 1) << 6) | ((ah->sl & 7) << 3) | ((ah->sl & 8) >> 1); | ||
917 | |||
918 | if (!(ah->ah_flags & IB_AH_GRH)) | ||
919 | return -1; | ||
920 | |||
921 | err = mlx4_ib_resolve_grh(dev, ah, mac, &is_mcast, port); | ||
922 | if (err) | ||
923 | return err; | ||
924 | |||
925 | memcpy(path->dmac, mac, 6); | ||
926 | path->ackto = MLX4_IB_LINK_TYPE_ETH; | ||
927 | /* use index 0 into MAC table for IBoE */ | ||
928 | path->grh_mylmc &= 0x80; | ||
929 | |||
930 | vlan_tag = rdma_get_vlan_id(&dev->iboe.gid_table[port - 1][ah->grh.sgid_index]); | ||
931 | if (vlan_tag < 0x1000) { | ||
932 | if (mlx4_find_cached_vlan(dev->dev, port, vlan_tag, &vidx)) | ||
933 | return -ENOENT; | ||
934 | |||
935 | path->vlan_index = vidx; | ||
936 | path->fl = 1 << 6; | ||
937 | } | ||
938 | } else | ||
939 | path->sched_queue = MLX4_IB_DEFAULT_SCHED_QUEUE | | ||
940 | ((port - 1) << 6) | ((ah->sl & 0xf) << 2); | ||
884 | 941 | ||
885 | return 0; | 942 | return 0; |
886 | } | 943 | } |
887 | 944 | ||
945 | static void update_mcg_macs(struct mlx4_ib_dev *dev, struct mlx4_ib_qp *qp) | ||
946 | { | ||
947 | struct mlx4_ib_gid_entry *ge, *tmp; | ||
948 | |||
949 | list_for_each_entry_safe(ge, tmp, &qp->gid_list, list) { | ||
950 | if (!ge->added && mlx4_ib_add_mc(dev, qp, &ge->gid)) { | ||
951 | ge->added = 1; | ||
952 | ge->port = qp->port; | ||
953 | } | ||
954 | } | ||
955 | } | ||
956 | |||
888 | static int __mlx4_ib_modify_qp(struct ib_qp *ibqp, | 957 | static int __mlx4_ib_modify_qp(struct ib_qp *ibqp, |
889 | const struct ib_qp_attr *attr, int attr_mask, | 958 | const struct ib_qp_attr *attr, int attr_mask, |
890 | enum ib_qp_state cur_state, enum ib_qp_state new_state) | 959 | enum ib_qp_state cur_state, enum ib_qp_state new_state) |
@@ -980,7 +1049,7 @@ static int __mlx4_ib_modify_qp(struct ib_qp *ibqp, | |||
980 | } | 1049 | } |
981 | 1050 | ||
982 | if (attr_mask & IB_QP_TIMEOUT) { | 1051 | if (attr_mask & IB_QP_TIMEOUT) { |
983 | context->pri_path.ackto = attr->timeout << 3; | 1052 | context->pri_path.ackto |= attr->timeout << 3; |
984 | optpar |= MLX4_QP_OPTPAR_ACK_TIMEOUT; | 1053 | optpar |= MLX4_QP_OPTPAR_ACK_TIMEOUT; |
985 | } | 1054 | } |
986 | 1055 | ||
@@ -1118,8 +1187,10 @@ static int __mlx4_ib_modify_qp(struct ib_qp *ibqp, | |||
1118 | qp->atomic_rd_en = attr->qp_access_flags; | 1187 | qp->atomic_rd_en = attr->qp_access_flags; |
1119 | if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) | 1188 | if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) |
1120 | qp->resp_depth = attr->max_dest_rd_atomic; | 1189 | qp->resp_depth = attr->max_dest_rd_atomic; |
1121 | if (attr_mask & IB_QP_PORT) | 1190 | if (attr_mask & IB_QP_PORT) { |
1122 | qp->port = attr->port_num; | 1191 | qp->port = attr->port_num; |
1192 | update_mcg_macs(dev, qp); | ||
1193 | } | ||
1123 | if (attr_mask & IB_QP_ALT_PATH) | 1194 | if (attr_mask & IB_QP_ALT_PATH) |
1124 | qp->alt_port = attr->alt_port_num; | 1195 | qp->alt_port = attr->alt_port_num; |
1125 | 1196 | ||
@@ -1221,40 +1292,59 @@ static int build_mlx_header(struct mlx4_ib_sqp *sqp, struct ib_send_wr *wr, | |||
1221 | struct mlx4_wqe_mlx_seg *mlx = wqe; | 1292 | struct mlx4_wqe_mlx_seg *mlx = wqe; |
1222 | struct mlx4_wqe_inline_seg *inl = wqe + sizeof *mlx; | 1293 | struct mlx4_wqe_inline_seg *inl = wqe + sizeof *mlx; |
1223 | struct mlx4_ib_ah *ah = to_mah(wr->wr.ud.ah); | 1294 | struct mlx4_ib_ah *ah = to_mah(wr->wr.ud.ah); |
1295 | union ib_gid sgid; | ||
1224 | u16 pkey; | 1296 | u16 pkey; |
1225 | int send_size; | 1297 | int send_size; |
1226 | int header_size; | 1298 | int header_size; |
1227 | int spc; | 1299 | int spc; |
1228 | int i; | 1300 | int i; |
1301 | int is_eth; | ||
1302 | int is_vlan = 0; | ||
1303 | int is_grh; | ||
1304 | u16 vlan; | ||
1229 | 1305 | ||
1230 | send_size = 0; | 1306 | send_size = 0; |
1231 | for (i = 0; i < wr->num_sge; ++i) | 1307 | for (i = 0; i < wr->num_sge; ++i) |
1232 | send_size += wr->sg_list[i].length; | 1308 | send_size += wr->sg_list[i].length; |
1233 | 1309 | ||
1234 | ib_ud_header_init(send_size, mlx4_ib_ah_grh_present(ah), 0, &sqp->ud_header); | 1310 | is_eth = rdma_port_get_link_layer(sqp->qp.ibqp.device, sqp->qp.port) == IB_LINK_LAYER_ETHERNET; |
1311 | is_grh = mlx4_ib_ah_grh_present(ah); | ||
1312 | if (is_eth) { | ||
1313 | ib_get_cached_gid(ib_dev, be32_to_cpu(ah->av.ib.port_pd) >> 24, | ||
1314 | ah->av.ib.gid_index, &sgid); | ||
1315 | vlan = rdma_get_vlan_id(&sgid); | ||
1316 | is_vlan = vlan < 0x1000; | ||
1317 | } | ||
1318 | ib_ud_header_init(send_size, !is_eth, is_eth, is_vlan, is_grh, 0, &sqp->ud_header); | ||
1319 | |||
1320 | if (!is_eth) { | ||
1321 | sqp->ud_header.lrh.service_level = | ||
1322 | be32_to_cpu(ah->av.ib.sl_tclass_flowlabel) >> 28; | ||
1323 | sqp->ud_header.lrh.destination_lid = ah->av.ib.dlid; | ||
1324 | sqp->ud_header.lrh.source_lid = cpu_to_be16(ah->av.ib.g_slid & 0x7f); | ||
1325 | } | ||
1235 | 1326 | ||
1236 | sqp->ud_header.lrh.service_level = | 1327 | if (is_grh) { |
1237 | be32_to_cpu(ah->av.sl_tclass_flowlabel) >> 28; | ||
1238 | sqp->ud_header.lrh.destination_lid = ah->av.dlid; | ||
1239 | sqp->ud_header.lrh.source_lid = cpu_to_be16(ah->av.g_slid & 0x7f); | ||
1240 | if (mlx4_ib_ah_grh_present(ah)) { | ||
1241 | sqp->ud_header.grh.traffic_class = | 1328 | sqp->ud_header.grh.traffic_class = |
1242 | (be32_to_cpu(ah->av.sl_tclass_flowlabel) >> 20) & 0xff; | 1329 | (be32_to_cpu(ah->av.ib.sl_tclass_flowlabel) >> 20) & 0xff; |
1243 | sqp->ud_header.grh.flow_label = | 1330 | sqp->ud_header.grh.flow_label = |
1244 | ah->av.sl_tclass_flowlabel & cpu_to_be32(0xfffff); | 1331 | ah->av.ib.sl_tclass_flowlabel & cpu_to_be32(0xfffff); |
1245 | sqp->ud_header.grh.hop_limit = ah->av.hop_limit; | 1332 | sqp->ud_header.grh.hop_limit = ah->av.ib.hop_limit; |
1246 | ib_get_cached_gid(ib_dev, be32_to_cpu(ah->av.port_pd) >> 24, | 1333 | ib_get_cached_gid(ib_dev, be32_to_cpu(ah->av.ib.port_pd) >> 24, |
1247 | ah->av.gid_index, &sqp->ud_header.grh.source_gid); | 1334 | ah->av.ib.gid_index, &sqp->ud_header.grh.source_gid); |
1248 | memcpy(sqp->ud_header.grh.destination_gid.raw, | 1335 | memcpy(sqp->ud_header.grh.destination_gid.raw, |
1249 | ah->av.dgid, 16); | 1336 | ah->av.ib.dgid, 16); |
1250 | } | 1337 | } |
1251 | 1338 | ||
1252 | mlx->flags &= cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE); | 1339 | mlx->flags &= cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE); |
1253 | mlx->flags |= cpu_to_be32((!sqp->qp.ibqp.qp_num ? MLX4_WQE_MLX_VL15 : 0) | | 1340 | |
1254 | (sqp->ud_header.lrh.destination_lid == | 1341 | if (!is_eth) { |
1255 | IB_LID_PERMISSIVE ? MLX4_WQE_MLX_SLR : 0) | | 1342 | mlx->flags |= cpu_to_be32((!sqp->qp.ibqp.qp_num ? MLX4_WQE_MLX_VL15 : 0) | |
1256 | (sqp->ud_header.lrh.service_level << 8)); | 1343 | (sqp->ud_header.lrh.destination_lid == |
1257 | mlx->rlid = sqp->ud_header.lrh.destination_lid; | 1344 | IB_LID_PERMISSIVE ? MLX4_WQE_MLX_SLR : 0) | |
1345 | (sqp->ud_header.lrh.service_level << 8)); | ||
1346 | mlx->rlid = sqp->ud_header.lrh.destination_lid; | ||
1347 | } | ||
1258 | 1348 | ||
1259 | switch (wr->opcode) { | 1349 | switch (wr->opcode) { |
1260 | case IB_WR_SEND: | 1350 | case IB_WR_SEND: |
@@ -1270,9 +1360,29 @@ static int build_mlx_header(struct mlx4_ib_sqp *sqp, struct ib_send_wr *wr, | |||
1270 | return -EINVAL; | 1360 | return -EINVAL; |
1271 | } | 1361 | } |
1272 | 1362 | ||
1273 | sqp->ud_header.lrh.virtual_lane = !sqp->qp.ibqp.qp_num ? 15 : 0; | 1363 | if (is_eth) { |
1274 | if (sqp->ud_header.lrh.destination_lid == IB_LID_PERMISSIVE) | 1364 | u8 *smac; |
1275 | sqp->ud_header.lrh.source_lid = IB_LID_PERMISSIVE; | 1365 | |
1366 | memcpy(sqp->ud_header.eth.dmac_h, ah->av.eth.mac, 6); | ||
1367 | /* FIXME: cache smac value? */ | ||
1368 | smac = to_mdev(sqp->qp.ibqp.device)->iboe.netdevs[sqp->qp.port - 1]->dev_addr; | ||
1369 | memcpy(sqp->ud_header.eth.smac_h, smac, 6); | ||
1370 | if (!memcmp(sqp->ud_header.eth.smac_h, sqp->ud_header.eth.dmac_h, 6)) | ||
1371 | mlx->flags |= cpu_to_be32(MLX4_WQE_CTRL_FORCE_LOOPBACK); | ||
1372 | if (!is_vlan) { | ||
1373 | sqp->ud_header.eth.type = cpu_to_be16(MLX4_IB_IBOE_ETHERTYPE); | ||
1374 | } else { | ||
1375 | u16 pcp; | ||
1376 | |||
1377 | sqp->ud_header.vlan.type = cpu_to_be16(MLX4_IB_IBOE_ETHERTYPE); | ||
1378 | pcp = (be32_to_cpu(ah->av.ib.sl_tclass_flowlabel) >> 27 & 3) << 13; | ||
1379 | sqp->ud_header.vlan.tag = cpu_to_be16(vlan | pcp); | ||
1380 | } | ||
1381 | } else { | ||
1382 | sqp->ud_header.lrh.virtual_lane = !sqp->qp.ibqp.qp_num ? 15 : 0; | ||
1383 | if (sqp->ud_header.lrh.destination_lid == IB_LID_PERMISSIVE) | ||
1384 | sqp->ud_header.lrh.source_lid = IB_LID_PERMISSIVE; | ||
1385 | } | ||
1276 | sqp->ud_header.bth.solicited_event = !!(wr->send_flags & IB_SEND_SOLICITED); | 1386 | sqp->ud_header.bth.solicited_event = !!(wr->send_flags & IB_SEND_SOLICITED); |
1277 | if (!sqp->qp.ibqp.qp_num) | 1387 | if (!sqp->qp.ibqp.qp_num) |
1278 | ib_get_cached_pkey(ib_dev, sqp->qp.port, sqp->pkey_index, &pkey); | 1388 | ib_get_cached_pkey(ib_dev, sqp->qp.port, sqp->pkey_index, &pkey); |
@@ -1429,11 +1539,14 @@ static void set_masked_atomic_seg(struct mlx4_wqe_masked_atomic_seg *aseg, | |||
1429 | } | 1539 | } |
1430 | 1540 | ||
1431 | static void set_datagram_seg(struct mlx4_wqe_datagram_seg *dseg, | 1541 | static void set_datagram_seg(struct mlx4_wqe_datagram_seg *dseg, |
1432 | struct ib_send_wr *wr) | 1542 | struct ib_send_wr *wr, __be16 *vlan) |
1433 | { | 1543 | { |
1434 | memcpy(dseg->av, &to_mah(wr->wr.ud.ah)->av, sizeof (struct mlx4_av)); | 1544 | memcpy(dseg->av, &to_mah(wr->wr.ud.ah)->av, sizeof (struct mlx4_av)); |
1435 | dseg->dqpn = cpu_to_be32(wr->wr.ud.remote_qpn); | 1545 | dseg->dqpn = cpu_to_be32(wr->wr.ud.remote_qpn); |
1436 | dseg->qkey = cpu_to_be32(wr->wr.ud.remote_qkey); | 1546 | dseg->qkey = cpu_to_be32(wr->wr.ud.remote_qkey); |
1547 | dseg->vlan = to_mah(wr->wr.ud.ah)->av.eth.vlan; | ||
1548 | memcpy(dseg->mac, to_mah(wr->wr.ud.ah)->av.eth.mac, 6); | ||
1549 | *vlan = dseg->vlan; | ||
1437 | } | 1550 | } |
1438 | 1551 | ||
1439 | static void set_mlx_icrc_seg(void *dseg) | 1552 | static void set_mlx_icrc_seg(void *dseg) |
@@ -1536,6 +1649,7 @@ int mlx4_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, | |||
1536 | __be32 uninitialized_var(lso_hdr_sz); | 1649 | __be32 uninitialized_var(lso_hdr_sz); |
1537 | __be32 blh; | 1650 | __be32 blh; |
1538 | int i; | 1651 | int i; |
1652 | __be16 vlan = cpu_to_be16(0xffff); | ||
1539 | 1653 | ||
1540 | spin_lock_irqsave(&qp->sq.lock, flags); | 1654 | spin_lock_irqsave(&qp->sq.lock, flags); |
1541 | 1655 | ||
@@ -1639,7 +1753,7 @@ int mlx4_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, | |||
1639 | break; | 1753 | break; |
1640 | 1754 | ||
1641 | case IB_QPT_UD: | 1755 | case IB_QPT_UD: |
1642 | set_datagram_seg(wqe, wr); | 1756 | set_datagram_seg(wqe, wr, &vlan); |
1643 | wqe += sizeof (struct mlx4_wqe_datagram_seg); | 1757 | wqe += sizeof (struct mlx4_wqe_datagram_seg); |
1644 | size += sizeof (struct mlx4_wqe_datagram_seg) / 16; | 1758 | size += sizeof (struct mlx4_wqe_datagram_seg) / 16; |
1645 | 1759 | ||
@@ -1702,6 +1816,11 @@ int mlx4_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, | |||
1702 | ctrl->fence_size = (wr->send_flags & IB_SEND_FENCE ? | 1816 | ctrl->fence_size = (wr->send_flags & IB_SEND_FENCE ? |
1703 | MLX4_WQE_CTRL_FENCE : 0) | size; | 1817 | MLX4_WQE_CTRL_FENCE : 0) | size; |
1704 | 1818 | ||
1819 | if (be16_to_cpu(vlan) < 0x1000) { | ||
1820 | ctrl->ins_vlan = 1 << 6; | ||
1821 | ctrl->vlan_tag = vlan; | ||
1822 | } | ||
1823 | |||
1705 | /* | 1824 | /* |
1706 | * Make sure descriptor is fully written before | 1825 | * Make sure descriptor is fully written before |
1707 | * setting ownership bit (because HW can start | 1826 | * setting ownership bit (because HW can start |
@@ -1866,17 +1985,27 @@ static int to_ib_qp_access_flags(int mlx4_flags) | |||
1866 | return ib_flags; | 1985 | return ib_flags; |
1867 | } | 1986 | } |
1868 | 1987 | ||
1869 | static void to_ib_ah_attr(struct mlx4_dev *dev, struct ib_ah_attr *ib_ah_attr, | 1988 | static void to_ib_ah_attr(struct mlx4_ib_dev *ibdev, struct ib_ah_attr *ib_ah_attr, |
1870 | struct mlx4_qp_path *path) | 1989 | struct mlx4_qp_path *path) |
1871 | { | 1990 | { |
1991 | struct mlx4_dev *dev = ibdev->dev; | ||
1992 | int is_eth; | ||
1993 | |||
1872 | memset(ib_ah_attr, 0, sizeof *ib_ah_attr); | 1994 | memset(ib_ah_attr, 0, sizeof *ib_ah_attr); |
1873 | ib_ah_attr->port_num = path->sched_queue & 0x40 ? 2 : 1; | 1995 | ib_ah_attr->port_num = path->sched_queue & 0x40 ? 2 : 1; |
1874 | 1996 | ||
1875 | if (ib_ah_attr->port_num == 0 || ib_ah_attr->port_num > dev->caps.num_ports) | 1997 | if (ib_ah_attr->port_num == 0 || ib_ah_attr->port_num > dev->caps.num_ports) |
1876 | return; | 1998 | return; |
1877 | 1999 | ||
2000 | is_eth = rdma_port_get_link_layer(&ibdev->ib_dev, ib_ah_attr->port_num) == | ||
2001 | IB_LINK_LAYER_ETHERNET; | ||
2002 | if (is_eth) | ||
2003 | ib_ah_attr->sl = ((path->sched_queue >> 3) & 0x7) | | ||
2004 | ((path->sched_queue & 4) << 1); | ||
2005 | else | ||
2006 | ib_ah_attr->sl = (path->sched_queue >> 2) & 0xf; | ||
2007 | |||
1878 | ib_ah_attr->dlid = be16_to_cpu(path->rlid); | 2008 | ib_ah_attr->dlid = be16_to_cpu(path->rlid); |
1879 | ib_ah_attr->sl = (path->sched_queue >> 2) & 0xf; | ||
1880 | ib_ah_attr->src_path_bits = path->grh_mylmc & 0x7f; | 2009 | ib_ah_attr->src_path_bits = path->grh_mylmc & 0x7f; |
1881 | ib_ah_attr->static_rate = path->static_rate ? path->static_rate - 5 : 0; | 2010 | ib_ah_attr->static_rate = path->static_rate ? path->static_rate - 5 : 0; |
1882 | ib_ah_attr->ah_flags = (path->grh_mylmc & (1 << 7)) ? IB_AH_GRH : 0; | 2011 | ib_ah_attr->ah_flags = (path->grh_mylmc & (1 << 7)) ? IB_AH_GRH : 0; |
@@ -1929,8 +2058,8 @@ int mlx4_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, int qp_attr | |||
1929 | to_ib_qp_access_flags(be32_to_cpu(context.params2)); | 2058 | to_ib_qp_access_flags(be32_to_cpu(context.params2)); |
1930 | 2059 | ||
1931 | if (qp->ibqp.qp_type == IB_QPT_RC || qp->ibqp.qp_type == IB_QPT_UC) { | 2060 | if (qp->ibqp.qp_type == IB_QPT_RC || qp->ibqp.qp_type == IB_QPT_UC) { |
1932 | to_ib_ah_attr(dev->dev, &qp_attr->ah_attr, &context.pri_path); | 2061 | to_ib_ah_attr(dev, &qp_attr->ah_attr, &context.pri_path); |
1933 | to_ib_ah_attr(dev->dev, &qp_attr->alt_ah_attr, &context.alt_path); | 2062 | to_ib_ah_attr(dev, &qp_attr->alt_ah_attr, &context.alt_path); |
1934 | qp_attr->alt_pkey_index = context.alt_path.pkey_index & 0x7f; | 2063 | qp_attr->alt_pkey_index = context.alt_path.pkey_index & 0x7f; |
1935 | qp_attr->alt_port_num = qp_attr->alt_ah_attr.port_num; | 2064 | qp_attr->alt_port_num = qp_attr->alt_ah_attr.port_num; |
1936 | } | 2065 | } |
diff --git a/drivers/infiniband/hw/mthca/Kconfig b/drivers/infiniband/hw/mthca/Kconfig index 03efc074967e..da314c3fec23 100644 --- a/drivers/infiniband/hw/mthca/Kconfig +++ b/drivers/infiniband/hw/mthca/Kconfig | |||
@@ -7,7 +7,7 @@ config INFINIBAND_MTHCA | |||
7 | ("Tavor") and the MT25208 PCI Express HCA ("Arbel"). | 7 | ("Tavor") and the MT25208 PCI Express HCA ("Arbel"). |
8 | 8 | ||
9 | config INFINIBAND_MTHCA_DEBUG | 9 | config INFINIBAND_MTHCA_DEBUG |
10 | bool "Verbose debugging output" if EMBEDDED | 10 | bool "Verbose debugging output" if EXPERT |
11 | depends on INFINIBAND_MTHCA | 11 | depends on INFINIBAND_MTHCA |
12 | default y | 12 | default y |
13 | ---help--- | 13 | ---help--- |
diff --git a/drivers/infiniband/hw/mthca/mthca_catas.c b/drivers/infiniband/hw/mthca/mthca_catas.c index 0aa0110e4b6c..e4a08c2819e4 100644 --- a/drivers/infiniband/hw/mthca/mthca_catas.c +++ b/drivers/infiniband/hw/mthca/mthca_catas.c | |||
@@ -146,7 +146,7 @@ static void poll_catas(unsigned long dev_ptr) | |||
146 | 146 | ||
147 | void mthca_start_catas_poll(struct mthca_dev *dev) | 147 | void mthca_start_catas_poll(struct mthca_dev *dev) |
148 | { | 148 | { |
149 | unsigned long addr; | 149 | phys_addr_t addr; |
150 | 150 | ||
151 | init_timer(&dev->catas_err.timer); | 151 | init_timer(&dev->catas_err.timer); |
152 | dev->catas_err.map = NULL; | 152 | dev->catas_err.map = NULL; |
@@ -158,7 +158,8 @@ void mthca_start_catas_poll(struct mthca_dev *dev) | |||
158 | dev->catas_err.map = ioremap(addr, dev->catas_err.size * 4); | 158 | dev->catas_err.map = ioremap(addr, dev->catas_err.size * 4); |
159 | if (!dev->catas_err.map) { | 159 | if (!dev->catas_err.map) { |
160 | mthca_warn(dev, "couldn't map catastrophic error region " | 160 | mthca_warn(dev, "couldn't map catastrophic error region " |
161 | "at 0x%lx/0x%x\n", addr, dev->catas_err.size * 4); | 161 | "at 0x%llx/0x%x\n", (unsigned long long) addr, |
162 | dev->catas_err.size * 4); | ||
162 | return; | 163 | return; |
163 | } | 164 | } |
164 | 165 | ||
diff --git a/drivers/infiniband/hw/mthca/mthca_cmd.c b/drivers/infiniband/hw/mthca/mthca_cmd.c index f4ceecd9684b..7bfa2a164955 100644 --- a/drivers/infiniband/hw/mthca/mthca_cmd.c +++ b/drivers/infiniband/hw/mthca/mthca_cmd.c | |||
@@ -713,7 +713,7 @@ int mthca_RUN_FW(struct mthca_dev *dev, u8 *status) | |||
713 | 713 | ||
714 | static void mthca_setup_cmd_doorbells(struct mthca_dev *dev, u64 base) | 714 | static void mthca_setup_cmd_doorbells(struct mthca_dev *dev, u64 base) |
715 | { | 715 | { |
716 | unsigned long addr; | 716 | phys_addr_t addr; |
717 | u16 max_off = 0; | 717 | u16 max_off = 0; |
718 | int i; | 718 | int i; |
719 | 719 | ||
diff --git a/drivers/infiniband/hw/mthca/mthca_eq.c b/drivers/infiniband/hw/mthca/mthca_eq.c index 8e8c728aff88..76785c653c13 100644 --- a/drivers/infiniband/hw/mthca/mthca_eq.c +++ b/drivers/infiniband/hw/mthca/mthca_eq.c | |||
@@ -653,7 +653,7 @@ static int mthca_map_reg(struct mthca_dev *dev, | |||
653 | unsigned long offset, unsigned long size, | 653 | unsigned long offset, unsigned long size, |
654 | void __iomem **map) | 654 | void __iomem **map) |
655 | { | 655 | { |
656 | unsigned long base = pci_resource_start(dev->pdev, 0); | 656 | phys_addr_t base = pci_resource_start(dev->pdev, 0); |
657 | 657 | ||
658 | *map = ioremap(base + offset, size); | 658 | *map = ioremap(base + offset, size); |
659 | if (!*map) | 659 | if (!*map) |
diff --git a/drivers/infiniband/hw/mthca/mthca_mad.c b/drivers/infiniband/hw/mthca/mthca_mad.c index 5648659ff0b0..03a59534f59e 100644 --- a/drivers/infiniband/hw/mthca/mthca_mad.c +++ b/drivers/infiniband/hw/mthca/mthca_mad.c | |||
@@ -171,6 +171,8 @@ static void forward_trap(struct mthca_dev *dev, | |||
171 | if (agent) { | 171 | if (agent) { |
172 | send_buf = ib_create_send_mad(agent, qpn, 0, 0, IB_MGMT_MAD_HDR, | 172 | send_buf = ib_create_send_mad(agent, qpn, 0, 0, IB_MGMT_MAD_HDR, |
173 | IB_MGMT_MAD_DATA, GFP_ATOMIC); | 173 | IB_MGMT_MAD_DATA, GFP_ATOMIC); |
174 | if (IS_ERR(send_buf)) | ||
175 | return; | ||
174 | /* | 176 | /* |
175 | * We rely here on the fact that MLX QPs don't use the | 177 | * We rely here on the fact that MLX QPs don't use the |
176 | * address handle after the send is posted (this is | 178 | * address handle after the send is posted (this is |
diff --git a/drivers/infiniband/hw/mthca/mthca_main.c b/drivers/infiniband/hw/mthca/mthca_main.c index 5eee6665919a..f24b79b805f2 100644 --- a/drivers/infiniband/hw/mthca/mthca_main.c +++ b/drivers/infiniband/hw/mthca/mthca_main.c | |||
@@ -790,7 +790,7 @@ static int mthca_setup_hca(struct mthca_dev *dev) | |||
790 | goto err_uar_table_free; | 790 | goto err_uar_table_free; |
791 | } | 791 | } |
792 | 792 | ||
793 | dev->kar = ioremap(dev->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE); | 793 | dev->kar = ioremap((phys_addr_t) dev->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE); |
794 | if (!dev->kar) { | 794 | if (!dev->kar) { |
795 | mthca_err(dev, "Couldn't map kernel access region, " | 795 | mthca_err(dev, "Couldn't map kernel access region, " |
796 | "aborting.\n"); | 796 | "aborting.\n"); |
@@ -1043,6 +1043,9 @@ static int __mthca_init_one(struct pci_dev *pdev, int hca_type) | |||
1043 | } | 1043 | } |
1044 | } | 1044 | } |
1045 | 1045 | ||
1046 | /* We can handle large RDMA requests, so allow larger segments. */ | ||
1047 | dma_set_max_seg_size(&pdev->dev, 1024 * 1024 * 1024); | ||
1048 | |||
1046 | mdev = (struct mthca_dev *) ib_alloc_device(sizeof *mdev); | 1049 | mdev = (struct mthca_dev *) ib_alloc_device(sizeof *mdev); |
1047 | if (!mdev) { | 1050 | if (!mdev) { |
1048 | dev_err(&pdev->dev, "Device struct alloc failed, " | 1051 | dev_err(&pdev->dev, "Device struct alloc failed, " |
diff --git a/drivers/infiniband/hw/mthca/mthca_mr.c b/drivers/infiniband/hw/mthca/mthca_mr.c index 065b20899876..44045c8846db 100644 --- a/drivers/infiniband/hw/mthca/mthca_mr.c +++ b/drivers/infiniband/hw/mthca/mthca_mr.c | |||
@@ -853,7 +853,7 @@ void mthca_arbel_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr) | |||
853 | 853 | ||
854 | int mthca_init_mr_table(struct mthca_dev *dev) | 854 | int mthca_init_mr_table(struct mthca_dev *dev) |
855 | { | 855 | { |
856 | unsigned long addr; | 856 | phys_addr_t addr; |
857 | int mpts, mtts, err, i; | 857 | int mpts, mtts, err, i; |
858 | 858 | ||
859 | err = mthca_alloc_init(&dev->mr_table.mpt_alloc, | 859 | err = mthca_alloc_init(&dev->mr_table.mpt_alloc, |
diff --git a/drivers/infiniband/hw/mthca/mthca_qp.c b/drivers/infiniband/hw/mthca/mthca_qp.c index d2d172e6289c..a34c9d38e822 100644 --- a/drivers/infiniband/hw/mthca/mthca_qp.c +++ b/drivers/infiniband/hw/mthca/mthca_qp.c | |||
@@ -1493,7 +1493,7 @@ static int build_mlx_header(struct mthca_dev *dev, struct mthca_sqp *sqp, | |||
1493 | int err; | 1493 | int err; |
1494 | u16 pkey; | 1494 | u16 pkey; |
1495 | 1495 | ||
1496 | ib_ud_header_init(256, /* assume a MAD */ | 1496 | ib_ud_header_init(256, /* assume a MAD */ 1, 0, 0, |
1497 | mthca_ah_grh_present(to_mah(wr->wr.ud.ah)), 0, | 1497 | mthca_ah_grh_present(to_mah(wr->wr.ud.ah)), 0, |
1498 | &sqp->ud_header); | 1498 | &sqp->ud_header); |
1499 | 1499 | ||
diff --git a/drivers/infiniband/hw/nes/nes.c b/drivers/infiniband/hw/nes/nes.c index 0c9f0aa5d4ea..2d668c69f6d9 100644 --- a/drivers/infiniband/hw/nes/nes.c +++ b/drivers/infiniband/hw/nes/nes.c | |||
@@ -144,6 +144,7 @@ static int nes_inetaddr_event(struct notifier_block *notifier, | |||
144 | struct nes_device *nesdev; | 144 | struct nes_device *nesdev; |
145 | struct net_device *netdev; | 145 | struct net_device *netdev; |
146 | struct nes_vnic *nesvnic; | 146 | struct nes_vnic *nesvnic; |
147 | unsigned int is_bonded; | ||
147 | 148 | ||
148 | nes_debug(NES_DBG_NETDEV, "nes_inetaddr_event: ip address %pI4, netmask %pI4.\n", | 149 | nes_debug(NES_DBG_NETDEV, "nes_inetaddr_event: ip address %pI4, netmask %pI4.\n", |
149 | &ifa->ifa_address, &ifa->ifa_mask); | 150 | &ifa->ifa_address, &ifa->ifa_mask); |
@@ -152,7 +153,9 @@ static int nes_inetaddr_event(struct notifier_block *notifier, | |||
152 | nesdev, nesdev->netdev[0]->name); | 153 | nesdev, nesdev->netdev[0]->name); |
153 | netdev = nesdev->netdev[0]; | 154 | netdev = nesdev->netdev[0]; |
154 | nesvnic = netdev_priv(netdev); | 155 | nesvnic = netdev_priv(netdev); |
155 | if (netdev == event_netdev) { | 156 | is_bonded = netif_is_bond_slave(netdev) && |
157 | (netdev->master == event_netdev); | ||
158 | if ((netdev == event_netdev) || is_bonded) { | ||
156 | if (nesvnic->rdma_enabled == 0) { | 159 | if (nesvnic->rdma_enabled == 0) { |
157 | nes_debug(NES_DBG_NETDEV, "Returning without processing event for %s since" | 160 | nes_debug(NES_DBG_NETDEV, "Returning without processing event for %s since" |
158 | " RDMA is not enabled.\n", | 161 | " RDMA is not enabled.\n", |
@@ -169,7 +172,10 @@ static int nes_inetaddr_event(struct notifier_block *notifier, | |||
169 | nes_manage_arp_cache(netdev, netdev->dev_addr, | 172 | nes_manage_arp_cache(netdev, netdev->dev_addr, |
170 | ntohl(nesvnic->local_ipaddr), NES_ARP_DELETE); | 173 | ntohl(nesvnic->local_ipaddr), NES_ARP_DELETE); |
171 | nesvnic->local_ipaddr = 0; | 174 | nesvnic->local_ipaddr = 0; |
172 | return NOTIFY_OK; | 175 | if (is_bonded) |
176 | continue; | ||
177 | else | ||
178 | return NOTIFY_OK; | ||
173 | break; | 179 | break; |
174 | case NETDEV_UP: | 180 | case NETDEV_UP: |
175 | nes_debug(NES_DBG_NETDEV, "event:UP\n"); | 181 | nes_debug(NES_DBG_NETDEV, "event:UP\n"); |
@@ -178,15 +184,24 @@ static int nes_inetaddr_event(struct notifier_block *notifier, | |||
178 | nes_debug(NES_DBG_NETDEV, "Interface already has local_ipaddr\n"); | 184 | nes_debug(NES_DBG_NETDEV, "Interface already has local_ipaddr\n"); |
179 | return NOTIFY_OK; | 185 | return NOTIFY_OK; |
180 | } | 186 | } |
187 | /* fall through */ | ||
188 | case NETDEV_CHANGEADDR: | ||
181 | /* Add the address to the IP table */ | 189 | /* Add the address to the IP table */ |
182 | nesvnic->local_ipaddr = ifa->ifa_address; | 190 | if (netdev->master) |
191 | nesvnic->local_ipaddr = | ||
192 | ((struct in_device *)netdev->master->ip_ptr)->ifa_list->ifa_address; | ||
193 | else | ||
194 | nesvnic->local_ipaddr = ifa->ifa_address; | ||
183 | 195 | ||
184 | nes_write_indexed(nesdev, | 196 | nes_write_indexed(nesdev, |
185 | NES_IDX_DST_IP_ADDR+(0x10*PCI_FUNC(nesdev->pcidev->devfn)), | 197 | NES_IDX_DST_IP_ADDR+(0x10*PCI_FUNC(nesdev->pcidev->devfn)), |
186 | ntohl(ifa->ifa_address)); | 198 | ntohl(nesvnic->local_ipaddr)); |
187 | nes_manage_arp_cache(netdev, netdev->dev_addr, | 199 | nes_manage_arp_cache(netdev, netdev->dev_addr, |
188 | ntohl(nesvnic->local_ipaddr), NES_ARP_ADD); | 200 | ntohl(nesvnic->local_ipaddr), NES_ARP_ADD); |
189 | return NOTIFY_OK; | 201 | if (is_bonded) |
202 | continue; | ||
203 | else | ||
204 | return NOTIFY_OK; | ||
190 | break; | 205 | break; |
191 | default: | 206 | default: |
192 | break; | 207 | break; |
@@ -660,6 +675,8 @@ static int __devinit nes_probe(struct pci_dev *pcidev, const struct pci_device_i | |||
660 | } | 675 | } |
661 | nes_notifiers_registered++; | 676 | nes_notifiers_registered++; |
662 | 677 | ||
678 | INIT_DELAYED_WORK(&nesdev->work, nes_recheck_link_status); | ||
679 | |||
663 | /* Initialize network devices */ | 680 | /* Initialize network devices */ |
664 | if ((netdev = nes_netdev_init(nesdev, mmio_regs)) == NULL) | 681 | if ((netdev = nes_netdev_init(nesdev, mmio_regs)) == NULL) |
665 | goto bail7; | 682 | goto bail7; |
@@ -677,7 +694,7 @@ static int __devinit nes_probe(struct pci_dev *pcidev, const struct pci_device_i | |||
677 | nesdev->netdev_count++; | 694 | nesdev->netdev_count++; |
678 | nesdev->nesadapter->netdev_count++; | 695 | nesdev->nesadapter->netdev_count++; |
679 | 696 | ||
680 | printk(KERN_ERR PFX "%s: NetEffect RNIC driver successfully loaded.\n", | 697 | printk(KERN_INFO PFX "%s: NetEffect RNIC driver successfully loaded.\n", |
681 | pci_name(pcidev)); | 698 | pci_name(pcidev)); |
682 | return 0; | 699 | return 0; |
683 | 700 | ||
@@ -742,6 +759,7 @@ static void __devexit nes_remove(struct pci_dev *pcidev) | |||
742 | struct nes_device *nesdev = pci_get_drvdata(pcidev); | 759 | struct nes_device *nesdev = pci_get_drvdata(pcidev); |
743 | struct net_device *netdev; | 760 | struct net_device *netdev; |
744 | int netdev_index = 0; | 761 | int netdev_index = 0; |
762 | unsigned long flags; | ||
745 | 763 | ||
746 | if (nesdev->netdev_count) { | 764 | if (nesdev->netdev_count) { |
747 | netdev = nesdev->netdev[netdev_index]; | 765 | netdev = nesdev->netdev[netdev_index]; |
@@ -768,6 +786,14 @@ static void __devexit nes_remove(struct pci_dev *pcidev) | |||
768 | free_irq(pcidev->irq, nesdev); | 786 | free_irq(pcidev->irq, nesdev); |
769 | tasklet_kill(&nesdev->dpc_tasklet); | 787 | tasklet_kill(&nesdev->dpc_tasklet); |
770 | 788 | ||
789 | spin_lock_irqsave(&nesdev->nesadapter->phy_lock, flags); | ||
790 | if (nesdev->link_recheck) { | ||
791 | spin_unlock_irqrestore(&nesdev->nesadapter->phy_lock, flags); | ||
792 | cancel_delayed_work_sync(&nesdev->work); | ||
793 | } else { | ||
794 | spin_unlock_irqrestore(&nesdev->nesadapter->phy_lock, flags); | ||
795 | } | ||
796 | |||
771 | /* Deallocate the Adapter Structure */ | 797 | /* Deallocate the Adapter Structure */ |
772 | nes_destroy_adapter(nesdev->nesadapter); | 798 | nes_destroy_adapter(nesdev->nesadapter); |
773 | 799 | ||
@@ -1112,7 +1138,9 @@ static ssize_t nes_store_wqm_quanta(struct device_driver *ddp, | |||
1112 | u32 i = 0; | 1138 | u32 i = 0; |
1113 | struct nes_device *nesdev; | 1139 | struct nes_device *nesdev; |
1114 | 1140 | ||
1115 | strict_strtoul(buf, 0, &wqm_quanta_value); | 1141 | if (kstrtoul(buf, 0, &wqm_quanta_value) < 0) |
1142 | return -EINVAL; | ||
1143 | |||
1116 | list_for_each_entry(nesdev, &nes_dev_list, list) { | 1144 | list_for_each_entry(nesdev, &nes_dev_list, list) { |
1117 | if (i == ee_flsh_adapter) { | 1145 | if (i == ee_flsh_adapter) { |
1118 | nesdev->nesadapter->wqm_quanta = wqm_quanta_value; | 1146 | nesdev->nesadapter->wqm_quanta = wqm_quanta_value; |
diff --git a/drivers/infiniband/hw/nes/nes.h b/drivers/infiniband/hw/nes/nes.h index b3d145e82b4c..6fe79876009e 100644 --- a/drivers/infiniband/hw/nes/nes.h +++ b/drivers/infiniband/hw/nes/nes.h | |||
@@ -268,6 +268,9 @@ struct nes_device { | |||
268 | u8 napi_isr_ran; | 268 | u8 napi_isr_ran; |
269 | u8 disable_rx_flow_control; | 269 | u8 disable_rx_flow_control; |
270 | u8 disable_tx_flow_control; | 270 | u8 disable_tx_flow_control; |
271 | |||
272 | struct delayed_work work; | ||
273 | u8 link_recheck; | ||
271 | }; | 274 | }; |
272 | 275 | ||
273 | 276 | ||
@@ -507,6 +510,7 @@ void nes_nic_ce_handler(struct nes_device *, struct nes_hw_nic_cq *); | |||
507 | void nes_iwarp_ce_handler(struct nes_device *, struct nes_hw_cq *); | 510 | void nes_iwarp_ce_handler(struct nes_device *, struct nes_hw_cq *); |
508 | int nes_destroy_cqp(struct nes_device *); | 511 | int nes_destroy_cqp(struct nes_device *); |
509 | int nes_nic_cm_xmit(struct sk_buff *, struct net_device *); | 512 | int nes_nic_cm_xmit(struct sk_buff *, struct net_device *); |
513 | void nes_recheck_link_status(struct work_struct *work); | ||
510 | 514 | ||
511 | /* nes_nic.c */ | 515 | /* nes_nic.c */ |
512 | struct net_device *nes_netdev_init(struct nes_device *, void __iomem *); | 516 | struct net_device *nes_netdev_init(struct nes_device *, void __iomem *); |
diff --git a/drivers/infiniband/hw/nes/nes_cm.c b/drivers/infiniband/hw/nes/nes_cm.c index 61e0efd4ccfb..e74cdf9ef471 100644 --- a/drivers/infiniband/hw/nes/nes_cm.c +++ b/drivers/infiniband/hw/nes/nes_cm.c | |||
@@ -1104,20 +1104,24 @@ static inline int mini_cm_accelerated(struct nes_cm_core *cm_core, | |||
1104 | static int nes_addr_resolve_neigh(struct nes_vnic *nesvnic, u32 dst_ip, int arpindex) | 1104 | static int nes_addr_resolve_neigh(struct nes_vnic *nesvnic, u32 dst_ip, int arpindex) |
1105 | { | 1105 | { |
1106 | struct rtable *rt; | 1106 | struct rtable *rt; |
1107 | struct flowi fl; | ||
1108 | struct neighbour *neigh; | 1107 | struct neighbour *neigh; |
1109 | int rc = arpindex; | 1108 | int rc = arpindex; |
1109 | struct net_device *netdev; | ||
1110 | struct nes_adapter *nesadapter = nesvnic->nesdev->nesadapter; | 1110 | struct nes_adapter *nesadapter = nesvnic->nesdev->nesadapter; |
1111 | 1111 | ||
1112 | memset(&fl, 0, sizeof fl); | 1112 | rt = ip_route_output(&init_net, htonl(dst_ip), 0, 0, 0); |
1113 | fl.nl_u.ip4_u.daddr = htonl(dst_ip); | 1113 | if (IS_ERR(rt)) { |
1114 | if (ip_route_output_key(&init_net, &rt, &fl)) { | ||
1115 | printk(KERN_ERR "%s: ip_route_output_key failed for 0x%08X\n", | 1114 | printk(KERN_ERR "%s: ip_route_output_key failed for 0x%08X\n", |
1116 | __func__, dst_ip); | 1115 | __func__, dst_ip); |
1117 | return rc; | 1116 | return rc; |
1118 | } | 1117 | } |
1119 | 1118 | ||
1120 | neigh = neigh_lookup(&arp_tbl, &rt->rt_gateway, nesvnic->netdev); | 1119 | if (netif_is_bond_slave(nesvnic->netdev)) |
1120 | netdev = nesvnic->netdev->master; | ||
1121 | else | ||
1122 | netdev = nesvnic->netdev; | ||
1123 | |||
1124 | neigh = neigh_lookup(&arp_tbl, &rt->rt_gateway, netdev); | ||
1121 | if (neigh) { | 1125 | if (neigh) { |
1122 | if (neigh->nud_state & NUD_VALID) { | 1126 | if (neigh->nud_state & NUD_VALID) { |
1123 | nes_debug(NES_DBG_CM, "Neighbor MAC address for 0x%08X" | 1127 | nes_debug(NES_DBG_CM, "Neighbor MAC address for 0x%08X" |
@@ -1393,7 +1397,7 @@ static void handle_fin_pkt(struct nes_cm_node *cm_node) | |||
1393 | cleanup_retrans_entry(cm_node); | 1397 | cleanup_retrans_entry(cm_node); |
1394 | cm_node->state = NES_CM_STATE_CLOSING; | 1398 | cm_node->state = NES_CM_STATE_CLOSING; |
1395 | send_ack(cm_node, NULL); | 1399 | send_ack(cm_node, NULL); |
1396 | /* Wait for ACK as this is simultanous close.. | 1400 | /* Wait for ACK as this is simultaneous close.. |
1397 | * After we receive ACK, do not send anything.. | 1401 | * After we receive ACK, do not send anything.. |
1398 | * Just rm the node.. Done.. */ | 1402 | * Just rm the node.. Done.. */ |
1399 | break; | 1403 | break; |
@@ -1424,7 +1428,6 @@ static void handle_rst_pkt(struct nes_cm_node *cm_node, struct sk_buff *skb, | |||
1424 | { | 1428 | { |
1425 | 1429 | ||
1426 | int reset = 0; /* whether to send reset in case of err.. */ | 1430 | int reset = 0; /* whether to send reset in case of err.. */ |
1427 | int passive_state; | ||
1428 | atomic_inc(&cm_resets_recvd); | 1431 | atomic_inc(&cm_resets_recvd); |
1429 | nes_debug(NES_DBG_CM, "Received Reset, cm_node = %p, state = %u." | 1432 | nes_debug(NES_DBG_CM, "Received Reset, cm_node = %p, state = %u." |
1430 | " refcnt=%d\n", cm_node, cm_node->state, | 1433 | " refcnt=%d\n", cm_node, cm_node->state, |
@@ -1439,7 +1442,7 @@ static void handle_rst_pkt(struct nes_cm_node *cm_node, struct sk_buff *skb, | |||
1439 | active_open_err(cm_node, skb, reset); | 1442 | active_open_err(cm_node, skb, reset); |
1440 | break; | 1443 | break; |
1441 | case NES_CM_STATE_MPAREQ_RCVD: | 1444 | case NES_CM_STATE_MPAREQ_RCVD: |
1442 | passive_state = atomic_add_return(1, &cm_node->passive_state); | 1445 | atomic_inc(&cm_node->passive_state); |
1443 | dev_kfree_skb_any(skb); | 1446 | dev_kfree_skb_any(skb); |
1444 | break; | 1447 | break; |
1445 | case NES_CM_STATE_ESTABLISHED: | 1448 | case NES_CM_STATE_ESTABLISHED: |
@@ -2560,7 +2563,7 @@ static int nes_cm_disconn_true(struct nes_qp *nesqp) | |||
2560 | u16 last_ae; | 2563 | u16 last_ae; |
2561 | u8 original_hw_tcp_state; | 2564 | u8 original_hw_tcp_state; |
2562 | u8 original_ibqp_state; | 2565 | u8 original_ibqp_state; |
2563 | enum iw_cm_event_status disconn_status = IW_CM_EVENT_STATUS_OK; | 2566 | int disconn_status = 0; |
2564 | int issue_disconn = 0; | 2567 | int issue_disconn = 0; |
2565 | int issue_close = 0; | 2568 | int issue_close = 0; |
2566 | int issue_flush = 0; | 2569 | int issue_flush = 0; |
@@ -2602,7 +2605,7 @@ static int nes_cm_disconn_true(struct nes_qp *nesqp) | |||
2602 | (last_ae == NES_AEQE_AEID_LLP_CONNECTION_RESET))) { | 2605 | (last_ae == NES_AEQE_AEID_LLP_CONNECTION_RESET))) { |
2603 | issue_disconn = 1; | 2606 | issue_disconn = 1; |
2604 | if (last_ae == NES_AEQE_AEID_LLP_CONNECTION_RESET) | 2607 | if (last_ae == NES_AEQE_AEID_LLP_CONNECTION_RESET) |
2605 | disconn_status = IW_CM_EVENT_STATUS_RESET; | 2608 | disconn_status = -ECONNRESET; |
2606 | } | 2609 | } |
2607 | 2610 | ||
2608 | if (((original_hw_tcp_state == NES_AEQE_TCP_STATE_CLOSED) || | 2611 | if (((original_hw_tcp_state == NES_AEQE_TCP_STATE_CLOSED) || |
@@ -2663,7 +2666,7 @@ static int nes_cm_disconn_true(struct nes_qp *nesqp) | |||
2663 | cm_id->provider_data = nesqp; | 2666 | cm_id->provider_data = nesqp; |
2664 | /* Send up the close complete event */ | 2667 | /* Send up the close complete event */ |
2665 | cm_event.event = IW_CM_EVENT_CLOSE; | 2668 | cm_event.event = IW_CM_EVENT_CLOSE; |
2666 | cm_event.status = IW_CM_EVENT_STATUS_OK; | 2669 | cm_event.status = 0; |
2667 | cm_event.provider_data = cm_id->provider_data; | 2670 | cm_event.provider_data = cm_id->provider_data; |
2668 | cm_event.local_addr = cm_id->local_addr; | 2671 | cm_event.local_addr = cm_id->local_addr; |
2669 | cm_event.remote_addr = cm_id->remote_addr; | 2672 | cm_event.remote_addr = cm_id->remote_addr; |
@@ -2701,7 +2704,7 @@ static int nes_disconnect(struct nes_qp *nesqp, int abrupt) | |||
2701 | nesibdev = nesvnic->nesibdev; | 2704 | nesibdev = nesvnic->nesibdev; |
2702 | 2705 | ||
2703 | nes_debug(NES_DBG_CM, "netdev refcnt = %u.\n", | 2706 | nes_debug(NES_DBG_CM, "netdev refcnt = %u.\n", |
2704 | atomic_read(&nesvnic->netdev->refcnt)); | 2707 | netdev_refcnt_read(nesvnic->netdev)); |
2705 | 2708 | ||
2706 | if (nesqp->active_conn) { | 2709 | if (nesqp->active_conn) { |
2707 | 2710 | ||
@@ -2791,7 +2794,7 @@ int nes_accept(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param) | |||
2791 | atomic_inc(&cm_accepts); | 2794 | atomic_inc(&cm_accepts); |
2792 | 2795 | ||
2793 | nes_debug(NES_DBG_CM, "netdev refcnt = %u.\n", | 2796 | nes_debug(NES_DBG_CM, "netdev refcnt = %u.\n", |
2794 | atomic_read(&nesvnic->netdev->refcnt)); | 2797 | netdev_refcnt_read(nesvnic->netdev)); |
2795 | 2798 | ||
2796 | /* allocate the ietf frame and space for private data */ | 2799 | /* allocate the ietf frame and space for private data */ |
2797 | nesqp->ietf_frame = pci_alloc_consistent(nesdev->pcidev, | 2800 | nesqp->ietf_frame = pci_alloc_consistent(nesdev->pcidev, |
@@ -2963,7 +2966,7 @@ int nes_accept(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param) | |||
2963 | nes_add_ref(&nesqp->ibqp); | 2966 | nes_add_ref(&nesqp->ibqp); |
2964 | 2967 | ||
2965 | cm_event.event = IW_CM_EVENT_ESTABLISHED; | 2968 | cm_event.event = IW_CM_EVENT_ESTABLISHED; |
2966 | cm_event.status = IW_CM_EVENT_STATUS_ACCEPTED; | 2969 | cm_event.status = 0; |
2967 | cm_event.provider_data = (void *)nesqp; | 2970 | cm_event.provider_data = (void *)nesqp; |
2968 | cm_event.local_addr = cm_id->local_addr; | 2971 | cm_event.local_addr = cm_id->local_addr; |
2969 | cm_event.remote_addr = cm_id->remote_addr; | 2972 | cm_event.remote_addr = cm_id->remote_addr; |
@@ -3374,7 +3377,7 @@ static void cm_event_connected(struct nes_cm_event *event) | |||
3374 | 3377 | ||
3375 | /* notify OF layer we successfully created the requested connection */ | 3378 | /* notify OF layer we successfully created the requested connection */ |
3376 | cm_event.event = IW_CM_EVENT_CONNECT_REPLY; | 3379 | cm_event.event = IW_CM_EVENT_CONNECT_REPLY; |
3377 | cm_event.status = IW_CM_EVENT_STATUS_ACCEPTED; | 3380 | cm_event.status = 0; |
3378 | cm_event.provider_data = cm_id->provider_data; | 3381 | cm_event.provider_data = cm_id->provider_data; |
3379 | cm_event.local_addr.sin_family = AF_INET; | 3382 | cm_event.local_addr.sin_family = AF_INET; |
3380 | cm_event.local_addr.sin_port = cm_id->local_addr.sin_port; | 3383 | cm_event.local_addr.sin_port = cm_id->local_addr.sin_port; |
@@ -3481,7 +3484,7 @@ static void cm_event_reset(struct nes_cm_event *event) | |||
3481 | nesqp->cm_id = NULL; | 3484 | nesqp->cm_id = NULL; |
3482 | /* cm_id->provider_data = NULL; */ | 3485 | /* cm_id->provider_data = NULL; */ |
3483 | cm_event.event = IW_CM_EVENT_DISCONNECT; | 3486 | cm_event.event = IW_CM_EVENT_DISCONNECT; |
3484 | cm_event.status = IW_CM_EVENT_STATUS_RESET; | 3487 | cm_event.status = -ECONNRESET; |
3485 | cm_event.provider_data = cm_id->provider_data; | 3488 | cm_event.provider_data = cm_id->provider_data; |
3486 | cm_event.local_addr = cm_id->local_addr; | 3489 | cm_event.local_addr = cm_id->local_addr; |
3487 | cm_event.remote_addr = cm_id->remote_addr; | 3490 | cm_event.remote_addr = cm_id->remote_addr; |
@@ -3492,7 +3495,7 @@ static void cm_event_reset(struct nes_cm_event *event) | |||
3492 | ret = cm_id->event_handler(cm_id, &cm_event); | 3495 | ret = cm_id->event_handler(cm_id, &cm_event); |
3493 | atomic_inc(&cm_closes); | 3496 | atomic_inc(&cm_closes); |
3494 | cm_event.event = IW_CM_EVENT_CLOSE; | 3497 | cm_event.event = IW_CM_EVENT_CLOSE; |
3495 | cm_event.status = IW_CM_EVENT_STATUS_OK; | 3498 | cm_event.status = 0; |
3496 | cm_event.provider_data = cm_id->provider_data; | 3499 | cm_event.provider_data = cm_id->provider_data; |
3497 | cm_event.local_addr = cm_id->local_addr; | 3500 | cm_event.local_addr = cm_id->local_addr; |
3498 | cm_event.remote_addr = cm_id->remote_addr; | 3501 | cm_event.remote_addr = cm_id->remote_addr; |
@@ -3531,7 +3534,7 @@ static void cm_event_mpa_req(struct nes_cm_event *event) | |||
3531 | cm_node, cm_id, jiffies); | 3534 | cm_node, cm_id, jiffies); |
3532 | 3535 | ||
3533 | cm_event.event = IW_CM_EVENT_CONNECT_REQUEST; | 3536 | cm_event.event = IW_CM_EVENT_CONNECT_REQUEST; |
3534 | cm_event.status = IW_CM_EVENT_STATUS_OK; | 3537 | cm_event.status = 0; |
3535 | cm_event.provider_data = (void *)cm_node; | 3538 | cm_event.provider_data = (void *)cm_node; |
3536 | 3539 | ||
3537 | cm_event.local_addr.sin_family = AF_INET; | 3540 | cm_event.local_addr.sin_family = AF_INET; |
diff --git a/drivers/infiniband/hw/nes/nes_hw.c b/drivers/infiniband/hw/nes/nes_hw.c index 1980a461c499..96fa9a4cafdf 100644 --- a/drivers/infiniband/hw/nes/nes_hw.c +++ b/drivers/infiniband/hw/nes/nes_hw.c | |||
@@ -80,7 +80,7 @@ static void nes_terminate_start_timer(struct nes_qp *nesqp); | |||
80 | 80 | ||
81 | #ifdef CONFIG_INFINIBAND_NES_DEBUG | 81 | #ifdef CONFIG_INFINIBAND_NES_DEBUG |
82 | static unsigned char *nes_iwarp_state_str[] = { | 82 | static unsigned char *nes_iwarp_state_str[] = { |
83 | "Non-Existant", | 83 | "Non-Existent", |
84 | "Idle", | 84 | "Idle", |
85 | "RTS", | 85 | "RTS", |
86 | "Closing", | 86 | "Closing", |
@@ -91,7 +91,7 @@ static unsigned char *nes_iwarp_state_str[] = { | |||
91 | }; | 91 | }; |
92 | 92 | ||
93 | static unsigned char *nes_tcp_state_str[] = { | 93 | static unsigned char *nes_tcp_state_str[] = { |
94 | "Non-Existant", | 94 | "Non-Existent", |
95 | "Closed", | 95 | "Closed", |
96 | "Listen", | 96 | "Listen", |
97 | "SYN Sent", | 97 | "SYN Sent", |
@@ -2608,6 +2608,15 @@ static void nes_process_mac_intr(struct nes_device *nesdev, u32 mac_number) | |||
2608 | netif_start_queue(nesvnic->netdev); | 2608 | netif_start_queue(nesvnic->netdev); |
2609 | nesvnic->linkup = 1; | 2609 | nesvnic->linkup = 1; |
2610 | netif_carrier_on(nesvnic->netdev); | 2610 | netif_carrier_on(nesvnic->netdev); |
2611 | |||
2612 | spin_lock(&nesvnic->port_ibevent_lock); | ||
2613 | if (nesvnic->of_device_registered) { | ||
2614 | if (nesdev->iw_status == 0) { | ||
2615 | nesdev->iw_status = 1; | ||
2616 | nes_port_ibevent(nesvnic); | ||
2617 | } | ||
2618 | } | ||
2619 | spin_unlock(&nesvnic->port_ibevent_lock); | ||
2611 | } | 2620 | } |
2612 | } | 2621 | } |
2613 | } else { | 2622 | } else { |
@@ -2633,9 +2642,25 @@ static void nes_process_mac_intr(struct nes_device *nesdev, u32 mac_number) | |||
2633 | netif_stop_queue(nesvnic->netdev); | 2642 | netif_stop_queue(nesvnic->netdev); |
2634 | nesvnic->linkup = 0; | 2643 | nesvnic->linkup = 0; |
2635 | netif_carrier_off(nesvnic->netdev); | 2644 | netif_carrier_off(nesvnic->netdev); |
2645 | |||
2646 | spin_lock(&nesvnic->port_ibevent_lock); | ||
2647 | if (nesvnic->of_device_registered) { | ||
2648 | if (nesdev->iw_status == 1) { | ||
2649 | nesdev->iw_status = 0; | ||
2650 | nes_port_ibevent(nesvnic); | ||
2651 | } | ||
2652 | } | ||
2653 | spin_unlock(&nesvnic->port_ibevent_lock); | ||
2636 | } | 2654 | } |
2637 | } | 2655 | } |
2638 | } | 2656 | } |
2657 | if (nesadapter->phy_type[mac_index] == NES_PHY_TYPE_SFP_D) { | ||
2658 | if (nesdev->link_recheck) | ||
2659 | cancel_delayed_work(&nesdev->work); | ||
2660 | nesdev->link_recheck = 1; | ||
2661 | schedule_delayed_work(&nesdev->work, | ||
2662 | NES_LINK_RECHECK_DELAY); | ||
2663 | } | ||
2639 | } | 2664 | } |
2640 | 2665 | ||
2641 | spin_unlock_irqrestore(&nesadapter->phy_lock, flags); | 2666 | spin_unlock_irqrestore(&nesadapter->phy_lock, flags); |
@@ -2643,6 +2668,84 @@ static void nes_process_mac_intr(struct nes_device *nesdev, u32 mac_number) | |||
2643 | nesadapter->mac_sw_state[mac_number] = NES_MAC_SW_IDLE; | 2668 | nesadapter->mac_sw_state[mac_number] = NES_MAC_SW_IDLE; |
2644 | } | 2669 | } |
2645 | 2670 | ||
2671 | void nes_recheck_link_status(struct work_struct *work) | ||
2672 | { | ||
2673 | unsigned long flags; | ||
2674 | struct nes_device *nesdev = container_of(work, struct nes_device, work.work); | ||
2675 | struct nes_adapter *nesadapter = nesdev->nesadapter; | ||
2676 | struct nes_vnic *nesvnic; | ||
2677 | u32 mac_index = nesdev->mac_index; | ||
2678 | u16 phy_data; | ||
2679 | u16 temp_phy_data; | ||
2680 | |||
2681 | spin_lock_irqsave(&nesadapter->phy_lock, flags); | ||
2682 | |||
2683 | /* check link status */ | ||
2684 | nes_read_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 1, 0x9003); | ||
2685 | temp_phy_data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL); | ||
2686 | |||
2687 | nes_read_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 3, 0x0021); | ||
2688 | nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL); | ||
2689 | nes_read_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 3, 0x0021); | ||
2690 | phy_data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL); | ||
2691 | |||
2692 | phy_data = (!temp_phy_data && (phy_data == 0x8000)) ? 0x4 : 0x0; | ||
2693 | |||
2694 | nes_debug(NES_DBG_PHY, "%s: Phy data = 0x%04X, link was %s.\n", | ||
2695 | __func__, phy_data, | ||
2696 | nesadapter->mac_link_down[mac_index] ? "DOWN" : "UP"); | ||
2697 | |||
2698 | if (phy_data & 0x0004) { | ||
2699 | nesadapter->mac_link_down[mac_index] = 0; | ||
2700 | list_for_each_entry(nesvnic, &nesadapter->nesvnic_list[mac_index], list) { | ||
2701 | if (nesvnic->linkup == 0) { | ||
2702 | printk(PFX "The Link is now up for port %s, netdev %p.\n", | ||
2703 | nesvnic->netdev->name, nesvnic->netdev); | ||
2704 | if (netif_queue_stopped(nesvnic->netdev)) | ||
2705 | netif_start_queue(nesvnic->netdev); | ||
2706 | nesvnic->linkup = 1; | ||
2707 | netif_carrier_on(nesvnic->netdev); | ||
2708 | |||
2709 | spin_lock(&nesvnic->port_ibevent_lock); | ||
2710 | if (nesvnic->of_device_registered) { | ||
2711 | if (nesdev->iw_status == 0) { | ||
2712 | nesdev->iw_status = 1; | ||
2713 | nes_port_ibevent(nesvnic); | ||
2714 | } | ||
2715 | } | ||
2716 | spin_unlock(&nesvnic->port_ibevent_lock); | ||
2717 | } | ||
2718 | } | ||
2719 | |||
2720 | } else { | ||
2721 | nesadapter->mac_link_down[mac_index] = 1; | ||
2722 | list_for_each_entry(nesvnic, &nesadapter->nesvnic_list[mac_index], list) { | ||
2723 | if (nesvnic->linkup == 1) { | ||
2724 | printk(PFX "The Link is now down for port %s, netdev %p.\n", | ||
2725 | nesvnic->netdev->name, nesvnic->netdev); | ||
2726 | if (!(netif_queue_stopped(nesvnic->netdev))) | ||
2727 | netif_stop_queue(nesvnic->netdev); | ||
2728 | nesvnic->linkup = 0; | ||
2729 | netif_carrier_off(nesvnic->netdev); | ||
2730 | |||
2731 | spin_lock(&nesvnic->port_ibevent_lock); | ||
2732 | if (nesvnic->of_device_registered) { | ||
2733 | if (nesdev->iw_status == 1) { | ||
2734 | nesdev->iw_status = 0; | ||
2735 | nes_port_ibevent(nesvnic); | ||
2736 | } | ||
2737 | } | ||
2738 | spin_unlock(&nesvnic->port_ibevent_lock); | ||
2739 | } | ||
2740 | } | ||
2741 | } | ||
2742 | if (nesdev->link_recheck++ < NES_LINK_RECHECK_MAX) | ||
2743 | schedule_delayed_work(&nesdev->work, NES_LINK_RECHECK_DELAY); | ||
2744 | else | ||
2745 | nesdev->link_recheck = 0; | ||
2746 | |||
2747 | spin_unlock_irqrestore(&nesadapter->phy_lock, flags); | ||
2748 | } | ||
2646 | 2749 | ||
2647 | 2750 | ||
2648 | static void nes_nic_napi_ce_handler(struct nes_device *nesdev, struct nes_hw_nic_cq *cq) | 2751 | static void nes_nic_napi_ce_handler(struct nes_device *nesdev, struct nes_hw_nic_cq *cq) |
@@ -2782,9 +2885,8 @@ void nes_nic_ce_handler(struct nes_device *nesdev, struct nes_hw_nic_cq *cq) | |||
2782 | if ((cqe_errv & | 2885 | if ((cqe_errv & |
2783 | (NES_NIC_ERRV_BITS_IPV4_CSUM_ERR | NES_NIC_ERRV_BITS_TCPUDP_CSUM_ERR | | 2886 | (NES_NIC_ERRV_BITS_IPV4_CSUM_ERR | NES_NIC_ERRV_BITS_TCPUDP_CSUM_ERR | |
2784 | NES_NIC_ERRV_BITS_IPH_ERR | NES_NIC_ERRV_BITS_WQE_OVERRUN)) == 0) { | 2887 | NES_NIC_ERRV_BITS_IPH_ERR | NES_NIC_ERRV_BITS_WQE_OVERRUN)) == 0) { |
2785 | if (nesvnic->rx_checksum_disabled == 0) { | 2888 | if (nesvnic->netdev->features & NETIF_F_RXCSUM) |
2786 | rx_skb->ip_summed = CHECKSUM_UNNECESSARY; | 2889 | rx_skb->ip_summed = CHECKSUM_UNNECESSARY; |
2787 | } | ||
2788 | } else | 2890 | } else |
2789 | nes_debug(NES_DBG_CQ, "%s: unsuccessfully checksummed TCP or UDP packet." | 2891 | nes_debug(NES_DBG_CQ, "%s: unsuccessfully checksummed TCP or UDP packet." |
2790 | " errv = 0x%X, pkt_type = 0x%X.\n", | 2892 | " errv = 0x%X, pkt_type = 0x%X.\n", |
@@ -2794,7 +2896,7 @@ void nes_nic_ce_handler(struct nes_device *nesdev, struct nes_hw_nic_cq *cq) | |||
2794 | if ((cqe_errv & | 2896 | if ((cqe_errv & |
2795 | (NES_NIC_ERRV_BITS_IPV4_CSUM_ERR | NES_NIC_ERRV_BITS_IPH_ERR | | 2897 | (NES_NIC_ERRV_BITS_IPV4_CSUM_ERR | NES_NIC_ERRV_BITS_IPH_ERR | |
2796 | NES_NIC_ERRV_BITS_WQE_OVERRUN)) == 0) { | 2898 | NES_NIC_ERRV_BITS_WQE_OVERRUN)) == 0) { |
2797 | if (nesvnic->rx_checksum_disabled == 0) { | 2899 | if (nesvnic->netdev->features & NETIF_F_RXCSUM) { |
2798 | rx_skb->ip_summed = CHECKSUM_UNNECESSARY; | 2900 | rx_skb->ip_summed = CHECKSUM_UNNECESSARY; |
2799 | /* nes_debug(NES_DBG_CQ, "%s: Reporting successfully checksummed IPv4 packet.\n", | 2901 | /* nes_debug(NES_DBG_CQ, "%s: Reporting successfully checksummed IPv4 packet.\n", |
2800 | nesvnic->netdev->name); */ | 2902 | nesvnic->netdev->name); */ |
diff --git a/drivers/infiniband/hw/nes/nes_hw.h b/drivers/infiniband/hw/nes/nes_hw.h index 1204c3432b63..91594116f947 100644 --- a/drivers/infiniband/hw/nes/nes_hw.h +++ b/drivers/infiniband/hw/nes/nes_hw.h | |||
@@ -1193,6 +1193,8 @@ struct nes_listener { | |||
1193 | 1193 | ||
1194 | struct nes_ib_device; | 1194 | struct nes_ib_device; |
1195 | 1195 | ||
1196 | #define NES_EVENT_DELAY msecs_to_jiffies(100) | ||
1197 | |||
1196 | struct nes_vnic { | 1198 | struct nes_vnic { |
1197 | struct nes_ib_device *nesibdev; | 1199 | struct nes_ib_device *nesibdev; |
1198 | u64 sq_full; | 1200 | u64 sq_full; |
@@ -1243,10 +1245,13 @@ struct nes_vnic { | |||
1243 | u8 next_qp_nic_index; | 1245 | u8 next_qp_nic_index; |
1244 | u8 of_device_registered; | 1246 | u8 of_device_registered; |
1245 | u8 rdma_enabled; | 1247 | u8 rdma_enabled; |
1246 | u8 rx_checksum_disabled; | ||
1247 | u32 lro_max_aggr; | 1248 | u32 lro_max_aggr; |
1248 | struct net_lro_mgr lro_mgr; | 1249 | struct net_lro_mgr lro_mgr; |
1249 | struct net_lro_desc lro_desc[NES_MAX_LRO_DESCRIPTORS]; | 1250 | struct net_lro_desc lro_desc[NES_MAX_LRO_DESCRIPTORS]; |
1251 | struct timer_list event_timer; | ||
1252 | enum ib_event_type delayed_event; | ||
1253 | enum ib_event_type last_dispatched_event; | ||
1254 | spinlock_t port_ibevent_lock; | ||
1250 | }; | 1255 | }; |
1251 | 1256 | ||
1252 | struct nes_ib_device { | 1257 | struct nes_ib_device { |
@@ -1348,6 +1353,10 @@ struct nes_terminate_hdr { | |||
1348 | #define BAD_FRAME_OFFSET 64 | 1353 | #define BAD_FRAME_OFFSET 64 |
1349 | #define CQE_MAJOR_DRV 0x8000 | 1354 | #define CQE_MAJOR_DRV 0x8000 |
1350 | 1355 | ||
1356 | /* Used for link status recheck after interrupt processing */ | ||
1357 | #define NES_LINK_RECHECK_DELAY msecs_to_jiffies(50) | ||
1358 | #define NES_LINK_RECHECK_MAX 60 | ||
1359 | |||
1351 | #define nes_vlan_rx vlan_hwaccel_receive_skb | 1360 | #define nes_vlan_rx vlan_hwaccel_receive_skb |
1352 | #define nes_netif_rx netif_receive_skb | 1361 | #define nes_netif_rx netif_receive_skb |
1353 | 1362 | ||
diff --git a/drivers/infiniband/hw/nes/nes_nic.c b/drivers/infiniband/hw/nes/nes_nic.c index 10560c796fd6..d3a1c41cfd27 100644 --- a/drivers/infiniband/hw/nes/nes_nic.c +++ b/drivers/infiniband/hw/nes/nes_nic.c | |||
@@ -144,6 +144,7 @@ static int nes_netdev_open(struct net_device *netdev) | |||
144 | u32 nic_active_bit; | 144 | u32 nic_active_bit; |
145 | u32 nic_active; | 145 | u32 nic_active; |
146 | struct list_head *list_pos, *list_temp; | 146 | struct list_head *list_pos, *list_temp; |
147 | unsigned long flags; | ||
147 | 148 | ||
148 | assert(nesdev != NULL); | 149 | assert(nesdev != NULL); |
149 | 150 | ||
@@ -233,18 +234,36 @@ static int nes_netdev_open(struct net_device *netdev) | |||
233 | first_nesvnic = nesvnic; | 234 | first_nesvnic = nesvnic; |
234 | } | 235 | } |
235 | 236 | ||
236 | if (nesvnic->of_device_registered) { | ||
237 | nesdev->iw_status = 1; | ||
238 | nesdev->nesadapter->send_term_ok = 1; | ||
239 | nes_port_ibevent(nesvnic); | ||
240 | } | ||
241 | |||
242 | if (first_nesvnic->linkup) { | 237 | if (first_nesvnic->linkup) { |
243 | /* Enable network packets */ | 238 | /* Enable network packets */ |
244 | nesvnic->linkup = 1; | 239 | nesvnic->linkup = 1; |
245 | netif_start_queue(netdev); | 240 | netif_start_queue(netdev); |
246 | netif_carrier_on(netdev); | 241 | netif_carrier_on(netdev); |
247 | } | 242 | } |
243 | |||
244 | spin_lock_irqsave(&nesdev->nesadapter->phy_lock, flags); | ||
245 | if (nesdev->nesadapter->phy_type[nesdev->mac_index] == NES_PHY_TYPE_SFP_D) { | ||
246 | if (nesdev->link_recheck) | ||
247 | cancel_delayed_work(&nesdev->work); | ||
248 | nesdev->link_recheck = 1; | ||
249 | schedule_delayed_work(&nesdev->work, NES_LINK_RECHECK_DELAY); | ||
250 | } | ||
251 | spin_unlock_irqrestore(&nesdev->nesadapter->phy_lock, flags); | ||
252 | |||
253 | spin_lock_irqsave(&nesvnic->port_ibevent_lock, flags); | ||
254 | if (nesvnic->of_device_registered) { | ||
255 | nesdev->nesadapter->send_term_ok = 1; | ||
256 | if (nesvnic->linkup == 1) { | ||
257 | if (nesdev->iw_status == 0) { | ||
258 | nesdev->iw_status = 1; | ||
259 | nes_port_ibevent(nesvnic); | ||
260 | } | ||
261 | } else { | ||
262 | nesdev->iw_status = 0; | ||
263 | } | ||
264 | } | ||
265 | spin_unlock_irqrestore(&nesvnic->port_ibevent_lock, flags); | ||
266 | |||
248 | napi_enable(&nesvnic->napi); | 267 | napi_enable(&nesvnic->napi); |
249 | nesvnic->netdev_open = 1; | 268 | nesvnic->netdev_open = 1; |
250 | 269 | ||
@@ -263,6 +282,7 @@ static int nes_netdev_stop(struct net_device *netdev) | |||
263 | u32 nic_active; | 282 | u32 nic_active; |
264 | struct nes_vnic *first_nesvnic = NULL; | 283 | struct nes_vnic *first_nesvnic = NULL; |
265 | struct list_head *list_pos, *list_temp; | 284 | struct list_head *list_pos, *list_temp; |
285 | unsigned long flags; | ||
266 | 286 | ||
267 | nes_debug(NES_DBG_SHUTDOWN, "nesvnic=%p, nesdev=%p, netdev=%p %s\n", | 287 | nes_debug(NES_DBG_SHUTDOWN, "nesvnic=%p, nesdev=%p, netdev=%p %s\n", |
268 | nesvnic, nesdev, netdev, netdev->name); | 288 | nesvnic, nesdev, netdev, netdev->name); |
@@ -271,6 +291,7 @@ static int nes_netdev_stop(struct net_device *netdev) | |||
271 | 291 | ||
272 | if (netif_msg_ifdown(nesvnic)) | 292 | if (netif_msg_ifdown(nesvnic)) |
273 | printk(KERN_INFO PFX "%s: disabling interface\n", netdev->name); | 293 | printk(KERN_INFO PFX "%s: disabling interface\n", netdev->name); |
294 | netif_carrier_off(netdev); | ||
274 | 295 | ||
275 | /* Disable network packets */ | 296 | /* Disable network packets */ |
276 | napi_disable(&nesvnic->napi); | 297 | napi_disable(&nesvnic->napi); |
@@ -314,12 +335,17 @@ static int nes_netdev_stop(struct net_device *netdev) | |||
314 | nic_active &= nic_active_mask; | 335 | nic_active &= nic_active_mask; |
315 | nes_write_indexed(nesdev, NES_IDX_NIC_BROADCAST_ON, nic_active); | 336 | nes_write_indexed(nesdev, NES_IDX_NIC_BROADCAST_ON, nic_active); |
316 | 337 | ||
317 | 338 | spin_lock_irqsave(&nesvnic->port_ibevent_lock, flags); | |
318 | if (nesvnic->of_device_registered) { | 339 | if (nesvnic->of_device_registered) { |
319 | nesdev->nesadapter->send_term_ok = 0; | 340 | nesdev->nesadapter->send_term_ok = 0; |
320 | nesdev->iw_status = 0; | 341 | nesdev->iw_status = 0; |
321 | nes_port_ibevent(nesvnic); | 342 | if (nesvnic->linkup == 1) |
343 | nes_port_ibevent(nesvnic); | ||
322 | } | 344 | } |
345 | del_timer_sync(&nesvnic->event_timer); | ||
346 | nesvnic->event_timer.function = NULL; | ||
347 | spin_unlock_irqrestore(&nesvnic->port_ibevent_lock, flags); | ||
348 | |||
323 | nes_destroy_nic_qp(nesvnic); | 349 | nes_destroy_nic_qp(nesvnic); |
324 | 350 | ||
325 | nesvnic->netdev_open = 0; | 351 | nesvnic->netdev_open = 0; |
@@ -876,7 +902,7 @@ static void nes_netdev_set_multicast_list(struct net_device *netdev) | |||
876 | nes_write_indexed(nesdev, NES_IDX_NIC_UNICAST_ALL, nic_active); | 902 | nes_write_indexed(nesdev, NES_IDX_NIC_UNICAST_ALL, nic_active); |
877 | } | 903 | } |
878 | 904 | ||
879 | nes_debug(NES_DBG_NIC_RX, "Number of MC entries = %d, Promiscous = %d, All Multicast = %d.\n", | 905 | nes_debug(NES_DBG_NIC_RX, "Number of MC entries = %d, Promiscuous = %d, All Multicast = %d.\n", |
880 | mc_count, !!(netdev->flags & IFF_PROMISC), | 906 | mc_count, !!(netdev->flags & IFF_PROMISC), |
881 | !!(netdev->flags & IFF_ALLMULTI)); | 907 | !!(netdev->flags & IFF_ALLMULTI)); |
882 | if (!mc_all_on) { | 908 | if (!mc_all_on) { |
@@ -907,8 +933,8 @@ static void nes_netdev_set_multicast_list(struct net_device *netdev) | |||
907 | nesvnic->nic_index && | 933 | nesvnic->nic_index && |
908 | mc_index < max_pft_entries_avaiable) { | 934 | mc_index < max_pft_entries_avaiable) { |
909 | nes_debug(NES_DBG_NIC_RX, | 935 | nes_debug(NES_DBG_NIC_RX, |
910 | "mc_index=%d skipping nic_index=%d,\ | 936 | "mc_index=%d skipping nic_index=%d, " |
911 | used for=%d \n", mc_index, | 937 | "used for=%d \n", mc_index, |
912 | nesvnic->nic_index, | 938 | nesvnic->nic_index, |
913 | nesadapter->pft_mcast_map[mc_index]); | 939 | nesadapter->pft_mcast_map[mc_index]); |
914 | mc_index++; | 940 | mc_index++; |
@@ -1067,34 +1093,6 @@ static const char nes_ethtool_stringset[][ETH_GSTRING_LEN] = { | |||
1067 | }; | 1093 | }; |
1068 | #define NES_ETHTOOL_STAT_COUNT ARRAY_SIZE(nes_ethtool_stringset) | 1094 | #define NES_ETHTOOL_STAT_COUNT ARRAY_SIZE(nes_ethtool_stringset) |
1069 | 1095 | ||
1070 | /** | ||
1071 | * nes_netdev_get_rx_csum | ||
1072 | */ | ||
1073 | static u32 nes_netdev_get_rx_csum (struct net_device *netdev) | ||
1074 | { | ||
1075 | struct nes_vnic *nesvnic = netdev_priv(netdev); | ||
1076 | |||
1077 | if (nesvnic->rx_checksum_disabled) | ||
1078 | return 0; | ||
1079 | else | ||
1080 | return 1; | ||
1081 | } | ||
1082 | |||
1083 | |||
1084 | /** | ||
1085 | * nes_netdev_set_rc_csum | ||
1086 | */ | ||
1087 | static int nes_netdev_set_rx_csum(struct net_device *netdev, u32 enable) | ||
1088 | { | ||
1089 | struct nes_vnic *nesvnic = netdev_priv(netdev); | ||
1090 | |||
1091 | if (enable) | ||
1092 | nesvnic->rx_checksum_disabled = 0; | ||
1093 | else | ||
1094 | nesvnic->rx_checksum_disabled = 1; | ||
1095 | return 0; | ||
1096 | } | ||
1097 | |||
1098 | 1096 | ||
1099 | /** | 1097 | /** |
1100 | * nes_netdev_get_sset_count | 1098 | * nes_netdev_get_sset_count |
@@ -1495,7 +1493,7 @@ static int nes_netdev_get_settings(struct net_device *netdev, struct ethtool_cmd | |||
1495 | et_cmd->maxrxpkt = 511; | 1493 | et_cmd->maxrxpkt = 511; |
1496 | 1494 | ||
1497 | if (nesadapter->OneG_Mode) { | 1495 | if (nesadapter->OneG_Mode) { |
1498 | et_cmd->speed = SPEED_1000; | 1496 | ethtool_cmd_speed_set(et_cmd, SPEED_1000); |
1499 | if (phy_type == NES_PHY_TYPE_PUMA_1G) { | 1497 | if (phy_type == NES_PHY_TYPE_PUMA_1G) { |
1500 | et_cmd->supported = SUPPORTED_1000baseT_Full; | 1498 | et_cmd->supported = SUPPORTED_1000baseT_Full; |
1501 | et_cmd->advertising = ADVERTISED_1000baseT_Full; | 1499 | et_cmd->advertising = ADVERTISED_1000baseT_Full; |
@@ -1534,7 +1532,7 @@ static int nes_netdev_get_settings(struct net_device *netdev, struct ethtool_cmd | |||
1534 | et_cmd->advertising = ADVERTISED_10000baseT_Full; | 1532 | et_cmd->advertising = ADVERTISED_10000baseT_Full; |
1535 | et_cmd->phy_address = mac_index; | 1533 | et_cmd->phy_address = mac_index; |
1536 | } | 1534 | } |
1537 | et_cmd->speed = SPEED_10000; | 1535 | ethtool_cmd_speed_set(et_cmd, SPEED_10000); |
1538 | et_cmd->autoneg = AUTONEG_DISABLE; | 1536 | et_cmd->autoneg = AUTONEG_DISABLE; |
1539 | return 0; | 1537 | return 0; |
1540 | } | 1538 | } |
@@ -1572,19 +1570,10 @@ static int nes_netdev_set_settings(struct net_device *netdev, struct ethtool_cmd | |||
1572 | } | 1570 | } |
1573 | 1571 | ||
1574 | 1572 | ||
1575 | static int nes_netdev_set_flags(struct net_device *netdev, u32 flags) | ||
1576 | { | ||
1577 | return ethtool_op_set_flags(netdev, flags, ETH_FLAG_LRO); | ||
1578 | } | ||
1579 | |||
1580 | |||
1581 | static const struct ethtool_ops nes_ethtool_ops = { | 1573 | static const struct ethtool_ops nes_ethtool_ops = { |
1582 | .get_link = ethtool_op_get_link, | 1574 | .get_link = ethtool_op_get_link, |
1583 | .get_settings = nes_netdev_get_settings, | 1575 | .get_settings = nes_netdev_get_settings, |
1584 | .set_settings = nes_netdev_set_settings, | 1576 | .set_settings = nes_netdev_set_settings, |
1585 | .get_tx_csum = ethtool_op_get_tx_csum, | ||
1586 | .get_rx_csum = nes_netdev_get_rx_csum, | ||
1587 | .get_sg = ethtool_op_get_sg, | ||
1588 | .get_strings = nes_netdev_get_strings, | 1577 | .get_strings = nes_netdev_get_strings, |
1589 | .get_sset_count = nes_netdev_get_sset_count, | 1578 | .get_sset_count = nes_netdev_get_sset_count, |
1590 | .get_ethtool_stats = nes_netdev_get_ethtool_stats, | 1579 | .get_ethtool_stats = nes_netdev_get_ethtool_stats, |
@@ -1593,13 +1582,6 @@ static const struct ethtool_ops nes_ethtool_ops = { | |||
1593 | .set_coalesce = nes_netdev_set_coalesce, | 1582 | .set_coalesce = nes_netdev_set_coalesce, |
1594 | .get_pauseparam = nes_netdev_get_pauseparam, | 1583 | .get_pauseparam = nes_netdev_get_pauseparam, |
1595 | .set_pauseparam = nes_netdev_set_pauseparam, | 1584 | .set_pauseparam = nes_netdev_set_pauseparam, |
1596 | .set_tx_csum = ethtool_op_set_tx_csum, | ||
1597 | .set_rx_csum = nes_netdev_set_rx_csum, | ||
1598 | .set_sg = ethtool_op_set_sg, | ||
1599 | .get_tso = ethtool_op_get_tso, | ||
1600 | .set_tso = ethtool_op_set_tso, | ||
1601 | .get_flags = ethtool_op_get_flags, | ||
1602 | .set_flags = nes_netdev_set_flags, | ||
1603 | }; | 1585 | }; |
1604 | 1586 | ||
1605 | 1587 | ||
@@ -1701,12 +1683,11 @@ struct net_device *nes_netdev_init(struct nes_device *nesdev, | |||
1701 | netdev->dev_addr[5] = (u8)u64temp; | 1683 | netdev->dev_addr[5] = (u8)u64temp; |
1702 | memcpy(netdev->perm_addr, netdev->dev_addr, 6); | 1684 | memcpy(netdev->perm_addr, netdev->dev_addr, 6); |
1703 | 1685 | ||
1704 | if ((nesvnic->logical_port < 2) || (nesdev->nesadapter->hw_rev != NE020_REV)) { | 1686 | netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_IP_CSUM; |
1705 | netdev->features |= NETIF_F_TSO | NETIF_F_SG | NETIF_F_IP_CSUM; | 1687 | if ((nesvnic->logical_port < 2) || (nesdev->nesadapter->hw_rev != NE020_REV)) |
1706 | netdev->features |= NETIF_F_GSO | NETIF_F_TSO | NETIF_F_SG | NETIF_F_IP_CSUM; | 1688 | netdev->hw_features |= NETIF_F_TSO; |
1707 | } else { | 1689 | netdev->features |= netdev->hw_features; |
1708 | netdev->features |= NETIF_F_SG | NETIF_F_IP_CSUM; | 1690 | netdev->hw_features |= NETIF_F_LRO; |
1709 | } | ||
1710 | 1691 | ||
1711 | nes_debug(NES_DBG_INIT, "nesvnic = %p, reported features = 0x%lX, QPid = %d," | 1692 | nes_debug(NES_DBG_INIT, "nesvnic = %p, reported features = 0x%lX, QPid = %d," |
1712 | " nic_index = %d, logical_port = %d, mac_index = %d.\n", | 1693 | " nic_index = %d, logical_port = %d, mac_index = %d.\n", |
@@ -1749,7 +1730,10 @@ struct net_device *nes_netdev_init(struct nes_device *nesdev, | |||
1749 | nesvnic->rdma_enabled = 0; | 1730 | nesvnic->rdma_enabled = 0; |
1750 | } | 1731 | } |
1751 | nesvnic->nic_cq.cq_number = nesvnic->nic.qp_id; | 1732 | nesvnic->nic_cq.cq_number = nesvnic->nic.qp_id; |
1733 | init_timer(&nesvnic->event_timer); | ||
1734 | nesvnic->event_timer.function = NULL; | ||
1752 | spin_lock_init(&nesvnic->tx_lock); | 1735 | spin_lock_init(&nesvnic->tx_lock); |
1736 | spin_lock_init(&nesvnic->port_ibevent_lock); | ||
1753 | nesdev->netdev[nesdev->netdev_count] = netdev; | 1737 | nesdev->netdev[nesdev->netdev_count] = netdev; |
1754 | 1738 | ||
1755 | nes_debug(NES_DBG_INIT, "Adding nesvnic (%p) to the adapters nesvnic_list for MAC%d.\n", | 1739 | nes_debug(NES_DBG_INIT, "Adding nesvnic (%p) to the adapters nesvnic_list for MAC%d.\n", |
@@ -1762,8 +1746,11 @@ struct net_device *nes_netdev_init(struct nes_device *nesdev, | |||
1762 | (((PCI_FUNC(nesdev->pcidev->devfn) == 1) && (nesdev->mac_index == 2)) || | 1746 | (((PCI_FUNC(nesdev->pcidev->devfn) == 1) && (nesdev->mac_index == 2)) || |
1763 | ((PCI_FUNC(nesdev->pcidev->devfn) == 2) && (nesdev->mac_index == 1)))))) { | 1747 | ((PCI_FUNC(nesdev->pcidev->devfn) == 2) && (nesdev->mac_index == 1)))))) { |
1764 | u32 u32temp; | 1748 | u32 u32temp; |
1765 | u32 link_mask; | 1749 | u32 link_mask = 0; |
1766 | u32 link_val; | 1750 | u32 link_val = 0; |
1751 | u16 temp_phy_data; | ||
1752 | u16 phy_data = 0; | ||
1753 | unsigned long flags; | ||
1767 | 1754 | ||
1768 | u32temp = nes_read_indexed(nesdev, NES_IDX_PHY_PCS_CONTROL_STATUS0 + | 1755 | u32temp = nes_read_indexed(nesdev, NES_IDX_PHY_PCS_CONTROL_STATUS0 + |
1769 | (0x200 * (nesdev->mac_index & 1))); | 1756 | (0x200 * (nesdev->mac_index & 1))); |
@@ -1785,6 +1772,23 @@ struct net_device *nes_netdev_init(struct nes_device *nesdev, | |||
1785 | link_val = 0x02020000; | 1772 | link_val = 0x02020000; |
1786 | } | 1773 | } |
1787 | break; | 1774 | break; |
1775 | case NES_PHY_TYPE_SFP_D: | ||
1776 | spin_lock_irqsave(&nesdev->nesadapter->phy_lock, flags); | ||
1777 | nes_read_10G_phy_reg(nesdev, | ||
1778 | nesdev->nesadapter->phy_index[nesdev->mac_index], | ||
1779 | 1, 0x9003); | ||
1780 | temp_phy_data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL); | ||
1781 | nes_read_10G_phy_reg(nesdev, | ||
1782 | nesdev->nesadapter->phy_index[nesdev->mac_index], | ||
1783 | 3, 0x0021); | ||
1784 | nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL); | ||
1785 | nes_read_10G_phy_reg(nesdev, | ||
1786 | nesdev->nesadapter->phy_index[nesdev->mac_index], | ||
1787 | 3, 0x0021); | ||
1788 | phy_data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL); | ||
1789 | spin_unlock_irqrestore(&nesdev->nesadapter->phy_lock, flags); | ||
1790 | phy_data = (!temp_phy_data && (phy_data == 0x8000)) ? 0x4 : 0x0; | ||
1791 | break; | ||
1788 | default: | 1792 | default: |
1789 | link_mask = 0x0f1f0000; | 1793 | link_mask = 0x0f1f0000; |
1790 | link_val = 0x0f0f0000; | 1794 | link_val = 0x0f0f0000; |
@@ -1794,8 +1798,14 @@ struct net_device *nes_netdev_init(struct nes_device *nesdev, | |||
1794 | u32temp = nes_read_indexed(nesdev, | 1798 | u32temp = nes_read_indexed(nesdev, |
1795 | NES_IDX_PHY_PCS_CONTROL_STATUS0 + | 1799 | NES_IDX_PHY_PCS_CONTROL_STATUS0 + |
1796 | (0x200 * (nesdev->mac_index & 1))); | 1800 | (0x200 * (nesdev->mac_index & 1))); |
1797 | if ((u32temp & link_mask) == link_val) | 1801 | |
1798 | nesvnic->linkup = 1; | 1802 | if (phy_type == NES_PHY_TYPE_SFP_D) { |
1803 | if (phy_data & 0x0004) | ||
1804 | nesvnic->linkup = 1; | ||
1805 | } else { | ||
1806 | if ((u32temp & link_mask) == link_val) | ||
1807 | nesvnic->linkup = 1; | ||
1808 | } | ||
1799 | 1809 | ||
1800 | /* clear the MAC interrupt status, assumes direct logical to physical mapping */ | 1810 | /* clear the MAC interrupt status, assumes direct logical to physical mapping */ |
1801 | u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS + (0x200 * nesdev->mac_index)); | 1811 | u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS + (0x200 * nesdev->mac_index)); |
diff --git a/drivers/infiniband/hw/nes/nes_verbs.c b/drivers/infiniband/hw/nes/nes_verbs.c index 9046e6675686..95ca93ceedac 100644 --- a/drivers/infiniband/hw/nes/nes_verbs.c +++ b/drivers/infiniband/hw/nes/nes_verbs.c | |||
@@ -476,9 +476,9 @@ static struct ib_fast_reg_page_list *nes_alloc_fast_reg_page_list( | |||
476 | } | 476 | } |
477 | nes_debug(NES_DBG_MR, "nes_alloc_fast_reg_pbl: nes_frpl = %p, " | 477 | nes_debug(NES_DBG_MR, "nes_alloc_fast_reg_pbl: nes_frpl = %p, " |
478 | "ibfrpl = %p, ibfrpl.page_list = %p, pbl.kva = %p, " | 478 | "ibfrpl = %p, ibfrpl.page_list = %p, pbl.kva = %p, " |
479 | "pbl.paddr= %p\n", pnesfrpl, &pnesfrpl->ibfrpl, | 479 | "pbl.paddr = %llx\n", pnesfrpl, &pnesfrpl->ibfrpl, |
480 | pnesfrpl->ibfrpl.page_list, pnesfrpl->nes_wqe_pbl.kva, | 480 | pnesfrpl->ibfrpl.page_list, pnesfrpl->nes_wqe_pbl.kva, |
481 | (void *)pnesfrpl->nes_wqe_pbl.paddr); | 481 | (unsigned long long) pnesfrpl->nes_wqe_pbl.paddr); |
482 | 482 | ||
483 | return pifrpl; | 483 | return pifrpl; |
484 | } | 484 | } |
@@ -584,7 +584,9 @@ static int nes_query_port(struct ib_device *ibdev, u8 port, struct ib_port_attr | |||
584 | props->lmc = 0; | 584 | props->lmc = 0; |
585 | props->sm_lid = 0; | 585 | props->sm_lid = 0; |
586 | props->sm_sl = 0; | 586 | props->sm_sl = 0; |
587 | if (nesvnic->linkup) | 587 | if (netif_queue_stopped(netdev)) |
588 | props->state = IB_PORT_DOWN; | ||
589 | else if (nesvnic->linkup) | ||
588 | props->state = IB_PORT_ACTIVE; | 590 | props->state = IB_PORT_ACTIVE; |
589 | else | 591 | else |
590 | props->state = IB_PORT_DOWN; | 592 | props->state = IB_PORT_DOWN; |
@@ -785,7 +787,7 @@ static struct ib_pd *nes_alloc_pd(struct ib_device *ibdev, | |||
785 | 787 | ||
786 | nes_debug(NES_DBG_PD, "nesvnic=%p, netdev=%p %s, ibdev=%p, context=%p, netdev refcnt=%u\n", | 788 | nes_debug(NES_DBG_PD, "nesvnic=%p, netdev=%p %s, ibdev=%p, context=%p, netdev refcnt=%u\n", |
787 | nesvnic, nesdev->netdev[0], nesdev->netdev[0]->name, ibdev, context, | 789 | nesvnic, nesdev->netdev[0], nesdev->netdev[0]->name, ibdev, context, |
788 | atomic_read(&nesvnic->netdev->refcnt)); | 790 | netdev_refcnt_read(nesvnic->netdev)); |
789 | 791 | ||
790 | err = nes_alloc_resource(nesadapter, nesadapter->allocated_pds, | 792 | err = nes_alloc_resource(nesadapter, nesadapter->allocated_pds, |
791 | nesadapter->max_pd, &pd_num, &nesadapter->next_pd); | 793 | nesadapter->max_pd, &pd_num, &nesadapter->next_pd); |
@@ -1416,7 +1418,7 @@ static struct ib_qp *nes_create_qp(struct ib_pd *ibpd, | |||
1416 | /* update the QP table */ | 1418 | /* update the QP table */ |
1417 | nesdev->nesadapter->qp_table[nesqp->hwqp.qp_id-NES_FIRST_QPN] = nesqp; | 1419 | nesdev->nesadapter->qp_table[nesqp->hwqp.qp_id-NES_FIRST_QPN] = nesqp; |
1418 | nes_debug(NES_DBG_QP, "netdev refcnt=%u\n", | 1420 | nes_debug(NES_DBG_QP, "netdev refcnt=%u\n", |
1419 | atomic_read(&nesvnic->netdev->refcnt)); | 1421 | netdev_refcnt_read(nesvnic->netdev)); |
1420 | 1422 | ||
1421 | return &nesqp->ibqp; | 1423 | return &nesqp->ibqp; |
1422 | } | 1424 | } |
@@ -1482,7 +1484,7 @@ static int nes_destroy_qp(struct ib_qp *ibqp) | |||
1482 | (nesqp->ibqp_state == IB_QPS_RTR)) && (nesqp->cm_id)) { | 1484 | (nesqp->ibqp_state == IB_QPS_RTR)) && (nesqp->cm_id)) { |
1483 | cm_id = nesqp->cm_id; | 1485 | cm_id = nesqp->cm_id; |
1484 | cm_event.event = IW_CM_EVENT_CONNECT_REPLY; | 1486 | cm_event.event = IW_CM_EVENT_CONNECT_REPLY; |
1485 | cm_event.status = IW_CM_EVENT_STATUS_TIMEOUT; | 1487 | cm_event.status = -ETIMEDOUT; |
1486 | cm_event.local_addr = cm_id->local_addr; | 1488 | cm_event.local_addr = cm_id->local_addr; |
1487 | cm_event.remote_addr = cm_id->remote_addr; | 1489 | cm_event.remote_addr = cm_id->remote_addr; |
1488 | cm_event.private_data = NULL; | 1490 | cm_event.private_data = NULL; |
@@ -3483,13 +3485,13 @@ static int nes_post_send(struct ib_qp *ibqp, struct ib_send_wr *ib_wr, | |||
3483 | for (i = 0; i < ib_wr->wr.fast_reg.page_list_len; i++) | 3485 | for (i = 0; i < ib_wr->wr.fast_reg.page_list_len; i++) |
3484 | dst_page_list[i] = cpu_to_le64(src_page_list[i]); | 3486 | dst_page_list[i] = cpu_to_le64(src_page_list[i]); |
3485 | 3487 | ||
3486 | nes_debug(NES_DBG_IW_TX, "SQ_FMR: iova_start: %p, " | 3488 | nes_debug(NES_DBG_IW_TX, "SQ_FMR: iova_start: %llx, " |
3487 | "length: %d, rkey: %0x, pgl_paddr: %p, " | 3489 | "length: %d, rkey: %0x, pgl_paddr: %llx, " |
3488 | "page_list_len: %u, wqe_misc: %x\n", | 3490 | "page_list_len: %u, wqe_misc: %x\n", |
3489 | (void *)ib_wr->wr.fast_reg.iova_start, | 3491 | (unsigned long long) ib_wr->wr.fast_reg.iova_start, |
3490 | ib_wr->wr.fast_reg.length, | 3492 | ib_wr->wr.fast_reg.length, |
3491 | ib_wr->wr.fast_reg.rkey, | 3493 | ib_wr->wr.fast_reg.rkey, |
3492 | (void *)pnesfrpl->nes_wqe_pbl.paddr, | 3494 | (unsigned long long) pnesfrpl->nes_wqe_pbl.paddr, |
3493 | ib_wr->wr.fast_reg.page_list_len, | 3495 | ib_wr->wr.fast_reg.page_list_len, |
3494 | wqe_misc); | 3496 | wqe_misc); |
3495 | break; | 3497 | break; |
@@ -3934,6 +3936,30 @@ struct nes_ib_device *nes_init_ofa_device(struct net_device *netdev) | |||
3934 | return nesibdev; | 3936 | return nesibdev; |
3935 | } | 3937 | } |
3936 | 3938 | ||
3939 | |||
3940 | /** | ||
3941 | * nes_handle_delayed_event | ||
3942 | */ | ||
3943 | static void nes_handle_delayed_event(unsigned long data) | ||
3944 | { | ||
3945 | struct nes_vnic *nesvnic = (void *) data; | ||
3946 | |||
3947 | if (nesvnic->delayed_event != nesvnic->last_dispatched_event) { | ||
3948 | struct ib_event event; | ||
3949 | |||
3950 | event.device = &nesvnic->nesibdev->ibdev; | ||
3951 | if (!event.device) | ||
3952 | goto stop_timer; | ||
3953 | event.event = nesvnic->delayed_event; | ||
3954 | event.element.port_num = nesvnic->logical_port + 1; | ||
3955 | ib_dispatch_event(&event); | ||
3956 | } | ||
3957 | |||
3958 | stop_timer: | ||
3959 | nesvnic->event_timer.function = NULL; | ||
3960 | } | ||
3961 | |||
3962 | |||
3937 | void nes_port_ibevent(struct nes_vnic *nesvnic) | 3963 | void nes_port_ibevent(struct nes_vnic *nesvnic) |
3938 | { | 3964 | { |
3939 | struct nes_ib_device *nesibdev = nesvnic->nesibdev; | 3965 | struct nes_ib_device *nesibdev = nesvnic->nesibdev; |
@@ -3942,7 +3968,18 @@ void nes_port_ibevent(struct nes_vnic *nesvnic) | |||
3942 | event.device = &nesibdev->ibdev; | 3968 | event.device = &nesibdev->ibdev; |
3943 | event.element.port_num = nesvnic->logical_port + 1; | 3969 | event.element.port_num = nesvnic->logical_port + 1; |
3944 | event.event = nesdev->iw_status ? IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR; | 3970 | event.event = nesdev->iw_status ? IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR; |
3945 | ib_dispatch_event(&event); | 3971 | |
3972 | if (!nesvnic->event_timer.function) { | ||
3973 | ib_dispatch_event(&event); | ||
3974 | nesvnic->last_dispatched_event = event.event; | ||
3975 | nesvnic->event_timer.function = nes_handle_delayed_event; | ||
3976 | nesvnic->event_timer.data = (unsigned long) nesvnic; | ||
3977 | nesvnic->event_timer.expires = jiffies + NES_EVENT_DELAY; | ||
3978 | add_timer(&nesvnic->event_timer); | ||
3979 | } else { | ||
3980 | mod_timer(&nesvnic->event_timer, jiffies + NES_EVENT_DELAY); | ||
3981 | } | ||
3982 | nesvnic->delayed_event = event.event; | ||
3946 | } | 3983 | } |
3947 | 3984 | ||
3948 | 3985 | ||
diff --git a/drivers/infiniband/hw/qib/Kconfig b/drivers/infiniband/hw/qib/Kconfig index 7c03a70c55a2..8349f9c5064c 100644 --- a/drivers/infiniband/hw/qib/Kconfig +++ b/drivers/infiniband/hw/qib/Kconfig | |||
@@ -1,6 +1,6 @@ | |||
1 | config INFINIBAND_QIB | 1 | config INFINIBAND_QIB |
2 | tristate "QLogic PCIe HCA support" | 2 | tristate "QLogic PCIe HCA support" |
3 | depends on 64BIT && NET | 3 | depends on 64BIT |
4 | ---help--- | 4 | ---help--- |
5 | This is a low-level driver for QLogic PCIe QLE InfiniBand host | 5 | This is a low-level driver for QLogic PCIe QLE InfiniBand host |
6 | channel adapters. This driver does not support the QLogic | 6 | channel adapters. This driver does not support the QLogic |
diff --git a/drivers/infiniband/hw/qib/qib.h b/drivers/infiniband/hw/qib/qib.h index 61de0654820e..769a1d9da4b7 100644 --- a/drivers/infiniband/hw/qib/qib.h +++ b/drivers/infiniband/hw/qib/qib.h | |||
@@ -653,7 +653,7 @@ struct diag_observer_list_elt; | |||
653 | 653 | ||
654 | /* device data struct now contains only "general per-device" info. | 654 | /* device data struct now contains only "general per-device" info. |
655 | * fields related to a physical IB port are in a qib_pportdata struct, | 655 | * fields related to a physical IB port are in a qib_pportdata struct, |
656 | * described above) while fields only used by a particualr chip-type are in | 656 | * described above) while fields only used by a particular chip-type are in |
657 | * a qib_chipdata struct, whose contents are opaque to this file. | 657 | * a qib_chipdata struct, whose contents are opaque to this file. |
658 | */ | 658 | */ |
659 | struct qib_devdata { | 659 | struct qib_devdata { |
@@ -766,7 +766,7 @@ struct qib_devdata { | |||
766 | void (*f_sdma_hw_start_up)(struct qib_pportdata *); | 766 | void (*f_sdma_hw_start_up)(struct qib_pportdata *); |
767 | void (*f_sdma_init_early)(struct qib_pportdata *); | 767 | void (*f_sdma_init_early)(struct qib_pportdata *); |
768 | void (*f_set_cntr_sample)(struct qib_pportdata *, u32, u32); | 768 | void (*f_set_cntr_sample)(struct qib_pportdata *, u32, u32); |
769 | void (*f_update_usrhead)(struct qib_ctxtdata *, u64, u32, u32); | 769 | void (*f_update_usrhead)(struct qib_ctxtdata *, u64, u32, u32, u32); |
770 | u32 (*f_hdrqempty)(struct qib_ctxtdata *); | 770 | u32 (*f_hdrqempty)(struct qib_ctxtdata *); |
771 | u64 (*f_portcntr)(struct qib_pportdata *, u32); | 771 | u64 (*f_portcntr)(struct qib_pportdata *, u32); |
772 | u32 (*f_read_cntrs)(struct qib_devdata *, loff_t, char **, | 772 | u32 (*f_read_cntrs)(struct qib_devdata *, loff_t, char **, |
@@ -1406,7 +1406,7 @@ extern struct mutex qib_mutex; | |||
1406 | */ | 1406 | */ |
1407 | #define qib_early_err(dev, fmt, ...) \ | 1407 | #define qib_early_err(dev, fmt, ...) \ |
1408 | do { \ | 1408 | do { \ |
1409 | dev_info(dev, KERN_ERR QIB_DRV_NAME ": " fmt, ##__VA_ARGS__); \ | 1409 | dev_err(dev, fmt, ##__VA_ARGS__); \ |
1410 | } while (0) | 1410 | } while (0) |
1411 | 1411 | ||
1412 | #define qib_dev_err(dd, fmt, ...) \ | 1412 | #define qib_dev_err(dd, fmt, ...) \ |
diff --git a/drivers/infiniband/hw/qib/qib_cq.c b/drivers/infiniband/hw/qib/qib_cq.c index a86cbf880f98..5246aa486bbe 100644 --- a/drivers/infiniband/hw/qib/qib_cq.c +++ b/drivers/infiniband/hw/qib/qib_cq.c | |||
@@ -100,7 +100,8 @@ void qib_cq_enter(struct qib_cq *cq, struct ib_wc *entry, int solicited) | |||
100 | wc->head = next; | 100 | wc->head = next; |
101 | 101 | ||
102 | if (cq->notify == IB_CQ_NEXT_COMP || | 102 | if (cq->notify == IB_CQ_NEXT_COMP || |
103 | (cq->notify == IB_CQ_SOLICITED && solicited)) { | 103 | (cq->notify == IB_CQ_SOLICITED && |
104 | (solicited || entry->status != IB_WC_SUCCESS))) { | ||
104 | cq->notify = IB_CQ_NONE; | 105 | cq->notify = IB_CQ_NONE; |
105 | cq->triggered++; | 106 | cq->triggered++; |
106 | /* | 107 | /* |
diff --git a/drivers/infiniband/hw/qib/qib_diag.c b/drivers/infiniband/hw/qib/qib_diag.c index 05dcf0d9a7d3..204c4dd9dce0 100644 --- a/drivers/infiniband/hw/qib/qib_diag.c +++ b/drivers/infiniband/hw/qib/qib_diag.c | |||
@@ -136,7 +136,8 @@ static const struct file_operations diag_file_ops = { | |||
136 | .write = qib_diag_write, | 136 | .write = qib_diag_write, |
137 | .read = qib_diag_read, | 137 | .read = qib_diag_read, |
138 | .open = qib_diag_open, | 138 | .open = qib_diag_open, |
139 | .release = qib_diag_release | 139 | .release = qib_diag_release, |
140 | .llseek = default_llseek, | ||
140 | }; | 141 | }; |
141 | 142 | ||
142 | static atomic_t diagpkt_count = ATOMIC_INIT(0); | 143 | static atomic_t diagpkt_count = ATOMIC_INIT(0); |
@@ -149,6 +150,7 @@ static ssize_t qib_diagpkt_write(struct file *fp, const char __user *data, | |||
149 | static const struct file_operations diagpkt_file_ops = { | 150 | static const struct file_operations diagpkt_file_ops = { |
150 | .owner = THIS_MODULE, | 151 | .owner = THIS_MODULE, |
151 | .write = qib_diagpkt_write, | 152 | .write = qib_diagpkt_write, |
153 | .llseek = noop_llseek, | ||
152 | }; | 154 | }; |
153 | 155 | ||
154 | int qib_diag_add(struct qib_devdata *dd) | 156 | int qib_diag_add(struct qib_devdata *dd) |
diff --git a/drivers/infiniband/hw/qib/qib_driver.c b/drivers/infiniband/hw/qib/qib_driver.c index 9cd193603fb1..23e584f4c36c 100644 --- a/drivers/infiniband/hw/qib/qib_driver.c +++ b/drivers/infiniband/hw/qib/qib_driver.c | |||
@@ -71,6 +71,11 @@ MODULE_DESCRIPTION("QLogic IB driver"); | |||
71 | */ | 71 | */ |
72 | #define QIB_PIO_MAXIBHDR 128 | 72 | #define QIB_PIO_MAXIBHDR 128 |
73 | 73 | ||
74 | /* | ||
75 | * QIB_MAX_PKT_RCV is the max # if packets processed per receive interrupt. | ||
76 | */ | ||
77 | #define QIB_MAX_PKT_RECV 64 | ||
78 | |||
74 | struct qlogic_ib_stats qib_stats; | 79 | struct qlogic_ib_stats qib_stats; |
75 | 80 | ||
76 | const char *qib_get_unit_name(int unit) | 81 | const char *qib_get_unit_name(int unit) |
@@ -284,14 +289,147 @@ static inline void *qib_get_egrbuf(const struct qib_ctxtdata *rcd, u32 etail) | |||
284 | * Returns 1 if error was a CRC, else 0. | 289 | * Returns 1 if error was a CRC, else 0. |
285 | * Needed for some chip's synthesized error counters. | 290 | * Needed for some chip's synthesized error counters. |
286 | */ | 291 | */ |
287 | static u32 qib_rcv_hdrerr(struct qib_pportdata *ppd, u32 ctxt, | 292 | static u32 qib_rcv_hdrerr(struct qib_ctxtdata *rcd, struct qib_pportdata *ppd, |
288 | u32 eflags, u32 l, u32 etail, __le32 *rhf_addr, | 293 | u32 ctxt, u32 eflags, u32 l, u32 etail, |
289 | struct qib_message_header *hdr) | 294 | __le32 *rhf_addr, struct qib_message_header *rhdr) |
290 | { | 295 | { |
291 | u32 ret = 0; | 296 | u32 ret = 0; |
292 | 297 | ||
293 | if (eflags & (QLOGIC_IB_RHF_H_ICRCERR | QLOGIC_IB_RHF_H_VCRCERR)) | 298 | if (eflags & (QLOGIC_IB_RHF_H_ICRCERR | QLOGIC_IB_RHF_H_VCRCERR)) |
294 | ret = 1; | 299 | ret = 1; |
300 | else if (eflags == QLOGIC_IB_RHF_H_TIDERR) { | ||
301 | /* For TIDERR and RC QPs premptively schedule a NAK */ | ||
302 | struct qib_ib_header *hdr = (struct qib_ib_header *) rhdr; | ||
303 | struct qib_other_headers *ohdr = NULL; | ||
304 | struct qib_ibport *ibp = &ppd->ibport_data; | ||
305 | struct qib_qp *qp = NULL; | ||
306 | u32 tlen = qib_hdrget_length_in_bytes(rhf_addr); | ||
307 | u16 lid = be16_to_cpu(hdr->lrh[1]); | ||
308 | int lnh = be16_to_cpu(hdr->lrh[0]) & 3; | ||
309 | u32 qp_num; | ||
310 | u32 opcode; | ||
311 | u32 psn; | ||
312 | int diff; | ||
313 | unsigned long flags; | ||
314 | |||
315 | /* Sanity check packet */ | ||
316 | if (tlen < 24) | ||
317 | goto drop; | ||
318 | |||
319 | if (lid < QIB_MULTICAST_LID_BASE) { | ||
320 | lid &= ~((1 << ppd->lmc) - 1); | ||
321 | if (unlikely(lid != ppd->lid)) | ||
322 | goto drop; | ||
323 | } | ||
324 | |||
325 | /* Check for GRH */ | ||
326 | if (lnh == QIB_LRH_BTH) | ||
327 | ohdr = &hdr->u.oth; | ||
328 | else if (lnh == QIB_LRH_GRH) { | ||
329 | u32 vtf; | ||
330 | |||
331 | ohdr = &hdr->u.l.oth; | ||
332 | if (hdr->u.l.grh.next_hdr != IB_GRH_NEXT_HDR) | ||
333 | goto drop; | ||
334 | vtf = be32_to_cpu(hdr->u.l.grh.version_tclass_flow); | ||
335 | if ((vtf >> IB_GRH_VERSION_SHIFT) != IB_GRH_VERSION) | ||
336 | goto drop; | ||
337 | } else | ||
338 | goto drop; | ||
339 | |||
340 | /* Get opcode and PSN from packet */ | ||
341 | opcode = be32_to_cpu(ohdr->bth[0]); | ||
342 | opcode >>= 24; | ||
343 | psn = be32_to_cpu(ohdr->bth[2]); | ||
344 | |||
345 | /* Get the destination QP number. */ | ||
346 | qp_num = be32_to_cpu(ohdr->bth[1]) & QIB_QPN_MASK; | ||
347 | if (qp_num != QIB_MULTICAST_QPN) { | ||
348 | int ruc_res; | ||
349 | qp = qib_lookup_qpn(ibp, qp_num); | ||
350 | if (!qp) | ||
351 | goto drop; | ||
352 | |||
353 | /* | ||
354 | * Handle only RC QPs - for other QP types drop error | ||
355 | * packet. | ||
356 | */ | ||
357 | spin_lock(&qp->r_lock); | ||
358 | |||
359 | /* Check for valid receive state. */ | ||
360 | if (!(ib_qib_state_ops[qp->state] & | ||
361 | QIB_PROCESS_RECV_OK)) { | ||
362 | ibp->n_pkt_drops++; | ||
363 | goto unlock; | ||
364 | } | ||
365 | |||
366 | switch (qp->ibqp.qp_type) { | ||
367 | case IB_QPT_RC: | ||
368 | spin_lock_irqsave(&qp->s_lock, flags); | ||
369 | ruc_res = | ||
370 | qib_ruc_check_hdr( | ||
371 | ibp, hdr, | ||
372 | lnh == QIB_LRH_GRH, | ||
373 | qp, | ||
374 | be32_to_cpu(ohdr->bth[0])); | ||
375 | if (ruc_res) { | ||
376 | spin_unlock_irqrestore(&qp->s_lock, | ||
377 | flags); | ||
378 | goto unlock; | ||
379 | } | ||
380 | spin_unlock_irqrestore(&qp->s_lock, flags); | ||
381 | |||
382 | /* Only deal with RDMA Writes for now */ | ||
383 | if (opcode < | ||
384 | IB_OPCODE_RC_RDMA_READ_RESPONSE_FIRST) { | ||
385 | diff = qib_cmp24(psn, qp->r_psn); | ||
386 | if (!qp->r_nak_state && diff >= 0) { | ||
387 | ibp->n_rc_seqnak++; | ||
388 | qp->r_nak_state = | ||
389 | IB_NAK_PSN_ERROR; | ||
390 | /* Use the expected PSN. */ | ||
391 | qp->r_ack_psn = qp->r_psn; | ||
392 | /* | ||
393 | * Wait to send the sequence | ||
394 | * NAK until all packets | ||
395 | * in the receive queue have | ||
396 | * been processed. | ||
397 | * Otherwise, we end up | ||
398 | * propagating congestion. | ||
399 | */ | ||
400 | if (list_empty(&qp->rspwait)) { | ||
401 | qp->r_flags |= | ||
402 | QIB_R_RSP_NAK; | ||
403 | atomic_inc( | ||
404 | &qp->refcount); | ||
405 | list_add_tail( | ||
406 | &qp->rspwait, | ||
407 | &rcd->qp_wait_list); | ||
408 | } | ||
409 | } /* Out of sequence NAK */ | ||
410 | } /* QP Request NAKs */ | ||
411 | break; | ||
412 | case IB_QPT_SMI: | ||
413 | case IB_QPT_GSI: | ||
414 | case IB_QPT_UD: | ||
415 | case IB_QPT_UC: | ||
416 | default: | ||
417 | /* For now don't handle any other QP types */ | ||
418 | break; | ||
419 | } | ||
420 | |||
421 | unlock: | ||
422 | spin_unlock(&qp->r_lock); | ||
423 | /* | ||
424 | * Notify qib_destroy_qp() if it is waiting | ||
425 | * for us to finish. | ||
426 | */ | ||
427 | if (atomic_dec_and_test(&qp->refcount)) | ||
428 | wake_up(&qp->wait); | ||
429 | } /* Unicast QP */ | ||
430 | } /* Valid packet with TIDErr */ | ||
431 | |||
432 | drop: | ||
295 | return ret; | 433 | return ret; |
296 | } | 434 | } |
297 | 435 | ||
@@ -335,7 +473,7 @@ u32 qib_kreceive(struct qib_ctxtdata *rcd, u32 *llic, u32 *npkts) | |||
335 | smp_rmb(); /* prevent speculative reads of dma'ed hdrq */ | 473 | smp_rmb(); /* prevent speculative reads of dma'ed hdrq */ |
336 | } | 474 | } |
337 | 475 | ||
338 | for (last = 0, i = 1; !last && i <= 64; i += !last) { | 476 | for (last = 0, i = 1; !last; i += !last) { |
339 | hdr = dd->f_get_msgheader(dd, rhf_addr); | 477 | hdr = dd->f_get_msgheader(dd, rhf_addr); |
340 | eflags = qib_hdrget_err_flags(rhf_addr); | 478 | eflags = qib_hdrget_err_flags(rhf_addr); |
341 | etype = qib_hdrget_rcv_type(rhf_addr); | 479 | etype = qib_hdrget_rcv_type(rhf_addr); |
@@ -371,7 +509,7 @@ u32 qib_kreceive(struct qib_ctxtdata *rcd, u32 *llic, u32 *npkts) | |||
371 | * packets; only qibhdrerr should be set. | 509 | * packets; only qibhdrerr should be set. |
372 | */ | 510 | */ |
373 | if (unlikely(eflags)) | 511 | if (unlikely(eflags)) |
374 | crcs += qib_rcv_hdrerr(ppd, rcd->ctxt, eflags, l, | 512 | crcs += qib_rcv_hdrerr(rcd, ppd, rcd->ctxt, eflags, l, |
375 | etail, rhf_addr, hdr); | 513 | etail, rhf_addr, hdr); |
376 | else if (etype == RCVHQ_RCV_TYPE_NON_KD) { | 514 | else if (etype == RCVHQ_RCV_TYPE_NON_KD) { |
377 | qib_ib_rcv(rcd, hdr, ebuf, tlen); | 515 | qib_ib_rcv(rcd, hdr, ebuf, tlen); |
@@ -384,6 +522,9 @@ move_along: | |||
384 | l += rsize; | 522 | l += rsize; |
385 | if (l >= maxcnt) | 523 | if (l >= maxcnt) |
386 | l = 0; | 524 | l = 0; |
525 | if (i == QIB_MAX_PKT_RECV) | ||
526 | last = 1; | ||
527 | |||
387 | rhf_addr = (__le32 *) rcd->rcvhdrq + l + dd->rhf_offset; | 528 | rhf_addr = (__le32 *) rcd->rcvhdrq + l + dd->rhf_offset; |
388 | if (dd->flags & QIB_NODMA_RTAIL) { | 529 | if (dd->flags & QIB_NODMA_RTAIL) { |
389 | u32 seq = qib_hdrget_seq(rhf_addr); | 530 | u32 seq = qib_hdrget_seq(rhf_addr); |
@@ -402,7 +543,7 @@ move_along: | |||
402 | */ | 543 | */ |
403 | lval = l; | 544 | lval = l; |
404 | if (!last && !(i & 0xf)) { | 545 | if (!last && !(i & 0xf)) { |
405 | dd->f_update_usrhead(rcd, lval, updegr, etail); | 546 | dd->f_update_usrhead(rcd, lval, updegr, etail, i); |
406 | updegr = 0; | 547 | updegr = 0; |
407 | } | 548 | } |
408 | } | 549 | } |
@@ -444,7 +585,7 @@ bail: | |||
444 | * if no packets were processed. | 585 | * if no packets were processed. |
445 | */ | 586 | */ |
446 | lval = (u64)rcd->head | dd->rhdrhead_intr_off; | 587 | lval = (u64)rcd->head | dd->rhdrhead_intr_off; |
447 | dd->f_update_usrhead(rcd, lval, updegr, etail); | 588 | dd->f_update_usrhead(rcd, lval, updegr, etail, i); |
448 | return crcs; | 589 | return crcs; |
449 | } | 590 | } |
450 | 591 | ||
diff --git a/drivers/infiniband/hw/qib/qib_file_ops.c b/drivers/infiniband/hw/qib/qib_file_ops.c index 6b11645edf35..406fca50d036 100644 --- a/drivers/infiniband/hw/qib/qib_file_ops.c +++ b/drivers/infiniband/hw/qib/qib_file_ops.c | |||
@@ -63,7 +63,8 @@ static const struct file_operations qib_file_ops = { | |||
63 | .open = qib_open, | 63 | .open = qib_open, |
64 | .release = qib_close, | 64 | .release = qib_close, |
65 | .poll = qib_poll, | 65 | .poll = qib_poll, |
66 | .mmap = qib_mmapf | 66 | .mmap = qib_mmapf, |
67 | .llseek = noop_llseek, | ||
67 | }; | 68 | }; |
68 | 69 | ||
69 | /* | 70 | /* |
@@ -1378,17 +1379,17 @@ static int get_a_ctxt(struct file *fp, const struct qib_user_info *uinfo, | |||
1378 | /* find device (with ACTIVE ports) with fewest ctxts in use */ | 1379 | /* find device (with ACTIVE ports) with fewest ctxts in use */ |
1379 | for (ndev = 0; ndev < devmax; ndev++) { | 1380 | for (ndev = 0; ndev < devmax; ndev++) { |
1380 | struct qib_devdata *dd = qib_lookup(ndev); | 1381 | struct qib_devdata *dd = qib_lookup(ndev); |
1381 | unsigned cused = 0, cfree = 0; | 1382 | unsigned cused = 0, cfree = 0, pusable = 0; |
1382 | if (!dd) | 1383 | if (!dd) |
1383 | continue; | 1384 | continue; |
1384 | if (port && port <= dd->num_pports && | 1385 | if (port && port <= dd->num_pports && |
1385 | usable(dd->pport + port - 1)) | 1386 | usable(dd->pport + port - 1)) |
1386 | dusable = 1; | 1387 | pusable = 1; |
1387 | else | 1388 | else |
1388 | for (i = 0; i < dd->num_pports; i++) | 1389 | for (i = 0; i < dd->num_pports; i++) |
1389 | if (usable(dd->pport + i)) | 1390 | if (usable(dd->pport + i)) |
1390 | dusable++; | 1391 | pusable++; |
1391 | if (!dusable) | 1392 | if (!pusable) |
1392 | continue; | 1393 | continue; |
1393 | for (ctxt = dd->first_user_ctxt; ctxt < dd->cfgctxts; | 1394 | for (ctxt = dd->first_user_ctxt; ctxt < dd->cfgctxts; |
1394 | ctxt++) | 1395 | ctxt++) |
@@ -1396,7 +1397,7 @@ static int get_a_ctxt(struct file *fp, const struct qib_user_info *uinfo, | |||
1396 | cused++; | 1397 | cused++; |
1397 | else | 1398 | else |
1398 | cfree++; | 1399 | cfree++; |
1399 | if (cfree && cused < inuse) { | 1400 | if (pusable && cfree && cused < inuse) { |
1400 | udd = dd; | 1401 | udd = dd; |
1401 | inuse = cused; | 1402 | inuse = cused; |
1402 | } | 1403 | } |
@@ -1538,7 +1539,7 @@ done_chk_sdma: | |||
1538 | 1539 | ||
1539 | /* | 1540 | /* |
1540 | * If process has NOT already set it's affinity, select and | 1541 | * If process has NOT already set it's affinity, select and |
1541 | * reserve a processor for it, as a rendevous for all | 1542 | * reserve a processor for it, as a rendezvous for all |
1542 | * users of the driver. If they don't actually later | 1543 | * users of the driver. If they don't actually later |
1543 | * set affinity to this cpu, or set it to some other cpu, | 1544 | * set affinity to this cpu, or set it to some other cpu, |
1544 | * it just means that sooner or later we don't recommend | 1545 | * it just means that sooner or later we don't recommend |
@@ -1656,7 +1657,7 @@ static int qib_do_user_init(struct file *fp, | |||
1656 | * 0 to 1. So for those chips, we turn it off and then back on. | 1657 | * 0 to 1. So for those chips, we turn it off and then back on. |
1657 | * This will (very briefly) affect any other open ctxts, but the | 1658 | * This will (very briefly) affect any other open ctxts, but the |
1658 | * duration is very short, and therefore isn't an issue. We | 1659 | * duration is very short, and therefore isn't an issue. We |
1659 | * explictly set the in-memory tail copy to 0 beforehand, so we | 1660 | * explicitly set the in-memory tail copy to 0 beforehand, so we |
1660 | * don't have to wait to be sure the DMA update has happened | 1661 | * don't have to wait to be sure the DMA update has happened |
1661 | * (chip resets head/tail to 0 on transition to enable). | 1662 | * (chip resets head/tail to 0 on transition to enable). |
1662 | */ | 1663 | */ |
@@ -1722,7 +1723,7 @@ static int qib_close(struct inode *in, struct file *fp) | |||
1722 | 1723 | ||
1723 | mutex_lock(&qib_mutex); | 1724 | mutex_lock(&qib_mutex); |
1724 | 1725 | ||
1725 | fd = (struct qib_filedata *) fp->private_data; | 1726 | fd = fp->private_data; |
1726 | fp->private_data = NULL; | 1727 | fp->private_data = NULL; |
1727 | rcd = fd->rcd; | 1728 | rcd = fd->rcd; |
1728 | if (!rcd) { | 1729 | if (!rcd) { |
@@ -1808,7 +1809,7 @@ static int qib_ctxt_info(struct file *fp, struct qib_ctxt_info __user *uinfo) | |||
1808 | struct qib_ctxtdata *rcd = ctxt_fp(fp); | 1809 | struct qib_ctxtdata *rcd = ctxt_fp(fp); |
1809 | struct qib_filedata *fd; | 1810 | struct qib_filedata *fd; |
1810 | 1811 | ||
1811 | fd = (struct qib_filedata *) fp->private_data; | 1812 | fd = fp->private_data; |
1812 | 1813 | ||
1813 | info.num_active = qib_count_active_units(); | 1814 | info.num_active = qib_count_active_units(); |
1814 | info.unit = rcd->dd->unit; | 1815 | info.unit = rcd->dd->unit; |
diff --git a/drivers/infiniband/hw/qib/qib_fs.c b/drivers/infiniband/hw/qib/qib_fs.c index 9f989c0ba9d3..df7fa251dcdc 100644 --- a/drivers/infiniband/hw/qib/qib_fs.c +++ b/drivers/infiniband/hw/qib/qib_fs.c | |||
@@ -58,6 +58,7 @@ static int qibfs_mknod(struct inode *dir, struct dentry *dentry, | |||
58 | goto bail; | 58 | goto bail; |
59 | } | 59 | } |
60 | 60 | ||
61 | inode->i_ino = get_next_ino(); | ||
61 | inode->i_mode = mode; | 62 | inode->i_mode = mode; |
62 | inode->i_uid = 0; | 63 | inode->i_uid = 0; |
63 | inode->i_gid = 0; | 64 | inode->i_gid = 0; |
@@ -367,6 +368,7 @@ bail: | |||
367 | static const struct file_operations flash_ops = { | 368 | static const struct file_operations flash_ops = { |
368 | .read = flash_read, | 369 | .read = flash_read, |
369 | .write = flash_write, | 370 | .write = flash_write, |
371 | .llseek = default_llseek, | ||
370 | }; | 372 | }; |
371 | 373 | ||
372 | static int add_cntr_files(struct super_block *sb, struct qib_devdata *dd) | 374 | static int add_cntr_files(struct super_block *sb, struct qib_devdata *dd) |
@@ -451,17 +453,14 @@ static int remove_file(struct dentry *parent, char *name) | |||
451 | goto bail; | 453 | goto bail; |
452 | } | 454 | } |
453 | 455 | ||
454 | spin_lock(&dcache_lock); | ||
455 | spin_lock(&tmp->d_lock); | 456 | spin_lock(&tmp->d_lock); |
456 | if (!(d_unhashed(tmp) && tmp->d_inode)) { | 457 | if (!(d_unhashed(tmp) && tmp->d_inode)) { |
457 | dget_locked(tmp); | 458 | dget_dlock(tmp); |
458 | __d_drop(tmp); | 459 | __d_drop(tmp); |
459 | spin_unlock(&tmp->d_lock); | 460 | spin_unlock(&tmp->d_lock); |
460 | spin_unlock(&dcache_lock); | ||
461 | simple_unlink(parent->d_inode, tmp); | 461 | simple_unlink(parent->d_inode, tmp); |
462 | } else { | 462 | } else { |
463 | spin_unlock(&tmp->d_lock); | 463 | spin_unlock(&tmp->d_lock); |
464 | spin_unlock(&dcache_lock); | ||
465 | } | 464 | } |
466 | 465 | ||
467 | ret = 0; | 466 | ret = 0; |
@@ -553,13 +552,13 @@ bail: | |||
553 | return ret; | 552 | return ret; |
554 | } | 553 | } |
555 | 554 | ||
556 | static int qibfs_get_sb(struct file_system_type *fs_type, int flags, | 555 | static struct dentry *qibfs_mount(struct file_system_type *fs_type, int flags, |
557 | const char *dev_name, void *data, struct vfsmount *mnt) | 556 | const char *dev_name, void *data) |
558 | { | 557 | { |
559 | int ret = get_sb_single(fs_type, flags, data, | 558 | struct dentry *ret; |
560 | qibfs_fill_super, mnt); | 559 | ret = mount_single(fs_type, flags, data, qibfs_fill_super); |
561 | if (ret >= 0) | 560 | if (!IS_ERR(ret)) |
562 | qib_super = mnt->mnt_sb; | 561 | qib_super = ret->d_sb; |
563 | return ret; | 562 | return ret; |
564 | } | 563 | } |
565 | 564 | ||
@@ -601,7 +600,7 @@ int qibfs_remove(struct qib_devdata *dd) | |||
601 | static struct file_system_type qibfs_fs_type = { | 600 | static struct file_system_type qibfs_fs_type = { |
602 | .owner = THIS_MODULE, | 601 | .owner = THIS_MODULE, |
603 | .name = "ipathfs", | 602 | .name = "ipathfs", |
604 | .get_sb = qibfs_get_sb, | 603 | .mount = qibfs_mount, |
605 | .kill_sb = qibfs_kill_super, | 604 | .kill_sb = qibfs_kill_super, |
606 | }; | 605 | }; |
607 | 606 | ||
diff --git a/drivers/infiniband/hw/qib/qib_iba6120.c b/drivers/infiniband/hw/qib/qib_iba6120.c index a5e29dbb9537..d8ca0a0b970d 100644 --- a/drivers/infiniband/hw/qib/qib_iba6120.c +++ b/drivers/infiniband/hw/qib/qib_iba6120.c | |||
@@ -1799,7 +1799,7 @@ static int qib_6120_setup_reset(struct qib_devdata *dd) | |||
1799 | /* | 1799 | /* |
1800 | * Keep chip from being accessed until we are ready. Use | 1800 | * Keep chip from being accessed until we are ready. Use |
1801 | * writeq() directly, to allow the write even though QIB_PRESENT | 1801 | * writeq() directly, to allow the write even though QIB_PRESENT |
1802 | * isnt' set. | 1802 | * isn't set. |
1803 | */ | 1803 | */ |
1804 | dd->flags &= ~(QIB_INITTED | QIB_PRESENT); | 1804 | dd->flags &= ~(QIB_INITTED | QIB_PRESENT); |
1805 | dd->int_counter = 0; /* so we check interrupts work again */ | 1805 | dd->int_counter = 0; /* so we check interrupts work again */ |
@@ -2074,7 +2074,7 @@ static void qib_6120_config_ctxts(struct qib_devdata *dd) | |||
2074 | } | 2074 | } |
2075 | 2075 | ||
2076 | static void qib_update_6120_usrhead(struct qib_ctxtdata *rcd, u64 hd, | 2076 | static void qib_update_6120_usrhead(struct qib_ctxtdata *rcd, u64 hd, |
2077 | u32 updegr, u32 egrhd) | 2077 | u32 updegr, u32 egrhd, u32 npkts) |
2078 | { | 2078 | { |
2079 | qib_write_ureg(rcd->dd, ur_rcvhdrhead, hd, rcd->ctxt); | 2079 | qib_write_ureg(rcd->dd, ur_rcvhdrhead, hd, rcd->ctxt); |
2080 | if (updegr) | 2080 | if (updegr) |
@@ -2171,7 +2171,7 @@ static void rcvctrl_6120_mod(struct qib_pportdata *ppd, unsigned int op, | |||
2171 | * Init the context registers also; if we were | 2171 | * Init the context registers also; if we were |
2172 | * disabled, tail and head should both be zero | 2172 | * disabled, tail and head should both be zero |
2173 | * already from the enable, but since we don't | 2173 | * already from the enable, but since we don't |
2174 | * know, we have to do it explictly. | 2174 | * know, we have to do it explicitly. |
2175 | */ | 2175 | */ |
2176 | val = qib_read_ureg32(dd, ur_rcvegrindextail, ctxt); | 2176 | val = qib_read_ureg32(dd, ur_rcvegrindextail, ctxt); |
2177 | qib_write_ureg(dd, ur_rcvegrindexhead, val, ctxt); | 2177 | qib_write_ureg(dd, ur_rcvegrindexhead, val, ctxt); |
diff --git a/drivers/infiniband/hw/qib/qib_iba7220.c b/drivers/infiniband/hw/qib/qib_iba7220.c index 6fd8d74e7392..c765a2eb04cf 100644 --- a/drivers/infiniband/hw/qib/qib_iba7220.c +++ b/drivers/infiniband/hw/qib/qib_iba7220.c | |||
@@ -1692,8 +1692,7 @@ static void qib_7220_quiet_serdes(struct qib_pportdata *ppd) | |||
1692 | ppd->lflags &= ~QIBL_IB_AUTONEG_INPROG; | 1692 | ppd->lflags &= ~QIBL_IB_AUTONEG_INPROG; |
1693 | spin_unlock_irqrestore(&ppd->lflags_lock, flags); | 1693 | spin_unlock_irqrestore(&ppd->lflags_lock, flags); |
1694 | wake_up(&ppd->cpspec->autoneg_wait); | 1694 | wake_up(&ppd->cpspec->autoneg_wait); |
1695 | cancel_delayed_work(&ppd->cpspec->autoneg_work); | 1695 | cancel_delayed_work_sync(&ppd->cpspec->autoneg_work); |
1696 | flush_scheduled_work(); | ||
1697 | 1696 | ||
1698 | shutdown_7220_relock_poll(ppd->dd); | 1697 | shutdown_7220_relock_poll(ppd->dd); |
1699 | val = qib_read_kreg64(ppd->dd, kr_xgxs_cfg); | 1698 | val = qib_read_kreg64(ppd->dd, kr_xgxs_cfg); |
@@ -2112,7 +2111,7 @@ static int qib_setup_7220_reset(struct qib_devdata *dd) | |||
2112 | /* | 2111 | /* |
2113 | * Keep chip from being accessed until we are ready. Use | 2112 | * Keep chip from being accessed until we are ready. Use |
2114 | * writeq() directly, to allow the write even though QIB_PRESENT | 2113 | * writeq() directly, to allow the write even though QIB_PRESENT |
2115 | * isnt' set. | 2114 | * isn't set. |
2116 | */ | 2115 | */ |
2117 | dd->flags &= ~(QIB_INITTED | QIB_PRESENT); | 2116 | dd->flags &= ~(QIB_INITTED | QIB_PRESENT); |
2118 | dd->int_counter = 0; /* so we check interrupts work again */ | 2117 | dd->int_counter = 0; /* so we check interrupts work again */ |
@@ -2297,7 +2296,7 @@ static void qib_7220_config_ctxts(struct qib_devdata *dd) | |||
2297 | nchipctxts = qib_read_kreg32(dd, kr_portcnt); | 2296 | nchipctxts = qib_read_kreg32(dd, kr_portcnt); |
2298 | dd->cspec->numctxts = nchipctxts; | 2297 | dd->cspec->numctxts = nchipctxts; |
2299 | if (qib_n_krcv_queues > 1) { | 2298 | if (qib_n_krcv_queues > 1) { |
2300 | dd->qpn_mask = 0x3f; | 2299 | dd->qpn_mask = 0x3e; |
2301 | dd->first_user_ctxt = qib_n_krcv_queues * dd->num_pports; | 2300 | dd->first_user_ctxt = qib_n_krcv_queues * dd->num_pports; |
2302 | if (dd->first_user_ctxt > nchipctxts) | 2301 | if (dd->first_user_ctxt > nchipctxts) |
2303 | dd->first_user_ctxt = nchipctxts; | 2302 | dd->first_user_ctxt = nchipctxts; |
@@ -2480,7 +2479,7 @@ static int qib_7220_set_ib_cfg(struct qib_pportdata *ppd, int which, u32 val) | |||
2480 | * we command the link down. As with width, only write the | 2479 | * we command the link down. As with width, only write the |
2481 | * actual register if the link is currently down, otherwise | 2480 | * actual register if the link is currently down, otherwise |
2482 | * takes effect on next link change. Since setting is being | 2481 | * takes effect on next link change. Since setting is being |
2483 | * explictly requested (via MAD or sysfs), clear autoneg | 2482 | * explicitly requested (via MAD or sysfs), clear autoneg |
2484 | * failure status if speed autoneg is enabled. | 2483 | * failure status if speed autoneg is enabled. |
2485 | */ | 2484 | */ |
2486 | ppd->link_speed_enabled = val; | 2485 | ppd->link_speed_enabled = val; |
@@ -2703,7 +2702,7 @@ static int qib_7220_set_loopback(struct qib_pportdata *ppd, const char *what) | |||
2703 | } | 2702 | } |
2704 | 2703 | ||
2705 | static void qib_update_7220_usrhead(struct qib_ctxtdata *rcd, u64 hd, | 2704 | static void qib_update_7220_usrhead(struct qib_ctxtdata *rcd, u64 hd, |
2706 | u32 updegr, u32 egrhd) | 2705 | u32 updegr, u32 egrhd, u32 npkts) |
2707 | { | 2706 | { |
2708 | qib_write_ureg(rcd->dd, ur_rcvhdrhead, hd, rcd->ctxt); | 2707 | qib_write_ureg(rcd->dd, ur_rcvhdrhead, hd, rcd->ctxt); |
2709 | if (updegr) | 2708 | if (updegr) |
@@ -2779,7 +2778,7 @@ static void rcvctrl_7220_mod(struct qib_pportdata *ppd, unsigned int op, | |||
2779 | * Init the context registers also; if we were | 2778 | * Init the context registers also; if we were |
2780 | * disabled, tail and head should both be zero | 2779 | * disabled, tail and head should both be zero |
2781 | * already from the enable, but since we don't | 2780 | * already from the enable, but since we don't |
2782 | * know, we have to do it explictly. | 2781 | * know, we have to do it explicitly. |
2783 | */ | 2782 | */ |
2784 | val = qib_read_ureg32(dd, ur_rcvegrindextail, ctxt); | 2783 | val = qib_read_ureg32(dd, ur_rcvegrindextail, ctxt); |
2785 | qib_write_ureg(dd, ur_rcvegrindexhead, val, ctxt); | 2784 | qib_write_ureg(dd, ur_rcvegrindexhead, val, ctxt); |
@@ -3515,8 +3514,8 @@ static void try_7220_autoneg(struct qib_pportdata *ppd) | |||
3515 | 3514 | ||
3516 | toggle_7220_rclkrls(ppd->dd); | 3515 | toggle_7220_rclkrls(ppd->dd); |
3517 | /* 2 msec is minimum length of a poll cycle */ | 3516 | /* 2 msec is minimum length of a poll cycle */ |
3518 | schedule_delayed_work(&ppd->cpspec->autoneg_work, | 3517 | queue_delayed_work(ib_wq, &ppd->cpspec->autoneg_work, |
3519 | msecs_to_jiffies(2)); | 3518 | msecs_to_jiffies(2)); |
3520 | } | 3519 | } |
3521 | 3520 | ||
3522 | /* | 3521 | /* |
diff --git a/drivers/infiniband/hw/qib/qib_iba7322.c b/drivers/infiniband/hw/qib/qib_iba7322.c index 584d443b5335..8ec5237031a0 100644 --- a/drivers/infiniband/hw/qib/qib_iba7322.c +++ b/drivers/infiniband/hw/qib/qib_iba7322.c | |||
@@ -71,6 +71,9 @@ static void qib_7322_mini_pcs_reset(struct qib_pportdata *); | |||
71 | 71 | ||
72 | static u32 ahb_mod(struct qib_devdata *, int, int, int, u32, u32); | 72 | static u32 ahb_mod(struct qib_devdata *, int, int, int, u32, u32); |
73 | static void ibsd_wr_allchans(struct qib_pportdata *, int, unsigned, unsigned); | 73 | static void ibsd_wr_allchans(struct qib_pportdata *, int, unsigned, unsigned); |
74 | static void serdes_7322_los_enable(struct qib_pportdata *, int); | ||
75 | static int serdes_7322_init_old(struct qib_pportdata *); | ||
76 | static int serdes_7322_init_new(struct qib_pportdata *); | ||
74 | 77 | ||
75 | #define BMASK(msb, lsb) (((1 << ((msb) + 1 - (lsb))) - 1) << (lsb)) | 78 | #define BMASK(msb, lsb) (((1 << ((msb) + 1 - (lsb))) - 1) << (lsb)) |
76 | 79 | ||
@@ -111,6 +114,21 @@ static ushort qib_singleport; | |||
111 | module_param_named(singleport, qib_singleport, ushort, S_IRUGO); | 114 | module_param_named(singleport, qib_singleport, ushort, S_IRUGO); |
112 | MODULE_PARM_DESC(singleport, "Use only IB port 1; more per-port buffer space"); | 115 | MODULE_PARM_DESC(singleport, "Use only IB port 1; more per-port buffer space"); |
113 | 116 | ||
117 | /* | ||
118 | * Receive header queue sizes | ||
119 | */ | ||
120 | static unsigned qib_rcvhdrcnt; | ||
121 | module_param_named(rcvhdrcnt, qib_rcvhdrcnt, uint, S_IRUGO); | ||
122 | MODULE_PARM_DESC(rcvhdrcnt, "receive header count"); | ||
123 | |||
124 | static unsigned qib_rcvhdrsize; | ||
125 | module_param_named(rcvhdrsize, qib_rcvhdrsize, uint, S_IRUGO); | ||
126 | MODULE_PARM_DESC(rcvhdrsize, "receive header size in 32-bit words"); | ||
127 | |||
128 | static unsigned qib_rcvhdrentsize; | ||
129 | module_param_named(rcvhdrentsize, qib_rcvhdrentsize, uint, S_IRUGO); | ||
130 | MODULE_PARM_DESC(rcvhdrentsize, "receive header entry size in 32-bit words"); | ||
131 | |||
114 | #define MAX_ATTEN_LEN 64 /* plenty for any real system */ | 132 | #define MAX_ATTEN_LEN 64 /* plenty for any real system */ |
115 | /* for read back, default index is ~5m copper cable */ | 133 | /* for read back, default index is ~5m copper cable */ |
116 | static char txselect_list[MAX_ATTEN_LEN] = "10"; | 134 | static char txselect_list[MAX_ATTEN_LEN] = "10"; |
@@ -314,7 +332,7 @@ MODULE_PARM_DESC(txselect, \ | |||
314 | #define krp_serdesctrl KREG_IBPORT_IDX(IBSerdesCtrl) | 332 | #define krp_serdesctrl KREG_IBPORT_IDX(IBSerdesCtrl) |
315 | 333 | ||
316 | /* | 334 | /* |
317 | * Per-context kernel registers. Acess only with qib_read_kreg_ctxt() | 335 | * Per-context kernel registers. Access only with qib_read_kreg_ctxt() |
318 | * or qib_write_kreg_ctxt() | 336 | * or qib_write_kreg_ctxt() |
319 | */ | 337 | */ |
320 | #define krc_rcvhdraddr KREG_IDX(RcvHdrAddr0) | 338 | #define krc_rcvhdraddr KREG_IDX(RcvHdrAddr0) |
@@ -451,6 +469,8 @@ static u8 ib_rate_to_delay[IB_RATE_120_GBPS + 1] = { | |||
451 | #define IB_7322_LT_STATE_RECOVERIDLE 0x0f | 469 | #define IB_7322_LT_STATE_RECOVERIDLE 0x0f |
452 | #define IB_7322_LT_STATE_CFGENH 0x10 | 470 | #define IB_7322_LT_STATE_CFGENH 0x10 |
453 | #define IB_7322_LT_STATE_CFGTEST 0x11 | 471 | #define IB_7322_LT_STATE_CFGTEST 0x11 |
472 | #define IB_7322_LT_STATE_CFGWAITRMTTEST 0x12 | ||
473 | #define IB_7322_LT_STATE_CFGWAITENH 0x13 | ||
454 | 474 | ||
455 | /* link state machine states from IBC */ | 475 | /* link state machine states from IBC */ |
456 | #define IB_7322_L_STATE_DOWN 0x0 | 476 | #define IB_7322_L_STATE_DOWN 0x0 |
@@ -480,8 +500,10 @@ static const u8 qib_7322_physportstate[0x20] = { | |||
480 | IB_PHYSPORTSTATE_LINK_ERR_RECOVER, | 500 | IB_PHYSPORTSTATE_LINK_ERR_RECOVER, |
481 | [IB_7322_LT_STATE_CFGENH] = IB_PHYSPORTSTATE_CFG_ENH, | 501 | [IB_7322_LT_STATE_CFGENH] = IB_PHYSPORTSTATE_CFG_ENH, |
482 | [IB_7322_LT_STATE_CFGTEST] = IB_PHYSPORTSTATE_CFG_TRAIN, | 502 | [IB_7322_LT_STATE_CFGTEST] = IB_PHYSPORTSTATE_CFG_TRAIN, |
483 | [0x12] = IB_PHYSPORTSTATE_CFG_TRAIN, | 503 | [IB_7322_LT_STATE_CFGWAITRMTTEST] = |
484 | [0x13] = IB_PHYSPORTSTATE_CFG_WAIT_ENH, | 504 | IB_PHYSPORTSTATE_CFG_TRAIN, |
505 | [IB_7322_LT_STATE_CFGWAITENH] = | ||
506 | IB_PHYSPORTSTATE_CFG_WAIT_ENH, | ||
485 | [0x14] = IB_PHYSPORTSTATE_CFG_TRAIN, | 507 | [0x14] = IB_PHYSPORTSTATE_CFG_TRAIN, |
486 | [0x15] = IB_PHYSPORTSTATE_CFG_TRAIN, | 508 | [0x15] = IB_PHYSPORTSTATE_CFG_TRAIN, |
487 | [0x16] = IB_PHYSPORTSTATE_CFG_TRAIN, | 509 | [0x16] = IB_PHYSPORTSTATE_CFG_TRAIN, |
@@ -544,6 +566,7 @@ static void write_tx_serdes_param(struct qib_pportdata *, struct txdds_ent *); | |||
544 | 566 | ||
545 | #define TXDDS_TABLE_SZ 16 /* number of entries per speed in onchip table */ | 567 | #define TXDDS_TABLE_SZ 16 /* number of entries per speed in onchip table */ |
546 | #define TXDDS_EXTRA_SZ 13 /* number of extra tx settings entries */ | 568 | #define TXDDS_EXTRA_SZ 13 /* number of extra tx settings entries */ |
569 | #define TXDDS_MFG_SZ 2 /* number of mfg tx settings entries */ | ||
547 | #define SERDES_CHANS 4 /* yes, it's obvious, but one less magic number */ | 570 | #define SERDES_CHANS 4 /* yes, it's obvious, but one less magic number */ |
548 | 571 | ||
549 | #define H1_FORCE_VAL 8 | 572 | #define H1_FORCE_VAL 8 |
@@ -1673,10 +1696,14 @@ static void handle_serdes_issues(struct qib_pportdata *ppd, u64 ibcst) | |||
1673 | break; | 1696 | break; |
1674 | } | 1697 | } |
1675 | 1698 | ||
1676 | if (ibclt == IB_7322_LT_STATE_CFGTEST && | 1699 | if (((ibclt >= IB_7322_LT_STATE_CFGTEST && |
1700 | ibclt <= IB_7322_LT_STATE_CFGWAITENH) || | ||
1701 | ibclt == IB_7322_LT_STATE_LINKUP) && | ||
1677 | (ibcst & SYM_MASK(IBCStatusA_0, LinkSpeedQDR))) { | 1702 | (ibcst & SYM_MASK(IBCStatusA_0, LinkSpeedQDR))) { |
1678 | force_h1(ppd); | 1703 | force_h1(ppd); |
1679 | ppd->cpspec->qdr_reforce = 1; | 1704 | ppd->cpspec->qdr_reforce = 1; |
1705 | if (!ppd->dd->cspec->r1) | ||
1706 | serdes_7322_los_enable(ppd, 0); | ||
1680 | } else if (ppd->cpspec->qdr_reforce && | 1707 | } else if (ppd->cpspec->qdr_reforce && |
1681 | (ibcst & SYM_MASK(IBCStatusA_0, LinkSpeedQDR)) && | 1708 | (ibcst & SYM_MASK(IBCStatusA_0, LinkSpeedQDR)) && |
1682 | (ibclt == IB_7322_LT_STATE_CFGENH || | 1709 | (ibclt == IB_7322_LT_STATE_CFGENH || |
@@ -1692,18 +1719,37 @@ static void handle_serdes_issues(struct qib_pportdata *ppd, u64 ibcst) | |||
1692 | ibclt <= IB_7322_LT_STATE_SLEEPQUIET))) | 1719 | ibclt <= IB_7322_LT_STATE_SLEEPQUIET))) |
1693 | adj_tx_serdes(ppd); | 1720 | adj_tx_serdes(ppd); |
1694 | 1721 | ||
1695 | if (!ppd->cpspec->qdr_dfe_on && ibclt != IB_7322_LT_STATE_LINKUP && | 1722 | if (ibclt != IB_7322_LT_STATE_LINKUP) { |
1696 | ibclt <= IB_7322_LT_STATE_SLEEPQUIET) { | 1723 | u8 ltstate = qib_7322_phys_portstate(ibcst); |
1697 | ppd->cpspec->qdr_dfe_on = 1; | 1724 | u8 pibclt = (u8)SYM_FIELD(ppd->lastibcstat, IBCStatusA_0, |
1698 | ppd->cpspec->qdr_dfe_time = 0; | 1725 | LinkTrainingState); |
1699 | /* On link down, reenable QDR adaptation */ | 1726 | if (!ppd->dd->cspec->r1 && |
1700 | qib_write_kreg_port(ppd, krp_static_adapt_dis(2), | 1727 | pibclt == IB_7322_LT_STATE_LINKUP && |
1701 | ppd->dd->cspec->r1 ? | 1728 | ltstate != IB_PHYSPORTSTATE_LINK_ERR_RECOVER && |
1702 | QDR_STATIC_ADAPT_DOWN_R1 : | 1729 | ltstate != IB_PHYSPORTSTATE_RECOVERY_RETRAIN && |
1703 | QDR_STATIC_ADAPT_DOWN); | 1730 | ltstate != IB_PHYSPORTSTATE_RECOVERY_WAITRMT && |
1731 | ltstate != IB_PHYSPORTSTATE_RECOVERY_IDLE) | ||
1732 | /* If the link went down (but no into recovery, | ||
1733 | * turn LOS back on */ | ||
1734 | serdes_7322_los_enable(ppd, 1); | ||
1735 | if (!ppd->cpspec->qdr_dfe_on && | ||
1736 | ibclt <= IB_7322_LT_STATE_SLEEPQUIET) { | ||
1737 | ppd->cpspec->qdr_dfe_on = 1; | ||
1738 | ppd->cpspec->qdr_dfe_time = 0; | ||
1739 | /* On link down, reenable QDR adaptation */ | ||
1740 | qib_write_kreg_port(ppd, krp_static_adapt_dis(2), | ||
1741 | ppd->dd->cspec->r1 ? | ||
1742 | QDR_STATIC_ADAPT_DOWN_R1 : | ||
1743 | QDR_STATIC_ADAPT_DOWN); | ||
1744 | printk(KERN_INFO QIB_DRV_NAME | ||
1745 | " IB%u:%u re-enabled QDR adaptation " | ||
1746 | "ibclt %x\n", ppd->dd->unit, ppd->port, ibclt); | ||
1747 | } | ||
1704 | } | 1748 | } |
1705 | } | 1749 | } |
1706 | 1750 | ||
1751 | static int qib_7322_set_ib_cfg(struct qib_pportdata *, int, u32); | ||
1752 | |||
1707 | /* | 1753 | /* |
1708 | * This is per-pport error handling. | 1754 | * This is per-pport error handling. |
1709 | * will likely get it's own MSIx interrupt (one for each port, | 1755 | * will likely get it's own MSIx interrupt (one for each port, |
@@ -2323,6 +2369,11 @@ static int qib_7322_bringup_serdes(struct qib_pportdata *ppd) | |||
2323 | qib_write_kreg_port(ppd, krp_rcvctrl, ppd->p_rcvctrl); | 2369 | qib_write_kreg_port(ppd, krp_rcvctrl, ppd->p_rcvctrl); |
2324 | spin_unlock_irqrestore(&dd->cspec->rcvmod_lock, flags); | 2370 | spin_unlock_irqrestore(&dd->cspec->rcvmod_lock, flags); |
2325 | 2371 | ||
2372 | /* Hold the link state machine for mezz boards */ | ||
2373 | if (IS_QMH(dd) || IS_QME(dd)) | ||
2374 | qib_set_ib_7322_lstate(ppd, 0, | ||
2375 | QLOGIC_IB_IBCC_LINKINITCMD_DISABLE); | ||
2376 | |||
2326 | /* Also enable IBSTATUSCHG interrupt. */ | 2377 | /* Also enable IBSTATUSCHG interrupt. */ |
2327 | val = qib_read_kreg_port(ppd, krp_errmask); | 2378 | val = qib_read_kreg_port(ppd, krp_errmask); |
2328 | qib_write_kreg_port(ppd, krp_errmask, | 2379 | qib_write_kreg_port(ppd, krp_errmask, |
@@ -2348,10 +2399,9 @@ static void qib_7322_mini_quiet_serdes(struct qib_pportdata *ppd) | |||
2348 | ppd->lflags &= ~QIBL_IB_AUTONEG_INPROG; | 2399 | ppd->lflags &= ~QIBL_IB_AUTONEG_INPROG; |
2349 | spin_unlock_irqrestore(&ppd->lflags_lock, flags); | 2400 | spin_unlock_irqrestore(&ppd->lflags_lock, flags); |
2350 | wake_up(&ppd->cpspec->autoneg_wait); | 2401 | wake_up(&ppd->cpspec->autoneg_wait); |
2351 | cancel_delayed_work(&ppd->cpspec->autoneg_work); | 2402 | cancel_delayed_work_sync(&ppd->cpspec->autoneg_work); |
2352 | if (ppd->dd->cspec->r1) | 2403 | if (ppd->dd->cspec->r1) |
2353 | cancel_delayed_work(&ppd->cpspec->ipg_work); | 2404 | cancel_delayed_work_sync(&ppd->cpspec->ipg_work); |
2354 | flush_scheduled_work(); | ||
2355 | 2405 | ||
2356 | ppd->cpspec->chase_end = 0; | 2406 | ppd->cpspec->chase_end = 0; |
2357 | if (ppd->cpspec->chase_timer.data) /* if initted */ | 2407 | if (ppd->cpspec->chase_timer.data) /* if initted */ |
@@ -2648,7 +2698,7 @@ static noinline void unknown_7322_gpio_intr(struct qib_devdata *dd) | |||
2648 | if (!(pins & mask)) { | 2698 | if (!(pins & mask)) { |
2649 | ++handled; | 2699 | ++handled; |
2650 | qd->t_insert = get_jiffies_64(); | 2700 | qd->t_insert = get_jiffies_64(); |
2651 | schedule_work(&qd->work); | 2701 | queue_work(ib_wq, &qd->work); |
2652 | } | 2702 | } |
2653 | } | 2703 | } |
2654 | } | 2704 | } |
@@ -2785,7 +2835,6 @@ static irqreturn_t qib_7322intr(int irq, void *data) | |||
2785 | ctxtrbits &= ~rmask; | 2835 | ctxtrbits &= ~rmask; |
2786 | if (dd->rcd[i]) { | 2836 | if (dd->rcd[i]) { |
2787 | qib_kreceive(dd->rcd[i], NULL, &npkts); | 2837 | qib_kreceive(dd->rcd[i], NULL, &npkts); |
2788 | adjust_rcv_timeout(dd->rcd[i], npkts); | ||
2789 | } | 2838 | } |
2790 | } | 2839 | } |
2791 | rmask <<= 1; | 2840 | rmask <<= 1; |
@@ -2835,7 +2884,6 @@ static irqreturn_t qib_7322pintr(int irq, void *data) | |||
2835 | (1ULL << QIB_I_RCVURG_LSB)) << rcd->ctxt); | 2884 | (1ULL << QIB_I_RCVURG_LSB)) << rcd->ctxt); |
2836 | 2885 | ||
2837 | qib_kreceive(rcd, NULL, &npkts); | 2886 | qib_kreceive(rcd, NULL, &npkts); |
2838 | adjust_rcv_timeout(rcd, npkts); | ||
2839 | 2887 | ||
2840 | return IRQ_HANDLED; | 2888 | return IRQ_HANDLED; |
2841 | } | 2889 | } |
@@ -3157,6 +3205,10 @@ static unsigned qib_7322_boardname(struct qib_devdata *dd) | |||
3157 | case BOARD_QME7342: | 3205 | case BOARD_QME7342: |
3158 | n = "InfiniPath_QME7342"; | 3206 | n = "InfiniPath_QME7342"; |
3159 | break; | 3207 | break; |
3208 | case 8: | ||
3209 | n = "InfiniPath_QME7362"; | ||
3210 | dd->flags |= QIB_HAS_QSFP; | ||
3211 | break; | ||
3160 | case 15: | 3212 | case 15: |
3161 | n = "InfiniPath_QLE7342_TEST"; | 3213 | n = "InfiniPath_QLE7342_TEST"; |
3162 | dd->flags |= QIB_HAS_QSFP; | 3214 | dd->flags |= QIB_HAS_QSFP; |
@@ -3253,7 +3305,7 @@ static int qib_do_7322_reset(struct qib_devdata *dd) | |||
3253 | /* | 3305 | /* |
3254 | * Keep chip from being accessed until we are ready. Use | 3306 | * Keep chip from being accessed until we are ready. Use |
3255 | * writeq() directly, to allow the write even though QIB_PRESENT | 3307 | * writeq() directly, to allow the write even though QIB_PRESENT |
3256 | * isnt' set. | 3308 | * isn't set. |
3257 | */ | 3309 | */ |
3258 | dd->flags &= ~(QIB_INITTED | QIB_PRESENT | QIB_BADINTR); | 3310 | dd->flags &= ~(QIB_INITTED | QIB_PRESENT | QIB_BADINTR); |
3259 | dd->flags |= QIB_DOING_RESET; | 3311 | dd->flags |= QIB_DOING_RESET; |
@@ -3475,11 +3527,6 @@ static void qib_7322_config_ctxts(struct qib_devdata *dd) | |||
3475 | nchipctxts = qib_read_kreg32(dd, kr_contextcnt); | 3527 | nchipctxts = qib_read_kreg32(dd, kr_contextcnt); |
3476 | dd->cspec->numctxts = nchipctxts; | 3528 | dd->cspec->numctxts = nchipctxts; |
3477 | if (qib_n_krcv_queues > 1 && dd->num_pports) { | 3529 | if (qib_n_krcv_queues > 1 && dd->num_pports) { |
3478 | /* | ||
3479 | * Set the mask for which bits from the QPN are used | ||
3480 | * to select a context number. | ||
3481 | */ | ||
3482 | dd->qpn_mask = 0x3f; | ||
3483 | dd->first_user_ctxt = NUM_IB_PORTS + | 3530 | dd->first_user_ctxt = NUM_IB_PORTS + |
3484 | (qib_n_krcv_queues - 1) * dd->num_pports; | 3531 | (qib_n_krcv_queues - 1) * dd->num_pports; |
3485 | if (dd->first_user_ctxt > nchipctxts) | 3532 | if (dd->first_user_ctxt > nchipctxts) |
@@ -3530,8 +3577,11 @@ static void qib_7322_config_ctxts(struct qib_devdata *dd) | |||
3530 | 3577 | ||
3531 | /* kr_rcvegrcnt changes based on the number of contexts enabled */ | 3578 | /* kr_rcvegrcnt changes based on the number of contexts enabled */ |
3532 | dd->cspec->rcvegrcnt = qib_read_kreg32(dd, kr_rcvegrcnt); | 3579 | dd->cspec->rcvegrcnt = qib_read_kreg32(dd, kr_rcvegrcnt); |
3533 | dd->rcvhdrcnt = max(dd->cspec->rcvegrcnt, | 3580 | if (qib_rcvhdrcnt) |
3534 | dd->num_pports > 1 ? 1024U : 2048U); | 3581 | dd->rcvhdrcnt = max(dd->cspec->rcvegrcnt, qib_rcvhdrcnt); |
3582 | else | ||
3583 | dd->rcvhdrcnt = max(dd->cspec->rcvegrcnt, | ||
3584 | dd->num_pports > 1 ? 1024U : 2048U); | ||
3535 | } | 3585 | } |
3536 | 3586 | ||
3537 | static int qib_7322_get_ib_cfg(struct qib_pportdata *ppd, int which) | 3587 | static int qib_7322_get_ib_cfg(struct qib_pportdata *ppd, int which) |
@@ -3683,7 +3733,7 @@ static int qib_7322_set_ib_cfg(struct qib_pportdata *ppd, int which, u32 val) | |||
3683 | /* | 3733 | /* |
3684 | * As with width, only write the actual register if the | 3734 | * As with width, only write the actual register if the |
3685 | * link is currently down, otherwise takes effect on next | 3735 | * link is currently down, otherwise takes effect on next |
3686 | * link change. Since setting is being explictly requested | 3736 | * link change. Since setting is being explicitly requested |
3687 | * (via MAD or sysfs), clear autoneg failure status if speed | 3737 | * (via MAD or sysfs), clear autoneg failure status if speed |
3688 | * autoneg is enabled. | 3738 | * autoneg is enabled. |
3689 | */ | 3739 | */ |
@@ -4002,8 +4052,14 @@ static int qib_7322_set_ib_table(struct qib_pportdata *ppd, int which, void *t) | |||
4002 | } | 4052 | } |
4003 | 4053 | ||
4004 | static void qib_update_7322_usrhead(struct qib_ctxtdata *rcd, u64 hd, | 4054 | static void qib_update_7322_usrhead(struct qib_ctxtdata *rcd, u64 hd, |
4005 | u32 updegr, u32 egrhd) | 4055 | u32 updegr, u32 egrhd, u32 npkts) |
4006 | { | 4056 | { |
4057 | /* | ||
4058 | * Need to write timeout register before updating rcvhdrhead to ensure | ||
4059 | * that the timer is enabled on reception of a packet. | ||
4060 | */ | ||
4061 | if (hd >> IBA7322_HDRHEAD_PKTINT_SHIFT) | ||
4062 | adjust_rcv_timeout(rcd, npkts); | ||
4007 | qib_write_ureg(rcd->dd, ur_rcvhdrhead, hd, rcd->ctxt); | 4063 | qib_write_ureg(rcd->dd, ur_rcvhdrhead, hd, rcd->ctxt); |
4008 | qib_write_ureg(rcd->dd, ur_rcvhdrhead, hd, rcd->ctxt); | 4064 | qib_write_ureg(rcd->dd, ur_rcvhdrhead, hd, rcd->ctxt); |
4009 | if (updegr) | 4065 | if (updegr) |
@@ -4113,7 +4169,7 @@ static void rcvctrl_7322_mod(struct qib_pportdata *ppd, unsigned int op, | |||
4113 | * Init the context registers also; if we were | 4169 | * Init the context registers also; if we were |
4114 | * disabled, tail and head should both be zero | 4170 | * disabled, tail and head should both be zero |
4115 | * already from the enable, but since we don't | 4171 | * already from the enable, but since we don't |
4116 | * know, we have to do it explictly. | 4172 | * know, we have to do it explicitly. |
4117 | */ | 4173 | */ |
4118 | val = qib_read_ureg32(dd, ur_rcvegrindextail, ctxt); | 4174 | val = qib_read_ureg32(dd, ur_rcvegrindextail, ctxt); |
4119 | qib_write_ureg(dd, ur_rcvegrindexhead, val, ctxt); | 4175 | qib_write_ureg(dd, ur_rcvegrindexhead, val, ctxt); |
@@ -4926,8 +4982,8 @@ static void try_7322_autoneg(struct qib_pportdata *ppd) | |||
4926 | set_7322_ibspeed_fast(ppd, QIB_IB_DDR); | 4982 | set_7322_ibspeed_fast(ppd, QIB_IB_DDR); |
4927 | qib_7322_mini_pcs_reset(ppd); | 4983 | qib_7322_mini_pcs_reset(ppd); |
4928 | /* 2 msec is minimum length of a poll cycle */ | 4984 | /* 2 msec is minimum length of a poll cycle */ |
4929 | schedule_delayed_work(&ppd->cpspec->autoneg_work, | 4985 | queue_delayed_work(ib_wq, &ppd->cpspec->autoneg_work, |
4930 | msecs_to_jiffies(2)); | 4986 | msecs_to_jiffies(2)); |
4931 | } | 4987 | } |
4932 | 4988 | ||
4933 | /* | 4989 | /* |
@@ -5057,7 +5113,8 @@ static void try_7322_ipg(struct qib_pportdata *ppd) | |||
5057 | ib_free_send_mad(send_buf); | 5113 | ib_free_send_mad(send_buf); |
5058 | retry: | 5114 | retry: |
5059 | delay = 2 << ppd->cpspec->ipg_tries; | 5115 | delay = 2 << ppd->cpspec->ipg_tries; |
5060 | schedule_delayed_work(&ppd->cpspec->ipg_work, msecs_to_jiffies(delay)); | 5116 | queue_delayed_work(ib_wq, &ppd->cpspec->ipg_work, |
5117 | msecs_to_jiffies(delay)); | ||
5061 | } | 5118 | } |
5062 | 5119 | ||
5063 | /* | 5120 | /* |
@@ -5522,7 +5579,7 @@ static void qsfp_7322_event(struct work_struct *work) | |||
5522 | u64 now = get_jiffies_64(); | 5579 | u64 now = get_jiffies_64(); |
5523 | if (time_after64(now, pwrup)) | 5580 | if (time_after64(now, pwrup)) |
5524 | break; | 5581 | break; |
5525 | msleep(1); | 5582 | msleep(20); |
5526 | } | 5583 | } |
5527 | ret = qib_refresh_qsfp_cache(ppd, &qd->cache); | 5584 | ret = qib_refresh_qsfp_cache(ppd, &qd->cache); |
5528 | /* | 5585 | /* |
@@ -5531,9 +5588,16 @@ static void qsfp_7322_event(struct work_struct *work) | |||
5531 | * even on failure to read cable information. We don't | 5588 | * even on failure to read cable information. We don't |
5532 | * get here for QME, so IS_QME check not needed here. | 5589 | * get here for QME, so IS_QME check not needed here. |
5533 | */ | 5590 | */ |
5534 | le2 = (!ret && qd->cache.atten[1] >= qib_long_atten && | 5591 | if (!ret && !ppd->dd->cspec->r1) { |
5535 | !ppd->dd->cspec->r1 && QSFP_IS_CU(qd->cache.tech)) ? | 5592 | if (QSFP_IS_ACTIVE_FAR(qd->cache.tech)) |
5536 | LE2_5m : LE2_DEFAULT; | 5593 | le2 = LE2_QME; |
5594 | else if (qd->cache.atten[1] >= qib_long_atten && | ||
5595 | QSFP_IS_CU(qd->cache.tech)) | ||
5596 | le2 = LE2_5m; | ||
5597 | else | ||
5598 | le2 = LE2_DEFAULT; | ||
5599 | } else | ||
5600 | le2 = LE2_DEFAULT; | ||
5537 | ibsd_wr_allchans(ppd, 13, (le2 << 7), BMASK(9, 7)); | 5601 | ibsd_wr_allchans(ppd, 13, (le2 << 7), BMASK(9, 7)); |
5538 | init_txdds_table(ppd, 0); | 5602 | init_txdds_table(ppd, 0); |
5539 | } | 5603 | } |
@@ -5579,6 +5643,7 @@ static void set_no_qsfp_atten(struct qib_devdata *dd, int change) | |||
5579 | u32 pidx, unit, port, deflt, h1; | 5643 | u32 pidx, unit, port, deflt, h1; |
5580 | unsigned long val; | 5644 | unsigned long val; |
5581 | int any = 0, seth1; | 5645 | int any = 0, seth1; |
5646 | int txdds_size; | ||
5582 | 5647 | ||
5583 | str = txselect_list; | 5648 | str = txselect_list; |
5584 | 5649 | ||
@@ -5587,6 +5652,10 @@ static void set_no_qsfp_atten(struct qib_devdata *dd, int change) | |||
5587 | for (pidx = 0; pidx < dd->num_pports; ++pidx) | 5652 | for (pidx = 0; pidx < dd->num_pports; ++pidx) |
5588 | dd->pport[pidx].cpspec->no_eep = deflt; | 5653 | dd->pport[pidx].cpspec->no_eep = deflt; |
5589 | 5654 | ||
5655 | txdds_size = TXDDS_TABLE_SZ + TXDDS_EXTRA_SZ; | ||
5656 | if (IS_QME(dd) || IS_QMH(dd)) | ||
5657 | txdds_size += TXDDS_MFG_SZ; | ||
5658 | |||
5590 | while (*nxt && nxt[1]) { | 5659 | while (*nxt && nxt[1]) { |
5591 | str = ++nxt; | 5660 | str = ++nxt; |
5592 | unit = simple_strtoul(str, &nxt, 0); | 5661 | unit = simple_strtoul(str, &nxt, 0); |
@@ -5609,7 +5678,7 @@ static void set_no_qsfp_atten(struct qib_devdata *dd, int change) | |||
5609 | ; | 5678 | ; |
5610 | continue; | 5679 | continue; |
5611 | } | 5680 | } |
5612 | if (val >= TXDDS_TABLE_SZ + TXDDS_EXTRA_SZ) | 5681 | if (val >= txdds_size) |
5613 | continue; | 5682 | continue; |
5614 | seth1 = 0; | 5683 | seth1 = 0; |
5615 | h1 = 0; /* gcc thinks it might be used uninitted */ | 5684 | h1 = 0; /* gcc thinks it might be used uninitted */ |
@@ -5633,6 +5702,11 @@ static void set_no_qsfp_atten(struct qib_devdata *dd, int change) | |||
5633 | ppd->cpspec->h1_val = h1; | 5702 | ppd->cpspec->h1_val = h1; |
5634 | /* now change the IBC and serdes, overriding generic */ | 5703 | /* now change the IBC and serdes, overriding generic */ |
5635 | init_txdds_table(ppd, 1); | 5704 | init_txdds_table(ppd, 1); |
5705 | /* Re-enable the physical state machine on mezz boards | ||
5706 | * now that the correct settings have been set. */ | ||
5707 | if (IS_QMH(dd) || IS_QME(dd)) | ||
5708 | qib_set_ib_7322_lstate(ppd, 0, | ||
5709 | QLOGIC_IB_IBCC_LINKINITCMD_SLEEP); | ||
5636 | any++; | 5710 | any++; |
5637 | } | 5711 | } |
5638 | if (*nxt == '\n') | 5712 | if (*nxt == '\n') |
@@ -5661,10 +5735,11 @@ static int setup_txselect(const char *str, struct kernel_param *kp) | |||
5661 | return -ENOSPC; | 5735 | return -ENOSPC; |
5662 | } | 5736 | } |
5663 | val = simple_strtoul(str, &n, 0); | 5737 | val = simple_strtoul(str, &n, 0); |
5664 | if (n == str || val >= (TXDDS_TABLE_SZ + TXDDS_EXTRA_SZ)) { | 5738 | if (n == str || val >= (TXDDS_TABLE_SZ + TXDDS_EXTRA_SZ + |
5739 | TXDDS_MFG_SZ)) { | ||
5665 | printk(KERN_INFO QIB_DRV_NAME | 5740 | printk(KERN_INFO QIB_DRV_NAME |
5666 | "txselect_values must start with a number < %d\n", | 5741 | "txselect_values must start with a number < %d\n", |
5667 | TXDDS_TABLE_SZ + TXDDS_EXTRA_SZ); | 5742 | TXDDS_TABLE_SZ + TXDDS_EXTRA_SZ + TXDDS_MFG_SZ); |
5668 | return -EINVAL; | 5743 | return -EINVAL; |
5669 | } | 5744 | } |
5670 | strcpy(txselect_list, str); | 5745 | strcpy(txselect_list, str); |
@@ -5810,7 +5885,8 @@ static void write_7322_initregs(struct qib_devdata *dd) | |||
5810 | unsigned n, regno; | 5885 | unsigned n, regno; |
5811 | unsigned long flags; | 5886 | unsigned long flags; |
5812 | 5887 | ||
5813 | if (!dd->qpn_mask || !dd->pport[pidx].link_speed_supported) | 5888 | if (dd->n_krcv_queues < 2 || |
5889 | !dd->pport[pidx].link_speed_supported) | ||
5814 | continue; | 5890 | continue; |
5815 | 5891 | ||
5816 | ppd = &dd->pport[pidx]; | 5892 | ppd = &dd->pport[pidx]; |
@@ -6097,8 +6173,10 @@ static int qib_init_7322_variables(struct qib_devdata *dd) | |||
6097 | ppd++; | 6173 | ppd++; |
6098 | } | 6174 | } |
6099 | 6175 | ||
6100 | dd->rcvhdrentsize = QIB_RCVHDR_ENTSIZE; | 6176 | dd->rcvhdrentsize = qib_rcvhdrentsize ? |
6101 | dd->rcvhdrsize = QIB_DFLT_RCVHDRSIZE; | 6177 | qib_rcvhdrentsize : QIB_RCVHDR_ENTSIZE; |
6178 | dd->rcvhdrsize = qib_rcvhdrsize ? | ||
6179 | qib_rcvhdrsize : QIB_DFLT_RCVHDRSIZE; | ||
6102 | dd->rhf_offset = dd->rcvhdrentsize - sizeof(u64) / sizeof(u32); | 6180 | dd->rhf_offset = dd->rcvhdrentsize - sizeof(u64) / sizeof(u32); |
6103 | 6181 | ||
6104 | /* we always allocate at least 2048 bytes for eager buffers */ | 6182 | /* we always allocate at least 2048 bytes for eager buffers */ |
@@ -6495,7 +6573,7 @@ static void qib_7322_txchk_change(struct qib_devdata *dd, u32 start, | |||
6495 | /* make sure we see an updated copy next time around */ | 6573 | /* make sure we see an updated copy next time around */ |
6496 | sendctrl_7322_mod(dd->pport, QIB_SENDCTRL_AVAIL_BLIP); | 6574 | sendctrl_7322_mod(dd->pport, QIB_SENDCTRL_AVAIL_BLIP); |
6497 | sleeps++; | 6575 | sleeps++; |
6498 | msleep(1); | 6576 | msleep(20); |
6499 | } | 6577 | } |
6500 | 6578 | ||
6501 | switch (which) { | 6579 | switch (which) { |
@@ -6993,6 +7071,12 @@ static const struct txdds_ent txdds_extra_qdr[TXDDS_EXTRA_SZ] = { | |||
6993 | { 0, 1, 0, 12 }, /* QMH7342 backplane settings */ | 7071 | { 0, 1, 0, 12 }, /* QMH7342 backplane settings */ |
6994 | }; | 7072 | }; |
6995 | 7073 | ||
7074 | static const struct txdds_ent txdds_extra_mfg[TXDDS_MFG_SZ] = { | ||
7075 | /* amp, pre, main, post */ | ||
7076 | { 0, 0, 0, 0 }, /* QME7342 mfg settings */ | ||
7077 | { 0, 0, 0, 6 }, /* QME7342 P2 mfg settings */ | ||
7078 | }; | ||
7079 | |||
6996 | static const struct txdds_ent *get_atten_table(const struct txdds_ent *txdds, | 7080 | static const struct txdds_ent *get_atten_table(const struct txdds_ent *txdds, |
6997 | unsigned atten) | 7081 | unsigned atten) |
6998 | { | 7082 | { |
@@ -7066,6 +7150,16 @@ static void find_best_ent(struct qib_pportdata *ppd, | |||
7066 | *sdr_dds = &txdds_extra_sdr[idx]; | 7150 | *sdr_dds = &txdds_extra_sdr[idx]; |
7067 | *ddr_dds = &txdds_extra_ddr[idx]; | 7151 | *ddr_dds = &txdds_extra_ddr[idx]; |
7068 | *qdr_dds = &txdds_extra_qdr[idx]; | 7152 | *qdr_dds = &txdds_extra_qdr[idx]; |
7153 | } else if ((IS_QME(ppd->dd) || IS_QMH(ppd->dd)) && | ||
7154 | ppd->cpspec->no_eep < (TXDDS_TABLE_SZ + TXDDS_EXTRA_SZ + | ||
7155 | TXDDS_MFG_SZ)) { | ||
7156 | idx = ppd->cpspec->no_eep - (TXDDS_TABLE_SZ + TXDDS_EXTRA_SZ); | ||
7157 | printk(KERN_INFO QIB_DRV_NAME | ||
7158 | " IB%u:%u use idx %u into txdds_mfg\n", | ||
7159 | ppd->dd->unit, ppd->port, idx); | ||
7160 | *sdr_dds = &txdds_extra_mfg[idx]; | ||
7161 | *ddr_dds = &txdds_extra_mfg[idx]; | ||
7162 | *qdr_dds = &txdds_extra_mfg[idx]; | ||
7069 | } else { | 7163 | } else { |
7070 | /* this shouldn't happen, it's range checked */ | 7164 | /* this shouldn't happen, it's range checked */ |
7071 | *sdr_dds = txdds_sdr + qib_long_atten; | 7165 | *sdr_dds = txdds_sdr + qib_long_atten; |
@@ -7210,9 +7304,35 @@ static void ibsd_wr_allchans(struct qib_pportdata *ppd, int addr, unsigned data, | |||
7210 | } | 7304 | } |
7211 | } | 7305 | } |
7212 | 7306 | ||
7307 | static void serdes_7322_los_enable(struct qib_pportdata *ppd, int enable) | ||
7308 | { | ||
7309 | u64 data = qib_read_kreg_port(ppd, krp_serdesctrl); | ||
7310 | u8 state = SYM_FIELD(data, IBSerdesCtrl_0, RXLOSEN); | ||
7311 | |||
7312 | if (enable && !state) { | ||
7313 | printk(KERN_INFO QIB_DRV_NAME " IB%u:%u Turning LOS on\n", | ||
7314 | ppd->dd->unit, ppd->port); | ||
7315 | data |= SYM_MASK(IBSerdesCtrl_0, RXLOSEN); | ||
7316 | } else if (!enable && state) { | ||
7317 | printk(KERN_INFO QIB_DRV_NAME " IB%u:%u Turning LOS off\n", | ||
7318 | ppd->dd->unit, ppd->port); | ||
7319 | data &= ~SYM_MASK(IBSerdesCtrl_0, RXLOSEN); | ||
7320 | } | ||
7321 | qib_write_kreg_port(ppd, krp_serdesctrl, data); | ||
7322 | } | ||
7323 | |||
7213 | static int serdes_7322_init(struct qib_pportdata *ppd) | 7324 | static int serdes_7322_init(struct qib_pportdata *ppd) |
7214 | { | 7325 | { |
7215 | u64 data; | 7326 | int ret = 0; |
7327 | if (ppd->dd->cspec->r1) | ||
7328 | ret = serdes_7322_init_old(ppd); | ||
7329 | else | ||
7330 | ret = serdes_7322_init_new(ppd); | ||
7331 | return ret; | ||
7332 | } | ||
7333 | |||
7334 | static int serdes_7322_init_old(struct qib_pportdata *ppd) | ||
7335 | { | ||
7216 | u32 le_val; | 7336 | u32 le_val; |
7217 | 7337 | ||
7218 | /* | 7338 | /* |
@@ -7270,11 +7390,7 @@ static int serdes_7322_init(struct qib_pportdata *ppd) | |||
7270 | ibsd_wr_allchans(ppd, 20, (2 << 10), BMASK(12, 10)); /* DDR */ | 7390 | ibsd_wr_allchans(ppd, 20, (2 << 10), BMASK(12, 10)); /* DDR */ |
7271 | ibsd_wr_allchans(ppd, 20, (4 << 13), BMASK(15, 13)); /* SDR */ | 7391 | ibsd_wr_allchans(ppd, 20, (4 << 13), BMASK(15, 13)); /* SDR */ |
7272 | 7392 | ||
7273 | data = qib_read_kreg_port(ppd, krp_serdesctrl); | 7393 | serdes_7322_los_enable(ppd, 1); |
7274 | /* Turn off IB latency mode */ | ||
7275 | data &= ~SYM_MASK(IBSerdesCtrl_0, IB_LAT_MODE); | ||
7276 | qib_write_kreg_port(ppd, krp_serdesctrl, data | | ||
7277 | SYM_MASK(IBSerdesCtrl_0, RXLOSEN)); | ||
7278 | 7394 | ||
7279 | /* rxbistena; set 0 to avoid effects of it switch later */ | 7395 | /* rxbistena; set 0 to avoid effects of it switch later */ |
7280 | ibsd_wr_allchans(ppd, 9, 0 << 15, 1 << 15); | 7396 | ibsd_wr_allchans(ppd, 9, 0 << 15, 1 << 15); |
@@ -7314,6 +7430,206 @@ static int serdes_7322_init(struct qib_pportdata *ppd) | |||
7314 | return 0; | 7430 | return 0; |
7315 | } | 7431 | } |
7316 | 7432 | ||
7433 | static int serdes_7322_init_new(struct qib_pportdata *ppd) | ||
7434 | { | ||
7435 | u64 tstart; | ||
7436 | u32 le_val, rxcaldone; | ||
7437 | int chan, chan_done = (1 << SERDES_CHANS) - 1; | ||
7438 | |||
7439 | /* | ||
7440 | * Initialize the Tx DDS tables. Also done every QSFP event, | ||
7441 | * for adapters with QSFP | ||
7442 | */ | ||
7443 | init_txdds_table(ppd, 0); | ||
7444 | |||
7445 | /* Clear cmode-override, may be set from older driver */ | ||
7446 | ahb_mod(ppd->dd, IBSD(ppd->hw_pidx), 5, 10, 0 << 14, 1 << 14); | ||
7447 | |||
7448 | /* ensure no tx overrides from earlier driver loads */ | ||
7449 | qib_write_kreg_port(ppd, krp_tx_deemph_override, | ||
7450 | SYM_MASK(IBSD_TX_DEEMPHASIS_OVERRIDE_0, | ||
7451 | reset_tx_deemphasis_override)); | ||
7452 | |||
7453 | /* START OF LSI SUGGESTED SERDES BRINGUP */ | ||
7454 | /* Reset - Calibration Setup */ | ||
7455 | /* Stop DFE adaptaion */ | ||
7456 | ibsd_wr_allchans(ppd, 1, 0, BMASK(9, 1)); | ||
7457 | /* Disable LE1 */ | ||
7458 | ibsd_wr_allchans(ppd, 13, 0, BMASK(5, 5)); | ||
7459 | /* Disable autoadapt for LE1 */ | ||
7460 | ibsd_wr_allchans(ppd, 1, 0, BMASK(15, 15)); | ||
7461 | /* Disable LE2 */ | ||
7462 | ibsd_wr_allchans(ppd, 13, 0, BMASK(6, 6)); | ||
7463 | /* Disable VGA */ | ||
7464 | ibsd_wr_allchans(ppd, 5, 0, BMASK(0, 0)); | ||
7465 | /* Disable AFE Offset Cancel */ | ||
7466 | ibsd_wr_allchans(ppd, 12, 0, BMASK(12, 12)); | ||
7467 | /* Disable Timing Loop */ | ||
7468 | ibsd_wr_allchans(ppd, 2, 0, BMASK(3, 3)); | ||
7469 | /* Disable Frequency Loop */ | ||
7470 | ibsd_wr_allchans(ppd, 2, 0, BMASK(4, 4)); | ||
7471 | /* Disable Baseline Wander Correction */ | ||
7472 | ibsd_wr_allchans(ppd, 13, 0, BMASK(13, 13)); | ||
7473 | /* Disable RX Calibration */ | ||
7474 | ibsd_wr_allchans(ppd, 4, 0, BMASK(10, 10)); | ||
7475 | /* Disable RX Offset Calibration */ | ||
7476 | ibsd_wr_allchans(ppd, 12, 0, BMASK(4, 4)); | ||
7477 | /* Select BB CDR */ | ||
7478 | ibsd_wr_allchans(ppd, 2, (1 << 15), BMASK(15, 15)); | ||
7479 | /* CDR Step Size */ | ||
7480 | ibsd_wr_allchans(ppd, 5, 0, BMASK(9, 8)); | ||
7481 | /* Enable phase Calibration */ | ||
7482 | ibsd_wr_allchans(ppd, 12, (1 << 5), BMASK(5, 5)); | ||
7483 | /* DFE Bandwidth [2:14-12] */ | ||
7484 | ibsd_wr_allchans(ppd, 2, (4 << 12), BMASK(14, 12)); | ||
7485 | /* DFE Config (4 taps only) */ | ||
7486 | ibsd_wr_allchans(ppd, 16, 0, BMASK(1, 0)); | ||
7487 | /* Gain Loop Bandwidth */ | ||
7488 | if (!ppd->dd->cspec->r1) { | ||
7489 | ibsd_wr_allchans(ppd, 12, 1 << 12, BMASK(12, 12)); | ||
7490 | ibsd_wr_allchans(ppd, 12, 2 << 8, BMASK(11, 8)); | ||
7491 | } else { | ||
7492 | ibsd_wr_allchans(ppd, 19, (3 << 11), BMASK(13, 11)); | ||
7493 | } | ||
7494 | /* Baseline Wander Correction Gain [13:4-0] (leave as default) */ | ||
7495 | /* Baseline Wander Correction Gain [3:7-5] (leave as default) */ | ||
7496 | /* Data Rate Select [5:7-6] (leave as default) */ | ||
7497 | /* RX Parallel Word Width [3:10-8] (leave as default) */ | ||
7498 | |||
7499 | /* RX REST */ | ||
7500 | /* Single- or Multi-channel reset */ | ||
7501 | /* RX Analog reset */ | ||
7502 | /* RX Digital reset */ | ||
7503 | ibsd_wr_allchans(ppd, 0, 0, BMASK(15, 13)); | ||
7504 | msleep(20); | ||
7505 | /* RX Analog reset */ | ||
7506 | ibsd_wr_allchans(ppd, 0, (1 << 14), BMASK(14, 14)); | ||
7507 | msleep(20); | ||
7508 | /* RX Digital reset */ | ||
7509 | ibsd_wr_allchans(ppd, 0, (1 << 13), BMASK(13, 13)); | ||
7510 | msleep(20); | ||
7511 | |||
7512 | /* setup LoS params; these are subsystem, so chan == 5 */ | ||
7513 | /* LoS filter threshold_count on, ch 0-3, set to 8 */ | ||
7514 | ahb_mod(ppd->dd, IBSD(ppd->hw_pidx), 5, 5, 8 << 11, BMASK(14, 11)); | ||
7515 | ahb_mod(ppd->dd, IBSD(ppd->hw_pidx), 5, 7, 8 << 4, BMASK(7, 4)); | ||
7516 | ahb_mod(ppd->dd, IBSD(ppd->hw_pidx), 5, 8, 8 << 11, BMASK(14, 11)); | ||
7517 | ahb_mod(ppd->dd, IBSD(ppd->hw_pidx), 5, 10, 8 << 4, BMASK(7, 4)); | ||
7518 | |||
7519 | /* LoS filter threshold_count off, ch 0-3, set to 4 */ | ||
7520 | ahb_mod(ppd->dd, IBSD(ppd->hw_pidx), 5, 6, 4 << 0, BMASK(3, 0)); | ||
7521 | ahb_mod(ppd->dd, IBSD(ppd->hw_pidx), 5, 7, 4 << 8, BMASK(11, 8)); | ||
7522 | ahb_mod(ppd->dd, IBSD(ppd->hw_pidx), 5, 9, 4 << 0, BMASK(3, 0)); | ||
7523 | ahb_mod(ppd->dd, IBSD(ppd->hw_pidx), 5, 10, 4 << 8, BMASK(11, 8)); | ||
7524 | |||
7525 | /* LoS filter select enabled */ | ||
7526 | ahb_mod(ppd->dd, IBSD(ppd->hw_pidx), 5, 9, 1 << 15, 1 << 15); | ||
7527 | |||
7528 | /* LoS target data: SDR=4, DDR=2, QDR=1 */ | ||
7529 | ibsd_wr_allchans(ppd, 14, (1 << 3), BMASK(5, 3)); /* QDR */ | ||
7530 | ibsd_wr_allchans(ppd, 20, (2 << 10), BMASK(12, 10)); /* DDR */ | ||
7531 | ibsd_wr_allchans(ppd, 20, (4 << 13), BMASK(15, 13)); /* SDR */ | ||
7532 | |||
7533 | /* Turn on LOS on initial SERDES init */ | ||
7534 | serdes_7322_los_enable(ppd, 1); | ||
7535 | /* FLoop LOS gate: PPM filter enabled */ | ||
7536 | ibsd_wr_allchans(ppd, 38, 0 << 10, 1 << 10); | ||
7537 | |||
7538 | /* RX LATCH CALIBRATION */ | ||
7539 | /* Enable Eyefinder Phase Calibration latch */ | ||
7540 | ibsd_wr_allchans(ppd, 15, 1, BMASK(0, 0)); | ||
7541 | /* Enable RX Offset Calibration latch */ | ||
7542 | ibsd_wr_allchans(ppd, 12, (1 << 4), BMASK(4, 4)); | ||
7543 | msleep(20); | ||
7544 | /* Start Calibration */ | ||
7545 | ibsd_wr_allchans(ppd, 4, (1 << 10), BMASK(10, 10)); | ||
7546 | tstart = get_jiffies_64(); | ||
7547 | while (chan_done && | ||
7548 | !time_after64(get_jiffies_64(), | ||
7549 | tstart + msecs_to_jiffies(500))) { | ||
7550 | msleep(20); | ||
7551 | for (chan = 0; chan < SERDES_CHANS; ++chan) { | ||
7552 | rxcaldone = ahb_mod(ppd->dd, IBSD(ppd->hw_pidx), | ||
7553 | (chan + (chan >> 1)), | ||
7554 | 25, 0, 0); | ||
7555 | if ((~rxcaldone & (u32)BMASK(9, 9)) == 0 && | ||
7556 | (~chan_done & (1 << chan)) == 0) | ||
7557 | chan_done &= ~(1 << chan); | ||
7558 | } | ||
7559 | } | ||
7560 | if (chan_done) { | ||
7561 | printk(KERN_INFO QIB_DRV_NAME | ||
7562 | " Serdes %d calibration not done after .5 sec: 0x%x\n", | ||
7563 | IBSD(ppd->hw_pidx), chan_done); | ||
7564 | } else { | ||
7565 | for (chan = 0; chan < SERDES_CHANS; ++chan) { | ||
7566 | rxcaldone = ahb_mod(ppd->dd, IBSD(ppd->hw_pidx), | ||
7567 | (chan + (chan >> 1)), | ||
7568 | 25, 0, 0); | ||
7569 | if ((~rxcaldone & (u32)BMASK(10, 10)) == 0) | ||
7570 | printk(KERN_INFO QIB_DRV_NAME | ||
7571 | " Serdes %d chan %d calibration " | ||
7572 | "failed\n", IBSD(ppd->hw_pidx), chan); | ||
7573 | } | ||
7574 | } | ||
7575 | |||
7576 | /* Turn off Calibration */ | ||
7577 | ibsd_wr_allchans(ppd, 4, 0, BMASK(10, 10)); | ||
7578 | msleep(20); | ||
7579 | |||
7580 | /* BRING RX UP */ | ||
7581 | /* Set LE2 value (May be overridden in qsfp_7322_event) */ | ||
7582 | le_val = IS_QME(ppd->dd) ? LE2_QME : LE2_DEFAULT; | ||
7583 | ibsd_wr_allchans(ppd, 13, (le_val << 7), BMASK(9, 7)); | ||
7584 | /* Set LE2 Loop bandwidth */ | ||
7585 | ibsd_wr_allchans(ppd, 3, (7 << 5), BMASK(7, 5)); | ||
7586 | /* Enable LE2 */ | ||
7587 | ibsd_wr_allchans(ppd, 13, (1 << 6), BMASK(6, 6)); | ||
7588 | msleep(20); | ||
7589 | /* Enable H0 only */ | ||
7590 | ibsd_wr_allchans(ppd, 1, 1, BMASK(9, 1)); | ||
7591 | /* gain hi stop 32 (22) (6:1) lo stop 7 (10:7) target 22 (13) (15:11) */ | ||
7592 | le_val = (ppd->dd->cspec->r1 || IS_QME(ppd->dd)) ? 0xb6c0 : 0x6bac; | ||
7593 | ibsd_wr_allchans(ppd, 21, le_val, 0xfffe); | ||
7594 | /* Enable VGA */ | ||
7595 | ibsd_wr_allchans(ppd, 5, 0, BMASK(0, 0)); | ||
7596 | msleep(20); | ||
7597 | /* Set Frequency Loop Bandwidth */ | ||
7598 | ibsd_wr_allchans(ppd, 2, (7 << 5), BMASK(8, 5)); | ||
7599 | /* Enable Frequency Loop */ | ||
7600 | ibsd_wr_allchans(ppd, 2, (1 << 4), BMASK(4, 4)); | ||
7601 | /* Set Timing Loop Bandwidth */ | ||
7602 | ibsd_wr_allchans(ppd, 2, 0, BMASK(11, 9)); | ||
7603 | /* Enable Timing Loop */ | ||
7604 | ibsd_wr_allchans(ppd, 2, (1 << 3), BMASK(3, 3)); | ||
7605 | msleep(50); | ||
7606 | /* Enable DFE | ||
7607 | * Set receive adaptation mode. SDR and DDR adaptation are | ||
7608 | * always on, and QDR is initially enabled; later disabled. | ||
7609 | */ | ||
7610 | qib_write_kreg_port(ppd, krp_static_adapt_dis(0), 0ULL); | ||
7611 | qib_write_kreg_port(ppd, krp_static_adapt_dis(1), 0ULL); | ||
7612 | qib_write_kreg_port(ppd, krp_static_adapt_dis(2), | ||
7613 | ppd->dd->cspec->r1 ? | ||
7614 | QDR_STATIC_ADAPT_DOWN_R1 : QDR_STATIC_ADAPT_DOWN); | ||
7615 | ppd->cpspec->qdr_dfe_on = 1; | ||
7616 | /* Disable LE1 */ | ||
7617 | ibsd_wr_allchans(ppd, 13, (0 << 5), (1 << 5)); | ||
7618 | /* Disable auto adapt for LE1 */ | ||
7619 | ibsd_wr_allchans(ppd, 1, (0 << 15), BMASK(15, 15)); | ||
7620 | msleep(20); | ||
7621 | /* Enable AFE Offset Cancel */ | ||
7622 | ibsd_wr_allchans(ppd, 12, (1 << 12), BMASK(12, 12)); | ||
7623 | /* Enable Baseline Wander Correction */ | ||
7624 | ibsd_wr_allchans(ppd, 12, (1 << 13), BMASK(13, 13)); | ||
7625 | /* Termination: rxtermctrl_r2d addr 11 bits [12:11] = 1 */ | ||
7626 | ibsd_wr_allchans(ppd, 11, (1 << 11), BMASK(12, 11)); | ||
7627 | /* VGA output common mode */ | ||
7628 | ibsd_wr_allchans(ppd, 12, (3 << 2), BMASK(3, 2)); | ||
7629 | |||
7630 | return 0; | ||
7631 | } | ||
7632 | |||
7317 | /* start adjust QMH serdes parameters */ | 7633 | /* start adjust QMH serdes parameters */ |
7318 | 7634 | ||
7319 | static void set_man_code(struct qib_pportdata *ppd, int chan, int code) | 7635 | static void set_man_code(struct qib_pportdata *ppd, int chan, int code) |
diff --git a/drivers/infiniband/hw/qib/qib_init.c b/drivers/infiniband/hw/qib/qib_init.c index f1d16d3a01f6..a01f3fce8eb3 100644 --- a/drivers/infiniband/hw/qib/qib_init.c +++ b/drivers/infiniband/hw/qib/qib_init.c | |||
@@ -80,7 +80,6 @@ unsigned qib_wc_pat = 1; /* default (1) is to use PAT, not MTRR */ | |||
80 | module_param_named(wc_pat, qib_wc_pat, uint, S_IRUGO); | 80 | module_param_named(wc_pat, qib_wc_pat, uint, S_IRUGO); |
81 | MODULE_PARM_DESC(wc_pat, "enable write-combining via PAT mechanism"); | 81 | MODULE_PARM_DESC(wc_pat, "enable write-combining via PAT mechanism"); |
82 | 82 | ||
83 | struct workqueue_struct *qib_wq; | ||
84 | struct workqueue_struct *qib_cq_wq; | 83 | struct workqueue_struct *qib_cq_wq; |
85 | 84 | ||
86 | static void verify_interrupt(unsigned long); | 85 | static void verify_interrupt(unsigned long); |
@@ -92,9 +91,11 @@ unsigned long *qib_cpulist; | |||
92 | /* set number of contexts we'll actually use */ | 91 | /* set number of contexts we'll actually use */ |
93 | void qib_set_ctxtcnt(struct qib_devdata *dd) | 92 | void qib_set_ctxtcnt(struct qib_devdata *dd) |
94 | { | 93 | { |
95 | if (!qib_cfgctxts) | 94 | if (!qib_cfgctxts) { |
96 | dd->cfgctxts = dd->first_user_ctxt + num_online_cpus(); | 95 | dd->cfgctxts = dd->first_user_ctxt + num_online_cpus(); |
97 | else if (qib_cfgctxts < dd->num_pports) | 96 | if (dd->cfgctxts > dd->ctxtcnt) |
97 | dd->cfgctxts = dd->ctxtcnt; | ||
98 | } else if (qib_cfgctxts < dd->num_pports) | ||
98 | dd->cfgctxts = dd->ctxtcnt; | 99 | dd->cfgctxts = dd->ctxtcnt; |
99 | else if (qib_cfgctxts <= dd->ctxtcnt) | 100 | else if (qib_cfgctxts <= dd->ctxtcnt) |
100 | dd->cfgctxts = qib_cfgctxts; | 101 | dd->cfgctxts = qib_cfgctxts; |
@@ -268,23 +269,20 @@ static void init_shadow_tids(struct qib_devdata *dd) | |||
268 | struct page **pages; | 269 | struct page **pages; |
269 | dma_addr_t *addrs; | 270 | dma_addr_t *addrs; |
270 | 271 | ||
271 | pages = vmalloc(dd->cfgctxts * dd->rcvtidcnt * sizeof(struct page *)); | 272 | pages = vzalloc(dd->cfgctxts * dd->rcvtidcnt * sizeof(struct page *)); |
272 | if (!pages) { | 273 | if (!pages) { |
273 | qib_dev_err(dd, "failed to allocate shadow page * " | 274 | qib_dev_err(dd, "failed to allocate shadow page * " |
274 | "array, no expected sends!\n"); | 275 | "array, no expected sends!\n"); |
275 | goto bail; | 276 | goto bail; |
276 | } | 277 | } |
277 | 278 | ||
278 | addrs = vmalloc(dd->cfgctxts * dd->rcvtidcnt * sizeof(dma_addr_t)); | 279 | addrs = vzalloc(dd->cfgctxts * dd->rcvtidcnt * sizeof(dma_addr_t)); |
279 | if (!addrs) { | 280 | if (!addrs) { |
280 | qib_dev_err(dd, "failed to allocate shadow dma handle " | 281 | qib_dev_err(dd, "failed to allocate shadow dma handle " |
281 | "array, no expected sends!\n"); | 282 | "array, no expected sends!\n"); |
282 | goto bail_free; | 283 | goto bail_free; |
283 | } | 284 | } |
284 | 285 | ||
285 | memset(pages, 0, dd->cfgctxts * dd->rcvtidcnt * sizeof(struct page *)); | ||
286 | memset(addrs, 0, dd->cfgctxts * dd->rcvtidcnt * sizeof(dma_addr_t)); | ||
287 | |||
288 | dd->pageshadow = pages; | 286 | dd->pageshadow = pages; |
289 | dd->physshadow = addrs; | 287 | dd->physshadow = addrs; |
290 | return; | 288 | return; |
@@ -348,7 +346,7 @@ done: | |||
348 | * @dd: the qlogic_ib device | 346 | * @dd: the qlogic_ib device |
349 | * | 347 | * |
350 | * sanity check at least some of the values after reset, and | 348 | * sanity check at least some of the values after reset, and |
351 | * ensure no receive or transmit (explictly, in case reset | 349 | * ensure no receive or transmit (explicitly, in case reset |
352 | * failed | 350 | * failed |
353 | */ | 351 | */ |
354 | static int init_after_reset(struct qib_devdata *dd) | 352 | static int init_after_reset(struct qib_devdata *dd) |
@@ -1045,24 +1043,10 @@ static int __init qlogic_ib_init(void) | |||
1045 | if (ret) | 1043 | if (ret) |
1046 | goto bail; | 1044 | goto bail; |
1047 | 1045 | ||
1048 | /* | ||
1049 | * We create our own workqueue mainly because we want to be | ||
1050 | * able to flush it when devices are being removed. We can't | ||
1051 | * use schedule_work()/flush_scheduled_work() because both | ||
1052 | * unregister_netdev() and linkwatch_event take the rtnl lock, | ||
1053 | * so flush_scheduled_work() can deadlock during device | ||
1054 | * removal. | ||
1055 | */ | ||
1056 | qib_wq = create_workqueue("qib"); | ||
1057 | if (!qib_wq) { | ||
1058 | ret = -ENOMEM; | ||
1059 | goto bail_dev; | ||
1060 | } | ||
1061 | |||
1062 | qib_cq_wq = create_singlethread_workqueue("qib_cq"); | 1046 | qib_cq_wq = create_singlethread_workqueue("qib_cq"); |
1063 | if (!qib_cq_wq) { | 1047 | if (!qib_cq_wq) { |
1064 | ret = -ENOMEM; | 1048 | ret = -ENOMEM; |
1065 | goto bail_wq; | 1049 | goto bail_dev; |
1066 | } | 1050 | } |
1067 | 1051 | ||
1068 | /* | 1052 | /* |
@@ -1092,8 +1076,6 @@ bail_unit: | |||
1092 | idr_destroy(&qib_unit_table); | 1076 | idr_destroy(&qib_unit_table); |
1093 | bail_cq_wq: | 1077 | bail_cq_wq: |
1094 | destroy_workqueue(qib_cq_wq); | 1078 | destroy_workqueue(qib_cq_wq); |
1095 | bail_wq: | ||
1096 | destroy_workqueue(qib_wq); | ||
1097 | bail_dev: | 1079 | bail_dev: |
1098 | qib_dev_cleanup(); | 1080 | qib_dev_cleanup(); |
1099 | bail: | 1081 | bail: |
@@ -1117,7 +1099,6 @@ static void __exit qlogic_ib_cleanup(void) | |||
1117 | 1099 | ||
1118 | pci_unregister_driver(&qib_driver); | 1100 | pci_unregister_driver(&qib_driver); |
1119 | 1101 | ||
1120 | destroy_workqueue(qib_wq); | ||
1121 | destroy_workqueue(qib_cq_wq); | 1102 | destroy_workqueue(qib_cq_wq); |
1122 | 1103 | ||
1123 | qib_cpulist_count = 0; | 1104 | qib_cpulist_count = 0; |
@@ -1243,6 +1224,7 @@ static int __devinit qib_init_one(struct pci_dev *pdev, | |||
1243 | qib_early_err(&pdev->dev, "QLogic PCIE device 0x%x cannot " | 1224 | qib_early_err(&pdev->dev, "QLogic PCIE device 0x%x cannot " |
1244 | "work if CONFIG_PCI_MSI is not enabled\n", | 1225 | "work if CONFIG_PCI_MSI is not enabled\n", |
1245 | ent->device); | 1226 | ent->device); |
1227 | dd = ERR_PTR(-ENODEV); | ||
1246 | #endif | 1228 | #endif |
1247 | break; | 1229 | break; |
1248 | 1230 | ||
@@ -1289,7 +1271,7 @@ static int __devinit qib_init_one(struct pci_dev *pdev, | |||
1289 | 1271 | ||
1290 | if (qib_mini_init || initfail || ret) { | 1272 | if (qib_mini_init || initfail || ret) { |
1291 | qib_stop_timers(dd); | 1273 | qib_stop_timers(dd); |
1292 | flush_scheduled_work(); | 1274 | flush_workqueue(ib_wq); |
1293 | for (pidx = 0; pidx < dd->num_pports; ++pidx) | 1275 | for (pidx = 0; pidx < dd->num_pports; ++pidx) |
1294 | dd->f_quiet_serdes(dd->pport + pidx); | 1276 | dd->f_quiet_serdes(dd->pport + pidx); |
1295 | if (qib_mini_init) | 1277 | if (qib_mini_init) |
@@ -1338,8 +1320,8 @@ static void __devexit qib_remove_one(struct pci_dev *pdev) | |||
1338 | 1320 | ||
1339 | qib_stop_timers(dd); | 1321 | qib_stop_timers(dd); |
1340 | 1322 | ||
1341 | /* wait until all of our (qsfp) schedule_work() calls complete */ | 1323 | /* wait until all of our (qsfp) queue_work() calls complete */ |
1342 | flush_scheduled_work(); | 1324 | flush_workqueue(ib_wq); |
1343 | 1325 | ||
1344 | ret = qibfs_remove(dd); | 1326 | ret = qibfs_remove(dd); |
1345 | if (ret) | 1327 | if (ret) |
diff --git a/drivers/infiniband/hw/qib/qib_intr.c b/drivers/infiniband/hw/qib/qib_intr.c index 54a40828a106..6ae57d23004a 100644 --- a/drivers/infiniband/hw/qib/qib_intr.c +++ b/drivers/infiniband/hw/qib/qib_intr.c | |||
@@ -96,8 +96,12 @@ void qib_handle_e_ibstatuschanged(struct qib_pportdata *ppd, u64 ibcs) | |||
96 | * states, or if it transitions from any of the up (INIT or better) | 96 | * states, or if it transitions from any of the up (INIT or better) |
97 | * states into any of the down states (except link recovery), then | 97 | * states into any of the down states (except link recovery), then |
98 | * call the chip-specific code to take appropriate actions. | 98 | * call the chip-specific code to take appropriate actions. |
99 | * | ||
100 | * ppd->lflags could be 0 if this is the first time the interrupt | ||
101 | * handlers has been called but the link is already up. | ||
99 | */ | 102 | */ |
100 | if (lstate >= IB_PORT_INIT && (ppd->lflags & QIBL_LINKDOWN) && | 103 | if (lstate >= IB_PORT_INIT && |
104 | (!ppd->lflags || (ppd->lflags & QIBL_LINKDOWN)) && | ||
101 | ltstate == IB_PHYSPORTSTATE_LINKUP) { | 105 | ltstate == IB_PHYSPORTSTATE_LINKUP) { |
102 | /* transitioned to UP */ | 106 | /* transitioned to UP */ |
103 | if (dd->f_ib_updown(ppd, 1, ibcs)) | 107 | if (dd->f_ib_updown(ppd, 1, ibcs)) |
@@ -131,7 +135,8 @@ void qib_handle_e_ibstatuschanged(struct qib_pportdata *ppd, u64 ibcs) | |||
131 | /* start a 75msec timer to clear symbol errors */ | 135 | /* start a 75msec timer to clear symbol errors */ |
132 | mod_timer(&ppd->symerr_clear_timer, | 136 | mod_timer(&ppd->symerr_clear_timer, |
133 | msecs_to_jiffies(75)); | 137 | msecs_to_jiffies(75)); |
134 | } else if (ltstate == IB_PHYSPORTSTATE_LINKUP) { | 138 | } else if (ltstate == IB_PHYSPORTSTATE_LINKUP && |
139 | !(ppd->lflags & QIBL_LINKACTIVE)) { | ||
135 | /* active, but not active defered */ | 140 | /* active, but not active defered */ |
136 | qib_hol_up(ppd); /* useful only for 6120 now */ | 141 | qib_hol_up(ppd); /* useful only for 6120 now */ |
137 | *ppd->statusp |= | 142 | *ppd->statusp |= |
diff --git a/drivers/infiniband/hw/qib/qib_keys.c b/drivers/infiniband/hw/qib/qib_keys.c index 4b80eb153d57..8fd19a47df0c 100644 --- a/drivers/infiniband/hw/qib/qib_keys.c +++ b/drivers/infiniband/hw/qib/qib_keys.c | |||
@@ -136,7 +136,6 @@ int qib_lkey_ok(struct qib_lkey_table *rkt, struct qib_pd *pd, | |||
136 | struct qib_mregion *mr; | 136 | struct qib_mregion *mr; |
137 | unsigned n, m; | 137 | unsigned n, m; |
138 | size_t off; | 138 | size_t off; |
139 | int ret = 0; | ||
140 | unsigned long flags; | 139 | unsigned long flags; |
141 | 140 | ||
142 | /* | 141 | /* |
@@ -152,6 +151,8 @@ int qib_lkey_ok(struct qib_lkey_table *rkt, struct qib_pd *pd, | |||
152 | if (!dev->dma_mr) | 151 | if (!dev->dma_mr) |
153 | goto bail; | 152 | goto bail; |
154 | atomic_inc(&dev->dma_mr->refcount); | 153 | atomic_inc(&dev->dma_mr->refcount); |
154 | spin_unlock_irqrestore(&rkt->lock, flags); | ||
155 | |||
155 | isge->mr = dev->dma_mr; | 156 | isge->mr = dev->dma_mr; |
156 | isge->vaddr = (void *) sge->addr; | 157 | isge->vaddr = (void *) sge->addr; |
157 | isge->length = sge->length; | 158 | isge->length = sge->length; |
@@ -170,19 +171,34 @@ int qib_lkey_ok(struct qib_lkey_table *rkt, struct qib_pd *pd, | |||
170 | off + sge->length > mr->length || | 171 | off + sge->length > mr->length || |
171 | (mr->access_flags & acc) != acc)) | 172 | (mr->access_flags & acc) != acc)) |
172 | goto bail; | 173 | goto bail; |
174 | atomic_inc(&mr->refcount); | ||
175 | spin_unlock_irqrestore(&rkt->lock, flags); | ||
173 | 176 | ||
174 | off += mr->offset; | 177 | off += mr->offset; |
175 | m = 0; | 178 | if (mr->page_shift) { |
176 | n = 0; | 179 | /* |
177 | while (off >= mr->map[m]->segs[n].length) { | 180 | page sizes are uniform power of 2 so no loop is necessary |
178 | off -= mr->map[m]->segs[n].length; | 181 | entries_spanned_by_off is the number of times the loop below |
179 | n++; | 182 | would have executed. |
180 | if (n >= QIB_SEGSZ) { | 183 | */ |
181 | m++; | 184 | size_t entries_spanned_by_off; |
182 | n = 0; | 185 | |
186 | entries_spanned_by_off = off >> mr->page_shift; | ||
187 | off -= (entries_spanned_by_off << mr->page_shift); | ||
188 | m = entries_spanned_by_off/QIB_SEGSZ; | ||
189 | n = entries_spanned_by_off%QIB_SEGSZ; | ||
190 | } else { | ||
191 | m = 0; | ||
192 | n = 0; | ||
193 | while (off >= mr->map[m]->segs[n].length) { | ||
194 | off -= mr->map[m]->segs[n].length; | ||
195 | n++; | ||
196 | if (n >= QIB_SEGSZ) { | ||
197 | m++; | ||
198 | n = 0; | ||
199 | } | ||
183 | } | 200 | } |
184 | } | 201 | } |
185 | atomic_inc(&mr->refcount); | ||
186 | isge->mr = mr; | 202 | isge->mr = mr; |
187 | isge->vaddr = mr->map[m]->segs[n].vaddr + off; | 203 | isge->vaddr = mr->map[m]->segs[n].vaddr + off; |
188 | isge->length = mr->map[m]->segs[n].length - off; | 204 | isge->length = mr->map[m]->segs[n].length - off; |
@@ -190,10 +206,10 @@ int qib_lkey_ok(struct qib_lkey_table *rkt, struct qib_pd *pd, | |||
190 | isge->m = m; | 206 | isge->m = m; |
191 | isge->n = n; | 207 | isge->n = n; |
192 | ok: | 208 | ok: |
193 | ret = 1; | 209 | return 1; |
194 | bail: | 210 | bail: |
195 | spin_unlock_irqrestore(&rkt->lock, flags); | 211 | spin_unlock_irqrestore(&rkt->lock, flags); |
196 | return ret; | 212 | return 0; |
197 | } | 213 | } |
198 | 214 | ||
199 | /** | 215 | /** |
@@ -214,7 +230,6 @@ int qib_rkey_ok(struct qib_qp *qp, struct qib_sge *sge, | |||
214 | struct qib_mregion *mr; | 230 | struct qib_mregion *mr; |
215 | unsigned n, m; | 231 | unsigned n, m; |
216 | size_t off; | 232 | size_t off; |
217 | int ret = 0; | ||
218 | unsigned long flags; | 233 | unsigned long flags; |
219 | 234 | ||
220 | /* | 235 | /* |
@@ -231,6 +246,8 @@ int qib_rkey_ok(struct qib_qp *qp, struct qib_sge *sge, | |||
231 | if (!dev->dma_mr) | 246 | if (!dev->dma_mr) |
232 | goto bail; | 247 | goto bail; |
233 | atomic_inc(&dev->dma_mr->refcount); | 248 | atomic_inc(&dev->dma_mr->refcount); |
249 | spin_unlock_irqrestore(&rkt->lock, flags); | ||
250 | |||
234 | sge->mr = dev->dma_mr; | 251 | sge->mr = dev->dma_mr; |
235 | sge->vaddr = (void *) vaddr; | 252 | sge->vaddr = (void *) vaddr; |
236 | sge->length = len; | 253 | sge->length = len; |
@@ -248,19 +265,34 @@ int qib_rkey_ok(struct qib_qp *qp, struct qib_sge *sge, | |||
248 | if (unlikely(vaddr < mr->iova || off + len > mr->length || | 265 | if (unlikely(vaddr < mr->iova || off + len > mr->length || |
249 | (mr->access_flags & acc) == 0)) | 266 | (mr->access_flags & acc) == 0)) |
250 | goto bail; | 267 | goto bail; |
268 | atomic_inc(&mr->refcount); | ||
269 | spin_unlock_irqrestore(&rkt->lock, flags); | ||
251 | 270 | ||
252 | off += mr->offset; | 271 | off += mr->offset; |
253 | m = 0; | 272 | if (mr->page_shift) { |
254 | n = 0; | 273 | /* |
255 | while (off >= mr->map[m]->segs[n].length) { | 274 | page sizes are uniform power of 2 so no loop is necessary |
256 | off -= mr->map[m]->segs[n].length; | 275 | entries_spanned_by_off is the number of times the loop below |
257 | n++; | 276 | would have executed. |
258 | if (n >= QIB_SEGSZ) { | 277 | */ |
259 | m++; | 278 | size_t entries_spanned_by_off; |
260 | n = 0; | 279 | |
280 | entries_spanned_by_off = off >> mr->page_shift; | ||
281 | off -= (entries_spanned_by_off << mr->page_shift); | ||
282 | m = entries_spanned_by_off/QIB_SEGSZ; | ||
283 | n = entries_spanned_by_off%QIB_SEGSZ; | ||
284 | } else { | ||
285 | m = 0; | ||
286 | n = 0; | ||
287 | while (off >= mr->map[m]->segs[n].length) { | ||
288 | off -= mr->map[m]->segs[n].length; | ||
289 | n++; | ||
290 | if (n >= QIB_SEGSZ) { | ||
291 | m++; | ||
292 | n = 0; | ||
293 | } | ||
261 | } | 294 | } |
262 | } | 295 | } |
263 | atomic_inc(&mr->refcount); | ||
264 | sge->mr = mr; | 296 | sge->mr = mr; |
265 | sge->vaddr = mr->map[m]->segs[n].vaddr + off; | 297 | sge->vaddr = mr->map[m]->segs[n].vaddr + off; |
266 | sge->length = mr->map[m]->segs[n].length - off; | 298 | sge->length = mr->map[m]->segs[n].length - off; |
@@ -268,10 +300,10 @@ int qib_rkey_ok(struct qib_qp *qp, struct qib_sge *sge, | |||
268 | sge->m = m; | 300 | sge->m = m; |
269 | sge->n = n; | 301 | sge->n = n; |
270 | ok: | 302 | ok: |
271 | ret = 1; | 303 | return 1; |
272 | bail: | 304 | bail: |
273 | spin_unlock_irqrestore(&rkt->lock, flags); | 305 | spin_unlock_irqrestore(&rkt->lock, flags); |
274 | return ret; | 306 | return 0; |
275 | } | 307 | } |
276 | 308 | ||
277 | /* | 309 | /* |
diff --git a/drivers/infiniband/hw/qib/qib_mad.c b/drivers/infiniband/hw/qib/qib_mad.c index 94b0d1f3a8f0..8fd3df5bf04d 100644 --- a/drivers/infiniband/hw/qib/qib_mad.c +++ b/drivers/infiniband/hw/qib/qib_mad.c | |||
@@ -464,8 +464,9 @@ static int subn_get_portinfo(struct ib_smp *smp, struct ib_device *ibdev, | |||
464 | memset(smp->data, 0, sizeof(smp->data)); | 464 | memset(smp->data, 0, sizeof(smp->data)); |
465 | 465 | ||
466 | /* Only return the mkey if the protection field allows it. */ | 466 | /* Only return the mkey if the protection field allows it. */ |
467 | if (smp->method == IB_MGMT_METHOD_SET || ibp->mkey == smp->mkey || | 467 | if (!(smp->method == IB_MGMT_METHOD_GET && |
468 | ibp->mkeyprot == 0) | 468 | ibp->mkey != smp->mkey && |
469 | ibp->mkeyprot == 1)) | ||
469 | pip->mkey = ibp->mkey; | 470 | pip->mkey = ibp->mkey; |
470 | pip->gid_prefix = ibp->gid_prefix; | 471 | pip->gid_prefix = ibp->gid_prefix; |
471 | lid = ppd->lid; | 472 | lid = ppd->lid; |
@@ -668,8 +669,8 @@ static int subn_set_portinfo(struct ib_smp *smp, struct ib_device *ibdev, | |||
668 | lid = be16_to_cpu(pip->lid); | 669 | lid = be16_to_cpu(pip->lid); |
669 | /* Must be a valid unicast LID address. */ | 670 | /* Must be a valid unicast LID address. */ |
670 | if (lid == 0 || lid >= QIB_MULTICAST_LID_BASE) | 671 | if (lid == 0 || lid >= QIB_MULTICAST_LID_BASE) |
671 | goto err; | 672 | smp->status |= IB_SMP_INVALID_FIELD; |
672 | if (ppd->lid != lid || ppd->lmc != (pip->mkeyprot_resv_lmc & 7)) { | 673 | else if (ppd->lid != lid || ppd->lmc != (pip->mkeyprot_resv_lmc & 7)) { |
673 | if (ppd->lid != lid) | 674 | if (ppd->lid != lid) |
674 | qib_set_uevent_bits(ppd, _QIB_EVENT_LID_CHANGE_BIT); | 675 | qib_set_uevent_bits(ppd, _QIB_EVENT_LID_CHANGE_BIT); |
675 | if (ppd->lmc != (pip->mkeyprot_resv_lmc & 7)) | 676 | if (ppd->lmc != (pip->mkeyprot_resv_lmc & 7)) |
@@ -683,8 +684,8 @@ static int subn_set_portinfo(struct ib_smp *smp, struct ib_device *ibdev, | |||
683 | msl = pip->neighbormtu_mastersmsl & 0xF; | 684 | msl = pip->neighbormtu_mastersmsl & 0xF; |
684 | /* Must be a valid unicast LID address. */ | 685 | /* Must be a valid unicast LID address. */ |
685 | if (smlid == 0 || smlid >= QIB_MULTICAST_LID_BASE) | 686 | if (smlid == 0 || smlid >= QIB_MULTICAST_LID_BASE) |
686 | goto err; | 687 | smp->status |= IB_SMP_INVALID_FIELD; |
687 | if (smlid != ibp->sm_lid || msl != ibp->sm_sl) { | 688 | else if (smlid != ibp->sm_lid || msl != ibp->sm_sl) { |
688 | spin_lock_irqsave(&ibp->lock, flags); | 689 | spin_lock_irqsave(&ibp->lock, flags); |
689 | if (ibp->sm_ah) { | 690 | if (ibp->sm_ah) { |
690 | if (smlid != ibp->sm_lid) | 691 | if (smlid != ibp->sm_lid) |
@@ -705,10 +706,11 @@ static int subn_set_portinfo(struct ib_smp *smp, struct ib_device *ibdev, | |||
705 | lwe = pip->link_width_enabled; | 706 | lwe = pip->link_width_enabled; |
706 | if (lwe) { | 707 | if (lwe) { |
707 | if (lwe == 0xFF) | 708 | if (lwe == 0xFF) |
708 | lwe = ppd->link_width_supported; | 709 | set_link_width_enabled(ppd, ppd->link_width_supported); |
709 | else if (lwe >= 16 || (lwe & ~ppd->link_width_supported)) | 710 | else if (lwe >= 16 || (lwe & ~ppd->link_width_supported)) |
710 | goto err; | 711 | smp->status |= IB_SMP_INVALID_FIELD; |
711 | set_link_width_enabled(ppd, lwe); | 712 | else if (lwe != ppd->link_width_enabled) |
713 | set_link_width_enabled(ppd, lwe); | ||
712 | } | 714 | } |
713 | 715 | ||
714 | lse = pip->linkspeedactive_enabled & 0xF; | 716 | lse = pip->linkspeedactive_enabled & 0xF; |
@@ -719,10 +721,12 @@ static int subn_set_portinfo(struct ib_smp *smp, struct ib_device *ibdev, | |||
719 | * speeds. | 721 | * speeds. |
720 | */ | 722 | */ |
721 | if (lse == 15) | 723 | if (lse == 15) |
722 | lse = ppd->link_speed_supported; | 724 | set_link_speed_enabled(ppd, |
725 | ppd->link_speed_supported); | ||
723 | else if (lse >= 8 || (lse & ~ppd->link_speed_supported)) | 726 | else if (lse >= 8 || (lse & ~ppd->link_speed_supported)) |
724 | goto err; | 727 | smp->status |= IB_SMP_INVALID_FIELD; |
725 | set_link_speed_enabled(ppd, lse); | 728 | else if (lse != ppd->link_speed_enabled) |
729 | set_link_speed_enabled(ppd, lse); | ||
726 | } | 730 | } |
727 | 731 | ||
728 | /* Set link down default state. */ | 732 | /* Set link down default state. */ |
@@ -738,7 +742,7 @@ static int subn_set_portinfo(struct ib_smp *smp, struct ib_device *ibdev, | |||
738 | IB_LINKINITCMD_POLL); | 742 | IB_LINKINITCMD_POLL); |
739 | break; | 743 | break; |
740 | default: | 744 | default: |
741 | goto err; | 745 | smp->status |= IB_SMP_INVALID_FIELD; |
742 | } | 746 | } |
743 | 747 | ||
744 | ibp->mkeyprot = pip->mkeyprot_resv_lmc >> 6; | 748 | ibp->mkeyprot = pip->mkeyprot_resv_lmc >> 6; |
@@ -748,15 +752,17 @@ static int subn_set_portinfo(struct ib_smp *smp, struct ib_device *ibdev, | |||
748 | 752 | ||
749 | mtu = ib_mtu_enum_to_int((pip->neighbormtu_mastersmsl >> 4) & 0xF); | 753 | mtu = ib_mtu_enum_to_int((pip->neighbormtu_mastersmsl >> 4) & 0xF); |
750 | if (mtu == -1) | 754 | if (mtu == -1) |
751 | goto err; | 755 | smp->status |= IB_SMP_INVALID_FIELD; |
752 | qib_set_mtu(ppd, mtu); | 756 | else |
757 | qib_set_mtu(ppd, mtu); | ||
753 | 758 | ||
754 | /* Set operational VLs */ | 759 | /* Set operational VLs */ |
755 | vls = (pip->operationalvl_pei_peo_fpi_fpo >> 4) & 0xF; | 760 | vls = (pip->operationalvl_pei_peo_fpi_fpo >> 4) & 0xF; |
756 | if (vls) { | 761 | if (vls) { |
757 | if (vls > ppd->vls_supported) | 762 | if (vls > ppd->vls_supported) |
758 | goto err; | 763 | smp->status |= IB_SMP_INVALID_FIELD; |
759 | (void) dd->f_set_ib_cfg(ppd, QIB_IB_CFG_OP_VLS, vls); | 764 | else |
765 | (void) dd->f_set_ib_cfg(ppd, QIB_IB_CFG_OP_VLS, vls); | ||
760 | } | 766 | } |
761 | 767 | ||
762 | if (pip->mkey_violations == 0) | 768 | if (pip->mkey_violations == 0) |
@@ -770,10 +776,10 @@ static int subn_set_portinfo(struct ib_smp *smp, struct ib_device *ibdev, | |||
770 | 776 | ||
771 | ore = pip->localphyerrors_overrunerrors; | 777 | ore = pip->localphyerrors_overrunerrors; |
772 | if (set_phyerrthreshold(ppd, (ore >> 4) & 0xF)) | 778 | if (set_phyerrthreshold(ppd, (ore >> 4) & 0xF)) |
773 | goto err; | 779 | smp->status |= IB_SMP_INVALID_FIELD; |
774 | 780 | ||
775 | if (set_overrunthreshold(ppd, (ore & 0xF))) | 781 | if (set_overrunthreshold(ppd, (ore & 0xF))) |
776 | goto err; | 782 | smp->status |= IB_SMP_INVALID_FIELD; |
777 | 783 | ||
778 | ibp->subnet_timeout = pip->clientrereg_resv_subnetto & 0x1F; | 784 | ibp->subnet_timeout = pip->clientrereg_resv_subnetto & 0x1F; |
779 | 785 | ||
@@ -792,7 +798,7 @@ static int subn_set_portinfo(struct ib_smp *smp, struct ib_device *ibdev, | |||
792 | state = pip->linkspeed_portstate & 0xF; | 798 | state = pip->linkspeed_portstate & 0xF; |
793 | lstate = (pip->portphysstate_linkdown >> 4) & 0xF; | 799 | lstate = (pip->portphysstate_linkdown >> 4) & 0xF; |
794 | if (lstate && !(state == IB_PORT_DOWN || state == IB_PORT_NOP)) | 800 | if (lstate && !(state == IB_PORT_DOWN || state == IB_PORT_NOP)) |
795 | goto err; | 801 | smp->status |= IB_SMP_INVALID_FIELD; |
796 | 802 | ||
797 | /* | 803 | /* |
798 | * Only state changes of DOWN, ARM, and ACTIVE are valid | 804 | * Only state changes of DOWN, ARM, and ACTIVE are valid |
@@ -812,8 +818,10 @@ static int subn_set_portinfo(struct ib_smp *smp, struct ib_device *ibdev, | |||
812 | lstate = QIB_IB_LINKDOWN; | 818 | lstate = QIB_IB_LINKDOWN; |
813 | else if (lstate == 3) | 819 | else if (lstate == 3) |
814 | lstate = QIB_IB_LINKDOWN_DISABLE; | 820 | lstate = QIB_IB_LINKDOWN_DISABLE; |
815 | else | 821 | else { |
816 | goto err; | 822 | smp->status |= IB_SMP_INVALID_FIELD; |
823 | break; | ||
824 | } | ||
817 | spin_lock_irqsave(&ppd->lflags_lock, flags); | 825 | spin_lock_irqsave(&ppd->lflags_lock, flags); |
818 | ppd->lflags &= ~QIBL_LINKV; | 826 | ppd->lflags &= ~QIBL_LINKV; |
819 | spin_unlock_irqrestore(&ppd->lflags_lock, flags); | 827 | spin_unlock_irqrestore(&ppd->lflags_lock, flags); |
@@ -835,8 +843,7 @@ static int subn_set_portinfo(struct ib_smp *smp, struct ib_device *ibdev, | |||
835 | qib_set_linkstate(ppd, QIB_IB_LINKACTIVE); | 843 | qib_set_linkstate(ppd, QIB_IB_LINKACTIVE); |
836 | break; | 844 | break; |
837 | default: | 845 | default: |
838 | /* XXX We have already partially updated our state! */ | 846 | smp->status |= IB_SMP_INVALID_FIELD; |
839 | goto err; | ||
840 | } | 847 | } |
841 | 848 | ||
842 | ret = subn_get_portinfo(smp, ibdev, port); | 849 | ret = subn_get_portinfo(smp, ibdev, port); |
@@ -844,7 +851,7 @@ static int subn_set_portinfo(struct ib_smp *smp, struct ib_device *ibdev, | |||
844 | if (clientrereg) | 851 | if (clientrereg) |
845 | pip->clientrereg_resv_subnetto |= 0x80; | 852 | pip->clientrereg_resv_subnetto |= 0x80; |
846 | 853 | ||
847 | goto done; | 854 | goto get_only; |
848 | 855 | ||
849 | err: | 856 | err: |
850 | smp->status |= IB_SMP_INVALID_FIELD; | 857 | smp->status |= IB_SMP_INVALID_FIELD; |
diff --git a/drivers/infiniband/hw/qib/qib_mad.h b/drivers/infiniband/hw/qib/qib_mad.h index 147aff9117d7..7840ab593bcf 100644 --- a/drivers/infiniband/hw/qib/qib_mad.h +++ b/drivers/infiniband/hw/qib/qib_mad.h | |||
@@ -73,7 +73,7 @@ struct ib_mad_notice_attr { | |||
73 | 73 | ||
74 | struct { | 74 | struct { |
75 | __be16 reserved; | 75 | __be16 reserved; |
76 | __be16 lid; /* LID where change occured */ | 76 | __be16 lid; /* LID where change occurred */ |
77 | u8 reserved2; | 77 | u8 reserved2; |
78 | u8 local_changes; /* low bit - local changes */ | 78 | u8 local_changes; /* low bit - local changes */ |
79 | __be32 new_cap_mask; /* new capability mask */ | 79 | __be32 new_cap_mask; /* new capability mask */ |
diff --git a/drivers/infiniband/hw/qib/qib_mr.c b/drivers/infiniband/hw/qib/qib_mr.c index 5f95f0f6385d..08944e2ee334 100644 --- a/drivers/infiniband/hw/qib/qib_mr.c +++ b/drivers/infiniband/hw/qib/qib_mr.c | |||
@@ -39,7 +39,6 @@ | |||
39 | /* Fast memory region */ | 39 | /* Fast memory region */ |
40 | struct qib_fmr { | 40 | struct qib_fmr { |
41 | struct ib_fmr ibfmr; | 41 | struct ib_fmr ibfmr; |
42 | u8 page_shift; | ||
43 | struct qib_mregion mr; /* must be last */ | 42 | struct qib_mregion mr; /* must be last */ |
44 | }; | 43 | }; |
45 | 44 | ||
@@ -107,6 +106,7 @@ static struct qib_mr *alloc_mr(int count, struct qib_lkey_table *lk_table) | |||
107 | goto bail; | 106 | goto bail; |
108 | } | 107 | } |
109 | mr->mr.mapsz = m; | 108 | mr->mr.mapsz = m; |
109 | mr->mr.page_shift = 0; | ||
110 | mr->mr.max_segs = count; | 110 | mr->mr.max_segs = count; |
111 | 111 | ||
112 | /* | 112 | /* |
@@ -231,6 +231,8 @@ struct ib_mr *qib_reg_user_mr(struct ib_pd *pd, u64 start, u64 length, | |||
231 | mr->mr.access_flags = mr_access_flags; | 231 | mr->mr.access_flags = mr_access_flags; |
232 | mr->umem = umem; | 232 | mr->umem = umem; |
233 | 233 | ||
234 | if (is_power_of_2(umem->page_size)) | ||
235 | mr->mr.page_shift = ilog2(umem->page_size); | ||
234 | m = 0; | 236 | m = 0; |
235 | n = 0; | 237 | n = 0; |
236 | list_for_each_entry(chunk, &umem->chunk_list, list) { | 238 | list_for_each_entry(chunk, &umem->chunk_list, list) { |
@@ -390,7 +392,7 @@ struct ib_fmr *qib_alloc_fmr(struct ib_pd *pd, int mr_access_flags, | |||
390 | fmr->mr.offset = 0; | 392 | fmr->mr.offset = 0; |
391 | fmr->mr.access_flags = mr_access_flags; | 393 | fmr->mr.access_flags = mr_access_flags; |
392 | fmr->mr.max_segs = fmr_attr->max_pages; | 394 | fmr->mr.max_segs = fmr_attr->max_pages; |
393 | fmr->page_shift = fmr_attr->page_shift; | 395 | fmr->mr.page_shift = fmr_attr->page_shift; |
394 | 396 | ||
395 | atomic_set(&fmr->mr.refcount, 0); | 397 | atomic_set(&fmr->mr.refcount, 0); |
396 | ret = &fmr->ibfmr; | 398 | ret = &fmr->ibfmr; |
@@ -437,7 +439,7 @@ int qib_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list, | |||
437 | spin_lock_irqsave(&rkt->lock, flags); | 439 | spin_lock_irqsave(&rkt->lock, flags); |
438 | fmr->mr.user_base = iova; | 440 | fmr->mr.user_base = iova; |
439 | fmr->mr.iova = iova; | 441 | fmr->mr.iova = iova; |
440 | ps = 1 << fmr->page_shift; | 442 | ps = 1 << fmr->mr.page_shift; |
441 | fmr->mr.length = list_len * ps; | 443 | fmr->mr.length = list_len * ps; |
442 | m = 0; | 444 | m = 0; |
443 | n = 0; | 445 | n = 0; |
diff --git a/drivers/infiniband/hw/qib/qib_pcie.c b/drivers/infiniband/hw/qib/qib_pcie.c index 7fa6e5592630..891cc2ff5f00 100644 --- a/drivers/infiniband/hw/qib/qib_pcie.c +++ b/drivers/infiniband/hw/qib/qib_pcie.c | |||
@@ -103,16 +103,20 @@ int qib_pcie_init(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
103 | ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); | 103 | ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); |
104 | } else | 104 | } else |
105 | ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); | 105 | ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); |
106 | if (ret) | 106 | if (ret) { |
107 | qib_early_err(&pdev->dev, | 107 | qib_early_err(&pdev->dev, |
108 | "Unable to set DMA consistent mask: %d\n", ret); | 108 | "Unable to set DMA consistent mask: %d\n", ret); |
109 | goto bail; | ||
110 | } | ||
109 | 111 | ||
110 | pci_set_master(pdev); | 112 | pci_set_master(pdev); |
111 | ret = pci_enable_pcie_error_reporting(pdev); | 113 | ret = pci_enable_pcie_error_reporting(pdev); |
112 | if (ret) | 114 | if (ret) { |
113 | qib_early_err(&pdev->dev, | 115 | qib_early_err(&pdev->dev, |
114 | "Unable to enable pcie error reporting: %d\n", | 116 | "Unable to enable pcie error reporting: %d\n", |
115 | ret); | 117 | ret); |
118 | ret = 0; | ||
119 | } | ||
116 | goto done; | 120 | goto done; |
117 | 121 | ||
118 | bail: | 122 | bail: |
@@ -522,11 +526,8 @@ static int qib_tune_pcie_coalesce(struct qib_devdata *dd) | |||
522 | */ | 526 | */ |
523 | devid = parent->device; | 527 | devid = parent->device; |
524 | if (devid >= 0x25e2 && devid <= 0x25fa) { | 528 | if (devid >= 0x25e2 && devid <= 0x25fa) { |
525 | u8 rev; | ||
526 | |||
527 | /* 5000 P/V/X/Z */ | 529 | /* 5000 P/V/X/Z */ |
528 | pci_read_config_byte(parent, PCI_REVISION_ID, &rev); | 530 | if (parent->revision <= 0xb2) |
529 | if (rev <= 0xb2) | ||
530 | bits = 1U << 10; | 531 | bits = 1U << 10; |
531 | else | 532 | else |
532 | bits = 7U << 10; | 533 | bits = 7U << 10; |
diff --git a/drivers/infiniband/hw/qib/qib_qp.c b/drivers/infiniband/hw/qib/qib_qp.c index 6c39851d2ded..e16751f8639e 100644 --- a/drivers/infiniband/hw/qib/qib_qp.c +++ b/drivers/infiniband/hw/qib/qib_qp.c | |||
@@ -48,13 +48,12 @@ static inline unsigned mk_qpn(struct qib_qpn_table *qpt, | |||
48 | 48 | ||
49 | static inline unsigned find_next_offset(struct qib_qpn_table *qpt, | 49 | static inline unsigned find_next_offset(struct qib_qpn_table *qpt, |
50 | struct qpn_map *map, unsigned off, | 50 | struct qpn_map *map, unsigned off, |
51 | unsigned r) | 51 | unsigned n) |
52 | { | 52 | { |
53 | if (qpt->mask) { | 53 | if (qpt->mask) { |
54 | off++; | 54 | off++; |
55 | if ((off & qpt->mask) >> 1 != r) | 55 | if (((off & qpt->mask) >> 1) >= n) |
56 | off = ((off & qpt->mask) ? | 56 | off = (off | qpt->mask) + 2; |
57 | (off | qpt->mask) + 1 : off) | (r << 1); | ||
58 | } else | 57 | } else |
59 | off = find_next_zero_bit(map->page, BITS_PER_PAGE, off); | 58 | off = find_next_zero_bit(map->page, BITS_PER_PAGE, off); |
60 | return off; | 59 | return off; |
@@ -123,7 +122,6 @@ static int alloc_qpn(struct qib_devdata *dd, struct qib_qpn_table *qpt, | |||
123 | u32 i, offset, max_scan, qpn; | 122 | u32 i, offset, max_scan, qpn; |
124 | struct qpn_map *map; | 123 | struct qpn_map *map; |
125 | u32 ret; | 124 | u32 ret; |
126 | int r; | ||
127 | 125 | ||
128 | if (type == IB_QPT_SMI || type == IB_QPT_GSI) { | 126 | if (type == IB_QPT_SMI || type == IB_QPT_GSI) { |
129 | unsigned n; | 127 | unsigned n; |
@@ -139,15 +137,11 @@ static int alloc_qpn(struct qib_devdata *dd, struct qib_qpn_table *qpt, | |||
139 | goto bail; | 137 | goto bail; |
140 | } | 138 | } |
141 | 139 | ||
142 | r = smp_processor_id(); | 140 | qpn = qpt->last + 2; |
143 | if (r >= dd->n_krcv_queues) | ||
144 | r %= dd->n_krcv_queues; | ||
145 | qpn = qpt->last + 1; | ||
146 | if (qpn >= QPN_MAX) | 141 | if (qpn >= QPN_MAX) |
147 | qpn = 2; | 142 | qpn = 2; |
148 | if (qpt->mask && ((qpn & qpt->mask) >> 1) != r) | 143 | if (qpt->mask && ((qpn & qpt->mask) >> 1) >= dd->n_krcv_queues) |
149 | qpn = ((qpn & qpt->mask) ? (qpn | qpt->mask) + 1 : qpn) | | 144 | qpn = (qpn | qpt->mask) + 2; |
150 | (r << 1); | ||
151 | offset = qpn & BITS_PER_PAGE_MASK; | 145 | offset = qpn & BITS_PER_PAGE_MASK; |
152 | map = &qpt->map[qpn / BITS_PER_PAGE]; | 146 | map = &qpt->map[qpn / BITS_PER_PAGE]; |
153 | max_scan = qpt->nmaps - !offset; | 147 | max_scan = qpt->nmaps - !offset; |
@@ -163,7 +157,8 @@ static int alloc_qpn(struct qib_devdata *dd, struct qib_qpn_table *qpt, | |||
163 | ret = qpn; | 157 | ret = qpn; |
164 | goto bail; | 158 | goto bail; |
165 | } | 159 | } |
166 | offset = find_next_offset(qpt, map, offset, r); | 160 | offset = find_next_offset(qpt, map, offset, |
161 | dd->n_krcv_queues); | ||
167 | qpn = mk_qpn(qpt, map, offset); | 162 | qpn = mk_qpn(qpt, map, offset); |
168 | /* | 163 | /* |
169 | * This test differs from alloc_pidmap(). | 164 | * This test differs from alloc_pidmap(). |
@@ -183,13 +178,13 @@ static int alloc_qpn(struct qib_devdata *dd, struct qib_qpn_table *qpt, | |||
183 | if (qpt->nmaps == QPNMAP_ENTRIES) | 178 | if (qpt->nmaps == QPNMAP_ENTRIES) |
184 | break; | 179 | break; |
185 | map = &qpt->map[qpt->nmaps++]; | 180 | map = &qpt->map[qpt->nmaps++]; |
186 | offset = qpt->mask ? (r << 1) : 0; | 181 | offset = 0; |
187 | } else if (map < &qpt->map[qpt->nmaps]) { | 182 | } else if (map < &qpt->map[qpt->nmaps]) { |
188 | ++map; | 183 | ++map; |
189 | offset = qpt->mask ? (r << 1) : 0; | 184 | offset = 0; |
190 | } else { | 185 | } else { |
191 | map = &qpt->map[0]; | 186 | map = &qpt->map[0]; |
192 | offset = qpt->mask ? (r << 1) : 2; | 187 | offset = 2; |
193 | } | 188 | } |
194 | qpn = mk_qpn(qpt, map, offset); | 189 | qpn = mk_qpn(qpt, map, offset); |
195 | } | 190 | } |
@@ -468,6 +463,10 @@ int qib_error_qp(struct qib_qp *qp, enum ib_wc_status err) | |||
468 | qp->s_flags &= ~(QIB_S_TIMER | QIB_S_WAIT_RNR); | 463 | qp->s_flags &= ~(QIB_S_TIMER | QIB_S_WAIT_RNR); |
469 | del_timer(&qp->s_timer); | 464 | del_timer(&qp->s_timer); |
470 | } | 465 | } |
466 | |||
467 | if (qp->s_flags & QIB_S_ANY_WAIT_SEND) | ||
468 | qp->s_flags &= ~QIB_S_ANY_WAIT_SEND; | ||
469 | |||
471 | spin_lock(&dev->pending_lock); | 470 | spin_lock(&dev->pending_lock); |
472 | if (!list_empty(&qp->iowait) && !(qp->s_flags & QIB_S_BUSY)) { | 471 | if (!list_empty(&qp->iowait) && !(qp->s_flags & QIB_S_BUSY)) { |
473 | qp->s_flags &= ~QIB_S_ANY_WAIT_IO; | 472 | qp->s_flags &= ~QIB_S_ANY_WAIT_IO; |
@@ -1061,7 +1060,6 @@ struct ib_qp *qib_create_qp(struct ib_pd *ibpd, | |||
1061 | } | 1060 | } |
1062 | qp->ibqp.qp_num = err; | 1061 | qp->ibqp.qp_num = err; |
1063 | qp->port_num = init_attr->port_num; | 1062 | qp->port_num = init_attr->port_num; |
1064 | qp->processor_id = smp_processor_id(); | ||
1065 | qib_reset_qp(qp, init_attr->qp_type); | 1063 | qib_reset_qp(qp, init_attr->qp_type); |
1066 | break; | 1064 | break; |
1067 | 1065 | ||
diff --git a/drivers/infiniband/hw/qib/qib_qsfp.c b/drivers/infiniband/hw/qib/qib_qsfp.c index 35b3604b691d..3374a52232c1 100644 --- a/drivers/infiniband/hw/qib/qib_qsfp.c +++ b/drivers/infiniband/hw/qib/qib_qsfp.c | |||
@@ -485,7 +485,7 @@ void qib_qsfp_init(struct qib_qsfp_data *qd, | |||
485 | goto bail; | 485 | goto bail; |
486 | /* We see a module, but it may be unwise to look yet. Just schedule */ | 486 | /* We see a module, but it may be unwise to look yet. Just schedule */ |
487 | qd->t_insert = get_jiffies_64(); | 487 | qd->t_insert = get_jiffies_64(); |
488 | schedule_work(&qd->work); | 488 | queue_work(ib_wq, &qd->work); |
489 | bail: | 489 | bail: |
490 | return; | 490 | return; |
491 | } | 491 | } |
@@ -493,10 +493,9 @@ bail: | |||
493 | void qib_qsfp_deinit(struct qib_qsfp_data *qd) | 493 | void qib_qsfp_deinit(struct qib_qsfp_data *qd) |
494 | { | 494 | { |
495 | /* | 495 | /* |
496 | * There is nothing to do here for now. our | 496 | * There is nothing to do here for now. our work is scheduled |
497 | * work is scheduled with schedule_work(), and | 497 | * with queue_work(), and flush_workqueue() from remove_one |
498 | * flush_scheduled_work() from remove_one will | 498 | * will block until all work setup with queue_work() |
499 | * block until all work ssetup with schedule_work() | ||
500 | * completes. | 499 | * completes. |
501 | */ | 500 | */ |
502 | } | 501 | } |
diff --git a/drivers/infiniband/hw/qib/qib_qsfp.h b/drivers/infiniband/hw/qib/qib_qsfp.h index 19b527bafd57..c109bbdc90ac 100644 --- a/drivers/infiniband/hw/qib/qib_qsfp.h +++ b/drivers/infiniband/hw/qib/qib_qsfp.h | |||
@@ -79,6 +79,8 @@ | |||
79 | extern const char *const qib_qsfp_devtech[16]; | 79 | extern const char *const qib_qsfp_devtech[16]; |
80 | /* Active Equalization includes fiber, copper full EQ, and copper near Eq */ | 80 | /* Active Equalization includes fiber, copper full EQ, and copper near Eq */ |
81 | #define QSFP_IS_ACTIVE(tech) ((0xA2FF >> ((tech) >> 4)) & 1) | 81 | #define QSFP_IS_ACTIVE(tech) ((0xA2FF >> ((tech) >> 4)) & 1) |
82 | /* Active Equalization includes fiber, copper full EQ, and copper far Eq */ | ||
83 | #define QSFP_IS_ACTIVE_FAR(tech) ((0x32FF >> ((tech) >> 4)) & 1) | ||
82 | /* Attenuation should be valid for copper other than full/near Eq */ | 84 | /* Attenuation should be valid for copper other than full/near Eq */ |
83 | #define QSFP_HAS_ATTEN(tech) ((0x4D00 >> ((tech) >> 4)) & 1) | 85 | #define QSFP_HAS_ATTEN(tech) ((0x4D00 >> ((tech) >> 4)) & 1) |
84 | /* Length is only valid if technology is "copper" */ | 86 | /* Length is only valid if technology is "copper" */ |
diff --git a/drivers/infiniband/hw/qib/qib_rc.c b/drivers/infiniband/hw/qib/qib_rc.c index a0931119bd78..eca0c41f1226 100644 --- a/drivers/infiniband/hw/qib/qib_rc.c +++ b/drivers/infiniband/hw/qib/qib_rc.c | |||
@@ -1005,7 +1005,8 @@ void qib_rc_send_complete(struct qib_qp *qp, struct qib_ib_header *hdr) | |||
1005 | * there are still requests that haven't been acked. | 1005 | * there are still requests that haven't been acked. |
1006 | */ | 1006 | */ |
1007 | if ((psn & IB_BTH_REQ_ACK) && qp->s_acked != qp->s_tail && | 1007 | if ((psn & IB_BTH_REQ_ACK) && qp->s_acked != qp->s_tail && |
1008 | !(qp->s_flags & (QIB_S_TIMER | QIB_S_WAIT_RNR | QIB_S_WAIT_PSN))) | 1008 | !(qp->s_flags & (QIB_S_TIMER | QIB_S_WAIT_RNR | QIB_S_WAIT_PSN)) && |
1009 | (ib_qib_state_ops[qp->state] & QIB_PROCESS_RECV_OK)) | ||
1009 | start_timer(qp); | 1010 | start_timer(qp); |
1010 | 1011 | ||
1011 | while (qp->s_last != qp->s_acked) { | 1012 | while (qp->s_last != qp->s_acked) { |
@@ -1407,6 +1408,7 @@ static void qib_rc_rcv_resp(struct qib_ibport *ibp, | |||
1407 | struct qib_ctxtdata *rcd) | 1408 | struct qib_ctxtdata *rcd) |
1408 | { | 1409 | { |
1409 | struct qib_swqe *wqe; | 1410 | struct qib_swqe *wqe; |
1411 | struct qib_pportdata *ppd = ppd_from_ibp(ibp); | ||
1410 | enum ib_wc_status status; | 1412 | enum ib_wc_status status; |
1411 | unsigned long flags; | 1413 | unsigned long flags; |
1412 | int diff; | 1414 | int diff; |
@@ -1414,7 +1416,32 @@ static void qib_rc_rcv_resp(struct qib_ibport *ibp, | |||
1414 | u32 aeth; | 1416 | u32 aeth; |
1415 | u64 val; | 1417 | u64 val; |
1416 | 1418 | ||
1419 | if (opcode != OP(RDMA_READ_RESPONSE_MIDDLE)) { | ||
1420 | /* | ||
1421 | * If ACK'd PSN on SDMA busy list try to make progress to | ||
1422 | * reclaim SDMA credits. | ||
1423 | */ | ||
1424 | if ((qib_cmp24(psn, qp->s_sending_psn) >= 0) && | ||
1425 | (qib_cmp24(qp->s_sending_psn, qp->s_sending_hpsn) <= 0)) { | ||
1426 | |||
1427 | /* | ||
1428 | * If send tasklet not running attempt to progress | ||
1429 | * SDMA queue. | ||
1430 | */ | ||
1431 | if (!(qp->s_flags & QIB_S_BUSY)) { | ||
1432 | /* Acquire SDMA Lock */ | ||
1433 | spin_lock_irqsave(&ppd->sdma_lock, flags); | ||
1434 | /* Invoke sdma make progress */ | ||
1435 | qib_sdma_make_progress(ppd); | ||
1436 | /* Release SDMA Lock */ | ||
1437 | spin_unlock_irqrestore(&ppd->sdma_lock, flags); | ||
1438 | } | ||
1439 | } | ||
1440 | } | ||
1441 | |||
1417 | spin_lock_irqsave(&qp->s_lock, flags); | 1442 | spin_lock_irqsave(&qp->s_lock, flags); |
1443 | if (!(ib_qib_state_ops[qp->state] & QIB_PROCESS_RECV_OK)) | ||
1444 | goto ack_done; | ||
1418 | 1445 | ||
1419 | /* Ignore invalid responses. */ | 1446 | /* Ignore invalid responses. */ |
1420 | if (qib_cmp24(psn, qp->s_next_psn) >= 0) | 1447 | if (qib_cmp24(psn, qp->s_next_psn) >= 0) |
@@ -2068,7 +2095,10 @@ send_last: | |||
2068 | goto nack_op_err; | 2095 | goto nack_op_err; |
2069 | if (!ret) | 2096 | if (!ret) |
2070 | goto rnr_nak; | 2097 | goto rnr_nak; |
2071 | goto send_last_imm; | 2098 | wc.ex.imm_data = ohdr->u.rc.imm_data; |
2099 | hdrsize += 4; | ||
2100 | wc.wc_flags = IB_WC_WITH_IMM; | ||
2101 | goto send_last; | ||
2072 | 2102 | ||
2073 | case OP(RDMA_READ_REQUEST): { | 2103 | case OP(RDMA_READ_REQUEST): { |
2074 | struct qib_ack_entry *e; | 2104 | struct qib_ack_entry *e; |
diff --git a/drivers/infiniband/hw/qib/qib_twsi.c b/drivers/infiniband/hw/qib/qib_twsi.c index 6f31ca5039db..ddde72e11edb 100644 --- a/drivers/infiniband/hw/qib/qib_twsi.c +++ b/drivers/infiniband/hw/qib/qib_twsi.c | |||
@@ -41,7 +41,7 @@ | |||
41 | * QLogic_IB "Two Wire Serial Interface" driver. | 41 | * QLogic_IB "Two Wire Serial Interface" driver. |
42 | * Originally written for a not-quite-i2c serial eeprom, which is | 42 | * Originally written for a not-quite-i2c serial eeprom, which is |
43 | * still used on some supported boards. Later boards have added a | 43 | * still used on some supported boards. Later boards have added a |
44 | * variety of other uses, most board-specific, so teh bit-boffing | 44 | * variety of other uses, most board-specific, so the bit-boffing |
45 | * part has been split off to this file, while the other parts | 45 | * part has been split off to this file, while the other parts |
46 | * have been moved to chip-specific files. | 46 | * have been moved to chip-specific files. |
47 | * | 47 | * |
diff --git a/drivers/infiniband/hw/qib/qib_uc.c b/drivers/infiniband/hw/qib/qib_uc.c index b9c8b6346c1b..32ccf3c824ca 100644 --- a/drivers/infiniband/hw/qib/qib_uc.c +++ b/drivers/infiniband/hw/qib/qib_uc.c | |||
@@ -457,8 +457,10 @@ rdma_first: | |||
457 | } | 457 | } |
458 | if (opcode == OP(RDMA_WRITE_ONLY)) | 458 | if (opcode == OP(RDMA_WRITE_ONLY)) |
459 | goto rdma_last; | 459 | goto rdma_last; |
460 | else if (opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE)) | 460 | else if (opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE)) { |
461 | wc.ex.imm_data = ohdr->u.rc.imm_data; | ||
461 | goto rdma_last_imm; | 462 | goto rdma_last_imm; |
463 | } | ||
462 | /* FALLTHROUGH */ | 464 | /* FALLTHROUGH */ |
463 | case OP(RDMA_WRITE_MIDDLE): | 465 | case OP(RDMA_WRITE_MIDDLE): |
464 | /* Check for invalid length PMTU or posted rwqe len. */ | 466 | /* Check for invalid length PMTU or posted rwqe len. */ |
@@ -471,8 +473,8 @@ rdma_first: | |||
471 | break; | 473 | break; |
472 | 474 | ||
473 | case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE): | 475 | case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE): |
474 | rdma_last_imm: | ||
475 | wc.ex.imm_data = ohdr->u.imm_data; | 476 | wc.ex.imm_data = ohdr->u.imm_data; |
477 | rdma_last_imm: | ||
476 | hdrsize += 4; | 478 | hdrsize += 4; |
477 | wc.wc_flags = IB_WC_WITH_IMM; | 479 | wc.wc_flags = IB_WC_WITH_IMM; |
478 | 480 | ||
diff --git a/drivers/infiniband/hw/qib/qib_ud.c b/drivers/infiniband/hw/qib/qib_ud.c index e1b3da2a1f85..828609fa4d28 100644 --- a/drivers/infiniband/hw/qib/qib_ud.c +++ b/drivers/infiniband/hw/qib/qib_ud.c | |||
@@ -116,7 +116,7 @@ static void qib_ud_loopback(struct qib_qp *sqp, struct qib_swqe *swqe) | |||
116 | } | 116 | } |
117 | 117 | ||
118 | /* | 118 | /* |
119 | * A GRH is expected to preceed the data even if not | 119 | * A GRH is expected to precede the data even if not |
120 | * present on the wire. | 120 | * present on the wire. |
121 | */ | 121 | */ |
122 | length = swqe->length; | 122 | length = swqe->length; |
@@ -445,13 +445,14 @@ void qib_ud_rcv(struct qib_ibport *ibp, struct qib_ib_header *hdr, | |||
445 | qkey = be32_to_cpu(ohdr->u.ud.deth[0]); | 445 | qkey = be32_to_cpu(ohdr->u.ud.deth[0]); |
446 | src_qp = be32_to_cpu(ohdr->u.ud.deth[1]) & QIB_QPN_MASK; | 446 | src_qp = be32_to_cpu(ohdr->u.ud.deth[1]) & QIB_QPN_MASK; |
447 | 447 | ||
448 | /* Get the number of bytes the message was padded by. */ | 448 | /* |
449 | * Get the number of bytes the message was padded by | ||
450 | * and drop incomplete packets. | ||
451 | */ | ||
449 | pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3; | 452 | pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3; |
450 | if (unlikely(tlen < (hdrsize + pad + 4))) { | 453 | if (unlikely(tlen < (hdrsize + pad + 4))) |
451 | /* Drop incomplete packets. */ | 454 | goto drop; |
452 | ibp->n_pkt_drops++; | 455 | |
453 | goto bail; | ||
454 | } | ||
455 | tlen -= hdrsize + pad + 4; | 456 | tlen -= hdrsize + pad + 4; |
456 | 457 | ||
457 | /* | 458 | /* |
@@ -460,10 +461,8 @@ void qib_ud_rcv(struct qib_ibport *ibp, struct qib_ib_header *hdr, | |||
460 | */ | 461 | */ |
461 | if (qp->ibqp.qp_num) { | 462 | if (qp->ibqp.qp_num) { |
462 | if (unlikely(hdr->lrh[1] == IB_LID_PERMISSIVE || | 463 | if (unlikely(hdr->lrh[1] == IB_LID_PERMISSIVE || |
463 | hdr->lrh[3] == IB_LID_PERMISSIVE)) { | 464 | hdr->lrh[3] == IB_LID_PERMISSIVE)) |
464 | ibp->n_pkt_drops++; | 465 | goto drop; |
465 | goto bail; | ||
466 | } | ||
467 | if (qp->ibqp.qp_num > 1) { | 466 | if (qp->ibqp.qp_num > 1) { |
468 | u16 pkey1, pkey2; | 467 | u16 pkey1, pkey2; |
469 | 468 | ||
@@ -476,7 +475,7 @@ void qib_ud_rcv(struct qib_ibport *ibp, struct qib_ib_header *hdr, | |||
476 | 0xF, | 475 | 0xF, |
477 | src_qp, qp->ibqp.qp_num, | 476 | src_qp, qp->ibqp.qp_num, |
478 | hdr->lrh[3], hdr->lrh[1]); | 477 | hdr->lrh[3], hdr->lrh[1]); |
479 | goto bail; | 478 | return; |
480 | } | 479 | } |
481 | } | 480 | } |
482 | if (unlikely(qkey != qp->qkey)) { | 481 | if (unlikely(qkey != qp->qkey)) { |
@@ -484,30 +483,24 @@ void qib_ud_rcv(struct qib_ibport *ibp, struct qib_ib_header *hdr, | |||
484 | (be16_to_cpu(hdr->lrh[0]) >> 4) & 0xF, | 483 | (be16_to_cpu(hdr->lrh[0]) >> 4) & 0xF, |
485 | src_qp, qp->ibqp.qp_num, | 484 | src_qp, qp->ibqp.qp_num, |
486 | hdr->lrh[3], hdr->lrh[1]); | 485 | hdr->lrh[3], hdr->lrh[1]); |
487 | goto bail; | 486 | return; |
488 | } | 487 | } |
489 | /* Drop invalid MAD packets (see 13.5.3.1). */ | 488 | /* Drop invalid MAD packets (see 13.5.3.1). */ |
490 | if (unlikely(qp->ibqp.qp_num == 1 && | 489 | if (unlikely(qp->ibqp.qp_num == 1 && |
491 | (tlen != 256 || | 490 | (tlen != 256 || |
492 | (be16_to_cpu(hdr->lrh[0]) >> 12) == 15))) { | 491 | (be16_to_cpu(hdr->lrh[0]) >> 12) == 15))) |
493 | ibp->n_pkt_drops++; | 492 | goto drop; |
494 | goto bail; | ||
495 | } | ||
496 | } else { | 493 | } else { |
497 | struct ib_smp *smp; | 494 | struct ib_smp *smp; |
498 | 495 | ||
499 | /* Drop invalid MAD packets (see 13.5.3.1). */ | 496 | /* Drop invalid MAD packets (see 13.5.3.1). */ |
500 | if (tlen != 256 || (be16_to_cpu(hdr->lrh[0]) >> 12) != 15) { | 497 | if (tlen != 256 || (be16_to_cpu(hdr->lrh[0]) >> 12) != 15) |
501 | ibp->n_pkt_drops++; | 498 | goto drop; |
502 | goto bail; | ||
503 | } | ||
504 | smp = (struct ib_smp *) data; | 499 | smp = (struct ib_smp *) data; |
505 | if ((hdr->lrh[1] == IB_LID_PERMISSIVE || | 500 | if ((hdr->lrh[1] == IB_LID_PERMISSIVE || |
506 | hdr->lrh[3] == IB_LID_PERMISSIVE) && | 501 | hdr->lrh[3] == IB_LID_PERMISSIVE) && |
507 | smp->mgmt_class != IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) { | 502 | smp->mgmt_class != IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) |
508 | ibp->n_pkt_drops++; | 503 | goto drop; |
509 | goto bail; | ||
510 | } | ||
511 | } | 504 | } |
512 | 505 | ||
513 | /* | 506 | /* |
@@ -519,17 +512,15 @@ void qib_ud_rcv(struct qib_ibport *ibp, struct qib_ib_header *hdr, | |||
519 | opcode == IB_OPCODE_UD_SEND_ONLY_WITH_IMMEDIATE) { | 512 | opcode == IB_OPCODE_UD_SEND_ONLY_WITH_IMMEDIATE) { |
520 | wc.ex.imm_data = ohdr->u.ud.imm_data; | 513 | wc.ex.imm_data = ohdr->u.ud.imm_data; |
521 | wc.wc_flags = IB_WC_WITH_IMM; | 514 | wc.wc_flags = IB_WC_WITH_IMM; |
522 | hdrsize += sizeof(u32); | 515 | tlen -= sizeof(u32); |
523 | } else if (opcode == IB_OPCODE_UD_SEND_ONLY) { | 516 | } else if (opcode == IB_OPCODE_UD_SEND_ONLY) { |
524 | wc.ex.imm_data = 0; | 517 | wc.ex.imm_data = 0; |
525 | wc.wc_flags = 0; | 518 | wc.wc_flags = 0; |
526 | } else { | 519 | } else |
527 | ibp->n_pkt_drops++; | 520 | goto drop; |
528 | goto bail; | ||
529 | } | ||
530 | 521 | ||
531 | /* | 522 | /* |
532 | * A GRH is expected to preceed the data even if not | 523 | * A GRH is expected to precede the data even if not |
533 | * present on the wire. | 524 | * present on the wire. |
534 | */ | 525 | */ |
535 | wc.byte_len = tlen + sizeof(struct ib_grh); | 526 | wc.byte_len = tlen + sizeof(struct ib_grh); |
@@ -556,8 +547,7 @@ void qib_ud_rcv(struct qib_ibport *ibp, struct qib_ib_header *hdr, | |||
556 | /* Silently drop packets which are too big. */ | 547 | /* Silently drop packets which are too big. */ |
557 | if (unlikely(wc.byte_len > qp->r_len)) { | 548 | if (unlikely(wc.byte_len > qp->r_len)) { |
558 | qp->r_flags |= QIB_R_REUSE_SGE; | 549 | qp->r_flags |= QIB_R_REUSE_SGE; |
559 | ibp->n_pkt_drops++; | 550 | goto drop; |
560 | return; | ||
561 | } | 551 | } |
562 | if (has_grh) { | 552 | if (has_grh) { |
563 | qib_copy_sge(&qp->r_sge, &hdr->u.l.grh, | 553 | qib_copy_sge(&qp->r_sge, &hdr->u.l.grh, |
@@ -594,5 +584,8 @@ void qib_ud_rcv(struct qib_ibport *ibp, struct qib_ib_header *hdr, | |||
594 | qib_cq_enter(to_icq(qp->ibqp.recv_cq), &wc, | 584 | qib_cq_enter(to_icq(qp->ibqp.recv_cq), &wc, |
595 | (ohdr->bth[0] & | 585 | (ohdr->bth[0] & |
596 | cpu_to_be32(IB_BTH_SOLICITED)) != 0); | 586 | cpu_to_be32(IB_BTH_SOLICITED)) != 0); |
597 | bail:; | 587 | return; |
588 | |||
589 | drop: | ||
590 | ibp->n_pkt_drops++; | ||
598 | } | 591 | } |
diff --git a/drivers/infiniband/hw/qib/qib_user_pages.c b/drivers/infiniband/hw/qib/qib_user_pages.c index d7a26c1d4f37..7689e49c13c9 100644 --- a/drivers/infiniband/hw/qib/qib_user_pages.c +++ b/drivers/infiniband/hw/qib/qib_user_pages.c | |||
@@ -51,8 +51,8 @@ static void __qib_release_user_pages(struct page **p, size_t num_pages, | |||
51 | /* | 51 | /* |
52 | * Call with current->mm->mmap_sem held. | 52 | * Call with current->mm->mmap_sem held. |
53 | */ | 53 | */ |
54 | static int __get_user_pages(unsigned long start_page, size_t num_pages, | 54 | static int __qib_get_user_pages(unsigned long start_page, size_t num_pages, |
55 | struct page **p, struct vm_area_struct **vma) | 55 | struct page **p, struct vm_area_struct **vma) |
56 | { | 56 | { |
57 | unsigned long lock_limit; | 57 | unsigned long lock_limit; |
58 | size_t got; | 58 | size_t got; |
@@ -136,7 +136,7 @@ int qib_get_user_pages(unsigned long start_page, size_t num_pages, | |||
136 | 136 | ||
137 | down_write(¤t->mm->mmap_sem); | 137 | down_write(¤t->mm->mmap_sem); |
138 | 138 | ||
139 | ret = __get_user_pages(start_page, num_pages, p, NULL); | 139 | ret = __qib_get_user_pages(start_page, num_pages, p, NULL); |
140 | 140 | ||
141 | up_write(¤t->mm->mmap_sem); | 141 | up_write(¤t->mm->mmap_sem); |
142 | 142 | ||
diff --git a/drivers/infiniband/hw/qib/qib_user_sdma.c b/drivers/infiniband/hw/qib/qib_user_sdma.c index 4c19e06b5e85..82442085cbe6 100644 --- a/drivers/infiniband/hw/qib/qib_user_sdma.c +++ b/drivers/infiniband/hw/qib/qib_user_sdma.c | |||
@@ -239,7 +239,7 @@ static int qib_user_sdma_num_pages(const struct iovec *iov) | |||
239 | } | 239 | } |
240 | 240 | ||
241 | /* | 241 | /* |
242 | * Truncate length to page boundry. | 242 | * Truncate length to page boundary. |
243 | */ | 243 | */ |
244 | static int qib_user_sdma_page_length(unsigned long addr, unsigned long len) | 244 | static int qib_user_sdma_page_length(unsigned long addr, unsigned long len) |
245 | { | 245 | { |
@@ -382,6 +382,7 @@ static void qib_user_sdma_free_pkt_list(struct device *dev, | |||
382 | 382 | ||
383 | kmem_cache_free(pq->pkt_slab, pkt); | 383 | kmem_cache_free(pq->pkt_slab, pkt); |
384 | } | 384 | } |
385 | INIT_LIST_HEAD(list); | ||
385 | } | 386 | } |
386 | 387 | ||
387 | /* | 388 | /* |
diff --git a/drivers/infiniband/hw/qib/qib_verbs.h b/drivers/infiniband/hw/qib/qib_verbs.h index bd57c1273225..95e5b47223b3 100644 --- a/drivers/infiniband/hw/qib/qib_verbs.h +++ b/drivers/infiniband/hw/qib/qib_verbs.h | |||
@@ -301,6 +301,7 @@ struct qib_mregion { | |||
301 | int access_flags; | 301 | int access_flags; |
302 | u32 max_segs; /* number of qib_segs in all the arrays */ | 302 | u32 max_segs; /* number of qib_segs in all the arrays */ |
303 | u32 mapsz; /* size of the map array */ | 303 | u32 mapsz; /* size of the map array */ |
304 | u8 page_shift; /* 0 - non unform/non powerof2 sizes */ | ||
304 | atomic_t refcount; | 305 | atomic_t refcount; |
305 | struct qib_segarray *map[0]; /* the segments */ | 306 | struct qib_segarray *map[0]; /* the segments */ |
306 | }; | 307 | }; |
@@ -435,7 +436,6 @@ struct qib_qp { | |||
435 | spinlock_t r_lock; /* used for APM */ | 436 | spinlock_t r_lock; /* used for APM */ |
436 | spinlock_t s_lock; | 437 | spinlock_t s_lock; |
437 | atomic_t s_dma_busy; | 438 | atomic_t s_dma_busy; |
438 | unsigned processor_id; /* Processor ID QP is bound to */ | ||
439 | u32 s_flags; | 439 | u32 s_flags; |
440 | u32 s_cur_size; /* size of send packet in bytes */ | 440 | u32 s_cur_size; /* size of send packet in bytes */ |
441 | u32 s_len; /* total length of s_sge */ | 441 | u32 s_len; /* total length of s_sge */ |
@@ -805,7 +805,6 @@ static inline int qib_send_ok(struct qib_qp *qp) | |||
805 | !(qp->s_flags & QIB_S_ANY_WAIT_SEND)); | 805 | !(qp->s_flags & QIB_S_ANY_WAIT_SEND)); |
806 | } | 806 | } |
807 | 807 | ||
808 | extern struct workqueue_struct *qib_wq; | ||
809 | extern struct workqueue_struct *qib_cq_wq; | 808 | extern struct workqueue_struct *qib_cq_wq; |
810 | 809 | ||
811 | /* | 810 | /* |
@@ -813,13 +812,8 @@ extern struct workqueue_struct *qib_cq_wq; | |||
813 | */ | 812 | */ |
814 | static inline void qib_schedule_send(struct qib_qp *qp) | 813 | static inline void qib_schedule_send(struct qib_qp *qp) |
815 | { | 814 | { |
816 | if (qib_send_ok(qp)) { | 815 | if (qib_send_ok(qp)) |
817 | if (qp->processor_id == smp_processor_id()) | 816 | queue_work(ib_wq, &qp->s_work); |
818 | queue_work(qib_wq, &qp->s_work); | ||
819 | else | ||
820 | queue_work_on(qp->processor_id, | ||
821 | qib_wq, &qp->s_work); | ||
822 | } | ||
823 | } | 817 | } |
824 | 818 | ||
825 | static inline int qib_pkey_ok(u16 pkey1, u16 pkey2) | 819 | static inline int qib_pkey_ok(u16 pkey1, u16 pkey2) |