diff options
Diffstat (limited to 'drivers/i2c')
-rw-r--r-- | drivers/i2c/busses/i2c-pxa.c | 30 | ||||
-rw-r--r-- | drivers/i2c/chips/isp1301_omap.c | 163 |
2 files changed, 99 insertions, 94 deletions
diff --git a/drivers/i2c/busses/i2c-pxa.c b/drivers/i2c/busses/i2c-pxa.c index eb69fbadc9cb..dde6ce963a19 100644 --- a/drivers/i2c/busses/i2c-pxa.c +++ b/drivers/i2c/busses/i2c-pxa.c | |||
@@ -39,7 +39,6 @@ | |||
39 | #include <asm/io.h> | 39 | #include <asm/io.h> |
40 | #include <asm/arch/i2c.h> | 40 | #include <asm/arch/i2c.h> |
41 | #include <asm/arch/pxa-regs.h> | 41 | #include <asm/arch/pxa-regs.h> |
42 | #include <asm/arch/pxa2xx-gpio.h> | ||
43 | 42 | ||
44 | struct pxa_i2c { | 43 | struct pxa_i2c { |
45 | spinlock_t lock; | 44 | spinlock_t lock; |
@@ -945,32 +944,6 @@ static const struct i2c_algorithm i2c_pxa_pio_algorithm = { | |||
945 | .functionality = i2c_pxa_functionality, | 944 | .functionality = i2c_pxa_functionality, |
946 | }; | 945 | }; |
947 | 946 | ||
948 | static void i2c_pxa_enable(struct platform_device *dev) | ||
949 | { | ||
950 | if (cpu_is_pxa27x()) { | ||
951 | switch (dev->id) { | ||
952 | case 0: | ||
953 | pxa_gpio_mode(GPIO117_I2CSCL_MD); | ||
954 | pxa_gpio_mode(GPIO118_I2CSDA_MD); | ||
955 | break; | ||
956 | case 1: | ||
957 | local_irq_disable(); | ||
958 | PCFR |= PCFR_PI2CEN; | ||
959 | local_irq_enable(); | ||
960 | break; | ||
961 | } | ||
962 | } | ||
963 | } | ||
964 | |||
965 | static void i2c_pxa_disable(struct platform_device *dev) | ||
966 | { | ||
967 | if (cpu_is_pxa27x() && dev->id == 1) { | ||
968 | local_irq_disable(); | ||
969 | PCFR &= ~PCFR_PI2CEN; | ||
970 | local_irq_enable(); | ||
971 | } | ||
972 | } | ||
973 | |||
974 | #define res_len(r) ((r)->end - (r)->start + 1) | 947 | #define res_len(r) ((r)->end - (r)->start + 1) |
975 | static int i2c_pxa_probe(struct platform_device *dev) | 948 | static int i2c_pxa_probe(struct platform_device *dev) |
976 | { | 949 | { |
@@ -1036,7 +1009,6 @@ static int i2c_pxa_probe(struct platform_device *dev) | |||
1036 | #endif | 1009 | #endif |
1037 | 1010 | ||
1038 | clk_enable(i2c->clk); | 1011 | clk_enable(i2c->clk); |
1039 | i2c_pxa_enable(dev); | ||
1040 | 1012 | ||
1041 | if (plat) { | 1013 | if (plat) { |
1042 | i2c->adap.class = plat->class; | 1014 | i2c->adap.class = plat->class; |
@@ -1080,7 +1052,6 @@ eadapt: | |||
1080 | free_irq(irq, i2c); | 1052 | free_irq(irq, i2c); |
1081 | ereqirq: | 1053 | ereqirq: |
1082 | clk_disable(i2c->clk); | 1054 | clk_disable(i2c->clk); |
1083 | i2c_pxa_disable(dev); | ||
1084 | iounmap(i2c->reg_base); | 1055 | iounmap(i2c->reg_base); |
1085 | eremap: | 1056 | eremap: |
1086 | clk_put(i2c->clk); | 1057 | clk_put(i2c->clk); |
@@ -1103,7 +1074,6 @@ static int __exit i2c_pxa_remove(struct platform_device *dev) | |||
1103 | 1074 | ||
1104 | clk_disable(i2c->clk); | 1075 | clk_disable(i2c->clk); |
1105 | clk_put(i2c->clk); | 1076 | clk_put(i2c->clk); |
1106 | i2c_pxa_disable(dev); | ||
1107 | 1077 | ||
1108 | iounmap(i2c->reg_base); | 1078 | iounmap(i2c->reg_base); |
1109 | release_mem_region(i2c->iobase, i2c->iosize); | 1079 | release_mem_region(i2c->iobase, i2c->iosize); |
diff --git a/drivers/i2c/chips/isp1301_omap.c b/drivers/i2c/chips/isp1301_omap.c index b1b45dddb17e..03a33f1b9cd3 100644 --- a/drivers/i2c/chips/isp1301_omap.c +++ b/drivers/i2c/chips/isp1301_omap.c | |||
@@ -72,7 +72,7 @@ struct isp1301 { | |||
72 | }; | 72 | }; |
73 | 73 | ||
74 | 74 | ||
75 | /* bits in OTG_CTRL_REG */ | 75 | /* bits in OTG_CTRL */ |
76 | 76 | ||
77 | #define OTG_XCEIV_OUTPUTS \ | 77 | #define OTG_XCEIV_OUTPUTS \ |
78 | (OTG_ASESSVLD|OTG_BSESSEND|OTG_BSESSVLD|OTG_VBUSVLD|OTG_ID) | 78 | (OTG_ASESSVLD|OTG_BSESSEND|OTG_BSESSVLD|OTG_VBUSVLD|OTG_ID) |
@@ -186,8 +186,8 @@ isp1301_clear_bits(struct isp1301 *isp, u8 reg, u8 bits) | |||
186 | 186 | ||
187 | /* operational registers */ | 187 | /* operational registers */ |
188 | #define ISP1301_MODE_CONTROL_1 0x04 /* u8 read, set, +1 clear */ | 188 | #define ISP1301_MODE_CONTROL_1 0x04 /* u8 read, set, +1 clear */ |
189 | # define MC1_SPEED_REG (1 << 0) | 189 | # define MC1_SPEED (1 << 0) |
190 | # define MC1_SUSPEND_REG (1 << 1) | 190 | # define MC1_SUSPEND (1 << 1) |
191 | # define MC1_DAT_SE0 (1 << 2) | 191 | # define MC1_DAT_SE0 (1 << 2) |
192 | # define MC1_TRANSPARENT (1 << 3) | 192 | # define MC1_TRANSPARENT (1 << 3) |
193 | # define MC1_BDIS_ACON_EN (1 << 4) | 193 | # define MC1_BDIS_ACON_EN (1 << 4) |
@@ -274,7 +274,7 @@ static void power_down(struct isp1301 *isp) | |||
274 | isp->otg.state = OTG_STATE_UNDEFINED; | 274 | isp->otg.state = OTG_STATE_UNDEFINED; |
275 | 275 | ||
276 | // isp1301_set_bits(isp, ISP1301_MODE_CONTROL_2, MC2_GLOBAL_PWR_DN); | 276 | // isp1301_set_bits(isp, ISP1301_MODE_CONTROL_2, MC2_GLOBAL_PWR_DN); |
277 | isp1301_set_bits(isp, ISP1301_MODE_CONTROL_1, MC1_SUSPEND_REG); | 277 | isp1301_set_bits(isp, ISP1301_MODE_CONTROL_1, MC1_SUSPEND); |
278 | 278 | ||
279 | isp1301_clear_bits(isp, ISP1301_OTG_CONTROL_1, OTG1_ID_PULLDOWN); | 279 | isp1301_clear_bits(isp, ISP1301_OTG_CONTROL_1, OTG1_ID_PULLDOWN); |
280 | isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_1, MC1_DAT_SE0); | 280 | isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_1, MC1_DAT_SE0); |
@@ -283,7 +283,7 @@ static void power_down(struct isp1301 *isp) | |||
283 | static void power_up(struct isp1301 *isp) | 283 | static void power_up(struct isp1301 *isp) |
284 | { | 284 | { |
285 | // isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_2, MC2_GLOBAL_PWR_DN); | 285 | // isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_2, MC2_GLOBAL_PWR_DN); |
286 | isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_1, MC1_SUSPEND_REG); | 286 | isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_1, MC1_SUSPEND); |
287 | 287 | ||
288 | /* do this only when cpu is driving transceiver, | 288 | /* do this only when cpu is driving transceiver, |
289 | * so host won't see a low speed device... | 289 | * so host won't see a low speed device... |
@@ -360,6 +360,8 @@ isp1301_defer_work(struct isp1301 *isp, int work) | |||
360 | /* called from irq handlers */ | 360 | /* called from irq handlers */ |
361 | static void a_idle(struct isp1301 *isp, const char *tag) | 361 | static void a_idle(struct isp1301 *isp, const char *tag) |
362 | { | 362 | { |
363 | u32 l; | ||
364 | |||
363 | if (isp->otg.state == OTG_STATE_A_IDLE) | 365 | if (isp->otg.state == OTG_STATE_A_IDLE) |
364 | return; | 366 | return; |
365 | 367 | ||
@@ -373,13 +375,17 @@ static void a_idle(struct isp1301 *isp, const char *tag) | |||
373 | gadget_suspend(isp); | 375 | gadget_suspend(isp); |
374 | } | 376 | } |
375 | isp->otg.state = OTG_STATE_A_IDLE; | 377 | isp->otg.state = OTG_STATE_A_IDLE; |
376 | isp->last_otg_ctrl = OTG_CTRL_REG = OTG_CTRL_REG & OTG_XCEIV_OUTPUTS; | 378 | l = omap_readl(OTG_CTRL) & OTG_XCEIV_OUTPUTS; |
379 | omap_writel(l, OTG_CTRL); | ||
380 | isp->last_otg_ctrl = l; | ||
377 | pr_debug(" --> %s/%s\n", state_name(isp), tag); | 381 | pr_debug(" --> %s/%s\n", state_name(isp), tag); |
378 | } | 382 | } |
379 | 383 | ||
380 | /* called from irq handlers */ | 384 | /* called from irq handlers */ |
381 | static void b_idle(struct isp1301 *isp, const char *tag) | 385 | static void b_idle(struct isp1301 *isp, const char *tag) |
382 | { | 386 | { |
387 | u32 l; | ||
388 | |||
383 | if (isp->otg.state == OTG_STATE_B_IDLE) | 389 | if (isp->otg.state == OTG_STATE_B_IDLE) |
384 | return; | 390 | return; |
385 | 391 | ||
@@ -393,7 +399,9 @@ static void b_idle(struct isp1301 *isp, const char *tag) | |||
393 | gadget_suspend(isp); | 399 | gadget_suspend(isp); |
394 | } | 400 | } |
395 | isp->otg.state = OTG_STATE_B_IDLE; | 401 | isp->otg.state = OTG_STATE_B_IDLE; |
396 | isp->last_otg_ctrl = OTG_CTRL_REG = OTG_CTRL_REG & OTG_XCEIV_OUTPUTS; | 402 | l = omap_readl(OTG_CTRL) & OTG_XCEIV_OUTPUTS; |
403 | omap_writel(l, OTG_CTRL); | ||
404 | isp->last_otg_ctrl = l; | ||
397 | pr_debug(" --> %s/%s\n", state_name(isp), tag); | 405 | pr_debug(" --> %s/%s\n", state_name(isp), tag); |
398 | } | 406 | } |
399 | 407 | ||
@@ -406,7 +414,7 @@ dump_regs(struct isp1301 *isp, const char *label) | |||
406 | u8 src = isp1301_get_u8(isp, ISP1301_INTERRUPT_SOURCE); | 414 | u8 src = isp1301_get_u8(isp, ISP1301_INTERRUPT_SOURCE); |
407 | 415 | ||
408 | pr_debug("otg: %06x, %s %s, otg/%02x stat/%02x.%02x\n", | 416 | pr_debug("otg: %06x, %s %s, otg/%02x stat/%02x.%02x\n", |
409 | OTG_CTRL_REG, label, state_name(isp), | 417 | omap_readl(OTG_CTRL), label, state_name(isp), |
410 | ctrl, status, src); | 418 | ctrl, status, src); |
411 | /* mode control and irq enables don't change much */ | 419 | /* mode control and irq enables don't change much */ |
412 | #endif | 420 | #endif |
@@ -429,7 +437,7 @@ dump_regs(struct isp1301 *isp, const char *label) | |||
429 | static void check_state(struct isp1301 *isp, const char *tag) | 437 | static void check_state(struct isp1301 *isp, const char *tag) |
430 | { | 438 | { |
431 | enum usb_otg_state state = OTG_STATE_UNDEFINED; | 439 | enum usb_otg_state state = OTG_STATE_UNDEFINED; |
432 | u8 fsm = OTG_TEST_REG & 0x0ff; | 440 | u8 fsm = omap_readw(OTG_TEST) & 0x0ff; |
433 | unsigned extra = 0; | 441 | unsigned extra = 0; |
434 | 442 | ||
435 | switch (fsm) { | 443 | switch (fsm) { |
@@ -494,7 +502,8 @@ static void check_state(struct isp1301 *isp, const char *tag) | |||
494 | if (isp->otg.state == state && !extra) | 502 | if (isp->otg.state == state && !extra) |
495 | return; | 503 | return; |
496 | pr_debug("otg: %s FSM %s/%02x, %s, %06x\n", tag, | 504 | pr_debug("otg: %s FSM %s/%02x, %s, %06x\n", tag, |
497 | state_string(state), fsm, state_name(isp), OTG_CTRL_REG); | 505 | state_string(state), fsm, state_name(isp), |
506 | omap_readl(OTG_CTRL)); | ||
498 | } | 507 | } |
499 | 508 | ||
500 | #else | 509 | #else |
@@ -508,10 +517,11 @@ static void update_otg1(struct isp1301 *isp, u8 int_src) | |||
508 | { | 517 | { |
509 | u32 otg_ctrl; | 518 | u32 otg_ctrl; |
510 | 519 | ||
511 | otg_ctrl = OTG_CTRL_REG | 520 | otg_ctrl = omap_readl(OTG_CTRL) & OTG_CTRL_MASK; |
512 | & OTG_CTRL_MASK | 521 | otg_ctrl &= ~OTG_XCEIV_INPUTS; |
513 | & ~OTG_XCEIV_INPUTS | 522 | otg_ctrl &= ~(OTG_ID|OTG_ASESSVLD|OTG_VBUSVLD); |
514 | & ~(OTG_ID|OTG_ASESSVLD|OTG_VBUSVLD); | 523 | |
524 | |||
515 | if (int_src & INTR_SESS_VLD) | 525 | if (int_src & INTR_SESS_VLD) |
516 | otg_ctrl |= OTG_ASESSVLD; | 526 | otg_ctrl |= OTG_ASESSVLD; |
517 | else if (isp->otg.state == OTG_STATE_A_WAIT_VFALL) { | 527 | else if (isp->otg.state == OTG_STATE_A_WAIT_VFALL) { |
@@ -534,7 +544,7 @@ static void update_otg1(struct isp1301 *isp, u8 int_src) | |||
534 | return; | 544 | return; |
535 | } | 545 | } |
536 | } | 546 | } |
537 | OTG_CTRL_REG = otg_ctrl; | 547 | omap_writel(otg_ctrl, OTG_CTRL); |
538 | } | 548 | } |
539 | 549 | ||
540 | /* outputs from ISP1301_OTG_STATUS */ | 550 | /* outputs from ISP1301_OTG_STATUS */ |
@@ -542,15 +552,14 @@ static void update_otg2(struct isp1301 *isp, u8 otg_status) | |||
542 | { | 552 | { |
543 | u32 otg_ctrl; | 553 | u32 otg_ctrl; |
544 | 554 | ||
545 | otg_ctrl = OTG_CTRL_REG | 555 | otg_ctrl = omap_readl(OTG_CTRL) & OTG_CTRL_MASK; |
546 | & OTG_CTRL_MASK | 556 | otg_ctrl &= ~OTG_XCEIV_INPUTS; |
547 | & ~OTG_XCEIV_INPUTS | 557 | otg_ctrl &= ~(OTG_BSESSVLD | OTG_BSESSEND); |
548 | & ~(OTG_BSESSVLD|OTG_BSESSEND); | ||
549 | if (otg_status & OTG_B_SESS_VLD) | 558 | if (otg_status & OTG_B_SESS_VLD) |
550 | otg_ctrl |= OTG_BSESSVLD; | 559 | otg_ctrl |= OTG_BSESSVLD; |
551 | else if (otg_status & OTG_B_SESS_END) | 560 | else if (otg_status & OTG_B_SESS_END) |
552 | otg_ctrl |= OTG_BSESSEND; | 561 | otg_ctrl |= OTG_BSESSEND; |
553 | OTG_CTRL_REG = otg_ctrl; | 562 | omap_writel(otg_ctrl, OTG_CTRL); |
554 | } | 563 | } |
555 | 564 | ||
556 | /* inputs going to ISP1301 */ | 565 | /* inputs going to ISP1301 */ |
@@ -559,7 +568,7 @@ static void otg_update_isp(struct isp1301 *isp) | |||
559 | u32 otg_ctrl, otg_change; | 568 | u32 otg_ctrl, otg_change; |
560 | u8 set = OTG1_DM_PULLDOWN, clr = OTG1_DM_PULLUP; | 569 | u8 set = OTG1_DM_PULLDOWN, clr = OTG1_DM_PULLUP; |
561 | 570 | ||
562 | otg_ctrl = OTG_CTRL_REG; | 571 | otg_ctrl = omap_readl(OTG_CTRL); |
563 | otg_change = otg_ctrl ^ isp->last_otg_ctrl; | 572 | otg_change = otg_ctrl ^ isp->last_otg_ctrl; |
564 | isp->last_otg_ctrl = otg_ctrl; | 573 | isp->last_otg_ctrl = otg_ctrl; |
565 | otg_ctrl = otg_ctrl & OTG_XCEIV_INPUTS; | 574 | otg_ctrl = otg_ctrl & OTG_XCEIV_INPUTS; |
@@ -639,6 +648,8 @@ pulldown: | |||
639 | 648 | ||
640 | /* HNP switch to host or peripheral; and SRP */ | 649 | /* HNP switch to host or peripheral; and SRP */ |
641 | if (otg_change & OTG_PULLUP) { | 650 | if (otg_change & OTG_PULLUP) { |
651 | u32 l; | ||
652 | |||
642 | switch (isp->otg.state) { | 653 | switch (isp->otg.state) { |
643 | case OTG_STATE_B_IDLE: | 654 | case OTG_STATE_B_IDLE: |
644 | if (clr & OTG1_DP_PULLUP) | 655 | if (clr & OTG1_DP_PULLUP) |
@@ -655,7 +666,9 @@ pulldown: | |||
655 | default: | 666 | default: |
656 | break; | 667 | break; |
657 | } | 668 | } |
658 | OTG_CTRL_REG |= OTG_PULLUP; | 669 | l = omap_readl(OTG_CTRL); |
670 | l |= OTG_PULLUP; | ||
671 | omap_writel(l, OTG_CTRL); | ||
659 | } | 672 | } |
660 | 673 | ||
661 | check_state(isp, __func__); | 674 | check_state(isp, __func__); |
@@ -664,20 +677,20 @@ pulldown: | |||
664 | 677 | ||
665 | static irqreturn_t omap_otg_irq(int irq, void *_isp) | 678 | static irqreturn_t omap_otg_irq(int irq, void *_isp) |
666 | { | 679 | { |
667 | u16 otg_irq = OTG_IRQ_SRC_REG; | 680 | u16 otg_irq = omap_readw(OTG_IRQ_SRC); |
668 | u32 otg_ctrl; | 681 | u32 otg_ctrl; |
669 | int ret = IRQ_NONE; | 682 | int ret = IRQ_NONE; |
670 | struct isp1301 *isp = _isp; | 683 | struct isp1301 *isp = _isp; |
671 | 684 | ||
672 | /* update ISP1301 transciever from OTG controller */ | 685 | /* update ISP1301 transciever from OTG controller */ |
673 | if (otg_irq & OPRT_CHG) { | 686 | if (otg_irq & OPRT_CHG) { |
674 | OTG_IRQ_SRC_REG = OPRT_CHG; | 687 | omap_writew(OPRT_CHG, OTG_IRQ_SRC); |
675 | isp1301_defer_work(isp, WORK_UPDATE_ISP); | 688 | isp1301_defer_work(isp, WORK_UPDATE_ISP); |
676 | ret = IRQ_HANDLED; | 689 | ret = IRQ_HANDLED; |
677 | 690 | ||
678 | /* SRP to become b_peripheral failed */ | 691 | /* SRP to become b_peripheral failed */ |
679 | } else if (otg_irq & B_SRP_TMROUT) { | 692 | } else if (otg_irq & B_SRP_TMROUT) { |
680 | pr_debug("otg: B_SRP_TIMEOUT, %06x\n", OTG_CTRL_REG); | 693 | pr_debug("otg: B_SRP_TIMEOUT, %06x\n", omap_readl(OTG_CTRL)); |
681 | notresponding(isp); | 694 | notresponding(isp); |
682 | 695 | ||
683 | /* gadget drivers that care should monitor all kinds of | 696 | /* gadget drivers that care should monitor all kinds of |
@@ -687,31 +700,31 @@ static irqreturn_t omap_otg_irq(int irq, void *_isp) | |||
687 | if (isp->otg.state == OTG_STATE_B_SRP_INIT) | 700 | if (isp->otg.state == OTG_STATE_B_SRP_INIT) |
688 | b_idle(isp, "srp_timeout"); | 701 | b_idle(isp, "srp_timeout"); |
689 | 702 | ||
690 | OTG_IRQ_SRC_REG = B_SRP_TMROUT; | 703 | omap_writew(B_SRP_TMROUT, OTG_IRQ_SRC); |
691 | ret = IRQ_HANDLED; | 704 | ret = IRQ_HANDLED; |
692 | 705 | ||
693 | /* HNP to become b_host failed */ | 706 | /* HNP to become b_host failed */ |
694 | } else if (otg_irq & B_HNP_FAIL) { | 707 | } else if (otg_irq & B_HNP_FAIL) { |
695 | pr_debug("otg: %s B_HNP_FAIL, %06x\n", | 708 | pr_debug("otg: %s B_HNP_FAIL, %06x\n", |
696 | state_name(isp), OTG_CTRL_REG); | 709 | state_name(isp), omap_readl(OTG_CTRL)); |
697 | notresponding(isp); | 710 | notresponding(isp); |
698 | 711 | ||
699 | otg_ctrl = OTG_CTRL_REG; | 712 | otg_ctrl = omap_readl(OTG_CTRL); |
700 | otg_ctrl |= OTG_BUSDROP; | 713 | otg_ctrl |= OTG_BUSDROP; |
701 | otg_ctrl &= OTG_CTRL_MASK & ~OTG_XCEIV_INPUTS; | 714 | otg_ctrl &= OTG_CTRL_MASK & ~OTG_XCEIV_INPUTS; |
702 | OTG_CTRL_REG = otg_ctrl; | 715 | omap_writel(otg_ctrl, OTG_CTRL); |
703 | 716 | ||
704 | /* subset of b_peripheral()... */ | 717 | /* subset of b_peripheral()... */ |
705 | isp->otg.state = OTG_STATE_B_PERIPHERAL; | 718 | isp->otg.state = OTG_STATE_B_PERIPHERAL; |
706 | pr_debug(" --> b_peripheral\n"); | 719 | pr_debug(" --> b_peripheral\n"); |
707 | 720 | ||
708 | OTG_IRQ_SRC_REG = B_HNP_FAIL; | 721 | omap_writew(B_HNP_FAIL, OTG_IRQ_SRC); |
709 | ret = IRQ_HANDLED; | 722 | ret = IRQ_HANDLED; |
710 | 723 | ||
711 | /* detect SRP from B-device ... */ | 724 | /* detect SRP from B-device ... */ |
712 | } else if (otg_irq & A_SRP_DETECT) { | 725 | } else if (otg_irq & A_SRP_DETECT) { |
713 | pr_debug("otg: %s SRP_DETECT, %06x\n", | 726 | pr_debug("otg: %s SRP_DETECT, %06x\n", |
714 | state_name(isp), OTG_CTRL_REG); | 727 | state_name(isp), omap_readl(OTG_CTRL)); |
715 | 728 | ||
716 | isp1301_defer_work(isp, WORK_UPDATE_OTG); | 729 | isp1301_defer_work(isp, WORK_UPDATE_OTG); |
717 | switch (isp->otg.state) { | 730 | switch (isp->otg.state) { |
@@ -719,49 +732,49 @@ static irqreturn_t omap_otg_irq(int irq, void *_isp) | |||
719 | if (!isp->otg.host) | 732 | if (!isp->otg.host) |
720 | break; | 733 | break; |
721 | isp1301_defer_work(isp, WORK_HOST_RESUME); | 734 | isp1301_defer_work(isp, WORK_HOST_RESUME); |
722 | otg_ctrl = OTG_CTRL_REG; | 735 | otg_ctrl = omap_readl(OTG_CTRL); |
723 | otg_ctrl |= OTG_A_BUSREQ; | 736 | otg_ctrl |= OTG_A_BUSREQ; |
724 | otg_ctrl &= ~(OTG_BUSDROP|OTG_B_BUSREQ) | 737 | otg_ctrl &= ~(OTG_BUSDROP|OTG_B_BUSREQ) |
725 | & ~OTG_XCEIV_INPUTS | 738 | & ~OTG_XCEIV_INPUTS |
726 | & OTG_CTRL_MASK; | 739 | & OTG_CTRL_MASK; |
727 | OTG_CTRL_REG = otg_ctrl; | 740 | omap_writel(otg_ctrl, OTG_CTRL); |
728 | break; | 741 | break; |
729 | default: | 742 | default: |
730 | break; | 743 | break; |
731 | } | 744 | } |
732 | 745 | ||
733 | OTG_IRQ_SRC_REG = A_SRP_DETECT; | 746 | omap_writew(A_SRP_DETECT, OTG_IRQ_SRC); |
734 | ret = IRQ_HANDLED; | 747 | ret = IRQ_HANDLED; |
735 | 748 | ||
736 | /* timer expired: T(a_wait_bcon) and maybe T(a_wait_vrise) | 749 | /* timer expired: T(a_wait_bcon) and maybe T(a_wait_vrise) |
737 | * we don't track them separately | 750 | * we don't track them separately |
738 | */ | 751 | */ |
739 | } else if (otg_irq & A_REQ_TMROUT) { | 752 | } else if (otg_irq & A_REQ_TMROUT) { |
740 | otg_ctrl = OTG_CTRL_REG; | 753 | otg_ctrl = omap_readl(OTG_CTRL); |
741 | pr_info("otg: BCON_TMOUT from %s, %06x\n", | 754 | pr_info("otg: BCON_TMOUT from %s, %06x\n", |
742 | state_name(isp), otg_ctrl); | 755 | state_name(isp), otg_ctrl); |
743 | notresponding(isp); | 756 | notresponding(isp); |
744 | 757 | ||
745 | otg_ctrl |= OTG_BUSDROP; | 758 | otg_ctrl |= OTG_BUSDROP; |
746 | otg_ctrl &= ~OTG_A_BUSREQ & OTG_CTRL_MASK & ~OTG_XCEIV_INPUTS; | 759 | otg_ctrl &= ~OTG_A_BUSREQ & OTG_CTRL_MASK & ~OTG_XCEIV_INPUTS; |
747 | OTG_CTRL_REG = otg_ctrl; | 760 | omap_writel(otg_ctrl, OTG_CTRL); |
748 | isp->otg.state = OTG_STATE_A_WAIT_VFALL; | 761 | isp->otg.state = OTG_STATE_A_WAIT_VFALL; |
749 | 762 | ||
750 | OTG_IRQ_SRC_REG = A_REQ_TMROUT; | 763 | omap_writew(A_REQ_TMROUT, OTG_IRQ_SRC); |
751 | ret = IRQ_HANDLED; | 764 | ret = IRQ_HANDLED; |
752 | 765 | ||
753 | /* A-supplied voltage fell too low; overcurrent */ | 766 | /* A-supplied voltage fell too low; overcurrent */ |
754 | } else if (otg_irq & A_VBUS_ERR) { | 767 | } else if (otg_irq & A_VBUS_ERR) { |
755 | otg_ctrl = OTG_CTRL_REG; | 768 | otg_ctrl = omap_readl(OTG_CTRL); |
756 | printk(KERN_ERR "otg: %s, VBUS_ERR %04x ctrl %06x\n", | 769 | printk(KERN_ERR "otg: %s, VBUS_ERR %04x ctrl %06x\n", |
757 | state_name(isp), otg_irq, otg_ctrl); | 770 | state_name(isp), otg_irq, otg_ctrl); |
758 | 771 | ||
759 | otg_ctrl |= OTG_BUSDROP; | 772 | otg_ctrl |= OTG_BUSDROP; |
760 | otg_ctrl &= ~OTG_A_BUSREQ & OTG_CTRL_MASK & ~OTG_XCEIV_INPUTS; | 773 | otg_ctrl &= ~OTG_A_BUSREQ & OTG_CTRL_MASK & ~OTG_XCEIV_INPUTS; |
761 | OTG_CTRL_REG = otg_ctrl; | 774 | omap_writel(otg_ctrl, OTG_CTRL); |
762 | isp->otg.state = OTG_STATE_A_VBUS_ERR; | 775 | isp->otg.state = OTG_STATE_A_VBUS_ERR; |
763 | 776 | ||
764 | OTG_IRQ_SRC_REG = A_VBUS_ERR; | 777 | omap_writew(A_VBUS_ERR, OTG_IRQ_SRC); |
765 | ret = IRQ_HANDLED; | 778 | ret = IRQ_HANDLED; |
766 | 779 | ||
767 | /* switch driver; the transciever code activates it, | 780 | /* switch driver; the transciever code activates it, |
@@ -770,7 +783,7 @@ static irqreturn_t omap_otg_irq(int irq, void *_isp) | |||
770 | } else if (otg_irq & DRIVER_SWITCH) { | 783 | } else if (otg_irq & DRIVER_SWITCH) { |
771 | int kick = 0; | 784 | int kick = 0; |
772 | 785 | ||
773 | otg_ctrl = OTG_CTRL_REG; | 786 | otg_ctrl = omap_readl(OTG_CTRL); |
774 | printk(KERN_NOTICE "otg: %s, SWITCH to %s, ctrl %06x\n", | 787 | printk(KERN_NOTICE "otg: %s, SWITCH to %s, ctrl %06x\n", |
775 | state_name(isp), | 788 | state_name(isp), |
776 | (otg_ctrl & OTG_DRIVER_SEL) | 789 | (otg_ctrl & OTG_DRIVER_SEL) |
@@ -793,7 +806,7 @@ static irqreturn_t omap_otg_irq(int irq, void *_isp) | |||
793 | } else { | 806 | } else { |
794 | if (!(otg_ctrl & OTG_ID)) { | 807 | if (!(otg_ctrl & OTG_ID)) { |
795 | otg_ctrl &= OTG_CTRL_MASK & ~OTG_XCEIV_INPUTS; | 808 | otg_ctrl &= OTG_CTRL_MASK & ~OTG_XCEIV_INPUTS; |
796 | OTG_CTRL_REG = otg_ctrl | OTG_A_BUSREQ; | 809 | omap_writel(otg_ctrl | OTG_A_BUSREQ, OTG_CTRL); |
797 | } | 810 | } |
798 | 811 | ||
799 | if (isp->otg.host) { | 812 | if (isp->otg.host) { |
@@ -818,7 +831,7 @@ static irqreturn_t omap_otg_irq(int irq, void *_isp) | |||
818 | } | 831 | } |
819 | } | 832 | } |
820 | 833 | ||
821 | OTG_IRQ_SRC_REG = DRIVER_SWITCH; | 834 | omap_writew(DRIVER_SWITCH, OTG_IRQ_SRC); |
822 | ret = IRQ_HANDLED; | 835 | ret = IRQ_HANDLED; |
823 | 836 | ||
824 | if (kick) | 837 | if (kick) |
@@ -834,12 +847,15 @@ static struct platform_device *otg_dev; | |||
834 | 847 | ||
835 | static int otg_init(struct isp1301 *isp) | 848 | static int otg_init(struct isp1301 *isp) |
836 | { | 849 | { |
850 | u32 l; | ||
851 | |||
837 | if (!otg_dev) | 852 | if (!otg_dev) |
838 | return -ENODEV; | 853 | return -ENODEV; |
839 | 854 | ||
840 | dump_regs(isp, __func__); | 855 | dump_regs(isp, __func__); |
841 | /* some of these values are board-specific... */ | 856 | /* some of these values are board-specific... */ |
842 | OTG_SYSCON_2_REG |= OTG_EN | 857 | l = omap_readl(OTG_SYSCON_2); |
858 | l |= OTG_EN | ||
843 | /* for B-device: */ | 859 | /* for B-device: */ |
844 | | SRP_GPDATA /* 9msec Bdev D+ pulse */ | 860 | | SRP_GPDATA /* 9msec Bdev D+ pulse */ |
845 | | SRP_GPDVBUS /* discharge after VBUS pulse */ | 861 | | SRP_GPDVBUS /* discharge after VBUS pulse */ |
@@ -849,18 +865,22 @@ static int otg_init(struct isp1301 *isp) | |||
849 | | SRP_DPW /* detect 167+ns SRP pulses */ | 865 | | SRP_DPW /* detect 167+ns SRP pulses */ |
850 | | SRP_DATA | SRP_VBUS /* accept both kinds of SRP pulse */ | 866 | | SRP_DATA | SRP_VBUS /* accept both kinds of SRP pulse */ |
851 | ; | 867 | ; |
868 | omap_writel(l, OTG_SYSCON_2); | ||
852 | 869 | ||
853 | update_otg1(isp, isp1301_get_u8(isp, ISP1301_INTERRUPT_SOURCE)); | 870 | update_otg1(isp, isp1301_get_u8(isp, ISP1301_INTERRUPT_SOURCE)); |
854 | update_otg2(isp, isp1301_get_u8(isp, ISP1301_OTG_STATUS)); | 871 | update_otg2(isp, isp1301_get_u8(isp, ISP1301_OTG_STATUS)); |
855 | 872 | ||
856 | check_state(isp, __func__); | 873 | check_state(isp, __func__); |
857 | pr_debug("otg: %s, %s %06x\n", | 874 | pr_debug("otg: %s, %s %06x\n", |
858 | state_name(isp), __func__, OTG_CTRL_REG); | 875 | state_name(isp), __func__, omap_readl(OTG_CTRL)); |
859 | 876 | ||
860 | OTG_IRQ_EN_REG = DRIVER_SWITCH | OPRT_CHG | 877 | omap_writew(DRIVER_SWITCH | OPRT_CHG |
861 | | B_SRP_TMROUT | B_HNP_FAIL | 878 | | B_SRP_TMROUT | B_HNP_FAIL |
862 | | A_VBUS_ERR | A_SRP_DETECT | A_REQ_TMROUT; | 879 | | A_VBUS_ERR | A_SRP_DETECT | A_REQ_TMROUT, OTG_IRQ_EN); |
863 | OTG_SYSCON_2_REG |= OTG_EN; | 880 | |
881 | l = omap_readl(OTG_SYSCON_2); | ||
882 | l |= OTG_EN; | ||
883 | omap_writel(l, OTG_SYSCON_2); | ||
864 | 884 | ||
865 | return 0; | 885 | return 0; |
866 | } | 886 | } |
@@ -927,7 +947,11 @@ static void otg_unbind(struct isp1301 *isp) | |||
927 | 947 | ||
928 | static void b_peripheral(struct isp1301 *isp) | 948 | static void b_peripheral(struct isp1301 *isp) |
929 | { | 949 | { |
930 | OTG_CTRL_REG = OTG_CTRL_REG & OTG_XCEIV_OUTPUTS; | 950 | u32 l; |
951 | |||
952 | l = omap_readl(OTG_CTRL) & OTG_XCEIV_OUTPUTS; | ||
953 | omap_writel(l, OTG_CTRL); | ||
954 | |||
931 | usb_gadget_vbus_connect(isp->otg.gadget); | 955 | usb_gadget_vbus_connect(isp->otg.gadget); |
932 | 956 | ||
933 | #ifdef CONFIG_USB_OTG | 957 | #ifdef CONFIG_USB_OTG |
@@ -999,6 +1023,8 @@ static void isp_update_otg(struct isp1301 *isp, u8 stat) | |||
999 | isp_bstat = 0; | 1023 | isp_bstat = 0; |
1000 | } | 1024 | } |
1001 | } else { | 1025 | } else { |
1026 | u32 l; | ||
1027 | |||
1002 | /* if user unplugged mini-A end of cable, | 1028 | /* if user unplugged mini-A end of cable, |
1003 | * don't bypass A_WAIT_VFALL. | 1029 | * don't bypass A_WAIT_VFALL. |
1004 | */ | 1030 | */ |
@@ -1019,8 +1045,9 @@ static void isp_update_otg(struct isp1301 *isp, u8 stat) | |||
1019 | isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_1, | 1045 | isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_1, |
1020 | MC1_BDIS_ACON_EN); | 1046 | MC1_BDIS_ACON_EN); |
1021 | isp->otg.state = OTG_STATE_B_IDLE; | 1047 | isp->otg.state = OTG_STATE_B_IDLE; |
1022 | OTG_CTRL_REG &= OTG_CTRL_REG & OTG_CTRL_MASK | 1048 | l = omap_readl(OTG_CTRL) & OTG_CTRL_MASK; |
1023 | & ~OTG_CTRL_BITS; | 1049 | l &= ~OTG_CTRL_BITS; |
1050 | omap_writel(l, OTG_CTRL); | ||
1024 | break; | 1051 | break; |
1025 | case OTG_STATE_B_IDLE: | 1052 | case OTG_STATE_B_IDLE: |
1026 | break; | 1053 | break; |
@@ -1046,7 +1073,8 @@ static void isp_update_otg(struct isp1301 *isp, u8 stat) | |||
1046 | /* FALLTHROUGH */ | 1073 | /* FALLTHROUGH */ |
1047 | case OTG_STATE_B_SRP_INIT: | 1074 | case OTG_STATE_B_SRP_INIT: |
1048 | b_idle(isp, __func__); | 1075 | b_idle(isp, __func__); |
1049 | OTG_CTRL_REG &= OTG_CTRL_REG & OTG_XCEIV_OUTPUTS; | 1076 | l = omap_readl(OTG_CTRL) & OTG_XCEIV_OUTPUTS; |
1077 | omap_writel(l, OTG_CTRL); | ||
1050 | /* FALLTHROUGH */ | 1078 | /* FALLTHROUGH */ |
1051 | case OTG_STATE_B_IDLE: | 1079 | case OTG_STATE_B_IDLE: |
1052 | if (isp->otg.gadget && (isp_bstat & OTG_B_SESS_VLD)) { | 1080 | if (isp->otg.gadget && (isp_bstat & OTG_B_SESS_VLD)) { |
@@ -1130,11 +1158,11 @@ isp1301_work(struct work_struct *work) | |||
1130 | case OTG_STATE_A_WAIT_VRISE: | 1158 | case OTG_STATE_A_WAIT_VRISE: |
1131 | isp->otg.state = OTG_STATE_A_HOST; | 1159 | isp->otg.state = OTG_STATE_A_HOST; |
1132 | pr_debug(" --> a_host\n"); | 1160 | pr_debug(" --> a_host\n"); |
1133 | otg_ctrl = OTG_CTRL_REG; | 1161 | otg_ctrl = omap_readl(OTG_CTRL); |
1134 | otg_ctrl |= OTG_A_BUSREQ; | 1162 | otg_ctrl |= OTG_A_BUSREQ; |
1135 | otg_ctrl &= ~(OTG_BUSDROP|OTG_B_BUSREQ) | 1163 | otg_ctrl &= ~(OTG_BUSDROP|OTG_B_BUSREQ) |
1136 | & OTG_CTRL_MASK; | 1164 | & OTG_CTRL_MASK; |
1137 | OTG_CTRL_REG = otg_ctrl; | 1165 | omap_writel(otg_ctrl, OTG_CTRL); |
1138 | break; | 1166 | break; |
1139 | case OTG_STATE_B_WAIT_ACON: | 1167 | case OTG_STATE_B_WAIT_ACON: |
1140 | isp->otg.state = OTG_STATE_B_HOST; | 1168 | isp->otg.state = OTG_STATE_B_HOST; |
@@ -1274,7 +1302,7 @@ isp1301_set_host(struct otg_transceiver *otg, struct usb_bus *host) | |||
1274 | return -ENODEV; | 1302 | return -ENODEV; |
1275 | 1303 | ||
1276 | if (!host) { | 1304 | if (!host) { |
1277 | OTG_IRQ_EN_REG = 0; | 1305 | omap_writew(0, OTG_IRQ_EN); |
1278 | power_down(isp); | 1306 | power_down(isp); |
1279 | isp->otg.host = 0; | 1307 | isp->otg.host = 0; |
1280 | return 0; | 1308 | return 0; |
@@ -1325,12 +1353,13 @@ static int | |||
1325 | isp1301_set_peripheral(struct otg_transceiver *otg, struct usb_gadget *gadget) | 1353 | isp1301_set_peripheral(struct otg_transceiver *otg, struct usb_gadget *gadget) |
1326 | { | 1354 | { |
1327 | struct isp1301 *isp = container_of(otg, struct isp1301, otg); | 1355 | struct isp1301 *isp = container_of(otg, struct isp1301, otg); |
1356 | u32 l; | ||
1328 | 1357 | ||
1329 | if (!otg || isp != the_transceiver) | 1358 | if (!otg || isp != the_transceiver) |
1330 | return -ENODEV; | 1359 | return -ENODEV; |
1331 | 1360 | ||
1332 | if (!gadget) { | 1361 | if (!gadget) { |
1333 | OTG_IRQ_EN_REG = 0; | 1362 | omap_writew(0, OTG_IRQ_EN); |
1334 | if (!isp->otg.default_a) | 1363 | if (!isp->otg.default_a) |
1335 | enable_vbus_draw(isp, 0); | 1364 | enable_vbus_draw(isp, 0); |
1336 | usb_gadget_vbus_disconnect(isp->otg.gadget); | 1365 | usb_gadget_vbus_disconnect(isp->otg.gadget); |
@@ -1351,9 +1380,11 @@ isp1301_set_peripheral(struct otg_transceiver *otg, struct usb_gadget *gadget) | |||
1351 | isp->otg.gadget = gadget; | 1380 | isp->otg.gadget = gadget; |
1352 | // FIXME update its refcount | 1381 | // FIXME update its refcount |
1353 | 1382 | ||
1354 | OTG_CTRL_REG = (OTG_CTRL_REG & OTG_CTRL_MASK | 1383 | l = omap_readl(OTG_CTRL) & OTG_CTRL_MASK; |
1355 | & ~(OTG_XCEIV_OUTPUTS|OTG_CTRL_BITS)) | 1384 | l &= ~(OTG_XCEIV_OUTPUTS|OTG_CTRL_BITS); |
1356 | | OTG_ID; | 1385 | l |= OTG_ID; |
1386 | omap_writel(l, OTG_CTRL); | ||
1387 | |||
1357 | power_up(isp); | 1388 | power_up(isp); |
1358 | isp->otg.state = OTG_STATE_B_IDLE; | 1389 | isp->otg.state = OTG_STATE_B_IDLE; |
1359 | 1390 | ||
@@ -1405,16 +1436,17 @@ isp1301_start_srp(struct otg_transceiver *dev) | |||
1405 | || isp->otg.state != OTG_STATE_B_IDLE) | 1436 | || isp->otg.state != OTG_STATE_B_IDLE) |
1406 | return -ENODEV; | 1437 | return -ENODEV; |
1407 | 1438 | ||
1408 | otg_ctrl = OTG_CTRL_REG; | 1439 | otg_ctrl = omap_readl(OTG_CTRL); |
1409 | if (!(otg_ctrl & OTG_BSESSEND)) | 1440 | if (!(otg_ctrl & OTG_BSESSEND)) |
1410 | return -EINVAL; | 1441 | return -EINVAL; |
1411 | 1442 | ||
1412 | otg_ctrl |= OTG_B_BUSREQ; | 1443 | otg_ctrl |= OTG_B_BUSREQ; |
1413 | otg_ctrl &= ~OTG_A_BUSREQ & OTG_CTRL_MASK; | 1444 | otg_ctrl &= ~OTG_A_BUSREQ & OTG_CTRL_MASK; |
1414 | OTG_CTRL_REG = otg_ctrl; | 1445 | omap_writel(otg_ctrl, OTG_CTRL); |
1415 | isp->otg.state = OTG_STATE_B_SRP_INIT; | 1446 | isp->otg.state = OTG_STATE_B_SRP_INIT; |
1416 | 1447 | ||
1417 | pr_debug("otg: SRP, %s ... %06x\n", state_name(isp), OTG_CTRL_REG); | 1448 | pr_debug("otg: SRP, %s ... %06x\n", state_name(isp), |
1449 | omap_readl(OTG_CTRL)); | ||
1418 | #ifdef CONFIG_USB_OTG | 1450 | #ifdef CONFIG_USB_OTG |
1419 | check_state(isp, __func__); | 1451 | check_state(isp, __func__); |
1420 | #endif | 1452 | #endif |
@@ -1426,6 +1458,7 @@ isp1301_start_hnp(struct otg_transceiver *dev) | |||
1426 | { | 1458 | { |
1427 | #ifdef CONFIG_USB_OTG | 1459 | #ifdef CONFIG_USB_OTG |
1428 | struct isp1301 *isp = container_of(dev, struct isp1301, otg); | 1460 | struct isp1301 *isp = container_of(dev, struct isp1301, otg); |
1461 | u32 l; | ||
1429 | 1462 | ||
1430 | if (!dev || isp != the_transceiver) | 1463 | if (!dev || isp != the_transceiver) |
1431 | return -ENODEV; | 1464 | return -ENODEV; |
@@ -1452,7 +1485,9 @@ isp1301_start_hnp(struct otg_transceiver *dev) | |||
1452 | #endif | 1485 | #endif |
1453 | /* caller must suspend then clear A_BUSREQ */ | 1486 | /* caller must suspend then clear A_BUSREQ */ |
1454 | usb_gadget_vbus_connect(isp->otg.gadget); | 1487 | usb_gadget_vbus_connect(isp->otg.gadget); |
1455 | OTG_CTRL_REG |= OTG_A_SETB_HNPEN; | 1488 | l = omap_readl(OTG_CTRL); |
1489 | l |= OTG_A_SETB_HNPEN; | ||
1490 | omap_writel(l, OTG_CTRL); | ||
1456 | 1491 | ||
1457 | break; | 1492 | break; |
1458 | case OTG_STATE_A_PERIPHERAL: | 1493 | case OTG_STATE_A_PERIPHERAL: |
@@ -1462,7 +1497,7 @@ isp1301_start_hnp(struct otg_transceiver *dev) | |||
1462 | return -EILSEQ; | 1497 | return -EILSEQ; |
1463 | } | 1498 | } |
1464 | pr_debug("otg: HNP %s, %06x ...\n", | 1499 | pr_debug("otg: HNP %s, %06x ...\n", |
1465 | state_name(isp), OTG_CTRL_REG); | 1500 | state_name(isp), omap_readl(OTG_CTRL)); |
1466 | check_state(isp, __func__); | 1501 | check_state(isp, __func__); |
1467 | return 0; | 1502 | return 0; |
1468 | #else | 1503 | #else |