diff options
Diffstat (limited to 'drivers/gpu/drm')
| -rw-r--r-- | drivers/gpu/drm/exynos/exynos_drm_gem.c | 30 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/i915_debugfs.c | 3 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/i915_dma.c | 15 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/i915_gem_execbuffer.c | 8 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/intel_crt.c | 29 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 9 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/intel_hdmi.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/intel_lvds.c | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/intel_ringbuffer.c | 8 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/intel_sdvo.c | 34 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_acpi.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_bios.c | 10 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_hdmi.c | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/nv10_gpio.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/nvc0_fb.c | 5 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/atombios_crtc.c | 7 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_device.c | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_display.c | 3 |
19 files changed, 97 insertions, 83 deletions
diff --git a/drivers/gpu/drm/exynos/exynos_drm_gem.c b/drivers/gpu/drm/exynos/exynos_drm_gem.c index 392ce71ed6a1..1dffa8359f88 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_gem.c +++ b/drivers/gpu/drm/exynos/exynos_drm_gem.c | |||
| @@ -149,22 +149,12 @@ static int exynos_drm_gem_map_pages(struct drm_gem_object *obj, | |||
| 149 | unsigned long pfn; | 149 | unsigned long pfn; |
| 150 | 150 | ||
| 151 | if (exynos_gem_obj->flags & EXYNOS_BO_NONCONTIG) { | 151 | if (exynos_gem_obj->flags & EXYNOS_BO_NONCONTIG) { |
| 152 | unsigned long usize = buf->size; | ||
| 153 | |||
| 154 | if (!buf->pages) | 152 | if (!buf->pages) |
| 155 | return -EINTR; | 153 | return -EINTR; |
| 156 | 154 | ||
| 157 | while (usize > 0) { | 155 | pfn = page_to_pfn(buf->pages[page_offset++]); |
| 158 | pfn = page_to_pfn(buf->pages[page_offset++]); | 156 | } else |
| 159 | vm_insert_mixed(vma, f_vaddr, pfn); | 157 | pfn = (buf->dma_addr >> PAGE_SHIFT) + page_offset; |
| 160 | f_vaddr += PAGE_SIZE; | ||
| 161 | usize -= PAGE_SIZE; | ||
| 162 | } | ||
| 163 | |||
| 164 | return 0; | ||
| 165 | } | ||
| 166 | |||
| 167 | pfn = (buf->dma_addr >> PAGE_SHIFT) + page_offset; | ||
| 168 | 158 | ||
| 169 | return vm_insert_mixed(vma, f_vaddr, pfn); | 159 | return vm_insert_mixed(vma, f_vaddr, pfn); |
| 170 | } | 160 | } |
| @@ -524,6 +514,8 @@ static int exynos_drm_gem_mmap_buffer(struct file *filp, | |||
| 524 | if (!buffer->pages) | 514 | if (!buffer->pages) |
| 525 | return -EINVAL; | 515 | return -EINVAL; |
| 526 | 516 | ||
| 517 | vma->vm_flags |= VM_MIXEDMAP; | ||
| 518 | |||
| 527 | do { | 519 | do { |
| 528 | ret = vm_insert_page(vma, uaddr, buffer->pages[i++]); | 520 | ret = vm_insert_page(vma, uaddr, buffer->pages[i++]); |
| 529 | if (ret) { | 521 | if (ret) { |
| @@ -710,7 +702,6 @@ int exynos_drm_gem_dumb_destroy(struct drm_file *file_priv, | |||
| 710 | int exynos_drm_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf) | 702 | int exynos_drm_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf) |
| 711 | { | 703 | { |
| 712 | struct drm_gem_object *obj = vma->vm_private_data; | 704 | struct drm_gem_object *obj = vma->vm_private_data; |
| 713 | struct exynos_drm_gem_obj *exynos_gem_obj = to_exynos_gem_obj(obj); | ||
| 714 | struct drm_device *dev = obj->dev; | 705 | struct drm_device *dev = obj->dev; |
| 715 | unsigned long f_vaddr; | 706 | unsigned long f_vaddr; |
| 716 | pgoff_t page_offset; | 707 | pgoff_t page_offset; |
| @@ -722,21 +713,10 @@ int exynos_drm_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf) | |||
| 722 | 713 | ||
| 723 | mutex_lock(&dev->struct_mutex); | 714 | mutex_lock(&dev->struct_mutex); |
| 724 | 715 | ||
| 725 | /* | ||
| 726 | * allocate all pages as desired size if user wants to allocate | ||
| 727 | * physically non-continuous memory. | ||
| 728 | */ | ||
| 729 | if (exynos_gem_obj->flags & EXYNOS_BO_NONCONTIG) { | ||
| 730 | ret = exynos_drm_gem_get_pages(obj); | ||
| 731 | if (ret < 0) | ||
| 732 | goto err; | ||
| 733 | } | ||
| 734 | |||
| 735 | ret = exynos_drm_gem_map_pages(obj, vma, f_vaddr, page_offset); | 716 | ret = exynos_drm_gem_map_pages(obj, vma, f_vaddr, page_offset); |
| 736 | if (ret < 0) | 717 | if (ret < 0) |
| 737 | DRM_ERROR("failed to map pages.\n"); | 718 | DRM_ERROR("failed to map pages.\n"); |
| 738 | 719 | ||
| 739 | err: | ||
| 740 | mutex_unlock(&dev->struct_mutex); | 720 | mutex_unlock(&dev->struct_mutex); |
| 741 | 721 | ||
| 742 | return convert_to_vm_err_msg(ret); | 722 | return convert_to_vm_err_msg(ret); |
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index b505b70dba05..e6162a1681f0 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c | |||
| @@ -1224,6 +1224,9 @@ static int i915_emon_status(struct seq_file *m, void *unused) | |||
| 1224 | unsigned long temp, chipset, gfx; | 1224 | unsigned long temp, chipset, gfx; |
| 1225 | int ret; | 1225 | int ret; |
| 1226 | 1226 | ||
| 1227 | if (!IS_GEN5(dev)) | ||
| 1228 | return -ENODEV; | ||
| 1229 | |||
| 1227 | ret = mutex_lock_interruptible(&dev->struct_mutex); | 1230 | ret = mutex_lock_interruptible(&dev->struct_mutex); |
| 1228 | if (ret) | 1231 | if (ret) |
| 1229 | return ret; | 1232 | return ret; |
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index 785f67f963ef..ba60f3c8f911 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c | |||
| @@ -1701,6 +1701,9 @@ void i915_update_gfx_val(struct drm_i915_private *dev_priv) | |||
| 1701 | unsigned long diffms; | 1701 | unsigned long diffms; |
| 1702 | u32 count; | 1702 | u32 count; |
| 1703 | 1703 | ||
| 1704 | if (dev_priv->info->gen != 5) | ||
| 1705 | return; | ||
| 1706 | |||
| 1704 | getrawmonotonic(&now); | 1707 | getrawmonotonic(&now); |
| 1705 | diff1 = timespec_sub(now, dev_priv->last_time2); | 1708 | diff1 = timespec_sub(now, dev_priv->last_time2); |
| 1706 | 1709 | ||
| @@ -2121,12 +2124,14 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) | |||
| 2121 | setup_timer(&dev_priv->hangcheck_timer, i915_hangcheck_elapsed, | 2124 | setup_timer(&dev_priv->hangcheck_timer, i915_hangcheck_elapsed, |
| 2122 | (unsigned long) dev); | 2125 | (unsigned long) dev); |
| 2123 | 2126 | ||
| 2124 | spin_lock(&mchdev_lock); | 2127 | if (IS_GEN5(dev)) { |
| 2125 | i915_mch_dev = dev_priv; | 2128 | spin_lock(&mchdev_lock); |
| 2126 | dev_priv->mchdev_lock = &mchdev_lock; | 2129 | i915_mch_dev = dev_priv; |
| 2127 | spin_unlock(&mchdev_lock); | 2130 | dev_priv->mchdev_lock = &mchdev_lock; |
| 2131 | spin_unlock(&mchdev_lock); | ||
| 2128 | 2132 | ||
| 2129 | ips_ping_for_i915_load(); | 2133 | ips_ping_for_i915_load(); |
| 2134 | } | ||
| 2130 | 2135 | ||
| 2131 | return 0; | 2136 | return 0; |
| 2132 | 2137 | ||
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c index f51a696486cb..de431942ded4 100644 --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c | |||
| @@ -1133,6 +1133,11 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data, | |||
| 1133 | return -EINVAL; | 1133 | return -EINVAL; |
| 1134 | } | 1134 | } |
| 1135 | 1135 | ||
| 1136 | if (args->num_cliprects > UINT_MAX / sizeof(*cliprects)) { | ||
| 1137 | DRM_DEBUG("execbuf with %u cliprects\n", | ||
| 1138 | args->num_cliprects); | ||
| 1139 | return -EINVAL; | ||
| 1140 | } | ||
| 1136 | cliprects = kmalloc(args->num_cliprects * sizeof(*cliprects), | 1141 | cliprects = kmalloc(args->num_cliprects * sizeof(*cliprects), |
| 1137 | GFP_KERNEL); | 1142 | GFP_KERNEL); |
| 1138 | if (cliprects == NULL) { | 1143 | if (cliprects == NULL) { |
| @@ -1404,7 +1409,8 @@ i915_gem_execbuffer2(struct drm_device *dev, void *data, | |||
| 1404 | struct drm_i915_gem_exec_object2 *exec2_list = NULL; | 1409 | struct drm_i915_gem_exec_object2 *exec2_list = NULL; |
| 1405 | int ret; | 1410 | int ret; |
| 1406 | 1411 | ||
| 1407 | if (args->buffer_count < 1) { | 1412 | if (args->buffer_count < 1 || |
| 1413 | args->buffer_count > UINT_MAX / sizeof(*exec2_list)) { | ||
| 1408 | DRM_DEBUG("execbuf2 with %d buffers\n", args->buffer_count); | 1414 | DRM_DEBUG("execbuf2 with %d buffers\n", args->buffer_count); |
| 1409 | return -EINVAL; | 1415 | return -EINVAL; |
| 1410 | } | 1416 | } |
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index b4bb1ef77ddc..9d24d65f0c3e 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h | |||
| @@ -568,6 +568,7 @@ | |||
| 568 | #define CM0_MASK_SHIFT 16 | 568 | #define CM0_MASK_SHIFT 16 |
| 569 | #define CM0_IZ_OPT_DISABLE (1<<6) | 569 | #define CM0_IZ_OPT_DISABLE (1<<6) |
| 570 | #define CM0_ZR_OPT_DISABLE (1<<5) | 570 | #define CM0_ZR_OPT_DISABLE (1<<5) |
| 571 | #define CM0_STC_EVICT_DISABLE_LRA_SNB (1<<5) | ||
| 571 | #define CM0_DEPTH_EVICT_DISABLE (1<<4) | 572 | #define CM0_DEPTH_EVICT_DISABLE (1<<4) |
| 572 | #define CM0_COLOR_EVICT_DISABLE (1<<3) | 573 | #define CM0_COLOR_EVICT_DISABLE (1<<3) |
| 573 | #define CM0_DEPTH_WRITE_DISABLE (1<<1) | 574 | #define CM0_DEPTH_WRITE_DISABLE (1<<1) |
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c index 4d3d736a4f56..90b9793fd5da 100644 --- a/drivers/gpu/drm/i915/intel_crt.c +++ b/drivers/gpu/drm/i915/intel_crt.c | |||
| @@ -430,8 +430,8 @@ intel_crt_detect(struct drm_connector *connector, bool force) | |||
| 430 | { | 430 | { |
| 431 | struct drm_device *dev = connector->dev; | 431 | struct drm_device *dev = connector->dev; |
| 432 | struct intel_crt *crt = intel_attached_crt(connector); | 432 | struct intel_crt *crt = intel_attached_crt(connector); |
| 433 | struct drm_crtc *crtc; | ||
| 434 | enum drm_connector_status status; | 433 | enum drm_connector_status status; |
| 434 | struct intel_load_detect_pipe tmp; | ||
| 435 | 435 | ||
| 436 | if (I915_HAS_HOTPLUG(dev)) { | 436 | if (I915_HAS_HOTPLUG(dev)) { |
| 437 | if (intel_crt_detect_hotplug(connector)) { | 437 | if (intel_crt_detect_hotplug(connector)) { |
| @@ -450,23 +450,16 @@ intel_crt_detect(struct drm_connector *connector, bool force) | |||
| 450 | return connector->status; | 450 | return connector->status; |
| 451 | 451 | ||
| 452 | /* for pre-945g platforms use load detect */ | 452 | /* for pre-945g platforms use load detect */ |
| 453 | crtc = crt->base.base.crtc; | 453 | if (intel_get_load_detect_pipe(&crt->base, connector, NULL, |
| 454 | if (crtc && crtc->enabled) { | 454 | &tmp)) { |
| 455 | status = intel_crt_load_detect(crt); | 455 | if (intel_crt_detect_ddc(connector)) |
| 456 | } else { | 456 | status = connector_status_connected; |
| 457 | struct intel_load_detect_pipe tmp; | 457 | else |
| 458 | 458 | status = intel_crt_load_detect(crt); | |
| 459 | if (intel_get_load_detect_pipe(&crt->base, connector, NULL, | 459 | intel_release_load_detect_pipe(&crt->base, connector, |
| 460 | &tmp)) { | 460 | &tmp); |
| 461 | if (intel_crt_detect_ddc(connector)) | 461 | } else |
| 462 | status = connector_status_connected; | 462 | status = connector_status_unknown; |
| 463 | else | ||
| 464 | status = intel_crt_load_detect(crt); | ||
| 465 | intel_release_load_detect_pipe(&crt->base, connector, | ||
| 466 | &tmp); | ||
| 467 | } else | ||
| 468 | status = connector_status_unknown; | ||
| 469 | } | ||
| 470 | 463 | ||
| 471 | return status; | 464 | return status; |
| 472 | } | 465 | } |
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 5908cd563400..1b1cf3b3ff51 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
| @@ -7072,9 +7072,6 @@ static void intel_decrease_pllclock(struct drm_crtc *crtc) | |||
| 7072 | struct drm_device *dev = crtc->dev; | 7072 | struct drm_device *dev = crtc->dev; |
| 7073 | drm_i915_private_t *dev_priv = dev->dev_private; | 7073 | drm_i915_private_t *dev_priv = dev->dev_private; |
| 7074 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | 7074 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
| 7075 | int pipe = intel_crtc->pipe; | ||
| 7076 | int dpll_reg = DPLL(pipe); | ||
| 7077 | int dpll = I915_READ(dpll_reg); | ||
| 7078 | 7075 | ||
| 7079 | if (HAS_PCH_SPLIT(dev)) | 7076 | if (HAS_PCH_SPLIT(dev)) |
| 7080 | return; | 7077 | return; |
| @@ -7087,10 +7084,15 @@ static void intel_decrease_pllclock(struct drm_crtc *crtc) | |||
| 7087 | * the manual case. | 7084 | * the manual case. |
| 7088 | */ | 7085 | */ |
| 7089 | if (!HAS_PIPE_CXSR(dev) && intel_crtc->lowfreq_avail) { | 7086 | if (!HAS_PIPE_CXSR(dev) && intel_crtc->lowfreq_avail) { |
| 7087 | int pipe = intel_crtc->pipe; | ||
| 7088 | int dpll_reg = DPLL(pipe); | ||
| 7089 | u32 dpll; | ||
| 7090 | |||
| 7090 | DRM_DEBUG_DRIVER("downclocking LVDS\n"); | 7091 | DRM_DEBUG_DRIVER("downclocking LVDS\n"); |
| 7091 | 7092 | ||
| 7092 | assert_panel_unlocked(dev_priv, pipe); | 7093 | assert_panel_unlocked(dev_priv, pipe); |
| 7093 | 7094 | ||
| 7095 | dpll = I915_READ(dpll_reg); | ||
| 7094 | dpll |= DISPLAY_RATE_SELECT_FPA1; | 7096 | dpll |= DISPLAY_RATE_SELECT_FPA1; |
| 7095 | I915_WRITE(dpll_reg, dpll); | 7097 | I915_WRITE(dpll_reg, dpll); |
| 7096 | intel_wait_for_vblank(dev, pipe); | 7098 | intel_wait_for_vblank(dev, pipe); |
| @@ -7098,7 +7100,6 @@ static void intel_decrease_pllclock(struct drm_crtc *crtc) | |||
| 7098 | if (!(dpll & DISPLAY_RATE_SELECT_FPA1)) | 7100 | if (!(dpll & DISPLAY_RATE_SELECT_FPA1)) |
| 7099 | DRM_DEBUG_DRIVER("failed to downclock LVDS!\n"); | 7101 | DRM_DEBUG_DRIVER("failed to downclock LVDS!\n"); |
| 7100 | } | 7102 | } |
| 7101 | |||
| 7102 | } | 7103 | } |
| 7103 | 7104 | ||
| 7104 | /** | 7105 | /** |
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index cae3e5f17a49..2d7f47b56b6a 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c | |||
| @@ -136,7 +136,7 @@ static void i9xx_write_infoframe(struct drm_encoder *encoder, | |||
| 136 | 136 | ||
| 137 | val &= ~VIDEO_DIP_SELECT_MASK; | 137 | val &= ~VIDEO_DIP_SELECT_MASK; |
| 138 | 138 | ||
| 139 | I915_WRITE(VIDEO_DIP_CTL, val | port | flags); | 139 | I915_WRITE(VIDEO_DIP_CTL, VIDEO_DIP_ENABLE | val | port | flags); |
| 140 | 140 | ||
| 141 | for (i = 0; i < len; i += 4) { | 141 | for (i = 0; i < len; i += 4) { |
| 142 | I915_WRITE(VIDEO_DIP_DATA, *data); | 142 | I915_WRITE(VIDEO_DIP_DATA, *data); |
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c index 30e2c82101de..9c71183629c2 100644 --- a/drivers/gpu/drm/i915/intel_lvds.c +++ b/drivers/gpu/drm/i915/intel_lvds.c | |||
| @@ -750,7 +750,7 @@ static const struct dmi_system_id intel_no_lvds[] = { | |||
| 750 | .ident = "Hewlett-Packard t5745", | 750 | .ident = "Hewlett-Packard t5745", |
| 751 | .matches = { | 751 | .matches = { |
| 752 | DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), | 752 | DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), |
| 753 | DMI_MATCH(DMI_BOARD_NAME, "hp t5745"), | 753 | DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"), |
| 754 | }, | 754 | }, |
| 755 | }, | 755 | }, |
| 756 | { | 756 | { |
| @@ -758,7 +758,7 @@ static const struct dmi_system_id intel_no_lvds[] = { | |||
| 758 | .ident = "Hewlett-Packard st5747", | 758 | .ident = "Hewlett-Packard st5747", |
| 759 | .matches = { | 759 | .matches = { |
| 760 | DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), | 760 | DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), |
| 761 | DMI_MATCH(DMI_BOARD_NAME, "hp st5747"), | 761 | DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"), |
| 762 | }, | 762 | }, |
| 763 | }, | 763 | }, |
| 764 | { | 764 | { |
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index f75806e5bff5..80fce51e2f43 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c | |||
| @@ -401,6 +401,14 @@ static int init_render_ring(struct intel_ring_buffer *ring) | |||
| 401 | if (INTEL_INFO(dev)->gen >= 6) { | 401 | if (INTEL_INFO(dev)->gen >= 6) { |
| 402 | I915_WRITE(INSTPM, | 402 | I915_WRITE(INSTPM, |
| 403 | INSTPM_FORCE_ORDERING << 16 | INSTPM_FORCE_ORDERING); | 403 | INSTPM_FORCE_ORDERING << 16 | INSTPM_FORCE_ORDERING); |
| 404 | |||
| 405 | /* From the Sandybridge PRM, volume 1 part 3, page 24: | ||
| 406 | * "If this bit is set, STCunit will have LRA as replacement | ||
| 407 | * policy. [...] This bit must be reset. LRA replacement | ||
| 408 | * policy is not supported." | ||
| 409 | */ | ||
| 410 | I915_WRITE(CACHE_MODE_0, | ||
| 411 | CM0_STC_EVICT_DISABLE_LRA_SNB << CM0_MASK_SHIFT); | ||
| 404 | } | 412 | } |
| 405 | 413 | ||
| 406 | return ret; | 414 | return ret; |
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c index e36b171c1e7d..232d77d07d8b 100644 --- a/drivers/gpu/drm/i915/intel_sdvo.c +++ b/drivers/gpu/drm/i915/intel_sdvo.c | |||
| @@ -731,6 +731,7 @@ static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd, | |||
| 731 | uint16_t width, height; | 731 | uint16_t width, height; |
| 732 | uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len; | 732 | uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len; |
| 733 | uint16_t h_sync_offset, v_sync_offset; | 733 | uint16_t h_sync_offset, v_sync_offset; |
| 734 | int mode_clock; | ||
| 734 | 735 | ||
| 735 | width = mode->crtc_hdisplay; | 736 | width = mode->crtc_hdisplay; |
| 736 | height = mode->crtc_vdisplay; | 737 | height = mode->crtc_vdisplay; |
| @@ -745,7 +746,11 @@ static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd, | |||
| 745 | h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start; | 746 | h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start; |
| 746 | v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start; | 747 | v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start; |
| 747 | 748 | ||
| 748 | dtd->part1.clock = mode->clock / 10; | 749 | mode_clock = mode->clock; |
| 750 | mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1; | ||
| 751 | mode_clock /= 10; | ||
| 752 | dtd->part1.clock = mode_clock; | ||
| 753 | |||
| 749 | dtd->part1.h_active = width & 0xff; | 754 | dtd->part1.h_active = width & 0xff; |
| 750 | dtd->part1.h_blank = h_blank_len & 0xff; | 755 | dtd->part1.h_blank = h_blank_len & 0xff; |
| 751 | dtd->part1.h_high = (((width >> 8) & 0xf) << 4) | | 756 | dtd->part1.h_high = (((width >> 8) & 0xf) << 4) | |
| @@ -996,7 +1001,7 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder, | |||
| 996 | struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder); | 1001 | struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder); |
| 997 | u32 sdvox; | 1002 | u32 sdvox; |
| 998 | struct intel_sdvo_in_out_map in_out; | 1003 | struct intel_sdvo_in_out_map in_out; |
| 999 | struct intel_sdvo_dtd input_dtd; | 1004 | struct intel_sdvo_dtd input_dtd, output_dtd; |
| 1000 | int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode); | 1005 | int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode); |
| 1001 | int rate; | 1006 | int rate; |
| 1002 | 1007 | ||
| @@ -1021,20 +1026,13 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder, | |||
| 1021 | intel_sdvo->attached_output)) | 1026 | intel_sdvo->attached_output)) |
| 1022 | return; | 1027 | return; |
| 1023 | 1028 | ||
| 1024 | /* We have tried to get input timing in mode_fixup, and filled into | 1029 | /* lvds has a special fixed output timing. */ |
| 1025 | * adjusted_mode. | 1030 | if (intel_sdvo->is_lvds) |
| 1026 | */ | 1031 | intel_sdvo_get_dtd_from_mode(&output_dtd, |
| 1027 | if (intel_sdvo->is_tv || intel_sdvo->is_lvds) { | 1032 | intel_sdvo->sdvo_lvds_fixed_mode); |
| 1028 | input_dtd = intel_sdvo->input_dtd; | 1033 | else |
| 1029 | } else { | 1034 | intel_sdvo_get_dtd_from_mode(&output_dtd, mode); |
| 1030 | /* Set the output timing to the screen */ | 1035 | (void) intel_sdvo_set_output_timing(intel_sdvo, &output_dtd); |
| 1031 | if (!intel_sdvo_set_target_output(intel_sdvo, | ||
| 1032 | intel_sdvo->attached_output)) | ||
| 1033 | return; | ||
| 1034 | |||
| 1035 | intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode); | ||
| 1036 | (void) intel_sdvo_set_output_timing(intel_sdvo, &input_dtd); | ||
| 1037 | } | ||
| 1038 | 1036 | ||
| 1039 | /* Set the input timing to the screen. Assume always input 0. */ | 1037 | /* Set the input timing to the screen. Assume always input 0. */ |
| 1040 | if (!intel_sdvo_set_target_input(intel_sdvo)) | 1038 | if (!intel_sdvo_set_target_input(intel_sdvo)) |
| @@ -1052,6 +1050,10 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder, | |||
| 1052 | !intel_sdvo_set_tv_format(intel_sdvo)) | 1050 | !intel_sdvo_set_tv_format(intel_sdvo)) |
| 1053 | return; | 1051 | return; |
| 1054 | 1052 | ||
| 1053 | /* We have tried to get input timing in mode_fixup, and filled into | ||
| 1054 | * adjusted_mode. | ||
| 1055 | */ | ||
| 1056 | intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode); | ||
| 1055 | (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd); | 1057 | (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd); |
| 1056 | 1058 | ||
| 1057 | switch (pixel_multiplier) { | 1059 | switch (pixel_multiplier) { |
diff --git a/drivers/gpu/drm/nouveau/nouveau_acpi.c b/drivers/gpu/drm/nouveau/nouveau_acpi.c index 7814a760c164..284bd25d5d21 100644 --- a/drivers/gpu/drm/nouveau/nouveau_acpi.c +++ b/drivers/gpu/drm/nouveau/nouveau_acpi.c | |||
| @@ -270,7 +270,7 @@ static bool nouveau_dsm_detect(void) | |||
| 270 | struct acpi_buffer buffer = {sizeof(acpi_method_name), acpi_method_name}; | 270 | struct acpi_buffer buffer = {sizeof(acpi_method_name), acpi_method_name}; |
| 271 | struct pci_dev *pdev = NULL; | 271 | struct pci_dev *pdev = NULL; |
| 272 | int has_dsm = 0; | 272 | int has_dsm = 0; |
| 273 | int has_optimus; | 273 | int has_optimus = 0; |
| 274 | int vga_count = 0; | 274 | int vga_count = 0; |
| 275 | bool guid_valid; | 275 | bool guid_valid; |
| 276 | int retval; | 276 | int retval; |
diff --git a/drivers/gpu/drm/nouveau/nouveau_bios.c b/drivers/gpu/drm/nouveau/nouveau_bios.c index 80963d05b54a..0be4a815e706 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bios.c +++ b/drivers/gpu/drm/nouveau/nouveau_bios.c | |||
| @@ -6156,10 +6156,14 @@ dcb_fake_connectors(struct nvbios *bios) | |||
| 6156 | 6156 | ||
| 6157 | /* heuristic: if we ever get a non-zero connector field, assume | 6157 | /* heuristic: if we ever get a non-zero connector field, assume |
| 6158 | * that all the indices are valid and we don't need fake them. | 6158 | * that all the indices are valid and we don't need fake them. |
| 6159 | * | ||
| 6160 | * and, as usual, a blacklist of boards with bad bios data.. | ||
| 6159 | */ | 6161 | */ |
| 6160 | for (i = 0; i < dcbt->entries; i++) { | 6162 | if (!nv_match_device(bios->dev, 0x0392, 0x107d, 0x20a2)) { |
| 6161 | if (dcbt->entry[i].connector) | 6163 | for (i = 0; i < dcbt->entries; i++) { |
| 6162 | return; | 6164 | if (dcbt->entry[i].connector) |
| 6165 | return; | ||
| 6166 | } | ||
| 6163 | } | 6167 | } |
| 6164 | 6168 | ||
| 6165 | /* no useful connector info available, we need to make it up | 6169 | /* no useful connector info available, we need to make it up |
diff --git a/drivers/gpu/drm/nouveau/nouveau_hdmi.c b/drivers/gpu/drm/nouveau/nouveau_hdmi.c index 59ea1c14eca0..c3de36384522 100644 --- a/drivers/gpu/drm/nouveau/nouveau_hdmi.c +++ b/drivers/gpu/drm/nouveau/nouveau_hdmi.c | |||
| @@ -32,7 +32,9 @@ static bool | |||
| 32 | hdmi_sor(struct drm_encoder *encoder) | 32 | hdmi_sor(struct drm_encoder *encoder) |
| 33 | { | 33 | { |
| 34 | struct drm_nouveau_private *dev_priv = encoder->dev->dev_private; | 34 | struct drm_nouveau_private *dev_priv = encoder->dev->dev_private; |
| 35 | if (dev_priv->chipset < 0xa3) | 35 | if (dev_priv->chipset < 0xa3 || |
| 36 | dev_priv->chipset == 0xaa || | ||
| 37 | dev_priv->chipset == 0xac) | ||
| 36 | return false; | 38 | return false; |
| 37 | return true; | 39 | return true; |
| 38 | } | 40 | } |
diff --git a/drivers/gpu/drm/nouveau/nv10_gpio.c b/drivers/gpu/drm/nouveau/nv10_gpio.c index 550ad3fcf0af..9d79180069df 100644 --- a/drivers/gpu/drm/nouveau/nv10_gpio.c +++ b/drivers/gpu/drm/nouveau/nv10_gpio.c | |||
| @@ -65,7 +65,7 @@ nv10_gpio_drive(struct drm_device *dev, int line, int dir, int out) | |||
| 65 | if (line < 10) { | 65 | if (line < 10) { |
| 66 | line = (line - 2) * 4; | 66 | line = (line - 2) * 4; |
| 67 | reg = NV_PCRTC_GPIO_EXT; | 67 | reg = NV_PCRTC_GPIO_EXT; |
| 68 | mask = 0x00000003 << ((line - 2) * 4); | 68 | mask = 0x00000003; |
| 69 | data = (dir << 1) | out; | 69 | data = (dir << 1) | out; |
| 70 | } else | 70 | } else |
| 71 | if (line < 14) { | 71 | if (line < 14) { |
diff --git a/drivers/gpu/drm/nouveau/nvc0_fb.c b/drivers/gpu/drm/nouveau/nvc0_fb.c index 5bf55038fd92..f704e942372e 100644 --- a/drivers/gpu/drm/nouveau/nvc0_fb.c +++ b/drivers/gpu/drm/nouveau/nvc0_fb.c | |||
| @@ -54,6 +54,11 @@ nvc0_mfb_isr(struct drm_device *dev) | |||
| 54 | nvc0_mfb_subp_isr(dev, unit, subp); | 54 | nvc0_mfb_subp_isr(dev, unit, subp); |
| 55 | units &= ~(1 << unit); | 55 | units &= ~(1 << unit); |
| 56 | } | 56 | } |
| 57 | |||
| 58 | /* we do something horribly wrong and upset PMFB a lot, so mask off | ||
| 59 | * interrupts from it after the first one until it's fixed | ||
| 60 | */ | ||
| 61 | nv_mask(dev, 0x000640, 0x02000000, 0x00000000); | ||
| 57 | } | 62 | } |
| 58 | 63 | ||
| 59 | static void | 64 | static void |
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c index b5ff1f7b6f7e..af1054f8202a 100644 --- a/drivers/gpu/drm/radeon/atombios_crtc.c +++ b/drivers/gpu/drm/radeon/atombios_crtc.c | |||
| @@ -575,6 +575,9 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc, | |||
| 575 | 575 | ||
| 576 | if (rdev->family < CHIP_RV770) | 576 | if (rdev->family < CHIP_RV770) |
| 577 | pll->flags |= RADEON_PLL_PREFER_MINM_OVER_MAXP; | 577 | pll->flags |= RADEON_PLL_PREFER_MINM_OVER_MAXP; |
| 578 | /* use frac fb div on APUs */ | ||
| 579 | if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE61(rdev)) | ||
| 580 | pll->flags |= RADEON_PLL_USE_FRAC_FB_DIV; | ||
| 578 | } else { | 581 | } else { |
| 579 | pll->flags |= RADEON_PLL_LEGACY; | 582 | pll->flags |= RADEON_PLL_LEGACY; |
| 580 | 583 | ||
| @@ -955,8 +958,8 @@ static void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode | |||
| 955 | break; | 958 | break; |
| 956 | } | 959 | } |
| 957 | 960 | ||
| 958 | if (radeon_encoder->active_device & | 961 | if ((radeon_encoder->active_device & (ATOM_DEVICE_LCD_SUPPORT | ATOM_DEVICE_DFP_SUPPORT)) || |
| 959 | (ATOM_DEVICE_LCD_SUPPORT | ATOM_DEVICE_DFP_SUPPORT)) { | 962 | (radeon_encoder_get_dp_bridge_encoder_id(encoder) != ENCODER_OBJECT_ID_NONE)) { |
| 960 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; | 963 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; |
| 961 | struct drm_connector *connector = | 964 | struct drm_connector *connector = |
| 962 | radeon_get_connector_for_encoder(encoder); | 965 | radeon_get_connector_for_encoder(encoder); |
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c index ea7df16e2f84..5992502a3448 100644 --- a/drivers/gpu/drm/radeon/radeon_device.c +++ b/drivers/gpu/drm/radeon/radeon_device.c | |||
| @@ -241,8 +241,8 @@ int radeon_wb_init(struct radeon_device *rdev) | |||
| 241 | rdev->wb.use_event = true; | 241 | rdev->wb.use_event = true; |
| 242 | } | 242 | } |
| 243 | } | 243 | } |
| 244 | /* always use writeback/events on NI */ | 244 | /* always use writeback/events on NI, APUs */ |
| 245 | if (ASIC_IS_DCE5(rdev)) { | 245 | if (rdev->family >= CHIP_PALM) { |
| 246 | rdev->wb.enabled = true; | 246 | rdev->wb.enabled = true; |
| 247 | rdev->wb.use_event = true; | 247 | rdev->wb.use_event = true; |
| 248 | } | 248 | } |
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c index 8086c96e0b06..0a1d4bd65edc 100644 --- a/drivers/gpu/drm/radeon/radeon_display.c +++ b/drivers/gpu/drm/radeon/radeon_display.c | |||
| @@ -533,7 +533,7 @@ static void radeon_crtc_init(struct drm_device *dev, int index) | |||
| 533 | radeon_legacy_init_crtc(dev, radeon_crtc); | 533 | radeon_legacy_init_crtc(dev, radeon_crtc); |
| 534 | } | 534 | } |
| 535 | 535 | ||
| 536 | static const char *encoder_names[36] = { | 536 | static const char *encoder_names[37] = { |
| 537 | "NONE", | 537 | "NONE", |
| 538 | "INTERNAL_LVDS", | 538 | "INTERNAL_LVDS", |
| 539 | "INTERNAL_TMDS1", | 539 | "INTERNAL_TMDS1", |
| @@ -570,6 +570,7 @@ static const char *encoder_names[36] = { | |||
| 570 | "INTERNAL_UNIPHY2", | 570 | "INTERNAL_UNIPHY2", |
| 571 | "NUTMEG", | 571 | "NUTMEG", |
| 572 | "TRAVIS", | 572 | "TRAVIS", |
| 573 | "INTERNAL_VCE" | ||
| 573 | }; | 574 | }; |
| 574 | 575 | ||
| 575 | static const char *connector_names[15] = { | 576 | static const char *connector_names[15] = { |
