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path: root/drivers/gpu/drm/i915/intel_ringbuffer.c
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Diffstat (limited to 'drivers/gpu/drm/i915/intel_ringbuffer.c')
-rw-r--r--drivers/gpu/drm/i915/intel_ringbuffer.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index f75806e5bff5..80fce51e2f43 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -401,6 +401,14 @@ static int init_render_ring(struct intel_ring_buffer *ring)
401 if (INTEL_INFO(dev)->gen >= 6) { 401 if (INTEL_INFO(dev)->gen >= 6) {
402 I915_WRITE(INSTPM, 402 I915_WRITE(INSTPM,
403 INSTPM_FORCE_ORDERING << 16 | INSTPM_FORCE_ORDERING); 403 INSTPM_FORCE_ORDERING << 16 | INSTPM_FORCE_ORDERING);
404
405 /* From the Sandybridge PRM, volume 1 part 3, page 24:
406 * "If this bit is set, STCunit will have LRA as replacement
407 * policy. [...] This bit must be reset. LRA replacement
408 * policy is not supported."
409 */
410 I915_WRITE(CACHE_MODE_0,
411 CM0_STC_EVICT_DISABLE_LRA_SNB << CM0_MASK_SHIFT);
404 } 412 }
405 413
406 return ret; 414 return ret;