diff options
Diffstat (limited to 'drivers/gpu/drm/radeon')
22 files changed, 131 insertions, 62 deletions
diff --git a/drivers/gpu/drm/radeon/atombios_encoders.c b/drivers/gpu/drm/radeon/atombios_encoders.c index 32923d2f6002..5e891b226acf 100644 --- a/drivers/gpu/drm/radeon/atombios_encoders.c +++ b/drivers/gpu/drm/radeon/atombios_encoders.c | |||
@@ -707,24 +707,37 @@ atombios_get_encoder_mode(struct drm_encoder *encoder) | |||
707 | switch (connector->connector_type) { | 707 | switch (connector->connector_type) { |
708 | case DRM_MODE_CONNECTOR_DVII: | 708 | case DRM_MODE_CONNECTOR_DVII: |
709 | case DRM_MODE_CONNECTOR_HDMIB: /* HDMI-B is basically DL-DVI; analog works fine */ | 709 | case DRM_MODE_CONNECTOR_HDMIB: /* HDMI-B is basically DL-DVI; analog works fine */ |
710 | if ((radeon_connector->audio == RADEON_AUDIO_ENABLE) || | 710 | if (radeon_audio != 0) { |
711 | (drm_detect_hdmi_monitor(radeon_connector->edid) && | 711 | if (radeon_connector->use_digital && |
712 | (radeon_connector->audio == RADEON_AUDIO_AUTO))) | 712 | (radeon_connector->audio == RADEON_AUDIO_ENABLE)) |
713 | return ATOM_ENCODER_MODE_HDMI; | 713 | return ATOM_ENCODER_MODE_HDMI; |
714 | else if (radeon_connector->use_digital) | 714 | else if (drm_detect_hdmi_monitor(radeon_connector->edid) && |
715 | (radeon_connector->audio == RADEON_AUDIO_AUTO)) | ||
716 | return ATOM_ENCODER_MODE_HDMI; | ||
717 | else if (radeon_connector->use_digital) | ||
718 | return ATOM_ENCODER_MODE_DVI; | ||
719 | else | ||
720 | return ATOM_ENCODER_MODE_CRT; | ||
721 | } else if (radeon_connector->use_digital) { | ||
715 | return ATOM_ENCODER_MODE_DVI; | 722 | return ATOM_ENCODER_MODE_DVI; |
716 | else | 723 | } else { |
717 | return ATOM_ENCODER_MODE_CRT; | 724 | return ATOM_ENCODER_MODE_CRT; |
725 | } | ||
718 | break; | 726 | break; |
719 | case DRM_MODE_CONNECTOR_DVID: | 727 | case DRM_MODE_CONNECTOR_DVID: |
720 | case DRM_MODE_CONNECTOR_HDMIA: | 728 | case DRM_MODE_CONNECTOR_HDMIA: |
721 | default: | 729 | default: |
722 | if ((radeon_connector->audio == RADEON_AUDIO_ENABLE) || | 730 | if (radeon_audio != 0) { |
723 | (drm_detect_hdmi_monitor(radeon_connector->edid) && | 731 | if (radeon_connector->audio == RADEON_AUDIO_ENABLE) |
724 | (radeon_connector->audio == RADEON_AUDIO_AUTO))) | 732 | return ATOM_ENCODER_MODE_HDMI; |
725 | return ATOM_ENCODER_MODE_HDMI; | 733 | else if (drm_detect_hdmi_monitor(radeon_connector->edid) && |
726 | else | 734 | (radeon_connector->audio == RADEON_AUDIO_AUTO)) |
735 | return ATOM_ENCODER_MODE_HDMI; | ||
736 | else | ||
737 | return ATOM_ENCODER_MODE_DVI; | ||
738 | } else { | ||
727 | return ATOM_ENCODER_MODE_DVI; | 739 | return ATOM_ENCODER_MODE_DVI; |
740 | } | ||
728 | break; | 741 | break; |
729 | case DRM_MODE_CONNECTOR_LVDS: | 742 | case DRM_MODE_CONNECTOR_LVDS: |
730 | return ATOM_ENCODER_MODE_LVDS; | 743 | return ATOM_ENCODER_MODE_LVDS; |
@@ -732,14 +745,19 @@ atombios_get_encoder_mode(struct drm_encoder *encoder) | |||
732 | case DRM_MODE_CONNECTOR_DisplayPort: | 745 | case DRM_MODE_CONNECTOR_DisplayPort: |
733 | dig_connector = radeon_connector->con_priv; | 746 | dig_connector = radeon_connector->con_priv; |
734 | if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) || | 747 | if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) || |
735 | (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) | 748 | (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) { |
736 | return ATOM_ENCODER_MODE_DP; | 749 | return ATOM_ENCODER_MODE_DP; |
737 | else if ((radeon_connector->audio == RADEON_AUDIO_ENABLE) || | 750 | } else if (radeon_audio != 0) { |
738 | (drm_detect_hdmi_monitor(radeon_connector->edid) && | 751 | if (radeon_connector->audio == RADEON_AUDIO_ENABLE) |
739 | (radeon_connector->audio == RADEON_AUDIO_AUTO))) | 752 | return ATOM_ENCODER_MODE_HDMI; |
740 | return ATOM_ENCODER_MODE_HDMI; | 753 | else if (drm_detect_hdmi_monitor(radeon_connector->edid) && |
741 | else | 754 | (radeon_connector->audio == RADEON_AUDIO_AUTO)) |
755 | return ATOM_ENCODER_MODE_HDMI; | ||
756 | else | ||
757 | return ATOM_ENCODER_MODE_DVI; | ||
758 | } else { | ||
742 | return ATOM_ENCODER_MODE_DVI; | 759 | return ATOM_ENCODER_MODE_DVI; |
760 | } | ||
743 | break; | 761 | break; |
744 | case DRM_MODE_CONNECTOR_eDP: | 762 | case DRM_MODE_CONNECTOR_eDP: |
745 | return ATOM_ENCODER_MODE_DP; | 763 | return ATOM_ENCODER_MODE_DP; |
@@ -1655,7 +1673,7 @@ radeon_atom_encoder_dpms_dig(struct drm_encoder *encoder, int mode) | |||
1655 | * does the same thing and more. | 1673 | * does the same thing and more. |
1656 | */ | 1674 | */ |
1657 | if ((rdev->family != CHIP_RV710) && (rdev->family != CHIP_RV730) && | 1675 | if ((rdev->family != CHIP_RV710) && (rdev->family != CHIP_RV730) && |
1658 | (rdev->family != CHIP_RS880)) | 1676 | (rdev->family != CHIP_RS780) && (rdev->family != CHIP_RS880)) |
1659 | atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE_OUTPUT, 0, 0); | 1677 | atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE_OUTPUT, 0, 0); |
1660 | } | 1678 | } |
1661 | if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(encoder)) && connector) { | 1679 | if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(encoder)) && connector) { |
diff --git a/drivers/gpu/drm/radeon/btc_dpm.c b/drivers/gpu/drm/radeon/btc_dpm.c index b162e98a2953..9b6950d9b3c0 100644 --- a/drivers/gpu/drm/radeon/btc_dpm.c +++ b/drivers/gpu/drm/radeon/btc_dpm.c | |||
@@ -1930,7 +1930,7 @@ static int btc_set_mc_special_registers(struct radeon_device *rdev, | |||
1930 | } | 1930 | } |
1931 | j++; | 1931 | j++; |
1932 | 1932 | ||
1933 | if (j > SMC_EVERGREEN_MC_REGISTER_ARRAY_SIZE) | 1933 | if (j >= SMC_EVERGREEN_MC_REGISTER_ARRAY_SIZE) |
1934 | return -EINVAL; | 1934 | return -EINVAL; |
1935 | 1935 | ||
1936 | tmp = RREG32(MC_PMG_CMD_MRS); | 1936 | tmp = RREG32(MC_PMG_CMD_MRS); |
@@ -1945,7 +1945,7 @@ static int btc_set_mc_special_registers(struct radeon_device *rdev, | |||
1945 | } | 1945 | } |
1946 | j++; | 1946 | j++; |
1947 | 1947 | ||
1948 | if (j > SMC_EVERGREEN_MC_REGISTER_ARRAY_SIZE) | 1948 | if (j >= SMC_EVERGREEN_MC_REGISTER_ARRAY_SIZE) |
1949 | return -EINVAL; | 1949 | return -EINVAL; |
1950 | break; | 1950 | break; |
1951 | case MC_SEQ_RESERVE_M >> 2: | 1951 | case MC_SEQ_RESERVE_M >> 2: |
@@ -1959,7 +1959,7 @@ static int btc_set_mc_special_registers(struct radeon_device *rdev, | |||
1959 | } | 1959 | } |
1960 | j++; | 1960 | j++; |
1961 | 1961 | ||
1962 | if (j > SMC_EVERGREEN_MC_REGISTER_ARRAY_SIZE) | 1962 | if (j >= SMC_EVERGREEN_MC_REGISTER_ARRAY_SIZE) |
1963 | return -EINVAL; | 1963 | return -EINVAL; |
1964 | break; | 1964 | break; |
1965 | default: | 1965 | default: |
diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c index d02fd1c045d5..9cd2bc989ac7 100644 --- a/drivers/gpu/drm/radeon/cik.c +++ b/drivers/gpu/drm/radeon/cik.c | |||
@@ -77,6 +77,8 @@ static void cik_pcie_gen3_enable(struct radeon_device *rdev); | |||
77 | static void cik_program_aspm(struct radeon_device *rdev); | 77 | static void cik_program_aspm(struct radeon_device *rdev); |
78 | static void cik_init_pg(struct radeon_device *rdev); | 78 | static void cik_init_pg(struct radeon_device *rdev); |
79 | static void cik_init_cg(struct radeon_device *rdev); | 79 | static void cik_init_cg(struct radeon_device *rdev); |
80 | static void cik_fini_pg(struct radeon_device *rdev); | ||
81 | static void cik_fini_cg(struct radeon_device *rdev); | ||
80 | static void cik_enable_gui_idle_interrupt(struct radeon_device *rdev, | 82 | static void cik_enable_gui_idle_interrupt(struct radeon_device *rdev, |
81 | bool enable); | 83 | bool enable); |
82 | 84 | ||
@@ -1692,6 +1694,7 @@ static int cik_init_microcode(struct radeon_device *rdev) | |||
1692 | fw_name); | 1694 | fw_name); |
1693 | release_firmware(rdev->smc_fw); | 1695 | release_firmware(rdev->smc_fw); |
1694 | rdev->smc_fw = NULL; | 1696 | rdev->smc_fw = NULL; |
1697 | err = 0; | ||
1695 | } else if (rdev->smc_fw->size != smc_req_size) { | 1698 | } else if (rdev->smc_fw->size != smc_req_size) { |
1696 | printk(KERN_ERR | 1699 | printk(KERN_ERR |
1697 | "cik_smc: Bogus length %zu in firmware \"%s\"\n", | 1700 | "cik_smc: Bogus length %zu in firmware \"%s\"\n", |
@@ -3180,6 +3183,7 @@ int cik_ib_test(struct radeon_device *rdev, struct radeon_ring *ring) | |||
3180 | r = radeon_ib_get(rdev, ring->idx, &ib, NULL, 256); | 3183 | r = radeon_ib_get(rdev, ring->idx, &ib, NULL, 256); |
3181 | if (r) { | 3184 | if (r) { |
3182 | DRM_ERROR("radeon: failed to get ib (%d).\n", r); | 3185 | DRM_ERROR("radeon: failed to get ib (%d).\n", r); |
3186 | radeon_scratch_free(rdev, scratch); | ||
3183 | return r; | 3187 | return r; |
3184 | } | 3188 | } |
3185 | ib.ptr[0] = PACKET3(PACKET3_SET_UCONFIG_REG, 1); | 3189 | ib.ptr[0] = PACKET3(PACKET3_SET_UCONFIG_REG, 1); |
@@ -3196,6 +3200,8 @@ int cik_ib_test(struct radeon_device *rdev, struct radeon_ring *ring) | |||
3196 | r = radeon_fence_wait(ib.fence, false); | 3200 | r = radeon_fence_wait(ib.fence, false); |
3197 | if (r) { | 3201 | if (r) { |
3198 | DRM_ERROR("radeon: fence wait failed (%d).\n", r); | 3202 | DRM_ERROR("radeon: fence wait failed (%d).\n", r); |
3203 | radeon_scratch_free(rdev, scratch); | ||
3204 | radeon_ib_free(rdev, &ib); | ||
3199 | return r; | 3205 | return r; |
3200 | } | 3206 | } |
3201 | for (i = 0; i < rdev->usec_timeout; i++) { | 3207 | for (i = 0; i < rdev->usec_timeout; i++) { |
@@ -4185,6 +4191,10 @@ static void cik_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask) | |||
4185 | dev_info(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X\n", | 4191 | dev_info(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X\n", |
4186 | RREG32(VM_CONTEXT1_PROTECTION_FAULT_STATUS)); | 4192 | RREG32(VM_CONTEXT1_PROTECTION_FAULT_STATUS)); |
4187 | 4193 | ||
4194 | /* disable CG/PG */ | ||
4195 | cik_fini_pg(rdev); | ||
4196 | cik_fini_cg(rdev); | ||
4197 | |||
4188 | /* stop the rlc */ | 4198 | /* stop the rlc */ |
4189 | cik_rlc_stop(rdev); | 4199 | cik_rlc_stop(rdev); |
4190 | 4200 | ||
diff --git a/drivers/gpu/drm/radeon/dce6_afmt.c b/drivers/gpu/drm/radeon/dce6_afmt.c index 85a69d2ea3d2..9fcd338c0fcf 100644 --- a/drivers/gpu/drm/radeon/dce6_afmt.c +++ b/drivers/gpu/drm/radeon/dce6_afmt.c | |||
@@ -113,6 +113,9 @@ void dce6_afmt_write_speaker_allocation(struct drm_encoder *encoder) | |||
113 | u8 *sadb; | 113 | u8 *sadb; |
114 | int sad_count; | 114 | int sad_count; |
115 | 115 | ||
116 | /* XXX: setting this register causes hangs on some asics */ | ||
117 | return; | ||
118 | |||
116 | if (!dig->afmt->pin) | 119 | if (!dig->afmt->pin) |
117 | return; | 120 | return; |
118 | 121 | ||
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 555164e270a7..b5c67a99dda9 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c | |||
@@ -3131,7 +3131,7 @@ static void evergreen_gpu_init(struct radeon_device *rdev) | |||
3131 | rdev->config.evergreen.sx_max_export_size = 256; | 3131 | rdev->config.evergreen.sx_max_export_size = 256; |
3132 | rdev->config.evergreen.sx_max_export_pos_size = 64; | 3132 | rdev->config.evergreen.sx_max_export_pos_size = 64; |
3133 | rdev->config.evergreen.sx_max_export_smx_size = 192; | 3133 | rdev->config.evergreen.sx_max_export_smx_size = 192; |
3134 | rdev->config.evergreen.max_hw_contexts = 8; | 3134 | rdev->config.evergreen.max_hw_contexts = 4; |
3135 | rdev->config.evergreen.sq_num_cf_insts = 2; | 3135 | rdev->config.evergreen.sq_num_cf_insts = 2; |
3136 | 3136 | ||
3137 | rdev->config.evergreen.sc_prim_fifo_size = 0x40; | 3137 | rdev->config.evergreen.sc_prim_fifo_size = 0x40; |
diff --git a/drivers/gpu/drm/radeon/evergreen_hdmi.c b/drivers/gpu/drm/radeon/evergreen_hdmi.c index f71ce390aebe..fe1de855775e 100644 --- a/drivers/gpu/drm/radeon/evergreen_hdmi.c +++ b/drivers/gpu/drm/radeon/evergreen_hdmi.c | |||
@@ -67,6 +67,9 @@ static void dce4_afmt_write_speaker_allocation(struct drm_encoder *encoder) | |||
67 | u8 *sadb; | 67 | u8 *sadb; |
68 | int sad_count; | 68 | int sad_count; |
69 | 69 | ||
70 | /* XXX: setting this register causes hangs on some asics */ | ||
71 | return; | ||
72 | |||
70 | list_for_each_entry(connector, &encoder->dev->mode_config.connector_list, head) { | 73 | list_for_each_entry(connector, &encoder->dev->mode_config.connector_list, head) { |
71 | if (connector->encoder == encoder) | 74 | if (connector->encoder == encoder) |
72 | radeon_connector = to_radeon_connector(connector); | 75 | radeon_connector = to_radeon_connector(connector); |
@@ -288,8 +291,7 @@ void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode | |||
288 | /* fglrx clears sth in AFMT_AUDIO_PACKET_CONTROL2 here */ | 291 | /* fglrx clears sth in AFMT_AUDIO_PACKET_CONTROL2 here */ |
289 | 292 | ||
290 | WREG32(HDMI_ACR_PACKET_CONTROL + offset, | 293 | WREG32(HDMI_ACR_PACKET_CONTROL + offset, |
291 | HDMI_ACR_AUTO_SEND | /* allow hw to sent ACR packets when required */ | 294 | HDMI_ACR_AUTO_SEND); /* allow hw to sent ACR packets when required */ |
292 | HDMI_ACR_SOURCE); /* select SW CTS value */ | ||
293 | 295 | ||
294 | evergreen_hdmi_update_ACR(encoder, mode->clock); | 296 | evergreen_hdmi_update_ACR(encoder, mode->clock); |
295 | 297 | ||
diff --git a/drivers/gpu/drm/radeon/evergreend.h b/drivers/gpu/drm/radeon/evergreend.h index 8768fd6a1e27..4f6d2962767d 100644 --- a/drivers/gpu/drm/radeon/evergreend.h +++ b/drivers/gpu/drm/radeon/evergreend.h | |||
@@ -1501,7 +1501,7 @@ | |||
1501 | * 6. COMMAND [29:22] | BYTE_COUNT [20:0] | 1501 | * 6. COMMAND [29:22] | BYTE_COUNT [20:0] |
1502 | */ | 1502 | */ |
1503 | # define PACKET3_CP_DMA_DST_SEL(x) ((x) << 20) | 1503 | # define PACKET3_CP_DMA_DST_SEL(x) ((x) << 20) |
1504 | /* 0 - SRC_ADDR | 1504 | /* 0 - DST_ADDR |
1505 | * 1 - GDS | 1505 | * 1 - GDS |
1506 | */ | 1506 | */ |
1507 | # define PACKET3_CP_DMA_ENGINE(x) ((x) << 27) | 1507 | # define PACKET3_CP_DMA_ENGINE(x) ((x) << 27) |
@@ -1516,7 +1516,7 @@ | |||
1516 | # define PACKET3_CP_DMA_CP_SYNC (1 << 31) | 1516 | # define PACKET3_CP_DMA_CP_SYNC (1 << 31) |
1517 | /* COMMAND */ | 1517 | /* COMMAND */ |
1518 | # define PACKET3_CP_DMA_DIS_WC (1 << 21) | 1518 | # define PACKET3_CP_DMA_DIS_WC (1 << 21) |
1519 | # define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 23) | 1519 | # define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 22) |
1520 | /* 0 - none | 1520 | /* 0 - none |
1521 | * 1 - 8 in 16 | 1521 | * 1 - 8 in 16 |
1522 | * 2 - 8 in 32 | 1522 | * 2 - 8 in 32 |
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c index 93c1f9ef5da9..cac2866d79da 100644 --- a/drivers/gpu/drm/radeon/ni.c +++ b/drivers/gpu/drm/radeon/ni.c | |||
@@ -804,6 +804,7 @@ int ni_init_microcode(struct radeon_device *rdev) | |||
804 | fw_name); | 804 | fw_name); |
805 | release_firmware(rdev->smc_fw); | 805 | release_firmware(rdev->smc_fw); |
806 | rdev->smc_fw = NULL; | 806 | rdev->smc_fw = NULL; |
807 | err = 0; | ||
807 | } else if (rdev->smc_fw->size != smc_req_size) { | 808 | } else if (rdev->smc_fw->size != smc_req_size) { |
808 | printk(KERN_ERR | 809 | printk(KERN_ERR |
809 | "ni_mc: Bogus length %zu in firmware \"%s\"\n", | 810 | "ni_mc: Bogus length %zu in firmware \"%s\"\n", |
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index 2a1b1876b431..f9be22062df1 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c | |||
@@ -2302,6 +2302,7 @@ int r600_init_microcode(struct radeon_device *rdev) | |||
2302 | fw_name); | 2302 | fw_name); |
2303 | release_firmware(rdev->smc_fw); | 2303 | release_firmware(rdev->smc_fw); |
2304 | rdev->smc_fw = NULL; | 2304 | rdev->smc_fw = NULL; |
2305 | err = 0; | ||
2305 | } else if (rdev->smc_fw->size != smc_req_size) { | 2306 | } else if (rdev->smc_fw->size != smc_req_size) { |
2306 | printk(KERN_ERR | 2307 | printk(KERN_ERR |
2307 | "smc: Bogus length %zu in firmware \"%s\"\n", | 2308 | "smc: Bogus length %zu in firmware \"%s\"\n", |
diff --git a/drivers/gpu/drm/radeon/r600_hdmi.c b/drivers/gpu/drm/radeon/r600_hdmi.c index b0fa6002af3e..06022e3b9c3b 100644 --- a/drivers/gpu/drm/radeon/r600_hdmi.c +++ b/drivers/gpu/drm/radeon/r600_hdmi.c | |||
@@ -57,15 +57,15 @@ enum r600_hdmi_iec_status_bits { | |||
57 | static const struct radeon_hdmi_acr r600_hdmi_predefined_acr[] = { | 57 | static const struct radeon_hdmi_acr r600_hdmi_predefined_acr[] = { |
58 | /* 32kHz 44.1kHz 48kHz */ | 58 | /* 32kHz 44.1kHz 48kHz */ |
59 | /* Clock N CTS N CTS N CTS */ | 59 | /* Clock N CTS N CTS N CTS */ |
60 | { 25174, 4576, 28125, 7007, 31250, 6864, 28125 }, /* 25,20/1.001 MHz */ | 60 | { 25175, 4576, 28125, 7007, 31250, 6864, 28125 }, /* 25,20/1.001 MHz */ |
61 | { 25200, 4096, 25200, 6272, 28000, 6144, 25200 }, /* 25.20 MHz */ | 61 | { 25200, 4096, 25200, 6272, 28000, 6144, 25200 }, /* 25.20 MHz */ |
62 | { 27000, 4096, 27000, 6272, 30000, 6144, 27000 }, /* 27.00 MHz */ | 62 | { 27000, 4096, 27000, 6272, 30000, 6144, 27000 }, /* 27.00 MHz */ |
63 | { 27027, 4096, 27027, 6272, 30030, 6144, 27027 }, /* 27.00*1.001 MHz */ | 63 | { 27027, 4096, 27027, 6272, 30030, 6144, 27027 }, /* 27.00*1.001 MHz */ |
64 | { 54000, 4096, 54000, 6272, 60000, 6144, 54000 }, /* 54.00 MHz */ | 64 | { 54000, 4096, 54000, 6272, 60000, 6144, 54000 }, /* 54.00 MHz */ |
65 | { 54054, 4096, 54054, 6272, 60060, 6144, 54054 }, /* 54.00*1.001 MHz */ | 65 | { 54054, 4096, 54054, 6272, 60060, 6144, 54054 }, /* 54.00*1.001 MHz */ |
66 | { 74175, 11648, 210937, 17836, 234375, 11648, 140625 }, /* 74.25/1.001 MHz */ | 66 | { 74176, 11648, 210937, 17836, 234375, 11648, 140625 }, /* 74.25/1.001 MHz */ |
67 | { 74250, 4096, 74250, 6272, 82500, 6144, 74250 }, /* 74.25 MHz */ | 67 | { 74250, 4096, 74250, 6272, 82500, 6144, 74250 }, /* 74.25 MHz */ |
68 | { 148351, 11648, 421875, 8918, 234375, 5824, 140625 }, /* 148.50/1.001 MHz */ | 68 | { 148352, 11648, 421875, 8918, 234375, 5824, 140625 }, /* 148.50/1.001 MHz */ |
69 | { 148500, 4096, 148500, 6272, 165000, 6144, 148500 }, /* 148.50 MHz */ | 69 | { 148500, 4096, 148500, 6272, 165000, 6144, 148500 }, /* 148.50 MHz */ |
70 | { 0, 4096, 0, 6272, 0, 6144, 0 } /* Other */ | 70 | { 0, 4096, 0, 6272, 0, 6144, 0 } /* Other */ |
71 | }; | 71 | }; |
@@ -75,8 +75,15 @@ static const struct radeon_hdmi_acr r600_hdmi_predefined_acr[] = { | |||
75 | */ | 75 | */ |
76 | static void r600_hdmi_calc_cts(uint32_t clock, int *CTS, int N, int freq) | 76 | static void r600_hdmi_calc_cts(uint32_t clock, int *CTS, int N, int freq) |
77 | { | 77 | { |
78 | if (*CTS == 0) | 78 | u64 n; |
79 | *CTS = clock * N / (128 * freq) * 1000; | 79 | u32 d; |
80 | |||
81 | if (*CTS == 0) { | ||
82 | n = (u64)clock * (u64)N * 1000ULL; | ||
83 | d = 128 * freq; | ||
84 | do_div(n, d); | ||
85 | *CTS = n; | ||
86 | } | ||
80 | DRM_DEBUG("Using ACR timing N=%d CTS=%d for frequency %d\n", | 87 | DRM_DEBUG("Using ACR timing N=%d CTS=%d for frequency %d\n", |
81 | N, *CTS, freq); | 88 | N, *CTS, freq); |
82 | } | 89 | } |
@@ -302,6 +309,9 @@ static void dce3_2_afmt_write_speaker_allocation(struct drm_encoder *encoder) | |||
302 | u8 *sadb; | 309 | u8 *sadb; |
303 | int sad_count; | 310 | int sad_count; |
304 | 311 | ||
312 | /* XXX: setting this register causes hangs on some asics */ | ||
313 | return; | ||
314 | |||
305 | list_for_each_entry(connector, &encoder->dev->mode_config.connector_list, head) { | 315 | list_for_each_entry(connector, &encoder->dev->mode_config.connector_list, head) { |
306 | if (connector->encoder == encoder) | 316 | if (connector->encoder == encoder) |
307 | radeon_connector = to_radeon_connector(connector); | 317 | radeon_connector = to_radeon_connector(connector); |
@@ -444,8 +454,8 @@ void r600_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mod | |||
444 | } | 454 | } |
445 | 455 | ||
446 | WREG32(HDMI0_ACR_PACKET_CONTROL + offset, | 456 | WREG32(HDMI0_ACR_PACKET_CONTROL + offset, |
447 | HDMI0_ACR_AUTO_SEND | /* allow hw to sent ACR packets when required */ | 457 | HDMI0_ACR_SOURCE | /* select SW CTS value - XXX verify that hw CTS works on all families */ |
448 | HDMI0_ACR_SOURCE); /* select SW CTS value */ | 458 | HDMI0_ACR_AUTO_SEND); /* allow hw to sent ACR packets when required */ |
449 | 459 | ||
450 | WREG32(HDMI0_VBI_PACKET_CONTROL + offset, | 460 | WREG32(HDMI0_VBI_PACKET_CONTROL + offset, |
451 | HDMI0_NULL_SEND | /* send null packets when required */ | 461 | HDMI0_NULL_SEND | /* send null packets when required */ |
diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h index e673fe26ea84..7b3c7b5932c5 100644 --- a/drivers/gpu/drm/radeon/r600d.h +++ b/drivers/gpu/drm/radeon/r600d.h | |||
@@ -1523,7 +1523,7 @@ | |||
1523 | */ | 1523 | */ |
1524 | # define PACKET3_CP_DMA_CP_SYNC (1 << 31) | 1524 | # define PACKET3_CP_DMA_CP_SYNC (1 << 31) |
1525 | /* COMMAND */ | 1525 | /* COMMAND */ |
1526 | # define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 23) | 1526 | # define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 22) |
1527 | /* 0 - none | 1527 | /* 0 - none |
1528 | * 1 - 8 in 16 | 1528 | * 1 - 8 in 16 |
1529 | * 2 - 8 in 32 | 1529 | * 2 - 8 in 32 |
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c index 79159b5da05b..64565732cb98 100644 --- a/drivers/gpu/drm/radeon/radeon_connectors.c +++ b/drivers/gpu/drm/radeon/radeon_connectors.c | |||
@@ -1658,9 +1658,12 @@ radeon_add_atom_connector(struct drm_device *dev, | |||
1658 | drm_object_attach_property(&radeon_connector->base.base, | 1658 | drm_object_attach_property(&radeon_connector->base.base, |
1659 | rdev->mode_info.underscan_vborder_property, | 1659 | rdev->mode_info.underscan_vborder_property, |
1660 | 0); | 1660 | 0); |
1661 | drm_object_attach_property(&radeon_connector->base.base, | 1661 | if (radeon_audio != 0) |
1662 | rdev->mode_info.audio_property, | 1662 | drm_object_attach_property(&radeon_connector->base.base, |
1663 | RADEON_AUDIO_DISABLE); | 1663 | rdev->mode_info.audio_property, |
1664 | (radeon_audio == 1) ? | ||
1665 | RADEON_AUDIO_AUTO : | ||
1666 | RADEON_AUDIO_DISABLE); | ||
1664 | subpixel_order = SubPixelHorizontalRGB; | 1667 | subpixel_order = SubPixelHorizontalRGB; |
1665 | connector->interlace_allowed = true; | 1668 | connector->interlace_allowed = true; |
1666 | if (connector_type == DRM_MODE_CONNECTOR_HDMIB) | 1669 | if (connector_type == DRM_MODE_CONNECTOR_HDMIB) |
@@ -1754,10 +1757,12 @@ radeon_add_atom_connector(struct drm_device *dev, | |||
1754 | rdev->mode_info.underscan_vborder_property, | 1757 | rdev->mode_info.underscan_vborder_property, |
1755 | 0); | 1758 | 0); |
1756 | } | 1759 | } |
1757 | if (ASIC_IS_DCE2(rdev)) { | 1760 | if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) { |
1758 | drm_object_attach_property(&radeon_connector->base.base, | 1761 | drm_object_attach_property(&radeon_connector->base.base, |
1759 | rdev->mode_info.audio_property, | 1762 | rdev->mode_info.audio_property, |
1760 | RADEON_AUDIO_DISABLE); | 1763 | (radeon_audio == 1) ? |
1764 | RADEON_AUDIO_AUTO : | ||
1765 | RADEON_AUDIO_DISABLE); | ||
1761 | } | 1766 | } |
1762 | if (connector_type == DRM_MODE_CONNECTOR_DVII) { | 1767 | if (connector_type == DRM_MODE_CONNECTOR_DVII) { |
1763 | radeon_connector->dac_load_detect = true; | 1768 | radeon_connector->dac_load_detect = true; |
@@ -1799,10 +1804,12 @@ radeon_add_atom_connector(struct drm_device *dev, | |||
1799 | rdev->mode_info.underscan_vborder_property, | 1804 | rdev->mode_info.underscan_vborder_property, |
1800 | 0); | 1805 | 0); |
1801 | } | 1806 | } |
1802 | if (ASIC_IS_DCE2(rdev)) { | 1807 | if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) { |
1803 | drm_object_attach_property(&radeon_connector->base.base, | 1808 | drm_object_attach_property(&radeon_connector->base.base, |
1804 | rdev->mode_info.audio_property, | 1809 | rdev->mode_info.audio_property, |
1805 | RADEON_AUDIO_DISABLE); | 1810 | (radeon_audio == 1) ? |
1811 | RADEON_AUDIO_AUTO : | ||
1812 | RADEON_AUDIO_DISABLE); | ||
1806 | } | 1813 | } |
1807 | subpixel_order = SubPixelHorizontalRGB; | 1814 | subpixel_order = SubPixelHorizontalRGB; |
1808 | connector->interlace_allowed = true; | 1815 | connector->interlace_allowed = true; |
@@ -1843,10 +1850,12 @@ radeon_add_atom_connector(struct drm_device *dev, | |||
1843 | rdev->mode_info.underscan_vborder_property, | 1850 | rdev->mode_info.underscan_vborder_property, |
1844 | 0); | 1851 | 0); |
1845 | } | 1852 | } |
1846 | if (ASIC_IS_DCE2(rdev)) { | 1853 | if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) { |
1847 | drm_object_attach_property(&radeon_connector->base.base, | 1854 | drm_object_attach_property(&radeon_connector->base.base, |
1848 | rdev->mode_info.audio_property, | 1855 | rdev->mode_info.audio_property, |
1849 | RADEON_AUDIO_DISABLE); | 1856 | (radeon_audio == 1) ? |
1857 | RADEON_AUDIO_AUTO : | ||
1858 | RADEON_AUDIO_DISABLE); | ||
1850 | } | 1859 | } |
1851 | connector->interlace_allowed = true; | 1860 | connector->interlace_allowed = true; |
1852 | /* in theory with a DP to VGA converter... */ | 1861 | /* in theory with a DP to VGA converter... */ |
diff --git a/drivers/gpu/drm/radeon/radeon_cs.c b/drivers/gpu/drm/radeon/radeon_cs.c index 66c222836631..80285e35bc65 100644 --- a/drivers/gpu/drm/radeon/radeon_cs.c +++ b/drivers/gpu/drm/radeon/radeon_cs.c | |||
@@ -85,9 +85,8 @@ static int radeon_cs_parser_relocs(struct radeon_cs_parser *p) | |||
85 | VRAM, also but everything into VRAM on AGP cards to avoid | 85 | VRAM, also but everything into VRAM on AGP cards to avoid |
86 | image corruptions */ | 86 | image corruptions */ |
87 | if (p->ring == R600_RING_TYPE_UVD_INDEX && | 87 | if (p->ring == R600_RING_TYPE_UVD_INDEX && |
88 | p->rdev->family < CHIP_PALM && | ||
89 | (i == 0 || drm_pci_device_is_agp(p->rdev->ddev))) { | 88 | (i == 0 || drm_pci_device_is_agp(p->rdev->ddev))) { |
90 | 89 | /* TODO: is this still needed for NI+ ? */ | |
91 | p->relocs[i].lobj.domain = | 90 | p->relocs[i].lobj.domain = |
92 | RADEON_GEM_DOMAIN_VRAM; | 91 | RADEON_GEM_DOMAIN_VRAM; |
93 | 92 | ||
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c index cdd12dcd988b..9c14a1ba1de4 100644 --- a/drivers/gpu/drm/radeon/radeon_drv.c +++ b/drivers/gpu/drm/radeon/radeon_drv.c | |||
@@ -153,7 +153,7 @@ int radeon_benchmarking = 0; | |||
153 | int radeon_testing = 0; | 153 | int radeon_testing = 0; |
154 | int radeon_connector_table = 0; | 154 | int radeon_connector_table = 0; |
155 | int radeon_tv = 1; | 155 | int radeon_tv = 1; |
156 | int radeon_audio = 1; | 156 | int radeon_audio = -1; |
157 | int radeon_disp_priority = 0; | 157 | int radeon_disp_priority = 0; |
158 | int radeon_hw_i2c = 0; | 158 | int radeon_hw_i2c = 0; |
159 | int radeon_pcie_gen2 = -1; | 159 | int radeon_pcie_gen2 = -1; |
@@ -196,7 +196,7 @@ module_param_named(connector_table, radeon_connector_table, int, 0444); | |||
196 | MODULE_PARM_DESC(tv, "TV enable (0 = disable)"); | 196 | MODULE_PARM_DESC(tv, "TV enable (0 = disable)"); |
197 | module_param_named(tv, radeon_tv, int, 0444); | 197 | module_param_named(tv, radeon_tv, int, 0444); |
198 | 198 | ||
199 | MODULE_PARM_DESC(audio, "Audio enable (1 = enable)"); | 199 | MODULE_PARM_DESC(audio, "Audio enable (-1 = auto, 0 = disable, 1 = enable)"); |
200 | module_param_named(audio, radeon_audio, int, 0444); | 200 | module_param_named(audio, radeon_audio, int, 0444); |
201 | 201 | ||
202 | MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)"); | 202 | MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)"); |
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c index ac07ad1d4f8c..4f6b7fc7ad3c 100644 --- a/drivers/gpu/drm/radeon/radeon_pm.c +++ b/drivers/gpu/drm/radeon/radeon_pm.c | |||
@@ -945,6 +945,8 @@ void radeon_dpm_enable_uvd(struct radeon_device *rdev, bool enable) | |||
945 | if (enable) { | 945 | if (enable) { |
946 | mutex_lock(&rdev->pm.mutex); | 946 | mutex_lock(&rdev->pm.mutex); |
947 | rdev->pm.dpm.uvd_active = true; | 947 | rdev->pm.dpm.uvd_active = true; |
948 | /* disable this for now */ | ||
949 | #if 0 | ||
948 | if ((rdev->pm.dpm.sd == 1) && (rdev->pm.dpm.hd == 0)) | 950 | if ((rdev->pm.dpm.sd == 1) && (rdev->pm.dpm.hd == 0)) |
949 | dpm_state = POWER_STATE_TYPE_INTERNAL_UVD_SD; | 951 | dpm_state = POWER_STATE_TYPE_INTERNAL_UVD_SD; |
950 | else if ((rdev->pm.dpm.sd == 2) && (rdev->pm.dpm.hd == 0)) | 952 | else if ((rdev->pm.dpm.sd == 2) && (rdev->pm.dpm.hd == 0)) |
@@ -954,6 +956,7 @@ void radeon_dpm_enable_uvd(struct radeon_device *rdev, bool enable) | |||
954 | else if ((rdev->pm.dpm.sd == 0) && (rdev->pm.dpm.hd == 2)) | 956 | else if ((rdev->pm.dpm.sd == 0) && (rdev->pm.dpm.hd == 2)) |
955 | dpm_state = POWER_STATE_TYPE_INTERNAL_UVD_HD2; | 957 | dpm_state = POWER_STATE_TYPE_INTERNAL_UVD_HD2; |
956 | else | 958 | else |
959 | #endif | ||
957 | dpm_state = POWER_STATE_TYPE_INTERNAL_UVD; | 960 | dpm_state = POWER_STATE_TYPE_INTERNAL_UVD; |
958 | rdev->pm.dpm.state = dpm_state; | 961 | rdev->pm.dpm.state = dpm_state; |
959 | mutex_unlock(&rdev->pm.mutex); | 962 | mutex_unlock(&rdev->pm.mutex); |
diff --git a/drivers/gpu/drm/radeon/radeon_test.c b/drivers/gpu/drm/radeon/radeon_test.c index f4d6bcee9006..12e8099a0823 100644 --- a/drivers/gpu/drm/radeon/radeon_test.c +++ b/drivers/gpu/drm/radeon/radeon_test.c | |||
@@ -36,8 +36,8 @@ static void radeon_do_test_moves(struct radeon_device *rdev, int flag) | |||
36 | struct radeon_bo *vram_obj = NULL; | 36 | struct radeon_bo *vram_obj = NULL; |
37 | struct radeon_bo **gtt_obj = NULL; | 37 | struct radeon_bo **gtt_obj = NULL; |
38 | uint64_t gtt_addr, vram_addr; | 38 | uint64_t gtt_addr, vram_addr; |
39 | unsigned i, n, size; | 39 | unsigned n, size; |
40 | int r, ring; | 40 | int i, r, ring; |
41 | 41 | ||
42 | switch (flag) { | 42 | switch (flag) { |
43 | case RADEON_TEST_COPY_DMA: | 43 | case RADEON_TEST_COPY_DMA: |
diff --git a/drivers/gpu/drm/radeon/radeon_uvd.c b/drivers/gpu/drm/radeon/radeon_uvd.c index a0f11856ddde..308eff5be1b4 100644 --- a/drivers/gpu/drm/radeon/radeon_uvd.c +++ b/drivers/gpu/drm/radeon/radeon_uvd.c | |||
@@ -476,7 +476,8 @@ static int radeon_uvd_cs_reloc(struct radeon_cs_parser *p, | |||
476 | return -EINVAL; | 476 | return -EINVAL; |
477 | } | 477 | } |
478 | 478 | ||
479 | if (p->rdev->family < CHIP_PALM && (cmd == 0 || cmd == 0x3) && | 479 | /* TODO: is this still necessary on NI+ ? */ |
480 | if ((cmd == 0 || cmd == 0x3) && | ||
480 | (start >> 28) != (p->rdev->uvd.gpu_addr >> 28)) { | 481 | (start >> 28) != (p->rdev->uvd.gpu_addr >> 28)) { |
481 | DRM_ERROR("msg/fb buffer %LX-%LX out of 256MB segment!\n", | 482 | DRM_ERROR("msg/fb buffer %LX-%LX out of 256MB segment!\n", |
482 | start, end); | 483 | start, end); |
@@ -798,7 +799,8 @@ void radeon_uvd_note_usage(struct radeon_device *rdev) | |||
798 | (rdev->pm.dpm.hd != hd)) { | 799 | (rdev->pm.dpm.hd != hd)) { |
799 | rdev->pm.dpm.sd = sd; | 800 | rdev->pm.dpm.sd = sd; |
800 | rdev->pm.dpm.hd = hd; | 801 | rdev->pm.dpm.hd = hd; |
801 | streams_changed = true; | 802 | /* disable this for now */ |
803 | /*streams_changed = true;*/ | ||
802 | } | 804 | } |
803 | } | 805 | } |
804 | 806 | ||
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c index c354c1094967..d96f7cbca0a1 100644 --- a/drivers/gpu/drm/radeon/si.c +++ b/drivers/gpu/drm/radeon/si.c | |||
@@ -85,6 +85,9 @@ extern void si_dma_vm_set_page(struct radeon_device *rdev, | |||
85 | uint32_t incr, uint32_t flags); | 85 | uint32_t incr, uint32_t flags); |
86 | static void si_enable_gui_idle_interrupt(struct radeon_device *rdev, | 86 | static void si_enable_gui_idle_interrupt(struct radeon_device *rdev, |
87 | bool enable); | 87 | bool enable); |
88 | static void si_fini_pg(struct radeon_device *rdev); | ||
89 | static void si_fini_cg(struct radeon_device *rdev); | ||
90 | static void si_rlc_stop(struct radeon_device *rdev); | ||
88 | 91 | ||
89 | static const u32 verde_rlc_save_restore_register_list[] = | 92 | static const u32 verde_rlc_save_restore_register_list[] = |
90 | { | 93 | { |
@@ -1678,6 +1681,7 @@ static int si_init_microcode(struct radeon_device *rdev) | |||
1678 | fw_name); | 1681 | fw_name); |
1679 | release_firmware(rdev->smc_fw); | 1682 | release_firmware(rdev->smc_fw); |
1680 | rdev->smc_fw = NULL; | 1683 | rdev->smc_fw = NULL; |
1684 | err = 0; | ||
1681 | } else if (rdev->smc_fw->size != smc_req_size) { | 1685 | } else if (rdev->smc_fw->size != smc_req_size) { |
1682 | printk(KERN_ERR | 1686 | printk(KERN_ERR |
1683 | "si_smc: Bogus length %zu in firmware \"%s\"\n", | 1687 | "si_smc: Bogus length %zu in firmware \"%s\"\n", |
@@ -3608,6 +3612,13 @@ static void si_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask) | |||
3608 | dev_info(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X\n", | 3612 | dev_info(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X\n", |
3609 | RREG32(VM_CONTEXT1_PROTECTION_FAULT_STATUS)); | 3613 | RREG32(VM_CONTEXT1_PROTECTION_FAULT_STATUS)); |
3610 | 3614 | ||
3615 | /* disable PG/CG */ | ||
3616 | si_fini_pg(rdev); | ||
3617 | si_fini_cg(rdev); | ||
3618 | |||
3619 | /* stop the rlc */ | ||
3620 | si_rlc_stop(rdev); | ||
3621 | |||
3611 | /* Disable CP parsing/prefetching */ | 3622 | /* Disable CP parsing/prefetching */ |
3612 | WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT | CP_CE_HALT); | 3623 | WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT | CP_CE_HALT); |
3613 | 3624 | ||
diff --git a/drivers/gpu/drm/radeon/si_dpm.c b/drivers/gpu/drm/radeon/si_dpm.c index 9ace28702c76..2332aa1bf93c 100644 --- a/drivers/gpu/drm/radeon/si_dpm.c +++ b/drivers/gpu/drm/radeon/si_dpm.c | |||
@@ -5208,7 +5208,7 @@ static int si_set_mc_special_registers(struct radeon_device *rdev, | |||
5208 | table->mc_reg_table_entry[k].mc_data[j] |= 0x100; | 5208 | table->mc_reg_table_entry[k].mc_data[j] |= 0x100; |
5209 | } | 5209 | } |
5210 | j++; | 5210 | j++; |
5211 | if (j > SMC_SISLANDS_MC_REGISTER_ARRAY_SIZE) | 5211 | if (j >= SMC_SISLANDS_MC_REGISTER_ARRAY_SIZE) |
5212 | return -EINVAL; | 5212 | return -EINVAL; |
5213 | 5213 | ||
5214 | if (!pi->mem_gddr5) { | 5214 | if (!pi->mem_gddr5) { |
@@ -5218,7 +5218,7 @@ static int si_set_mc_special_registers(struct radeon_device *rdev, | |||
5218 | table->mc_reg_table_entry[k].mc_data[j] = | 5218 | table->mc_reg_table_entry[k].mc_data[j] = |
5219 | (table->mc_reg_table_entry[k].mc_data[i] & 0xffff0000) >> 16; | 5219 | (table->mc_reg_table_entry[k].mc_data[i] & 0xffff0000) >> 16; |
5220 | j++; | 5220 | j++; |
5221 | if (j > SMC_SISLANDS_MC_REGISTER_ARRAY_SIZE) | 5221 | if (j >= SMC_SISLANDS_MC_REGISTER_ARRAY_SIZE) |
5222 | return -EINVAL; | 5222 | return -EINVAL; |
5223 | } | 5223 | } |
5224 | break; | 5224 | break; |
@@ -5231,7 +5231,7 @@ static int si_set_mc_special_registers(struct radeon_device *rdev, | |||
5231 | (temp_reg & 0xffff0000) | | 5231 | (temp_reg & 0xffff0000) | |
5232 | (table->mc_reg_table_entry[k].mc_data[i] & 0x0000ffff); | 5232 | (table->mc_reg_table_entry[k].mc_data[i] & 0x0000ffff); |
5233 | j++; | 5233 | j++; |
5234 | if (j > SMC_SISLANDS_MC_REGISTER_ARRAY_SIZE) | 5234 | if (j >= SMC_SISLANDS_MC_REGISTER_ARRAY_SIZE) |
5235 | return -EINVAL; | 5235 | return -EINVAL; |
5236 | break; | 5236 | break; |
5237 | default: | 5237 | default: |
diff --git a/drivers/gpu/drm/radeon/sid.h b/drivers/gpu/drm/radeon/sid.h index 52d2ab6b67a0..7e2e0ea66a00 100644 --- a/drivers/gpu/drm/radeon/sid.h +++ b/drivers/gpu/drm/radeon/sid.h | |||
@@ -1553,7 +1553,7 @@ | |||
1553 | * 6. COMMAND [30:21] | BYTE_COUNT [20:0] | 1553 | * 6. COMMAND [30:21] | BYTE_COUNT [20:0] |
1554 | */ | 1554 | */ |
1555 | # define PACKET3_CP_DMA_DST_SEL(x) ((x) << 20) | 1555 | # define PACKET3_CP_DMA_DST_SEL(x) ((x) << 20) |
1556 | /* 0 - SRC_ADDR | 1556 | /* 0 - DST_ADDR |
1557 | * 1 - GDS | 1557 | * 1 - GDS |
1558 | */ | 1558 | */ |
1559 | # define PACKET3_CP_DMA_ENGINE(x) ((x) << 27) | 1559 | # define PACKET3_CP_DMA_ENGINE(x) ((x) << 27) |
@@ -1568,7 +1568,7 @@ | |||
1568 | # define PACKET3_CP_DMA_CP_SYNC (1 << 31) | 1568 | # define PACKET3_CP_DMA_CP_SYNC (1 << 31) |
1569 | /* COMMAND */ | 1569 | /* COMMAND */ |
1570 | # define PACKET3_CP_DMA_DIS_WC (1 << 21) | 1570 | # define PACKET3_CP_DMA_DIS_WC (1 << 21) |
1571 | # define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 23) | 1571 | # define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 22) |
1572 | /* 0 - none | 1572 | /* 0 - none |
1573 | * 1 - 8 in 16 | 1573 | * 1 - 8 in 16 |
1574 | * 2 - 8 in 32 | 1574 | * 2 - 8 in 32 |
diff --git a/drivers/gpu/drm/radeon/trinity_dpm.c b/drivers/gpu/drm/radeon/trinity_dpm.c index 7f998bf1cc9d..9364129ba292 100644 --- a/drivers/gpu/drm/radeon/trinity_dpm.c +++ b/drivers/gpu/drm/radeon/trinity_dpm.c | |||
@@ -1868,7 +1868,7 @@ int trinity_dpm_init(struct radeon_device *rdev) | |||
1868 | for (i = 0; i < SUMO_MAX_HARDWARE_POWERLEVELS; i++) | 1868 | for (i = 0; i < SUMO_MAX_HARDWARE_POWERLEVELS; i++) |
1869 | pi->at[i] = TRINITY_AT_DFLT; | 1869 | pi->at[i] = TRINITY_AT_DFLT; |
1870 | 1870 | ||
1871 | pi->enable_bapm = true; | 1871 | pi->enable_bapm = false; |
1872 | pi->enable_nbps_policy = true; | 1872 | pi->enable_nbps_policy = true; |
1873 | pi->enable_sclk_ds = true; | 1873 | pi->enable_sclk_ds = true; |
1874 | pi->enable_gfx_power_gating = true; | 1874 | pi->enable_gfx_power_gating = true; |
diff --git a/drivers/gpu/drm/radeon/uvd_v1_0.c b/drivers/gpu/drm/radeon/uvd_v1_0.c index 3100fa9cb52f..7266805d9786 100644 --- a/drivers/gpu/drm/radeon/uvd_v1_0.c +++ b/drivers/gpu/drm/radeon/uvd_v1_0.c | |||
@@ -212,8 +212,8 @@ int uvd_v1_0_start(struct radeon_device *rdev) | |||
212 | /* enable VCPU clock */ | 212 | /* enable VCPU clock */ |
213 | WREG32(UVD_VCPU_CNTL, 1 << 9); | 213 | WREG32(UVD_VCPU_CNTL, 1 << 9); |
214 | 214 | ||
215 | /* enable UMC and NC0 */ | 215 | /* enable UMC */ |
216 | WREG32_P(UVD_LMI_CTRL2, 1 << 13, ~((1 << 8) | (1 << 13))); | 216 | WREG32_P(UVD_LMI_CTRL2, 0, ~(1 << 8)); |
217 | 217 | ||
218 | /* boot up the VCPU */ | 218 | /* boot up the VCPU */ |
219 | WREG32(UVD_SOFT_RESET, 0); | 219 | WREG32(UVD_SOFT_RESET, 0); |