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path: root/drivers/gpu/drm/radeon/radeon_ring.c
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Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_ring.c')
-rw-r--r--drivers/gpu/drm/radeon/radeon_ring.c20
1 files changed, 11 insertions, 9 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_ring.c b/drivers/gpu/drm/radeon/radeon_ring.c
index 5b4e0cf231a0..d65607902537 100644
--- a/drivers/gpu/drm/radeon/radeon_ring.c
+++ b/drivers/gpu/drm/radeon/radeon_ring.c
@@ -177,16 +177,18 @@ int radeon_ring_lock(struct radeon_device *rdev, struct radeon_ring *ring, unsig
177 * 177 *
178 * @rdev: radeon_device pointer 178 * @rdev: radeon_device pointer
179 * @ring: radeon_ring structure holding ring information 179 * @ring: radeon_ring structure holding ring information
180 * @hdp_flush: Whether or not to perform an HDP cache flush
180 * 181 *
181 * Update the wptr (write pointer) to tell the GPU to 182 * Update the wptr (write pointer) to tell the GPU to
182 * execute new commands on the ring buffer (all asics). 183 * execute new commands on the ring buffer (all asics).
183 */ 184 */
184void radeon_ring_commit(struct radeon_device *rdev, struct radeon_ring *ring) 185void radeon_ring_commit(struct radeon_device *rdev, struct radeon_ring *ring,
186 bool hdp_flush)
185{ 187{
186 /* If we are emitting the HDP flush via the ring buffer, we need to 188 /* If we are emitting the HDP flush via the ring buffer, we need to
187 * do it before padding. 189 * do it before padding.
188 */ 190 */
189 if (rdev->asic->ring[ring->idx]->hdp_flush) 191 if (hdp_flush && rdev->asic->ring[ring->idx]->hdp_flush)
190 rdev->asic->ring[ring->idx]->hdp_flush(rdev, ring); 192 rdev->asic->ring[ring->idx]->hdp_flush(rdev, ring);
191 /* We pad to match fetch size */ 193 /* We pad to match fetch size */
192 while (ring->wptr & ring->align_mask) { 194 while (ring->wptr & ring->align_mask) {
@@ -196,7 +198,7 @@ void radeon_ring_commit(struct radeon_device *rdev, struct radeon_ring *ring)
196 /* If we are emitting the HDP flush via MMIO, we need to do it after 198 /* If we are emitting the HDP flush via MMIO, we need to do it after
197 * all CPU writes to VRAM finished. 199 * all CPU writes to VRAM finished.
198 */ 200 */
199 if (rdev->asic->mmio_hdp_flush) 201 if (hdp_flush && rdev->asic->mmio_hdp_flush)
200 rdev->asic->mmio_hdp_flush(rdev); 202 rdev->asic->mmio_hdp_flush(rdev);
201 radeon_ring_set_wptr(rdev, ring); 203 radeon_ring_set_wptr(rdev, ring);
202} 204}
@@ -207,12 +209,14 @@ void radeon_ring_commit(struct radeon_device *rdev, struct radeon_ring *ring)
207 * 209 *
208 * @rdev: radeon_device pointer 210 * @rdev: radeon_device pointer
209 * @ring: radeon_ring structure holding ring information 211 * @ring: radeon_ring structure holding ring information
212 * @hdp_flush: Whether or not to perform an HDP cache flush
210 * 213 *
211 * Call radeon_ring_commit() then unlock the ring (all asics). 214 * Call radeon_ring_commit() then unlock the ring (all asics).
212 */ 215 */
213void radeon_ring_unlock_commit(struct radeon_device *rdev, struct radeon_ring *ring) 216void radeon_ring_unlock_commit(struct radeon_device *rdev, struct radeon_ring *ring,
217 bool hdp_flush)
214{ 218{
215 radeon_ring_commit(rdev, ring); 219 radeon_ring_commit(rdev, ring, hdp_flush);
216 mutex_unlock(&rdev->ring_lock); 220 mutex_unlock(&rdev->ring_lock);
217} 221}
218 222
@@ -372,7 +376,7 @@ int radeon_ring_restore(struct radeon_device *rdev, struct radeon_ring *ring,
372 radeon_ring_write(ring, data[i]); 376 radeon_ring_write(ring, data[i]);
373 } 377 }
374 378
375 radeon_ring_unlock_commit(rdev, ring); 379 radeon_ring_unlock_commit(rdev, ring, false);
376 kfree(data); 380 kfree(data);
377 return 0; 381 return 0;
378} 382}
@@ -400,9 +404,7 @@ int radeon_ring_init(struct radeon_device *rdev, struct radeon_ring *ring, unsig
400 /* Allocate ring buffer */ 404 /* Allocate ring buffer */
401 if (ring->ring_obj == NULL) { 405 if (ring->ring_obj == NULL) {
402 r = radeon_bo_create(rdev, ring->ring_size, PAGE_SIZE, true, 406 r = radeon_bo_create(rdev, ring->ring_size, PAGE_SIZE, true,
403 RADEON_GEM_DOMAIN_GTT, 407 RADEON_GEM_DOMAIN_GTT, 0,
404 (rdev->flags & RADEON_IS_PCIE) ?
405 RADEON_GEM_GTT_WC : 0,
406 NULL, &ring->ring_obj); 408 NULL, &ring->ring_obj);
407 if (r) { 409 if (r) {
408 dev_err(rdev->dev, "(%d) ring create failed\n", r); 410 dev_err(rdev->dev, "(%d) ring create failed\n", r);