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path: root/drivers/gpu/drm/radeon/r600_dma.c
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Diffstat (limited to 'drivers/gpu/drm/radeon/r600_dma.c')
-rw-r--r--drivers/gpu/drm/radeon/r600_dma.c19
1 files changed, 14 insertions, 5 deletions
diff --git a/drivers/gpu/drm/radeon/r600_dma.c b/drivers/gpu/drm/radeon/r600_dma.c
index 7844d15c139f..b2d4c91e6272 100644
--- a/drivers/gpu/drm/radeon/r600_dma.c
+++ b/drivers/gpu/drm/radeon/r600_dma.c
@@ -51,7 +51,14 @@ u32 r600_gpu_check_soft_reset(struct radeon_device *rdev);
51uint32_t r600_dma_get_rptr(struct radeon_device *rdev, 51uint32_t r600_dma_get_rptr(struct radeon_device *rdev,
52 struct radeon_ring *ring) 52 struct radeon_ring *ring)
53{ 53{
54 return (radeon_ring_generic_get_rptr(rdev, ring) & 0x3fffc) >> 2; 54 u32 rptr;
55
56 if (rdev->wb.enabled)
57 rptr = rdev->wb.wb[ring->rptr_offs/4];
58 else
59 rptr = RREG32(DMA_RB_RPTR);
60
61 return (rptr & 0x3fffc) >> 2;
55} 62}
56 63
57/** 64/**
@@ -65,7 +72,7 @@ uint32_t r600_dma_get_rptr(struct radeon_device *rdev,
65uint32_t r600_dma_get_wptr(struct radeon_device *rdev, 72uint32_t r600_dma_get_wptr(struct radeon_device *rdev,
66 struct radeon_ring *ring) 73 struct radeon_ring *ring)
67{ 74{
68 return (RREG32(ring->wptr_reg) & 0x3fffc) >> 2; 75 return (RREG32(DMA_RB_WPTR) & 0x3fffc) >> 2;
69} 76}
70 77
71/** 78/**
@@ -79,7 +86,7 @@ uint32_t r600_dma_get_wptr(struct radeon_device *rdev,
79void r600_dma_set_wptr(struct radeon_device *rdev, 86void r600_dma_set_wptr(struct radeon_device *rdev,
80 struct radeon_ring *ring) 87 struct radeon_ring *ring)
81{ 88{
82 WREG32(ring->wptr_reg, (ring->wptr << 2) & 0x3fffc); 89 WREG32(DMA_RB_WPTR, (ring->wptr << 2) & 0x3fffc);
83} 90}
84 91
85/** 92/**
@@ -93,7 +100,8 @@ void r600_dma_stop(struct radeon_device *rdev)
93{ 100{
94 u32 rb_cntl = RREG32(DMA_RB_CNTL); 101 u32 rb_cntl = RREG32(DMA_RB_CNTL);
95 102
96 radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size); 103 if (rdev->asic->copy.copy_ring_index == R600_RING_TYPE_DMA_INDEX)
104 radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);
97 105
98 rb_cntl &= ~DMA_RB_ENABLE; 106 rb_cntl &= ~DMA_RB_ENABLE;
99 WREG32(DMA_RB_CNTL, rb_cntl); 107 WREG32(DMA_RB_CNTL, rb_cntl);
@@ -180,7 +188,8 @@ int r600_dma_resume(struct radeon_device *rdev)
180 return r; 188 return r;
181 } 189 }
182 190
183 radeon_ttm_set_active_vram_size(rdev, rdev->mc.real_vram_size); 191 if (rdev->asic->copy.copy_ring_index == R600_RING_TYPE_DMA_INDEX)
192 radeon_ttm_set_active_vram_size(rdev, rdev->mc.real_vram_size);
184 193
185 return 0; 194 return 0;
186} 195}