diff options
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_fence.c')
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_fence.c | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_fence.c b/drivers/gpu/drm/nouveau/nouveau_fence.c index 2f6daae68b9d..f676ecd3fd3c 100644 --- a/drivers/gpu/drm/nouveau/nouveau_fence.c +++ b/drivers/gpu/drm/nouveau/nouveau_fence.c | |||
@@ -165,9 +165,9 @@ nouveau_fence_emit(struct nouveau_fence *fence) | |||
165 | 165 | ||
166 | if (USE_REFCNT(dev)) { | 166 | if (USE_REFCNT(dev)) { |
167 | if (dev_priv->card_type < NV_C0) | 167 | if (dev_priv->card_type < NV_C0) |
168 | BEGIN_RING(chan, NvSubSw, 0x0050, 1); | 168 | BEGIN_RING(chan, 0, NV10_SUBCHAN_REF_CNT, 1); |
169 | else | 169 | else |
170 | BEGIN_NVC0(chan, 2, NvSubM2MF, 0x0050, 1); | 170 | BEGIN_NVC0(chan, 2, 0, NV10_SUBCHAN_REF_CNT, 1); |
171 | } else { | 171 | } else { |
172 | BEGIN_RING(chan, NvSubSw, 0x0150, 1); | 172 | BEGIN_RING(chan, NvSubSw, 0x0150, 1); |
173 | } | 173 | } |
@@ -344,7 +344,7 @@ semaphore_acquire(struct nouveau_channel *chan, struct nouveau_semaphore *sema) | |||
344 | if (ret) | 344 | if (ret) |
345 | return ret; | 345 | return ret; |
346 | 346 | ||
347 | BEGIN_RING(chan, NvSubSw, NV_SW_DMA_SEMAPHORE, 3); | 347 | BEGIN_RING(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 3); |
348 | OUT_RING (chan, NvSema); | 348 | OUT_RING (chan, NvSema); |
349 | OUT_RING (chan, offset); | 349 | OUT_RING (chan, offset); |
350 | OUT_RING (chan, 1); | 350 | OUT_RING (chan, 1); |
@@ -354,9 +354,9 @@ semaphore_acquire(struct nouveau_channel *chan, struct nouveau_semaphore *sema) | |||
354 | if (ret) | 354 | if (ret) |
355 | return ret; | 355 | return ret; |
356 | 356 | ||
357 | BEGIN_RING(chan, NvSubSw, NV_SW_DMA_SEMAPHORE, 1); | 357 | BEGIN_RING(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 1); |
358 | OUT_RING (chan, chan->vram_handle); | 358 | OUT_RING (chan, chan->vram_handle); |
359 | BEGIN_RING(chan, NvSubSw, 0x0010, 4); | 359 | BEGIN_RING(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4); |
360 | OUT_RING (chan, upper_32_bits(offset)); | 360 | OUT_RING (chan, upper_32_bits(offset)); |
361 | OUT_RING (chan, lower_32_bits(offset)); | 361 | OUT_RING (chan, lower_32_bits(offset)); |
362 | OUT_RING (chan, 1); | 362 | OUT_RING (chan, 1); |
@@ -366,7 +366,7 @@ semaphore_acquire(struct nouveau_channel *chan, struct nouveau_semaphore *sema) | |||
366 | if (ret) | 366 | if (ret) |
367 | return ret; | 367 | return ret; |
368 | 368 | ||
369 | BEGIN_NVC0(chan, 2, NvSubM2MF, 0x0010, 4); | 369 | BEGIN_NVC0(chan, 2, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4); |
370 | OUT_RING (chan, upper_32_bits(offset)); | 370 | OUT_RING (chan, upper_32_bits(offset)); |
371 | OUT_RING (chan, lower_32_bits(offset)); | 371 | OUT_RING (chan, lower_32_bits(offset)); |
372 | OUT_RING (chan, 1); | 372 | OUT_RING (chan, 1); |
@@ -397,10 +397,10 @@ semaphore_release(struct nouveau_channel *chan, struct nouveau_semaphore *sema) | |||
397 | if (ret) | 397 | if (ret) |
398 | return ret; | 398 | return ret; |
399 | 399 | ||
400 | BEGIN_RING(chan, NvSubSw, NV_SW_DMA_SEMAPHORE, 2); | 400 | BEGIN_RING(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 2); |
401 | OUT_RING (chan, NvSema); | 401 | OUT_RING (chan, NvSema); |
402 | OUT_RING (chan, offset); | 402 | OUT_RING (chan, offset); |
403 | BEGIN_RING(chan, NvSubSw, NV_SW_SEMAPHORE_RELEASE, 1); | 403 | BEGIN_RING(chan, 0, NV11_SUBCHAN_SEMAPHORE_RELEASE, 1); |
404 | OUT_RING (chan, 1); | 404 | OUT_RING (chan, 1); |
405 | } else | 405 | } else |
406 | if (dev_priv->chipset < 0xc0) { | 406 | if (dev_priv->chipset < 0xc0) { |
@@ -408,9 +408,9 @@ semaphore_release(struct nouveau_channel *chan, struct nouveau_semaphore *sema) | |||
408 | if (ret) | 408 | if (ret) |
409 | return ret; | 409 | return ret; |
410 | 410 | ||
411 | BEGIN_RING(chan, NvSubSw, NV_SW_DMA_SEMAPHORE, 1); | 411 | BEGIN_RING(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 1); |
412 | OUT_RING (chan, chan->vram_handle); | 412 | OUT_RING (chan, chan->vram_handle); |
413 | BEGIN_RING(chan, NvSubSw, 0x0010, 4); | 413 | BEGIN_RING(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4); |
414 | OUT_RING (chan, upper_32_bits(offset)); | 414 | OUT_RING (chan, upper_32_bits(offset)); |
415 | OUT_RING (chan, lower_32_bits(offset)); | 415 | OUT_RING (chan, lower_32_bits(offset)); |
416 | OUT_RING (chan, 1); | 416 | OUT_RING (chan, 1); |
@@ -420,7 +420,7 @@ semaphore_release(struct nouveau_channel *chan, struct nouveau_semaphore *sema) | |||
420 | if (ret) | 420 | if (ret) |
421 | return ret; | 421 | return ret; |
422 | 422 | ||
423 | BEGIN_NVC0(chan, 2, NvSubM2MF, 0x0010, 4); | 423 | BEGIN_NVC0(chan, 2, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4); |
424 | OUT_RING (chan, upper_32_bits(offset)); | 424 | OUT_RING (chan, upper_32_bits(offset)); |
425 | OUT_RING (chan, lower_32_bits(offset)); | 425 | OUT_RING (chan, lower_32_bits(offset)); |
426 | OUT_RING (chan, 1); | 426 | OUT_RING (chan, 1); |
@@ -510,7 +510,7 @@ nouveau_fence_channel_init(struct nouveau_channel *chan) | |||
510 | if (ret) | 510 | if (ret) |
511 | return ret; | 511 | return ret; |
512 | 512 | ||
513 | BEGIN_RING(chan, NvSubSw, 0, 1); | 513 | BEGIN_RING(chan, NvSubSw, NV01_SUBCHAN_OBJECT, 1); |
514 | OUT_RING (chan, NvSw); | 514 | OUT_RING (chan, NvSw); |
515 | FIRE_RING (chan); | 515 | FIRE_RING (chan); |
516 | } | 516 | } |