diff options
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dsi_cmd.h')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_dsi_cmd.h | 72 |
1 files changed, 0 insertions, 72 deletions
diff --git a/drivers/gpu/drm/i915/intel_dsi_cmd.h b/drivers/gpu/drm/i915/intel_dsi_cmd.h index 70f24666a1f9..9a28ff58a92b 100644 --- a/drivers/gpu/drm/i915/intel_dsi_cmd.h +++ b/drivers/gpu/drm/i915/intel_dsi_cmd.h | |||
| @@ -39,78 +39,6 @@ | |||
| 39 | void dsi_hs_mode_enable(struct intel_dsi *intel_dsi, bool enable, | 39 | void dsi_hs_mode_enable(struct intel_dsi *intel_dsi, bool enable, |
| 40 | enum port port); | 40 | enum port port); |
| 41 | 41 | ||
| 42 | int dsi_vc_dcs_write(struct intel_dsi *intel_dsi, int channel, | ||
| 43 | const u8 *data, int len, enum port port); | ||
| 44 | |||
| 45 | int dsi_vc_generic_write(struct intel_dsi *intel_dsi, int channel, | ||
| 46 | const u8 *data, int len, enum port port); | ||
| 47 | |||
| 48 | int dsi_vc_dcs_read(struct intel_dsi *intel_dsi, int channel, u8 dcs_cmd, | ||
| 49 | u8 *buf, int buflen, enum port port); | ||
| 50 | |||
| 51 | int dsi_vc_generic_read(struct intel_dsi *intel_dsi, int channel, | ||
| 52 | u8 *reqdata, int reqlen, u8 *buf, int buflen, enum port port); | ||
| 53 | |||
| 54 | int dpi_send_cmd(struct intel_dsi *intel_dsi, u32 cmd, bool hs, enum port port); | 42 | int dpi_send_cmd(struct intel_dsi *intel_dsi, u32 cmd, bool hs, enum port port); |
| 55 | 43 | ||
| 56 | /* XXX: questionable write helpers */ | ||
| 57 | static inline int dsi_vc_dcs_write_0(struct intel_dsi *intel_dsi, | ||
| 58 | int channel, u8 dcs_cmd, enum port port) | ||
| 59 | { | ||
| 60 | return dsi_vc_dcs_write(intel_dsi, channel, &dcs_cmd, 1, port); | ||
| 61 | } | ||
| 62 | |||
| 63 | static inline int dsi_vc_dcs_write_1(struct intel_dsi *intel_dsi, | ||
| 64 | int channel, u8 dcs_cmd, u8 param, enum port port) | ||
| 65 | { | ||
| 66 | u8 buf[2] = { dcs_cmd, param }; | ||
| 67 | return dsi_vc_dcs_write(intel_dsi, channel, buf, 2, port); | ||
| 68 | } | ||
| 69 | |||
| 70 | static inline int dsi_vc_generic_write_0(struct intel_dsi *intel_dsi, | ||
| 71 | int channel, enum port port) | ||
| 72 | { | ||
| 73 | return dsi_vc_generic_write(intel_dsi, channel, NULL, 0, port); | ||
| 74 | } | ||
| 75 | |||
| 76 | static inline int dsi_vc_generic_write_1(struct intel_dsi *intel_dsi, | ||
| 77 | int channel, u8 param, enum port port) | ||
| 78 | { | ||
| 79 | return dsi_vc_generic_write(intel_dsi, channel, ¶m, 1, port); | ||
| 80 | } | ||
| 81 | |||
| 82 | static inline int dsi_vc_generic_write_2(struct intel_dsi *intel_dsi, | ||
| 83 | int channel, u8 param1, u8 param2, enum port port) | ||
| 84 | { | ||
| 85 | u8 buf[2] = { param1, param2 }; | ||
| 86 | return dsi_vc_generic_write(intel_dsi, channel, buf, 2, port); | ||
| 87 | } | ||
| 88 | |||
| 89 | /* XXX: questionable read helpers */ | ||
| 90 | static inline int dsi_vc_generic_read_0(struct intel_dsi *intel_dsi, | ||
| 91 | int channel, u8 *buf, int buflen, enum port port) | ||
| 92 | { | ||
| 93 | return dsi_vc_generic_read(intel_dsi, channel, NULL, 0, buf, buflen, | ||
| 94 | port); | ||
| 95 | } | ||
| 96 | |||
| 97 | static inline int dsi_vc_generic_read_1(struct intel_dsi *intel_dsi, | ||
| 98 | int channel, u8 param, u8 *buf, | ||
| 99 | int buflen, enum port port) | ||
| 100 | { | ||
| 101 | return dsi_vc_generic_read(intel_dsi, channel, ¶m, 1, buf, buflen, | ||
| 102 | port); | ||
| 103 | } | ||
| 104 | |||
| 105 | static inline int dsi_vc_generic_read_2(struct intel_dsi *intel_dsi, | ||
| 106 | int channel, u8 param1, u8 param2, | ||
| 107 | u8 *buf, int buflen, enum port port) | ||
| 108 | { | ||
| 109 | u8 req[2] = { param1, param2 }; | ||
| 110 | |||
| 111 | return dsi_vc_generic_read(intel_dsi, channel, req, 2, buf, buflen, | ||
| 112 | port); | ||
| 113 | } | ||
| 114 | |||
| 115 | |||
| 116 | #endif /* _INTEL_DSI_DSI_H */ | 44 | #endif /* _INTEL_DSI_DSI_H */ |
