2 files changed, 44 insertions, 47 deletions

diff --git a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c
index cd18493c9527..aa5c782bf015 100644
--- a/drivers/char/agp/intel-agp.c
+++ b/drivers/char/agp/intel-agp.c
@@ -927,20 +927,14 @@ static int __devinit agp_intel_probe(struct pci_dev *pdev,
         dev_info(&pdev->dev, "Intel %s Chipset\n", intel_agp_chipsets[i].name);
 
         /*
-        * If the device has not been properly setup, the following will catch
-        * the problem and should stop the system from crashing.
-        * 20030610 - hamish@zot.org
-        */
-        if (pci_enable_device(pdev)) {
-                dev_err(&pdev->dev, "can't enable PCI device\n");
-                agp_put_bridge(bridge);
-                return -ENODEV;
-        }
-
-        /*
         * The following fixes the case where the BIOS has "forgotten" to
         * provide an address range for the GART.
         * 20030610 - hamish@zot.org
+        * This happens before pci_enable_device() intentionally;
+        * calling pci_enable_device() before assigning the resource
+        * will result in the GART being disabled on machines with such
+        * BIOSs (the GART ends up with a BAR starting at 0, which
+        * conflicts a lot of other devices).
         */
         r = &pdev->resource[0];
         if (!r->start && r->end) {
@@ -951,6 +945,17 @@ static int __devinit agp_intel_probe(struct pci_dev *pdev,
                 }
         }
 
+        /*
+        * If the device has not been properly setup, the following will catch
+        * the problem and should stop the system from crashing.
+        * 20030610 - hamish@zot.org
+        */
+        if (pci_enable_device(pdev)) {
+                dev_err(&pdev->dev, "can't enable PCI device\n");
+                agp_put_bridge(bridge);
+                return -ENODEV;
+        }
+
         /* Fill in the mode register */
         if (cap_ptr) {
                 pci_read_config_dword(pdev,
@@ -1049,6 +1054,7 @@ static struct pci_device_id agp_intel_pci_table[] = {
         ID(PCI_DEVICE_ID_INTEL_G45_HB),
         ID(PCI_DEVICE_ID_INTEL_G41_HB),
         ID(PCI_DEVICE_ID_INTEL_B43_HB),
+        ID(PCI_DEVICE_ID_INTEL_B43_1_HB),
         ID(PCI_DEVICE_ID_INTEL_IRONLAKE_D_HB),
         ID(PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB),
         ID(PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB),
diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index 75e0a3497888..6ea3bf6e5b1a 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -534,7 +534,7 @@ static void intel_i830_init_gtt_entries(void)
 
         pci_read_config_word(agp_bridge->dev, I830_GMCH_CTRL, &gmch_ctrl);
 
-        if (IS_I965) {
+        if (IS_G33 || IS_I965) {
                 u32 pgetbl_ctl;
                 pgetbl_ctl = readl(intel_private.registers+I810_PGETBL_CTL);
 
@@ -567,22 +567,6 @@ static void intel_i830_init_gtt_entries(void)
                         size = 512;
                 }
                 size += 4; /* add in BIOS popup space */
-        } else if (IS_G33 && !IS_PINEVIEW) {
-        /* G33's GTT size defined in gmch_ctrl */
-                switch (gmch_ctrl & G33_PGETBL_SIZE_MASK) {
-                case G33_PGETBL_SIZE_1M:
-                        size = 1024;
-                        break;
-                case G33_PGETBL_SIZE_2M:
-                        size = 2048;
-                        break;
-                default:
-                        dev_info(&agp_bridge->dev->dev,
-                                 "unknown page table size 0x%x, assuming 512KB\n",
-                                (gmch_ctrl & G33_PGETBL_SIZE_MASK));
-                        size = 512;
-                }
-                size += 4;
         } else if (IS_G4X || IS_PINEVIEW) {
                 /* On 4 series hardware, GTT stolen is separate from graphics
                  * stolen, ignore it in stolen gtt entries counting.  However,
@@ -1257,24 +1241,31 @@ static int intel_i915_get_gtt_size(void)
         int size;
 
         if (IS_G33) {
-                u16 gmch_ctrl;
+                u32 pgetbl_ctl;
+                pgetbl_ctl = readl(intel_private.registers+I810_PGETBL_CTL);
 
-                /* G33's GTT size defined in gmch_ctrl */
-                pci_read_config_word(agp_bridge->dev, I830_GMCH_CTRL, &gmch_ctrl);
-                switch (gmch_ctrl & I830_GMCH_GMS_MASK) {
-                case I830_GMCH_GMS_STOLEN_512:
+                switch (pgetbl_ctl & I965_PGETBL_SIZE_MASK) {
+                case I965_PGETBL_SIZE_128KB:
+                        size = 128;
+                        break;
+                case I965_PGETBL_SIZE_256KB:
+                        size = 256;
+                        break;
+                case I965_PGETBL_SIZE_512KB:
                         size = 512;
                         break;
-                case I830_GMCH_GMS_STOLEN_1024:
+                case I965_PGETBL_SIZE_1MB:
                         size = 1024;
                         break;
-                case I830_GMCH_GMS_STOLEN_8192:
-                        size = 8*1024;
+                case I965_PGETBL_SIZE_2MB:
+                        size = 2048;
+                        break;
+                case I965_PGETBL_SIZE_1_5MB:
+                        size = 1024 + 512;
                         break;
                 default:
-                        dev_info(&agp_bridge->dev->dev,
-                                 "unknown page table size 0x%x, assuming 512KB\n",
-                                (gmch_ctrl & I830_GMCH_GMS_MASK));
+                        dev_info(&intel_private.pcidev->dev,
+                                 "unknown page table size, assuming 512KB\n");
                         size = 512;
                 }
         } else {
@@ -1306,14 +1297,6 @@ static int intel_i915_create_gatt_table(struct agp_bridge_data *bridge)
         pci_read_config_dword(intel_private.pcidev, I915_MMADDR, &temp);
         pci_read_config_dword(intel_private.pcidev, I915_PTEADDR, &temp2);
 
-        gtt_map_size = intel_i915_get_gtt_size();
-
-        intel_private.gtt = ioremap(temp2, gtt_map_size);
-        if (!intel_private.gtt)
-                return -ENOMEM;
-
-        intel_private.gtt_total_size = gtt_map_size / 4;
-
         temp &= 0xfff80000;
 
         intel_private.registers = ioremap(temp, 128 * 4096);
@@ -1322,6 +1305,14 @@ static int intel_i915_create_gatt_table(struct agp_bridge_data *bridge)
                 return -ENOMEM;
         }
 
+        gtt_map_size = intel_i915_get_gtt_size();
+
+        intel_private.gtt = ioremap(temp2, gtt_map_size);
+        if (!intel_private.gtt)
+                return -ENOMEM;
+
+        intel_private.gtt_total_size = gtt_map_size / 4;
+
         temp = readl(intel_private.registers+I810_PGETBL_CTL) & 0xfffff000;
         global_cache_flush();   /* FIXME: ? */