diff options
Diffstat (limited to 'drivers/char/agp/intel-agp.h')
-rw-r--r-- | drivers/char/agp/intel-agp.h | 71 |
1 files changed, 27 insertions, 44 deletions
diff --git a/drivers/char/agp/intel-agp.h b/drivers/char/agp/intel-agp.h index d09b1ab7e8ab..5da67f165afa 100644 --- a/drivers/char/agp/intel-agp.h +++ b/drivers/char/agp/intel-agp.h | |||
@@ -75,6 +75,8 @@ | |||
75 | #define I810_GMS_DISABLE 0x00000000 | 75 | #define I810_GMS_DISABLE 0x00000000 |
76 | #define I810_PGETBL_CTL 0x2020 | 76 | #define I810_PGETBL_CTL 0x2020 |
77 | #define I810_PGETBL_ENABLED 0x00000001 | 77 | #define I810_PGETBL_ENABLED 0x00000001 |
78 | /* Note: PGETBL_CTL2 has a different offset on G33. */ | ||
79 | #define I965_PGETBL_CTL2 0x20c4 | ||
78 | #define I965_PGETBL_SIZE_MASK 0x0000000e | 80 | #define I965_PGETBL_SIZE_MASK 0x0000000e |
79 | #define I965_PGETBL_SIZE_512KB (0 << 1) | 81 | #define I965_PGETBL_SIZE_512KB (0 << 1) |
80 | #define I965_PGETBL_SIZE_256KB (1 << 1) | 82 | #define I965_PGETBL_SIZE_256KB (1 << 1) |
@@ -82,9 +84,18 @@ | |||
82 | #define I965_PGETBL_SIZE_1MB (3 << 1) | 84 | #define I965_PGETBL_SIZE_1MB (3 << 1) |
83 | #define I965_PGETBL_SIZE_2MB (4 << 1) | 85 | #define I965_PGETBL_SIZE_2MB (4 << 1) |
84 | #define I965_PGETBL_SIZE_1_5MB (5 << 1) | 86 | #define I965_PGETBL_SIZE_1_5MB (5 << 1) |
85 | #define G33_PGETBL_SIZE_MASK (3 << 8) | 87 | #define G33_GMCH_SIZE_MASK (3 << 8) |
86 | #define G33_PGETBL_SIZE_1M (1 << 8) | 88 | #define G33_GMCH_SIZE_1M (1 << 8) |
87 | #define G33_PGETBL_SIZE_2M (2 << 8) | 89 | #define G33_GMCH_SIZE_2M (2 << 8) |
90 | #define G4x_GMCH_SIZE_MASK (0xf << 8) | ||
91 | #define G4x_GMCH_SIZE_1M (0x1 << 8) | ||
92 | #define G4x_GMCH_SIZE_2M (0x3 << 8) | ||
93 | #define G4x_GMCH_SIZE_VT_EN (0x8 << 8) | ||
94 | #define G4x_GMCH_SIZE_VT_1M (G4x_GMCH_SIZE_1M | G4x_GMCH_SIZE_VT_EN) | ||
95 | #define G4x_GMCH_SIZE_VT_1_5M ((0x2 << 8) | G4x_GMCH_SIZE_VT_EN) | ||
96 | #define G4x_GMCH_SIZE_VT_2M (G4x_GMCH_SIZE_2M | G4x_GMCH_SIZE_VT_EN) | ||
97 | |||
98 | #define GFX_FLSH_CNTL 0x2170 /* 915+ */ | ||
88 | 99 | ||
89 | #define I810_DRAM_CTL 0x3000 | 100 | #define I810_DRAM_CTL 0x3000 |
90 | #define I810_DRAM_ROW_0 0x00000001 | 101 | #define I810_DRAM_ROW_0 0x00000001 |
@@ -120,6 +131,7 @@ | |||
120 | #define INTEL_GMCH_GMS_STOLEN_352M (0xd << 4) | 131 | #define INTEL_GMCH_GMS_STOLEN_352M (0xd << 4) |
121 | 132 | ||
122 | #define I915_IFPADDR 0x60 | 133 | #define I915_IFPADDR 0x60 |
134 | #define I830_HIC 0x70 | ||
123 | 135 | ||
124 | /* Intel 965G registers */ | 136 | /* Intel 965G registers */ |
125 | #define I965_MSAC 0x62 | 137 | #define I965_MSAC 0x62 |
@@ -214,45 +226,16 @@ | |||
214 | #define PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_GT2_PLUS_IG 0x0126 | 226 | #define PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_GT2_PLUS_IG 0x0126 |
215 | #define PCI_DEVICE_ID_INTEL_SANDYBRIDGE_S_HB 0x0108 /* Server */ | 227 | #define PCI_DEVICE_ID_INTEL_SANDYBRIDGE_S_HB 0x0108 /* Server */ |
216 | #define PCI_DEVICE_ID_INTEL_SANDYBRIDGE_S_IG 0x010A | 228 | #define PCI_DEVICE_ID_INTEL_SANDYBRIDGE_S_IG 0x010A |
217 | 229 | #define PCI_DEVICE_ID_INTEL_IVYBRIDGE_HB 0x0150 /* Desktop */ | |
218 | /* cover 915 and 945 variants */ | 230 | #define PCI_DEVICE_ID_INTEL_IVYBRIDGE_GT1_IG 0x0152 |
219 | #define IS_I915 (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_E7221_HB || \ | 231 | #define PCI_DEVICE_ID_INTEL_IVYBRIDGE_GT2_IG 0x0162 |
220 | agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82915G_HB || \ | 232 | #define PCI_DEVICE_ID_INTEL_IVYBRIDGE_M_HB 0x0154 /* Mobile */ |
221 | agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82915GM_HB || \ | 233 | #define PCI_DEVICE_ID_INTEL_IVYBRIDGE_M_GT1_IG 0x0156 |
222 | agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82945G_HB || \ | 234 | #define PCI_DEVICE_ID_INTEL_IVYBRIDGE_M_GT2_IG 0x0166 |
223 | agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82945GM_HB || \ | 235 | #define PCI_DEVICE_ID_INTEL_IVYBRIDGE_S_HB 0x0158 /* Server */ |
224 | agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82945GME_HB) | 236 | #define PCI_DEVICE_ID_INTEL_IVYBRIDGE_S_GT1_IG 0x015A |
225 | 237 | ||
226 | #define IS_I965 (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82946GZ_HB || \ | 238 | int intel_gmch_probe(struct pci_dev *pdev, |
227 | agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82G35_HB || \ | 239 | struct agp_bridge_data *bridge); |
228 | agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82965Q_HB || \ | 240 | void intel_gmch_remove(struct pci_dev *pdev); |
229 | agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82965G_HB || \ | ||
230 | agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82965GM_HB || \ | ||
231 | agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82965GME_HB) | ||
232 | |||
233 | #define IS_G33 (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_G33_HB || \ | ||
234 | agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_Q35_HB || \ | ||
235 | agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_Q33_HB || \ | ||
236 | agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_PINEVIEW_M_HB || \ | ||
237 | agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_PINEVIEW_HB) | ||
238 | |||
239 | #define IS_PINEVIEW (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_PINEVIEW_M_HB || \ | ||
240 | agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_PINEVIEW_HB) | ||
241 | |||
242 | #define IS_SNB (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_SANDYBRIDGE_HB || \ | ||
243 | agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_HB || \ | ||
244 | agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_SANDYBRIDGE_S_HB) | ||
245 | |||
246 | #define IS_G4X (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_EAGLELAKE_HB || \ | ||
247 | agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_Q45_HB || \ | ||
248 | agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_G45_HB || \ | ||
249 | agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_GM45_HB || \ | ||
250 | agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_G41_HB || \ | ||
251 | agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_B43_HB || \ | ||
252 | agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IRONLAKE_D_HB || \ | ||
253 | agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB || \ | ||
254 | agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB || \ | ||
255 | agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IRONLAKE_MC2_HB || \ | ||
256 | IS_SNB) | ||
257 | |||
258 | #endif | 241 | #endif |