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-rw-r--r--arch/arm/boot/dts/am33xx.dtsi3
-rw-r--r--arch/arm/boot/dts/omap2.dtsi1
-rw-r--r--arch/arm/boot/dts/omap2420-n810.dts7
-rw-r--r--arch/arm/boot/dts/omap2420-n8x0-common.dtsi6
-rw-r--r--arch/arm/boot/dts/omap3.dtsi3
-rw-r--r--arch/arm/mach-at91/Kconfig17
-rw-r--r--arch/arm/mach-at91/Makefile3
-rw-r--r--arch/arm/mach-at91/at91_rstc.h53
-rw-r--r--arch/arm/mach-at91/at91_shdwc.h50
-rw-r--r--arch/arm/mach-at91/at91sam9260.c51
-rw-r--r--arch/arm/mach-at91/at91sam9261.c51
-rw-r--r--arch/arm/mach-at91/at91sam9263.c51
-rw-r--r--arch/arm/mach-at91/at91sam926x_time.c294
-rw-r--r--arch/arm/mach-at91/at91sam9_alt_reset.S40
-rw-r--r--arch/arm/mach-at91/at91sam9g45.c55
-rw-r--r--arch/arm/mach-at91/at91sam9g45_reset.S45
-rw-r--r--arch/arm/mach-at91/at91sam9rl.c51
-rw-r--r--arch/arm/mach-at91/board-afeb-9260v1.c4
-rw-r--r--arch/arm/mach-at91/board-cam60.c4
-rw-r--r--arch/arm/mach-at91/board-cpu9krea.c4
-rw-r--r--arch/arm/mach-at91/board-dt-sam9.c10
-rw-r--r--arch/arm/mach-at91/board-dt-sama5.c9
-rw-r--r--arch/arm/mach-at91/board-flexibity.c4
-rw-r--r--arch/arm/mach-at91/board-gsia18s.c2
-rw-r--r--arch/arm/mach-at91/board-pcontrol-g20.c2
-rw-r--r--arch/arm/mach-at91/board-sam9-l9260.c4
-rw-r--r--arch/arm/mach-at91/board-sam9260ek.c5
-rw-r--r--arch/arm/mach-at91/board-sam9261ek.c7
-rw-r--r--arch/arm/mach-at91/board-sam9263ek.c5
-rw-r--r--arch/arm/mach-at91/board-sam9g20ek.c4
-rw-r--r--arch/arm/mach-at91/board-sam9m10g45ek.c5
-rw-r--r--arch/arm/mach-at91/board-sam9rlek.c5
-rw-r--r--arch/arm/mach-at91/board-snapper9260.c4
-rw-r--r--arch/arm/mach-at91/board-stamp9g20.c4
-rw-r--r--arch/arm/mach-at91/generic.h18
-rw-r--r--arch/arm/mach-at91/pm.c72
-rw-r--r--arch/arm/mach-at91/setup.c185
-rw-r--r--arch/arm/mach-at91/soc.h2
-rw-r--r--arch/arm/mach-omap2/Kconfig1
-rw-r--r--arch/arm/mach-omap2/Makefile3
-rw-r--r--arch/arm/mach-omap2/board-3430sdp.c1
-rw-r--r--arch/arm/mach-omap2/board-am3517crane.c1
-rw-r--r--arch/arm/mach-omap2/board-am3517evm.c1
-rw-r--r--arch/arm/mach-omap2/board-cm-t35.c2
-rw-r--r--arch/arm/mach-omap2/board-cm-t3517.c1
-rw-r--r--arch/arm/mach-omap2/board-devkit8000.c1
-rw-r--r--arch/arm/mach-omap2/board-generic.c14
-rw-r--r--arch/arm/mach-omap2/board-ldp.c1
-rw-r--r--arch/arm/mach-omap2/board-n8x0.c26
-rw-r--r--arch/arm/mach-omap2/board-omap3beagle.c1
-rw-r--r--arch/arm/mach-omap2/board-omap3logic.c2
-rw-r--r--arch/arm/mach-omap2/board-omap3pandora.c1
-rw-r--r--arch/arm/mach-omap2/board-omap3stalker.c1
-rw-r--r--arch/arm/mach-omap2/board-omap3touchbook.c1
-rw-r--r--arch/arm/mach-omap2/board-overo.c1
-rw-r--r--arch/arm/mach-omap2/board-rx51.c1
-rw-r--r--arch/arm/mach-omap2/common-board-devices.h5
-rw-r--r--arch/arm/mach-omap2/common.h23
-rw-r--r--arch/arm/mach-omap2/irq.c380
-rw-r--r--arch/arm/mach-omap2/pdata-quirks.c2
60 files changed, 359 insertions, 1251 deletions
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 9e7d45571cd5..abe530f70296 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -133,10 +133,9 @@
133 }; 133 };
134 134
135 intc: interrupt-controller@48200000 { 135 intc: interrupt-controller@48200000 {
136 compatible = "ti,omap2-intc"; 136 compatible = "ti,am33xx-intc";
137 interrupt-controller; 137 interrupt-controller;
138 #interrupt-cells = <1>; 138 #interrupt-cells = <1>;
139 ti,intc-size = <128>;
140 reg = <0x48200000 0x1000>; 139 reg = <0x48200000 0x1000>;
141 }; 140 };
142 141
diff --git a/arch/arm/boot/dts/omap2.dtsi b/arch/arm/boot/dts/omap2.dtsi
index 8f8c07da4ac1..59d1c297bb30 100644
--- a/arch/arm/boot/dts/omap2.dtsi
+++ b/arch/arm/boot/dts/omap2.dtsi
@@ -75,7 +75,6 @@
75 compatible = "ti,omap2-intc"; 75 compatible = "ti,omap2-intc";
76 interrupt-controller; 76 interrupt-controller;
77 #interrupt-cells = <1>; 77 #interrupt-cells = <1>;
78 ti,intc-size = <96>;
79 reg = <0x480FE000 0x1000>; 78 reg = <0x480FE000 0x1000>;
80 }; 79 };
81 80
diff --git a/arch/arm/boot/dts/omap2420-n810.dts b/arch/arm/boot/dts/omap2420-n810.dts
index 21baec154b78..b604d26bd48c 100644
--- a/arch/arm/boot/dts/omap2420-n810.dts
+++ b/arch/arm/boot/dts/omap2420-n810.dts
@@ -6,3 +6,10 @@
6 model = "Nokia N810"; 6 model = "Nokia N810";
7 compatible = "nokia,n810", "nokia,n8x0", "ti,omap2420", "ti,omap2"; 7 compatible = "nokia,n810", "nokia,n8x0", "ti,omap2420", "ti,omap2";
8}; 8};
9
10&i2c2 {
11 aic3x@18 {
12 compatible = "tlv320aic3x";
13 reg = <0x18>;
14 };
15};
diff --git a/arch/arm/boot/dts/omap2420-n8x0-common.dtsi b/arch/arm/boot/dts/omap2420-n8x0-common.dtsi
index 89608b206519..24c50db2a478 100644
--- a/arch/arm/boot/dts/omap2420-n8x0-common.dtsi
+++ b/arch/arm/boot/dts/omap2420-n8x0-common.dtsi
@@ -27,6 +27,12 @@
27 27
28&i2c1 { 28&i2c1 {
29 clock-frequency = <400000>; 29 clock-frequency = <400000>;
30
31 pmic@72 {
32 compatible = "menelaus";
33 reg = <0x72>;
34 interrupts = <7 IRQ_TYPE_EDGE_RISING>;
35 };
30}; 36};
31 37
32&i2c2 { 38&i2c2 {
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index 226f3631c230..d0e884d3a737 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -141,10 +141,9 @@
141 }; 141 };
142 142
143 intc: interrupt-controller@48200000 { 143 intc: interrupt-controller@48200000 {
144 compatible = "ti,omap2-intc"; 144 compatible = "ti,omap3-intc";
145 interrupt-controller; 145 interrupt-controller;
146 #interrupt-cells = <1>; 146 #interrupt-cells = <1>;
147 ti,intc-size = <96>;
148 reg = <0x48200000 0x1000>; 147 reg = <0x48200000 0x1000>;
149 }; 148 };
150 149
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 1947a09e5a3f..0e6d548b70d9 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -36,17 +36,6 @@ config OLD_IRQ_AT91
36 select MULTI_IRQ_HANDLER 36 select MULTI_IRQ_HANDLER
37 select SPARSE_IRQ 37 select SPARSE_IRQ
38 38
39config AT91_SAM9_ALT_RESET
40 bool
41 default !ARCH_AT91X40
42
43config AT91_SAM9G45_RESET
44 bool
45 default !ARCH_AT91X40
46
47config AT91_SAM9_TIME
48 bool
49
50config HAVE_AT91_SMD 39config HAVE_AT91_SMD
51 bool 40 bool
52 41
@@ -55,18 +44,20 @@ config HAVE_AT91_H32MX
55 44
56config SOC_AT91SAM9 45config SOC_AT91SAM9
57 bool 46 bool
58 select AT91_SAM9_TIME
59 select ATMEL_AIC_IRQ if !OLD_IRQ_AT91 47 select ATMEL_AIC_IRQ if !OLD_IRQ_AT91
60 select CPU_ARM926T 48 select CPU_ARM926T
61 select GENERIC_CLOCKEVENTS 49 select GENERIC_CLOCKEVENTS
50 select MEMORY if USE_OF
51 select ATMEL_SDRAMC if USE_OF
62 52
63config SOC_SAMA5 53config SOC_SAMA5
64 bool 54 bool
65 select AT91_SAM9_TIME
66 select ATMEL_AIC5_IRQ 55 select ATMEL_AIC5_IRQ
67 select CPU_V7 56 select CPU_V7
68 select GENERIC_CLOCKEVENTS 57 select GENERIC_CLOCKEVENTS
69 select USE_OF 58 select USE_OF
59 select MEMORY
60 select ATMEL_SDRAMC
70 61
71menu "Atmel AT91 System-on-Chip" 62menu "Atmel AT91 System-on-Chip"
72 63
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 603365e44ed5..ac99d87ffefe 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -9,9 +9,6 @@ obj- :=
9 9
10obj-$(CONFIG_OLD_IRQ_AT91) += irq.o 10obj-$(CONFIG_OLD_IRQ_AT91) += irq.o
11obj-$(CONFIG_OLD_CLK_AT91) += clock.o 11obj-$(CONFIG_OLD_CLK_AT91) += clock.o
12obj-$(CONFIG_AT91_SAM9_ALT_RESET) += at91sam9_alt_reset.o
13obj-$(CONFIG_AT91_SAM9G45_RESET) += at91sam9g45_reset.o
14obj-$(CONFIG_AT91_SAM9_TIME) += at91sam926x_time.o
15obj-$(CONFIG_SOC_AT91SAM9) += sam9_smc.o 12obj-$(CONFIG_SOC_AT91SAM9) += sam9_smc.o
16 13
17# CPU-specific support 14# CPU-specific support
diff --git a/arch/arm/mach-at91/at91_rstc.h b/arch/arm/mach-at91/at91_rstc.h
deleted file mode 100644
index a600e6992920..000000000000
--- a/arch/arm/mach-at91/at91_rstc.h
+++ /dev/null
@@ -1,53 +0,0 @@
1/*
2 * arch/arm/mach-at91/include/mach/at91_rstc.h
3 *
4 * Copyright (C) 2007 Andrew Victor
5 * Copyright (C) 2007 Atmel Corporation.
6 *
7 * Reset Controller (RSTC) - System peripherals regsters.
8 * Based on AT91SAM9261 datasheet revision D.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 */
15
16#ifndef AT91_RSTC_H
17#define AT91_RSTC_H
18
19#ifndef __ASSEMBLY__
20extern void __iomem *at91_rstc_base;
21
22#define at91_rstc_read(field) \
23 __raw_readl(at91_rstc_base + field)
24
25#define at91_rstc_write(field, value) \
26 __raw_writel(value, at91_rstc_base + field)
27#else
28.extern at91_rstc_base
29#endif
30
31#define AT91_RSTC_CR 0x00 /* Reset Controller Control Register */
32#define AT91_RSTC_PROCRST (1 << 0) /* Processor Reset */
33#define AT91_RSTC_PERRST (1 << 2) /* Peripheral Reset */
34#define AT91_RSTC_EXTRST (1 << 3) /* External Reset */
35#define AT91_RSTC_KEY (0xa5 << 24) /* KEY Password */
36
37#define AT91_RSTC_SR 0x04 /* Reset Controller Status Register */
38#define AT91_RSTC_URSTS (1 << 0) /* User Reset Status */
39#define AT91_RSTC_RSTTYP (7 << 8) /* Reset Type */
40#define AT91_RSTC_RSTTYP_GENERAL (0 << 8)
41#define AT91_RSTC_RSTTYP_WAKEUP (1 << 8)
42#define AT91_RSTC_RSTTYP_WATCHDOG (2 << 8)
43#define AT91_RSTC_RSTTYP_SOFTWARE (3 << 8)
44#define AT91_RSTC_RSTTYP_USER (4 << 8)
45#define AT91_RSTC_NRSTL (1 << 16) /* NRST Pin Level */
46#define AT91_RSTC_SRCMP (1 << 17) /* Software Reset Command in Progress */
47
48#define AT91_RSTC_MR 0x08 /* Reset Controller Mode Register */
49#define AT91_RSTC_URSTEN (1 << 0) /* User Reset Enable */
50#define AT91_RSTC_URSTIEN (1 << 4) /* User Reset Interrupt Enable */
51#define AT91_RSTC_ERSTL (0xf << 8) /* External Reset Length */
52
53#endif
diff --git a/arch/arm/mach-at91/at91_shdwc.h b/arch/arm/mach-at91/at91_shdwc.h
deleted file mode 100644
index 9e29f31ec9a6..000000000000
--- a/arch/arm/mach-at91/at91_shdwc.h
+++ /dev/null
@@ -1,50 +0,0 @@
1/*
2 * arch/arm/mach-at91/include/mach/at91_shdwc.h
3 *
4 * Copyright (C) 2007 Andrew Victor
5 * Copyright (C) 2007 Atmel Corporation.
6 *
7 * Shutdown Controller (SHDWC) - System peripherals regsters.
8 * Based on AT91SAM9261 datasheet revision D.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 */
15
16#ifndef AT91_SHDWC_H
17#define AT91_SHDWC_H
18
19#ifndef __ASSEMBLY__
20extern void __iomem *at91_shdwc_base;
21
22#define at91_shdwc_read(field) \
23 __raw_readl(at91_shdwc_base + field)
24
25#define at91_shdwc_write(field, value) \
26 __raw_writel(value, at91_shdwc_base + field)
27#endif
28
29#define AT91_SHDW_CR 0x00 /* Shut Down Control Register */
30#define AT91_SHDW_SHDW (1 << 0) /* Shut Down command */
31#define AT91_SHDW_KEY (0xa5 << 24) /* KEY Password */
32
33#define AT91_SHDW_MR 0x04 /* Shut Down Mode Register */
34#define AT91_SHDW_WKMODE0 (3 << 0) /* Wake-up 0 Mode Selection */
35#define AT91_SHDW_WKMODE0_NONE 0
36#define AT91_SHDW_WKMODE0_HIGH 1
37#define AT91_SHDW_WKMODE0_LOW 2
38#define AT91_SHDW_WKMODE0_ANYLEVEL 3
39#define AT91_SHDW_CPTWK0_MAX 0xf /* Maximum Counter On Wake Up 0 */
40#define AT91_SHDW_CPTWK0 (AT91_SHDW_CPTWK0_MAX << 4) /* Counter On Wake Up 0 */
41#define AT91_SHDW_CPTWK0_(x) ((x) << 4)
42#define AT91_SHDW_RTTWKEN (1 << 16) /* Real Time Timer Wake-up Enable */
43#define AT91_SHDW_RTCWKEN (1 << 17) /* Real Time Clock Wake-up Enable */
44
45#define AT91_SHDW_SR 0x08 /* Shut Down Status Register */
46#define AT91_SHDW_WAKEUP0 (1 << 0) /* Wake-up 0 Status */
47#define AT91_SHDW_RTTWK (1 << 16) /* Real-time Timer Wake-up */
48#define AT91_SHDW_RTCWK (1 << 17) /* Real-time Clock Wake-up [SAM9RL] */
49
50#endif
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index 3477ba94c4c5..aab1f969a7c3 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -11,6 +11,7 @@
11 */ 11 */
12 12
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/platform_device.h>
14#include <linux/clk/at91_pmc.h> 15#include <linux/clk/at91_pmc.h>
15 16
16#include <asm/proc-fns.h> 17#include <asm/proc-fns.h>
@@ -24,7 +25,6 @@
24#include <mach/hardware.h> 25#include <mach/hardware.h>
25 26
26#include "at91_aic.h" 27#include "at91_aic.h"
27#include "at91_rstc.h"
28#include "soc.h" 28#include "soc.h"
29#include "generic.h" 29#include "generic.h"
30#include "sam9_smc.h" 30#include "sam9_smc.h"
@@ -342,8 +342,6 @@ static void __init at91sam9260_map_io(void)
342 342
343static void __init at91sam9260_ioremap_registers(void) 343static void __init at91sam9260_ioremap_registers(void)
344{ 344{
345 at91_ioremap_shdwc(AT91SAM9260_BASE_SHDWC);
346 at91_ioremap_rstc(AT91SAM9260_BASE_RSTC);
347 at91_ioremap_ramc(0, AT91SAM9260_BASE_SDRAMC, 512); 345 at91_ioremap_ramc(0, AT91SAM9260_BASE_SDRAMC, 512);
348 at91sam926x_ioremap_pit(AT91SAM9260_BASE_PIT); 346 at91sam926x_ioremap_pit(AT91SAM9260_BASE_PIT);
349 at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC); 347 at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC);
@@ -354,7 +352,6 @@ static void __init at91sam9260_ioremap_registers(void)
354static void __init at91sam9260_initialize(void) 352static void __init at91sam9260_initialize(void)
355{ 353{
356 arm_pm_idle = at91sam9_idle; 354 arm_pm_idle = at91sam9_idle;
357 arm_pm_restart = at91sam9_alt_restart;
358 355
359 at91_sysirq_mask_rtt(AT91SAM9260_BASE_RTT); 356 at91_sysirq_mask_rtt(AT91SAM9260_BASE_RTT);
360 357
@@ -362,6 +359,45 @@ static void __init at91sam9260_initialize(void)
362 at91_gpio_init(at91sam9260_gpio, 3); 359 at91_gpio_init(at91sam9260_gpio, 3);
363} 360}
364 361
362static struct resource rstc_resources[] = {
363 [0] = {
364 .start = AT91SAM9260_BASE_RSTC,
365 .end = AT91SAM9260_BASE_RSTC + SZ_16 - 1,
366 .flags = IORESOURCE_MEM,
367 },
368 [1] = {
369 .start = AT91SAM9260_BASE_SDRAMC,
370 .end = AT91SAM9260_BASE_SDRAMC + SZ_512 - 1,
371 .flags = IORESOURCE_MEM,
372 },
373};
374
375static struct platform_device rstc_device = {
376 .name = "at91-sam9260-reset",
377 .resource = rstc_resources,
378 .num_resources = ARRAY_SIZE(rstc_resources),
379};
380
381static struct resource shdwc_resources[] = {
382 [0] = {
383 .start = AT91SAM9260_BASE_SHDWC,
384 .end = AT91SAM9260_BASE_SHDWC + SZ_16 - 1,
385 .flags = IORESOURCE_MEM,
386 },
387};
388
389static struct platform_device shdwc_device = {
390 .name = "at91-poweroff",
391 .resource = shdwc_resources,
392 .num_resources = ARRAY_SIZE(shdwc_resources),
393};
394
395static void __init at91sam9260_register_devices(void)
396{
397 platform_device_register(&rstc_device);
398 platform_device_register(&shdwc_device);
399}
400
365/* -------------------------------------------------------------------- 401/* --------------------------------------------------------------------
366 * Interrupt initialization 402 * Interrupt initialization
367 * -------------------------------------------------------------------- */ 403 * -------------------------------------------------------------------- */
@@ -404,6 +440,11 @@ static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = {
404 0, /* Advanced Interrupt Controller */ 440 0, /* Advanced Interrupt Controller */
405}; 441};
406 442
443static void __init at91sam9260_init_time(void)
444{
445 at91sam926x_pit_init(NR_IRQS_LEGACY + AT91_ID_SYS);
446}
447
407AT91_SOC_START(at91sam9260) 448AT91_SOC_START(at91sam9260)
408 .map_io = at91sam9260_map_io, 449 .map_io = at91sam9260_map_io,
409 .default_irq_priority = at91sam9260_default_irq_priority, 450 .default_irq_priority = at91sam9260_default_irq_priority,
@@ -411,5 +452,7 @@ AT91_SOC_START(at91sam9260)
411 | (1 << AT91SAM9260_ID_IRQ2), 452 | (1 << AT91SAM9260_ID_IRQ2),
412 .ioremap_registers = at91sam9260_ioremap_registers, 453 .ioremap_registers = at91sam9260_ioremap_registers,
413 .register_clocks = at91sam9260_register_clocks, 454 .register_clocks = at91sam9260_register_clocks,
455 .register_devices = at91sam9260_register_devices,
414 .init = at91sam9260_initialize, 456 .init = at91sam9260_initialize,
457 .init_time = at91sam9260_init_time,
415AT91_SOC_END 458AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index fb164a5d04a9..a8bd35963332 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -11,6 +11,7 @@
11 */ 11 */
12 12
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/platform_device.h>
14#include <linux/clk/at91_pmc.h> 15#include <linux/clk/at91_pmc.h>
15 16
16#include <asm/proc-fns.h> 17#include <asm/proc-fns.h>
@@ -23,7 +24,6 @@
23#include <mach/hardware.h> 24#include <mach/hardware.h>
24 25
25#include "at91_aic.h" 26#include "at91_aic.h"
26#include "at91_rstc.h"
27#include "soc.h" 27#include "soc.h"
28#include "generic.h" 28#include "generic.h"
29#include "sam9_smc.h" 29#include "sam9_smc.h"
@@ -301,8 +301,6 @@ static void __init at91sam9261_map_io(void)
301 301
302static void __init at91sam9261_ioremap_registers(void) 302static void __init at91sam9261_ioremap_registers(void)
303{ 303{
304 at91_ioremap_shdwc(AT91SAM9261_BASE_SHDWC);
305 at91_ioremap_rstc(AT91SAM9261_BASE_RSTC);
306 at91_ioremap_ramc(0, AT91SAM9261_BASE_SDRAMC, 512); 304 at91_ioremap_ramc(0, AT91SAM9261_BASE_SDRAMC, 512);
307 at91sam926x_ioremap_pit(AT91SAM9261_BASE_PIT); 305 at91sam926x_ioremap_pit(AT91SAM9261_BASE_PIT);
308 at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC); 306 at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC);
@@ -313,7 +311,6 @@ static void __init at91sam9261_ioremap_registers(void)
313static void __init at91sam9261_initialize(void) 311static void __init at91sam9261_initialize(void)
314{ 312{
315 arm_pm_idle = at91sam9_idle; 313 arm_pm_idle = at91sam9_idle;
316 arm_pm_restart = at91sam9_alt_restart;
317 314
318 at91_sysirq_mask_rtt(AT91SAM9261_BASE_RTT); 315 at91_sysirq_mask_rtt(AT91SAM9261_BASE_RTT);
319 316
@@ -321,6 +318,45 @@ static void __init at91sam9261_initialize(void)
321 at91_gpio_init(at91sam9261_gpio, 3); 318 at91_gpio_init(at91sam9261_gpio, 3);
322} 319}
323 320
321static struct resource rstc_resources[] = {
322 [0] = {
323 .start = AT91SAM9261_BASE_RSTC,
324 .end = AT91SAM9261_BASE_RSTC + SZ_16 - 1,
325 .flags = IORESOURCE_MEM,
326 },
327 [1] = {
328 .start = AT91SAM9261_BASE_SDRAMC,
329 .end = AT91SAM9261_BASE_SDRAMC + SZ_512 - 1,
330 .flags = IORESOURCE_MEM,
331 },
332};
333
334static struct platform_device rstc_device = {
335 .name = "at91-sam9260-reset",
336 .resource = rstc_resources,
337 .num_resources = ARRAY_SIZE(rstc_resources),
338};
339
340static struct resource shdwc_resources[] = {
341 [0] = {
342 .start = AT91SAM9261_BASE_SHDWC,
343 .end = AT91SAM9261_BASE_SHDWC + SZ_16 - 1,
344 .flags = IORESOURCE_MEM,
345 },
346};
347
348static struct platform_device shdwc_device = {
349 .name = "at91-poweroff",
350 .resource = shdwc_resources,
351 .num_resources = ARRAY_SIZE(shdwc_resources),
352};
353
354static void __init at91sam9261_register_devices(void)
355{
356 platform_device_register(&rstc_device);
357 platform_device_register(&shdwc_device);
358}
359
324/* -------------------------------------------------------------------- 360/* --------------------------------------------------------------------
325 * Interrupt initialization 361 * Interrupt initialization
326 * -------------------------------------------------------------------- */ 362 * -------------------------------------------------------------------- */
@@ -363,6 +399,11 @@ static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = {
363 0, /* Advanced Interrupt Controller */ 399 0, /* Advanced Interrupt Controller */
364}; 400};
365 401
402static void __init at91sam9261_init_time(void)
403{
404 at91sam926x_pit_init(NR_IRQS_LEGACY + AT91_ID_SYS);
405}
406
366AT91_SOC_START(at91sam9261) 407AT91_SOC_START(at91sam9261)
367 .map_io = at91sam9261_map_io, 408 .map_io = at91sam9261_map_io,
368 .default_irq_priority = at91sam9261_default_irq_priority, 409 .default_irq_priority = at91sam9261_default_irq_priority,
@@ -370,5 +411,7 @@ AT91_SOC_START(at91sam9261)
370 | (1 << AT91SAM9261_ID_IRQ2), 411 | (1 << AT91SAM9261_ID_IRQ2),
371 .ioremap_registers = at91sam9261_ioremap_registers, 412 .ioremap_registers = at91sam9261_ioremap_registers,
372 .register_clocks = at91sam9261_register_clocks, 413 .register_clocks = at91sam9261_register_clocks,
414 .register_devices = at91sam9261_register_devices,
373 .init = at91sam9261_initialize, 415 .init = at91sam9261_initialize,
416 .init_time = at91sam9261_init_time,
374AT91_SOC_END 417AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index 810fa5f15a51..fbff228cc63e 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -11,6 +11,7 @@
11 */ 11 */
12 12
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/platform_device.h>
14#include <linux/clk/at91_pmc.h> 15#include <linux/clk/at91_pmc.h>
15 16
16#include <asm/proc-fns.h> 17#include <asm/proc-fns.h>
@@ -22,7 +23,6 @@
22#include <mach/hardware.h> 23#include <mach/hardware.h>
23 24
24#include "at91_aic.h" 25#include "at91_aic.h"
25#include "at91_rstc.h"
26#include "soc.h" 26#include "soc.h"
27#include "generic.h" 27#include "generic.h"
28#include "sam9_smc.h" 28#include "sam9_smc.h"
@@ -321,8 +321,6 @@ static void __init at91sam9263_map_io(void)
321 321
322static void __init at91sam9263_ioremap_registers(void) 322static void __init at91sam9263_ioremap_registers(void)
323{ 323{
324 at91_ioremap_shdwc(AT91SAM9263_BASE_SHDWC);
325 at91_ioremap_rstc(AT91SAM9263_BASE_RSTC);
326 at91_ioremap_ramc(0, AT91SAM9263_BASE_SDRAMC0, 512); 324 at91_ioremap_ramc(0, AT91SAM9263_BASE_SDRAMC0, 512);
327 at91_ioremap_ramc(1, AT91SAM9263_BASE_SDRAMC1, 512); 325 at91_ioremap_ramc(1, AT91SAM9263_BASE_SDRAMC1, 512);
328 at91sam926x_ioremap_pit(AT91SAM9263_BASE_PIT); 326 at91sam926x_ioremap_pit(AT91SAM9263_BASE_PIT);
@@ -335,7 +333,6 @@ static void __init at91sam9263_ioremap_registers(void)
335static void __init at91sam9263_initialize(void) 333static void __init at91sam9263_initialize(void)
336{ 334{
337 arm_pm_idle = at91sam9_idle; 335 arm_pm_idle = at91sam9_idle;
338 arm_pm_restart = at91sam9_alt_restart;
339 336
340 at91_sysirq_mask_rtt(AT91SAM9263_BASE_RTT0); 337 at91_sysirq_mask_rtt(AT91SAM9263_BASE_RTT0);
341 at91_sysirq_mask_rtt(AT91SAM9263_BASE_RTT1); 338 at91_sysirq_mask_rtt(AT91SAM9263_BASE_RTT1);
@@ -344,6 +341,45 @@ static void __init at91sam9263_initialize(void)
344 at91_gpio_init(at91sam9263_gpio, 5); 341 at91_gpio_init(at91sam9263_gpio, 5);
345} 342}
346 343
344static struct resource rstc_resources[] = {
345 [0] = {
346 .start = AT91SAM9263_BASE_RSTC,
347 .end = AT91SAM9263_BASE_RSTC + SZ_16 - 1,
348 .flags = IORESOURCE_MEM,
349 },
350 [1] = {
351 .start = AT91SAM9263_BASE_SDRAMC0,
352 .end = AT91SAM9263_BASE_SDRAMC0 + SZ_512 - 1,
353 .flags = IORESOURCE_MEM,
354 },
355};
356
357static struct platform_device rstc_device = {
358 .name = "at91-sam9260-reset",
359 .resource = rstc_resources,
360 .num_resources = ARRAY_SIZE(rstc_resources),
361};
362
363static struct resource shdwc_resources[] = {
364 [0] = {
365 .start = AT91SAM9263_BASE_SHDWC,
366 .end = AT91SAM9263_BASE_SHDWC + SZ_16 - 1,
367 .flags = IORESOURCE_MEM,
368 },
369};
370
371static struct platform_device shdwc_device = {
372 .name = "at91-poweroff",
373 .resource = shdwc_resources,
374 .num_resources = ARRAY_SIZE(shdwc_resources),
375};
376
377static void __init at91sam9263_register_devices(void)
378{
379 platform_device_register(&rstc_device);
380 platform_device_register(&shdwc_device);
381}
382
347/* -------------------------------------------------------------------- 383/* --------------------------------------------------------------------
348 * Interrupt initialization 384 * Interrupt initialization
349 * -------------------------------------------------------------------- */ 385 * -------------------------------------------------------------------- */
@@ -386,11 +422,18 @@ static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = {
386 0, /* Advanced Interrupt Controller (IRQ1) */ 422 0, /* Advanced Interrupt Controller (IRQ1) */
387}; 423};
388 424
425static void __init at91sam9263_init_time(void)
426{
427 at91sam926x_pit_init(NR_IRQS_LEGACY + AT91_ID_SYS);
428}
429
389AT91_SOC_START(at91sam9263) 430AT91_SOC_START(at91sam9263)
390 .map_io = at91sam9263_map_io, 431 .map_io = at91sam9263_map_io,
391 .default_irq_priority = at91sam9263_default_irq_priority, 432 .default_irq_priority = at91sam9263_default_irq_priority,
392 .extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1), 433 .extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1),
393 .ioremap_registers = at91sam9263_ioremap_registers, 434 .ioremap_registers = at91sam9263_ioremap_registers,
394 .register_clocks = at91sam9263_register_clocks, 435 .register_clocks = at91sam9263_register_clocks,
436 .register_devices = at91sam9263_register_devices,
395 .init = at91sam9263_initialize, 437 .init = at91sam9263_initialize,
438 .init_time = at91sam9263_init_time,
396AT91_SOC_END 439AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91sam926x_time.c b/arch/arm/mach-at91/at91sam926x_time.c
deleted file mode 100644
index 0a9e2fc8f796..000000000000
--- a/arch/arm/mach-at91/at91sam926x_time.c
+++ /dev/null
@@ -1,294 +0,0 @@
1/*
2 * at91sam926x_time.c - Periodic Interval Timer (PIT) for at91sam926x
3 *
4 * Copyright (C) 2005-2006 M. Amine SAYA, ATMEL Rousset, France
5 * Revision 2005 M. Nicolas Diremdjian, ATMEL Rousset, France
6 * Converted to ClockSource/ClockEvents by David Brownell.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12#include <linux/interrupt.h>
13#include <linux/irq.h>
14#include <linux/kernel.h>
15#include <linux/clk.h>
16#include <linux/clockchips.h>
17#include <linux/of.h>
18#include <linux/of_address.h>
19#include <linux/of_irq.h>
20
21#include <asm/mach/time.h>
22#include <mach/hardware.h>
23
24#define AT91_PIT_MR 0x00 /* Mode Register */
25#define AT91_PIT_PITIEN (1 << 25) /* Timer Interrupt Enable */
26#define AT91_PIT_PITEN (1 << 24) /* Timer Enabled */
27#define AT91_PIT_PIV (0xfffff) /* Periodic Interval Value */
28
29#define AT91_PIT_SR 0x04 /* Status Register */
30#define AT91_PIT_PITS (1 << 0) /* Timer Status */
31
32#define AT91_PIT_PIVR 0x08 /* Periodic Interval Value Register */
33#define AT91_PIT_PIIR 0x0c /* Periodic Interval Image Register */
34#define AT91_PIT_PICNT (0xfff << 20) /* Interval Counter */
35#define AT91_PIT_CPIV (0xfffff) /* Inverval Value */
36
37#define PIT_CPIV(x) ((x) & AT91_PIT_CPIV)
38#define PIT_PICNT(x) (((x) & AT91_PIT_PICNT) >> 20)
39
40static u32 pit_cycle; /* write-once */
41static u32 pit_cnt; /* access only w/system irq blocked */
42static void __iomem *pit_base_addr __read_mostly;
43static struct clk *mck;
44
45static inline unsigned int pit_read(unsigned int reg_offset)
46{
47 return __raw_readl(pit_base_addr + reg_offset);
48}
49
50static inline void pit_write(unsigned int reg_offset, unsigned long value)
51{
52 __raw_writel(value, pit_base_addr + reg_offset);
53}
54
55/*
56 * Clocksource: just a monotonic counter of MCK/16 cycles.
57 * We don't care whether or not PIT irqs are enabled.
58 */
59static cycle_t read_pit_clk(struct clocksource *cs)
60{
61 unsigned long flags;
62 u32 elapsed;
63 u32 t;
64
65 raw_local_irq_save(flags);
66 elapsed = pit_cnt;
67 t = pit_read(AT91_PIT_PIIR);
68 raw_local_irq_restore(flags);
69
70 elapsed += PIT_PICNT(t) * pit_cycle;
71 elapsed += PIT_CPIV(t);
72 return elapsed;
73}
74
75static struct clocksource pit_clk = {
76 .name = "pit",
77 .rating = 175,
78 .read = read_pit_clk,
79 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
80};
81
82
83/*
84 * Clockevent device: interrupts every 1/HZ (== pit_cycles * MCK/16)
85 */
86static void
87pit_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev)
88{
89 switch (mode) {
90 case CLOCK_EVT_MODE_PERIODIC:
91 /* update clocksource counter */
92 pit_cnt += pit_cycle * PIT_PICNT(pit_read(AT91_PIT_PIVR));
93 pit_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN
94 | AT91_PIT_PITIEN);
95 break;
96 case CLOCK_EVT_MODE_ONESHOT:
97 BUG();
98 /* FALLTHROUGH */
99 case CLOCK_EVT_MODE_SHUTDOWN:
100 case CLOCK_EVT_MODE_UNUSED:
101 /* disable irq, leaving the clocksource active */
102 pit_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN);
103 break;
104 case CLOCK_EVT_MODE_RESUME:
105 break;
106 }
107}
108
109static void at91sam926x_pit_suspend(struct clock_event_device *cedev)
110{
111 /* Disable timer */
112 pit_write(AT91_PIT_MR, 0);
113}
114
115static void at91sam926x_pit_reset(void)
116{
117 /* Disable timer and irqs */
118 pit_write(AT91_PIT_MR, 0);
119
120 /* Clear any pending interrupts, wait for PIT to stop counting */
121 while (PIT_CPIV(pit_read(AT91_PIT_PIVR)) != 0)
122 cpu_relax();
123
124 /* Start PIT but don't enable IRQ */
125 pit_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN);
126}
127
128static void at91sam926x_pit_resume(struct clock_event_device *cedev)
129{
130 at91sam926x_pit_reset();
131}
132
133static struct clock_event_device pit_clkevt = {
134 .name = "pit",
135 .features = CLOCK_EVT_FEAT_PERIODIC,
136 .shift = 32,
137 .rating = 100,
138 .set_mode = pit_clkevt_mode,
139 .suspend = at91sam926x_pit_suspend,
140 .resume = at91sam926x_pit_resume,
141};
142
143
144/*
145 * IRQ handler for the timer.
146 */
147static irqreturn_t at91sam926x_pit_interrupt(int irq, void *dev_id)
148{
149 /*
150 * irqs should be disabled here, but as the irq is shared they are only
151 * guaranteed to be off if the timer irq is registered first.
152 */
153 WARN_ON_ONCE(!irqs_disabled());
154
155 /* The PIT interrupt may be disabled, and is shared */
156 if ((pit_clkevt.mode == CLOCK_EVT_MODE_PERIODIC)
157 && (pit_read(AT91_PIT_SR) & AT91_PIT_PITS)) {
158 unsigned nr_ticks;
159
160 /* Get number of ticks performed before irq, and ack it */
161 nr_ticks = PIT_PICNT(pit_read(AT91_PIT_PIVR));
162 do {
163 pit_cnt += pit_cycle;
164 pit_clkevt.event_handler(&pit_clkevt);
165 nr_ticks--;
166 } while (nr_ticks);
167
168 return IRQ_HANDLED;
169 }
170
171 return IRQ_NONE;
172}
173
174static struct irqaction at91sam926x_pit_irq = {
175 .name = "at91_tick",
176 .flags = IRQF_SHARED | IRQF_TIMER | IRQF_IRQPOLL,
177 .handler = at91sam926x_pit_interrupt,
178 .irq = NR_IRQS_LEGACY + AT91_ID_SYS,
179};
180
181#ifdef CONFIG_OF
182static struct of_device_id pit_timer_ids[] = {
183 { .compatible = "atmel,at91sam9260-pit" },
184 { /* sentinel */ }
185};
186
187static int __init of_at91sam926x_pit_init(void)
188{
189 struct device_node *np;
190 int ret;
191
192 np = of_find_matching_node(NULL, pit_timer_ids);
193 if (!np)
194 goto err;
195
196 pit_base_addr = of_iomap(np, 0);
197 if (!pit_base_addr)
198 goto node_err;
199
200 mck = of_clk_get(np, 0);
201
202 /* Get the interrupts property */
203 ret = irq_of_parse_and_map(np, 0);
204 if (!ret) {
205 pr_crit("AT91: PIT: Unable to get IRQ from DT\n");
206 if (!IS_ERR(mck))
207 clk_put(mck);
208 goto ioremap_err;
209 }
210 at91sam926x_pit_irq.irq = ret;
211
212 of_node_put(np);
213
214 return 0;
215
216ioremap_err:
217 iounmap(pit_base_addr);
218node_err:
219 of_node_put(np);
220err:
221 return -EINVAL;
222}
223#else
224static int __init of_at91sam926x_pit_init(void)
225{
226 return -EINVAL;
227}
228#endif
229
230/*
231 * Set up both clocksource and clockevent support.
232 */
233void __init at91sam926x_pit_init(void)
234{
235 unsigned long pit_rate;
236 unsigned bits;
237 int ret;
238
239 mck = ERR_PTR(-ENOENT);
240
241 /* For device tree enabled device: initialize here */
242 of_at91sam926x_pit_init();
243
244 /*
245 * Use our actual MCK to figure out how many MCK/16 ticks per
246 * 1/HZ period (instead of a compile-time constant LATCH).
247 */
248 if (IS_ERR(mck))
249 mck = clk_get(NULL, "mck");
250
251 if (IS_ERR(mck))
252 panic("AT91: PIT: Unable to get mck clk\n");
253 pit_rate = clk_get_rate(mck) / 16;
254 pit_cycle = (pit_rate + HZ/2) / HZ;
255 WARN_ON(((pit_cycle - 1) & ~AT91_PIT_PIV) != 0);
256
257 /* Initialize and enable the timer */
258 at91sam926x_pit_reset();
259
260 /*
261 * Register clocksource. The high order bits of PIV are unused,
262 * so this isn't a 32-bit counter unless we get clockevent irqs.
263 */
264 bits = 12 /* PICNT */ + ilog2(pit_cycle) /* PIV */;
265 pit_clk.mask = CLOCKSOURCE_MASK(bits);
266 clocksource_register_hz(&pit_clk, pit_rate);
267
268 /* Set up irq handler */
269 ret = setup_irq(at91sam926x_pit_irq.irq, &at91sam926x_pit_irq);
270 if (ret)
271 pr_crit("AT91: PIT: Unable to setup IRQ\n");
272
273 /* Set up and register clockevents */
274 pit_clkevt.mult = div_sc(pit_rate, NSEC_PER_SEC, pit_clkevt.shift);
275 pit_clkevt.cpumask = cpumask_of(0);
276 clockevents_register_device(&pit_clkevt);
277}
278
279void __init at91sam926x_ioremap_pit(u32 addr)
280{
281#if defined(CONFIG_OF)
282 struct device_node *np =
283 of_find_matching_node(NULL, pit_timer_ids);
284
285 if (np) {
286 of_node_put(np);
287 return;
288 }
289#endif
290 pit_base_addr = ioremap(addr, 16);
291
292 if (!pit_base_addr)
293 panic("Impossible to ioremap PIT\n");
294}
diff --git a/arch/arm/mach-at91/at91sam9_alt_reset.S b/arch/arm/mach-at91/at91sam9_alt_reset.S
deleted file mode 100644
index f039538d3bdb..000000000000
--- a/arch/arm/mach-at91/at91sam9_alt_reset.S
+++ /dev/null
@@ -1,40 +0,0 @@
1/*
2 * reset AT91SAM9G20 as per errata
3 *
4 * (C) BitBox Ltd 2010
5 *
6 * unless the SDRAM is cleanly shutdown before we hit the
7 * reset register it can be left driving the data bus and
8 * killing the chance of a subsequent boot from NAND
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 */
15
16#include <linux/linkage.h>
17#include <mach/hardware.h>
18#include <mach/at91_ramc.h>
19#include "at91_rstc.h"
20
21 .arm
22
23 .globl at91sam9_alt_restart
24
25at91sam9_alt_restart: ldr r0, =at91_ramc_base @ preload constants
26 ldr r0, [r0]
27 ldr r4, =at91_rstc_base
28 ldr r1, [r4]
29
30 mov r2, #1
31 mov r3, #AT91_SDRAMC_LPCB_POWER_DOWN
32 ldr r4, =AT91_RSTC_KEY | AT91_RSTC_PERRST | AT91_RSTC_PROCRST
33
34 .balign 32 @ align to cache line
35
36 str r2, [r0, #AT91_SDRAMC_TR] @ disable SDRAM access
37 str r3, [r0, #AT91_SDRAMC_LPR] @ power down SDRAM
38 str r4, [r1, #AT91_RSTC_CR] @ reset processor
39
40 b .
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 9d45496e4932..405427ec05f8 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -13,6 +13,7 @@
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/dma-mapping.h> 14#include <linux/dma-mapping.h>
15#include <linux/clk/at91_pmc.h> 15#include <linux/clk/at91_pmc.h>
16#include <linux/platform_device.h>
16 17
17#include <asm/irq.h> 18#include <asm/irq.h>
18#include <asm/mach/arch.h> 19#include <asm/mach/arch.h>
@@ -371,8 +372,6 @@ static void __init at91sam9g45_map_io(void)
371 372
372static void __init at91sam9g45_ioremap_registers(void) 373static void __init at91sam9g45_ioremap_registers(void)
373{ 374{
374 at91_ioremap_shdwc(AT91SAM9G45_BASE_SHDWC);
375 at91_ioremap_rstc(AT91SAM9G45_BASE_RSTC);
376 at91_ioremap_ramc(0, AT91SAM9G45_BASE_DDRSDRC1, 512); 375 at91_ioremap_ramc(0, AT91SAM9G45_BASE_DDRSDRC1, 512);
377 at91_ioremap_ramc(1, AT91SAM9G45_BASE_DDRSDRC0, 512); 376 at91_ioremap_ramc(1, AT91SAM9G45_BASE_DDRSDRC0, 512);
378 at91sam926x_ioremap_pit(AT91SAM9G45_BASE_PIT); 377 at91sam926x_ioremap_pit(AT91SAM9G45_BASE_PIT);
@@ -384,7 +383,6 @@ static void __init at91sam9g45_ioremap_registers(void)
384static void __init at91sam9g45_initialize(void) 383static void __init at91sam9g45_initialize(void)
385{ 384{
386 arm_pm_idle = at91sam9_idle; 385 arm_pm_idle = at91sam9_idle;
387 arm_pm_restart = at91sam9g45_restart;
388 386
389 at91_sysirq_mask_rtc(AT91SAM9G45_BASE_RTC); 387 at91_sysirq_mask_rtc(AT91SAM9G45_BASE_RTC);
390 at91_sysirq_mask_rtt(AT91SAM9G45_BASE_RTT); 388 at91_sysirq_mask_rtt(AT91SAM9G45_BASE_RTT);
@@ -393,6 +391,50 @@ static void __init at91sam9g45_initialize(void)
393 at91_gpio_init(at91sam9g45_gpio, 5); 391 at91_gpio_init(at91sam9g45_gpio, 5);
394} 392}
395 393
394static struct resource rstc_resources[] = {
395 [0] = {
396 .start = AT91SAM9G45_BASE_RSTC,
397 .end = AT91SAM9G45_BASE_RSTC + SZ_16 - 1,
398 .flags = IORESOURCE_MEM,
399 },
400 [1] = {
401 .start = AT91SAM9G45_BASE_DDRSDRC1,
402 .end = AT91SAM9G45_BASE_DDRSDRC1 + SZ_512 - 1,
403 .flags = IORESOURCE_MEM,
404 },
405 [2] = {
406 .start = AT91SAM9G45_BASE_DDRSDRC0,
407 .end = AT91SAM9G45_BASE_DDRSDRC0 + SZ_512 - 1,
408 .flags = IORESOURCE_MEM,
409 },
410};
411
412static struct platform_device rstc_device = {
413 .name = "at91-sam9g45-reset",
414 .resource = rstc_resources,
415 .num_resources = ARRAY_SIZE(rstc_resources),
416};
417
418static struct resource shdwc_resources[] = {
419 [0] = {
420 .start = AT91SAM9G45_BASE_SHDWC,
421 .end = AT91SAM9G45_BASE_SHDWC + SZ_16 - 1,
422 .flags = IORESOURCE_MEM,
423 },
424};
425
426static struct platform_device shdwc_device = {
427 .name = "at91-poweroff",
428 .resource = shdwc_resources,
429 .num_resources = ARRAY_SIZE(shdwc_resources),
430};
431
432static void __init at91sam9g45_register_devices(void)
433{
434 platform_device_register(&rstc_device);
435 platform_device_register(&shdwc_device);
436}
437
396/* -------------------------------------------------------------------- 438/* --------------------------------------------------------------------
397 * Interrupt initialization 439 * Interrupt initialization
398 * -------------------------------------------------------------------- */ 440 * -------------------------------------------------------------------- */
@@ -435,11 +477,18 @@ static unsigned int at91sam9g45_default_irq_priority[NR_AIC_IRQS] __initdata = {
435 0, /* Advanced Interrupt Controller (IRQ0) */ 477 0, /* Advanced Interrupt Controller (IRQ0) */
436}; 478};
437 479
480static void __init at91sam9g45_init_time(void)
481{
482 at91sam926x_pit_init(NR_IRQS_LEGACY + AT91_ID_SYS);
483}
484
438AT91_SOC_START(at91sam9g45) 485AT91_SOC_START(at91sam9g45)
439 .map_io = at91sam9g45_map_io, 486 .map_io = at91sam9g45_map_io,
440 .default_irq_priority = at91sam9g45_default_irq_priority, 487 .default_irq_priority = at91sam9g45_default_irq_priority,
441 .extern_irq = (1 << AT91SAM9G45_ID_IRQ0), 488 .extern_irq = (1 << AT91SAM9G45_ID_IRQ0),
442 .ioremap_registers = at91sam9g45_ioremap_registers, 489 .ioremap_registers = at91sam9g45_ioremap_registers,
443 .register_clocks = at91sam9g45_register_clocks, 490 .register_clocks = at91sam9g45_register_clocks,
491 .register_devices = at91sam9g45_register_devices,
444 .init = at91sam9g45_initialize, 492 .init = at91sam9g45_initialize,
493 .init_time = at91sam9g45_init_time,
445AT91_SOC_END 494AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91sam9g45_reset.S b/arch/arm/mach-at91/at91sam9g45_reset.S
deleted file mode 100644
index c40c1e2ef80f..000000000000
--- a/arch/arm/mach-at91/at91sam9g45_reset.S
+++ /dev/null
@@ -1,45 +0,0 @@
1/*
2 * reset AT91SAM9G45 as per errata
3 *
4 * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcosoft.com>
5 *
6 * unless the SDRAM is cleanly shutdown before we hit the
7 * reset register it can be left driving the data bus and
8 * killing the chance of a subsequent boot from NAND
9 *
10 * GPLv2 Only
11 */
12
13#include <linux/linkage.h>
14#include <mach/hardware.h>
15#include <mach/at91_ramc.h>
16#include "at91_rstc.h"
17 .arm
18
19/*
20 * at91_ramc_base is an array void*
21 * init at NULL if only one DDR controler is present in or DT
22 */
23 .globl at91sam9g45_restart
24
25at91sam9g45_restart:
26 ldr r5, =at91_ramc_base @ preload constants
27 ldr r0, [r5]
28 ldr r5, [r5, #4] @ ddr1
29 cmp r5, #0
30 ldr r4, =at91_rstc_base
31 ldr r1, [r4]
32
33 mov r2, #1
34 mov r3, #AT91_DDRSDRC_LPCB_POWER_DOWN
35 ldr r4, =AT91_RSTC_KEY | AT91_RSTC_PERRST | AT91_RSTC_PROCRST
36
37 .balign 32 @ align to cache line
38
39 strne r2, [r5, #AT91_DDRSDRC_RTR] @ disable DDR1 access
40 strne r3, [r5, #AT91_DDRSDRC_LPR] @ power down DDR1
41 str r2, [r0, #AT91_DDRSDRC_RTR] @ disable DDR0 access
42 str r3, [r0, #AT91_DDRSDRC_LPR] @ power down DDR0
43 str r4, [r1, #AT91_RSTC_CR] @ reset processor
44
45 b .
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index 878d5015daab..f553e4ea034b 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -10,6 +10,7 @@
10 */ 10 */
11 11
12#include <linux/module.h> 12#include <linux/module.h>
13#include <linux/platform_device.h>
13#include <linux/clk/at91_pmc.h> 14#include <linux/clk/at91_pmc.h>
14 15
15#include <asm/proc-fns.h> 16#include <asm/proc-fns.h>
@@ -23,7 +24,6 @@
23#include <mach/hardware.h> 24#include <mach/hardware.h>
24 25
25#include "at91_aic.h" 26#include "at91_aic.h"
26#include "at91_rstc.h"
27#include "soc.h" 27#include "soc.h"
28#include "generic.h" 28#include "generic.h"
29#include "sam9_smc.h" 29#include "sam9_smc.h"
@@ -311,8 +311,6 @@ static void __init at91sam9rl_map_io(void)
311 311
312static void __init at91sam9rl_ioremap_registers(void) 312static void __init at91sam9rl_ioremap_registers(void)
313{ 313{
314 at91_ioremap_shdwc(AT91SAM9RL_BASE_SHDWC);
315 at91_ioremap_rstc(AT91SAM9RL_BASE_RSTC);
316 at91_ioremap_ramc(0, AT91SAM9RL_BASE_SDRAMC, 512); 314 at91_ioremap_ramc(0, AT91SAM9RL_BASE_SDRAMC, 512);
317 at91sam926x_ioremap_pit(AT91SAM9RL_BASE_PIT); 315 at91sam926x_ioremap_pit(AT91SAM9RL_BASE_PIT);
318 at91sam9_ioremap_smc(0, AT91SAM9RL_BASE_SMC); 316 at91sam9_ioremap_smc(0, AT91SAM9RL_BASE_SMC);
@@ -323,7 +321,6 @@ static void __init at91sam9rl_ioremap_registers(void)
323static void __init at91sam9rl_initialize(void) 321static void __init at91sam9rl_initialize(void)
324{ 322{
325 arm_pm_idle = at91sam9_idle; 323 arm_pm_idle = at91sam9_idle;
326 arm_pm_restart = at91sam9_alt_restart;
327 324
328 at91_sysirq_mask_rtc(AT91SAM9RL_BASE_RTC); 325 at91_sysirq_mask_rtc(AT91SAM9RL_BASE_RTC);
329 at91_sysirq_mask_rtt(AT91SAM9RL_BASE_RTT); 326 at91_sysirq_mask_rtt(AT91SAM9RL_BASE_RTT);
@@ -332,6 +329,45 @@ static void __init at91sam9rl_initialize(void)
332 at91_gpio_init(at91sam9rl_gpio, 4); 329 at91_gpio_init(at91sam9rl_gpio, 4);
333} 330}
334 331
332static struct resource rstc_resources[] = {
333 [0] = {
334 .start = AT91SAM9RL_BASE_RSTC,
335 .end = AT91SAM9RL_BASE_RSTC + SZ_16 - 1,
336 .flags = IORESOURCE_MEM,
337 },
338 [1] = {
339 .start = AT91SAM9RL_BASE_SDRAMC,
340 .end = AT91SAM9RL_BASE_SDRAMC + SZ_512 - 1,
341 .flags = IORESOURCE_MEM,
342 },
343};
344
345static struct platform_device rstc_device = {
346 .name = "at91-sam9260-reset",
347 .resource = rstc_resources,
348 .num_resources = ARRAY_SIZE(rstc_resources),
349};
350
351static struct resource shdwc_resources[] = {
352 [0] = {
353 .start = AT91SAM9RL_BASE_SHDWC,
354 .end = AT91SAM9RL_BASE_SHDWC + SZ_16 - 1,
355 .flags = IORESOURCE_MEM,
356 },
357};
358
359static struct platform_device shdwc_device = {
360 .name = "at91-poweroff",
361 .resource = shdwc_resources,
362 .num_resources = ARRAY_SIZE(shdwc_resources),
363};
364
365static void __init at91sam9rl_register_devices(void)
366{
367 platform_device_register(&rstc_device);
368 platform_device_register(&shdwc_device);
369}
370
335/* -------------------------------------------------------------------- 371/* --------------------------------------------------------------------
336 * Interrupt initialization 372 * Interrupt initialization
337 * -------------------------------------------------------------------- */ 373 * -------------------------------------------------------------------- */
@@ -374,6 +410,11 @@ static unsigned int at91sam9rl_default_irq_priority[NR_AIC_IRQS] __initdata = {
374 0, /* Advanced Interrupt Controller */ 410 0, /* Advanced Interrupt Controller */
375}; 411};
376 412
413static void __init at91sam9rl_init_time(void)
414{
415 at91sam926x_pit_init(NR_IRQS_LEGACY + AT91_ID_SYS);
416}
417
377AT91_SOC_START(at91sam9rl) 418AT91_SOC_START(at91sam9rl)
378 .map_io = at91sam9rl_map_io, 419 .map_io = at91sam9rl_map_io,
379 .default_irq_priority = at91sam9rl_default_irq_priority, 420 .default_irq_priority = at91sam9rl_default_irq_priority,
@@ -382,5 +423,7 @@ AT91_SOC_START(at91sam9rl)
382#if defined(CONFIG_OLD_CLK_AT91) 423#if defined(CONFIG_OLD_CLK_AT91)
383 .register_clocks = at91sam9rl_register_clocks, 424 .register_clocks = at91sam9rl_register_clocks,
384#endif 425#endif
426 .register_devices = at91sam9rl_register_devices,
385 .init = at91sam9rl_initialize, 427 .init = at91sam9rl_initialize,
428 .init_time = at91sam9rl_init_time,
386AT91_SOC_END 429AT91_SOC_END
diff --git a/arch/arm/mach-at91/board-afeb-9260v1.c b/arch/arm/mach-at91/board-afeb-9260v1.c
index 597c649170aa..e76e35ce81e7 100644
--- a/arch/arm/mach-at91/board-afeb-9260v1.c
+++ b/arch/arm/mach-at91/board-afeb-9260v1.c
@@ -167,6 +167,8 @@ static struct at91_cf_data afeb9260_cf_data = {
167 167
168static void __init afeb9260_board_init(void) 168static void __init afeb9260_board_init(void)
169{ 169{
170 at91_register_devices();
171
170 /* Serial */ 172 /* Serial */
171 /* DBGU on ttyS0. (Rx & Tx only) */ 173 /* DBGU on ttyS0. (Rx & Tx only) */
172 at91_register_uart(0, 0, 0); 174 at91_register_uart(0, 0, 0);
@@ -211,7 +213,7 @@ static void __init afeb9260_board_init(void)
211 213
212MACHINE_START(AFEB9260, "Custom afeb9260 board") 214MACHINE_START(AFEB9260, "Custom afeb9260 board")
213 /* Maintainer: Sergey Lapin <slapin@ossfans.org> */ 215 /* Maintainer: Sergey Lapin <slapin@ossfans.org> */
214 .init_time = at91sam926x_pit_init, 216 .init_time = at91_init_time,
215 .map_io = at91_map_io, 217 .map_io = at91_map_io,
216 .handle_irq = at91_aic_handle_irq, 218 .handle_irq = at91_aic_handle_irq,
217 .init_early = afeb9260_init_early, 219 .init_early = afeb9260_init_early,
diff --git a/arch/arm/mach-at91/board-cam60.c b/arch/arm/mach-at91/board-cam60.c
index a30502c8d379..ae827dd2d0d2 100644
--- a/arch/arm/mach-at91/board-cam60.c
+++ b/arch/arm/mach-at91/board-cam60.c
@@ -170,6 +170,8 @@ static void __init cam60_add_device_nand(void)
170 170
171static void __init cam60_board_init(void) 171static void __init cam60_board_init(void)
172{ 172{
173 at91_register_devices();
174
173 /* Serial */ 175 /* Serial */
174 /* DBGU on ttyS0. (Rx & Tx only) */ 176 /* DBGU on ttyS0. (Rx & Tx only) */
175 at91_register_uart(0, 0, 0); 177 at91_register_uart(0, 0, 0);
@@ -188,7 +190,7 @@ static void __init cam60_board_init(void)
188 190
189MACHINE_START(CAM60, "KwikByte CAM60") 191MACHINE_START(CAM60, "KwikByte CAM60")
190 /* Maintainer: KwikByte */ 192 /* Maintainer: KwikByte */
191 .init_time = at91sam926x_pit_init, 193 .init_time = at91_init_time,
192 .map_io = at91_map_io, 194 .map_io = at91_map_io,
193 .handle_irq = at91_aic_handle_irq, 195 .handle_irq = at91_aic_handle_irq,
194 .init_early = cam60_init_early, 196 .init_early = cam60_init_early,
diff --git a/arch/arm/mach-at91/board-cpu9krea.c b/arch/arm/mach-at91/board-cpu9krea.c
index 2037f78c84e7..731c8318f4f5 100644
--- a/arch/arm/mach-at91/board-cpu9krea.c
+++ b/arch/arm/mach-at91/board-cpu9krea.c
@@ -322,6 +322,8 @@ static struct mci_platform_data __initdata cpu9krea_mci0_data = {
322 322
323static void __init cpu9krea_board_init(void) 323static void __init cpu9krea_board_init(void)
324{ 324{
325 at91_register_devices();
326
325 /* NOR */ 327 /* NOR */
326 cpu9krea_add_device_nor(); 328 cpu9krea_add_device_nor();
327 /* Serial */ 329 /* Serial */
@@ -375,7 +377,7 @@ MACHINE_START(CPUAT9260, "Eukrea CPU9260")
375MACHINE_START(CPUAT9G20, "Eukrea CPU9G20") 377MACHINE_START(CPUAT9G20, "Eukrea CPU9G20")
376#endif 378#endif
377 /* Maintainer: Eric Benard - EUKREA Electromatique */ 379 /* Maintainer: Eric Benard - EUKREA Electromatique */
378 .init_time = at91sam926x_pit_init, 380 .init_time = at91_init_time,
379 .map_io = at91_map_io, 381 .map_io = at91_map_io,
380 .handle_irq = at91_aic_handle_irq, 382 .handle_irq = at91_aic_handle_irq,
381 .init_early = cpu9krea_init_early, 383 .init_early = cpu9krea_init_early,
diff --git a/arch/arm/mach-at91/board-dt-sam9.c b/arch/arm/mach-at91/board-dt-sam9.c
index dfa8d48146fe..d3048ccdc41f 100644
--- a/arch/arm/mach-at91/board-dt-sam9.c
+++ b/arch/arm/mach-at91/board-dt-sam9.c
@@ -25,15 +25,6 @@
25#include "board.h" 25#include "board.h"
26#include "generic.h" 26#include "generic.h"
27 27
28
29static void __init sam9_dt_timer_init(void)
30{
31#if defined(CONFIG_COMMON_CLK)
32 of_clk_init(NULL);
33#endif
34 at91sam926x_pit_init();
35}
36
37static const char *at91_dt_board_compat[] __initdata = { 28static const char *at91_dt_board_compat[] __initdata = {
38 "atmel,at91sam9", 29 "atmel,at91sam9",
39 NULL 30 NULL
@@ -41,7 +32,6 @@ static const char *at91_dt_board_compat[] __initdata = {
41 32
42DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM (Device Tree)") 33DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM (Device Tree)")
43 /* Maintainer: Atmel */ 34 /* Maintainer: Atmel */
44 .init_time = sam9_dt_timer_init,
45 .map_io = at91_map_io, 35 .map_io = at91_map_io,
46 .init_early = at91_dt_initialize, 36 .init_early = at91_dt_initialize,
47 .dt_compat = at91_dt_board_compat, 37 .dt_compat = at91_dt_board_compat,
diff --git a/arch/arm/mach-at91/board-dt-sama5.c b/arch/arm/mach-at91/board-dt-sama5.c
index 6a064e53f4d6..129e2917506b 100644
--- a/arch/arm/mach-at91/board-dt-sama5.c
+++ b/arch/arm/mach-at91/board-dt-sama5.c
@@ -27,14 +27,6 @@
27#include "at91_aic.h" 27#include "at91_aic.h"
28#include "generic.h" 28#include "generic.h"
29 29
30static void __init sama5_dt_timer_init(void)
31{
32#if defined(CONFIG_COMMON_CLK)
33 of_clk_init(NULL);
34#endif
35 at91sam926x_pit_init();
36}
37
38static void __init sama5_dt_device_init(void) 30static void __init sama5_dt_device_init(void)
39{ 31{
40 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 32 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
@@ -47,7 +39,6 @@ static const char *sama5_dt_board_compat[] __initconst = {
47 39
48DT_MACHINE_START(sama5_dt, "Atmel SAMA5 (Device Tree)") 40DT_MACHINE_START(sama5_dt, "Atmel SAMA5 (Device Tree)")
49 /* Maintainer: Atmel */ 41 /* Maintainer: Atmel */
50 .init_time = sama5_dt_timer_init,
51 .map_io = at91_map_io, 42 .map_io = at91_map_io,
52 .init_early = at91_dt_initialize, 43 .init_early = at91_dt_initialize,
53 .init_machine = sama5_dt_device_init, 44 .init_machine = sama5_dt_device_init,
diff --git a/arch/arm/mach-at91/board-flexibity.c b/arch/arm/mach-at91/board-flexibity.c
index 68f1ab6bd08f..a6aa4a2432f2 100644
--- a/arch/arm/mach-at91/board-flexibity.c
+++ b/arch/arm/mach-at91/board-flexibity.c
@@ -138,6 +138,8 @@ static struct gpio_led flexibity_leds[] = {
138 138
139static void __init flexibity_board_init(void) 139static void __init flexibity_board_init(void)
140{ 140{
141 at91_register_devices();
142
141 /* Serial */ 143 /* Serial */
142 /* DBGU on ttyS0. (Rx & Tx only) */ 144 /* DBGU on ttyS0. (Rx & Tx only) */
143 at91_register_uart(0, 0, 0); 145 at91_register_uart(0, 0, 0);
@@ -160,7 +162,7 @@ static void __init flexibity_board_init(void)
160 162
161MACHINE_START(FLEXIBITY, "Flexibity Connect") 163MACHINE_START(FLEXIBITY, "Flexibity Connect")
162 /* Maintainer: Maxim Osipov */ 164 /* Maintainer: Maxim Osipov */
163 .init_time = at91sam926x_pit_init, 165 .init_time = at91_init_time,
164 .map_io = at91_map_io, 166 .map_io = at91_map_io,
165 .handle_irq = at91_aic_handle_irq, 167 .handle_irq = at91_aic_handle_irq,
166 .init_early = flexibity_init_early, 168 .init_early = flexibity_init_early,
diff --git a/arch/arm/mach-at91/board-gsia18s.c b/arch/arm/mach-at91/board-gsia18s.c
index b729dd1271bf..bf5cc55c7db6 100644
--- a/arch/arm/mach-at91/board-gsia18s.c
+++ b/arch/arm/mach-at91/board-gsia18s.c
@@ -576,7 +576,7 @@ static void __init gsia18s_board_init(void)
576} 576}
577 577
578MACHINE_START(GSIA18S, "GS_IA18_S") 578MACHINE_START(GSIA18S, "GS_IA18_S")
579 .init_time = at91sam926x_pit_init, 579 .init_time = at91_init_time,
580 .map_io = at91_map_io, 580 .map_io = at91_map_io,
581 .handle_irq = at91_aic_handle_irq, 581 .handle_irq = at91_aic_handle_irq,
582 .init_early = gsia18s_init_early, 582 .init_early = gsia18s_init_early,
diff --git a/arch/arm/mach-at91/board-pcontrol-g20.c b/arch/arm/mach-at91/board-pcontrol-g20.c
index b48d95ec5152..9c26b94ce448 100644
--- a/arch/arm/mach-at91/board-pcontrol-g20.c
+++ b/arch/arm/mach-at91/board-pcontrol-g20.c
@@ -219,7 +219,7 @@ static void __init pcontrol_g20_board_init(void)
219 219
220MACHINE_START(PCONTROL_G20, "PControl G20") 220MACHINE_START(PCONTROL_G20, "PControl G20")
221 /* Maintainer: pgsellmann@portner-elektronik.at */ 221 /* Maintainer: pgsellmann@portner-elektronik.at */
222 .init_time = at91sam926x_pit_init, 222 .init_time = at91_init_time,
223 .map_io = at91_map_io, 223 .map_io = at91_map_io,
224 .handle_irq = at91_aic_handle_irq, 224 .handle_irq = at91_aic_handle_irq,
225 .init_early = pcontrol_g20_init_early, 225 .init_early = pcontrol_g20_init_early,
diff --git a/arch/arm/mach-at91/board-sam9-l9260.c b/arch/arm/mach-at91/board-sam9-l9260.c
index d24dda67e2d3..c2166e3a236c 100644
--- a/arch/arm/mach-at91/board-sam9-l9260.c
+++ b/arch/arm/mach-at91/board-sam9-l9260.c
@@ -187,6 +187,8 @@ static struct gpio_led ek_leds[] = {
187 187
188static void __init ek_board_init(void) 188static void __init ek_board_init(void)
189{ 189{
190 at91_register_devices();
191
190 /* Serial */ 192 /* Serial */
191 /* DBGU on ttyS0. (Rx & Tx only) */ 193 /* DBGU on ttyS0. (Rx & Tx only) */
192 at91_register_uart(0, 0, 0); 194 at91_register_uart(0, 0, 0);
@@ -219,7 +221,7 @@ static void __init ek_board_init(void)
219 221
220MACHINE_START(SAM9_L9260, "Olimex SAM9-L9260") 222MACHINE_START(SAM9_L9260, "Olimex SAM9-L9260")
221 /* Maintainer: Olimex */ 223 /* Maintainer: Olimex */
222 .init_time = at91sam926x_pit_init, 224 .init_time = at91_init_time,
223 .map_io = at91_map_io, 225 .map_io = at91_map_io,
224 .handle_irq = at91_aic_handle_irq, 226 .handle_irq = at91_aic_handle_irq,
225 .init_early = ek_init_early, 227 .init_early = ek_init_early,
diff --git a/arch/arm/mach-at91/board-sam9260ek.c b/arch/arm/mach-at91/board-sam9260ek.c
index 65dea12d685e..bf8a946b4cd0 100644
--- a/arch/arm/mach-at91/board-sam9260ek.c
+++ b/arch/arm/mach-at91/board-sam9260ek.c
@@ -45,7 +45,6 @@
45#include <mach/system_rev.h> 45#include <mach/system_rev.h>
46 46
47#include "at91_aic.h" 47#include "at91_aic.h"
48#include "at91_shdwc.h"
49#include "board.h" 48#include "board.h"
50#include "sam9_smc.h" 49#include "sam9_smc.h"
51#include "generic.h" 50#include "generic.h"
@@ -307,6 +306,8 @@ static void __init ek_add_device_buttons(void) {}
307 306
308static void __init ek_board_init(void) 307static void __init ek_board_init(void)
309{ 308{
309 at91_register_devices();
310
310 /* Serial */ 311 /* Serial */
311 /* DBGU on ttyS0. (Rx & Tx only) */ 312 /* DBGU on ttyS0. (Rx & Tx only) */
312 at91_register_uart(0, 0, 0); 313 at91_register_uart(0, 0, 0);
@@ -344,7 +345,7 @@ static void __init ek_board_init(void)
344 345
345MACHINE_START(AT91SAM9260EK, "Atmel AT91SAM9260-EK") 346MACHINE_START(AT91SAM9260EK, "Atmel AT91SAM9260-EK")
346 /* Maintainer: Atmel */ 347 /* Maintainer: Atmel */
347 .init_time = at91sam926x_pit_init, 348 .init_time = at91_init_time,
348 .map_io = at91_map_io, 349 .map_io = at91_map_io,
349 .handle_irq = at91_aic_handle_irq, 350 .handle_irq = at91_aic_handle_irq,
350 .init_early = ek_init_early, 351 .init_early = ek_init_early,
diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c
index 4637432de08f..e85ada820bfb 100644
--- a/arch/arm/mach-at91/board-sam9261ek.c
+++ b/arch/arm/mach-at91/board-sam9261ek.c
@@ -49,7 +49,6 @@
49#include <mach/system_rev.h> 49#include <mach/system_rev.h>
50 50
51#include "at91_aic.h" 51#include "at91_aic.h"
52#include "at91_shdwc.h"
53#include "board.h" 52#include "board.h"
54#include "sam9_smc.h" 53#include "sam9_smc.h"
55#include "generic.h" 54#include "generic.h"
@@ -561,6 +560,8 @@ static struct gpio_led ek_leds[] = {
561 560
562static void __init ek_board_init(void) 561static void __init ek_board_init(void)
563{ 562{
563 at91_register_devices();
564
564 /* Serial */ 565 /* Serial */
565 /* DBGU on ttyS0. (Rx & Tx only) */ 566 /* DBGU on ttyS0. (Rx & Tx only) */
566 at91_register_uart(0, 0, 0); 567 at91_register_uart(0, 0, 0);
@@ -603,7 +604,7 @@ static void __init ek_board_init(void)
603 604
604MACHINE_START(AT91SAM9261EK, "Atmel AT91SAM9261-EK") 605MACHINE_START(AT91SAM9261EK, "Atmel AT91SAM9261-EK")
605 /* Maintainer: Atmel */ 606 /* Maintainer: Atmel */
606 .init_time = at91sam926x_pit_init, 607 .init_time = at91_init_time,
607 .map_io = at91_map_io, 608 .map_io = at91_map_io,
608 .handle_irq = at91_aic_handle_irq, 609 .handle_irq = at91_aic_handle_irq,
609 .init_early = ek_init_early, 610 .init_early = ek_init_early,
@@ -613,7 +614,7 @@ MACHINE_END
613 614
614MACHINE_START(AT91SAM9G10EK, "Atmel AT91SAM9G10-EK") 615MACHINE_START(AT91SAM9G10EK, "Atmel AT91SAM9G10-EK")
615 /* Maintainer: Atmel */ 616 /* Maintainer: Atmel */
616 .init_time = at91sam926x_pit_init, 617 .init_time = at91_init_time,
617 .map_io = at91_map_io, 618 .map_io = at91_map_io,
618 .handle_irq = at91_aic_handle_irq, 619 .handle_irq = at91_aic_handle_irq,
619 .init_early = ek_init_early, 620 .init_early = ek_init_early,
diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c
index fc446097f410..d76680f2a209 100644
--- a/arch/arm/mach-at91/board-sam9263ek.c
+++ b/arch/arm/mach-at91/board-sam9263ek.c
@@ -50,7 +50,6 @@
50#include <mach/system_rev.h> 50#include <mach/system_rev.h>
51 51
52#include "at91_aic.h" 52#include "at91_aic.h"
53#include "at91_shdwc.h"
54#include "board.h" 53#include "board.h"
55#include "sam9_smc.h" 54#include "sam9_smc.h"
56#include "generic.h" 55#include "generic.h"
@@ -439,6 +438,8 @@ static struct platform_device *devices[] __initdata = {
439 438
440static void __init ek_board_init(void) 439static void __init ek_board_init(void)
441{ 440{
441 at91_register_devices();
442
442 /* Serial */ 443 /* Serial */
443 /* DBGU on ttyS0. (Rx & Tx only) */ 444 /* DBGU on ttyS0. (Rx & Tx only) */
444 at91_register_uart(0, 0, 0); 445 at91_register_uart(0, 0, 0);
@@ -483,7 +484,7 @@ static void __init ek_board_init(void)
483 484
484MACHINE_START(AT91SAM9263EK, "Atmel AT91SAM9263-EK") 485MACHINE_START(AT91SAM9263EK, "Atmel AT91SAM9263-EK")
485 /* Maintainer: Atmel */ 486 /* Maintainer: Atmel */
486 .init_time = at91sam926x_pit_init, 487 .init_time = at91_init_time,
487 .map_io = at91_map_io, 488 .map_io = at91_map_io,
488 .handle_irq = at91_aic_handle_irq, 489 .handle_irq = at91_aic_handle_irq,
489 .init_early = ek_init_early, 490 .init_early = ek_init_early,
diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c
index e1be6e25b380..49f075213451 100644
--- a/arch/arm/mach-at91/board-sam9g20ek.c
+++ b/arch/arm/mach-at91/board-sam9g20ek.c
@@ -410,7 +410,7 @@ static void __init ek_board_init(void)
410 410
411MACHINE_START(AT91SAM9G20EK, "Atmel AT91SAM9G20-EK") 411MACHINE_START(AT91SAM9G20EK, "Atmel AT91SAM9G20-EK")
412 /* Maintainer: Atmel */ 412 /* Maintainer: Atmel */
413 .init_time = at91sam926x_pit_init, 413 .init_time = at91_init_time,
414 .map_io = at91_map_io, 414 .map_io = at91_map_io,
415 .handle_irq = at91_aic_handle_irq, 415 .handle_irq = at91_aic_handle_irq,
416 .init_early = ek_init_early, 416 .init_early = ek_init_early,
@@ -420,7 +420,7 @@ MACHINE_END
420 420
421MACHINE_START(AT91SAM9G20EK_2MMC, "Atmel AT91SAM9G20-EK 2 MMC Slot Mod") 421MACHINE_START(AT91SAM9G20EK_2MMC, "Atmel AT91SAM9G20-EK 2 MMC Slot Mod")
422 /* Maintainer: Atmel */ 422 /* Maintainer: Atmel */
423 .init_time = at91sam926x_pit_init, 423 .init_time = at91_init_time,
424 .map_io = at91_map_io, 424 .map_io = at91_map_io,
425 .handle_irq = at91_aic_handle_irq, 425 .handle_irq = at91_aic_handle_irq,
426 .init_early = ek_init_early, 426 .init_early = ek_init_early,
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index b227732b0c83..a517c7f7af92 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -48,7 +48,6 @@
48#include <mach/system_rev.h> 48#include <mach/system_rev.h>
49 49
50#include "at91_aic.h" 50#include "at91_aic.h"
51#include "at91_shdwc.h"
52#include "board.h" 51#include "board.h"
53#include "sam9_smc.h" 52#include "sam9_smc.h"
54#include "generic.h" 53#include "generic.h"
@@ -471,6 +470,8 @@ static struct platform_device *devices[] __initdata = {
471 470
472static void __init ek_board_init(void) 471static void __init ek_board_init(void)
473{ 472{
473 at91_register_devices();
474
474 /* Serial */ 475 /* Serial */
475 /* DGBU on ttyS0. (Rx & Tx only) */ 476 /* DGBU on ttyS0. (Rx & Tx only) */
476 at91_register_uart(0, 0, 0); 477 at91_register_uart(0, 0, 0);
@@ -517,7 +518,7 @@ static void __init ek_board_init(void)
517 518
518MACHINE_START(AT91SAM9M10G45EK, "Atmel AT91SAM9M10G45-EK") 519MACHINE_START(AT91SAM9M10G45EK, "Atmel AT91SAM9M10G45-EK")
519 /* Maintainer: Atmel */ 520 /* Maintainer: Atmel */
520 .init_time = at91sam926x_pit_init, 521 .init_time = at91_init_time,
521 .map_io = at91_map_io, 522 .map_io = at91_map_io,
522 .handle_irq = at91_aic_handle_irq, 523 .handle_irq = at91_aic_handle_irq,
523 .init_early = ek_init_early, 524 .init_early = ek_init_early,
diff --git a/arch/arm/mach-at91/board-sam9rlek.c b/arch/arm/mach-at91/board-sam9rlek.c
index b64648b4a1fc..8bca329b0293 100644
--- a/arch/arm/mach-at91/board-sam9rlek.c
+++ b/arch/arm/mach-at91/board-sam9rlek.c
@@ -35,7 +35,6 @@
35 35
36 36
37#include "at91_aic.h" 37#include "at91_aic.h"
38#include "at91_shdwc.h"
39#include "board.h" 38#include "board.h"
40#include "sam9_smc.h" 39#include "sam9_smc.h"
41#include "generic.h" 40#include "generic.h"
@@ -292,6 +291,8 @@ static void __init ek_add_device_buttons(void) {}
292 291
293static void __init ek_board_init(void) 292static void __init ek_board_init(void)
294{ 293{
294 at91_register_devices();
295
295 /* Serial */ 296 /* Serial */
296 /* DBGU on ttyS0. (Rx & Tx only) */ 297 /* DBGU on ttyS0. (Rx & Tx only) */
297 at91_register_uart(0, 0, 0); 298 at91_register_uart(0, 0, 0);
@@ -323,7 +324,7 @@ static void __init ek_board_init(void)
323 324
324MACHINE_START(AT91SAM9RLEK, "Atmel AT91SAM9RL-EK") 325MACHINE_START(AT91SAM9RLEK, "Atmel AT91SAM9RL-EK")
325 /* Maintainer: Atmel */ 326 /* Maintainer: Atmel */
326 .init_time = at91sam926x_pit_init, 327 .init_time = at91_init_time,
327 .map_io = at91_map_io, 328 .map_io = at91_map_io,
328 .handle_irq = at91_aic_handle_irq, 329 .handle_irq = at91_aic_handle_irq,
329 .init_early = ek_init_early, 330 .init_early = ek_init_early,
diff --git a/arch/arm/mach-at91/board-snapper9260.c b/arch/arm/mach-at91/board-snapper9260.c
index 1b870e6def0c..b4aff840a1a0 100644
--- a/arch/arm/mach-at91/board-snapper9260.c
+++ b/arch/arm/mach-at91/board-snapper9260.c
@@ -154,6 +154,8 @@ static void __init snapper9260_add_device_nand(void)
154 154
155static void __init snapper9260_board_init(void) 155static void __init snapper9260_board_init(void)
156{ 156{
157 at91_register_devices();
158
157 at91_add_device_i2c(snapper9260_i2c_devices, 159 at91_add_device_i2c(snapper9260_i2c_devices,
158 ARRAY_SIZE(snapper9260_i2c_devices)); 160 ARRAY_SIZE(snapper9260_i2c_devices));
159 161
@@ -178,7 +180,7 @@ static void __init snapper9260_board_init(void)
178} 180}
179 181
180MACHINE_START(SNAPPER_9260, "Bluewater Systems Snapper 9260/9G20 module") 182MACHINE_START(SNAPPER_9260, "Bluewater Systems Snapper 9260/9G20 module")
181 .init_time = at91sam926x_pit_init, 183 .init_time = at91_init_time,
182 .map_io = at91_map_io, 184 .map_io = at91_map_io,
183 .handle_irq = at91_aic_handle_irq, 185 .handle_irq = at91_aic_handle_irq,
184 .init_early = snapper9260_init_early, 186 .init_early = snapper9260_init_early,
diff --git a/arch/arm/mach-at91/board-stamp9g20.c b/arch/arm/mach-at91/board-stamp9g20.c
index 3b575036ff96..e825641a1dee 100644
--- a/arch/arm/mach-at91/board-stamp9g20.c
+++ b/arch/arm/mach-at91/board-stamp9g20.c
@@ -275,7 +275,7 @@ static void __init stamp9g20evb_board_init(void)
275 275
276MACHINE_START(PORTUXG20, "taskit PortuxG20") 276MACHINE_START(PORTUXG20, "taskit PortuxG20")
277 /* Maintainer: taskit GmbH */ 277 /* Maintainer: taskit GmbH */
278 .init_time = at91sam926x_pit_init, 278 .init_time = at91_init_time,
279 .map_io = at91_map_io, 279 .map_io = at91_map_io,
280 .handle_irq = at91_aic_handle_irq, 280 .handle_irq = at91_aic_handle_irq,
281 .init_early = stamp9g20_init_early, 281 .init_early = stamp9g20_init_early,
@@ -285,7 +285,7 @@ MACHINE_END
285 285
286MACHINE_START(STAMP9G20, "taskit Stamp9G20") 286MACHINE_START(STAMP9G20, "taskit Stamp9G20")
287 /* Maintainer: taskit GmbH */ 287 /* Maintainer: taskit GmbH */
288 .init_time = at91sam926x_pit_init, 288 .init_time = at91_init_time,
289 .map_io = at91_map_io, 289 .map_io = at91_map_io,
290 .handle_irq = at91_aic_handle_irq, 290 .handle_irq = at91_aic_handle_irq,
291 .init_early = stamp9g20_init_early, 291 .init_early = stamp9g20_init_early,
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index cddf1e51c50e..81959cf4a137 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -8,6 +8,9 @@
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10 10
11#ifndef _AT91_GENERIC_H
12#define _AT91_GENERIC_H
13
11#include <linux/clkdev.h> 14#include <linux/clkdev.h>
12#include <linux/of.h> 15#include <linux/of.h>
13#include <linux/reboot.h> 16#include <linux/reboot.h>
@@ -38,12 +41,15 @@ extern int __init at91_aic5_of_init(struct device_node *node,
38extern void __init at91_sysirq_mask_rtc(u32 rtc_base); 41extern void __init at91_sysirq_mask_rtc(u32 rtc_base);
39extern void __init at91_sysirq_mask_rtt(u32 rtt_base); 42extern void __init at91_sysirq_mask_rtt(u32 rtt_base);
40 43
44 /* Devices */
45extern void __init at91_register_devices(void);
41 46
42 /* Timer */ 47 /* Timer */
48extern void __init at91_init_time(void);
43extern void at91rm9200_ioremap_st(u32 addr); 49extern void at91rm9200_ioremap_st(u32 addr);
44extern void at91rm9200_timer_init(void); 50extern void at91rm9200_timer_init(void);
45extern void at91sam926x_ioremap_pit(u32 addr); 51extern void at91sam926x_ioremap_pit(u32 addr);
46extern void at91sam926x_pit_init(void); 52extern void at91sam926x_pit_init(int irq);
47extern void at91x40_timer_init(void); 53extern void at91x40_timer_init(void);
48 54
49 /* Clocks */ 55 /* Clocks */
@@ -63,14 +69,6 @@ extern void at91_irq_resume(void);
63/* idle */ 69/* idle */
64extern void at91sam9_idle(void); 70extern void at91sam9_idle(void);
65 71
66/* reset */
67extern void at91_ioremap_rstc(u32 base_addr);
68extern void at91sam9_alt_restart(enum reboot_mode, const char *);
69extern void at91sam9g45_restart(enum reboot_mode, const char *);
70
71/* shutdown */
72extern void at91_ioremap_shdwc(u32 base_addr);
73
74/* Matrix */ 72/* Matrix */
75extern void at91_ioremap_matrix(u32 base_addr); 73extern void at91_ioremap_matrix(u32 base_addr);
76 74
@@ -91,3 +89,5 @@ extern int __init at91_gpio_of_irq_setup(struct device_node *node,
91 struct device_node *parent); 89 struct device_node *parent);
92 90
93extern u32 at91_get_extern_irq(void); 91extern u32 at91_get_extern_irq(void);
92
93#endif /* _AT91_GENERIC_H */
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 5920373809c5..4073ab7f38f3 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -34,79 +34,8 @@
34#include "pm.h" 34#include "pm.h"
35#include "gpio.h" 35#include "gpio.h"
36 36
37/*
38 * Show the reason for the previous system reset.
39 */
40
41#include "at91_rstc.h"
42#include "at91_shdwc.h"
43
44static void (*at91_pm_standby)(void); 37static void (*at91_pm_standby)(void);
45 38
46static void __init show_reset_status(void)
47{
48 static char reset[] __initdata = "reset";
49
50 static char general[] __initdata = "general";
51 static char wakeup[] __initdata = "wakeup";
52 static char watchdog[] __initdata = "watchdog";
53 static char software[] __initdata = "software";
54 static char user[] __initdata = "user";
55 static char unknown[] __initdata = "unknown";
56
57 static char signal[] __initdata = "signal";
58 static char rtc[] __initdata = "rtc";
59 static char rtt[] __initdata = "rtt";
60 static char restore[] __initdata = "power-restored";
61
62 char *reason, *r2 = reset;
63 u32 reset_type, wake_type;
64
65 if (!at91_shdwc_base || !at91_rstc_base)
66 return;
67
68 reset_type = at91_rstc_read(AT91_RSTC_SR) & AT91_RSTC_RSTTYP;
69 wake_type = at91_shdwc_read(AT91_SHDW_SR);
70
71 switch (reset_type) {
72 case AT91_RSTC_RSTTYP_GENERAL:
73 reason = general;
74 break;
75 case AT91_RSTC_RSTTYP_WAKEUP:
76 /* board-specific code enabled the wakeup sources */
77 reason = wakeup;
78
79 /* "wakeup signal" */
80 if (wake_type & AT91_SHDW_WAKEUP0)
81 r2 = signal;
82 else {
83 r2 = reason;
84 if (wake_type & AT91_SHDW_RTTWK) /* rtt wakeup */
85 reason = rtt;
86 else if (wake_type & AT91_SHDW_RTCWK) /* rtc wakeup */
87 reason = rtc;
88 else if (wake_type == 0) /* power-restored wakeup */
89 reason = restore;
90 else /* unknown wakeup */
91 reason = unknown;
92 }
93 break;
94 case AT91_RSTC_RSTTYP_WATCHDOG:
95 reason = watchdog;
96 break;
97 case AT91_RSTC_RSTTYP_SOFTWARE:
98 reason = software;
99 break;
100 case AT91_RSTC_RSTTYP_USER:
101 reason = user;
102 break;
103 default:
104 reason = unknown;
105 break;
106 }
107 pr_info("AT91: Starting after %s %s\n", reason, r2);
108}
109
110static int at91_pm_valid_state(suspend_state_t state) 39static int at91_pm_valid_state(suspend_state_t state)
111{ 40{
112 switch (state) { 41 switch (state) {
@@ -346,7 +275,6 @@ static int __init at91_pm_init(void)
346 275
347 suspend_set_ops(&at91_pm_ops); 276 suspend_set_ops(&at91_pm_ops);
348 277
349 show_reset_status();
350 return 0; 278 return 0;
351} 279}
352arch_initcall(at91_pm_init); 280arch_initcall(at91_pm_init);
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index ebe7fdca9e83..961079250b83 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -5,6 +5,8 @@
5 * Under GPLv2 5 * Under GPLv2
6 */ 6 */
7 7
8#define pr_fmt(fmt) "AT91: " fmt
9
8#include <linux/module.h> 10#include <linux/module.h>
9#include <linux/io.h> 11#include <linux/io.h>
10#include <linux/mm.h> 12#include <linux/mm.h>
@@ -20,7 +22,6 @@
20#include <mach/cpu.h> 22#include <mach/cpu.h>
21#include <mach/at91_dbgu.h> 23#include <mach/at91_dbgu.h>
22 24
23#include "at91_shdwc.h"
24#include "soc.h" 25#include "soc.h"
25#include "generic.h" 26#include "generic.h"
26#include "pm.h" 27#include "pm.h"
@@ -37,7 +38,7 @@ void __init at91rm9200_set_type(int type)
37 else 38 else
38 at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA; 39 at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA;
39 40
40 pr_info("AT91: filled in soc subtype: %s\n", 41 pr_info("filled in soc subtype: %s\n",
41 at91_get_soc_subtype(&at91_soc_initdata)); 42 at91_get_soc_subtype(&at91_soc_initdata));
42} 43}
43 44
@@ -67,7 +68,7 @@ void __init at91_ioremap_ramc(int id, u32 addr, u32 size)
67 } 68 }
68 at91_ramc_base[id] = ioremap(addr, size); 69 at91_ramc_base[id] = ioremap(addr, size);
69 if (!at91_ramc_base[id]) 70 if (!at91_ramc_base[id])
70 panic("Impossible to ioremap ramc.%d 0x%x\n", id, addr); 71 panic(pr_fmt("Impossible to ioremap ramc.%d 0x%x\n"), id, addr);
71} 72}
72 73
73static struct map_desc sram_desc[2] __initdata; 74static struct map_desc sram_desc[2] __initdata;
@@ -84,7 +85,7 @@ void __init at91_init_sram(int bank, unsigned long base, unsigned int length)
84 desc->length = length; 85 desc->length = length;
85 desc->type = MT_MEMORY_RWX_NONCACHED; 86 desc->type = MT_MEMORY_RWX_NONCACHED;
86 87
87 pr_info("AT91: sram at 0x%lx of 0x%x mapped at 0x%lx\n", 88 pr_info("sram at 0x%lx of 0x%x mapped at 0x%lx\n",
88 base, length, desc->virtual); 89 base, length, desc->virtual);
89 90
90 iotable_init(desc, 1); 91 iotable_init(desc, 1);
@@ -367,45 +368,21 @@ void __init at91_map_io(void)
367 soc_detect(AT91_BASE_DBGU1); 368 soc_detect(AT91_BASE_DBGU1);
368 369
369 if (!at91_soc_is_detected()) 370 if (!at91_soc_is_detected())
370 panic("AT91: Impossible to detect the SOC type"); 371 panic(pr_fmt("Impossible to detect the SOC type"));
371 372
372 pr_info("AT91: Detected soc type: %s\n", 373 pr_info("Detected soc type: %s\n",
373 at91_get_soc_type(&at91_soc_initdata)); 374 at91_get_soc_type(&at91_soc_initdata));
374 if (at91_soc_initdata.subtype != AT91_SOC_SUBTYPE_NONE) 375 if (at91_soc_initdata.subtype != AT91_SOC_SUBTYPE_NONE)
375 pr_info("AT91: Detected soc subtype: %s\n", 376 pr_info("Detected soc subtype: %s\n",
376 at91_get_soc_subtype(&at91_soc_initdata)); 377 at91_get_soc_subtype(&at91_soc_initdata));
377 378
378 if (!at91_soc_is_enabled()) 379 if (!at91_soc_is_enabled())
379 panic("AT91: Soc not enabled"); 380 panic(pr_fmt("Soc not enabled"));
380 381
381 if (at91_boot_soc.map_io) 382 if (at91_boot_soc.map_io)
382 at91_boot_soc.map_io(); 383 at91_boot_soc.map_io();
383} 384}
384 385
385void __iomem *at91_shdwc_base = NULL;
386
387static void at91sam9_poweroff(void)
388{
389 at91_shdwc_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
390}
391
392void __init at91_ioremap_shdwc(u32 base_addr)
393{
394 at91_shdwc_base = ioremap(base_addr, 16);
395 if (!at91_shdwc_base)
396 panic("Impossible to ioremap at91_shdwc_base\n");
397 pm_power_off = at91sam9_poweroff;
398}
399
400void __iomem *at91_rstc_base;
401
402void __init at91_ioremap_rstc(u32 base_addr)
403{
404 at91_rstc_base = ioremap(base_addr, 16);
405 if (!at91_rstc_base)
406 panic("Impossible to ioremap at91_rstc_base\n");
407}
408
409void __init at91_alt_map_io(void) 386void __init at91_alt_map_io(void)
410{ 387{
411 /* Map peripherals */ 388 /* Map peripherals */
@@ -438,42 +415,15 @@ void __init at91_ioremap_matrix(u32 base_addr)
438{ 415{
439 at91_matrix_base = ioremap(base_addr, 512); 416 at91_matrix_base = ioremap(base_addr, 512);
440 if (!at91_matrix_base) 417 if (!at91_matrix_base)
441 panic("Impossible to ioremap at91_matrix_base\n"); 418 panic(pr_fmt("Impossible to ioremap at91_matrix_base\n"));
442} 419}
443 420
444#if defined(CONFIG_OF) && !defined(CONFIG_ARCH_AT91X40) 421#if defined(CONFIG_OF) && !defined(CONFIG_ARCH_AT91X40)
445static struct of_device_id rstc_ids[] = {
446 { .compatible = "atmel,at91sam9260-rstc", .data = at91sam9_alt_restart },
447 { .compatible = "atmel,at91sam9g45-rstc", .data = at91sam9g45_restart },
448 { /*sentinel*/ }
449};
450
451static void at91_dt_rstc(void)
452{
453 struct device_node *np;
454 const struct of_device_id *of_id;
455
456 np = of_find_matching_node(NULL, rstc_ids);
457 if (!np)
458 panic("unable to find compatible rstc node in dtb\n");
459
460 at91_rstc_base = of_iomap(np, 0);
461 if (!at91_rstc_base)
462 panic("unable to map rstc cpu registers\n");
463
464 of_id = of_match_node(rstc_ids, np);
465 if (!of_id)
466 panic("AT91: rtsc no restart function available\n");
467
468 arm_pm_restart = of_id->data;
469
470 of_node_put(np);
471}
472
473static struct of_device_id ramc_ids[] = { 422static struct of_device_id ramc_ids[] = {
474 { .compatible = "atmel,at91rm9200-sdramc", .data = at91rm9200_standby }, 423 { .compatible = "atmel,at91rm9200-sdramc", .data = at91rm9200_standby },
475 { .compatible = "atmel,at91sam9260-sdramc", .data = at91sam9_sdram_standby }, 424 { .compatible = "atmel,at91sam9260-sdramc", .data = at91sam9_sdram_standby },
476 { .compatible = "atmel,at91sam9g45-ddramc", .data = at91_ddr_standby }, 425 { .compatible = "atmel,at91sam9g45-ddramc", .data = at91_ddr_standby },
426 { .compatible = "atmel,sama5d3-ddramc", .data = at91_ddr_standby },
477 { /*sentinel*/ } 427 { /*sentinel*/ }
478}; 428};
479 429
@@ -481,100 +431,29 @@ static void at91_dt_ramc(void)
481{ 431{
482 struct device_node *np; 432 struct device_node *np;
483 const struct of_device_id *of_id; 433 const struct of_device_id *of_id;
434 int idx = 0;
435 const void *standby = NULL;
484 436
485 np = of_find_matching_node(NULL, ramc_ids); 437 for_each_matching_node_and_match(np, ramc_ids, &of_id) {
486 if (!np) 438 at91_ramc_base[idx] = of_iomap(np, 0);
487 panic("unable to find compatible ram controller node in dtb\n"); 439 if (!at91_ramc_base[idx])
488 440 panic(pr_fmt("unable to map ramc[%d] cpu registers\n"), idx);
489 at91_ramc_base[0] = of_iomap(np, 0);
490 if (!at91_ramc_base[0])
491 panic("unable to map ramc[0] cpu registers\n");
492 /* the controller may have 2 banks */
493 at91_ramc_base[1] = of_iomap(np, 1);
494
495 of_id = of_match_node(ramc_ids, np);
496 if (!of_id)
497 pr_warn("AT91: ramc no standby function available\n");
498 else
499 at91_pm_set_standby(of_id->data);
500
501 of_node_put(np);
502}
503
504static struct of_device_id shdwc_ids[] = {
505 { .compatible = "atmel,at91sam9260-shdwc", },
506 { .compatible = "atmel,at91sam9rl-shdwc", },
507 { .compatible = "atmel,at91sam9x5-shdwc", },
508 { /*sentinel*/ }
509};
510
511static const char *shdwc_wakeup_modes[] = {
512 [AT91_SHDW_WKMODE0_NONE] = "none",
513 [AT91_SHDW_WKMODE0_HIGH] = "high",
514 [AT91_SHDW_WKMODE0_LOW] = "low",
515 [AT91_SHDW_WKMODE0_ANYLEVEL] = "any",
516};
517 441
518const int at91_dtget_shdwc_wakeup_mode(struct device_node *np) 442 if (!standby)
519{ 443 standby = of_id->data;
520 const char *pm;
521 int err, i;
522
523 err = of_property_read_string(np, "atmel,wakeup-mode", &pm);
524 if (err < 0)
525 return AT91_SHDW_WKMODE0_ANYLEVEL;
526
527 for (i = 0; i < ARRAY_SIZE(shdwc_wakeup_modes); i++)
528 if (!strcasecmp(pm, shdwc_wakeup_modes[i]))
529 return i;
530
531 return -ENODEV;
532}
533
534static void at91_dt_shdwc(void)
535{
536 struct device_node *np;
537 int wakeup_mode;
538 u32 reg;
539 u32 mode = 0;
540 444
541 np = of_find_matching_node(NULL, shdwc_ids); 445 idx++;
542 if (!np) {
543 pr_debug("AT91: unable to find compatible shutdown (shdwc) controller node in dtb\n");
544 return;
545 } 446 }
546 447
547 at91_shdwc_base = of_iomap(np, 0); 448 if (!idx)
548 if (!at91_shdwc_base) 449 panic(pr_fmt("unable to find compatible ram controller node in dtb\n"));
549 panic("AT91: unable to map shdwc cpu registers\n");
550
551 wakeup_mode = at91_dtget_shdwc_wakeup_mode(np);
552 if (wakeup_mode < 0) {
553 pr_warn("AT91: shdwc unknown wakeup mode\n");
554 goto end;
555 }
556 450
557 if (!of_property_read_u32(np, "atmel,wakeup-counter", &reg)) { 451 if (!standby) {
558 if (reg > AT91_SHDW_CPTWK0_MAX) { 452 pr_warn("ramc no standby function available\n");
559 pr_warn("AT91: shdwc wakeup counter 0x%x > 0x%x reduce it to 0x%x\n", 453 return;
560 reg, AT91_SHDW_CPTWK0_MAX, AT91_SHDW_CPTWK0_MAX);
561 reg = AT91_SHDW_CPTWK0_MAX;
562 }
563 mode |= AT91_SHDW_CPTWK0_(reg);
564 } 454 }
565 455
566 if (of_property_read_bool(np, "atmel,wakeup-rtc-timer")) 456 at91_pm_set_standby(standby);
567 mode |= AT91_SHDW_RTCWKEN;
568
569 if (of_property_read_bool(np, "atmel,wakeup-rtt-timer"))
570 mode |= AT91_SHDW_RTTWKEN;
571
572 at91_shdwc_write(AT91_SHDW_MR, wakeup_mode | mode);
573
574end:
575 pm_power_off = at91sam9_poweroff;
576
577 of_node_put(np);
578} 457}
579 458
580void __init at91rm9200_dt_initialize(void) 459void __init at91rm9200_dt_initialize(void)
@@ -593,9 +472,7 @@ void __init at91rm9200_dt_initialize(void)
593 472
594void __init at91_dt_initialize(void) 473void __init at91_dt_initialize(void)
595{ 474{
596 at91_dt_rstc();
597 at91_dt_ramc(); 475 at91_dt_ramc();
598 at91_dt_shdwc();
599 476
600 /* Init clock subsystem */ 477 /* Init clock subsystem */
601 at91_dt_clock_init(); 478 at91_dt_clock_init();
@@ -623,3 +500,13 @@ void __init at91_initialize(unsigned long main_clock)
623 500
624 pinctrl_provide_dummies(); 501 pinctrl_provide_dummies();
625} 502}
503
504void __init at91_register_devices(void)
505{
506 at91_boot_soc.register_devices();
507}
508
509void __init at91_init_time(void)
510{
511 at91_boot_soc.init_time();
512}
diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h
index 8ecaee67f953..9a8fd97a8bef 100644
--- a/arch/arm/mach-at91/soc.h
+++ b/arch/arm/mach-at91/soc.h
@@ -11,7 +11,9 @@ struct at91_init_soc {
11 void (*map_io)(void); 11 void (*map_io)(void);
12 void (*ioremap_registers)(void); 12 void (*ioremap_registers)(void);
13 void (*register_clocks)(void); 13 void (*register_clocks)(void);
14 void (*register_devices)(void);
14 void (*init)(void); 15 void (*init)(void);
16 void (*init_time)(void);
15}; 17};
16 18
17extern struct at91_init_soc at91_boot_soc; 19extern struct at91_init_soc at91_boot_soc;
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 75212c064b31..f4d06aea8460 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -83,6 +83,7 @@ config ARCH_OMAP2PLUS
83 select PINCTRL 83 select PINCTRL
84 select SOC_BUS 84 select SOC_BUS
85 select TI_PRIV_EDMA 85 select TI_PRIV_EDMA
86 select OMAP_IRQCHIP
86 help 87 help
87 Systems based on OMAP2, OMAP3, OMAP4 or OMAP5 88 Systems based on OMAP2, OMAP3, OMAP4 or OMAP5
88 89
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index d9dd99c6aa28..d9e94122073e 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -10,7 +10,6 @@ obj-y := id.o io.o control.o mux.o devices.o fb.o serial.o gpmc.o timer.o pm.o \
10 common.o gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o omap_hwmod.o \ 10 common.o gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o omap_hwmod.o \
11 omap_device.o sram.o drm.o 11 omap_device.o sram.o drm.o
12 12
13omap-2-3-common = irq.o
14hwmod-common = omap_hwmod.o omap_hwmod_reset.o \ 13hwmod-common = omap_hwmod.o omap_hwmod_reset.o \
15 omap_hwmod_common_data.o 14 omap_hwmod_common_data.o
16clock-common = clock.o clock_common_data.o \ 15clock-common = clock.o clock_common_data.o \
@@ -20,7 +19,7 @@ secure-common = omap-smc.o omap-secure.o
20obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common) 19obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common)
21obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(hwmod-common) $(secure-common) 20obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(hwmod-common) $(secure-common)
22obj-$(CONFIG_ARCH_OMAP4) += $(hwmod-common) $(secure-common) 21obj-$(CONFIG_ARCH_OMAP4) += $(hwmod-common) $(secure-common)
23obj-$(CONFIG_SOC_AM33XX) += irq.o $(hwmod-common) 22obj-$(CONFIG_SOC_AM33XX) += $(hwmod-common)
24obj-$(CONFIG_SOC_OMAP5) += $(hwmod-common) $(secure-common) 23obj-$(CONFIG_SOC_OMAP5) += $(hwmod-common) $(secure-common)
25obj-$(CONFIG_SOC_AM43XX) += $(hwmod-common) $(secure-common) 24obj-$(CONFIG_SOC_AM43XX) += $(hwmod-common) $(secure-common)
26obj-$(CONFIG_SOC_DRA7XX) += $(hwmod-common) $(secure-common) 25obj-$(CONFIG_SOC_DRA7XX) += $(hwmod-common) $(secure-common)
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index d95d0ef1354a..d21a3048d06b 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -625,7 +625,6 @@ MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
625 .map_io = omap3_map_io, 625 .map_io = omap3_map_io,
626 .init_early = omap3430_init_early, 626 .init_early = omap3430_init_early,
627 .init_irq = omap3_init_irq, 627 .init_irq = omap3_init_irq,
628 .handle_irq = omap3_intc_handle_irq,
629 .init_machine = omap_3430sdp_init, 628 .init_machine = omap_3430sdp_init,
630 .init_late = omap3430_init_late, 629 .init_late = omap3430_init_late,
631 .init_time = omap3_sync32k_timer_init, 630 .init_time = omap3_sync32k_timer_init,
diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c
index 0d499a1878f6..212c3160de18 100644
--- a/arch/arm/mach-omap2/board-am3517crane.c
+++ b/arch/arm/mach-omap2/board-am3517crane.c
@@ -142,7 +142,6 @@ MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD")
142 .map_io = omap3_map_io, 142 .map_io = omap3_map_io,
143 .init_early = am35xx_init_early, 143 .init_early = am35xx_init_early,
144 .init_irq = omap3_init_irq, 144 .init_irq = omap3_init_irq,
145 .handle_irq = omap3_intc_handle_irq,
146 .init_machine = am3517_crane_init, 145 .init_machine = am3517_crane_init,
147 .init_late = am35xx_init_late, 146 .init_late = am35xx_init_late,
148 .init_time = omap3_sync32k_timer_init, 147 .init_time = omap3_sync32k_timer_init,
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
index 4f9383cecf76..1c091b3fa312 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -366,7 +366,6 @@ MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM")
366 .map_io = omap3_map_io, 366 .map_io = omap3_map_io,
367 .init_early = am35xx_init_early, 367 .init_early = am35xx_init_early,
368 .init_irq = omap3_init_irq, 368 .init_irq = omap3_init_irq,
369 .handle_irq = omap3_intc_handle_irq,
370 .init_machine = am3517_evm_init, 369 .init_machine = am3517_evm_init,
371 .init_late = am35xx_init_late, 370 .init_late = am35xx_init_late,
372 .init_time = omap3_sync32k_timer_init, 371 .init_time = omap3_sync32k_timer_init,
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index 018353d88b96..c6df8eec4553 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -766,7 +766,6 @@ MACHINE_START(CM_T35, "Compulab CM-T35")
766 .map_io = omap3_map_io, 766 .map_io = omap3_map_io,
767 .init_early = omap35xx_init_early, 767 .init_early = omap35xx_init_early,
768 .init_irq = omap3_init_irq, 768 .init_irq = omap3_init_irq,
769 .handle_irq = omap3_intc_handle_irq,
770 .init_machine = cm_t35_init, 769 .init_machine = cm_t35_init,
771 .init_late = omap35xx_init_late, 770 .init_late = omap35xx_init_late,
772 .init_time = omap3_sync32k_timer_init, 771 .init_time = omap3_sync32k_timer_init,
@@ -779,7 +778,6 @@ MACHINE_START(CM_T3730, "Compulab CM-T3730")
779 .map_io = omap3_map_io, 778 .map_io = omap3_map_io,
780 .init_early = omap3630_init_early, 779 .init_early = omap3630_init_early,
781 .init_irq = omap3_init_irq, 780 .init_irq = omap3_init_irq,
782 .handle_irq = omap3_intc_handle_irq,
783 .init_machine = cm_t3730_init, 781 .init_machine = cm_t3730_init,
784 .init_late = omap3630_init_late, 782 .init_late = omap3630_init_late,
785 .init_time = omap3_sync32k_timer_init, 783 .init_time = omap3_sync32k_timer_init,
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c
index 4eb5e6f2f7f5..8a2c1677964c 100644
--- a/arch/arm/mach-omap2/board-cm-t3517.c
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
@@ -329,7 +329,6 @@ MACHINE_START(CM_T3517, "Compulab CM-T3517")
329 .map_io = omap3_map_io, 329 .map_io = omap3_map_io,
330 .init_early = am35xx_init_early, 330 .init_early = am35xx_init_early,
331 .init_irq = omap3_init_irq, 331 .init_irq = omap3_init_irq,
332 .handle_irq = omap3_intc_handle_irq,
333 .init_machine = cm_t3517_init, 332 .init_machine = cm_t3517_init,
334 .init_late = am35xx_init_late, 333 .init_late = am35xx_init_late,
335 .init_time = omap3_gptimer_timer_init, 334 .init_time = omap3_gptimer_timer_init,
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index cdc4fb9960a9..d8e4f346936a 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -647,7 +647,6 @@ MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000")
647 .map_io = omap3_map_io, 647 .map_io = omap3_map_io,
648 .init_early = omap35xx_init_early, 648 .init_early = omap35xx_init_early,
649 .init_irq = omap3_init_irq, 649 .init_irq = omap3_init_irq,
650 .handle_irq = omap3_intc_handle_irq,
651 .init_machine = devkit8000_init, 650 .init_machine = devkit8000_init,
652 .init_late = omap35xx_init_late, 651 .init_late = omap35xx_init_late,
653 .init_time = omap3_secure_sync32k_timer_init, 652 .init_time = omap3_secure_sync32k_timer_init,
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index 69166eed5dba..608079a1aba6 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -52,8 +52,6 @@ DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)")
52 .reserve = omap_reserve, 52 .reserve = omap_reserve,
53 .map_io = omap242x_map_io, 53 .map_io = omap242x_map_io,
54 .init_early = omap2420_init_early, 54 .init_early = omap2420_init_early,
55 .init_irq = omap_intc_of_init,
56 .handle_irq = omap2_intc_handle_irq,
57 .init_machine = omap_generic_init, 55 .init_machine = omap_generic_init,
58 .init_time = omap2_sync32k_timer_init, 56 .init_time = omap2_sync32k_timer_init,
59 .dt_compat = omap242x_boards_compat, 57 .dt_compat = omap242x_boards_compat,
@@ -71,8 +69,6 @@ DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)")
71 .reserve = omap_reserve, 69 .reserve = omap_reserve,
72 .map_io = omap243x_map_io, 70 .map_io = omap243x_map_io,
73 .init_early = omap2430_init_early, 71 .init_early = omap2430_init_early,
74 .init_irq = omap_intc_of_init,
75 .handle_irq = omap2_intc_handle_irq,
76 .init_machine = omap_generic_init, 72 .init_machine = omap_generic_init,
77 .init_time = omap2_sync32k_timer_init, 73 .init_time = omap2_sync32k_timer_init,
78 .dt_compat = omap243x_boards_compat, 74 .dt_compat = omap243x_boards_compat,
@@ -91,8 +87,6 @@ DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)")
91 .reserve = omap_reserve, 87 .reserve = omap_reserve,
92 .map_io = omap3_map_io, 88 .map_io = omap3_map_io,
93 .init_early = omap3430_init_early, 89 .init_early = omap3430_init_early,
94 .init_irq = omap_intc_of_init,
95 .handle_irq = omap3_intc_handle_irq,
96 .init_machine = omap_generic_init, 90 .init_machine = omap_generic_init,
97 .init_late = omap3_init_late, 91 .init_late = omap3_init_late,
98 .init_time = omap3_sync32k_timer_init, 92 .init_time = omap3_sync32k_timer_init,
@@ -109,8 +103,6 @@ DT_MACHINE_START(OMAP36XX_DT, "Generic OMAP36xx (Flattened Device Tree)")
109 .reserve = omap_reserve, 103 .reserve = omap_reserve,
110 .map_io = omap3_map_io, 104 .map_io = omap3_map_io,
111 .init_early = omap3630_init_early, 105 .init_early = omap3630_init_early,
112 .init_irq = omap_intc_of_init,
113 .handle_irq = omap3_intc_handle_irq,
114 .init_machine = omap_generic_init, 106 .init_machine = omap_generic_init,
115 .init_late = omap3_init_late, 107 .init_late = omap3_init_late,
116 .init_time = omap3_sync32k_timer_init, 108 .init_time = omap3_sync32k_timer_init,
@@ -128,8 +120,6 @@ DT_MACHINE_START(OMAP3_GP_DT, "Generic OMAP3-GP (Flattened Device Tree)")
128 .reserve = omap_reserve, 120 .reserve = omap_reserve,
129 .map_io = omap3_map_io, 121 .map_io = omap3_map_io,
130 .init_early = omap3430_init_early, 122 .init_early = omap3430_init_early,
131 .init_irq = omap_intc_of_init,
132 .handle_irq = omap3_intc_handle_irq,
133 .init_machine = omap_generic_init, 123 .init_machine = omap_generic_init,
134 .init_late = omap3_init_late, 124 .init_late = omap3_init_late,
135 .init_time = omap3_secure_sync32k_timer_init, 125 .init_time = omap3_secure_sync32k_timer_init,
@@ -146,8 +136,6 @@ DT_MACHINE_START(AM3517_DT, "Generic AM3517 (Flattened Device Tree)")
146 .reserve = omap_reserve, 136 .reserve = omap_reserve,
147 .map_io = omap3_map_io, 137 .map_io = omap3_map_io,
148 .init_early = am35xx_init_early, 138 .init_early = am35xx_init_early,
149 .init_irq = omap_intc_of_init,
150 .handle_irq = omap3_intc_handle_irq,
151 .init_machine = omap_generic_init, 139 .init_machine = omap_generic_init,
152 .init_late = omap3_init_late, 140 .init_late = omap3_init_late,
153 .init_time = omap3_gptimer_timer_init, 141 .init_time = omap3_gptimer_timer_init,
@@ -166,8 +154,6 @@ DT_MACHINE_START(AM33XX_DT, "Generic AM33XX (Flattened Device Tree)")
166 .reserve = omap_reserve, 154 .reserve = omap_reserve,
167 .map_io = am33xx_map_io, 155 .map_io = am33xx_map_io,
168 .init_early = am33xx_init_early, 156 .init_early = am33xx_init_early,
169 .init_irq = omap_intc_of_init,
170 .handle_irq = omap3_intc_handle_irq,
171 .init_machine = omap_generic_init, 157 .init_machine = omap_generic_init,
172 .init_late = am33xx_init_late, 158 .init_late = am33xx_init_late,
173 .init_time = omap3_gptimer_timer_init, 159 .init_time = omap3_gptimer_timer_init,
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index 44a59c3abfb0..c2975af4cd5d 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -422,7 +422,6 @@ MACHINE_START(OMAP_LDP, "OMAP LDP board")
422 .map_io = omap3_map_io, 422 .map_io = omap3_map_io,
423 .init_early = omap3430_init_early, 423 .init_early = omap3430_init_early,
424 .init_irq = omap3_init_irq, 424 .init_irq = omap3_init_irq,
425 .handle_irq = omap3_intc_handle_irq,
426 .init_machine = omap_ldp_init, 425 .init_machine = omap_ldp_init,
427 .init_late = omap3430_init_late, 426 .init_late = omap3430_init_late,
428 .init_time = omap3_sync32k_timer_init, 427 .init_time = omap3_sync32k_timer_init,
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index aead77a4bc6d..97767a27ca9d 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -33,6 +33,7 @@
33#include "mmc.h" 33#include "mmc.h"
34#include "soc.h" 34#include "soc.h"
35#include "gpmc-onenand.h" 35#include "gpmc-onenand.h"
36#include "common-board-devices.h"
36 37
37#define TUSB6010_ASYNC_CS 1 38#define TUSB6010_ASYNC_CS 1
38#define TUSB6010_SYNC_CS 4 39#define TUSB6010_SYNC_CS 4
@@ -568,29 +569,14 @@ static int n8x0_menelaus_late_init(struct device *dev)
568} 569}
569#endif 570#endif
570 571
571static struct menelaus_platform_data n8x0_menelaus_platform_data __initdata = { 572struct menelaus_platform_data n8x0_menelaus_platform_data __initdata = {
572 .late_init = n8x0_menelaus_late_init, 573 .late_init = n8x0_menelaus_late_init,
573}; 574};
574 575
575static struct i2c_board_info __initdata n8x0_i2c_board_info_1[] __initdata = { 576struct aic3x_pdata n810_aic33_data __initdata = {
576 {
577 I2C_BOARD_INFO("menelaus", 0x72),
578 .irq = 7 + OMAP_INTC_START,
579 .platform_data = &n8x0_menelaus_platform_data,
580 },
581};
582
583static struct aic3x_pdata n810_aic33_data __initdata = {
584 .gpio_reset = 118, 577 .gpio_reset = 118,
585}; 578};
586 579
587static struct i2c_board_info n810_i2c_board_info_2[] __initdata = {
588 {
589 I2C_BOARD_INFO("tlv320aic3x", 0x18),
590 .platform_data = &n810_aic33_data,
591 },
592};
593
594static int __init n8x0_late_initcall(void) 580static int __init n8x0_late_initcall(void)
595{ 581{
596 if (!board_caps) 582 if (!board_caps)
@@ -612,11 +598,5 @@ void * __init n8x0_legacy_init(void)
612 board_check_revision(); 598 board_check_revision();
613 spi_register_board_info(n800_spi_board_info, 599 spi_register_board_info(n800_spi_board_info,
614 ARRAY_SIZE(n800_spi_board_info)); 600 ARRAY_SIZE(n800_spi_board_info));
615 i2c_register_board_info(0, n8x0_i2c_board_info_1,
616 ARRAY_SIZE(n8x0_i2c_board_info_1));
617 if (board_is_n810())
618 i2c_register_board_info(1, n810_i2c_board_info_2,
619 ARRAY_SIZE(n810_i2c_board_info_2));
620
621 return &mmc1_data; 601 return &mmc1_data;
622} 602}
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index e2e52031f056..81de1c68b360 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -588,7 +588,6 @@ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board")
588 .map_io = omap3_map_io, 588 .map_io = omap3_map_io,
589 .init_early = omap3_init_early, 589 .init_early = omap3_init_early,
590 .init_irq = omap3_init_irq, 590 .init_irq = omap3_init_irq,
591 .handle_irq = omap3_intc_handle_irq,
592 .init_machine = omap3_beagle_init, 591 .init_machine = omap3_beagle_init,
593 .init_late = omap3_init_late, 592 .init_late = omap3_init_late,
594 .init_time = omap3_secure_sync32k_timer_init, 593 .init_time = omap3_secure_sync32k_timer_init,
diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c
index bab51e64c4b5..6049f60a8813 100644
--- a/arch/arm/mach-omap2/board-omap3logic.c
+++ b/arch/arm/mach-omap2/board-omap3logic.c
@@ -230,7 +230,6 @@ MACHINE_START(OMAP3_TORPEDO, "Logic OMAP3 Torpedo board")
230 .map_io = omap3_map_io, 230 .map_io = omap3_map_io,
231 .init_early = omap35xx_init_early, 231 .init_early = omap35xx_init_early,
232 .init_irq = omap3_init_irq, 232 .init_irq = omap3_init_irq,
233 .handle_irq = omap3_intc_handle_irq,
234 .init_machine = omap3logic_init, 233 .init_machine = omap3logic_init,
235 .init_late = omap35xx_init_late, 234 .init_late = omap35xx_init_late,
236 .init_time = omap3_sync32k_timer_init, 235 .init_time = omap3_sync32k_timer_init,
@@ -243,7 +242,6 @@ MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board")
243 .map_io = omap3_map_io, 242 .map_io = omap3_map_io,
244 .init_early = omap35xx_init_early, 243 .init_early = omap35xx_init_early,
245 .init_irq = omap3_init_irq, 244 .init_irq = omap3_init_irq,
246 .handle_irq = omap3_intc_handle_irq,
247 .init_machine = omap3logic_init, 245 .init_machine = omap3logic_init,
248 .init_late = omap35xx_init_late, 246 .init_late = omap35xx_init_late,
249 .init_time = omap3_sync32k_timer_init, 247 .init_time = omap3_sync32k_timer_init,
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index cf18340eb3bb..f32201656cf3 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -624,7 +624,6 @@ MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console")
624 .map_io = omap3_map_io, 624 .map_io = omap3_map_io,
625 .init_early = omap35xx_init_early, 625 .init_early = omap35xx_init_early,
626 .init_irq = omap3_init_irq, 626 .init_irq = omap3_init_irq,
627 .handle_irq = omap3_intc_handle_irq,
628 .init_machine = omap3pandora_init, 627 .init_machine = omap3pandora_init,
629 .init_late = omap35xx_init_late, 628 .init_late = omap35xx_init_late,
630 .init_time = omap3_sync32k_timer_init, 629 .init_time = omap3_sync32k_timer_init,
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c
index a2e035e0792a..6311f4b1ee44 100644
--- a/arch/arm/mach-omap2/board-omap3stalker.c
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
@@ -426,7 +426,6 @@ MACHINE_START(SBC3530, "OMAP3 STALKER")
426 .map_io = omap3_map_io, 426 .map_io = omap3_map_io,
427 .init_early = omap35xx_init_early, 427 .init_early = omap35xx_init_early,
428 .init_irq = omap3_init_irq, 428 .init_irq = omap3_init_irq,
429 .handle_irq = omap3_intc_handle_irq,
430 .init_machine = omap3_stalker_init, 429 .init_machine = omap3_stalker_init,
431 .init_late = omap35xx_init_late, 430 .init_late = omap35xx_init_late,
432 .init_time = omap3_secure_sync32k_timer_init, 431 .init_time = omap3_secure_sync32k_timer_init,
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c
index 70b904c010c6..a01993e5500f 100644
--- a/arch/arm/mach-omap2/board-omap3touchbook.c
+++ b/arch/arm/mach-omap2/board-omap3touchbook.c
@@ -388,7 +388,6 @@ MACHINE_START(TOUCHBOOK, "OMAP3 touchbook Board")
388 .map_io = omap3_map_io, 388 .map_io = omap3_map_io,
389 .init_early = omap3430_init_early, 389 .init_early = omap3430_init_early,
390 .init_irq = omap3_init_irq, 390 .init_irq = omap3_init_irq,
391 .handle_irq = omap3_intc_handle_irq,
392 .init_machine = omap3_touchbook_init, 391 .init_machine = omap3_touchbook_init,
393 .init_late = omap3430_init_late, 392 .init_late = omap3430_init_late,
394 .init_time = omap3_secure_sync32k_timer_init, 393 .init_time = omap3_secure_sync32k_timer_init,
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index f6d384111911..2dae6ccd39bb 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -564,7 +564,6 @@ MACHINE_START(OVERO, "Gumstix Overo")
564 .map_io = omap3_map_io, 564 .map_io = omap3_map_io,
565 .init_early = omap35xx_init_early, 565 .init_early = omap35xx_init_early,
566 .init_irq = omap3_init_irq, 566 .init_irq = omap3_init_irq,
567 .handle_irq = omap3_intc_handle_irq,
568 .init_machine = overo_init, 567 .init_machine = overo_init,
569 .init_late = omap35xx_init_late, 568 .init_late = omap35xx_init_late,
570 .init_time = omap3_sync32k_timer_init, 569 .init_time = omap3_sync32k_timer_init,
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
index db168c9627a1..2d1e5a6beb85 100644
--- a/arch/arm/mach-omap2/board-rx51.c
+++ b/arch/arm/mach-omap2/board-rx51.c
@@ -134,7 +134,6 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board")
134 .map_io = omap3_map_io, 134 .map_io = omap3_map_io,
135 .init_early = omap3430_init_early, 135 .init_early = omap3430_init_early,
136 .init_irq = omap3_init_irq, 136 .init_irq = omap3_init_irq,
137 .handle_irq = omap3_intc_handle_irq,
138 .init_machine = rx51_init, 137 .init_machine = rx51_init,
139 .init_late = omap3430_init_late, 138 .init_late = omap3430_init_late,
140 .init_time = omap3_sync32k_timer_init, 139 .init_time = omap3_sync32k_timer_init,
diff --git a/arch/arm/mach-omap2/common-board-devices.h b/arch/arm/mach-omap2/common-board-devices.h
index f338177e6900..07c88ae083fb 100644
--- a/arch/arm/mach-omap2/common-board-devices.h
+++ b/arch/arm/mach-omap2/common-board-devices.h
@@ -1,6 +1,8 @@
1#ifndef __OMAP_COMMON_BOARD_DEVICES__ 1#ifndef __OMAP_COMMON_BOARD_DEVICES__
2#define __OMAP_COMMON_BOARD_DEVICES__ 2#define __OMAP_COMMON_BOARD_DEVICES__
3 3
4#include <sound/tlv320aic3x.h>
5#include <linux/mfd/menelaus.h>
4#include "twl-common.h" 6#include "twl-common.h"
5 7
6#define NAND_BLOCK_SIZE SZ_128K 8#define NAND_BLOCK_SIZE SZ_128K
@@ -12,4 +14,7 @@ void omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce,
12 struct ads7846_platform_data *board_pdata); 14 struct ads7846_platform_data *board_pdata);
13void *n8x0_legacy_init(void); 15void *n8x0_legacy_init(void);
14 16
17extern struct menelaus_platform_data n8x0_menelaus_platform_data;
18extern struct aic3x_pdata n810_aic33_data;
19
15#endif /* __OMAP_COMMON_BOARD_DEVICES__ */ 20#endif /* __OMAP_COMMON_BOARD_DEVICES__ */
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index 98fe235f6670..377eea849e7b 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -32,6 +32,7 @@
32#include <linux/i2c/twl.h> 32#include <linux/i2c/twl.h>
33#include <linux/i2c-omap.h> 33#include <linux/i2c-omap.h>
34#include <linux/reboot.h> 34#include <linux/reboot.h>
35#include <linux/irqchip/irq-omap-intc.h>
35 36
36#include <asm/proc-fns.h> 37#include <asm/proc-fns.h>
37 38
@@ -210,18 +211,6 @@ extern struct device *omap2_get_iva_device(void);
210extern struct device *omap2_get_l3_device(void); 211extern struct device *omap2_get_l3_device(void);
211extern struct device *omap4_get_dsp_device(void); 212extern struct device *omap4_get_dsp_device(void);
212 213
213void omap2_init_irq(void);
214void omap3_init_irq(void);
215void ti81xx_init_irq(void);
216extern int omap_irq_pending(void);
217void omap_intc_save_context(void);
218void omap_intc_restore_context(void);
219void omap3_intc_suspend(void);
220void omap3_intc_prepare_idle(void);
221void omap3_intc_resume_idle(void);
222void omap2_intc_handle_irq(struct pt_regs *regs);
223void omap3_intc_handle_irq(struct pt_regs *regs);
224void omap_intc_of_init(void);
225void omap_gic_of_init(void); 214void omap_gic_of_init(void);
226 215
227#ifdef CONFIG_CACHE_L2X0 216#ifdef CONFIG_CACHE_L2X0
@@ -229,16 +218,6 @@ extern void __iomem *omap4_get_l2cache_base(void);
229#endif 218#endif
230 219
231struct device_node; 220struct device_node;
232#ifdef CONFIG_OF
233int __init intc_of_init(struct device_node *node,
234 struct device_node *parent);
235#else
236int __init intc_of_init(struct device_node *node,
237 struct device_node *parent)
238{
239 return 0;
240}
241#endif
242 221
243#ifdef CONFIG_SMP 222#ifdef CONFIG_SMP
244extern void __iomem *omap4_get_scu_base(void); 223extern void __iomem *omap4_get_scu_base(void);
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
deleted file mode 100644
index 604a976abf14..000000000000
--- a/arch/arm/mach-omap2/irq.c
+++ /dev/null
@@ -1,380 +0,0 @@
1/*
2 * linux/arch/arm/mach-omap2/irq.c
3 *
4 * Interrupt handler for OMAP2 boards.
5 *
6 * Copyright (C) 2005 Nokia Corporation
7 * Author: Paul Mundt <paul.mundt@nokia.com>
8 *
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file "COPYING" in the main directory of this archive
11 * for more details.
12 */
13#include <linux/kernel.h>
14#include <linux/module.h>
15#include <linux/init.h>
16#include <linux/interrupt.h>
17#include <linux/io.h>
18
19#include <asm/exception.h>
20#include <asm/mach/irq.h>
21#include <linux/irqdomain.h>
22#include <linux/of.h>
23#include <linux/of_address.h>
24#include <linux/of_irq.h>
25
26#include "soc.h"
27#include "iomap.h"
28#include "common.h"
29
30/* selected INTC register offsets */
31
32#define INTC_REVISION 0x0000
33#define INTC_SYSCONFIG 0x0010
34#define INTC_SYSSTATUS 0x0014
35#define INTC_SIR 0x0040
36#define INTC_CONTROL 0x0048
37#define INTC_PROTECTION 0x004C
38#define INTC_IDLE 0x0050
39#define INTC_THRESHOLD 0x0068
40#define INTC_MIR0 0x0084
41#define INTC_MIR_CLEAR0 0x0088
42#define INTC_MIR_SET0 0x008c
43#define INTC_PENDING_IRQ0 0x0098
44/* Number of IRQ state bits in each MIR register */
45#define IRQ_BITS_PER_REG 32
46
47#define OMAP2_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE)
48#define OMAP3_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE)
49#define INTCPS_SIR_IRQ_OFFSET 0x0040 /* omap2/3 active interrupt offset */
50#define ACTIVEIRQ_MASK 0x7f /* omap2/3 active interrupt bits */
51#define INTCPS_NR_MIR_REGS 3
52#define INTCPS_NR_IRQS 96
53
54/*
55 * OMAP2 has a number of different interrupt controllers, each interrupt
56 * controller is identified as its own "bank". Register definitions are
57 * fairly consistent for each bank, but not all registers are implemented
58 * for each bank.. when in doubt, consult the TRM.
59 */
60static struct omap_irq_bank {
61 void __iomem *base_reg;
62 unsigned int nr_irqs;
63} __attribute__ ((aligned(4))) irq_banks[] = {
64 {
65 /* MPU INTC */
66 .nr_irqs = 96,
67 },
68};
69
70static struct irq_domain *domain;
71
72/* Structure to save interrupt controller context */
73struct omap3_intc_regs {
74 u32 sysconfig;
75 u32 protection;
76 u32 idle;
77 u32 threshold;
78 u32 ilr[INTCPS_NR_IRQS];
79 u32 mir[INTCPS_NR_MIR_REGS];
80};
81
82/* INTC bank register get/set */
83
84static void intc_bank_write_reg(u32 val, struct omap_irq_bank *bank, u16 reg)
85{
86 writel_relaxed(val, bank->base_reg + reg);
87}
88
89static u32 intc_bank_read_reg(struct omap_irq_bank *bank, u16 reg)
90{
91 return readl_relaxed(bank->base_reg + reg);
92}
93
94/* XXX: FIQ and additional INTC support (only MPU at the moment) */
95static void omap_ack_irq(struct irq_data *d)
96{
97 intc_bank_write_reg(0x1, &irq_banks[0], INTC_CONTROL);
98}
99
100static void omap_mask_ack_irq(struct irq_data *d)
101{
102 irq_gc_mask_disable_reg(d);
103 omap_ack_irq(d);
104}
105
106static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank)
107{
108 unsigned long tmp;
109
110 tmp = intc_bank_read_reg(bank, INTC_REVISION) & 0xff;
111 pr_info("IRQ: Found an INTC at 0x%p (revision %ld.%ld) with %d interrupts\n",
112 bank->base_reg, tmp >> 4, tmp & 0xf, bank->nr_irqs);
113
114 tmp = intc_bank_read_reg(bank, INTC_SYSCONFIG);
115 tmp |= 1 << 1; /* soft reset */
116 intc_bank_write_reg(tmp, bank, INTC_SYSCONFIG);
117
118 while (!(intc_bank_read_reg(bank, INTC_SYSSTATUS) & 0x1))
119 /* Wait for reset to complete */;
120
121 /* Enable autoidle */
122 intc_bank_write_reg(1 << 0, bank, INTC_SYSCONFIG);
123}
124
125int omap_irq_pending(void)
126{
127 int i;
128
129 for (i = 0; i < ARRAY_SIZE(irq_banks); i++) {
130 struct omap_irq_bank *bank = irq_banks + i;
131 int irq;
132
133 for (irq = 0; irq < bank->nr_irqs; irq += 32)
134 if (intc_bank_read_reg(bank, INTC_PENDING_IRQ0 +
135 ((irq >> 5) << 5)))
136 return 1;
137 }
138 return 0;
139}
140
141static __init void
142omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num)
143{
144 struct irq_chip_generic *gc;
145 struct irq_chip_type *ct;
146
147 gc = irq_alloc_generic_chip("INTC", 1, irq_start, base,
148 handle_level_irq);
149 ct = gc->chip_types;
150 ct->chip.irq_ack = omap_mask_ack_irq;
151 ct->chip.irq_mask = irq_gc_mask_disable_reg;
152 ct->chip.irq_unmask = irq_gc_unmask_enable_reg;
153 ct->chip.flags |= IRQCHIP_SKIP_SET_WAKE;
154
155 ct->regs.enable = INTC_MIR_CLEAR0;
156 ct->regs.disable = INTC_MIR_SET0;
157 irq_setup_generic_chip(gc, IRQ_MSK(num), IRQ_GC_INIT_MASK_CACHE,
158 IRQ_NOREQUEST | IRQ_NOPROBE, 0);
159}
160
161static void __init omap_init_irq(u32 base, int nr_irqs,
162 struct device_node *node)
163{
164 void __iomem *omap_irq_base;
165 unsigned long nr_of_irqs = 0;
166 unsigned int nr_banks = 0;
167 int i, j, irq_base;
168
169 omap_irq_base = ioremap(base, SZ_4K);
170 if (WARN_ON(!omap_irq_base))
171 return;
172
173 irq_base = irq_alloc_descs(-1, 0, nr_irqs, 0);
174 if (irq_base < 0) {
175 pr_warn("Couldn't allocate IRQ numbers\n");
176 irq_base = 0;
177 }
178
179 domain = irq_domain_add_legacy(node, nr_irqs, irq_base, 0,
180 &irq_domain_simple_ops, NULL);
181
182 for (i = 0; i < ARRAY_SIZE(irq_banks); i++) {
183 struct omap_irq_bank *bank = irq_banks + i;
184
185 bank->nr_irqs = nr_irqs;
186
187 /* Static mapping, never released */
188 bank->base_reg = ioremap(base, SZ_4K);
189 if (!bank->base_reg) {
190 pr_err("Could not ioremap irq bank%i\n", i);
191 continue;
192 }
193
194 omap_irq_bank_init_one(bank);
195
196 for (j = 0; j < bank->nr_irqs; j += 32)
197 omap_alloc_gc(bank->base_reg + j, j + irq_base, 32);
198
199 nr_of_irqs += bank->nr_irqs;
200 nr_banks++;
201 }
202
203 pr_info("Total of %ld interrupts on %d active controller%s\n",
204 nr_of_irqs, nr_banks, nr_banks > 1 ? "s" : "");
205}
206
207void __init omap2_init_irq(void)
208{
209 omap_init_irq(OMAP24XX_IC_BASE, 96, NULL);
210}
211
212void __init omap3_init_irq(void)
213{
214 omap_init_irq(OMAP34XX_IC_BASE, 96, NULL);
215}
216
217void __init ti81xx_init_irq(void)
218{
219 omap_init_irq(OMAP34XX_IC_BASE, 128, NULL);
220}
221
222static inline void omap_intc_handle_irq(void __iomem *base_addr, struct pt_regs *regs)
223{
224 u32 irqnr;
225 int handled_irq = 0;
226
227 do {
228 irqnr = readl_relaxed(base_addr + 0x98);
229 if (irqnr)
230 goto out;
231
232 irqnr = readl_relaxed(base_addr + 0xb8);
233 if (irqnr)
234 goto out;
235
236 irqnr = readl_relaxed(base_addr + 0xd8);
237#if IS_ENABLED(CONFIG_SOC_TI81XX) || IS_ENABLED(CONFIG_SOC_AM33XX)
238 if (irqnr)
239 goto out;
240 irqnr = readl_relaxed(base_addr + 0xf8);
241#endif
242
243out:
244 if (!irqnr)
245 break;
246
247 irqnr = readl_relaxed(base_addr + INTCPS_SIR_IRQ_OFFSET);
248 irqnr &= ACTIVEIRQ_MASK;
249
250 if (irqnr) {
251 irqnr = irq_find_mapping(domain, irqnr);
252 handle_IRQ(irqnr, regs);
253 handled_irq = 1;
254 }
255 } while (irqnr);
256
257 /* If an irq is masked or deasserted while active, we will
258 * keep ending up here with no irq handled. So remove it from
259 * the INTC with an ack.*/
260 if (!handled_irq)
261 omap_ack_irq(NULL);
262}
263
264asmlinkage void __exception_irq_entry omap2_intc_handle_irq(struct pt_regs *regs)
265{
266 void __iomem *base_addr = OMAP2_IRQ_BASE;
267 omap_intc_handle_irq(base_addr, regs);
268}
269
270int __init intc_of_init(struct device_node *node,
271 struct device_node *parent)
272{
273 struct resource res;
274 u32 nr_irq = 96;
275
276 if (WARN_ON(!node))
277 return -ENODEV;
278
279 if (of_address_to_resource(node, 0, &res)) {
280 WARN(1, "unable to get intc registers\n");
281 return -EINVAL;
282 }
283
284 if (of_property_read_u32(node, "ti,intc-size", &nr_irq))
285 pr_warn("unable to get intc-size, default to %d\n", nr_irq);
286
287 omap_init_irq(res.start, nr_irq, of_node_get(node));
288
289 return 0;
290}
291
292static const struct of_device_id irq_match[] __initconst = {
293 { .compatible = "ti,omap2-intc", .data = intc_of_init, },
294 { }
295};
296
297void __init omap_intc_of_init(void)
298{
299 of_irq_init(irq_match);
300}
301
302#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_AM33XX)
303static struct omap3_intc_regs intc_context[ARRAY_SIZE(irq_banks)];
304
305void omap_intc_save_context(void)
306{
307 int ind = 0, i = 0;
308 for (ind = 0; ind < ARRAY_SIZE(irq_banks); ind++) {
309 struct omap_irq_bank *bank = irq_banks + ind;
310 intc_context[ind].sysconfig =
311 intc_bank_read_reg(bank, INTC_SYSCONFIG);
312 intc_context[ind].protection =
313 intc_bank_read_reg(bank, INTC_PROTECTION);
314 intc_context[ind].idle =
315 intc_bank_read_reg(bank, INTC_IDLE);
316 intc_context[ind].threshold =
317 intc_bank_read_reg(bank, INTC_THRESHOLD);
318 for (i = 0; i < INTCPS_NR_IRQS; i++)
319 intc_context[ind].ilr[i] =
320 intc_bank_read_reg(bank, (0x100 + 0x4*i));
321 for (i = 0; i < INTCPS_NR_MIR_REGS; i++)
322 intc_context[ind].mir[i] =
323 intc_bank_read_reg(&irq_banks[0], INTC_MIR0 +
324 (0x20 * i));
325 }
326}
327
328void omap_intc_restore_context(void)
329{
330 int ind = 0, i = 0;
331
332 for (ind = 0; ind < ARRAY_SIZE(irq_banks); ind++) {
333 struct omap_irq_bank *bank = irq_banks + ind;
334 intc_bank_write_reg(intc_context[ind].sysconfig,
335 bank, INTC_SYSCONFIG);
336 intc_bank_write_reg(intc_context[ind].sysconfig,
337 bank, INTC_SYSCONFIG);
338 intc_bank_write_reg(intc_context[ind].protection,
339 bank, INTC_PROTECTION);
340 intc_bank_write_reg(intc_context[ind].idle,
341 bank, INTC_IDLE);
342 intc_bank_write_reg(intc_context[ind].threshold,
343 bank, INTC_THRESHOLD);
344 for (i = 0; i < INTCPS_NR_IRQS; i++)
345 intc_bank_write_reg(intc_context[ind].ilr[i],
346 bank, (0x100 + 0x4*i));
347 for (i = 0; i < INTCPS_NR_MIR_REGS; i++)
348 intc_bank_write_reg(intc_context[ind].mir[i],
349 &irq_banks[0], INTC_MIR0 + (0x20 * i));
350 }
351 /* MIRs are saved and restore with other PRCM registers */
352}
353
354void omap3_intc_suspend(void)
355{
356 /* A pending interrupt would prevent OMAP from entering suspend */
357 omap_ack_irq(NULL);
358}
359
360void omap3_intc_prepare_idle(void)
361{
362 /*
363 * Disable autoidle as it can stall interrupt controller,
364 * cf. errata ID i540 for 3430 (all revisions up to 3.1.x)
365 */
366 intc_bank_write_reg(0, &irq_banks[0], INTC_SYSCONFIG);
367}
368
369void omap3_intc_resume_idle(void)
370{
371 /* Re-enable autoidle */
372 intc_bank_write_reg(1, &irq_banks[0], INTC_SYSCONFIG);
373}
374
375asmlinkage void __exception_irq_entry omap3_intc_handle_irq(struct pt_regs *regs)
376{
377 void __iomem *base_addr = OMAP3_IRQ_BASE;
378 omap_intc_handle_irq(base_addr, regs);
379}
380#endif /* CONFIG_ARCH_OMAP3 */
diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c
index c8ac72604207..c95346c94829 100644
--- a/arch/arm/mach-omap2/pdata-quirks.c
+++ b/arch/arm/mach-omap2/pdata-quirks.c
@@ -344,6 +344,8 @@ static struct pdata_init auxdata_quirks[] __initdata = {
344struct of_dev_auxdata omap_auxdata_lookup[] __initdata = { 344struct of_dev_auxdata omap_auxdata_lookup[] __initdata = {
345#ifdef CONFIG_MACH_NOKIA_N8X0 345#ifdef CONFIG_MACH_NOKIA_N8X0
346 OF_DEV_AUXDATA("ti,omap2420-mmc", 0x4809c000, "mmci-omap.0", NULL), 346 OF_DEV_AUXDATA("ti,omap2420-mmc", 0x4809c000, "mmci-omap.0", NULL),
347 OF_DEV_AUXDATA("menelaus", 0x72, "1-0072", &n8x0_menelaus_platform_data),
348 OF_DEV_AUXDATA("tlv320aic3x", 0x18, "2-0018", &n810_aic33_data),
347#endif 349#endif
348#ifdef CONFIG_ARCH_OMAP3 350#ifdef CONFIG_ARCH_OMAP3
349 OF_DEV_AUXDATA("ti,omap3-padconf", 0x48002030, "48002030.pinmux", &pcs_pdata), 351 OF_DEV_AUXDATA("ti,omap3-padconf", 0x48002030, "48002030.pinmux", &pcs_pdata),
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-16 15:30:11 -0500