14 files changed, 78 insertions, 14 deletions

diff --git a/arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c b/arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c
index 963e17aa205d..60a9e54dd20e 100644
--- a/arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c
+++ b/arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c
@@ -442,6 +442,13 @@ acpi_cpufreq_cpu_init (
                         (u32) data->acpi_data.states[i].transition_latency);
 
         cpufreq_frequency_table_get_attr(data->freq_table, policy->cpu);
+        
+        /*
+         * the first call to ->target() should result in us actually
+         * writing something to the appropriate registers.
+         */
+        data->resume = 1;
+        
         return (result);
 
  err_freqfree:
diff --git a/arch/i386/pci/acpi.c b/arch/i386/pci/acpi.c
index 2db65ec45dc3..42913f43feb0 100644
--- a/arch/i386/pci/acpi.c
+++ b/arch/i386/pci/acpi.c
@@ -30,6 +30,7 @@ static int __init pci_acpi_init(void)
         acpi_irq_penalty_init();
         pcibios_scanned++;
         pcibios_enable_irq = acpi_pci_irq_enable;
+        pcibios_disable_irq = acpi_pci_irq_disable;
 
         if (pci_routeirq) {
                 /*
diff --git a/arch/i386/pci/common.c b/arch/i386/pci/common.c
index 70bcd53451f6..ade5bc57c34c 100644
--- a/arch/i386/pci/common.c
+++ b/arch/i386/pci/common.c
@@ -254,3 +254,9 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
 
         return pcibios_enable_irq(dev);
 }
+
+void pcibios_disable_device (struct pci_dev *dev)
+{
+        if (pcibios_disable_irq)
+                pcibios_disable_irq(dev);
+}
diff --git a/arch/i386/pci/irq.c b/arch/i386/pci/irq.c
index d291fb7f1357..86348b68fda1 100644
--- a/arch/i386/pci/irq.c
+++ b/arch/i386/pci/irq.c
@@ -56,6 +56,7 @@ struct irq_router_handler {
 };
 
 int (*pcibios_enable_irq)(struct pci_dev *dev) = NULL;
+void (*pcibios_disable_irq)(struct pci_dev *dev) = NULL;
 
 /*
  *  Check passed address for the PCI IRQ Routing Table signature
diff --git a/arch/i386/pci/pci.h b/arch/i386/pci/pci.h
index a80f0f55ff51..127d53ad16be 100644
--- a/arch/i386/pci/pci.h
+++ b/arch/i386/pci/pci.h
@@ -73,3 +73,4 @@ extern int pcibios_scanned;
 extern spinlock_t pci_config_lock;
 
 extern int (*pcibios_enable_irq)(struct pci_dev *dev);
+extern void (*pcibios_disable_irq)(struct pci_dev *dev);
diff --git a/arch/ppc/kernel/head_44x.S b/arch/ppc/kernel/head_44x.S
index 6c7ae6052464..72ee8f33bde4 100644
--- a/arch/ppc/kernel/head_44x.S
+++ b/arch/ppc/kernel/head_44x.S
@@ -179,14 +179,14 @@ skpinv:	addi	r4,r4,1				/* Increment */
 4:
 #ifdef CONFIG_SERIAL_TEXT_DEBUG
         /*
-         * Add temporary UART mapping for early debug.  This
-         * mapping must be identical to that used by the early
-         * bootloader code since the same asm/serial.h parameters
-         * are used for polled operation.
+         * Add temporary UART mapping for early debug.
+         * We can map UART registers wherever we want as long as they don't
+         * interfere with other system mappings (e.g. with pinned entries).
+         * For an example of how we handle this - see ocotea.h.       --ebs
          */
         /* pageid fields */
         lis     r3,UART0_IO_BASE@h
-        ori     r3,r3,PPC44x_TLB_VALID | PPC44x_TLB_256M
+        ori     r3,r3,PPC44x_TLB_VALID | PPC44x_TLB_4K
 
         /* xlat fields */
         lis     r4,UART0_PHYS_IO_BASE@h         /* RPN depends on SoC */
@@ -196,7 +196,7 @@ skpinv:	addi	r4,r4,1				/* Increment */
         li      r5,0
         ori     r5,r5,(PPC44x_TLB_SW | PPC44x_TLB_SR | PPC44x_TLB_I | PPC44x_TLB_G)
 
-        li      r0,1                    /* TLB slot 1 */
+        li      r0,0                    /* TLB slot 0 */
 
         tlbwe   r3,r0,PPC44x_TLB_PAGEID /* Load the pageid fields */
         tlbwe   r4,r0,PPC44x_TLB_XLAT   /* Load the translation fields */
diff --git a/arch/ppc/kernel/misc.S b/arch/ppc/kernel/misc.S
index 191a8def3bdb..c2fb85b49a11 100644
--- a/arch/ppc/kernel/misc.S
+++ b/arch/ppc/kernel/misc.S
@@ -1451,3 +1451,6 @@ _GLOBAL(sys_call_table)
         .long sys_waitid
         .long sys_ioprio_set
         .long sys_ioprio_get
+        .long sys_inotify_init          /* 275 */
+        .long sys_inotify_add_watch
+        .long sys_inotify_rm_watch
diff --git a/arch/ppc/platforms/4xx/ebony.c b/arch/ppc/platforms/4xx/ebony.c
index cd11734ef7c5..509e69a095f0 100644
--- a/arch/ppc/platforms/4xx/ebony.c
+++ b/arch/ppc/platforms/4xx/ebony.c
@@ -7,7 +7,7 @@
  * Copyright 2002-2005 MontaVista Software Inc.
  *
  * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
- * Copyright (c) 2003, 2004 Zultys Technologies
+ * Copyright (c) 2003-2005 Zultys Technologies
  *
  * This program is free software; you can redistribute  it and/or modify it
  * under  the terms of  the GNU General  Public License as published by the
@@ -50,6 +50,7 @@
 #include <asm/bootinfo.h>
 #include <asm/ppc4xx_pic.h>
 #include <asm/ppcboot.h>
+#include <asm/tlbflush.h>
 
 #include <syslib/gen550.h>
 #include <syslib/ibm440gp_common.h>
@@ -248,6 +249,9 @@ ebony_early_serial_map(void)
 #if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
         /* Configure debug serial access */
         gen550_init(0, &port);
+
+        /* Purge TLB entry added in head_44x.S for early serial access */
+        _tlbie(UART0_IO_BASE);
 #endif
 
         port.membase = ioremap64(PPC440GP_UART1_ADDR, 8);
diff --git a/arch/ppc/platforms/4xx/ebony.h b/arch/ppc/platforms/4xx/ebony.h
index 47c391c9174d..d08faa46a0ae 100644
--- a/arch/ppc/platforms/4xx/ebony.h
+++ b/arch/ppc/platforms/4xx/ebony.h
@@ -56,9 +56,18 @@
  * Serial port defines
  */
 
-/* OpenBIOS defined UART mappings, used before early_serial_setup */
+#if defined(__BOOTER__)
+/* OpenBIOS defined UART mappings, used by bootloader shim */
 #define UART0_IO_BASE   0xE0000200
 #define UART1_IO_BASE   0xE0000300
+#else
+/* head_44x.S created UART mapping, used before early_serial_setup.
+ * We cannot use default OpenBIOS UART mappings because they
+ * don't work for configurations with more than 512M RAM.    --ebs
+ */
+#define UART0_IO_BASE   0xF0000200
+#define UART1_IO_BASE   0xF0000300
+#endif
 
 /* external Epson SG-615P */
 #define BASE_BAUD       691200
@@ -66,7 +75,7 @@
 #define STD_UART_OP(num)                                        \
         { 0, BASE_BAUD, 0, UART##num##_INT,                     \
                 (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST),        \
-                iomem_base: UART##num##_IO_BASE,                \
+                iomem_base: (void*)UART##num##_IO_BASE,         \
                 io_type: SERIAL_IO_MEM},
 
 #define SERIAL_PORT_DFNS        \
diff --git a/arch/ppc/platforms/4xx/ocotea.c b/arch/ppc/platforms/4xx/ocotea.c
index 5f82a6bc7046..8fc34a344769 100644
--- a/arch/ppc/platforms/4xx/ocotea.c
+++ b/arch/ppc/platforms/4xx/ocotea.c
@@ -48,6 +48,7 @@
 #include <asm/bootinfo.h>
 #include <asm/ppc4xx_pic.h>
 #include <asm/ppcboot.h>
+#include <asm/tlbflush.h>
 
 #include <syslib/gen550.h>
 #include <syslib/ibm440gx_common.h>
@@ -266,6 +267,9 @@ ocotea_early_serial_map(void)
 #if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
         /* Configure debug serial access */
         gen550_init(0, &port);
+
+        /* Purge TLB entry added in head_44x.S for early serial access */
+        _tlbie(UART0_IO_BASE);
 #endif
 
         port.membase = ioremap64(PPC440GX_UART1_ADDR, 8);
diff --git a/arch/ppc/platforms/4xx/ocotea.h b/arch/ppc/platforms/4xx/ocotea.h
index 202dc8251190..33251153ac5f 100644
--- a/arch/ppc/platforms/4xx/ocotea.h
+++ b/arch/ppc/platforms/4xx/ocotea.h
@@ -55,15 +55,24 @@
  */
 #define RS_TABLE_SIZE   2
 
-/* OpenBIOS defined UART mappings, used before early_serial_setup */
+#if defined(__BOOTER__)
+/* OpenBIOS defined UART mappings, used by bootloader shim */
 #define UART0_IO_BASE   0xE0000200
 #define UART1_IO_BASE   0xE0000300
+#else
+/* head_44x.S created UART mapping, used before early_serial_setup.
+ * We cannot use default OpenBIOS UART mappings because they
+ * don't work for configurations with more than 512M RAM.    --ebs
+ */
+#define UART0_IO_BASE   0xF0000200
+#define UART1_IO_BASE   0xF0000300
+#endif
 
 #define BASE_BAUD       11059200/16
 #define STD_UART_OP(num)                                        \
         { 0, BASE_BAUD, 0, UART##num##_INT,                     \
                 (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST),        \
-                iomem_base: UART##num##_IO_BASE,                \
+                iomem_base: (void*)UART##num##_IO_BASE,         \
                 io_type: SERIAL_IO_MEM},
 
 #define SERIAL_PORT_DFNS        \
diff --git a/arch/ppc64/kernel/misc.S b/arch/ppc64/kernel/misc.S
index 59f4f9973818..a05b50b738e9 100644
--- a/arch/ppc64/kernel/misc.S
+++ b/arch/ppc64/kernel/misc.S
@@ -1129,6 +1129,9 @@ _GLOBAL(sys_call_table32)
         .llong .compat_sys_waitid
         .llong .sys32_ioprio_set
         .llong .sys32_ioprio_get
+        .llong .sys_inotify_init        /* 275 */
+        .llong .sys_inotify_add_watch
+        .llong .sys_inotify_rm_watch
 
         .balign 8
 _GLOBAL(sys_call_table)
@@ -1407,3 +1410,6 @@ _GLOBAL(sys_call_table)
         .llong .sys_waitid
         .llong .sys_ioprio_set
         .llong .sys_ioprio_get
+        .llong .sys_inotify_init        /* 275 */
+        .llong .sys_inotify_add_watch
+        .llong .sys_inotify_rm_watch
diff --git a/arch/x86_64/kernel/mpparse.c b/arch/x86_64/kernel/mpparse.c
index 08abf9f5b159..79c362d03e2e 100644
--- a/arch/x86_64/kernel/mpparse.c
+++ b/arch/x86_64/kernel/mpparse.c
@@ -970,8 +970,21 @@ int mp_register_gsi(u32 gsi, int edge_level, int active_high_low)
                  * due to unused I/O APIC pins.
                  */
                 int irq = gsi;
-                gsi = pci_irq++;
-                gsi_to_irq[irq] = gsi;
+                if (gsi < MAX_GSI_NUM) {
+                        if (gsi > 15)
+                                gsi = pci_irq++;
+#ifdef CONFIG_ACPI_BUS
+                        /*
+                         * Don't assign IRQ used by ACPI SCI
+                         */
+                        if (gsi == acpi_fadt.sci_int)
+                                gsi = pci_irq++;
+#endif
+                        gsi_to_irq[irq] = gsi;
+                } else {
+                        printk(KERN_ERR "GSI %u is too high\n", gsi);
+                        return gsi;
+                }
         }
 
         io_apic_set_pci_routing(ioapic, ioapic_pin, gsi,
diff --git a/arch/x86_64/lib/csum-copy.S b/arch/x86_64/lib/csum-copy.S
index 01808ec37836..72fd55ee896e 100644
--- a/arch/x86_64/lib/csum-copy.S
+++ b/arch/x86_64/lib/csum-copy.S
@@ -188,8 +188,8 @@ csum_partial_copy_generic:
         source
         movw (%rdi),%bx
         adcl %ebx,%eax
-        dest
         decl %ecx
+        dest
         movw %bx,(%rsi)
         leaq 2(%rdi),%rdi
         leaq 2(%rsi),%rsi