1 files changed, 6 insertions, 6 deletions

diff --git a/arch/ppc/kernel/head_44x.S b/arch/ppc/kernel/head_44x.S
index 6c7ae6052464..72ee8f33bde4 100644
--- a/arch/ppc/kernel/head_44x.S
+++ b/arch/ppc/kernel/head_44x.S
@@ -179,14 +179,14 @@ skpinv:	addi	r4,r4,1				/* Increment */
 4:
 #ifdef CONFIG_SERIAL_TEXT_DEBUG
         /*
-         * Add temporary UART mapping for early debug.  This
-         * mapping must be identical to that used by the early
-         * bootloader code since the same asm/serial.h parameters
-         * are used for polled operation.
+         * Add temporary UART mapping for early debug.
+         * We can map UART registers wherever we want as long as they don't
+         * interfere with other system mappings (e.g. with pinned entries).
+         * For an example of how we handle this - see ocotea.h.       --ebs
          */
         /* pageid fields */
         lis     r3,UART0_IO_BASE@h
-        ori     r3,r3,PPC44x_TLB_VALID | PPC44x_TLB_256M
+        ori     r3,r3,PPC44x_TLB_VALID | PPC44x_TLB_4K
 
         /* xlat fields */
         lis     r4,UART0_PHYS_IO_BASE@h         /* RPN depends on SoC */
@@ -196,7 +196,7 @@ skpinv:	addi	r4,r4,1				/* Increment */
         li      r5,0
         ori     r5,r5,(PPC44x_TLB_SW | PPC44x_TLB_SR | PPC44x_TLB_I | PPC44x_TLB_G)
 
-        li      r0,1                    /* TLB slot 1 */
+        li      r0,0                    /* TLB slot 0 */
 
         tlbwe   r3,r0,PPC44x_TLB_PAGEID /* Load the pageid fields */
         tlbwe   r4,r0,PPC44x_TLB_XLAT   /* Load the translation fields */