173 files changed, 3968 insertions, 1709 deletions

diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 5aecda05e0da..a4e3a93bf2d4 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -312,6 +312,26 @@ config MATH_EMULATION
           such as fsqrt on cores that do have an FPU but do not implement
           them (such as Freescale BookE).
 
+choice
+        prompt "Math emulation options"
+        default MATH_EMULATION_FULL
+        depends on MATH_EMULATION
+
+config  MATH_EMULATION_FULL
+        bool "Emulate all the floating point instructions"
+        ---help---
+          Select this option will enable the kernel to support to emulate
+          all the floating point instructions. If your SoC doesn't have
+          a FPU, you should select this.
+
+config MATH_EMULATION_HW_UNIMPLEMENTED
+        bool "Just emulate the FPU unimplemented instructions"
+        ---help---
+          Select this if you know there does have a hardware FPU on your
+          SoC, but some floating point instructions are not implemented by that.
+
+endchoice
+
 config PPC_TRANSACTIONAL_MEM
        bool "Transactional Memory support for POWERPC"
        depends on PPC_BOOK3S_64
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index 967fd23ace78..51cfb78d4061 100644
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -88,13 +88,30 @@ CFLAGS-$(CONFIG_PPC64)	+= $(call cc-option,-mcmodel=medium,-mminimal-toc)
 CFLAGS-$(CONFIG_PPC64)  += $(call cc-option,-mno-pointers-to-nested-functions)
 CFLAGS-$(CONFIG_PPC32)  := -ffixed-r2 -mmultiple
 
+ifeq ($(CONFIG_PPC_BOOK3S_64),y)
 CFLAGS-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=power7,-mtune=power4)
+else
+CFLAGS-$(CONFIG_GENERIC_CPU) += -mcpu=powerpc64
+endif
+
 CFLAGS-$(CONFIG_CELL_CPU) += $(call cc-option,-mcpu=cell)
 CFLAGS-$(CONFIG_POWER4_CPU) += $(call cc-option,-mcpu=power4)
 CFLAGS-$(CONFIG_POWER5_CPU) += $(call cc-option,-mcpu=power5)
 CFLAGS-$(CONFIG_POWER6_CPU) += $(call cc-option,-mcpu=power6)
 CFLAGS-$(CONFIG_POWER7_CPU) += $(call cc-option,-mcpu=power7)
 
+E5500_CPU := $(call cc-option,-mcpu=e500mc64,-mcpu=powerpc64)
+CFLAGS-$(CONFIG_E5500_CPU) += $(E5500_CPU)
+CFLAGS-$(CONFIG_E6500_CPU) += $(call cc-option,-mcpu=e6500,$(E5500_CPU))
+
+ifeq ($(CONFIG_PPC32),y)
+ifeq ($(CONFIG_PPC_E500MC),y)
+CFLAGS-y += $(call cc-option,-mcpu=e500mc,-mcpu=powerpc)
+else
+CFLAGS-$(CONFIG_E500) += $(call cc-option,-mcpu=8540 -msoft-float,-mcpu=powerpc)
+endif
+endif
+
 CFLAGS-$(CONFIG_TUNE_CELL) += $(call cc-option,-mtune=cell)
 
 KBUILD_CPPFLAGS += -Iarch/$(ARCH)
@@ -139,7 +156,6 @@ endif
 
 cpu-as-$(CONFIG_4xx)            += -Wa,-m405
 cpu-as-$(CONFIG_ALTIVEC)        += -Wa,-maltivec
-cpu-as-$(CONFIG_E500)           += -Wa,-me500
 cpu-as-$(CONFIG_E200)           += -Wa,-me200
 
 KBUILD_AFLAGS += $(cpu-as-y)
diff --git a/arch/powerpc/boot/.gitignore b/arch/powerpc/boot/.gitignore
index c32ae5ce9fff..554734ff302e 100644
--- a/arch/powerpc/boot/.gitignore
+++ b/arch/powerpc/boot/.gitignore
@@ -22,6 +22,7 @@ zImage.initrd
 zImage.bin.*
 zImage.chrp
 zImage.coff
+zImage.epapr
 zImage.holly
 zImage.*lds
 zImage.miboot
diff --git a/arch/powerpc/boot/dts/ac14xx.dts b/arch/powerpc/boot/dts/ac14xx.dts
index a27a4609bb42..a543c4088cba 100644
--- a/arch/powerpc/boot/dts/ac14xx.dts
+++ b/arch/powerpc/boot/dts/ac14xx.dts
@@ -10,7 +10,7 @@
  */
 
 
-/include/ "mpc5121.dtsi"
+#include <mpc5121.dtsi>
 
 / {
         model = "ac14xx";
diff --git a/arch/powerpc/boot/dts/b4420qds.dts b/arch/powerpc/boot/dts/b4420qds.dts
index 923156d03b30..508dbdf33c81 100644
--- a/arch/powerpc/boot/dts/b4420qds.dts
+++ b/arch/powerpc/boot/dts/b4420qds.dts
@@ -33,7 +33,7 @@
  */
 
 /include/ "fsl/b4420si-pre.dtsi"
-/include/ "b4qds.dts"
+/include/ "b4qds.dtsi"
 
 / {
         model = "fsl,B4420QDS";
diff --git a/arch/powerpc/boot/dts/b4860qds.dts b/arch/powerpc/boot/dts/b4860qds.dts
index 78907f38bb77..6bb3707ffe3d 100644
--- a/arch/powerpc/boot/dts/b4860qds.dts
+++ b/arch/powerpc/boot/dts/b4860qds.dts
@@ -33,7 +33,7 @@
  */
 
 /include/ "fsl/b4860si-pre.dtsi"
-/include/ "b4qds.dts"
+/include/ "b4qds.dtsi"
 
 / {
         model = "fsl,B4860QDS";
diff --git a/arch/powerpc/boot/dts/b4qds.dts b/arch/powerpc/boot/dts/b4qds.dtsi
index e6d2f8f90544..e6d2f8f90544 100644
--- a/arch/powerpc/boot/dts/b4qds.dts
+++ b/arch/powerpc/boot/dts/b4qds.dtsi
diff --git a/arch/powerpc/boot/dts/c293pcie.dts b/arch/powerpc/boot/dts/c293pcie.dts
new file mode 100644
index 000000000000..1238bda8901f
--- /dev/null
+++ b/arch/powerpc/boot/dts/c293pcie.dts
@@ -0,0 +1,223 @@
+/*
+ * C293 PCIE Device Tree Source
+ *
+ * Copyright 2013 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "fsl/c293si-pre.dtsi"
+
+/ {
+        model = "fsl,C293PCIE";
+        compatible = "fsl,C293PCIE";
+
+        memory {
+                device_type = "memory";
+        };
+
+        ifc: ifc@fffe1e000 {
+                reg = <0xf 0xffe1e000 0 0x2000>;
+                ranges = <0x0 0x0 0xf 0xec000000 0x04000000
+                          0x2 0x0 0xf 0xffdf0000 0x00010000>;
+
+        };
+
+        soc: soc@fffe00000 {
+                ranges = <0x0 0xf 0xffe00000 0x100000>;
+        };
+
+        pci0: pcie@fffe0a000 {
+                reg = <0xf 0xffe0a000 0 0x1000>;
+                ranges = <0x2000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000
+                          0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
+                pcie@0 {
+                        ranges = <0x2000000 0x0 0x80000000
+                                  0x2000000 0x0 0x80000000
+                                  0x0 0x20000000
+
+                                  0x1000000 0x0 0x0
+                                  0x1000000 0x0 0x0
+                                  0x0 0x100000>;
+                };
+        };
+};
+
+&ifc {
+        nor@0,0 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "cfi-flash";
+                reg = <0x0 0x0 0x4000000>;
+                bank-width = <2>;
+                device-width = <1>;
+
+                partition@0 {
+                        /* 1MB for DTB Image */
+                        reg = <0x0 0x00100000>;
+                        label = "NOR DTB Image";
+                };
+
+                partition@100000 {
+                        /* 8 MB for Linux Kernel Image */
+                        reg = <0x00100000 0x00800000>;
+                        label = "NOR Linux Kernel Image";
+                };
+
+                partition@900000 {
+                        /* 53MB for rootfs */
+                        reg = <0x00900000 0x03500000>;
+                        label = "NOR Rootfs Image";
+                };
+
+                partition@3e00000 {
+                        /* 1MB for blob encrypted key */
+                        reg = <0x03e00000 0x00100000>;
+                        label = "NOR blob encrypted key";
+                };
+
+                partition@3f00000 {
+                        /* 512KB for u-boot Bootloader Image and evn */
+                        reg = <0x03f00000 0x00100000>;
+                        label = "NOR U-Boot Image";
+                        read-only;
+                };
+        };
+
+        nand@1,0 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "fsl,ifc-nand";
+                reg = <0x1 0x0 0x10000>;
+
+                partition@0 {
+                        /* This location must not be altered  */
+                        /* 1MB for u-boot Bootloader Image */
+                        reg = <0x0 0x00100000>;
+                        label = "NAND U-Boot Image";
+                        read-only;
+                };
+
+                partition@100000 {
+                        /* 1MB for DTB Image */
+                        reg = <0x00100000 0x00100000>;
+                        label = "NAND DTB Image";
+                };
+
+                partition@200000 {
+                        /* 16MB for Linux Kernel Image */
+                        reg = <0x00200000 0x01000000>;
+                        label = "NAND Linux Kernel Image";
+                };
+
+                partition@1200000 {
+                        /* 4078MB for Root file System Image */
+                        reg = <0x00600000 0xfee00000>;
+                        label = "NAND RFS Image";
+                };
+        };
+
+        cpld@2,0 {
+                compatible = "fsl,c293pcie-cpld";
+                reg = <0x2 0x0 0x20>;
+        };
+};
+
+&soc {
+        i2c@3000 {
+                eeprom@50 {
+                        compatible = "st,24c1024";
+                        reg = <0x50>;
+                };
+
+                adt7461@4c {
+                        compatible = "adi,adt7461";
+                        reg = <0x4c>;
+                };
+        };
+
+        spi@7000 {
+                flash@0 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "spansion,s25sl12801";
+                        reg = <0>;
+                        spi-max-frequency = <50000000>;
+
+                        partition@0 {
+                                /* 1MB for u-boot Bootloader Image */
+                                /* 1MB for Environment */
+                                reg = <0x0 0x00100000>;
+                                label = "SPI Flash U-Boot Image";
+                                read-only;
+                        };
+
+                        partition@100000 {
+                                /* 512KB for DTB Image */
+                                reg = <0x00100000 0x00080000>;
+                                label = "SPI Flash DTB Image";
+                        };
+
+                        partition@180000 {
+                                /* 4MB for Linux Kernel Image */
+                                reg = <0x00180000 0x00400000>;
+                                label = "SPI Flash Linux Kernel Image";
+                        };
+
+                        partition@580000 {
+                                /* 10.5MB for RFS Image */
+                                reg = <0x00580000 0x00a80000>;
+                                label = "SPI Flash RFS Image";
+                        };
+                };
+        };
+
+        mdio@24000 {
+                phy0: ethernet-phy@0 {
+                        interrupts = <2 1 0 0>;
+                        reg = <0x0>;
+                };
+
+                phy1: ethernet-phy@1 {
+                        interrupts = <2 1 0 0>;
+                        reg = <0x2>;
+                };
+        };
+
+        enet0: ethernet@b0000 {
+                phy-handle = <&phy0>;
+                phy-connection-type = "rgmii-id";
+        };
+
+        enet1: ethernet@b1000 {
+                phy-handle = <&phy1>;
+                phy-connection-type = "rgmii-id";
+        };
+};
+/include/ "fsl/c293si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
index 73991547c69b..4c617bf8cdb2 100644
--- a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
@@ -204,7 +204,7 @@
                 };
         };
 
-/include/ "qoriq-mpic.dtsi"
+/include/ "qoriq-mpic4.3.dtsi"
 
         guts: global-utilities@e0000 {
                 compatible = "fsl,b4-device-config";
diff --git a/arch/powerpc/boot/dts/fsl/c293si-post.dtsi b/arch/powerpc/boot/dts/fsl/c293si-post.dtsi
new file mode 100644
index 000000000000..bd208320bff5
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/c293si-post.dtsi
@@ -0,0 +1,193 @@
+/*
+ * C293 Silicon/SoC Device Tree Source (post include)
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&ifc {
+        #address-cells = <2>;
+        #size-cells = <1>;
+        compatible = "fsl,ifc", "simple-bus";
+        interrupts = <19 2 0 0>;
+};
+
+/* controller at 0xa000 */
+&pci0 {
+        compatible = "fsl,qoriq-pcie-v2.2", "fsl,qoriq-pcie";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0 255>;
+        clock-frequency = <33333333>;
+        interrupts = <16 2 0 0>;
+
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <16 2 0 0>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
+                        0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
+                        0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
+                        0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
+                        >;
+        };
+};
+
+&soc {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        device_type = "soc";
+        compatible = "simple-bus";
+        bus-frequency = <0>;            // Filled out by uboot.
+
+        ecm-law@0 {
+                compatible = "fsl,ecm-law";
+                reg = <0x0 0x1000>;
+                fsl,num-laws = <12>;
+        };
+
+        ecm@1000 {
+                compatible = "fsl,c293-ecm", "fsl,ecm";
+                reg = <0x1000 0x1000>;
+                interrupts = <16 2 0 0>;
+        };
+
+        memory-controller@2000 {
+                compatible = "fsl,c293-memory-controller";
+                reg = <0x2000 0x1000>;
+                interrupts = <16 2 0 0>;
+        };
+
+/include/ "pq3-i2c-0.dtsi"
+/include/ "pq3-i2c-1.dtsi"
+/include/ "pq3-duart-0.dtsi"
+/include/ "pq3-espi-0.dtsi"
+        spi0: spi@7000 {
+                fsl,espi-num-chipselects = <1>;
+        };
+
+/include/ "pq3-gpio-0.dtsi"
+        L2: l2-cache-controller@20000 {
+                compatible = "fsl,c293-l2-cache-controller";
+                reg = <0x20000 0x1000>;
+                cache-line-size = <32>; // 32 bytes
+                cache-size = <0x80000>; // L2,512K
+                interrupts = <16 2 0 0>;
+        };
+
+/include/ "pq3-dma-0.dtsi"
+/include/ "pq3-esdhc-0.dtsi"
+        sdhc@2e000 {
+                compatible = "fsl,c293-esdhc", "fsl,esdhc";
+                sdhci,auto-cmd12;
+        };
+
+        crypto@80000 {
+/include/ "qoriq-sec6.0-0.dtsi"
+        };
+
+        crypto@80000 {
+                reg = <0x80000 0x20000>;
+                ranges = <0x0 0x80000 0x20000>;
+
+                jr@1000{
+                        interrupts = <45 2 0 0>;
+                };
+                jr@2000{
+                        interrupts = <57 2 0 0>;
+                };
+        };
+
+        crypto@a0000 {
+/include/ "qoriq-sec6.0-0.dtsi"
+        };
+
+        crypto@a0000 {
+                reg = <0xa0000 0x20000>;
+                ranges = <0x0 0xa0000 0x20000>;
+
+                jr@1000{
+                        interrupts = <49 2 0 0>;
+                };
+                jr@2000{
+                        interrupts = <50 2 0 0>;
+                };
+        };
+
+        crypto@c0000 {
+/include/ "qoriq-sec6.0-0.dtsi"
+        };
+
+        crypto@c0000 {
+                reg = <0xc0000 0x20000>;
+                ranges = <0x0 0xc0000 0x20000>;
+
+                jr@1000{
+                        interrupts = <55 2 0 0>;
+                };
+                jr@2000{
+                        interrupts = <56 2 0 0>;
+                };
+        };
+
+/include/ "pq3-mpic.dtsi"
+/include/ "pq3-mpic-timer-B.dtsi"
+
+/include/ "pq3-etsec2-0.dtsi"
+        enet0: ethernet@b0000 {
+                queue-group@b0000 {
+                        reg = <0x10000 0x1000>;
+                        fsl,rx-bit-map = <0xff>;
+                        fsl,tx-bit-map = <0xff>;
+                };
+        };
+
+/include/ "pq3-etsec2-1.dtsi"
+        enet1: ethernet@b1000 {
+                queue-group@b1000 {
+                        reg = <0x11000 0x1000>;
+                        fsl,rx-bit-map = <0xff>;
+                        fsl,tx-bit-map = <0xff>;
+                };
+        };
+
+        global-utilities@e0000 {
+                compatible = "fsl,c293-guts";
+                reg = <0xe0000 0x1000>;
+                fsl,has-rstcr;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/c293si-pre.dtsi b/arch/powerpc/boot/dts/fsl/c293si-pre.dtsi
new file mode 100644
index 000000000000..065049d76245
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/c293si-pre.dtsi
@@ -0,0 +1,63 @@
+/*
+ * C293 Silicon/SoC Device Tree Source (pre include)
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/dts-v1/;
+
+/include/ "e500v2_power_isa.dtsi"
+
+/ {
+        compatible = "fsl,C293";
+        #address-cells = <2>;
+        #size-cells = <2>;
+        interrupt-parent = <&mpic>;
+
+        aliases {
+                serial0 = &serial0;
+                serial1 = &serial1;
+                ethernet0 = &enet0;
+                ethernet1 = &enet1;
+                pci0 = &pci0;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,e500v2@0 {
+                        device_type = "cpu";
+                        reg = <0x0>;
+                        next-level-cache = <&L2>;
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-mpic4.3.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-mpic4.3.dtsi
new file mode 100644
index 000000000000..64f713c24825
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-mpic4.3.dtsi
@@ -0,0 +1,149 @@
+/*
+ * QorIQ MPIC device tree stub [ controller @ offset 0x40000 ]
+ *
+ * Copyright 2013 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+mpic: pic@40000 {
+        interrupt-controller;
+        #address-cells = <0>;
+        #interrupt-cells = <4>;
+        reg = <0x40000 0x40000>;
+        compatible = "fsl,mpic";
+        device_type = "open-pic";
+        clock-frequency = <0x0>;
+};
+
+timer@41100 {
+        compatible = "fsl,mpic-global-timer";
+        reg = <0x41100 0x100 0x41300 4>;
+        interrupts = <0 0 3 0
+                      1 0 3 0
+                      2 0 3 0
+                      3 0 3 0>;
+};
+
+msi0: msi@41600 {
+        compatible = "fsl,mpic-msi-v4.3";
+        reg = <0x41600 0x200 0x44148 4>;
+        interrupts = <
+                0xe0 0 0 0
+                0xe1 0 0 0
+                0xe2 0 0 0
+                0xe3 0 0 0
+                0xe4 0 0 0
+                0xe5 0 0 0
+                0xe6 0 0 0
+                0xe7 0 0 0
+                0x100 0 0 0
+                0x101 0 0 0
+                0x102 0 0 0
+                0x103 0 0 0
+                0x104 0 0 0
+                0x105 0 0 0
+                0x106 0 0 0
+                0x107 0 0 0>;
+};
+
+msi1: msi@41800 {
+        compatible = "fsl,mpic-msi-v4.3";
+        reg = <0x41800 0x200 0x45148 4>;
+        interrupts = <
+                0xe8 0 0 0
+                0xe9 0 0 0
+                0xea 0 0 0
+                0xeb 0 0 0
+                0xec 0 0 0
+                0xed 0 0 0
+                0xee 0 0 0
+                0xef 0 0 0
+                0x108 0 0 0
+                0x109 0 0 0
+                0x10a 0 0 0
+                0x10b 0 0 0
+                0x10c 0 0 0
+                0x10d 0 0 0
+                0x10e 0 0 0
+                0x10f 0 0 0>;
+};
+
+msi2: msi@41a00 {
+        compatible = "fsl,mpic-msi-v4.3";
+        reg = <0x41a00 0x200 0x46148 4>;
+        interrupts = <
+                0xf0 0 0 0
+                0xf1 0 0 0
+                0xf2 0 0 0
+                0xf3 0 0 0
+                0xf4 0 0 0
+                0xf5 0 0 0
+                0xf6 0 0 0
+                0xf7 0 0 0
+                0x110 0 0 0
+                0x111 0 0 0
+                0x112 0 0 0
+                0x113 0 0 0
+                0x114 0 0 0
+                0x115 0 0 0
+                0x116 0 0 0
+                0x117 0 0 0>;
+};
+
+msi3: msi@41c00 {
+        compatible = "fsl,mpic-msi-v4.3";
+        reg = <0x41c00 0x200 0x47148 4>;
+        interrupts = <
+                0xf8 0 0 0
+                0xf9 0 0 0
+                0xfa 0 0 0
+                0xfb 0 0 0
+                0xfc 0 0 0
+                0xfd 0 0 0
+                0xfe 0 0 0
+                0xff 0 0 0
+                0x118 0 0 0
+                0x119 0 0 0
+                0x11a 0 0 0
+                0x11b 0 0 0
+                0x11c 0 0 0
+                0x11d 0 0 0
+                0x11e 0 0 0
+                0x11f 0 0 0>;
+};
+
+timer@42100 {
+        compatible = "fsl,mpic-global-timer";
+        reg = <0x42100 0x100 0x42300 4>;
+        interrupts = <4 0 3 0
+                      5 0 3 0
+                      6 0 3 0
+                      7 0 3 0>;
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-sec6.0-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-sec6.0-0.dtsi
new file mode 100644
index 000000000000..f75b4f820c3c
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-sec6.0-0.dtsi
@@ -0,0 +1,56 @@
+/*
+ * QorIQ Sec/Crypto 6.0 device tree stub
+ *
+ * Copyright 2013 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+        compatible = "fsl,sec-v6.0";
+        fsl,sec-era = <6>;
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        jr@1000 {
+                compatible = "fsl,sec-v6.0-job-ring",
+                             "fsl,sec-v5.2-job-ring",
+                             "fsl,sec-v5.0-job-ring",
+                             "fsl,sec-v4.4-job-ring",
+                             "fsl,sec-v4.0-job-ring";
+                reg        = <0x1000 0x1000>;
+        };
+
+        jr@2000 {
+                compatible = "fsl,sec-v6.0-job-ring",
+                             "fsl,sec-v5.2-job-ring",
+                             "fsl,sec-v5.0-job-ring",
+                             "fsl,sec-v4.4-job-ring",
+                             "fsl,sec-v4.0-job-ring";
+                reg        = <0x2000 0x1000>;
+        };
diff --git a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
index bd611a9cad32..510afa362de1 100644
--- a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
@@ -358,7 +358,7 @@
                         16 2 1 30>;
         };
 
-/include/ "qoriq-mpic.dtsi"
+/include/ "qoriq-mpic4.3.dtsi"
 
         guts: global-utilities@e0000 {
                 compatible = "fsl,t4240-device-config", "fsl,qoriq-device-config-2.0";
diff --git a/arch/powerpc/boot/dts/include/dt-bindings b/arch/powerpc/boot/dts/include/dt-bindings
new file mode 120000
index 000000000000..08c00e4972fa
--- /dev/null
+++ b/arch/powerpc/boot/dts/include/dt-bindings
@@ -0,0 +1 @@
+../../../../../include/dt-bindings
\ No newline at end of file
diff --git a/arch/powerpc/boot/dts/mpc5121ads.dts b/arch/powerpc/boot/dts/mpc5121ads.dts
index 7d3cb79185cb..c228a0a232a6 100644
--- a/arch/powerpc/boot/dts/mpc5121ads.dts
+++ b/arch/powerpc/boot/dts/mpc5121ads.dts
@@ -9,7 +9,7 @@
  * option) any later version.
  */
 
-/include/ "mpc5121.dtsi"
+#include <mpc5121.dtsi>
 
 / {
         model = "mpc5121ads";
diff --git a/arch/powerpc/boot/dts/p1020rdb-pd.dts b/arch/powerpc/boot/dts/p1020rdb-pd.dts
new file mode 100644
index 000000000000..987017ea36b6
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1020rdb-pd.dts
@@ -0,0 +1,280 @@
+/*
+ * P1020 RDB-PD Device Tree Source (32-bit address map)
+ *
+ * Copyright 2013 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "fsl/p1020si-pre.dtsi"
+/ {
+        model = "fsl,P1020RDB-PD";
+        compatible = "fsl,P1020RDB-PD";
+
+        memory {
+                device_type = "memory";
+        };
+
+        lbc: localbus@ffe05000 {
+                reg = <0x0 0xffe05000 0x0 0x1000>;
+
+                /* NOR, NAND flash, L2 switch and CPLD */
+                ranges = <0x0 0x0 0x0 0xec000000 0x04000000
+                          0x1 0x0 0x0 0xff800000 0x00040000
+                          0x2 0x0 0x0 0xffa00000 0x00020000
+                          0x3 0x0 0x0 0xffb00000 0x00020000>;
+
+                nor@0,0 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "cfi-flash";
+                        reg = <0x0 0x0 0x4000000>;
+                        bank-width = <2>;
+                        device-width = <1>;
+
+                        partition@0 {
+                                /* 128KB for DTB Image */
+                                reg = <0x0 0x00020000>;
+                                label = "NOR DTB Image";
+                        };
+
+                        partition@20000 {
+                                /* 3.875 MB for Linux Kernel Image */
+                                reg = <0x00020000 0x003e0000>;
+                                label = "NOR Linux Kernel Image";
+                        };
+
+                        partition@400000 {
+                                /* 58MB for Root file System */
+                                reg = <0x00400000 0x03a00000>;
+                                label = "NOR Root File System";
+                        };
+
+                        partition@3e00000 {
+                                /* This location must not be altered  */
+                                /* 1M for Vitesse 7385 Switch firmware */
+                                reg = <0x3e00000 0x00100000>;
+                                label = "NOR Vitesse-7385 Firmware";
+                                read-only;
+                        };
+
+                        partition@3f00000 {
+                                /* This location must not be altered  */
+                                /* 512KB for u-boot Bootloader Image */
+                                /* 512KB for u-boot Environment Variables */
+                                reg = <0x03f00000 0x00100000>;
+                                label = "NOR U-Boot Image";
+                                read-only;
+                        };
+                };
+
+                nand@1,0 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,p1020-fcm-nand",
+                                     "fsl,elbc-fcm-nand";
+                        reg = <0x1 0x0 0x40000>;
+
+                        partition@0 {
+                                /* This location must not be altered  */
+                                /* 1MB for u-boot Bootloader Image */
+                                reg = <0x0 0x00100000>;
+                                label = "NAND U-Boot Image";
+                                read-only;
+                        };
+
+                        partition@100000 {
+                                /* 1MB for DTB Image */
+                                reg = <0x00100000 0x00100000>;
+                                label = "NAND DTB Image";
+                        };
+
+                        partition@200000 {
+                                /* 4MB for Linux Kernel Image */
+                                reg = <0x00200000 0x00400000>;
+                                label = "NAND Linux Kernel Image";
+                        };
+
+                        partition@600000 {
+                                /* 122MB for File System Image */
+                                reg = <0x00600000 0x07a00000>;
+                                label = "NAND File System Image";
+                        };
+                };
+
+                cpld@2,0 {
+                        compatible = "fsl,p1020rdb-pd-cpld";
+                        reg = <0x2 0x0 0x20000>;
+                };
+
+                L2switch@3,0 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "vitesse-7385";
+                        reg = <0x3 0x0 0x20000>;
+                };
+        };
+
+        soc: soc@ffe00000 {
+                ranges = <0x0 0x0 0xffe00000 0x100000>;
+
+                i2c@3000 {
+                        rtc@68 {
+                                compatible = "dallas,ds1339";
+                                reg = <0x68>;
+                        };
+                };
+
+                spi@7000 {
+                        flash@0 {
+                                #address-cells = <1>;
+                                #size-cells = <1>;
+                                compatible = "spansion,s25sl12801";
+                                reg = <0>;
+                                /* input clock */
+                                spi-max-frequency = <40000000>;
+
+                                partition@0 {
+                                        /* 512KB for u-boot Bootloader Image */
+                                        reg = <0x0 0x00080000>;
+                                        label = "SPI U-Boot Image";
+                                        read-only;
+                                };
+
+                                partition@80000 {
+                                        /* 512KB for DTB Image*/
+                                        reg = <0x00080000 0x00080000>;
+                                        label = "SPI DTB Image";
+                                };
+
+                                partition@100000 {
+                                        /* 4MB for Linux Kernel Image */
+                                        reg = <0x00100000 0x00400000>;
+                                        label = "SPI Linux Kernel Image";
+                                };
+
+                                partition@500000 {
+                                        /* 11MB for FS System Image */
+                                        reg = <0x00500000 0x00b00000>;
+                                        label = "SPI File System Image";
+                                };
+                        };
+
+                        slic@0 {
+                                compatible = "zarlink,le88266";
+                                reg = <1>;
+                                spi-max-frequency = <8000000>;
+                        };
+
+                        slic@1 {
+                                compatible = "zarlink,le88266";
+                                reg = <2>;
+                                spi-max-frequency = <8000000>;
+                        };
+                };
+
+                mdio@24000 {
+                        phy0: ethernet-phy@0 {
+                                interrupts = <3 1 0 0>;
+                                reg = <0x0>;
+                        };
+
+                        phy1: ethernet-phy@1 {
+                                interrupts = <2 1 0 0>;
+                                reg = <0x1>;
+                        };
+                };
+
+                mdio@25000 {
+                        tbi1: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                mdio@26000 {
+                        tbi2: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
+                enet0: ethernet@b0000 {
+                        fixed-link = <1 1 1000 0 0>;
+                        phy-connection-type = "rgmii-id";
+                };
+
+                enet1: ethernet@b1000 {
+                        phy-handle = <&phy0>;
+                        tbi-handle = <&tbi1>;
+                        phy-connection-type = "sgmii";
+                };
+
+                enet2: ethernet@b2000 {
+                        phy-handle = <&phy1>;
+                        phy-connection-type = "rgmii-id";
+                };
+
+                usb@22000 {
+                        phy_type = "ulpi";
+                };
+        };
+
+        pci0: pcie@ffe09000 {
+                reg = <0x0 0xffe09000 0x0 0x1000>;
+                ranges = <0x2000000 0x0 0xa0000000 0x0 0xa0000000 0x0 0x20000000
+                          0x1000000 0x0 0x00000000 0x0 0xffc10000 0x0 0x10000>;
+                pcie@0 {
+                        ranges = <0x2000000 0x0 0xa0000000
+                                  0x2000000 0x0 0xa0000000
+                                  0x0 0x20000000
+
+                                  0x1000000 0x0 0x0
+                                  0x1000000 0x0 0x0
+                                  0x0 0x100000>;
+                };
+        };
+
+        pci1: pcie@ffe0a000 {
+                reg = <0x0 0xffe0a000 0x0 0x1000>;
+                ranges = <0x2000000 0x0 0x80000000 0x0 0x80000000 0x0 0x20000000
+                          0x1000000 0x0 0x00000000 0x0 0xffc00000 0x0 0x10000>;
+                pcie@0 {
+                        ranges = <0x2000000 0x0 0x80000000
+                                  0x2000000 0x0 0x80000000
+                                  0x0 0x20000000
+
+                                  0x1000000 0x0 0x0
+                                  0x1000000 0x0 0x0
+                                  0x0 0x100000>;
+                };
+        };
+};
+
+/include/ "fsl/p1020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1023rdb.dts b/arch/powerpc/boot/dts/p1023rdb.dts
new file mode 100644
index 000000000000..0a06a88ddbd5
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1023rdb.dts
@@ -0,0 +1,234 @@
+/*
+ * P1023 RDB Device Tree Source
+ *
+ *    Copyright 2013 Freescale Semiconductor Inc.
+ *
+ * Author: Chunhe Lan <Chunhe.Lan@freescale.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "fsl/p1023si-pre.dtsi"
+
+/ {
+        model = "fsl,P1023";
+        compatible = "fsl,P1023RDB";
+        #address-cells = <2>;
+        #size-cells = <2>;
+        interrupt-parent = <&mpic>;
+
+        memory {
+                device_type = "memory";
+        };
+
+        soc: soc@ff600000 {
+                ranges = <0x0 0x0 0xff600000 0x200000>;
+
+                i2c@3000 {
+                        eeprom@53 {
+                                compatible = "at24,24c04";
+                                reg = <0x53>;
+                        };
+
+                        rtc@6f {
+                                compatible = "microchip,mcp7941x";
+                                reg = <0x6f>;
+                        };
+                };
+
+                usb@22000 {
+                        dr_mode = "host";
+                        phy_type = "ulpi";
+                };
+        };
+
+        lbc: localbus@ff605000 {
+                reg = <0 0xff605000 0 0x1000>;
+
+                /* NOR, NAND Flashes */
+                ranges = <0x0 0x0 0x0 0xec000000 0x04000000
+                          0x1 0x0 0x0 0xffa00000 0x08000000>;
+
+                nor@0,0 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "cfi-flash";
+                        reg = <0x0 0x0 0x04000000>;
+                        bank-width = <2>;
+                        device-width = <1>;
+
+                        partition@0 {
+                                /* 48MB for Root File System */
+                                reg = <0x00000000 0x03000000>;
+                                label = "NOR Root File System";
+                        };
+
+                        partition@3000000 {
+                                /* 1MB for DTB Image */
+                                reg = <0x03000000 0x00100000>;
+                                label = "NOR DTB Image";
+                        };
+
+                        partition@3100000 {
+                                /* 14MB for Linux Kernel Image */
+                                reg = <0x03100000 0x00e00000>;
+                                label = "NOR Linux Kernel Image";
+                        };
+
+                        partition@3f00000 {
+                                /* This location must not be altered  */
+                                /* 512KB for u-boot Bootloader Image */
+                                /* 512KB for u-boot Environment Variables */
+                                reg = <0x03f00000 0x00100000>;
+                                label = "NOR U-Boot Image";
+                                read-only;
+                        };
+                };
+
+                nand@1,0 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,elbc-fcm-nand";
+                        reg = <0x1 0x0 0x40000>;
+
+                        partition@0 {
+                                /* This location must not be altered  */
+                                /* 1MB for u-boot Bootloader Image */
+                                reg = <0x0 0x00100000>;
+                                label = "NAND U-Boot Image";
+                                read-only;
+                        };
+
+                        partition@100000 {
+                                /* 1MB for DTB Image */
+                                reg = <0x00100000 0x00100000>;
+                                label = "NAND DTB Image";
+                        };
+
+                        partition@200000 {
+                                /* 14MB for Linux Kernel Image */
+                                reg = <0x00200000 0x00e00000>;
+                                label = "NAND Linux Kernel Image";
+                        };
+
+                        partition@1000000 {
+                                /* 96MB for Root File System Image */
+                                reg = <0x01000000 0x06000000>;
+                                label = "NAND Root File System";
+                        };
+
+                        partition@7000000 {
+                                /* 16MB for User Writable Area */
+                                reg = <0x07000000 0x01000000>;
+                                label = "NAND Writable User area";
+                        };
+                };
+        };
+
+        pci0: pcie@ff60a000 {
+                reg = <0 0xff60a000 0 0x1000>;
+                ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
+                          0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
+                pcie@0 {
+                        /* IRQ[0:3] are pulled up on board, set to active-low */
+                        interrupt-map-mask = <0xf800 0 0 7>;
+                        interrupt-map = <
+                                /* IDSEL 0x0 */
+                                0000 0 0 1 &mpic 0 1 0 0
+                                0000 0 0 2 &mpic 1 1 0 0
+                                0000 0 0 3 &mpic 2 1 0 0
+                                0000 0 0 4 &mpic 3 1 0 0
+                                >;
+                        ranges = <0x2000000 0x0 0xc0000000
+                                  0x2000000 0x0 0xc0000000
+                                  0x0 0x20000000
+
+                                  0x1000000 0x0 0x0
+                                  0x1000000 0x0 0x0
+                                  0x0 0x100000>;
+                };
+        };
+
+        board_pci1: pci1: pcie@ff609000 {
+                reg = <0 0xff609000 0 0x1000>;
+                ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
+                          0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
+                pcie@0 {
+                        /*
+                         * IRQ[4:6] only for PCIe, set to active-high,
+                         * IRQ[7] is pulled up on board, set to active-low
+                         */
+                        interrupt-map-mask = <0xf800 0 0 7>;
+                        interrupt-map = <
+                                /* IDSEL 0x0 */
+                                0000 0 0 1 &mpic 4 2 0 0
+                                0000 0 0 2 &mpic 5 2 0 0
+                                0000 0 0 3 &mpic 6 2 0 0
+                                0000 0 0 4 &mpic 7 1 0 0
+                                >;
+                        ranges = <0x2000000 0x0 0xa0000000
+                                  0x2000000 0x0 0xa0000000
+                                  0x0 0x20000000
+
+                                  0x1000000 0x0 0x0
+                                  0x1000000 0x0 0x0
+                                  0x0 0x100000>;
+                };
+        };
+
+        pci2: pcie@ff60b000 {
+                reg = <0 0xff60b000 0 0x1000>;
+                ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
+                          0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
+                pcie@0 {
+                        /*
+                         * IRQ[8:10] are pulled up on board, set to active-low
+                         * IRQ[11] only for PCIe, set to active-high,
+                         */
+                        interrupt-map-mask = <0xf800 0 0 7>;
+                        interrupt-map = <
+                                /* IDSEL 0x0 */
+                                0000 0 0 1 &mpic 8 1 0 0
+                                0000 0 0 2 &mpic 9 1 0 0
+                                0000 0 0 3 &mpic 10 1 0 0
+                                0000 0 0 4 &mpic 11 2 0 0
+                                >;
+                        ranges = <0x2000000 0x0 0x80000000
+                                  0x2000000 0x0 0x80000000
+                                  0x0 0x20000000
+
+                                  0x1000000 0x0 0x0
+                                  0x1000000 0x0 0x0
+                                  0x0 0x100000>;
+                };
+        };
+
+};
+
+/include/ "fsl/p1023si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/pdm360ng.dts b/arch/powerpc/boot/dts/pdm360ng.dts
index 74337403faee..871c16d1ad5e 100644
--- a/arch/powerpc/boot/dts/pdm360ng.dts
+++ b/arch/powerpc/boot/dts/pdm360ng.dts
@@ -13,7 +13,7 @@
  * option) any later version.
  */
 
-/include/ "mpc5121.dtsi"
+#include <mpc5121.dtsi>
 
 / {
         model = "pdm360ng";
diff --git a/arch/powerpc/boot/ppc_asm.h b/arch/powerpc/boot/ppc_asm.h
index 1c2c2817f9b7..eb0e98be69e0 100644
--- a/arch/powerpc/boot/ppc_asm.h
+++ b/arch/powerpc/boot/ppc_asm.h
@@ -59,4 +59,7 @@
 #define r30     30
 #define r31     31
 
+#define SPRN_TBRL       268
+#define SPRN_TBRU       269
+
 #endif /* _PPC64_PPC_ASM_H */
diff --git a/arch/powerpc/boot/util.S b/arch/powerpc/boot/util.S
index 427ddfc11991..5143228e3e5f 100644
--- a/arch/powerpc/boot/util.S
+++ b/arch/powerpc/boot/util.S
@@ -71,18 +71,18 @@ udelay:
         add     r4,r4,r5
         addi    r4,r4,-1
         divw    r4,r4,r5        /* BUS ticks */
-1:      mftbu   r5
-        mftb    r6
-        mftbu   r7
+1:      mfspr   r5, SPRN_TBRU
+        mfspr   r6, SPRN_TBRL
+        mfspr   r7, SPRN_TBRU
         cmpw    0,r5,r7
         bne     1b              /* Get [synced] base time */
         addc    r9,r6,r4        /* Compute end time */
         addze   r8,r5
-2:      mftbu   r5
+2:      mfspr   r5, SPRN_TBRU
         cmpw    0,r5,r8
         blt     2b
         bgt     3f
-        mftb    r6
+        mfspr   r6, SPRN_TBRL
         cmpw    0,r6,r9
         blt     2b
 3:      blr
diff --git a/arch/powerpc/configs/85xx/p1023rds_defconfig b/arch/powerpc/configs/85xx/p1023_defconfig
index b80bcc69d1f7..b06d37da44f4 100644
--- a/arch/powerpc/configs/85xx/p1023rds_defconfig
+++ b/arch/powerpc/configs/85xx/p1023_defconfig
@@ -1,14 +1,13 @@
 CONFIG_PPC_85xx=y
 CONFIG_SMP=y
 CONFIG_NR_CPUS=2
-CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
 CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_AUDIT=y
-CONFIG_IRQ_DOMAIN_DEBUG=y
 CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
+CONFIG_RCU_FANOUT=32
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
@@ -22,6 +21,8 @@ CONFIG_MODVERSIONS=y
 # CONFIG_BLK_DEV_BSG is not set
 CONFIG_PARTITION_ADVANCED=y
 CONFIG_MAC_PARTITION=y
+CONFIG_PHYSICAL_START=0x00000000
+CONFIG_P1023_RDB=y
 CONFIG_P1023_RDS=y
 CONFIG_QUICC_ENGINE=y
 CONFIG_QE_GPIO=y
@@ -63,10 +64,21 @@ CONFIG_IPV6=y
 CONFIG_IP_SCTP=m
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_CFI=y
+CONFIG_MTD_CFI_AMDSTD=y
+CONFIG_MTD_PHYSMAP_OF=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_FSL_ELBC=y
 CONFIG_PROC_DEVICETREE=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=131072
+CONFIG_EEPROM_AT24=y
 CONFIG_EEPROM_LEGACY=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_CHR_DEV_ST=y
@@ -82,6 +94,8 @@ CONFIG_DUMMY=y
 CONFIG_FS_ENET=y
 CONFIG_FSL_PQ_MDIO=y
 CONFIG_E1000E=y
+CONFIG_PHYLIB=y
+CONFIG_AT803X_PHY=y
 CONFIG_MARVELL_PHY=y
 CONFIG_DAVICOM_PHY=y
 CONFIG_CICADA_PHY=y
@@ -96,12 +110,15 @@ CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_8250_NR_UARTS=2
 CONFIG_SERIAL_8250_RUNTIME_UARTS=2
+CONFIG_SERIAL_8250_EXTENDED=y
 CONFIG_SERIAL_8250_MANY_PORTS=y
+CONFIG_SERIAL_8250_SHARE_IRQ=y
 CONFIG_SERIAL_8250_DETECT_IRQ=y
 CONFIG_SERIAL_8250_RSA=y
-CONFIG_SERIAL_QE=m
+CONFIG_HW_RANDOM=y
 CONFIG_NVRAM=y
 CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
 CONFIG_I2C_CPM=m
 CONFIG_I2C_MPC=y
 CONFIG_GPIO_MPC8XXX=y
@@ -121,6 +138,7 @@ CONFIG_USB_STORAGE=y
 CONFIG_EDAC=y
 CONFIG_EDAC_MM_EDAC=y
 CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_DS1307=y
 CONFIG_RTC_DRV_CMOS=y
 CONFIG_DMADEVICES=y
 CONFIG_FSL_DMA=y
@@ -161,6 +179,7 @@ CONFIG_DEBUG_FS=y
 CONFIG_DETECT_HUNG_TASK=y
 # CONFIG_DEBUG_BUGVERBOSE is not set
 CONFIG_DEBUG_INFO=y
+CONFIG_STRICT_DEVMEM=y
 CONFIG_CRYPTO_PCBC=m
 CONFIG_CRYPTO_SHA256=y
 CONFIG_CRYPTO_SHA512=y
diff --git a/arch/powerpc/configs/corenet32_smp_defconfig b/arch/powerpc/configs/corenet32_smp_defconfig
index 60027c2a7034..3dfab4c40c76 100644
--- a/arch/powerpc/configs/corenet32_smp_defconfig
+++ b/arch/powerpc/configs/corenet32_smp_defconfig
@@ -70,6 +70,7 @@ CONFIG_IPV6=y
 CONFIG_IP_SCTP=m
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
 CONFIG_MTD=y
 CONFIG_MTD_CMDLINE_PARTS=y
 CONFIG_MTD_CHAR=y
diff --git a/arch/powerpc/configs/corenet64_smp_defconfig b/arch/powerpc/configs/corenet64_smp_defconfig
index 6c8b020806ff..fa94fb3bb44d 100644
--- a/arch/powerpc/configs/corenet64_smp_defconfig
+++ b/arch/powerpc/configs/corenet64_smp_defconfig
@@ -27,6 +27,8 @@ CONFIG_P5040_DS=y
 CONFIG_T4240_QDS=y
 # CONFIG_PPC_OF_BOOT_TRAMPOLINE is not set
 CONFIG_BINFMT_MISC=m
+CONFIG_MATH_EMULATION=y
+CONFIG_MATH_EMULATION_HW_UNIMPLEMENTED=y
 CONFIG_FSL_IFC=y
 CONFIG_PCIEPORTBUS=y
 CONFIG_PCI_MSI=y
@@ -59,6 +61,7 @@ CONFIG_IPV6=y
 CONFIG_IP_SCTP=m
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
 CONFIG_MTD=y
 CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_OF_PARTS=y
diff --git a/arch/powerpc/configs/mpc83xx_defconfig b/arch/powerpc/configs/mpc83xx_defconfig
index 09116c6a6719..23fec79964cf 100644
--- a/arch/powerpc/configs/mpc83xx_defconfig
+++ b/arch/powerpc/configs/mpc83xx_defconfig
@@ -42,6 +42,7 @@ CONFIG_INET_ESP=y
 # CONFIG_IPV6 is not set
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
 # CONFIG_FW_LOADER is not set
 CONFIG_MTD=y
 CONFIG_MTD_CHAR=y
diff --git a/arch/powerpc/configs/mpc85xx_defconfig b/arch/powerpc/configs/mpc85xx_defconfig
index 5a58882e351e..dc098d988211 100644
--- a/arch/powerpc/configs/mpc85xx_defconfig
+++ b/arch/powerpc/configs/mpc85xx_defconfig
@@ -27,6 +27,7 @@ CONFIG_MPC85xx_MDS=y
 CONFIG_MPC8536_DS=y
 CONFIG_MPC85xx_DS=y
 CONFIG_MPC85xx_RDB=y
+CONFIG_C293_PCIE=y
 CONFIG_P1010_RDB=y
 CONFIG_P1022_DS=y
 CONFIG_P1022_RDK=y
@@ -78,6 +79,7 @@ CONFIG_IPV6=y
 CONFIG_IP_SCTP=m
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
 CONFIG_MTD=y
 CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_OF_PARTS=y
diff --git a/arch/powerpc/configs/mpc85xx_smp_defconfig b/arch/powerpc/configs/mpc85xx_smp_defconfig
index 152fa05b15e4..5bca60161bb3 100644
--- a/arch/powerpc/configs/mpc85xx_smp_defconfig
+++ b/arch/powerpc/configs/mpc85xx_smp_defconfig
@@ -30,6 +30,7 @@ CONFIG_MPC85xx_MDS=y
 CONFIG_MPC8536_DS=y
 CONFIG_MPC85xx_DS=y
 CONFIG_MPC85xx_RDB=y
+CONFIG_C293_PCIE=y
 CONFIG_P1010_RDB=y
 CONFIG_P1022_DS=y
 CONFIG_P1022_RDK=y
@@ -81,6 +82,7 @@ CONFIG_IPV6=y
 CONFIG_IP_SCTP=m
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
 CONFIG_MTD=y
 CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_OF_PARTS=y
diff --git a/arch/powerpc/include/asm/asm-compat.h b/arch/powerpc/include/asm/asm-compat.h
index 6e82f5f9a6fd..4b237aa35660 100644
--- a/arch/powerpc/include/asm/asm-compat.h
+++ b/arch/powerpc/include/asm/asm-compat.h
@@ -32,6 +32,15 @@
 #define PPC_MTOCRF(FXM, RS) MTOCRF((FXM), RS)
 #define PPC_LR_STKOFF   16
 #define PPC_MIN_STKFRM  112
+
+#ifdef __BIG_ENDIAN__
+#define LDX_BE  stringify_in_c(ldx)
+#define STDX_BE stringify_in_c(stdx)
+#else
+#define LDX_BE  stringify_in_c(ldbrx)
+#define STDX_BE stringify_in_c(stdbrx)
+#endif
+
 #else /* 32-bit */
 
 /* operations for longs and pointers */
diff --git a/arch/powerpc/include/asm/btext.h b/arch/powerpc/include/asm/btext.h
index 906f46e31006..89fc382648bc 100644
--- a/arch/powerpc/include/asm/btext.h
+++ b/arch/powerpc/include/asm/btext.h
@@ -13,6 +13,7 @@ extern void btext_update_display(unsigned long phys, int width, int height,
 extern void btext_setup_display(int width, int height, int depth, int pitch,
                                 unsigned long address);
 extern void btext_prepare_BAT(void);
+extern void btext_map(void);
 extern void btext_unmap(void);
 
 extern void btext_drawchar(char c);
diff --git a/arch/powerpc/include/asm/cacheflush.h b/arch/powerpc/include/asm/cacheflush.h
index b843e35122e8..5b9312220e84 100644
--- a/arch/powerpc/include/asm/cacheflush.h
+++ b/arch/powerpc/include/asm/cacheflush.h
@@ -32,13 +32,7 @@ extern void flush_dcache_page(struct page *page);
 
 extern void __flush_disable_L1(void);
 
-extern void __flush_icache_range(unsigned long, unsigned long);
-static inline void flush_icache_range(unsigned long start, unsigned long stop)
-{
-        if (!cpu_has_feature(CPU_FTR_COHERENT_ICACHE))
-                __flush_icache_range(start, stop);
-}
-
+extern void flush_icache_range(unsigned long, unsigned long);
 extern void flush_icache_user_range(struct vm_area_struct *vma,
                                     struct page *page, unsigned long addr,
                                     int len);
diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h
index 6f3887d884d2..0d4939ba48e7 100644
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
@@ -371,14 +371,19 @@ extern const char *powerpc_base_platform;
 #define CPU_FTRS_E500MC (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN | \
             CPU_FTR_L2CSR | CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE | \
             CPU_FTR_DBELL | CPU_FTR_DEBUG_LVL_EXC | CPU_FTR_EMB_HV)
+/*
+ * e5500/e6500 erratum A-006958 is a timebase bug that can use the
+ * same workaround as CPU_FTR_CELL_TB_BUG.
+ */
 #define CPU_FTRS_E5500  (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN | \
             CPU_FTR_L2CSR | CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE | \
             CPU_FTR_DBELL | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \
-            CPU_FTR_DEBUG_LVL_EXC | CPU_FTR_EMB_HV)
+            CPU_FTR_DEBUG_LVL_EXC | CPU_FTR_EMB_HV | CPU_FTR_CELL_TB_BUG)
 #define CPU_FTRS_E6500  (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN | \
             CPU_FTR_L2CSR | CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE | \
             CPU_FTR_DBELL | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \
-            CPU_FTR_DEBUG_LVL_EXC | CPU_FTR_EMB_HV | CPU_FTR_ALTIVEC_COMP)
+            CPU_FTR_DEBUG_LVL_EXC | CPU_FTR_EMB_HV | CPU_FTR_ALTIVEC_COMP | \
+            CPU_FTR_CELL_TB_BUG)
 #define CPU_FTRS_GENERIC_32     (CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN)
 
 /* 64-bit CPUs */
diff --git a/arch/powerpc/include/asm/emulated_ops.h b/arch/powerpc/include/asm/emulated_ops.h
index 63f2a22e9954..5a8b82aa7241 100644
--- a/arch/powerpc/include/asm/emulated_ops.h
+++ b/arch/powerpc/include/asm/emulated_ops.h
@@ -46,8 +46,6 @@ extern struct ppc_emulated {
         struct ppc_emulated_entry unaligned;
 #ifdef CONFIG_MATH_EMULATION
         struct ppc_emulated_entry math;
-#elif defined(CONFIG_8XX_MINIMAL_FPEMU)
-        struct ppc_emulated_entry 8xx;
 #endif
 #ifdef CONFIG_VSX
         struct ppc_emulated_entry vsx;
diff --git a/arch/powerpc/include/asm/epapr_hcalls.h b/arch/powerpc/include/asm/epapr_hcalls.h
index d3d634274d2c..86b0ac79990c 100644
--- a/arch/powerpc/include/asm/epapr_hcalls.h
+++ b/arch/powerpc/include/asm/epapr_hcalls.h
@@ -105,6 +105,12 @@
 extern bool epapr_paravirt_enabled;
 extern u32 epapr_hypercall_start[];
 
+#ifdef CONFIG_EPAPR_PARAVIRT
+int __init epapr_paravirt_early_init(void);
+#else
+static inline int epapr_paravirt_early_init(void) { return 0; }
+#endif
+
 /*
  * We use "uintptr_t" to define a register because it's guaranteed to be a
  * 32-bit integer on a 32-bit platform, and a 64-bit integer on a 64-bit
diff --git a/arch/powerpc/include/asm/exception-64s.h b/arch/powerpc/include/asm/exception-64s.h
index 07ca627e52c0..cca12f084842 100644
--- a/arch/powerpc/include/asm/exception-64s.h
+++ b/arch/powerpc/include/asm/exception-64s.h
@@ -48,17 +48,18 @@
 #define EX_LR           72
 #define EX_CFAR         80
 #define EX_PPR          88      /* SMT thread status register (priority) */
+#define EX_CTR          96
 
 #ifdef CONFIG_RELOCATABLE
 #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h)                    \
         ld      r12,PACAKBASE(r13);     /* get high part of &label */   \
         mfspr   r11,SPRN_##h##SRR0;     /* save SRR0 */                 \
         LOAD_HANDLER(r12,label);                                        \
-        mtlr    r12;                                                    \
+        mtctr   r12;                                                    \
         mfspr   r12,SPRN_##h##SRR1;     /* and SRR1 */                  \
         li      r10,MSR_RI;                                             \
         mtmsrd  r10,1;                  /* Set RI (EE=0) */             \
-        blr;
+        bctr;
 #else
 /* If not relocatable, we can jump directly -- and save messing with LR */
 #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h)                    \
@@ -97,18 +98,18 @@
 
 #if defined(CONFIG_RELOCATABLE)
 /*
- * If we support interrupts with relocation on AND we're a relocatable
- * kernel, we need to use LR to get to the 2nd level handler.  So, save/restore
- * it when required.
+ * If we support interrupts with relocation on AND we're a relocatable kernel,
+ * we need to use CTR to get to the 2nd level handler.  So, save/restore it
+ * when required.
  */
-#define SAVE_LR(reg, area)      mflr    reg ;   std     reg,area+EX_LR(r13)
-#define GET_LR(reg, area)                       ld      reg,area+EX_LR(r13)
-#define RESTORE_LR(reg, area)   ld      reg,area+EX_LR(r13) ; mtlr reg
+#define SAVE_CTR(reg, area)     mfctr   reg ;   std     reg,area+EX_CTR(r13)
+#define GET_CTR(reg, area)                      ld      reg,area+EX_CTR(r13)
+#define RESTORE_CTR(reg, area)  ld      reg,area+EX_CTR(r13) ; mtctr reg
 #else
-/* ...else LR is unused and in register. */
-#define SAVE_LR(reg, area)
-#define GET_LR(reg, area)       mflr    reg
-#define RESTORE_LR(reg, area)
+/* ...else CTR is unused and in register. */
+#define SAVE_CTR(reg, area)
+#define GET_CTR(reg, area)      mfctr   reg
+#define RESTORE_CTR(reg, area)
 #endif
 
 /*
@@ -164,7 +165,7 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
 #define __EXCEPTION_PROLOG_1(area, extra, vec)                          \
         OPT_SAVE_REG_TO_PACA(area+EX_PPR, r9, CPU_FTR_HAS_PPR);         \
         OPT_SAVE_REG_TO_PACA(area+EX_CFAR, r10, CPU_FTR_CFAR);          \
-        SAVE_LR(r10, area);                                             \
+        SAVE_CTR(r10, area);                                            \
         mfcr    r9;                                                     \
         extra(vec);                                                     \
         std     r11,area+EX_R11(r13);                                   \
@@ -270,7 +271,7 @@ do_kvm_##n:								\
         sth     r1,PACA_TRAP_SAVE(r13);                                    \
         std     r3,area+EX_R3(r13);                                        \
         addi    r3,r13,area;            /* r3 -> where regs are saved*/    \
-        RESTORE_LR(r1, area);                                              \
+        RESTORE_CTR(r1, area);                                             \
         b       bad_stack;                                                 \
 3:      std     r9,_CCR(r1);            /* save CR in stackframe        */ \
         std     r11,_NIP(r1);           /* save SRR0 in stackframe      */ \
@@ -298,10 +299,10 @@ do_kvm_##n:								\
         ld      r10,area+EX_CFAR(r13);                                     \
         std     r10,ORIG_GPR3(r1);                                         \
         END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66);            \
-        GET_LR(r9,area);                /* Get LR, later save to stack  */ \
+        mflr    r9;                     /* Get LR, later save to stack  */ \
         ld      r2,PACATOC(r13);        /* get kernel TOC into r2       */ \
         std     r9,_LINK(r1);                                              \
-        mfctr   r10;                    /* save CTR in stackframe       */ \
+        GET_CTR(r10, area);                                                \
         std     r10,_CTR(r1);                                              \
         lbz     r10,PACASOFTIRQEN(r13);                            \
         mfspr   r11,SPRN_XER;           /* save XER in stackframe       */ \
@@ -479,7 +480,7 @@ label##_relon_hv:							\
  */
 
 /* Exception addition: Hard disable interrupts */
-#define DISABLE_INTS    SOFT_DISABLE_INTS(r10,r11)
+#define DISABLE_INTS    RECONCILE_IRQ_STATE(r10,r11)
 
 #define ADD_NVGPRS                              \
         bl      .save_nvgprs
diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h
index dd15e5e37d6d..5a64757dc0d1 100644
--- a/arch/powerpc/include/asm/io.h
+++ b/arch/powerpc/include/asm/io.h
@@ -69,8 +69,18 @@ extern unsigned long pci_dram_offset;
 
 extern resource_size_t isa_mem_base;
 
-#if defined(CONFIG_PPC32) && defined(CONFIG_PPC_INDIRECT_IO)
-#error CONFIG_PPC_INDIRECT_IO is not yet supported on 32 bits
+/* Boolean set by platform if PIO accesses are suppored while _IO_BASE
+ * is not set or addresses cannot be translated to MMIO. This is typically
+ * set when the platform supports "special" PIO accesses via a non memory
+ * mapped mechanism, and allows things like the early udbg UART code to
+ * function.
+ */
+extern bool isa_io_special;
+
+#ifdef CONFIG_PPC32
+#if defined(CONFIG_PPC_INDIRECT_PIO) || defined(CONFIG_PPC_INDIRECT_MMIO)
+#error CONFIG_PPC_INDIRECT_{PIO,MMIO} are not yet supported on 32 bits
+#endif
 #endif
 
 /*
@@ -222,9 +232,9 @@ extern void _memcpy_toio(volatile void __iomem *dest, const void *src,
  * for PowerPC is as close as possible to the x86 version of these, and thus
  * provides fairly heavy weight barriers for the non-raw versions
  *
- * In addition, they support a hook mechanism when CONFIG_PPC_INDIRECT_IO
- * allowing the platform to provide its own implementation of some or all
- * of the accessors.
+ * In addition, they support a hook mechanism when CONFIG_PPC_INDIRECT_MMIO
+ * or CONFIG_PPC_INDIRECT_PIO are set allowing the platform to provide its
+ * own implementation of some or all of the accessors.
  */
 
 /*
@@ -240,8 +250,8 @@ extern void _memcpy_toio(volatile void __iomem *dest, const void *src,
 
 /* Indirect IO address tokens:
  *
- * When CONFIG_PPC_INDIRECT_IO is set, the platform can provide hooks
- * on all IOs. (Note that this is all 64 bits only for now)
+ * When CONFIG_PPC_INDIRECT_MMIO is set, the platform can provide hooks
+ * on all MMIOs. (Note that this is all 64 bits only for now)
  *
  * To help platforms who may need to differenciate MMIO addresses in
  * their hooks, a bitfield is reserved for use by the platform near the
@@ -263,11 +273,14 @@ extern void _memcpy_toio(volatile void __iomem *dest, const void *src,
  *
  * The direct IO mapping operations will then mask off those bits
  * before doing the actual access, though that only happen when
- * CONFIG_PPC_INDIRECT_IO is set, thus be careful when you use that
+ * CONFIG_PPC_INDIRECT_MMIO is set, thus be careful when you use that
  * mechanism
+ *
+ * For PIO, there is a separate CONFIG_PPC_INDIRECT_PIO which makes
+ * all PIO functions call through a hook.
  */
 
-#ifdef CONFIG_PPC_INDIRECT_IO
+#ifdef CONFIG_PPC_INDIRECT_MMIO
 #define PCI_IO_IND_TOKEN_MASK   0x0fff000000000000ul
 #define PCI_IO_IND_TOKEN_SHIFT  48
 #define PCI_FIX_ADDR(addr)                                              \
@@ -672,7 +685,7 @@ extern void __iomem * __ioremap_at(phys_addr_t pa, void *ea,
 extern void __iounmap_at(void *ea, unsigned long size);
 
 /*
- * When CONFIG_PPC_INDIRECT_IO is set, we use the generic iomap implementation
+ * When CONFIG_PPC_INDIRECT_PIO is set, we use the generic iomap implementation
  * which needs some additional definitions here. They basically allow PIO
  * space overall to be 1GB. This will work as long as we never try to use
  * iomap to map MMIO below 1GB which should be fine on ppc64
diff --git a/arch/powerpc/include/asm/irqflags.h b/arch/powerpc/include/asm/irqflags.h
index 6f9b6e23dc5a..f51a5580bfd0 100644
--- a/arch/powerpc/include/asm/irqflags.h
+++ b/arch/powerpc/include/asm/irqflags.h
@@ -40,9 +40,10 @@
 #define TRACE_DISABLE_INTS      TRACE_WITH_FRAME_BUFFER(.trace_hardirqs_off)
 
 /*
- * This is used by assembly code to soft-disable interrupts
+ * This is used by assembly code to soft-disable interrupts first and
+ * reconcile irq state.
  */
-#define SOFT_DISABLE_INTS(__rA, __rB)           \
+#define RECONCILE_IRQ_STATE(__rA, __rB)         \
         lbz     __rA,PACASOFTIRQEN(r13);        \
         lbz     __rB,PACAIRQHAPPENED(r13);      \
         cmpwi   cr0,__rA,0;                     \
@@ -58,7 +59,7 @@
 #define TRACE_ENABLE_INTS
 #define TRACE_DISABLE_INTS
 
-#define SOFT_DISABLE_INTS(__rA, __rB)           \
+#define RECONCILE_IRQ_STATE(__rA, __rB)         \
         lbz     __rA,PACAIRQHAPPENED(r13);      \
         li      __rB,0;                         \
         ori     __rA,__rA,PACA_IRQ_HARD_DIS;    \
diff --git a/arch/powerpc/include/asm/lppaca.h b/arch/powerpc/include/asm/lppaca.h
index 9b12f88d4adb..4470d1e34d23 100644
--- a/arch/powerpc/include/asm/lppaca.h
+++ b/arch/powerpc/include/asm/lppaca.h
@@ -48,15 +48,13 @@
 struct lppaca {
         /* cacheline 1 contains read-only data */
 
-        u32     desc;                   /* Eye catcher 0xD397D781 */
-        u16     size;                   /* Size of this struct */
-        u16     reserved1;
-        u16     reserved2:14;
-        u8      shared_proc:1;          /* Shared processor indicator */
-        u8      secondary_thread:1;     /* Secondary thread indicator */
+        __be32  desc;                   /* Eye catcher 0xD397D781 */
+        __be16  size;                   /* Size of this struct */
+        u8      reserved1[3];
+        u8      __old_status;           /* Old status, including shared proc */
         u8      reserved3[14];
-        volatile u32 dyn_hw_node_id;    /* Dynamic hardware node id */
-        volatile u32 dyn_hw_proc_id;    /* Dynamic hardware proc id */
+        volatile __be32 dyn_hw_node_id; /* Dynamic hardware node id */
+        volatile __be32 dyn_hw_proc_id; /* Dynamic hardware proc id */
         u8      reserved4[56];
         volatile u8 vphn_assoc_counts[8]; /* Virtual processor home node */
                                           /* associativity change counters */
@@ -73,9 +71,9 @@ struct lppaca {
         u8      fpregs_in_use;
         u8      pmcregs_in_use;
         u8      reserved8[28];
-        u64     wait_state_cycles;      /* Wait cycles for this proc */
+        __be64  wait_state_cycles;      /* Wait cycles for this proc */
         u8      reserved9[28];
-        u16     slb_count;              /* # of SLBs to maintain */
+        __be16  slb_count;              /* # of SLBs to maintain */
         u8      idle;                   /* Indicate OS is idle */
         u8      vmxregs_in_use;
 
@@ -89,17 +87,17 @@ struct lppaca {
          * NOTE: This value will ALWAYS be zero for dedicated processors and
          * will NEVER be zero for shared processors (ie, initialized to a 1).
          */
-        volatile u32 yield_count;
-        volatile u32 dispersion_count;  /* dispatch changed physical cpu */
-        volatile u64 cmo_faults;        /* CMO page fault count */
-        volatile u64 cmo_fault_time;    /* CMO page fault time */
+        volatile __be32 yield_count;
+        volatile __be32 dispersion_count; /* dispatch changed physical cpu */
+        volatile __be64 cmo_faults;     /* CMO page fault count */
+        volatile __be64 cmo_fault_time; /* CMO page fault time */
         u8      reserved10[104];
 
         /* cacheline 4-5 */
 
-        u32     page_ins;               /* CMO Hint - # page ins by OS */
+        __be32  page_ins;               /* CMO Hint - # page ins by OS */
         u8      reserved11[148];
-        volatile u64 dtl_idx;           /* Dispatch Trace Log head index */
+        volatile __be64 dtl_idx;                /* Dispatch Trace Log head index */
         u8      reserved12[96];
 } __attribute__((__aligned__(0x400)));
 
@@ -108,17 +106,29 @@ extern struct lppaca lppaca[];
 #define lppaca_of(cpu)  (*paca[cpu].lppaca_ptr)
 
 /*
+ * Old kernels used a reserved bit in the VPA to determine if it was running
+ * in shared processor mode. New kernels look for a non zero yield count
+ * but KVM still needs to set the bit to keep the old stuff happy.
+ */
+#define LPPACA_OLD_SHARED_PROC          2
+
+static inline bool lppaca_shared_proc(struct lppaca *l)
+{
+        return l->yield_count != 0;
+}
+
+/*
  * SLB shadow buffer structure as defined in the PAPR.  The save_area
  * contains adjacent ESID and VSID pairs for each shadowed SLB.  The
  * ESID is stored in the lower 64bits, then the VSID.
  */
 struct slb_shadow {
-        u32     persistent;             /* Number of persistent SLBs */
-        u32     buffer_length;          /* Total shadow buffer length */
-        u64     reserved;
+        __be32  persistent;             /* Number of persistent SLBs */
+        __be32  buffer_length;          /* Total shadow buffer length */
+        __be64  reserved;
         struct  {
-                u64     esid;
-                u64     vsid;
+                __be64     esid;
+                __be64  vsid;
         } save_area[SLB_NUM_BOLTED];
 } ____cacheline_aligned;
 
@@ -130,14 +140,14 @@ extern struct slb_shadow slb_shadow[];
 struct dtl_entry {
         u8      dispatch_reason;
         u8      preempt_reason;
-        u16     processor_id;
-        u32     enqueue_to_dispatch_time;
-        u32     ready_to_enqueue_time;
-        u32     waiting_to_ready_time;
-        u64     timebase;
-        u64     fault_addr;
-        u64     srr0;
-        u64     srr1;
+        __be16  processor_id;
+        __be32  enqueue_to_dispatch_time;
+        __be32  ready_to_enqueue_time;
+        __be32  waiting_to_ready_time;
+        __be64  timebase;
+        __be64  fault_addr;
+        __be64  srr0;
+        __be64  srr1;
 };
 
 #define DISPATCH_LOG_BYTES      4096    /* bytes per cpu */
diff --git a/arch/powerpc/include/asm/mpc5121.h b/arch/powerpc/include/asm/mpc5121.h
index 8ae133eaf9fa..887d3d6133e3 100644
--- a/arch/powerpc/include/asm/mpc5121.h
+++ b/arch/powerpc/include/asm/mpc5121.h
@@ -32,25 +32,11 @@ struct mpc512x_ccm {
         u32     scfr2;  /* System Clock Frequency Register 2 */
         u32     scfr2s; /* System Clock Frequency Shadow Register 2 */
         u32     bcr;    /* Bread Crumb Register */
-        u32     p0ccr;  /* PSC0 Clock Control Register */
-        u32     p1ccr;  /* PSC1 CCR */
-        u32     p2ccr;  /* PSC2 CCR */
-        u32     p3ccr;  /* PSC3 CCR */
-        u32     p4ccr;  /* PSC4 CCR */
-        u32     p5ccr;  /* PSC5 CCR */
-        u32     p6ccr;  /* PSC6 CCR */
-        u32     p7ccr;  /* PSC7 CCR */
-        u32     p8ccr;  /* PSC8 CCR */
-        u32     p9ccr;  /* PSC9 CCR */
-        u32     p10ccr; /* PSC10 CCR */
-        u32     p11ccr; /* PSC11 CCR */
+        u32     psc_ccr[12];    /* PSC Clock Control Registers */
         u32     spccr;  /* SPDIF Clock Control Register */
         u32     cccr;   /* CFM Clock Control Register */
         u32     dccr;   /* DIU Clock Control Register */
-        u32     m1ccr;  /* MSCAN1 CCR */
-        u32     m2ccr;  /* MSCAN2 CCR */
-        u32     m3ccr;  /* MSCAN3 CCR */
-        u32     m4ccr;  /* MSCAN4 CCR */
+        u32     mscan_ccr[4];   /* MSCAN Clock Control Registers */
         u8      res[0x98]; /* Reserved */
 };
 
diff --git a/arch/powerpc/include/asm/mpc85xx.h b/arch/powerpc/include/asm/mpc85xx.h
new file mode 100644
index 000000000000..736d4acc05a8
--- /dev/null
+++ b/arch/powerpc/include/asm/mpc85xx.h
@@ -0,0 +1,92 @@
+/*
+ * MPC85xx cpu type detection
+ *
+ * Copyright 2011-2012 Freescale Semiconductor, Inc.
+ *
+ * This is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef __ASM_PPC_MPC85XX_H
+#define __ASM_PPC_MPC85XX_H
+
+#define SVR_REV(svr)    ((svr) & 0xFF)          /* SOC design resision */
+#define SVR_MAJ(svr)    (((svr) >>  4) & 0xF)   /* Major revision field*/
+#define SVR_MIN(svr)    (((svr) >>  0) & 0xF)   /* Minor revision field*/
+
+/* Some parts define SVR[0:23] as the SOC version */
+#define SVR_SOC_VER(svr) (((svr) >> 8) & 0xFFF7FF)      /* SOC Version fields */
+
+#define SVR_8533        0x803400
+#define SVR_8535        0x803701
+#define SVR_8536        0x803700
+#define SVR_8540        0x803000
+#define SVR_8541        0x807200
+#define SVR_8543        0x803200
+#define SVR_8544        0x803401
+#define SVR_8545        0x803102
+#define SVR_8547        0x803101
+#define SVR_8548        0x803100
+#define SVR_8555        0x807100
+#define SVR_8560        0x807000
+#define SVR_8567        0x807501
+#define SVR_8568        0x807500
+#define SVR_8569        0x808000
+#define SVR_8572        0x80E000
+#define SVR_P1010       0x80F100
+#define SVR_P1011       0x80E500
+#define SVR_P1012       0x80E501
+#define SVR_P1013       0x80E700
+#define SVR_P1014       0x80F101
+#define SVR_P1017       0x80F700
+#define SVR_P1020       0x80E400
+#define SVR_P1021       0x80E401
+#define SVR_P1022       0x80E600
+#define SVR_P1023       0x80F600
+#define SVR_P1024       0x80E402
+#define SVR_P1025       0x80E403
+#define SVR_P2010       0x80E300
+#define SVR_P2020       0x80E200
+#define SVR_P2040       0x821000
+#define SVR_P2041       0x821001
+#define SVR_P3041       0x821103
+#define SVR_P4040       0x820100
+#define SVR_P4080       0x820000
+#define SVR_P5010       0x822100
+#define SVR_P5020       0x822000
+#define SVR_P5021       0X820500
+#define SVR_P5040       0x820400
+#define SVR_T4240       0x824000
+#define SVR_T4120       0x824001
+#define SVR_T4160       0x824100
+#define SVR_C291        0x850000
+#define SVR_C292        0x850020
+#define SVR_C293        0x850030
+#define SVR_B4860       0X868000
+#define SVR_G4860       0x868001
+#define SVR_G4060       0x868003
+#define SVR_B4440       0x868100
+#define SVR_G4440       0x868101
+#define SVR_B4420       0x868102
+#define SVR_B4220       0x868103
+#define SVR_T1040       0x852000
+#define SVR_T1041       0x852001
+#define SVR_T1042       0x852002
+#define SVR_T1020       0x852100
+#define SVR_T1021       0x852101
+#define SVR_T1022       0x852102
+
+#define SVR_8610        0x80A000
+#define SVR_8641        0x809000
+#define SVR_8641D       0x809001
+
+#define SVR_9130        0x860001
+#define SVR_9131        0x860000
+#define SVR_9132        0x861000
+#define SVR_9232        0x861400
+
+#define SVR_Unknown     0xFFFFFF
+
+#endif
diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h
index 4a1ac9fbf186..754f93d208fa 100644
--- a/arch/powerpc/include/asm/mpic.h
+++ b/arch/powerpc/include/asm/mpic.h
@@ -396,7 +396,14 @@ extern struct bus_type mpic_subsys;
 #define MPIC_REGSET_TSI108              MPIC_REGSET(1)  /* Tsi108/109 PIC */
 
 /* Get the version of primary MPIC */
+#ifdef CONFIG_MPIC
 extern u32 fsl_mpic_primary_get_version(void);
+#else
+static inline u32 fsl_mpic_primary_get_version(void)
+{
+        return 0;
+}
+#endif
 
 /* Allocate the controller structure and setup the linux irq descs
  * for the range if interrupts passed in. No HW initialization is
diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
index 029fe85722aa..c5cd72833d6e 100644
--- a/arch/powerpc/include/asm/opal.h
+++ b/arch/powerpc/include/asm/opal.h
@@ -124,6 +124,11 @@ extern int opal_enter_rtas(struct rtas_args *args,
 #define OPAL_PCI_POLL                           62
 #define OPAL_PCI_MSI_EOI                        63
 #define OPAL_PCI_GET_PHB_DIAG_DATA2             64
+#define OPAL_XSCOM_READ                         65
+#define OPAL_XSCOM_WRITE                        66
+#define OPAL_LPC_READ                           67
+#define OPAL_LPC_WRITE                          68
+#define OPAL_RETURN_CPU                         69
 
 #ifndef __ASSEMBLY__
 
@@ -337,6 +342,17 @@ enum OpalEpowStatus {
         OPAL_EPOW_OVER_INTERNAL_TEMP = 3
 };
 
+/*
+ * Address cycle types for LPC accesses. These also correspond
+ * to the content of the first cell of the "reg" property for
+ * device nodes on the LPC bus
+ */
+enum OpalLPCAddressType {
+        OPAL_LPC_MEM    = 0,
+        OPAL_LPC_IO     = 1,
+        OPAL_LPC_FW     = 2,
+};
+
 struct opal_machine_check_event {
         enum OpalMCE_Version    version:8;      /* 0x00 */
         uint8_t                 in_use;         /* 0x01 */
@@ -631,6 +647,15 @@ int64_t opal_set_system_attention_led(uint8_t led_action);
 int64_t opal_pci_next_error(uint64_t phb_id, uint64_t *first_frozen_pe,
                             uint16_t *pci_error_type, uint16_t *severity);
 int64_t opal_pci_poll(uint64_t phb_id);
+int64_t opal_return_cpu(void);
+
+int64_t opal_xscom_read(uint32_t gcid, uint32_t pcb_addr, uint64_t *val);
+int64_t opal_xscom_write(uint32_t gcid, uint32_t pcb_addr, uint64_t val);
+
+int64_t opal_lpc_write(uint32_t chip_id, enum OpalLPCAddressType addr_type,
+                       uint32_t addr, uint32_t data, uint32_t sz);
+int64_t opal_lpc_read(uint32_t chip_id, enum OpalLPCAddressType addr_type,
+                      uint32_t addr, uint32_t *data, uint32_t sz);
 
 /* Internal functions */
 extern int early_init_dt_scan_opal(unsigned long node, const char *uname, int depth, void *data);
@@ -664,6 +689,8 @@ extern int opal_machine_check(struct pt_regs *regs);
 
 extern void opal_shutdown(void);
 
+extern void opal_lpc_init(void);
+
 #endif /* __ASSEMBLY__ */
 
 #endif /* __OPAL_H */
diff --git a/arch/powerpc/include/asm/paca.h b/arch/powerpc/include/asm/paca.h
index 77c91e74b612..a5954cebbc55 100644
--- a/arch/powerpc/include/asm/paca.h
+++ b/arch/powerpc/include/asm/paca.h
@@ -68,8 +68,13 @@ struct paca_struct {
          * instruction.  They must travel together and be properly
          * aligned.
          */
+#ifdef __BIG_ENDIAN__
         u16 lock_token;                 /* Constant 0x8000, used in locks */
         u16 paca_index;                 /* Logical processor number */
+#else
+        u16 paca_index;                 /* Logical processor number */
+        u16 lock_token;                 /* Constant 0x8000, used in locks */
+#endif
 
         u64 kernel_toc;                 /* Kernel TOC address */
         u64 kernelbase;                 /* Base address of kernel */
@@ -93,9 +98,9 @@ struct paca_struct {
          * Now, starting in cacheline 2, the exception save areas
          */
         /* used for most interrupts/exceptions */
-        u64 exgen[12] __attribute__((aligned(0x80)));
-        u64 exmc[12];           /* used for machine checks */
-        u64 exslb[12];          /* used for SLB/segment table misses
+        u64 exgen[13] __attribute__((aligned(0x80)));
+        u64 exmc[13];           /* used for machine checks */
+        u64 exslb[13];          /* used for SLB/segment table misses
                                  * on the linear mapping */
         /* SLB related definitions */
         u16 vmalloc_sllp;
diff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include/asm/pci-bridge.h
index 32d0d2018faf..4ca90a39d6d0 100644
--- a/arch/powerpc/include/asm/pci-bridge.h
+++ b/arch/powerpc/include/asm/pci-bridge.h
@@ -159,7 +159,7 @@ struct pci_dn {
 
         int     pci_ext_config_space;   /* for pci devices */
 
-        int     force_32bit_msi:1;
+        bool    force_32bit_msi;
 
         struct  pci_dev *pcidev;        /* back-pointer to the pci device */
 #ifdef CONFIG_EEH
diff --git a/arch/powerpc/include/asm/perf_event_fsl_emb.h b/arch/powerpc/include/asm/perf_event_fsl_emb.h
index 718a9fa94e68..a58165450f6f 100644
--- a/arch/powerpc/include/asm/perf_event_fsl_emb.h
+++ b/arch/powerpc/include/asm/perf_event_fsl_emb.h
@@ -13,7 +13,7 @@
 #include <linux/types.h>
 #include <asm/hw_irq.h>
 
-#define MAX_HWEVENTS 4
+#define MAX_HWEVENTS 6
 
 /* event flags */
 #define FSL_EMB_EVENT_VALID      1
diff --git a/arch/powerpc/platforms/pseries/plpar_wrappers.h b/arch/powerpc/include/asm/plpar_wrappers.h
index f35787b6a5e0..a63b045e707c 100644
--- a/arch/powerpc/platforms/pseries/plpar_wrappers.h
+++ b/arch/powerpc/include/asm/plpar_wrappers.h
@@ -1,5 +1,5 @@
-#ifndef _PSERIES_PLPAR_WRAPPERS_H
-#define _PSERIES_PLPAR_WRAPPERS_H
+#ifndef _ASM_POWERPC_PLPAR_WRAPPERS_H
+#define _ASM_POWERPC_PLPAR_WRAPPERS_H
 
 #include <linux/string.h>
 #include <linux/irqflags.h>
@@ -256,30 +256,6 @@ static inline long plpar_tce_stuff(unsigned long liobn, unsigned long ioba,
         return plpar_hcall_norets(H_STUFF_TCE, liobn, ioba, tceval, count);
 }
 
-static inline long plpar_get_term_char(unsigned long termno,
-                unsigned long *len_ret, char *buf_ret)
-{
-        long rc;
-        unsigned long retbuf[PLPAR_HCALL_BUFSIZE];
-        unsigned long *lbuf = (unsigned long *)buf_ret; /* TODO: alignment? */
-
-        rc = plpar_hcall(H_GET_TERM_CHAR, retbuf, termno);
-
-        *len_ret = retbuf[0];
-        lbuf[0] = retbuf[1];
-        lbuf[1] = retbuf[2];
-
-        return rc;
-}
-
-static inline long plpar_put_term_char(unsigned long termno, unsigned long len,
-                const char *buffer)
-{
-        unsigned long *lbuf = (unsigned long *)buffer;  /* TODO: alignment? */
-        return plpar_hcall_norets(H_PUT_TERM_CHAR, termno, len, lbuf[0],
-                        lbuf[1]);
-}
-
 /* Set various resource mode parameters */
 static inline long plpar_set_mode(unsigned long mflags, unsigned long resource,
                 unsigned long value1, unsigned long value2)
@@ -321,4 +297,4 @@ static inline long plapr_set_watchpoint0(unsigned long dawr0, unsigned long dawr
         return plpar_set_mode(0, 2, dawr0, dawrx0);
 }
 
-#endif /* _PSERIES_PLPAR_WRAPPERS_H */
+#endif /* _ASM_POWERPC_PLPAR_WRAPPERS_H */
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h
index eccfc161e58e..d7fe9f5b46d4 100644
--- a/arch/powerpc/include/asm/ppc-opcode.h
+++ b/arch/powerpc/include/asm/ppc-opcode.h
@@ -81,6 +81,53 @@
 #define __REGA0_R30     30
 #define __REGA0_R31     31
 
+/* opcode and xopcode for instructions */
+#define OP_TRAP 3
+#define OP_TRAP_64 2
+
+#define OP_31_XOP_TRAP      4
+#define OP_31_XOP_LWZX      23
+#define OP_31_XOP_DCBST     54
+#define OP_31_XOP_LWZUX     55
+#define OP_31_XOP_TRAP_64   68
+#define OP_31_XOP_DCBF      86
+#define OP_31_XOP_LBZX      87
+#define OP_31_XOP_STWX      151
+#define OP_31_XOP_STBX      215
+#define OP_31_XOP_LBZUX     119
+#define OP_31_XOP_STBUX     247
+#define OP_31_XOP_LHZX      279
+#define OP_31_XOP_LHZUX     311
+#define OP_31_XOP_MFSPR     339
+#define OP_31_XOP_LHAX      343
+#define OP_31_XOP_LHAUX     375
+#define OP_31_XOP_STHX      407
+#define OP_31_XOP_STHUX     439
+#define OP_31_XOP_MTSPR     467
+#define OP_31_XOP_DCBI      470
+#define OP_31_XOP_LWBRX     534
+#define OP_31_XOP_TLBSYNC   566
+#define OP_31_XOP_STWBRX    662
+#define OP_31_XOP_LHBRX     790
+#define OP_31_XOP_STHBRX    918
+
+#define OP_LWZ  32
+#define OP_LD   58
+#define OP_LWZU 33
+#define OP_LBZ  34
+#define OP_LBZU 35
+#define OP_STW  36
+#define OP_STWU 37
+#define OP_STD  62
+#define OP_STB  38
+#define OP_STBU 39
+#define OP_LHZ  40
+#define OP_LHZU 41
+#define OP_LHA  42
+#define OP_LHAU 43
+#define OP_STH  44
+#define OP_STHU 45
+
 /* sorted alphabetically */
 #define PPC_INST_BHRBE                  0x7c00025c
 #define PPC_INST_CLRBHRB                0x7c00035c
diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h
index 2f1b6c5f8174..599545738af3 100644
--- a/arch/powerpc/include/asm/ppc_asm.h
+++ b/arch/powerpc/include/asm/ppc_asm.h
@@ -54,7 +54,8 @@ BEGIN_FW_FTR_SECTION;							\
         /* from user - see if there are any DTL entries to process */   \
         ld      r10,PACALPPACAPTR(r13); /* get ptr to VPA */            \
         ld      r11,PACA_DTL_RIDX(r13); /* get log read index */        \
-        ld      r10,LPPACA_DTLIDX(r10); /* get log write index */       \
+        addi    r10,r10,LPPACA_DTLIDX;                                  \
+        LDX_BE  r10,0,r10;              /* get log write index */       \
         cmpd    cr1,r11,r10;                                            \
         beq+    cr1,33f;                                                \
         bl      .accumulate_stolen_time;                                \
@@ -219,19 +220,6 @@ END_FW_FTR_SECTION_IFSET(FW_FEATURE_SPLPAR)
 #define REST_8VSRS(n,b,base)    REST_4VSRS(n,b,base); REST_4VSRS(n+4,b,base)
 #define REST_16VSRS(n,b,base)   REST_8VSRS(n,b,base); REST_8VSRS(n+8,b,base)
 #define REST_32VSRS(n,b,base)   REST_16VSRS(n,b,base); REST_16VSRS(n+16,b,base)
-/* Save the upper 32 VSRs (32-63) in the thread VSX region (0-31) */
-#define SAVE_VSRU(n,b,base)     li b,THREAD_VR0+(16*(n));  STXVD2X(n+32,R##base,R##b)
-#define SAVE_2VSRSU(n,b,base)   SAVE_VSRU(n,b,base); SAVE_VSRU(n+1,b,base)
-#define SAVE_4VSRSU(n,b,base)   SAVE_2VSRSU(n,b,base); SAVE_2VSRSU(n+2,b,base)
-#define SAVE_8VSRSU(n,b,base)   SAVE_4VSRSU(n,b,base); SAVE_4VSRSU(n+4,b,base)
-#define SAVE_16VSRSU(n,b,base)  SAVE_8VSRSU(n,b,base); SAVE_8VSRSU(n+8,b,base)
-#define SAVE_32VSRSU(n,b,base)  SAVE_16VSRSU(n,b,base); SAVE_16VSRSU(n+16,b,base)
-#define REST_VSRU(n,b,base)     li b,THREAD_VR0+(16*(n)); LXVD2X(n+32,R##base,R##b)
-#define REST_2VSRSU(n,b,base)   REST_VSRU(n,b,base); REST_VSRU(n+1,b,base)
-#define REST_4VSRSU(n,b,base)   REST_2VSRSU(n,b,base); REST_2VSRSU(n+2,b,base)
-#define REST_8VSRSU(n,b,base)   REST_4VSRSU(n,b,base); REST_4VSRSU(n+4,b,base)
-#define REST_16VSRSU(n,b,base)  REST_8VSRSU(n,b,base); REST_8VSRSU(n+8,b,base)
-#define REST_32VSRSU(n,b,base)  REST_16VSRSU(n,b,base); REST_16VSRSU(n+16,b,base)
 
 /*
  * b = base register for addressing, o = base offset from register of 1st EVR
@@ -443,15 +431,15 @@ END_FTR_SECTION_IFSET(CPU_FTR_601)
 #define ISYNC_601
 #endif
 
-#ifdef CONFIG_PPC_CELL
+#if defined(CONFIG_PPC_CELL) || defined(CONFIG_PPC_FSL_BOOK3E)
 #define MFTB(dest)                      \
-90:     mftb  dest;                     \
+90:     mfspr dest, SPRN_TBRL;          \
 BEGIN_FTR_SECTION_NESTED(96);           \
         cmpwi dest,0;                   \
         beq-  90b;                      \
 END_FTR_SECTION_NESTED(CPU_FTR_CELL_TB_BUG, CPU_FTR_CELL_TB_BUG, 96)
 #else
-#define MFTB(dest)                      mftb dest
+#define MFTB(dest)                      mfspr dest, SPRN_TBRL
 #endif
 
 #ifndef CONFIG_SMP
diff --git a/arch/powerpc/include/asm/prom.h b/arch/powerpc/include/asm/prom.h
index ac204e022922..7d0c7f3a7171 100644
--- a/arch/powerpc/include/asm/prom.h
+++ b/arch/powerpc/include/asm/prom.h
@@ -38,8 +38,9 @@ extern unsigned long pci_address_to_pio(phys_addr_t address);
 /* Parse the ibm,dma-window property of an OF node into the busno, phys and
  * size parameters.
  */
-void of_parse_dma_window(struct device_node *dn, const void *dma_window_prop,
-                unsigned long *busno, unsigned long *phys, unsigned long *size);
+void of_parse_dma_window(struct device_node *dn, const __be32 *dma_window,
+                         unsigned long *busno, unsigned long *phys,
+                         unsigned long *size);
 
 extern void kdump_move_device_tree(void);
 
@@ -55,6 +56,8 @@ static inline int of_node_to_nid(struct device_node *device) { return 0; }
 
 extern void of_instantiate_rtc(void);
 
+extern int of_get_ibm_chip_id(struct device_node *np);
+
 /* The of_drconf_cell struct defines the layout of the LMB array
  * specified in the device tree property
  * ibm,dynamic-reconfiguration-memory/ibm,dynamic-memory
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index 99222e27f173..10d1ef016bf1 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -115,10 +115,10 @@
 #define MSR_64BIT       MSR_SF
 
 /* Server variant */
-#define MSR_            MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_ISF |MSR_HV
-#define MSR_KERNEL      MSR_ | MSR_64BIT
-#define MSR_USER32      MSR_ | MSR_PR | MSR_EE
-#define MSR_USER64      MSR_USER32 | MSR_64BIT
+#define MSR_            (MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_ISF |MSR_HV)
+#define MSR_KERNEL      (MSR_ | MSR_64BIT)
+#define MSR_USER32      (MSR_ | MSR_PR | MSR_EE)
+#define MSR_USER64      (MSR_USER32 | MSR_64BIT)
 #elif defined(CONFIG_PPC_BOOK3S_32) || defined(CONFIG_8xx)
 /* Default MSR for kernel mode. */
 #define MSR_KERNEL      (MSR_ME|MSR_RI|MSR_IR|MSR_DR)
@@ -258,8 +258,8 @@
 #define FSCR_TAR_LG     8       /* Enable Target Address Register */
 #define FSCR_EBB_LG     7       /* Enable Event Based Branching */
 #define FSCR_TM_LG      5       /* Enable Transactional Memory */
-#define FSCR_PM_LG      4       /* Enable prob/priv access to PMU SPRs */
-#define FSCR_BHRB_LG    3       /* Enable Branch History Rolling Buffer*/
+#define FSCR_BHRB_LG    4       /* Enable Branch History Rolling Buffer*/
+#define FSCR_PM_LG      3       /* Enable prob/priv access to PMU SPRs */
 #define FSCR_DSCR_LG    2       /* Enable Data Stream Control Register */
 #define FSCR_VECVSX_LG  1       /* Enable VMX/VSX  */
 #define FSCR_FP_LG      0       /* Enable Floating Point */
@@ -1126,10 +1126,10 @@
                                      : "memory")
 
 #ifdef __powerpc64__
-#ifdef CONFIG_PPC_CELL
+#if defined(CONFIG_PPC_CELL) || defined(CONFIG_PPC_FSL_BOOK3E)
 #define mftb()          ({unsigned long rval;                           \
                         asm volatile(                                   \
-                                "90:    mftb %0;\n"                     \
+                                "90:    mfspr %0, %2;\n"                \
                                 "97:    cmpwi %0,0;\n"                  \
                                 "       beq- 90b;\n"                    \
                                 "99:\n"                                 \
@@ -1143,18 +1143,23 @@
                                 "       .llong 0\n"                     \
                                 "       .llong 0\n"                     \
                                 ".previous"                             \
-                        : "=r" (rval) : "i" (CPU_FTR_CELL_TB_BUG)); rval;})
+                        : "=r" (rval) \
+                        : "i" (CPU_FTR_CELL_TB_BUG), "i" (SPRN_TBRL)); \
+                        rval;})
 #else
 #define mftb()          ({unsigned long rval;   \
-                        asm volatile("mftb %0" : "=r" (rval)); rval;})
+                        asm volatile("mfspr %0, %1" : \
+                                     "=r" (rval) : "i" (SPRN_TBRL)); rval;})
 #endif /* !CONFIG_PPC_CELL */
 
 #else /* __powerpc64__ */
 
 #define mftbl()         ({unsigned long rval;   \
-                        asm volatile("mftbl %0" : "=r" (rval)); rval;})
+                        asm volatile("mfspr %0, %1" : "=r" (rval) : \
+                                "i" (SPRN_TBRL)); rval;})
 #define mftbu()         ({unsigned long rval;   \
-                        asm volatile("mftbu %0" : "=r" (rval)); rval;})
+                        asm volatile("mfspr %0, %1" : "=r" (rval) : \
+                                "i" (SPRN_TBRU)); rval;})
 #endif /* !__powerpc64__ */
 
 #define mttbl(v)        asm volatile("mttbl %0":: "r"(v))
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h
index b417de3cc2c4..ed8f836da094 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -29,10 +29,10 @@
 #if defined(CONFIG_PPC_BOOK3E_64)
 #define MSR_64BIT       MSR_CM
 
-#define MSR_            MSR_ME | MSR_CE
-#define MSR_KERNEL      MSR_ | MSR_64BIT
-#define MSR_USER32      MSR_ | MSR_PR | MSR_EE
-#define MSR_USER64      MSR_USER32 | MSR_64BIT
+#define MSR_            (MSR_ME | MSR_CE)
+#define MSR_KERNEL      (MSR_ | MSR_64BIT)
+#define MSR_USER32      (MSR_ | MSR_PR | MSR_EE)
+#define MSR_USER64      (MSR_USER32 | MSR_64BIT)
 #elif defined (CONFIG_40x)
 #define MSR_KERNEL      (MSR_ME|MSR_RI|MSR_IR|MSR_DR|MSR_CE)
 #define MSR_USER        (MSR_KERNEL|MSR_PR|MSR_EE)
diff --git a/arch/powerpc/include/asm/reg_fsl_emb.h b/arch/powerpc/include/asm/reg_fsl_emb.h
index 77bb71cfd991..0e3ddf5177f6 100644
--- a/arch/powerpc/include/asm/reg_fsl_emb.h
+++ b/arch/powerpc/include/asm/reg_fsl_emb.h
@@ -17,12 +17,16 @@
 /* Freescale Book E Performance Monitor APU Registers */
 #define PMRN_PMC0       0x010   /* Performance Monitor Counter 0 */
 #define PMRN_PMC1       0x011   /* Performance Monitor Counter 1 */
-#define PMRN_PMC2       0x012   /* Performance Monitor Counter 1 */
-#define PMRN_PMC3       0x013   /* Performance Monitor Counter 1 */
+#define PMRN_PMC2       0x012   /* Performance Monitor Counter 2 */
+#define PMRN_PMC3       0x013   /* Performance Monitor Counter 3 */
+#define PMRN_PMC4       0x014   /* Performance Monitor Counter 4 */
+#define PMRN_PMC5       0x015   /* Performance Monitor Counter 5 */
 #define PMRN_PMLCA0     0x090   /* PM Local Control A0 */
 #define PMRN_PMLCA1     0x091   /* PM Local Control A1 */
 #define PMRN_PMLCA2     0x092   /* PM Local Control A2 */
 #define PMRN_PMLCA3     0x093   /* PM Local Control A3 */
+#define PMRN_PMLCA4     0x094   /* PM Local Control A4 */
+#define PMRN_PMLCA5     0x095   /* PM Local Control A5 */
 
 #define PMLCA_FC        0x80000000      /* Freeze Counter */
 #define PMLCA_FCS       0x40000000      /* Freeze in Supervisor */
@@ -30,14 +34,18 @@
 #define PMLCA_FCM1      0x10000000      /* Freeze when PMM==1 */
 #define PMLCA_FCM0      0x08000000      /* Freeze when PMM==0 */
 #define PMLCA_CE        0x04000000      /* Condition Enable */
+#define PMLCA_FGCS1     0x00000002      /* Freeze in guest state */
+#define PMLCA_FGCS0     0x00000001      /* Freeze in hypervisor state */
 
-#define PMLCA_EVENT_MASK 0x00ff0000     /* Event field */
+#define PMLCA_EVENT_MASK 0x01ff0000     /* Event field */
 #define PMLCA_EVENT_SHIFT       16
 
 #define PMRN_PMLCB0     0x110   /* PM Local Control B0 */
 #define PMRN_PMLCB1     0x111   /* PM Local Control B1 */
 #define PMRN_PMLCB2     0x112   /* PM Local Control B2 */
 #define PMRN_PMLCB3     0x113   /* PM Local Control B3 */
+#define PMRN_PMLCB4     0x114   /* PM Local Control B4 */
+#define PMRN_PMLCB5     0x115   /* PM Local Control B5 */
 
 #define PMLCB_THRESHMUL_MASK    0x0700  /* Threshold Multiple Field */
 #define PMLCB_THRESHMUL_SHIFT   8
@@ -55,16 +63,22 @@
 
 #define PMRN_UPMC0      0x000   /* User Performance Monitor Counter 0 */
 #define PMRN_UPMC1      0x001   /* User Performance Monitor Counter 1 */
-#define PMRN_UPMC2      0x002   /* User Performance Monitor Counter 1 */
-#define PMRN_UPMC3      0x003   /* User Performance Monitor Counter 1 */
+#define PMRN_UPMC2      0x002   /* User Performance Monitor Counter 2 */
+#define PMRN_UPMC3      0x003   /* User Performance Monitor Counter 3 */
+#define PMRN_UPMC4      0x004   /* User Performance Monitor Counter 4 */
+#define PMRN_UPMC5      0x005   /* User Performance Monitor Counter 5 */
 #define PMRN_UPMLCA0    0x080   /* User PM Local Control A0 */
 #define PMRN_UPMLCA1    0x081   /* User PM Local Control A1 */
 #define PMRN_UPMLCA2    0x082   /* User PM Local Control A2 */
 #define PMRN_UPMLCA3    0x083   /* User PM Local Control A3 */
+#define PMRN_UPMLCA4    0x084   /* User PM Local Control A4 */
+#define PMRN_UPMLCA5    0x085   /* User PM Local Control A5 */
 #define PMRN_UPMLCB0    0x100   /* User PM Local Control B0 */
 #define PMRN_UPMLCB1    0x101   /* User PM Local Control B1 */
 #define PMRN_UPMLCB2    0x102   /* User PM Local Control B2 */
 #define PMRN_UPMLCB3    0x103   /* User PM Local Control B3 */
+#define PMRN_UPMLCB4    0x104   /* User PM Local Control B4 */
+#define PMRN_UPMLCB5    0x105   /* User PM Local Control B5 */
 #define PMRN_UPMGC0     0x180   /* User PM Global Control 0 */
 
 
diff --git a/arch/powerpc/include/asm/rtas.h b/arch/powerpc/include/asm/rtas.h
index c7a8bfc9f6f5..9bd52c65e66f 100644
--- a/arch/powerpc/include/asm/rtas.h
+++ b/arch/powerpc/include/asm/rtas.h
@@ -44,12 +44,12 @@
  *
  */
 
-typedef u32 rtas_arg_t;
+typedef __be32 rtas_arg_t;
 
 struct rtas_args {
-        u32 token;
-        u32 nargs;
-        u32 nret; 
+        __be32 token;
+        __be32 nargs;
+        __be32 nret; 
         rtas_arg_t args[16];
         rtas_arg_t *rets;     /* Pointer to return values in args[]. */
 };  
diff --git a/arch/powerpc/include/asm/smp.h b/arch/powerpc/include/asm/smp.h
index 48cfc858abd6..98da78e0c2c0 100644
--- a/arch/powerpc/include/asm/smp.h
+++ b/arch/powerpc/include/asm/smp.h
@@ -112,6 +112,7 @@ static inline struct cpumask *cpu_core_mask(int cpu)
 }
 
 extern int cpu_to_core_id(int cpu);
+extern int cpu_to_chip_id(int cpu);
 
 /* Since OpenPIC has only 4 IPIs, we use slightly different message numbers.
  *
@@ -186,6 +187,8 @@ extern int smt_enabled_at_boot;
 extern int smp_mpic_probe(void);
 extern void smp_mpic_setup_cpu(int cpu);
 extern int smp_generic_kick_cpu(int nr);
+extern int smp_generic_cpu_bootable(unsigned int nr);
+
 
 extern void smp_generic_give_timebase(void);
 extern void smp_generic_take_timebase(void);
diff --git a/arch/powerpc/include/asm/spinlock.h b/arch/powerpc/include/asm/spinlock.h
index 5b23f910ee57..5f54a744dcc5 100644
--- a/arch/powerpc/include/asm/spinlock.h
+++ b/arch/powerpc/include/asm/spinlock.h
@@ -32,8 +32,12 @@
 
 #ifdef CONFIG_PPC64
 /* use 0x800000yy when locked, where yy == CPU number */
+#ifdef __BIG_ENDIAN__
 #define LOCK_TOKEN      (*(u32 *)(&get_paca()->lock_token))
 #else
+#define LOCK_TOKEN      (*(u32 *)(&get_paca()->paca_index))
+#endif
+#else
 #define LOCK_TOKEN      1
 #endif
 
@@ -96,7 +100,7 @@ static inline int arch_spin_trylock(arch_spinlock_t *lock)
 
 #if defined(CONFIG_PPC_SPLPAR)
 /* We only yield to the hypervisor if we are in shared processor mode */
-#define SHARED_PROCESSOR (local_paca->lppaca_ptr->shared_proc)
+#define SHARED_PROCESSOR (lppaca_shared_proc(local_paca->lppaca_ptr))
 extern void __spin_yield(arch_spinlock_t *lock);
 extern void __rw_yield(arch_rwlock_t *lock);
 #else /* SPLPAR */
diff --git a/arch/powerpc/include/asm/switch_to.h b/arch/powerpc/include/asm/switch_to.h
index 294c2cedcf7a..2be5618cdec6 100644
--- a/arch/powerpc/include/asm/switch_to.h
+++ b/arch/powerpc/include/asm/switch_to.h
@@ -25,11 +25,8 @@ static inline void save_tar(struct thread_struct *prev)
 static inline void save_tar(struct thread_struct *prev) {}
 #endif
 
-extern void giveup_fpu(struct task_struct *);
 extern void load_up_fpu(void);
-extern void disable_kernel_fp(void);
 extern void enable_kernel_fp(void);
-extern void flush_fp_to_thread(struct task_struct *);
 extern void enable_kernel_altivec(void);
 extern void load_up_altivec(struct task_struct *);
 extern int emulate_altivec(struct pt_regs *);
@@ -47,6 +44,14 @@ static inline void discard_lazy_cpu_state(void)
 }
 #endif
 
+#ifdef CONFIG_PPC_FPU
+extern void flush_fp_to_thread(struct task_struct *);
+extern void giveup_fpu(struct task_struct *);
+#else
+static inline void flush_fp_to_thread(struct task_struct *t) { }
+static inline void giveup_fpu(struct task_struct *t) { }
+#endif
+
 #ifdef CONFIG_ALTIVEC
 extern void flush_altivec_to_thread(struct task_struct *);
 extern void giveup_altivec(struct task_struct *);
diff --git a/arch/powerpc/include/asm/timex.h b/arch/powerpc/include/asm/timex.h
index c55e14f7ef44..18908caa1f3b 100644
--- a/arch/powerpc/include/asm/timex.h
+++ b/arch/powerpc/include/asm/timex.h
@@ -29,7 +29,7 @@ static inline cycles_t get_cycles(void)
         ret = 0;
 
         __asm__ __volatile__(
-                "97:    mftb %0\n"
+                "97:    mfspr %0, %2\n"
                 "99:\n"
                 ".section __ftr_fixup,\"a\"\n"
                 ".align 2\n"
@@ -41,7 +41,7 @@ static inline cycles_t get_cycles(void)
                 "       .long 0\n"
                 "       .long 0\n"
                 ".previous"
-                : "=r" (ret) : "i" (CPU_FTR_601));
+                : "=r" (ret) : "i" (CPU_FTR_601), "i" (SPRN_TBRL));
         return ret;
 #endif
 }
diff --git a/arch/powerpc/include/asm/topology.h b/arch/powerpc/include/asm/topology.h
index 161ab662843b..89e3ef2496ac 100644
--- a/arch/powerpc/include/asm/topology.h
+++ b/arch/powerpc/include/asm/topology.h
@@ -96,6 +96,7 @@ static inline int prrn_is_enabled(void)
 #ifdef CONFIG_PPC64
 #include <asm/smp.h>
 
+#define topology_physical_package_id(cpu)       (cpu_to_chip_id(cpu))
 #define topology_thread_cpumask(cpu)    (per_cpu(cpu_sibling_map, cpu))
 #define topology_core_cpumask(cpu)      (per_cpu(cpu_core_map, cpu))
 #define topology_core_id(cpu)           (cpu_to_core_id(cpu))
diff --git a/arch/powerpc/include/asm/udbg.h b/arch/powerpc/include/asm/udbg.h
index dc590919f8eb..b51fba10e733 100644
--- a/arch/powerpc/include/asm/udbg.h
+++ b/arch/powerpc/include/asm/udbg.h
@@ -27,10 +27,11 @@ extern void udbg_printf(const char *fmt, ...)
         __attribute__ ((format (printf, 1, 2)));
 extern void udbg_progress(char *s, unsigned short hex);
 
-extern void udbg_init_uart(void __iomem *comport, unsigned int speed,
-                           unsigned int clock);
-extern unsigned int udbg_probe_uart_speed(void __iomem *comport,
-                                          unsigned int clock);
+extern void udbg_uart_init_mmio(void __iomem *addr, unsigned int stride);
+extern void udbg_uart_init_pio(unsigned long port, unsigned int stride);
+
+extern void udbg_uart_setup(unsigned int speed, unsigned int clock);
+extern unsigned int udbg_probe_uart_speed(unsigned int clock);
 
 struct device_node;
 extern void udbg_scc_init(int force_scc);
diff --git a/arch/powerpc/include/uapi/asm/elf.h b/arch/powerpc/include/uapi/asm/elf.h
index 05b8d560cfba..7e39c9146a71 100644
--- a/arch/powerpc/include/uapi/asm/elf.h
+++ b/arch/powerpc/include/uapi/asm/elf.h
@@ -107,26 +107,25 @@ typedef elf_gregset_t32 compat_elf_gregset_t;
 # define ELF_NVRREG     34      /* includes vscr & vrsave in split vectors */
 # define ELF_NVSRHALFREG 32     /* Half the vsx registers */
 # define ELF_GREG_TYPE  elf_greg_t64
+# define ELF_ARCH       EM_PPC64
+# define ELF_CLASS      ELFCLASS64
+typedef elf_greg_t64 elf_greg_t;
+typedef elf_gregset_t64 elf_gregset_t;
 #else
 # define ELF_NEVRREG    34      /* includes acc (as 2) */
 # define ELF_NVRREG     33      /* includes vscr */
 # define ELF_GREG_TYPE  elf_greg_t32
 # define ELF_ARCH       EM_PPC
 # define ELF_CLASS      ELFCLASS32
-# define ELF_DATA       ELFDATA2MSB
+typedef elf_greg_t32 elf_greg_t;
+typedef elf_gregset_t32 elf_gregset_t;
 #endif /* __powerpc64__ */
 
-#ifndef ELF_ARCH
-# define ELF_ARCH       EM_PPC64
-# define ELF_CLASS      ELFCLASS64
-# define ELF_DATA       ELFDATA2MSB
-  typedef elf_greg_t64 elf_greg_t;
-  typedef elf_gregset_t64 elf_gregset_t;
+#ifdef __BIG_ENDIAN__
+#define ELF_DATA        ELFDATA2MSB
 #else
-  /* Assumption: ELF_ARCH == EM_PPC and ELF_CLASS == ELFCLASS32 */
-  typedef elf_greg_t32 elf_greg_t;
-  typedef elf_gregset_t32 elf_gregset_t;
-#endif /* ELF_ARCH */
+#define ELF_DATA        ELFDATA2LSB
+#endif
 
 /* Floating point registers */
 typedef double elf_fpreg_t;
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index a8619bfe879e..445cb6e39d5b 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -55,7 +55,6 @@ obj-$(CONFIG_PPC_RTAS)		+= rtas.o rtas-rtc.o $(rtaspci-y-y)
 obj-$(CONFIG_PPC_RTAS_DAEMON)   += rtasd.o
 obj-$(CONFIG_RTAS_FLASH)        += rtas_flash.o
 obj-$(CONFIG_RTAS_PROC)         += rtas-proc.o
-obj-$(CONFIG_LPARCFG)           += lparcfg.o
 obj-$(CONFIG_IBMVIO)            += vio.o
 obj-$(CONFIG_IBMEBUS)           += ibmebus.o
 obj-$(CONFIG_EEH)              += eeh.o eeh_pe.o eeh_dev.o eeh_cache.o \
@@ -117,9 +116,7 @@ obj-$(CONFIG_DYNAMIC_FTRACE)	+= ftrace.o
 obj-$(CONFIG_FUNCTION_GRAPH_TRACER)     += ftrace.o
 obj-$(CONFIG_FTRACE_SYSCALLS)   += ftrace.o
 
-obj-$(CONFIG_8XX_MINIMAL_FPEMU) += softemu8xx.o
-
-ifneq ($(CONFIG_PPC_INDIRECT_IO),y)
+ifneq ($(CONFIG_PPC_INDIRECT_PIO),y)
 obj-y                           += iomap.o
 endif
 
diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c
index ee5b690a0bed..a27ccd5dc6b9 100644
--- a/arch/powerpc/kernel/align.c
+++ b/arch/powerpc/kernel/align.c
@@ -651,6 +651,10 @@ static int emulate_vsx(unsigned char __user *addr, unsigned int reg,
         int sw = 0;
         int i, j;
 
+        /* userland only */
+        if (unlikely(!user_mode(regs)))
+                return 0;
+
         flush_vsx_to_thread(current);
 
         if (reg < 32)
@@ -764,6 +768,16 @@ int fix_alignment(struct pt_regs *regs)
         nb = aligninfo[instr].len;
         flags = aligninfo[instr].flags;
 
+        /* ldbrx/stdbrx overlap lfs/stfs in the DSISR unfortunately */
+        if (IS_XFORM(instruction) && ((instruction >> 1) & 0x3ff) == 532) {
+                nb = 8;
+                flags = LD+SW;
+        } else if (IS_XFORM(instruction) &&
+                   ((instruction >> 1) & 0x3ff) == 660) {
+                nb = 8;
+                flags = ST+SW;
+        }
+
         /* Byteswap little endian loads and stores */
         swiz = 0;
         if (regs->msr & MSR_LE) {
diff --git a/arch/powerpc/kernel/btext.c b/arch/powerpc/kernel/btext.c
index ac8f52732fde..41c011cb6070 100644
--- a/arch/powerpc/kernel/btext.c
+++ b/arch/powerpc/kernel/btext.c
@@ -25,11 +25,6 @@
 static void scrollscreen(void);
 #endif
 
-static void draw_byte(unsigned char c, long locX, long locY);
-static void draw_byte_32(unsigned char *bits, unsigned int *base, int rb);
-static void draw_byte_16(unsigned char *bits, unsigned int *base, int rb);
-static void draw_byte_8(unsigned char *bits, unsigned int *base, int rb);
-
 #define __force_data __attribute__((__section__(".data")))
 
 static int g_loc_X __force_data;
@@ -52,6 +47,26 @@ static unsigned char vga_font[cmapsz];
 int boot_text_mapped __force_data = 0;
 int force_printk_to_btext = 0;
 
+extern void rmci_on(void);
+extern void rmci_off(void);
+
+static inline void rmci_maybe_on(void)
+{
+#if defined(CONFIG_PPC_EARLY_DEBUG_BOOTX) && defined(CONFIG_PPC64)
+        if (!(mfmsr() & MSR_DR))
+                rmci_on();
+#endif
+}
+
+static inline void rmci_maybe_off(void)
+{
+#if defined(CONFIG_PPC_EARLY_DEBUG_BOOTX) && defined(CONFIG_PPC64)
+        if (!(mfmsr() & MSR_DR))
+                rmci_off();
+#endif
+}
+
+
 #ifdef CONFIG_PPC32
 /* Calc BAT values for mapping the display and store them
  * in disp_BAT.  Those values are then used from head.S to map
@@ -134,7 +149,7 @@ void __init btext_unmap(void)
  *    changes.
  */
 
-static void map_boot_text(void)
+void btext_map(void)
 {
         unsigned long base, offset, size;
         unsigned char *vbase;
@@ -209,7 +224,7 @@ int btext_initialize(struct device_node *np)
         dispDeviceRect[2] = width;
         dispDeviceRect[3] = height;
 
-        map_boot_text();
+        btext_map();
 
         return 0;
 }
@@ -283,7 +298,7 @@ void btext_update_display(unsigned long phys, int width, int height,
                 iounmap(logicalDisplayBase);
                 boot_text_mapped = 0;
         }
-        map_boot_text();
+        btext_map();
         g_loc_X = 0;
         g_loc_Y = 0;
         g_max_loc_X = width / 8;
@@ -298,6 +313,7 @@ void btext_clearscreen(void)
                                         (dispDeviceDepth >> 3)) >> 2;
         int i,j;
 
+        rmci_maybe_on();
         for (i=0; i<(dispDeviceRect[3] - dispDeviceRect[1]); i++)
         {
                 unsigned int *ptr = base;
@@ -305,6 +321,7 @@ void btext_clearscreen(void)
                         *(ptr++) = 0;
                 base += (dispDeviceRowBytes >> 2);
         }
+        rmci_maybe_off();
 }
 
 void btext_flushscreen(void)
@@ -355,6 +372,8 @@ static void scrollscreen(void)
                                    (dispDeviceDepth >> 3)) >> 2;
         int i,j;
 
+        rmci_maybe_on();
+
         for (i=0; i<(dispDeviceRect[3] - dispDeviceRect[1] - 16); i++)
         {
                 unsigned int *src_ptr = src;
@@ -371,9 +390,116 @@ static void scrollscreen(void)
                         *(dst_ptr++) = 0;
                 dst += (dispDeviceRowBytes >> 2);
         }
+
+        rmci_maybe_off();
 }
 #endif /* ndef NO_SCROLL */
 
+static unsigned int expand_bits_8[16] = {
+        0x00000000,
+        0x000000ff,
+        0x0000ff00,
+        0x0000ffff,
+        0x00ff0000,
+        0x00ff00ff,
+        0x00ffff00,
+        0x00ffffff,
+        0xff000000,
+        0xff0000ff,
+        0xff00ff00,
+        0xff00ffff,
+        0xffff0000,
+        0xffff00ff,
+        0xffffff00,
+        0xffffffff
+};
+
+static unsigned int expand_bits_16[4] = {
+        0x00000000,
+        0x0000ffff,
+        0xffff0000,
+        0xffffffff
+};
+
+
+static void draw_byte_32(unsigned char *font, unsigned int *base, int rb)
+{
+        int l, bits;
+        int fg = 0xFFFFFFFFUL;
+        int bg = 0x00000000UL;
+
+        for (l = 0; l < 16; ++l)
+        {
+                bits = *font++;
+                base[0] = (-(bits >> 7) & fg) ^ bg;
+                base[1] = (-((bits >> 6) & 1) & fg) ^ bg;
+                base[2] = (-((bits >> 5) & 1) & fg) ^ bg;
+                base[3] = (-((bits >> 4) & 1) & fg) ^ bg;
+                base[4] = (-((bits >> 3) & 1) & fg) ^ bg;
+                base[5] = (-((bits >> 2) & 1) & fg) ^ bg;
+                base[6] = (-((bits >> 1) & 1) & fg) ^ bg;
+                base[7] = (-(bits & 1) & fg) ^ bg;
+                base = (unsigned int *) ((char *)base + rb);
+        }
+}
+
+static inline void draw_byte_16(unsigned char *font, unsigned int *base, int rb)
+{
+        int l, bits;
+        int fg = 0xFFFFFFFFUL;
+        int bg = 0x00000000UL;
+        unsigned int *eb = (int *)expand_bits_16;
+
+        for (l = 0; l < 16; ++l)
+        {
+                bits = *font++;
+                base[0] = (eb[bits >> 6] & fg) ^ bg;
+                base[1] = (eb[(bits >> 4) & 3] & fg) ^ bg;
+                base[2] = (eb[(bits >> 2) & 3] & fg) ^ bg;
+                base[3] = (eb[bits & 3] & fg) ^ bg;
+                base = (unsigned int *) ((char *)base + rb);
+        }
+}
+
+static inline void draw_byte_8(unsigned char *font, unsigned int *base, int rb)
+{
+        int l, bits;
+        int fg = 0x0F0F0F0FUL;
+        int bg = 0x00000000UL;
+        unsigned int *eb = (int *)expand_bits_8;
+
+        for (l = 0; l < 16; ++l)
+        {
+                bits = *font++;
+                base[0] = (eb[bits >> 4] & fg) ^ bg;
+                base[1] = (eb[bits & 0xf] & fg) ^ bg;
+                base = (unsigned int *) ((char *)base + rb);
+        }
+}
+
+static noinline void draw_byte(unsigned char c, long locX, long locY)
+{
+        unsigned char *base     = calc_base(locX << 3, locY << 4);
+        unsigned char *font     = &vga_font[((unsigned int)c) * 16];
+        int rb                  = dispDeviceRowBytes;
+
+        rmci_maybe_on();
+        switch(dispDeviceDepth) {
+        case 24:
+        case 32:
+                draw_byte_32(font, (unsigned int *)base, rb);
+                break;
+        case 15:
+        case 16:
+                draw_byte_16(font, (unsigned int *)base, rb);
+                break;
+        case 8:
+                draw_byte_8(font, (unsigned int *)base, rb);
+                break;
+        }
+        rmci_maybe_off();
+}
+
 void btext_drawchar(char c)
 {
         int cline = 0;
@@ -465,107 +591,12 @@ void btext_drawhex(unsigned long v)
         btext_drawchar(' ');
 }
 
-static void draw_byte(unsigned char c, long locX, long locY)
-{
-        unsigned char *base     = calc_base(locX << 3, locY << 4);
-        unsigned char *font     = &vga_font[((unsigned int)c) * 16];
-        int rb                  = dispDeviceRowBytes;
-
-        switch(dispDeviceDepth) {
-        case 24:
-        case 32:
-                draw_byte_32(font, (unsigned int *)base, rb);
-                break;
-        case 15:
-        case 16:
-                draw_byte_16(font, (unsigned int *)base, rb);
-                break;
-        case 8:
-                draw_byte_8(font, (unsigned int *)base, rb);
-                break;
-        }
-}
-
-static unsigned int expand_bits_8[16] = {
-        0x00000000,
-        0x000000ff,
-        0x0000ff00,
-        0x0000ffff,
-        0x00ff0000,
-        0x00ff00ff,
-        0x00ffff00,
-        0x00ffffff,
-        0xff000000,
-        0xff0000ff,
-        0xff00ff00,
-        0xff00ffff,
-        0xffff0000,
-        0xffff00ff,
-        0xffffff00,
-        0xffffffff
-};
-
-static unsigned int expand_bits_16[4] = {
-        0x00000000,
-        0x0000ffff,
-        0xffff0000,
-        0xffffffff
-};
-
-
-static void draw_byte_32(unsigned char *font, unsigned int *base, int rb)
-{
-        int l, bits;
-        int fg = 0xFFFFFFFFUL;
-        int bg = 0x00000000UL;
-
-        for (l = 0; l < 16; ++l)
-        {
-                bits = *font++;
-                base[0] = (-(bits >> 7) & fg) ^ bg;
-                base[1] = (-((bits >> 6) & 1) & fg) ^ bg;
-                base[2] = (-((bits >> 5) & 1) & fg) ^ bg;
-                base[3] = (-((bits >> 4) & 1) & fg) ^ bg;
-                base[4] = (-((bits >> 3) & 1) & fg) ^ bg;
-                base[5] = (-((bits >> 2) & 1) & fg) ^ bg;
-                base[6] = (-((bits >> 1) & 1) & fg) ^ bg;
-                base[7] = (-(bits & 1) & fg) ^ bg;
-                base = (unsigned int *) ((char *)base + rb);
-        }
-}
-
-static void draw_byte_16(unsigned char *font, unsigned int *base, int rb)
-{
-        int l, bits;
-        int fg = 0xFFFFFFFFUL;
-        int bg = 0x00000000UL;
-        unsigned int *eb = (int *)expand_bits_16;
-
-        for (l = 0; l < 16; ++l)
-        {
-                bits = *font++;
-                base[0] = (eb[bits >> 6] & fg) ^ bg;
-                base[1] = (eb[(bits >> 4) & 3] & fg) ^ bg;
-                base[2] = (eb[(bits >> 2) & 3] & fg) ^ bg;
-                base[3] = (eb[bits & 3] & fg) ^ bg;
-                base = (unsigned int *) ((char *)base + rb);
-        }
-}
-
-static void draw_byte_8(unsigned char *font, unsigned int *base, int rb)
+void __init udbg_init_btext(void)
 {
-        int l, bits;
-        int fg = 0x0F0F0F0FUL;
-        int bg = 0x00000000UL;
-        unsigned int *eb = (int *)expand_bits_8;
-
-        for (l = 0; l < 16; ++l)
-        {
-                bits = *font++;
-                base[0] = (eb[bits >> 4] & fg) ^ bg;
-                base[1] = (eb[bits & 0xf] & fg) ^ bg;
-                base = (unsigned int *) ((char *)base + rb);
-        }
+        /* If btext is enabled, we might have a BAT setup for early display,
+         * thus we do enable some very basic udbg output
+         */
+        udbg_putc = btext_drawchar;
 }
 
 static unsigned char vga_font[cmapsz] = {
@@ -913,10 +944,3 @@ static unsigned char vga_font[cmapsz] = {
 0x00, 0x00, 0x00, 0x00,
 };
 
-void __init udbg_init_btext(void)
-{
-        /* If btext is enabled, we might have a BAT setup for early display,
-         * thus we do enable some very basic udbg output
-         */
-        udbg_putc = btext_drawchar;
-}
diff --git a/arch/powerpc/kernel/cacheinfo.c b/arch/powerpc/kernel/cacheinfo.c
index 9262cf2bec4b..654932727873 100644
--- a/arch/powerpc/kernel/cacheinfo.c
+++ b/arch/powerpc/kernel/cacheinfo.c
@@ -196,7 +196,7 @@ static void cache_cpu_set(struct cache *cache, int cpu)
 static int cache_size(const struct cache *cache, unsigned int *ret)
 {
         const char *propname;
-        const u32 *cache_size;
+        const __be32 *cache_size;
 
         propname = cache_type_info[cache->type].size_prop;
 
@@ -204,7 +204,7 @@ static int cache_size(const struct cache *cache, unsigned int *ret)
         if (!cache_size)
                 return -ENODEV;
 
-        *ret = *cache_size;
+        *ret = of_read_number(cache_size, 1);
         return 0;
 }
 
@@ -222,7 +222,7 @@ static int cache_size_kb(const struct cache *cache, unsigned int *ret)
 /* not cache_line_size() because that's a macro in include/linux/cache.h */
 static int cache_get_line_size(const struct cache *cache, unsigned int *ret)
 {
-        const u32 *line_size;
+        const __be32 *line_size;
         int i, lim;
 
         lim = ARRAY_SIZE(cache_type_info[cache->type].line_size_props);
@@ -239,14 +239,14 @@ static int cache_get_line_size(const struct cache *cache, unsigned int *ret)
         if (!line_size)
                 return -ENODEV;
 
-        *ret = *line_size;
+        *ret = of_read_number(line_size, 1);
         return 0;
 }
 
 static int cache_nr_sets(const struct cache *cache, unsigned int *ret)
 {
         const char *propname;
-        const u32 *nr_sets;
+        const __be32 *nr_sets;
 
         propname = cache_type_info[cache->type].nr_sets_prop;
 
@@ -254,7 +254,7 @@ static int cache_nr_sets(const struct cache *cache, unsigned int *ret)
         if (!nr_sets)
                 return -ENODEV;
 
-        *ret = *nr_sets;
+        *ret = of_read_number(nr_sets, 1);
         return 0;
 }
 
diff --git a/arch/powerpc/kernel/cpu_setup_fsl_booke.S b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
index 0b9af015bedc..bfb18c7290b7 100644
--- a/arch/powerpc/kernel/cpu_setup_fsl_booke.S
+++ b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
@@ -75,7 +75,7 @@ _GLOBAL(__setup_cpu_e500v2)
         bl      __e500_icache_setup
         bl      __e500_dcache_setup
         bl      __setup_e500_ivors
-#ifdef CONFIG_FSL_RIO
+#if defined(CONFIG_FSL_RIO) || defined(CONFIG_FSL_PCI)
         /* Ensure that RFXE is set */
         mfspr   r3,SPRN_HID1
         oris    r3,r3,HID1_RFXE@h
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 22973a74df73..597d954e5860 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -2105,7 +2105,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                         MMU_FTR_USE_TLBILX,
                 .icache_bsize           = 64,
                 .dcache_bsize           = 64,
-                .num_pmcs               = 4,
+                .num_pmcs               = 6,
                 .oprofile_cpu_type      = "ppc/e6500",
                 .oprofile_type          = PPC_OPROFILE_FSL_EMB,
                 .cpu_setup              = __setup_cpu_e6500,
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index 2bd0b885b0fe..c04cdf70d487 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -102,7 +102,8 @@ BEGIN_FW_FTR_SECTION
         /* if from user, see if there are any DTL entries to process */
         ld      r10,PACALPPACAPTR(r13)  /* get ptr to VPA */
         ld      r11,PACA_DTL_RIDX(r13)  /* get log read index */
-        ld      r10,LPPACA_DTLIDX(r10)  /* get log write index */
+        addi    r10,r10,LPPACA_DTLIDX
+        LDX_BE  r10,0,r10               /* get log write index */
         cmpd    cr1,r11,r10
         beq+    cr1,33f
         bl      .accumulate_stolen_time
@@ -522,9 +523,11 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_1T_SEGMENT)
          */
         ld      r9,PACA_SLBSHADOWPTR(r13)
         li      r12,0
-        std     r12,SLBSHADOW_STACKESID(r9) /* Clear ESID */
-        std     r7,SLBSHADOW_STACKVSID(r9)  /* Save VSID */
-        std     r0,SLBSHADOW_STACKESID(r9)  /* Save ESID */
+        std     r12,SLBSHADOW_STACKESID(r9)     /* Clear ESID */
+        li      r12,SLBSHADOW_STACKVSID
+        STDX_BE r7,r12,r9                       /* Save VSID */
+        li      r12,SLBSHADOW_STACKESID
+        STDX_BE r0,r12,r9                       /* Save ESID */
 
         /* No need to check for MMU_FTR_NO_SLBIE_B here, since when
          * we have 1TB segments, the only CPUs known to have the errata
@@ -575,34 +578,15 @@ BEGIN_FTR_SECTION
         ld      r7,DSCR_DEFAULT@toc(2)
         ld      r0,THREAD_DSCR(r4)
         cmpwi   r6,0
-        li      r8, FSCR_DSCR
         bne     1f
         ld      r0,0(r7)
-        b       3f
 1:
-  BEGIN_FTR_SECTION_NESTED(70)
-        mfspr   r6, SPRN_FSCR
-        or      r6, r6, r8
-        mtspr   SPRN_FSCR, r6
-    BEGIN_FTR_SECTION_NESTED(69)
-        mfspr   r6, SPRN_HFSCR
-        or      r6, r6, r8
-        mtspr   SPRN_HFSCR, r6
-    END_FTR_SECTION_NESTED(CPU_FTR_HVMODE, CPU_FTR_HVMODE, 69)
-        b       4f
-  END_FTR_SECTION_NESTED(CPU_FTR_ARCH_207S, CPU_FTR_ARCH_207S, 70)
-3:
-  BEGIN_FTR_SECTION_NESTED(70)
-        mfspr   r6, SPRN_FSCR
-        andc    r6, r6, r8
-        mtspr   SPRN_FSCR, r6
-    BEGIN_FTR_SECTION_NESTED(69)
-        mfspr   r6, SPRN_HFSCR
-        andc    r6, r6, r8
-        mtspr   SPRN_HFSCR, r6
-    END_FTR_SECTION_NESTED(CPU_FTR_HVMODE, CPU_FTR_HVMODE, 69)
-  END_FTR_SECTION_NESTED(CPU_FTR_ARCH_207S, CPU_FTR_ARCH_207S, 70)
-4:      cmpd    r0,r25
+BEGIN_FTR_SECTION_NESTED(70)
+        mfspr   r8, SPRN_FSCR
+        rldimi  r8, r6, FSCR_DSCR_LG, (63 - FSCR_DSCR_LG)
+        mtspr   SPRN_FSCR, r8
+END_FTR_SECTION_NESTED(CPU_FTR_ARCH_207S, CPU_FTR_ARCH_207S, 70)
+        cmpd    r0,r25
         beq     2f
         mtspr   SPRN_DSCR,r0
 2:
@@ -737,9 +721,9 @@ resume_kernel:
 
         /*
          * Here we are preempting the current task. We want to make
-         * sure we are soft-disabled first
+         * sure we are soft-disabled first and reconcile irq state.
          */
-        SOFT_DISABLE_INTS(r3,r4)
+        RECONCILE_IRQ_STATE(r3,r4)
 1:      bl      .preempt_schedule_irq
 
         /* Re-test flags and eventually loop */
diff --git a/arch/powerpc/kernel/epapr_paravirt.c b/arch/powerpc/kernel/epapr_paravirt.c
index d44a571e45a7..6300c13bbde4 100644
--- a/arch/powerpc/kernel/epapr_paravirt.c
+++ b/arch/powerpc/kernel/epapr_paravirt.c
@@ -30,22 +30,20 @@ extern u32 epapr_ev_idle_start[];
 
 bool epapr_paravirt_enabled;
 
-static int __init epapr_paravirt_init(void)
+static int __init early_init_dt_scan_epapr(unsigned long node,
+                                           const char *uname,
+                                           int depth, void *data)
 {
-        struct device_node *hyper_node;
         const u32 *insts;
-        int len, i;
+        unsigned long len;
+        int i;
 
-        hyper_node = of_find_node_by_path("/hypervisor");
-        if (!hyper_node)
-                return -ENODEV;
-
-        insts = of_get_property(hyper_node, "hcall-instructions", &len);
+        insts = of_get_flat_dt_prop(node, "hcall-instructions", &len);
         if (!insts)
-                return -ENODEV;
+                return 0;
 
         if (len % 4 || len > (4 * 4))
-                return -ENODEV;
+                return -1;
 
         for (i = 0; i < (len / 4); i++) {
                 patch_instruction(epapr_hypercall_start + i, insts[i]);
@@ -55,13 +53,19 @@ static int __init epapr_paravirt_init(void)
         }
 
 #if !defined(CONFIG_64BIT) || defined(CONFIG_PPC_BOOK3E_64)
-        if (of_get_property(hyper_node, "has-idle", NULL))
+        if (of_get_flat_dt_prop(node, "has-idle", NULL))
                 ppc_md.power_save = epapr_ev_idle;
 #endif
 
         epapr_paravirt_enabled = true;
 
+        return 1;
+}
+
+int __init epapr_paravirt_early_init(void)
+{
+        of_scan_flat_dt(early_init_dt_scan_epapr, NULL);
+
         return 0;
 }
 
-early_initcall(epapr_paravirt_init);
diff --git a/arch/powerpc/kernel/exceptions-64e.S b/arch/powerpc/kernel/exceptions-64e.S
index 645170a07ada..2d067049db27 100644
--- a/arch/powerpc/kernel/exceptions-64e.S
+++ b/arch/powerpc/kernel/exceptions-64e.S
@@ -198,9 +198,9 @@ exc_##n##_common:							    \
 /* This second version is meant for exceptions that don't immediately
  * hard-enable. We set a bit in paca->irq_happened to ensure that
  * a subsequent call to arch_local_irq_restore() will properly
- * hard-enable and avoid the fast-path
+ * hard-enable and avoid the fast-path, and then reconcile irq state.
  */
-#define INTS_DISABLE    SOFT_DISABLE_INTS(r3,r4)
+#define INTS_DISABLE    RECONCILE_IRQ_STATE(r3,r4)
 
 /* This is called by exceptions that used INTS_KEEP (that did not touch
  * irq indicators in the PACA). This will restore MSR:EE to it's previous
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index 902ca3c6b4b6..3a9ed6ac224b 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -293,27 +293,31 @@ system_call_pSeries:
          * out of line to handle them
          */
         . = 0xe00
-hv_exception_trampoline:
+hv_data_storage_trampoline:
         SET_SCRATCH0(r13)
         EXCEPTION_PROLOG_0(PACA_EXGEN)
         b       h_data_storage_hv
 
         . = 0xe20
+hv_instr_storage_trampoline:
         SET_SCRATCH0(r13)
         EXCEPTION_PROLOG_0(PACA_EXGEN)
         b       h_instr_storage_hv
 
         . = 0xe40
+emulation_assist_trampoline:
         SET_SCRATCH0(r13)
         EXCEPTION_PROLOG_0(PACA_EXGEN)
         b       emulation_assist_hv
 
         . = 0xe60
+hv_exception_trampoline:
         SET_SCRATCH0(r13)
         EXCEPTION_PROLOG_0(PACA_EXGEN)
         b       hmi_exception_hv
 
         . = 0xe80
+hv_doorbell_trampoline:
         SET_SCRATCH0(r13)
         EXCEPTION_PROLOG_0(PACA_EXGEN)
         b       h_doorbell_hv
@@ -323,32 +327,32 @@ hv_exception_trampoline:
          * prolog code of the PerformanceMonitor one. A little
          * trickery is thus necessary
          */
-performance_monitor_pSeries_1:
         . = 0xf00
+performance_monitor_pseries_trampoline:
         SET_SCRATCH0(r13)
         EXCEPTION_PROLOG_0(PACA_EXGEN)
         b       performance_monitor_pSeries
 
-altivec_unavailable_pSeries_1:
         . = 0xf20
+altivec_unavailable_pseries_trampoline:
         SET_SCRATCH0(r13)
         EXCEPTION_PROLOG_0(PACA_EXGEN)
         b       altivec_unavailable_pSeries
 
-vsx_unavailable_pSeries_1:
         . = 0xf40
+vsx_unavailable_pseries_trampoline:
         SET_SCRATCH0(r13)
         EXCEPTION_PROLOG_0(PACA_EXGEN)
         b       vsx_unavailable_pSeries
 
-facility_unavailable_trampoline:
         . = 0xf60
+facility_unavailable_trampoline:
         SET_SCRATCH0(r13)
         EXCEPTION_PROLOG_0(PACA_EXGEN)
         b       facility_unavailable_pSeries
 
-hv_facility_unavailable_trampoline:
         . = 0xf80
+hv_facility_unavailable_trampoline:
         SET_SCRATCH0(r13)
         EXCEPTION_PROLOG_0(PACA_EXGEN)
         b       facility_unavailable_hv
@@ -367,11 +371,7 @@ denorm_exception_hv:
         HMT_MEDIUM_PPR_DISCARD
         mtspr   SPRN_SPRG_HSCRATCH0,r13
         EXCEPTION_PROLOG_0(PACA_EXGEN)
-        std     r11,PACA_EXGEN+EX_R11(r13)
-        std     r12,PACA_EXGEN+EX_R12(r13)
-        mfspr   r9,SPRN_SPRG_HSCRATCH0
-        std     r9,PACA_EXGEN+EX_R13(r13)
-        mfcr    r9
+        EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, 0x1500)
 
 #ifdef CONFIG_PPC_DENORMALISATION
         mfspr   r10,SPRN_HSRR1
@@ -381,6 +381,7 @@ denorm_exception_hv:
         bne+    denorm_assist
 #endif
 
+        KVMTEST(0x1500)
         EXCEPTION_PROLOG_PSERIES_1(denorm_common, EXC_HV)
         KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x1500)
 
@@ -501,6 +502,10 @@ denorm_done:
         mtcrf   0x80,r9
         ld      r9,PACA_EXGEN+EX_R9(r13)
         RESTORE_PPR_PACA(PACA_EXGEN, r10)
+BEGIN_FTR_SECTION
+        ld      r10,PACA_EXGEN+EX_CFAR(r13)
+        mtspr   SPRN_CFAR,r10
+END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
         ld      r10,PACA_EXGEN+EX_R10(r13)
         ld      r11,PACA_EXGEN+EX_R11(r13)
         ld      r12,PACA_EXGEN+EX_R12(r13)
@@ -808,6 +813,7 @@ system_call_relon_pSeries:
         b       .       /* Can't happen, see v2.07 Book III-S section 6.5 */
 
         . = 0x4e40
+emulation_assist_relon_trampoline:
         SET_SCRATCH0(r13)
         EXCEPTION_PROLOG_0(PACA_EXGEN)
         b       emulation_assist_relon_hv
@@ -816,36 +822,37 @@ system_call_relon_pSeries:
         b       .       /* Can't happen, see v2.07 Book III-S section 6.5 */
 
         . = 0x4e80
+h_doorbell_relon_trampoline:
         SET_SCRATCH0(r13)
         EXCEPTION_PROLOG_0(PACA_EXGEN)
         b       h_doorbell_relon_hv
 
-performance_monitor_relon_pSeries_1:
         . = 0x4f00
+performance_monitor_relon_pseries_trampoline:
         SET_SCRATCH0(r13)
         EXCEPTION_PROLOG_0(PACA_EXGEN)
         b       performance_monitor_relon_pSeries
 
-altivec_unavailable_relon_pSeries_1:
         . = 0x4f20
+altivec_unavailable_relon_pseries_trampoline:
         SET_SCRATCH0(r13)
         EXCEPTION_PROLOG_0(PACA_EXGEN)
         b       altivec_unavailable_relon_pSeries
 
-vsx_unavailable_relon_pSeries_1:
         . = 0x4f40
+vsx_unavailable_relon_pseries_trampoline:
         SET_SCRATCH0(r13)
         EXCEPTION_PROLOG_0(PACA_EXGEN)
         b       vsx_unavailable_relon_pSeries
 
-facility_unavailable_relon_trampoline:
         . = 0x4f60
+facility_unavailable_relon_trampoline:
         SET_SCRATCH0(r13)
         EXCEPTION_PROLOG_0(PACA_EXGEN)
         b       facility_unavailable_relon_pSeries
 
-hv_facility_unavailable_relon_trampoline:
         . = 0x4f80
+hv_facility_unavailable_relon_trampoline:
         SET_SCRATCH0(r13)
         EXCEPTION_PROLOG_0(PACA_EXGEN)
         b       hv_facility_unavailable_relon_hv
diff --git a/arch/powerpc/kernel/head_40x.S b/arch/powerpc/kernel/head_40x.S
index 8a9b6f59822d..67ee0d6c1070 100644
--- a/arch/powerpc/kernel/head_40x.S
+++ b/arch/powerpc/kernel/head_40x.S
@@ -822,14 +822,6 @@ finish_tlb_load:
         rfi                     /* Should sync shadow TLBs */
         b       .               /* prevent prefetch past rfi */
 
-/* extern void giveup_fpu(struct task_struct *prev)
- *
- * The PowerPC 4xx family of processors do not have an FPU, so this just
- * returns.
- */
-_ENTRY(giveup_fpu)
-        blr
-
 /* This is where the main kernel code starts.
  */
 start_here:
diff --git a/arch/powerpc/kernel/head_44x.S b/arch/powerpc/kernel/head_44x.S
index 97e2671cde7f..c334f53453f7 100644
--- a/arch/powerpc/kernel/head_44x.S
+++ b/arch/powerpc/kernel/head_44x.S
@@ -784,16 +784,6 @@ _GLOBAL(__fixup_440A_mcheck)
         sync
         blr
 
-/*
- * extern void giveup_fpu(struct task_struct *prev)
- *
- * The 44x core does not have an FPU.
- */
-#ifndef CONFIG_PPC_FPU
-_GLOBAL(giveup_fpu)
-        blr
-#endif
-
 _GLOBAL(set_context)
 
 #ifdef CONFIG_BDI_SWITCH
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index b61363d557b5..3d11d8038dee 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -703,6 +703,7 @@ _GLOBAL(relative_toc)
         mtlr    r0
         blr
 
+.balign 8
 p_toc:  .llong  __toc_start + 0x8000 - 0b
 
 /*
diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index b2a5860accfb..1b92a97b1b04 100644
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -691,10 +691,6 @@ modified_instr:
         b       151b
 #endif
 
-        .globl  giveup_fpu
-giveup_fpu:
-        blr
-
 /*
  * This is where the main kernel code starts.
  */
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
index d10a7cacccd2..289afaffbbb5 100644
--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S
@@ -948,16 +948,6 @@ _GLOBAL(giveup_spe)
 #endif /* CONFIG_SPE */
 
 /*
- * extern void giveup_fpu(struct task_struct *prev)
- *
- * Not all FSL Book-E cores have an FPU
- */
-#ifndef CONFIG_PPC_FPU
-_GLOBAL(giveup_fpu)
-        blr
-#endif
-
-/*
  * extern void abort(void)
  *
  * At present, this routine just applies a system reset.
diff --git a/arch/powerpc/kernel/io-workarounds.c b/arch/powerpc/kernel/io-workarounds.c
index fa0b54b2a362..24b968f8e4d8 100644
--- a/arch/powerpc/kernel/io-workarounds.c
+++ b/arch/powerpc/kernel/io-workarounds.c
@@ -53,6 +53,7 @@ static struct iowa_bus *iowa_pci_find(unsigned long vaddr, unsigned long paddr)
         return NULL;
 }
 
+#ifdef CONFIG_PPC_INDIRECT_MMIO
 struct iowa_bus *iowa_mem_find_bus(const PCI_IO_ADDR addr)
 {
         unsigned hugepage_shift;
@@ -90,13 +91,25 @@ struct iowa_bus *iowa_mem_find_bus(const PCI_IO_ADDR addr)
 
         return bus;
 }
+#else /* CONFIG_PPC_INDIRECT_MMIO */
+struct iowa_bus *iowa_mem_find_bus(const PCI_IO_ADDR addr)
+{
+        return NULL;
+}
+#endif /* !CONFIG_PPC_INDIRECT_MMIO */
 
+#ifdef CONFIG_PPC_INDIRECT_PIO
 struct iowa_bus *iowa_pio_find_bus(unsigned long port)
 {
         unsigned long vaddr = (unsigned long)pci_io_base + port;
         return iowa_pci_find(vaddr, 0);
 }
-
+#else
+struct iowa_bus *iowa_pio_find_bus(unsigned long port)
+{
+        return NULL;
+}
+#endif
 
 #define DEF_PCI_AC_RET(name, ret, at, al, space, aa)            \
 static ret iowa_##name at                                       \
@@ -137,6 +150,7 @@ static const struct ppc_pci_io iowa_pci_io = {
 
 };
 
+#ifdef CONFIG_PPC_INDIRECT_MMIO
 static void __iomem *iowa_ioremap(phys_addr_t addr, unsigned long size,
                                   unsigned long flags, void *caller)
 {
@@ -151,6 +165,9 @@ static void __iomem *iowa_ioremap(phys_addr_t addr, unsigned long size,
         }
         return res;
 }
+#else /* CONFIG_PPC_INDIRECT_MMIO */
+#define iowa_ioremap NULL
+#endif /* !CONFIG_PPC_INDIRECT_MMIO */
 
 /* Enable IO workaround */
 static void io_workaround_init(void)
diff --git a/arch/powerpc/kernel/io.c b/arch/powerpc/kernel/io.c
index 886381f32c3d..2a2b4aeab80f 100644
--- a/arch/powerpc/kernel/io.c
+++ b/arch/powerpc/kernel/io.c
@@ -25,6 +25,9 @@
 #include <asm/firmware.h>
 #include <asm/bug.h>
 
+/* See definition in io.h */
+bool isa_io_special;
+
 void _insb(const volatile u8 __iomem *port, void *buf, long count)
 {
         u8 *tbuf = buf;
diff --git a/arch/powerpc/kernel/legacy_serial.c b/arch/powerpc/kernel/legacy_serial.c
index 0733b05eb856..22e88dd2f34a 100644
--- a/arch/powerpc/kernel/legacy_serial.c
+++ b/arch/powerpc/kernel/legacy_serial.c
@@ -99,7 +99,7 @@ static int __init add_legacy_port(struct device_node *np, int want_index,
                 legacy_serial_count = index + 1;
 
         /* Check if there is a port who already claimed our slot */
-        if (legacy_serial_infos[index].np != 0) {
+        if (legacy_serial_infos[index].np != NULL) {
                 /* if we still have some room, move it, else override */
                 if (legacy_serial_count < MAX_LEGACY_SERIAL_PORTS) {
                         printk(KERN_DEBUG "Moved legacy port %d -> %d\n",
@@ -152,7 +152,7 @@ static int __init add_legacy_soc_port(struct device_node *np,
                                       struct device_node *soc_dev)
 {
         u64 addr;
-        const u32 *addrp;
+        const __be32 *addrp;
         upf_t flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_SHARE_IRQ
                 | UPF_FIXED_PORT;
         struct device_node *tsi = of_get_parent(np);
@@ -221,14 +221,19 @@ static int __init add_legacy_isa_port(struct device_node *np,
         /* Translate ISA address. If it fails, we still register the port
          * with no translated address so that it can be picked up as an IO
          * port later by the serial driver
+         *
+         * Note: Don't even try on P8 lpc, we know it's not directly mapped
          */
-        taddr = of_translate_address(np, reg);
-        if (taddr == OF_BAD_ADDR)
+        if (!of_device_is_compatible(isa_brg, "ibm,power8-lpc")) {
+                taddr = of_translate_address(np, reg);
+                if (taddr == OF_BAD_ADDR)
+                        taddr = 0;
+        } else
                 taddr = 0;
 
         /* Add port, irq will be dealt with later */
-        return add_legacy_port(np, index, UPIO_PORT, be32_to_cpu(reg[1]), taddr,
-                               NO_IRQ, UPF_BOOT_AUTOCONF, 0);
+        return add_legacy_port(np, index, UPIO_PORT, be32_to_cpu(reg[1]),
+                               taddr, NO_IRQ, UPF_BOOT_AUTOCONF, 0);
 
 }
 
@@ -237,7 +242,7 @@ static int __init add_legacy_pci_port(struct device_node *np,
                                       struct device_node *pci_dev)
 {
         u64 addr, base;
-        const u32 *addrp;
+        const __be32 *addrp;
         unsigned int flags;
         int iotype, index = -1, lindex = 0;
 
@@ -270,7 +275,7 @@ static int __init add_legacy_pci_port(struct device_node *np,
         if (iotype == UPIO_MEM)
                 base = addr;
         else
-                base = addrp[2];
+                base = of_read_number(&addrp[2], 1);
 
         /* Try to guess an index... If we have subdevices of the pci dev,
          * we get to their "reg" property
@@ -307,19 +312,31 @@ static int __init add_legacy_pci_port(struct device_node *np,
 
 static void __init setup_legacy_serial_console(int console)
 {
-        struct legacy_serial_info *info =
-                &legacy_serial_infos[console];
+        struct legacy_serial_info *info = &legacy_serial_infos[console];
+        struct plat_serial8250_port *port = &legacy_serial_ports[console];
         void __iomem *addr;
 
-        if (info->taddr == 0)
-                return;
-        addr = ioremap(info->taddr, 0x1000);
-        if (addr == NULL)
-                return;
+        /* Check if a translated MMIO address has been found */
+        if (info->taddr) {
+                addr = ioremap(info->taddr, 0x1000);
+                if (addr == NULL)
+                        return;
+                udbg_uart_init_mmio(addr, 1);
+        } else {
+                /* Check if it's PIO and we support untranslated PIO */
+                if (port->iotype == UPIO_PORT && isa_io_special)
+                        udbg_uart_init_pio(port->iobase, 1);
+                else
+                        return;
+        }
+
+        /* Try to query the current speed */
         if (info->speed == 0)
-                info->speed = udbg_probe_uart_speed(addr, info->clock);
+                info->speed = udbg_probe_uart_speed(info->clock);
+
+        /* Set it up */
         DBG("default console speed = %d\n", info->speed);
-        udbg_init_uart(addr, info->speed, info->clock);
+        udbg_uart_setup(info->speed, info->clock);
 }
 
 /*
@@ -367,10 +384,13 @@ void __init find_legacy_serial_ports(void)
         /* Next, fill our array with ISA ports */
         for_each_node_by_type(np, "serial") {
                 struct device_node *isa = of_get_parent(np);
-                if (isa && !strcmp(isa->name, "isa")) {
-                        index = add_legacy_isa_port(np, isa);
-                        if (index >= 0 && np == stdout)
-                                legacy_serial_console = index;
+                if (isa && (!strcmp(isa->name, "isa") ||
+                            !strcmp(isa->name, "lpc"))) {
+                        if (of_device_is_available(np)) {
+                                index = add_legacy_isa_port(np, isa);
+                                if (index >= 0 && np == stdout)
+                                        legacy_serial_console = index;
+                        }
                 }
                 of_node_put(isa);
         }
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S
index e469f30e6eeb..777d999f563b 100644
--- a/arch/powerpc/kernel/misc_32.S
+++ b/arch/powerpc/kernel/misc_32.S
@@ -327,8 +327,9 @@ END_FTR_SECTION_IFSET(CPU_FTR_UNIFIED_ID_CACHE)
  *
  * flush_icache_range(unsigned long start, unsigned long stop)
  */
-_KPROBE(__flush_icache_range)
+_KPROBE(flush_icache_range)
 BEGIN_FTR_SECTION
+        isync
         blr                             /* for 601, do nothing */
 END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE)
         li      r5,L1_CACHE_BYTES-1
diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S
index 6820e45f557b..971d7e78aff2 100644
--- a/arch/powerpc/kernel/misc_64.S
+++ b/arch/powerpc/kernel/misc_64.S
@@ -67,8 +67,10 @@ PPC64_CACHES:
  *   flush all bytes from start through stop-1 inclusive
  */
 
-_KPROBE(__flush_icache_range)
-
+_KPROBE(flush_icache_range)
+BEGIN_FTR_SECTION
+        blr
+END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE)
 /*
  * Flush the data cache to memory 
  * 
@@ -247,6 +249,37 @@ _GLOBAL(__bswapdi2)
         blr
 
 #if defined(CONFIG_PPC_PMAC) || defined(CONFIG_PPC_MAPLE)
+
+_GLOBAL(rmci_on)
+        sync
+        isync
+        li      r3,0x100
+        rldicl  r3,r3,32,0
+        mfspr   r5,SPRN_HID4
+        or      r5,r5,r3
+        sync
+        mtspr   SPRN_HID4,r5
+        isync
+        slbia
+        isync
+        sync
+        blr
+
+_GLOBAL(rmci_off)
+        sync
+        isync
+        li      r3,0x100
+        rldicl  r3,r3,32,0
+        mfspr   r5,SPRN_HID4
+        andc    r5,r5,r3
+        sync
+        mtspr   SPRN_HID4,r5
+        isync
+        slbia
+        isync
+        sync
+        blr
+
 /*
  * Do an IO access in real mode
  */
@@ -416,19 +449,6 @@ _GLOBAL(scom970_write)
         blr
 #endif /* CONFIG_CPU_FREQ_PMAC64 || CONFIG_CPU_FREQ_MAPLE */
 
-
-/*
- * disable_kernel_fp()
- * Disable the FPU.
- */
-_GLOBAL(disable_kernel_fp)
-        mfmsr   r3
-        rldicl  r0,r3,(63-MSR_FP_LG),1
-        rldicl  r3,r0,(MSR_FP_LG+1),0
-        mtmsrd  r3                      /* disable use of fpu now */
-        isync
-        blr
-
 /* kexec_wait(phys_cpu)
  *
  * wait for the flag to change, indicating this kernel is going away but
diff --git a/arch/powerpc/kernel/paca.c b/arch/powerpc/kernel/paca.c
index f8f24685f10a..3fc16e3beb9f 100644
--- a/arch/powerpc/kernel/paca.c
+++ b/arch/powerpc/kernel/paca.c
@@ -34,10 +34,10 @@ extern unsigned long __toc_start;
  */
 struct lppaca lppaca[] = {
         [0 ... (NR_LPPACAS-1)] = {
-                .desc = 0xd397d781,     /* "LpPa" */
-                .size = sizeof(struct lppaca),
+                .desc = cpu_to_be32(0xd397d781),        /* "LpPa" */
+                .size = cpu_to_be16(sizeof(struct lppaca)),
                 .fpregs_in_use = 1,
-                .slb_count = 64,
+                .slb_count = cpu_to_be16(64),
                 .vmxregs_in_use = 0,
                 .page_ins = 0,
         },
@@ -101,8 +101,8 @@ static inline void free_lppacas(void) { }
  */
 struct slb_shadow slb_shadow[] __cacheline_aligned = {
         [0 ... (NR_CPUS-1)] = {
-                .persistent = SLB_NUM_BOLTED,
-                .buffer_length = sizeof(struct slb_shadow),
+                .persistent = cpu_to_be32(SLB_NUM_BOLTED),
+                .buffer_length = cpu_to_be32(sizeof(struct slb_shadow)),
         },
 };
 
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index 2b4a9a4db7d9..905a24bb7acc 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -306,7 +306,7 @@ static struct resource *__pci_mmap_make_offset(struct pci_dev *dev,
         unsigned long io_offset = 0;
         int i, res_bit;
 
-        if (hose == 0)
+        if (hose == NULL)
                 return NULL;            /* should never happen */
 
         /* If memory, add on the PCI bridge address offset */
@@ -667,7 +667,7 @@ void pci_resource_to_user(const struct pci_dev *dev, int bar,
 void pci_process_bridge_OF_ranges(struct pci_controller *hose,
                                   struct device_node *dev, int primary)
 {
-        const u32 *ranges;
+        const __be32 *ranges;
         int rlen;
         int pna = of_n_addr_cells(dev);
         int np = pna + 5;
@@ -687,7 +687,7 @@ void pci_process_bridge_OF_ranges(struct pci_controller *hose,
         /* Parse it */
         while ((rlen -= np * 4) >= 0) {
                 /* Read next ranges element */
-                pci_space = ranges[0];
+                pci_space = of_read_number(ranges, 1);
                 pci_addr = of_read_number(ranges + 1, 2);
                 cpu_addr = of_translate_address(dev, ranges + 3);
                 size = of_read_number(ranges + pna + 3, 2);
@@ -704,7 +704,7 @@ void pci_process_bridge_OF_ranges(struct pci_controller *hose,
                 /* Now consume following elements while they are contiguous */
                 for (; rlen >= np * sizeof(u32);
                      ranges += np, rlen -= np * 4) {
-                        if (ranges[0] != pci_space)
+                        if (of_read_number(ranges, 1) != pci_space)
                                 break;
                         pci_next = of_read_number(ranges + 1, 2);
                         cpu_next = of_translate_address(dev, ranges + 3);
@@ -1055,8 +1055,7 @@ void pcibios_fixup_bus(struct pci_bus *bus)
          * bases. This is -not- called when generating the PCI tree from
          * the OF device-tree.
          */
-        if (bus->self != NULL)
-                pci_read_bridge_bases(bus);
+        pci_read_bridge_bases(bus);
 
         /* Now fixup the bus bus */
         pcibios_setup_bus_self(bus);
@@ -1578,7 +1577,7 @@ fake_pci_bus(struct pci_controller *hose, int busnr)
 {
         static struct pci_bus bus;
 
-        if (hose == 0) {
+        if (hose == NULL) {
                 printk(KERN_ERR "Can't find hose for PCI bus %d!\n", busnr);
         }
         bus.number = busnr;
diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c
index 2e8629654ca8..a9e311f7a9dd 100644
--- a/arch/powerpc/kernel/pci_64.c
+++ b/arch/powerpc/kernel/pci_64.c
@@ -109,7 +109,7 @@ int pcibios_unmap_io_space(struct pci_bus *bus)
         hose = pci_bus_to_host(bus);
 
         /* Check if we have IOs allocated */
-        if (hose->io_base_alloc == 0)
+        if (hose->io_base_alloc == NULL)
                 return 0;
 
         pr_debug("IO unmapping for PHB %s\n", hose->dn->full_name);
@@ -272,7 +272,7 @@ static void quirk_radeon_32bit_msi(struct pci_dev *dev)
         struct pci_dn *pdn = pci_get_pdn(dev);
 
         if (pdn)
-                pdn->force_32bit_msi = 1;
+                pdn->force_32bit_msi = true;
 }
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x68f2, quirk_radeon_32bit_msi);
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0xaa68, quirk_radeon_32bit_msi);
diff --git a/arch/powerpc/kernel/pci_dn.c b/arch/powerpc/kernel/pci_dn.c
index df038442548a..1f61fab59d9b 100644
--- a/arch/powerpc/kernel/pci_dn.c
+++ b/arch/powerpc/kernel/pci_dn.c
@@ -47,9 +47,8 @@ struct pci_dn *pci_get_pdn(struct pci_dev *pdev)
 void *update_dn_pci_info(struct device_node *dn, void *data)
 {
         struct pci_controller *phb = data;
-        const int *type =
-                of_get_property(dn, "ibm,pci-config-space-type", NULL);
-        const u32 *regs;
+        const __be32 *type = of_get_property(dn, "ibm,pci-config-space-type", NULL);
+        const __be32 *regs;
         struct pci_dn *pdn;
 
         pdn = zalloc_maybe_bootmem(sizeof(*pdn), GFP_KERNEL);
@@ -63,12 +62,14 @@ void *update_dn_pci_info(struct device_node *dn, void *data)
 #endif
         regs = of_get_property(dn, "reg", NULL);
         if (regs) {
+                u32 addr = of_read_number(regs, 1);
+
                 /* First register entry is addr (00BBSS00)  */
-                pdn->busno = (regs[0] >> 16) & 0xff;
-                pdn->devfn = (regs[0] >> 8) & 0xff;
+                pdn->busno = (addr >> 16) & 0xff;
+                pdn->devfn = (addr >> 8) & 0xff;
         }
 
-        pdn->pci_ext_config_space = (type && *type == 1);
+        pdn->pci_ext_config_space = (type && of_read_number(type, 1) == 1);
         return NULL;
 }
 
@@ -98,12 +99,13 @@ void *traverse_pci_devices(struct device_node *start, traverse_func pre,
 
         /* We started with a phb, iterate all childs */
         for (dn = start->child; dn; dn = nextdn) {
-                const u32 *classp;
-                u32 class;
+                const __be32 *classp;
+                u32 class = 0;
 
                 nextdn = NULL;
                 classp = of_get_property(dn, "class-code", NULL);
-                class = classp ? *classp : 0;
+                if (classp)
+                        class = of_read_number(classp, 1);
 
                 if (pre && ((ret = pre(dn, data)) != NULL))
                         return ret;
diff --git a/arch/powerpc/kernel/pci_of_scan.c b/arch/powerpc/kernel/pci_of_scan.c
index 15d9105323bf..4368ec6fdc8c 100644
--- a/arch/powerpc/kernel/pci_of_scan.c
+++ b/arch/powerpc/kernel/pci_of_scan.c
@@ -24,12 +24,12 @@
  */
 static u32 get_int_prop(struct device_node *np, const char *name, u32 def)
 {
-        const u32 *prop;
+        const __be32 *prop;
         int len;
 
         prop = of_get_property(np, name, &len);
         if (prop && len >= 4)
-                return *prop;
+                return of_read_number(prop, 1);
         return def;
 }
 
@@ -77,7 +77,7 @@ static void of_pci_parse_addrs(struct device_node *node, struct pci_dev *dev)
         unsigned int flags;
         struct pci_bus_region region;
         struct resource *res;
-        const u32 *addrs;
+        const __be32 *addrs;
         u32 i;
         int proplen;
 
@@ -86,14 +86,14 @@ static void of_pci_parse_addrs(struct device_node *node, struct pci_dev *dev)
                 return;
         pr_debug("    parse addresses (%d bytes) @ %p\n", proplen, addrs);
         for (; proplen >= 20; proplen -= 20, addrs += 5) {
-                flags = pci_parse_of_flags(addrs[0], 0);
+                flags = pci_parse_of_flags(of_read_number(addrs, 1), 0);
                 if (!flags)
                         continue;
                 base = of_read_number(&addrs[1], 2);
                 size = of_read_number(&addrs[3], 2);
                 if (!size)
                         continue;
-                i = addrs[0] & 0xff;
+                i = of_read_number(addrs, 1) & 0xff;
                 pr_debug("  base: %llx, size: %llx, i: %x\n",
                          (unsigned long long)base,
                          (unsigned long long)size, i);
@@ -207,7 +207,7 @@ void of_scan_pci_bridge(struct pci_dev *dev)
 {
         struct device_node *node = dev->dev.of_node;
         struct pci_bus *bus;
-        const u32 *busrange, *ranges;
+        const __be32 *busrange, *ranges;
         int len, i, mode;
         struct pci_bus_region region;
         struct resource *res;
@@ -230,9 +230,11 @@ void of_scan_pci_bridge(struct pci_dev *dev)
                 return;
         }
 
-        bus = pci_find_bus(pci_domain_nr(dev->bus), busrange[0]);
+        bus = pci_find_bus(pci_domain_nr(dev->bus),
+                           of_read_number(busrange, 1));
         if (!bus) {
-                bus = pci_add_new_bus(dev->bus, dev, busrange[0]);
+                bus = pci_add_new_bus(dev->bus, dev,
+                                      of_read_number(busrange, 1));
                 if (!bus) {
                         printk(KERN_ERR "Failed to create pci bus for %s\n",
                                node->full_name);
@@ -241,7 +243,8 @@ void of_scan_pci_bridge(struct pci_dev *dev)
         }
 
         bus->primary = dev->bus->number;
-        pci_bus_insert_busn_res(bus, busrange[0], busrange[1]);
+        pci_bus_insert_busn_res(bus, of_read_number(busrange, 1),
+                                of_read_number(busrange+1, 1));
         bus->bridge_ctl = 0;
 
         /* parse ranges property */
@@ -254,7 +257,7 @@ void of_scan_pci_bridge(struct pci_dev *dev)
         }
         i = 1;
         for (; len >= 32; len -= 32, ranges += 8) {
-                flags = pci_parse_of_flags(ranges[0], 1);
+                flags = pci_parse_of_flags(of_read_number(ranges, 1), 1);
                 size = of_read_number(&ranges[6], 2);
                 if (flags == 0 || size == 0)
                         continue;
diff --git a/arch/powerpc/kernel/ppc_ksyms.c b/arch/powerpc/kernel/ppc_ksyms.c
index c29666586998..21646dbe1bb3 100644
--- a/arch/powerpc/kernel/ppc_ksyms.c
+++ b/arch/powerpc/kernel/ppc_ksyms.c
@@ -96,7 +96,9 @@ EXPORT_SYMBOL(pci_dram_offset);
 
 EXPORT_SYMBOL(start_thread);
 
+#ifdef CONFIG_PPC_FPU
 EXPORT_SYMBOL(giveup_fpu);
+#endif
 #ifdef CONFIG_ALTIVEC
 EXPORT_SYMBOL(giveup_altivec);
 #endif /* CONFIG_ALTIVEC */
@@ -111,7 +113,6 @@ EXPORT_SYMBOL(giveup_spe);
 #ifndef CONFIG_PPC64
 EXPORT_SYMBOL(flush_instruction_cache);
 #endif
-EXPORT_SYMBOL(__flush_icache_range);
 EXPORT_SYMBOL(flush_dcache_range);
 
 #ifdef CONFIG_SMP
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index 8083be20fe5e..6f428da53e20 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -74,6 +74,7 @@ struct task_struct *last_task_used_vsx = NULL;
 struct task_struct *last_task_used_spe = NULL;
 #endif
 
+#ifdef CONFIG_PPC_FPU
 /*
  * Make sure the floating-point register state in the
  * the thread_struct is up to date for task tsk.
@@ -107,6 +108,7 @@ void flush_fp_to_thread(struct task_struct *tsk)
         }
 }
 EXPORT_SYMBOL_GPL(flush_fp_to_thread);
+#endif
 
 void enable_kernel_fp(void)
 {
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index 1c14cd4a5e05..6bfcab97c981 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -215,16 +215,16 @@ static void __init check_cpu_pa_features(unsigned long node)
 #ifdef CONFIG_PPC_STD_MMU_64
 static void __init check_cpu_slb_size(unsigned long node)
 {
-        u32 *slb_size_ptr;
+        __be32 *slb_size_ptr;
 
         slb_size_ptr = of_get_flat_dt_prop(node, "slb-size", NULL);
         if (slb_size_ptr != NULL) {
-                mmu_slb_size = *slb_size_ptr;
+                mmu_slb_size = be32_to_cpup(slb_size_ptr);
                 return;
         }
         slb_size_ptr = of_get_flat_dt_prop(node, "ibm,slb-size", NULL);
         if (slb_size_ptr != NULL) {
-                mmu_slb_size = *slb_size_ptr;
+                mmu_slb_size = be32_to_cpup(slb_size_ptr);
         }
 }
 #else
@@ -279,11 +279,11 @@ static void __init check_cpu_feature_properties(unsigned long node)
 {
         unsigned long i;
         struct feature_property *fp = feature_properties;
-        const u32 *prop;
+        const __be32 *prop;
 
         for (i = 0; i < ARRAY_SIZE(feature_properties); ++i, ++fp) {
                 prop = of_get_flat_dt_prop(node, fp->name, NULL);
-                if (prop && *prop >= fp->min_value) {
+                if (prop && be32_to_cpup(prop) >= fp->min_value) {
                         cur_cpu_spec->cpu_features |= fp->cpu_feature;
                         cur_cpu_spec->cpu_user_features |= fp->cpu_user_ftr;
                 }
@@ -295,8 +295,8 @@ static int __init early_init_dt_scan_cpus(unsigned long node,
                                           void *data)
 {
         char *type = of_get_flat_dt_prop(node, "device_type", NULL);
-        const u32 *prop;
-        const u32 *intserv;
+        const __be32 *prop;
+        const __be32 *intserv;
         int i, nthreads;
         unsigned long len;
         int found = -1;
@@ -324,8 +324,9 @@ static int __init early_init_dt_scan_cpus(unsigned long node,
                  * version 2 of the kexec param format adds the phys cpuid of
                  * booted proc.
                  */
-                if (initial_boot_params->version >= 2) {
-                        if (intserv[i] == initial_boot_params->boot_cpuid_phys) {
+                if (be32_to_cpu(initial_boot_params->version) >= 2) {
+                        if (be32_to_cpu(intserv[i]) ==
+                            be32_to_cpu(initial_boot_params->boot_cpuid_phys)) {
                                 found = boot_cpu_count;
                                 found_thread = i;
                         }
@@ -347,9 +348,10 @@ static int __init early_init_dt_scan_cpus(unsigned long node,
 
         if (found >= 0) {
                 DBG("boot cpu: logical %d physical %d\n", found,
-                        intserv[found_thread]);
+                        be32_to_cpu(intserv[found_thread]));
                 boot_cpuid = found;
-                set_hard_smp_processor_id(found, intserv[found_thread]);
+                set_hard_smp_processor_id(found,
+                        be32_to_cpu(intserv[found_thread]));
 
                 /*
                  * PAPR defines "logical" PVR values for cpus that
@@ -366,8 +368,8 @@ static int __init early_init_dt_scan_cpus(unsigned long node,
                  * it uses 0x0f000001.
                  */
                 prop = of_get_flat_dt_prop(node, "cpu-version", NULL);
-                if (prop && (*prop & 0xff000000) == 0x0f000000)
-                        identify_cpu(0, *prop);
+                if (prop && (be32_to_cpup(prop) & 0xff000000) == 0x0f000000)
+                        identify_cpu(0, be32_to_cpup(prop));
 
                 identical_pvr_fixup(node);
         }
@@ -389,7 +391,7 @@ static int __init early_init_dt_scan_cpus(unsigned long node,
 int __init early_init_dt_scan_chosen_ppc(unsigned long node, const char *uname,
                                          int depth, void *data)
 {
-        unsigned long *lprop;
+        unsigned long *lprop; /* All these set by kernel, so no need to convert endian */
 
         /* Use common scan routine to determine if this is the chosen node */
         if (early_init_dt_scan_chosen(node, uname, depth, data) == 0)
@@ -454,7 +456,7 @@ static int __init early_init_dt_scan_drconf_memory(unsigned long node)
         if (dm == NULL || l < sizeof(__be32))
                 return 0;
 
-        n = *dm++;      /* number of entries */
+        n = of_read_number(dm++, 1);    /* number of entries */
         if (l < (n * (dt_root_addr_cells + 4) + 1) * sizeof(__be32))
                 return 0;
 
@@ -466,7 +468,7 @@ static int __init early_init_dt_scan_drconf_memory(unsigned long node)
 
         for (; n != 0; --n) {
                 base = dt_mem_next_cell(dt_root_addr_cells, &dm);
-                flags = dm[3];
+                flags = of_read_number(&dm[3], 1);
                 /* skip DRC index, pad, assoc. list index, flags */
                 dm += 4;
                 /* skip this block if the reserved bit is set in flags (0x80)
@@ -591,16 +593,16 @@ static void __init early_reserve_mem_dt(void)
 static void __init early_reserve_mem(void)
 {
         u64 base, size;
-        u64 *reserve_map;
+        __be64 *reserve_map;
         unsigned long self_base;
         unsigned long self_size;
 
-        reserve_map = (u64 *)(((unsigned long)initial_boot_params) +
-                                        initial_boot_params->off_mem_rsvmap);
+        reserve_map = (__be64 *)(((unsigned long)initial_boot_params) +
+                        be32_to_cpu(initial_boot_params->off_mem_rsvmap));
 
         /* before we do anything, lets reserve the dt blob */
         self_base = __pa((unsigned long)initial_boot_params);
-        self_size = initial_boot_params->totalsize;
+        self_size = be32_to_cpu(initial_boot_params->totalsize);
         memblock_reserve(self_base, self_size);
 
         /* Look for the new "reserved-regions" property in the DT */
@@ -620,15 +622,15 @@ static void __init early_reserve_mem(void)
          * Handle the case where we might be booting from an old kexec
          * image that setup the mem_rsvmap as pairs of 32-bit values
          */
-        if (*reserve_map > 0xffffffffull) {
+        if (be64_to_cpup(reserve_map) > 0xffffffffull) {
                 u32 base_32, size_32;
-                u32 *reserve_map_32 = (u32 *)reserve_map;
+                __be32 *reserve_map_32 = (__be32 *)reserve_map;
 
                 DBG("Found old 32-bit reserve map\n");
 
                 while (1) {
-                        base_32 = *(reserve_map_32++);
-                        size_32 = *(reserve_map_32++);
+                        base_32 = be32_to_cpup(reserve_map_32++);
+                        size_32 = be32_to_cpup(reserve_map_32++);
                         if (size_32 == 0)
                                 break;
                         /* skip if the reservation is for the blob */
@@ -644,8 +646,8 @@ static void __init early_reserve_mem(void)
 
         /* Handle the reserve map in the fdt blob if it exists */
         while (1) {
-                base = *(reserve_map++);
-                size = *(reserve_map++);
+                base = be64_to_cpup(reserve_map++);
+                size = be64_to_cpup(reserve_map++);
                 if (size == 0)
                         break;
                 DBG("reserving: %llx -> %llx\n", base, size);
@@ -795,6 +797,32 @@ struct device_node *of_find_next_cache_node(struct device_node *np)
         return NULL;
 }
 
+/**
+ * of_get_ibm_chip_id - Returns the IBM "chip-id" of a device
+ * @np: device node of the device
+ *
+ * This looks for a property "ibm,chip-id" in the node or any
+ * of its parents and returns its content, or -1 if it cannot
+ * be found.
+ */
+int of_get_ibm_chip_id(struct device_node *np)
+{
+        of_node_get(np);
+        while(np) {
+                struct device_node *old = np;
+                const __be32 *prop;
+
+                prop = of_get_property(np, "ibm,chip-id", NULL);
+                if (prop) {
+                        of_node_put(np);
+                        return be32_to_cpup(prop);
+                }
+                np = of_get_parent(np);
+                of_node_put(old);
+        }
+        return -1;
+}
+
 #ifdef CONFIG_PPC_PSERIES
 /*
  * Fix up the uninitialized fields in a new device node:
@@ -878,7 +906,7 @@ static int __init export_flat_device_tree(void)
         struct dentry *d;
 
         flat_dt_blob.data = initial_boot_params;
-        flat_dt_blob.size = initial_boot_params->totalsize;
+        flat_dt_blob.size = be32_to_cpu(initial_boot_params->totalsize);
 
         d = debugfs_create_blob("flat-device-tree", S_IFREG | S_IRUSR,
                                 powerpc_debugfs_root, &flat_dt_blob);
diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c
index 607902424e73..7b6391b68fb8 100644
--- a/arch/powerpc/kernel/prom_init.c
+++ b/arch/powerpc/kernel/prom_init.c
@@ -107,10 +107,10 @@ int of_workarounds;
 typedef u32 prom_arg_t;
 
 struct prom_args {
-        u32 service;
-        u32 nargs;
-        u32 nret;
-        prom_arg_t args[10];
+        __be32 service;
+        __be32 nargs;
+        __be32 nret;
+        __be32 args[10];
 };
 
 struct prom_t {
@@ -123,11 +123,11 @@ struct prom_t {
 };
 
 struct mem_map_entry {
-        u64     base;
-        u64     size;
+        __be64  base;
+        __be64  size;
 };
 
-typedef u32 cell_t;
+typedef __be32 cell_t;
 
 extern void __start(unsigned long r3, unsigned long r4, unsigned long r5,
                     unsigned long r6, unsigned long r7, unsigned long r8,
@@ -219,13 +219,13 @@ static int __init call_prom(const char *service, int nargs, int nret, ...)
         struct prom_args args;
         va_list list;
 
-        args.service = ADDR(service);
-        args.nargs = nargs;
-        args.nret = nret;
+        args.service = cpu_to_be32(ADDR(service));
+        args.nargs = cpu_to_be32(nargs);
+        args.nret = cpu_to_be32(nret);
 
         va_start(list, nret);
         for (i = 0; i < nargs; i++)
-                args.args[i] = va_arg(list, prom_arg_t);
+                args.args[i] = cpu_to_be32(va_arg(list, prom_arg_t));
         va_end(list);
 
         for (i = 0; i < nret; i++)
@@ -234,7 +234,7 @@ static int __init call_prom(const char *service, int nargs, int nret, ...)
         if (enter_prom(&args, prom_entry) < 0)
                 return PROM_ERROR;
 
-        return (nret > 0) ? args.args[nargs] : 0;
+        return (nret > 0) ? be32_to_cpu(args.args[nargs]) : 0;
 }
 
 static int __init call_prom_ret(const char *service, int nargs, int nret,
@@ -244,13 +244,13 @@ static int __init call_prom_ret(const char *service, int nargs, int nret,
         struct prom_args args;
         va_list list;
 
-        args.service = ADDR(service);
-        args.nargs = nargs;
-        args.nret = nret;
+        args.service = cpu_to_be32(ADDR(service));
+        args.nargs = cpu_to_be32(nargs);
+        args.nret = cpu_to_be32(nret);
 
         va_start(list, rets);
         for (i = 0; i < nargs; i++)
-                args.args[i] = va_arg(list, prom_arg_t);
+                args.args[i] = cpu_to_be32(va_arg(list, prom_arg_t));
         va_end(list);
 
         for (i = 0; i < nret; i++)
@@ -261,9 +261,9 @@ static int __init call_prom_ret(const char *service, int nargs, int nret,
 
         if (rets != NULL)
                 for (i = 1; i < nret; ++i)
-                        rets[i-1] = args.args[nargs+i];
+                        rets[i-1] = be32_to_cpu(args.args[nargs+i]);
 
-        return (nret > 0) ? args.args[nargs] : 0;
+        return (nret > 0) ? be32_to_cpu(args.args[nargs]) : 0;
 }
 
 
@@ -527,7 +527,7 @@ static int __init prom_setprop(phandle node, const char *nodename,
 #define islower(c)      ('a' <= (c) && (c) <= 'z')
 #define toupper(c)      (islower(c) ? ((c) - 'a' + 'A') : (c))
 
-unsigned long prom_strtoul(const char *cp, const char **endp)
+static unsigned long prom_strtoul(const char *cp, const char **endp)
 {
         unsigned long result = 0, base = 10, value;
 
@@ -552,7 +552,7 @@ unsigned long prom_strtoul(const char *cp, const char **endp)
         return result;
 }
 
-unsigned long prom_memparse(const char *ptr, const char **retptr)
+static unsigned long prom_memparse(const char *ptr, const char **retptr)
 {
         unsigned long ret = prom_strtoul(ptr, retptr);
         int shift = 0;
@@ -724,7 +724,8 @@ unsigned char ibm_architecture_vec[] = {
 
 };
 
-/* Old method - ELF header with PT_NOTE sections */
+/* Old method - ELF header with PT_NOTE sections only works on BE */
+#ifdef __BIG_ENDIAN__
 static struct fake_elf {
         Elf32_Ehdr      elfhdr;
         Elf32_Phdr      phdr[2];
@@ -810,6 +811,7 @@ static struct fake_elf {
                 }
         }
 };
+#endif /* __BIG_ENDIAN__ */
 
 static int __init prom_count_smt_threads(void)
 {
@@ -852,9 +854,9 @@ static int __init prom_count_smt_threads(void)
 
 static void __init prom_send_capabilities(void)
 {
-        ihandle elfloader, root;
+        ihandle root;
         prom_arg_t ret;
-        u32 *cores;
+        __be32 *cores;
 
         root = call_prom("open", 1, 1, ADDR("/"));
         if (root != 0) {
@@ -864,15 +866,15 @@ static void __init prom_send_capabilities(void)
                  * (we assume this is the same for all cores) and use it to
                  * divide NR_CPUS.
                  */
-                cores = (u32 *)&ibm_architecture_vec[IBM_ARCH_VEC_NRCORES_OFFSET];
-                if (*cores != NR_CPUS) {
+                cores = (__be32 *)&ibm_architecture_vec[IBM_ARCH_VEC_NRCORES_OFFSET];
+                if (be32_to_cpup(cores) != NR_CPUS) {
                         prom_printf("WARNING ! "
                                     "ibm_architecture_vec structure inconsistent: %lu!\n",
-                                    *cores);
+                                    be32_to_cpup(cores));
                 } else {
-                        *cores = DIV_ROUND_UP(NR_CPUS, prom_count_smt_threads());
+                        *cores = cpu_to_be32(DIV_ROUND_UP(NR_CPUS, prom_count_smt_threads()));
                         prom_printf("Max number of cores passed to firmware: %lu (NR_CPUS = %lu)\n",
-                                    *cores, NR_CPUS);
+                                    be32_to_cpup(cores), NR_CPUS);
                 }
 
                 /* try calling the ibm,client-architecture-support method */
@@ -893,17 +895,24 @@ static void __init prom_send_capabilities(void)
                 prom_printf(" not implemented\n");
         }
 
-        /* no ibm,client-architecture-support call, try the old way */
-        elfloader = call_prom("open", 1, 1, ADDR("/packages/elf-loader"));
-        if (elfloader == 0) {
-                prom_printf("couldn't open /packages/elf-loader\n");
-                return;
+#ifdef __BIG_ENDIAN__
+        {
+                ihandle elfloader;
+
+                /* no ibm,client-architecture-support call, try the old way */
+                elfloader = call_prom("open", 1, 1,
+                                      ADDR("/packages/elf-loader"));
+                if (elfloader == 0) {
+                        prom_printf("couldn't open /packages/elf-loader\n");
+                        return;
+                }
+                call_prom("call-method", 3, 1, ADDR("process-elf-header"),
+                          elfloader, ADDR(&fake_elf));
+                call_prom("close", 1, 0, elfloader);
         }
-        call_prom("call-method", 3, 1, ADDR("process-elf-header"),
-                        elfloader, ADDR(&fake_elf));
-        call_prom("close", 1, 0, elfloader);
+#endif /* __BIG_ENDIAN__ */
 }
-#endif
+#endif /* #if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) */
 
 /*
  * Memory allocation strategy... our layout is normally:
@@ -1050,11 +1059,11 @@ static unsigned long __init prom_next_cell(int s, cell_t **cellp)
                 p++;
                 s--;
         }
-        r = *p++;
+        r = be32_to_cpu(*p++);
 #ifdef CONFIG_PPC64
         if (s > 1) {
                 r <<= 32;
-                r |= *(p++);
+                r |= be32_to_cpu(*(p++));
         }
 #endif
         *cellp = p;
@@ -1087,8 +1096,8 @@ static void __init reserve_mem(u64 base, u64 size)
 
         if (cnt >= (MEM_RESERVE_MAP_SIZE - 1))
                 prom_panic("Memory reserve map exhausted !\n");
-        mem_reserve_map[cnt].base = base;
-        mem_reserve_map[cnt].size = size;
+        mem_reserve_map[cnt].base = cpu_to_be64(base);
+        mem_reserve_map[cnt].size = cpu_to_be64(size);
         mem_reserve_cnt = cnt + 1;
 }
 
@@ -1102,6 +1111,7 @@ static void __init prom_init_mem(void)
         char *path, type[64];
         unsigned int plen;
         cell_t *p, *endp;
+        __be32 val;
         u32 rac, rsc;
 
         /*
@@ -1109,12 +1119,14 @@ static void __init prom_init_mem(void)
          * 1) top of RMO (first node)
          * 2) top of memory
          */
-        rac = 2;
-        prom_getprop(prom.root, "#address-cells", &rac, sizeof(rac));
-        rsc = 1;
-        prom_getprop(prom.root, "#size-cells", &rsc, sizeof(rsc));
-        prom_debug("root_addr_cells: %x\n", (unsigned long) rac);
-        prom_debug("root_size_cells: %x\n", (unsigned long) rsc);
+        val = cpu_to_be32(2);
+        prom_getprop(prom.root, "#address-cells", &val, sizeof(val));
+        rac = be32_to_cpu(val);
+        val = cpu_to_be32(1);
+        prom_getprop(prom.root, "#size-cells", &val, sizeof(rsc));
+        rsc = be32_to_cpu(val);
+        prom_debug("root_addr_cells: %x\n", rac);
+        prom_debug("root_size_cells: %x\n", rsc);
 
         prom_debug("scanning memory:\n");
         path = prom_scratch;
@@ -1222,25 +1234,23 @@ static void __init prom_init_mem(void)
 
 static void __init prom_close_stdin(void)
 {
-        ihandle val;
+        __be32 val;
+        ihandle stdin;
 
-        if (prom_getprop(prom.chosen, "stdin", &val, sizeof(val)) > 0)
-                call_prom("close", 1, 0, val);
+        if (prom_getprop(prom.chosen, "stdin", &val, sizeof(val)) > 0) {
+                stdin = be32_to_cpu(val);
+                call_prom("close", 1, 0, stdin);
+        }
 }
 
 #ifdef CONFIG_PPC_POWERNV
 
-static u64 __initdata prom_opal_size;
-static u64 __initdata prom_opal_align;
-static int __initdata prom_rtas_start_cpu;
-static u64 __initdata prom_rtas_data;
-static u64 __initdata prom_rtas_entry;
-
 #ifdef CONFIG_PPC_EARLY_DEBUG_OPAL
 static u64 __initdata prom_opal_base;
 static u64 __initdata prom_opal_entry;
 #endif
 
+#ifdef __BIG_ENDIAN__
 /* XXX Don't change this structure without updating opal-takeover.S */
 static struct opal_secondary_data {
         s64                             ack;    /*  0 */
@@ -1248,6 +1258,12 @@ static struct opal_secondary_data {
         struct opal_takeover_args       args;   /* 16 */
 } opal_secondary_data;
 
+static u64 __initdata prom_opal_align;
+static u64 __initdata prom_opal_size;
+static int __initdata prom_rtas_start_cpu;
+static u64 __initdata prom_rtas_data;
+static u64 __initdata prom_rtas_entry;
+
 extern char opal_secondary_entry;
 
 static void __init prom_query_opal(void)
@@ -1265,6 +1281,7 @@ static void __init prom_query_opal(void)
         }
 
         prom_printf("Querying for OPAL presence... ");
+
         rc = opal_query_takeover(&prom_opal_size,
                                  &prom_opal_align);
         prom_debug("(rc = %ld) ", rc);
@@ -1425,6 +1442,7 @@ static void __init prom_opal_takeover(void)
         for (;;)
                 opal_do_takeover(args);
 }
+#endif /* __BIG_ENDIAN__ */
 
 /*
  * Allocate room for and instantiate OPAL
@@ -1435,6 +1453,7 @@ static void __init prom_instantiate_opal(void)
         ihandle opal_inst;
         u64 base, entry;
         u64 size = 0, align = 0x10000;
+        __be64 val64;
         u32 rets[2];
 
         prom_debug("prom_instantiate_opal: start...\n");
@@ -1444,11 +1463,14 @@ static void __init prom_instantiate_opal(void)
         if (!PHANDLE_VALID(opal_node))
                 return;
 
-        prom_getprop(opal_node, "opal-runtime-size", &size, sizeof(size));
+        val64 = 0;
+        prom_getprop(opal_node, "opal-runtime-size", &val64, sizeof(val64));
+        size = be64_to_cpu(val64);
         if (size == 0)
                 return;
-        prom_getprop(opal_node, "opal-runtime-alignment", &align,
-                     sizeof(align));
+        val64 = 0;
+        prom_getprop(opal_node, "opal-runtime-alignment", &val64,sizeof(val64));
+        align = be64_to_cpu(val64);
 
         base = alloc_down(size, align, 0);
         if (base == 0) {
@@ -1505,6 +1527,7 @@ static void __init prom_instantiate_rtas(void)
         phandle rtas_node;
         ihandle rtas_inst;
         u32 base, entry = 0;
+        __be32 val;
         u32 size = 0;
 
         prom_debug("prom_instantiate_rtas: start...\n");
@@ -1514,7 +1537,9 @@ static void __init prom_instantiate_rtas(void)
         if (!PHANDLE_VALID(rtas_node))
                 return;
 
-        prom_getprop(rtas_node, "rtas-size", &size, sizeof(size));
+        val = 0;
+        prom_getprop(rtas_node, "rtas-size", &val, sizeof(size));
+        size = be32_to_cpu(val);
         if (size == 0)
                 return;
 
@@ -1541,12 +1566,14 @@ static void __init prom_instantiate_rtas(void)
 
         reserve_mem(base, size);
 
+        val = cpu_to_be32(base);
         prom_setprop(rtas_node, "/rtas", "linux,rtas-base",
-                     &base, sizeof(base));
+                     &val, sizeof(val));
+        val = cpu_to_be32(entry);
         prom_setprop(rtas_node, "/rtas", "linux,rtas-entry",
-                     &entry, sizeof(entry));
+                     &val, sizeof(val));
 
-#ifdef CONFIG_PPC_POWERNV
+#if defined(CONFIG_PPC_POWERNV) && defined(__BIG_ENDIAN__)
         /* PowerVN takeover hack */
         prom_rtas_data = base;
         prom_rtas_entry = entry;
@@ -1620,6 +1647,7 @@ static void __init prom_instantiate_sml(void)
 /*
  * Allocate room for and initialize TCE tables
  */
+#ifdef __BIG_ENDIAN__
 static void __init prom_initialize_tce_table(void)
 {
         phandle node;
@@ -1748,7 +1776,8 @@ static void __init prom_initialize_tce_table(void)
         /* Flag the first invalid entry */
         prom_debug("ending prom_initialize_tce_table\n");
 }
-#endif
+#endif /* __BIG_ENDIAN__ */
+#endif /* CONFIG_PPC64 */
 
 /*
  * With CHRP SMP we need to use the OF to start the other processors.
@@ -1777,7 +1806,6 @@ static void __init prom_initialize_tce_table(void)
 static void __init prom_hold_cpus(void)
 {
         unsigned long i;
-        unsigned int reg;
         phandle node;
         char type[64];
         unsigned long *spinloop
@@ -1803,6 +1831,9 @@ static void __init prom_hold_cpus(void)
 
         /* look for cpus */
         for (node = 0; prom_next_node(&node); ) {
+                unsigned int cpu_no;
+                __be32 reg;
+
                 type[0] = 0;
                 prom_getprop(node, "device_type", type, sizeof(type));
                 if (strcmp(type, "cpu") != 0)
@@ -1813,10 +1844,11 @@ static void __init prom_hold_cpus(void)
                         if (strcmp(type, "okay") != 0)
                                 continue;
 
-                reg = -1;
+                reg = cpu_to_be32(-1); /* make sparse happy */
                 prom_getprop(node, "reg", &reg, sizeof(reg));
+                cpu_no = be32_to_cpu(reg);
 
-                prom_debug("cpu hw idx   = %lu\n", reg);
+                prom_debug("cpu hw idx   = %lu\n", cpu_no);
 
                 /* Init the acknowledge var which will be reset by
                  * the secondary cpu when it awakens from its OF
@@ -1824,24 +1856,24 @@ static void __init prom_hold_cpus(void)
                  */
                 *acknowledge = (unsigned long)-1;
 
-                if (reg != prom.cpu) {
+                if (cpu_no != prom.cpu) {
                         /* Primary Thread of non-boot cpu or any thread */
-                        prom_printf("starting cpu hw idx %lu... ", reg);
+                        prom_printf("starting cpu hw idx %lu... ", cpu_no);
                         call_prom("start-cpu", 3, 0, node,
-                                  secondary_hold, reg);
+                                  secondary_hold, cpu_no);
 
                         for (i = 0; (i < 100000000) && 
                              (*acknowledge == ((unsigned long)-1)); i++ )
                                 mb();
 
-                        if (*acknowledge == reg)
+                        if (*acknowledge == cpu_no)
                                 prom_printf("done\n");
                         else
                                 prom_printf("failed: %x\n", *acknowledge);
                 }
 #ifdef CONFIG_SMP
                 else
-                        prom_printf("boot cpu hw idx %lu\n", reg);
+                        prom_printf("boot cpu hw idx %lu\n", cpu_no);
 #endif /* CONFIG_SMP */
         }
 
@@ -1895,6 +1927,7 @@ static void __init prom_find_mmu(void)
         prom.memory = call_prom("open", 1, 1, ADDR("/memory"));
         prom_getprop(prom.chosen, "mmu", &prom.mmumap,
                      sizeof(prom.mmumap));
+        prom.mmumap = be32_to_cpu(prom.mmumap);
         if (!IHANDLE_VALID(prom.memory) || !IHANDLE_VALID(prom.mmumap))
                 of_workarounds &= ~OF_WA_CLAIM;         /* hmmm */
 }
@@ -1906,17 +1939,19 @@ static void __init prom_init_stdout(void)
 {
         char *path = of_stdout_device;
         char type[16];
-        u32 val;
+        phandle stdout_node;
+        __be32 val;
 
         if (prom_getprop(prom.chosen, "stdout", &val, sizeof(val)) <= 0)
                 prom_panic("cannot find stdout");
 
-        prom.stdout = val;
+        prom.stdout = be32_to_cpu(val);
 
         /* Get the full OF pathname of the stdout device */
         memset(path, 0, 256);
         call_prom("instance-to-path", 3, 1, prom.stdout, path, 255);
-        val = call_prom("instance-to-package", 1, 1, prom.stdout);
+        stdout_node = call_prom("instance-to-package", 1, 1, prom.stdout);
+        val = cpu_to_be32(stdout_node);
         prom_setprop(prom.chosen, "/chosen", "linux,stdout-package",
                      &val, sizeof(val));
         prom_printf("OF stdout device is: %s\n", of_stdout_device);
@@ -1925,9 +1960,9 @@ static void __init prom_init_stdout(void)
 
         /* If it's a display, note it */
         memset(type, 0, sizeof(type));
-        prom_getprop(val, "device_type", type, sizeof(type));
+        prom_getprop(stdout_node, "device_type", type, sizeof(type));
         if (strcmp(type, "display") == 0)
-                prom_setprop(val, path, "linux,boot-display", NULL, 0);
+                prom_setprop(stdout_node, path, "linux,boot-display", NULL, 0);
 }
 
 static int __init prom_find_machine_type(void)
@@ -2082,6 +2117,22 @@ static void __init prom_check_displays(void)
                                            clut[2]) != 0)
                                 break;
 #endif /* CONFIG_LOGO_LINUX_CLUT224 */
+
+#ifdef CONFIG_PPC_EARLY_DEBUG_BOOTX
+                if (prom_getprop(node, "linux,boot-display", NULL, 0) !=
+                    PROM_ERROR) {
+                        u32 width, height, pitch, addr;
+
+                        prom_printf("Setting btext !\n");
+                        prom_getprop(node, "width", &width, 4);
+                        prom_getprop(node, "height", &height, 4);
+                        prom_getprop(node, "linebytes", &pitch, 4);
+                        prom_getprop(node, "address", &addr, 4);
+                        prom_printf("W=%d H=%d LB=%d addr=0x%x\n",
+                                    width, height, pitch, addr);
+                        btext_setup_display(width, height, 8, pitch, addr);
+                }
+#endif /* CONFIG_PPC_EARLY_DEBUG_BOOTX */
         }
 }
 
@@ -2117,8 +2168,10 @@ static void __init *make_room(unsigned long *mem_start, unsigned long *mem_end,
         return ret;
 }
 
-#define dt_push_token(token, mem_start, mem_end) \
-        do { *((u32 *)make_room(mem_start, mem_end, 4, 4)) = token; } while(0)
+#define dt_push_token(token, mem_start, mem_end) do {                   \
+                void *room = make_room(mem_start, mem_end, 4, 4);       \
+                *(__be32 *)room = cpu_to_be32(token);                   \
+        } while(0)
 
 static unsigned long __init dt_find_string(char *str)
 {
@@ -2291,7 +2344,7 @@ static void __init scan_dt_build_struct(phandle node, unsigned long *mem_start,
                         dt_push_token(4, mem_start, mem_end);
                         dt_push_token(soff, mem_start, mem_end);
                         valp = make_room(mem_start, mem_end, 4, 4);
-                        *(u32 *)valp = node;
+                        *(__be32 *)valp = cpu_to_be32(node);
                 }
         }
 
@@ -2364,16 +2417,16 @@ static void __init flatten_device_tree(void)
         dt_struct_end = PAGE_ALIGN(mem_start);
 
         /* Finish header */
-        hdr->boot_cpuid_phys = prom.cpu;
-        hdr->magic = OF_DT_HEADER;
-        hdr->totalsize = dt_struct_end - dt_header_start;
-        hdr->off_dt_struct = dt_struct_start - dt_header_start;
-        hdr->off_dt_strings = dt_string_start - dt_header_start;
-        hdr->dt_strings_size = dt_string_end - dt_string_start;
-        hdr->off_mem_rsvmap = ((unsigned long)rsvmap) - dt_header_start;
-        hdr->version = OF_DT_VERSION;
+        hdr->boot_cpuid_phys = cpu_to_be32(prom.cpu);
+        hdr->magic = cpu_to_be32(OF_DT_HEADER);
+        hdr->totalsize = cpu_to_be32(dt_struct_end - dt_header_start);
+        hdr->off_dt_struct = cpu_to_be32(dt_struct_start - dt_header_start);
+        hdr->off_dt_strings = cpu_to_be32(dt_string_start - dt_header_start);
+        hdr->dt_strings_size = cpu_to_be32(dt_string_end - dt_string_start);
+        hdr->off_mem_rsvmap = cpu_to_be32(((unsigned long)rsvmap) - dt_header_start);
+        hdr->version = cpu_to_be32(OF_DT_VERSION);
         /* Version 16 is not backward compatible */
-        hdr->last_comp_version = 0x10;
+        hdr->last_comp_version = cpu_to_be32(0x10);
 
         /* Copy the reserve map in */
         memcpy(rsvmap, mem_reserve_map, sizeof(mem_reserve_map));
@@ -2384,8 +2437,8 @@ static void __init flatten_device_tree(void)
                 prom_printf("reserved memory map:\n");
                 for (i = 0; i < mem_reserve_cnt; i++)
                         prom_printf("  %x - %x\n",
-                                    mem_reserve_map[i].base,
-                                    mem_reserve_map[i].size);
+                                    be64_to_cpu(mem_reserve_map[i].base),
+                                    be64_to_cpu(mem_reserve_map[i].size));
         }
 #endif
         /* Bump mem_reserve_cnt to cause further reservations to fail
@@ -2397,7 +2450,6 @@ static void __init flatten_device_tree(void)
                     dt_string_start, dt_string_end);
         prom_printf("Device tree struct  0x%x -> 0x%x\n",
                     dt_struct_start, dt_struct_end);
-
 }
 
 #ifdef CONFIG_PPC_MAPLE
@@ -2730,18 +2782,19 @@ static void __init fixup_device_tree(void)
 
 static void __init prom_find_boot_cpu(void)
 {
-        u32 getprop_rval;
+        __be32 rval;
         ihandle prom_cpu;
         phandle cpu_pkg;
 
-        prom.cpu = 0;
-        if (prom_getprop(prom.chosen, "cpu", &prom_cpu, sizeof(prom_cpu)) <= 0)
+        rval = 0;
+        if (prom_getprop(prom.chosen, "cpu", &rval, sizeof(rval)) <= 0)
                 return;
+        prom_cpu = be32_to_cpu(rval);
 
         cpu_pkg = call_prom("instance-to-package", 1, 1, prom_cpu);
 
-        prom_getprop(cpu_pkg, "reg", &getprop_rval, sizeof(getprop_rval));
-        prom.cpu = getprop_rval;
+        prom_getprop(cpu_pkg, "reg", &rval, sizeof(rval));
+        prom.cpu = be32_to_cpu(rval);
 
         prom_debug("Booting CPU hw index = %lu\n", prom.cpu);
 }
@@ -2750,15 +2803,15 @@ static void __init prom_check_initrd(unsigned long r3, unsigned long r4)
 {
 #ifdef CONFIG_BLK_DEV_INITRD
         if (r3 && r4 && r4 != 0xdeadbeef) {
-                unsigned long val;
+                __be64 val;
 
                 prom_initrd_start = is_kernel_addr(r3) ? __pa(r3) : r3;
                 prom_initrd_end = prom_initrd_start + r4;
 
-                val = prom_initrd_start;
+                val = cpu_to_be64(prom_initrd_start);
                 prom_setprop(prom.chosen, "/chosen", "linux,initrd-start",
                              &val, sizeof(val));
-                val = prom_initrd_end;
+                val = cpu_to_be64(prom_initrd_end);
                 prom_setprop(prom.chosen, "/chosen", "linux,initrd-end",
                              &val, sizeof(val));
 
@@ -2915,7 +2968,7 @@ unsigned long __init prom_init(unsigned long r3, unsigned long r4,
          */
         prom_check_displays();
 
-#ifdef CONFIG_PPC64
+#if defined(CONFIG_PPC64) && defined(__BIG_ENDIAN__)
         /*
          * Initialize IOMMU (TCE tables) on pSeries. Do that before anything else
          * that uses the allocator, we need to make sure we get the top of memory
@@ -2934,6 +2987,7 @@ unsigned long __init prom_init(unsigned long r3, unsigned long r4,
                 prom_instantiate_rtas();
 
 #ifdef CONFIG_PPC_POWERNV
+#ifdef __BIG_ENDIAN__
         /* Detect HAL and try instanciating it & doing takeover */
         if (of_platform == PLATFORM_PSERIES_LPAR) {
                 prom_query_opal();
@@ -2941,9 +2995,11 @@ unsigned long __init prom_init(unsigned long r3, unsigned long r4,
                         prom_opal_hold_cpus();
                         prom_opal_takeover();
                 }
-        } else if (of_platform == PLATFORM_OPAL)
+        } else
+#endif /* __BIG_ENDIAN__ */
+        if (of_platform == PLATFORM_OPAL)
                 prom_instantiate_opal();
-#endif
+#endif /* CONFIG_PPC_POWERNV */
 
 #ifdef CONFIG_PPC64
         /* instantiate sml */
@@ -2962,10 +3018,11 @@ unsigned long __init prom_init(unsigned long r3, unsigned long r4,
         /*
          * Fill in some infos for use by the kernel later on
          */
-        if (prom_memory_limit)
+        if (prom_memory_limit) {
+                __be64 val = cpu_to_be64(prom_memory_limit);
                 prom_setprop(prom.chosen, "/chosen", "linux,memory-limit",
-                             &prom_memory_limit,
-                             sizeof(prom_memory_limit));
+                             &val, sizeof(val));
+        }
 #ifdef CONFIG_PPC64
         if (prom_iommu_off)
                 prom_setprop(prom.chosen, "/chosen", "linux,iommu-off",
diff --git a/arch/powerpc/kernel/prom_init_check.sh b/arch/powerpc/kernel/prom_init_check.sh
index 3765da6be4f2..b0c263da219a 100644
--- a/arch/powerpc/kernel/prom_init_check.sh
+++ b/arch/powerpc/kernel/prom_init_check.sh
@@ -22,7 +22,8 @@ __secondary_hold_acknowledge __secondary_hold_spinloop __start
 strcmp strcpy strlcpy strlen strncmp strstr logo_linux_clut224
 reloc_got2 kernstart_addr memstart_addr linux_banner _stext
 opal_query_takeover opal_do_takeover opal_enter_rtas opal_secondary_entry
-boot_command_line __prom_init_toc_start __prom_init_toc_end"
+boot_command_line __prom_init_toc_start __prom_init_toc_end
+btext_setup_display"
 
 NM="$1"
 OBJ="$2"
diff --git a/arch/powerpc/kernel/prom_parse.c b/arch/powerpc/kernel/prom_parse.c
index 4e1331b8eb33..6295e646f78c 100644
--- a/arch/powerpc/kernel/prom_parse.c
+++ b/arch/powerpc/kernel/prom_parse.c
@@ -7,28 +7,27 @@
 #include <linux/of_address.h>
 #include <asm/prom.h>
 
-void of_parse_dma_window(struct device_node *dn, const void *dma_window_prop,
-                unsigned long *busno, unsigned long *phys, unsigned long *size)
+void of_parse_dma_window(struct device_node *dn, const __be32 *dma_window,
+                         unsigned long *busno, unsigned long *phys,
+                         unsigned long *size)
 {
-        const u32 *dma_window;
         u32 cells;
-        const unsigned char *prop;
-
-        dma_window = dma_window_prop;
+        const __be32 *prop;
 
         /* busno is always one cell */
-        *busno = *(dma_window++);
+        *busno = of_read_number(dma_window, 1);
+        dma_window++;
 
         prop = of_get_property(dn, "ibm,#dma-address-cells", NULL);
         if (!prop)
                 prop = of_get_property(dn, "#address-cells", NULL);
 
-        cells = prop ? *(u32 *)prop : of_n_addr_cells(dn);
+        cells = prop ? of_read_number(prop, 1) : of_n_addr_cells(dn);
         *phys = of_read_number(dma_window, cells);
 
         dma_window += cells;
 
         prop = of_get_property(dn, "ibm,#dma-size-cells", NULL);
-        cells = prop ? *(u32 *)prop : of_n_size_cells(dn);
+        cells = prop ? of_read_number(prop, 1) : of_n_size_cells(dn);
         *size = of_read_number(dma_window, cells);
 }
diff --git a/arch/powerpc/kernel/rtas.c b/arch/powerpc/kernel/rtas.c
index 80b5ef403f68..4cf674d7d5ae 100644
--- a/arch/powerpc/kernel/rtas.c
+++ b/arch/powerpc/kernel/rtas.c
@@ -91,7 +91,7 @@ static void unlock_rtas(unsigned long flags)
  * are designed only for very early low-level debugging, which
  * is why the token is hard-coded to 10.
  */
-static void call_rtas_display_status(char c)
+static void call_rtas_display_status(unsigned char c)
 {
         struct rtas_args *args = &rtas.args;
         unsigned long s;
@@ -100,11 +100,11 @@ static void call_rtas_display_status(char c)
                 return;
         s = lock_rtas();
 
-        args->token = 10;
-        args->nargs = 1;
-        args->nret  = 1;
-        args->rets  = (rtas_arg_t *)&(args->args[1]);
-        args->args[0] = (unsigned char)c;
+        args->token = cpu_to_be32(10);
+        args->nargs = cpu_to_be32(1);
+        args->nret  = cpu_to_be32(1);
+        args->rets  = &(args->args[1]);
+        args->args[0] = cpu_to_be32(c);
 
         enter_rtas(__pa(args));
 
@@ -204,7 +204,7 @@ void rtas_progress(char *s, unsigned short hex)
 {
         struct device_node *root;
         int width;
-        const int *p;
+        const __be32 *p;
         char *os;
         static int display_character, set_indicator;
         static int display_width, display_lines, form_feed;
@@ -221,13 +221,13 @@ void rtas_progress(char *s, unsigned short hex)
                 if ((root = of_find_node_by_path("/rtas"))) {
                         if ((p = of_get_property(root,
                                         "ibm,display-line-length", NULL)))
-                                display_width = *p;
+                                display_width = be32_to_cpu(*p);
                         if ((p = of_get_property(root,
                                         "ibm,form-feed", NULL)))
-                                form_feed = *p;
+                                form_feed = be32_to_cpu(*p);
                         if ((p = of_get_property(root,
                                         "ibm,display-number-of-lines", NULL)))
-                                display_lines = *p;
+                                display_lines = be32_to_cpu(*p);
                         row_width = of_get_property(root,
                                         "ibm,display-truncation-length", NULL);
                         of_node_put(root);
@@ -322,11 +322,11 @@ EXPORT_SYMBOL(rtas_progress);		/* needed by rtas_flash module */
 
 int rtas_token(const char *service)
 {
-        const int *tokp;
+        const __be32 *tokp;
         if (rtas.dev == NULL)
                 return RTAS_UNKNOWN_SERVICE;
         tokp = of_get_property(rtas.dev, service, NULL);
-        return tokp ? *tokp : RTAS_UNKNOWN_SERVICE;
+        return tokp ? be32_to_cpu(*tokp) : RTAS_UNKNOWN_SERVICE;
 }
 EXPORT_SYMBOL(rtas_token);
 
@@ -380,11 +380,11 @@ static char *__fetch_rtas_last_error(char *altbuf)
 
         bufsz = rtas_get_error_log_max();
 
-        err_args.token = rtas_last_error_token;
-        err_args.nargs = 2;
-        err_args.nret = 1;
-        err_args.args[0] = (rtas_arg_t)__pa(rtas_err_buf);
-        err_args.args[1] = bufsz;
+        err_args.token = cpu_to_be32(rtas_last_error_token);
+        err_args.nargs = cpu_to_be32(2);
+        err_args.nret = cpu_to_be32(1);
+        err_args.args[0] = cpu_to_be32(__pa(rtas_err_buf));
+        err_args.args[1] = cpu_to_be32(bufsz);
         err_args.args[2] = 0;
 
         save_args = rtas.args;
@@ -433,13 +433,13 @@ int rtas_call(int token, int nargs, int nret, int *outputs, ...)
         s = lock_rtas();
         rtas_args = &rtas.args;
 
-        rtas_args->token = token;
-        rtas_args->nargs = nargs;
-        rtas_args->nret  = nret;
-        rtas_args->rets  = (rtas_arg_t *)&(rtas_args->args[nargs]);
+        rtas_args->token = cpu_to_be32(token);
+        rtas_args->nargs = cpu_to_be32(nargs);
+        rtas_args->nret  = cpu_to_be32(nret);
+        rtas_args->rets  = &(rtas_args->args[nargs]);
         va_start(list, outputs);
         for (i = 0; i < nargs; ++i)
-                rtas_args->args[i] = va_arg(list, rtas_arg_t);
+                rtas_args->args[i] = cpu_to_be32(va_arg(list, __u32));
         va_end(list);
 
         for (i = 0; i < nret; ++i)
@@ -449,13 +449,13 @@ int rtas_call(int token, int nargs, int nret, int *outputs, ...)
 
         /* A -1 return code indicates that the last command couldn't
            be completed due to a hardware error. */
-        if (rtas_args->rets[0] == -1)
+        if (be32_to_cpu(rtas_args->rets[0]) == -1)
                 buff_copy = __fetch_rtas_last_error(NULL);
 
         if (nret > 1 && outputs != NULL)
                 for (i = 0; i < nret-1; ++i)
-                        outputs[i] = rtas_args->rets[i+1];
-        ret = (nret > 0)? rtas_args->rets[0]: 0;
+                        outputs[i] = be32_to_cpu(rtas_args->rets[i+1]);
+        ret = (nret > 0)? be32_to_cpu(rtas_args->rets[0]): 0;
 
         unlock_rtas(s);
 
@@ -588,8 +588,8 @@ bool rtas_indicator_present(int token, int *maxindex)
 {
         int proplen, count, i;
         const struct indicator_elem {
-                u32 token;
-                u32 maxindex;
+                __be32 token;
+                __be32 maxindex;
         } *indicators;
 
         indicators = of_get_property(rtas.dev, "rtas-indicators", &proplen);
@@ -599,10 +599,10 @@ bool rtas_indicator_present(int token, int *maxindex)
         count = proplen / sizeof(struct indicator_elem);
 
         for (i = 0; i < count; i++) {
-                if (indicators[i].token != token)
+                if (__be32_to_cpu(indicators[i].token) != token)
                         continue;
                 if (maxindex)
-                        *maxindex = indicators[i].maxindex;
+                        *maxindex = __be32_to_cpu(indicators[i].maxindex);
                 return true;
         }
 
@@ -1097,19 +1097,19 @@ void __init rtas_initialize(void)
          */
         rtas.dev = of_find_node_by_name(NULL, "rtas");
         if (rtas.dev) {
-                const u32 *basep, *entryp, *sizep;
+                const __be32 *basep, *entryp, *sizep;
 
                 basep = of_get_property(rtas.dev, "linux,rtas-base", NULL);
                 sizep = of_get_property(rtas.dev, "rtas-size", NULL);
                 if (basep != NULL && sizep != NULL) {
-                        rtas.base = *basep;
-                        rtas.size = *sizep;
+                        rtas.base = __be32_to_cpu(*basep);
+                        rtas.size = __be32_to_cpu(*sizep);
                         entryp = of_get_property(rtas.dev,
                                         "linux,rtas-entry", NULL);
                         if (entryp == NULL) /* Ugh */
                                 rtas.entry = rtas.base;
                         else
-                                rtas.entry = *entryp;
+                                rtas.entry = __be32_to_cpu(*entryp);
                 } else
                         rtas.dev = NULL;
         }
diff --git a/arch/powerpc/kernel/setup-common.c b/arch/powerpc/kernel/setup-common.c
index 63d051f5b7a5..3d261c071fc8 100644
--- a/arch/powerpc/kernel/setup-common.c
+++ b/arch/powerpc/kernel/setup-common.c
@@ -436,7 +436,8 @@ void __init smp_setup_cpu_maps(void)
         DBG("smp_setup_cpu_maps()\n");
 
         while ((dn = of_find_node_by_type(dn, "cpu")) && cpu < nr_cpu_ids) {
-                const int *intserv;
+                const __be32 *intserv;
+                __be32 cpu_be;
                 int j, len;
 
                 DBG("  * %s...\n", dn->full_name);
@@ -450,15 +451,17 @@ void __init smp_setup_cpu_maps(void)
                 } else {
                         DBG("    no ibm,ppc-interrupt-server#s -> 1 thread\n");
                         intserv = of_get_property(dn, "reg", NULL);
-                        if (!intserv)
-                                intserv = &cpu; /* assume logical == phys */
+                        if (!intserv) {
+                                cpu_be = cpu_to_be32(cpu);
+                                intserv = &cpu_be;      /* assume logical == phys */
+                        }
                 }
 
                 for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) {
                         DBG("    thread %d -> cpu %d (hard id %d)\n",
-                            j, cpu, intserv[j]);
+                            j, cpu, be32_to_cpu(intserv[j]));
                         set_cpu_present(cpu, true);
-                        set_hard_smp_processor_id(cpu, intserv[j]);
+                        set_hard_smp_processor_id(cpu, be32_to_cpu(intserv[j]));
                         set_cpu_possible(cpu, true);
                         cpu++;
                 }
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index a8f54ecb091f..a4bbcae72578 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -38,6 +38,7 @@
 #include <asm/serial.h>
 #include <asm/udbg.h>
 #include <asm/mmu_context.h>
+#include <asm/epapr_hcalls.h>
 
 #include "setup.h"
 
@@ -128,6 +129,8 @@ notrace void __init machine_init(u64 dt_ptr)
         /* Do some early initialization based on the flat device tree */
         early_init_devtree(__va(dt_ptr));
 
+        epapr_paravirt_early_init();
+
         early_init_mmu();
 
         probe_machine();
@@ -326,5 +329,4 @@ void __init setup_arch(char **cmdline_p)
 
         /* Initialize the MMU context management stuff */
         mmu_context_init();
-
 }
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index fe6a58c9f0b7..278ca93e1f28 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -10,7 +10,7 @@
  *      2 of the License, or (at your option) any later version.
  */
 
-#undef DEBUG
+#define DEBUG
 
 #include <linux/export.h>
 #include <linux/string.h>
@@ -66,6 +66,7 @@
 #include <asm/code-patching.h>
 #include <asm/kvm_ppc.h>
 #include <asm/hugetlb.h>
+#include <asm/epapr_hcalls.h>
 
 #include "setup.h"
 
@@ -215,6 +216,8 @@ void __init early_setup(unsigned long dt_ptr)
          */
         early_init_devtree(__va(dt_ptr));
 
+        epapr_paravirt_early_init();
+
         /* Now we know the logical id of our boot cpu, setup the paca. */
         setup_paca(&paca[boot_cpuid]);
         fixup_boot_paca();
@@ -239,6 +242,18 @@ void __init early_setup(unsigned long dt_ptr)
         reserve_hugetlb_gpages();
 
         DBG(" <- early_setup()\n");
+
+#ifdef CONFIG_PPC_EARLY_DEBUG_BOOTX
+        /*
+         * This needs to be done *last* (after the above DBG() even)
+         *
+         * Right after we return from this function, we turn on the MMU
+         * which means the real-mode access trick that btext does will
+         * no longer work, it needs to switch to using a real MMU
+         * mapping. This call will ensure that it does
+         */
+        btext_map();
+#endif /* CONFIG_PPC_EARLY_DEBUG_BOOTX */
 }
 
 #ifdef CONFIG_SMP
@@ -307,14 +322,14 @@ static void __init initialize_cache_info(void)
                  * d-cache and i-cache sizes... -Peter
                  */
                 if (num_cpus == 1) {
-                        const u32 *sizep, *lsizep;
+                        const __be32 *sizep, *lsizep;
                         u32 size, lsize;
 
                         size = 0;
                         lsize = cur_cpu_spec->dcache_bsize;
                         sizep = of_get_property(np, "d-cache-size", NULL);
                         if (sizep != NULL)
-                                size = *sizep;
+                                size = be32_to_cpu(*sizep);
                         lsizep = of_get_property(np, "d-cache-block-size",
                                                  NULL);
                         /* fallback if block size missing */
@@ -323,8 +338,8 @@ static void __init initialize_cache_info(void)
                                                          "d-cache-line-size",
                                                          NULL);
                         if (lsizep != NULL)
-                                lsize = *lsizep;
-                        if (sizep == 0 || lsizep == 0)
+                                lsize = be32_to_cpu(*lsizep);
+                        if (sizep == NULL || lsizep == NULL)
                                 DBG("Argh, can't find dcache properties ! "
                                     "sizep: %p, lsizep: %p\n", sizep, lsizep);
 
@@ -337,7 +352,7 @@ static void __init initialize_cache_info(void)
                         lsize = cur_cpu_spec->icache_bsize;
                         sizep = of_get_property(np, "i-cache-size", NULL);
                         if (sizep != NULL)
-                                size = *sizep;
+                                size = be32_to_cpu(*sizep);
                         lsizep = of_get_property(np, "i-cache-block-size",
                                                  NULL);
                         if (lsizep == NULL)
@@ -345,8 +360,8 @@ static void __init initialize_cache_info(void)
                                                          "i-cache-line-size",
                                                          NULL);
                         if (lsizep != NULL)
-                                lsize = *lsizep;
-                        if (sizep == 0 || lsizep == 0)
+                                lsize = be32_to_cpu(*lsizep);
+                        if (sizep == NULL || lsizep == NULL)
                                 DBG("Argh, can't find icache properties ! "
                                     "sizep: %p, lsizep: %p\n", sizep, lsizep);
 
@@ -701,8 +716,7 @@ void __init setup_per_cpu_areas(void)
 #endif
 
 
-#ifdef CONFIG_PPC_INDIRECT_IO
+#if defined(CONFIG_PPC_INDIRECT_PIO) || defined(CONFIG_PPC_INDIRECT_MMIO)
 struct ppc_pci_io ppc_pci_io;
 EXPORT_SYMBOL(ppc_pci_io);
-#endif /* CONFIG_PPC_INDIRECT_IO */
-
+#endif
diff --git a/arch/powerpc/kernel/signal_32.c b/arch/powerpc/kernel/signal_32.c
index 0f83122e6676..bebdf1a1a540 100644
--- a/arch/powerpc/kernel/signal_32.c
+++ b/arch/powerpc/kernel/signal_32.c
@@ -436,7 +436,10 @@ static int save_user_regs(struct pt_regs *regs, struct mcontext __user *frame,
          * use altivec. Since VSCR only contains 32 bits saved in the least
          * significant bits of a vector, we "cheat" and stuff VRSAVE in the
          * most significant bits of that same vector. --BenH
+         * Note that the current VRSAVE value is in the SPR at this point.
          */
+        if (cpu_has_feature(CPU_FTR_ALTIVEC))
+                current->thread.vrsave = mfspr(SPRN_VRSAVE);
         if (__put_user(current->thread.vrsave, (u32 __user *)&frame->mc_vregs[32]))
                 return 1;
 #endif /* CONFIG_ALTIVEC */
@@ -557,6 +560,8 @@ static int save_tm_user_regs(struct pt_regs *regs,
          * significant bits of a vector, we "cheat" and stuff VRSAVE in the
          * most significant bits of that same vector. --BenH
          */
+        if (cpu_has_feature(CPU_FTR_ALTIVEC))
+                current->thread.vrsave = mfspr(SPRN_VRSAVE);
         if (__put_user(current->thread.vrsave,
                        (u32 __user *)&frame->mc_vregs[32]))
                 return 1;
@@ -696,6 +701,8 @@ static long restore_user_regs(struct pt_regs *regs,
         /* Always get VRSAVE back */
         if (__get_user(current->thread.vrsave, (u32 __user *)&sr->mc_vregs[32]))
                 return 1;
+        if (cpu_has_feature(CPU_FTR_ALTIVEC))
+                mtspr(SPRN_VRSAVE, current->thread.vrsave);
 #endif /* CONFIG_ALTIVEC */
         if (copy_fpr_from_user(current, &sr->mc_fregs))
                 return 1;
@@ -809,6 +816,8 @@ static long restore_tm_user_regs(struct pt_regs *regs,
             __get_user(current->thread.transact_vrsave,
                        (u32 __user *)&tm_sr->mc_vregs[32]))
                 return 1;
+        if (cpu_has_feature(CPU_FTR_ALTIVEC))
+                mtspr(SPRN_VRSAVE, current->thread.vrsave);
 #endif /* CONFIG_ALTIVEC */
 
         regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1);
diff --git a/arch/powerpc/kernel/signal_64.c b/arch/powerpc/kernel/signal_64.c
index 887e99d85bc2..f93ec2835a13 100644
--- a/arch/powerpc/kernel/signal_64.c
+++ b/arch/powerpc/kernel/signal_64.c
@@ -96,8 +96,6 @@ static long setup_sigcontext(struct sigcontext __user *sc, struct pt_regs *regs,
         unsigned long msr = regs->msr;
         long err = 0;
 
-        flush_fp_to_thread(current);
-
 #ifdef CONFIG_ALTIVEC
         err |= __put_user(v_regs, &sc->v_regs);
 
@@ -114,6 +112,8 @@ static long setup_sigcontext(struct sigcontext __user *sc, struct pt_regs *regs,
         /* We always copy to/from vrsave, it's 0 if we don't have or don't
          * use altivec.
          */
+        if (cpu_has_feature(CPU_FTR_ALTIVEC))
+                current->thread.vrsave = mfspr(SPRN_VRSAVE);
         err |= __put_user(current->thread.vrsave, (u32 __user *)&v_regs[33]);
 #else /* CONFIG_ALTIVEC */
         err |= __put_user(0, &sc->v_regs);
@@ -217,6 +217,8 @@ static long setup_tm_sigcontexts(struct sigcontext __user *sc,
         /* We always copy to/from vrsave, it's 0 if we don't have or don't
          * use altivec.
          */
+        if (cpu_has_feature(CPU_FTR_ALTIVEC))
+                current->thread.vrsave = mfspr(SPRN_VRSAVE);
         err |= __put_user(current->thread.vrsave, (u32 __user *)&v_regs[33]);
         if (msr & MSR_VEC)
                 err |= __put_user(current->thread.transact_vrsave,
@@ -346,16 +348,18 @@ static long restore_sigcontext(struct pt_regs *regs, sigset_t *set, int sig,
         if (v_regs && !access_ok(VERIFY_READ, v_regs, 34 * sizeof(vector128)))
                 return -EFAULT;
         /* Copy 33 vec registers (vr0..31 and vscr) from the stack */
-        if (v_regs != 0 && (msr & MSR_VEC) != 0)
+        if (v_regs != NULL && (msr & MSR_VEC) != 0)
                 err |= __copy_from_user(current->thread.vr, v_regs,
                                         33 * sizeof(vector128));
         else if (current->thread.used_vr)
                 memset(current->thread.vr, 0, 33 * sizeof(vector128));
         /* Always get VRSAVE back */
-        if (v_regs != 0)
+        if (v_regs != NULL)
                 err |= __get_user(current->thread.vrsave, (u32 __user *)&v_regs[33]);
         else
                 current->thread.vrsave = 0;
+        if (cpu_has_feature(CPU_FTR_ALTIVEC))
+                mtspr(SPRN_VRSAVE, current->thread.vrsave);
 #endif /* CONFIG_ALTIVEC */
         /* restore floating point */
         err |= copy_fpr_from_user(current, &sc->fp_regs);
@@ -463,7 +467,7 @@ static long restore_tm_sigcontexts(struct pt_regs *regs,
                                     tm_v_regs, 34 * sizeof(vector128)))
                 return -EFAULT;
         /* Copy 33 vec registers (vr0..31 and vscr) from the stack */
-        if (v_regs != 0 && tm_v_regs != 0 && (msr & MSR_VEC) != 0) {
+        if (v_regs != NULL && tm_v_regs != NULL && (msr & MSR_VEC) != 0) {
                 err |= __copy_from_user(current->thread.vr, v_regs,
                                         33 * sizeof(vector128));
                 err |= __copy_from_user(current->thread.transact_vr, tm_v_regs,
@@ -474,7 +478,7 @@ static long restore_tm_sigcontexts(struct pt_regs *regs,
                 memset(current->thread.transact_vr, 0, 33 * sizeof(vector128));
         }
         /* Always get VRSAVE back */
-        if (v_regs != 0 && tm_v_regs != 0) {
+        if (v_regs != NULL && tm_v_regs != NULL) {
                 err |= __get_user(current->thread.vrsave,
                                   (u32 __user *)&v_regs[33]);
                 err |= __get_user(current->thread.transact_vrsave,
@@ -484,6 +488,8 @@ static long restore_tm_sigcontexts(struct pt_regs *regs,
                 current->thread.vrsave = 0;
                 current->thread.transact_vrsave = 0;
         }
+        if (cpu_has_feature(CPU_FTR_ALTIVEC))
+                mtspr(SPRN_VRSAVE, current->thread.vrsave);
 #endif /* CONFIG_ALTIVEC */
         /* restore floating point */
         err |= copy_fpr_from_user(current, &sc->fp_regs);
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index 38b0ba65a735..442d8e23f8f4 100644
--- a/arch/powerpc/kernel/smp.c
+++ b/arch/powerpc/kernel/smp.c
@@ -81,6 +81,28 @@ int smt_enabled_at_boot = 1;
 
 static void (*crash_ipi_function_ptr)(struct pt_regs *) = NULL;
 
+/*
+ * Returns 1 if the specified cpu should be brought up during boot.
+ * Used to inhibit booting threads if they've been disabled or
+ * limited on the command line
+ */
+int smp_generic_cpu_bootable(unsigned int nr)
+{
+        /* Special case - we inhibit secondary thread startup
+         * during boot if the user requests it.
+         */
+        if (system_state == SYSTEM_BOOTING && cpu_has_feature(CPU_FTR_SMT)) {
+                if (!smt_enabled_at_boot && cpu_thread_in_core(nr) != 0)
+                        return 0;
+                if (smt_enabled_at_boot
+                    && cpu_thread_in_core(nr) >= smt_enabled_at_boot)
+                        return 0;
+        }
+
+        return 1;
+}
+
+
 #ifdef CONFIG_PPC64
 int smp_generic_kick_cpu(int nr)
 {
@@ -172,7 +194,7 @@ int smp_request_message_ipi(int virq, int msg)
 #endif
         err = request_irq(virq, smp_ipi_action[msg],
                           IRQF_PERCPU | IRQF_NO_THREAD | IRQF_NO_SUSPEND,
-                          smp_ipi_name[msg], 0);
+                          smp_ipi_name[msg], NULL);
         WARN(err < 0, "unable to request_irq %d for %s (rc %d)\n",
                 virq, smp_ipi_name[msg], err);
 
@@ -210,6 +232,12 @@ void smp_muxed_ipi_message_pass(int cpu, int msg)
         smp_ops->cause_ipi(cpu, info->data);
 }
 
+#ifdef __BIG_ENDIAN__
+#define IPI_MESSAGE(A) (1 << (24 - 8 * (A)))
+#else
+#define IPI_MESSAGE(A) (1 << (8 * (A)))
+#endif
+
 irqreturn_t smp_ipi_demux(void)
 {
         struct cpu_messages *info = &__get_cpu_var(ipi_message);
@@ -219,19 +247,14 @@ irqreturn_t smp_ipi_demux(void)
 
         do {
                 all = xchg(&info->messages, 0);
-
-#ifdef __BIG_ENDIAN
-                if (all & (1 << (24 - 8 * PPC_MSG_CALL_FUNCTION)))
+                if (all & IPI_MESSAGE(PPC_MSG_CALL_FUNCTION))
                         generic_smp_call_function_interrupt();
-                if (all & (1 << (24 - 8 * PPC_MSG_RESCHEDULE)))
+                if (all & IPI_MESSAGE(PPC_MSG_RESCHEDULE))
                         scheduler_ipi();
-                if (all & (1 << (24 - 8 * PPC_MSG_CALL_FUNC_SINGLE)))
+                if (all & IPI_MESSAGE(PPC_MSG_CALL_FUNC_SINGLE))
                         generic_smp_call_function_single_interrupt();
-                if (all & (1 << (24 - 8 * PPC_MSG_DEBUGGER_BREAK)))
+                if (all & IPI_MESSAGE(PPC_MSG_DEBUGGER_BREAK))
                         debug_ipi_action(0, NULL);
-#else
-#error Unsupported ENDIAN
-#endif
         } while (info->messages);
 
         return IRQ_HANDLED;
@@ -574,6 +597,21 @@ out:
         return id;
 }
 
+/* Return the value of the chip-id property corresponding
+ * to the given logical cpu.
+ */
+int cpu_to_chip_id(int cpu)
+{
+        struct device_node *np;
+
+        np = of_get_cpu_node(cpu, NULL);
+        if (!np)
+                return -1;
+
+        of_node_put(np);
+        return of_get_ibm_chip_id(np);
+}
+
 /* Helper routines for cpu to core mapping */
 int cpu_core_index_of_thread(int cpu)
 {
@@ -587,6 +625,33 @@ int cpu_first_thread_of_core(int core)
 }
 EXPORT_SYMBOL_GPL(cpu_first_thread_of_core);
 
+static void traverse_siblings_chip_id(int cpu, bool add, int chipid)
+{
+        const struct cpumask *mask;
+        struct device_node *np;
+        int i, plen;
+        const __be32 *prop;
+
+        mask = add ? cpu_online_mask : cpu_present_mask;
+        for_each_cpu(i, mask) {
+                np = of_get_cpu_node(i, NULL);
+                if (!np)
+                        continue;
+                prop = of_get_property(np, "ibm,chip-id", &plen);
+                if (prop && plen == sizeof(int) &&
+                    of_read_number(prop, 1) == chipid) {
+                        if (add) {
+                                cpumask_set_cpu(cpu, cpu_core_mask(i));
+                                cpumask_set_cpu(i, cpu_core_mask(cpu));
+                        } else {
+                                cpumask_clear_cpu(cpu, cpu_core_mask(i));
+                                cpumask_clear_cpu(i, cpu_core_mask(cpu));
+                        }
+                }
+                of_node_put(np);
+        }
+}
+
 /* Must be called when no change can occur to cpu_present_mask,
  * i.e. during cpu online or offline.
  */
@@ -609,11 +674,51 @@ static struct device_node *cpu_to_l2cache(int cpu)
         return cache;
 }
 
+static void traverse_core_siblings(int cpu, bool add)
+{
+        struct device_node *l2_cache, *np;
+        const struct cpumask *mask;
+        int i, chip, plen;
+        const __be32 *prop;
+
+        /* First see if we have ibm,chip-id properties in cpu nodes */
+        np = of_get_cpu_node(cpu, NULL);
+        if (np) {
+                chip = -1;
+                prop = of_get_property(np, "ibm,chip-id", &plen);
+                if (prop && plen == sizeof(int))
+                        chip = of_read_number(prop, 1);
+                of_node_put(np);
+                if (chip >= 0) {
+                        traverse_siblings_chip_id(cpu, add, chip);
+                        return;
+                }
+        }
+
+        l2_cache = cpu_to_l2cache(cpu);
+        mask = add ? cpu_online_mask : cpu_present_mask;
+        for_each_cpu(i, mask) {
+                np = cpu_to_l2cache(i);
+                if (!np)
+                        continue;
+                if (np == l2_cache) {
+                        if (add) {
+                                cpumask_set_cpu(cpu, cpu_core_mask(i));
+                                cpumask_set_cpu(i, cpu_core_mask(cpu));
+                        } else {
+                                cpumask_clear_cpu(cpu, cpu_core_mask(i));
+                                cpumask_clear_cpu(i, cpu_core_mask(cpu));
+                        }
+                }
+                of_node_put(np);
+        }
+        of_node_put(l2_cache);
+}
+
 /* Activate a secondary processor. */
 void start_secondary(void *unused)
 {
         unsigned int cpu = smp_processor_id();
-        struct device_node *l2_cache;
         int i, base;
 
         atomic_inc(&init_mm.mm_count);
@@ -652,18 +757,7 @@ void start_secondary(void *unused)
                 cpumask_set_cpu(cpu, cpu_core_mask(base + i));
                 cpumask_set_cpu(base + i, cpu_core_mask(cpu));
         }
-        l2_cache = cpu_to_l2cache(cpu);
-        for_each_online_cpu(i) {
-                struct device_node *np = cpu_to_l2cache(i);
-                if (!np)
-                        continue;
-                if (np == l2_cache) {
-                        cpumask_set_cpu(cpu, cpu_core_mask(i));
-                        cpumask_set_cpu(i, cpu_core_mask(cpu));
-                }
-                of_node_put(np);
-        }
-        of_node_put(l2_cache);
+        traverse_core_siblings(cpu, true);
 
         smp_wmb();
         notify_cpu_starting(cpu);
@@ -719,7 +813,6 @@ int arch_sd_sibling_asym_packing(void)
 #ifdef CONFIG_HOTPLUG_CPU
 int __cpu_disable(void)
 {
-        struct device_node *l2_cache;
         int cpu = smp_processor_id();
         int base, i;
         int err;
@@ -739,20 +832,7 @@ int __cpu_disable(void)
                 cpumask_clear_cpu(cpu, cpu_core_mask(base + i));
                 cpumask_clear_cpu(base + i, cpu_core_mask(cpu));
         }
-
-        l2_cache = cpu_to_l2cache(cpu);
-        for_each_present_cpu(i) {
-                struct device_node *np = cpu_to_l2cache(i);
-                if (!np)
-                        continue;
-                if (np == l2_cache) {
-                        cpumask_clear_cpu(cpu, cpu_core_mask(i));
-                        cpumask_clear_cpu(i, cpu_core_mask(cpu));
-                }
-                of_node_put(np);
-        }
-        of_node_put(l2_cache);
-
+        traverse_core_siblings(cpu, false);
 
         return 0;
 }
diff --git a/arch/powerpc/kernel/softemu8xx.c b/arch/powerpc/kernel/softemu8xx.c
deleted file mode 100644
index 29b2f81dd709..000000000000
--- a/arch/powerpc/kernel/softemu8xx.c
+++ /dev/null
@@ -1,199 +0,0 @@
-/*
- * Software emulation of some PPC instructions for the 8xx core.
- *
- * Copyright (C) 1998 Dan Malek (dmalek@jlc.net)
- *
- * Software floating emuation for the MPC8xx processor.  I did this mostly
- * because it was easier than trying to get the libraries compiled for
- * software floating point.  The goal is still to get the libraries done,
- * but I lost patience and needed some hacks to at least get init and
- * shells running.  The first problem is the setjmp/longjmp that save
- * and restore the floating point registers.
- *
- * For this emulation, our working registers are found on the register
- * save area.
- */
-
-#include <linux/errno.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/stddef.h>
-#include <linux/unistd.h>
-#include <linux/ptrace.h>
-#include <linux/user.h>
-#include <linux/interrupt.h>
-
-#include <asm/pgtable.h>
-#include <asm/uaccess.h>
-#include <asm/io.h>
-
-/* Eventually we may need a look-up table, but this works for now.
-*/
-#define LFS     48
-#define LFD     50
-#define LFDU    51
-#define STFD    54
-#define STFDU   55
-#define FMR     63
-
-void print_8xx_pte(struct mm_struct *mm, unsigned long addr)
-{
-        pgd_t *pgd;
-        pmd_t *pmd;
-        pte_t *pte;
-
-        printk(" pte @ 0x%8lx: ", addr);
-        pgd = pgd_offset(mm, addr & PAGE_MASK);
-        if (pgd) {
-                pmd = pmd_offset(pud_offset(pgd, addr & PAGE_MASK),
-                                 addr & PAGE_MASK);
-                if (pmd && pmd_present(*pmd)) {
-                        pte = pte_offset_kernel(pmd, addr & PAGE_MASK);
-                        if (pte) {
-                                printk(" (0x%08lx)->(0x%08lx)->0x%08lx\n",
-                                        (long)pgd, (long)pte, (long)pte_val(*pte));
-#define pp ((long)pte_val(*pte))
-                                printk(" RPN: %05lx PP: %lx SPS: %lx SH: %lx "
-                                       "CI: %lx v: %lx\n",
-                                       pp>>12,    /* rpn */
-                                       (pp>>10)&3, /* pp */
-                                       (pp>>3)&1, /* small */
-                                       (pp>>2)&1, /* shared */
-                                       (pp>>1)&1, /* cache inhibit */
-                                       pp&1       /* valid */
-                                       );
-#undef pp
-                        }
-                        else {
-                                printk("no pte\n");
-                        }
-                }
-                else {
-                        printk("no pmd\n");
-                }
-        }
-        else {
-                printk("no pgd\n");
-        }
-}
-
-int get_8xx_pte(struct mm_struct *mm, unsigned long addr)
-{
-        pgd_t *pgd;
-        pmd_t *pmd;
-        pte_t *pte;
-        int retval = 0;
-
-        pgd = pgd_offset(mm, addr & PAGE_MASK);
-        if (pgd) {
-                pmd = pmd_offset(pud_offset(pgd, addr & PAGE_MASK),
-                                 addr & PAGE_MASK);
-                if (pmd && pmd_present(*pmd)) {
-                        pte = pte_offset_kernel(pmd, addr & PAGE_MASK);
-                        if (pte) {
-                                retval = (int)pte_val(*pte);
-                        }
-                }
-        }
-        return retval;
-}
-
-/*
- * We return 0 on success, 1 on unimplemented instruction, and EFAULT
- * if a load/store faulted.
- */
-int Soft_emulate_8xx(struct pt_regs *regs)
-{
-        u32 inst, instword;
-        u32 flreg, idxreg, disp;
-        int retval;
-        s16 sdisp;
-        u32 *ea, *ip;
-
-        retval = 0;
-
-        instword = *((u32 *)regs->nip);
-        inst = instword >> 26;
-
-        flreg = (instword >> 21) & 0x1f;
-        idxreg = (instword >> 16) & 0x1f;
-        disp = instword & 0xffff;
-
-        ea = (u32 *)(regs->gpr[idxreg] + disp);
-        ip = (u32 *)&current->thread.TS_FPR(flreg);
-
-        switch ( inst )
-        {
-        case LFD:
-                /* this is a 16 bit quantity that is sign extended
-                 * so use a signed short here -- Cort
-                 */
-                sdisp = (instword & 0xffff);
-                ea = (u32 *)(regs->gpr[idxreg] + sdisp);
-                if (copy_from_user(ip, ea, sizeof(double)))
-                        retval = -EFAULT;
-                break;
-
-        case LFDU:
-                if (copy_from_user(ip, ea, sizeof(double)))
-                        retval = -EFAULT;
-                else
-                        regs->gpr[idxreg] = (u32)ea;
-                break;
-        case LFS:
-                sdisp = (instword & 0xffff);
-                ea = (u32 *)(regs->gpr[idxreg] + sdisp);
-                if (copy_from_user(ip, ea, sizeof(float)))
-                        retval = -EFAULT;
-                break;
-        case STFD:
-                /* this is a 16 bit quantity that is sign extended
-                 * so use a signed short here -- Cort
-                 */
-                sdisp = (instword & 0xffff);
-                ea = (u32 *)(regs->gpr[idxreg] + sdisp);
-                if (copy_to_user(ea, ip, sizeof(double)))
-                        retval = -EFAULT;
-                break;
-
-        case STFDU:
-                if (copy_to_user(ea, ip, sizeof(double)))
-                        retval = -EFAULT;
-                else
-                        regs->gpr[idxreg] = (u32)ea;
-                break;
-        case FMR:
-                /* assume this is a fp move -- Cort */
-                memcpy(ip, &current->thread.TS_FPR((instword>>11)&0x1f),
-                       sizeof(double));
-                break;
-        default:
-                retval = 1;
-                printk("Bad emulation %s/%d\n"
-                       " NIP: %08lx instruction: %08x opcode: %x "
-                       "A: %x B: %x C: %x code: %x rc: %x\n",
-                       current->comm,current->pid,
-                       regs->nip,
-                       instword,inst,
-                       (instword>>16)&0x1f,
-                       (instword>>11)&0x1f,
-                       (instword>>6)&0x1f,
-                       (instword>>1)&0x3ff,
-                       instword&1);
-                {
-                        int pa;
-                        print_8xx_pte(current->mm,regs->nip);
-                        pa = get_8xx_pte(current->mm,regs->nip) & PAGE_MASK;
-                        pa |= (regs->nip & ~PAGE_MASK);
-                        pa = (unsigned long)__va(pa);
-                        printk("Kernel VA for NIP %x ", pa);
-                        print_8xx_pte(current->mm,pa);
-                }
-        }
-
-        if (retval == 0)
-                regs->nip += 4;
-
-        return retval;
-}
diff --git a/arch/powerpc/kernel/swsusp_asm64.S b/arch/powerpc/kernel/swsusp_asm64.S
index 86ac1d90d02b..22045984835f 100644
--- a/arch/powerpc/kernel/swsusp_asm64.S
+++ b/arch/powerpc/kernel/swsusp_asm64.S
@@ -46,10 +46,19 @@
 #define SL_r29          0xe8
 #define SL_r30          0xf0
 #define SL_r31          0xf8
-#define SL_SIZE         SL_r31+8
+#define SL_SPRG1        0x100
+#define SL_TCR          0x108
+#define SL_SIZE         SL_TCR+8
 
 /* these macros rely on the save area being
  * pointed to by r11 */
+
+#define SAVE_SPR(register)              \
+        mfspr   r0, SPRN_##register     ;\
+        std     r0, SL_##register(r11)
+#define RESTORE_SPR(register)           \
+        ld      r0, SL_##register(r11)  ;\
+        mtspr   SPRN_##register, r0
 #define SAVE_SPECIAL(special)           \
         mf##special     r0              ;\
         std     r0, SL_##special(r11)
@@ -103,8 +112,15 @@ _GLOBAL(swsusp_arch_suspend)
         SAVE_REGISTER(r30)
         SAVE_REGISTER(r31)
         SAVE_SPECIAL(MSR)
-        SAVE_SPECIAL(SDR1)
         SAVE_SPECIAL(XER)
+#ifdef CONFIG_PPC_BOOK3S_64
+        SAVE_SPECIAL(SDR1)
+#else
+        SAVE_SPR(TCR)
+
+        /* Save SPRG1, SPRG1 be used save paca */
+        SAVE_SPR(SPRG1)
+#endif
 
         /* we push the stack up 128 bytes but don't store the
          * stack pointer on the stack like a real stackframe */
@@ -151,6 +167,7 @@ copy_page_loop:
         bne+    copyloop
 nothing_to_copy:
 
+#ifdef CONFIG_PPC_BOOK3S_64
         /* flush caches */
         lis     r3, 0x10
         mtctr   r3
@@ -167,6 +184,7 @@ nothing_to_copy:
         sync
 
         tlbia
+#endif
 
         ld      r11,swsusp_save_area_ptr@toc(r2)
 
@@ -208,16 +226,39 @@ nothing_to_copy:
         RESTORE_REGISTER(r29)
         RESTORE_REGISTER(r30)
         RESTORE_REGISTER(r31)
+
+#ifdef CONFIG_PPC_BOOK3S_64
         /* can't use RESTORE_SPECIAL(MSR) */
         ld      r0, SL_MSR(r11)
         mtmsrd  r0, 0
         RESTORE_SPECIAL(SDR1)
+#else
+        /* Restore SPRG1, be used to save paca */
+        ld      r0, SL_SPRG1(r11)
+        mtsprg  1, r0
+
+        RESTORE_SPECIAL(MSR)
+
+        /* Restore TCR and clear any pending bits in TSR. */
+        RESTORE_SPR(TCR)
+        lis     r0, (TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS)@h
+        mtspr   SPRN_TSR, r0
+
+        /* Kick decrementer */
+        li      r0, 1
+        mtdec   r0
+
+        /* Invalidate all tlbs */
+        bl      _tlbil_all
+#endif
         RESTORE_SPECIAL(XER)
 
         sync
 
         addi    r1,r1,-128
+#ifdef CONFIG_PPC_BOOK3S_64
         bl      slb_flush_and_rebolt
+#endif
         bl      do_after_copyback
         addi    r1,r1,128
 
diff --git a/arch/powerpc/kernel/swsusp_booke.S b/arch/powerpc/kernel/swsusp_booke.S
index 11a39307dd71..0f204053e5b5 100644
--- a/arch/powerpc/kernel/swsusp_booke.S
+++ b/arch/powerpc/kernel/swsusp_booke.S
@@ -141,6 +141,14 @@ _GLOBAL(swsusp_arch_resume)
         lis     r11,swsusp_save_area@h
         ori     r11,r11,swsusp_save_area@l
 
+        /*
+         * Mappings from virtual addresses to physical addresses may be
+         * different than they were prior to restoring hibernation state. 
+         * Invalidate the TLB so that the boot CPU is using the new
+         * mappings.
+         */
+        bl      _tlbil_all
+
         lwz     r4,SL_SPRG0(r11)
         mtsprg  0,r4
         lwz     r4,SL_SPRG1(r11)
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index cdcc156865ef..192b051df97e 100644
--- a/arch/powerpc/kernel/time.c
+++ b/arch/powerpc/kernel/time.c
@@ -210,18 +210,18 @@ static u64 scan_dispatch_log(u64 stop_tb)
         if (!dtl)
                 return 0;
 
-        if (i == vpa->dtl_idx)
+        if (i == be64_to_cpu(vpa->dtl_idx))
                 return 0;
-        while (i < vpa->dtl_idx) {
+        while (i < be64_to_cpu(vpa->dtl_idx)) {
                 if (dtl_consumer)
                         dtl_consumer(dtl, i);
-                dtb = dtl->timebase;
-                tb_delta = dtl->enqueue_to_dispatch_time +
-                        dtl->ready_to_enqueue_time;
+                dtb = be64_to_cpu(dtl->timebase);
+                tb_delta = be32_to_cpu(dtl->enqueue_to_dispatch_time) +
+                        be32_to_cpu(dtl->ready_to_enqueue_time);
                 barrier();
-                if (i + N_DISPATCH_LOG < vpa->dtl_idx) {
+                if (i + N_DISPATCH_LOG < be64_to_cpu(vpa->dtl_idx)) {
                         /* buffer has overflowed */
-                        i = vpa->dtl_idx - N_DISPATCH_LOG;
+                        i = be64_to_cpu(vpa->dtl_idx) - N_DISPATCH_LOG;
                         dtl = local_paca->dispatch_log + (i % N_DISPATCH_LOG);
                         continue;
                 }
@@ -269,7 +269,7 @@ static inline u64 calculate_stolen_time(u64 stop_tb)
 {
         u64 stolen = 0;
 
-        if (get_paca()->dtl_ridx != get_paca()->lppaca_ptr->dtl_idx) {
+        if (get_paca()->dtl_ridx != be64_to_cpu(get_lppaca()->dtl_idx)) {
                 stolen = scan_dispatch_log(stop_tb);
                 get_paca()->system_time -= stolen;
         }
@@ -612,7 +612,7 @@ unsigned long long sched_clock(void)
 static int __init get_freq(char *name, int cells, unsigned long *val)
 {
         struct device_node *cpu;
-        const unsigned int *fp;
+        const __be32 *fp;
         int found = 0;
 
         /* The cpu node should have timebase and clock frequency properties */
diff --git a/arch/powerpc/kernel/tm.S b/arch/powerpc/kernel/tm.S
index 0554d1f6d70d..7b60b9851469 100644
--- a/arch/powerpc/kernel/tm.S
+++ b/arch/powerpc/kernel/tm.S
@@ -155,10 +155,10 @@ _GLOBAL(tm_reclaim)
         mfvscr  vr0
         li      r6, THREAD_TRANSACT_VSCR
         stvx    vr0, r3, r6
+dont_backup_vec:
         mfspr   r0, SPRN_VRSAVE
         std     r0, THREAD_TRANSACT_VRSAVE(r3)
 
-dont_backup_vec:
         andi.   r0, r4, MSR_FP
         beq     dont_backup_fp
 
@@ -341,11 +341,11 @@ _GLOBAL(tm_recheckpoint)
         lvx     vr0, r3, r5
         mtvscr  vr0
         REST_32VRS(0, r5, r3)                   /* r5 scratch, r3 THREAD ptr */
+dont_restore_vec:
         ld      r5, THREAD_VRSAVE(r3)
         mtspr   SPRN_VRSAVE, r5
 #endif
 
-dont_restore_vec:
         andi.   r0, r4, MSR_FP
         beq     dont_restore_fp
 
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index e435bc089ea3..f783c932faeb 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -60,6 +60,7 @@
 #include <asm/switch_to.h>
 #include <asm/tm.h>
 #include <asm/debug.h>
+#include <sysdev/fsl_pci.h>
 
 #if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC)
 int (*__debugger)(struct pt_regs *regs) __read_mostly;
@@ -565,6 +566,8 @@ int machine_check_e500(struct pt_regs *regs)
         if (reason & MCSR_BUS_RBERR) {
                 if (fsl_rio_mcheck_exception(regs))
                         return 1;
+                if (fsl_pci_mcheck_exception(regs))
+                        return 1;
         }
 
         printk("Machine check in kernel mode.\n");
@@ -962,7 +965,7 @@ static int emulate_instruction(struct pt_regs *regs)
         u32 instword;
         u32 rd;
 
-        if (!user_mode(regs) || (regs->msr & MSR_LE))
+        if (!user_mode(regs))
                 return -EINVAL;
         CHECK_FULL_REGS(regs);
 
@@ -1050,11 +1053,41 @@ int is_valid_bugaddr(unsigned long addr)
         return is_kernel_addr(addr);
 }
 
+#ifdef CONFIG_MATH_EMULATION
+static int emulate_math(struct pt_regs *regs)
+{
+        int ret;
+        extern int do_mathemu(struct pt_regs *regs);
+
+        ret = do_mathemu(regs);
+        if (ret >= 0)
+                PPC_WARN_EMULATED(math, regs);
+
+        switch (ret) {
+        case 0:
+                emulate_single_step(regs);
+                return 0;
+        case 1: {
+                        int code = 0;
+                        code = __parse_fpscr(current->thread.fpscr.val);
+                        _exception(SIGFPE, regs, code, regs->nip);
+                        return 0;
+                }
+        case -EFAULT:
+                _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip);
+                return 0;
+        }
+
+        return -1;
+}
+#else
+static inline int emulate_math(struct pt_regs *regs) { return -1; }
+#endif
+
 void __kprobes program_check_exception(struct pt_regs *regs)
 {
         enum ctx_state prev_state = exception_enter();
         unsigned int reason = get_reason(regs);
-        extern int do_mathemu(struct pt_regs *regs);
 
         /* We can now get here via a FP Unavailable exception if the core
          * has no FPU, in that case the reason flags will be 0 */
@@ -1116,11 +1149,20 @@ void __kprobes program_check_exception(struct pt_regs *regs)
         }
 #endif
 
+        /*
+         * If we took the program check in the kernel skip down to sending a
+         * SIGILL. The subsequent cases all relate to emulating instructions
+         * which we should only do for userspace. We also do not want to enable
+         * interrupts for kernel faults because that might lead to further
+         * faults, and loose the context of the original exception.
+         */
+        if (!user_mode(regs))
+                goto sigill;
+
         /* We restore the interrupt state now */
         if (!arch_irq_disabled_regs(regs))
                 local_irq_enable();
 
-#ifdef CONFIG_MATH_EMULATION
         /* (reason & REASON_ILLEGAL) would be the obvious thing here,
          * but there seems to be a hardware bug on the 405GP (RevD)
          * that means ESR is sometimes set incorrectly - either to
@@ -1129,31 +1171,8 @@ void __kprobes program_check_exception(struct pt_regs *regs)
          * instruction or only on FP instructions, whether there is a
          * pattern to occurrences etc. -dgibson 31/Mar/2003
          */
-
-        /*
-         * If we support a HW FPU, we need to ensure the FP state
-         * if flushed into the thread_struct before attempting
-         * emulation
-         */
-#ifdef CONFIG_PPC_FPU
-        flush_fp_to_thread(current);
-#endif
-        switch (do_mathemu(regs)) {
-        case 0:
-                emulate_single_step(regs);
-                goto bail;
-        case 1: {
-                        int code = 0;
-                        code = __parse_fpscr(current->thread.fpscr.val);
-                        _exception(SIGFPE, regs, code, regs->nip);
-                        goto bail;
-                }
-        case -EFAULT:
-                _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip);
+        if (!emulate_math(regs))
                 goto bail;
-        }
-        /* fall through on any other errors */
-#endif /* CONFIG_MATH_EMULATION */
 
         /* Try to emulate it if we should. */
         if (reason & (REASON_ILLEGAL | REASON_PRIVILEGED)) {
@@ -1168,6 +1187,7 @@ void __kprobes program_check_exception(struct pt_regs *regs)
                 }
         }
 
+sigill:
         if (reason & REASON_PRIVILEGED)
                 _exception(SIGILL, regs, ILL_PRVOPC, regs->nip);
         else
@@ -1322,13 +1342,10 @@ void facility_unavailable_exception(struct pt_regs *regs)
         if (status == FSCR_DSCR_LG) {
                 /* User is acessing the DSCR.  Set the inherit bit and allow
                  * the user to set it directly in future by setting via the
-                 * H/FSCR DSCR bit.
+                 * FSCR DSCR bit.  We always leave HFSCR DSCR set.
                  */
                 current->thread.dscr_inherit = 1;
-                if (hv)
-                        mtspr(SPRN_HFSCR, value | HFSCR_DSCR);
-                else
-                        mtspr(SPRN_FSCR,  value | FSCR_DSCR);
+                mtspr(SPRN_FSCR, value | FSCR_DSCR);
                 return;
         }
 
@@ -1444,11 +1461,6 @@ void performance_monitor_exception(struct pt_regs *regs)
 #ifdef CONFIG_8xx
 void SoftwareEmulation(struct pt_regs *regs)
 {
-        extern int do_mathemu(struct pt_regs *);
-#if defined(CONFIG_MATH_EMULATION)
-        int errcode;
-#endif
-
         CHECK_FULL_REGS(regs);
 
         if (!user_mode(regs)) {
@@ -1456,31 +1468,10 @@ void SoftwareEmulation(struct pt_regs *regs)
                 die("Kernel Mode Software FPU Emulation", regs, SIGFPE);
         }
 
-#ifdef CONFIG_MATH_EMULATION
-        errcode = do_mathemu(regs);
-        if (errcode >= 0)
-                PPC_WARN_EMULATED(math, regs);
-
-        switch (errcode) {
-        case 0:
-                emulate_single_step(regs);
+        if (!emulate_math(regs))
                 return;
-        case 1: {
-                        int code = 0;
-                        code = __parse_fpscr(current->thread.fpscr.val);
-                        _exception(SIGFPE, regs, code, regs->nip);
-                        return;
-                }
-        case -EFAULT:
-                _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip);
-                return;
-        default:
-                _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
-                return;
-        }
-#else
+
         _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
-#endif
 }
 #endif /* CONFIG_8xx */
 
diff --git a/arch/powerpc/kernel/udbg_16550.c b/arch/powerpc/kernel/udbg_16550.c
index 6837f839ab78..75702e207b29 100644
--- a/arch/powerpc/kernel/udbg_16550.c
+++ b/arch/powerpc/kernel/udbg_16550.c
@@ -18,23 +18,19 @@ extern void real_writeb(u8 data, volatile u8 __iomem *addr);
 extern u8 real_205_readb(volatile u8 __iomem  *addr);
 extern void real_205_writeb(u8 data, volatile u8 __iomem *addr);
 
-struct NS16550 {
-        /* this struct must be packed */
-        unsigned char rbr;  /* 0 */
-        unsigned char ier;  /* 1 */
-        unsigned char fcr;  /* 2 */
-        unsigned char lcr;  /* 3 */
-        unsigned char mcr;  /* 4 */
-        unsigned char lsr;  /* 5 */
-        unsigned char msr;  /* 6 */
-        unsigned char scr;  /* 7 */
-};
-
-#define thr rbr
-#define iir fcr
-#define dll rbr
-#define dlm ier
-#define dlab lcr
+#define UART_RBR        0
+#define UART_IER        1
+#define UART_FCR        2
+#define UART_LCR        3
+#define UART_MCR        4
+#define UART_LSR        5
+#define UART_MSR        6
+#define UART_SCR        7
+#define UART_THR        UART_RBR
+#define UART_IIR        UART_FCR
+#define UART_DLL        UART_RBR
+#define UART_DLM        UART_IER
+#define UART_DLAB       UART_LCR
 
 #define LSR_DR   0x01  /* Data ready */
 #define LSR_OE   0x02  /* Overrun */
@@ -47,52 +43,62 @@ struct NS16550 {
 
 #define LCR_DLAB 0x80
 
-static struct NS16550 __iomem *udbg_comport;
+static u8 (*udbg_uart_in)(unsigned int reg);
+static void (*udbg_uart_out)(unsigned int reg, u8 data);
 
-static void udbg_550_flush(void)
+static void udbg_uart_flush(void)
 {
-        if (udbg_comport) {
-                while ((in_8(&udbg_comport->lsr) & LSR_THRE) == 0)
-                        /* wait for idle */;
-        }
+        if (!udbg_uart_in)
+                return;
+
+        /* wait for idle */
+        while ((udbg_uart_in(UART_LSR) & LSR_THRE) == 0)
+                cpu_relax();
 }
 
-static void udbg_550_putc(char c)
+static void udbg_uart_putc(char c)
 {
-        if (udbg_comport) {
-                if (c == '\n')
-                        udbg_550_putc('\r');
-                udbg_550_flush();
-                out_8(&udbg_comport->thr, c);
-        }
+        if (!udbg_uart_out)
+                return;
+
+        if (c == '\n')
+                udbg_uart_putc('\r');
+        udbg_uart_flush();
+        udbg_uart_out(UART_THR, c);
 }
 
-static int udbg_550_getc_poll(void)
+static int udbg_uart_getc_poll(void)
 {
-        if (udbg_comport) {
-                if ((in_8(&udbg_comport->lsr) & LSR_DR) != 0)
-                        return in_8(&udbg_comport->rbr);
-                else
-                        return -1;
-        }
+        if (!udbg_uart_in || !(udbg_uart_in(UART_LSR) & LSR_DR))
+                return udbg_uart_in(UART_RBR);
         return -1;
 }
 
-static int udbg_550_getc(void)
+static int udbg_uart_getc(void)
 {
-        if (udbg_comport) {
-                while ((in_8(&udbg_comport->lsr) & LSR_DR) == 0)
-                        /* wait for char */;
-                return in_8(&udbg_comport->rbr);
-        }
-        return -1;
+        if (!udbg_uart_in)
+                return -1;
+        /* wait for char */
+        while (!(udbg_uart_in(UART_LSR) & LSR_DR))
+                cpu_relax();
+        return udbg_uart_in(UART_RBR);
+}
+
+static void udbg_use_uart(void)
+{
+        udbg_putc = udbg_uart_putc;
+        udbg_flush = udbg_uart_flush;
+        udbg_getc = udbg_uart_getc;
+        udbg_getc_poll = udbg_uart_getc_poll;
 }
 
-void udbg_init_uart(void __iomem *comport, unsigned int speed,
-                    unsigned int clock)
+void udbg_uart_setup(unsigned int speed, unsigned int clock)
 {
         unsigned int dll, base_bauds;
 
+        if (!udbg_uart_out)
+                return;
+
         if (clock == 0)
                 clock = 1843200;
         if (speed == 0)
@@ -101,51 +107,43 @@ void udbg_init_uart(void __iomem *comport, unsigned int speed,
         base_bauds = clock / 16;
         dll = base_bauds / speed;
 
-        if (comport) {
-                udbg_comport = (struct NS16550 __iomem *)comport;
-                out_8(&udbg_comport->lcr, 0x00);
-                out_8(&udbg_comport->ier, 0xff);
-                out_8(&udbg_comport->ier, 0x00);
-                out_8(&udbg_comport->lcr, LCR_DLAB);
-                out_8(&udbg_comport->dll, dll & 0xff);
-                out_8(&udbg_comport->dlm, dll >> 8);
-                /* 8 data, 1 stop, no parity */
-                out_8(&udbg_comport->lcr, 0x03);
-                /* RTS/DTR */
-                out_8(&udbg_comport->mcr, 0x03);
-                /* Clear & enable FIFOs */
-                out_8(&udbg_comport->fcr ,0x07);
-                udbg_putc = udbg_550_putc;
-                udbg_flush = udbg_550_flush;
-                udbg_getc = udbg_550_getc;
-                udbg_getc_poll = udbg_550_getc_poll;
-        }
+        udbg_uart_out(UART_LCR, 0x00);
+        udbg_uart_out(UART_IER, 0xff);
+        udbg_uart_out(UART_IER, 0x00);
+        udbg_uart_out(UART_LCR, LCR_DLAB);
+        udbg_uart_out(UART_DLL, dll & 0xff);
+        udbg_uart_out(UART_DLM, dll >> 8);
+        /* 8 data, 1 stop, no parity */
+        udbg_uart_out(UART_LCR, 0x3);
+        /* RTS/DTR */
+        udbg_uart_out(UART_MCR, 0x3);
+        /* Clear & enable FIFOs */
+        udbg_uart_out(UART_FCR, 0x7);
 }
 
-unsigned int udbg_probe_uart_speed(void __iomem *comport, unsigned int clock)
+unsigned int udbg_probe_uart_speed(unsigned int clock)
 {
         unsigned int dll, dlm, divisor, prescaler, speed;
         u8 old_lcr;
-        struct NS16550 __iomem *port = comport;
 
-        old_lcr = in_8(&port->lcr);
+        old_lcr = udbg_uart_in(UART_LCR);
 
         /* select divisor latch registers.  */
-        out_8(&port->lcr, LCR_DLAB);
+        udbg_uart_out(UART_LCR, old_lcr | LCR_DLAB);
 
         /* now, read the divisor */
-        dll = in_8(&port->dll);
-        dlm = in_8(&port->dlm);
+        dll = udbg_uart_in(UART_DLL);
+        dlm = udbg_uart_in(UART_DLM);
         divisor = dlm << 8 | dll;
 
         /* check prescaling */
-        if (in_8(&port->mcr) & 0x80)
+        if (udbg_uart_in(UART_MCR) & 0x80)
                 prescaler = 4;
         else
                 prescaler = 1;
 
         /* restore the LCR */
-        out_8(&port->lcr, old_lcr);
+        udbg_uart_out(UART_LCR, old_lcr);
 
         /* calculate speed */
         speed = (clock / prescaler) / (divisor * 16);
@@ -157,195 +155,155 @@ unsigned int udbg_probe_uart_speed(void __iomem *comport, unsigned int clock)
         return speed;
 }
 
-#ifdef CONFIG_PPC_MAPLE
-void udbg_maple_real_flush(void)
+static union {
+        unsigned char __iomem *mmio_base;
+        unsigned long pio_base;
+} udbg_uart;
+
+static unsigned int udbg_uart_stride = 1;
+
+static u8 udbg_uart_in_pio(unsigned int reg)
 {
-        if (udbg_comport) {
-                while ((real_readb(&udbg_comport->lsr) & LSR_THRE) == 0)
-                        /* wait for idle */;
-        }
+        return inb(udbg_uart.pio_base + (reg * udbg_uart_stride));
 }
 
-void udbg_maple_real_putc(char c)
+static void udbg_uart_out_pio(unsigned int reg, u8 data)
 {
-        if (udbg_comport) {
-                if (c == '\n')
-                        udbg_maple_real_putc('\r');
-                udbg_maple_real_flush();
-                real_writeb(c, &udbg_comport->thr); eieio();
-        }
+        outb(data, udbg_uart.pio_base + (reg * udbg_uart_stride));
 }
 
-void __init udbg_init_maple_realmode(void)
+void udbg_uart_init_pio(unsigned long port, unsigned int stride)
 {
-        udbg_comport = (struct NS16550 __iomem *)0xf40003f8;
-
-        udbg_putc = udbg_maple_real_putc;
-        udbg_flush = udbg_maple_real_flush;
-        udbg_getc = NULL;
-        udbg_getc_poll = NULL;
+        if (!port)
+                return;
+        udbg_uart.pio_base = port;
+        udbg_uart_stride = stride;
+        udbg_uart_in = udbg_uart_in_pio;
+        udbg_uart_out = udbg_uart_out_pio;
+        udbg_use_uart();
 }
-#endif /* CONFIG_PPC_MAPLE */
 
-#ifdef CONFIG_PPC_PASEMI
-void udbg_pas_real_flush(void)
+static u8 udbg_uart_in_mmio(unsigned int reg)
 {
-        if (udbg_comport) {
-                while ((real_205_readb(&udbg_comport->lsr) & LSR_THRE) == 0)
-                        /* wait for idle */;
-        }
+        return in_8(udbg_uart.mmio_base + (reg * udbg_uart_stride));
 }
 
-void udbg_pas_real_putc(char c)
+static void udbg_uart_out_mmio(unsigned int reg, u8 data)
 {
-        if (udbg_comport) {
-                if (c == '\n')
-                        udbg_pas_real_putc('\r');
-                udbg_pas_real_flush();
-                real_205_writeb(c, &udbg_comport->thr); eieio();
-        }
+        out_8(udbg_uart.mmio_base + (reg * udbg_uart_stride), data);
 }
 
-void udbg_init_pas_realmode(void)
-{
-        udbg_comport = (struct NS16550 __iomem *)0xfcff03f8UL;
 
-        udbg_putc = udbg_pas_real_putc;
-        udbg_flush = udbg_pas_real_flush;
-        udbg_getc = NULL;
-        udbg_getc_poll = NULL;
+void udbg_uart_init_mmio(void __iomem *addr, unsigned int stride)
+{
+        if (!addr)
+                return;
+        udbg_uart.mmio_base = addr;
+        udbg_uart_stride = stride;
+        udbg_uart_in = udbg_uart_in_mmio;
+        udbg_uart_out = udbg_uart_out_mmio;
+        udbg_use_uart();
 }
-#endif /* CONFIG_PPC_MAPLE */
 
-#ifdef CONFIG_PPC_EARLY_DEBUG_44x
-#include <platforms/44x/44x.h>
+#ifdef CONFIG_PPC_MAPLE
+
+#define UDBG_UART_MAPLE_ADDR    ((void __iomem *)0xf40003f8)
 
-static void udbg_44x_as1_flush(void)
+static u8 udbg_uart_in_maple(unsigned int reg)
 {
-        if (udbg_comport) {
-                while ((as1_readb(&udbg_comport->lsr) & LSR_THRE) == 0)
-                        /* wait for idle */;
-        }
+        return real_readb(UDBG_UART_MAPLE_ADDR + reg);
 }
 
-static void udbg_44x_as1_putc(char c)
+static void udbg_uart_out_maple(unsigned int reg, u8 val)
 {
-        if (udbg_comport) {
-                if (c == '\n')
-                        udbg_44x_as1_putc('\r');
-                udbg_44x_as1_flush();
-                as1_writeb(c, &udbg_comport->thr); eieio();
-        }
+        real_writeb(val, UDBG_UART_MAPLE_ADDR + reg);
 }
 
-static int udbg_44x_as1_getc(void)
+void __init udbg_init_maple_realmode(void)
 {
-        if (udbg_comport) {
-                while ((as1_readb(&udbg_comport->lsr) & LSR_DR) == 0)
-                        ; /* wait for char */
-                return as1_readb(&udbg_comport->rbr);
-        }
-        return -1;
+        udbg_uart_in = udbg_uart_in_maple;
+        udbg_uart_out = udbg_uart_out_maple;
+        udbg_use_uart();
 }
 
-void __init udbg_init_44x_as1(void)
-{
-        udbg_comport =
-                (struct NS16550 __iomem *)PPC44x_EARLY_DEBUG_VIRTADDR;
+#endif /* CONFIG_PPC_MAPLE */
 
-        udbg_putc = udbg_44x_as1_putc;
-        udbg_flush = udbg_44x_as1_flush;
-        udbg_getc = udbg_44x_as1_getc;
-}
-#endif /* CONFIG_PPC_EARLY_DEBUG_44x */
+#ifdef CONFIG_PPC_PASEMI
 
-#ifdef CONFIG_PPC_EARLY_DEBUG_40x
-static void udbg_40x_real_flush(void)
+#define UDBG_UART_PAS_ADDR      ((void __iomem *)0xfcff03f8UL)
+
+static u8 udbg_uart_in_pas(unsigned int reg)
 {
-        if (udbg_comport) {
-                while ((real_readb(&udbg_comport->lsr) & LSR_THRE) == 0)
-                        /* wait for idle */;
-        }
+        return real_205_readb(UDBG_UART_PAS_ADDR + reg);
 }
 
-static void udbg_40x_real_putc(char c)
+static void udbg_uart_out_pas(unsigned int reg, u8 val)
 {
-        if (udbg_comport) {
-                if (c == '\n')
-                        udbg_40x_real_putc('\r');
-                udbg_40x_real_flush();
-                real_writeb(c, &udbg_comport->thr); eieio();
-        }
+        real_205_writeb(val, UDBG_UART_PAS_ADDR + reg);
 }
 
-static int udbg_40x_real_getc(void)
+void __init udbg_init_pas_realmode(void)
 {
-        if (udbg_comport) {
-                while ((real_readb(&udbg_comport->lsr) & LSR_DR) == 0)
-                        ; /* wait for char */
-                return real_readb(&udbg_comport->rbr);
-        }
-        return -1;
+        udbg_uart_in = udbg_uart_in_pas;
+        udbg_uart_out = udbg_uart_out_pas;
+        udbg_use_uart();
 }
 
-void __init udbg_init_40x_realmode(void)
-{
-        udbg_comport = (struct NS16550 __iomem *)
-                CONFIG_PPC_EARLY_DEBUG_40x_PHYSADDR;
+#endif /* CONFIG_PPC_PASEMI */
+
+#ifdef CONFIG_PPC_EARLY_DEBUG_44x
 
-        udbg_putc = udbg_40x_real_putc;
-        udbg_flush = udbg_40x_real_flush;
-        udbg_getc = udbg_40x_real_getc;
-        udbg_getc_poll = NULL;
+#include <platforms/44x/44x.h>
+
+static u8 udbg_uart_in_44x_as1(unsigned int reg)
+{
+        return as1_readb((void __iomem *)PPC44x_EARLY_DEBUG_VIRTADDR + reg);
 }
-#endif /* CONFIG_PPC_EARLY_DEBUG_40x */
 
-#ifdef CONFIG_PPC_EARLY_DEBUG_WSP
-static void udbg_wsp_flush(void)
+static void udbg_uart_out_44x_as1(unsigned int reg, u8 val)
 {
-        if (udbg_comport) {
-                while ((readb(&udbg_comport->lsr) & LSR_THRE) == 0)
-                        /* wait for idle */;
-        }
+        as1_writeb(val, (void __iomem *)PPC44x_EARLY_DEBUG_VIRTADDR + reg);
 }
 
-static void udbg_wsp_putc(char c)
+void __init udbg_init_44x_as1(void)
 {
-        if (udbg_comport) {
-                if (c == '\n')
-                        udbg_wsp_putc('\r');
-                udbg_wsp_flush();
-                writeb(c, &udbg_comport->thr); eieio();
-        }
+        udbg_uart_in = udbg_uart_in_44x_as1;
+        udbg_uart_out = udbg_uart_out_44x_as1;
+        udbg_use_uart();
 }
 
-static int udbg_wsp_getc(void)
+#endif /* CONFIG_PPC_EARLY_DEBUG_44x */
+
+#ifdef CONFIG_PPC_EARLY_DEBUG_40x
+
+static u8 udbg_uart_in_40x(unsigned int reg)
 {
-        if (udbg_comport) {
-                while ((readb(&udbg_comport->lsr) & LSR_DR) == 0)
-                        ; /* wait for char */
-                return readb(&udbg_comport->rbr);
-        }
-        return -1;
+        return real_readb((void __iomem *)CONFIG_PPC_EARLY_DEBUG_40x_PHYSADDR
+                          + reg);
 }
 
-static int udbg_wsp_getc_poll(void)
+static void udbg_uart_out_40x(unsigned int reg, u8 val)
 {
-        if (udbg_comport)
-                if (readb(&udbg_comport->lsr) & LSR_DR)
-                        return readb(&udbg_comport->rbr);
-        return -1;
+        real_writeb(val, (void __iomem *)CONFIG_PPC_EARLY_DEBUG_40x_PHYSADDR
+                    + reg);
 }
 
-void __init udbg_init_wsp(void)
+void __init udbg_init_40x_realmode(void)
 {
-        udbg_comport = (struct NS16550 __iomem *)WSP_UART_VIRT;
+        udbg_uart_in = udbg_uart_in_40x;
+        udbg_uart_out = udbg_uart_out_40x;
+        udbg_use_uart();
+}
 
-        udbg_init_uart(udbg_comport, 57600, 50000000);
+#endif /* CONFIG_PPC_EARLY_DEBUG_40x */
+
+
+#ifdef CONFIG_PPC_EARLY_DEBUG_WSP
 
-        udbg_putc = udbg_wsp_putc;
-        udbg_flush = udbg_wsp_flush;
-        udbg_getc = udbg_wsp_getc;
-        udbg_getc_poll = udbg_wsp_getc_poll;
+void __init udbg_init_wsp(void)
+{
+        udbg_uart_init_mmio((void *)WSP_UART_VIRT, 1);
+        udbg_uart_setup(57600, 50000000);
 }
+
 #endif /* CONFIG_PPC_EARLY_DEBUG_WSP */
diff --git a/arch/powerpc/kernel/vdso32/gettimeofday.S b/arch/powerpc/kernel/vdso32/gettimeofday.S
index 27e2f623210b..6b1f2a6d5517 100644
--- a/arch/powerpc/kernel/vdso32/gettimeofday.S
+++ b/arch/powerpc/kernel/vdso32/gettimeofday.S
@@ -232,9 +232,9 @@ __do_get_tspec:
         lwz     r6,(CFG_TB_ORIG_STAMP+4)(r9)
 
         /* Get a stable TB value */
-2:      mftbu   r3
-        mftbl   r4
-        mftbu   r0
+2:      mfspr   r3, SPRN_TBRU
+        mfspr   r4, SPRN_TBRL
+        mfspr   r0, SPRN_TBRU
         cmplw   cr0,r3,r0
         bne-    2b
 
diff --git a/arch/powerpc/kernel/vio.c b/arch/powerpc/kernel/vio.c
index 536016d792ba..78a350670de3 100644
--- a/arch/powerpc/kernel/vio.c
+++ b/arch/powerpc/kernel/vio.c
@@ -1153,7 +1153,7 @@ EXPORT_SYMBOL(vio_h_cop_sync);
 
 static struct iommu_table *vio_build_iommu_table(struct vio_dev *dev)
 {
-        const unsigned char *dma_window;
+        const __be32 *dma_window;
         struct iommu_table *tbl;
         unsigned long offset, size;
 
@@ -1312,8 +1312,7 @@ struct vio_dev *vio_register_device_node(struct device_node *of_node)
 {
         struct vio_dev *viodev;
         struct device_node *parent_node;
-        const unsigned int *unit_address;
-        const unsigned int *pfo_resid = NULL;
+        const __be32 *prop;
         enum vio_dev_family family;
         const char *of_node_name = of_node->name ? of_node->name : "<unknown>";
 
@@ -1360,6 +1359,8 @@ struct vio_dev *vio_register_device_node(struct device_node *of_node)
         /* we need the 'device_type' property, in order to match with drivers */
         viodev->family = family;
         if (viodev->family == VDEVICE) {
+                unsigned int unit_address;
+
                 if (of_node->type != NULL)
                         viodev->type = of_node->type;
                 else {
@@ -1368,24 +1369,24 @@ struct vio_dev *vio_register_device_node(struct device_node *of_node)
                         goto out;
                 }
 
-                unit_address = of_get_property(of_node, "reg", NULL);
-                if (unit_address == NULL) {
+                prop = of_get_property(of_node, "reg", NULL);
+                if (prop == NULL) {
                         pr_warn("%s: node %s missing 'reg'\n",
                                         __func__, of_node_name);
                         goto out;
                 }
-                dev_set_name(&viodev->dev, "%x", *unit_address);
+                unit_address = of_read_number(prop, 1);
+                dev_set_name(&viodev->dev, "%x", unit_address);
                 viodev->irq = irq_of_parse_and_map(of_node, 0);
-                viodev->unit_address = *unit_address;
+                viodev->unit_address = unit_address;
         } else {
                 /* PFO devices need their resource_id for submitting COP_OPs
                  * This is an optional field for devices, but is required when
                  * performing synchronous ops */
-                pfo_resid = of_get_property(of_node, "ibm,resource-id", NULL);
-                if (pfo_resid != NULL)
-                        viodev->resource_id = *pfo_resid;
+                prop = of_get_property(of_node, "ibm,resource-id", NULL);
+                if (prop != NULL)
+                        viodev->resource_id = of_read_number(prop, 1);
 
-                unit_address = NULL;
                 dev_set_name(&viodev->dev, "%s", of_node_name);
                 viodev->type = of_node_name;
                 viodev->irq = 0;
@@ -1622,7 +1623,6 @@ static struct vio_dev *vio_find_name(const char *name)
  */
 struct vio_dev *vio_find_node(struct device_node *vnode)
 {
-        const uint32_t *unit_address;
         char kobj_name[20];
         struct device_node *vnode_parent;
         const char *dev_type;
@@ -1638,10 +1638,13 @@ struct vio_dev *vio_find_node(struct device_node *vnode)
 
         /* construct the kobject name from the device node */
         if (!strcmp(dev_type, "vdevice")) {
-                unit_address = of_get_property(vnode, "reg", NULL);
-                if (!unit_address)
+                const __be32 *prop;
+                
+                prop = of_get_property(vnode, "reg", NULL);
+                if (!prop)
                         return NULL;
-                snprintf(kobj_name, sizeof(kobj_name), "%x", *unit_address);
+                snprintf(kobj_name, sizeof(kobj_name), "%x",
+                         (uint32_t)of_read_number(prop, 1));
         } else if (!strcmp(dev_type, "ibm,platform-facilities"))
                 snprintf(kobj_name, sizeof(kobj_name), "%s", vnode->name);
         else
diff --git a/arch/powerpc/kvm/book3s_64_slb.S b/arch/powerpc/kvm/book3s_64_slb.S
index 4f0caecc0f9d..4f12e8f0c718 100644
--- a/arch/powerpc/kvm/book3s_64_slb.S
+++ b/arch/powerpc/kvm/book3s_64_slb.S
@@ -17,6 +17,10 @@
  * Authors: Alexander Graf <agraf@suse.de>
  */
 
+#ifdef __LITTLE_ENDIAN__
+#error Need to fix SLB shadow accesses in little endian mode
+#endif
+
 #define SHADOW_SLB_ESID(num)    (SLBSHADOW_SAVEAREA + (num * 0x10))
 #define SHADOW_SLB_VSID(num)    (SLBSHADOW_SAVEAREA + (num * 0x10) + 0x8)
 #define UNBOLT_SLB_ENTRY(num) \
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index b0ee3bc9ca76..62a2b5ab08ed 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -217,7 +217,7 @@ struct kvm_vcpu *kvmppc_find_vcpu(struct kvm *kvm, int id)
 
 static void init_vpa(struct kvm_vcpu *vcpu, struct lppaca *vpa)
 {
-        vpa->shared_proc = 1;
+        vpa->__old_status |= LPPACA_OLD_SHARED_PROC;
         vpa->yield_count = 1;
 }
 
diff --git a/arch/powerpc/kvm/book3s_hv_rm_mmu.c b/arch/powerpc/kvm/book3s_hv_rm_mmu.c
index 45e30d6e462b..9c515440ad1a 100644
--- a/arch/powerpc/kvm/book3s_hv_rm_mmu.c
+++ b/arch/powerpc/kvm/book3s_hv_rm_mmu.c
@@ -363,7 +363,11 @@ long kvmppc_h_enter(struct kvm_vcpu *vcpu, unsigned long flags,
                                  vcpu->arch.pgdir, true, &vcpu->arch.gpr[4]);
 }
 
+#ifdef __BIG_ENDIAN__
 #define LOCK_TOKEN      (*(u32 *)(&get_paca()->lock_token))
+#else
+#define LOCK_TOKEN      (*(u32 *)(&get_paca()->paca_index))
+#endif
 
 static inline int try_lock_tlbie(unsigned int *lock)
 {
diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index 60dce5bfab3f..294b7af28cdd 100644
--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
@@ -29,6 +29,10 @@
 #include <asm/kvm_book3s_asm.h>
 #include <asm/mmu-hash64.h>
 
+#ifdef __LITTLE_ENDIAN__
+#error Need to fix lppaca and SLB shadow accesses in little endian mode
+#endif
+
 /*****************************************************************************
  *                                                                           *
  *        Real Mode handlers that need to be in the linear mapping           *
@@ -389,7 +393,11 @@ toc_tlbie_lock:
         .tc     native_tlbie_lock[TC],native_tlbie_lock
         .previous
         ld      r3,toc_tlbie_lock@toc(2)
+#ifdef __BIG_ENDIAN__
         lwz     r8,PACA_LOCK_TOKEN(r13)
+#else
+        lwz     r8,PACAPACAINDEX(r13)
+#endif
 24:     lwarx   r0,0,r3
         cmpwi   r0,0
         bne     24b
@@ -964,7 +972,11 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201)
 32:     ld      r4,VCPU_KVM(r9)         /* pointer to struct kvm */
 
         /* Take the guest's tlbie_lock */
+#ifdef __BIG_ENDIAN__
         lwz     r8,PACA_LOCK_TOKEN(r13)
+#else
+        lwz     r8,PACAPACAINDEX(r13)
+#endif
         addi    r3,r4,KVM_TLBIE_LOCK
 24:     lwarx   r0,0,r3
         cmpwi   r0,0
diff --git a/arch/powerpc/kvm/emulate.c b/arch/powerpc/kvm/emulate.c
index 2c52ada30775..751cd45f65a0 100644
--- a/arch/powerpc/kvm/emulate.c
+++ b/arch/powerpc/kvm/emulate.c
@@ -30,53 +30,10 @@
 #include <asm/byteorder.h>
 #include <asm/kvm_ppc.h>
 #include <asm/disassemble.h>
+#include <asm/ppc-opcode.h>
 #include "timing.h"
 #include "trace.h"
 
-#define OP_TRAP 3
-#define OP_TRAP_64 2
-
-#define OP_31_XOP_TRAP      4
-#define OP_31_XOP_LWZX      23
-#define OP_31_XOP_DCBST     54
-#define OP_31_XOP_TRAP_64   68
-#define OP_31_XOP_DCBF      86
-#define OP_31_XOP_LBZX      87
-#define OP_31_XOP_STWX      151
-#define OP_31_XOP_STBX      215
-#define OP_31_XOP_LBZUX     119
-#define OP_31_XOP_STBUX     247
-#define OP_31_XOP_LHZX      279
-#define OP_31_XOP_LHZUX     311
-#define OP_31_XOP_MFSPR     339
-#define OP_31_XOP_LHAX      343
-#define OP_31_XOP_STHX      407
-#define OP_31_XOP_STHUX     439
-#define OP_31_XOP_MTSPR     467
-#define OP_31_XOP_DCBI      470
-#define OP_31_XOP_LWBRX     534
-#define OP_31_XOP_TLBSYNC   566
-#define OP_31_XOP_STWBRX    662
-#define OP_31_XOP_LHBRX     790
-#define OP_31_XOP_STHBRX    918
-
-#define OP_LWZ  32
-#define OP_LD   58
-#define OP_LWZU 33
-#define OP_LBZ  34
-#define OP_LBZU 35
-#define OP_STW  36
-#define OP_STWU 37
-#define OP_STD  62
-#define OP_STB  38
-#define OP_STBU 39
-#define OP_LHZ  40
-#define OP_LHZU 41
-#define OP_LHA  42
-#define OP_LHAU 43
-#define OP_STH  44
-#define OP_STHU 45
-
 void kvmppc_emulate_dec(struct kvm_vcpu *vcpu)
 {
         unsigned long dec_nsec;
diff --git a/arch/powerpc/lib/locks.c b/arch/powerpc/lib/locks.c
index bb7cfecf2788..0c9c8d7d0734 100644
--- a/arch/powerpc/lib/locks.c
+++ b/arch/powerpc/lib/locks.c
@@ -32,7 +32,7 @@ void __spin_yield(arch_spinlock_t *lock)
                 return;
         holder_cpu = lock_value & 0xffff;
         BUG_ON(holder_cpu >= NR_CPUS);
-        yield_count = lppaca_of(holder_cpu).yield_count;
+        yield_count = be32_to_cpu(lppaca_of(holder_cpu).yield_count);
         if ((yield_count & 1) == 0)
                 return;         /* virtual cpu is currently running */
         rmb();
@@ -57,7 +57,7 @@ void __rw_yield(arch_rwlock_t *rw)
                 return;         /* no write lock at present */
         holder_cpu = lock_value & 0xffff;
         BUG_ON(holder_cpu >= NR_CPUS);
-        yield_count = lppaca_of(holder_cpu).yield_count;
+        yield_count = be32_to_cpu(lppaca_of(holder_cpu).yield_count);
         if ((yield_count & 1) == 0)
                 return;         /* virtual cpu is currently running */
         rmb();
diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c
index 99c7fc16dc0d..a7ee978fb860 100644
--- a/arch/powerpc/lib/sstep.c
+++ b/arch/powerpc/lib/sstep.c
@@ -100,8 +100,10 @@ static unsigned long __kprobes dform_ea(unsigned int instr, struct pt_regs *regs
         ea = (signed short) instr;              /* sign-extend */
         if (ra) {
                 ea += regs->gpr[ra];
-                if (instr & 0x04000000)         /* update forms */
-                        regs->gpr[ra] = ea;
+                if (instr & 0x04000000) {               /* update forms */
+                        if ((instr>>26) != 47)          /* stmw is not an update form */
+                                regs->gpr[ra] = ea;
+                }
         }
 
         return truncate_if_32bit(regs->msr, ea);
@@ -279,7 +281,7 @@ static int __kprobes write_mem_unaligned(unsigned long val, unsigned long ea,
                 err = write_mem_aligned(val >> (nb - c) * 8, ea, c);
                 if (err)
                         return err;
-                ++ea;
+                ea += c;
         }
         return 0;
 }
diff --git a/arch/powerpc/math-emu/Makefile b/arch/powerpc/math-emu/Makefile
index 8d035d2d42a6..1b46ab4f6417 100644
--- a/arch/powerpc/math-emu/Makefile
+++ b/arch/powerpc/math-emu/Makefile
@@ -1,15 +1,15 @@
-
-obj-$(CONFIG_MATH_EMULATION)    += fabs.o fadd.o fadds.o fcmpo.o fcmpu.o \
-                                        fctiw.o fctiwz.o fdiv.o fdivs.o \
-                                        fmadd.o fmadds.o fmsub.o fmsubs.o \
-                                        fmul.o fmuls.o fnabs.o fneg.o \
-                                        fnmadd.o fnmadds.o fnmsub.o fnmsubs.o \
-                                        fres.o fre.o frsp.o fsel.o lfs.o \
-                                        frsqrte.o frsqrtes.o \
-                                        fsqrt.o fsqrts.o fsub.o fsubs.o \
-                                        mcrfs.o mffs.o mtfsb0.o mtfsb1.o \
-                                        mtfsf.o mtfsfi.o stfiwx.o stfs.o \
-                                        math.o fmr.o lfd.o stfd.o
+math-emu-common-objs = math.o fre.o fsqrt.o fsqrts.o frsqrtes.o mtfsf.o mtfsfi.o
+obj-$(CONFIG_MATH_EMULATION_HW_UNIMPLEMENTED) += $(math-emu-common-objs)
+obj-$(CONFIG_MATH_EMULATION_FULL) += $(math-emu-common-objs) fabs.o fadd.o \
+                                        fadds.o fcmpo.o fcmpu.o fctiw.o \
+                                        fctiwz.o fdiv.o fdivs.o  fmadd.o \
+                                        fmadds.o fmsub.o fmsubs.o fmul.o \
+                                        fmuls.o fnabs.o fneg.o fnmadd.o \
+                                        fnmadds.o fnmsub.o fnmsubs.o fres.o \
+                                        frsp.o fsel.o lfs.o frsqrte.o fsub.o \
+                                        fsubs.o  mcrfs.o mffs.o mtfsb0.o \
+                                        mtfsb1.o stfiwx.o stfs.o math.o \
+                                        fmr.o lfd.o stfd.o
 
 obj-$(CONFIG_SPE)               += math_efp.o
 
diff --git a/arch/powerpc/math-emu/math.c b/arch/powerpc/math-emu/math.c
index 0328e66e0799..ab151f040502 100644
--- a/arch/powerpc/math-emu/math.c
+++ b/arch/powerpc/math-emu/math.c
@@ -7,12 +7,27 @@
 
 #include <asm/uaccess.h>
 #include <asm/reg.h>
+#include <asm/switch_to.h>
 
 #include <asm/sfp-machine.h>
 #include <math-emu/double.h>
 
 #define FLOATFUNC(x)    extern int x(void *, void *, void *, void *)
 
+/* The instructions list which may be not implemented by a hardware FPU */
+FLOATFUNC(fre);
+FLOATFUNC(frsqrtes);
+FLOATFUNC(fsqrt);
+FLOATFUNC(fsqrts);
+FLOATFUNC(mtfsf);
+FLOATFUNC(mtfsfi);
+
+#ifdef CONFIG_MATH_EMULATION_HW_UNIMPLEMENTED
+#undef FLOATFUNC(x)
+#define FLOATFUNC(x)    static inline int x(void *op1, void *op2, void *op3, \
+                                                 void *op4) { }
+#endif
+
 FLOATFUNC(fadd);
 FLOATFUNC(fadds);
 FLOATFUNC(fdiv);
@@ -42,8 +57,6 @@ FLOATFUNC(mcrfs);
 FLOATFUNC(mffs);
 FLOATFUNC(mtfsb0);
 FLOATFUNC(mtfsb1);
-FLOATFUNC(mtfsf);
-FLOATFUNC(mtfsfi);
 
 FLOATFUNC(lfd);
 FLOATFUNC(lfs);
@@ -58,13 +71,9 @@ FLOATFUNC(fnabs);
 FLOATFUNC(fneg);
 
 /* Optional */
-FLOATFUNC(fre);
 FLOATFUNC(fres);
 FLOATFUNC(frsqrte);
-FLOATFUNC(frsqrtes);
 FLOATFUNC(fsel);
-FLOATFUNC(fsqrt);
-FLOATFUNC(fsqrts);
 
 
 #define OP31            0x1f            /*   31 */
@@ -154,7 +163,6 @@ FLOATFUNC(fsqrts);
 #define XEU     15
 #define XFLB    10
 
-#ifdef CONFIG_MATH_EMULATION
 static int
 record_exception(struct pt_regs *regs, int eflag)
 {
@@ -212,7 +220,6 @@ record_exception(struct pt_regs *regs, int eflag)
 
         return (fpscr & FPSCR_FEX) ? 1 : 0;
 }
-#endif /* CONFIG_MATH_EMULATION */
 
 int
 do_mathemu(struct pt_regs *regs)
@@ -222,56 +229,13 @@ do_mathemu(struct pt_regs *regs)
         signed short sdisp;
         u32 insn = 0;
         int idx = 0;
-#ifdef CONFIG_MATH_EMULATION
         int (*func)(void *, void *, void *, void *);
         int type = 0;
         int eflag, trap;
-#endif
 
         if (get_user(insn, (u32 *)pc))
                 return -EFAULT;
 
-#ifndef CONFIG_MATH_EMULATION
-        switch (insn >> 26) {
-        case LFD:
-                idx = (insn >> 16) & 0x1f;
-                sdisp = (insn & 0xffff);
-                op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
-                op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
-                lfd(op0, op1, op2, op3);
-                break;
-        case LFDU:
-                idx = (insn >> 16) & 0x1f;
-                sdisp = (insn & 0xffff);
-                op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
-                op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
-                lfd(op0, op1, op2, op3);
-                regs->gpr[idx] = (unsigned long)op1;
-                break;
-        case STFD:
-                idx = (insn >> 16) & 0x1f;
-                sdisp = (insn & 0xffff);
-                op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
-                op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
-                stfd(op0, op1, op2, op3);
-                break;
-        case STFDU:
-                idx = (insn >> 16) & 0x1f;
-                sdisp = (insn & 0xffff);
-                op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
-                op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
-                stfd(op0, op1, op2, op3);
-                regs->gpr[idx] = (unsigned long)op1;
-                break;
-        case OP63:
-                op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
-                op1 = (void *)&current->thread.TS_FPR((insn >> 11) & 0x1f);
-                fmr(op0, op1, op2, op3);
-                break;
-        default:
-                goto illegal;
-        }
-#else /* CONFIG_MATH_EMULATION */
         switch (insn >> 26) {
         case LFS:       func = lfs;     type = D;       break;
         case LFSU:      func = lfs;     type = DU;      break;
@@ -416,21 +380,16 @@ do_mathemu(struct pt_regs *regs)
         case XE:
                 idx = (insn >> 16) & 0x1f;
                 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
-                if (!idx) {
-                        if (((insn >> 1) & 0x3ff) == STFIWX)
-                                op1 = (void *)(regs->gpr[(insn >> 11) & 0x1f]);
-                        else
-                                goto illegal;
-                } else {
-                        op1 = (void *)(regs->gpr[idx] + regs->gpr[(insn >> 11) & 0x1f]);
-                }
-
+                op1 = (void *)((idx ? regs->gpr[idx] : 0)
+                                + regs->gpr[(insn >> 11) & 0x1f]);
                 break;
 
         case XEU:
                 idx = (insn >> 16) & 0x1f;
+                if (!idx)
+                        goto illegal;
                 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
-                op1 = (void *)((idx ? regs->gpr[idx] : 0)
+                op1 = (void *)(regs->gpr[idx]
                                 + regs->gpr[(insn >> 11) & 0x1f]);
                 break;
 
@@ -465,6 +424,13 @@ do_mathemu(struct pt_regs *regs)
                 goto illegal;
         }
 
+        /*
+         * If we support a HW FPU, we need to ensure the FP state
+         * is flushed into the thread_struct before attempting
+         * emulation
+         */
+        flush_fp_to_thread(current);
+
         eflag = func(op0, op1, op2, op3);
 
         if (insn & 1) {
@@ -485,7 +451,6 @@ do_mathemu(struct pt_regs *regs)
         default:
                 break;
         }
-#endif /* CONFIG_MATH_EMULATION */
 
         regs->nip += 4;
         return 0;
diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c
index 8726779e1409..76d8e7cc7805 100644
--- a/arch/powerpc/mm/fault.c
+++ b/arch/powerpc/mm/fault.c
@@ -443,8 +443,12 @@ good_area:
                                       regs, address);
 #ifdef CONFIG_PPC_SMLPAR
                         if (firmware_has_feature(FW_FEATURE_CMO)) {
+                                u32 page_ins;
+
                                 preempt_disable();
-                                get_lppaca()->page_ins += (1 << PAGE_FACTOR);
+                                page_ins = be32_to_cpu(get_lppaca()->page_ins);
+                                page_ins += 1 << PAGE_FACTOR;
+                                get_lppaca()->page_ins = cpu_to_be32(page_ins);
                                 preempt_enable();
                         }
 #endif /* CONFIG_PPC_SMLPAR */
diff --git a/arch/powerpc/mm/gup.c b/arch/powerpc/mm/gup.c
index 49822d90ea96..6936547018b8 100644
--- a/arch/powerpc/mm/gup.c
+++ b/arch/powerpc/mm/gup.c
@@ -117,8 +117,8 @@ static int gup_pud_range(pgd_t pgd, unsigned long addr, unsigned long end,
         return 1;
 }
 
-int get_user_pages_fast(unsigned long start, int nr_pages, int write,
-                        struct page **pages)
+int __get_user_pages_fast(unsigned long start, int nr_pages, int write,
+                          struct page **pages)
 {
         struct mm_struct *mm = current->mm;
         unsigned long addr, len, end;
@@ -135,7 +135,7 @@ int get_user_pages_fast(unsigned long start, int nr_pages, int write,
 
         if (unlikely(!access_ok(write ? VERIFY_WRITE : VERIFY_READ,
                                         start, len)))
-                goto slow_irqon;
+                return 0;
 
         pr_devel("  aligned: %lx .. %lx\n", start, end);
 
@@ -166,30 +166,35 @@ int get_user_pages_fast(unsigned long start, int nr_pages, int write,
                          (void *)pgd_val(pgd));
                 next = pgd_addr_end(addr, end);
                 if (pgd_none(pgd))
-                        goto slow;
+                        break;
                 if (pgd_huge(pgd)) {
                         if (!gup_hugepte((pte_t *)pgdp, PGDIR_SIZE, addr, next,
                                          write, pages, &nr))
-                                goto slow;
+                                break;
                 } else if (is_hugepd(pgdp)) {
                         if (!gup_hugepd((hugepd_t *)pgdp, PGDIR_SHIFT,
                                         addr, next, write, pages, &nr))
-                                goto slow;
+                                break;
                 } else if (!gup_pud_range(pgd, addr, next, write, pages, &nr))
-                        goto slow;
+                        break;
         } while (pgdp++, addr = next, addr != end);
 
         local_irq_enable();
 
-        VM_BUG_ON(nr != (end - start) >> PAGE_SHIFT);
         return nr;
+}
 
-        {
-                int ret;
+int get_user_pages_fast(unsigned long start, int nr_pages, int write,
+                        struct page **pages)
+{
+        struct mm_struct *mm = current->mm;
+        int nr, ret;
+
+        start &= PAGE_MASK;
+        nr = __get_user_pages_fast(start, nr_pages, write, pages);
+        ret = nr;
 
-slow:
-                local_irq_enable();
-slow_irqon:
+        if (nr < nr_pages) {
                 pr_devel("  slow path ! nr = %d\n", nr);
 
                 /* Try to get the remaining pages with get_user_pages */
@@ -198,7 +203,7 @@ slow_irqon:
 
                 down_read(&mm->mmap_sem);
                 ret = get_user_pages(current, mm, start,
-                        (end - start) >> PAGE_SHIFT, write, 0, pages, NULL);
+                                     nr_pages - nr, write, 0, pages, NULL);
                 up_read(&mm->mmap_sem);
 
                 /* Have to be a bit careful with return values */
@@ -208,9 +213,9 @@ slow_irqon:
                         else
                                 ret += nr;
                 }
-
-                return ret;
         }
+
+        return ret;
 }
 
 #endif /* __HAVE_ARCH_PTE_SPECIAL */
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index 6ecc38bd5b24..bde8b5589755 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -907,7 +907,7 @@ static int subpage_protection(struct mm_struct *mm, unsigned long ea)
 
         if (ea >= spt->maxaddr)
                 return 0;
-        if (ea < 0x100000000) {
+        if (ea < 0x100000000UL) {
                 /* addresses below 4GB use spt->low_prot */
                 sbpm = spt->low_prot;
         } else {
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
index 7f4bea162026..1cf9c5b67f24 100644
--- a/arch/powerpc/mm/mem.c
+++ b/arch/powerpc/mm/mem.c
@@ -514,7 +514,7 @@ static int add_system_ram_resources(void)
                         res->name = "System RAM";
                         res->start = base;
                         res->end = base + size - 1;
-                        res->flags = IORESOURCE_MEM;
+                        res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
                         WARN_ON(request_resource(&iomem_resource, res) < 0);
                 }
         }
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index 5850798826cd..c916127f10c3 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -58,7 +58,7 @@ static int form1_affinity;
 
 #define MAX_DISTANCE_REF_POINTS 4
 static int distance_ref_points_depth;
-static const unsigned int *distance_ref_points;
+static const __be32 *distance_ref_points;
 static int distance_lookup_table[MAX_NUMNODES][MAX_DISTANCE_REF_POINTS];
 
 /*
@@ -179,7 +179,7 @@ static void unmap_cpu_from_node(unsigned long cpu)
 #endif /* CONFIG_HOTPLUG_CPU || CONFIG_PPC_SPLPAR */
 
 /* must hold reference to node during call */
-static const int *of_get_associativity(struct device_node *dev)
+static const __be32 *of_get_associativity(struct device_node *dev)
 {
         return of_get_property(dev, "ibm,associativity", NULL);
 }
@@ -189,9 +189,9 @@ static const int *of_get_associativity(struct device_node *dev)
  * it exists (the property exists only in kexec/kdump kernels,
  * added by kexec-tools)
  */
-static const u32 *of_get_usable_memory(struct device_node *memory)
+static const __be32 *of_get_usable_memory(struct device_node *memory)
 {
-        const u32 *prop;
+        const __be32 *prop;
         u32 len;
         prop = of_get_property(memory, "linux,drconf-usable-memory", &len);
         if (!prop || len < sizeof(unsigned int))
@@ -219,7 +219,7 @@ int __node_distance(int a, int b)
 }
 
 static void initialize_distance_lookup_table(int nid,
-                const unsigned int *associativity)
+                const __be32 *associativity)
 {
         int i;
 
@@ -227,29 +227,32 @@ static void initialize_distance_lookup_table(int nid,
                 return;
 
         for (i = 0; i < distance_ref_points_depth; i++) {
-                distance_lookup_table[nid][i] =
-                        associativity[distance_ref_points[i]];
+                const __be32 *entry;
+
+                entry = &associativity[be32_to_cpu(distance_ref_points[i])];
+                distance_lookup_table[nid][i] = of_read_number(entry, 1);
         }
 }
 
 /* Returns nid in the range [0..MAX_NUMNODES-1], or -1 if no useful numa
  * info is found.
  */
-static int associativity_to_nid(const unsigned int *associativity)
+static int associativity_to_nid(const __be32 *associativity)
 {
         int nid = -1;
 
         if (min_common_depth == -1)
                 goto out;
 
-        if (associativity[0] >= min_common_depth)
-                nid = associativity[min_common_depth];
+        if (of_read_number(associativity, 1) >= min_common_depth)
+                nid = of_read_number(&associativity[min_common_depth], 1);
 
         /* POWER4 LPAR uses 0xffff as invalid node */
         if (nid == 0xffff || nid >= MAX_NUMNODES)
                 nid = -1;
 
-        if (nid > 0 && associativity[0] >= distance_ref_points_depth)
+        if (nid > 0 &&
+            of_read_number(associativity, 1) >= distance_ref_points_depth)
                 initialize_distance_lookup_table(nid, associativity);
 
 out:
@@ -262,7 +265,7 @@ out:
 static int of_node_to_nid_single(struct device_node *device)
 {
         int nid = -1;
-        const unsigned int *tmp;
+        const __be32 *tmp;
 
         tmp = of_get_associativity(device);
         if (tmp)
@@ -334,7 +337,7 @@ static int __init find_min_common_depth(void)
         }
 
         if (form1_affinity) {
-                depth = distance_ref_points[0];
+                depth = of_read_number(distance_ref_points, 1);
         } else {
                 if (distance_ref_points_depth < 2) {
                         printk(KERN_WARNING "NUMA: "
@@ -342,7 +345,7 @@ static int __init find_min_common_depth(void)
                         goto err;
                 }
 
-                depth = distance_ref_points[1];
+                depth = of_read_number(&distance_ref_points[1], 1);
         }
 
         /*
@@ -376,12 +379,12 @@ static void __init get_n_mem_cells(int *n_addr_cells, int *n_size_cells)
         of_node_put(memory);
 }
 
-static unsigned long read_n_cells(int n, const unsigned int **buf)
+static unsigned long read_n_cells(int n, const __be32 **buf)
 {
         unsigned long result = 0;
 
         while (n--) {
-                result = (result << 32) | **buf;
+                result = (result << 32) | of_read_number(*buf, 1);
                 (*buf)++;
         }
         return result;
@@ -391,17 +394,17 @@ static unsigned long read_n_cells(int n, const unsigned int **buf)
  * Read the next memblock list entry from the ibm,dynamic-memory property
  * and return the information in the provided of_drconf_cell structure.
  */
-static void read_drconf_cell(struct of_drconf_cell *drmem, const u32 **cellp)
+static void read_drconf_cell(struct of_drconf_cell *drmem, const __be32 **cellp)
 {
-        const u32 *cp;
+        const __be32 *cp;
 
         drmem->base_addr = read_n_cells(n_mem_addr_cells, cellp);
 
         cp = *cellp;
-        drmem->drc_index = cp[0];
-        drmem->reserved = cp[1];
-        drmem->aa_index = cp[2];
-        drmem->flags = cp[3];
+        drmem->drc_index = of_read_number(cp, 1);
+        drmem->reserved = of_read_number(&cp[1], 1);
+        drmem->aa_index = of_read_number(&cp[2], 1);
+        drmem->flags = of_read_number(&cp[3], 1);
 
         *cellp = cp + 4;
 }
@@ -413,16 +416,16 @@ static void read_drconf_cell(struct of_drconf_cell *drmem, const u32 **cellp)
  * list entries followed by N memblock list entries.  Each memblock list entry
  * contains information as laid out in the of_drconf_cell struct above.
  */
-static int of_get_drconf_memory(struct device_node *memory, const u32 **dm)
+static int of_get_drconf_memory(struct device_node *memory, const __be32 **dm)
 {
-        const u32 *prop;
+        const __be32 *prop;
         u32 len, entries;
 
         prop = of_get_property(memory, "ibm,dynamic-memory", &len);
         if (!prop || len < sizeof(unsigned int))
                 return 0;
 
-        entries = *prop++;
+        entries = of_read_number(prop++, 1);
 
         /* Now that we know the number of entries, revalidate the size
          * of the property read in to ensure we have everything
@@ -440,7 +443,7 @@ static int of_get_drconf_memory(struct device_node *memory, const u32 **dm)
  */
 static u64 of_get_lmb_size(struct device_node *memory)
 {
-        const u32 *prop;
+        const __be32 *prop;
         u32 len;
 
         prop = of_get_property(memory, "ibm,lmb-size", &len);
@@ -453,7 +456,7 @@ static u64 of_get_lmb_size(struct device_node *memory)
 struct assoc_arrays {
         u32     n_arrays;
         u32     array_sz;
-        const u32 *arrays;
+        const __be32 *arrays;
 };
 
 /*
@@ -469,15 +472,15 @@ struct assoc_arrays {
 static int of_get_assoc_arrays(struct device_node *memory,
                                struct assoc_arrays *aa)
 {
-        const u32 *prop;
+        const __be32 *prop;
         u32 len;
 
         prop = of_get_property(memory, "ibm,associativity-lookup-arrays", &len);
         if (!prop || len < 2 * sizeof(unsigned int))
                 return -1;
 
-        aa->n_arrays = *prop++;
-        aa->array_sz = *prop++;
+        aa->n_arrays = of_read_number(prop++, 1);
+        aa->array_sz = of_read_number(prop++, 1);
 
         /* Now that we know the number of arrays and size of each array,
          * revalidate the size of the property read in.
@@ -504,7 +507,7 @@ static int of_drconf_to_nid_single(struct of_drconf_cell *drmem,
             !(drmem->flags & DRCONF_MEM_AI_INVALID) &&
             drmem->aa_index < aa->n_arrays) {
                 index = drmem->aa_index * aa->array_sz + min_common_depth - 1;
-                nid = aa->arrays[index];
+                nid = of_read_number(&aa->arrays[index], 1);
 
                 if (nid == 0xffff || nid >= MAX_NUMNODES)
                         nid = default_nid;
@@ -595,7 +598,7 @@ static unsigned long __init numa_enforce_memory_limit(unsigned long start,
  * Reads the counter for a given entry in
  * linux,drconf-usable-memory property
  */
-static inline int __init read_usm_ranges(const u32 **usm)
+static inline int __init read_usm_ranges(const __be32 **usm)
 {
         /*
          * For each lmb in ibm,dynamic-memory a corresponding
@@ -612,7 +615,7 @@ static inline int __init read_usm_ranges(const u32 **usm)
  */
 static void __init parse_drconf_memory(struct device_node *memory)
 {
-        const u32 *uninitialized_var(dm), *usm;
+        const __be32 *uninitialized_var(dm), *usm;
         unsigned int n, rc, ranges, is_kexec_kdump = 0;
         unsigned long lmb_size, base, size, sz;
         int nid;
@@ -721,7 +724,7 @@ static int __init parse_numa_properties(void)
                 unsigned long size;
                 int nid;
                 int ranges;
-                const unsigned int *memcell_buf;
+                const __be32 *memcell_buf;
                 unsigned int len;
 
                 memcell_buf = of_get_property(memory,
@@ -1106,7 +1109,7 @@ early_param("numa", early_numa);
 static int hot_add_drconf_scn_to_nid(struct device_node *memory,
                                      unsigned long scn_addr)
 {
-        const u32 *dm;
+        const __be32 *dm;
         unsigned int drconf_cell_cnt, rc;
         unsigned long lmb_size;
         struct assoc_arrays aa;
@@ -1159,7 +1162,7 @@ int hot_add_node_scn_to_nid(unsigned long scn_addr)
         for_each_node_by_type(memory, "memory") {
                 unsigned long start, size;
                 int ranges;
-                const unsigned int *memcell_buf;
+                const __be32 *memcell_buf;
                 unsigned int len;
 
                 memcell_buf = of_get_property(memory, "reg", &len);
@@ -1232,7 +1235,7 @@ static u64 hot_add_drconf_memory_max(void)
         struct device_node *memory = NULL;
         unsigned int drconf_cell_cnt = 0;
         u64 lmb_size = 0;
-        const u32 *dm = 0;
+        const __be32 *dm = 0;
 
         memory = of_find_node_by_path("/ibm,dynamic-reconfiguration-memory");
         if (memory) {
@@ -1337,40 +1340,41 @@ static int update_cpu_associativity_changes_mask(void)
  * Convert the associativity domain numbers returned from the hypervisor
  * to the sequence they would appear in the ibm,associativity property.
  */
-static int vphn_unpack_associativity(const long *packed, unsigned int *unpacked)
+static int vphn_unpack_associativity(const long *packed, __be32 *unpacked)
 {
         int i, nr_assoc_doms = 0;
-        const u16 *field = (const u16*) packed;
+        const __be16 *field = (const __be16 *) packed;
 
 #define VPHN_FIELD_UNUSED       (0xffff)
 #define VPHN_FIELD_MSB          (0x8000)
 #define VPHN_FIELD_MASK         (~VPHN_FIELD_MSB)
 
         for (i = 1; i < VPHN_ASSOC_BUFSIZE; i++) {
-                if (*field == VPHN_FIELD_UNUSED) {
+                if (be16_to_cpup(field) == VPHN_FIELD_UNUSED) {
                         /* All significant fields processed, and remaining
                          * fields contain the reserved value of all 1's.
                          * Just store them.
                          */
-                        unpacked[i] = *((u32*)field);
+                        unpacked[i] = *((__be32 *)field);
                         field += 2;
-                } else if (*field & VPHN_FIELD_MSB) {
+                } else if (be16_to_cpup(field) & VPHN_FIELD_MSB) {
                         /* Data is in the lower 15 bits of this field */
-                        unpacked[i] = *field & VPHN_FIELD_MASK;
+                        unpacked[i] = cpu_to_be32(
+                                be16_to_cpup(field) & VPHN_FIELD_MASK);
                         field++;
                         nr_assoc_doms++;
                 } else {
                         /* Data is in the lower 15 bits of this field
                          * concatenated with the next 16 bit field
                          */
-                        unpacked[i] = *((u32*)field);
+                        unpacked[i] = *((__be32 *)field);
                         field += 2;
                         nr_assoc_doms++;
                 }
         }
 
         /* The first cell contains the length of the property */
-        unpacked[0] = nr_assoc_doms;
+        unpacked[0] = cpu_to_be32(nr_assoc_doms);
 
         return nr_assoc_doms;
 }
@@ -1379,7 +1383,7 @@ static int vphn_unpack_associativity(const long *packed, unsigned int *unpacked)
  * Retrieve the new associativity information for a virtual processor's
  * home node.
  */
-static long hcall_vphn(unsigned long cpu, unsigned int *associativity)
+static long hcall_vphn(unsigned long cpu, __be32 *associativity)
 {
         long rc;
         long retbuf[PLPAR_HCALL9_BUFSIZE] = {0};
@@ -1393,7 +1397,7 @@ static long hcall_vphn(unsigned long cpu, unsigned int *associativity)
 }
 
 static long vphn_get_associativity(unsigned long cpu,
-                                        unsigned int *associativity)
+                                        __be32 *associativity)
 {
         long rc;
 
@@ -1450,7 +1454,7 @@ int arch_update_cpu_topology(void)
 {
         unsigned int cpu, sibling, changed = 0;
         struct topology_update_data *updates, *ud;
-        unsigned int associativity[VPHN_ASSOC_BUFSIZE] = {0};
+        __be32 associativity[VPHN_ASSOC_BUFSIZE] = {0};
         cpumask_t updated_cpus;
         struct device *dev;
         int weight, new_nid, i = 0;
@@ -1609,7 +1613,7 @@ int start_topology_update(void)
 #endif
                 }
         } else if (firmware_has_feature(FW_FEATURE_VPHN) &&
-                   get_lppaca()->shared_proc) {
+                   lppaca_shared_proc(get_lppaca())) {
                 if (!vphn_enabled) {
                         prrn_enabled = 0;
                         vphn_enabled = 1;
diff --git a/arch/powerpc/mm/slb.c b/arch/powerpc/mm/slb.c
index a538c80db2df..9d1d33cd2be5 100644
--- a/arch/powerpc/mm/slb.c
+++ b/arch/powerpc/mm/slb.c
@@ -66,8 +66,10 @@ static inline void slb_shadow_update(unsigned long ea, int ssize,
          * we only update the current CPU's SLB shadow buffer.
          */
         get_slb_shadow()->save_area[entry].esid = 0;
-        get_slb_shadow()->save_area[entry].vsid = mk_vsid_data(ea, ssize, flags);
-        get_slb_shadow()->save_area[entry].esid = mk_esid_data(ea, ssize, entry);
+        get_slb_shadow()->save_area[entry].vsid =
+                                cpu_to_be64(mk_vsid_data(ea, ssize, flags));
+        get_slb_shadow()->save_area[entry].esid =
+                                cpu_to_be64(mk_esid_data(ea, ssize, entry));
 }
 
 static inline void slb_shadow_clear(unsigned long entry)
@@ -112,7 +114,8 @@ static void __slb_flush_and_rebolt(void)
         } else {
                 /* Update stack entry; others don't change */
                 slb_shadow_update(get_paca()->kstack, mmu_kernel_ssize, lflags, 2);
-                ksp_vsid_data = get_slb_shadow()->save_area[2].vsid;
+                ksp_vsid_data =
+                        be64_to_cpu(get_slb_shadow()->save_area[2].vsid);
         }
 
         /* We need to do this all in asm, so we're sure we don't touch
diff --git a/arch/powerpc/mm/subpage-prot.c b/arch/powerpc/mm/subpage-prot.c
index aa74acb0fdfc..a770df2dae70 100644
--- a/arch/powerpc/mm/subpage-prot.c
+++ b/arch/powerpc/mm/subpage-prot.c
@@ -105,7 +105,7 @@ static void subpage_prot_clear(unsigned long addr, unsigned long len)
                 limit = spt->maxaddr;
         for (; addr < limit; addr = next) {
                 next = pmd_addr_end(addr, limit);
-                if (addr < 0x100000000) {
+                if (addr < 0x100000000UL) {
                         spm = spt->low_prot;
                 } else {
                         spm = spt->protptrs[addr >> SBP_L3_SHIFT];
@@ -219,7 +219,7 @@ long sys_subpage_prot(unsigned long addr, unsigned long len, u32 __user *map)
         for (limit = addr + len; addr < limit; addr = next) {
                 next = pmd_addr_end(addr, limit);
                 err = -ENOMEM;
-                if (addr < 0x100000000) {
+                if (addr < 0x100000000UL) {
                         spm = spt->low_prot;
                 } else {
                         spm = spt->protptrs[addr >> SBP_L3_SHIFT];
diff --git a/arch/powerpc/oprofile/op_model_fsl_emb.c b/arch/powerpc/oprofile/op_model_fsl_emb.c
index ccc1daa33aed..2a82d3ed464d 100644
--- a/arch/powerpc/oprofile/op_model_fsl_emb.c
+++ b/arch/powerpc/oprofile/op_model_fsl_emb.c
@@ -46,6 +46,12 @@ static inline u32 get_pmlca(int ctr)
                 case 3:
                         pmlca = mfpmr(PMRN_PMLCA3);
                         break;
+                case 4:
+                        pmlca = mfpmr(PMRN_PMLCA4);
+                        break;
+                case 5:
+                        pmlca = mfpmr(PMRN_PMLCA5);
+                        break;
                 default:
                         panic("Bad ctr number\n");
         }
@@ -68,6 +74,12 @@ static inline void set_pmlca(int ctr, u32 pmlca)
                 case 3:
                         mtpmr(PMRN_PMLCA3, pmlca);
                         break;
+                case 4:
+                        mtpmr(PMRN_PMLCA4, pmlca);
+                        break;
+                case 5:
+                        mtpmr(PMRN_PMLCA5, pmlca);
+                        break;
                 default:
                         panic("Bad ctr number\n");
         }
@@ -84,6 +96,10 @@ static inline unsigned int ctr_read(unsigned int i)
                         return mfpmr(PMRN_PMC2);
                 case 3:
                         return mfpmr(PMRN_PMC3);
+                case 4:
+                        return mfpmr(PMRN_PMC4);
+                case 5:
+                        return mfpmr(PMRN_PMC5);
                 default:
                         return 0;
         }
@@ -104,6 +120,12 @@ static inline void ctr_write(unsigned int i, unsigned int val)
                 case 3:
                         mtpmr(PMRN_PMC3, val);
                         break;
+                case 4:
+                        mtpmr(PMRN_PMC4, val);
+                        break;
+                case 5:
+                        mtpmr(PMRN_PMC5, val);
+                        break;
                 default:
                         break;
         }
@@ -133,6 +155,14 @@ static void init_pmc_stop(int ctr)
                         mtpmr(PMRN_PMLCA3, pmlca);
                         mtpmr(PMRN_PMLCB3, pmlcb);
                         break;
+                case 4:
+                        mtpmr(PMRN_PMLCA4, pmlca);
+                        mtpmr(PMRN_PMLCB4, pmlcb);
+                        break;
+                case 5:
+                        mtpmr(PMRN_PMLCA5, pmlca);
+                        mtpmr(PMRN_PMLCB5, pmlcb);
+                        break;
                 default:
                         panic("Bad ctr number!\n");
         }
diff --git a/arch/powerpc/perf/Makefile b/arch/powerpc/perf/Makefile
index 510fae10513d..60d71eea919c 100644
--- a/arch/powerpc/perf/Makefile
+++ b/arch/powerpc/perf/Makefile
@@ -9,7 +9,7 @@ obj64-$(CONFIG_PPC_PERF_CTRS)	+= power4-pmu.o ppc970-pmu.o power5-pmu.o \
 obj32-$(CONFIG_PPC_PERF_CTRS)   += mpc7450-pmu.o
 
 obj-$(CONFIG_FSL_EMB_PERF_EVENT) += core-fsl-emb.o
-obj-$(CONFIG_FSL_EMB_PERF_EVENT_E500) += e500-pmu.o
+obj-$(CONFIG_FSL_EMB_PERF_EVENT_E500) += e500-pmu.o e6500-pmu.o
 
 obj-$(CONFIG_PPC64)             += $(obj64-y)
 obj-$(CONFIG_PPC32)             += $(obj32-y)
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index eeae308cf982..29b89e863d7c 100644
--- a/arch/powerpc/perf/core-book3s.c
+++ b/arch/powerpc/perf/core-book3s.c
@@ -24,7 +24,7 @@
 #define BHRB_MAX_ENTRIES        32
 #define BHRB_TARGET             0x0000000000000002
 #define BHRB_PREDICTION         0x0000000000000001
-#define BHRB_EA                 0xFFFFFFFFFFFFFFFC
+#define BHRB_EA                 0xFFFFFFFFFFFFFFFCUL
 
 struct cpu_hw_events {
         int n_events;
diff --git a/arch/powerpc/perf/core-fsl-emb.c b/arch/powerpc/perf/core-fsl-emb.c
index 106c53354675..d35ae52c69dc 100644
--- a/arch/powerpc/perf/core-fsl-emb.c
+++ b/arch/powerpc/perf/core-fsl-emb.c
@@ -70,6 +70,12 @@ static unsigned long read_pmc(int idx)
         case 3:
                 val = mfpmr(PMRN_PMC3);
                 break;
+        case 4:
+                val = mfpmr(PMRN_PMC4);
+                break;
+        case 5:
+                val = mfpmr(PMRN_PMC5);
+                break;
         default:
                 printk(KERN_ERR "oops trying to read PMC%d\n", idx);
                 val = 0;
@@ -95,6 +101,12 @@ static void write_pmc(int idx, unsigned long val)
         case 3:
                 mtpmr(PMRN_PMC3, val);
                 break;
+        case 4:
+                mtpmr(PMRN_PMC4, val);
+                break;
+        case 5:
+                mtpmr(PMRN_PMC5, val);
+                break;
         default:
                 printk(KERN_ERR "oops trying to write PMC%d\n", idx);
         }
@@ -120,6 +132,12 @@ static void write_pmlca(int idx, unsigned long val)
         case 3:
                 mtpmr(PMRN_PMLCA3, val);
                 break;
+        case 4:
+                mtpmr(PMRN_PMLCA4, val);
+                break;
+        case 5:
+                mtpmr(PMRN_PMLCA5, val);
+                break;
         default:
                 printk(KERN_ERR "oops trying to write PMLCA%d\n", idx);
         }
@@ -145,6 +163,12 @@ static void write_pmlcb(int idx, unsigned long val)
         case 3:
                 mtpmr(PMRN_PMLCB3, val);
                 break;
+        case 4:
+                mtpmr(PMRN_PMLCB4, val);
+                break;
+        case 5:
+                mtpmr(PMRN_PMLCB5, val);
+                break;
         default:
                 printk(KERN_ERR "oops trying to write PMLCB%d\n", idx);
         }
@@ -462,6 +486,12 @@ static int fsl_emb_pmu_event_init(struct perf_event *event)
         int num_restricted;
         int i;
 
+        if (ppmu->n_counter > MAX_HWEVENTS) {
+                WARN(1, "No. of perf counters (%d) is higher than max array size(%d)\n",
+                        ppmu->n_counter, MAX_HWEVENTS);
+                ppmu->n_counter = MAX_HWEVENTS;
+        }
+
         switch (event->attr.type) {
         case PERF_TYPE_HARDWARE:
                 ev = event->attr.config;
diff --git a/arch/powerpc/perf/e6500-pmu.c b/arch/powerpc/perf/e6500-pmu.c
new file mode 100644
index 000000000000..3d877aa777b5
--- /dev/null
+++ b/arch/powerpc/perf/e6500-pmu.c
@@ -0,0 +1,121 @@
+/*
+ * Performance counter support for e6500 family processors.
+ *
+ * Author: Priyanka Jain, Priyanka.Jain@freescale.com
+ * Based on e500-pmu.c
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ * Copyright 2008-2009 Paul Mackerras, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/string.h>
+#include <linux/perf_event.h>
+#include <asm/reg.h>
+#include <asm/cputable.h>
+
+/*
+ * Map of generic hardware event types to hardware events
+ * Zero if unsupported
+ */
+static int e6500_generic_events[] = {
+        [PERF_COUNT_HW_CPU_CYCLES] = 1,
+        [PERF_COUNT_HW_INSTRUCTIONS] = 2,
+        [PERF_COUNT_HW_CACHE_MISSES] = 221,
+        [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 12,
+        [PERF_COUNT_HW_BRANCH_MISSES] = 15,
+};
+
+#define C(x)    PERF_COUNT_HW_CACHE_##x
+
+/*
+ * Table of generalized cache-related events.
+ * 0 means not supported, -1 means nonsensical, other values
+ * are event codes.
+ */
+static int e6500_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
+        [C(L1D)] = {
+                                /*RESULT_ACCESS         RESULT_MISS */
+                [C(OP_READ)] = {        27,             222     },
+                [C(OP_WRITE)] = {       28,             223     },
+                [C(OP_PREFETCH)] = {    29,             0       },
+        },
+        [C(L1I)] = {
+                                /*RESULT_ACCESS         RESULT_MISS */
+                [C(OP_READ)] = {        2,              254     },
+                [C(OP_WRITE)] = {       -1,             -1      },
+                [C(OP_PREFETCH)] = {    37,             0       },
+        },
+        /*
+         * Assuming LL means L2, it's not a good match for this model.
+         * It does not have separate read/write events (but it does have
+         * separate instruction/data events).
+         */
+        [C(LL)] = {
+                                /*RESULT_ACCESS         RESULT_MISS */
+                [C(OP_READ)] = {        0,              0       },
+                [C(OP_WRITE)] = {       0,              0       },
+                [C(OP_PREFETCH)] = {    0,              0       },
+        },
+        /*
+         * There are data/instruction MMU misses, but that's a miss on
+         * the chip's internal level-one TLB which is probably not
+         * what the user wants.  Instead, unified level-two TLB misses
+         * are reported here.
+         */
+        [C(DTLB)] = {
+                                /*RESULT_ACCESS         RESULT_MISS */
+                [C(OP_READ)] = {        26,             66      },
+                [C(OP_WRITE)] = {       -1,             -1      },
+                [C(OP_PREFETCH)] = {    -1,             -1      },
+        },
+        [C(BPU)] = {
+                                /*RESULT_ACCESS         RESULT_MISS */
+                [C(OP_READ)] = {        12,             15      },
+                [C(OP_WRITE)] = {       -1,             -1      },
+                [C(OP_PREFETCH)] = {    -1,             -1      },
+        },
+        [C(NODE)] = {
+                                /* RESULT_ACCESS        RESULT_MISS */
+                [C(OP_READ)] = {        -1,             -1      },
+                [C(OP_WRITE)] = {       -1,             -1      },
+                [C(OP_PREFETCH)] = {    -1,             -1      },
+        },
+};
+
+static int num_events = 512;
+
+/* Upper half of event id is PMLCb, for threshold events */
+static u64 e6500_xlate_event(u64 event_id)
+{
+        u32 event_low = (u32)event_id;
+        if (event_low >= num_events ||
+                (event_id & (FSL_EMB_EVENT_THRESHMUL | FSL_EMB_EVENT_THRESH)))
+                return 0;
+
+        return FSL_EMB_EVENT_VALID;
+}
+
+static struct fsl_emb_pmu e6500_pmu = {
+        .name                   = "e6500 family",
+        .n_counter              = 6,
+        .n_restricted           = 0,
+        .xlate_event            = e6500_xlate_event,
+        .n_generic              = ARRAY_SIZE(e6500_generic_events),
+        .generic_events         = e6500_generic_events,
+        .cache_events           = &e6500_cache_events,
+};
+
+static int init_e6500_pmu(void)
+{
+        if (!cur_cpu_spec->oprofile_cpu_type ||
+                strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc/e6500"))
+                return -ENODEV;
+
+        return register_fsl_emb_pmu(&e6500_pmu);
+}
+
+early_initcall(init_e6500_pmu);
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pic.c b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
index b89ef65392dc..b69221ba07fd 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_pic.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
@@ -373,8 +373,9 @@ static int mpc52xx_irqhost_map(struct irq_domain *h, unsigned int virq,
         case MPC52xx_IRQ_L1_PERP: irqchip = &mpc52xx_periph_irqchip; break;
         case MPC52xx_IRQ_L1_SDMA: irqchip = &mpc52xx_sdma_irqchip; break;
         case MPC52xx_IRQ_L1_CRIT:
+        default:
                 pr_warn("%s: Critical IRQ #%d is unsupported! Nopping it.\n",
-                        __func__, l2irq);
+                        __func__, l1irq);
                 irq_set_chip(virq, &no_irq_chip);
                 return 0;
         }
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
index efdd37c775ad..de2eb9320993 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -32,6 +32,12 @@ config BSC9131_RDB
           StarCore SC3850 DSP
           Manufacturer : Freescale Semiconductor, Inc
 
+config C293_PCIE
+          bool "Freescale C293PCIE"
+          select DEFAULT_UIMAGE
+          help
+          This option enables support for the C293PCIE board
+
 config MPC8540_ADS
         bool "Freescale MPC8540 ADS"
         select DEFAULT_UIMAGE
@@ -112,10 +118,10 @@ config P1022_RDK
           reference board.
 
 config P1023_RDS
-        bool "Freescale P1023 RDS"
+        bool "Freescale P1023 RDS/RDB"
         select DEFAULT_UIMAGE
         help
-          This option enables support for the P1023 RDS board
+          This option enables support for the P1023 RDS and RDB boards
 
 config SOCRATES
         bool "Socrates"
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile
index 2eab37ea4a9d..53c9f75a6907 100644
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -6,6 +6,7 @@ obj-$(CONFIG_SMP) += smp.o
 obj-y += common.o
 
 obj-$(CONFIG_BSC9131_RDB) += bsc913x_rdb.o
+obj-$(CONFIG_C293_PCIE)   += c293pcie.o
 obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o
 obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o
 obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o
diff --git a/arch/powerpc/platforms/85xx/c293pcie.c b/arch/powerpc/platforms/85xx/c293pcie.c
new file mode 100644
index 000000000000..6208e49142bf
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/c293pcie.c
@@ -0,0 +1,75 @@
+/*
+ * C293PCIE Board Setup
+ *
+ * Copyright 2013 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/of_platform.h>
+
+#include <asm/machdep.h>
+#include <asm/udbg.h>
+#include <asm/mpic.h>
+
+#include <sysdev/fsl_soc.h>
+#include <sysdev/fsl_pci.h>
+
+#include "mpc85xx.h"
+
+void __init c293_pcie_pic_init(void)
+{
+        struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
+          MPIC_SINGLE_DEST_CPU, 0, 256, " OpenPIC  ");
+
+        BUG_ON(mpic == NULL);
+
+        mpic_init(mpic);
+}
+
+
+/*
+ * Setup the architecture
+ */
+static void __init c293_pcie_setup_arch(void)
+{
+        if (ppc_md.progress)
+                ppc_md.progress("c293_pcie_setup_arch()", 0);
+
+        fsl_pci_assign_primary();
+
+        printk(KERN_INFO "C293 PCIE board from Freescale Semiconductor\n");
+}
+
+machine_arch_initcall(c293_pcie, mpc85xx_common_publish_devices);
+
+/*
+ * Called very early, device-tree isn't unflattened
+ */
+static int __init c293_pcie_probe(void)
+{
+        unsigned long root = of_get_flat_dt_root();
+
+        if (of_flat_dt_is_compatible(root, "fsl,C293PCIE"))
+                return 1;
+        return 0;
+}
+
+define_machine(c293_pcie) {
+        .name                   = "C293 PCIE",
+        .probe                  = c293_pcie_probe,
+        .setup_arch             = c293_pcie_setup_arch,
+        .init_IRQ               = c293_pcie_pic_init,
+#ifdef CONFIG_PCI
+        .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
+#endif
+        .get_irq                = mpic_get_irq,
+        .restart                = fsl_rstcr_restart,
+        .calibrate_decr         = generic_calibrate_decr,
+        .progress               = udbg_progress,
+};
diff --git a/arch/powerpc/platforms/85xx/corenet_ds.c b/arch/powerpc/platforms/85xx/corenet_ds.c
index c59c617eee93..aa3690bae415 100644
--- a/arch/powerpc/platforms/85xx/corenet_ds.c
+++ b/arch/powerpc/platforms/85xx/corenet_ds.c
@@ -53,12 +53,6 @@ void __init corenet_ds_setup_arch(void)
 {
         mpc85xx_smp_init();
 
-#if defined(CONFIG_PCI) && defined(CONFIG_PPC64)
-        pci_devs_phb_init();
-#endif
-
-        fsl_pci_assign_primary();
-
         swiotlb_detect_4g();
 
         pr_info("%s board from Freescale Semiconductor\n", ppc_md.name);
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
index ede8771d6f02..53b6fb0a3d56 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
@@ -160,6 +160,7 @@ machine_arch_initcall(p2020_rdb_pc, mpc85xx_common_publish_devices);
 machine_arch_initcall(p1020_mbg_pc, mpc85xx_common_publish_devices);
 machine_arch_initcall(p1020_rdb, mpc85xx_common_publish_devices);
 machine_arch_initcall(p1020_rdb_pc, mpc85xx_common_publish_devices);
+machine_arch_initcall(p1020_rdb_pd, mpc85xx_common_publish_devices);
 machine_arch_initcall(p1020_utm_pc, mpc85xx_common_publish_devices);
 machine_arch_initcall(p1021_rdb_pc, mpc85xx_common_publish_devices);
 machine_arch_initcall(p1025_rdb, mpc85xx_common_publish_devices);
@@ -193,6 +194,13 @@ static int __init p1020_rdb_pc_probe(void)
         return of_flat_dt_is_compatible(root, "fsl,P1020RDB-PC");
 }
 
+static int __init p1020_rdb_pd_probe(void)
+{
+        unsigned long root = of_get_flat_dt_root();
+
+        return of_flat_dt_is_compatible(root, "fsl,P1020RDB-PD");
+}
+
 static int __init p1021_rdb_pc_probe(void)
 {
         unsigned long root = of_get_flat_dt_root();
@@ -351,6 +359,20 @@ define_machine(p1020_rdb_pc) {
         .progress               = udbg_progress,
 };
 
+define_machine(p1020_rdb_pd) {
+        .name                   = "P1020RDB-PD",
+        .probe                  = p1020_rdb_pd_probe,
+        .setup_arch             = mpc85xx_rdb_setup_arch,
+        .init_IRQ               = mpc85xx_rdb_pic_init,
+#ifdef CONFIG_PCI
+        .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
+#endif
+        .get_irq                = mpic_get_irq,
+        .restart                = fsl_rstcr_restart,
+        .calibrate_decr         = generic_calibrate_decr,
+        .progress               = udbg_progress,
+};
+
 define_machine(p1024_rdb) {
         .name                   = "P1024 RDB",
         .probe                  = p1024_rdb_probe,
diff --git a/arch/powerpc/platforms/85xx/p1023_rds.c b/arch/powerpc/platforms/85xx/p1023_rds.c
index 9cc60a738834..2ae9d490c3d9 100644
--- a/arch/powerpc/platforms/85xx/p1023_rds.c
+++ b/arch/powerpc/platforms/85xx/p1023_rds.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2010-2011 Freescale Semiconductor, Inc.
+ * Copyright 2010-2011, 2013 Freescale Semiconductor, Inc.
  *
  * Author: Roy Zang <tie-fei.zang@freescale.com>
  *
@@ -86,6 +86,7 @@ static void __init mpc85xx_rds_setup_arch(void)
 }
 
 machine_arch_initcall(p1023_rds, mpc85xx_common_publish_devices);
+machine_arch_initcall(p1023_rdb, mpc85xx_common_publish_devices);
 
 static void __init mpc85xx_rds_pic_init(void)
 {
@@ -106,6 +107,14 @@ static int __init p1023_rds_probe(void)
 
 }
 
+static int __init p1023_rdb_probe(void)
+{
+        unsigned long root = of_get_flat_dt_root();
+
+        return of_flat_dt_is_compatible(root, "fsl,P1023RDB");
+
+}
+
 define_machine(p1023_rds) {
         .name                   = "P1023 RDS",
         .probe                  = p1023_rds_probe,
@@ -120,3 +129,16 @@ define_machine(p1023_rds) {
 #endif
 };
 
+define_machine(p1023_rdb) {
+        .name                   = "P1023 RDB",
+        .probe                  = p1023_rdb_probe,
+        .setup_arch             = mpc85xx_rds_setup_arch,
+        .init_IRQ               = mpc85xx_rds_pic_init,
+        .get_irq                = mpic_get_irq,
+        .restart                = fsl_rstcr_restart,
+        .calibrate_decr         = generic_calibrate_decr,
+        .progress               = udbg_progress,
+#ifdef CONFIG_PCI
+        .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
+#endif
+};
diff --git a/arch/powerpc/platforms/85xx/smp.c b/arch/powerpc/platforms/85xx/smp.c
index 5ced4f5bb2b2..281b7f01df63 100644
--- a/arch/powerpc/platforms/85xx/smp.c
+++ b/arch/powerpc/platforms/85xx/smp.c
@@ -69,7 +69,32 @@ static void mpc85xx_give_timebase(void)
         tb_req = 0;
 
         mpc85xx_timebase_freeze(1);
+#ifdef CONFIG_PPC64
+        /*
+         * e5500/e6500 have a workaround for erratum A-006958 in place
+         * that will reread the timebase until TBL is non-zero.
+         * That would be a bad thing when the timebase is frozen.
+         *
+         * Thus, we read it manually, and instead of checking that
+         * TBL is non-zero, we ensure that TB does not change.  We don't
+         * do that for the main mftb implementation, because it requires
+         * a scratch register
+         */
+        {
+                u64 prev;
+
+                asm volatile("mfspr %0, %1" : "=r" (timebase) :
+                             "i" (SPRN_TBRL));
+
+                do {
+                        prev = timebase;
+                        asm volatile("mfspr %0, %1" : "=r" (timebase) :
+                                     "i" (SPRN_TBRL));
+                } while (prev != timebase);
+        }
+#else
         timebase = get_tb();
+#endif
         mb();
         tb_valid = 1;
 
@@ -255,6 +280,7 @@ out:
 
 struct smp_ops_t smp_85xx_ops = {
         .kick_cpu = smp_85xx_kick_cpu,
+        .cpu_bootable = smp_generic_cpu_bootable,
 #ifdef CONFIG_HOTPLUG_CPU
         .cpu_disable    = generic_cpu_disable,
         .cpu_die        = generic_cpu_die,
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index d703775bda30..bf9c6d4cd26c 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -202,17 +202,12 @@ config PPC_P7_NAP
         bool
         default n
 
-config PPC_INDIRECT_IO
-        bool
-        select GENERIC_IOMAP
-
 config PPC_INDIRECT_PIO
         bool
-        select PPC_INDIRECT_IO
+        select GENERIC_IOMAP
 
 config PPC_INDIRECT_MMIO
         bool
-        select PPC_INDIRECT_IO
 
 config PPC_IO_WORKAROUNDS
         bool
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index 47d9a03dd415..6704e2e20e6b 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -96,18 +96,31 @@ config GENERIC_CPU
 
 config CELL_CPU
         bool "Cell Broadband Engine"
+        depends on PPC_BOOK3S_64
 
 config POWER4_CPU
         bool "POWER4"
+        depends on PPC_BOOK3S_64
 
 config POWER5_CPU
         bool "POWER5"
+        depends on PPC_BOOK3S_64
 
 config POWER6_CPU
         bool "POWER6"
+        depends on PPC_BOOK3S_64
 
 config POWER7_CPU
         bool "POWER7"
+        depends on PPC_BOOK3S_64
+
+config E5500_CPU
+        bool "Freescale e5500"
+        depends on E500
+
+config E6500_CPU
+        bool "Freescale e6500"
+        depends on E500
 
 endchoice
 
diff --git a/arch/powerpc/platforms/cell/iommu.c b/arch/powerpc/platforms/cell/iommu.c
index 946306b1bb4e..b53560660b72 100644
--- a/arch/powerpc/platforms/cell/iommu.c
+++ b/arch/powerpc/platforms/cell/iommu.c
@@ -697,7 +697,7 @@ static int __init cell_iommu_get_window(struct device_node *np,
                                          unsigned long *base,
                                          unsigned long *size)
 {
-        const void *dma_window;
+        const __be32 *dma_window;
         unsigned long index;
 
         /* Use ibm,dma-window if available, else, hard code ! */
diff --git a/arch/powerpc/platforms/cell/smp.c b/arch/powerpc/platforms/cell/smp.c
index f75f6fcac729..90745eaa45fe 100644
--- a/arch/powerpc/platforms/cell/smp.c
+++ b/arch/powerpc/platforms/cell/smp.c
@@ -136,25 +136,12 @@ static int smp_cell_kick_cpu(int nr)
         return 0;
 }
 
-static int smp_cell_cpu_bootable(unsigned int nr)
-{
-        /* Special case - we inhibit secondary thread startup
-         * during boot if the user requests it.  Odd-numbered
-         * cpus are assumed to be secondary threads.
-         */
-        if (system_state == SYSTEM_BOOTING &&
-            cpu_has_feature(CPU_FTR_SMT) &&
-            !smt_enabled_at_boot && cpu_thread_in_core(nr) != 0)
-                return 0;
-
-        return 1;
-}
 static struct smp_ops_t bpa_iic_smp_ops = {
         .message_pass   = iic_message_pass,
         .probe          = smp_iic_probe,
         .kick_cpu       = smp_cell_kick_cpu,
         .setup_cpu      = smp_cell_setup_cpu,
-        .cpu_bootable   = smp_cell_cpu_bootable,
+        .cpu_bootable   = smp_generic_cpu_bootable,
 };
 
 /* This is called very early */
diff --git a/arch/powerpc/platforms/powernv/Kconfig b/arch/powerpc/platforms/powernv/Kconfig
index c24684c818ab..6fae5eb99ea6 100644
--- a/arch/powerpc/platforms/powernv/Kconfig
+++ b/arch/powerpc/platforms/powernv/Kconfig
@@ -7,6 +7,8 @@ config PPC_POWERNV
         select PPC_P7_NAP
         select PPC_PCI_CHOICE if EMBEDDED
         select EPAPR_BOOT
+        select PPC_INDIRECT_PIO
+        select PPC_UDBG_16550
         default y
 
 config POWERNV_MSI
diff --git a/arch/powerpc/platforms/powernv/Makefile b/arch/powerpc/platforms/powernv/Makefile
index 7fe595152478..300c437d713c 100644
--- a/arch/powerpc/platforms/powernv/Makefile
+++ b/arch/powerpc/platforms/powernv/Makefile
@@ -1,5 +1,5 @@
 obj-y                   += setup.o opal-takeover.o opal-wrappers.o opal.o
-obj-y                   += opal-rtc.o opal-nvram.o
+obj-y                   += opal-rtc.o opal-nvram.o opal-lpc.o
 
 obj-$(CONFIG_SMP)       += smp.o
 obj-$(CONFIG_PCI)       += pci.o pci-p5ioc2.o pci-ioda.o
diff --git a/arch/powerpc/platforms/powernv/eeh-ioda.c b/arch/powerpc/platforms/powernv/eeh-ioda.c
index 0cd1c4a71755..cf42e74514fa 100644
--- a/arch/powerpc/platforms/powernv/eeh-ioda.c
+++ b/arch/powerpc/platforms/powernv/eeh-ioda.c
@@ -36,13 +36,6 @@
 #include "powernv.h"
 #include "pci.h"
 
-/* Debugging option */
-#ifdef IODA_EEH_DBG_ON
-#define IODA_EEH_DBG(args...)   pr_info(args)
-#else
-#define IODA_EEH_DBG(args...)
-#endif
-
 static char *hub_diag = NULL;
 static int ioda_eeh_nb_init = 0;
 
@@ -823,17 +816,17 @@ static int ioda_eeh_next_error(struct eeh_pe **pe)
 
                 /* If OPAL API returns error, we needn't proceed */
                 if (rc != OPAL_SUCCESS) {
-                        IODA_EEH_DBG("%s: Invalid return value on "
-                                     "PHB#%x (0x%lx) from opal_pci_next_error",
-                                     __func__, hose->global_number, rc);
+                        pr_devel("%s: Invalid return value on "
+                                 "PHB#%x (0x%lx) from opal_pci_next_error",
+                                 __func__, hose->global_number, rc);
                         continue;
                 }
 
                 /* If the PHB doesn't have error, stop processing */
                 if (err_type == OPAL_EEH_NO_ERROR ||
                     severity == OPAL_EEH_SEV_NO_ERROR) {
-                        IODA_EEH_DBG("%s: No error found on PHB#%x\n",
-                                     __func__, hose->global_number);
+                        pr_devel("%s: No error found on PHB#%x\n",
+                                 __func__, hose->global_number);
                         continue;
                 }
 
@@ -842,8 +835,9 @@ static int ioda_eeh_next_error(struct eeh_pe **pe)
                  * highest priority reported upon multiple errors on the
                  * specific PHB.
                  */
-                IODA_EEH_DBG("%s: Error (%d, %d, %d) on PHB#%x\n",
-                        err_type, severity, pe_no, hose->global_number);
+                pr_devel("%s: Error (%d, %d, %llu) on PHB#%x\n",
+                         __func__, err_type, severity,
+                         frozen_pe_no, hose->global_number);
                 switch (err_type) {
                 case OPAL_EEH_IOC_ERROR:
                         if (severity == OPAL_EEH_SEV_IOC_DEAD) {
diff --git a/arch/powerpc/platforms/powernv/opal-lpc.c b/arch/powerpc/platforms/powernv/opal-lpc.c
new file mode 100644
index 000000000000..a7614bb14e17
--- /dev/null
+++ b/arch/powerpc/platforms/powernv/opal-lpc.c
@@ -0,0 +1,203 @@
+/*
+ * PowerNV LPC bus handling.
+ *
+ * Copyright 2013 IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/of.h>
+#include <linux/bug.h>
+
+#include <asm/machdep.h>
+#include <asm/firmware.h>
+#include <asm/xics.h>
+#include <asm/opal.h>
+
+static int opal_lpc_chip_id = -1;
+
+static u8 opal_lpc_inb(unsigned long port)
+{
+        int64_t rc;
+        uint32_t data;
+
+        if (opal_lpc_chip_id < 0 || port > 0xffff)
+                return 0xff;
+        rc = opal_lpc_read(opal_lpc_chip_id, OPAL_LPC_IO, port, &data, 1);
+        return rc ? 0xff : data;
+}
+
+static __le16 __opal_lpc_inw(unsigned long port)
+{
+        int64_t rc;
+        uint32_t data;
+
+        if (opal_lpc_chip_id < 0 || port > 0xfffe)
+                return 0xffff;
+        if (port & 1)
+                return (__le16)opal_lpc_inb(port) << 8 | opal_lpc_inb(port + 1);
+        rc = opal_lpc_read(opal_lpc_chip_id, OPAL_LPC_IO, port, &data, 2);
+        return rc ? 0xffff : data;
+}
+static u16 opal_lpc_inw(unsigned long port)
+{
+        return le16_to_cpu(__opal_lpc_inw(port));
+}
+
+static __le32 __opal_lpc_inl(unsigned long port)
+{
+        int64_t rc;
+        uint32_t data;
+
+        if (opal_lpc_chip_id < 0 || port > 0xfffc)
+                return 0xffffffff;
+        if (port & 3)
+                return (__le32)opal_lpc_inb(port    ) << 24 |
+                       (__le32)opal_lpc_inb(port + 1) << 16 |
+                       (__le32)opal_lpc_inb(port + 2) <<  8 |
+                               opal_lpc_inb(port + 3);
+        rc = opal_lpc_read(opal_lpc_chip_id, OPAL_LPC_IO, port, &data, 4);
+        return rc ? 0xffffffff : data;
+}
+
+static u32 opal_lpc_inl(unsigned long port)
+{
+        return le32_to_cpu(__opal_lpc_inl(port));
+}
+
+static void opal_lpc_outb(u8 val, unsigned long port)
+{
+        if (opal_lpc_chip_id < 0 || port > 0xffff)
+                return;
+        opal_lpc_write(opal_lpc_chip_id, OPAL_LPC_IO, port, val, 1);
+}
+
+static void __opal_lpc_outw(__le16 val, unsigned long port)
+{
+        if (opal_lpc_chip_id < 0 || port > 0xfffe)
+                return;
+        if (port & 1) {
+                opal_lpc_outb(val >> 8, port);
+                opal_lpc_outb(val     , port + 1);
+                return;
+        }
+        opal_lpc_write(opal_lpc_chip_id, OPAL_LPC_IO, port, val, 2);
+}
+
+static void opal_lpc_outw(u16 val, unsigned long port)
+{
+        __opal_lpc_outw(cpu_to_le16(val), port);
+}
+
+static void __opal_lpc_outl(__le32 val, unsigned long port)
+{
+        if (opal_lpc_chip_id < 0 || port > 0xfffc)
+                return;
+        if (port & 3) {
+                opal_lpc_outb(val >> 24, port);
+                opal_lpc_outb(val >> 16, port + 1);
+                opal_lpc_outb(val >>  8, port + 2);
+                opal_lpc_outb(val      , port + 3);
+                return;
+        }
+        opal_lpc_write(opal_lpc_chip_id, OPAL_LPC_IO, port, val, 4);
+}
+
+static void opal_lpc_outl(u32 val, unsigned long port)
+{
+        __opal_lpc_outl(cpu_to_le32(val), port);
+}
+
+static void opal_lpc_insb(unsigned long p, void *b, unsigned long c)
+{
+        u8 *ptr = b;
+
+        while(c--)
+                *(ptr++) = opal_lpc_inb(p);
+}
+
+static void opal_lpc_insw(unsigned long p, void *b, unsigned long c)
+{
+        __le16 *ptr = b;
+
+        while(c--)
+                *(ptr++) = __opal_lpc_inw(p);
+}
+
+static void opal_lpc_insl(unsigned long p, void *b, unsigned long c)
+{
+        __le32 *ptr = b;
+
+        while(c--)
+                *(ptr++) = __opal_lpc_inl(p);
+}
+
+static void opal_lpc_outsb(unsigned long p, const void *b, unsigned long c)
+{
+        const u8 *ptr = b;
+
+        while(c--)
+                opal_lpc_outb(*(ptr++), p);
+}
+
+static void opal_lpc_outsw(unsigned long p, const void *b, unsigned long c)
+{
+        const __le16 *ptr = b;
+
+        while(c--)
+                __opal_lpc_outw(*(ptr++), p);
+}
+
+static void opal_lpc_outsl(unsigned long p, const void *b, unsigned long c)
+{
+        const __le32 *ptr = b;
+
+        while(c--)
+                __opal_lpc_outl(*(ptr++), p);
+}
+
+static const struct ppc_pci_io opal_lpc_io = {
+        .inb    = opal_lpc_inb,
+        .inw    = opal_lpc_inw,
+        .inl    = opal_lpc_inl,
+        .outb   = opal_lpc_outb,
+        .outw   = opal_lpc_outw,
+        .outl   = opal_lpc_outl,
+        .insb   = opal_lpc_insb,
+        .insw   = opal_lpc_insw,
+        .insl   = opal_lpc_insl,
+        .outsb  = opal_lpc_outsb,
+        .outsw  = opal_lpc_outsw,
+        .outsl  = opal_lpc_outsl,
+};
+
+void opal_lpc_init(void)
+{
+        struct device_node *np;
+
+        /*
+         * Look for a Power8 LPC bus tagged as "primary",
+         * we currently support only one though the OPAL APIs
+         * support any number.
+         */
+        for_each_compatible_node(np, NULL, "ibm,power8-lpc") {
+                if (!of_device_is_available(np))
+                        continue;
+                if (!of_get_property(np, "primary", NULL))
+                        continue;
+                opal_lpc_chip_id = of_get_ibm_chip_id(np);
+                break;
+        }
+        if (opal_lpc_chip_id < 0)
+                return;
+
+        /* Setup special IO ops */
+        ppc_pci_io = opal_lpc_io;
+        isa_io_special = true;
+
+        pr_info("OPAL: Power8 LPC bus found, chip ID %d\n", opal_lpc_chip_id);
+}
diff --git a/arch/powerpc/platforms/powernv/opal-wrappers.S b/arch/powerpc/platforms/powernv/opal-wrappers.S
index e88863ffb135..8f3844535fbb 100644
--- a/arch/powerpc/platforms/powernv/opal-wrappers.S
+++ b/arch/powerpc/platforms/powernv/opal-wrappers.S
@@ -111,3 +111,8 @@ OPAL_CALL(opal_pci_next_error,			OPAL_PCI_NEXT_ERROR);
 OPAL_CALL(opal_pci_poll,                        OPAL_PCI_POLL);
 OPAL_CALL(opal_pci_msi_eoi,                     OPAL_PCI_MSI_EOI);
 OPAL_CALL(opal_pci_get_phb_diag_data2,          OPAL_PCI_GET_PHB_DIAG_DATA2);
+OPAL_CALL(opal_xscom_read,                      OPAL_XSCOM_READ);
+OPAL_CALL(opal_xscom_write,                     OPAL_XSCOM_WRITE);
+OPAL_CALL(opal_lpc_read,                        OPAL_LPC_READ);
+OPAL_CALL(opal_lpc_write,                       OPAL_LPC_WRITE);
+OPAL_CALL(opal_return_cpu,                      OPAL_RETURN_CPU);
diff --git a/arch/powerpc/platforms/powernv/opal.c b/arch/powerpc/platforms/powernv/opal.c
index 106301fd2fa5..2911abe550f1 100644
--- a/arch/powerpc/platforms/powernv/opal.c
+++ b/arch/powerpc/platforms/powernv/opal.c
@@ -380,18 +380,20 @@ static int __init opal_init(void)
                 pr_warn("opal: Node not found\n");
                 return -ENODEV;
         }
+
+        /* Register OPAL consoles if any ports */
         if (firmware_has_feature(FW_FEATURE_OPALv2))
                 consoles = of_find_node_by_path("/ibm,opal/consoles");
         else
                 consoles = of_node_get(opal_node);
-
-        /* Register serial ports */
-        for_each_child_of_node(consoles, np) {
-                if (strcmp(np->name, "serial"))
-                        continue;
-                of_platform_device_create(np, NULL, NULL);
+        if (consoles) {
+                for_each_child_of_node(consoles, np) {
+                        if (strcmp(np->name, "serial"))
+                                continue;
+                        of_platform_device_create(np, NULL, NULL);
+                }
+                of_node_put(consoles);
         }
-        of_node_put(consoles);
 
         /* Find all OPAL interrupts and request them */
         irqs = of_get_property(opal_node, "opal-interrupts", &irqlen);
@@ -422,7 +424,7 @@ void opal_shutdown(void)
 
         for (i = 0; i < opal_irq_count; i++) {
                 if (opal_irqs[i])
-                        free_irq(opal_irqs[i], 0);
+                        free_irq(opal_irqs[i], NULL);
                 opal_irqs[i] = 0;
         }
 }
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c
index d8140b125e62..74a5a5773b1f 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -1104,16 +1104,16 @@ void __init pnv_pci_init_ioda_phb(struct device_node *np,
                                   u64 hub_id, int ioda_type)
 {
         struct pci_controller *hose;
-        static int primary = 1;
         struct pnv_phb *phb;
         unsigned long size, m32map_off, iomap_off, pemap_off;
         const u64 *prop64;
         const u32 *prop32;
+        int len;
         u64 phb_id;
         void *aux;
         long rc;
 
-        pr_info(" Initializing IODA%d OPAL PHB %s\n", ioda_type, np->full_name);
+        pr_info("Initializing IODA%d OPAL PHB %s\n", ioda_type, np->full_name);
 
         prop64 = of_get_property(np, "ibm,opal-phbid", NULL);
         if (!prop64) {
@@ -1124,20 +1124,31 @@ void __init pnv_pci_init_ioda_phb(struct device_node *np,
         pr_debug("  PHB-ID  : 0x%016llx\n", phb_id);
 
         phb = alloc_bootmem(sizeof(struct pnv_phb));
-        if (phb) {
-                memset(phb, 0, sizeof(struct pnv_phb));
-                phb->hose = hose = pcibios_alloc_controller(np);
+        if (!phb) {
+                pr_err("  Out of memory !\n");
+                return;
         }
-        if (!phb || !phb->hose) {
-                pr_err("PCI: Failed to allocate PCI controller for %s\n",
+
+        /* Allocate PCI controller */
+        memset(phb, 0, sizeof(struct pnv_phb));
+        phb->hose = hose = pcibios_alloc_controller(np);
+        if (!phb->hose) {
+                pr_err("  Can't allocate PCI controller for %s\n",
                        np->full_name);
+                free_bootmem((unsigned long)phb, sizeof(struct pnv_phb));
                 return;
         }
 
         spin_lock_init(&phb->lock);
-        /* XXX Use device-tree */
-        hose->first_busno = 0;
-        hose->last_busno = 0xff;
+        prop32 = of_get_property(np, "bus-range", &len);
+        if (prop32 && len == 8) {
+                hose->first_busno = prop32[0];
+                hose->last_busno = prop32[1];
+        } else {
+                pr_warn("  Broken <bus-range> on %s\n", np->full_name);
+                hose->first_busno = 0;
+                hose->last_busno = 0xff;
+        }
         hose->private_data = phb;
         phb->hub_id = hub_id;
         phb->opal_id = phb_id;
@@ -1152,8 +1163,7 @@ void __init pnv_pci_init_ioda_phb(struct device_node *np,
                 phb->model = PNV_PHB_MODEL_UNKNOWN;
 
         /* Parse 32-bit and IO ranges (if any) */
-        pci_process_bridge_OF_ranges(phb->hose, np, primary);
-        primary = 0;
+        pci_process_bridge_OF_ranges(hose, np, !hose->global_number);
 
         /* Get registers */
         phb->regs = of_iomap(np, 0);
@@ -1177,22 +1187,23 @@ void __init pnv_pci_init_ioda_phb(struct device_node *np,
         phb->ioda.io_segsize = phb->ioda.io_size / phb->ioda.total_pe;
         phb->ioda.io_pci_base = 0; /* XXX calculate this ? */
 
-        /* Allocate aux data & arrays
-         *
-         * XXX TODO: Don't allocate io segmap on PHB3
-         */
+        /* Allocate aux data & arrays. We don't have IO ports on PHB3 */
         size = _ALIGN_UP(phb->ioda.total_pe / 8, sizeof(unsigned long));
         m32map_off = size;
         size += phb->ioda.total_pe * sizeof(phb->ioda.m32_segmap[0]);
         iomap_off = size;
-        size += phb->ioda.total_pe * sizeof(phb->ioda.io_segmap[0]);
+        if (phb->type == PNV_PHB_IODA1) {
+                iomap_off = size;
+                size += phb->ioda.total_pe * sizeof(phb->ioda.io_segmap[0]);
+        }
         pemap_off = size;
         size += phb->ioda.total_pe * sizeof(struct pnv_ioda_pe);
         aux = alloc_bootmem(size);
         memset(aux, 0, size);
         phb->ioda.pe_alloc = aux;
         phb->ioda.m32_segmap = aux + m32map_off;
-        phb->ioda.io_segmap = aux + iomap_off;
+        if (phb->type == PNV_PHB_IODA1)
+                phb->ioda.io_segmap = aux + iomap_off;
         phb->ioda.pe_array = aux + pemap_off;
         set_bit(0, phb->ioda.pe_alloc);
 
diff --git a/arch/powerpc/platforms/powernv/powernv.h b/arch/powerpc/platforms/powernv/powernv.h
index a1c6f83fc391..de6819be1f95 100644
--- a/arch/powerpc/platforms/powernv/powernv.h
+++ b/arch/powerpc/platforms/powernv/powernv.h
@@ -15,4 +15,6 @@ static inline void pnv_pci_init(void) { }
 static inline void pnv_pci_shutdown(void) { }
 #endif
 
+extern void pnv_lpc_init(void);
+
 #endif /* _POWERNV_H */
diff --git a/arch/powerpc/platforms/powernv/setup.c b/arch/powerpc/platforms/powernv/setup.c
index 84438af96c05..e239dcfa224c 100644
--- a/arch/powerpc/platforms/powernv/setup.c
+++ b/arch/powerpc/platforms/powernv/setup.c
@@ -31,6 +31,7 @@
 #include <asm/xics.h>
 #include <asm/rtas.h>
 #include <asm/opal.h>
+#include <asm/kexec.h>
 
 #include "powernv.h"
 
@@ -54,6 +55,12 @@ static void __init pnv_setup_arch(void)
 
 static void __init pnv_init_early(void)
 {
+        /*
+         * Initialize the LPC bus now so that legacy serial
+         * ports can be found on it
+         */
+        opal_lpc_init();
+
 #ifdef CONFIG_HVC_OPAL
         if (firmware_has_feature(FW_FEATURE_OPAL))
                 hvc_opal_init_early();
@@ -147,6 +154,16 @@ static void pnv_shutdown(void)
 static void pnv_kexec_cpu_down(int crash_shutdown, int secondary)
 {
         xics_kexec_teardown_cpu(secondary);
+
+        /* Return secondary CPUs to firmware on OPAL v3 */
+        if (firmware_has_feature(FW_FEATURE_OPALv3) && secondary) {
+                mb();
+                get_paca()->kexec_state = KEXEC_STATE_REAL_MODE;
+                mb();
+
+                /* Return the CPU to OPAL */
+                opal_return_cpu();
+        }
 }
 #endif /* CONFIG_KEXEC */
 
diff --git a/arch/powerpc/platforms/powernv/smp.c b/arch/powerpc/platforms/powernv/smp.c
index 89e3857af4e0..908672bdcea6 100644
--- a/arch/powerpc/platforms/powernv/smp.c
+++ b/arch/powerpc/platforms/powernv/smp.c
@@ -46,22 +46,6 @@ static void pnv_smp_setup_cpu(int cpu)
                 xics_setup_cpu();
 }
 
-static int pnv_smp_cpu_bootable(unsigned int nr)
-{
-        /* Special case - we inhibit secondary thread startup
-         * during boot if the user requests it.
-         */
-        if (system_state == SYSTEM_BOOTING && cpu_has_feature(CPU_FTR_SMT)) {
-                if (!smt_enabled_at_boot && cpu_thread_in_core(nr) != 0)
-                        return 0;
-                if (smt_enabled_at_boot
-                    && cpu_thread_in_core(nr) >= smt_enabled_at_boot)
-                        return 0;
-        }
-
-        return 1;
-}
-
 int pnv_smp_kick_cpu(int nr)
 {
         unsigned int pcpu = get_hard_smp_processor_id(nr);
@@ -195,7 +179,7 @@ static struct smp_ops_t pnv_smp_ops = {
         .probe          = xics_smp_probe,
         .kick_cpu       = pnv_smp_kick_cpu,
         .setup_cpu      = pnv_smp_setup_cpu,
-        .cpu_bootable   = pnv_smp_cpu_bootable,
+        .cpu_bootable   = smp_generic_cpu_bootable,
 #ifdef CONFIG_HOTPLUG_CPU
         .cpu_disable    = pnv_smp_cpu_disable,
         .cpu_die        = generic_cpu_die,
diff --git a/arch/powerpc/platforms/pseries/Makefile b/arch/powerpc/platforms/pseries/Makefile
index 8ae010381316..6c61ec5ee914 100644
--- a/arch/powerpc/platforms/pseries/Makefile
+++ b/arch/powerpc/platforms/pseries/Makefile
@@ -22,6 +22,7 @@ obj-$(CONFIG_CMM)		+= cmm.o
 obj-$(CONFIG_DTL)               += dtl.o
 obj-$(CONFIG_IO_EVENT_IRQ)      += io_event_irq.o
 obj-$(CONFIG_PSERIES_IDLE)      += processor_idle.o
+obj-$(CONFIG_LPARCFG)           += lparcfg.o
 
 ifeq ($(CONFIG_PPC_PSERIES),y)
 obj-$(CONFIG_SUSPEND)           += suspend.o
diff --git a/arch/powerpc/platforms/pseries/cmm.c b/arch/powerpc/platforms/pseries/cmm.c
index c638535753df..1e561bef459b 100644
--- a/arch/powerpc/platforms/pseries/cmm.c
+++ b/arch/powerpc/platforms/pseries/cmm.c
@@ -40,8 +40,7 @@
 #include <asm/pgalloc.h>
 #include <asm/uaccess.h>
 #include <linux/memory.h>
-
-#include "plpar_wrappers.h"
+#include <asm/plpar_wrappers.h>
 
 #define CMM_DRIVER_VERSION      "1.0.0"
 #define CMM_DEFAULT_DELAY       1
diff --git a/arch/powerpc/platforms/pseries/dlpar.c b/arch/powerpc/platforms/pseries/dlpar.c
index a1a7b9a67ffd..7cfdaae1721a 100644
--- a/arch/powerpc/platforms/pseries/dlpar.c
+++ b/arch/powerpc/platforms/pseries/dlpar.c
@@ -63,26 +63,32 @@ static struct property *dlpar_parse_cc_property(struct cc_workarea *ccwa)
         return prop;
 }
 
-static struct device_node *dlpar_parse_cc_node(struct cc_workarea *ccwa)
+static struct device_node *dlpar_parse_cc_node(struct cc_workarea *ccwa,
+                                               const char *path)
 {
         struct device_node *dn;
         char *name;
 
+        /* If parent node path is "/" advance path to NULL terminator to
+         * prevent double leading slashs in full_name.
+         */
+        if (!path[1])
+                path++;
+
         dn = kzalloc(sizeof(*dn), GFP_KERNEL);
         if (!dn)
                 return NULL;
 
-        /* The configure connector reported name does not contain a
-         * preceding '/', so we allocate a buffer large enough to
-         * prepend this to the full_name.
-         */
         name = (char *)ccwa + ccwa->name_offset;
-        dn->full_name = kasprintf(GFP_KERNEL, "/%s", name);
+        dn->full_name = kasprintf(GFP_KERNEL, "%s/%s", path, name);
         if (!dn->full_name) {
                 kfree(dn);
                 return NULL;
         }
 
+        of_node_set_flag(dn, OF_DYNAMIC);
+        kref_init(&dn->kref);
+
         return dn;
 }
 
@@ -120,7 +126,8 @@ void dlpar_free_cc_nodes(struct device_node *dn)
 #define CALL_AGAIN      -2
 #define ERR_CFG_USE     -9003
 
-struct device_node *dlpar_configure_connector(u32 drc_index)
+struct device_node *dlpar_configure_connector(u32 drc_index,
+                                              struct device_node *parent)
 {
         struct device_node *dn;
         struct device_node *first_dn = NULL;
@@ -129,6 +136,7 @@ struct device_node *dlpar_configure_connector(u32 drc_index)
         struct property *last_property = NULL;
         struct cc_workarea *ccwa;
         char *data_buf;
+        const char *parent_path = parent->full_name;
         int cc_token;
         int rc = -1;
 
@@ -162,7 +170,7 @@ struct device_node *dlpar_configure_connector(u32 drc_index)
                         break;
 
                 case NEXT_SIBLING:
-                        dn = dlpar_parse_cc_node(ccwa);
+                        dn = dlpar_parse_cc_node(ccwa, parent_path);
                         if (!dn)
                                 goto cc_error;
 
@@ -172,13 +180,17 @@ struct device_node *dlpar_configure_connector(u32 drc_index)
                         break;
 
                 case NEXT_CHILD:
-                        dn = dlpar_parse_cc_node(ccwa);
+                        if (first_dn)
+                                parent_path = last_dn->full_name;
+
+                        dn = dlpar_parse_cc_node(ccwa, parent_path);
                         if (!dn)
                                 goto cc_error;
 
-                        if (!first_dn)
+                        if (!first_dn) {
+                                dn->parent = parent;
                                 first_dn = dn;
-                        else {
+                        } else {
                                 dn->parent = last_dn;
                                 if (last_dn)
                                         last_dn->child = dn;
@@ -202,6 +214,7 @@ struct device_node *dlpar_configure_connector(u32 drc_index)
 
                 case PREV_PARENT:
                         last_dn = last_dn->parent;
+                        parent_path = last_dn->parent->full_name;
                         break;
 
                 case CALL_AGAIN:
@@ -256,8 +269,6 @@ int dlpar_attach_node(struct device_node *dn)
 {
         int rc;
 
-        of_node_set_flag(dn, OF_DYNAMIC);
-        kref_init(&dn->kref);
         dn->parent = derive_parent(dn->full_name);
         if (!dn->parent)
                 return -ENOMEM;
@@ -275,8 +286,15 @@ int dlpar_attach_node(struct device_node *dn)
 
 int dlpar_detach_node(struct device_node *dn)
 {
+        struct device_node *child;
         int rc;
 
+        child = of_get_next_child(dn, NULL);
+        while (child) {
+                dlpar_detach_node(child);
+                child = of_get_next_child(dn, child);
+        }
+
         rc = of_detach_node(dn);
         if (rc)
                 return rc;
@@ -382,9 +400,8 @@ out:
 
 static ssize_t dlpar_cpu_probe(const char *buf, size_t count)
 {
-        struct device_node *dn;
+        struct device_node *dn, *parent;
         unsigned long drc_index;
-        char *cpu_name;
         int rc;
 
         cpu_hotplug_driver_lock();
@@ -394,25 +411,19 @@ static ssize_t dlpar_cpu_probe(const char *buf, size_t count)
                 goto out;
         }
 
-        dn = dlpar_configure_connector(drc_index);
-        if (!dn) {
-                rc = -EINVAL;
+        parent = of_find_node_by_path("/cpus");
+        if (!parent) {
+                rc = -ENODEV;
                 goto out;
         }
 
-        /* configure-connector reports cpus as living in the base
-         * directory of the device tree.  CPUs actually live in the
-         * cpus directory so we need to fixup the full_name.
-         */
-        cpu_name = kasprintf(GFP_KERNEL, "/cpus%s", dn->full_name);
-        if (!cpu_name) {
-                dlpar_free_cc_nodes(dn);
-                rc = -ENOMEM;
+        dn = dlpar_configure_connector(drc_index, parent);
+        if (!dn) {
+                rc = -EINVAL;
                 goto out;
         }
 
-        kfree(dn->full_name);
-        dn->full_name = cpu_name;
+        of_node_put(parent);
 
         rc = dlpar_acquire_drc(drc_index);
         if (rc) {
diff --git a/arch/powerpc/platforms/pseries/dtl.c b/arch/powerpc/platforms/pseries/dtl.c
index 0cc0ac07a55d..5db66f1fbc26 100644
--- a/arch/powerpc/platforms/pseries/dtl.c
+++ b/arch/powerpc/platforms/pseries/dtl.c
@@ -29,8 +29,7 @@
 #include <asm/firmware.h>
 #include <asm/lppaca.h>
 #include <asm/debug.h>
-
-#include "plpar_wrappers.h"
+#include <asm/plpar_wrappers.h>
 
 struct dtl {
         struct dtl_entry        *buf;
@@ -87,7 +86,7 @@ static void consume_dtle(struct dtl_entry *dtle, u64 index)
         barrier();
 
         /* check for hypervisor ring buffer overflow, ignore this entry if so */
-        if (index + N_DISPATCH_LOG < vpa->dtl_idx)
+        if (index + N_DISPATCH_LOG < be64_to_cpu(vpa->dtl_idx))
                 return;
 
         ++wp;
diff --git a/arch/powerpc/platforms/pseries/hotplug-cpu.c b/arch/powerpc/platforms/pseries/hotplug-cpu.c
index 217ca5c75b20..82789e79e539 100644
--- a/arch/powerpc/platforms/pseries/hotplug-cpu.c
+++ b/arch/powerpc/platforms/pseries/hotplug-cpu.c
@@ -30,7 +30,8 @@
 #include <asm/machdep.h>
 #include <asm/vdso_datapage.h>
 #include <asm/xics.h>
-#include "plpar_wrappers.h"
+#include <asm/plpar_wrappers.h>
+
 #include "offline_states.h"
 
 /* This version can't take the spinlock, because it never returns */
@@ -123,7 +124,7 @@ static void pseries_mach_cpu_die(void)
                 cede_latency_hint = 2;
 
                 get_lppaca()->idle = 1;
-                if (!get_lppaca()->shared_proc)
+                if (!lppaca_shared_proc(get_lppaca()))
                         get_lppaca()->donate_dedicated_cpu = 1;
 
                 while (get_preferred_offline_state(cpu) == CPU_STATE_INACTIVE) {
@@ -137,7 +138,7 @@ static void pseries_mach_cpu_die(void)
 
                 local_irq_disable();
 
-                if (!get_lppaca()->shared_proc)
+                if (!lppaca_shared_proc(get_lppaca()))
                         get_lppaca()->donate_dedicated_cpu = 0;
                 get_lppaca()->idle = 0;
 
diff --git a/arch/powerpc/platforms/pseries/hvconsole.c b/arch/powerpc/platforms/pseries/hvconsole.c
index b344f94b0400..849b29b3e9ae 100644
--- a/arch/powerpc/platforms/pseries/hvconsole.c
+++ b/arch/powerpc/platforms/pseries/hvconsole.c
@@ -28,7 +28,7 @@
 #include <linux/errno.h>
 #include <asm/hvcall.h>
 #include <asm/hvconsole.h>
-#include "plpar_wrappers.h"
+#include <asm/plpar_wrappers.h>
 
 /**
  * hvc_get_chars - retrieve characters from firmware for denoted vterm adatper
@@ -40,10 +40,16 @@
  */
 int hvc_get_chars(uint32_t vtermno, char *buf, int count)
 {
-        unsigned long got;
+        long ret;
+        unsigned long retbuf[PLPAR_HCALL_BUFSIZE];
+        unsigned long *lbuf = (unsigned long *)buf;
+
+        ret = plpar_hcall(H_GET_TERM_CHAR, retbuf, vtermno);
+        lbuf[0] = be64_to_cpu(retbuf[1]);
+        lbuf[1] = be64_to_cpu(retbuf[2]);
 
-        if (plpar_get_term_char(vtermno, &got, buf) == H_SUCCESS)
-                return got;
+        if (ret == H_SUCCESS)
+                return retbuf[0];
 
         return 0;
 }
@@ -69,8 +75,9 @@ int hvc_put_chars(uint32_t vtermno, const char *buf, int count)
         if (count > MAX_VIO_PUT_CHARS)
                 count = MAX_VIO_PUT_CHARS;
 
-        ret = plpar_hcall_norets(H_PUT_TERM_CHAR, vtermno, count, lbuf[0],
-                                 lbuf[1]);
+        ret = plpar_hcall_norets(H_PUT_TERM_CHAR, vtermno, count,
+                                 cpu_to_be64(lbuf[0]),
+                                 cpu_to_be64(lbuf[1]));
         if (ret == H_SUCCESS)
                 return count;
         if (ret == H_BUSY)
diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c
index 23fc1dcf4434..0307901e4132 100644
--- a/arch/powerpc/platforms/pseries/iommu.c
+++ b/arch/powerpc/platforms/pseries/iommu.c
@@ -48,8 +48,7 @@
 #include <asm/ppc-pci.h>
 #include <asm/udbg.h>
 #include <asm/mmzone.h>
-
-#include "plpar_wrappers.h"
+#include <asm/plpar_wrappers.h>
 
 
 static void tce_invalidate_pSeries_sw(struct iommu_table *tbl,
@@ -530,7 +529,7 @@ static void iommu_table_setparms(struct pci_controller *phb,
 static void iommu_table_setparms_lpar(struct pci_controller *phb,
                                       struct device_node *dn,
                                       struct iommu_table *tbl,
-                                      const void *dma_window)
+                                      const __be32 *dma_window)
 {
         unsigned long offset, size;
 
@@ -630,7 +629,7 @@ static void pci_dma_bus_setup_pSeriesLP(struct pci_bus *bus)
         struct iommu_table *tbl;
         struct device_node *dn, *pdn;
         struct pci_dn *ppci;
-        const void *dma_window = NULL;
+        const __be32 *dma_window = NULL;
 
         dn = pci_bus_to_OF_node(bus);
 
@@ -1152,7 +1151,7 @@ static void pci_dma_dev_setup_pSeriesLP(struct pci_dev *dev)
 {
         struct device_node *pdn, *dn;
         struct iommu_table *tbl;
-        const void *dma_window = NULL;
+        const __be32 *dma_window = NULL;
         struct pci_dn *pci;
 
         pr_debug("pci_dma_dev_setup_pSeriesLP: %s\n", pci_name(dev));
@@ -1201,7 +1200,7 @@ static int dma_set_mask_pSeriesLP(struct device *dev, u64 dma_mask)
         bool ddw_enabled = false;
         struct device_node *pdn, *dn;
         struct pci_dev *pdev;
-        const void *dma_window = NULL;
+        const __be32 *dma_window = NULL;
         u64 dma_offset;
 
         if (!dev->dma_mask)
diff --git a/arch/powerpc/platforms/pseries/kexec.c b/arch/powerpc/platforms/pseries/kexec.c
index 7d94bdc63d50..13fa95b3aa8b 100644
--- a/arch/powerpc/platforms/pseries/kexec.c
+++ b/arch/powerpc/platforms/pseries/kexec.c
@@ -17,9 +17,9 @@
 #include <asm/mpic.h>
 #include <asm/xics.h>
 #include <asm/smp.h>
+#include <asm/plpar_wrappers.h>
 
 #include "pseries.h"
-#include "plpar_wrappers.h"
 
 static void pseries_kexec_cpu_down(int crash_shutdown, int secondary)
 {
diff --git a/arch/powerpc/platforms/pseries/lpar.c b/arch/powerpc/platforms/pseries/lpar.c
index 8bad880bd177..356bc75ca74f 100644
--- a/arch/powerpc/platforms/pseries/lpar.c
+++ b/arch/powerpc/platforms/pseries/lpar.c
@@ -41,8 +41,8 @@
 #include <asm/smp.h>
 #include <asm/trace.h>
 #include <asm/firmware.h>
+#include <asm/plpar_wrappers.h>
 
-#include "plpar_wrappers.h"
 #include "pseries.h"
 
 /* Flag bits for H_BULK_REMOVE */
@@ -68,6 +68,12 @@ void vpa_init(int cpu)
         struct paca_struct *pp;
         struct dtl_entry *dtl;
 
+        /*
+         * The spec says it "may be problematic" if CPU x registers the VPA of
+         * CPU y. We should never do that, but wail if we ever do.
+         */
+        WARN_ON(cpu != smp_processor_id());
+
         if (cpu_has_feature(CPU_FTR_ALTIVEC))
                 lppaca_of(cpu).vmxregs_in_use = 1;
 
@@ -106,7 +112,7 @@ void vpa_init(int cpu)
                 lppaca_of(cpu).dtl_idx = 0;
 
                 /* hypervisor reads buffer length from this field */
-                dtl->enqueue_to_dispatch_time = DISPATCH_LOG_BYTES;
+                dtl->enqueue_to_dispatch_time = cpu_to_be32(DISPATCH_LOG_BYTES);
                 ret = register_dtl(hwcpu, __pa(dtl));
                 if (ret)
                         pr_err("WARNING: DTL registration of cpu %d (hw %d) "
@@ -724,7 +730,7 @@ int h_get_mpp(struct hvcall_mpp_data *mpp_data)
 
         mpp_data->mem_weight = (retbuf[3] >> 7 * 8) & 0xff;
         mpp_data->unallocated_mem_weight = (retbuf[3] >> 6 * 8) & 0xff;
-        mpp_data->unallocated_entitlement = retbuf[3] & 0xffffffffffff;
+        mpp_data->unallocated_entitlement = retbuf[3] & 0xffffffffffffUL;
 
         mpp_data->pool_size = retbuf[4];
         mpp_data->loan_request = retbuf[5];
diff --git a/arch/powerpc/kernel/lparcfg.c b/arch/powerpc/platforms/pseries/lparcfg.c
index e2a0a162299b..e738007eae64 100644
--- a/arch/powerpc/kernel/lparcfg.c
+++ b/arch/powerpc/platforms/pseries/lparcfg.c
@@ -171,7 +171,7 @@ static void parse_ppp_data(struct seq_file *m)
                    ppp_data.active_system_procs);
 
         /* pool related entries are appropriate for shared configs */
-        if (lppaca_of(0).shared_proc) {
+        if (lppaca_shared_proc(get_lppaca())) {
                 unsigned long pool_idle_time, pool_procs;
 
                 seq_printf(m, "pool=%d\n", ppp_data.pool_num);
@@ -393,8 +393,8 @@ static void pseries_cmo_data(struct seq_file *m)
                 return;
 
         for_each_possible_cpu(cpu) {
-                cmo_faults += lppaca_of(cpu).cmo_faults;
-                cmo_fault_time += lppaca_of(cpu).cmo_fault_time;
+                cmo_faults += be64_to_cpu(lppaca_of(cpu).cmo_faults);
+                cmo_fault_time += be64_to_cpu(lppaca_of(cpu).cmo_fault_time);
         }
 
         seq_printf(m, "cmo_faults=%lu\n", cmo_faults);
@@ -412,8 +412,9 @@ static void splpar_dispatch_data(struct seq_file *m)
         unsigned long dispatch_dispersions = 0;
 
         for_each_possible_cpu(cpu) {
-                dispatches += lppaca_of(cpu).yield_count;
-                dispatch_dispersions += lppaca_of(cpu).dispersion_count;
+                dispatches += be32_to_cpu(lppaca_of(cpu).yield_count);
+                dispatch_dispersions +=
+                        be32_to_cpu(lppaca_of(cpu).dispersion_count);
         }
 
         seq_printf(m, "dispatches=%lu\n", dispatches);
@@ -480,7 +481,8 @@ static int pseries_lparcfg_data(struct seq_file *m, void *v)
         seq_printf(m, "partition_potential_processors=%d\n",
                    partition_potential_processors);
 
-        seq_printf(m, "shared_processor_mode=%d\n", lppaca_of(0).shared_proc);
+        seq_printf(m, "shared_processor_mode=%d\n",
+                   lppaca_shared_proc(get_lppaca()));
 
         seq_printf(m, "slb_size=%d\n", mmu_slb_size);
 
diff --git a/arch/powerpc/platforms/pseries/mobility.c b/arch/powerpc/platforms/pseries/mobility.c
index 3d01eee9ffb1..cde4e0a095ae 100644
--- a/arch/powerpc/platforms/pseries/mobility.c
+++ b/arch/powerpc/platforms/pseries/mobility.c
@@ -28,7 +28,7 @@ struct update_props_workarea {
         u32 state;
         u64 reserved;
         u32 nprops;
-};
+} __packed;
 
 #define NODE_ACTION_MASK        0xff000000
 #define NODE_COUNT_MASK         0x00ffffff
@@ -62,6 +62,7 @@ static int delete_dt_node(u32 phandle)
                 return -ENOENT;
 
         dlpar_detach_node(dn);
+        of_node_put(dn);
         return 0;
 }
 
@@ -119,7 +120,7 @@ static int update_dt_property(struct device_node *dn, struct property **prop,
 
         if (!more) {
                 of_update_property(dn, new_prop);
-                new_prop = NULL;
+                *prop = NULL;
         }
 
         return 0;
@@ -130,7 +131,7 @@ static int update_dt_node(u32 phandle, s32 scope)
         struct update_props_workarea *upwa;
         struct device_node *dn;
         struct property *prop = NULL;
-        int i, rc;
+        int i, rc, rtas_rc;
         char *prop_data;
         char *rtas_buf;
         int update_properties_token;
@@ -154,25 +155,26 @@ static int update_dt_node(u32 phandle, s32 scope)
         upwa->phandle = phandle;
 
         do {
-                rc = mobility_rtas_call(update_properties_token, rtas_buf,
+                rtas_rc = mobility_rtas_call(update_properties_token, rtas_buf,
                                         scope);
-                if (rc < 0)
+                if (rtas_rc < 0)
                         break;
 
                 prop_data = rtas_buf + sizeof(*upwa);
 
-                /* The first element of the buffer is the path of the node
-                 * being updated in the form of a 8 byte string length
-                 * followed by the string. Skip past this to get to the
-                 * properties being updated.
+                /* On the first call to ibm,update-properties for a node the
+                 * the first property value descriptor contains an empty
+                 * property name, the property value length encoded as u32,
+                 * and the property value is the node path being updated.
                  */
-                vd = *prop_data++;
-                prop_data += vd;
+                if (*prop_data == 0) {
+                        prop_data++;
+                        vd = *(u32 *)prop_data;
+                        prop_data += vd + sizeof(vd);
+                        upwa->nprops--;
+                }
 
-                /* The path we skipped over is counted as one of the elements
-                 * returned so start counting at one.
-                 */
-                for (i = 1; i < upwa->nprops; i++) {
+                for (i = 0; i < upwa->nprops; i++) {
                         char *prop_name;
 
                         prop_name = prop_data;
@@ -202,7 +204,7 @@ static int update_dt_node(u32 phandle, s32 scope)
                                 prop_data += vd;
                         }
                 }
-        } while (rc == 1);
+        } while (rtas_rc == 1);
 
         of_node_put(dn);
         kfree(rtas_buf);
@@ -215,17 +217,14 @@ static int add_dt_node(u32 parent_phandle, u32 drc_index)
         struct device_node *parent_dn;
         int rc;
 
-        dn = dlpar_configure_connector(drc_index);
-        if (!dn)
+        parent_dn = of_find_node_by_phandle(parent_phandle);
+        if (!parent_dn)
                 return -ENOENT;
 
-        parent_dn = of_find_node_by_phandle(parent_phandle);
-        if (!parent_dn) {
-                dlpar_free_cc_nodes(dn);
+        dn = dlpar_configure_connector(drc_index, parent_dn);
+        if (!dn)
                 return -ENOENT;
-        }
 
-        dn->parent = parent_dn;
         rc = dlpar_attach_node(dn);
         if (rc)
                 dlpar_free_cc_nodes(dn);
diff --git a/arch/powerpc/platforms/pseries/processor_idle.c b/arch/powerpc/platforms/pseries/processor_idle.c
index 4644efa06941..a166e38bd683 100644
--- a/arch/powerpc/platforms/pseries/processor_idle.c
+++ b/arch/powerpc/platforms/pseries/processor_idle.c
@@ -18,9 +18,7 @@
 #include <asm/machdep.h>
 #include <asm/firmware.h>
 #include <asm/runlatch.h>
-
-#include "plpar_wrappers.h"
-#include "pseries.h"
+#include <asm/plpar_wrappers.h>
 
 struct cpuidle_driver pseries_idle_driver = {
         .name             = "pseries_idle",
@@ -45,7 +43,11 @@ static inline void idle_loop_prolog(unsigned long *in_purr)
 
 static inline void idle_loop_epilog(unsigned long in_purr)
 {
-        get_lppaca()->wait_state_cycles += mfspr(SPRN_PURR) - in_purr;
+        u64 wait_cycles;
+
+        wait_cycles = be64_to_cpu(get_lppaca()->wait_state_cycles);
+        wait_cycles += mfspr(SPRN_PURR) - in_purr;
+        get_lppaca()->wait_state_cycles = cpu_to_be64(wait_cycles);
         get_lppaca()->idle = 0;
 }
 
@@ -308,7 +310,7 @@ static int pseries_idle_probe(void)
                 return -EPERM;
         }
 
-        if (get_lppaca()->shared_proc)
+        if (lppaca_shared_proc(get_lppaca()))
                 cpuidle_state_table = shared_states;
         else
                 cpuidle_state_table = dedicated_states;
diff --git a/arch/powerpc/platforms/pseries/pseries.h b/arch/powerpc/platforms/pseries/pseries.h
index c2a3a258001c..99219530ea4a 100644
--- a/arch/powerpc/platforms/pseries/pseries.h
+++ b/arch/powerpc/platforms/pseries/pseries.h
@@ -56,13 +56,10 @@ extern void hvc_vio_init_early(void);
 /* Dynamic logical Partitioning/Mobility */
 extern void dlpar_free_cc_nodes(struct device_node *);
 extern void dlpar_free_cc_property(struct property *);
-extern struct device_node *dlpar_configure_connector(u32);
+extern struct device_node *dlpar_configure_connector(u32, struct device_node *);
 extern int dlpar_attach_node(struct device_node *);
 extern int dlpar_detach_node(struct device_node *);
 
-/* Snooze Delay, pseries_idle */
-DECLARE_PER_CPU(long, smt_snooze_delay);
-
 /* PCI root bridge prepare function override for pseries */
 struct pci_host_bridge;
 int pseries_root_bridge_prepare(struct pci_host_bridge *bridge);
diff --git a/arch/powerpc/platforms/pseries/pseries_energy.c b/arch/powerpc/platforms/pseries/pseries_energy.c
index a91e6dadda2c..92767791f93b 100644
--- a/arch/powerpc/platforms/pseries/pseries_energy.c
+++ b/arch/powerpc/platforms/pseries/pseries_energy.c
@@ -108,8 +108,8 @@ err:
  * energy consumption.
  */
 
-#define FLAGS_MODE1     0x004E200000080E01
-#define FLAGS_MODE2     0x004E200000080401
+#define FLAGS_MODE1     0x004E200000080E01UL
+#define FLAGS_MODE2     0x004E200000080401UL
 #define FLAGS_ACTIVATE  0x100
 
 static ssize_t get_best_energy_list(char *page, int activate)
diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c
index c11c8238797c..d64feb3ea0be 100644
--- a/arch/powerpc/platforms/pseries/setup.c
+++ b/arch/powerpc/platforms/pseries/setup.c
@@ -66,8 +66,8 @@
 #include <asm/firmware.h>
 #include <asm/eeh.h>
 #include <asm/reg.h>
+#include <asm/plpar_wrappers.h>
 
-#include "plpar_wrappers.h"
 #include "pseries.h"
 
 int CMO_PrPSP = -1;
@@ -183,7 +183,7 @@ static void __init pseries_mpic_init_IRQ(void)
         np = of_find_node_by_path("/");
         naddr = of_n_addr_cells(np);
         opprop = of_get_property(np, "platform-open-pic", &opplen);
-        if (opprop != 0) {
+        if (opprop != NULL) {
                 openpic_addr = of_read_number(opprop, naddr);
                 printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr);
         }
@@ -323,7 +323,7 @@ static int alloc_dispatch_logs(void)
         get_paca()->lppaca_ptr->dtl_idx = 0;
 
         /* hypervisor reads buffer length from this field */
-        dtl->enqueue_to_dispatch_time = DISPATCH_LOG_BYTES;
+        dtl->enqueue_to_dispatch_time = cpu_to_be32(DISPATCH_LOG_BYTES);
         ret = register_dtl(hard_smp_processor_id(), __pa(dtl));
         if (ret)
                 pr_err("WARNING: DTL registration of cpu %d (hw %d) failed "
diff --git a/arch/powerpc/platforms/pseries/smp.c b/arch/powerpc/platforms/pseries/smp.c
index 306643cc9dbc..1c1771a40250 100644
--- a/arch/powerpc/platforms/pseries/smp.c
+++ b/arch/powerpc/platforms/pseries/smp.c
@@ -43,8 +43,8 @@
 #include <asm/cputhreads.h>
 #include <asm/xics.h>
 #include <asm/dbell.h>
+#include <asm/plpar_wrappers.h>
 
-#include "plpar_wrappers.h"
 #include "pseries.h"
 #include "offline_states.h"
 
@@ -187,22 +187,6 @@ static int smp_pSeries_kick_cpu(int nr)
         return 0;
 }
 
-static int smp_pSeries_cpu_bootable(unsigned int nr)
-{
-        /* Special case - we inhibit secondary thread startup
-         * during boot if the user requests it.
-         */
-        if (system_state == SYSTEM_BOOTING && cpu_has_feature(CPU_FTR_SMT)) {
-                if (!smt_enabled_at_boot && cpu_thread_in_core(nr) != 0)
-                        return 0;
-                if (smt_enabled_at_boot
-                    && cpu_thread_in_core(nr) >= smt_enabled_at_boot)
-                        return 0;
-        }
-
-        return 1;
-}
-
 /* Only used on systems that support multiple IPI mechanisms */
 static void pSeries_cause_ipi_mux(int cpu, unsigned long data)
 {
@@ -237,7 +221,7 @@ static struct smp_ops_t pSeries_xics_smp_ops = {
         .probe          = pSeries_smp_probe,
         .kick_cpu       = smp_pSeries_kick_cpu,
         .setup_cpu      = smp_xics_setup_cpu,
-        .cpu_bootable   = smp_pSeries_cpu_bootable,
+        .cpu_bootable   = smp_generic_cpu_bootable,
 };
 
 /* This is called very early */
diff --git a/arch/powerpc/platforms/wsp/wsp.h b/arch/powerpc/platforms/wsp/wsp.h
index 62ef21afb89a..a563a8aaf812 100644
--- a/arch/powerpc/platforms/wsp/wsp.h
+++ b/arch/powerpc/platforms/wsp/wsp.h
@@ -17,7 +17,6 @@ extern void scom_init_wsp(void);
 extern void a2_setup_smp(void);
 extern int a2_scom_startup_cpu(unsigned int lcpu, int thr_idx,
                                struct device_node *np);
-extern int smp_a2_cpu_bootable(unsigned int nr);
 extern int smp_a2_kick_cpu(int nr);
 
 extern void opb_pic_init(void);
diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c
index ab02db3d02d8..77efbaec7b9c 100644
--- a/arch/powerpc/sysdev/fsl_msi.c
+++ b/arch/powerpc/sysdev/fsl_msi.c
@@ -28,6 +28,18 @@
 #include "fsl_msi.h"
 #include "fsl_pci.h"
 
+#define MSIIR_OFFSET_MASK       0xfffff
+#define MSIIR_IBS_SHIFT         0
+#define MSIIR_SRS_SHIFT         5
+#define MSIIR1_IBS_SHIFT        4
+#define MSIIR1_SRS_SHIFT        0
+#define MSI_SRS_MASK            0xf
+#define MSI_IBS_MASK            0x1f
+
+#define msi_hwirq(msi, msir_index, intr_index) \
+                ((msir_index) << (msi)->srs_shift | \
+                 ((intr_index) << (msi)->ibs_shift))
+
 static LIST_HEAD(msi_head);
 
 struct fsl_msi_feature {
@@ -80,18 +92,19 @@ static const struct irq_domain_ops fsl_msi_host_ops = {
 
 static int fsl_msi_init_allocator(struct fsl_msi *msi_data)
 {
-        int rc;
+        int rc, hwirq;
 
-        rc = msi_bitmap_alloc(&msi_data->bitmap, NR_MSI_IRQS,
+        rc = msi_bitmap_alloc(&msi_data->bitmap, NR_MSI_IRQS_MAX,
                               msi_data->irqhost->of_node);
         if (rc)
                 return rc;
 
-        rc = msi_bitmap_reserve_dt_hwirqs(&msi_data->bitmap);
-        if (rc < 0) {
-                msi_bitmap_free(&msi_data->bitmap);
-                return rc;
-        }
+        /*
+         * Reserve all the hwirqs
+         * The available hwirqs will be released in fsl_msi_setup_hwirq()
+         */
+        for (hwirq = 0; hwirq < NR_MSI_IRQS_MAX; hwirq++)
+                msi_bitmap_reserve_hwirq(&msi_data->bitmap, hwirq);
 
         return 0;
 }
@@ -144,8 +157,9 @@ static void fsl_compose_msi_msg(struct pci_dev *pdev, int hwirq,
 
         msg->data = hwirq;
 
-        pr_debug("%s: allocated srs: %d, ibs: %d\n",
-                __func__, hwirq / IRQS_PER_MSI_REG, hwirq % IRQS_PER_MSI_REG);
+        pr_debug("%s: allocated srs: %d, ibs: %d\n", __func__,
+                 (hwirq >> msi_data->srs_shift) & MSI_SRS_MASK,
+                 (hwirq >> msi_data->ibs_shift) & MSI_IBS_MASK);
 }
 
 static int fsl_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
@@ -255,7 +269,7 @@ static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
 
         msir_index = cascade_data->index;
 
-        if (msir_index >= NR_MSI_REG)
+        if (msir_index >= NR_MSI_REG_MAX)
                 cascade_irq = NO_IRQ;
 
         irqd_set_chained_irq_inprogress(idata);
@@ -285,8 +299,8 @@ static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
                 intr_index = ffs(msir_value) - 1;
 
                 cascade_irq = irq_linear_revmap(msi_data->irqhost,
-                                msir_index * IRQS_PER_MSI_REG +
-                                        intr_index + have_shift);
+                                msi_hwirq(msi_data, msir_index,
+                                          intr_index + have_shift));
                 if (cascade_irq != NO_IRQ)
                         generic_handle_irq(cascade_irq);
                 have_shift += intr_index + 1;
@@ -316,7 +330,7 @@ static int fsl_of_msi_remove(struct platform_device *ofdev)
 
         if (msi->list.prev != NULL)
                 list_del(&msi->list);
-        for (i = 0; i < NR_MSI_REG; i++) {
+        for (i = 0; i < NR_MSI_REG_MAX; i++) {
                 virq = msi->msi_virqs[i];
                 if (virq != NO_IRQ) {
                         cascade_data = irq_get_handler_data(virq);
@@ -339,7 +353,7 @@ static int fsl_msi_setup_hwirq(struct fsl_msi *msi, struct platform_device *dev,
                                int offset, int irq_index)
 {
         struct fsl_msi_cascade_data *cascade_data = NULL;
-        int virt_msir;
+        int virt_msir, i;
 
         virt_msir = irq_of_parse_and_map(dev->dev.of_node, irq_index);
         if (virt_msir == NO_IRQ) {
@@ -360,6 +374,11 @@ static int fsl_msi_setup_hwirq(struct fsl_msi *msi, struct platform_device *dev,
         irq_set_handler_data(virt_msir, cascade_data);
         irq_set_chained_handler(virt_msir, fsl_msi_cascade);
 
+        /* Release the hwirqs corresponding to this MSI register */
+        for (i = 0; i < IRQS_PER_MSI_REG; i++)
+                msi_bitmap_free_hwirqs(&msi->bitmap,
+                                       msi_hwirq(msi, offset, i), 1);
+
         return 0;
 }
 
@@ -368,14 +387,12 @@ static int fsl_of_msi_probe(struct platform_device *dev)
 {
         const struct of_device_id *match;
         struct fsl_msi *msi;
-        struct resource res;
+        struct resource res, msiir;
         int err, i, j, irq_index, count;
-        int rc;
         const u32 *p;
         const struct fsl_msi_feature *features;
         int len;
         u32 offset;
-        static const u32 all_avail[] = { 0, NR_MSI_IRQS };
 
         match = of_match_device(fsl_of_msi_ids, &dev->dev);
         if (!match)
@@ -392,7 +409,7 @@ static int fsl_of_msi_probe(struct platform_device *dev)
         platform_set_drvdata(dev, msi);
 
         msi->irqhost = irq_domain_add_linear(dev->dev.of_node,
-                                      NR_MSI_IRQS, &fsl_msi_host_ops, msi);
+                                      NR_MSI_IRQS_MAX, &fsl_msi_host_ops, msi);
 
         if (msi->irqhost == NULL) {
                 dev_err(&dev->dev, "No memory for MSI irqhost\n");
@@ -421,6 +438,16 @@ static int fsl_of_msi_probe(struct platform_device *dev)
                 }
                 msi->msiir_offset =
                         features->msiir_offset + (res.start & 0xfffff);
+
+                /*
+                 * First read the MSIIR/MSIIR1 offset from dts
+                 * On failure use the hardcode MSIIR offset
+                 */
+                if (of_address_to_resource(dev->dev.of_node, 1, &msiir))
+                        msi->msiir_offset = features->msiir_offset +
+                                            (res.start & MSIIR_OFFSET_MASK);
+                else
+                        msi->msiir_offset = msiir.start & MSIIR_OFFSET_MASK;
         }
 
         msi->feature = features->fsl_pic_ip;
@@ -431,42 +458,66 @@ static int fsl_of_msi_probe(struct platform_device *dev)
          */
         msi->phandle = dev->dev.of_node->phandle;
 
-        rc = fsl_msi_init_allocator(msi);
-        if (rc) {
+        err = fsl_msi_init_allocator(msi);
+        if (err) {
                 dev_err(&dev->dev, "Error allocating MSI bitmap\n");
                 goto error_out;
         }
 
         p = of_get_property(dev->dev.of_node, "msi-available-ranges", &len);
-        if (p && len % (2 * sizeof(u32)) != 0) {
-                dev_err(&dev->dev, "%s: Malformed msi-available-ranges property\n",
-                        __func__);
-                err = -EINVAL;
-                goto error_out;
-        }
 
-        if (!p) {
-                p = all_avail;
-                len = sizeof(all_avail);
-        }
+        if (of_device_is_compatible(dev->dev.of_node, "fsl,mpic-msi-v4.3")) {
+                msi->srs_shift = MSIIR1_SRS_SHIFT;
+                msi->ibs_shift = MSIIR1_IBS_SHIFT;
+                if (p)
+                        dev_warn(&dev->dev, "%s: dose not support msi-available-ranges property\n",
+                                __func__);
+
+                for (irq_index = 0; irq_index < NR_MSI_REG_MSIIR1;
+                     irq_index++) {
+                        err = fsl_msi_setup_hwirq(msi, dev,
+                                                  irq_index, irq_index);
+                        if (err)
+                                goto error_out;
+                }
+        } else {
+                static const u32 all_avail[] =
+                        { 0, NR_MSI_REG_MSIIR * IRQS_PER_MSI_REG };
 
-        for (irq_index = 0, i = 0; i < len / (2 * sizeof(u32)); i++) {
-                if (p[i * 2] % IRQS_PER_MSI_REG ||
-                    p[i * 2 + 1] % IRQS_PER_MSI_REG) {
-                        printk(KERN_WARNING "%s: %s: msi available range of %u at %u is not IRQ-aligned\n",
-                               __func__, dev->dev.of_node->full_name,
-                               p[i * 2 + 1], p[i * 2]);
+                msi->srs_shift = MSIIR_SRS_SHIFT;
+                msi->ibs_shift = MSIIR_IBS_SHIFT;
+
+                if (p && len % (2 * sizeof(u32)) != 0) {
+                        dev_err(&dev->dev, "%s: Malformed msi-available-ranges property\n",
+                                __func__);
                         err = -EINVAL;
                         goto error_out;
                 }
 
-                offset = p[i * 2] / IRQS_PER_MSI_REG;
-                count = p[i * 2 + 1] / IRQS_PER_MSI_REG;
+                if (!p) {
+                        p = all_avail;
+                        len = sizeof(all_avail);
+                }
 
-                for (j = 0; j < count; j++, irq_index++) {
-                        err = fsl_msi_setup_hwirq(msi, dev, offset + j, irq_index);
-                        if (err)
+                for (irq_index = 0, i = 0; i < len / (2 * sizeof(u32)); i++) {
+                        if (p[i * 2] % IRQS_PER_MSI_REG ||
+                            p[i * 2 + 1] % IRQS_PER_MSI_REG) {
+                                pr_warn("%s: %s: msi available range of %u at %u is not IRQ-aligned\n",
+                                       __func__, dev->dev.of_node->full_name,
+                                       p[i * 2 + 1], p[i * 2]);
+                                err = -EINVAL;
                                 goto error_out;
+                        }
+
+                        offset = p[i * 2] / IRQS_PER_MSI_REG;
+                        count = p[i * 2 + 1] / IRQS_PER_MSI_REG;
+
+                        for (j = 0; j < count; j++, irq_index++) {
+                                err = fsl_msi_setup_hwirq(msi, dev, offset + j,
+                                                          irq_index);
+                                if (err)
+                                        goto error_out;
+                        }
                 }
         }
 
@@ -509,6 +560,10 @@ static const struct of_device_id fsl_of_msi_ids[] = {
                 .data = &mpic_msi_feature,
         },
         {
+                .compatible = "fsl,mpic-msi-v4.3",
+                .data = &mpic_msi_feature,
+        },
+        {
                 .compatible = "fsl,ipic-msi",
                 .data = &ipic_msi_feature,
         },
diff --git a/arch/powerpc/sysdev/fsl_msi.h b/arch/powerpc/sysdev/fsl_msi.h
index 8225f8653f78..df9aa9fe0933 100644
--- a/arch/powerpc/sysdev/fsl_msi.h
+++ b/arch/powerpc/sysdev/fsl_msi.h
@@ -16,9 +16,11 @@
 #include <linux/of.h>
 #include <asm/msi_bitmap.h>
 
-#define NR_MSI_REG              8
+#define NR_MSI_REG_MSIIR        8  /* MSIIR can index 8 MSI registers */
+#define NR_MSI_REG_MSIIR1       16 /* MSIIR1 can index 16 MSI registers */
+#define NR_MSI_REG_MAX          NR_MSI_REG_MSIIR1
 #define IRQS_PER_MSI_REG        32
-#define NR_MSI_IRQS     (NR_MSI_REG * IRQS_PER_MSI_REG)
+#define NR_MSI_IRQS_MAX (NR_MSI_REG_MAX * IRQS_PER_MSI_REG)
 
 #define FSL_PIC_IP_MASK   0x0000000F
 #define FSL_PIC_IP_MPIC   0x00000001
@@ -31,9 +33,11 @@ struct fsl_msi {
         unsigned long cascade_irq;
 
         u32 msiir_offset; /* Offset of MSIIR, relative to start of CCSR */
+        u32 ibs_shift; /* Shift of interrupt bit select */
+        u32 srs_shift; /* Shift of the shared interrupt register select */
         void __iomem *msi_regs;
         u32 feature;
-        int msi_virqs[NR_MSI_REG];
+        int msi_virqs[NR_MSI_REG_MAX];
 
         struct msi_bitmap bitmap;
 
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 46ac1ddea683..ccfb50ddfe38 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -26,11 +26,15 @@
 #include <linux/memblock.h>
 #include <linux/log2.h>
 #include <linux/slab.h>
+#include <linux/uaccess.h>
 
 #include <asm/io.h>
 #include <asm/prom.h>
 #include <asm/pci-bridge.h>
+#include <asm/ppc-pci.h>
 #include <asm/machdep.h>
+#include <asm/disassemble.h>
+#include <asm/ppc-opcode.h>
 #include <sysdev/fsl_soc.h>
 #include <sysdev/fsl_pci.h>
 
@@ -64,7 +68,7 @@ static int fsl_pcie_check_link(struct pci_controller *hose)
         if (hose->indirect_type & PPC_INDIRECT_TYPE_FSL_CFG_REG_LINK) {
                 if (hose->ops->read == fsl_indirect_read_config) {
                         struct pci_bus bus;
-                        bus.number = 0;
+                        bus.number = hose->first_busno;
                         bus.sysdata = hose;
                         bus.ops = hose->ops;
                         indirect_read_config(&bus, 0, PCIE_LTSSM, 4, &val);
@@ -297,10 +301,10 @@ static void setup_pci_atmu(struct pci_controller *hose)
         if (early_find_capability(hose, 0, 0, PCI_CAP_ID_EXP)) {
                 /* Size window to exact size if power-of-two or one size up */
                 if ((1ull << mem_log) != mem) {
+                        mem_log++;
                         if ((1ull << mem_log) > mem)
                                 pr_info("%s: Setting PCI inbound window "
                                         "greater than memory size\n", name);
-                        mem_log++;
                 }
 
                 piwar |= ((mem_log - 1) & PIWAR_SZ_MASK);
@@ -373,7 +377,9 @@ static void setup_pci_atmu(struct pci_controller *hose)
         }
 
         if (hose->dma_window_size < mem) {
-#ifndef CONFIG_SWIOTLB
+#ifdef CONFIG_SWIOTLB
+                ppc_swiotlb_enable = 1;
+#else
                 pr_err("%s: ERROR: Memory size exceeds PCI ATMU ability to "
                         "map - enable CONFIG_SWIOTLB to avoid dma errors.\n",
                          name);
@@ -868,6 +874,160 @@ u64 fsl_pci_immrbar_base(struct pci_controller *hose)
         return 0;
 }
 
+#ifdef CONFIG_E500
+static int mcheck_handle_load(struct pt_regs *regs, u32 inst)
+{
+        unsigned int rd, ra, rb, d;
+
+        rd = get_rt(inst);
+        ra = get_ra(inst);
+        rb = get_rb(inst);
+        d = get_d(inst);
+
+        switch (get_op(inst)) {
+        case 31:
+                switch (get_xop(inst)) {
+                case OP_31_XOP_LWZX:
+                case OP_31_XOP_LWBRX:
+                        regs->gpr[rd] = 0xffffffff;
+                        break;
+
+                case OP_31_XOP_LWZUX:
+                        regs->gpr[rd] = 0xffffffff;
+                        regs->gpr[ra] += regs->gpr[rb];
+                        break;
+
+                case OP_31_XOP_LBZX:
+                        regs->gpr[rd] = 0xff;
+                        break;
+
+                case OP_31_XOP_LBZUX:
+                        regs->gpr[rd] = 0xff;
+                        regs->gpr[ra] += regs->gpr[rb];
+                        break;
+
+                case OP_31_XOP_LHZX:
+                case OP_31_XOP_LHBRX:
+                        regs->gpr[rd] = 0xffff;
+                        break;
+
+                case OP_31_XOP_LHZUX:
+                        regs->gpr[rd] = 0xffff;
+                        regs->gpr[ra] += regs->gpr[rb];
+                        break;
+
+                case OP_31_XOP_LHAX:
+                        regs->gpr[rd] = ~0UL;
+                        break;
+
+                case OP_31_XOP_LHAUX:
+                        regs->gpr[rd] = ~0UL;
+                        regs->gpr[ra] += regs->gpr[rb];
+                        break;
+
+                default:
+                        return 0;
+                }
+                break;
+
+        case OP_LWZ:
+                regs->gpr[rd] = 0xffffffff;
+                break;
+
+        case OP_LWZU:
+                regs->gpr[rd] = 0xffffffff;
+                regs->gpr[ra] += (s16)d;
+                break;
+
+        case OP_LBZ:
+                regs->gpr[rd] = 0xff;
+                break;
+
+        case OP_LBZU:
+                regs->gpr[rd] = 0xff;
+                regs->gpr[ra] += (s16)d;
+                break;
+
+        case OP_LHZ:
+                regs->gpr[rd] = 0xffff;
+                break;
+
+        case OP_LHZU:
+                regs->gpr[rd] = 0xffff;
+                regs->gpr[ra] += (s16)d;
+                break;
+
+        case OP_LHA:
+                regs->gpr[rd] = ~0UL;
+                break;
+
+        case OP_LHAU:
+                regs->gpr[rd] = ~0UL;
+                regs->gpr[ra] += (s16)d;
+                break;
+
+        default:
+                return 0;
+        }
+
+        return 1;
+}
+
+static int is_in_pci_mem_space(phys_addr_t addr)
+{
+        struct pci_controller *hose;
+        struct resource *res;
+        int i;
+
+        list_for_each_entry(hose, &hose_list, list_node) {
+                if (!(hose->indirect_type & PPC_INDIRECT_TYPE_EXT_REG))
+                        continue;
+
+                for (i = 0; i < 3; i++) {
+                        res = &hose->mem_resources[i];
+                        if ((res->flags & IORESOURCE_MEM) &&
+                                addr >= res->start && addr <= res->end)
+                                return 1;
+                }
+        }
+        return 0;
+}
+
+int fsl_pci_mcheck_exception(struct pt_regs *regs)
+{
+        u32 inst;
+        int ret;
+        phys_addr_t addr = 0;
+
+        /* Let KVM/QEMU deal with the exception */
+        if (regs->msr & MSR_GS)
+                return 0;
+
+#ifdef CONFIG_PHYS_64BIT
+        addr = mfspr(SPRN_MCARU);
+        addr <<= 32;
+#endif
+        addr += mfspr(SPRN_MCAR);
+
+        if (is_in_pci_mem_space(addr)) {
+                if (user_mode(regs)) {
+                        pagefault_disable();
+                        ret = get_user(regs->nip, &inst);
+                        pagefault_enable();
+                } else {
+                        ret = probe_kernel_address(regs->nip, inst);
+                }
+
+                if (mcheck_handle_load(regs, inst)) {
+                        regs->nip += 4;
+                        return 1;
+                }
+        }
+
+        return 0;
+}
+#endif
+
 #if defined(CONFIG_FSL_SOC_BOOKE) || defined(CONFIG_PPC_86xx)
 static const struct of_device_id pci_ids[] = {
         { .compatible = "fsl,mpc8540-pci", },
@@ -928,28 +1088,10 @@ static int fsl_pci_probe(struct platform_device *pdev)
 {
         int ret;
         struct device_node *node;
-#ifdef CONFIG_SWIOTLB
-        struct pci_controller *hose;
-#endif
 
         node = pdev->dev.of_node;
         ret = fsl_add_bridge(pdev, fsl_pci_primary == node);
 
-#ifdef CONFIG_SWIOTLB
-        if (ret == 0) {
-                hose = pci_find_hose_for_OF_device(pdev->dev.of_node);
-
-                /*
-                 * if we couldn't map all of DRAM via the dma windows
-                 * we need SWIOTLB to handle buffers located outside of
-                 * dma capable memory region
-                 */
-                if (memblock_end_of_DRAM() - 1 > hose->dma_window_base_cur +
-                                hose->dma_window_size)
-                        ppc_swiotlb_enable = 1;
-        }
-#endif
-
         mpc85xx_pci_err_probe(pdev);
 
         return 0;
diff --git a/arch/powerpc/sysdev/fsl_pci.h b/arch/powerpc/sysdev/fsl_pci.h
index 72b5625330e2..defc422a375f 100644
--- a/arch/powerpc/sysdev/fsl_pci.h
+++ b/arch/powerpc/sysdev/fsl_pci.h
@@ -126,5 +126,11 @@ static inline int mpc85xx_pci_err_probe(struct platform_device *op)
 }
 #endif
 
+#ifdef CONFIG_FSL_PCI
+extern int fsl_pci_mcheck_exception(struct pt_regs *);
+#else
+static inline int fsl_pci_mcheck_exception(struct pt_regs *regs) {return 0; }
+#endif
+
 #endif /* __POWERPC_FSL_PCI_H */
 #endif /* __KERNEL__ */
diff --git a/arch/powerpc/sysdev/xics/icp-native.c b/arch/powerpc/sysdev/xics/icp-native.c
index 7cd728b3b5e4..9dee47071af8 100644
--- a/arch/powerpc/sysdev/xics/icp-native.c
+++ b/arch/powerpc/sysdev/xics/icp-native.c
@@ -216,7 +216,7 @@ static int __init icp_native_init_one_node(struct device_node *np,
                                            unsigned int *indx)
 {
         unsigned int ilen;
-        const u32 *ireg;
+        const __be32 *ireg;
         int i;
         int reg_tuple_size;
         int num_servers = 0;
diff --git a/arch/powerpc/sysdev/xics/xics-common.c b/arch/powerpc/sysdev/xics/xics-common.c
index 9049d9f44485..fe0cca477164 100644
--- a/arch/powerpc/sysdev/xics/xics-common.c
+++ b/arch/powerpc/sysdev/xics/xics-common.c
@@ -49,7 +49,7 @@ void xics_update_irq_servers(void)
         int i, j;
         struct device_node *np;
         u32 ilen;
-        const u32 *ireg;
+        const __be32 *ireg;
         u32 hcpuid;
 
         /* Find the server numbers for the boot cpu. */
@@ -75,8 +75,8 @@ void xics_update_irq_servers(void)
          * default distribution server
          */
         for (j = 0; j < i; j += 2) {
-                if (ireg[j] == hcpuid) {
-                        xics_default_distrib_server = ireg[j+1];
+                if (be32_to_cpu(ireg[j]) == hcpuid) {
+                        xics_default_distrib_server = be32_to_cpu(ireg[j+1]);
                         break;
                 }
         }
@@ -383,7 +383,7 @@ void __init xics_register_ics(struct ics *ics)
 static void __init xics_get_server_size(void)
 {
         struct device_node *np;
-        const u32 *isize;
+        const __be32 *isize;
 
         /* We fetch the interrupt server size from the first ICS node
          * we find if any
@@ -394,7 +394,7 @@ static void __init xics_get_server_size(void)
         isize = of_get_property(np, "ibm,interrupt-server#-size", NULL);
         if (!isize)
                 return;
-        xics_interrupt_server_size = *isize;
+        xics_interrupt_server_size = be32_to_cpu(*isize);
         of_node_put(np);
 }
 
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index 96bf5bd30fbc..af9d3469fb99 100644
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
@@ -972,27 +972,27 @@ static void bootcmds(void)
 static int cpu_cmd(void)
 {
 #ifdef CONFIG_SMP
-        unsigned long cpu;
+        unsigned long cpu, first_cpu, last_cpu;
         int timeout;
-        int count;
 
         if (!scanhex(&cpu)) {
                 /* print cpus waiting or in xmon */
                 printf("cpus stopped:");
-                count = 0;
+                last_cpu = first_cpu = NR_CPUS;
                 for_each_possible_cpu(cpu) {
                         if (cpumask_test_cpu(cpu, &cpus_in_xmon)) {
-                                if (count == 0)
-                                        printf(" %x", cpu);
-                                ++count;
-                        } else {
-                                if (count > 1)
-                                        printf("-%x", cpu - 1);
-                                count = 0;
+                                if (cpu == last_cpu + 1) {
+                                        last_cpu = cpu;
+                                } else {
+                                        if (last_cpu != first_cpu)
+                                                printf("-%lx", last_cpu);
+                                        last_cpu = first_cpu = cpu;
+                                        printf(" %lx", cpu);
+                                }
                         }
                 }
-                if (count > 1)
-                        printf("-%x", NR_CPUS - 1);
+                if (last_cpu != first_cpu)
+                        printf("-%lx", last_cpu);
                 printf("\n");
                 return 0;
         }
@@ -1256,11 +1256,18 @@ const char *getvecname(unsigned long vec)
         case 0x700:     ret = "(Program Check)"; break;
         case 0x800:     ret = "(FPU Unavailable)"; break;
         case 0x900:     ret = "(Decrementer)"; break;
+        case 0x980:     ret = "(Hypervisor Decrementer)"; break;
+        case 0xa00:     ret = "(Doorbell)"; break;
         case 0xc00:     ret = "(System Call)"; break;
         case 0xd00:     ret = "(Single Step)"; break;
+        case 0xe40:     ret = "(Emulation Assist)"; break;
+        case 0xe60:     ret = "(HMI)"; break;
+        case 0xe80:     ret = "(Hypervisor Doorbell)"; break;
         case 0xf00:     ret = "(Performance Monitor)"; break;
         case 0xf20:     ret = "(Altivec Unavailable)"; break;
         case 0x1300:    ret = "(Instruction Breakpoint)"; break;
+        case 0x1500:    ret = "(Denormalisation)"; break;
+        case 0x1700:    ret = "(Altivec Assist)"; break;
         default: ret = "";
         }
         return ret;