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-rw-r--r--arch/powerpc/platforms/85xx/smp.c26
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/powerpc/platforms/85xx/smp.c b/arch/powerpc/platforms/85xx/smp.c
index 5ced4f5bb2b2..281b7f01df63 100644
--- a/arch/powerpc/platforms/85xx/smp.c
+++ b/arch/powerpc/platforms/85xx/smp.c
@@ -69,7 +69,32 @@ static void mpc85xx_give_timebase(void)
69 tb_req = 0; 69 tb_req = 0;
70 70
71 mpc85xx_timebase_freeze(1); 71 mpc85xx_timebase_freeze(1);
72#ifdef CONFIG_PPC64
73 /*
74 * e5500/e6500 have a workaround for erratum A-006958 in place
75 * that will reread the timebase until TBL is non-zero.
76 * That would be a bad thing when the timebase is frozen.
77 *
78 * Thus, we read it manually, and instead of checking that
79 * TBL is non-zero, we ensure that TB does not change. We don't
80 * do that for the main mftb implementation, because it requires
81 * a scratch register
82 */
83 {
84 u64 prev;
85
86 asm volatile("mfspr %0, %1" : "=r" (timebase) :
87 "i" (SPRN_TBRL));
88
89 do {
90 prev = timebase;
91 asm volatile("mfspr %0, %1" : "=r" (timebase) :
92 "i" (SPRN_TBRL));
93 } while (prev != timebase);
94 }
95#else
72 timebase = get_tb(); 96 timebase = get_tb();
97#endif
73 mb(); 98 mb();
74 tb_valid = 1; 99 tb_valid = 1;
75 100
@@ -255,6 +280,7 @@ out:
255 280
256struct smp_ops_t smp_85xx_ops = { 281struct smp_ops_t smp_85xx_ops = {
257 .kick_cpu = smp_85xx_kick_cpu, 282 .kick_cpu = smp_85xx_kick_cpu,
283 .cpu_bootable = smp_generic_cpu_bootable,
258#ifdef CONFIG_HOTPLUG_CPU 284#ifdef CONFIG_HOTPLUG_CPU
259 .cpu_disable = generic_cpu_disable, 285 .cpu_disable = generic_cpu_disable,
260 .cpu_die = generic_cpu_die, 286 .cpu_die = generic_cpu_die,