diff options
Diffstat (limited to 'arch/tile/include/hv/hypervisor.h')
-rw-r--r-- | arch/tile/include/hv/hypervisor.h | 90 |
1 files changed, 71 insertions, 19 deletions
diff --git a/arch/tile/include/hv/hypervisor.h b/arch/tile/include/hv/hypervisor.h index 9bd303a141b2..72ec1e972f15 100644 --- a/arch/tile/include/hv/hypervisor.h +++ b/arch/tile/include/hv/hypervisor.h | |||
@@ -22,8 +22,6 @@ | |||
22 | 22 | ||
23 | #include <arch/chip.h> | 23 | #include <arch/chip.h> |
24 | 24 | ||
25 | #include <hv/pagesize.h> | ||
26 | |||
27 | /* Linux builds want unsigned long constants, but assembler wants numbers */ | 25 | /* Linux builds want unsigned long constants, but assembler wants numbers */ |
28 | #ifdef __ASSEMBLER__ | 26 | #ifdef __ASSEMBLER__ |
29 | /** One, for assembler */ | 27 | /** One, for assembler */ |
@@ -44,11 +42,21 @@ | |||
44 | */ | 42 | */ |
45 | #define HV_L1_SPAN (__HV_SIZE_ONE << HV_LOG2_L1_SPAN) | 43 | #define HV_L1_SPAN (__HV_SIZE_ONE << HV_LOG2_L1_SPAN) |
46 | 44 | ||
45 | /** The log2 of the size of small pages, in bytes. This value should | ||
46 | * be verified at runtime by calling hv_sysconf(HV_SYSCONF_PAGE_SIZE_SMALL). | ||
47 | */ | ||
48 | #define HV_LOG2_PAGE_SIZE_SMALL 16 | ||
49 | |||
47 | /** The size of small pages, in bytes. This value should be verified | 50 | /** The size of small pages, in bytes. This value should be verified |
48 | * at runtime by calling hv_sysconf(HV_SYSCONF_PAGE_SIZE_SMALL). | 51 | * at runtime by calling hv_sysconf(HV_SYSCONF_PAGE_SIZE_SMALL). |
49 | */ | 52 | */ |
50 | #define HV_PAGE_SIZE_SMALL (__HV_SIZE_ONE << HV_LOG2_PAGE_SIZE_SMALL) | 53 | #define HV_PAGE_SIZE_SMALL (__HV_SIZE_ONE << HV_LOG2_PAGE_SIZE_SMALL) |
51 | 54 | ||
55 | /** The log2 of the size of large pages, in bytes. This value should be | ||
56 | * verified at runtime by calling hv_sysconf(HV_SYSCONF_PAGE_SIZE_LARGE). | ||
57 | */ | ||
58 | #define HV_LOG2_PAGE_SIZE_LARGE 24 | ||
59 | |||
52 | /** The size of large pages, in bytes. This value should be verified | 60 | /** The size of large pages, in bytes. This value should be verified |
53 | * at runtime by calling hv_sysconf(HV_SYSCONF_PAGE_SIZE_LARGE). | 61 | * at runtime by calling hv_sysconf(HV_SYSCONF_PAGE_SIZE_LARGE). |
54 | */ | 62 | */ |
@@ -338,9 +346,10 @@ typedef int HV_Errno; | |||
338 | #define HV_ENOTREADY -812 /**< Device not ready */ | 346 | #define HV_ENOTREADY -812 /**< Device not ready */ |
339 | #define HV_EIO -813 /**< I/O error */ | 347 | #define HV_EIO -813 /**< I/O error */ |
340 | #define HV_ENOMEM -814 /**< Out of memory */ | 348 | #define HV_ENOMEM -814 /**< Out of memory */ |
349 | #define HV_EAGAIN -815 /**< Try again */ | ||
341 | 350 | ||
342 | #define HV_ERR_MAX -801 /**< Largest HV error code */ | 351 | #define HV_ERR_MAX -801 /**< Largest HV error code */ |
343 | #define HV_ERR_MIN -814 /**< Smallest HV error code */ | 352 | #define HV_ERR_MIN -815 /**< Smallest HV error code */ |
344 | 353 | ||
345 | #ifndef __ASSEMBLER__ | 354 | #ifndef __ASSEMBLER__ |
346 | 355 | ||
@@ -867,6 +876,43 @@ typedef struct | |||
867 | */ | 876 | */ |
868 | HV_PhysAddrRange hv_inquire_physical(int idx); | 877 | HV_PhysAddrRange hv_inquire_physical(int idx); |
869 | 878 | ||
879 | /** Possible DIMM types. */ | ||
880 | typedef enum | ||
881 | { | ||
882 | NO_DIMM = 0, /**< No DIMM */ | ||
883 | DDR2 = 1, /**< DDR2 */ | ||
884 | DDR3 = 2 /**< DDR3 */ | ||
885 | } HV_DIMM_Type; | ||
886 | |||
887 | #ifdef __tilegx__ | ||
888 | |||
889 | /** Log2 of minimum DIMM bytes supported by the memory controller. */ | ||
890 | #define HV_MSH_MIN_DIMM_SIZE_SHIFT 29 | ||
891 | |||
892 | /** Max number of DIMMs contained by one memory controller. */ | ||
893 | #define HV_MSH_MAX_DIMMS 8 | ||
894 | |||
895 | #else | ||
896 | |||
897 | /** Log2 of minimum DIMM bytes supported by the memory controller. */ | ||
898 | #define HV_MSH_MIN_DIMM_SIZE_SHIFT 26 | ||
899 | |||
900 | /** Max number of DIMMs contained by one memory controller. */ | ||
901 | #define HV_MSH_MAX_DIMMS 2 | ||
902 | |||
903 | #endif | ||
904 | |||
905 | /** Number of bits to right-shift to get the DIMM type. */ | ||
906 | #define HV_DIMM_TYPE_SHIFT 0 | ||
907 | |||
908 | /** Bits to mask to get the DIMM type. */ | ||
909 | #define HV_DIMM_TYPE_MASK 0xf | ||
910 | |||
911 | /** Number of bits to right-shift to get the DIMM size. */ | ||
912 | #define HV_DIMM_SIZE_SHIFT 4 | ||
913 | |||
914 | /** Bits to mask to get the DIMM size. */ | ||
915 | #define HV_DIMM_SIZE_MASK 0xf | ||
870 | 916 | ||
871 | /** Memory controller information. */ | 917 | /** Memory controller information. */ |
872 | typedef struct | 918 | typedef struct |
@@ -964,6 +1010,11 @@ HV_ASIDRange hv_inquire_asid(int idx); | |||
964 | 1010 | ||
965 | /** Waits for at least the specified number of nanoseconds then returns. | 1011 | /** Waits for at least the specified number of nanoseconds then returns. |
966 | * | 1012 | * |
1013 | * NOTE: this deprecated function currently assumes a 750 MHz clock, | ||
1014 | * and is thus not generally suitable for use. New code should call | ||
1015 | * hv_sysconf(HV_SYSCONF_CPU_SPEED), compute a cycle count to wait for, | ||
1016 | * and delay by looping while checking the cycle counter SPR. | ||
1017 | * | ||
967 | * @param nanosecs The number of nanoseconds to sleep. | 1018 | * @param nanosecs The number of nanoseconds to sleep. |
968 | */ | 1019 | */ |
969 | void hv_nanosleep(int nanosecs); | 1020 | void hv_nanosleep(int nanosecs); |
@@ -1003,41 +1054,42 @@ int hv_console_write(HV_VirtAddr bytes, int len); | |||
1003 | * when these occur in a client's interrupt critical section, they must | 1054 | * when these occur in a client's interrupt critical section, they must |
1004 | * be delivered through the downcall mechanism. | 1055 | * be delivered through the downcall mechanism. |
1005 | * | 1056 | * |
1006 | * A downcall is initially delivered to the client as an INTCTRL_1 | 1057 | * A downcall is initially delivered to the client as an INTCTRL_CL |
1007 | * interrupt. Upon entry to the INTCTRL_1 vector, the client must | 1058 | * interrupt, where CL is the client's PL. Upon entry to the INTCTRL_CL |
1008 | * immediately invoke the hv_downcall_dispatch service. This service | 1059 | * vector, the client must immediately invoke the hv_downcall_dispatch |
1009 | * will not return; instead it will cause one of the client's actual | 1060 | * service. This service will not return; instead it will cause one of |
1010 | * downcall-handling interrupt vectors to be entered. The EX_CONTEXT | 1061 | * the client's actual downcall-handling interrupt vectors to be entered. |
1011 | * registers in the client will be set so that when the client irets, | 1062 | * The EX_CONTEXT registers in the client will be set so that when the |
1012 | * it will return to the code which was interrupted by the INTCTRL_1 | 1063 | * client irets, it will return to the code which was interrupted by the |
1013 | * interrupt. | 1064 | * INTCTRL_CL interrupt. |
1014 | * | 1065 | * |
1015 | * Under some circumstances, the firing of INTCTRL_1 can race with | 1066 | * Under some circumstances, the firing of INTCTRL_CL can race with |
1016 | * the lowering of a device interrupt. In such a case, the | 1067 | * the lowering of a device interrupt. In such a case, the |
1017 | * hv_downcall_dispatch service may issue an iret instruction instead | 1068 | * hv_downcall_dispatch service may issue an iret instruction instead |
1018 | * of entering one of the client's actual downcall-handling interrupt | 1069 | * of entering one of the client's actual downcall-handling interrupt |
1019 | * vectors. This will return execution to the location that was | 1070 | * vectors. This will return execution to the location that was |
1020 | * interrupted by INTCTRL_1. | 1071 | * interrupted by INTCTRL_CL. |
1021 | * | 1072 | * |
1022 | * Any saving of registers should be done by the actual handling | 1073 | * Any saving of registers should be done by the actual handling |
1023 | * vectors; no registers should be changed by the INTCTRL_1 handler. | 1074 | * vectors; no registers should be changed by the INTCTRL_CL handler. |
1024 | * In particular, the client should not use a jal instruction to invoke | 1075 | * In particular, the client should not use a jal instruction to invoke |
1025 | * the hv_downcall_dispatch service, as that would overwrite the client's | 1076 | * the hv_downcall_dispatch service, as that would overwrite the client's |
1026 | * lr register. Note that the hv_downcall_dispatch service may overwrite | 1077 | * lr register. Note that the hv_downcall_dispatch service may overwrite |
1027 | * one or more of the client's system save registers. | 1078 | * one or more of the client's system save registers. |
1028 | * | 1079 | * |
1029 | * The client must not modify the INTCTRL_1_STATUS SPR. The hypervisor | 1080 | * The client must not modify the INTCTRL_CL_STATUS SPR. The hypervisor |
1030 | * will set this register to cause a downcall to happen, and will clear | 1081 | * will set this register to cause a downcall to happen, and will clear |
1031 | * it when no further downcalls are pending. | 1082 | * it when no further downcalls are pending. |
1032 | * | 1083 | * |
1033 | * When a downcall vector is entered, the INTCTRL_1 interrupt will be | 1084 | * When a downcall vector is entered, the INTCTRL_CL interrupt will be |
1034 | * masked. When the client is done processing a downcall, and is ready | 1085 | * masked. When the client is done processing a downcall, and is ready |
1035 | * to accept another, it must unmask this interrupt; if more downcalls | 1086 | * to accept another, it must unmask this interrupt; if more downcalls |
1036 | * are pending, this will cause the INTCTRL_1 vector to be reentered. | 1087 | * are pending, this will cause the INTCTRL_CL vector to be reentered. |
1037 | * Currently the following interrupt vectors can be entered through a | 1088 | * Currently the following interrupt vectors can be entered through a |
1038 | * downcall: | 1089 | * downcall: |
1039 | * | 1090 | * |
1040 | * INT_MESSAGE_RCV_DWNCL (hypervisor message available) | 1091 | * INT_MESSAGE_RCV_DWNCL (hypervisor message available) |
1092 | * INT_DEV_INTR_DWNCL (device interrupt) | ||
1041 | * INT_DMATLB_MISS_DWNCL (DMA TLB miss) | 1093 | * INT_DMATLB_MISS_DWNCL (DMA TLB miss) |
1042 | * INT_SNITLB_MISS_DWNCL (SNI TLB miss) | 1094 | * INT_SNITLB_MISS_DWNCL (SNI TLB miss) |
1043 | * INT_DMATLB_ACCESS_DWNCL (DMA TLB access violation) | 1095 | * INT_DMATLB_ACCESS_DWNCL (DMA TLB access violation) |
@@ -1296,7 +1348,7 @@ typedef struct | |||
1296 | * this operation. If any permanent delivery errors were encountered, | 1348 | * this operation. If any permanent delivery errors were encountered, |
1297 | * the routine returns HV_ERECIP. In the event of permanent delivery | 1349 | * the routine returns HV_ERECIP. In the event of permanent delivery |
1298 | * errors, it may be the case that delivery was not attempted to all | 1350 | * errors, it may be the case that delivery was not attempted to all |
1299 | * recipients; if any messages were succesfully delivered, however, | 1351 | * recipients; if any messages were successfully delivered, however, |
1300 | * recipients' state values will be updated appropriately. | 1352 | * recipients' state values will be updated appropriately. |
1301 | * | 1353 | * |
1302 | * It is explicitly legal to specify a recipient structure whose state | 1354 | * It is explicitly legal to specify a recipient structure whose state |
@@ -1315,7 +1367,7 @@ typedef struct | |||
1315 | * never call hv_receive_message, or could register a different state | 1367 | * never call hv_receive_message, or could register a different state |
1316 | * buffer, losing the message. | 1368 | * buffer, losing the message. |
1317 | * | 1369 | * |
1318 | * Specifiying the same recipient more than once in the recipient list | 1370 | * Specifying the same recipient more than once in the recipient list |
1319 | * is an error, which will not result in an error return but which may | 1371 | * is an error, which will not result in an error return but which may |
1320 | * or may not result in more than one message being delivered to the | 1372 | * or may not result in more than one message being delivered to the |
1321 | * recipient tile. | 1373 | * recipient tile. |