diff options
Diffstat (limited to 'arch/sh/kernel/cpu/sh4a/setup-sh7780.c')
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/setup-sh7780.c | 97 |
1 files changed, 30 insertions, 67 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c index fb8200cc7440..6f7227cd65bf 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c | |||
@@ -20,17 +20,7 @@ static struct resource rtc_resources[] = { | |||
20 | .flags = IORESOURCE_IO, | 20 | .flags = IORESOURCE_IO, |
21 | }, | 21 | }, |
22 | [1] = { | 22 | [1] = { |
23 | /* Period IRQ */ | 23 | /* Shared Period/Carry/Alarm IRQ */ |
24 | .start = 21, | ||
25 | .flags = IORESOURCE_IRQ, | ||
26 | }, | ||
27 | [2] = { | ||
28 | /* Carry IRQ */ | ||
29 | .start = 22, | ||
30 | .flags = IORESOURCE_IRQ, | ||
31 | }, | ||
32 | [3] = { | ||
33 | /* Alarm IRQ */ | ||
34 | .start = 20, | 24 | .start = 20, |
35 | .flags = IORESOURCE_IRQ, | 25 | .flags = IORESOURCE_IRQ, |
36 | }, | 26 | }, |
@@ -48,12 +38,12 @@ static struct plat_sci_port sci_platform_data[] = { | |||
48 | .mapbase = 0xffe00000, | 38 | .mapbase = 0xffe00000, |
49 | .flags = UPF_BOOT_AUTOCONF, | 39 | .flags = UPF_BOOT_AUTOCONF, |
50 | .type = PORT_SCIF, | 40 | .type = PORT_SCIF, |
51 | .irqs = { 40, 41, 43, 42 }, | 41 | .irqs = { 40, 40, 40, 40 }, |
52 | }, { | 42 | }, { |
53 | .mapbase = 0xffe10000, | 43 | .mapbase = 0xffe10000, |
54 | .flags = UPF_BOOT_AUTOCONF, | 44 | .flags = UPF_BOOT_AUTOCONF, |
55 | .type = PORT_SCIF, | 45 | .type = PORT_SCIF, |
56 | .irqs = { 76, 77, 79, 78 }, | 46 | .irqs = { 76, 76, 76, 76 }, |
57 | }, { | 47 | }, { |
58 | .flags = 0, | 48 | .flags = 0, |
59 | } | 49 | } |
@@ -90,82 +80,55 @@ enum { | |||
90 | IRL_HHLL, IRL_HHLH, IRL_HHHL, | 80 | IRL_HHLL, IRL_HHLH, IRL_HHHL, |
91 | 81 | ||
92 | IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, | 82 | IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, |
93 | RTC_ATI, RTC_PRI, RTC_CUI, | 83 | RTC, WDT, TMU0, TMU1, TMU2, TMU2_TICPI, |
94 | WDT, | 84 | HUDI, DMAC0, SCIF0, DMAC1, CMT, HAC, |
95 | TMU0, TMU1, TMU2, TMU2_TICPI, | 85 | PCISERR, PCIINTA, PCIINTB, PCIINTC, PCIINTD, PCIC5, |
96 | HUDI, | 86 | SCIF1, SIOF, HSPI, MMCIF, TMU3, TMU4, TMU5, SSI, FLCTL, GPIO, |
97 | DMAC0_DMINT0, DMAC0_DMINT1, DMAC0_DMINT2, DMAC0_DMINT3, DMAC0_DMAE, | ||
98 | SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI, | ||
99 | DMAC0_DMINT4, DMAC0_DMINT5, DMAC1_DMINT6, DMAC1_DMINT7, | ||
100 | CMT, HAC, | ||
101 | PCISERR, PCIINTA, PCIINTB, PCIINTC, PCIINTD, | ||
102 | PCIERR, PCIPWD3, PCIPWD2, PCIPWD1, PCIPWD0, | ||
103 | SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI, | ||
104 | SIOF, HSPI, | ||
105 | MMCIF_FSTAT, MMCIF_TRAN, MMCIF_ERR, MMCIF_FRDY, | ||
106 | DMAC1_DMINT8, DMAC1_DMINT9, DMAC1_DMINT10, DMAC1_DMINT11, | ||
107 | TMU3, TMU4, TMU5, | ||
108 | SSI, | ||
109 | FLCTL_FLSTE, FLCTL_FLEND, FLCTL_FLTRQ0, FLCTL_FLTRQ1, | ||
110 | GPIOI0, GPIOI1, GPIOI2, GPIOI3, | ||
111 | 87 | ||
112 | /* interrupt groups */ | 88 | /* interrupt groups */ |
113 | 89 | ||
114 | RTC, TMU012, DMAC0, SCIF0, DMAC45, DMAC1, | 90 | TMU012, TMU345, |
115 | PCIC5, SCIF1, MMCIF, TMU345, FLCTL, GPIO, | ||
116 | }; | 91 | }; |
117 | 92 | ||
118 | static struct intc_vect vectors[] __initdata = { | 93 | static struct intc_vect vectors[] __initdata = { |
119 | INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0), | 94 | INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0), |
120 | INTC_VECT(RTC_CUI, 0x4c0), | 95 | INTC_VECT(RTC, 0x4c0), |
121 | INTC_VECT(WDT, 0x560), | 96 | INTC_VECT(WDT, 0x560), |
122 | INTC_VECT(TMU0, 0x580), INTC_VECT(TMU1, 0x5a0), | 97 | INTC_VECT(TMU0, 0x580), INTC_VECT(TMU1, 0x5a0), |
123 | INTC_VECT(TMU2, 0x5c0), INTC_VECT(TMU2_TICPI, 0x5e0), | 98 | INTC_VECT(TMU2, 0x5c0), INTC_VECT(TMU2_TICPI, 0x5e0), |
124 | INTC_VECT(HUDI, 0x600), | 99 | INTC_VECT(HUDI, 0x600), |
125 | INTC_VECT(DMAC0_DMINT0, 0x640), INTC_VECT(DMAC0_DMINT1, 0x660), | 100 | INTC_VECT(DMAC0, 0x640), INTC_VECT(DMAC0, 0x660), |
126 | INTC_VECT(DMAC0_DMINT2, 0x680), INTC_VECT(DMAC0_DMINT3, 0x6a0), | 101 | INTC_VECT(DMAC0, 0x680), INTC_VECT(DMAC0, 0x6a0), |
127 | INTC_VECT(DMAC0_DMAE, 0x6c0), | 102 | INTC_VECT(DMAC0, 0x6c0), |
128 | INTC_VECT(SCIF0_ERI, 0x700), INTC_VECT(SCIF0_RXI, 0x720), | 103 | INTC_VECT(SCIF0, 0x700), INTC_VECT(SCIF0, 0x720), |
129 | INTC_VECT(SCIF0_BRI, 0x740), INTC_VECT(SCIF0_TXI, 0x760), | 104 | INTC_VECT(SCIF0, 0x740), INTC_VECT(SCIF0, 0x760), |
130 | INTC_VECT(DMAC0_DMINT4, 0x780), INTC_VECT(DMAC0_DMINT5, 0x7a0), | 105 | INTC_VECT(DMAC0, 0x780), INTC_VECT(DMAC0, 0x7a0), |
131 | INTC_VECT(DMAC1_DMINT6, 0x7c0), INTC_VECT(DMAC1_DMINT7, 0x7e0), | 106 | INTC_VECT(DMAC1, 0x7c0), INTC_VECT(DMAC1, 0x7e0), |
132 | INTC_VECT(CMT, 0x900), INTC_VECT(HAC, 0x980), | 107 | INTC_VECT(CMT, 0x900), INTC_VECT(HAC, 0x980), |
133 | INTC_VECT(PCISERR, 0xa00), INTC_VECT(PCIINTA, 0xa20), | 108 | INTC_VECT(PCISERR, 0xa00), INTC_VECT(PCIINTA, 0xa20), |
134 | INTC_VECT(PCIINTB, 0xa40), INTC_VECT(PCIINTC, 0xa60), | 109 | INTC_VECT(PCIINTB, 0xa40), INTC_VECT(PCIINTC, 0xa60), |
135 | INTC_VECT(PCIINTD, 0xa80), INTC_VECT(PCIERR, 0xaa0), | 110 | INTC_VECT(PCIINTD, 0xa80), INTC_VECT(PCIC5, 0xaa0), |
136 | INTC_VECT(PCIPWD3, 0xac0), INTC_VECT(PCIPWD2, 0xae0), | 111 | INTC_VECT(PCIC5, 0xac0), INTC_VECT(PCIC5, 0xae0), |
137 | INTC_VECT(PCIPWD1, 0xb00), INTC_VECT(PCIPWD0, 0xb20), | 112 | INTC_VECT(PCIC5, 0xb00), INTC_VECT(PCIC5, 0xb20), |
138 | INTC_VECT(SCIF1_ERI, 0xb80), INTC_VECT(SCIF1_RXI, 0xba0), | 113 | INTC_VECT(SCIF1, 0xb80), INTC_VECT(SCIF1, 0xba0), |
139 | INTC_VECT(SCIF1_BRI, 0xbc0), INTC_VECT(SCIF1_TXI, 0xbe0), | 114 | INTC_VECT(SCIF1, 0xbc0), INTC_VECT(SCIF1, 0xbe0), |
140 | INTC_VECT(SIOF, 0xc00), INTC_VECT(HSPI, 0xc80), | 115 | INTC_VECT(SIOF, 0xc00), INTC_VECT(HSPI, 0xc80), |
141 | INTC_VECT(MMCIF_FSTAT, 0xd00), INTC_VECT(MMCIF_TRAN, 0xd20), | 116 | INTC_VECT(MMCIF, 0xd00), INTC_VECT(MMCIF, 0xd20), |
142 | INTC_VECT(MMCIF_ERR, 0xd40), INTC_VECT(MMCIF_FRDY, 0xd60), | 117 | INTC_VECT(MMCIF, 0xd40), INTC_VECT(MMCIF, 0xd60), |
143 | INTC_VECT(DMAC1_DMINT8, 0xd80), INTC_VECT(DMAC1_DMINT9, 0xda0), | 118 | INTC_VECT(DMAC1, 0xd80), INTC_VECT(DMAC1, 0xda0), |
144 | INTC_VECT(DMAC1_DMINT10, 0xdc0), INTC_VECT(DMAC1_DMINT11, 0xde0), | 119 | INTC_VECT(DMAC1, 0xdc0), INTC_VECT(DMAC1, 0xde0), |
145 | INTC_VECT(TMU3, 0xe00), INTC_VECT(TMU4, 0xe20), | 120 | INTC_VECT(TMU3, 0xe00), INTC_VECT(TMU4, 0xe20), |
146 | INTC_VECT(TMU5, 0xe40), | 121 | INTC_VECT(TMU5, 0xe40), |
147 | INTC_VECT(SSI, 0xe80), | 122 | INTC_VECT(SSI, 0xe80), |
148 | INTC_VECT(FLCTL_FLSTE, 0xf00), INTC_VECT(FLCTL_FLEND, 0xf20), | 123 | INTC_VECT(FLCTL, 0xf00), INTC_VECT(FLCTL, 0xf20), |
149 | INTC_VECT(FLCTL_FLTRQ0, 0xf40), INTC_VECT(FLCTL_FLTRQ1, 0xf60), | 124 | INTC_VECT(FLCTL, 0xf40), INTC_VECT(FLCTL, 0xf60), |
150 | INTC_VECT(GPIOI0, 0xf80), INTC_VECT(GPIOI1, 0xfa0), | 125 | INTC_VECT(GPIO, 0xf80), INTC_VECT(GPIO, 0xfa0), |
151 | INTC_VECT(GPIOI2, 0xfc0), INTC_VECT(GPIOI3, 0xfe0), | 126 | INTC_VECT(GPIO, 0xfc0), INTC_VECT(GPIO, 0xfe0), |
152 | }; | 127 | }; |
153 | 128 | ||
154 | static struct intc_group groups[] __initdata = { | 129 | static struct intc_group groups[] __initdata = { |
155 | INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI), | ||
156 | INTC_GROUP(TMU012, TMU0, TMU1, TMU2, TMU2_TICPI), | 130 | INTC_GROUP(TMU012, TMU0, TMU1, TMU2, TMU2_TICPI), |
157 | INTC_GROUP(DMAC0, DMAC0_DMINT0, DMAC0_DMINT1, DMAC0_DMINT2, | ||
158 | DMAC0_DMINT3, DMAC0_DMINT4, DMAC0_DMINT5, DMAC0_DMAE), | ||
159 | INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI), | ||
160 | INTC_GROUP(DMAC1, DMAC1_DMINT6, DMAC1_DMINT7, DMAC1_DMINT8, | ||
161 | DMAC1_DMINT9, DMAC1_DMINT10, DMAC1_DMINT11), | ||
162 | INTC_GROUP(PCIC5, PCIERR, PCIPWD3, PCIPWD2, PCIPWD1, PCIPWD0), | ||
163 | INTC_GROUP(SCIF1, SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI), | ||
164 | INTC_GROUP(MMCIF, MMCIF_FSTAT, MMCIF_TRAN, MMCIF_ERR, MMCIF_FRDY), | ||
165 | INTC_GROUP(TMU345, TMU3, TMU4, TMU5), | 131 | INTC_GROUP(TMU345, TMU3, TMU4, TMU5), |
166 | INTC_GROUP(FLCTL, FLCTL_FLSTE, FLCTL_FLEND, | ||
167 | FLCTL_FLTRQ0, FLCTL_FLTRQ1), | ||
168 | INTC_GROUP(GPIO, GPIOI0, GPIOI1, GPIOI2, GPIOI3), | ||
169 | }; | 132 | }; |
170 | 133 | ||
171 | static struct intc_mask_reg mask_registers[] __initdata = { | 134 | static struct intc_mask_reg mask_registers[] __initdata = { |