aboutsummaryrefslogtreecommitdiffstats
path: root/arch/sh/boards
diff options
context:
space:
mode:
Diffstat (limited to 'arch/sh/boards')
-rw-r--r--arch/sh/boards/Kconfig8
-rw-r--r--arch/sh/boards/Makefile2
-rw-r--r--arch/sh/boards/board-magicpanelr2.c74
-rw-r--r--arch/sh/boards/board-polaris.c37
-rw-r--r--arch/sh/boards/board-sh7785lcr.c32
-rw-r--r--arch/sh/boards/board-shmin.c4
-rw-r--r--arch/sh/boards/board-titan.c (renamed from arch/sh/boards/mach-titan/setup.c)24
-rw-r--r--arch/sh/boards/board-urquell.c46
-rw-r--r--arch/sh/boards/mach-ap325rxa/Makefile2
-rw-r--r--arch/sh/boards/mach-ap325rxa/sdram.S69
-rw-r--r--arch/sh/boards/mach-ap325rxa/setup.c (renamed from arch/sh/boards/board-ap325rxa.c)161
-rw-r--r--arch/sh/boards/mach-cayman/irq.c16
-rw-r--r--arch/sh/boards/mach-dreamcast/irq.c27
-rw-r--r--arch/sh/boards/mach-dreamcast/rtc.c20
-rw-r--r--arch/sh/boards/mach-dreamcast/setup.c18
-rw-r--r--arch/sh/boards/mach-ecovec24/Makefile2
-rw-r--r--arch/sh/boards/mach-ecovec24/sdram.S111
-rw-r--r--arch/sh/boards/mach-ecovec24/setup.c600
-rw-r--r--arch/sh/boards/mach-highlander/irq-r7780mp.c2
-rw-r--r--arch/sh/boards/mach-highlander/irq-r7780rp.c2
-rw-r--r--arch/sh/boards/mach-highlander/irq-r7785rp.c16
-rw-r--r--arch/sh/boards/mach-highlander/psw.c4
-rw-r--r--arch/sh/boards/mach-highlander/setup.c16
-rw-r--r--arch/sh/boards/mach-hp6xx/hp6xx_apm.c2
-rw-r--r--arch/sh/boards/mach-hp6xx/pm.c38
-rw-r--r--arch/sh/boards/mach-hp6xx/setup.c67
-rw-r--r--arch/sh/boards/mach-kfr2r09/Makefile2
-rw-r--r--arch/sh/boards/mach-kfr2r09/lcd_wqvga.c6
-rw-r--r--arch/sh/boards/mach-kfr2r09/sdram.S80
-rw-r--r--arch/sh/boards/mach-kfr2r09/setup.c260
-rw-r--r--arch/sh/boards/mach-landisk/gio.c12
-rw-r--r--arch/sh/boards/mach-landisk/irq.c6
-rw-r--r--arch/sh/boards/mach-landisk/psw.c4
-rw-r--r--arch/sh/boards/mach-landisk/setup.c6
-rw-r--r--arch/sh/boards/mach-lboxre2/setup.c4
-rw-r--r--arch/sh/boards/mach-microdev/io.c4
-rw-r--r--arch/sh/boards/mach-microdev/irq.c10
-rw-r--r--arch/sh/boards/mach-migor/Makefile2
-rw-r--r--arch/sh/boards/mach-migor/sdram.S69
-rw-r--r--arch/sh/boards/mach-migor/setup.c135
-rw-r--r--arch/sh/boards/mach-r2d/irq.c6
-rw-r--r--arch/sh/boards/mach-r2d/setup.c8
-rw-r--r--arch/sh/boards/mach-rsk/devices-rsk7203.c2
-rw-r--r--arch/sh/boards/mach-sdk7780/irq.c4
-rw-r--r--arch/sh/boards/mach-sdk7780/setup.c29
-rw-r--r--arch/sh/boards/mach-sdk7786/Makefile1
-rw-r--r--arch/sh/boards/mach-sdk7786/fpga.c72
-rw-r--r--arch/sh/boards/mach-sdk7786/irq.c48
-rw-r--r--arch/sh/boards/mach-sdk7786/setup.c189
-rw-r--r--arch/sh/boards/mach-se/7206/io.c2
-rw-r--r--arch/sh/boards/mach-se/7206/irq.c43
-rw-r--r--arch/sh/boards/mach-se/7206/setup.c15
-rw-r--r--arch/sh/boards/mach-se/7343/irq.c45
-rw-r--r--arch/sh/boards/mach-se/7343/setup.c43
-rw-r--r--arch/sh/boards/mach-se/770x/irq.c14
-rw-r--r--arch/sh/boards/mach-se/770x/setup.c15
-rw-r--r--arch/sh/boards/mach-se/7721/irq.c2
-rw-r--r--arch/sh/boards/mach-se/7721/setup.c23
-rw-r--r--arch/sh/boards/mach-se/7722/irq.c45
-rw-r--r--arch/sh/boards/mach-se/7722/setup.c72
-rw-r--r--arch/sh/boards/mach-se/7724/Makefile2
-rw-r--r--arch/sh/boards/mach-se/7724/irq.c62
-rw-r--r--arch/sh/boards/mach-se/7724/sdram.S131
-rw-r--r--arch/sh/boards/mach-se/7724/setup.c234
-rw-r--r--arch/sh/boards/mach-se/7780/irq.c18
-rw-r--r--arch/sh/boards/mach-se/7780/setup.c47
-rw-r--r--arch/sh/boards/mach-sh03/rtc.c50
-rw-r--r--arch/sh/boards/mach-sh03/setup.c2
-rw-r--r--arch/sh/boards/mach-sh7763rdp/irq.c10
-rw-r--r--arch/sh/boards/mach-sh7763rdp/setup.c40
-rw-r--r--arch/sh/boards/mach-snapgear/setup.c2
-rw-r--r--arch/sh/boards/mach-systemh/irq.c12
-rw-r--r--arch/sh/boards/mach-titan/Makefile5
-rw-r--r--arch/sh/boards/mach-titan/io.c108
-rw-r--r--arch/sh/boards/mach-x3proto/ilsel.c8
-rw-r--r--arch/sh/boards/mach-x3proto/setup.c2
76 files changed, 2514 insertions, 897 deletions
diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig
index aedd9deb5de2..938e87d51482 100644
--- a/arch/sh/boards/Kconfig
+++ b/arch/sh/boards/Kconfig
@@ -150,6 +150,14 @@ config SH_SDK7780
150 Select SDK7780 if configuring for a Renesas SH7780 SDK7780R3 150 Select SDK7780 if configuring for a Renesas SH7780 SDK7780R3
151 evaluation board. 151 evaluation board.
152 152
153config SH_SDK7786
154 bool "SDK7786"
155 depends on CPU_SUBTYPE_SH7786
156 select SYS_SUPPORTS_PCI
157 help
158 Select SDK7786 if configuring for a Renesas Technology Europe
159 SH7786-65nm board.
160
153config SH_HIGHLANDER 161config SH_HIGHLANDER
154 bool "Highlander" 162 bool "Highlander"
155 depends on CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785 163 depends on CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785
diff --git a/arch/sh/boards/Makefile b/arch/sh/boards/Makefile
index 7baa21090231..4f90f9b7a922 100644
--- a/arch/sh/boards/Makefile
+++ b/arch/sh/boards/Makefile
@@ -1,7 +1,6 @@
1# 1#
2# Specific board support, not covered by a mach group. 2# Specific board support, not covered by a mach group.
3# 3#
4obj-$(CONFIG_SH_AP325RXA) += board-ap325rxa.o
5obj-$(CONFIG_SH_MAGIC_PANEL_R2) += board-magicpanelr2.o 4obj-$(CONFIG_SH_MAGIC_PANEL_R2) += board-magicpanelr2.o
6obj-$(CONFIG_SH_SH7785LCR) += board-sh7785lcr.o 5obj-$(CONFIG_SH_SH7785LCR) += board-sh7785lcr.o
7obj-$(CONFIG_SH_URQUELL) += board-urquell.o 6obj-$(CONFIG_SH_URQUELL) += board-urquell.o
@@ -9,3 +8,4 @@ obj-$(CONFIG_SH_SHMIN) += board-shmin.o
9obj-$(CONFIG_SH_EDOSK7760) += board-edosk7760.o 8obj-$(CONFIG_SH_EDOSK7760) += board-edosk7760.o
10obj-$(CONFIG_SH_ESPT) += board-espt.o 9obj-$(CONFIG_SH_ESPT) += board-espt.o
11obj-$(CONFIG_SH_POLARIS) += board-polaris.o 10obj-$(CONFIG_SH_POLARIS) += board-polaris.o
11obj-$(CONFIG_SH_TITAN) += board-titan.o
diff --git a/arch/sh/boards/board-magicpanelr2.c b/arch/sh/boards/board-magicpanelr2.c
index 99ffc5f1c0dd..efba450a0518 100644
--- a/arch/sh/boards/board-magicpanelr2.c
+++ b/arch/sh/boards/board-magicpanelr2.c
@@ -23,7 +23,7 @@
23#include <asm/heartbeat.h> 23#include <asm/heartbeat.h>
24#include <cpu/sh7720.h> 24#include <cpu/sh7720.h>
25 25
26#define LAN9115_READY (ctrl_inl(0xA8000084UL) & 0x00000001UL) 26#define LAN9115_READY (__raw_readl(0xA8000084UL) & 0x00000001UL)
27 27
28/* Prefer cmdline over RedBoot */ 28/* Prefer cmdline over RedBoot */
29static const char *probes[] = { "cmdlinepart", "RedBoot", NULL }; 29static const char *probes[] = { "cmdlinepart", "RedBoot", NULL };
@@ -60,33 +60,33 @@ static void __init setup_chip_select(void)
60{ 60{
61 /* CS2: LAN (0x08000000 - 0x0bffffff) */ 61 /* CS2: LAN (0x08000000 - 0x0bffffff) */
62 /* no idle cycles, normal space, 8 bit data bus */ 62 /* no idle cycles, normal space, 8 bit data bus */
63 ctrl_outl(0x36db0400, CS2BCR); 63 __raw_writel(0x36db0400, CS2BCR);
64 /* (SW:1.5 WR:3 HW:1.5), ext. wait */ 64 /* (SW:1.5 WR:3 HW:1.5), ext. wait */
65 ctrl_outl(0x000003c0, CS2WCR); 65 __raw_writel(0x000003c0, CS2WCR);
66 66
67 /* CS4: CAN1 (0xb0000000 - 0xb3ffffff) */ 67 /* CS4: CAN1 (0xb0000000 - 0xb3ffffff) */
68 /* no idle cycles, normal space, 8 bit data bus */ 68 /* no idle cycles, normal space, 8 bit data bus */
69 ctrl_outl(0x00000200, CS4BCR); 69 __raw_writel(0x00000200, CS4BCR);
70 /* (SW:1.5 WR:3 HW:1.5), ext. wait */ 70 /* (SW:1.5 WR:3 HW:1.5), ext. wait */
71 ctrl_outl(0x00100981, CS4WCR); 71 __raw_writel(0x00100981, CS4WCR);
72 72
73 /* CS5a: CAN2 (0xb4000000 - 0xb5ffffff) */ 73 /* CS5a: CAN2 (0xb4000000 - 0xb5ffffff) */
74 /* no idle cycles, normal space, 8 bit data bus */ 74 /* no idle cycles, normal space, 8 bit data bus */
75 ctrl_outl(0x00000200, CS5ABCR); 75 __raw_writel(0x00000200, CS5ABCR);
76 /* (SW:1.5 WR:3 HW:1.5), ext. wait */ 76 /* (SW:1.5 WR:3 HW:1.5), ext. wait */
77 ctrl_outl(0x00100981, CS5AWCR); 77 __raw_writel(0x00100981, CS5AWCR);
78 78
79 /* CS5b: CAN3 (0xb6000000 - 0xb7ffffff) */ 79 /* CS5b: CAN3 (0xb6000000 - 0xb7ffffff) */
80 /* no idle cycles, normal space, 8 bit data bus */ 80 /* no idle cycles, normal space, 8 bit data bus */
81 ctrl_outl(0x00000200, CS5BBCR); 81 __raw_writel(0x00000200, CS5BBCR);
82 /* (SW:1.5 WR:3 HW:1.5), ext. wait */ 82 /* (SW:1.5 WR:3 HW:1.5), ext. wait */
83 ctrl_outl(0x00100981, CS5BWCR); 83 __raw_writel(0x00100981, CS5BWCR);
84 84
85 /* CS6a: Rotary (0xb8000000 - 0xb9ffffff) */ 85 /* CS6a: Rotary (0xb8000000 - 0xb9ffffff) */
86 /* no idle cycles, normal space, 8 bit data bus */ 86 /* no idle cycles, normal space, 8 bit data bus */
87 ctrl_outl(0x00000200, CS6ABCR); 87 __raw_writel(0x00000200, CS6ABCR);
88 /* (SW:1.5 WR:3 HW:1.5), no ext. wait */ 88 /* (SW:1.5 WR:3 HW:1.5), no ext. wait */
89 ctrl_outl(0x001009C1, CS6AWCR); 89 __raw_writel(0x001009C1, CS6AWCR);
90} 90}
91 91
92static void __init setup_port_multiplexing(void) 92static void __init setup_port_multiplexing(void)
@@ -94,71 +94,71 @@ static void __init setup_port_multiplexing(void)
94 /* A7 GPO(LED8); A6 GPO(LED7); A5 GPO(LED6); A4 GPO(LED5); 94 /* A7 GPO(LED8); A6 GPO(LED7); A5 GPO(LED6); A4 GPO(LED5);
95 * A3 GPO(LED4); A2 GPO(LED3); A1 GPO(LED2); A0 GPO(LED1); 95 * A3 GPO(LED4); A2 GPO(LED3); A1 GPO(LED2); A0 GPO(LED1);
96 */ 96 */
97 ctrl_outw(0x5555, PORT_PACR); /* 01 01 01 01 01 01 01 01 */ 97 __raw_writew(0x5555, PORT_PACR); /* 01 01 01 01 01 01 01 01 */
98 98
99 /* B7 GPO(RST4); B6 GPO(RST3); B5 GPO(RST2); B4 GPO(RST1); 99 /* B7 GPO(RST4); B6 GPO(RST3); B5 GPO(RST2); B4 GPO(RST1);
100 * B3 GPO(PB3); B2 GPO(PB2); B1 GPO(PB1); B0 GPO(PB0); 100 * B3 GPO(PB3); B2 GPO(PB2); B1 GPO(PB1); B0 GPO(PB0);
101 */ 101 */
102 ctrl_outw(0x5555, PORT_PBCR); /* 01 01 01 01 01 01 01 01 */ 102 __raw_writew(0x5555, PORT_PBCR); /* 01 01 01 01 01 01 01 01 */
103 103
104 /* C7 GPO(PC7); C6 GPO(PC6); C5 GPO(PC5); C4 GPO(PC4); 104 /* C7 GPO(PC7); C6 GPO(PC6); C5 GPO(PC5); C4 GPO(PC4);
105 * C3 LCD_DATA3; C2 LCD_DATA2; C1 LCD_DATA1; C0 LCD_DATA0; 105 * C3 LCD_DATA3; C2 LCD_DATA2; C1 LCD_DATA1; C0 LCD_DATA0;
106 */ 106 */
107 ctrl_outw(0x5500, PORT_PCCR); /* 01 01 01 01 00 00 00 00 */ 107 __raw_writew(0x5500, PORT_PCCR); /* 01 01 01 01 00 00 00 00 */
108 108
109 /* D7 GPO(PD7); D6 GPO(PD6); D5 GPO(PD5); D4 GPO(PD4); 109 /* D7 GPO(PD7); D6 GPO(PD6); D5 GPO(PD5); D4 GPO(PD4);
110 * D3 GPO(PD3); D2 GPO(PD2); D1 GPO(PD1); D0 GPO(PD0); 110 * D3 GPO(PD3); D2 GPO(PD2); D1 GPO(PD1); D0 GPO(PD0);
111 */ 111 */
112 ctrl_outw(0x5555, PORT_PDCR); /* 01 01 01 01 01 01 01 01 */ 112 __raw_writew(0x5555, PORT_PDCR); /* 01 01 01 01 01 01 01 01 */
113 113
114 /* E7 (x); E6 GPI(nu); E5 GPI(nu); E4 LCD_M_DISP; 114 /* E7 (x); E6 GPI(nu); E5 GPI(nu); E4 LCD_M_DISP;
115 * E3 LCD_CL1; E2 LCD_CL2; E1 LCD_DON; E0 LCD_FLM; 115 * E3 LCD_CL1; E2 LCD_CL2; E1 LCD_DON; E0 LCD_FLM;
116 */ 116 */
117 ctrl_outw(0x3C00, PORT_PECR); /* 00 11 11 00 00 00 00 00 */ 117 __raw_writew(0x3C00, PORT_PECR); /* 00 11 11 00 00 00 00 00 */
118 118
119 /* F7 (x); F6 DA1(VLCD); F5 DA0(nc); F4 AN3; 119 /* F7 (x); F6 DA1(VLCD); F5 DA0(nc); F4 AN3;
120 * F3 AN2(MID_AD); F2 AN1(EARTH_AD); F1 AN0(TEMP); F0 GPI+(nc); 120 * F3 AN2(MID_AD); F2 AN1(EARTH_AD); F1 AN0(TEMP); F0 GPI+(nc);
121 */ 121 */
122 ctrl_outw(0x0002, PORT_PFCR); /* 00 00 00 00 00 00 00 10 */ 122 __raw_writew(0x0002, PORT_PFCR); /* 00 00 00 00 00 00 00 10 */
123 123
124 /* G7 (x); G6 IRQ5(TOUCH_BUSY); G5 IRQ4(TOUCH_IRQ); G4 GPI(KEY2); 124 /* G7 (x); G6 IRQ5(TOUCH_BUSY); G5 IRQ4(TOUCH_IRQ); G4 GPI(KEY2);
125 * G3 GPI(KEY1); G2 GPO(LED11); G1 GPO(LED10); G0 GPO(LED9); 125 * G3 GPI(KEY1); G2 GPO(LED11); G1 GPO(LED10); G0 GPO(LED9);
126 */ 126 */
127 ctrl_outw(0x03D5, PORT_PGCR); /* 00 00 00 11 11 01 01 01 */ 127 __raw_writew(0x03D5, PORT_PGCR); /* 00 00 00 11 11 01 01 01 */
128 128
129 /* H7 (x); H6 /RAS(BRAS); H5 /CAS(BCAS); H4 CKE(BCKE); 129 /* H7 (x); H6 /RAS(BRAS); H5 /CAS(BCAS); H4 CKE(BCKE);
130 * H3 GPO(EARTH_OFF); H2 GPO(EARTH_TEST); H1 USB2_PWR; H0 USB1_PWR; 130 * H3 GPO(EARTH_OFF); H2 GPO(EARTH_TEST); H1 USB2_PWR; H0 USB1_PWR;
131 */ 131 */
132 ctrl_outw(0x0050, PORT_PHCR); /* 00 00 00 00 01 01 00 00 */ 132 __raw_writew(0x0050, PORT_PHCR); /* 00 00 00 00 01 01 00 00 */
133 133
134 /* J7 (x); J6 AUDCK; J5 ASEBRKAK; J4 AUDATA3; 134 /* J7 (x); J6 AUDCK; J5 ASEBRKAK; J4 AUDATA3;
135 * J3 AUDATA2; J2 AUDATA1; J1 AUDATA0; J0 AUDSYNC; 135 * J3 AUDATA2; J2 AUDATA1; J1 AUDATA0; J0 AUDSYNC;
136 */ 136 */
137 ctrl_outw(0x0000, PORT_PJCR); /* 00 00 00 00 00 00 00 00 */ 137 __raw_writew(0x0000, PORT_PJCR); /* 00 00 00 00 00 00 00 00 */
138 138
139 /* K7 (x); K6 (x); K5 (x); K4 (x); 139 /* K7 (x); K6 (x); K5 (x); K4 (x);
140 * K3 PINT7(/PWR2); K2 PINT6(/PWR1); K1 PINT5(nu); K0 PINT4(FLASH_READY) 140 * K3 PINT7(/PWR2); K2 PINT6(/PWR1); K1 PINT5(nu); K0 PINT4(FLASH_READY)
141 */ 141 */
142 ctrl_outw(0x00FF, PORT_PKCR); /* 00 00 00 00 11 11 11 11 */ 142 __raw_writew(0x00FF, PORT_PKCR); /* 00 00 00 00 11 11 11 11 */
143 143
144 /* L7 TRST; L6 TMS; L5 TDO; L4 TDI; 144 /* L7 TRST; L6 TMS; L5 TDO; L4 TDI;
145 * L3 TCK; L2 (x); L1 (x); L0 (x); 145 * L3 TCK; L2 (x); L1 (x); L0 (x);
146 */ 146 */
147 ctrl_outw(0x0000, PORT_PLCR); /* 00 00 00 00 00 00 00 00 */ 147 __raw_writew(0x0000, PORT_PLCR); /* 00 00 00 00 00 00 00 00 */
148 148
149 /* M7 GPO(CURRENT_SINK); M6 GPO(PWR_SWITCH); M5 GPO(LAN_SPEED); 149 /* M7 GPO(CURRENT_SINK); M6 GPO(PWR_SWITCH); M5 GPO(LAN_SPEED);
150 * M4 GPO(LAN_RESET); M3 GPO(BUZZER); M2 GPO(LCD_BL); 150 * M4 GPO(LAN_RESET); M3 GPO(BUZZER); M2 GPO(LCD_BL);
151 * M1 CS5B(CAN3_CS); M0 GPI+(nc); 151 * M1 CS5B(CAN3_CS); M0 GPI+(nc);
152 */ 152 */
153 ctrl_outw(0x5552, PORT_PMCR); /* 01 01 01 01 01 01 00 10 */ 153 __raw_writew(0x5552, PORT_PMCR); /* 01 01 01 01 01 01 00 10 */
154 154
155 /* CURRENT_SINK=off, PWR_SWITCH=off, LAN_SPEED=100MBit, 155 /* CURRENT_SINK=off, PWR_SWITCH=off, LAN_SPEED=100MBit,
156 * LAN_RESET=off, BUZZER=off, LCD_BL=off 156 * LAN_RESET=off, BUZZER=off, LCD_BL=off
157 */ 157 */
158#if CONFIG_SH_MAGIC_PANEL_R2_VERSION == 2 158#if CONFIG_SH_MAGIC_PANEL_R2_VERSION == 2
159 ctrl_outb(0x30, PORT_PMDR); 159 __raw_writeb(0x30, PORT_PMDR);
160#elif CONFIG_SH_MAGIC_PANEL_R2_VERSION == 3 160#elif CONFIG_SH_MAGIC_PANEL_R2_VERSION == 3
161 ctrl_outb(0xF0, PORT_PMDR); 161 __raw_writeb(0xF0, PORT_PMDR);
162#else 162#else
163#error Unknown revision of PLATFORM_MP_R2 163#error Unknown revision of PLATFORM_MP_R2
164#endif 164#endif
@@ -167,8 +167,8 @@ static void __init setup_port_multiplexing(void)
167 * P4 GPO(nu); P3 IRQ3(LAN_IRQ); P2 IRQ2(CAN3_IRQ); 167 * P4 GPO(nu); P3 IRQ3(LAN_IRQ); P2 IRQ2(CAN3_IRQ);
168 * P1 IRQ1(CAN2_IRQ); P0 IRQ0(CAN1_IRQ) 168 * P1 IRQ1(CAN2_IRQ); P0 IRQ0(CAN1_IRQ)
169 */ 169 */
170 ctrl_outw(0x0100, PORT_PPCR); /* 00 00 00 01 00 00 00 00 */ 170 __raw_writew(0x0100, PORT_PPCR); /* 00 00 00 01 00 00 00 00 */
171 ctrl_outb(0x10, PORT_PPDR); 171 __raw_writeb(0x10, PORT_PPDR);
172 172
173 /* R7 A25; R6 A24; R5 A23; R4 A22; 173 /* R7 A25; R6 A24; R5 A23; R4 A22;
174 * R3 A21; R2 A20; R1 A19; R0 A0; 174 * R3 A21; R2 A20; R1 A19; R0 A0;
@@ -185,22 +185,22 @@ static void __init setup_port_multiplexing(void)
185 /* S7 (x); S6 (x); S5 (x); S4 GPO(EEPROM_CS2); 185 /* S7 (x); S6 (x); S5 (x); S4 GPO(EEPROM_CS2);
186 * S3 GPO(EEPROM_CS1); S2 SIOF0_TXD; S1 SIOF0_RXD; S0 SIOF0_SCK; 186 * S3 GPO(EEPROM_CS1); S2 SIOF0_TXD; S1 SIOF0_RXD; S0 SIOF0_SCK;
187 */ 187 */
188 ctrl_outw(0x0140, PORT_PSCR); /* 00 00 00 01 01 00 00 00 */ 188 __raw_writew(0x0140, PORT_PSCR); /* 00 00 00 01 01 00 00 00 */
189 189
190 /* T7 (x); T6 (x); T5 (x); T4 COM1_CTS; 190 /* T7 (x); T6 (x); T5 (x); T4 COM1_CTS;
191 * T3 COM1_RTS; T2 COM1_TXD; T1 COM1_RXD; T0 GPO(WDOG) 191 * T3 COM1_RTS; T2 COM1_TXD; T1 COM1_RXD; T0 GPO(WDOG)
192 */ 192 */
193 ctrl_outw(0x0001, PORT_PTCR); /* 00 00 00 00 00 00 00 01 */ 193 __raw_writew(0x0001, PORT_PTCR); /* 00 00 00 00 00 00 00 01 */
194 194
195 /* U7 (x); U6 (x); U5 (x); U4 GPI+(/AC_FAULT); 195 /* U7 (x); U6 (x); U5 (x); U4 GPI+(/AC_FAULT);
196 * U3 GPO(TOUCH_CS); U2 TOUCH_TXD; U1 TOUCH_RXD; U0 TOUCH_SCK; 196 * U3 GPO(TOUCH_CS); U2 TOUCH_TXD; U1 TOUCH_RXD; U0 TOUCH_SCK;
197 */ 197 */
198 ctrl_outw(0x0240, PORT_PUCR); /* 00 00 00 10 01 00 00 00 */ 198 __raw_writew(0x0240, PORT_PUCR); /* 00 00 00 10 01 00 00 00 */
199 199
200 /* V7 (x); V6 (x); V5 (x); V4 GPO(MID2); 200 /* V7 (x); V6 (x); V5 (x); V4 GPO(MID2);
201 * V3 GPO(MID1); V2 CARD_TxD; V1 CARD_RxD; V0 GPI+(/BAT_FAULT); 201 * V3 GPO(MID1); V2 CARD_TxD; V1 CARD_RxD; V0 GPI+(/BAT_FAULT);
202 */ 202 */
203 ctrl_outw(0x0142, PORT_PVCR); /* 00 00 00 01 01 00 00 10 */ 203 __raw_writew(0x0142, PORT_PVCR); /* 00 00 00 01 01 00 00 10 */
204} 204}
205 205
206static void __init mpr2_setup(char **cmdline_p) 206static void __init mpr2_setup(char **cmdline_p)
@@ -209,24 +209,24 @@ static void __init mpr2_setup(char **cmdline_p)
209 * /PCC_CD1, /PCC_CD2, PCC_BVD1, PCC_BVD2, 209 * /PCC_CD1, /PCC_CD2, PCC_BVD1, PCC_BVD2,
210 * /IOIS16, IRQ4, IRQ5, USB1d_SUSPEND 210 * /IOIS16, IRQ4, IRQ5, USB1d_SUSPEND
211 */ 211 */
212 ctrl_outw(0xAABC, PORT_PSELA); 212 __raw_writew(0xAABC, PORT_PSELA);
213 /* set Pin Select Register B: 213 /* set Pin Select Register B:
214 * /SCIF0_RTS, /SCIF0_CTS, LCD_VCPWC, 214 * /SCIF0_RTS, /SCIF0_CTS, LCD_VCPWC,
215 * LCD_VEPWC, IIC_SDA, IIC_SCL, Reserved 215 * LCD_VEPWC, IIC_SDA, IIC_SCL, Reserved
216 */ 216 */
217 ctrl_outw(0x3C00, PORT_PSELB); 217 __raw_writew(0x3C00, PORT_PSELB);
218 /* set Pin Select Register C: 218 /* set Pin Select Register C:
219 * SIOF1_SCK, SIOF1_RxD, SCIF1_RxD, SCIF1_TxD, Reserved 219 * SIOF1_SCK, SIOF1_RxD, SCIF1_RxD, SCIF1_TxD, Reserved
220 */ 220 */
221 ctrl_outw(0x0000, PORT_PSELC); 221 __raw_writew(0x0000, PORT_PSELC);
222 /* set Pin Select Register D: Reserved, SIOF1_TxD, Reserved, SIOF1_MCLK, 222 /* set Pin Select Register D: Reserved, SIOF1_TxD, Reserved, SIOF1_MCLK,
223 * Reserved, SIOF1_SYNC, Reserved, SCIF1_SCK, Reserved 223 * Reserved, SIOF1_SYNC, Reserved, SCIF1_SCK, Reserved
224 */ 224 */
225 ctrl_outw(0x0000, PORT_PSELD); 225 __raw_writew(0x0000, PORT_PSELD);
226 /* set USB TxRx Control: Reserved, DRV, Reserved, USB_TRANS, USB_SEL */ 226 /* set USB TxRx Control: Reserved, DRV, Reserved, USB_TRANS, USB_SEL */
227 ctrl_outw(0x0101, PORT_UTRCTL); 227 __raw_writew(0x0101, PORT_UTRCTL);
228 /* set USB Clock Control: USSCS, USSTB, Reserved (HighByte always A5) */ 228 /* set USB Clock Control: USSCS, USSTB, Reserved (HighByte always A5) */
229 ctrl_outw(0xA5C0, PORT_UCLKCR_W); 229 __raw_writew(0xA5C0, PORT_UCLKCR_W);
230 230
231 setup_chip_select(); 231 setup_chip_select();
232 232
diff --git a/arch/sh/boards/board-polaris.c b/arch/sh/boards/board-polaris.c
index 62607eb51004..594866356c24 100644
--- a/arch/sh/boards/board-polaris.c
+++ b/arch/sh/boards/board-polaris.c
@@ -59,15 +59,12 @@ static unsigned char heartbeat_bit_pos[] = { 0, 1, 2, 3 };
59static struct heartbeat_data heartbeat_data = { 59static struct heartbeat_data heartbeat_data = {
60 .bit_pos = heartbeat_bit_pos, 60 .bit_pos = heartbeat_bit_pos,
61 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos), 61 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
62 .regsize = 8,
63}; 62};
64 63
65static struct resource heartbeat_resources[] = { 64static struct resource heartbeat_resource = {
66 [0] = { 65 .start = PORT_PCDR,
67 .start = PORT_PCDR, 66 .end = PORT_PCDR,
68 .end = PORT_PCDR, 67 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
69 .flags = IORESOURCE_MEM,
70 },
71}; 68};
72 69
73static struct platform_device heartbeat_device = { 70static struct platform_device heartbeat_device = {
@@ -76,8 +73,8 @@ static struct platform_device heartbeat_device = {
76 .dev = { 73 .dev = {
77 .platform_data = &heartbeat_data, 74 .platform_data = &heartbeat_data,
78 }, 75 },
79 .num_resources = ARRAY_SIZE(heartbeat_resources), 76 .num_resources = 1,
80 .resource = heartbeat_resources, 77 .resource = &heartbeat_resource,
81}; 78};
82 79
83static struct platform_device *polaris_devices[] __initdata = { 80static struct platform_device *polaris_devices[] __initdata = {
@@ -92,15 +89,15 @@ static int __init polaris_initialise(void)
92 printk(KERN_INFO "Configuring Polaris external bus\n"); 89 printk(KERN_INFO "Configuring Polaris external bus\n");
93 90
94 /* Configure area 5 with 2 wait states */ 91 /* Configure area 5 with 2 wait states */
95 wcr = ctrl_inw(WCR2); 92 wcr = __raw_readw(WCR2);
96 wcr &= (~AREA5_WAIT_CTRL); 93 wcr &= (~AREA5_WAIT_CTRL);
97 wcr |= (WAIT_STATES_10 << 10); 94 wcr |= (WAIT_STATES_10 << 10);
98 ctrl_outw(wcr, WCR2); 95 __raw_writew(wcr, WCR2);
99 96
100 /* Configure area 5 for 32-bit access */ 97 /* Configure area 5 for 32-bit access */
101 bcr_mask = ctrl_inw(BCR2); 98 bcr_mask = __raw_readw(BCR2);
102 bcr_mask |= 1 << 10; 99 bcr_mask |= 1 << 10;
103 ctrl_outw(bcr_mask, BCR2); 100 __raw_writew(bcr_mask, BCR2);
104 101
105 return platform_add_devices(polaris_devices, 102 return platform_add_devices(polaris_devices,
106 ARRAY_SIZE(polaris_devices)); 103 ARRAY_SIZE(polaris_devices));
@@ -131,13 +128,13 @@ static struct ipr_desc ipr_irq_desc = {
131static void __init init_polaris_irq(void) 128static void __init init_polaris_irq(void)
132{ 129{
133 /* Disable all interrupts */ 130 /* Disable all interrupts */
134 ctrl_outw(0, BCR_ILCRA); 131 __raw_writew(0, BCR_ILCRA);
135 ctrl_outw(0, BCR_ILCRB); 132 __raw_writew(0, BCR_ILCRB);
136 ctrl_outw(0, BCR_ILCRC); 133 __raw_writew(0, BCR_ILCRC);
137 ctrl_outw(0, BCR_ILCRD); 134 __raw_writew(0, BCR_ILCRD);
138 ctrl_outw(0, BCR_ILCRE); 135 __raw_writew(0, BCR_ILCRE);
139 ctrl_outw(0, BCR_ILCRF); 136 __raw_writew(0, BCR_ILCRF);
140 ctrl_outw(0, BCR_ILCRG); 137 __raw_writew(0, BCR_ILCRG);
141 138
142 register_ipr_controller(&ipr_irq_desc); 139 register_ipr_controller(&ipr_irq_desc);
143} 140}
diff --git a/arch/sh/boards/board-sh7785lcr.c b/arch/sh/boards/board-sh7785lcr.c
index e5a8a2fde39c..fe7e686c94ac 100644
--- a/arch/sh/boards/board-sh7785lcr.c
+++ b/arch/sh/boards/board-sh7785lcr.c
@@ -21,6 +21,7 @@
21#include <linux/i2c-algo-pca.h> 21#include <linux/i2c-algo-pca.h>
22#include <linux/usb/r8a66597.h> 22#include <linux/usb/r8a66597.h>
23#include <linux/irq.h> 23#include <linux/irq.h>
24#include <linux/io.h>
24#include <linux/clk.h> 25#include <linux/clk.h>
25#include <linux/errno.h> 26#include <linux/errno.h>
26#include <mach/sh7785lcr.h> 27#include <mach/sh7785lcr.h>
@@ -32,26 +33,17 @@
32 * NOTE: This board has 2 physical memory maps. 33 * NOTE: This board has 2 physical memory maps.
33 * Please look at include/asm-sh/sh7785lcr.h or hardware manual. 34 * Please look at include/asm-sh/sh7785lcr.h or hardware manual.
34 */ 35 */
35static struct resource heartbeat_resources[] = { 36static struct resource heartbeat_resource = {
36 [0] = { 37 .start = PLD_LEDCR,
37 .start = PLD_LEDCR, 38 .end = PLD_LEDCR,
38 .end = PLD_LEDCR, 39 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
39 .flags = IORESOURCE_MEM,
40 },
41};
42
43static struct heartbeat_data heartbeat_data = {
44 .regsize = 8,
45}; 40};
46 41
47static struct platform_device heartbeat_device = { 42static struct platform_device heartbeat_device = {
48 .name = "heartbeat", 43 .name = "heartbeat",
49 .id = -1, 44 .id = -1,
50 .dev = { 45 .num_resources = 1,
51 .platform_data = &heartbeat_data, 46 .resource = &heartbeat_resource,
52 },
53 .num_resources = ARRAY_SIZE(heartbeat_resources),
54 .resource = heartbeat_resources,
55}; 47};
56 48
57static struct mtd_partition nor_flash_partitions[] = { 49static struct mtd_partition nor_flash_partitions[] = {
@@ -341,8 +333,14 @@ static void __init sh7785lcr_setup(char **cmdline_p)
341 pm_power_off = sh7785lcr_power_off; 333 pm_power_off = sh7785lcr_power_off;
342 334
343 /* sm501 DRAM configuration */ 335 /* sm501 DRAM configuration */
344 sm501_reg = (void __iomem *)0xb3e00000 + SM501_DRAM_CONTROL; 336 sm501_reg = ioremap_nocache(SM107_REG_ADDR, SM501_DRAM_CONTROL);
345 writel(0x000307c2, sm501_reg); 337 if (!sm501_reg) {
338 printk(KERN_ERR "%s: ioremap error.\n", __func__);
339 return;
340 }
341
342 writel(0x000307c2, sm501_reg + SM501_DRAM_CONTROL);
343 iounmap(sm501_reg);
346} 344}
347 345
348/* Return the board specific boot mode pin configuration */ 346/* Return the board specific boot mode pin configuration */
diff --git a/arch/sh/boards/board-shmin.c b/arch/sh/boards/board-shmin.c
index b1dcbbc89188..325bed53b87e 100644
--- a/arch/sh/boards/board-shmin.c
+++ b/arch/sh/boards/board-shmin.c
@@ -17,8 +17,8 @@
17 17
18static void __init init_shmin_irq(void) 18static void __init init_shmin_irq(void)
19{ 19{
20 ctrl_outw(0x2a00, PFC_PHCR); // IRQ0-3=IRQ 20 __raw_writew(0x2a00, PFC_PHCR); // IRQ0-3=IRQ
21 ctrl_outw(0x0aaa, INTC_ICR1); // IRQ0-3=IRQ-mode,Low-active. 21 __raw_writew(0x0aaa, INTC_ICR1); // IRQ0-3=IRQ-mode,Low-active.
22 plat_irq_setup_pins(IRQ_MODE_IRQ); 22 plat_irq_setup_pins(IRQ_MODE_IRQ);
23} 23}
24 24
diff --git a/arch/sh/boards/mach-titan/setup.c b/arch/sh/boards/board-titan.c
index 81e7e0f03863..94c36c7bc0b3 100644
--- a/arch/sh/boards/mach-titan/setup.c
+++ b/arch/sh/boards/board-titan.c
@@ -19,26 +19,6 @@ static void __init init_titan_irq(void)
19} 19}
20 20
21static struct sh_machine_vector mv_titan __initmv = { 21static struct sh_machine_vector mv_titan __initmv = {
22 .mv_name = "Titan", 22 .mv_name = "Titan",
23 23 .mv_init_irq = init_titan_irq,
24 .mv_inb = titan_inb,
25 .mv_inw = titan_inw,
26 .mv_inl = titan_inl,
27 .mv_outb = titan_outb,
28 .mv_outw = titan_outw,
29 .mv_outl = titan_outl,
30
31 .mv_inb_p = titan_inb_p,
32 .mv_inw_p = titan_inw,
33 .mv_inl_p = titan_inl,
34 .mv_outb_p = titan_outb_p,
35 .mv_outw_p = titan_outw,
36 .mv_outl_p = titan_outl,
37
38 .mv_insl = titan_insl,
39 .mv_outsl = titan_outsl,
40
41 .mv_ioport_map = titan_ioport_map,
42
43 .mv_init_irq = init_titan_irq,
44}; 24};
diff --git a/arch/sh/boards/board-urquell.c b/arch/sh/boards/board-urquell.c
index 36b8bac9b124..a9bd6e3ee10b 100644
--- a/arch/sh/boards/board-urquell.c
+++ b/arch/sh/boards/board-urquell.c
@@ -2,7 +2,7 @@
2 * Renesas Technology Corp. SH7786 Urquell Support. 2 * Renesas Technology Corp. SH7786 Urquell Support.
3 * 3 *
4 * Copyright (C) 2008 Kuninori Morimoto <morimoto.kuninori@renesas.com> 4 * Copyright (C) 2008 Kuninori Morimoto <morimoto.kuninori@renesas.com>
5 * Copyright (C) 2009 Paul Mundt 5 * Copyright (C) 2009, 2010 Paul Mundt
6 * 6 *
7 * Based on board-sh7785lcr.c 7 * Based on board-sh7785lcr.c
8 * Copyright (C) 2008 Yoshihiro Shimoda 8 * Copyright (C) 2008 Yoshihiro Shimoda
@@ -19,6 +19,7 @@
19#include <linux/delay.h> 19#include <linux/delay.h>
20#include <linux/gpio.h> 20#include <linux/gpio.h>
21#include <linux/irq.h> 21#include <linux/irq.h>
22#include <linux/clk.h>
22#include <mach/urquell.h> 23#include <mach/urquell.h>
23#include <cpu/sh7786.h> 24#include <cpu/sh7786.h>
24#include <asm/heartbeat.h> 25#include <asm/heartbeat.h>
@@ -50,26 +51,17 @@
50 */ 51 */
51 52
52/* HeartBeat */ 53/* HeartBeat */
53static struct resource heartbeat_resources[] = { 54static struct resource heartbeat_resource = {
54 [0] = { 55 .start = BOARDREG(SLEDR),
55 .start = BOARDREG(SLEDR), 56 .end = BOARDREG(SLEDR),
56 .end = BOARDREG(SLEDR), 57 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
57 .flags = IORESOURCE_MEM,
58 },
59};
60
61static struct heartbeat_data heartbeat_data = {
62 .regsize = 16,
63}; 58};
64 59
65static struct platform_device heartbeat_device = { 60static struct platform_device heartbeat_device = {
66 .name = "heartbeat", 61 .name = "heartbeat",
67 .id = -1, 62 .id = -1,
68 .dev = { 63 .num_resources = 1,
69 .platform_data = &heartbeat_data, 64 .resource = &heartbeat_resource,
70 },
71 .num_resources = ARRAY_SIZE(heartbeat_resources),
72 .resource = heartbeat_resources,
73}; 65};
74 66
75/* LAN91C111 */ 67/* LAN91C111 */
@@ -184,6 +176,27 @@ static int urquell_mode_pins(void)
184 return __raw_readw(UBOARDREG(MDSWMR)); 176 return __raw_readw(UBOARDREG(MDSWMR));
185} 177}
186 178
179static int urquell_clk_init(void)
180{
181 struct clk *clk;
182 int ret;
183
184 /*
185 * Only handle the EXTAL case, anyone interfacing a crystal
186 * resonator will need to provide their own input clock.
187 */
188 if (test_mode_pin(MODE_PIN9))
189 return -EINVAL;
190
191 clk = clk_get(NULL, "extal");
192 if (!clk || IS_ERR(clk))
193 return PTR_ERR(clk);
194 ret = clk_set_rate(clk, 33333333);
195 clk_put(clk);
196
197 return ret;
198}
199
187/* Initialize the board */ 200/* Initialize the board */
188static void __init urquell_setup(char **cmdline_p) 201static void __init urquell_setup(char **cmdline_p)
189{ 202{
@@ -200,4 +213,5 @@ static struct sh_machine_vector mv_urquell __initmv = {
200 .mv_setup = urquell_setup, 213 .mv_setup = urquell_setup,
201 .mv_init_irq = urquell_init_irq, 214 .mv_init_irq = urquell_init_irq,
202 .mv_mode_pins = urquell_mode_pins, 215 .mv_mode_pins = urquell_mode_pins,
216 .mv_clk_init = urquell_clk_init,
203}; 217};
diff --git a/arch/sh/boards/mach-ap325rxa/Makefile b/arch/sh/boards/mach-ap325rxa/Makefile
new file mode 100644
index 000000000000..4cf1774d2613
--- /dev/null
+++ b/arch/sh/boards/mach-ap325rxa/Makefile
@@ -0,0 +1,2 @@
1obj-y := setup.o sdram.o
2
diff --git a/arch/sh/boards/mach-ap325rxa/sdram.S b/arch/sh/boards/mach-ap325rxa/sdram.S
new file mode 100644
index 000000000000..db24fbed4fca
--- /dev/null
+++ b/arch/sh/boards/mach-ap325rxa/sdram.S
@@ -0,0 +1,69 @@
1/*
2 * AP325RXA sdram self/auto-refresh setup code
3 *
4 * Copyright (C) 2009 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/sys.h>
12#include <linux/errno.h>
13#include <linux/linkage.h>
14#include <asm/asm-offsets.h>
15#include <asm/suspend.h>
16#include <asm/romimage-macros.h>
17
18/* code to enter and leave self-refresh. must be self-contained.
19 * this code will be copied to on-chip memory and executed from there.
20 */
21 .balign 4
22ENTRY(ap325rxa_sdram_enter_start)
23
24 /* SBSC: disable power down and put in self-refresh mode */
25 mov.l 1f, r4
26 mov.l 2f, r1
27 mov.l @r4, r2
28 or r1, r2
29 mov.l 3f, r3
30 and r3, r2
31 mov.l r2, @r4
32
33 rts
34 nop
35
36 .balign 4
371: .long 0xfe400008 /* SDCR0 */
382: .long 0x00000400
393: .long 0xffff7fff
40ENTRY(ap325rxa_sdram_enter_end)
41
42 .balign 4
43ENTRY(ap325rxa_sdram_leave_start)
44
45 /* SBSC: set auto-refresh mode */
46 mov.l 1f, r4
47 mov.l @r4, r0
48 mov.l 4f, r1
49 and r1, r0
50 mov.l r0, @r4
51 mov.l 6f, r4
52 mov.l 8f, r0
53 mov.l @r4, r1
54 mov #-1, r4
55 add r4, r1
56 or r1, r0
57 mov.l 7f, r1
58 mov.l r0, @r1
59
60 rts
61 nop
62
63 .balign 4
641: .long 0xfe400008 /* SDCR0 */
654: .long 0xfffffbff
666: .long 0xfe40001c /* RTCOR */
677: .long 0xfe400018 /* RTCNT */
688: .long 0xa55a0000
69ENTRY(ap325rxa_sdram_leave_end)
diff --git a/arch/sh/boards/board-ap325rxa.c b/arch/sh/boards/mach-ap325rxa/setup.c
index 2d080732a964..57e37e284208 100644
--- a/arch/sh/boards/board-ap325rxa.c
+++ b/arch/sh/boards/mach-ap325rxa/setup.c
@@ -20,8 +20,6 @@
20#include <linux/i2c.h> 20#include <linux/i2c.h>
21#include <linux/smsc911x.h> 21#include <linux/smsc911x.h>
22#include <linux/gpio.h> 22#include <linux/gpio.h>
23#include <linux/spi/spi.h>
24#include <linux/spi/spi_gpio.h>
25#include <media/ov772x.h> 23#include <media/ov772x.h>
26#include <media/soc_camera.h> 24#include <media/soc_camera.h>
27#include <media/soc_camera_platform.h> 25#include <media/soc_camera_platform.h>
@@ -29,6 +27,7 @@
29#include <video/sh_mobile_lcdc.h> 27#include <video/sh_mobile_lcdc.h>
30#include <asm/io.h> 28#include <asm/io.h>
31#include <asm/clock.h> 29#include <asm/clock.h>
30#include <asm/suspend.h>
32#include <cpu/sh7723.h> 31#include <cpu/sh7723.h>
33 32
34static struct smsc911x_platform_config smsc911x_config = { 33static struct smsc911x_platform_config smsc911x_config = {
@@ -160,21 +159,21 @@ static void ap320_wvga_power_on(void *board_data)
160 msleep(100); 159 msleep(100);
161 160
162 /* ASD AP-320/325 LCD ON */ 161 /* ASD AP-320/325 LCD ON */
163 ctrl_outw(FPGA_LCDREG_VAL, FPGA_LCDREG); 162 __raw_writew(FPGA_LCDREG_VAL, FPGA_LCDREG);
164 163
165 /* backlight */ 164 /* backlight */
166 gpio_set_value(GPIO_PTS3, 0); 165 gpio_set_value(GPIO_PTS3, 0);
167 ctrl_outw(0x100, FPGA_BKLREG); 166 __raw_writew(0x100, FPGA_BKLREG);
168} 167}
169 168
170static void ap320_wvga_power_off(void *board_data) 169static void ap320_wvga_power_off(void *board_data)
171{ 170{
172 /* backlight */ 171 /* backlight */
173 ctrl_outw(0, FPGA_BKLREG); 172 __raw_writew(0, FPGA_BKLREG);
174 gpio_set_value(GPIO_PTS3, 1); 173 gpio_set_value(GPIO_PTS3, 1);
175 174
176 /* ASD AP-320/325 LCD OFF */ 175 /* ASD AP-320/325 LCD OFF */
177 ctrl_outw(0, FPGA_LCDREG); 176 __raw_writew(0, FPGA_LCDREG);
178} 177}
179 178
180static struct sh_mobile_lcdc_info lcdc_info = { 179static struct sh_mobile_lcdc_info lcdc_info = {
@@ -317,20 +316,24 @@ static struct soc_camera_platform_info camera_info = {
317 .format_name = "UYVY", 316 .format_name = "UYVY",
318 .format_depth = 16, 317 .format_depth = 16,
319 .format = { 318 .format = {
320 .pixelformat = V4L2_PIX_FMT_UYVY, 319 .code = V4L2_MBUS_FMT_YUYV8_2X8_BE,
321 .colorspace = V4L2_COLORSPACE_SMPTE170M, 320 .colorspace = V4L2_COLORSPACE_SMPTE170M,
321 .field = V4L2_FIELD_NONE,
322 .width = 640, 322 .width = 640,
323 .height = 480, 323 .height = 480,
324 }, 324 },
325 .bus_param = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH | 325 .bus_param = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH |
326 SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8, 326 SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8 |
327 SOCAM_DATA_ACTIVE_HIGH,
327 .set_capture = camera_set_capture, 328 .set_capture = camera_set_capture,
328 .link = { 329};
329 .bus_id = 0, 330
330 .add_device = ap325rxa_camera_add, 331struct soc_camera_link camera_link = {
331 .del_device = ap325rxa_camera_del, 332 .bus_id = 0,
332 .module_name = "soc_camera_platform", 333 .add_device = ap325rxa_camera_add,
333 }, 334 .del_device = ap325rxa_camera_del,
335 .module_name = "soc_camera_platform",
336 .priv = &camera_info,
334}; 337};
335 338
336static void dummy_release(struct device *dev) 339static void dummy_release(struct device *dev)
@@ -348,7 +351,7 @@ static struct platform_device camera_device = {
348static int ap325rxa_camera_add(struct soc_camera_link *icl, 351static int ap325rxa_camera_add(struct soc_camera_link *icl,
349 struct device *dev) 352 struct device *dev)
350{ 353{
351 if (icl != &camera_info.link || camera_probe() <= 0) 354 if (icl != &camera_link || camera_probe() <= 0)
352 return -ENODEV; 355 return -ENODEV;
353 356
354 camera_info.dev = dev; 357 camera_info.dev = dev;
@@ -358,7 +361,7 @@ static int ap325rxa_camera_add(struct soc_camera_link *icl,
358 361
359static void ap325rxa_camera_del(struct soc_camera_link *icl) 362static void ap325rxa_camera_del(struct soc_camera_link *icl)
360{ 363{
361 if (icl != &camera_info.link) 364 if (icl != &camera_link)
362 return; 365 return;
363 366
364 platform_device_unregister(&camera_device); 367 platform_device_unregister(&camera_device);
@@ -409,17 +412,49 @@ static struct platform_device ceu_device = {
409 }, 412 },
410}; 413};
411 414
412struct spi_gpio_platform_data sdcard_cn3_platform_data = { 415static struct resource sdhi0_cn3_resources[] = {
413 .sck = GPIO_PTD0, 416 [0] = {
414 .mosi = GPIO_PTD1, 417 .name = "SDHI0",
415 .miso = GPIO_PTD2, 418 .start = 0x04ce0000,
416 .num_chipselect = 1, 419 .end = 0x04ce01ff,
420 .flags = IORESOURCE_MEM,
421 },
422 [1] = {
423 .start = 100,
424 .flags = IORESOURCE_IRQ,
425 },
417}; 426};
418 427
419static struct platform_device sdcard_cn3_device = { 428static struct platform_device sdhi0_cn3_device = {
420 .name = "spi_gpio", 429 .name = "sh_mobile_sdhi",
421 .dev = { 430 .id = 0, /* "sdhi0" clock */
422 .platform_data = &sdcard_cn3_platform_data, 431 .num_resources = ARRAY_SIZE(sdhi0_cn3_resources),
432 .resource = sdhi0_cn3_resources,
433 .archdata = {
434 .hwblk_id = HWBLK_SDHI0,
435 },
436};
437
438static struct resource sdhi1_cn7_resources[] = {
439 [0] = {
440 .name = "SDHI1",
441 .start = 0x04cf0000,
442 .end = 0x04cf01ff,
443 .flags = IORESOURCE_MEM,
444 },
445 [1] = {
446 .start = 23,
447 .flags = IORESOURCE_IRQ,
448 },
449};
450
451static struct platform_device sdhi1_cn7_device = {
452 .name = "sh_mobile_sdhi",
453 .id = 1, /* "sdhi1" clock */
454 .num_resources = ARRAY_SIZE(sdhi1_cn7_resources),
455 .resource = sdhi1_cn7_resources,
456 .archdata = {
457 .hwblk_id = HWBLK_SDHI1,
423 }, 458 },
424}; 459};
425 460
@@ -436,16 +471,18 @@ static struct i2c_board_info ap325rxa_i2c_camera[] = {
436}; 471};
437 472
438static struct ov772x_camera_info ov7725_info = { 473static struct ov772x_camera_info ov7725_info = {
439 .buswidth = SOCAM_DATAWIDTH_8, 474 .flags = OV772X_FLAG_VFLIP | OV772X_FLAG_HFLIP | \
440 .flags = OV772X_FLAG_VFLIP | OV772X_FLAG_HFLIP, 475 OV772X_FLAG_8BIT,
441 .edgectrl = OV772X_AUTO_EDGECTRL(0xf, 0), 476 .edgectrl = OV772X_AUTO_EDGECTRL(0xf, 0),
442 .link = { 477};
443 .bus_id = 0, 478
444 .power = ov7725_power, 479static struct soc_camera_link ov7725_link = {
445 .board_info = &ap325rxa_i2c_camera[0], 480 .bus_id = 0,
446 .i2c_adapter_id = 0, 481 .power = ov7725_power,
447 .module_name = "ov772x", 482 .board_info = &ap325rxa_i2c_camera[0],
448 }, 483 .i2c_adapter_id = 0,
484 .module_name = "ov772x",
485 .priv = &ov7725_info,
449}; 486};
450 487
451static struct platform_device ap325rxa_camera[] = { 488static struct platform_device ap325rxa_camera[] = {
@@ -453,13 +490,13 @@ static struct platform_device ap325rxa_camera[] = {
453 .name = "soc-camera-pdrv", 490 .name = "soc-camera-pdrv",
454 .id = 0, 491 .id = 0,
455 .dev = { 492 .dev = {
456 .platform_data = &ov7725_info.link, 493 .platform_data = &ov7725_link,
457 }, 494 },
458 }, { 495 }, {
459 .name = "soc-camera-pdrv", 496 .name = "soc-camera-pdrv",
460 .id = 1, 497 .id = 1,
461 .dev = { 498 .dev = {
462 .platform_data = &camera_info.link, 499 .platform_data = &camera_link,
463 }, 500 },
464 }, 501 },
465}; 502};
@@ -470,22 +507,26 @@ static struct platform_device *ap325rxa_devices[] __initdata = {
470 &lcdc_device, 507 &lcdc_device,
471 &ceu_device, 508 &ceu_device,
472 &nand_flash_device, 509 &nand_flash_device,
473 &sdcard_cn3_device, 510 &sdhi0_cn3_device,
511 &sdhi1_cn7_device,
474 &ap325rxa_camera[0], 512 &ap325rxa_camera[0],
475 &ap325rxa_camera[1], 513 &ap325rxa_camera[1],
476}; 514};
477 515
478static struct spi_board_info ap325rxa_spi_devices[] = { 516extern char ap325rxa_sdram_enter_start;
479 { 517extern char ap325rxa_sdram_enter_end;
480 .modalias = "mmc_spi", 518extern char ap325rxa_sdram_leave_start;
481 .max_speed_hz = 5000000, 519extern char ap325rxa_sdram_leave_end;
482 .chip_select = 0,
483 .controller_data = (void *) GPIO_PTD5,
484 },
485};
486 520
487static int __init ap325rxa_devices_setup(void) 521static int __init ap325rxa_devices_setup(void)
488{ 522{
523 /* register board specific self-refresh code */
524 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF,
525 &ap325rxa_sdram_enter_start,
526 &ap325rxa_sdram_enter_end,
527 &ap325rxa_sdram_leave_start,
528 &ap325rxa_sdram_leave_end);
529
489 /* LD3 and LD4 LEDs */ 530 /* LD3 and LD4 LEDs */
490 gpio_request(GPIO_PTX5, NULL); /* RUN */ 531 gpio_request(GPIO_PTX5, NULL); /* RUN */
491 gpio_direction_output(GPIO_PTX5, 1); 532 gpio_direction_output(GPIO_PTX5, 1);
@@ -554,7 +595,7 @@ static int __init ap325rxa_devices_setup(void)
554 gpio_request(GPIO_PTZ4, NULL); 595 gpio_request(GPIO_PTZ4, NULL);
555 gpio_direction_output(GPIO_PTZ4, 0); /* SADDR */ 596 gpio_direction_output(GPIO_PTZ4, 0); /* SADDR */
556 597
557 ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB); 598 __raw_writew(__raw_readw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB);
558 599
559 /* FLCTL */ 600 /* FLCTL */
560 gpio_request(GPIO_FN_FCE, NULL); 601 gpio_request(GPIO_FN_FCE, NULL);
@@ -572,18 +613,34 @@ static int __init ap325rxa_devices_setup(void)
572 gpio_request(GPIO_FN_FWE, NULL); 613 gpio_request(GPIO_FN_FWE, NULL);
573 gpio_request(GPIO_FN_FRB, NULL); 614 gpio_request(GPIO_FN_FRB, NULL);
574 615
575 ctrl_outw(0, PORT_HIZCRC); 616 __raw_writew(0, PORT_HIZCRC);
576 ctrl_outw(0xFFFF, PORT_DRVCRA); 617 __raw_writew(0xFFFF, PORT_DRVCRA);
577 ctrl_outw(0xFFFF, PORT_DRVCRB); 618 __raw_writew(0xFFFF, PORT_DRVCRB);
578 619
579 platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20); 620 platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20);
580 621
622 /* SDHI0 - CN3 - SD CARD */
623 gpio_request(GPIO_FN_SDHI0CD_PTD, NULL);
624 gpio_request(GPIO_FN_SDHI0WP_PTD, NULL);
625 gpio_request(GPIO_FN_SDHI0D3_PTD, NULL);
626 gpio_request(GPIO_FN_SDHI0D2_PTD, NULL);
627 gpio_request(GPIO_FN_SDHI0D1_PTD, NULL);
628 gpio_request(GPIO_FN_SDHI0D0_PTD, NULL);
629 gpio_request(GPIO_FN_SDHI0CMD_PTD, NULL);
630 gpio_request(GPIO_FN_SDHI0CLK_PTD, NULL);
631
632 /* SDHI1 - CN7 - MICRO SD CARD */
633 gpio_request(GPIO_FN_SDHI1CD, NULL);
634 gpio_request(GPIO_FN_SDHI1D3, NULL);
635 gpio_request(GPIO_FN_SDHI1D2, NULL);
636 gpio_request(GPIO_FN_SDHI1D1, NULL);
637 gpio_request(GPIO_FN_SDHI1D0, NULL);
638 gpio_request(GPIO_FN_SDHI1CMD, NULL);
639 gpio_request(GPIO_FN_SDHI1CLK, NULL);
640
581 i2c_register_board_info(0, ap325rxa_i2c_devices, 641 i2c_register_board_info(0, ap325rxa_i2c_devices,
582 ARRAY_SIZE(ap325rxa_i2c_devices)); 642 ARRAY_SIZE(ap325rxa_i2c_devices));
583 643
584 spi_register_board_info(ap325rxa_spi_devices,
585 ARRAY_SIZE(ap325rxa_spi_devices));
586
587 return platform_add_devices(ap325rxa_devices, 644 return platform_add_devices(ap325rxa_devices,
588 ARRAY_SIZE(ap325rxa_devices)); 645 ARRAY_SIZE(ap325rxa_devices));
589} 646}
diff --git a/arch/sh/boards/mach-cayman/irq.c b/arch/sh/boards/mach-cayman/irq.c
index 33f770856319..1394b078db36 100644
--- a/arch/sh/boards/mach-cayman/irq.c
+++ b/arch/sh/boards/mach-cayman/irq.c
@@ -66,9 +66,9 @@ static void enable_cayman_irq(unsigned int irq)
66 reg = EPLD_MASK_BASE + ((irq / 8) << 2); 66 reg = EPLD_MASK_BASE + ((irq / 8) << 2);
67 bit = 1<<(irq % 8); 67 bit = 1<<(irq % 8);
68 local_irq_save(flags); 68 local_irq_save(flags);
69 mask = ctrl_inl(reg); 69 mask = __raw_readl(reg);
70 mask |= bit; 70 mask |= bit;
71 ctrl_outl(mask, reg); 71 __raw_writel(mask, reg);
72 local_irq_restore(flags); 72 local_irq_restore(flags);
73} 73}
74 74
@@ -83,9 +83,9 @@ void disable_cayman_irq(unsigned int irq)
83 reg = EPLD_MASK_BASE + ((irq / 8) << 2); 83 reg = EPLD_MASK_BASE + ((irq / 8) << 2);
84 bit = 1<<(irq % 8); 84 bit = 1<<(irq % 8);
85 local_irq_save(flags); 85 local_irq_save(flags);
86 mask = ctrl_inl(reg); 86 mask = __raw_readl(reg);
87 mask &= ~bit; 87 mask &= ~bit;
88 ctrl_outl(mask, reg); 88 __raw_writel(mask, reg);
89 local_irq_restore(flags); 89 local_irq_restore(flags);
90} 90}
91 91
@@ -109,8 +109,8 @@ int cayman_irq_demux(int evt)
109 unsigned long status; 109 unsigned long status;
110 int i; 110 int i;
111 111
112 status = ctrl_inl(EPLD_STATUS_BASE) & 112 status = __raw_readl(EPLD_STATUS_BASE) &
113 ctrl_inl(EPLD_MASK_BASE) & 0xff; 113 __raw_readl(EPLD_MASK_BASE) & 0xff;
114 if (status == 0) { 114 if (status == 0) {
115 irq = -1; 115 irq = -1;
116 } else { 116 } else {
@@ -126,8 +126,8 @@ int cayman_irq_demux(int evt)
126 unsigned long status; 126 unsigned long status;
127 int i; 127 int i;
128 128
129 status = ctrl_inl(EPLD_STATUS_BASE + 3 * sizeof(u32)) & 129 status = __raw_readl(EPLD_STATUS_BASE + 3 * sizeof(u32)) &
130 ctrl_inl(EPLD_MASK_BASE + 3 * sizeof(u32)) & 0xff; 130 __raw_readl(EPLD_MASK_BASE + 3 * sizeof(u32)) & 0xff;
131 if (status == 0) { 131 if (status == 0) {
132 irq = -1; 132 irq = -1;
133 } else { 133 } else {
diff --git a/arch/sh/boards/mach-dreamcast/irq.c b/arch/sh/boards/mach-dreamcast/irq.c
index f55fc8e795e9..d932667410ab 100644
--- a/arch/sh/boards/mach-dreamcast/irq.c
+++ b/arch/sh/boards/mach-dreamcast/irq.c
@@ -135,3 +135,30 @@ int systemasic_irq_demux(int irq)
135 /* Not reached */ 135 /* Not reached */
136 return irq; 136 return irq;
137} 137}
138
139void systemasic_irq_init(void)
140{
141 int i, nid = cpu_to_node(boot_cpu_data);
142
143 /* Assign all virtual IRQs to the System ASIC int. handler */
144 for (i = HW_EVENT_IRQ_BASE; i < HW_EVENT_IRQ_MAX; i++) {
145 unsigned int irq;
146
147 irq = create_irq_nr(i, nid);
148 if (unlikely(irq == 0)) {
149 pr_err("%s: failed hooking irq %d for systemasic\n",
150 __func__, i);
151 return;
152 }
153
154 if (unlikely(irq != i)) {
155 pr_err("%s: got irq %d but wanted %d, bailing.\n",
156 __func__, irq, i);
157 destroy_irq(irq);
158 return;
159 }
160
161 set_irq_chip_and_handler(i, &systemasic_int,
162 handle_level_irq);
163 }
164}
diff --git a/arch/sh/boards/mach-dreamcast/rtc.c b/arch/sh/boards/mach-dreamcast/rtc.c
index a7433685798d..061d65714fcc 100644
--- a/arch/sh/boards/mach-dreamcast/rtc.c
+++ b/arch/sh/boards/mach-dreamcast/rtc.c
@@ -35,11 +35,11 @@ static void aica_rtc_gettimeofday(struct timespec *ts)
35 unsigned long val1, val2; 35 unsigned long val1, val2;
36 36
37 do { 37 do {
38 val1 = ((ctrl_inl(AICA_RTC_SECS_H) & 0xffff) << 16) | 38 val1 = ((__raw_readl(AICA_RTC_SECS_H) & 0xffff) << 16) |
39 (ctrl_inl(AICA_RTC_SECS_L) & 0xffff); 39 (__raw_readl(AICA_RTC_SECS_L) & 0xffff);
40 40
41 val2 = ((ctrl_inl(AICA_RTC_SECS_H) & 0xffff) << 16) | 41 val2 = ((__raw_readl(AICA_RTC_SECS_H) & 0xffff) << 16) |
42 (ctrl_inl(AICA_RTC_SECS_L) & 0xffff); 42 (__raw_readl(AICA_RTC_SECS_L) & 0xffff);
43 } while (val1 != val2); 43 } while (val1 != val2);
44 44
45 ts->tv_sec = val1 - TWENTY_YEARS; 45 ts->tv_sec = val1 - TWENTY_YEARS;
@@ -60,14 +60,14 @@ static int aica_rtc_settimeofday(const time_t secs)
60 unsigned long adj = secs + TWENTY_YEARS; 60 unsigned long adj = secs + TWENTY_YEARS;
61 61
62 do { 62 do {
63 ctrl_outl((adj & 0xffff0000) >> 16, AICA_RTC_SECS_H); 63 __raw_writel((adj & 0xffff0000) >> 16, AICA_RTC_SECS_H);
64 ctrl_outl((adj & 0xffff), AICA_RTC_SECS_L); 64 __raw_writel((adj & 0xffff), AICA_RTC_SECS_L);
65 65
66 val1 = ((ctrl_inl(AICA_RTC_SECS_H) & 0xffff) << 16) | 66 val1 = ((__raw_readl(AICA_RTC_SECS_H) & 0xffff) << 16) |
67 (ctrl_inl(AICA_RTC_SECS_L) & 0xffff); 67 (__raw_readl(AICA_RTC_SECS_L) & 0xffff);
68 68
69 val2 = ((ctrl_inl(AICA_RTC_SECS_H) & 0xffff) << 16) | 69 val2 = ((__raw_readl(AICA_RTC_SECS_H) & 0xffff) << 16) |
70 (ctrl_inl(AICA_RTC_SECS_L) & 0xffff); 70 (__raw_readl(AICA_RTC_SECS_L) & 0xffff);
71 } while (val1 != val2); 71 } while (val1 != val2);
72 72
73 return 0; 73 return 0;
diff --git a/arch/sh/boards/mach-dreamcast/setup.c b/arch/sh/boards/mach-dreamcast/setup.c
index a4b7402d6176..ad1a4db72e04 100644
--- a/arch/sh/boards/mach-dreamcast/setup.c
+++ b/arch/sh/boards/mach-dreamcast/setup.c
@@ -28,25 +28,8 @@
28#include <asm/machvec.h> 28#include <asm/machvec.h>
29#include <mach/sysasic.h> 29#include <mach/sysasic.h>
30 30
31extern struct irq_chip systemasic_int;
32extern void aica_time_init(void);
33extern int systemasic_irq_demux(int);
34
35static void __init dreamcast_setup(char **cmdline_p) 31static void __init dreamcast_setup(char **cmdline_p)
36{ 32{
37 int i;
38
39 /* Mask all hardware events */
40 /* XXX */
41
42 /* Acknowledge any previous events */
43 /* XXX */
44
45 /* Assign all virtual IRQs to the System ASIC int. handler */
46 for (i = HW_EVENT_IRQ_BASE; i < HW_EVENT_IRQ_MAX; i++)
47 set_irq_chip_and_handler(i, &systemasic_int,
48 handle_level_irq);
49
50 board_time_init = aica_time_init; 33 board_time_init = aica_time_init;
51} 34}
52 35
@@ -54,4 +37,5 @@ static struct sh_machine_vector mv_dreamcast __initmv = {
54 .mv_name = "Sega Dreamcast", 37 .mv_name = "Sega Dreamcast",
55 .mv_setup = dreamcast_setup, 38 .mv_setup = dreamcast_setup,
56 .mv_irq_demux = systemasic_irq_demux, 39 .mv_irq_demux = systemasic_irq_demux,
40 .mv_init_irq = systemasic_irq_init,
57}; 41};
diff --git a/arch/sh/boards/mach-ecovec24/Makefile b/arch/sh/boards/mach-ecovec24/Makefile
index 51f852151655..e69bc82208fc 100644
--- a/arch/sh/boards/mach-ecovec24/Makefile
+++ b/arch/sh/boards/mach-ecovec24/Makefile
@@ -6,4 +6,4 @@
6# for more details. 6# for more details.
7# 7#
8 8
9obj-y := setup.o \ No newline at end of file 9obj-y := setup.o sdram.o \ No newline at end of file
diff --git a/arch/sh/boards/mach-ecovec24/sdram.S b/arch/sh/boards/mach-ecovec24/sdram.S
new file mode 100644
index 000000000000..3963c6f23d52
--- /dev/null
+++ b/arch/sh/boards/mach-ecovec24/sdram.S
@@ -0,0 +1,111 @@
1/*
2 * Ecovec24 sdram self/auto-refresh setup code
3 *
4 * Copyright (C) 2009 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/sys.h>
12#include <linux/errno.h>
13#include <linux/linkage.h>
14#include <asm/asm-offsets.h>
15#include <asm/suspend.h>
16#include <asm/romimage-macros.h>
17
18/* code to enter and leave self-refresh. must be self-contained.
19 * this code will be copied to on-chip memory and executed from there.
20 */
21 .balign 4
22ENTRY(ecovec24_sdram_enter_start)
23
24 /* DBSC: put memory in self-refresh mode */
25
26 ED 0xFD000010, 0x00000000 /* DBEN */
27 ED 0xFD000040, 0x00000000 /* DBRFPDN0 */
28 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
29 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
30 ED 0xFD000040, 0x00000001 /* DBRFPDN0 */
31
32 rts
33 nop
34
35ENTRY(ecovec24_sdram_enter_end)
36
37 .balign 4
38ENTRY(ecovec24_sdram_leave_start)
39
40 mov.l @(SH_SLEEP_MODE, r5), r0
41 tst #SUSP_SH_RSTANDBY, r0
42 bf resume_rstandby
43
44 /* DBSC: put memory in auto-refresh mode */
45
46 ED 0xFD000040, 0x00000000 /* DBRFPDN0 */
47 WAIT 1
48 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
49 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
50 ED 0xFD000010, 0x00000001 /* DBEN */
51 ED 0xFD000040, 0x00010000 /* DBRFPDN0 */
52
53 rts
54 nop
55
56resume_rstandby:
57
58 /* DBSC: re-initialize and put in auto-refresh */
59
60 ED 0xFD000108, 0x00000181 /* DBPDCNT0 */
61 ED 0xFD000020, 0x015B0002 /* DBCONF */
62 ED 0xFD000030, 0x03071502 /* DBTR0 */
63 ED 0xFD000034, 0x02020102 /* DBTR1 */
64 ED 0xFD000038, 0x01090405 /* DBTR2 */
65 ED 0xFD00003C, 0x00000002 /* DBTR3 */
66 ED 0xFD000008, 0x00000005 /* DBKIND */
67 ED 0xFD000040, 0x00000001 /* DBRFPDN0 */
68 ED 0xFD000040, 0x00000000 /* DBRFPDN0 */
69 ED 0xFD000018, 0x00000001 /* DBCKECNT */
70
71 mov #100,r0
72WAIT_400NS:
73 dt r0
74 bf WAIT_400NS
75
76 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
77 ED 0xFD000060, 0x00020000 /* DBMRCNT (EMR2) */
78 ED 0xFD000060, 0x00030000 /* DBMRCNT (EMR3) */
79 ED 0xFD000060, 0x00010004 /* DBMRCNT (EMR) */
80 ED 0xFD000060, 0x00000532 /* DBMRCNT (MRS) */
81 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
82 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
83 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
84 ED 0xFD000060, 0x00000432 /* DBMRCNT (MRS) */
85 ED 0xFD000060, 0x000103c0 /* DBMRCNT (EMR) */
86 ED 0xFD000060, 0x00010040 /* DBMRCNT (EMR) */
87
88 mov #100,r0
89WAIT_400NS_2:
90 dt r0
91 bf WAIT_400NS_2
92
93 ED 0xFD000010, 0x00000001 /* DBEN */
94 ED 0xFD000044, 0x0000050f /* DBRFPDN1 */
95 ED 0xFD000048, 0x236800e6 /* DBRFPDN2 */
96
97 mov.l DUMMY,r0
98 mov.l @r0, r1 /* force single dummy read */
99
100 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
101 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
102 ED 0xFD000108, 0x00000080 /* DBPDCNT0 */
103 ED 0xFD000040, 0x00010000 /* DBRFPDN0 */
104
105 rts
106 nop
107
108 .balign 4
109DUMMY: .long 0xac400000
110
111ENTRY(ecovec24_sdram_leave_end)
diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c
index 3b1ceb46fa54..6c13b92742e8 100644
--- a/arch/sh/boards/mach-ecovec24/setup.c
+++ b/arch/sh/boards/mach-ecovec24/setup.c
@@ -19,13 +19,22 @@
19#include <linux/usb/r8a66597.h> 19#include <linux/usb/r8a66597.h>
20#include <linux/i2c.h> 20#include <linux/i2c.h>
21#include <linux/i2c/tsc2007.h> 21#include <linux/i2c/tsc2007.h>
22#include <linux/spi/spi.h>
23#include <linux/spi/sh_msiof.h>
24#include <linux/spi/mmc_spi.h>
25#include <linux/mmc/host.h>
22#include <linux/input.h> 26#include <linux/input.h>
27#include <linux/input/sh_keysc.h>
28#include <linux/mfd/sh_mobile_sdhi.h>
23#include <video/sh_mobile_lcdc.h> 29#include <video/sh_mobile_lcdc.h>
30#include <sound/sh_fsi.h>
24#include <media/sh_mobile_ceu.h> 31#include <media/sh_mobile_ceu.h>
32#include <media/tw9910.h>
33#include <media/mt9t112.h>
25#include <asm/heartbeat.h> 34#include <asm/heartbeat.h>
26#include <asm/sh_eth.h> 35#include <asm/sh_eth.h>
27#include <asm/sh_keysc.h>
28#include <asm/clock.h> 36#include <asm/clock.h>
37#include <asm/suspend.h>
29#include <cpu/sh7724.h> 38#include <cpu/sh7724.h>
30 39
31/* 40/*
@@ -55,18 +64,16 @@
55 64
56/* Heartbeat */ 65/* Heartbeat */
57static unsigned char led_pos[] = { 0, 1, 2, 3 }; 66static unsigned char led_pos[] = { 0, 1, 2, 3 };
67
58static struct heartbeat_data heartbeat_data = { 68static struct heartbeat_data heartbeat_data = {
59 .regsize = 8,
60 .nr_bits = 4, 69 .nr_bits = 4,
61 .bit_pos = led_pos, 70 .bit_pos = led_pos,
62}; 71};
63 72
64static struct resource heartbeat_resources[] = { 73static struct resource heartbeat_resource = {
65 [0] = { 74 .start = 0xA405012C, /* PTG */
66 .start = 0xA405012C, /* PTG */ 75 .end = 0xA405012E - 1,
67 .end = 0xA405012E - 1, 76 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
68 .flags = IORESOURCE_MEM,
69 },
70}; 77};
71 78
72static struct platform_device heartbeat_device = { 79static struct platform_device heartbeat_device = {
@@ -75,8 +82,8 @@ static struct platform_device heartbeat_device = {
75 .dev = { 82 .dev = {
76 .platform_data = &heartbeat_data, 83 .platform_data = &heartbeat_data,
77 }, 84 },
78 .num_resources = ARRAY_SIZE(heartbeat_resources), 85 .num_resources = 1,
79 .resource = heartbeat_resources, 86 .resource = &heartbeat_resource,
80}; 87};
81 88
82/* MTD */ 89/* MTD */
@@ -119,8 +126,6 @@ static struct platform_device nor_flash_device = {
119 126
120/* SH Eth */ 127/* SH Eth */
121#define SH_ETH_ADDR (0xA4600000) 128#define SH_ETH_ADDR (0xA4600000)
122#define SH_ETH_MAHR (SH_ETH_ADDR + 0x1C0)
123#define SH_ETH_MALR (SH_ETH_ADDR + 0x1C8)
124static struct resource sh_eth_resources[] = { 129static struct resource sh_eth_resources[] = {
125 [0] = { 130 [0] = {
126 .start = SH_ETH_ADDR, 131 .start = SH_ETH_ADDR,
@@ -147,6 +152,9 @@ static struct platform_device sh_eth_device = {
147 }, 152 },
148 .num_resources = ARRAY_SIZE(sh_eth_resources), 153 .num_resources = ARRAY_SIZE(sh_eth_resources),
149 .resource = sh_eth_resources, 154 .resource = sh_eth_resources,
155 .archdata = {
156 .hwblk_id = HWBLK_ETHER,
157 },
150}; 158};
151 159
152/* USB0 host */ 160/* USB0 host */
@@ -185,30 +193,18 @@ static struct platform_device usb0_host_device = {
185 .resource = usb0_host_resources, 193 .resource = usb0_host_resources,
186}; 194};
187 195
188/* 196/* USB1 host/function */
189 * USB1
190 *
191 * CN5 can use both host/function,
192 * and we can determine it by checking PTB[3]
193 *
194 * This time only USB1 host is supported.
195 */
196void usb1_port_power(int port, int power) 197void usb1_port_power(int port, int power)
197{ 198{
198 if (!gpio_get_value(GPIO_PTB3)) {
199 printk(KERN_ERR "USB1 function is not supported\n");
200 return;
201 }
202
203 gpio_set_value(GPIO_PTB5, power); 199 gpio_set_value(GPIO_PTB5, power);
204} 200}
205 201
206static struct r8a66597_platdata usb1_host_data = { 202static struct r8a66597_platdata usb1_common_data = {
207 .on_chip = 1, 203 .on_chip = 1,
208 .port_power = usb1_port_power, 204 .port_power = usb1_port_power,
209}; 205};
210 206
211static struct resource usb1_host_resources[] = { 207static struct resource usb1_common_resources[] = {
212 [0] = { 208 [0] = {
213 .start = 0xa4d90000, 209 .start = 0xa4d90000,
214 .end = 0xa4d90124 - 1, 210 .end = 0xa4d90124 - 1,
@@ -221,16 +217,16 @@ static struct resource usb1_host_resources[] = {
221 }, 217 },
222}; 218};
223 219
224static struct platform_device usb1_host_device = { 220static struct platform_device usb1_common_device = {
225 .name = "r8a66597_hcd", 221 /* .name will be added in arch_setup */
226 .id = 1, 222 .id = 1,
227 .dev = { 223 .dev = {
228 .dma_mask = NULL, /* not use dma */ 224 .dma_mask = NULL, /* not use dma */
229 .coherent_dma_mask = 0xffffffff, 225 .coherent_dma_mask = 0xffffffff,
230 .platform_data = &usb1_host_data, 226 .platform_data = &usb1_common_data,
231 }, 227 },
232 .num_resources = ARRAY_SIZE(usb1_host_resources), 228 .num_resources = ARRAY_SIZE(usb1_common_resources),
233 .resource = usb1_host_resources, 229 .resource = usb1_common_resources,
234}; 230};
235 231
236/* LCDC */ 232/* LCDC */
@@ -345,10 +341,20 @@ static struct platform_device ceu1_device = {
345}; 341};
346 342
347/* I2C device */ 343/* I2C device */
344static struct i2c_board_info i2c0_devices[] = {
345 {
346 I2C_BOARD_INFO("da7210", 0x1a),
347 },
348};
349
348static struct i2c_board_info i2c1_devices[] = { 350static struct i2c_board_info i2c1_devices[] = {
349 { 351 {
350 I2C_BOARD_INFO("r2025sd", 0x32), 352 I2C_BOARD_INFO("r2025sd", 0x32),
351 }, 353 },
354 {
355 I2C_BOARD_INFO("lis3lv02d", 0x1c),
356 .irq = 33,
357 }
352}; 358};
353 359
354/* KEYSC */ 360/* KEYSC */
@@ -428,18 +434,367 @@ static struct i2c_board_info ts_i2c_clients = {
428 .irq = IRQ0, 434 .irq = IRQ0,
429}; 435};
430 436
437#ifdef CONFIG_MFD_SH_MOBILE_SDHI
438/* SHDI0 */
439static void sdhi0_set_pwr(struct platform_device *pdev, int state)
440{
441 gpio_set_value(GPIO_PTB6, state);
442}
443
444static struct sh_mobile_sdhi_info sdhi0_info = {
445 .set_pwr = sdhi0_set_pwr,
446};
447
448static struct resource sdhi0_resources[] = {
449 [0] = {
450 .name = "SDHI0",
451 .start = 0x04ce0000,
452 .end = 0x04ce01ff,
453 .flags = IORESOURCE_MEM,
454 },
455 [1] = {
456 .start = 100,
457 .flags = IORESOURCE_IRQ,
458 },
459};
460
461static struct platform_device sdhi0_device = {
462 .name = "sh_mobile_sdhi",
463 .num_resources = ARRAY_SIZE(sdhi0_resources),
464 .resource = sdhi0_resources,
465 .id = 0,
466 .dev = {
467 .platform_data = &sdhi0_info,
468 },
469 .archdata = {
470 .hwblk_id = HWBLK_SDHI0,
471 },
472};
473
474/* SHDI1 */
475static void sdhi1_set_pwr(struct platform_device *pdev, int state)
476{
477 gpio_set_value(GPIO_PTB7, state);
478}
479
480static struct sh_mobile_sdhi_info sdhi1_info = {
481 .set_pwr = sdhi1_set_pwr,
482};
483
484static struct resource sdhi1_resources[] = {
485 [0] = {
486 .name = "SDHI1",
487 .start = 0x04cf0000,
488 .end = 0x04cf01ff,
489 .flags = IORESOURCE_MEM,
490 },
491 [1] = {
492 .start = 23,
493 .flags = IORESOURCE_IRQ,
494 },
495};
496
497static struct platform_device sdhi1_device = {
498 .name = "sh_mobile_sdhi",
499 .num_resources = ARRAY_SIZE(sdhi1_resources),
500 .resource = sdhi1_resources,
501 .id = 1,
502 .dev = {
503 .platform_data = &sdhi1_info,
504 },
505 .archdata = {
506 .hwblk_id = HWBLK_SDHI1,
507 },
508};
509
510#else
511
512/* MMC SPI */
513static int mmc_spi_get_ro(struct device *dev)
514{
515 return gpio_get_value(GPIO_PTY6);
516}
517
518static int mmc_spi_get_cd(struct device *dev)
519{
520 return !gpio_get_value(GPIO_PTY7);
521}
522
523static void mmc_spi_setpower(struct device *dev, unsigned int maskval)
524{
525 gpio_set_value(GPIO_PTB6, maskval ? 1 : 0);
526}
527
528static struct mmc_spi_platform_data mmc_spi_info = {
529 .get_ro = mmc_spi_get_ro,
530 .get_cd = mmc_spi_get_cd,
531 .caps = MMC_CAP_NEEDS_POLL,
532 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3.3V only */
533 .setpower = mmc_spi_setpower,
534};
535
536static struct spi_board_info spi_bus[] = {
537 {
538 .modalias = "mmc_spi",
539 .platform_data = &mmc_spi_info,
540 .max_speed_hz = 5000000,
541 .mode = SPI_MODE_0,
542 .controller_data = (void *) GPIO_PTM4,
543 },
544};
545
546/* MSIOF0 */
547static struct sh_msiof_spi_info msiof0_data = {
548 .num_chipselect = 1,
549};
550
551static struct resource msiof0_resources[] = {
552 [0] = {
553 .name = "MSIOF0",
554 .start = 0xa4c40000,
555 .end = 0xa4c40063,
556 .flags = IORESOURCE_MEM,
557 },
558 [1] = {
559 .start = 84,
560 .flags = IORESOURCE_IRQ,
561 },
562};
563
564static struct platform_device msiof0_device = {
565 .name = "spi_sh_msiof",
566 .id = 0, /* MSIOF0 */
567 .dev = {
568 .platform_data = &msiof0_data,
569 },
570 .num_resources = ARRAY_SIZE(msiof0_resources),
571 .resource = msiof0_resources,
572 .archdata = {
573 .hwblk_id = HWBLK_MSIOF0,
574 },
575};
576
577#endif
578
579/* I2C Video/Camera */
580static struct i2c_board_info i2c_camera[] = {
581 {
582 I2C_BOARD_INFO("tw9910", 0x45),
583 },
584 {
585 /* 1st camera */
586 I2C_BOARD_INFO("mt9t112", 0x3c),
587 },
588 {
589 /* 2nd camera */
590 I2C_BOARD_INFO("mt9t112", 0x3c),
591 },
592};
593
594/* tw9910 */
595static int tw9910_power(struct device *dev, int mode)
596{
597 int val = mode ? 0 : 1;
598
599 gpio_set_value(GPIO_PTU2, val);
600 if (mode)
601 mdelay(100);
602
603 return 0;
604}
605
606static struct tw9910_video_info tw9910_info = {
607 .buswidth = SOCAM_DATAWIDTH_8,
608 .mpout = TW9910_MPO_FIELD,
609};
610
611static struct soc_camera_link tw9910_link = {
612 .i2c_adapter_id = 0,
613 .bus_id = 1,
614 .power = tw9910_power,
615 .board_info = &i2c_camera[0],
616 .module_name = "tw9910",
617 .priv = &tw9910_info,
618};
619
620/* mt9t112 */
621static int mt9t112_power1(struct device *dev, int mode)
622{
623 gpio_set_value(GPIO_PTA3, mode);
624 if (mode)
625 mdelay(100);
626
627 return 0;
628}
629
630static struct mt9t112_camera_info mt9t112_info1 = {
631 .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
632 .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
633};
634
635static struct soc_camera_link mt9t112_link1 = {
636 .i2c_adapter_id = 0,
637 .power = mt9t112_power1,
638 .bus_id = 0,
639 .board_info = &i2c_camera[1],
640 .module_name = "mt9t112",
641 .priv = &mt9t112_info1,
642};
643
644static int mt9t112_power2(struct device *dev, int mode)
645{
646 gpio_set_value(GPIO_PTA4, mode);
647 if (mode)
648 mdelay(100);
649
650 return 0;
651}
652
653static struct mt9t112_camera_info mt9t112_info2 = {
654 .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
655 .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
656};
657
658static struct soc_camera_link mt9t112_link2 = {
659 .i2c_adapter_id = 1,
660 .power = mt9t112_power2,
661 .bus_id = 1,
662 .board_info = &i2c_camera[2],
663 .module_name = "mt9t112",
664 .priv = &mt9t112_info2,
665};
666
667static struct platform_device camera_devices[] = {
668 {
669 .name = "soc-camera-pdrv",
670 .id = 0,
671 .dev = {
672 .platform_data = &tw9910_link,
673 },
674 },
675 {
676 .name = "soc-camera-pdrv",
677 .id = 1,
678 .dev = {
679 .platform_data = &mt9t112_link1,
680 },
681 },
682 {
683 .name = "soc-camera-pdrv",
684 .id = 2,
685 .dev = {
686 .platform_data = &mt9t112_link2,
687 },
688 },
689};
690
691/* FSI */
692/*
693 * FSI-B use external clock which came from da7210.
694 * So, we should change parent of fsi
695 */
696#define FCLKBCR 0xa415000c
697static void fsimck_init(struct clk *clk)
698{
699 u32 status = __raw_readl(clk->enable_reg);
700
701 /* use external clock */
702 status &= ~0x000000ff;
703 status |= 0x00000080;
704
705 __raw_writel(status, clk->enable_reg);
706}
707
708static struct clk_ops fsimck_clk_ops = {
709 .init = fsimck_init,
710};
711
712static struct clk fsimckb_clk = {
713 .name = "fsimckb_clk",
714 .id = -1,
715 .ops = &fsimck_clk_ops,
716 .enable_reg = (void __iomem *)FCLKBCR,
717 .rate = 0, /* unknown */
718};
719
720struct sh_fsi_platform_info fsi_info = {
721 .portb_flags = SH_FSI_BRS_INV |
722 SH_FSI_OUT_SLAVE_MODE |
723 SH_FSI_IN_SLAVE_MODE |
724 SH_FSI_OFMT(I2S) |
725 SH_FSI_IFMT(I2S),
726};
727
728static struct resource fsi_resources[] = {
729 [0] = {
730 .name = "FSI",
731 .start = 0xFE3C0000,
732 .end = 0xFE3C021d,
733 .flags = IORESOURCE_MEM,
734 },
735 [1] = {
736 .start = 108,
737 .flags = IORESOURCE_IRQ,
738 },
739};
740
741static struct platform_device fsi_device = {
742 .name = "sh_fsi",
743 .id = 0,
744 .num_resources = ARRAY_SIZE(fsi_resources),
745 .resource = fsi_resources,
746 .dev = {
747 .platform_data = &fsi_info,
748 },
749 .archdata = {
750 .hwblk_id = HWBLK_SPU, /* FSI needs SPU hwblk */
751 },
752};
753
754/* IrDA */
755static struct resource irda_resources[] = {
756 [0] = {
757 .name = "IrDA",
758 .start = 0xA45D0000,
759 .end = 0xA45D0049,
760 .flags = IORESOURCE_MEM,
761 },
762 [1] = {
763 .start = 20,
764 .flags = IORESOURCE_IRQ,
765 },
766};
767
768static struct platform_device irda_device = {
769 .name = "sh_sir",
770 .num_resources = ARRAY_SIZE(irda_resources),
771 .resource = irda_resources,
772};
773
431static struct platform_device *ecovec_devices[] __initdata = { 774static struct platform_device *ecovec_devices[] __initdata = {
432 &heartbeat_device, 775 &heartbeat_device,
433 &nor_flash_device, 776 &nor_flash_device,
434 &sh_eth_device, 777 &sh_eth_device,
435 &usb0_host_device, 778 &usb0_host_device,
436 &usb1_host_device, /* USB1 host support */ 779 &usb1_common_device,
437 &lcdc_device, 780 &lcdc_device,
438 &ceu0_device, 781 &ceu0_device,
439 &ceu1_device, 782 &ceu1_device,
440 &keysc_device, 783 &keysc_device,
784#ifdef CONFIG_MFD_SH_MOBILE_SDHI
785 &sdhi0_device,
786 &sdhi1_device,
787#else
788 &msiof0_device,
789#endif
790 &camera_devices[0],
791 &camera_devices[1],
792 &camera_devices[2],
793 &fsi_device,
794 &irda_device,
441}; 795};
442 796
797#ifdef CONFIG_I2C
443#define EEPROM_ADDR 0x50 798#define EEPROM_ADDR 0x50
444static u8 mac_read(struct i2c_adapter *a, u8 command) 799static u8 mac_read(struct i2c_adapter *a, u8 command)
445{ 800{
@@ -466,12 +821,9 @@ static u8 mac_read(struct i2c_adapter *a, u8 command)
466 return buf; 821 return buf;
467} 822}
468 823
469#define MAC_LEN 6 824static void __init sh_eth_init(struct sh_eth_plat_data *pd)
470static void __init sh_eth_init(void)
471{ 825{
472 struct i2c_adapter *a = i2c_get_adapter(1); 826 struct i2c_adapter *a = i2c_get_adapter(1);
473 struct clk *eth_clk;
474 u8 mac[MAC_LEN];
475 int i; 827 int i;
476 828
477 if (!a) { 829 if (!a) {
@@ -479,39 +831,41 @@ static void __init sh_eth_init(void)
479 return; 831 return;
480 } 832 }
481 833
482 eth_clk = clk_get(NULL, "eth0");
483 if (!eth_clk) {
484 pr_err("can not get eth0 clk\n");
485 return;
486 }
487
488 /* read MAC address frome EEPROM */ 834 /* read MAC address frome EEPROM */
489 for (i = 0; i < MAC_LEN; i++) { 835 for (i = 0; i < sizeof(pd->mac_addr); i++) {
490 mac[i] = mac_read(a, 0x10 + i); 836 pd->mac_addr[i] = mac_read(a, 0x10 + i);
491 msleep(10); 837 msleep(10);
492 } 838 }
493 839
494 /* clock enable */ 840 i2c_put_adapter(a);
495 clk_enable(eth_clk); 841}
496 842#else
497 /* reset sh-eth */ 843static void __init sh_eth_init(struct sh_eth_plat_data *pd)
498 ctrl_outl(0x1, SH_ETH_ADDR + 0x0); 844{
499 845 pr_err("unable to read sh_eth MAC address\n");
500 /* set MAC addr */
501 ctrl_outl((mac[0] << 24) |
502 (mac[1] << 16) |
503 (mac[2] << 8) |
504 (mac[3] << 0), SH_ETH_MAHR);
505 ctrl_outl((mac[4] << 8) |
506 (mac[5] << 0), SH_ETH_MALR);
507
508 clk_put(eth_clk);
509} 846}
847#endif
510 848
511#define PORT_HIZA 0xA4050158 849#define PORT_HIZA 0xA4050158
512#define IODRIVEA 0xA405018A 850#define IODRIVEA 0xA405018A
851
852extern char ecovec24_sdram_enter_start;
853extern char ecovec24_sdram_enter_end;
854extern char ecovec24_sdram_leave_start;
855extern char ecovec24_sdram_leave_end;
856
513static int __init arch_setup(void) 857static int __init arch_setup(void)
514{ 858{
859 struct clk *clk;
860
861 /* register board specific self-refresh code */
862 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
863 SUSP_SH_RSTANDBY,
864 &ecovec24_sdram_enter_start,
865 &ecovec24_sdram_enter_end,
866 &ecovec24_sdram_leave_start,
867 &ecovec24_sdram_leave_end);
868
515 /* enable STATUS0, STATUS2 and PDSTATUS */ 869 /* enable STATUS0, STATUS2 and PDSTATUS */
516 gpio_request(GPIO_FN_STATUS0, NULL); 870 gpio_request(GPIO_FN_STATUS0, NULL);
517 gpio_request(GPIO_FN_STATUS2, NULL); 871 gpio_request(GPIO_FN_STATUS2, NULL);
@@ -530,7 +884,7 @@ static int __init arch_setup(void)
530 gpio_direction_output(GPIO_PTG1, 0); 884 gpio_direction_output(GPIO_PTG1, 0);
531 gpio_direction_output(GPIO_PTG2, 0); 885 gpio_direction_output(GPIO_PTG2, 0);
532 gpio_direction_output(GPIO_PTG3, 0); 886 gpio_direction_output(GPIO_PTG3, 0);
533 ctrl_outw((ctrl_inw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA); 887 __raw_writew((__raw_readw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA);
534 888
535 /* enable SH-Eth */ 889 /* enable SH-Eth */
536 gpio_request(GPIO_PTA1, NULL); 890 gpio_request(GPIO_PTA1, NULL);
@@ -550,16 +904,24 @@ static int __init arch_setup(void)
550 gpio_request(GPIO_FN_LNKSTA, NULL); 904 gpio_request(GPIO_FN_LNKSTA, NULL);
551 905
552 /* enable USB */ 906 /* enable USB */
553 ctrl_outw(0x0000, 0xA4D80000); 907 __raw_writew(0x0000, 0xA4D80000);
554 ctrl_outw(0x0000, 0xA4D90000); 908 __raw_writew(0x0000, 0xA4D90000);
555 gpio_request(GPIO_PTB3, NULL); 909 gpio_request(GPIO_PTB3, NULL);
556 gpio_request(GPIO_PTB4, NULL); 910 gpio_request(GPIO_PTB4, NULL);
557 gpio_request(GPIO_PTB5, NULL); 911 gpio_request(GPIO_PTB5, NULL);
558 gpio_direction_input(GPIO_PTB3); 912 gpio_direction_input(GPIO_PTB3);
559 gpio_direction_output(GPIO_PTB4, 0); 913 gpio_direction_output(GPIO_PTB4, 0);
560 gpio_direction_output(GPIO_PTB5, 0); 914 gpio_direction_output(GPIO_PTB5, 0);
561 ctrl_outw(0x0600, 0xa40501d4); 915 __raw_writew(0x0600, 0xa40501d4);
562 ctrl_outw(0x0600, 0xa4050192); 916 __raw_writew(0x0600, 0xa4050192);
917
918 if (gpio_get_value(GPIO_PTB3)) {
919 printk(KERN_INFO "USB1 function is selected\n");
920 usb1_common_device.name = "r8a66597_udc";
921 } else {
922 printk(KERN_INFO "USB1 host is selected\n");
923 usb1_common_device.name = "r8a66597_hcd";
924 }
563 925
564 /* enable LCDC */ 926 /* enable LCDC */
565 gpio_request(GPIO_FN_LCDD23, NULL); 927 gpio_request(GPIO_FN_LCDD23, NULL);
@@ -592,7 +954,7 @@ static int __init arch_setup(void)
592 gpio_request(GPIO_FN_LCDVSYN, NULL); 954 gpio_request(GPIO_FN_LCDVSYN, NULL);
593 gpio_request(GPIO_FN_LCDDON, NULL); 955 gpio_request(GPIO_FN_LCDDON, NULL);
594 gpio_request(GPIO_FN_LCDLCLK, NULL); 956 gpio_request(GPIO_FN_LCDLCLK, NULL);
595 ctrl_outw((ctrl_inw(PORT_HIZA) & ~0x0001), PORT_HIZA); 957 __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
596 958
597 gpio_request(GPIO_PTE6, NULL); 959 gpio_request(GPIO_PTE6, NULL);
598 gpio_request(GPIO_PTU1, NULL); 960 gpio_request(GPIO_PTU1, NULL);
@@ -603,8 +965,8 @@ static int __init arch_setup(void)
603 gpio_direction_output(GPIO_PTR1, 0); 965 gpio_direction_output(GPIO_PTR1, 0);
604 gpio_direction_output(GPIO_PTA2, 0); 966 gpio_direction_output(GPIO_PTA2, 0);
605 967
606 /* I/O buffer drive ability is low */ 968 /* I/O buffer drive ability is high */
607 ctrl_outw((ctrl_inw(IODRIVEA) & ~0x00c0) | 0x0040 , IODRIVEA); 969 __raw_writew((__raw_readw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA);
608 970
609 if (gpio_get_value(GPIO_PTE6)) { 971 if (gpio_get_value(GPIO_PTE6)) {
610 /* DVI */ 972 /* DVI */
@@ -710,7 +1072,106 @@ static int __init arch_setup(void)
710 gpio_direction_input(GPIO_PTR5); 1072 gpio_direction_input(GPIO_PTR5);
711 gpio_direction_input(GPIO_PTR6); 1073 gpio_direction_input(GPIO_PTR6);
712 1074
1075#ifdef CONFIG_MFD_SH_MOBILE_SDHI
1076 /* enable SDHI0 on CN11 (needs DS2.4 set to ON) */
1077 gpio_request(GPIO_FN_SDHI0CD, NULL);
1078 gpio_request(GPIO_FN_SDHI0WP, NULL);
1079 gpio_request(GPIO_FN_SDHI0CMD, NULL);
1080 gpio_request(GPIO_FN_SDHI0CLK, NULL);
1081 gpio_request(GPIO_FN_SDHI0D3, NULL);
1082 gpio_request(GPIO_FN_SDHI0D2, NULL);
1083 gpio_request(GPIO_FN_SDHI0D1, NULL);
1084 gpio_request(GPIO_FN_SDHI0D0, NULL);
1085 gpio_request(GPIO_PTB6, NULL);
1086 gpio_direction_output(GPIO_PTB6, 0);
1087
1088 /* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */
1089 gpio_request(GPIO_FN_SDHI1CD, NULL);
1090 gpio_request(GPIO_FN_SDHI1WP, NULL);
1091 gpio_request(GPIO_FN_SDHI1CMD, NULL);
1092 gpio_request(GPIO_FN_SDHI1CLK, NULL);
1093 gpio_request(GPIO_FN_SDHI1D3, NULL);
1094 gpio_request(GPIO_FN_SDHI1D2, NULL);
1095 gpio_request(GPIO_FN_SDHI1D1, NULL);
1096 gpio_request(GPIO_FN_SDHI1D0, NULL);
1097 gpio_request(GPIO_PTB7, NULL);
1098 gpio_direction_output(GPIO_PTB7, 0);
1099
1100 /* I/O buffer drive ability is high for SDHI1 */
1101 __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
1102#else
1103 /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */
1104 gpio_request(GPIO_FN_MSIOF0_TXD, NULL);
1105 gpio_request(GPIO_FN_MSIOF0_RXD, NULL);
1106 gpio_request(GPIO_FN_MSIOF0_TSCK, NULL);
1107 gpio_request(GPIO_PTM4, NULL); /* software CS control of TSYNC pin */
1108 gpio_direction_output(GPIO_PTM4, 1); /* active low CS */
1109 gpio_request(GPIO_PTB6, NULL); /* 3.3V power control */
1110 gpio_direction_output(GPIO_PTB6, 0); /* disable power by default */
1111 gpio_request(GPIO_PTY6, NULL); /* write protect */
1112 gpio_direction_input(GPIO_PTY6);
1113 gpio_request(GPIO_PTY7, NULL); /* card detect */
1114 gpio_direction_input(GPIO_PTY7);
1115
1116 spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus));
1117#endif
1118
1119 /* enable Video */
1120 gpio_request(GPIO_PTU2, NULL);
1121 gpio_direction_output(GPIO_PTU2, 1);
1122
1123 /* enable Camera */
1124 gpio_request(GPIO_PTA3, NULL);
1125 gpio_request(GPIO_PTA4, NULL);
1126 gpio_direction_output(GPIO_PTA3, 0);
1127 gpio_direction_output(GPIO_PTA4, 0);
1128
1129 /* enable FSI */
1130 gpio_request(GPIO_FN_FSIMCKB, NULL);
1131 gpio_request(GPIO_FN_FSIIBSD, NULL);
1132 gpio_request(GPIO_FN_FSIOBSD, NULL);
1133 gpio_request(GPIO_FN_FSIIBBCK, NULL);
1134 gpio_request(GPIO_FN_FSIIBLRCK, NULL);
1135 gpio_request(GPIO_FN_FSIOBBCK, NULL);
1136 gpio_request(GPIO_FN_FSIOBLRCK, NULL);
1137 gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
1138
1139 /* set SPU2 clock to 83.4 MHz */
1140 clk = clk_get(NULL, "spu_clk");
1141 clk_set_rate(clk, clk_round_rate(clk, 83333333));
1142 clk_put(clk);
1143
1144 /* change parent of FSI B */
1145 clk = clk_get(NULL, "fsib_clk");
1146 clk_register(&fsimckb_clk);
1147 clk_set_parent(clk, &fsimckb_clk);
1148 clk_set_rate(clk, 11000);
1149 clk_set_rate(&fsimckb_clk, 11000);
1150 clk_put(clk);
1151
1152 gpio_request(GPIO_PTU0, NULL);
1153 gpio_direction_output(GPIO_PTU0, 0);
1154 mdelay(20);
1155
1156 /* enable motion sensor */
1157 gpio_request(GPIO_FN_INTC_IRQ1, NULL);
1158 gpio_direction_input(GPIO_FN_INTC_IRQ1);
1159
1160 /* set VPU clock to 166 MHz */
1161 clk = clk_get(NULL, "vpu_clk");
1162 clk_set_rate(clk, clk_round_rate(clk, 166000000));
1163 clk_put(clk);
1164
1165 /* enable IrDA */
1166 gpio_request(GPIO_FN_IRDA_OUT, NULL);
1167 gpio_request(GPIO_FN_IRDA_IN, NULL);
1168 gpio_request(GPIO_PTU5, NULL);
1169 gpio_direction_output(GPIO_PTU5, 0);
1170
713 /* enable I2C device */ 1171 /* enable I2C device */
1172 i2c_register_board_info(0, i2c0_devices,
1173 ARRAY_SIZE(i2c0_devices));
1174
714 i2c_register_board_info(1, i2c1_devices, 1175 i2c_register_board_info(1, i2c1_devices,
715 ARRAY_SIZE(i2c1_devices)); 1176 ARRAY_SIZE(i2c1_devices));
716 1177
@@ -721,12 +1182,11 @@ arch_initcall(arch_setup);
721 1182
722static int __init devices_setup(void) 1183static int __init devices_setup(void)
723{ 1184{
724 sh_eth_init(); 1185 sh_eth_init(&sh_eth_plat);
725 return 0; 1186 return 0;
726} 1187}
727device_initcall(devices_setup); 1188device_initcall(devices_setup);
728 1189
729
730static struct sh_machine_vector mv_ecovec __initmv = { 1190static struct sh_machine_vector mv_ecovec __initmv = {
731 .mv_name = "R0P7724 (EcoVec)", 1191 .mv_name = "R0P7724 (EcoVec)",
732}; 1192};
diff --git a/arch/sh/boards/mach-highlander/irq-r7780mp.c b/arch/sh/boards/mach-highlander/irq-r7780mp.c
index 83c28bcd4d2a..9893fd3a1358 100644
--- a/arch/sh/boards/mach-highlander/irq-r7780mp.c
+++ b/arch/sh/boards/mach-highlander/irq-r7780mp.c
@@ -64,7 +64,7 @@ static DECLARE_INTC_DESC(intc_desc, "r7780mp", vectors,
64 64
65unsigned char * __init highlander_plat_irq_setup(void) 65unsigned char * __init highlander_plat_irq_setup(void)
66{ 66{
67 if ((ctrl_inw(0xa4000700) & 0xf000) == 0x2000) { 67 if ((__raw_readw(0xa4000700) & 0xf000) == 0x2000) {
68 printk(KERN_INFO "Using r7780mp interrupt controller.\n"); 68 printk(KERN_INFO "Using r7780mp interrupt controller.\n");
69 register_intc_controller(&intc_desc); 69 register_intc_controller(&intc_desc);
70 return irl2irq; 70 return irl2irq;
diff --git a/arch/sh/boards/mach-highlander/irq-r7780rp.c b/arch/sh/boards/mach-highlander/irq-r7780rp.c
index b721e86b5af4..0805b2151452 100644
--- a/arch/sh/boards/mach-highlander/irq-r7780rp.c
+++ b/arch/sh/boards/mach-highlander/irq-r7780rp.c
@@ -57,7 +57,7 @@ static DECLARE_INTC_DESC(intc_desc, "r7780rp", vectors,
57 57
58unsigned char * __init highlander_plat_irq_setup(void) 58unsigned char * __init highlander_plat_irq_setup(void)
59{ 59{
60 if (ctrl_inw(0xa5000600)) { 60 if (__raw_readw(0xa5000600)) {
61 printk(KERN_INFO "Using r7780rp interrupt controller.\n"); 61 printk(KERN_INFO "Using r7780rp interrupt controller.\n");
62 register_intc_controller(&intc_desc); 62 register_intc_controller(&intc_desc);
63 return irl2irq; 63 return irl2irq;
diff --git a/arch/sh/boards/mach-highlander/irq-r7785rp.c b/arch/sh/boards/mach-highlander/irq-r7785rp.c
index 3811b060a39b..558b24862776 100644
--- a/arch/sh/boards/mach-highlander/irq-r7785rp.c
+++ b/arch/sh/boards/mach-highlander/irq-r7785rp.c
@@ -66,20 +66,20 @@ static DECLARE_INTC_DESC(intc_desc, "r7785rp", vectors,
66 66
67unsigned char * __init highlander_plat_irq_setup(void) 67unsigned char * __init highlander_plat_irq_setup(void)
68{ 68{
69 if ((ctrl_inw(0xa4000158) & 0xf000) != 0x1000) 69 if ((__raw_readw(0xa4000158) & 0xf000) != 0x1000)
70 return NULL; 70 return NULL;
71 71
72 printk(KERN_INFO "Using r7785rp interrupt controller.\n"); 72 printk(KERN_INFO "Using r7785rp interrupt controller.\n");
73 73
74 ctrl_outw(0x0000, PA_IRLSSR1); /* FPGA IRLSSR1(CF_CD clear) */ 74 __raw_writew(0x0000, PA_IRLSSR1); /* FPGA IRLSSR1(CF_CD clear) */
75 75
76 /* Setup the FPGA IRL */ 76 /* Setup the FPGA IRL */
77 ctrl_outw(0x0000, PA_IRLPRA); /* FPGA IRLA */ 77 __raw_writew(0x0000, PA_IRLPRA); /* FPGA IRLA */
78 ctrl_outw(0xe598, PA_IRLPRB); /* FPGA IRLB */ 78 __raw_writew(0xe598, PA_IRLPRB); /* FPGA IRLB */
79 ctrl_outw(0x7060, PA_IRLPRC); /* FPGA IRLC */ 79 __raw_writew(0x7060, PA_IRLPRC); /* FPGA IRLC */
80 ctrl_outw(0x0000, PA_IRLPRD); /* FPGA IRLD */ 80 __raw_writew(0x0000, PA_IRLPRD); /* FPGA IRLD */
81 ctrl_outw(0x4321, PA_IRLPRE); /* FPGA IRLE */ 81 __raw_writew(0x4321, PA_IRLPRE); /* FPGA IRLE */
82 ctrl_outw(0xdcba, PA_IRLPRF); /* FPGA IRLF */ 82 __raw_writew(0xdcba, PA_IRLPRF); /* FPGA IRLF */
83 83
84 register_intc_controller(&intc_desc); 84 register_intc_controller(&intc_desc);
85 return irl2irq; 85 return irl2irq;
diff --git a/arch/sh/boards/mach-highlander/psw.c b/arch/sh/boards/mach-highlander/psw.c
index 37b1a2ee71a5..522786318d36 100644
--- a/arch/sh/boards/mach-highlander/psw.c
+++ b/arch/sh/boards/mach-highlander/psw.c
@@ -24,7 +24,7 @@ static irqreturn_t psw_irq_handler(int irq, void *arg)
24 unsigned int l, mask; 24 unsigned int l, mask;
25 int ret = 0; 25 int ret = 0;
26 26
27 l = ctrl_inw(PA_DBSW); 27 l = __raw_readw(PA_DBSW);
28 28
29 /* Nothing to do if there's no state change */ 29 /* Nothing to do if there's no state change */
30 if (psw->state) { 30 if (psw->state) {
@@ -45,7 +45,7 @@ static irqreturn_t psw_irq_handler(int irq, void *arg)
45out: 45out:
46 /* Clear the switch IRQs */ 46 /* Clear the switch IRQs */
47 l |= (0x7 << 12); 47 l |= (0x7 << 12);
48 ctrl_outw(l, PA_DBSW); 48 __raw_writew(l, PA_DBSW);
49 49
50 return IRQ_RETVAL(ret); 50 return IRQ_RETVAL(ret);
51} 51}
diff --git a/arch/sh/boards/mach-highlander/setup.c b/arch/sh/boards/mach-highlander/setup.c
index 566e69d8d729..affd66747ba3 100644
--- a/arch/sh/boards/mach-highlander/setup.c
+++ b/arch/sh/boards/mach-highlander/setup.c
@@ -311,13 +311,13 @@ device_initcall(r7780rp_devices_setup);
311 */ 311 */
312static int ivdr_clk_enable(struct clk *clk) 312static int ivdr_clk_enable(struct clk *clk)
313{ 313{
314 ctrl_outw(ctrl_inw(PA_IVDRCTL) | (1 << IVDR_CK_ON), PA_IVDRCTL); 314 __raw_writew(__raw_readw(PA_IVDRCTL) | (1 << IVDR_CK_ON), PA_IVDRCTL);
315 return 0; 315 return 0;
316} 316}
317 317
318static void ivdr_clk_disable(struct clk *clk) 318static void ivdr_clk_disable(struct clk *clk)
319{ 319{
320 ctrl_outw(ctrl_inw(PA_IVDRCTL) & ~(1 << IVDR_CK_ON), PA_IVDRCTL); 320 __raw_writew(__raw_readw(PA_IVDRCTL) & ~(1 << IVDR_CK_ON), PA_IVDRCTL);
321} 321}
322 322
323static struct clk_ops ivdr_clk_ops = { 323static struct clk_ops ivdr_clk_ops = {
@@ -337,7 +337,7 @@ static struct clk *r7780rp_clocks[] = {
337static void r7780rp_power_off(void) 337static void r7780rp_power_off(void)
338{ 338{
339 if (mach_is_r7780mp() || mach_is_r7785rp()) 339 if (mach_is_r7780mp() || mach_is_r7785rp())
340 ctrl_outw(0x0001, PA_POFF); 340 __raw_writew(0x0001, PA_POFF);
341} 341}
342 342
343/* 343/*
@@ -345,7 +345,7 @@ static void r7780rp_power_off(void)
345 */ 345 */
346static void __init highlander_setup(char **cmdline_p) 346static void __init highlander_setup(char **cmdline_p)
347{ 347{
348 u16 ver = ctrl_inw(PA_VERREG); 348 u16 ver = __raw_readw(PA_VERREG);
349 int i; 349 int i;
350 350
351 printk(KERN_INFO "Renesas Solutions Highlander %s support.\n", 351 printk(KERN_INFO "Renesas Solutions Highlander %s support.\n",
@@ -370,12 +370,12 @@ static void __init highlander_setup(char **cmdline_p)
370 clk_enable(clk); 370 clk_enable(clk);
371 } 371 }
372 372
373 ctrl_outw(0x0000, PA_OBLED); /* Clear LED. */ 373 __raw_writew(0x0000, PA_OBLED); /* Clear LED. */
374 374
375 if (mach_is_r7780rp()) 375 if (mach_is_r7780rp())
376 ctrl_outw(0x0001, PA_SDPOW); /* SD Power ON */ 376 __raw_writew(0x0001, PA_SDPOW); /* SD Power ON */
377 377
378 ctrl_outw(ctrl_inw(PA_IVDRCTL) | 0x01, PA_IVDRCTL); /* Si13112 */ 378 __raw_writew(__raw_readw(PA_IVDRCTL) | 0x01, PA_IVDRCTL); /* Si13112 */
379 379
380 pm_power_off = r7780rp_power_off; 380 pm_power_off = r7780rp_power_off;
381} 381}
@@ -384,7 +384,7 @@ static unsigned char irl2irq[HL_NR_IRL];
384 384
385static int highlander_irq_demux(int irq) 385static int highlander_irq_demux(int irq)
386{ 386{
387 if (irq >= HL_NR_IRL || !irl2irq[irq]) 387 if (irq >= HL_NR_IRL || irq < 0 || !irl2irq[irq])
388 return irq; 388 return irq;
389 389
390 return irl2irq[irq]; 390 return irl2irq[irq];
diff --git a/arch/sh/boards/mach-hp6xx/hp6xx_apm.c b/arch/sh/boards/mach-hp6xx/hp6xx_apm.c
index e85212faf40a..b49535c0ddd9 100644
--- a/arch/sh/boards/mach-hp6xx/hp6xx_apm.c
+++ b/arch/sh/boards/mach-hp6xx/hp6xx_apm.c
@@ -53,7 +53,7 @@ static void hp6x0_apm_get_power_status(struct apm_power_info *info)
53 info->ac_line_status = (battery > HP680_BATTERY_AC_ON) ? 53 info->ac_line_status = (battery > HP680_BATTERY_AC_ON) ?
54 APM_AC_ONLINE : APM_AC_OFFLINE; 54 APM_AC_ONLINE : APM_AC_OFFLINE;
55 55
56 pgdr = ctrl_inb(PGDR); 56 pgdr = __raw_readb(PGDR);
57 if (pgdr & PGDR_MAIN_BATTERY_OUT) { 57 if (pgdr & PGDR_MAIN_BATTERY_OUT) {
58 info->battery_status = APM_BATTERY_STATUS_NOT_PRESENT; 58 info->battery_status = APM_BATTERY_STATUS_NOT_PRESENT;
59 info->battery_flag = 0x80; 59 info->battery_flag = 0x80;
diff --git a/arch/sh/boards/mach-hp6xx/pm.c b/arch/sh/boards/mach-hp6xx/pm.c
index d936c1af7620..4499a3749d40 100644
--- a/arch/sh/boards/mach-hp6xx/pm.c
+++ b/arch/sh/boards/mach-hp6xx/pm.c
@@ -53,17 +53,17 @@ static void pm_enter(void)
53 sh_wdt_write_cnt(0); 53 sh_wdt_write_cnt(0);
54 54
55 /* disable PLL1 */ 55 /* disable PLL1 */
56 frqcr = ctrl_inw(FRQCR); 56 frqcr = __raw_readw(FRQCR);
57 frqcr &= ~(FRQCR_PLLEN | FRQCR_PSTBY); 57 frqcr &= ~(FRQCR_PLLEN | FRQCR_PSTBY);
58 ctrl_outw(frqcr, FRQCR); 58 __raw_writew(frqcr, FRQCR);
59 59
60 /* enable standby */ 60 /* enable standby */
61 stbcr = ctrl_inb(STBCR); 61 stbcr = __raw_readb(STBCR);
62 ctrl_outb(stbcr | STBCR_STBY | STBCR_MSTP2, STBCR); 62 __raw_writeb(stbcr | STBCR_STBY | STBCR_MSTP2, STBCR);
63 63
64 /* set self-refresh */ 64 /* set self-refresh */
65 mcr = ctrl_inw(MCR); 65 mcr = __raw_readw(MCR);
66 ctrl_outw(mcr & ~MCR_RFSH, MCR); 66 __raw_writew(mcr & ~MCR_RFSH, MCR);
67 67
68 /* set interrupt handler */ 68 /* set interrupt handler */
69 asm volatile("stc vbr, %0" : "=r" (vbr_old)); 69 asm volatile("stc vbr, %0" : "=r" (vbr_old));
@@ -73,8 +73,8 @@ static void pm_enter(void)
73 &wakeup_start, &wakeup_end - &wakeup_start); 73 &wakeup_start, &wakeup_end - &wakeup_start);
74 asm volatile("ldc %0, vbr" : : "r" (vbr_new)); 74 asm volatile("ldc %0, vbr" : : "r" (vbr_new));
75 75
76 ctrl_outw(0, RTCNT); 76 __raw_writew(0, RTCNT);
77 ctrl_outw(mcr | MCR_RFSH | MCR_RMODE, MCR); 77 __raw_writew(mcr | MCR_RFSH | MCR_RMODE, MCR);
78 78
79 cpu_sleep(); 79 cpu_sleep();
80 80
@@ -83,14 +83,14 @@ static void pm_enter(void)
83 free_page(vbr_new); 83 free_page(vbr_new);
84 84
85 /* enable PLL1 */ 85 /* enable PLL1 */
86 frqcr = ctrl_inw(FRQCR); 86 frqcr = __raw_readw(FRQCR);
87 frqcr |= FRQCR_PSTBY; 87 frqcr |= FRQCR_PSTBY;
88 ctrl_outw(frqcr, FRQCR); 88 __raw_writew(frqcr, FRQCR);
89 udelay(50); 89 udelay(50);
90 frqcr |= FRQCR_PLLEN; 90 frqcr |= FRQCR_PLLEN;
91 ctrl_outw(frqcr, FRQCR); 91 __raw_writew(frqcr, FRQCR);
92 92
93 ctrl_outb(stbcr, STBCR); 93 __raw_writeb(stbcr, STBCR);
94 94
95 clear_bl_bit(); 95 clear_bl_bit();
96} 96}
@@ -115,21 +115,21 @@ static int hp6x0_pm_enter(suspend_state_t state)
115 outw(hd64461_stbcr, HD64461_STBCR); 115 outw(hd64461_stbcr, HD64461_STBCR);
116#endif 116#endif
117 117
118 ctrl_outb(0x1f, DACR); 118 __raw_writeb(0x1f, DACR);
119 119
120 stbcr = ctrl_inb(STBCR); 120 stbcr = __raw_readb(STBCR);
121 ctrl_outb(0x01, STBCR); 121 __raw_writeb(0x01, STBCR);
122 122
123 stbcr2 = ctrl_inb(STBCR2); 123 stbcr2 = __raw_readb(STBCR2);
124 ctrl_outb(0x7f , STBCR2); 124 __raw_writeb(0x7f , STBCR2);
125 125
126 outw(0xf07f, HD64461_SCPUCR); 126 outw(0xf07f, HD64461_SCPUCR);
127 127
128 pm_enter(); 128 pm_enter();
129 129
130 outw(0, HD64461_SCPUCR); 130 outw(0, HD64461_SCPUCR);
131 ctrl_outb(stbcr, STBCR); 131 __raw_writeb(stbcr, STBCR);
132 ctrl_outb(stbcr2, STBCR2); 132 __raw_writeb(stbcr2, STBCR2);
133 133
134#ifdef CONFIG_HD64461_ENABLER 134#ifdef CONFIG_HD64461_ENABLER
135 hd64461_stbcr = inw(HD64461_STBCR); 135 hd64461_stbcr = inw(HD64461_STBCR);
diff --git a/arch/sh/boards/mach-hp6xx/setup.c b/arch/sh/boards/mach-hp6xx/setup.c
index 8f305b36358b..8c9add5f4cfa 100644
--- a/arch/sh/boards/mach-hp6xx/setup.c
+++ b/arch/sh/boards/mach-hp6xx/setup.c
@@ -13,6 +13,7 @@
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15#include <linux/irq.h> 15#include <linux/irq.h>
16#include <sound/sh_dac_audio.h>
16#include <asm/hd64461.h> 17#include <asm/hd64461.h>
17#include <asm/io.h> 18#include <asm/io.h>
18#include <mach/hp6xx.h> 19#include <mach/hp6xx.h>
@@ -51,9 +52,63 @@ static struct platform_device jornadakbd_device = {
51 .id = -1, 52 .id = -1,
52}; 53};
53 54
55static void dac_audio_start(struct dac_audio_pdata *pdata)
56{
57 u16 v;
58 u8 v8;
59
60 /* HP Jornada 680/690 speaker on */
61 v = inw(HD64461_GPADR);
62 v &= ~HD64461_GPADR_SPEAKER;
63 outw(v, HD64461_GPADR);
64
65 /* HP Palmtop 620lx/660lx speaker on */
66 v8 = inb(PKDR);
67 v8 &= ~PKDR_SPEAKER;
68 outb(v8, PKDR);
69
70 sh_dac_enable(pdata->channel);
71}
72
73static void dac_audio_stop(struct dac_audio_pdata *pdata)
74{
75 u16 v;
76 u8 v8;
77
78 /* HP Jornada 680/690 speaker off */
79 v = inw(HD64461_GPADR);
80 v |= HD64461_GPADR_SPEAKER;
81 outw(v, HD64461_GPADR);
82
83 /* HP Palmtop 620lx/660lx speaker off */
84 v8 = inb(PKDR);
85 v8 |= PKDR_SPEAKER;
86 outb(v8, PKDR);
87
88 sh_dac_output(0, pdata->channel);
89 sh_dac_disable(pdata->channel);
90}
91
92static struct dac_audio_pdata dac_audio_platform_data = {
93 .buffer_size = 64000,
94 .channel = 1,
95 .start = dac_audio_start,
96 .stop = dac_audio_stop,
97};
98
99static struct platform_device dac_audio_device = {
100 .name = "dac_audio",
101 .id = -1,
102 .dev = {
103 .platform_data = &dac_audio_platform_data,
104 }
105
106};
107
54static struct platform_device *hp6xx_devices[] __initdata = { 108static struct platform_device *hp6xx_devices[] __initdata = {
55 &cf_ide_device, 109 &cf_ide_device,
56 &jornadakbd_device, 110 &jornadakbd_device,
111 &dac_audio_device,
57}; 112};
58 113
59static void __init hp6xx_init_irq(void) 114static void __init hp6xx_init_irq(void)
@@ -94,19 +149,19 @@ static void __init hp6xx_setup(char **cmdline_p)
94 149
95 sh_dac_output(0, DAC_SPEAKER_VOLUME); 150 sh_dac_output(0, DAC_SPEAKER_VOLUME);
96 sh_dac_disable(DAC_SPEAKER_VOLUME); 151 sh_dac_disable(DAC_SPEAKER_VOLUME);
97 v8 = ctrl_inb(DACR); 152 v8 = __raw_readb(DACR);
98 v8 &= ~DACR_DAE; 153 v8 &= ~DACR_DAE;
99 ctrl_outb(v8,DACR); 154 __raw_writeb(v8,DACR);
100 155
101 v8 = ctrl_inb(SCPDR); 156 v8 = __raw_readb(SCPDR);
102 v8 |= SCPDR_TS_SCAN_X | SCPDR_TS_SCAN_Y; 157 v8 |= SCPDR_TS_SCAN_X | SCPDR_TS_SCAN_Y;
103 v8 &= ~SCPDR_TS_SCAN_ENABLE; 158 v8 &= ~SCPDR_TS_SCAN_ENABLE;
104 ctrl_outb(v8, SCPDR); 159 __raw_writeb(v8, SCPDR);
105 160
106 v = ctrl_inw(SCPCR); 161 v = __raw_readw(SCPCR);
107 v &= ~SCPCR_TS_MASK; 162 v &= ~SCPCR_TS_MASK;
108 v |= SCPCR_TS_ENABLE; 163 v |= SCPCR_TS_ENABLE;
109 ctrl_outw(v, SCPCR); 164 __raw_writew(v, SCPCR);
110} 165}
111device_initcall(hp6xx_devices_setup); 166device_initcall(hp6xx_devices_setup);
112 167
diff --git a/arch/sh/boards/mach-kfr2r09/Makefile b/arch/sh/boards/mach-kfr2r09/Makefile
index 5d5867826e3b..4e577a3bf658 100644
--- a/arch/sh/boards/mach-kfr2r09/Makefile
+++ b/arch/sh/boards/mach-kfr2r09/Makefile
@@ -1,2 +1,2 @@
1obj-y := setup.o 1obj-y := setup.o sdram.o
2obj-$(CONFIG_FB_SH_MOBILE_LCDC) += lcd_wqvga.o 2obj-$(CONFIG_FB_SH_MOBILE_LCDC) += lcd_wqvga.o
diff --git a/arch/sh/boards/mach-kfr2r09/lcd_wqvga.c b/arch/sh/boards/mach-kfr2r09/lcd_wqvga.c
index 8ccb1cc8b589..e9b970846c41 100644
--- a/arch/sh/boards/mach-kfr2r09/lcd_wqvga.c
+++ b/arch/sh/boards/mach-kfr2r09/lcd_wqvga.c
@@ -273,6 +273,12 @@ int kfr2r09_lcd_setup(void *board_data, void *sohandle,
273 return 0; 273 return 0;
274} 274}
275 275
276void kfr2r09_lcd_start(void *board_data, void *sohandle,
277 struct sh_mobile_lcdc_sys_bus_ops *so)
278{
279 write_memory_start(sohandle, so);
280}
281
276#define CTRL_CKSW 0x10 282#define CTRL_CKSW 0x10
277#define CTRL_C10 0x20 283#define CTRL_C10 0x20
278#define CTRL_CPSW 0x80 284#define CTRL_CPSW 0x80
diff --git a/arch/sh/boards/mach-kfr2r09/sdram.S b/arch/sh/boards/mach-kfr2r09/sdram.S
new file mode 100644
index 000000000000..0c9f55bec2fe
--- /dev/null
+++ b/arch/sh/boards/mach-kfr2r09/sdram.S
@@ -0,0 +1,80 @@
1/*
2 * KFR2R09 sdram self/auto-refresh setup code
3 *
4 * Copyright (C) 2009 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/sys.h>
12#include <linux/errno.h>
13#include <linux/linkage.h>
14#include <asm/asm-offsets.h>
15#include <asm/suspend.h>
16#include <asm/romimage-macros.h>
17
18/* code to enter and leave self-refresh. must be self-contained.
19 * this code will be copied to on-chip memory and executed from there.
20 */
21 .balign 4
22ENTRY(kfr2r09_sdram_enter_start)
23
24 /* DBSC: put memory in self-refresh mode */
25
26 ED 0xFD000010, 0x00000000 /* DBEN */
27 ED 0xFD000040, 0x00000000 /* DBRFPDN0 */
28 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
29 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
30 ED 0xFD000040, 0x00000001 /* DBRFPDN0 */
31
32 rts
33 nop
34
35ENTRY(kfr2r09_sdram_enter_end)
36
37 .balign 4
38ENTRY(kfr2r09_sdram_leave_start)
39
40 /* DBSC: put memory in auto-refresh mode */
41
42 mov.l @(SH_SLEEP_MODE, r5), r0
43 tst #SUSP_SH_RSTANDBY, r0
44 bf resume_rstandby
45
46 ED 0xFD000040, 0x00000000 /* DBRFPDN0 */
47 WAIT 1
48 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
49 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
50 ED 0xFD000010, 0x00000001 /* DBEN */
51 ED 0xFD000040, 0x00010000 /* DBRFPDN0 */
52
53 rts
54 nop
55
56resume_rstandby:
57
58 /* DBSC: re-initialize and put in auto-refresh */
59
60 ED 0xFD000108, 0x40000301 /* DBPDCNT0 */
61 ED 0xFD000020, 0x011B0002 /* DBCONF */
62 ED 0xFD000030, 0x03060E02 /* DBTR0 */
63 ED 0xFD000034, 0x01020102 /* DBTR1 */
64 ED 0xFD000038, 0x01090406 /* DBTR2 */
65 ED 0xFD000008, 0x00000004 /* DBKIND */
66 ED 0xFD000040, 0x00000001 /* DBRFPDN0 */
67 ED 0xFD000040, 0x00000000 /* DBRFPDN0 */
68 ED 0xFD000018, 0x00000001 /* DBCKECNT */
69 WAIT 1
70 ED 0xFD000010, 0x00000001 /* DBEN */
71 ED 0xFD000044, 0x000004AF /* DBRFPDN1 */
72 ED 0xFD000048, 0x20CF0037 /* DBRFPDN2 */
73 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
74 ED 0xFD000108, 0x40000300 /* DBPDCNT0 */
75 ED 0xFD000040, 0x00010000 /* DBRFPDN0 */
76
77 rts
78 nop
79
80ENTRY(kfr2r09_sdram_leave_end)
diff --git a/arch/sh/boards/mach-kfr2r09/setup.c b/arch/sh/boards/mach-kfr2r09/setup.c
index c08d33fe2104..b2cd0ed8664e 100644
--- a/arch/sh/boards/mach-kfr2r09/setup.c
+++ b/arch/sh/boards/mach-kfr2r09/setup.c
@@ -16,13 +16,17 @@
16#include <linux/clk.h> 16#include <linux/clk.h>
17#include <linux/gpio.h> 17#include <linux/gpio.h>
18#include <linux/input.h> 18#include <linux/input.h>
19#include <linux/input/sh_keysc.h>
19#include <linux/i2c.h> 20#include <linux/i2c.h>
20#include <linux/usb/r8a66597.h> 21#include <linux/usb/r8a66597.h>
22#include <media/rj54n1cb0c.h>
23#include <media/soc_camera.h>
24#include <media/sh_mobile_ceu.h>
21#include <video/sh_mobile_lcdc.h> 25#include <video/sh_mobile_lcdc.h>
26#include <asm/suspend.h>
22#include <asm/clock.h> 27#include <asm/clock.h>
23#include <asm/machvec.h> 28#include <asm/machvec.h>
24#include <asm/io.h> 29#include <asm/io.h>
25#include <asm/sh_keysc.h>
26#include <cpu/sh7724.h> 30#include <cpu/sh7724.h>
27#include <mach/kfr2r09.h> 31#include <mach/kfr2r09.h>
28 32
@@ -146,6 +150,7 @@ static struct sh_mobile_lcdc_info kfr2r09_sh_lcdc_info = {
146 }, 150 },
147 .board_cfg = { 151 .board_cfg = {
148 .setup_sys = kfr2r09_lcd_setup, 152 .setup_sys = kfr2r09_lcd_setup,
153 .start_transfer = kfr2r09_lcd_start,
149 .display_on = kfr2r09_lcd_on, 154 .display_on = kfr2r09_lcd_on,
150 .display_off = kfr2r09_lcd_off, 155 .display_off = kfr2r09_lcd_off,
151 }, 156 },
@@ -212,11 +217,162 @@ static struct platform_device kfr2r09_usb0_gadget_device = {
212 .resource = kfr2r09_usb0_gadget_resources, 217 .resource = kfr2r09_usb0_gadget_resources,
213}; 218};
214 219
220static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
221 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
222};
223
224static struct resource kfr2r09_ceu_resources[] = {
225 [0] = {
226 .name = "CEU",
227 .start = 0xfe910000,
228 .end = 0xfe91009f,
229 .flags = IORESOURCE_MEM,
230 },
231 [1] = {
232 .start = 52,
233 .end = 52,
234 .flags = IORESOURCE_IRQ,
235 },
236 [2] = {
237 /* place holder for contiguous memory */
238 },
239};
240
241static struct platform_device kfr2r09_ceu_device = {
242 .name = "sh_mobile_ceu",
243 .id = 0, /* "ceu0" clock */
244 .num_resources = ARRAY_SIZE(kfr2r09_ceu_resources),
245 .resource = kfr2r09_ceu_resources,
246 .dev = {
247 .platform_data = &sh_mobile_ceu_info,
248 },
249 .archdata = {
250 .hwblk_id = HWBLK_CEU0,
251 },
252};
253
254static struct i2c_board_info kfr2r09_i2c_camera = {
255 I2C_BOARD_INFO("rj54n1cb0c", 0x50),
256};
257
258static struct clk *camera_clk;
259
260/* set VIO_CKO clock to 25MHz */
261#define CEU_MCLK_FREQ 25000000
262
263#define DRVCRB 0xA405018C
264static int camera_power(struct device *dev, int mode)
265{
266 int ret;
267
268 if (mode) {
269 long rate;
270
271 camera_clk = clk_get(NULL, "video_clk");
272 if (IS_ERR(camera_clk))
273 return PTR_ERR(camera_clk);
274
275 rate = clk_round_rate(camera_clk, CEU_MCLK_FREQ);
276 ret = clk_set_rate(camera_clk, rate);
277 if (ret < 0)
278 goto eclkrate;
279
280 /* set DRVCRB
281 *
282 * use 1.8 V for VccQ_VIO
283 * use 2.85V for VccQ_SR
284 */
285 __raw_writew((__raw_readw(DRVCRB) & ~0x0003) | 0x0001, DRVCRB);
286
287 /* reset clear */
288 ret = gpio_request(GPIO_PTB4, NULL);
289 if (ret < 0)
290 goto eptb4;
291 ret = gpio_request(GPIO_PTB7, NULL);
292 if (ret < 0)
293 goto eptb7;
294
295 ret = gpio_direction_output(GPIO_PTB4, 1);
296 if (!ret)
297 ret = gpio_direction_output(GPIO_PTB7, 1);
298 if (ret < 0)
299 goto egpioout;
300 msleep(1);
301
302 ret = clk_enable(camera_clk); /* start VIO_CKO */
303 if (ret < 0)
304 goto eclkon;
305
306 return 0;
307 }
308
309 ret = 0;
310
311 clk_disable(camera_clk);
312eclkon:
313 gpio_set_value(GPIO_PTB7, 0);
314egpioout:
315 gpio_set_value(GPIO_PTB4, 0);
316 gpio_free(GPIO_PTB7);
317eptb7:
318 gpio_free(GPIO_PTB4);
319eptb4:
320eclkrate:
321 clk_put(camera_clk);
322 return ret;
323}
324
325static struct rj54n1_pdata rj54n1_priv = {
326 .mclk_freq = CEU_MCLK_FREQ,
327 .ioctl_high = false,
328};
329
330static struct soc_camera_link rj54n1_link = {
331 .power = camera_power,
332 .board_info = &kfr2r09_i2c_camera,
333 .i2c_adapter_id = 1,
334 .module_name = "rj54n1cb0c",
335 .priv = &rj54n1_priv,
336};
337
338static struct platform_device kfr2r09_camera = {
339 .name = "soc-camera-pdrv",
340 .id = 0,
341 .dev = {
342 .platform_data = &rj54n1_link,
343 },
344};
345
346static struct resource kfr2r09_sh_sdhi0_resources[] = {
347 [0] = {
348 .name = "SDHI0",
349 .start = 0x04ce0000,
350 .end = 0x04ce01ff,
351 .flags = IORESOURCE_MEM,
352 },
353 [1] = {
354 .start = 100,
355 .flags = IORESOURCE_IRQ,
356 },
357};
358
359static struct platform_device kfr2r09_sh_sdhi0_device = {
360 .name = "sh_mobile_sdhi",
361 .num_resources = ARRAY_SIZE(kfr2r09_sh_sdhi0_resources),
362 .resource = kfr2r09_sh_sdhi0_resources,
363 .archdata = {
364 .hwblk_id = HWBLK_SDHI0,
365 },
366};
367
215static struct platform_device *kfr2r09_devices[] __initdata = { 368static struct platform_device *kfr2r09_devices[] __initdata = {
216 &kfr2r09_nor_flash_device, 369 &kfr2r09_nor_flash_device,
217 &kfr2r09_nand_flash_device, 370 &kfr2r09_nand_flash_device,
218 &kfr2r09_sh_keysc_device, 371 &kfr2r09_sh_keysc_device,
219 &kfr2r09_sh_lcdc_device, 372 &kfr2r09_sh_lcdc_device,
373 &kfr2r09_ceu_device,
374 &kfr2r09_camera,
375 &kfr2r09_sh_sdhi0_device,
220}; 376};
221 377
222#define BSC_CS0BCR 0xfec10004 378#define BSC_CS0BCR 0xfec10004
@@ -268,11 +424,59 @@ static int kfr2r09_usb0_gadget_i2c_setup(void)
268 424
269 return 0; 425 return 0;
270} 426}
427
428static int kfr2r09_serial_i2c_setup(void)
429{
430 struct i2c_adapter *a;
431 struct i2c_msg msg;
432 unsigned char buf[2];
433 int ret;
434
435 a = i2c_get_adapter(0);
436 if (!a)
437 return -ENODEV;
438
439 /* set bit 6 (the 7th bit) of chip at 0x09, register 0x13 */
440 buf[0] = 0x13;
441 msg.addr = 0x09;
442 msg.buf = buf;
443 msg.len = 1;
444 msg.flags = 0;
445 ret = i2c_transfer(a, &msg, 1);
446 if (ret != 1)
447 return -ENODEV;
448
449 buf[0] = 0;
450 msg.addr = 0x09;
451 msg.buf = buf;
452 msg.len = 1;
453 msg.flags = I2C_M_RD;
454 ret = i2c_transfer(a, &msg, 1);
455 if (ret != 1)
456 return -ENODEV;
457
458 buf[1] = buf[0] | (1 << 6);
459 buf[0] = 0x13;
460 msg.addr = 0x09;
461 msg.buf = buf;
462 msg.len = 2;
463 msg.flags = 0;
464 ret = i2c_transfer(a, &msg, 1);
465 if (ret != 1)
466 return -ENODEV;
467
468 return 0;
469}
271#else 470#else
272static int kfr2r09_usb0_gadget_i2c_setup(void) 471static int kfr2r09_usb0_gadget_i2c_setup(void)
273{ 472{
274 return -ENODEV; 473 return -ENODEV;
275} 474}
475
476static int kfr2r09_serial_i2c_setup(void)
477{
478 return -ENODEV;
479}
276#endif 480#endif
277 481
278static int kfr2r09_usb0_gadget_setup(void) 482static int kfr2r09_usb0_gadget_setup(void)
@@ -288,30 +492,46 @@ static int kfr2r09_usb0_gadget_setup(void)
288 if (kfr2r09_usb0_gadget_i2c_setup() != 0) 492 if (kfr2r09_usb0_gadget_i2c_setup() != 0)
289 return -ENODEV; /* unable to configure using i2c */ 493 return -ENODEV; /* unable to configure using i2c */
290 494
291 ctrl_outw((ctrl_inw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB); 495 __raw_writew((__raw_readw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB);
292 gpio_request(GPIO_FN_PDSTATUS, NULL); /* R-standby disables USB clock */ 496 gpio_request(GPIO_FN_PDSTATUS, NULL); /* R-standby disables USB clock */
293 gpio_request(GPIO_PTV6, NULL); /* USBCLK_ON */ 497 gpio_request(GPIO_PTV6, NULL); /* USBCLK_ON */
294 gpio_direction_output(GPIO_PTV6, 1); /* USBCLK_ON = H */ 498 gpio_direction_output(GPIO_PTV6, 1); /* USBCLK_ON = H */
295 msleep(20); /* wait 20ms to let the clock settle */ 499 msleep(20); /* wait 20ms to let the clock settle */
296 clk_enable(clk_get(NULL, "usb0")); 500 clk_enable(clk_get(NULL, "usb0"));
297 ctrl_outw(0x0600, 0xa40501d4); 501 __raw_writew(0x0600, 0xa40501d4);
298 502
299 return 0; 503 return 0;
300} 504}
301 505
506extern char kfr2r09_sdram_enter_start;
507extern char kfr2r09_sdram_enter_end;
508extern char kfr2r09_sdram_leave_start;
509extern char kfr2r09_sdram_leave_end;
510
302static int __init kfr2r09_devices_setup(void) 511static int __init kfr2r09_devices_setup(void)
303{ 512{
513 /* register board specific self-refresh code */
514 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
515 SUSP_SH_RSTANDBY,
516 &kfr2r09_sdram_enter_start,
517 &kfr2r09_sdram_enter_end,
518 &kfr2r09_sdram_leave_start,
519 &kfr2r09_sdram_leave_end);
520
304 /* enable SCIF1 serial port for YC401 console support */ 521 /* enable SCIF1 serial port for YC401 console support */
305 gpio_request(GPIO_FN_SCIF1_RXD, NULL); 522 gpio_request(GPIO_FN_SCIF1_RXD, NULL);
306 gpio_request(GPIO_FN_SCIF1_TXD, NULL); 523 gpio_request(GPIO_FN_SCIF1_TXD, NULL);
524 kfr2r09_serial_i2c_setup(); /* ECONTMSK(bit6=L10ONEN) set 1 */
525 gpio_request(GPIO_PTG3, NULL); /* HPON_ON */
526 gpio_direction_output(GPIO_PTG3, 1); /* HPON_ON = H */
307 527
308 /* setup NOR flash at CS0 */ 528 /* setup NOR flash at CS0 */
309 ctrl_outl(0x36db0400, BSC_CS0BCR); 529 __raw_writel(0x36db0400, BSC_CS0BCR);
310 ctrl_outl(0x00000500, BSC_CS0WCR); 530 __raw_writel(0x00000500, BSC_CS0WCR);
311 531
312 /* setup NAND flash at CS4 */ 532 /* setup NAND flash at CS4 */
313 ctrl_outl(0x36db0400, BSC_CS4BCR); 533 __raw_writel(0x36db0400, BSC_CS4BCR);
314 ctrl_outl(0x00000500, BSC_CS4WCR); 534 __raw_writel(0x00000500, BSC_CS4WCR);
315 535
316 /* setup KEYSC pins */ 536 /* setup KEYSC pins */
317 gpio_request(GPIO_FN_KEYOUT0, NULL); 537 gpio_request(GPIO_FN_KEYOUT0, NULL);
@@ -361,6 +581,32 @@ static int __init kfr2r09_devices_setup(void)
361 if (kfr2r09_usb0_gadget_setup() == 0) 581 if (kfr2r09_usb0_gadget_setup() == 0)
362 platform_device_register(&kfr2r09_usb0_gadget_device); 582 platform_device_register(&kfr2r09_usb0_gadget_device);
363 583
584 /* CEU */
585 gpio_request(GPIO_FN_VIO_CKO, NULL);
586 gpio_request(GPIO_FN_VIO0_CLK, NULL);
587 gpio_request(GPIO_FN_VIO0_VD, NULL);
588 gpio_request(GPIO_FN_VIO0_HD, NULL);
589 gpio_request(GPIO_FN_VIO0_FLD, NULL);
590 gpio_request(GPIO_FN_VIO0_D7, NULL);
591 gpio_request(GPIO_FN_VIO0_D6, NULL);
592 gpio_request(GPIO_FN_VIO0_D5, NULL);
593 gpio_request(GPIO_FN_VIO0_D4, NULL);
594 gpio_request(GPIO_FN_VIO0_D3, NULL);
595 gpio_request(GPIO_FN_VIO0_D2, NULL);
596 gpio_request(GPIO_FN_VIO0_D1, NULL);
597 gpio_request(GPIO_FN_VIO0_D0, NULL);
598
599 platform_resource_setup_memory(&kfr2r09_ceu_device, "ceu", 4 << 20);
600
601 /* SDHI0 connected to yc304 */
602 gpio_request(GPIO_FN_SDHI0CD, NULL);
603 gpio_request(GPIO_FN_SDHI0D3, NULL);
604 gpio_request(GPIO_FN_SDHI0D2, NULL);
605 gpio_request(GPIO_FN_SDHI0D1, NULL);
606 gpio_request(GPIO_FN_SDHI0D0, NULL);
607 gpio_request(GPIO_FN_SDHI0CMD, NULL);
608 gpio_request(GPIO_FN_SDHI0CLK, NULL);
609
364 return platform_add_devices(kfr2r09_devices, 610 return platform_add_devices(kfr2r09_devices,
365 ARRAY_SIZE(kfr2r09_devices)); 611 ARRAY_SIZE(kfr2r09_devices));
366} 612}
diff --git a/arch/sh/boards/mach-landisk/gio.c b/arch/sh/boards/mach-landisk/gio.c
index 528013188196..01e6abb769b9 100644
--- a/arch/sh/boards/mach-landisk/gio.c
+++ b/arch/sh/boards/mach-landisk/gio.c
@@ -76,39 +76,39 @@ static long gio_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
76 break; 76 break;
77 77
78 case GIODRV_IOCSGIODATA1: /* write byte */ 78 case GIODRV_IOCSGIODATA1: /* write byte */
79 ctrl_outb((unsigned char)(0x0ff & data), addr); 79 __raw_writeb((unsigned char)(0x0ff & data), addr);
80 break; 80 break;
81 81
82 case GIODRV_IOCSGIODATA2: /* write word */ 82 case GIODRV_IOCSGIODATA2: /* write word */
83 if (addr & 0x01) { 83 if (addr & 0x01) {
84 return -EFAULT; 84 return -EFAULT;
85 } 85 }
86 ctrl_outw((unsigned short int)(0x0ffff & data), addr); 86 __raw_writew((unsigned short int)(0x0ffff & data), addr);
87 break; 87 break;
88 88
89 case GIODRV_IOCSGIODATA4: /* write long */ 89 case GIODRV_IOCSGIODATA4: /* write long */
90 if (addr & 0x03) { 90 if (addr & 0x03) {
91 return -EFAULT; 91 return -EFAULT;
92 } 92 }
93 ctrl_outl(data, addr); 93 __raw_writel(data, addr);
94 break; 94 break;
95 95
96 case GIODRV_IOCGGIODATA1: /* read byte */ 96 case GIODRV_IOCGGIODATA1: /* read byte */
97 data = ctrl_inb(addr); 97 data = __raw_readb(addr);
98 break; 98 break;
99 99
100 case GIODRV_IOCGGIODATA2: /* read word */ 100 case GIODRV_IOCGGIODATA2: /* read word */
101 if (addr & 0x01) { 101 if (addr & 0x01) {
102 return -EFAULT; 102 return -EFAULT;
103 } 103 }
104 data = ctrl_inw(addr); 104 data = __raw_readw(addr);
105 break; 105 break;
106 106
107 case GIODRV_IOCGGIODATA4: /* read long */ 107 case GIODRV_IOCGGIODATA4: /* read long */
108 if (addr & 0x03) { 108 if (addr & 0x03) {
109 return -EFAULT; 109 return -EFAULT;
110 } 110 }
111 data = ctrl_inl(addr); 111 data = __raw_readl(addr);
112 break; 112 break;
113 default: 113 default:
114 return -EFAULT; 114 return -EFAULT;
diff --git a/arch/sh/boards/mach-landisk/irq.c b/arch/sh/boards/mach-landisk/irq.c
index 7b284cde1f58..96f38a4187d0 100644
--- a/arch/sh/boards/mach-landisk/irq.c
+++ b/arch/sh/boards/mach-landisk/irq.c
@@ -22,14 +22,14 @@ static void disable_landisk_irq(unsigned int irq)
22{ 22{
23 unsigned char mask = 0xff ^ (0x01 << (irq - 5)); 23 unsigned char mask = 0xff ^ (0x01 << (irq - 5));
24 24
25 ctrl_outb(ctrl_inb(PA_IMASK) & mask, PA_IMASK); 25 __raw_writeb(__raw_readb(PA_IMASK) & mask, PA_IMASK);
26} 26}
27 27
28static void enable_landisk_irq(unsigned int irq) 28static void enable_landisk_irq(unsigned int irq)
29{ 29{
30 unsigned char value = (0x01 << (irq - 5)); 30 unsigned char value = (0x01 << (irq - 5));
31 31
32 ctrl_outb(ctrl_inb(PA_IMASK) | value, PA_IMASK); 32 __raw_writeb(__raw_readb(PA_IMASK) | value, PA_IMASK);
33} 33}
34 34
35static struct irq_chip landisk_irq_chip __read_mostly = { 35static struct irq_chip landisk_irq_chip __read_mostly = {
@@ -52,5 +52,5 @@ void __init init_landisk_IRQ(void)
52 handle_level_irq, "level"); 52 handle_level_irq, "level");
53 enable_landisk_irq(i); 53 enable_landisk_irq(i);
54 } 54 }
55 ctrl_outb(0x00, PA_PWRINT_CLR); 55 __raw_writeb(0x00, PA_PWRINT_CLR);
56} 56}
diff --git a/arch/sh/boards/mach-landisk/psw.c b/arch/sh/boards/mach-landisk/psw.c
index e6b0efa098d1..bef83522f958 100644
--- a/arch/sh/boards/mach-landisk/psw.c
+++ b/arch/sh/boards/mach-landisk/psw.c
@@ -25,7 +25,7 @@ static irqreturn_t psw_irq_handler(int irq, void *arg)
25 unsigned int sw_value; 25 unsigned int sw_value;
26 int ret = 0; 26 int ret = 0;
27 27
28 sw_value = (0x0ff & (~ctrl_inb(PA_STATUS))); 28 sw_value = (0x0ff & (~__raw_readb(PA_STATUS)));
29 29
30 /* Nothing to do if there's no state change */ 30 /* Nothing to do if there's no state change */
31 if (psw->state) { 31 if (psw->state) {
@@ -42,7 +42,7 @@ static irqreturn_t psw_irq_handler(int irq, void *arg)
42 42
43out: 43out:
44 /* Clear the switch IRQs */ 44 /* Clear the switch IRQs */
45 ctrl_outb(0x00, PA_PWRINT_CLR); 45 __raw_writeb(0x00, PA_PWRINT_CLR);
46 46
47 return IRQ_RETVAL(ret); 47 return IRQ_RETVAL(ret);
48} 48}
diff --git a/arch/sh/boards/mach-landisk/setup.c b/arch/sh/boards/mach-landisk/setup.c
index db22ea2e6d49..50337acc18c5 100644
--- a/arch/sh/boards/mach-landisk/setup.c
+++ b/arch/sh/boards/mach-landisk/setup.c
@@ -25,7 +25,7 @@ void init_landisk_IRQ(void);
25 25
26static void landisk_power_off(void) 26static void landisk_power_off(void)
27{ 27{
28 ctrl_outb(0x01, PA_SHUTDOWN); 28 __raw_writeb(0x01, PA_SHUTDOWN);
29} 29}
30 30
31static struct resource cf_ide_resources[3]; 31static struct resource cf_ide_resources[3];
@@ -63,7 +63,7 @@ static int __init landisk_devices_setup(void)
63 /* open I/O area window */ 63 /* open I/O area window */
64 paddrbase = virt_to_phys((void *)PA_AREA5_IO); 64 paddrbase = virt_to_phys((void *)PA_AREA5_IO);
65 prot = PAGE_KERNEL_PCC(1, _PAGE_PCC_IO16); 65 prot = PAGE_KERNEL_PCC(1, _PAGE_PCC_IO16);
66 cf_ide_base = p3_ioremap(paddrbase, PAGE_SIZE, prot.pgprot); 66 cf_ide_base = ioremap_prot(paddrbase, PAGE_SIZE, pgprot_val(prot));
67 if (!cf_ide_base) { 67 if (!cf_ide_base) {
68 printk("allocate_cf_area : can't open CF I/O window!\n"); 68 printk("allocate_cf_area : can't open CF I/O window!\n");
69 return -ENOMEM; 69 return -ENOMEM;
@@ -88,7 +88,7 @@ __initcall(landisk_devices_setup);
88static void __init landisk_setup(char **cmdline_p) 88static void __init landisk_setup(char **cmdline_p)
89{ 89{
90 /* LED ON */ 90 /* LED ON */
91 ctrl_outb(ctrl_inb(PA_LED) | 0x03, PA_LED); 91 __raw_writeb(__raw_readb(PA_LED) | 0x03, PA_LED);
92 92
93 printk(KERN_INFO "I-O DATA DEVICE, INC. \"LANDISK Series\" support.\n"); 93 printk(KERN_INFO "I-O DATA DEVICE, INC. \"LANDISK Series\" support.\n");
94 pm_power_off = landisk_power_off; 94 pm_power_off = landisk_power_off;
diff --git a/arch/sh/boards/mach-lboxre2/setup.c b/arch/sh/boards/mach-lboxre2/setup.c
index 2b0b5818e1e4..79b4e0d77b71 100644
--- a/arch/sh/boards/mach-lboxre2/setup.c
+++ b/arch/sh/boards/mach-lboxre2/setup.c
@@ -56,8 +56,8 @@ static int __init lboxre2_devices_setup(void)
56 /* open I/O area window */ 56 /* open I/O area window */
57 paddrbase = virt_to_phys((void*)PA_AREA5_IO); 57 paddrbase = virt_to_phys((void*)PA_AREA5_IO);
58 psize = PAGE_SIZE; 58 psize = PAGE_SIZE;
59 prot = PAGE_KERNEL_PCC( 1 , _PAGE_PCC_IO16); 59 prot = PAGE_KERNEL_PCC(1, _PAGE_PCC_IO16);
60 cf0_io_base = (u32)p3_ioremap(paddrbase, psize, prot.pgprot); 60 cf0_io_base = (u32)ioremap_prot(paddrbase, psize, pgprot_val(prot));
61 if (!cf0_io_base) { 61 if (!cf0_io_base) {
62 printk(KERN_ERR "%s : can't open CF I/O window!\n" , __func__ ); 62 printk(KERN_ERR "%s : can't open CF I/O window!\n" , __func__ );
63 return -ENOMEM; 63 return -ENOMEM;
diff --git a/arch/sh/boards/mach-microdev/io.c b/arch/sh/boards/mach-microdev/io.c
index 52dd748211c7..2960c659020e 100644
--- a/arch/sh/boards/mach-microdev/io.c
+++ b/arch/sh/boards/mach-microdev/io.c
@@ -141,10 +141,10 @@ static inline void delay(void)
141#if defined(CONFIG_PCI) 141#if defined(CONFIG_PCI)
142 /* System board present, just make a dummy SRAM access. (CS0 will be 142 /* System board present, just make a dummy SRAM access. (CS0 will be
143 mapped to PCI memory, probably good to avoid it.) */ 143 mapped to PCI memory, probably good to avoid it.) */
144 ctrl_inw(0xa6800000); 144 __raw_readw(0xa6800000);
145#else 145#else
146 /* CS0 will be mapped to flash, ROM etc so safe to access it. */ 146 /* CS0 will be mapped to flash, ROM etc so safe to access it. */
147 ctrl_inw(0xa0000000); 147 __raw_readw(0xa0000000);
148#endif 148#endif
149} 149}
150 150
diff --git a/arch/sh/boards/mach-microdev/irq.c b/arch/sh/boards/mach-microdev/irq.c
index b551963579c1..a26d16669aa2 100644
--- a/arch/sh/boards/mach-microdev/irq.c
+++ b/arch/sh/boards/mach-microdev/irq.c
@@ -88,7 +88,7 @@ static void disable_microdev_irq(unsigned int irq)
88 fpgaIrq = fpgaIrqTable[irq].fpgaIrq; 88 fpgaIrq = fpgaIrqTable[irq].fpgaIrq;
89 89
90 /* disable interrupts on the FPGA INTC register */ 90 /* disable interrupts on the FPGA INTC register */
91 ctrl_outl(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTDSB_REG); 91 __raw_writel(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTDSB_REG);
92} 92}
93 93
94static void enable_microdev_irq(unsigned int irq) 94static void enable_microdev_irq(unsigned int irq)
@@ -107,13 +107,13 @@ static void enable_microdev_irq(unsigned int irq)
107 priorityReg = MICRODEV_FPGA_INTPRI_REG(fpgaIrq); 107 priorityReg = MICRODEV_FPGA_INTPRI_REG(fpgaIrq);
108 108
109 /* set priority for the interrupt */ 109 /* set priority for the interrupt */
110 priorities = ctrl_inl(priorityReg); 110 priorities = __raw_readl(priorityReg);
111 priorities &= ~MICRODEV_FPGA_INTPRI_MASK(fpgaIrq); 111 priorities &= ~MICRODEV_FPGA_INTPRI_MASK(fpgaIrq);
112 priorities |= MICRODEV_FPGA_INTPRI_LEVEL(fpgaIrq, pri); 112 priorities |= MICRODEV_FPGA_INTPRI_LEVEL(fpgaIrq, pri);
113 ctrl_outl(priorities, priorityReg); 113 __raw_writel(priorities, priorityReg);
114 114
115 /* enable interrupts on the FPGA INTC register */ 115 /* enable interrupts on the FPGA INTC register */
116 ctrl_outl(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTENB_REG); 116 __raw_writel(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTENB_REG);
117} 117}
118 118
119/* This function sets the desired irq handler to be a MicroDev type */ 119/* This function sets the desired irq handler to be a MicroDev type */
@@ -134,7 +134,7 @@ extern void __init init_microdev_irq(void)
134 int i; 134 int i;
135 135
136 /* disable interrupts on the FPGA INTC register */ 136 /* disable interrupts on the FPGA INTC register */
137 ctrl_outl(~0ul, MICRODEV_FPGA_INTDSB_REG); 137 __raw_writel(~0ul, MICRODEV_FPGA_INTDSB_REG);
138 138
139 for (i = 0; i < NUM_EXTERNAL_IRQS; i++) 139 for (i = 0; i < NUM_EXTERNAL_IRQS; i++)
140 make_microdev_irq(i); 140 make_microdev_irq(i);
diff --git a/arch/sh/boards/mach-migor/Makefile b/arch/sh/boards/mach-migor/Makefile
index 5f231dd25c0e..4601a89e5ac7 100644
--- a/arch/sh/boards/mach-migor/Makefile
+++ b/arch/sh/boards/mach-migor/Makefile
@@ -1,2 +1,2 @@
1obj-y := setup.o 1obj-y := setup.o sdram.o
2obj-$(CONFIG_SH_MIGOR_QVGA) += lcd_qvga.o 2obj-$(CONFIG_SH_MIGOR_QVGA) += lcd_qvga.o
diff --git a/arch/sh/boards/mach-migor/sdram.S b/arch/sh/boards/mach-migor/sdram.S
new file mode 100644
index 000000000000..614aa3a1398c
--- /dev/null
+++ b/arch/sh/boards/mach-migor/sdram.S
@@ -0,0 +1,69 @@
1/*
2 * Migo-R sdram self/auto-refresh setup code
3 *
4 * Copyright (C) 2009 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/sys.h>
12#include <linux/errno.h>
13#include <linux/linkage.h>
14#include <asm/asm-offsets.h>
15#include <asm/suspend.h>
16#include <asm/romimage-macros.h>
17
18/* code to enter and leave self-refresh. must be self-contained.
19 * this code will be copied to on-chip memory and executed from there.
20 */
21 .balign 4
22ENTRY(migor_sdram_enter_start)
23
24 /* SBSC: disable power down and put in self-refresh mode */
25 mov.l 1f, r4
26 mov.l 2f, r1
27 mov.l @r4, r2
28 or r1, r2
29 mov.l 3f, r3
30 and r3, r2
31 mov.l r2, @r4
32
33 rts
34 nop
35
36 .balign 4
371: .long 0xfe400008 /* SDCR0 */
382: .long 0x00000400
393: .long 0xffff7fff
40ENTRY(migor_sdram_enter_end)
41
42 .balign 4
43ENTRY(migor_sdram_leave_start)
44
45 /* SBSC: set auto-refresh mode */
46 mov.l 1f, r4
47 mov.l @r4, r0
48 mov.l 4f, r1
49 and r1, r0
50 mov.l r0, @r4
51 mov.l 6f, r4
52 mov.l 8f, r0
53 mov.l @r4, r1
54 mov #-1, r4
55 add r4, r1
56 or r1, r0
57 mov.l 7f, r1
58 mov.l r0, @r1
59
60 rts
61 nop
62
63 .balign 4
641: .long 0xfe400008 /* SDCR0 */
654: .long 0xfffffbff
666: .long 0xfe40001c /* RTCOR */
677: .long 0xfe400018 /* RTCNT */
688: .long 0xa55a0000
69ENTRY(migor_sdram_leave_end)
diff --git a/arch/sh/boards/mach-migor/setup.c b/arch/sh/boards/mach-migor/setup.c
index 6ed1fd32369e..7da0fc94a01e 100644
--- a/arch/sh/boards/mach-migor/setup.c
+++ b/arch/sh/boards/mach-migor/setup.c
@@ -11,6 +11,7 @@
11#include <linux/platform_device.h> 11#include <linux/platform_device.h>
12#include <linux/interrupt.h> 12#include <linux/interrupt.h>
13#include <linux/input.h> 13#include <linux/input.h>
14#include <linux/input/sh_keysc.h>
14#include <linux/mtd/physmap.h> 15#include <linux/mtd/physmap.h>
15#include <linux/mtd/nand.h> 16#include <linux/mtd/nand.h>
16#include <linux/i2c.h> 17#include <linux/i2c.h>
@@ -18,8 +19,6 @@
18#include <linux/delay.h> 19#include <linux/delay.h>
19#include <linux/clk.h> 20#include <linux/clk.h>
20#include <linux/gpio.h> 21#include <linux/gpio.h>
21#include <linux/spi/spi.h>
22#include <linux/spi/spi_gpio.h>
23#include <video/sh_mobile_lcdc.h> 22#include <video/sh_mobile_lcdc.h>
24#include <media/sh_mobile_ceu.h> 23#include <media/sh_mobile_ceu.h>
25#include <media/ov772x.h> 24#include <media/ov772x.h>
@@ -27,7 +26,7 @@
27#include <asm/clock.h> 26#include <asm/clock.h>
28#include <asm/machvec.h> 27#include <asm/machvec.h>
29#include <asm/io.h> 28#include <asm/io.h>
30#include <asm/sh_keysc.h> 29#include <asm/suspend.h>
31#include <mach/migor.h> 30#include <mach/migor.h>
32#include <cpu/sh7722.h> 31#include <cpu/sh7722.h>
33 32
@@ -390,17 +389,25 @@ static struct platform_device migor_ceu_device = {
390 }, 389 },
391}; 390};
392 391
393struct spi_gpio_platform_data sdcard_cn9_platform_data = { 392static struct resource sdhi_cn9_resources[] = {
394 .sck = GPIO_PTD0, 393 [0] = {
395 .mosi = GPIO_PTD1, 394 .name = "SDHI",
396 .miso = GPIO_PTD2, 395 .start = 0x04ce0000,
397 .num_chipselect = 1, 396 .end = 0x04ce01ff,
397 .flags = IORESOURCE_MEM,
398 },
399 [1] = {
400 .start = 100,
401 .flags = IORESOURCE_IRQ,
402 },
398}; 403};
399 404
400static struct platform_device sdcard_cn9_device = { 405static struct platform_device sdhi_cn9_device = {
401 .name = "spi_gpio", 406 .name = "sh_mobile_sdhi",
402 .dev = { 407 .num_resources = ARRAY_SIZE(sdhi_cn9_resources),
403 .platform_data = &sdcard_cn9_platform_data, 408 .resource = sdhi_cn9_resources,
409 .archdata = {
410 .hwblk_id = HWBLK_SDHI,
404 }, 411 },
405}; 412};
406 413
@@ -412,6 +419,9 @@ static struct i2c_board_info migor_i2c_devices[] = {
412 I2C_BOARD_INFO("migor_ts", 0x51), 419 I2C_BOARD_INFO("migor_ts", 0x51),
413 .irq = 38, /* IRQ6 */ 420 .irq = 38, /* IRQ6 */
414 }, 421 },
422 {
423 I2C_BOARD_INFO("wm8978", 0x1a),
424 },
415}; 425};
416 426
417static struct i2c_board_info migor_i2c_camera[] = { 427static struct i2c_board_info migor_i2c_camera[] = {
@@ -424,24 +434,28 @@ static struct i2c_board_info migor_i2c_camera[] = {
424}; 434};
425 435
426static struct ov772x_camera_info ov7725_info = { 436static struct ov772x_camera_info ov7725_info = {
427 .buswidth = SOCAM_DATAWIDTH_8, 437 .flags = OV772X_FLAG_8BIT,
428 .link = { 438};
429 .power = ov7725_power, 439
430 .board_info = &migor_i2c_camera[0], 440static struct soc_camera_link ov7725_link = {
431 .i2c_adapter_id = 0, 441 .power = ov7725_power,
432 .module_name = "ov772x", 442 .board_info = &migor_i2c_camera[0],
433 }, 443 .i2c_adapter_id = 0,
444 .module_name = "ov772x",
445 .priv = &ov7725_info,
434}; 446};
435 447
436static struct tw9910_video_info tw9910_info = { 448static struct tw9910_video_info tw9910_info = {
437 .buswidth = SOCAM_DATAWIDTH_8, 449 .buswidth = SOCAM_DATAWIDTH_8,
438 .mpout = TW9910_MPO_FIELD, 450 .mpout = TW9910_MPO_FIELD,
439 .link = { 451};
440 .power = tw9910_power, 452
441 .board_info = &migor_i2c_camera[1], 453static struct soc_camera_link tw9910_link = {
442 .i2c_adapter_id = 0, 454 .power = tw9910_power,
443 .module_name = "tw9910", 455 .board_info = &migor_i2c_camera[1],
444 } 456 .i2c_adapter_id = 0,
457 .module_name = "tw9910",
458 .priv = &tw9910_info,
445}; 459};
446 460
447static struct platform_device migor_camera[] = { 461static struct platform_device migor_camera[] = {
@@ -449,13 +463,13 @@ static struct platform_device migor_camera[] = {
449 .name = "soc-camera-pdrv", 463 .name = "soc-camera-pdrv",
450 .id = 0, 464 .id = 0,
451 .dev = { 465 .dev = {
452 .platform_data = &ov7725_info.link, 466 .platform_data = &ov7725_link,
453 }, 467 },
454 }, { 468 }, {
455 .name = "soc-camera-pdrv", 469 .name = "soc-camera-pdrv",
456 .id = 1, 470 .id = 1,
457 .dev = { 471 .dev = {
458 .platform_data = &tw9910_info.link, 472 .platform_data = &tw9910_link,
459 }, 473 },
460 }, 474 },
461}; 475};
@@ -467,45 +481,34 @@ static struct platform_device *migor_devices[] __initdata = {
467 &migor_ceu_device, 481 &migor_ceu_device,
468 &migor_nor_flash_device, 482 &migor_nor_flash_device,
469 &migor_nand_flash_device, 483 &migor_nand_flash_device,
470 &sdcard_cn9_device, 484 &sdhi_cn9_device,
471 &migor_camera[0], 485 &migor_camera[0],
472 &migor_camera[1], 486 &migor_camera[1],
473}; 487};
474 488
475static struct spi_board_info migor_spi_devices[] = { 489extern char migor_sdram_enter_start;
476 { 490extern char migor_sdram_enter_end;
477 .modalias = "mmc_spi", 491extern char migor_sdram_leave_start;
478 .max_speed_hz = 5000000, 492extern char migor_sdram_leave_end;
479 .chip_select = 0,
480 .controller_data = (void *) GPIO_PTD5,
481 },
482};
483 493
484static int __init migor_devices_setup(void) 494static int __init migor_devices_setup(void)
485{ 495{
486 496 /* register board specific self-refresh code */
487#ifdef CONFIG_PM 497 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF,
498 &migor_sdram_enter_start,
499 &migor_sdram_enter_end,
500 &migor_sdram_leave_start,
501 &migor_sdram_leave_end);
488 /* Let D11 LED show STATUS0 */ 502 /* Let D11 LED show STATUS0 */
489 gpio_request(GPIO_FN_STATUS0, NULL); 503 gpio_request(GPIO_FN_STATUS0, NULL);
490 504
491 /* Lit D12 LED show PDSTATUS */ 505 /* Lit D12 LED show PDSTATUS */
492 gpio_request(GPIO_FN_PDSTATUS, NULL); 506 gpio_request(GPIO_FN_PDSTATUS, NULL);
493#else
494 /* Lit D11 LED */
495 gpio_request(GPIO_PTJ7, NULL);
496 gpio_direction_output(GPIO_PTJ7, 1);
497 gpio_export(GPIO_PTJ7, 0);
498
499 /* Lit D12 LED */
500 gpio_request(GPIO_PTJ5, NULL);
501 gpio_direction_output(GPIO_PTJ5, 1);
502 gpio_export(GPIO_PTJ5, 0);
503#endif
504 507
505 /* SMC91C111 - Enable IRQ0, Setup CS4 for 16-bit fast access */ 508 /* SMC91C111 - Enable IRQ0, Setup CS4 for 16-bit fast access */
506 gpio_request(GPIO_FN_IRQ0, NULL); 509 gpio_request(GPIO_FN_IRQ0, NULL);
507 ctrl_outl(0x00003400, BSC_CS4BCR); 510 __raw_writel(0x00003400, BSC_CS4BCR);
508 ctrl_outl(0x00110080, BSC_CS4WCR); 511 __raw_writel(0x00110080, BSC_CS4WCR);
509 512
510 /* KEYSC */ 513 /* KEYSC */
511 gpio_request(GPIO_FN_KEYOUT0, NULL); 514 gpio_request(GPIO_FN_KEYOUT0, NULL);
@@ -521,10 +524,20 @@ static int __init migor_devices_setup(void)
521 524
522 /* NAND Flash */ 525 /* NAND Flash */
523 gpio_request(GPIO_FN_CS6A_CE2B, NULL); 526 gpio_request(GPIO_FN_CS6A_CE2B, NULL);
524 ctrl_outl((ctrl_inl(BSC_CS6ABCR) & ~0x0600) | 0x0200, BSC_CS6ABCR); 527 __raw_writel((__raw_readl(BSC_CS6ABCR) & ~0x0600) | 0x0200, BSC_CS6ABCR);
525 gpio_request(GPIO_PTA1, NULL); 528 gpio_request(GPIO_PTA1, NULL);
526 gpio_direction_input(GPIO_PTA1); 529 gpio_direction_input(GPIO_PTA1);
527 530
531 /* SDHI */
532 gpio_request(GPIO_FN_SDHICD, NULL);
533 gpio_request(GPIO_FN_SDHIWP, NULL);
534 gpio_request(GPIO_FN_SDHID3, NULL);
535 gpio_request(GPIO_FN_SDHID2, NULL);
536 gpio_request(GPIO_FN_SDHID1, NULL);
537 gpio_request(GPIO_FN_SDHID0, NULL);
538 gpio_request(GPIO_FN_SDHICMD, NULL);
539 gpio_request(GPIO_FN_SDHICLK, NULL);
540
528 /* Touch Panel */ 541 /* Touch Panel */
529 gpio_request(GPIO_FN_IRQ6, NULL); 542 gpio_request(GPIO_FN_IRQ6, NULL);
530 543
@@ -605,16 +618,26 @@ static int __init migor_devices_setup(void)
605#else 618#else
606 gpio_direction_output(GPIO_PTT0, 1); 619 gpio_direction_output(GPIO_PTT0, 1);
607#endif 620#endif
608 ctrl_outw(ctrl_inw(PORT_MSELCRB) | 0x2000, PORT_MSELCRB); /* D15->D8 */ 621 __raw_writew(__raw_readw(PORT_MSELCRB) | 0x2000, PORT_MSELCRB); /* D15->D8 */
609 622
610 platform_resource_setup_memory(&migor_ceu_device, "ceu", 4 << 20); 623 platform_resource_setup_memory(&migor_ceu_device, "ceu", 4 << 20);
611 624
625 /* SIU: Port B */
626 gpio_request(GPIO_FN_SIUBOLR, NULL);
627 gpio_request(GPIO_FN_SIUBOBT, NULL);
628 gpio_request(GPIO_FN_SIUBISLD, NULL);
629 gpio_request(GPIO_FN_SIUBOSLD, NULL);
630 gpio_request(GPIO_FN_SIUMCKB, NULL);
631
632 /*
633 * The original driver sets SIUB OLR/OBT, ILR/IBT, and SIUA OLR/OBT to
634 * output. Need only SIUB, set to output for master mode (table 34.2)
635 */
636 __raw_writew(__raw_readw(PORT_MSELCRA) | 1, PORT_MSELCRA);
637
612 i2c_register_board_info(0, migor_i2c_devices, 638 i2c_register_board_info(0, migor_i2c_devices,
613 ARRAY_SIZE(migor_i2c_devices)); 639 ARRAY_SIZE(migor_i2c_devices));
614 640
615 spi_register_board_info(migor_spi_devices,
616 ARRAY_SIZE(migor_spi_devices));
617
618 return platform_add_devices(migor_devices, ARRAY_SIZE(migor_devices)); 641 return platform_add_devices(migor_devices, ARRAY_SIZE(migor_devices));
619} 642}
620arch_initcall(migor_devices_setup); 643arch_initcall(migor_devices_setup);
diff --git a/arch/sh/boards/mach-r2d/irq.c b/arch/sh/boards/mach-r2d/irq.c
index c70fecedcac4..574f009c3c31 100644
--- a/arch/sh/boards/mach-r2d/irq.c
+++ b/arch/sh/boards/mach-r2d/irq.c
@@ -116,7 +116,7 @@ static unsigned char irl2irq[R2D_NR_IRL];
116 116
117int rts7751r2d_irq_demux(int irq) 117int rts7751r2d_irq_demux(int irq)
118{ 118{
119 if (irq >= R2D_NR_IRL || !irl2irq[irq]) 119 if (irq >= R2D_NR_IRL || irq < 0 || !irl2irq[irq])
120 return irq; 120 return irq;
121 121
122 return irl2irq[irq]; 122 return irl2irq[irq];
@@ -129,7 +129,7 @@ void __init init_rts7751r2d_IRQ(void)
129{ 129{
130 struct intc_desc *d; 130 struct intc_desc *d;
131 131
132 switch (ctrl_inw(PA_VERREG) & 0xf0) { 132 switch (__raw_readw(PA_VERREG) & 0xf0) {
133#ifdef CONFIG_RTS7751R2D_PLUS 133#ifdef CONFIG_RTS7751R2D_PLUS
134 case 0x10: 134 case 0x10:
135 printk(KERN_INFO "Using R2D-PLUS interrupt controller.\n"); 135 printk(KERN_INFO "Using R2D-PLUS interrupt controller.\n");
@@ -147,7 +147,7 @@ void __init init_rts7751r2d_IRQ(void)
147#endif 147#endif
148 default: 148 default:
149 printk(KERN_INFO "Unknown R2D interrupt controller 0x%04x\n", 149 printk(KERN_INFO "Unknown R2D interrupt controller 0x%04x\n",
150 ctrl_inw(PA_VERREG)); 150 __raw_readw(PA_VERREG));
151 return; 151 return;
152 } 152 }
153 153
diff --git a/arch/sh/boards/mach-r2d/setup.c b/arch/sh/boards/mach-r2d/setup.c
index a625ecb93e47..b84df6a3a93c 100644
--- a/arch/sh/boards/mach-r2d/setup.c
+++ b/arch/sh/boards/mach-r2d/setup.c
@@ -70,7 +70,7 @@ static struct spi_board_info spi_bus[] = {
70static void r2d_chip_select(struct sh_spi_info *spi, int cs, int state) 70static void r2d_chip_select(struct sh_spi_info *spi, int cs, int state)
71{ 71{
72 BUG_ON(cs != 0); /* Single Epson RTC-9701JE attached on CS0 */ 72 BUG_ON(cs != 0); /* Single Epson RTC-9701JE attached on CS0 */
73 ctrl_outw(state == BITBANG_CS_ACTIVE, PA_RTCCE); 73 __raw_writew(state == BITBANG_CS_ACTIVE, PA_RTCCE);
74} 74}
75 75
76static struct sh_spi_info spi_info = { 76static struct sh_spi_info spi_info = {
@@ -262,7 +262,7 @@ __initcall(rts7751r2d_devices_setup);
262 262
263static void rts7751r2d_power_off(void) 263static void rts7751r2d_power_off(void)
264{ 264{
265 ctrl_outw(0x0001, PA_POWOFF); 265 __raw_writew(0x0001, PA_POWOFF);
266} 266}
267 267
268/* 268/*
@@ -271,14 +271,14 @@ static void rts7751r2d_power_off(void)
271static void __init rts7751r2d_setup(char **cmdline_p) 271static void __init rts7751r2d_setup(char **cmdline_p)
272{ 272{
273 void __iomem *sm501_reg; 273 void __iomem *sm501_reg;
274 u16 ver = ctrl_inw(PA_VERREG); 274 u16 ver = __raw_readw(PA_VERREG);
275 275
276 printk(KERN_INFO "Renesas Technology Sales RTS7751R2D support.\n"); 276 printk(KERN_INFO "Renesas Technology Sales RTS7751R2D support.\n");
277 277
278 printk(KERN_INFO "FPGA version:%d (revision:%d)\n", 278 printk(KERN_INFO "FPGA version:%d (revision:%d)\n",
279 (ver >> 4) & 0xf, ver & 0xf); 279 (ver >> 4) & 0xf, ver & 0xf);
280 280
281 ctrl_outw(0x0000, PA_OUTPORT); 281 __raw_writew(0x0000, PA_OUTPORT);
282 pm_power_off = rts7751r2d_power_off; 282 pm_power_off = rts7751r2d_power_off;
283 283
284 /* sm501 dram configuration: 284 /* sm501 dram configuration:
diff --git a/arch/sh/boards/mach-rsk/devices-rsk7203.c b/arch/sh/boards/mach-rsk/devices-rsk7203.c
index c37617e63220..4fa08ba10253 100644
--- a/arch/sh/boards/mach-rsk/devices-rsk7203.c
+++ b/arch/sh/boards/mach-rsk/devices-rsk7203.c
@@ -96,7 +96,7 @@ static int __init rsk7203_devices_setup(void)
96 gpio_request(GPIO_FN_RXD0, NULL); 96 gpio_request(GPIO_FN_RXD0, NULL);
97 97
98 /* Setup LAN9118: CS1 in 16-bit Big Endian Mode, IRQ0 at Port B */ 98 /* Setup LAN9118: CS1 in 16-bit Big Endian Mode, IRQ0 at Port B */
99 ctrl_outl(0x36db0400, 0xfffc0008); /* CS1BCR */ 99 __raw_writel(0x36db0400, 0xfffc0008); /* CS1BCR */
100 gpio_request(GPIO_FN_IRQ0_PB, NULL); 100 gpio_request(GPIO_FN_IRQ0_PB, NULL);
101 101
102 return platform_add_devices(rsk7203_devices, 102 return platform_add_devices(rsk7203_devices,
diff --git a/arch/sh/boards/mach-sdk7780/irq.c b/arch/sh/boards/mach-sdk7780/irq.c
index 855558163c58..e5f7564f2511 100644
--- a/arch/sh/boards/mach-sdk7780/irq.c
+++ b/arch/sh/boards/mach-sdk7780/irq.c
@@ -37,9 +37,9 @@ void __init init_sdk7780_IRQ(void)
37{ 37{
38 printk(KERN_INFO "Using SDK7780 interrupt controller.\n"); 38 printk(KERN_INFO "Using SDK7780 interrupt controller.\n");
39 39
40 ctrl_outw(0xFFFF, FPGA_IRQ0MR); 40 __raw_writew(0xFFFF, FPGA_IRQ0MR);
41 /* Setup IRL 0-3 */ 41 /* Setup IRL 0-3 */
42 ctrl_outw(0x0003, FPGA_IMSR); 42 __raw_writew(0x0003, FPGA_IMSR);
43 plat_irq_setup_pins(IRQ_MODE_IRL3210); 43 plat_irq_setup_pins(IRQ_MODE_IRL3210);
44 44
45 register_intc_controller(&fpga_intc_desc); 45 register_intc_controller(&fpga_intc_desc);
diff --git a/arch/sh/boards/mach-sdk7780/setup.c b/arch/sh/boards/mach-sdk7780/setup.c
index aad94a78dc70..4da38db4b5fe 100644
--- a/arch/sh/boards/mach-sdk7780/setup.c
+++ b/arch/sh/boards/mach-sdk7780/setup.c
@@ -20,27 +20,18 @@
20 20
21#define GPIO_PECR 0xFFEA0008 21#define GPIO_PECR 0xFFEA0008
22 22
23//* Heartbeat */ 23/* Heartbeat */
24static struct heartbeat_data heartbeat_data = { 24static struct resource heartbeat_resource = {
25 .regsize = 16, 25 .start = PA_LED,
26}; 26 .end = PA_LED,
27 27 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
28static struct resource heartbeat_resources[] = {
29 [0] = {
30 .start = PA_LED,
31 .end = PA_LED,
32 .flags = IORESOURCE_MEM,
33 },
34}; 28};
35 29
36static struct platform_device heartbeat_device = { 30static struct platform_device heartbeat_device = {
37 .name = "heartbeat", 31 .name = "heartbeat",
38 .id = -1, 32 .id = -1,
39 .dev = { 33 .num_resources = 1,
40 .platform_data = &heartbeat_data, 34 .resource = &heartbeat_resource,
41 },
42 .num_resources = ARRAY_SIZE(heartbeat_resources),
43 .resource = heartbeat_resources,
44}; 35};
45 36
46/* SMC91x */ 37/* SMC91x */
@@ -83,8 +74,8 @@ device_initcall(sdk7780_devices_setup);
83 74
84static void __init sdk7780_setup(char **cmdline_p) 75static void __init sdk7780_setup(char **cmdline_p)
85{ 76{
86 u16 ver = ctrl_inw(FPGA_FPVERR); 77 u16 ver = __raw_readw(FPGA_FPVERR);
87 u16 dateStamp = ctrl_inw(FPGA_FPDATER); 78 u16 dateStamp = __raw_readw(FPGA_FPDATER);
88 79
89 printk(KERN_INFO "Renesas Technology Europe SDK7780 support.\n"); 80 printk(KERN_INFO "Renesas Technology Europe SDK7780 support.\n");
90 printk(KERN_INFO "Board version: %d (revision %d), " 81 printk(KERN_INFO "Board version: %d (revision %d), "
@@ -94,7 +85,7 @@ static void __init sdk7780_setup(char **cmdline_p)
94 dateStamp); 85 dateStamp);
95 86
96 /* Setup pin mux'ing for PCIC */ 87 /* Setup pin mux'ing for PCIC */
97 ctrl_outw(0x0000, GPIO_PECR); 88 __raw_writew(0x0000, GPIO_PECR);
98} 89}
99 90
100/* 91/*
diff --git a/arch/sh/boards/mach-sdk7786/Makefile b/arch/sh/boards/mach-sdk7786/Makefile
new file mode 100644
index 000000000000..a29f19e85b63
--- /dev/null
+++ b/arch/sh/boards/mach-sdk7786/Makefile
@@ -0,0 +1 @@
obj-y := setup.o fpga.o irq.o
diff --git a/arch/sh/boards/mach-sdk7786/fpga.c b/arch/sh/boards/mach-sdk7786/fpga.c
new file mode 100644
index 000000000000..3e4ec66a0417
--- /dev/null
+++ b/arch/sh/boards/mach-sdk7786/fpga.c
@@ -0,0 +1,72 @@
1/*
2 * SDK7786 FPGA Support.
3 *
4 * Copyright (C) 2010 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/init.h>
11#include <linux/io.h>
12#include <linux/bcd.h>
13#include <mach/fpga.h>
14#include <asm/sizes.h>
15
16#define FPGA_REGS_OFFSET 0x03fff800
17#define FPGA_REGS_SIZE 0x490
18
19/*
20 * The FPGA can be mapped in any of the generally available areas,
21 * so we attempt to scan for it using the fixed SRSTR read magic.
22 *
23 * Once the FPGA is located, the rest of the mapping data for the other
24 * components can be determined dynamically from its section mapping
25 * registers.
26 */
27static void __iomem *sdk7786_fpga_probe(void)
28{
29 unsigned long area;
30 void __iomem *base;
31
32 /*
33 * Iterate over all of the areas where the FPGA could be mapped.
34 * The possible range is anywhere from area 0 through 6, area 7
35 * is reserved.
36 */
37 for (area = PA_AREA0; area < PA_AREA7; area += SZ_64M) {
38 base = ioremap_nocache(area + FPGA_REGS_OFFSET, FPGA_REGS_SIZE);
39 if (!base) {
40 /* Failed to remap this area, move along. */
41 continue;
42 }
43
44 if (ioread16(base + SRSTR) == SRSTR_MAGIC)
45 return base; /* Found it! */
46
47 iounmap(base);
48 }
49
50 return NULL;
51}
52
53void __iomem *sdk7786_fpga_base;
54
55void __init sdk7786_fpga_init(void)
56{
57 u16 version, date;
58
59 sdk7786_fpga_base = sdk7786_fpga_probe();
60 if (unlikely(!sdk7786_fpga_base)) {
61 panic("FPGA detection failed.\n");
62 return;
63 }
64
65 version = fpga_read_reg(FPGAVR);
66 date = fpga_read_reg(FPGADR);
67
68 pr_info("\tFPGA version:\t%d.%d (built on %d/%d/%d)\n",
69 bcd2bin(version >> 8) & 0xf, bcd2bin(version & 0xf),
70 ((date >> 12) & 0xf) + 2000,
71 (date >> 8) & 0xf, bcd2bin(date & 0xff));
72}
diff --git a/arch/sh/boards/mach-sdk7786/irq.c b/arch/sh/boards/mach-sdk7786/irq.c
new file mode 100644
index 000000000000..46943a0da5b7
--- /dev/null
+++ b/arch/sh/boards/mach-sdk7786/irq.c
@@ -0,0 +1,48 @@
1/*
2 * SDK7786 FPGA IRQ Controller Support.
3 *
4 * Copyright (C) 2010 Matt Fleming
5 * Copyright (C) 2010 Paul Mundt
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11#include <linux/irq.h>
12#include <mach/fpga.h>
13#include <mach/irq.h>
14
15enum {
16 ATA_IRQ_BIT = 1,
17 SPI_BUSY_BIT = 2,
18 LIRQ5_BIT = 3,
19 LIRQ6_BIT = 4,
20 LIRQ7_BIT = 5,
21 LIRQ8_BIT = 6,
22 KEY_IRQ_BIT = 7,
23 PEN_IRQ_BIT = 8,
24 ETH_IRQ_BIT = 9,
25 RTC_ALARM_BIT = 10,
26 CRYSTAL_FAIL_BIT = 12,
27 ETH_PME_BIT = 14,
28};
29
30void __init sdk7786_init_irq(void)
31{
32 unsigned int tmp;
33
34 /* Enable priority encoding for all IRLs */
35 fpga_write_reg(fpga_read_reg(INTMSR) | 0x0303, INTMSR);
36
37 /* Clear FPGA interrupt status registers */
38 fpga_write_reg(0x0000, INTASR);
39 fpga_write_reg(0x0000, INTBSR);
40
41 /* Unmask FPGA interrupts */
42 tmp = fpga_read_reg(INTAMR);
43 tmp &= ~(1 << ETH_IRQ_BIT);
44 fpga_write_reg(tmp, INTAMR);
45
46 plat_irq_setup_pins(IRQ_MODE_IRL7654_MASK);
47 plat_irq_setup_pins(IRQ_MODE_IRL3210_MASK);
48}
diff --git a/arch/sh/boards/mach-sdk7786/setup.c b/arch/sh/boards/mach-sdk7786/setup.c
new file mode 100644
index 000000000000..f094ea2ee783
--- /dev/null
+++ b/arch/sh/boards/mach-sdk7786/setup.c
@@ -0,0 +1,189 @@
1/*
2 * Renesas Technology Europe SDK7786 Support.
3 *
4 * Copyright (C) 2010 Matt Fleming
5 * Copyright (C) 2010 Paul Mundt
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11#include <linux/init.h>
12#include <linux/platform_device.h>
13#include <linux/io.h>
14#include <linux/smsc911x.h>
15#include <linux/i2c.h>
16#include <linux/irq.h>
17#include <linux/clk.h>
18#include <mach/fpga.h>
19#include <mach/irq.h>
20#include <asm/machvec.h>
21#include <asm/heartbeat.h>
22#include <asm/sizes.h>
23#include <asm/reboot.h>
24
25static struct resource heartbeat_resource = {
26 .start = 0x07fff8b0,
27 .end = 0x07fff8b0 + sizeof(u16) - 1,
28 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
29};
30
31static struct platform_device heartbeat_device = {
32 .name = "heartbeat",
33 .id = -1,
34 .num_resources = 1,
35 .resource = &heartbeat_resource,
36};
37
38static struct resource smsc911x_resources[] = {
39 [0] = {
40 .name = "smsc911x-memory",
41 .start = 0x07ffff00,
42 .end = 0x07ffff00 + SZ_256 - 1,
43 .flags = IORESOURCE_MEM,
44 },
45 [1] = {
46 .name = "smsc911x-irq",
47 .start = evt2irq(0x2c0),
48 .end = evt2irq(0x2c0),
49 .flags = IORESOURCE_IRQ,
50 },
51};
52
53static struct smsc911x_platform_config smsc911x_config = {
54 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
55 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
56 .flags = SMSC911X_USE_32BIT,
57 .phy_interface = PHY_INTERFACE_MODE_MII,
58};
59
60static struct platform_device smsc911x_device = {
61 .name = "smsc911x",
62 .id = -1,
63 .num_resources = ARRAY_SIZE(smsc911x_resources),
64 .resource = smsc911x_resources,
65 .dev = {
66 .platform_data = &smsc911x_config,
67 },
68};
69
70static struct resource smbus_fpga_resource = {
71 .start = 0x07fff9e0,
72 .end = 0x07fff9e0 + SZ_32 - 1,
73 .flags = IORESOURCE_MEM,
74};
75
76static struct platform_device smbus_fpga_device = {
77 .name = "i2c-sdk7786",
78 .id = 0,
79 .num_resources = 1,
80 .resource = &smbus_fpga_resource,
81};
82
83static struct resource smbus_pcie_resource = {
84 .start = 0x07fffc30,
85 .end = 0x07fffc30 + SZ_32 - 1,
86 .flags = IORESOURCE_MEM,
87};
88
89static struct platform_device smbus_pcie_device = {
90 .name = "i2c-sdk7786",
91 .id = 1,
92 .num_resources = 1,
93 .resource = &smbus_pcie_resource,
94};
95
96static struct i2c_board_info __initdata sdk7786_i2c_devices[] = {
97 {
98 I2C_BOARD_INFO("max6900", 0x68),
99 },
100};
101
102static struct platform_device *sh7786_devices[] __initdata = {
103 &heartbeat_device,
104 &smsc911x_device,
105 &smbus_fpga_device,
106 &smbus_pcie_device,
107};
108
109static int sdk7786_i2c_setup(void)
110{
111 unsigned int tmp;
112
113 /*
114 * Hand over I2C control to the FPGA.
115 */
116 tmp = fpga_read_reg(SBCR);
117 tmp &= ~SCBR_I2CCEN;
118 tmp |= SCBR_I2CMEN;
119 fpga_write_reg(tmp, SBCR);
120
121 return i2c_register_board_info(0, sdk7786_i2c_devices,
122 ARRAY_SIZE(sdk7786_i2c_devices));
123}
124
125static int __init sdk7786_devices_setup(void)
126{
127 int ret;
128
129 ret = platform_add_devices(sh7786_devices, ARRAY_SIZE(sh7786_devices));
130 if (unlikely(ret != 0))
131 return ret;
132
133 return sdk7786_i2c_setup();
134}
135__initcall(sdk7786_devices_setup);
136
137static int sdk7786_mode_pins(void)
138{
139 return fpga_read_reg(MODSWR);
140}
141
142static int sdk7786_clk_init(void)
143{
144 struct clk *clk;
145 int ret;
146
147 /*
148 * Only handle the EXTAL case, anyone interfacing a crystal
149 * resonator will need to provide their own input clock.
150 */
151 if (test_mode_pin(MODE_PIN9))
152 return -EINVAL;
153
154 clk = clk_get(NULL, "extal");
155 if (!clk || IS_ERR(clk))
156 return PTR_ERR(clk);
157 ret = clk_set_rate(clk, 33333333);
158 clk_put(clk);
159
160 return ret;
161}
162
163static void sdk7786_restart(char *cmd)
164{
165 fpga_write_reg(0xa5a5, SRSTR);
166}
167
168/* Initialize the board */
169static void __init sdk7786_setup(char **cmdline_p)
170{
171 pr_info("Renesas Technology Europe SDK7786 support:\n");
172
173 sdk7786_fpga_init();
174
175 pr_info("\tPCB revision:\t%d\n", fpga_read_reg(PCBRR) & 0xf);
176
177 machine_ops.restart = sdk7786_restart;
178}
179
180/*
181 * The Machine Vector
182 */
183static struct sh_machine_vector mv_sdk7786 __initmv = {
184 .mv_name = "SDK7786",
185 .mv_setup = sdk7786_setup,
186 .mv_mode_pins = sdk7786_mode_pins,
187 .mv_clk_init = sdk7786_clk_init,
188 .mv_init_irq = sdk7786_init_irq,
189};
diff --git a/arch/sh/boards/mach-se/7206/io.c b/arch/sh/boards/mach-se/7206/io.c
index 180455642a43..adadc77532ee 100644
--- a/arch/sh/boards/mach-se/7206/io.c
+++ b/arch/sh/boards/mach-se/7206/io.c
@@ -16,7 +16,7 @@
16 16
17static inline void delay(void) 17static inline void delay(void)
18{ 18{
19 ctrl_inw(0x20000000); /* P2 ROM Area */ 19 __raw_readw(0x20000000); /* P2 ROM Area */
20} 20}
21 21
22/* MS7750 requires special versions of in*, out* routines, since 22/* MS7750 requires special versions of in*, out* routines, since
diff --git a/arch/sh/boards/mach-se/7206/irq.c b/arch/sh/boards/mach-se/7206/irq.c
index aef7f052851a..8d82175d83ab 100644
--- a/arch/sh/boards/mach-se/7206/irq.c
+++ b/arch/sh/boards/mach-se/7206/irq.c
@@ -32,12 +32,12 @@ static void disable_se7206_irq(unsigned int irq)
32 unsigned short msk0,msk1; 32 unsigned short msk0,msk1;
33 33
34 /* Set the priority in IPR to 0 */ 34 /* Set the priority in IPR to 0 */
35 val = ctrl_inw(INTC_IPR01); 35 val = __raw_readw(INTC_IPR01);
36 val &= mask; 36 val &= mask;
37 ctrl_outw(val, INTC_IPR01); 37 __raw_writew(val, INTC_IPR01);
38 /* FPGA mask set */ 38 /* FPGA mask set */
39 msk0 = ctrl_inw(INTMSK0); 39 msk0 = __raw_readw(INTMSK0);
40 msk1 = ctrl_inw(INTMSK1); 40 msk1 = __raw_readw(INTMSK1);
41 41
42 switch (irq) { 42 switch (irq) {
43 case IRQ0_IRQ: 43 case IRQ0_IRQ:
@@ -51,8 +51,8 @@ static void disable_se7206_irq(unsigned int irq)
51 msk1 |= 0x00ff; 51 msk1 |= 0x00ff;
52 break; 52 break;
53 } 53 }
54 ctrl_outw(msk0, INTMSK0); 54 __raw_writew(msk0, INTMSK0);
55 ctrl_outw(msk1, INTMSK1); 55 __raw_writew(msk1, INTMSK1);
56} 56}
57 57
58static void enable_se7206_irq(unsigned int irq) 58static void enable_se7206_irq(unsigned int irq)
@@ -62,13 +62,13 @@ static void enable_se7206_irq(unsigned int irq)
62 unsigned short msk0,msk1; 62 unsigned short msk0,msk1;
63 63
64 /* Set priority in IPR back to original value */ 64 /* Set priority in IPR back to original value */
65 val = ctrl_inw(INTC_IPR01); 65 val = __raw_readw(INTC_IPR01);
66 val |= value; 66 val |= value;
67 ctrl_outw(val, INTC_IPR01); 67 __raw_writew(val, INTC_IPR01);
68 68
69 /* FPGA mask reset */ 69 /* FPGA mask reset */
70 msk0 = ctrl_inw(INTMSK0); 70 msk0 = __raw_readw(INTMSK0);
71 msk1 = ctrl_inw(INTMSK1); 71 msk1 = __raw_readw(INTMSK1);
72 72
73 switch (irq) { 73 switch (irq) {
74 case IRQ0_IRQ: 74 case IRQ0_IRQ:
@@ -82,19 +82,20 @@ static void enable_se7206_irq(unsigned int irq)
82 msk1 &= ~0x00ff; 82 msk1 &= ~0x00ff;
83 break; 83 break;
84 } 84 }
85 ctrl_outw(msk0, INTMSK0); 85 __raw_writew(msk0, INTMSK0);
86 ctrl_outw(msk1, INTMSK1); 86 __raw_writew(msk1, INTMSK1);
87} 87}
88 88
89static void eoi_se7206_irq(unsigned int irq) 89static void eoi_se7206_irq(unsigned int irq)
90{ 90{
91 unsigned short sts0,sts1; 91 unsigned short sts0,sts1;
92 struct irq_desc *desc = irq_to_desc(irq);
92 93
93 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) 94 if (!(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
94 enable_se7206_irq(irq); 95 enable_se7206_irq(irq);
95 /* FPGA isr clear */ 96 /* FPGA isr clear */
96 sts0 = ctrl_inw(INTSTS0); 97 sts0 = __raw_readw(INTSTS0);
97 sts1 = ctrl_inw(INTSTS1); 98 sts1 = __raw_readw(INTSTS1);
98 99
99 switch (irq) { 100 switch (irq) {
100 case IRQ0_IRQ: 101 case IRQ0_IRQ:
@@ -108,8 +109,8 @@ static void eoi_se7206_irq(unsigned int irq)
108 sts1 &= ~0x00ff; 109 sts1 &= ~0x00ff;
109 break; 110 break;
110 } 111 }
111 ctrl_outw(sts0, INTSTS0); 112 __raw_writew(sts0, INTSTS0);
112 ctrl_outw(sts1, INTSTS1); 113 __raw_writew(sts1, INTSTS1);
113} 114}
114 115
115static struct irq_chip se7206_irq_chip __read_mostly = { 116static struct irq_chip se7206_irq_chip __read_mostly = {
@@ -136,11 +137,11 @@ void __init init_se7206_IRQ(void)
136 make_se7206_irq(IRQ0_IRQ); /* SMC91C111 */ 137 make_se7206_irq(IRQ0_IRQ); /* SMC91C111 */
137 make_se7206_irq(IRQ1_IRQ); /* ATA */ 138 make_se7206_irq(IRQ1_IRQ); /* ATA */
138 make_se7206_irq(IRQ3_IRQ); /* SLOT / PCM */ 139 make_se7206_irq(IRQ3_IRQ); /* SLOT / PCM */
139 ctrl_outw(inw(INTC_ICR1) | 0x000b ,INTC_ICR1 ) ; /* ICR1 */ 140 __raw_writew(inw(INTC_ICR1) | 0x000b ,INTC_ICR1 ) ; /* ICR1 */
140 141
141 /* FPGA System register setup*/ 142 /* FPGA System register setup*/
142 ctrl_outw(0x0000,INTSTS0); /* Clear INTSTS0 */ 143 __raw_writew(0x0000,INTSTS0); /* Clear INTSTS0 */
143 ctrl_outw(0x0000,INTSTS1); /* Clear INTSTS1 */ 144 __raw_writew(0x0000,INTSTS1); /* Clear INTSTS1 */
144 /* IRQ0=LAN, IRQ1=ATA, IRQ3=SLT,PCM */ 145 /* IRQ0=LAN, IRQ1=ATA, IRQ3=SLT,PCM */
145 ctrl_outw(0x0001,INTSEL); 146 __raw_writew(0x0001,INTSEL);
146} 147}
diff --git a/arch/sh/boards/mach-se/7206/setup.c b/arch/sh/boards/mach-se/7206/setup.c
index f5466384972e..8f5c65d43d1d 100644
--- a/arch/sh/boards/mach-se/7206/setup.c
+++ b/arch/sh/boards/mach-se/7206/setup.c
@@ -50,15 +50,12 @@ static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
50static struct heartbeat_data heartbeat_data = { 50static struct heartbeat_data heartbeat_data = {
51 .bit_pos = heartbeat_bit_pos, 51 .bit_pos = heartbeat_bit_pos,
52 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos), 52 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
53 .regsize = 32,
54}; 53};
55 54
56static struct resource heartbeat_resources[] = { 55static struct resource heartbeat_resource = {
57 [0] = { 56 .start = PA_LED,
58 .start = PA_LED, 57 .end = PA_LED,
59 .end = PA_LED, 58 .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT,
60 .flags = IORESOURCE_MEM,
61 },
62}; 59};
63 60
64static struct platform_device heartbeat_device = { 61static struct platform_device heartbeat_device = {
@@ -67,8 +64,8 @@ static struct platform_device heartbeat_device = {
67 .dev = { 64 .dev = {
68 .platform_data = &heartbeat_data, 65 .platform_data = &heartbeat_data,
69 }, 66 },
70 .num_resources = ARRAY_SIZE(heartbeat_resources), 67 .num_resources = 1,
71 .resource = heartbeat_resources, 68 .resource = &heartbeat_resource,
72}; 69};
73 70
74static struct platform_device *se7206_devices[] __initdata = { 71static struct platform_device *se7206_devices[] __initdata = {
diff --git a/arch/sh/boards/mach-se/7343/irq.c b/arch/sh/boards/mach-se/7343/irq.c
index 051c29d4eae0..d4305c26e9f7 100644
--- a/arch/sh/boards/mach-se/7343/irq.c
+++ b/arch/sh/boards/mach-se/7343/irq.c
@@ -16,16 +16,18 @@
16#include <linux/io.h> 16#include <linux/io.h>
17#include <mach-se/mach/se7343.h> 17#include <mach-se/mach/se7343.h>
18 18
19unsigned int se7343_fpga_irq[SE7343_FPGA_IRQ_NR] = { 0, };
20
19static void disable_se7343_irq(unsigned int irq) 21static void disable_se7343_irq(unsigned int irq)
20{ 22{
21 unsigned int bit = irq - SE7343_FPGA_IRQ_BASE; 23 unsigned int bit = (unsigned int)get_irq_chip_data(irq);
22 ctrl_outw(ctrl_inw(PA_CPLD_IMSK) | 1 << bit, PA_CPLD_IMSK); 24 __raw_writew(__raw_readw(PA_CPLD_IMSK) | 1 << bit, PA_CPLD_IMSK);
23} 25}
24 26
25static void enable_se7343_irq(unsigned int irq) 27static void enable_se7343_irq(unsigned int irq)
26{ 28{
27 unsigned int bit = irq - SE7343_FPGA_IRQ_BASE; 29 unsigned int bit = (unsigned int)get_irq_chip_data(irq);
28 ctrl_outw(ctrl_inw(PA_CPLD_IMSK) & ~(1 << bit), PA_CPLD_IMSK); 30 __raw_writew(__raw_readw(PA_CPLD_IMSK) & ~(1 << bit), PA_CPLD_IMSK);
29} 31}
30 32
31static struct irq_chip se7343_irq_chip __read_mostly = { 33static struct irq_chip se7343_irq_chip __read_mostly = {
@@ -37,19 +39,16 @@ static struct irq_chip se7343_irq_chip __read_mostly = {
37 39
38static void se7343_irq_demux(unsigned int irq, struct irq_desc *desc) 40static void se7343_irq_demux(unsigned int irq, struct irq_desc *desc)
39{ 41{
40 unsigned short intv = ctrl_inw(PA_CPLD_ST); 42 unsigned short intv = __raw_readw(PA_CPLD_ST);
41 struct irq_desc *ext_desc; 43 unsigned int ext_irq = 0;
42 unsigned int ext_irq = SE7343_FPGA_IRQ_BASE;
43 44
44 intv &= (1 << SE7343_FPGA_IRQ_NR) - 1; 45 intv &= (1 << SE7343_FPGA_IRQ_NR) - 1;
45 46
46 while (intv) { 47 for (; intv; intv >>= 1, ext_irq++) {
47 if (intv & 1) { 48 if (!(intv & 1))
48 ext_desc = irq_desc + ext_irq; 49 continue;
49 handle_level_irq(ext_irq, ext_desc); 50
50 } 51 generic_handle_irq(se7343_fpga_irq[ext_irq]);
51 intv >>= 1;
52 ext_irq++;
53 } 52 }
54} 53}
55 54
@@ -58,16 +57,24 @@ static void se7343_irq_demux(unsigned int irq, struct irq_desc *desc)
58 */ 57 */
59void __init init_7343se_IRQ(void) 58void __init init_7343se_IRQ(void)
60{ 59{
61 int i; 60 int i, irq;
61
62 __raw_writew(0, PA_CPLD_IMSK); /* disable all irqs */
63 __raw_writew(0x2000, 0xb03fffec); /* mrshpc irq enable */
62 64
63 ctrl_outw(0, PA_CPLD_IMSK); /* disable all irqs */ 65 for (i = 0; i < SE7343_FPGA_IRQ_NR; i++) {
64 ctrl_outw(0x2000, 0xb03fffec); /* mrshpc irq enable */ 66 irq = create_irq();
67 if (irq < 0)
68 return;
69 se7343_fpga_irq[i] = irq;
65 70
66 for (i = 0; i < SE7343_FPGA_IRQ_NR; i++) 71 set_irq_chip_and_handler_name(se7343_fpga_irq[i],
67 set_irq_chip_and_handler_name(SE7343_FPGA_IRQ_BASE + i,
68 &se7343_irq_chip, 72 &se7343_irq_chip,
69 handle_level_irq, "level"); 73 handle_level_irq, "level");
70 74
75 set_irq_chip_data(se7343_fpga_irq[i], (void *)i);
76 }
77
71 set_irq_chained_handler(IRQ0_IRQ, se7343_irq_demux); 78 set_irq_chained_handler(IRQ0_IRQ, se7343_irq_demux);
72 set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW); 79 set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW);
73 set_irq_chained_handler(IRQ1_IRQ, se7343_irq_demux); 80 set_irq_chained_handler(IRQ1_IRQ, se7343_irq_demux);
diff --git a/arch/sh/boards/mach-se/7343/setup.c b/arch/sh/boards/mach-se/7343/setup.c
index 4de56f35f419..d2370af56d77 100644
--- a/arch/sh/boards/mach-se/7343/setup.c
+++ b/arch/sh/boards/mach-se/7343/setup.c
@@ -11,26 +11,17 @@
11#include <asm/irq.h> 11#include <asm/irq.h>
12#include <asm/io.h> 12#include <asm/io.h>
13 13
14static struct resource heartbeat_resources[] = { 14static struct resource heartbeat_resource = {
15 [0] = { 15 .start = PA_LED,
16 .start = PA_LED, 16 .end = PA_LED,
17 .end = PA_LED, 17 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
18 .flags = IORESOURCE_MEM,
19 },
20};
21
22static struct heartbeat_data heartbeat_data = {
23 .regsize = 16,
24}; 18};
25 19
26static struct platform_device heartbeat_device = { 20static struct platform_device heartbeat_device = {
27 .name = "heartbeat", 21 .name = "heartbeat",
28 .id = -1, 22 .id = -1,
29 .dev = { 23 .num_resources = 1,
30 .platform_data = &heartbeat_data, 24 .resource = &heartbeat_resource,
31 },
32 .num_resources = ARRAY_SIZE(heartbeat_resources),
33 .resource = heartbeat_resources,
34}; 25};
35 26
36static struct mtd_partition nor_flash_partitions[] = { 27static struct mtd_partition nor_flash_partitions[] = {
@@ -82,7 +73,6 @@ static struct plat_serial8250_port serial_platform_data[] = {
82 .mapbase = 0x16000000, 73 .mapbase = 0x16000000,
83 .regshift = 1, 74 .regshift = 1,
84 .flags = ST16C2550C_FLAGS, 75 .flags = ST16C2550C_FLAGS,
85 .irq = UARTA_IRQ,
86 .uartclk = 7372800, 76 .uartclk = 7372800,
87 }, 77 },
88 [1] = { 78 [1] = {
@@ -90,7 +80,6 @@ static struct plat_serial8250_port serial_platform_data[] = {
90 .mapbase = 0x17000000, 80 .mapbase = 0x17000000,
91 .regshift = 1, 81 .regshift = 1,
92 .flags = ST16C2550C_FLAGS, 82 .flags = ST16C2550C_FLAGS,
93 .irq = UARTB_IRQ,
94 .uartclk = 7372800, 83 .uartclk = 7372800,
95 }, 84 },
96 { }, 85 { },
@@ -121,7 +110,7 @@ static struct resource usb_resources[] = {
121 .flags = IORESOURCE_MEM, 110 .flags = IORESOURCE_MEM,
122 }, 111 },
123 [2] = { 112 [2] = {
124 .start = USB_IRQ, 113 /* Filled in later */
125 .flags = IORESOURCE_IRQ, 114 .flags = IORESOURCE_IRQ,
126 }, 115 },
127}; 116};
@@ -138,8 +127,8 @@ static struct isp116x_platform_data usb_platform_data = {
138static struct platform_device usb_device = { 127static struct platform_device usb_device = {
139 .name = "isp116x-hcd", 128 .name = "isp116x-hcd",
140 .id = -1, 129 .id = -1,
141 .num_resources = ARRAY_SIZE(usb_resources), 130 .num_resources = ARRAY_SIZE(usb_resources),
142 .resource = usb_resources, 131 .resource = usb_resources,
143 .dev = { 132 .dev = {
144 .platform_data = &usb_platform_data, 133 .platform_data = &usb_platform_data,
145 }, 134 },
@@ -155,6 +144,13 @@ static struct platform_device *sh7343se_platform_devices[] __initdata = {
155 144
156static int __init sh7343se_devices_setup(void) 145static int __init sh7343se_devices_setup(void)
157{ 146{
147 /* Wire-up dynamic vectors */
148 serial_platform_data[0].irq = se7343_fpga_irq[SE7343_FPGA_IRQ_UARTA];
149 serial_platform_data[1].irq = se7343_fpga_irq[SE7343_FPGA_IRQ_UARTB];
150
151 usb_resources[2].start = usb_resources[2].end =
152 se7343_fpga_irq[SE7343_FPGA_IRQ_USB];
153
158 return platform_add_devices(sh7343se_platform_devices, 154 return platform_add_devices(sh7343se_platform_devices,
159 ARRAY_SIZE(sh7343se_platform_devices)); 155 ARRAY_SIZE(sh7343se_platform_devices));
160} 156}
@@ -165,10 +161,10 @@ device_initcall(sh7343se_devices_setup);
165 */ 161 */
166static void __init sh7343se_setup(char **cmdline_p) 162static void __init sh7343se_setup(char **cmdline_p)
167{ 163{
168 ctrl_outw(0xf900, FPGA_OUT); /* FPGA */ 164 __raw_writew(0xf900, FPGA_OUT); /* FPGA */
169 165
170 ctrl_outw(0x0002, PORT_PECR); /* PORT E 1 = IRQ5 */ 166 __raw_writew(0x0002, PORT_PECR); /* PORT E 1 = IRQ5 */
171 ctrl_outw(0x0020, PORT_PSELD); 167 __raw_writew(0x0020, PORT_PSELD);
172 168
173 printk(KERN_INFO "MS7343CP01 Setup...done\n"); 169 printk(KERN_INFO "MS7343CP01 Setup...done\n");
174} 170}
@@ -179,6 +175,5 @@ static void __init sh7343se_setup(char **cmdline_p)
179static struct sh_machine_vector mv_7343se __initmv = { 175static struct sh_machine_vector mv_7343se __initmv = {
180 .mv_name = "SolutionEngine 7343", 176 .mv_name = "SolutionEngine 7343",
181 .mv_setup = sh7343se_setup, 177 .mv_setup = sh7343se_setup,
182 .mv_nr_irqs = SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_NR,
183 .mv_init_irq = init_7343se_IRQ, 178 .mv_init_irq = init_7343se_IRQ,
184}; 179};
diff --git a/arch/sh/boards/mach-se/770x/irq.c b/arch/sh/boards/mach-se/770x/irq.c
index ec1fea571b52..1028c17b81bc 100644
--- a/arch/sh/boards/mach-se/770x/irq.c
+++ b/arch/sh/boards/mach-se/770x/irq.c
@@ -96,13 +96,13 @@ static struct ipr_desc ipr_irq_desc = {
96void __init init_se_IRQ(void) 96void __init init_se_IRQ(void)
97{ 97{
98 /* Disable all interrupts */ 98 /* Disable all interrupts */
99 ctrl_outw(0, BCR_ILCRA); 99 __raw_writew(0, BCR_ILCRA);
100 ctrl_outw(0, BCR_ILCRB); 100 __raw_writew(0, BCR_ILCRB);
101 ctrl_outw(0, BCR_ILCRC); 101 __raw_writew(0, BCR_ILCRC);
102 ctrl_outw(0, BCR_ILCRD); 102 __raw_writew(0, BCR_ILCRD);
103 ctrl_outw(0, BCR_ILCRE); 103 __raw_writew(0, BCR_ILCRE);
104 ctrl_outw(0, BCR_ILCRF); 104 __raw_writew(0, BCR_ILCRF);
105 ctrl_outw(0, BCR_ILCRG); 105 __raw_writew(0, BCR_ILCRG);
106 106
107 register_ipr_controller(&ipr_irq_desc); 107 register_ipr_controller(&ipr_irq_desc);
108} 108}
diff --git a/arch/sh/boards/mach-se/770x/setup.c b/arch/sh/boards/mach-se/770x/setup.c
index 527eb6b12610..66d39d1b0901 100644
--- a/arch/sh/boards/mach-se/770x/setup.c
+++ b/arch/sh/boards/mach-se/770x/setup.c
@@ -93,15 +93,12 @@ static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
93static struct heartbeat_data heartbeat_data = { 93static struct heartbeat_data heartbeat_data = {
94 .bit_pos = heartbeat_bit_pos, 94 .bit_pos = heartbeat_bit_pos,
95 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos), 95 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
96 .regsize = 16,
97}; 96};
98 97
99static struct resource heartbeat_resources[] = { 98static struct resource heartbeat_resource = {
100 [0] = { 99 .start = PA_LED,
101 .start = PA_LED, 100 .end = PA_LED,
102 .end = PA_LED, 101 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
103 .flags = IORESOURCE_MEM,
104 },
105}; 102};
106 103
107static struct platform_device heartbeat_device = { 104static struct platform_device heartbeat_device = {
@@ -110,8 +107,8 @@ static struct platform_device heartbeat_device = {
110 .dev = { 107 .dev = {
111 .platform_data = &heartbeat_data, 108 .platform_data = &heartbeat_data,
112 }, 109 },
113 .num_resources = ARRAY_SIZE(heartbeat_resources), 110 .num_resources = 1,
114 .resource = heartbeat_resources, 111 .resource = &heartbeat_resource,
115}; 112};
116 113
117#if defined(CONFIG_CPU_SUBTYPE_SH7710) ||\ 114#if defined(CONFIG_CPU_SUBTYPE_SH7710) ||\
diff --git a/arch/sh/boards/mach-se/7721/irq.c b/arch/sh/boards/mach-se/7721/irq.c
index b417acc4dad0..d85022ea3f12 100644
--- a/arch/sh/boards/mach-se/7721/irq.c
+++ b/arch/sh/boards/mach-se/7721/irq.c
@@ -38,7 +38,7 @@ static DECLARE_INTC_DESC(intc_desc, "SE7721", vectors,
38void __init init_se7721_IRQ(void) 38void __init init_se7721_IRQ(void)
39{ 39{
40 /* PPCR */ 40 /* PPCR */
41 ctrl_outw(ctrl_inw(0xa4050118) & ~0x00ff, 0xa4050118); 41 __raw_writew(__raw_readw(0xa4050118) & ~0x00ff, 0xa4050118);
42 42
43 register_intc_controller(&intc_desc); 43 register_intc_controller(&intc_desc);
44 intc_set_priority(MRSHPC_IRQ0, 0xf - MRSHPC_IRQ0); 44 intc_set_priority(MRSHPC_IRQ0, 0xf - MRSHPC_IRQ0);
diff --git a/arch/sh/boards/mach-se/7721/setup.c b/arch/sh/boards/mach-se/7721/setup.c
index 55af4c36b43a..7416ad7ee53a 100644
--- a/arch/sh/boards/mach-se/7721/setup.c
+++ b/arch/sh/boards/mach-se/7721/setup.c
@@ -23,15 +23,12 @@ static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
23static struct heartbeat_data heartbeat_data = { 23static struct heartbeat_data heartbeat_data = {
24 .bit_pos = heartbeat_bit_pos, 24 .bit_pos = heartbeat_bit_pos,
25 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos), 25 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
26 .regsize = 16,
27}; 26};
28 27
29static struct resource heartbeat_resources[] = { 28static struct resource heartbeat_resource = {
30 [0] = { 29 .start = PA_LED,
31 .start = PA_LED, 30 .end = PA_LED,
32 .end = PA_LED, 31 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
33 .flags = IORESOURCE_MEM,
34 },
35}; 32};
36 33
37static struct platform_device heartbeat_device = { 34static struct platform_device heartbeat_device = {
@@ -40,8 +37,8 @@ static struct platform_device heartbeat_device = {
40 .dev = { 37 .dev = {
41 .platform_data = &heartbeat_data, 38 .platform_data = &heartbeat_data,
42 }, 39 },
43 .num_resources = ARRAY_SIZE(heartbeat_resources), 40 .num_resources = 1,
44 .resource = heartbeat_resources, 41 .resource = &heartbeat_resource,
45}; 42};
46 43
47static struct resource cf_ide_resources[] = { 44static struct resource cf_ide_resources[] = {
@@ -83,10 +80,10 @@ device_initcall(se7721_devices_setup);
83static void __init se7721_setup(char **cmdline_p) 80static void __init se7721_setup(char **cmdline_p)
84{ 81{
85 /* for USB */ 82 /* for USB */
86 ctrl_outw(0x0000, 0xA405010C); /* PGCR */ 83 __raw_writew(0x0000, 0xA405010C); /* PGCR */
87 ctrl_outw(0x0000, 0xA405010E); /* PHCR */ 84 __raw_writew(0x0000, 0xA405010E); /* PHCR */
88 ctrl_outw(0x00AA, 0xA4050118); /* PPCR */ 85 __raw_writew(0x00AA, 0xA4050118); /* PPCR */
89 ctrl_outw(0x0000, 0xA4050124); /* PSELA */ 86 __raw_writew(0x0000, 0xA4050124); /* PSELA */
90} 87}
91 88
92/* 89/*
diff --git a/arch/sh/boards/mach-se/7722/irq.c b/arch/sh/boards/mach-se/7722/irq.c
index 02d21a3e2a8f..61605db04ee6 100644
--- a/arch/sh/boards/mach-se/7722/irq.c
+++ b/arch/sh/boards/mach-se/7722/irq.c
@@ -16,16 +16,18 @@
16#include <asm/io.h> 16#include <asm/io.h>
17#include <mach-se/mach/se7722.h> 17#include <mach-se/mach/se7722.h>
18 18
19unsigned int se7722_fpga_irq[SE7722_FPGA_IRQ_NR] = { 0, };
20
19static void disable_se7722_irq(unsigned int irq) 21static void disable_se7722_irq(unsigned int irq)
20{ 22{
21 unsigned int bit = irq - SE7722_FPGA_IRQ_BASE; 23 unsigned int bit = (unsigned int)get_irq_chip_data(irq);
22 ctrl_outw(ctrl_inw(IRQ01_MASK) | 1 << bit, IRQ01_MASK); 24 __raw_writew(__raw_readw(IRQ01_MASK) | 1 << bit, IRQ01_MASK);
23} 25}
24 26
25static void enable_se7722_irq(unsigned int irq) 27static void enable_se7722_irq(unsigned int irq)
26{ 28{
27 unsigned int bit = irq - SE7722_FPGA_IRQ_BASE; 29 unsigned int bit = (unsigned int)get_irq_chip_data(irq);
28 ctrl_outw(ctrl_inw(IRQ01_MASK) & ~(1 << bit), IRQ01_MASK); 30 __raw_writew(__raw_readw(IRQ01_MASK) & ~(1 << bit), IRQ01_MASK);
29} 31}
30 32
31static struct irq_chip se7722_irq_chip __read_mostly = { 33static struct irq_chip se7722_irq_chip __read_mostly = {
@@ -37,19 +39,16 @@ static struct irq_chip se7722_irq_chip __read_mostly = {
37 39
38static void se7722_irq_demux(unsigned int irq, struct irq_desc *desc) 40static void se7722_irq_demux(unsigned int irq, struct irq_desc *desc)
39{ 41{
40 unsigned short intv = ctrl_inw(IRQ01_STS); 42 unsigned short intv = __raw_readw(IRQ01_STS);
41 struct irq_desc *ext_desc; 43 unsigned int ext_irq = 0;
42 unsigned int ext_irq = SE7722_FPGA_IRQ_BASE;
43 44
44 intv &= (1 << SE7722_FPGA_IRQ_NR) - 1; 45 intv &= (1 << SE7722_FPGA_IRQ_NR) - 1;
45 46
46 while (intv) { 47 for (; intv; intv >>= 1, ext_irq++) {
47 if (intv & 1) { 48 if (!(intv & 1))
48 ext_desc = irq_desc + ext_irq; 49 continue;
49 handle_level_irq(ext_irq, ext_desc); 50
50 } 51 generic_handle_irq(se7722_fpga_irq[ext_irq]);
51 intv >>= 1;
52 ext_irq++;
53 } 52 }
54} 53}
55 54
@@ -58,16 +57,24 @@ static void se7722_irq_demux(unsigned int irq, struct irq_desc *desc)
58 */ 57 */
59void __init init_se7722_IRQ(void) 58void __init init_se7722_IRQ(void)
60{ 59{
61 int i; 60 int i, irq;
61
62 __raw_writew(0, IRQ01_MASK); /* disable all irqs */
63 __raw_writew(0x2000, 0xb03fffec); /* mrshpc irq enable */
62 64
63 ctrl_outw(0, IRQ01_MASK); /* disable all irqs */ 65 for (i = 0; i < SE7722_FPGA_IRQ_NR; i++) {
64 ctrl_outw(0x2000, 0xb03fffec); /* mrshpc irq enable */ 66 irq = create_irq();
67 if (irq < 0)
68 return;
69 se7722_fpga_irq[i] = irq;
65 70
66 for (i = 0; i < SE7722_FPGA_IRQ_NR; i++) 71 set_irq_chip_and_handler_name(se7722_fpga_irq[i],
67 set_irq_chip_and_handler_name(SE7722_FPGA_IRQ_BASE + i,
68 &se7722_irq_chip, 72 &se7722_irq_chip,
69 handle_level_irq, "level"); 73 handle_level_irq, "level");
70 74
75 set_irq_chip_data(se7722_fpga_irq[i], (void *)i);
76 }
77
71 set_irq_chained_handler(IRQ0_IRQ, se7722_irq_demux); 78 set_irq_chained_handler(IRQ0_IRQ, se7722_irq_demux);
72 set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW); 79 set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW);
73 80
diff --git a/arch/sh/boards/mach-se/7722/setup.c b/arch/sh/boards/mach-se/7722/setup.c
index 36374078e521..80a4e571b310 100644
--- a/arch/sh/boards/mach-se/7722/setup.c
+++ b/arch/sh/boards/mach-se/7722/setup.c
@@ -14,6 +14,7 @@
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15#include <linux/ata_platform.h> 15#include <linux/ata_platform.h>
16#include <linux/input.h> 16#include <linux/input.h>
17#include <linux/input/sh_keysc.h>
17#include <linux/smc91x.h> 18#include <linux/smc91x.h>
18#include <mach-se/mach/se7722.h> 19#include <mach-se/mach/se7722.h>
19#include <mach-se/mach/mrshpc.h> 20#include <mach-se/mach/mrshpc.h>
@@ -21,30 +22,20 @@
21#include <asm/clock.h> 22#include <asm/clock.h>
22#include <asm/io.h> 23#include <asm/io.h>
23#include <asm/heartbeat.h> 24#include <asm/heartbeat.h>
24#include <asm/sh_keysc.h>
25#include <cpu/sh7722.h> 25#include <cpu/sh7722.h>
26 26
27/* Heartbeat */ 27/* Heartbeat */
28static struct heartbeat_data heartbeat_data = { 28static struct resource heartbeat_resource = {
29 .regsize = 16, 29 .start = PA_LED,
30}; 30 .end = PA_LED,
31 31 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
32static struct resource heartbeat_resources[] = {
33 [0] = {
34 .start = PA_LED,
35 .end = PA_LED,
36 .flags = IORESOURCE_MEM,
37 },
38}; 32};
39 33
40static struct platform_device heartbeat_device = { 34static struct platform_device heartbeat_device = {
41 .name = "heartbeat", 35 .name = "heartbeat",
42 .id = -1, 36 .id = -1,
43 .dev = { 37 .num_resources = 1,
44 .platform_data = &heartbeat_data, 38 .resource = &heartbeat_resource,
45 },
46 .num_resources = ARRAY_SIZE(heartbeat_resources),
47 .resource = heartbeat_resources,
48}; 39};
49 40
50/* SMC91x */ 41/* SMC91x */
@@ -60,8 +51,7 @@ static struct resource smc91x_eth_resources[] = {
60 .flags = IORESOURCE_MEM, 51 .flags = IORESOURCE_MEM,
61 }, 52 },
62 [1] = { 53 [1] = {
63 .start = SMC_IRQ, 54 /* Filled in later */
64 .end = SMC_IRQ,
65 .flags = IORESOURCE_IRQ, 55 .flags = IORESOURCE_IRQ,
66 }, 56 },
67}; 57};
@@ -90,8 +80,7 @@ static struct resource cf_ide_resources[] = {
90 .flags = IORESOURCE_IO, 80 .flags = IORESOURCE_IO,
91 }, 81 },
92 [2] = { 82 [2] = {
93 .start = MRSHPC_IRQ0, 83 /* Filled in later */
94 .end = MRSHPC_IRQ0,
95 .flags = IORESOURCE_IRQ, 84 .flags = IORESOURCE_IRQ,
96 }, 85 },
97}; 86};
@@ -153,38 +142,46 @@ static struct platform_device *se7722_devices[] __initdata = {
153static int __init se7722_devices_setup(void) 142static int __init se7722_devices_setup(void)
154{ 143{
155 mrshpc_setup_windows(); 144 mrshpc_setup_windows();
145
146 /* Wire-up dynamic vectors */
147 cf_ide_resources[2].start = cf_ide_resources[2].end =
148 se7722_fpga_irq[SE7722_FPGA_IRQ_MRSHPC0];
149
150 smc91x_eth_resources[1].start = smc91x_eth_resources[1].end =
151 se7722_fpga_irq[SE7722_FPGA_IRQ_SMC];
152
156 return platform_add_devices(se7722_devices, ARRAY_SIZE(se7722_devices)); 153 return platform_add_devices(se7722_devices, ARRAY_SIZE(se7722_devices));
157} 154}
158device_initcall(se7722_devices_setup); 155device_initcall(se7722_devices_setup);
159 156
160static void __init se7722_setup(char **cmdline_p) 157static void __init se7722_setup(char **cmdline_p)
161{ 158{
162 ctrl_outw(0x010D, FPGA_OUT); /* FPGA */ 159 __raw_writew(0x010D, FPGA_OUT); /* FPGA */
163 160
164 ctrl_outw(0x0000, PORT_PECR); /* PORT E 1 = IRQ5 ,E 0 = BS */ 161 __raw_writew(0x0000, PORT_PECR); /* PORT E 1 = IRQ5 ,E 0 = BS */
165 ctrl_outw(0x1000, PORT_PJCR); /* PORT J 1 = IRQ1,J 0 =IRQ0 */ 162 __raw_writew(0x1000, PORT_PJCR); /* PORT J 1 = IRQ1,J 0 =IRQ0 */
166 163
167 /* LCDC I/O */ 164 /* LCDC I/O */
168 ctrl_outw(0x0020, PORT_PSELD); 165 __raw_writew(0x0020, PORT_PSELD);
169 166
170 /* SIOF1*/ 167 /* SIOF1*/
171 ctrl_outw(0x0003, PORT_PSELB); 168 __raw_writew(0x0003, PORT_PSELB);
172 ctrl_outw(0xe000, PORT_PSELC); 169 __raw_writew(0xe000, PORT_PSELC);
173 ctrl_outw(0x0000, PORT_PKCR); 170 __raw_writew(0x0000, PORT_PKCR);
174 171
175 /* LCDC */ 172 /* LCDC */
176 ctrl_outw(0x4020, PORT_PHCR); 173 __raw_writew(0x4020, PORT_PHCR);
177 ctrl_outw(0x0000, PORT_PLCR); 174 __raw_writew(0x0000, PORT_PLCR);
178 ctrl_outw(0x0000, PORT_PMCR); 175 __raw_writew(0x0000, PORT_PMCR);
179 ctrl_outw(0x0002, PORT_PRCR); 176 __raw_writew(0x0002, PORT_PRCR);
180 ctrl_outw(0x0000, PORT_PXCR); /* LCDC,CS6A */ 177 __raw_writew(0x0000, PORT_PXCR); /* LCDC,CS6A */
181 178
182 /* KEYSC */ 179 /* KEYSC */
183 ctrl_outw(0x0A10, PORT_PSELA); /* BS,SHHID2 */ 180 __raw_writew(0x0A10, PORT_PSELA); /* BS,SHHID2 */
184 ctrl_outw(0x0000, PORT_PYCR); 181 __raw_writew(0x0000, PORT_PYCR);
185 ctrl_outw(0x0000, PORT_PZCR); 182 __raw_writew(0x0000, PORT_PZCR);
186 ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA); 183 __raw_writew(__raw_readw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA);
187 ctrl_outw(ctrl_inw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC); 184 __raw_writew(__raw_readw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC);
188} 185}
189 186
190/* 187/*
@@ -193,6 +190,5 @@ static void __init se7722_setup(char **cmdline_p)
193static struct sh_machine_vector mv_se7722 __initmv = { 190static struct sh_machine_vector mv_se7722 __initmv = {
194 .mv_name = "Solution Engine 7722" , 191 .mv_name = "Solution Engine 7722" ,
195 .mv_setup = se7722_setup , 192 .mv_setup = se7722_setup ,
196 .mv_nr_irqs = SE7722_FPGA_IRQ_BASE + SE7722_FPGA_IRQ_NR,
197 .mv_init_irq = init_se7722_IRQ, 193 .mv_init_irq = init_se7722_IRQ,
198}; 194};
diff --git a/arch/sh/boards/mach-se/7724/Makefile b/arch/sh/boards/mach-se/7724/Makefile
index 349cbd6ce82d..a08b36830f0e 100644
--- a/arch/sh/boards/mach-se/7724/Makefile
+++ b/arch/sh/boards/mach-se/7724/Makefile
@@ -7,4 +7,4 @@
7# 7#
8# 8#
9 9
10obj-y := setup.o irq.o \ No newline at end of file 10obj-y := setup.o irq.o sdram.o
diff --git a/arch/sh/boards/mach-se/7724/irq.c b/arch/sh/boards/mach-se/7724/irq.c
index f76cf3b49f23..0942be2daef6 100644
--- a/arch/sh/boards/mach-se/7724/irq.c
+++ b/arch/sh/boards/mach-se/7724/irq.c
@@ -72,14 +72,14 @@ static void disable_se7724_irq(unsigned int irq)
72{ 72{
73 struct fpga_irq set = get_fpga_irq(fpga2irq(irq)); 73 struct fpga_irq set = get_fpga_irq(fpga2irq(irq));
74 unsigned int bit = irq - set.base; 74 unsigned int bit = irq - set.base;
75 ctrl_outw(ctrl_inw(set.mraddr) | 0x0001 << bit, set.mraddr); 75 __raw_writew(__raw_readw(set.mraddr) | 0x0001 << bit, set.mraddr);
76} 76}
77 77
78static void enable_se7724_irq(unsigned int irq) 78static void enable_se7724_irq(unsigned int irq)
79{ 79{
80 struct fpga_irq set = get_fpga_irq(fpga2irq(irq)); 80 struct fpga_irq set = get_fpga_irq(fpga2irq(irq));
81 unsigned int bit = irq - set.base; 81 unsigned int bit = irq - set.base;
82 ctrl_outw(ctrl_inw(set.mraddr) & ~(0x0001 << bit), set.mraddr); 82 __raw_writew(__raw_readw(set.mraddr) & ~(0x0001 << bit), set.mraddr);
83} 83}
84 84
85static struct irq_chip se7724_irq_chip __read_mostly = { 85static struct irq_chip se7724_irq_chip __read_mostly = {
@@ -92,19 +92,16 @@ static struct irq_chip se7724_irq_chip __read_mostly = {
92static void se7724_irq_demux(unsigned int irq, struct irq_desc *desc) 92static void se7724_irq_demux(unsigned int irq, struct irq_desc *desc)
93{ 93{
94 struct fpga_irq set = get_fpga_irq(irq); 94 struct fpga_irq set = get_fpga_irq(irq);
95 unsigned short intv = ctrl_inw(set.sraddr); 95 unsigned short intv = __raw_readw(set.sraddr);
96 struct irq_desc *ext_desc;
97 unsigned int ext_irq = set.base; 96 unsigned int ext_irq = set.base;
98 97
99 intv &= set.mask; 98 intv &= set.mask;
100 99
101 while (intv) { 100 for (; intv; intv >>= 1, ext_irq++) {
102 if (intv & 0x0001) { 101 if (!(intv & 1))
103 ext_desc = irq_desc + ext_irq; 102 continue;
104 handle_level_irq(ext_irq, ext_desc); 103
105 } 104 generic_handle_irq(ext_irq);
106 intv >>= 1;
107 ext_irq++;
108 } 105 }
109} 106}
110 107
@@ -113,20 +110,39 @@ static void se7724_irq_demux(unsigned int irq, struct irq_desc *desc)
113 */ 110 */
114void __init init_se7724_IRQ(void) 111void __init init_se7724_IRQ(void)
115{ 112{
116 int i; 113 int i, nid = cpu_to_node(boot_cpu_data);
117 114
118 ctrl_outw(0xffff, IRQ0_MR); /* mask all */ 115 __raw_writew(0xffff, IRQ0_MR); /* mask all */
119 ctrl_outw(0xffff, IRQ1_MR); /* mask all */ 116 __raw_writew(0xffff, IRQ1_MR); /* mask all */
120 ctrl_outw(0xffff, IRQ2_MR); /* mask all */ 117 __raw_writew(0xffff, IRQ2_MR); /* mask all */
121 ctrl_outw(0x0000, IRQ0_SR); /* clear irq */ 118 __raw_writew(0x0000, IRQ0_SR); /* clear irq */
122 ctrl_outw(0x0000, IRQ1_SR); /* clear irq */ 119 __raw_writew(0x0000, IRQ1_SR); /* clear irq */
123 ctrl_outw(0x0000, IRQ2_SR); /* clear irq */ 120 __raw_writew(0x0000, IRQ2_SR); /* clear irq */
124 ctrl_outw(0x002a, IRQ_MODE); /* set irq type */ 121 __raw_writew(0x002a, IRQ_MODE); /* set irq type */
125 122
126 for (i = 0; i < SE7724_FPGA_IRQ_NR; i++) 123 for (i = 0; i < SE7724_FPGA_IRQ_NR; i++) {
127 set_irq_chip_and_handler_name(SE7724_FPGA_IRQ_BASE + i, 124 int irq, wanted;
125
126 wanted = SE7724_FPGA_IRQ_BASE + i;
127
128 irq = create_irq_nr(wanted, nid);
129 if (unlikely(irq == 0)) {
130 pr_err("%s: failed hooking irq %d for FPGA\n",
131 __func__, wanted);
132 return;
133 }
134
135 if (unlikely(irq != wanted)) {
136 pr_err("%s: got irq %d but wanted %d, bailing.\n",
137 __func__, irq, wanted);
138 destroy_irq(irq);
139 return;
140 }
141
142 set_irq_chip_and_handler_name(irq,
128 &se7724_irq_chip, 143 &se7724_irq_chip,
129 handle_level_irq, "level"); 144 handle_level_irq, "level");
145 }
130 146
131 set_irq_chained_handler(IRQ0_IRQ, se7724_irq_demux); 147 set_irq_chained_handler(IRQ0_IRQ, se7724_irq_demux);
132 set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW); 148 set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW);
diff --git a/arch/sh/boards/mach-se/7724/sdram.S b/arch/sh/boards/mach-se/7724/sdram.S
new file mode 100644
index 000000000000..6fa4734d09c7
--- /dev/null
+++ b/arch/sh/boards/mach-se/7724/sdram.S
@@ -0,0 +1,131 @@
1/*
2 * MS7724SE sdram self/auto-refresh setup code
3 *
4 * Copyright (C) 2009 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/sys.h>
12#include <linux/errno.h>
13#include <linux/linkage.h>
14#include <asm/asm-offsets.h>
15#include <asm/suspend.h>
16#include <asm/romimage-macros.h>
17
18/* code to enter and leave self-refresh. must be self-contained.
19 * this code will be copied to on-chip memory and executed from there.
20 */
21 .balign 4
22ENTRY(ms7724se_sdram_enter_start)
23
24 /* DBSC: put memory in self-refresh mode */
25
26 ED 0xFD000010, 0x00000000 /* DBEN */
27 ED 0xFD000040, 0x00000000 /* DBRFPDN0 */
28 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
29 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
30 ED 0xFD000040, 0x00000001 /* DBRFPDN0 */
31
32 rts
33 nop
34
35ENTRY(ms7724se_sdram_enter_end)
36
37 .balign 4
38ENTRY(ms7724se_sdram_leave_start)
39
40 /* DBSC: put memory in auto-refresh mode */
41
42 mov.l @(SH_SLEEP_MODE, r5), r0
43 tst #SUSP_SH_RSTANDBY, r0
44 bf resume_rstandby
45
46 ED 0xFD000040, 0x00000000 /* DBRFPDN0 */
47 WAIT 1
48 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
49 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
50 ED 0xFD000010, 0x00000001 /* DBEN */
51 ED 0xFD000040, 0x00010000 /* DBRFPDN0 */
52
53 rts
54 nop
55
56resume_rstandby:
57
58 /* CPG: setup clocks before restarting external memory */
59
60 ED 0xA4150024, 0x00004000 /* PLLCR */
61
62 mov.l FRQCRA,r0
63 mov.l @r0,r3
64 mov.l KICK,r1
65 or r1, r3
66 mov.l r3, @r0
67
68 mov.l LSTATS,r0
69 mov #1,r1
70WAIT_LSTATS:
71 mov.l @r0,r3
72 tst r1,r3
73 bf WAIT_LSTATS
74
75 /* DBSC: re-initialize and put in auto-refresh */
76
77 ED 0xFD000108, 0x00000181 /* DBPDCNT0 */
78 ED 0xFD000020, 0x015B0002 /* DBCONF */
79 ED 0xFD000030, 0x03071502 /* DBTR0 */
80 ED 0xFD000034, 0x02020102 /* DBTR1 */
81 ED 0xFD000038, 0x01090405 /* DBTR2 */
82 ED 0xFD00003C, 0x00000002 /* DBTR3 */
83 ED 0xFD000008, 0x00000005 /* DBKIND */
84 ED 0xFD000040, 0x00000001 /* DBRFPDN0 */
85 ED 0xFD000040, 0x00000000 /* DBRFPDN0 */
86 ED 0xFD000018, 0x00000001 /* DBCKECNT */
87
88 mov #100,r0
89WAIT_400NS:
90 dt r0
91 bf WAIT_400NS
92
93 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
94 ED 0xFD000060, 0x00020000 /* DBMRCNT (EMR2) */
95 ED 0xFD000060, 0x00030000 /* DBMRCNT (EMR3) */
96 ED 0xFD000060, 0x00010004 /* DBMRCNT (EMR) */
97 ED 0xFD000060, 0x00000532 /* DBMRCNT (MRS) */
98 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
99 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
100 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
101 ED 0xFD000060, 0x00000432 /* DBMRCNT (MRS) */
102 ED 0xFD000060, 0x000103c0 /* DBMRCNT (EMR) */
103 ED 0xFD000060, 0x00010040 /* DBMRCNT (EMR) */
104
105 mov #100,r0
106WAIT_400NS_2:
107 dt r0
108 bf WAIT_400NS_2
109
110 ED 0xFD000010, 0x00000001 /* DBEN */
111 ED 0xFD000044, 0x0000050f /* DBRFPDN1 */
112 ED 0xFD000048, 0x236800e6 /* DBRFPDN2 */
113
114 mov.l DUMMY,r0
115 mov.l @r0, r1 /* force single dummy read */
116
117 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
118 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
119 ED 0xFD000108, 0x00000080 /* DBPDCNT0 */
120 ED 0xFD000040, 0x00010000 /* DBRFPDN0 */
121
122 rts
123 nop
124
125 .balign 4
126DUMMY: .long 0xac400000
127FRQCRA: .long 0xa4150000
128KICK: .long 0x80000000
129LSTATS: .long 0xa4150060
130
131ENTRY(ms7724se_sdram_leave_end)
diff --git a/arch/sh/boards/mach-se/7724/setup.c b/arch/sh/boards/mach-se/7724/setup.c
index e78c3be8ad2f..ccaa290e9aba 100644
--- a/arch/sh/boards/mach-se/7724/setup.c
+++ b/arch/sh/boards/mach-se/7724/setup.c
@@ -19,6 +19,7 @@
19#include <linux/smc91x.h> 19#include <linux/smc91x.h>
20#include <linux/gpio.h> 20#include <linux/gpio.h>
21#include <linux/input.h> 21#include <linux/input.h>
22#include <linux/input/sh_keysc.h>
22#include <linux/usb/r8a66597.h> 23#include <linux/usb/r8a66597.h>
23#include <video/sh_mobile_lcdc.h> 24#include <video/sh_mobile_lcdc.h>
24#include <media/sh_mobile_ceu.h> 25#include <media/sh_mobile_ceu.h>
@@ -27,7 +28,7 @@
27#include <asm/heartbeat.h> 28#include <asm/heartbeat.h>
28#include <asm/sh_eth.h> 29#include <asm/sh_eth.h>
29#include <asm/clock.h> 30#include <asm/clock.h>
30#include <asm/sh_keysc.h> 31#include <asm/suspend.h>
31#include <cpu/sh7724.h> 32#include <cpu/sh7724.h>
32#include <mach-se/mach/se7724.h> 33#include <mach-se/mach/se7724.h>
33 34
@@ -51,27 +52,25 @@
51 * and change SW41 to use 720p 52 * and change SW41 to use 720p
52 */ 53 */
53 54
54/* Heartbeat */ 55/*
55static struct heartbeat_data heartbeat_data = { 56 * about sound
56 .regsize = 16, 57 *
57}; 58 * This setup.c supports FSI slave mode.
59 * Please change J20, J21, J22 pin to 1-2 connection.
60 */
58 61
59static struct resource heartbeat_resources[] = { 62/* Heartbeat */
60 [0] = { 63static struct resource heartbeat_resource = {
61 .start = PA_LED, 64 .start = PA_LED,
62 .end = PA_LED, 65 .end = PA_LED,
63 .flags = IORESOURCE_MEM, 66 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
64 },
65}; 67};
66 68
67static struct platform_device heartbeat_device = { 69static struct platform_device heartbeat_device = {
68 .name = "heartbeat", 70 .name = "heartbeat",
69 .id = -1, 71 .id = -1,
70 .dev = { 72 .num_resources = 1,
71 .platform_data = &heartbeat_data, 73 .resource = &heartbeat_resource,
72 },
73 .num_resources = ARRAY_SIZE(heartbeat_resources),
74 .resource = heartbeat_resources,
75}; 74};
76 75
77/* LAN91C111 */ 76/* LAN91C111 */
@@ -264,12 +263,12 @@ static struct platform_device ceu1_device = {
264#define FCLKACR 0xa4150008 263#define FCLKACR 0xa4150008
265static void fsimck_init(struct clk *clk) 264static void fsimck_init(struct clk *clk)
266{ 265{
267 u32 status = ctrl_inl(clk->enable_reg); 266 u32 status = __raw_readl(clk->enable_reg);
268 267
269 /* use external clock */ 268 /* use external clock */
270 status &= ~0x000000ff; 269 status &= ~0x000000ff;
271 status |= 0x00000080; 270 status |= 0x00000080;
272 ctrl_outl(status, clk->enable_reg); 271 __raw_writel(status, clk->enable_reg);
273} 272}
274 273
275static struct clk_ops fsimck_clk_ops = { 274static struct clk_ops fsimck_clk_ops = {
@@ -284,6 +283,7 @@ static struct clk fsimcka_clk = {
284 .rate = 0, /* unknown */ 283 .rate = 0, /* unknown */
285}; 284};
286 285
286/* change J20, J21, J22 pin to 1-2 connection to use slave mode */
287struct sh_fsi_platform_info fsi_info = { 287struct sh_fsi_platform_info fsi_info = {
288 .porta_flags = SH_FSI_BRS_INV | 288 .porta_flags = SH_FSI_BRS_INV |
289 SH_FSI_OUT_SLAVE_MODE | 289 SH_FSI_OUT_SLAVE_MODE |
@@ -313,12 +313,15 @@ static struct platform_device fsi_device = {
313 .dev = { 313 .dev = {
314 .platform_data = &fsi_info, 314 .platform_data = &fsi_info,
315 }, 315 },
316 .archdata = {
317 .hwblk_id = HWBLK_SPU, /* FSI needs SPU hwblk */
318 },
316}; 319};
317 320
318/* KEYSC in SoC (Needs SW33-2 set to ON) */ 321/* KEYSC in SoC (Needs SW33-2 set to ON) */
319static struct sh_keysc_info keysc_info = { 322static struct sh_keysc_info keysc_info = {
320 .mode = SH_KEYSC_MODE_1, 323 .mode = SH_KEYSC_MODE_1,
321 .scan_timing = 10, 324 .scan_timing = 3,
322 .delay = 50, 325 .delay = 50,
323 .keycodes = { 326 .keycodes = {
324 KEY_1, KEY_2, KEY_3, KEY_4, KEY_5, 327 KEY_1, KEY_2, KEY_3, KEY_4, KEY_5,
@@ -448,6 +451,72 @@ static struct platform_device sh7724_usb1_gadget_device = {
448 .resource = sh7724_usb1_gadget_resources, 451 .resource = sh7724_usb1_gadget_resources,
449}; 452};
450 453
454static struct resource sdhi0_cn7_resources[] = {
455 [0] = {
456 .name = "SDHI0",
457 .start = 0x04ce0000,
458 .end = 0x04ce01ff,
459 .flags = IORESOURCE_MEM,
460 },
461 [1] = {
462 .start = 100,
463 .flags = IORESOURCE_IRQ,
464 },
465};
466
467static struct platform_device sdhi0_cn7_device = {
468 .name = "sh_mobile_sdhi",
469 .id = 0,
470 .num_resources = ARRAY_SIZE(sdhi0_cn7_resources),
471 .resource = sdhi0_cn7_resources,
472 .archdata = {
473 .hwblk_id = HWBLK_SDHI0,
474 },
475};
476
477static struct resource sdhi1_cn8_resources[] = {
478 [0] = {
479 .name = "SDHI1",
480 .start = 0x04cf0000,
481 .end = 0x04cf01ff,
482 .flags = IORESOURCE_MEM,
483 },
484 [1] = {
485 .start = 23,
486 .flags = IORESOURCE_IRQ,
487 },
488};
489
490static struct platform_device sdhi1_cn8_device = {
491 .name = "sh_mobile_sdhi",
492 .id = 1,
493 .num_resources = ARRAY_SIZE(sdhi1_cn8_resources),
494 .resource = sdhi1_cn8_resources,
495 .archdata = {
496 .hwblk_id = HWBLK_SDHI1,
497 },
498};
499
500/* IrDA */
501static struct resource irda_resources[] = {
502 [0] = {
503 .name = "IrDA",
504 .start = 0xA45D0000,
505 .end = 0xA45D0049,
506 .flags = IORESOURCE_MEM,
507 },
508 [1] = {
509 .start = 20,
510 .flags = IORESOURCE_IRQ,
511 },
512};
513
514static struct platform_device irda_device = {
515 .name = "sh_sir",
516 .num_resources = ARRAY_SIZE(irda_resources),
517 .resource = irda_resources,
518};
519
451static struct platform_device *ms7724se_devices[] __initdata = { 520static struct platform_device *ms7724se_devices[] __initdata = {
452 &heartbeat_device, 521 &heartbeat_device,
453 &smc91x_eth_device, 522 &smc91x_eth_device,
@@ -460,6 +529,16 @@ static struct platform_device *ms7724se_devices[] __initdata = {
460 &sh7724_usb0_host_device, 529 &sh7724_usb0_host_device,
461 &sh7724_usb1_gadget_device, 530 &sh7724_usb1_gadget_device,
462 &fsi_device, 531 &fsi_device,
532 &sdhi0_cn7_device,
533 &sdhi1_cn8_device,
534 &irda_device,
535};
536
537/* I2C device */
538static struct i2c_board_info i2c0_devices[] = {
539 {
540 I2C_BOARD_INFO("ak4642", 0x12),
541 },
463}; 542};
464 543
465#define EEPROM_OP 0xBA206000 544#define EEPROM_OP 0xBA206000
@@ -472,9 +551,9 @@ static int __init sh_eth_is_eeprom_ready(void)
472 int t = 10000; 551 int t = 10000;
473 552
474 while (t--) { 553 while (t--) {
475 if (!ctrl_inw(EEPROM_STAT)) 554 if (!__raw_readw(EEPROM_STAT))
476 return 1; 555 return 1;
477 cpu_relax(); 556 udelay(1);
478 } 557 }
479 558
480 printk(KERN_ERR "ms7724se can not access to eeprom\n"); 559 printk(KERN_ERR "ms7724se can not access to eeprom\n");
@@ -484,7 +563,7 @@ static int __init sh_eth_is_eeprom_ready(void)
484static void __init sh_eth_init(void) 563static void __init sh_eth_init(void)
485{ 564{
486 int i; 565 int i;
487 u16 mac[3]; 566 u16 mac;
488 567
489 /* check EEPROM status */ 568 /* check EEPROM status */
490 if (!sh_eth_is_eeprom_ready()) 569 if (!sh_eth_is_eeprom_ready())
@@ -492,22 +571,16 @@ static void __init sh_eth_init(void)
492 571
493 /* read MAC addr from EEPROM */ 572 /* read MAC addr from EEPROM */
494 for (i = 0 ; i < 3 ; i++) { 573 for (i = 0 ; i < 3 ; i++) {
495 ctrl_outw(0x0, EEPROM_OP); /* read */ 574 __raw_writew(0x0, EEPROM_OP); /* read */
496 ctrl_outw(i*2, EEPROM_ADR); 575 __raw_writew(i*2, EEPROM_ADR);
497 ctrl_outw(0x1, EEPROM_STRT); 576 __raw_writew(0x1, EEPROM_STRT);
498 if (!sh_eth_is_eeprom_ready()) 577 if (!sh_eth_is_eeprom_ready())
499 return; 578 return;
500 579
501 mac[i] = ctrl_inw(EEPROM_DATA); 580 mac = __raw_readw(EEPROM_DATA);
502 mac[i] = ((mac[i] & 0xFF) << 8) | (mac[i] >> 8); /* swap */ 581 sh_eth_plat.mac_addr[i << 1] = mac & 0xff;
582 sh_eth_plat.mac_addr[(i << 1) + 1] = mac >> 8;
503 } 583 }
504
505 /* reset sh-eth */
506 ctrl_outl(0x1, SH_ETH_ADDR + 0x0);
507
508 /* set MAC addr */
509 ctrl_outl(((mac[0] << 16) | (mac[1])), SH_ETH_MAHR);
510 ctrl_outl((mac[2]), SH_ETH_MALR);
511} 584}
512 585
513#define SW4140 0xBA201000 586#define SW4140 0xBA201000
@@ -524,24 +597,46 @@ static void __init sh_eth_init(void)
524#define SW41_G 0x4000 597#define SW41_G 0x4000
525#define SW41_H 0x8000 598#define SW41_H 0x8000
526 599
527static int __init devices_setup(void) 600extern char ms7724se_sdram_enter_start;
601extern char ms7724se_sdram_enter_end;
602extern char ms7724se_sdram_leave_start;
603extern char ms7724se_sdram_leave_end;
604
605
606static int __init arch_setup(void)
528{ 607{
529 u16 sw = ctrl_inw(SW4140); /* select camera, monitor */ 608 /* enable I2C device */
530 struct clk *fsia_clk; 609 i2c_register_board_info(0, i2c0_devices,
610 ARRAY_SIZE(i2c0_devices));
611 return 0;
612}
613arch_initcall(arch_setup);
531 614
615static int __init devices_setup(void)
616{
617 u16 sw = __raw_readw(SW4140); /* select camera, monitor */
618 struct clk *clk;
619
620 /* register board specific self-refresh code */
621 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
622 SUSP_SH_RSTANDBY,
623 &ms7724se_sdram_enter_start,
624 &ms7724se_sdram_enter_end,
625 &ms7724se_sdram_leave_start,
626 &ms7724se_sdram_leave_end);
532 /* Reset Release */ 627 /* Reset Release */
533 ctrl_outw(ctrl_inw(FPGA_OUT) & 628 __raw_writew(__raw_readw(FPGA_OUT) &
534 ~((1 << 1) | /* LAN */ 629 ~((1 << 1) | /* LAN */
535 (1 << 6) | /* VIDEO DAC */ 630 (1 << 6) | /* VIDEO DAC */
536 (1 << 7) | /* AK4643 */ 631 (1 << 7) | /* AK4643 */
632 (1 << 8) | /* IrDA */
537 (1 << 12) | /* USB0 */ 633 (1 << 12) | /* USB0 */
538 (1 << 14)), /* RMII */ 634 (1 << 14)), /* RMII */
539 FPGA_OUT); 635 FPGA_OUT);
540 636
541 /* turn on USB clocks, use external clock */ 637 /* turn on USB clocks, use external clock */
542 ctrl_outw((ctrl_inw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB); 638 __raw_writew((__raw_readw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB);
543 639
544#ifdef CONFIG_PM
545 /* Let LED9 show STATUS2 */ 640 /* Let LED9 show STATUS2 */
546 gpio_request(GPIO_FN_STATUS2, NULL); 641 gpio_request(GPIO_FN_STATUS2, NULL);
547 642
@@ -550,28 +645,12 @@ static int __init devices_setup(void)
550 645
551 /* Lit LED11 show PDSTATUS */ 646 /* Lit LED11 show PDSTATUS */
552 gpio_request(GPIO_FN_PDSTATUS, NULL); 647 gpio_request(GPIO_FN_PDSTATUS, NULL);
553#else
554 /* Lit LED9 */
555 gpio_request(GPIO_PTJ6, NULL);
556 gpio_direction_output(GPIO_PTJ6, 1);
557 gpio_export(GPIO_PTJ6, 0);
558
559 /* Lit LED10 */
560 gpio_request(GPIO_PTJ5, NULL);
561 gpio_direction_output(GPIO_PTJ5, 1);
562 gpio_export(GPIO_PTJ5, 0);
563
564 /* Lit LED11 */
565 gpio_request(GPIO_PTJ7, NULL);
566 gpio_direction_output(GPIO_PTJ7, 1);
567 gpio_export(GPIO_PTJ7, 0);
568#endif
569 648
570 /* enable USB0 port */ 649 /* enable USB0 port */
571 ctrl_outw(0x0600, 0xa40501d4); 650 __raw_writew(0x0600, 0xa40501d4);
572 651
573 /* enable USB1 port */ 652 /* enable USB1 port */
574 ctrl_outw(0x0600, 0xa4050192); 653 __raw_writew(0x0600, 0xa4050192);
575 654
576 /* enable IRQ 0,1,2 */ 655 /* enable IRQ 0,1,2 */
577 gpio_request(GPIO_FN_INTC_IRQ0, NULL); 656 gpio_request(GPIO_FN_INTC_IRQ0, NULL);
@@ -619,7 +698,7 @@ static int __init devices_setup(void)
619 gpio_request(GPIO_FN_LCDVCPWC, NULL); 698 gpio_request(GPIO_FN_LCDVCPWC, NULL);
620 gpio_request(GPIO_FN_LCDRD, NULL); 699 gpio_request(GPIO_FN_LCDRD, NULL);
621 gpio_request(GPIO_FN_LCDLCLK, NULL); 700 gpio_request(GPIO_FN_LCDLCLK, NULL);
622 ctrl_outw((ctrl_inw(PORT_HIZA) & ~0x0001), PORT_HIZA); 701 __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
623 702
624 /* enable CEU0 */ 703 /* enable CEU0 */
625 gpio_request(GPIO_FN_VIO0_D15, NULL); 704 gpio_request(GPIO_FN_VIO0_D15, NULL);
@@ -690,13 +769,42 @@ static int __init devices_setup(void)
690 gpio_request(GPIO_FN_CLKAUDIOBO, NULL); 769 gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
691 gpio_request(GPIO_FN_FSIIASD, NULL); 770 gpio_request(GPIO_FN_FSIIASD, NULL);
692 771
772 /* set SPU2 clock to 83.4 MHz */
773 clk = clk_get(NULL, "spu_clk");
774 clk_set_rate(clk, clk_round_rate(clk, 83333333));
775 clk_put(clk);
776
693 /* change parent of FSI A */ 777 /* change parent of FSI A */
694 fsia_clk = clk_get(NULL, "fsia_clk"); 778 clk = clk_get(NULL, "fsia_clk");
695 clk_register(&fsimcka_clk); 779 clk_register(&fsimcka_clk);
696 clk_set_parent(fsia_clk, &fsimcka_clk); 780 clk_set_parent(clk, &fsimcka_clk);
697 clk_set_rate(fsia_clk, 11000); 781 clk_set_rate(clk, 11000);
698 clk_set_rate(&fsimcka_clk, 11000); 782 clk_set_rate(&fsimcka_clk, 11000);
699 clk_put(fsia_clk); 783 clk_put(clk);
784
785 /* SDHI0 connected to cn7 */
786 gpio_request(GPIO_FN_SDHI0CD, NULL);
787 gpio_request(GPIO_FN_SDHI0WP, NULL);
788 gpio_request(GPIO_FN_SDHI0D3, NULL);
789 gpio_request(GPIO_FN_SDHI0D2, NULL);
790 gpio_request(GPIO_FN_SDHI0D1, NULL);
791 gpio_request(GPIO_FN_SDHI0D0, NULL);
792 gpio_request(GPIO_FN_SDHI0CMD, NULL);
793 gpio_request(GPIO_FN_SDHI0CLK, NULL);
794
795 /* SDHI1 connected to cn8 */
796 gpio_request(GPIO_FN_SDHI1CD, NULL);
797 gpio_request(GPIO_FN_SDHI1WP, NULL);
798 gpio_request(GPIO_FN_SDHI1D3, NULL);
799 gpio_request(GPIO_FN_SDHI1D2, NULL);
800 gpio_request(GPIO_FN_SDHI1D1, NULL);
801 gpio_request(GPIO_FN_SDHI1D0, NULL);
802 gpio_request(GPIO_FN_SDHI1CMD, NULL);
803 gpio_request(GPIO_FN_SDHI1CLK, NULL);
804
805 /* enable IrDA */
806 gpio_request(GPIO_FN_IRDA_OUT, NULL);
807 gpio_request(GPIO_FN_IRDA_IN, NULL);
700 808
701 /* 809 /*
702 * enable SH-Eth 810 * enable SH-Eth
diff --git a/arch/sh/boards/mach-se/7780/irq.c b/arch/sh/boards/mach-se/7780/irq.c
index 121744c08714..d5c9edc172a3 100644
--- a/arch/sh/boards/mach-se/7780/irq.c
+++ b/arch/sh/boards/mach-se/7780/irq.c
@@ -24,30 +24,30 @@
24void __init init_se7780_IRQ(void) 24void __init init_se7780_IRQ(void)
25{ 25{
26 /* enable all interrupt at FPGA */ 26 /* enable all interrupt at FPGA */
27 ctrl_outw(0, FPGA_INTMSK1); 27 __raw_writew(0, FPGA_INTMSK1);
28 /* mask SM501 interrupt */ 28 /* mask SM501 interrupt */
29 ctrl_outw((ctrl_inw(FPGA_INTMSK1) | 0x0002), FPGA_INTMSK1); 29 __raw_writew((__raw_readw(FPGA_INTMSK1) | 0x0002), FPGA_INTMSK1);
30 /* enable all interrupt at FPGA */ 30 /* enable all interrupt at FPGA */
31 ctrl_outw(0, FPGA_INTMSK2); 31 __raw_writew(0, FPGA_INTMSK2);
32 32
33 /* set FPGA INTSEL register */ 33 /* set FPGA INTSEL register */
34 /* FPGA + 0x06 */ 34 /* FPGA + 0x06 */
35 ctrl_outw( ((IRQPIN_SM501 << IRQPOS_SM501) | 35 __raw_writew( ((IRQPIN_SM501 << IRQPOS_SM501) |
36 (IRQPIN_SMC91CX << IRQPOS_SMC91CX)), FPGA_INTSEL1); 36 (IRQPIN_SMC91CX << IRQPOS_SMC91CX)), FPGA_INTSEL1);
37 37
38 /* FPGA + 0x08 */ 38 /* FPGA + 0x08 */
39 ctrl_outw(((IRQPIN_EXTINT4 << IRQPOS_EXTINT4) | 39 __raw_writew(((IRQPIN_EXTINT4 << IRQPOS_EXTINT4) |
40 (IRQPIN_EXTINT3 << IRQPOS_EXTINT3) | 40 (IRQPIN_EXTINT3 << IRQPOS_EXTINT3) |
41 (IRQPIN_EXTINT2 << IRQPOS_EXTINT2) | 41 (IRQPIN_EXTINT2 << IRQPOS_EXTINT2) |
42 (IRQPIN_EXTINT1 << IRQPOS_EXTINT1)), FPGA_INTSEL2); 42 (IRQPIN_EXTINT1 << IRQPOS_EXTINT1)), FPGA_INTSEL2);
43 43
44 /* FPGA + 0x0A */ 44 /* FPGA + 0x0A */
45 ctrl_outw((IRQPIN_PCCPW << IRQPOS_PCCPW), FPGA_INTSEL3); 45 __raw_writew((IRQPIN_PCCPW << IRQPOS_PCCPW), FPGA_INTSEL3);
46 46
47 plat_irq_setup_pins(IRQ_MODE_IRQ); /* install handlers for IRQ0-7 */ 47 plat_irq_setup_pins(IRQ_MODE_IRQ); /* install handlers for IRQ0-7 */
48 48
49 /* ICR1: detect low level(for 2ndcut) */ 49 /* ICR1: detect low level(for 2ndcut) */
50 ctrl_outl(0xAAAA0000, INTC_ICR1); 50 __raw_writel(0xAAAA0000, INTC_ICR1);
51 51
52 /* 52 /*
53 * FPGA PCISEL register initialize 53 * FPGA PCISEL register initialize
@@ -63,6 +63,6 @@ void __init init_se7780_IRQ(void)
63 * INTD || INTD | INTC | -- | INTA 63 * INTD || INTD | INTC | -- | INTA
64 * ------------------------------------- 64 * -------------------------------------
65 */ 65 */
66 ctrl_outw(0x0013, FPGA_PCI_INTSEL1); 66 __raw_writew(0x0013, FPGA_PCI_INTSEL1);
67 ctrl_outw(0xE402, FPGA_PCI_INTSEL2); 67 __raw_writew(0xE402, FPGA_PCI_INTSEL2);
68} 68}
diff --git a/arch/sh/boards/mach-se/7780/setup.c b/arch/sh/boards/mach-se/7780/setup.c
index 1d3a867e94e3..6f7c207138e1 100644
--- a/arch/sh/boards/mach-se/7780/setup.c
+++ b/arch/sh/boards/mach-se/7780/setup.c
@@ -17,26 +17,17 @@
17#include <asm/heartbeat.h> 17#include <asm/heartbeat.h>
18 18
19/* Heartbeat */ 19/* Heartbeat */
20static struct heartbeat_data heartbeat_data = { 20static struct resource heartbeat_resource = {
21 .regsize = 16, 21 .start = PA_LED,
22}; 22 .end = PA_LED,
23 23 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
24static struct resource heartbeat_resources[] = {
25 [0] = {
26 .start = PA_LED,
27 .end = PA_LED,
28 .flags = IORESOURCE_MEM,
29 },
30}; 24};
31 25
32static struct platform_device heartbeat_device = { 26static struct platform_device heartbeat_device = {
33 .name = "heartbeat", 27 .name = "heartbeat",
34 .id = -1, 28 .id = -1,
35 .dev = { 29 .num_resources = 1,
36 .platform_data = &heartbeat_data, 30 .resource = &heartbeat_resource,
37 },
38 .num_resources = ARRAY_SIZE(heartbeat_resources),
39 .resource = heartbeat_resources,
40}; 31};
41 32
42/* SMC91x */ 33/* SMC91x */
@@ -84,14 +75,14 @@ device_initcall(se7780_devices_setup);
84static void __init se7780_setup(char **cmdline_p) 75static void __init se7780_setup(char **cmdline_p)
85{ 76{
86 /* "SH-Linux" on LED Display */ 77 /* "SH-Linux" on LED Display */
87 ctrl_outw( 'S' , PA_LED_DISP + (DISP_SEL0_ADDR << 1) ); 78 __raw_writew( 'S' , PA_LED_DISP + (DISP_SEL0_ADDR << 1) );
88 ctrl_outw( 'H' , PA_LED_DISP + (DISP_SEL1_ADDR << 1) ); 79 __raw_writew( 'H' , PA_LED_DISP + (DISP_SEL1_ADDR << 1) );
89 ctrl_outw( '-' , PA_LED_DISP + (DISP_SEL2_ADDR << 1) ); 80 __raw_writew( '-' , PA_LED_DISP + (DISP_SEL2_ADDR << 1) );
90 ctrl_outw( 'L' , PA_LED_DISP + (DISP_SEL3_ADDR << 1) ); 81 __raw_writew( 'L' , PA_LED_DISP + (DISP_SEL3_ADDR << 1) );
91 ctrl_outw( 'i' , PA_LED_DISP + (DISP_SEL4_ADDR << 1) ); 82 __raw_writew( 'i' , PA_LED_DISP + (DISP_SEL4_ADDR << 1) );
92 ctrl_outw( 'n' , PA_LED_DISP + (DISP_SEL5_ADDR << 1) ); 83 __raw_writew( 'n' , PA_LED_DISP + (DISP_SEL5_ADDR << 1) );
93 ctrl_outw( 'u' , PA_LED_DISP + (DISP_SEL6_ADDR << 1) ); 84 __raw_writew( 'u' , PA_LED_DISP + (DISP_SEL6_ADDR << 1) );
94 ctrl_outw( 'x' , PA_LED_DISP + (DISP_SEL7_ADDR << 1) ); 85 __raw_writew( 'x' , PA_LED_DISP + (DISP_SEL7_ADDR << 1) );
95 86
96 printk(KERN_INFO "Hitachi UL Solutions Engine 7780SE03 support.\n"); 87 printk(KERN_INFO "Hitachi UL Solutions Engine 7780SE03 support.\n");
97 88
@@ -102,15 +93,15 @@ static void __init se7780_setup(char **cmdline_p)
102 * REQ2/GNT2 -> Serial ATA 93 * REQ2/GNT2 -> Serial ATA
103 * REQ3/GNT3 -> PCI slot 94 * REQ3/GNT3 -> PCI slot
104 */ 95 */
105 ctrl_outw(0x0213, FPGA_REQSEL); 96 __raw_writew(0x0213, FPGA_REQSEL);
106 97
107 /* GPIO setting */ 98 /* GPIO setting */
108 ctrl_outw(0x0000, GPIO_PECR); 99 __raw_writew(0x0000, GPIO_PECR);
109 ctrl_outw(ctrl_inw(GPIO_PHCR)&0xfff3, GPIO_PHCR); 100 __raw_writew(__raw_readw(GPIO_PHCR)&0xfff3, GPIO_PHCR);
110 ctrl_outw(0x0c00, GPIO_PMSELR); 101 __raw_writew(0x0c00, GPIO_PMSELR);
111 102
112 /* iVDR Power ON */ 103 /* iVDR Power ON */
113 ctrl_outw(0x0001, FPGA_IVDRPW); 104 __raw_writew(0x0001, FPGA_IVDRPW);
114} 105}
115 106
116/* 107/*
diff --git a/arch/sh/boards/mach-sh03/rtc.c b/arch/sh/boards/mach-sh03/rtc.c
index a8b9f844ab5b..1b200990500c 100644
--- a/arch/sh/boards/mach-sh03/rtc.c
+++ b/arch/sh/boards/mach-sh03/rtc.c
@@ -44,15 +44,15 @@ unsigned long get_cmos_time(void)
44 spin_lock(&sh03_rtc_lock); 44 spin_lock(&sh03_rtc_lock);
45 again: 45 again:
46 do { 46 do {
47 sec = (ctrl_inb(RTC_SEC1) & 0xf) + (ctrl_inb(RTC_SEC10) & 0x7) * 10; 47 sec = (__raw_readb(RTC_SEC1) & 0xf) + (__raw_readb(RTC_SEC10) & 0x7) * 10;
48 min = (ctrl_inb(RTC_MIN1) & 0xf) + (ctrl_inb(RTC_MIN10) & 0xf) * 10; 48 min = (__raw_readb(RTC_MIN1) & 0xf) + (__raw_readb(RTC_MIN10) & 0xf) * 10;
49 hour = (ctrl_inb(RTC_HOU1) & 0xf) + (ctrl_inb(RTC_HOU10) & 0xf) * 10; 49 hour = (__raw_readb(RTC_HOU1) & 0xf) + (__raw_readb(RTC_HOU10) & 0xf) * 10;
50 day = (ctrl_inb(RTC_DAY1) & 0xf) + (ctrl_inb(RTC_DAY10) & 0xf) * 10; 50 day = (__raw_readb(RTC_DAY1) & 0xf) + (__raw_readb(RTC_DAY10) & 0xf) * 10;
51 mon = (ctrl_inb(RTC_MON1) & 0xf) + (ctrl_inb(RTC_MON10) & 0xf) * 10; 51 mon = (__raw_readb(RTC_MON1) & 0xf) + (__raw_readb(RTC_MON10) & 0xf) * 10;
52 year = (ctrl_inb(RTC_YEA1) & 0xf) + (ctrl_inb(RTC_YEA10) & 0xf) * 10 52 year = (__raw_readb(RTC_YEA1) & 0xf) + (__raw_readb(RTC_YEA10) & 0xf) * 10
53 + (ctrl_inb(RTC_YEA100 ) & 0xf) * 100 53 + (__raw_readb(RTC_YEA100 ) & 0xf) * 100
54 + (ctrl_inb(RTC_YEA1000) & 0xf) * 1000; 54 + (__raw_readb(RTC_YEA1000) & 0xf) * 1000;
55 } while (sec != (ctrl_inb(RTC_SEC1) & 0xf) + (ctrl_inb(RTC_SEC10) & 0x7) * 10); 55 } while (sec != (__raw_readb(RTC_SEC1) & 0xf) + (__raw_readb(RTC_SEC10) & 0x7) * 10);
56 if (year == 0 || mon < 1 || mon > 12 || day > 31 || day < 1 || 56 if (year == 0 || mon < 1 || mon > 12 || day > 31 || day < 1 ||
57 hour > 23 || min > 59 || sec > 59) { 57 hour > 23 || min > 59 || sec > 59) {
58 printk(KERN_ERR 58 printk(KERN_ERR
@@ -60,16 +60,16 @@ unsigned long get_cmos_time(void)
60 printk("year=%d, mon=%d, day=%d, hour=%d, min=%d, sec=%d\n", 60 printk("year=%d, mon=%d, day=%d, hour=%d, min=%d, sec=%d\n",
61 year, mon, day, hour, min, sec); 61 year, mon, day, hour, min, sec);
62 62
63 ctrl_outb(0, RTC_SEC1); ctrl_outb(0, RTC_SEC10); 63 __raw_writeb(0, RTC_SEC1); __raw_writeb(0, RTC_SEC10);
64 ctrl_outb(0, RTC_MIN1); ctrl_outb(0, RTC_MIN10); 64 __raw_writeb(0, RTC_MIN1); __raw_writeb(0, RTC_MIN10);
65 ctrl_outb(0, RTC_HOU1); ctrl_outb(0, RTC_HOU10); 65 __raw_writeb(0, RTC_HOU1); __raw_writeb(0, RTC_HOU10);
66 ctrl_outb(6, RTC_WEE1); 66 __raw_writeb(6, RTC_WEE1);
67 ctrl_outb(1, RTC_DAY1); ctrl_outb(0, RTC_DAY10); 67 __raw_writeb(1, RTC_DAY1); __raw_writeb(0, RTC_DAY10);
68 ctrl_outb(1, RTC_MON1); ctrl_outb(0, RTC_MON10); 68 __raw_writeb(1, RTC_MON1); __raw_writeb(0, RTC_MON10);
69 ctrl_outb(0, RTC_YEA1); ctrl_outb(0, RTC_YEA10); 69 __raw_writeb(0, RTC_YEA1); __raw_writeb(0, RTC_YEA10);
70 ctrl_outb(0, RTC_YEA100); 70 __raw_writeb(0, RTC_YEA100);
71 ctrl_outb(2, RTC_YEA1000); 71 __raw_writeb(2, RTC_YEA1000);
72 ctrl_outb(0, RTC_CTL); 72 __raw_writeb(0, RTC_CTL);
73 goto again; 73 goto again;
74 } 74 }
75 75
@@ -93,9 +93,9 @@ static int set_rtc_mmss(unsigned long nowtime)
93 /* gets recalled with irq locally disabled */ 93 /* gets recalled with irq locally disabled */
94 spin_lock(&sh03_rtc_lock); 94 spin_lock(&sh03_rtc_lock);
95 for (i = 0 ; i < 1000000 ; i++) /* may take up to 1 second... */ 95 for (i = 0 ; i < 1000000 ; i++) /* may take up to 1 second... */
96 if (!(ctrl_inb(RTC_CTL) & RTC_BUSY)) 96 if (!(__raw_readb(RTC_CTL) & RTC_BUSY))
97 break; 97 break;
98 cmos_minutes = (ctrl_inb(RTC_MIN1) & 0xf) + (ctrl_inb(RTC_MIN10) & 0xf) * 10; 98 cmos_minutes = (__raw_readb(RTC_MIN1) & 0xf) + (__raw_readb(RTC_MIN10) & 0xf) * 10;
99 real_seconds = nowtime % 60; 99 real_seconds = nowtime % 60;
100 real_minutes = nowtime / 60; 100 real_minutes = nowtime / 60;
101 if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1) 101 if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1)
@@ -103,10 +103,10 @@ static int set_rtc_mmss(unsigned long nowtime)
103 real_minutes %= 60; 103 real_minutes %= 60;
104 104
105 if (abs(real_minutes - cmos_minutes) < 30) { 105 if (abs(real_minutes - cmos_minutes) < 30) {
106 ctrl_outb(real_seconds % 10, RTC_SEC1); 106 __raw_writeb(real_seconds % 10, RTC_SEC1);
107 ctrl_outb(real_seconds / 10, RTC_SEC10); 107 __raw_writeb(real_seconds / 10, RTC_SEC10);
108 ctrl_outb(real_minutes % 10, RTC_MIN1); 108 __raw_writeb(real_minutes % 10, RTC_MIN1);
109 ctrl_outb(real_minutes / 10, RTC_MIN10); 109 __raw_writeb(real_minutes / 10, RTC_MIN10);
110 } else { 110 } else {
111 printk(KERN_WARNING 111 printk(KERN_WARNING
112 "set_rtc_mmss: can't update from %d to %d\n", 112 "set_rtc_mmss: can't update from %d to %d\n",
diff --git a/arch/sh/boards/mach-sh03/setup.c b/arch/sh/boards/mach-sh03/setup.c
index 74cfb4b8b03d..af4a0c012a96 100644
--- a/arch/sh/boards/mach-sh03/setup.c
+++ b/arch/sh/boards/mach-sh03/setup.c
@@ -82,7 +82,7 @@ static int __init sh03_devices_setup(void)
82 /* open I/O area window */ 82 /* open I/O area window */
83 paddrbase = virt_to_phys((void *)PA_AREA5_IO); 83 paddrbase = virt_to_phys((void *)PA_AREA5_IO);
84 prot = PAGE_KERNEL_PCC(1, _PAGE_PCC_IO16); 84 prot = PAGE_KERNEL_PCC(1, _PAGE_PCC_IO16);
85 cf_ide_base = p3_ioremap(paddrbase, PAGE_SIZE, prot.pgprot); 85 cf_ide_base = ioremap_prot(paddrbase, PAGE_SIZE, pgprot_val(prot));
86 if (!cf_ide_base) { 86 if (!cf_ide_base) {
87 printk("allocate_cf_area : can't open CF I/O window!\n"); 87 printk("allocate_cf_area : can't open CF I/O window!\n");
88 return -ENOMEM; 88 return -ENOMEM;
diff --git a/arch/sh/boards/mach-sh7763rdp/irq.c b/arch/sh/boards/mach-sh7763rdp/irq.c
index d8ebfa7d8c76..add698c8f2b4 100644
--- a/arch/sh/boards/mach-sh7763rdp/irq.c
+++ b/arch/sh/boards/mach-sh7763rdp/irq.c
@@ -28,18 +28,18 @@
28void __init init_sh7763rdp_IRQ(void) 28void __init init_sh7763rdp_IRQ(void)
29{ 29{
30 /* GPIO enabled */ 30 /* GPIO enabled */
31 ctrl_outl(1 << 25, INTC_INT2MSKCR); 31 __raw_writel(1 << 25, INTC_INT2MSKCR);
32 32
33 /* enable GPIO interrupts */ 33 /* enable GPIO interrupts */
34 ctrl_outl((ctrl_inl(INTC_INT2PRI7) & 0xFF00FFFF) | 0x000F0000, 34 __raw_writel((__raw_readl(INTC_INT2PRI7) & 0xFF00FFFF) | 0x000F0000,
35 INTC_INT2PRI7); 35 INTC_INT2PRI7);
36 36
37 /* USBH enabled */ 37 /* USBH enabled */
38 ctrl_outl(1 << 17, INTC_INT2MSKCR1); 38 __raw_writel(1 << 17, INTC_INT2MSKCR1);
39 39
40 /* GETHER enabled */ 40 /* GETHER enabled */
41 ctrl_outl(1 << 16, INTC_INT2MSKCR1); 41 __raw_writel(1 << 16, INTC_INT2MSKCR1);
42 42
43 /* DMAC enabled */ 43 /* DMAC enabled */
44 ctrl_outl(1 << 8, INTC_INT2MSKCR); 44 __raw_writel(1 << 8, INTC_INT2MSKCR);
45} 45}
diff --git a/arch/sh/boards/mach-sh7763rdp/setup.c b/arch/sh/boards/mach-sh7763rdp/setup.c
index 390534a0b35c..f64a6918224c 100644
--- a/arch/sh/boards/mach-sh7763rdp/setup.c
+++ b/arch/sh/boards/mach-sh7763rdp/setup.c
@@ -158,50 +158,50 @@ device_initcall(sh7763rdp_devices_setup);
158static void __init sh7763rdp_setup(char **cmdline_p) 158static void __init sh7763rdp_setup(char **cmdline_p)
159{ 159{
160 /* Board version check */ 160 /* Board version check */
161 if (ctrl_inw(CPLD_BOARD_ID_ERV_REG) == 0xECB1) 161 if (__raw_readw(CPLD_BOARD_ID_ERV_REG) == 0xECB1)
162 printk(KERN_INFO "RTE Standard Configuration\n"); 162 printk(KERN_INFO "RTE Standard Configuration\n");
163 else 163 else
164 printk(KERN_INFO "RTA Standard Configuration\n"); 164 printk(KERN_INFO "RTA Standard Configuration\n");
165 165
166 /* USB pin select bits (clear bit 5-2 to 0) */ 166 /* USB pin select bits (clear bit 5-2 to 0) */
167 ctrl_outw((ctrl_inw(PORT_PSEL2) & 0xFFC3), PORT_PSEL2); 167 __raw_writew((__raw_readw(PORT_PSEL2) & 0xFFC3), PORT_PSEL2);
168 /* USBH setup port I controls to other (clear bits 4-9 to 0) */ 168 /* USBH setup port I controls to other (clear bits 4-9 to 0) */
169 ctrl_outw(ctrl_inw(PORT_PICR) & 0xFC0F, PORT_PICR); 169 __raw_writew(__raw_readw(PORT_PICR) & 0xFC0F, PORT_PICR);
170 170
171 /* Select USB Host controller */ 171 /* Select USB Host controller */
172 ctrl_outw(0x00, USB_USBHSC); 172 __raw_writew(0x00, USB_USBHSC);
173 173
174 /* For LCD */ 174 /* For LCD */
175 /* set PTJ7-1, bits 15-2 of PJCR to 0 */ 175 /* set PTJ7-1, bits 15-2 of PJCR to 0 */
176 ctrl_outw(ctrl_inw(PORT_PJCR) & 0x0003, PORT_PJCR); 176 __raw_writew(__raw_readw(PORT_PJCR) & 0x0003, PORT_PJCR);
177 /* set PTI5, bits 11-10 of PICR to 0 */ 177 /* set PTI5, bits 11-10 of PICR to 0 */
178 ctrl_outw(ctrl_inw(PORT_PICR) & 0xF3FF, PORT_PICR); 178 __raw_writew(__raw_readw(PORT_PICR) & 0xF3FF, PORT_PICR);
179 ctrl_outw(0, PORT_PKCR); 179 __raw_writew(0, PORT_PKCR);
180 ctrl_outw(0, PORT_PLCR); 180 __raw_writew(0, PORT_PLCR);
181 /* set PSEL2 bits 14-8, 5-4, of PSEL2 to 0 */ 181 /* set PSEL2 bits 14-8, 5-4, of PSEL2 to 0 */
182 ctrl_outw((ctrl_inw(PORT_PSEL2) & 0x00C0), PORT_PSEL2); 182 __raw_writew((__raw_readw(PORT_PSEL2) & 0x00C0), PORT_PSEL2);
183 /* set PSEL3 bits 14-12, 6-4, 2-0 of PSEL3 to 0 */ 183 /* set PSEL3 bits 14-12, 6-4, 2-0 of PSEL3 to 0 */
184 ctrl_outw((ctrl_inw(PORT_PSEL3) & 0x0700), PORT_PSEL3); 184 __raw_writew((__raw_readw(PORT_PSEL3) & 0x0700), PORT_PSEL3);
185 185
186 /* For HAC */ 186 /* For HAC */
187 /* bit3-0 0100:HAC & SSI1 enable */ 187 /* bit3-0 0100:HAC & SSI1 enable */
188 ctrl_outw((ctrl_inw(PORT_PSEL1) & 0xFFF0) | 0x0004, PORT_PSEL1); 188 __raw_writew((__raw_readw(PORT_PSEL1) & 0xFFF0) | 0x0004, PORT_PSEL1);
189 /* bit14 1:SSI_HAC_CLK enable */ 189 /* bit14 1:SSI_HAC_CLK enable */
190 ctrl_outw(ctrl_inw(PORT_PSEL4) | 0x4000, PORT_PSEL4); 190 __raw_writew(__raw_readw(PORT_PSEL4) | 0x4000, PORT_PSEL4);
191 191
192 /* SH-Ether */ 192 /* SH-Ether */
193 ctrl_outw((ctrl_inw(PORT_PSEL1) & ~0xff00) | 0x2400, PORT_PSEL1); 193 __raw_writew((__raw_readw(PORT_PSEL1) & ~0xff00) | 0x2400, PORT_PSEL1);
194 ctrl_outw(0x0, PORT_PFCR); 194 __raw_writew(0x0, PORT_PFCR);
195 ctrl_outw(0x0, PORT_PFCR); 195 __raw_writew(0x0, PORT_PFCR);
196 ctrl_outw(0x0, PORT_PFCR); 196 __raw_writew(0x0, PORT_PFCR);
197 197
198 /* MMC */ 198 /* MMC */
199 /*selects SCIF and MMC other functions */ 199 /*selects SCIF and MMC other functions */
200 ctrl_outw(0x0001, PORT_PSEL0); 200 __raw_writew(0x0001, PORT_PSEL0);
201 /* MMC clock operates */ 201 /* MMC clock operates */
202 ctrl_outl(ctrl_inl(MSTPCR1) & ~0x8, MSTPCR1); 202 __raw_writel(__raw_readl(MSTPCR1) & ~0x8, MSTPCR1);
203 ctrl_outw(ctrl_inw(PORT_PACR) & ~0x3000, PORT_PACR); 203 __raw_writew(__raw_readw(PORT_PACR) & ~0x3000, PORT_PACR);
204 ctrl_outw(ctrl_inw(PORT_PCCR) & ~0xCFC3, PORT_PCCR); 204 __raw_writew(__raw_readw(PORT_PCCR) & ~0xCFC3, PORT_PCCR);
205} 205}
206 206
207static struct sh_machine_vector mv_sh7763rdp __initmv = { 207static struct sh_machine_vector mv_sh7763rdp __initmv = {
diff --git a/arch/sh/boards/mach-snapgear/setup.c b/arch/sh/boards/mach-snapgear/setup.c
index a3277a23cf14..331745dee379 100644
--- a/arch/sh/boards/mach-snapgear/setup.c
+++ b/arch/sh/boards/mach-snapgear/setup.c
@@ -30,7 +30,7 @@
30 30
31static irqreturn_t eraseconfig_interrupt(int irq, void *dev_id) 31static irqreturn_t eraseconfig_interrupt(int irq, void *dev_id)
32{ 32{
33 (void)ctrl_inb(0xb8000000); /* dummy read */ 33 (void)__raw_readb(0xb8000000); /* dummy read */
34 34
35 printk("SnapGear: erase switch interrupt!\n"); 35 printk("SnapGear: erase switch interrupt!\n");
36 36
diff --git a/arch/sh/boards/mach-systemh/irq.c b/arch/sh/boards/mach-systemh/irq.c
index 986a0e71d220..523aea5dc94e 100644
--- a/arch/sh/boards/mach-systemh/irq.c
+++ b/arch/sh/boards/mach-systemh/irq.c
@@ -41,13 +41,13 @@ static void disable_systemh_irq(unsigned int irq)
41 unsigned long val, mask = 0x01 << 1; 41 unsigned long val, mask = 0x01 << 1;
42 42
43 /* Clear the "irq"th bit in the mask and set it in the request */ 43 /* Clear the "irq"th bit in the mask and set it in the request */
44 val = ctrl_inl((unsigned long)systemh_irq_mask_register); 44 val = __raw_readl((unsigned long)systemh_irq_mask_register);
45 val &= ~mask; 45 val &= ~mask;
46 ctrl_outl(val, (unsigned long)systemh_irq_mask_register); 46 __raw_writel(val, (unsigned long)systemh_irq_mask_register);
47 47
48 val = ctrl_inl((unsigned long)systemh_irq_request_register); 48 val = __raw_readl((unsigned long)systemh_irq_request_register);
49 val |= mask; 49 val |= mask;
50 ctrl_outl(val, (unsigned long)systemh_irq_request_register); 50 __raw_writel(val, (unsigned long)systemh_irq_request_register);
51 } 51 }
52} 52}
53 53
@@ -57,9 +57,9 @@ static void enable_systemh_irq(unsigned int irq)
57 unsigned long val, mask = 0x01 << 1; 57 unsigned long val, mask = 0x01 << 1;
58 58
59 /* Set "irq"th bit in the mask register */ 59 /* Set "irq"th bit in the mask register */
60 val = ctrl_inl((unsigned long)systemh_irq_mask_register); 60 val = __raw_readl((unsigned long)systemh_irq_mask_register);
61 val |= mask; 61 val |= mask;
62 ctrl_outl(val, (unsigned long)systemh_irq_mask_register); 62 __raw_writel(val, (unsigned long)systemh_irq_mask_register);
63 } 63 }
64} 64}
65 65
diff --git a/arch/sh/boards/mach-titan/Makefile b/arch/sh/boards/mach-titan/Makefile
deleted file mode 100644
index 08d753700062..000000000000
--- a/arch/sh/boards/mach-titan/Makefile
+++ /dev/null
@@ -1,5 +0,0 @@
1#
2# Makefile for the Nimble Microsystems TITAN specific parts of the kernel
3#
4
5obj-y := setup.o io.o
diff --git a/arch/sh/boards/mach-titan/io.c b/arch/sh/boards/mach-titan/io.c
deleted file mode 100644
index 0130e9826aca..000000000000
--- a/arch/sh/boards/mach-titan/io.c
+++ /dev/null
@@ -1,108 +0,0 @@
1/*
2 * I/O routines for Titan
3 */
4#include <linux/pci.h>
5#include <asm/machvec.h>
6#include <asm/addrspace.h>
7#include <mach/titan.h>
8#include <asm/io.h>
9
10static inline unsigned int port2adr(unsigned int port)
11{
12 maybebadio((unsigned long)port);
13 return port;
14}
15
16u8 titan_inb(unsigned long port)
17{
18 if (PXSEG(port))
19 return ctrl_inb(port);
20 return ctrl_inw(port2adr(port)) & 0xff;
21}
22
23u8 titan_inb_p(unsigned long port)
24{
25 u8 v;
26
27 if (PXSEG(port))
28 v = ctrl_inb(port);
29 else
30 v = ctrl_inw(port2adr(port)) & 0xff;
31 ctrl_delay();
32 return v;
33}
34
35u16 titan_inw(unsigned long port)
36{
37 if (PXSEG(port))
38 return ctrl_inw(port);
39 else if (port >= 0x2000)
40 return ctrl_inw(port2adr(port));
41 else
42 maybebadio(port);
43 return 0;
44}
45
46u32 titan_inl(unsigned long port)
47{
48 if (PXSEG(port))
49 return ctrl_inl(port);
50 else if (port >= 0x2000)
51 return ctrl_inw(port2adr(port));
52 else
53 maybebadio(port);
54 return 0;
55}
56
57void titan_outb(u8 value, unsigned long port)
58{
59 if (PXSEG(port))
60 ctrl_outb(value, port);
61 else
62 ctrl_outw(value, port2adr(port));
63}
64
65void titan_outb_p(u8 value, unsigned long port)
66{
67 if (PXSEG(port))
68 ctrl_outb(value, port);
69 else
70 ctrl_outw(value, port2adr(port));
71 ctrl_delay();
72}
73
74void titan_outw(u16 value, unsigned long port)
75{
76 if (PXSEG(port))
77 ctrl_outw(value, port);
78 else if (port >= 0x2000)
79 ctrl_outw(value, port2adr(port));
80 else
81 maybebadio(port);
82}
83
84void titan_outl(u32 value, unsigned long port)
85{
86 if (PXSEG(port))
87 ctrl_outl(value, port);
88 else
89 maybebadio(port);
90}
91
92void titan_insl(unsigned long port, void *dst, unsigned long count)
93{
94 maybebadio(port);
95}
96
97void titan_outsl(unsigned long port, const void *src, unsigned long count)
98{
99 maybebadio(port);
100}
101
102void __iomem *titan_ioport_map(unsigned long port, unsigned int size)
103{
104 if (PXSEG(port))
105 return (void __iomem *)port;
106
107 return (void __iomem *)port2adr(port);
108}
diff --git a/arch/sh/boards/mach-x3proto/ilsel.c b/arch/sh/boards/mach-x3proto/ilsel.c
index b5c673c39337..5c9842704c60 100644
--- a/arch/sh/boards/mach-x3proto/ilsel.c
+++ b/arch/sh/boards/mach-x3proto/ilsel.c
@@ -70,10 +70,10 @@ static void __ilsel_enable(ilsel_source_t set, unsigned int bit)
70 pr_debug("%s: bit#%d: addr - 0x%08lx (shift %d, set %d)\n", 70 pr_debug("%s: bit#%d: addr - 0x%08lx (shift %d, set %d)\n",
71 __func__, bit, addr, shift, set); 71 __func__, bit, addr, shift, set);
72 72
73 tmp = ctrl_inw(addr); 73 tmp = __raw_readw(addr);
74 tmp &= ~(0xf << shift); 74 tmp &= ~(0xf << shift);
75 tmp |= set << shift; 75 tmp |= set << shift;
76 ctrl_outw(tmp, addr); 76 __raw_writew(tmp, addr);
77} 77}
78 78
79/** 79/**
@@ -142,9 +142,9 @@ void ilsel_disable(unsigned int irq)
142 142
143 addr = mk_ilsel_addr(irq); 143 addr = mk_ilsel_addr(irq);
144 144
145 tmp = ctrl_inw(addr); 145 tmp = __raw_readw(addr);
146 tmp &= ~(0xf << mk_ilsel_shift(irq)); 146 tmp &= ~(0xf << mk_ilsel_shift(irq));
147 ctrl_outw(tmp, addr); 147 __raw_writew(tmp, addr);
148 148
149 clear_bit(irq, &ilsel_level_map); 149 clear_bit(irq, &ilsel_level_map);
150} 150}
diff --git a/arch/sh/boards/mach-x3proto/setup.c b/arch/sh/boards/mach-x3proto/setup.c
index efe4cb9f8a77..e284592fd42a 100644
--- a/arch/sh/boards/mach-x3proto/setup.c
+++ b/arch/sh/boards/mach-x3proto/setup.c
@@ -149,7 +149,7 @@ static void __init x3proto_init_irq(void)
149 plat_irq_setup_pins(IRQ_MODE_IRL3210); 149 plat_irq_setup_pins(IRQ_MODE_IRL3210);
150 150
151 /* Set ICR0.LVLMODE */ 151 /* Set ICR0.LVLMODE */
152 ctrl_outl(ctrl_inl(0xfe410000) | (1 << 21), 0xfe410000); 152 __raw_writel(__raw_readl(0xfe410000) | (1 << 21), 0xfe410000);
153} 153}
154 154
155static struct sh_machine_vector mv_x3proto __initmv = { 155static struct sh_machine_vector mv_x3proto __initmv = {
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-29 18:25:02 -0500