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-rw-r--r--arch/sh/Kconfig76
-rw-r--r--arch/sh/Kconfig.cpu3
-rw-r--r--arch/sh/Kconfig.debug44
-rw-r--r--arch/sh/Makefile24
-rw-r--r--arch/sh/boards/Kconfig8
-rw-r--r--arch/sh/boards/Makefile2
-rw-r--r--arch/sh/boards/board-magicpanelr2.c74
-rw-r--r--arch/sh/boards/board-polaris.c37
-rw-r--r--arch/sh/boards/board-sh7785lcr.c32
-rw-r--r--arch/sh/boards/board-shmin.c4
-rw-r--r--arch/sh/boards/board-titan.c (renamed from arch/sh/boards/mach-titan/setup.c)24
-rw-r--r--arch/sh/boards/board-urquell.c46
-rw-r--r--arch/sh/boards/mach-ap325rxa/Makefile2
-rw-r--r--arch/sh/boards/mach-ap325rxa/sdram.S69
-rw-r--r--arch/sh/boards/mach-ap325rxa/setup.c (renamed from arch/sh/boards/board-ap325rxa.c)161
-rw-r--r--arch/sh/boards/mach-cayman/irq.c16
-rw-r--r--arch/sh/boards/mach-dreamcast/irq.c27
-rw-r--r--arch/sh/boards/mach-dreamcast/rtc.c20
-rw-r--r--arch/sh/boards/mach-dreamcast/setup.c18
-rw-r--r--arch/sh/boards/mach-ecovec24/Makefile2
-rw-r--r--arch/sh/boards/mach-ecovec24/sdram.S111
-rw-r--r--arch/sh/boards/mach-ecovec24/setup.c600
-rw-r--r--arch/sh/boards/mach-highlander/irq-r7780mp.c2
-rw-r--r--arch/sh/boards/mach-highlander/irq-r7780rp.c2
-rw-r--r--arch/sh/boards/mach-highlander/irq-r7785rp.c16
-rw-r--r--arch/sh/boards/mach-highlander/psw.c4
-rw-r--r--arch/sh/boards/mach-highlander/setup.c16
-rw-r--r--arch/sh/boards/mach-hp6xx/hp6xx_apm.c2
-rw-r--r--arch/sh/boards/mach-hp6xx/pm.c38
-rw-r--r--arch/sh/boards/mach-hp6xx/setup.c67
-rw-r--r--arch/sh/boards/mach-kfr2r09/Makefile2
-rw-r--r--arch/sh/boards/mach-kfr2r09/lcd_wqvga.c6
-rw-r--r--arch/sh/boards/mach-kfr2r09/sdram.S80
-rw-r--r--arch/sh/boards/mach-kfr2r09/setup.c260
-rw-r--r--arch/sh/boards/mach-landisk/gio.c12
-rw-r--r--arch/sh/boards/mach-landisk/irq.c6
-rw-r--r--arch/sh/boards/mach-landisk/psw.c4
-rw-r--r--arch/sh/boards/mach-landisk/setup.c6
-rw-r--r--arch/sh/boards/mach-lboxre2/setup.c4
-rw-r--r--arch/sh/boards/mach-microdev/io.c4
-rw-r--r--arch/sh/boards/mach-microdev/irq.c10
-rw-r--r--arch/sh/boards/mach-migor/Makefile2
-rw-r--r--arch/sh/boards/mach-migor/sdram.S69
-rw-r--r--arch/sh/boards/mach-migor/setup.c135
-rw-r--r--arch/sh/boards/mach-r2d/irq.c6
-rw-r--r--arch/sh/boards/mach-r2d/setup.c8
-rw-r--r--arch/sh/boards/mach-rsk/devices-rsk7203.c2
-rw-r--r--arch/sh/boards/mach-sdk7780/irq.c4
-rw-r--r--arch/sh/boards/mach-sdk7780/setup.c29
-rw-r--r--arch/sh/boards/mach-sdk7786/Makefile1
-rw-r--r--arch/sh/boards/mach-sdk7786/fpga.c72
-rw-r--r--arch/sh/boards/mach-sdk7786/irq.c48
-rw-r--r--arch/sh/boards/mach-sdk7786/setup.c189
-rw-r--r--arch/sh/boards/mach-se/7206/io.c2
-rw-r--r--arch/sh/boards/mach-se/7206/irq.c43
-rw-r--r--arch/sh/boards/mach-se/7206/setup.c15
-rw-r--r--arch/sh/boards/mach-se/7343/irq.c45
-rw-r--r--arch/sh/boards/mach-se/7343/setup.c43
-rw-r--r--arch/sh/boards/mach-se/770x/irq.c14
-rw-r--r--arch/sh/boards/mach-se/770x/setup.c15
-rw-r--r--arch/sh/boards/mach-se/7721/irq.c2
-rw-r--r--arch/sh/boards/mach-se/7721/setup.c23
-rw-r--r--arch/sh/boards/mach-se/7722/irq.c45
-rw-r--r--arch/sh/boards/mach-se/7722/setup.c72
-rw-r--r--arch/sh/boards/mach-se/7724/Makefile2
-rw-r--r--arch/sh/boards/mach-se/7724/irq.c62
-rw-r--r--arch/sh/boards/mach-se/7724/sdram.S131
-rw-r--r--arch/sh/boards/mach-se/7724/setup.c234
-rw-r--r--arch/sh/boards/mach-se/7780/irq.c18
-rw-r--r--arch/sh/boards/mach-se/7780/setup.c47
-rw-r--r--arch/sh/boards/mach-sh03/rtc.c50
-rw-r--r--arch/sh/boards/mach-sh03/setup.c2
-rw-r--r--arch/sh/boards/mach-sh7763rdp/irq.c10
-rw-r--r--arch/sh/boards/mach-sh7763rdp/setup.c40
-rw-r--r--arch/sh/boards/mach-snapgear/setup.c2
-rw-r--r--arch/sh/boards/mach-systemh/irq.c12
-rw-r--r--arch/sh/boards/mach-titan/Makefile5
-rw-r--r--arch/sh/boards/mach-titan/io.c108
-rw-r--r--arch/sh/boards/mach-x3proto/ilsel.c8
-rw-r--r--arch/sh/boards/mach-x3proto/setup.c2
-rw-r--r--arch/sh/boot/Makefile30
-rw-r--r--arch/sh/boot/compressed/Makefile7
-rw-r--r--arch/sh/boot/compressed/cache.c2
-rw-r--r--arch/sh/boot/compressed/misc.c25
-rw-r--r--arch/sh/boot/romimage/Makefile12
-rw-r--r--arch/sh/boot/romimage/head.S38
-rw-r--r--arch/sh/cchips/hd6446x/hd64461.c36
-rw-r--r--arch/sh/configs/ap325rxa_defconfig87
-rw-r--r--arch/sh/configs/cayman_defconfig168
-rw-r--r--arch/sh/configs/dreamcast_defconfig78
-rw-r--r--arch/sh/configs/ecovec24-romimage_defconfig78
-rw-r--r--arch/sh/configs/ecovec24_defconfig313
-rw-r--r--arch/sh/configs/edosk7705_defconfig49
-rw-r--r--arch/sh/configs/edosk7760_defconfig70
-rw-r--r--arch/sh/configs/espt_defconfig77
-rw-r--r--arch/sh/configs/hp6xx_defconfig70
-rw-r--r--arch/sh/configs/kfr2r09-romimage_defconfig58
-rw-r--r--arch/sh/configs/kfr2r09_defconfig71
-rw-r--r--arch/sh/configs/landisk_defconfig85
-rw-r--r--arch/sh/configs/lboxre2_defconfig89
-rw-r--r--arch/sh/configs/magicpanelr2_defconfig69
-rw-r--r--arch/sh/configs/microdev_defconfig71
-rw-r--r--arch/sh/configs/migor_defconfig92
-rw-r--r--arch/sh/configs/polaris_defconfig77
-rw-r--r--arch/sh/configs/r7780mp_defconfig99
-rw-r--r--arch/sh/configs/r7785rp_defconfig98
-rw-r--r--arch/sh/configs/rsk7201_defconfig59
-rw-r--r--arch/sh/configs/rsk7203_defconfig71
-rw-r--r--arch/sh/configs/rts7751r2d1_defconfig99
-rw-r--r--arch/sh/configs/rts7751r2dplus_defconfig99
-rw-r--r--arch/sh/configs/sdk7780_defconfig88
-rw-r--r--arch/sh/configs/sdk7786_defconfig1754
-rw-r--r--arch/sh/configs/se7206_defconfig66
-rw-r--r--arch/sh/configs/se7343_defconfig72
-rw-r--r--arch/sh/configs/se7619_defconfig58
-rw-r--r--arch/sh/configs/se7705_defconfig71
-rw-r--r--arch/sh/configs/se7712_defconfig61
-rw-r--r--arch/sh/configs/se7721_defconfig62
-rw-r--r--arch/sh/configs/se7722_defconfig69
-rw-r--r--arch/sh/configs/se7724_defconfig100
-rw-r--r--arch/sh/configs/se7750_defconfig70
-rw-r--r--arch/sh/configs/se7751_defconfig70
-rw-r--r--arch/sh/configs/se7780_defconfig79
-rw-r--r--arch/sh/configs/sh03_defconfig80
-rw-r--r--arch/sh/configs/sh7710voipgw_defconfig66
-rw-r--r--arch/sh/configs/sh7724_generic_defconfig80
-rw-r--r--arch/sh/configs/sh7763rdp_defconfig74
-rw-r--r--arch/sh/configs/sh7770_generic_defconfig79
-rw-r--r--arch/sh/configs/sh7785lcr_32bit_defconfig83
-rw-r--r--arch/sh/configs/sh7785lcr_defconfig83
-rw-r--r--arch/sh/configs/shmin_defconfig64
-rw-r--r--arch/sh/configs/shx3_defconfig93
-rw-r--r--arch/sh/configs/snapgear_defconfig79
-rw-r--r--arch/sh/configs/systemh_defconfig64
-rw-r--r--arch/sh/configs/titan_defconfig87
-rw-r--r--arch/sh/configs/ul2_defconfig86
-rw-r--r--arch/sh/configs/urquell_defconfig99
-rw-r--r--arch/sh/drivers/dma/dma-api.c1
-rw-r--r--arch/sh/drivers/dma/dma-pvr2.c10
-rw-r--r--arch/sh/drivers/dma/dma-sh.c31
-rw-r--r--arch/sh/drivers/dma/dma-sysfs.c2
-rw-r--r--arch/sh/drivers/dma/dmabrg.c23
-rw-r--r--arch/sh/drivers/heartbeat.c23
-rw-r--r--arch/sh/drivers/pci/Kconfig19
-rw-r--r--arch/sh/drivers/pci/Makefile5
-rw-r--r--arch/sh/drivers/pci/common.c162
-rw-r--r--arch/sh/drivers/pci/fixups-dreamcast.c2
-rw-r--r--arch/sh/drivers/pci/fixups-r7780rp.c12
-rw-r--r--arch/sh/drivers/pci/fixups-rts7751r2d.c6
-rw-r--r--arch/sh/drivers/pci/fixups-sdk7780.c19
-rw-r--r--arch/sh/drivers/pci/fixups-se7751.c6
-rw-r--r--arch/sh/drivers/pci/ops-sh4.c30
-rw-r--r--arch/sh/drivers/pci/pci-dreamcast.c32
-rw-r--r--arch/sh/drivers/pci/pci-sh4.h18
-rw-r--r--arch/sh/drivers/pci/pci-sh5.c19
-rw-r--r--arch/sh/drivers/pci/pci-sh5.h12
-rw-r--r--arch/sh/drivers/pci/pci-sh7751.c53
-rw-r--r--arch/sh/drivers/pci/pci-sh7780.c408
-rw-r--r--arch/sh/drivers/pci/pci-sh7780.h64
-rw-r--r--arch/sh/drivers/pci/pci.c173
-rw-r--r--arch/sh/drivers/pci/pcie-sh7786.c206
-rw-r--r--arch/sh/drivers/pci/pcie-sh7786.h74
-rw-r--r--arch/sh/drivers/push-switch.c1
-rw-r--r--arch/sh/drivers/superhyway/ops-sh4-202.c8
-rw-r--r--arch/sh/include/asm/.gitignore1
-rw-r--r--arch/sh/include/asm/Kbuild4
-rw-r--r--arch/sh/include/asm/addrspace.h15
-rw-r--r--arch/sh/include/asm/alignment.h21
-rw-r--r--arch/sh/include/asm/asm-offsets.h1
-rw-r--r--arch/sh/include/asm/atomic-grb.h46
-rw-r--r--arch/sh/include/asm/atomic-llsc.h27
-rw-r--r--arch/sh/include/asm/atomic.h82
-rw-r--r--arch/sh/include/asm/bitops.h4
-rw-r--r--arch/sh/include/asm/bugs.h4
-rw-r--r--arch/sh/include/asm/cacheflush.h13
-rw-r--r--arch/sh/include/asm/clock.h11
-rw-r--r--arch/sh/include/asm/cmpxchg-grb.h7
-rw-r--r--arch/sh/include/asm/dma-mapping.h233
-rw-r--r--arch/sh/include/asm/dma-register.h51
-rw-r--r--arch/sh/include/asm/dma-sh.h63
-rw-r--r--arch/sh/include/asm/dma.h6
-rw-r--r--arch/sh/include/asm/dmaengine.h93
-rw-r--r--arch/sh/include/asm/dwarf.h27
-rw-r--r--arch/sh/include/asm/elf.h7
-rw-r--r--arch/sh/include/asm/fixmap.h27
-rw-r--r--arch/sh/include/asm/fpu.h55
-rw-r--r--arch/sh/include/asm/ftrace.h17
-rw-r--r--arch/sh/include/asm/gpio.h82
-rw-r--r--arch/sh/include/asm/hardirq.h13
-rw-r--r--arch/sh/include/asm/hw_breakpoint.h67
-rw-r--r--arch/sh/include/asm/io.h181
-rw-r--r--arch/sh/include/asm/irqflags.h31
-rw-r--r--arch/sh/include/asm/irqflags_32.h99
-rw-r--r--arch/sh/include/asm/irqflags_64.h85
-rw-r--r--arch/sh/include/asm/kdebug.h2
-rw-r--r--arch/sh/include/asm/machvec.h2
-rw-r--r--arch/sh/include/asm/mmu.h82
-rw-r--r--arch/sh/include/asm/mmu_context.h6
-rw-r--r--arch/sh/include/asm/mmu_context_32.h4
-rw-r--r--arch/sh/include/asm/module.h17
-rw-r--r--arch/sh/include/asm/page.h19
-rw-r--r--arch/sh/include/asm/pci.h94
-rw-r--r--arch/sh/include/asm/perf_event.h31
-rw-r--r--arch/sh/include/asm/pgalloc.h32
-rw-r--r--arch/sh/include/asm/pgtable-2level.h23
-rw-r--r--arch/sh/include/asm/pgtable-3level.h56
-rw-r--r--arch/sh/include/asm/pgtable.h55
-rw-r--r--arch/sh/include/asm/pgtable_32.h11
-rw-r--r--arch/sh/include/asm/pgtable_64.h26
-rw-r--r--arch/sh/include/asm/processor.h21
-rw-r--r--arch/sh/include/asm/processor_32.h38
-rw-r--r--arch/sh/include/asm/processor_64.h23
-rw-r--r--arch/sh/include/asm/ptrace.h22
-rw-r--r--arch/sh/include/asm/reboot.h21
-rw-r--r--arch/sh/include/asm/scatterlist.h2
-rw-r--r--arch/sh/include/asm/setup.h1
-rw-r--r--arch/sh/include/asm/sh_bios.h15
-rw-r--r--arch/sh/include/asm/sh_eth.h1
-rw-r--r--arch/sh/include/asm/sh_keysc.h14
-rw-r--r--arch/sh/include/asm/siu.h26
-rw-r--r--arch/sh/include/asm/spinlock.h58
-rw-r--r--arch/sh/include/asm/spinlock_types.h8
-rw-r--r--arch/sh/include/asm/suspend.h66
-rw-r--r--arch/sh/include/asm/syscall.h2
-rw-r--r--arch/sh/include/asm/syscalls.h5
-rw-r--r--arch/sh/include/asm/system.h13
-rw-r--r--arch/sh/include/asm/system_32.h44
-rw-r--r--arch/sh/include/asm/system_64.h36
-rw-r--r--arch/sh/include/asm/thread_info.h40
-rw-r--r--arch/sh/include/asm/timex.h10
-rw-r--r--arch/sh/include/asm/tlb.h17
-rw-r--r--arch/sh/include/asm/topology.h10
-rw-r--r--arch/sh/include/asm/ubc.h75
-rw-r--r--arch/sh/include/asm/uncached.h18
-rw-r--r--arch/sh/include/asm/unistd_32.h4
-rw-r--r--arch/sh/include/asm/unistd_64.h6
-rw-r--r--arch/sh/include/asm/vmlinux.lds.h8
-rw-r--r--arch/sh/include/asm/watchdog.h67
-rw-r--r--arch/sh/include/cpu-sh2/cpu/ubc.h32
-rw-r--r--arch/sh/include/cpu-sh2/cpu/watchdog.h4
-rw-r--r--arch/sh/include/cpu-sh3/cpu/dac.h12
-rw-r--r--arch/sh/include/cpu-sh3/cpu/dma-register.h41
-rw-r--r--arch/sh/include/cpu-sh3/cpu/dma.h23
-rw-r--r--arch/sh/include/cpu-sh3/cpu/ubc.h42
-rw-r--r--arch/sh/include/cpu-sh4/cpu/addrspace.h9
-rw-r--r--arch/sh/include/cpu-sh4/cpu/dma-register.h112
-rw-r--r--arch/sh/include/cpu-sh4/cpu/dma-sh4a.h80
-rw-r--r--arch/sh/include/cpu-sh4/cpu/dma.h33
-rw-r--r--arch/sh/include/cpu-sh4/cpu/mmu_context.h8
-rw-r--r--arch/sh/include/cpu-sh4/cpu/sq.h3
-rw-r--r--arch/sh/include/cpu-sh4/cpu/ubc.h64
-rw-r--r--arch/sh/include/cpu-sh4/cpu/watchdog.h19
-rw-r--r--arch/sh/include/mach-common/mach/hp6xx.h4
-rw-r--r--arch/sh/include/mach-common/mach/magicpanelr2.h12
-rw-r--r--arch/sh/include/mach-common/mach/titan.h2
-rw-r--r--arch/sh/include/mach-dreamcast/mach/sysasic.h5
-rw-r--r--arch/sh/include/mach-ecovec24/mach/partner-jet-setup.txt3
-rw-r--r--arch/sh/include/mach-kfr2r09/mach/kfr2r09.h6
-rw-r--r--arch/sh/include/mach-migor/mach/migor.h1
-rw-r--r--arch/sh/include/mach-sdk7786/mach/fpga.h114
-rw-r--r--arch/sh/include/mach-sdk7786/mach/irq.h7
-rw-r--r--arch/sh/include/mach-se/mach/se7343.h52
-rw-r--r--arch/sh/include/mach-se/mach/se7722.h11
-rw-r--r--arch/sh/kernel/Makefile13
-rw-r--r--arch/sh/kernel/asm-offsets.c23
-rw-r--r--arch/sh/kernel/cpu/Makefile3
-rw-r--r--arch/sh/kernel/cpu/adc.c12
-rw-r--r--arch/sh/kernel/cpu/clock-cpg.c104
-rw-r--r--arch/sh/kernel/cpu/clock.c6
-rw-r--r--arch/sh/kernel/cpu/fpu.c85
-rw-r--r--arch/sh/kernel/cpu/hwblk.c1
-rw-r--r--arch/sh/kernel/cpu/init.c147
-rw-r--r--arch/sh/kernel/cpu/irq/intc-sh5.c14
-rw-r--r--arch/sh/kernel/cpu/irq/ipr.c7
-rw-r--r--arch/sh/kernel/cpu/sh2/clock-sh7619.c6
-rw-r--r--arch/sh/kernel/cpu/sh2/setup-sh7619.c71
-rw-r--r--arch/sh/kernel/cpu/sh2a/clock-sh7201.c8
-rw-r--r--arch/sh/kernel/cpu/sh2a/clock-sh7203.c6
-rw-r--r--arch/sh/kernel/cpu/sh2a/clock-sh7206.c8
-rw-r--r--arch/sh/kernel/cpu/sh2a/fpu.c110
-rw-r--r--arch/sh/kernel/cpu/sh2a/setup-mxg.c23
-rw-r--r--arch/sh/kernel/cpu/sh2a/setup-sh7201.c181
-rw-r--r--arch/sh/kernel/cpu/sh2a/setup-sh7203.c89
-rw-r--r--arch/sh/kernel/cpu/sh2a/setup-sh7206.c89
-rw-r--r--arch/sh/kernel/cpu/sh3/clock-sh3.c8
-rw-r--r--arch/sh/kernel/cpu/sh3/clock-sh7705.c8
-rw-r--r--arch/sh/kernel/cpu/sh3/clock-sh7706.c8
-rw-r--r--arch/sh/kernel/cpu/sh3/clock-sh7709.c8
-rw-r--r--arch/sh/kernel/cpu/sh3/clock-sh7710.c8
-rw-r--r--arch/sh/kernel/cpu/sh3/clock-sh7712.c6
-rw-r--r--arch/sh/kernel/cpu/sh3/entry.S36
-rw-r--r--arch/sh/kernel/cpu/sh3/ex.S2
-rw-r--r--arch/sh/kernel/cpu/sh3/probe.c28
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh3.c2
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh7705.c49
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh770x.c80
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh7710.c50
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh7720.c50
-rw-r--r--arch/sh/kernel/cpu/sh4/Makefile8
-rw-r--r--arch/sh/kernel/cpu/sh4/clock-sh4-202.c10
-rw-r--r--arch/sh/kernel/cpu/sh4/clock-sh4.c8
-rw-r--r--arch/sh/kernel/cpu/sh4/fpu.c161
-rw-r--r--arch/sh/kernel/cpu/sh4/perf_event.c253
-rw-r--r--arch/sh/kernel/cpu/sh4/probe.c14
-rw-r--r--arch/sh/kernel/cpu/sh4/setup-sh4-202.c25
-rw-r--r--arch/sh/kernel/cpu/sh4/setup-sh7750.c49
-rw-r--r--arch/sh/kernel/cpu/sh4/setup-sh7760.c91
-rw-r--r--arch/sh/kernel/cpu/sh4/sq.c25
-rw-r--r--arch/sh/kernel/cpu/sh4a/Makefile8
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7343.c6
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7366.c6
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7722.c29
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7723.c30
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7724.c21
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7757.c8
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7763.c8
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7770.c8
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7780.c10
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7785.c6
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7786.c184
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-shx3.c10
-rw-r--r--arch/sh/kernel/cpu/sh4a/perf_event.c269
-rw-r--r--arch/sh/kernel/cpu/sh4a/pinmux-sh7722.c21
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7343.c112
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7366.c39
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7722.c295
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7723.c199
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7724.c617
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7757.c118
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7763.c101
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7770.c245
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7780.c200
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7785.c291
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7786.c156
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-shx3.c121
-rw-r--r--arch/sh/kernel/cpu/sh4a/smp-shx3.c40
-rw-r--r--arch/sh/kernel/cpu/sh4a/ubc.c133
-rw-r--r--arch/sh/kernel/cpu/sh5/clock-sh5.c8
-rw-r--r--arch/sh/kernel/cpu/sh5/entry.S8
-rw-r--r--arch/sh/kernel/cpu/sh5/fpu.c67
-rw-r--r--arch/sh/kernel/cpu/sh5/setup-sh5.c22
-rw-r--r--arch/sh/kernel/cpu/shmobile/cpuidle.c42
-rw-r--r--arch/sh/kernel/cpu/shmobile/pm.c118
-rw-r--r--arch/sh/kernel/cpu/shmobile/pm_runtime.c17
-rw-r--r--arch/sh/kernel/cpu/shmobile/sleep.S461
-rw-r--r--arch/sh/kernel/cpu/ubc.S59
-rw-r--r--arch/sh/kernel/cpufreq.c4
-rw-r--r--arch/sh/kernel/debugtraps.S1
-rw-r--r--arch/sh/kernel/dma-nommu.c82
-rw-r--r--arch/sh/kernel/dwarf.c369
-rw-r--r--arch/sh/kernel/early_printk.c240
-rw-r--r--arch/sh/kernel/entry-common.S10
-rw-r--r--arch/sh/kernel/ftrace.c227
-rw-r--r--arch/sh/kernel/gpio.c584
-rw-r--r--arch/sh/kernel/head_32.S219
-rw-r--r--arch/sh/kernel/head_64.S2
-rw-r--r--arch/sh/kernel/hw_breakpoint.c445
-rw-r--r--arch/sh/kernel/idle.c92
-rw-r--r--arch/sh/kernel/io_generic.c4
-rw-r--r--arch/sh/kernel/io_trapped.c18
-rw-r--r--arch/sh/kernel/irq.c18
-rw-r--r--arch/sh/kernel/irq_32.c57
-rw-r--r--arch/sh/kernel/irq_64.c51
-rw-r--r--arch/sh/kernel/kgdb.c46
-rw-r--r--arch/sh/kernel/kprobes.c1
-rw-r--r--arch/sh/kernel/machine_kexec.c22
-rw-r--r--arch/sh/kernel/machvec.c4
-rw-r--r--arch/sh/kernel/module.c9
-rw-r--r--arch/sh/kernel/perf_callchain.c95
-rw-r--r--arch/sh/kernel/perf_event.c330
-rw-r--r--arch/sh/kernel/process.c101
-rw-r--r--arch/sh/kernel/process_32.c201
-rw-r--r--arch/sh/kernel/process_64.c43
-rw-r--r--arch/sh/kernel/ptrace_32.c83
-rw-r--r--arch/sh/kernel/ptrace_64.c31
-rw-r--r--arch/sh/kernel/reboot.c98
-rw-r--r--arch/sh/kernel/return_address.c57
-rw-r--r--arch/sh/kernel/setup.c12
-rw-r--r--arch/sh/kernel/sh_bios.c129
-rw-r--r--arch/sh/kernel/sh_ksyms_32.c67
-rw-r--r--arch/sh/kernel/sh_ksyms_64.c10
-rw-r--r--arch/sh/kernel/signal_32.c34
-rw-r--r--arch/sh/kernel/signal_64.c21
-rw-r--r--arch/sh/kernel/smp.c14
-rw-r--r--arch/sh/kernel/sys_sh.c143
-rw-r--r--arch/sh/kernel/syscalls_64.S2
-rw-r--r--arch/sh/kernel/time.c6
-rw-r--r--arch/sh/kernel/topology.c26
-rw-r--r--arch/sh/kernel/traps.c12
-rw-r--r--arch/sh/kernel/traps_32.c195
-rw-r--r--arch/sh/kernel/traps_64.c45
-rw-r--r--arch/sh/kernel/vmlinux.lds.S42
-rw-r--r--arch/sh/kernel/vsyscall/vsyscall.c1
-rw-r--r--arch/sh/lib/Makefile7
-rw-r--r--arch/sh/lib/libgcc.h3
-rw-r--r--arch/sh/lib/memset-sh4.S107
-rw-r--r--arch/sh/math-emu/math.c18
-rw-r--r--arch/sh/mm/Kconfig62
-rw-r--r--arch/sh/mm/Makefile11
-rw-r--r--arch/sh/mm/alignment.c189
-rw-r--r--arch/sh/mm/cache-debugfs.c7
-rw-r--r--arch/sh/mm/cache-sh2.c12
-rw-r--r--arch/sh/mm/cache-sh2a.c20
-rw-r--r--arch/sh/mm/cache-sh3.c6
-rw-r--r--arch/sh/mm/cache-sh4.c525
-rw-r--r--arch/sh/mm/cache-sh5.c2
-rw-r--r--arch/sh/mm/cache-sh7705.c14
-rw-r--r--arch/sh/mm/cache.c39
-rw-r--r--arch/sh/mm/consistent.c29
-rw-r--r--arch/sh/mm/fault_32.c5
-rw-r--r--arch/sh/mm/hugetlbpage.c1
-rw-r--r--arch/sh/mm/init.c170
-rw-r--r--arch/sh/mm/ioremap.c137
-rw-r--r--arch/sh/mm/ioremap_32.c145
-rw-r--r--arch/sh/mm/ioremap_64.c326
-rw-r--r--arch/sh/mm/ioremap_fixed.c134
-rw-r--r--arch/sh/mm/kmap.c4
-rw-r--r--arch/sh/mm/mmap.c3
-rw-r--r--arch/sh/mm/nommu.c4
-rw-r--r--arch/sh/mm/numa.c20
-rw-r--r--arch/sh/mm/pgtable.c57
-rw-r--r--arch/sh/mm/pmb-fixed.c45
-rw-r--r--arch/sh/mm/pmb.c897
-rw-r--r--arch/sh/mm/tlb-pteaex.c33
-rw-r--r--arch/sh/mm/tlb-sh3.c25
-rw-r--r--arch/sh/mm/tlb-sh4.c41
-rw-r--r--arch/sh/mm/tlb-sh5.c39
-rw-r--r--arch/sh/mm/tlb-urb.c93
-rw-r--r--arch/sh/mm/tlbflush_32.c19
-rw-r--r--arch/sh/mm/tlbflush_64.c2
-rw-r--r--arch/sh/mm/uncached.c43
-rw-r--r--arch/sh/oprofile/Makefile4
-rw-r--r--arch/sh/oprofile/common.c38
-rw-r--r--arch/sh/oprofile/op_impl.h2
-rw-r--r--arch/sh/oprofile/op_model_sh7750.c255
-rw-r--r--arch/sh/tools/Makefile6
-rw-r--r--arch/sh/tools/gen-mach-types2
-rw-r--r--arch/sh/tools/mach-types1
438 files changed, 19085 insertions, 9100 deletions
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 88cdeb9f72d9..8d90564c2bcf 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -13,13 +13,15 @@ config SUPERH
13 select HAVE_LMB 13 select HAVE_LMB
14 select HAVE_OPROFILE 14 select HAVE_OPROFILE
15 select HAVE_GENERIC_DMA_COHERENT 15 select HAVE_GENERIC_DMA_COHERENT
16 select HAVE_IOREMAP_PROT if MMU
17 select HAVE_ARCH_TRACEHOOK 16 select HAVE_ARCH_TRACEHOOK
18 select HAVE_DMA_API_DEBUG 17 select HAVE_DMA_API_DEBUG
18 select HAVE_DMA_ATTRS
19 select HAVE_PERF_EVENTS 19 select HAVE_PERF_EVENTS
20 select PERF_USE_VMALLOC
20 select HAVE_KERNEL_GZIP 21 select HAVE_KERNEL_GZIP
21 select HAVE_KERNEL_BZIP2 22 select HAVE_KERNEL_BZIP2
22 select HAVE_KERNEL_LZMA 23 select HAVE_KERNEL_LZMA
24 select HAVE_KERNEL_LZO
23 select HAVE_SYSCALL_TRACEPOINTS 25 select HAVE_SYSCALL_TRACEPOINTS
24 select RTC_LIB 26 select RTC_LIB
25 select GENERIC_ATOMIC64 27 select GENERIC_ATOMIC64
@@ -33,12 +35,16 @@ config SUPERH32
33 def_bool ARCH = "sh" 35 def_bool ARCH = "sh"
34 select HAVE_KPROBES 36 select HAVE_KPROBES
35 select HAVE_KRETPROBES 37 select HAVE_KRETPROBES
38 select HAVE_IOREMAP_PROT if MMU && !X2TLB
36 select HAVE_FUNCTION_TRACER 39 select HAVE_FUNCTION_TRACER
37 select HAVE_FTRACE_MCOUNT_RECORD 40 select HAVE_FTRACE_MCOUNT_RECORD
38 select HAVE_DYNAMIC_FTRACE 41 select HAVE_DYNAMIC_FTRACE
39 select HAVE_FUNCTION_TRACE_MCOUNT_TEST 42 select HAVE_FUNCTION_TRACE_MCOUNT_TEST
43 select HAVE_FTRACE_NMI_ENTER if DYNAMIC_FTRACE
40 select HAVE_FUNCTION_GRAPH_TRACER 44 select HAVE_FUNCTION_GRAPH_TRACER
41 select HAVE_ARCH_KGDB 45 select HAVE_ARCH_KGDB
46 select HAVE_HW_BREAKPOINT
47 select PERF_EVENTS if HAVE_HW_BREAKPOINT
42 select ARCH_HIBERNATION_POSSIBLE if MMU 48 select ARCH_HIBERNATION_POSSIBLE if MMU
43 49
44config SUPERH64 50config SUPERH64
@@ -75,11 +81,12 @@ config GENERIC_HARDIRQS
75config GENERIC_HARDIRQS_NO__DO_IRQ 81config GENERIC_HARDIRQS_NO__DO_IRQ
76 def_bool y 82 def_bool y
77 83
78config GENERIC_IRQ_PROBE 84config IRQ_PER_CPU
79 def_bool y 85 def_bool y
80 86
81config IRQ_PER_CPU 87config SPARSE_IRQ
82 def_bool y 88 def_bool y
89 depends on SUPERH32
83 90
84config GENERIC_GPIO 91config GENERIC_GPIO
85 def_bool n 92 def_bool n
@@ -170,6 +177,15 @@ config ARCH_HAS_CPU_IDLE_WAIT
170config IO_TRAPPED 177config IO_TRAPPED
171 bool 178 bool
172 179
180config DMA_COHERENT
181 bool
182
183config DMA_NONCOHERENT
184 def_bool !DMA_COHERENT
185
186config NEED_DMA_MAP_STATE
187 def_bool DMA_NONCOHERENT
188
173source "init/Kconfig" 189source "init/Kconfig"
174 190
175source "kernel/Kconfig.freezer" 191source "kernel/Kconfig.freezer"
@@ -220,6 +236,7 @@ config CPU_SHX2
220 236
221config CPU_SHX3 237config CPU_SHX3
222 bool 238 bool
239 select DMA_COHERENT
223 240
224config ARCH_SHMOBILE 241config ARCH_SHMOBILE
225 bool 242 bool
@@ -530,14 +547,15 @@ config SH_TIMER_MTU2
530 547
531config SH_PCLK_FREQ 548config SH_PCLK_FREQ
532 int "Peripheral clock frequency (in Hz)" 549 int "Peripheral clock frequency (in Hz)"
533 default "27000000" if CPU_SUBTYPE_SH7343 550 depends on SH_CLK_CPG_LEGACY
534 default "31250000" if CPU_SUBTYPE_SH7619 551 default "31250000" if CPU_SUBTYPE_SH7619
535 default "32000000" if CPU_SUBTYPE_SH7722 552 default "33333333" if CPU_SUBTYPE_SH7770 || \
536 default "33333333" if CPU_SUBTYPE_SH7770 || CPU_SUBTYPE_SH7723 || \ 553 CPU_SUBTYPE_SH7760 || \
537 CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7705 || \ 554 CPU_SUBTYPE_SH7705 || \
538 CPU_SUBTYPE_SH7203 || CPU_SUBTYPE_SH7206 || \ 555 CPU_SUBTYPE_SH7203 || \
539 CPU_SUBTYPE_SH7263 || CPU_SUBTYPE_MXG || \ 556 CPU_SUBTYPE_SH7206 || \
540 CPU_SUBTYPE_SH7786 || CPU_SUBTYPE_SH7724 557 CPU_SUBTYPE_SH7263 || \
558 CPU_SUBTYPE_MXG
541 default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R 559 default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R
542 default "66000000" if CPU_SUBTYPE_SH4_202 560 default "66000000" if CPU_SUBTYPE_SH4_202
543 default "50000000" 561 default "50000000"
@@ -551,7 +569,8 @@ config SH_CLK_CPG
551 569
552config SH_CLK_CPG_LEGACY 570config SH_CLK_CPG_LEGACY
553 depends on SH_CLK_CPG 571 depends on SH_CLK_CPG
554 def_bool y if !CPU_SUBTYPE_SH7785 && !ARCH_SHMOBILE 572 def_bool y if !CPU_SUBTYPE_SH7785 && !ARCH_SHMOBILE && \
573 !CPU_SUBTYPE_SH7786
555 574
556config SH_CLK_MD 575config SH_CLK_MD
557 int "CPU Mode Pin Setting" 576 int "CPU Mode Pin Setting"
@@ -713,18 +732,6 @@ config GUSA_RB
713 LLSC, this should be more efficient than the other alternative of 732 LLSC, this should be more efficient than the other alternative of
714 disabling interrupts around the atomic sequence. 733 disabling interrupts around the atomic sequence.
715 734
716config SPARSE_IRQ
717 bool "Support sparse irq numbering"
718 depends on EXPERIMENTAL
719 help
720 This enables support for sparse irqs. This is useful in general
721 as most CPUs have a fairly sparse array of IRQ vectors, which
722 the irq_desc then maps directly on to. Systems with a high
723 number of off-chip IRQs will want to treat this as
724 experimental until they have been independently verified.
725
726 If you don't know what to do here, say N.
727
728endmenu 735endmenu
729 736
730menu "Boot options" 737menu "Boot options"
@@ -761,17 +768,6 @@ config ENTRY_OFFSET
761 default "0x00010000" if PAGE_SIZE_64KB 768 default "0x00010000" if PAGE_SIZE_64KB
762 default "0x00000000" 769 default "0x00000000"
763 770
764config UBC_WAKEUP
765 bool "Wakeup UBC on startup"
766 depends on CPU_SH4 && !CPU_SH4A
767 help
768 Selecting this option will wakeup the User Break Controller (UBC) on
769 startup. Although the UBC is left in an awake state when the processor
770 comes up, some boot loaders misbehave by putting the UBC to sleep in a
771 power saving state, which causes issues with things like ptrace().
772
773 If unsure, say N.
774
775choice 771choice
776 prompt "Kernel command line" 772 prompt "Kernel command line"
777 optional 773 optional
@@ -818,7 +814,17 @@ config MAPLE
818 Dreamcast with a serial line terminal or a remote network 814 Dreamcast with a serial line terminal or a remote network
819 connection. 815 connection.
820 816
821source "arch/sh/drivers/pci/Kconfig" 817config PCI
818 bool "PCI support"
819 depends on SYS_SUPPORTS_PCI
820 select PCI_DOMAINS
821 help
822 Find out whether you have a PCI motherboard. PCI is the name of a
823 bus system, i.e. the way the CPU talks to the other stuff inside
824 your box. If you have PCI, say Y, otherwise N.
825
826config PCI_DOMAINS
827 bool
822 828
823source "drivers/pci/pcie/Kconfig" 829source "drivers/pci/pcie/Kconfig"
824 830
diff --git a/arch/sh/Kconfig.cpu b/arch/sh/Kconfig.cpu
index cd6e3ea598d5..ddf096c7d8bf 100644
--- a/arch/sh/Kconfig.cpu
+++ b/arch/sh/Kconfig.cpu
@@ -68,7 +68,8 @@ config SH_STORE_QUEUES
68 68
69config SPECULATIVE_EXECUTION 69config SPECULATIVE_EXECUTION
70 bool "Speculative subroutine return" 70 bool "Speculative subroutine return"
71 depends on CPU_SUBTYPE_SH7780 && EXPERIMENTAL 71 depends on EXPERIMENTAL
72 depends on CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785 || CPU_SUBTYPE_SH7786
72 help 73 help
73 This enables support for a speculative instruction fetch for 74 This enables support for a speculative instruction fetch for
74 subroutine return. There are various pitfalls associated with 75 subroutine return. There are various pitfalls associated with
diff --git a/arch/sh/Kconfig.debug b/arch/sh/Kconfig.debug
index 55907af1dc25..12fec72fec5f 100644
--- a/arch/sh/Kconfig.debug
+++ b/arch/sh/Kconfig.debug
@@ -19,50 +19,6 @@ config SH_STANDARD_BIOS
19 mask ROM and no flash (WindowsCE machines fall in this category). 19 mask ROM and no flash (WindowsCE machines fall in this category).
20 If unsure, say N. 20 If unsure, say N.
21 21
22config EARLY_SCIF_CONSOLE
23 bool "Use early SCIF console"
24 help
25 This enables an early console using a fixed SCIF port. This can
26 be used by platforms that are either not running the SH
27 standard BIOS, or do not wish to use the BIOS callbacks for the
28 serial I/O.
29
30config EARLY_SCIF_CONSOLE_PORT
31 hex
32 depends on EARLY_SCIF_CONSOLE
33 default "0xa4400000" if CPU_SUBTYPE_SH7712 || CPU_SUBTYPE_SH7705
34 default "0xa4430000" if CPU_SUBTYPE_SH7720 || CPU_SUBTYPE_SH7721
35 default "0xf8420000" if CPU_SUBTYPE_SH7619
36 default "0xff804000" if CPU_SUBTYPE_MXG
37 default "0xffc30000" if CPU_SUBTYPE_SHX3
38 default "0xffe00000" if CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7763 || \
39 CPU_SUBTYPE_SH7722 || CPU_SUBTYPE_SH7366 || \
40 CPU_SUBTYPE_SH7343
41 default "0xfe4c0000" if CPU_SUBTYPE_SH7757
42 default "0xffeb0000" if CPU_SUBTYPE_SH7785
43 default "0xffeb0000" if CPU_SUBTYPE_SH7786
44 default "0xfffe8000" if CPU_SUBTYPE_SH7203
45 default "0xfffe9800" if CPU_SUBTYPE_SH7206 || CPU_SUBTYPE_SH7263
46 default "0xffe80000" if CPU_SH4
47 default "0xa4000150" if CPU_SH3
48 default "0x00000000"
49
50config EARLY_PRINTK
51 bool "Early printk support"
52 depends on SH_STANDARD_BIOS || EARLY_SCIF_CONSOLE
53 help
54 Say Y here to redirect kernel printk messages to the serial port
55 used by the SH-IPL bootloader, starting very early in the boot
56 process and ending when the kernel's serial console is initialised.
57 This option is only useful porting the kernel to a new machine,
58 when the kernel may crash or hang before the serial console is
59 initialised. If unsure, say N.
60
61 On devices that are running SH-IPL and want to keep the port
62 initialization consistent while not using the BIOS callbacks,
63 select both the EARLY_SCIF_CONSOLE and SH_STANDARD_BIOS, using
64 the kernel command line option to toggle back and forth.
65
66config STACK_DEBUG 22config STACK_DEBUG
67 bool "Check for stack overflows" 23 bool "Check for stack overflows"
68 depends on DEBUG_KERNEL && SUPERH32 24 depends on DEBUG_KERNEL && SUPERH32
diff --git a/arch/sh/Makefile b/arch/sh/Makefile
index 66e40aabc600..588579ac2e35 100644
--- a/arch/sh/Makefile
+++ b/arch/sh/Makefile
@@ -78,8 +78,12 @@ defaultimage-$(CONFIG_SUPERH32) := zImage
78defaultimage-$(CONFIG_SH_SH7785LCR) := uImage 78defaultimage-$(CONFIG_SH_SH7785LCR) := uImage
79defaultimage-$(CONFIG_SH_RSK) := uImage 79defaultimage-$(CONFIG_SH_RSK) := uImage
80defaultimage-$(CONFIG_SH_URQUELL) := uImage 80defaultimage-$(CONFIG_SH_URQUELL) := uImage
81defaultimage-$(CONFIG_SH_MIGOR) := uImage
82defaultimage-$(CONFIG_SH_AP325RXA) := uImage
83defaultimage-$(CONFIG_SH_7724_SOLUTION_ENGINE) := uImage
81defaultimage-$(CONFIG_SH_7206_SOLUTION_ENGINE) := vmlinux 84defaultimage-$(CONFIG_SH_7206_SOLUTION_ENGINE) := vmlinux
82defaultimage-$(CONFIG_SH_7619_SOLUTION_ENGINE) := vmlinux 85defaultimage-$(CONFIG_SH_7619_SOLUTION_ENGINE) := vmlinux
86defaultimage-$(CONFIG_SH_SDK7786) := vmlinux.bin
83 87
84# Set some sensible Kbuild defaults 88# Set some sensible Kbuild defaults
85KBUILD_IMAGE := $(defaultimage-y) 89KBUILD_IMAGE := $(defaultimage-y)
@@ -136,14 +140,15 @@ machdir-$(CONFIG_SH_7751_SYSTEMH) += mach-systemh
136machdir-$(CONFIG_SH_EDOSK7705) += mach-edosk7705 140machdir-$(CONFIG_SH_EDOSK7705) += mach-edosk7705
137machdir-$(CONFIG_SH_HIGHLANDER) += mach-highlander 141machdir-$(CONFIG_SH_HIGHLANDER) += mach-highlander
138machdir-$(CONFIG_SH_MIGOR) += mach-migor 142machdir-$(CONFIG_SH_MIGOR) += mach-migor
143machdir-$(CONFIG_SH_AP325RXA) += mach-ap325rxa
139machdir-$(CONFIG_SH_KFR2R09) += mach-kfr2r09 144machdir-$(CONFIG_SH_KFR2R09) += mach-kfr2r09
140machdir-$(CONFIG_SH_ECOVEC) += mach-ecovec24 145machdir-$(CONFIG_SH_ECOVEC) += mach-ecovec24
141machdir-$(CONFIG_SH_SDK7780) += mach-sdk7780 146machdir-$(CONFIG_SH_SDK7780) += mach-sdk7780
147machdir-$(CONFIG_SH_SDK7786) += mach-sdk7786
142machdir-$(CONFIG_SH_X3PROTO) += mach-x3proto 148machdir-$(CONFIG_SH_X3PROTO) += mach-x3proto
143machdir-$(CONFIG_SH_SH7763RDP) += mach-sh7763rdp 149machdir-$(CONFIG_SH_SH7763RDP) += mach-sh7763rdp
144machdir-$(CONFIG_SH_SH4202_MICRODEV) += mach-microdev 150machdir-$(CONFIG_SH_SH4202_MICRODEV) += mach-microdev
145machdir-$(CONFIG_SH_LANDISK) += mach-landisk 151machdir-$(CONFIG_SH_LANDISK) += mach-landisk
146machdir-$(CONFIG_SH_TITAN) += mach-titan
147machdir-$(CONFIG_SH_LBOX_RE2) += mach-lboxre2 152machdir-$(CONFIG_SH_LBOX_RE2) += mach-lboxre2
148machdir-$(CONFIG_SH_CAYMAN) += mach-cayman 153machdir-$(CONFIG_SH_CAYMAN) += mach-cayman
149machdir-$(CONFIG_SH_RSK) += mach-rsk 154machdir-$(CONFIG_SH_RSK) += mach-rsk
@@ -199,12 +204,10 @@ endif
199libs-$(CONFIG_SUPERH32) := arch/sh/lib/ $(libs-y) 204libs-$(CONFIG_SUPERH32) := arch/sh/lib/ $(libs-y)
200libs-$(CONFIG_SUPERH64) := arch/sh/lib64/ $(libs-y) 205libs-$(CONFIG_SUPERH64) := arch/sh/lib64/ $(libs-y)
201 206
202BOOT_TARGETS = uImage uImage.bz2 uImage.gz uImage.lzma uImage.srec uImage.bin \ 207BOOT_TARGETS = uImage uImage.bz2 uImage.gz uImage.lzma uImage.lzo \
203 zImage vmlinux.srec romImage 208 uImage.srec uImage.bin zImage vmlinux.bin vmlinux.srec \
204PHONY += maketools $(BOOT_TARGETS) FORCE 209 romImage
205 210PHONY += $(BOOT_TARGETS)
206maketools: include/linux/version.h FORCE
207 $(Q)$(MAKE) $(build)=arch/sh/tools include/asm-sh/machtypes.h
208 211
209all: $(KBUILD_IMAGE) 212all: $(KBUILD_IMAGE)
210 213
@@ -213,7 +216,8 @@ $(BOOT_TARGETS): vmlinux
213 216
214compressed: zImage 217compressed: zImage
215 218
216archprepare: maketools 219archprepare:
220 $(Q)$(MAKE) $(build)=arch/sh/tools include/generated/machtypes.h
217 221
218archclean: 222archclean:
219 $(Q)$(MAKE) $(clean)=$(boot) 223 $(Q)$(MAKE) $(clean)=$(boot)
@@ -223,12 +227,12 @@ define archhelp
223 @echo ' zImage - Compressed kernel image' 227 @echo ' zImage - Compressed kernel image'
224 @echo ' romImage - Compressed ROM image, if supported' 228 @echo ' romImage - Compressed ROM image, if supported'
225 @echo ' vmlinux.srec - Create an ELF S-record' 229 @echo ' vmlinux.srec - Create an ELF S-record'
230 @echo ' vmlinux.bin - Create an uncompressed binary image'
226 @echo '* uImage - Alias to bootable U-Boot image' 231 @echo '* uImage - Alias to bootable U-Boot image'
227 @echo ' uImage.srec - Create an S-record for U-Boot' 232 @echo ' uImage.srec - Create an S-record for U-Boot'
228 @echo ' uImage.bin - Kernel-only image for U-Boot (bin)' 233 @echo ' uImage.bin - Kernel-only image for U-Boot (bin)'
229 @echo '* uImage.gz - Kernel-only image for U-Boot (gzip)' 234 @echo '* uImage.gz - Kernel-only image for U-Boot (gzip)'
230 @echo ' uImage.bz2 - Kernel-only image for U-Boot (bzip2)' 235 @echo ' uImage.bz2 - Kernel-only image for U-Boot (bzip2)'
231 @echo ' uImage.lzma - Kernel-only image for U-Boot (lzma)' 236 @echo ' uImage.lzma - Kernel-only image for U-Boot (lzma)'
237 @echo ' uImage.lzo - Kernel-only image for U-Boot (lzo)'
232endef 238endef
233
234CLEAN_FILES += include/asm-sh/machtypes.h
diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig
index aedd9deb5de2..938e87d51482 100644
--- a/arch/sh/boards/Kconfig
+++ b/arch/sh/boards/Kconfig
@@ -150,6 +150,14 @@ config SH_SDK7780
150 Select SDK7780 if configuring for a Renesas SH7780 SDK7780R3 150 Select SDK7780 if configuring for a Renesas SH7780 SDK7780R3
151 evaluation board. 151 evaluation board.
152 152
153config SH_SDK7786
154 bool "SDK7786"
155 depends on CPU_SUBTYPE_SH7786
156 select SYS_SUPPORTS_PCI
157 help
158 Select SDK7786 if configuring for a Renesas Technology Europe
159 SH7786-65nm board.
160
153config SH_HIGHLANDER 161config SH_HIGHLANDER
154 bool "Highlander" 162 bool "Highlander"
155 depends on CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785 163 depends on CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785
diff --git a/arch/sh/boards/Makefile b/arch/sh/boards/Makefile
index 7baa21090231..4f90f9b7a922 100644
--- a/arch/sh/boards/Makefile
+++ b/arch/sh/boards/Makefile
@@ -1,7 +1,6 @@
1# 1#
2# Specific board support, not covered by a mach group. 2# Specific board support, not covered by a mach group.
3# 3#
4obj-$(CONFIG_SH_AP325RXA) += board-ap325rxa.o
5obj-$(CONFIG_SH_MAGIC_PANEL_R2) += board-magicpanelr2.o 4obj-$(CONFIG_SH_MAGIC_PANEL_R2) += board-magicpanelr2.o
6obj-$(CONFIG_SH_SH7785LCR) += board-sh7785lcr.o 5obj-$(CONFIG_SH_SH7785LCR) += board-sh7785lcr.o
7obj-$(CONFIG_SH_URQUELL) += board-urquell.o 6obj-$(CONFIG_SH_URQUELL) += board-urquell.o
@@ -9,3 +8,4 @@ obj-$(CONFIG_SH_SHMIN) += board-shmin.o
9obj-$(CONFIG_SH_EDOSK7760) += board-edosk7760.o 8obj-$(CONFIG_SH_EDOSK7760) += board-edosk7760.o
10obj-$(CONFIG_SH_ESPT) += board-espt.o 9obj-$(CONFIG_SH_ESPT) += board-espt.o
11obj-$(CONFIG_SH_POLARIS) += board-polaris.o 10obj-$(CONFIG_SH_POLARIS) += board-polaris.o
11obj-$(CONFIG_SH_TITAN) += board-titan.o
diff --git a/arch/sh/boards/board-magicpanelr2.c b/arch/sh/boards/board-magicpanelr2.c
index 99ffc5f1c0dd..efba450a0518 100644
--- a/arch/sh/boards/board-magicpanelr2.c
+++ b/arch/sh/boards/board-magicpanelr2.c
@@ -23,7 +23,7 @@
23#include <asm/heartbeat.h> 23#include <asm/heartbeat.h>
24#include <cpu/sh7720.h> 24#include <cpu/sh7720.h>
25 25
26#define LAN9115_READY (ctrl_inl(0xA8000084UL) & 0x00000001UL) 26#define LAN9115_READY (__raw_readl(0xA8000084UL) & 0x00000001UL)
27 27
28/* Prefer cmdline over RedBoot */ 28/* Prefer cmdline over RedBoot */
29static const char *probes[] = { "cmdlinepart", "RedBoot", NULL }; 29static const char *probes[] = { "cmdlinepart", "RedBoot", NULL };
@@ -60,33 +60,33 @@ static void __init setup_chip_select(void)
60{ 60{
61 /* CS2: LAN (0x08000000 - 0x0bffffff) */ 61 /* CS2: LAN (0x08000000 - 0x0bffffff) */
62 /* no idle cycles, normal space, 8 bit data bus */ 62 /* no idle cycles, normal space, 8 bit data bus */
63 ctrl_outl(0x36db0400, CS2BCR); 63 __raw_writel(0x36db0400, CS2BCR);
64 /* (SW:1.5 WR:3 HW:1.5), ext. wait */ 64 /* (SW:1.5 WR:3 HW:1.5), ext. wait */
65 ctrl_outl(0x000003c0, CS2WCR); 65 __raw_writel(0x000003c0, CS2WCR);
66 66
67 /* CS4: CAN1 (0xb0000000 - 0xb3ffffff) */ 67 /* CS4: CAN1 (0xb0000000 - 0xb3ffffff) */
68 /* no idle cycles, normal space, 8 bit data bus */ 68 /* no idle cycles, normal space, 8 bit data bus */
69 ctrl_outl(0x00000200, CS4BCR); 69 __raw_writel(0x00000200, CS4BCR);
70 /* (SW:1.5 WR:3 HW:1.5), ext. wait */ 70 /* (SW:1.5 WR:3 HW:1.5), ext. wait */
71 ctrl_outl(0x00100981, CS4WCR); 71 __raw_writel(0x00100981, CS4WCR);
72 72
73 /* CS5a: CAN2 (0xb4000000 - 0xb5ffffff) */ 73 /* CS5a: CAN2 (0xb4000000 - 0xb5ffffff) */
74 /* no idle cycles, normal space, 8 bit data bus */ 74 /* no idle cycles, normal space, 8 bit data bus */
75 ctrl_outl(0x00000200, CS5ABCR); 75 __raw_writel(0x00000200, CS5ABCR);
76 /* (SW:1.5 WR:3 HW:1.5), ext. wait */ 76 /* (SW:1.5 WR:3 HW:1.5), ext. wait */
77 ctrl_outl(0x00100981, CS5AWCR); 77 __raw_writel(0x00100981, CS5AWCR);
78 78
79 /* CS5b: CAN3 (0xb6000000 - 0xb7ffffff) */ 79 /* CS5b: CAN3 (0xb6000000 - 0xb7ffffff) */
80 /* no idle cycles, normal space, 8 bit data bus */ 80 /* no idle cycles, normal space, 8 bit data bus */
81 ctrl_outl(0x00000200, CS5BBCR); 81 __raw_writel(0x00000200, CS5BBCR);
82 /* (SW:1.5 WR:3 HW:1.5), ext. wait */ 82 /* (SW:1.5 WR:3 HW:1.5), ext. wait */
83 ctrl_outl(0x00100981, CS5BWCR); 83 __raw_writel(0x00100981, CS5BWCR);
84 84
85 /* CS6a: Rotary (0xb8000000 - 0xb9ffffff) */ 85 /* CS6a: Rotary (0xb8000000 - 0xb9ffffff) */
86 /* no idle cycles, normal space, 8 bit data bus */ 86 /* no idle cycles, normal space, 8 bit data bus */
87 ctrl_outl(0x00000200, CS6ABCR); 87 __raw_writel(0x00000200, CS6ABCR);
88 /* (SW:1.5 WR:3 HW:1.5), no ext. wait */ 88 /* (SW:1.5 WR:3 HW:1.5), no ext. wait */
89 ctrl_outl(0x001009C1, CS6AWCR); 89 __raw_writel(0x001009C1, CS6AWCR);
90} 90}
91 91
92static void __init setup_port_multiplexing(void) 92static void __init setup_port_multiplexing(void)
@@ -94,71 +94,71 @@ static void __init setup_port_multiplexing(void)
94 /* A7 GPO(LED8); A6 GPO(LED7); A5 GPO(LED6); A4 GPO(LED5); 94 /* A7 GPO(LED8); A6 GPO(LED7); A5 GPO(LED6); A4 GPO(LED5);
95 * A3 GPO(LED4); A2 GPO(LED3); A1 GPO(LED2); A0 GPO(LED1); 95 * A3 GPO(LED4); A2 GPO(LED3); A1 GPO(LED2); A0 GPO(LED1);
96 */ 96 */
97 ctrl_outw(0x5555, PORT_PACR); /* 01 01 01 01 01 01 01 01 */ 97 __raw_writew(0x5555, PORT_PACR); /* 01 01 01 01 01 01 01 01 */
98 98
99 /* B7 GPO(RST4); B6 GPO(RST3); B5 GPO(RST2); B4 GPO(RST1); 99 /* B7 GPO(RST4); B6 GPO(RST3); B5 GPO(RST2); B4 GPO(RST1);
100 * B3 GPO(PB3); B2 GPO(PB2); B1 GPO(PB1); B0 GPO(PB0); 100 * B3 GPO(PB3); B2 GPO(PB2); B1 GPO(PB1); B0 GPO(PB0);
101 */ 101 */
102 ctrl_outw(0x5555, PORT_PBCR); /* 01 01 01 01 01 01 01 01 */ 102 __raw_writew(0x5555, PORT_PBCR); /* 01 01 01 01 01 01 01 01 */
103 103
104 /* C7 GPO(PC7); C6 GPO(PC6); C5 GPO(PC5); C4 GPO(PC4); 104 /* C7 GPO(PC7); C6 GPO(PC6); C5 GPO(PC5); C4 GPO(PC4);
105 * C3 LCD_DATA3; C2 LCD_DATA2; C1 LCD_DATA1; C0 LCD_DATA0; 105 * C3 LCD_DATA3; C2 LCD_DATA2; C1 LCD_DATA1; C0 LCD_DATA0;
106 */ 106 */
107 ctrl_outw(0x5500, PORT_PCCR); /* 01 01 01 01 00 00 00 00 */ 107 __raw_writew(0x5500, PORT_PCCR); /* 01 01 01 01 00 00 00 00 */
108 108
109 /* D7 GPO(PD7); D6 GPO(PD6); D5 GPO(PD5); D4 GPO(PD4); 109 /* D7 GPO(PD7); D6 GPO(PD6); D5 GPO(PD5); D4 GPO(PD4);
110 * D3 GPO(PD3); D2 GPO(PD2); D1 GPO(PD1); D0 GPO(PD0); 110 * D3 GPO(PD3); D2 GPO(PD2); D1 GPO(PD1); D0 GPO(PD0);
111 */ 111 */
112 ctrl_outw(0x5555, PORT_PDCR); /* 01 01 01 01 01 01 01 01 */ 112 __raw_writew(0x5555, PORT_PDCR); /* 01 01 01 01 01 01 01 01 */
113 113
114 /* E7 (x); E6 GPI(nu); E5 GPI(nu); E4 LCD_M_DISP; 114 /* E7 (x); E6 GPI(nu); E5 GPI(nu); E4 LCD_M_DISP;
115 * E3 LCD_CL1; E2 LCD_CL2; E1 LCD_DON; E0 LCD_FLM; 115 * E3 LCD_CL1; E2 LCD_CL2; E1 LCD_DON; E0 LCD_FLM;
116 */ 116 */
117 ctrl_outw(0x3C00, PORT_PECR); /* 00 11 11 00 00 00 00 00 */ 117 __raw_writew(0x3C00, PORT_PECR); /* 00 11 11 00 00 00 00 00 */
118 118
119 /* F7 (x); F6 DA1(VLCD); F5 DA0(nc); F4 AN3; 119 /* F7 (x); F6 DA1(VLCD); F5 DA0(nc); F4 AN3;
120 * F3 AN2(MID_AD); F2 AN1(EARTH_AD); F1 AN0(TEMP); F0 GPI+(nc); 120 * F3 AN2(MID_AD); F2 AN1(EARTH_AD); F1 AN0(TEMP); F0 GPI+(nc);
121 */ 121 */
122 ctrl_outw(0x0002, PORT_PFCR); /* 00 00 00 00 00 00 00 10 */ 122 __raw_writew(0x0002, PORT_PFCR); /* 00 00 00 00 00 00 00 10 */
123 123
124 /* G7 (x); G6 IRQ5(TOUCH_BUSY); G5 IRQ4(TOUCH_IRQ); G4 GPI(KEY2); 124 /* G7 (x); G6 IRQ5(TOUCH_BUSY); G5 IRQ4(TOUCH_IRQ); G4 GPI(KEY2);
125 * G3 GPI(KEY1); G2 GPO(LED11); G1 GPO(LED10); G0 GPO(LED9); 125 * G3 GPI(KEY1); G2 GPO(LED11); G1 GPO(LED10); G0 GPO(LED9);
126 */ 126 */
127 ctrl_outw(0x03D5, PORT_PGCR); /* 00 00 00 11 11 01 01 01 */ 127 __raw_writew(0x03D5, PORT_PGCR); /* 00 00 00 11 11 01 01 01 */
128 128
129 /* H7 (x); H6 /RAS(BRAS); H5 /CAS(BCAS); H4 CKE(BCKE); 129 /* H7 (x); H6 /RAS(BRAS); H5 /CAS(BCAS); H4 CKE(BCKE);
130 * H3 GPO(EARTH_OFF); H2 GPO(EARTH_TEST); H1 USB2_PWR; H0 USB1_PWR; 130 * H3 GPO(EARTH_OFF); H2 GPO(EARTH_TEST); H1 USB2_PWR; H0 USB1_PWR;
131 */ 131 */
132 ctrl_outw(0x0050, PORT_PHCR); /* 00 00 00 00 01 01 00 00 */ 132 __raw_writew(0x0050, PORT_PHCR); /* 00 00 00 00 01 01 00 00 */
133 133
134 /* J7 (x); J6 AUDCK; J5 ASEBRKAK; J4 AUDATA3; 134 /* J7 (x); J6 AUDCK; J5 ASEBRKAK; J4 AUDATA3;
135 * J3 AUDATA2; J2 AUDATA1; J1 AUDATA0; J0 AUDSYNC; 135 * J3 AUDATA2; J2 AUDATA1; J1 AUDATA0; J0 AUDSYNC;
136 */ 136 */
137 ctrl_outw(0x0000, PORT_PJCR); /* 00 00 00 00 00 00 00 00 */ 137 __raw_writew(0x0000, PORT_PJCR); /* 00 00 00 00 00 00 00 00 */
138 138
139 /* K7 (x); K6 (x); K5 (x); K4 (x); 139 /* K7 (x); K6 (x); K5 (x); K4 (x);
140 * K3 PINT7(/PWR2); K2 PINT6(/PWR1); K1 PINT5(nu); K0 PINT4(FLASH_READY) 140 * K3 PINT7(/PWR2); K2 PINT6(/PWR1); K1 PINT5(nu); K0 PINT4(FLASH_READY)
141 */ 141 */
142 ctrl_outw(0x00FF, PORT_PKCR); /* 00 00 00 00 11 11 11 11 */ 142 __raw_writew(0x00FF, PORT_PKCR); /* 00 00 00 00 11 11 11 11 */
143 143
144 /* L7 TRST; L6 TMS; L5 TDO; L4 TDI; 144 /* L7 TRST; L6 TMS; L5 TDO; L4 TDI;
145 * L3 TCK; L2 (x); L1 (x); L0 (x); 145 * L3 TCK; L2 (x); L1 (x); L0 (x);
146 */ 146 */
147 ctrl_outw(0x0000, PORT_PLCR); /* 00 00 00 00 00 00 00 00 */ 147 __raw_writew(0x0000, PORT_PLCR); /* 00 00 00 00 00 00 00 00 */
148 148
149 /* M7 GPO(CURRENT_SINK); M6 GPO(PWR_SWITCH); M5 GPO(LAN_SPEED); 149 /* M7 GPO(CURRENT_SINK); M6 GPO(PWR_SWITCH); M5 GPO(LAN_SPEED);
150 * M4 GPO(LAN_RESET); M3 GPO(BUZZER); M2 GPO(LCD_BL); 150 * M4 GPO(LAN_RESET); M3 GPO(BUZZER); M2 GPO(LCD_BL);
151 * M1 CS5B(CAN3_CS); M0 GPI+(nc); 151 * M1 CS5B(CAN3_CS); M0 GPI+(nc);
152 */ 152 */
153 ctrl_outw(0x5552, PORT_PMCR); /* 01 01 01 01 01 01 00 10 */ 153 __raw_writew(0x5552, PORT_PMCR); /* 01 01 01 01 01 01 00 10 */
154 154
155 /* CURRENT_SINK=off, PWR_SWITCH=off, LAN_SPEED=100MBit, 155 /* CURRENT_SINK=off, PWR_SWITCH=off, LAN_SPEED=100MBit,
156 * LAN_RESET=off, BUZZER=off, LCD_BL=off 156 * LAN_RESET=off, BUZZER=off, LCD_BL=off
157 */ 157 */
158#if CONFIG_SH_MAGIC_PANEL_R2_VERSION == 2 158#if CONFIG_SH_MAGIC_PANEL_R2_VERSION == 2
159 ctrl_outb(0x30, PORT_PMDR); 159 __raw_writeb(0x30, PORT_PMDR);
160#elif CONFIG_SH_MAGIC_PANEL_R2_VERSION == 3 160#elif CONFIG_SH_MAGIC_PANEL_R2_VERSION == 3
161 ctrl_outb(0xF0, PORT_PMDR); 161 __raw_writeb(0xF0, PORT_PMDR);
162#else 162#else
163#error Unknown revision of PLATFORM_MP_R2 163#error Unknown revision of PLATFORM_MP_R2
164#endif 164#endif
@@ -167,8 +167,8 @@ static void __init setup_port_multiplexing(void)
167 * P4 GPO(nu); P3 IRQ3(LAN_IRQ); P2 IRQ2(CAN3_IRQ); 167 * P4 GPO(nu); P3 IRQ3(LAN_IRQ); P2 IRQ2(CAN3_IRQ);
168 * P1 IRQ1(CAN2_IRQ); P0 IRQ0(CAN1_IRQ) 168 * P1 IRQ1(CAN2_IRQ); P0 IRQ0(CAN1_IRQ)
169 */ 169 */
170 ctrl_outw(0x0100, PORT_PPCR); /* 00 00 00 01 00 00 00 00 */ 170 __raw_writew(0x0100, PORT_PPCR); /* 00 00 00 01 00 00 00 00 */
171 ctrl_outb(0x10, PORT_PPDR); 171 __raw_writeb(0x10, PORT_PPDR);
172 172
173 /* R7 A25; R6 A24; R5 A23; R4 A22; 173 /* R7 A25; R6 A24; R5 A23; R4 A22;
174 * R3 A21; R2 A20; R1 A19; R0 A0; 174 * R3 A21; R2 A20; R1 A19; R0 A0;
@@ -185,22 +185,22 @@ static void __init setup_port_multiplexing(void)
185 /* S7 (x); S6 (x); S5 (x); S4 GPO(EEPROM_CS2); 185 /* S7 (x); S6 (x); S5 (x); S4 GPO(EEPROM_CS2);
186 * S3 GPO(EEPROM_CS1); S2 SIOF0_TXD; S1 SIOF0_RXD; S0 SIOF0_SCK; 186 * S3 GPO(EEPROM_CS1); S2 SIOF0_TXD; S1 SIOF0_RXD; S0 SIOF0_SCK;
187 */ 187 */
188 ctrl_outw(0x0140, PORT_PSCR); /* 00 00 00 01 01 00 00 00 */ 188 __raw_writew(0x0140, PORT_PSCR); /* 00 00 00 01 01 00 00 00 */
189 189
190 /* T7 (x); T6 (x); T5 (x); T4 COM1_CTS; 190 /* T7 (x); T6 (x); T5 (x); T4 COM1_CTS;
191 * T3 COM1_RTS; T2 COM1_TXD; T1 COM1_RXD; T0 GPO(WDOG) 191 * T3 COM1_RTS; T2 COM1_TXD; T1 COM1_RXD; T0 GPO(WDOG)
192 */ 192 */
193 ctrl_outw(0x0001, PORT_PTCR); /* 00 00 00 00 00 00 00 01 */ 193 __raw_writew(0x0001, PORT_PTCR); /* 00 00 00 00 00 00 00 01 */
194 194
195 /* U7 (x); U6 (x); U5 (x); U4 GPI+(/AC_FAULT); 195 /* U7 (x); U6 (x); U5 (x); U4 GPI+(/AC_FAULT);
196 * U3 GPO(TOUCH_CS); U2 TOUCH_TXD; U1 TOUCH_RXD; U0 TOUCH_SCK; 196 * U3 GPO(TOUCH_CS); U2 TOUCH_TXD; U1 TOUCH_RXD; U0 TOUCH_SCK;
197 */ 197 */
198 ctrl_outw(0x0240, PORT_PUCR); /* 00 00 00 10 01 00 00 00 */ 198 __raw_writew(0x0240, PORT_PUCR); /* 00 00 00 10 01 00 00 00 */
199 199
200 /* V7 (x); V6 (x); V5 (x); V4 GPO(MID2); 200 /* V7 (x); V6 (x); V5 (x); V4 GPO(MID2);
201 * V3 GPO(MID1); V2 CARD_TxD; V1 CARD_RxD; V0 GPI+(/BAT_FAULT); 201 * V3 GPO(MID1); V2 CARD_TxD; V1 CARD_RxD; V0 GPI+(/BAT_FAULT);
202 */ 202 */
203 ctrl_outw(0x0142, PORT_PVCR); /* 00 00 00 01 01 00 00 10 */ 203 __raw_writew(0x0142, PORT_PVCR); /* 00 00 00 01 01 00 00 10 */
204} 204}
205 205
206static void __init mpr2_setup(char **cmdline_p) 206static void __init mpr2_setup(char **cmdline_p)
@@ -209,24 +209,24 @@ static void __init mpr2_setup(char **cmdline_p)
209 * /PCC_CD1, /PCC_CD2, PCC_BVD1, PCC_BVD2, 209 * /PCC_CD1, /PCC_CD2, PCC_BVD1, PCC_BVD2,
210 * /IOIS16, IRQ4, IRQ5, USB1d_SUSPEND 210 * /IOIS16, IRQ4, IRQ5, USB1d_SUSPEND
211 */ 211 */
212 ctrl_outw(0xAABC, PORT_PSELA); 212 __raw_writew(0xAABC, PORT_PSELA);
213 /* set Pin Select Register B: 213 /* set Pin Select Register B:
214 * /SCIF0_RTS, /SCIF0_CTS, LCD_VCPWC, 214 * /SCIF0_RTS, /SCIF0_CTS, LCD_VCPWC,
215 * LCD_VEPWC, IIC_SDA, IIC_SCL, Reserved 215 * LCD_VEPWC, IIC_SDA, IIC_SCL, Reserved
216 */ 216 */
217 ctrl_outw(0x3C00, PORT_PSELB); 217 __raw_writew(0x3C00, PORT_PSELB);
218 /* set Pin Select Register C: 218 /* set Pin Select Register C:
219 * SIOF1_SCK, SIOF1_RxD, SCIF1_RxD, SCIF1_TxD, Reserved 219 * SIOF1_SCK, SIOF1_RxD, SCIF1_RxD, SCIF1_TxD, Reserved
220 */ 220 */
221 ctrl_outw(0x0000, PORT_PSELC); 221 __raw_writew(0x0000, PORT_PSELC);
222 /* set Pin Select Register D: Reserved, SIOF1_TxD, Reserved, SIOF1_MCLK, 222 /* set Pin Select Register D: Reserved, SIOF1_TxD, Reserved, SIOF1_MCLK,
223 * Reserved, SIOF1_SYNC, Reserved, SCIF1_SCK, Reserved 223 * Reserved, SIOF1_SYNC, Reserved, SCIF1_SCK, Reserved
224 */ 224 */
225 ctrl_outw(0x0000, PORT_PSELD); 225 __raw_writew(0x0000, PORT_PSELD);
226 /* set USB TxRx Control: Reserved, DRV, Reserved, USB_TRANS, USB_SEL */ 226 /* set USB TxRx Control: Reserved, DRV, Reserved, USB_TRANS, USB_SEL */
227 ctrl_outw(0x0101, PORT_UTRCTL); 227 __raw_writew(0x0101, PORT_UTRCTL);
228 /* set USB Clock Control: USSCS, USSTB, Reserved (HighByte always A5) */ 228 /* set USB Clock Control: USSCS, USSTB, Reserved (HighByte always A5) */
229 ctrl_outw(0xA5C0, PORT_UCLKCR_W); 229 __raw_writew(0xA5C0, PORT_UCLKCR_W);
230 230
231 setup_chip_select(); 231 setup_chip_select();
232 232
diff --git a/arch/sh/boards/board-polaris.c b/arch/sh/boards/board-polaris.c
index 62607eb51004..594866356c24 100644
--- a/arch/sh/boards/board-polaris.c
+++ b/arch/sh/boards/board-polaris.c
@@ -59,15 +59,12 @@ static unsigned char heartbeat_bit_pos[] = { 0, 1, 2, 3 };
59static struct heartbeat_data heartbeat_data = { 59static struct heartbeat_data heartbeat_data = {
60 .bit_pos = heartbeat_bit_pos, 60 .bit_pos = heartbeat_bit_pos,
61 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos), 61 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
62 .regsize = 8,
63}; 62};
64 63
65static struct resource heartbeat_resources[] = { 64static struct resource heartbeat_resource = {
66 [0] = { 65 .start = PORT_PCDR,
67 .start = PORT_PCDR, 66 .end = PORT_PCDR,
68 .end = PORT_PCDR, 67 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
69 .flags = IORESOURCE_MEM,
70 },
71}; 68};
72 69
73static struct platform_device heartbeat_device = { 70static struct platform_device heartbeat_device = {
@@ -76,8 +73,8 @@ static struct platform_device heartbeat_device = {
76 .dev = { 73 .dev = {
77 .platform_data = &heartbeat_data, 74 .platform_data = &heartbeat_data,
78 }, 75 },
79 .num_resources = ARRAY_SIZE(heartbeat_resources), 76 .num_resources = 1,
80 .resource = heartbeat_resources, 77 .resource = &heartbeat_resource,
81}; 78};
82 79
83static struct platform_device *polaris_devices[] __initdata = { 80static struct platform_device *polaris_devices[] __initdata = {
@@ -92,15 +89,15 @@ static int __init polaris_initialise(void)
92 printk(KERN_INFO "Configuring Polaris external bus\n"); 89 printk(KERN_INFO "Configuring Polaris external bus\n");
93 90
94 /* Configure area 5 with 2 wait states */ 91 /* Configure area 5 with 2 wait states */
95 wcr = ctrl_inw(WCR2); 92 wcr = __raw_readw(WCR2);
96 wcr &= (~AREA5_WAIT_CTRL); 93 wcr &= (~AREA5_WAIT_CTRL);
97 wcr |= (WAIT_STATES_10 << 10); 94 wcr |= (WAIT_STATES_10 << 10);
98 ctrl_outw(wcr, WCR2); 95 __raw_writew(wcr, WCR2);
99 96
100 /* Configure area 5 for 32-bit access */ 97 /* Configure area 5 for 32-bit access */
101 bcr_mask = ctrl_inw(BCR2); 98 bcr_mask = __raw_readw(BCR2);
102 bcr_mask |= 1 << 10; 99 bcr_mask |= 1 << 10;
103 ctrl_outw(bcr_mask, BCR2); 100 __raw_writew(bcr_mask, BCR2);
104 101
105 return platform_add_devices(polaris_devices, 102 return platform_add_devices(polaris_devices,
106 ARRAY_SIZE(polaris_devices)); 103 ARRAY_SIZE(polaris_devices));
@@ -131,13 +128,13 @@ static struct ipr_desc ipr_irq_desc = {
131static void __init init_polaris_irq(void) 128static void __init init_polaris_irq(void)
132{ 129{
133 /* Disable all interrupts */ 130 /* Disable all interrupts */
134 ctrl_outw(0, BCR_ILCRA); 131 __raw_writew(0, BCR_ILCRA);
135 ctrl_outw(0, BCR_ILCRB); 132 __raw_writew(0, BCR_ILCRB);
136 ctrl_outw(0, BCR_ILCRC); 133 __raw_writew(0, BCR_ILCRC);
137 ctrl_outw(0, BCR_ILCRD); 134 __raw_writew(0, BCR_ILCRD);
138 ctrl_outw(0, BCR_ILCRE); 135 __raw_writew(0, BCR_ILCRE);
139 ctrl_outw(0, BCR_ILCRF); 136 __raw_writew(0, BCR_ILCRF);
140 ctrl_outw(0, BCR_ILCRG); 137 __raw_writew(0, BCR_ILCRG);
141 138
142 register_ipr_controller(&ipr_irq_desc); 139 register_ipr_controller(&ipr_irq_desc);
143} 140}
diff --git a/arch/sh/boards/board-sh7785lcr.c b/arch/sh/boards/board-sh7785lcr.c
index e5a8a2fde39c..fe7e686c94ac 100644
--- a/arch/sh/boards/board-sh7785lcr.c
+++ b/arch/sh/boards/board-sh7785lcr.c
@@ -21,6 +21,7 @@
21#include <linux/i2c-algo-pca.h> 21#include <linux/i2c-algo-pca.h>
22#include <linux/usb/r8a66597.h> 22#include <linux/usb/r8a66597.h>
23#include <linux/irq.h> 23#include <linux/irq.h>
24#include <linux/io.h>
24#include <linux/clk.h> 25#include <linux/clk.h>
25#include <linux/errno.h> 26#include <linux/errno.h>
26#include <mach/sh7785lcr.h> 27#include <mach/sh7785lcr.h>
@@ -32,26 +33,17 @@
32 * NOTE: This board has 2 physical memory maps. 33 * NOTE: This board has 2 physical memory maps.
33 * Please look at include/asm-sh/sh7785lcr.h or hardware manual. 34 * Please look at include/asm-sh/sh7785lcr.h or hardware manual.
34 */ 35 */
35static struct resource heartbeat_resources[] = { 36static struct resource heartbeat_resource = {
36 [0] = { 37 .start = PLD_LEDCR,
37 .start = PLD_LEDCR, 38 .end = PLD_LEDCR,
38 .end = PLD_LEDCR, 39 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
39 .flags = IORESOURCE_MEM,
40 },
41};
42
43static struct heartbeat_data heartbeat_data = {
44 .regsize = 8,
45}; 40};
46 41
47static struct platform_device heartbeat_device = { 42static struct platform_device heartbeat_device = {
48 .name = "heartbeat", 43 .name = "heartbeat",
49 .id = -1, 44 .id = -1,
50 .dev = { 45 .num_resources = 1,
51 .platform_data = &heartbeat_data, 46 .resource = &heartbeat_resource,
52 },
53 .num_resources = ARRAY_SIZE(heartbeat_resources),
54 .resource = heartbeat_resources,
55}; 47};
56 48
57static struct mtd_partition nor_flash_partitions[] = { 49static struct mtd_partition nor_flash_partitions[] = {
@@ -341,8 +333,14 @@ static void __init sh7785lcr_setup(char **cmdline_p)
341 pm_power_off = sh7785lcr_power_off; 333 pm_power_off = sh7785lcr_power_off;
342 334
343 /* sm501 DRAM configuration */ 335 /* sm501 DRAM configuration */
344 sm501_reg = (void __iomem *)0xb3e00000 + SM501_DRAM_CONTROL; 336 sm501_reg = ioremap_nocache(SM107_REG_ADDR, SM501_DRAM_CONTROL);
345 writel(0x000307c2, sm501_reg); 337 if (!sm501_reg) {
338 printk(KERN_ERR "%s: ioremap error.\n", __func__);
339 return;
340 }
341
342 writel(0x000307c2, sm501_reg + SM501_DRAM_CONTROL);
343 iounmap(sm501_reg);
346} 344}
347 345
348/* Return the board specific boot mode pin configuration */ 346/* Return the board specific boot mode pin configuration */
diff --git a/arch/sh/boards/board-shmin.c b/arch/sh/boards/board-shmin.c
index b1dcbbc89188..325bed53b87e 100644
--- a/arch/sh/boards/board-shmin.c
+++ b/arch/sh/boards/board-shmin.c
@@ -17,8 +17,8 @@
17 17
18static void __init init_shmin_irq(void) 18static void __init init_shmin_irq(void)
19{ 19{
20 ctrl_outw(0x2a00, PFC_PHCR); // IRQ0-3=IRQ 20 __raw_writew(0x2a00, PFC_PHCR); // IRQ0-3=IRQ
21 ctrl_outw(0x0aaa, INTC_ICR1); // IRQ0-3=IRQ-mode,Low-active. 21 __raw_writew(0x0aaa, INTC_ICR1); // IRQ0-3=IRQ-mode,Low-active.
22 plat_irq_setup_pins(IRQ_MODE_IRQ); 22 plat_irq_setup_pins(IRQ_MODE_IRQ);
23} 23}
24 24
diff --git a/arch/sh/boards/mach-titan/setup.c b/arch/sh/boards/board-titan.c
index 81e7e0f03863..94c36c7bc0b3 100644
--- a/arch/sh/boards/mach-titan/setup.c
+++ b/arch/sh/boards/board-titan.c
@@ -19,26 +19,6 @@ static void __init init_titan_irq(void)
19} 19}
20 20
21static struct sh_machine_vector mv_titan __initmv = { 21static struct sh_machine_vector mv_titan __initmv = {
22 .mv_name = "Titan", 22 .mv_name = "Titan",
23 23 .mv_init_irq = init_titan_irq,
24 .mv_inb = titan_inb,
25 .mv_inw = titan_inw,
26 .mv_inl = titan_inl,
27 .mv_outb = titan_outb,
28 .mv_outw = titan_outw,
29 .mv_outl = titan_outl,
30
31 .mv_inb_p = titan_inb_p,
32 .mv_inw_p = titan_inw,
33 .mv_inl_p = titan_inl,
34 .mv_outb_p = titan_outb_p,
35 .mv_outw_p = titan_outw,
36 .mv_outl_p = titan_outl,
37
38 .mv_insl = titan_insl,
39 .mv_outsl = titan_outsl,
40
41 .mv_ioport_map = titan_ioport_map,
42
43 .mv_init_irq = init_titan_irq,
44}; 24};
diff --git a/arch/sh/boards/board-urquell.c b/arch/sh/boards/board-urquell.c
index 36b8bac9b124..a9bd6e3ee10b 100644
--- a/arch/sh/boards/board-urquell.c
+++ b/arch/sh/boards/board-urquell.c
@@ -2,7 +2,7 @@
2 * Renesas Technology Corp. SH7786 Urquell Support. 2 * Renesas Technology Corp. SH7786 Urquell Support.
3 * 3 *
4 * Copyright (C) 2008 Kuninori Morimoto <morimoto.kuninori@renesas.com> 4 * Copyright (C) 2008 Kuninori Morimoto <morimoto.kuninori@renesas.com>
5 * Copyright (C) 2009 Paul Mundt 5 * Copyright (C) 2009, 2010 Paul Mundt
6 * 6 *
7 * Based on board-sh7785lcr.c 7 * Based on board-sh7785lcr.c
8 * Copyright (C) 2008 Yoshihiro Shimoda 8 * Copyright (C) 2008 Yoshihiro Shimoda
@@ -19,6 +19,7 @@
19#include <linux/delay.h> 19#include <linux/delay.h>
20#include <linux/gpio.h> 20#include <linux/gpio.h>
21#include <linux/irq.h> 21#include <linux/irq.h>
22#include <linux/clk.h>
22#include <mach/urquell.h> 23#include <mach/urquell.h>
23#include <cpu/sh7786.h> 24#include <cpu/sh7786.h>
24#include <asm/heartbeat.h> 25#include <asm/heartbeat.h>
@@ -50,26 +51,17 @@
50 */ 51 */
51 52
52/* HeartBeat */ 53/* HeartBeat */
53static struct resource heartbeat_resources[] = { 54static struct resource heartbeat_resource = {
54 [0] = { 55 .start = BOARDREG(SLEDR),
55 .start = BOARDREG(SLEDR), 56 .end = BOARDREG(SLEDR),
56 .end = BOARDREG(SLEDR), 57 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
57 .flags = IORESOURCE_MEM,
58 },
59};
60
61static struct heartbeat_data heartbeat_data = {
62 .regsize = 16,
63}; 58};
64 59
65static struct platform_device heartbeat_device = { 60static struct platform_device heartbeat_device = {
66 .name = "heartbeat", 61 .name = "heartbeat",
67 .id = -1, 62 .id = -1,
68 .dev = { 63 .num_resources = 1,
69 .platform_data = &heartbeat_data, 64 .resource = &heartbeat_resource,
70 },
71 .num_resources = ARRAY_SIZE(heartbeat_resources),
72 .resource = heartbeat_resources,
73}; 65};
74 66
75/* LAN91C111 */ 67/* LAN91C111 */
@@ -184,6 +176,27 @@ static int urquell_mode_pins(void)
184 return __raw_readw(UBOARDREG(MDSWMR)); 176 return __raw_readw(UBOARDREG(MDSWMR));
185} 177}
186 178
179static int urquell_clk_init(void)
180{
181 struct clk *clk;
182 int ret;
183
184 /*
185 * Only handle the EXTAL case, anyone interfacing a crystal
186 * resonator will need to provide their own input clock.
187 */
188 if (test_mode_pin(MODE_PIN9))
189 return -EINVAL;
190
191 clk = clk_get(NULL, "extal");
192 if (!clk || IS_ERR(clk))
193 return PTR_ERR(clk);
194 ret = clk_set_rate(clk, 33333333);
195 clk_put(clk);
196
197 return ret;
198}
199
187/* Initialize the board */ 200/* Initialize the board */
188static void __init urquell_setup(char **cmdline_p) 201static void __init urquell_setup(char **cmdline_p)
189{ 202{
@@ -200,4 +213,5 @@ static struct sh_machine_vector mv_urquell __initmv = {
200 .mv_setup = urquell_setup, 213 .mv_setup = urquell_setup,
201 .mv_init_irq = urquell_init_irq, 214 .mv_init_irq = urquell_init_irq,
202 .mv_mode_pins = urquell_mode_pins, 215 .mv_mode_pins = urquell_mode_pins,
216 .mv_clk_init = urquell_clk_init,
203}; 217};
diff --git a/arch/sh/boards/mach-ap325rxa/Makefile b/arch/sh/boards/mach-ap325rxa/Makefile
new file mode 100644
index 000000000000..4cf1774d2613
--- /dev/null
+++ b/arch/sh/boards/mach-ap325rxa/Makefile
@@ -0,0 +1,2 @@
1obj-y := setup.o sdram.o
2
diff --git a/arch/sh/boards/mach-ap325rxa/sdram.S b/arch/sh/boards/mach-ap325rxa/sdram.S
new file mode 100644
index 000000000000..db24fbed4fca
--- /dev/null
+++ b/arch/sh/boards/mach-ap325rxa/sdram.S
@@ -0,0 +1,69 @@
1/*
2 * AP325RXA sdram self/auto-refresh setup code
3 *
4 * Copyright (C) 2009 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/sys.h>
12#include <linux/errno.h>
13#include <linux/linkage.h>
14#include <asm/asm-offsets.h>
15#include <asm/suspend.h>
16#include <asm/romimage-macros.h>
17
18/* code to enter and leave self-refresh. must be self-contained.
19 * this code will be copied to on-chip memory and executed from there.
20 */
21 .balign 4
22ENTRY(ap325rxa_sdram_enter_start)
23
24 /* SBSC: disable power down and put in self-refresh mode */
25 mov.l 1f, r4
26 mov.l 2f, r1
27 mov.l @r4, r2
28 or r1, r2
29 mov.l 3f, r3
30 and r3, r2
31 mov.l r2, @r4
32
33 rts
34 nop
35
36 .balign 4
371: .long 0xfe400008 /* SDCR0 */
382: .long 0x00000400
393: .long 0xffff7fff
40ENTRY(ap325rxa_sdram_enter_end)
41
42 .balign 4
43ENTRY(ap325rxa_sdram_leave_start)
44
45 /* SBSC: set auto-refresh mode */
46 mov.l 1f, r4
47 mov.l @r4, r0
48 mov.l 4f, r1
49 and r1, r0
50 mov.l r0, @r4
51 mov.l 6f, r4
52 mov.l 8f, r0
53 mov.l @r4, r1
54 mov #-1, r4
55 add r4, r1
56 or r1, r0
57 mov.l 7f, r1
58 mov.l r0, @r1
59
60 rts
61 nop
62
63 .balign 4
641: .long 0xfe400008 /* SDCR0 */
654: .long 0xfffffbff
666: .long 0xfe40001c /* RTCOR */
677: .long 0xfe400018 /* RTCNT */
688: .long 0xa55a0000
69ENTRY(ap325rxa_sdram_leave_end)
diff --git a/arch/sh/boards/board-ap325rxa.c b/arch/sh/boards/mach-ap325rxa/setup.c
index 2d080732a964..57e37e284208 100644
--- a/arch/sh/boards/board-ap325rxa.c
+++ b/arch/sh/boards/mach-ap325rxa/setup.c
@@ -20,8 +20,6 @@
20#include <linux/i2c.h> 20#include <linux/i2c.h>
21#include <linux/smsc911x.h> 21#include <linux/smsc911x.h>
22#include <linux/gpio.h> 22#include <linux/gpio.h>
23#include <linux/spi/spi.h>
24#include <linux/spi/spi_gpio.h>
25#include <media/ov772x.h> 23#include <media/ov772x.h>
26#include <media/soc_camera.h> 24#include <media/soc_camera.h>
27#include <media/soc_camera_platform.h> 25#include <media/soc_camera_platform.h>
@@ -29,6 +27,7 @@
29#include <video/sh_mobile_lcdc.h> 27#include <video/sh_mobile_lcdc.h>
30#include <asm/io.h> 28#include <asm/io.h>
31#include <asm/clock.h> 29#include <asm/clock.h>
30#include <asm/suspend.h>
32#include <cpu/sh7723.h> 31#include <cpu/sh7723.h>
33 32
34static struct smsc911x_platform_config smsc911x_config = { 33static struct smsc911x_platform_config smsc911x_config = {
@@ -160,21 +159,21 @@ static void ap320_wvga_power_on(void *board_data)
160 msleep(100); 159 msleep(100);
161 160
162 /* ASD AP-320/325 LCD ON */ 161 /* ASD AP-320/325 LCD ON */
163 ctrl_outw(FPGA_LCDREG_VAL, FPGA_LCDREG); 162 __raw_writew(FPGA_LCDREG_VAL, FPGA_LCDREG);
164 163
165 /* backlight */ 164 /* backlight */
166 gpio_set_value(GPIO_PTS3, 0); 165 gpio_set_value(GPIO_PTS3, 0);
167 ctrl_outw(0x100, FPGA_BKLREG); 166 __raw_writew(0x100, FPGA_BKLREG);
168} 167}
169 168
170static void ap320_wvga_power_off(void *board_data) 169static void ap320_wvga_power_off(void *board_data)
171{ 170{
172 /* backlight */ 171 /* backlight */
173 ctrl_outw(0, FPGA_BKLREG); 172 __raw_writew(0, FPGA_BKLREG);
174 gpio_set_value(GPIO_PTS3, 1); 173 gpio_set_value(GPIO_PTS3, 1);
175 174
176 /* ASD AP-320/325 LCD OFF */ 175 /* ASD AP-320/325 LCD OFF */
177 ctrl_outw(0, FPGA_LCDREG); 176 __raw_writew(0, FPGA_LCDREG);
178} 177}
179 178
180static struct sh_mobile_lcdc_info lcdc_info = { 179static struct sh_mobile_lcdc_info lcdc_info = {
@@ -317,20 +316,24 @@ static struct soc_camera_platform_info camera_info = {
317 .format_name = "UYVY", 316 .format_name = "UYVY",
318 .format_depth = 16, 317 .format_depth = 16,
319 .format = { 318 .format = {
320 .pixelformat = V4L2_PIX_FMT_UYVY, 319 .code = V4L2_MBUS_FMT_YUYV8_2X8_BE,
321 .colorspace = V4L2_COLORSPACE_SMPTE170M, 320 .colorspace = V4L2_COLORSPACE_SMPTE170M,
321 .field = V4L2_FIELD_NONE,
322 .width = 640, 322 .width = 640,
323 .height = 480, 323 .height = 480,
324 }, 324 },
325 .bus_param = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH | 325 .bus_param = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH |
326 SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8, 326 SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8 |
327 SOCAM_DATA_ACTIVE_HIGH,
327 .set_capture = camera_set_capture, 328 .set_capture = camera_set_capture,
328 .link = { 329};
329 .bus_id = 0, 330
330 .add_device = ap325rxa_camera_add, 331struct soc_camera_link camera_link = {
331 .del_device = ap325rxa_camera_del, 332 .bus_id = 0,
332 .module_name = "soc_camera_platform", 333 .add_device = ap325rxa_camera_add,
333 }, 334 .del_device = ap325rxa_camera_del,
335 .module_name = "soc_camera_platform",
336 .priv = &camera_info,
334}; 337};
335 338
336static void dummy_release(struct device *dev) 339static void dummy_release(struct device *dev)
@@ -348,7 +351,7 @@ static struct platform_device camera_device = {
348static int ap325rxa_camera_add(struct soc_camera_link *icl, 351static int ap325rxa_camera_add(struct soc_camera_link *icl,
349 struct device *dev) 352 struct device *dev)
350{ 353{
351 if (icl != &camera_info.link || camera_probe() <= 0) 354 if (icl != &camera_link || camera_probe() <= 0)
352 return -ENODEV; 355 return -ENODEV;
353 356
354 camera_info.dev = dev; 357 camera_info.dev = dev;
@@ -358,7 +361,7 @@ static int ap325rxa_camera_add(struct soc_camera_link *icl,
358 361
359static void ap325rxa_camera_del(struct soc_camera_link *icl) 362static void ap325rxa_camera_del(struct soc_camera_link *icl)
360{ 363{
361 if (icl != &camera_info.link) 364 if (icl != &camera_link)
362 return; 365 return;
363 366
364 platform_device_unregister(&camera_device); 367 platform_device_unregister(&camera_device);
@@ -409,17 +412,49 @@ static struct platform_device ceu_device = {
409 }, 412 },
410}; 413};
411 414
412struct spi_gpio_platform_data sdcard_cn3_platform_data = { 415static struct resource sdhi0_cn3_resources[] = {
413 .sck = GPIO_PTD0, 416 [0] = {
414 .mosi = GPIO_PTD1, 417 .name = "SDHI0",
415 .miso = GPIO_PTD2, 418 .start = 0x04ce0000,
416 .num_chipselect = 1, 419 .end = 0x04ce01ff,
420 .flags = IORESOURCE_MEM,
421 },
422 [1] = {
423 .start = 100,
424 .flags = IORESOURCE_IRQ,
425 },
417}; 426};
418 427
419static struct platform_device sdcard_cn3_device = { 428static struct platform_device sdhi0_cn3_device = {
420 .name = "spi_gpio", 429 .name = "sh_mobile_sdhi",
421 .dev = { 430 .id = 0, /* "sdhi0" clock */
422 .platform_data = &sdcard_cn3_platform_data, 431 .num_resources = ARRAY_SIZE(sdhi0_cn3_resources),
432 .resource = sdhi0_cn3_resources,
433 .archdata = {
434 .hwblk_id = HWBLK_SDHI0,
435 },
436};
437
438static struct resource sdhi1_cn7_resources[] = {
439 [0] = {
440 .name = "SDHI1",
441 .start = 0x04cf0000,
442 .end = 0x04cf01ff,
443 .flags = IORESOURCE_MEM,
444 },
445 [1] = {
446 .start = 23,
447 .flags = IORESOURCE_IRQ,
448 },
449};
450
451static struct platform_device sdhi1_cn7_device = {
452 .name = "sh_mobile_sdhi",
453 .id = 1, /* "sdhi1" clock */
454 .num_resources = ARRAY_SIZE(sdhi1_cn7_resources),
455 .resource = sdhi1_cn7_resources,
456 .archdata = {
457 .hwblk_id = HWBLK_SDHI1,
423 }, 458 },
424}; 459};
425 460
@@ -436,16 +471,18 @@ static struct i2c_board_info ap325rxa_i2c_camera[] = {
436}; 471};
437 472
438static struct ov772x_camera_info ov7725_info = { 473static struct ov772x_camera_info ov7725_info = {
439 .buswidth = SOCAM_DATAWIDTH_8, 474 .flags = OV772X_FLAG_VFLIP | OV772X_FLAG_HFLIP | \
440 .flags = OV772X_FLAG_VFLIP | OV772X_FLAG_HFLIP, 475 OV772X_FLAG_8BIT,
441 .edgectrl = OV772X_AUTO_EDGECTRL(0xf, 0), 476 .edgectrl = OV772X_AUTO_EDGECTRL(0xf, 0),
442 .link = { 477};
443 .bus_id = 0, 478
444 .power = ov7725_power, 479static struct soc_camera_link ov7725_link = {
445 .board_info = &ap325rxa_i2c_camera[0], 480 .bus_id = 0,
446 .i2c_adapter_id = 0, 481 .power = ov7725_power,
447 .module_name = "ov772x", 482 .board_info = &ap325rxa_i2c_camera[0],
448 }, 483 .i2c_adapter_id = 0,
484 .module_name = "ov772x",
485 .priv = &ov7725_info,
449}; 486};
450 487
451static struct platform_device ap325rxa_camera[] = { 488static struct platform_device ap325rxa_camera[] = {
@@ -453,13 +490,13 @@ static struct platform_device ap325rxa_camera[] = {
453 .name = "soc-camera-pdrv", 490 .name = "soc-camera-pdrv",
454 .id = 0, 491 .id = 0,
455 .dev = { 492 .dev = {
456 .platform_data = &ov7725_info.link, 493 .platform_data = &ov7725_link,
457 }, 494 },
458 }, { 495 }, {
459 .name = "soc-camera-pdrv", 496 .name = "soc-camera-pdrv",
460 .id = 1, 497 .id = 1,
461 .dev = { 498 .dev = {
462 .platform_data = &camera_info.link, 499 .platform_data = &camera_link,
463 }, 500 },
464 }, 501 },
465}; 502};
@@ -470,22 +507,26 @@ static struct platform_device *ap325rxa_devices[] __initdata = {
470 &lcdc_device, 507 &lcdc_device,
471 &ceu_device, 508 &ceu_device,
472 &nand_flash_device, 509 &nand_flash_device,
473 &sdcard_cn3_device, 510 &sdhi0_cn3_device,
511 &sdhi1_cn7_device,
474 &ap325rxa_camera[0], 512 &ap325rxa_camera[0],
475 &ap325rxa_camera[1], 513 &ap325rxa_camera[1],
476}; 514};
477 515
478static struct spi_board_info ap325rxa_spi_devices[] = { 516extern char ap325rxa_sdram_enter_start;
479 { 517extern char ap325rxa_sdram_enter_end;
480 .modalias = "mmc_spi", 518extern char ap325rxa_sdram_leave_start;
481 .max_speed_hz = 5000000, 519extern char ap325rxa_sdram_leave_end;
482 .chip_select = 0,
483 .controller_data = (void *) GPIO_PTD5,
484 },
485};
486 520
487static int __init ap325rxa_devices_setup(void) 521static int __init ap325rxa_devices_setup(void)
488{ 522{
523 /* register board specific self-refresh code */
524 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF,
525 &ap325rxa_sdram_enter_start,
526 &ap325rxa_sdram_enter_end,
527 &ap325rxa_sdram_leave_start,
528 &ap325rxa_sdram_leave_end);
529
489 /* LD3 and LD4 LEDs */ 530 /* LD3 and LD4 LEDs */
490 gpio_request(GPIO_PTX5, NULL); /* RUN */ 531 gpio_request(GPIO_PTX5, NULL); /* RUN */
491 gpio_direction_output(GPIO_PTX5, 1); 532 gpio_direction_output(GPIO_PTX5, 1);
@@ -554,7 +595,7 @@ static int __init ap325rxa_devices_setup(void)
554 gpio_request(GPIO_PTZ4, NULL); 595 gpio_request(GPIO_PTZ4, NULL);
555 gpio_direction_output(GPIO_PTZ4, 0); /* SADDR */ 596 gpio_direction_output(GPIO_PTZ4, 0); /* SADDR */
556 597
557 ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB); 598 __raw_writew(__raw_readw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB);
558 599
559 /* FLCTL */ 600 /* FLCTL */
560 gpio_request(GPIO_FN_FCE, NULL); 601 gpio_request(GPIO_FN_FCE, NULL);
@@ -572,18 +613,34 @@ static int __init ap325rxa_devices_setup(void)
572 gpio_request(GPIO_FN_FWE, NULL); 613 gpio_request(GPIO_FN_FWE, NULL);
573 gpio_request(GPIO_FN_FRB, NULL); 614 gpio_request(GPIO_FN_FRB, NULL);
574 615
575 ctrl_outw(0, PORT_HIZCRC); 616 __raw_writew(0, PORT_HIZCRC);
576 ctrl_outw(0xFFFF, PORT_DRVCRA); 617 __raw_writew(0xFFFF, PORT_DRVCRA);
577 ctrl_outw(0xFFFF, PORT_DRVCRB); 618 __raw_writew(0xFFFF, PORT_DRVCRB);
578 619
579 platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20); 620 platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20);
580 621
622 /* SDHI0 - CN3 - SD CARD */
623 gpio_request(GPIO_FN_SDHI0CD_PTD, NULL);
624 gpio_request(GPIO_FN_SDHI0WP_PTD, NULL);
625 gpio_request(GPIO_FN_SDHI0D3_PTD, NULL);
626 gpio_request(GPIO_FN_SDHI0D2_PTD, NULL);
627 gpio_request(GPIO_FN_SDHI0D1_PTD, NULL);
628 gpio_request(GPIO_FN_SDHI0D0_PTD, NULL);
629 gpio_request(GPIO_FN_SDHI0CMD_PTD, NULL);
630 gpio_request(GPIO_FN_SDHI0CLK_PTD, NULL);
631
632 /* SDHI1 - CN7 - MICRO SD CARD */
633 gpio_request(GPIO_FN_SDHI1CD, NULL);
634 gpio_request(GPIO_FN_SDHI1D3, NULL);
635 gpio_request(GPIO_FN_SDHI1D2, NULL);
636 gpio_request(GPIO_FN_SDHI1D1, NULL);
637 gpio_request(GPIO_FN_SDHI1D0, NULL);
638 gpio_request(GPIO_FN_SDHI1CMD, NULL);
639 gpio_request(GPIO_FN_SDHI1CLK, NULL);
640
581 i2c_register_board_info(0, ap325rxa_i2c_devices, 641 i2c_register_board_info(0, ap325rxa_i2c_devices,
582 ARRAY_SIZE(ap325rxa_i2c_devices)); 642 ARRAY_SIZE(ap325rxa_i2c_devices));
583 643
584 spi_register_board_info(ap325rxa_spi_devices,
585 ARRAY_SIZE(ap325rxa_spi_devices));
586
587 return platform_add_devices(ap325rxa_devices, 644 return platform_add_devices(ap325rxa_devices,
588 ARRAY_SIZE(ap325rxa_devices)); 645 ARRAY_SIZE(ap325rxa_devices));
589} 646}
diff --git a/arch/sh/boards/mach-cayman/irq.c b/arch/sh/boards/mach-cayman/irq.c
index 33f770856319..1394b078db36 100644
--- a/arch/sh/boards/mach-cayman/irq.c
+++ b/arch/sh/boards/mach-cayman/irq.c
@@ -66,9 +66,9 @@ static void enable_cayman_irq(unsigned int irq)
66 reg = EPLD_MASK_BASE + ((irq / 8) << 2); 66 reg = EPLD_MASK_BASE + ((irq / 8) << 2);
67 bit = 1<<(irq % 8); 67 bit = 1<<(irq % 8);
68 local_irq_save(flags); 68 local_irq_save(flags);
69 mask = ctrl_inl(reg); 69 mask = __raw_readl(reg);
70 mask |= bit; 70 mask |= bit;
71 ctrl_outl(mask, reg); 71 __raw_writel(mask, reg);
72 local_irq_restore(flags); 72 local_irq_restore(flags);
73} 73}
74 74
@@ -83,9 +83,9 @@ void disable_cayman_irq(unsigned int irq)
83 reg = EPLD_MASK_BASE + ((irq / 8) << 2); 83 reg = EPLD_MASK_BASE + ((irq / 8) << 2);
84 bit = 1<<(irq % 8); 84 bit = 1<<(irq % 8);
85 local_irq_save(flags); 85 local_irq_save(flags);
86 mask = ctrl_inl(reg); 86 mask = __raw_readl(reg);
87 mask &= ~bit; 87 mask &= ~bit;
88 ctrl_outl(mask, reg); 88 __raw_writel(mask, reg);
89 local_irq_restore(flags); 89 local_irq_restore(flags);
90} 90}
91 91
@@ -109,8 +109,8 @@ int cayman_irq_demux(int evt)
109 unsigned long status; 109 unsigned long status;
110 int i; 110 int i;
111 111
112 status = ctrl_inl(EPLD_STATUS_BASE) & 112 status = __raw_readl(EPLD_STATUS_BASE) &
113 ctrl_inl(EPLD_MASK_BASE) & 0xff; 113 __raw_readl(EPLD_MASK_BASE) & 0xff;
114 if (status == 0) { 114 if (status == 0) {
115 irq = -1; 115 irq = -1;
116 } else { 116 } else {
@@ -126,8 +126,8 @@ int cayman_irq_demux(int evt)
126 unsigned long status; 126 unsigned long status;
127 int i; 127 int i;
128 128
129 status = ctrl_inl(EPLD_STATUS_BASE + 3 * sizeof(u32)) & 129 status = __raw_readl(EPLD_STATUS_BASE + 3 * sizeof(u32)) &
130 ctrl_inl(EPLD_MASK_BASE + 3 * sizeof(u32)) & 0xff; 130 __raw_readl(EPLD_MASK_BASE + 3 * sizeof(u32)) & 0xff;
131 if (status == 0) { 131 if (status == 0) {
132 irq = -1; 132 irq = -1;
133 } else { 133 } else {
diff --git a/arch/sh/boards/mach-dreamcast/irq.c b/arch/sh/boards/mach-dreamcast/irq.c
index f55fc8e795e9..d932667410ab 100644
--- a/arch/sh/boards/mach-dreamcast/irq.c
+++ b/arch/sh/boards/mach-dreamcast/irq.c
@@ -135,3 +135,30 @@ int systemasic_irq_demux(int irq)
135 /* Not reached */ 135 /* Not reached */
136 return irq; 136 return irq;
137} 137}
138
139void systemasic_irq_init(void)
140{
141 int i, nid = cpu_to_node(boot_cpu_data);
142
143 /* Assign all virtual IRQs to the System ASIC int. handler */
144 for (i = HW_EVENT_IRQ_BASE; i < HW_EVENT_IRQ_MAX; i++) {
145 unsigned int irq;
146
147 irq = create_irq_nr(i, nid);
148 if (unlikely(irq == 0)) {
149 pr_err("%s: failed hooking irq %d for systemasic\n",
150 __func__, i);
151 return;
152 }
153
154 if (unlikely(irq != i)) {
155 pr_err("%s: got irq %d but wanted %d, bailing.\n",
156 __func__, irq, i);
157 destroy_irq(irq);
158 return;
159 }
160
161 set_irq_chip_and_handler(i, &systemasic_int,
162 handle_level_irq);
163 }
164}
diff --git a/arch/sh/boards/mach-dreamcast/rtc.c b/arch/sh/boards/mach-dreamcast/rtc.c
index a7433685798d..061d65714fcc 100644
--- a/arch/sh/boards/mach-dreamcast/rtc.c
+++ b/arch/sh/boards/mach-dreamcast/rtc.c
@@ -35,11 +35,11 @@ static void aica_rtc_gettimeofday(struct timespec *ts)
35 unsigned long val1, val2; 35 unsigned long val1, val2;
36 36
37 do { 37 do {
38 val1 = ((ctrl_inl(AICA_RTC_SECS_H) & 0xffff) << 16) | 38 val1 = ((__raw_readl(AICA_RTC_SECS_H) & 0xffff) << 16) |
39 (ctrl_inl(AICA_RTC_SECS_L) & 0xffff); 39 (__raw_readl(AICA_RTC_SECS_L) & 0xffff);
40 40
41 val2 = ((ctrl_inl(AICA_RTC_SECS_H) & 0xffff) << 16) | 41 val2 = ((__raw_readl(AICA_RTC_SECS_H) & 0xffff) << 16) |
42 (ctrl_inl(AICA_RTC_SECS_L) & 0xffff); 42 (__raw_readl(AICA_RTC_SECS_L) & 0xffff);
43 } while (val1 != val2); 43 } while (val1 != val2);
44 44
45 ts->tv_sec = val1 - TWENTY_YEARS; 45 ts->tv_sec = val1 - TWENTY_YEARS;
@@ -60,14 +60,14 @@ static int aica_rtc_settimeofday(const time_t secs)
60 unsigned long adj = secs + TWENTY_YEARS; 60 unsigned long adj = secs + TWENTY_YEARS;
61 61
62 do { 62 do {
63 ctrl_outl((adj & 0xffff0000) >> 16, AICA_RTC_SECS_H); 63 __raw_writel((adj & 0xffff0000) >> 16, AICA_RTC_SECS_H);
64 ctrl_outl((adj & 0xffff), AICA_RTC_SECS_L); 64 __raw_writel((adj & 0xffff), AICA_RTC_SECS_L);
65 65
66 val1 = ((ctrl_inl(AICA_RTC_SECS_H) & 0xffff) << 16) | 66 val1 = ((__raw_readl(AICA_RTC_SECS_H) & 0xffff) << 16) |
67 (ctrl_inl(AICA_RTC_SECS_L) & 0xffff); 67 (__raw_readl(AICA_RTC_SECS_L) & 0xffff);
68 68
69 val2 = ((ctrl_inl(AICA_RTC_SECS_H) & 0xffff) << 16) | 69 val2 = ((__raw_readl(AICA_RTC_SECS_H) & 0xffff) << 16) |
70 (ctrl_inl(AICA_RTC_SECS_L) & 0xffff); 70 (__raw_readl(AICA_RTC_SECS_L) & 0xffff);
71 } while (val1 != val2); 71 } while (val1 != val2);
72 72
73 return 0; 73 return 0;
diff --git a/arch/sh/boards/mach-dreamcast/setup.c b/arch/sh/boards/mach-dreamcast/setup.c
index a4b7402d6176..ad1a4db72e04 100644
--- a/arch/sh/boards/mach-dreamcast/setup.c
+++ b/arch/sh/boards/mach-dreamcast/setup.c
@@ -28,25 +28,8 @@
28#include <asm/machvec.h> 28#include <asm/machvec.h>
29#include <mach/sysasic.h> 29#include <mach/sysasic.h>
30 30
31extern struct irq_chip systemasic_int;
32extern void aica_time_init(void);
33extern int systemasic_irq_demux(int);
34
35static void __init dreamcast_setup(char **cmdline_p) 31static void __init dreamcast_setup(char **cmdline_p)
36{ 32{
37 int i;
38
39 /* Mask all hardware events */
40 /* XXX */
41
42 /* Acknowledge any previous events */
43 /* XXX */
44
45 /* Assign all virtual IRQs to the System ASIC int. handler */
46 for (i = HW_EVENT_IRQ_BASE; i < HW_EVENT_IRQ_MAX; i++)
47 set_irq_chip_and_handler(i, &systemasic_int,
48 handle_level_irq);
49
50 board_time_init = aica_time_init; 33 board_time_init = aica_time_init;
51} 34}
52 35
@@ -54,4 +37,5 @@ static struct sh_machine_vector mv_dreamcast __initmv = {
54 .mv_name = "Sega Dreamcast", 37 .mv_name = "Sega Dreamcast",
55 .mv_setup = dreamcast_setup, 38 .mv_setup = dreamcast_setup,
56 .mv_irq_demux = systemasic_irq_demux, 39 .mv_irq_demux = systemasic_irq_demux,
40 .mv_init_irq = systemasic_irq_init,
57}; 41};
diff --git a/arch/sh/boards/mach-ecovec24/Makefile b/arch/sh/boards/mach-ecovec24/Makefile
index 51f852151655..e69bc82208fc 100644
--- a/arch/sh/boards/mach-ecovec24/Makefile
+++ b/arch/sh/boards/mach-ecovec24/Makefile
@@ -6,4 +6,4 @@
6# for more details. 6# for more details.
7# 7#
8 8
9obj-y := setup.o \ No newline at end of file 9obj-y := setup.o sdram.o \ No newline at end of file
diff --git a/arch/sh/boards/mach-ecovec24/sdram.S b/arch/sh/boards/mach-ecovec24/sdram.S
new file mode 100644
index 000000000000..3963c6f23d52
--- /dev/null
+++ b/arch/sh/boards/mach-ecovec24/sdram.S
@@ -0,0 +1,111 @@
1/*
2 * Ecovec24 sdram self/auto-refresh setup code
3 *
4 * Copyright (C) 2009 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/sys.h>
12#include <linux/errno.h>
13#include <linux/linkage.h>
14#include <asm/asm-offsets.h>
15#include <asm/suspend.h>
16#include <asm/romimage-macros.h>
17
18/* code to enter and leave self-refresh. must be self-contained.
19 * this code will be copied to on-chip memory and executed from there.
20 */
21 .balign 4
22ENTRY(ecovec24_sdram_enter_start)
23
24 /* DBSC: put memory in self-refresh mode */
25
26 ED 0xFD000010, 0x00000000 /* DBEN */
27 ED 0xFD000040, 0x00000000 /* DBRFPDN0 */
28 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
29 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
30 ED 0xFD000040, 0x00000001 /* DBRFPDN0 */
31
32 rts
33 nop
34
35ENTRY(ecovec24_sdram_enter_end)
36
37 .balign 4
38ENTRY(ecovec24_sdram_leave_start)
39
40 mov.l @(SH_SLEEP_MODE, r5), r0
41 tst #SUSP_SH_RSTANDBY, r0
42 bf resume_rstandby
43
44 /* DBSC: put memory in auto-refresh mode */
45
46 ED 0xFD000040, 0x00000000 /* DBRFPDN0 */
47 WAIT 1
48 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
49 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
50 ED 0xFD000010, 0x00000001 /* DBEN */
51 ED 0xFD000040, 0x00010000 /* DBRFPDN0 */
52
53 rts
54 nop
55
56resume_rstandby:
57
58 /* DBSC: re-initialize and put in auto-refresh */
59
60 ED 0xFD000108, 0x00000181 /* DBPDCNT0 */
61 ED 0xFD000020, 0x015B0002 /* DBCONF */
62 ED 0xFD000030, 0x03071502 /* DBTR0 */
63 ED 0xFD000034, 0x02020102 /* DBTR1 */
64 ED 0xFD000038, 0x01090405 /* DBTR2 */
65 ED 0xFD00003C, 0x00000002 /* DBTR3 */
66 ED 0xFD000008, 0x00000005 /* DBKIND */
67 ED 0xFD000040, 0x00000001 /* DBRFPDN0 */
68 ED 0xFD000040, 0x00000000 /* DBRFPDN0 */
69 ED 0xFD000018, 0x00000001 /* DBCKECNT */
70
71 mov #100,r0
72WAIT_400NS:
73 dt r0
74 bf WAIT_400NS
75
76 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
77 ED 0xFD000060, 0x00020000 /* DBMRCNT (EMR2) */
78 ED 0xFD000060, 0x00030000 /* DBMRCNT (EMR3) */
79 ED 0xFD000060, 0x00010004 /* DBMRCNT (EMR) */
80 ED 0xFD000060, 0x00000532 /* DBMRCNT (MRS) */
81 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
82 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
83 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
84 ED 0xFD000060, 0x00000432 /* DBMRCNT (MRS) */
85 ED 0xFD000060, 0x000103c0 /* DBMRCNT (EMR) */
86 ED 0xFD000060, 0x00010040 /* DBMRCNT (EMR) */
87
88 mov #100,r0
89WAIT_400NS_2:
90 dt r0
91 bf WAIT_400NS_2
92
93 ED 0xFD000010, 0x00000001 /* DBEN */
94 ED 0xFD000044, 0x0000050f /* DBRFPDN1 */
95 ED 0xFD000048, 0x236800e6 /* DBRFPDN2 */
96
97 mov.l DUMMY,r0
98 mov.l @r0, r1 /* force single dummy read */
99
100 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
101 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
102 ED 0xFD000108, 0x00000080 /* DBPDCNT0 */
103 ED 0xFD000040, 0x00010000 /* DBRFPDN0 */
104
105 rts
106 nop
107
108 .balign 4
109DUMMY: .long 0xac400000
110
111ENTRY(ecovec24_sdram_leave_end)
diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c
index 3b1ceb46fa54..6c13b92742e8 100644
--- a/arch/sh/boards/mach-ecovec24/setup.c
+++ b/arch/sh/boards/mach-ecovec24/setup.c
@@ -19,13 +19,22 @@
19#include <linux/usb/r8a66597.h> 19#include <linux/usb/r8a66597.h>
20#include <linux/i2c.h> 20#include <linux/i2c.h>
21#include <linux/i2c/tsc2007.h> 21#include <linux/i2c/tsc2007.h>
22#include <linux/spi/spi.h>
23#include <linux/spi/sh_msiof.h>
24#include <linux/spi/mmc_spi.h>
25#include <linux/mmc/host.h>
22#include <linux/input.h> 26#include <linux/input.h>
27#include <linux/input/sh_keysc.h>
28#include <linux/mfd/sh_mobile_sdhi.h>
23#include <video/sh_mobile_lcdc.h> 29#include <video/sh_mobile_lcdc.h>
30#include <sound/sh_fsi.h>
24#include <media/sh_mobile_ceu.h> 31#include <media/sh_mobile_ceu.h>
32#include <media/tw9910.h>
33#include <media/mt9t112.h>
25#include <asm/heartbeat.h> 34#include <asm/heartbeat.h>
26#include <asm/sh_eth.h> 35#include <asm/sh_eth.h>
27#include <asm/sh_keysc.h>
28#include <asm/clock.h> 36#include <asm/clock.h>
37#include <asm/suspend.h>
29#include <cpu/sh7724.h> 38#include <cpu/sh7724.h>
30 39
31/* 40/*
@@ -55,18 +64,16 @@
55 64
56/* Heartbeat */ 65/* Heartbeat */
57static unsigned char led_pos[] = { 0, 1, 2, 3 }; 66static unsigned char led_pos[] = { 0, 1, 2, 3 };
67
58static struct heartbeat_data heartbeat_data = { 68static struct heartbeat_data heartbeat_data = {
59 .regsize = 8,
60 .nr_bits = 4, 69 .nr_bits = 4,
61 .bit_pos = led_pos, 70 .bit_pos = led_pos,
62}; 71};
63 72
64static struct resource heartbeat_resources[] = { 73static struct resource heartbeat_resource = {
65 [0] = { 74 .start = 0xA405012C, /* PTG */
66 .start = 0xA405012C, /* PTG */ 75 .end = 0xA405012E - 1,
67 .end = 0xA405012E - 1, 76 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
68 .flags = IORESOURCE_MEM,
69 },
70}; 77};
71 78
72static struct platform_device heartbeat_device = { 79static struct platform_device heartbeat_device = {
@@ -75,8 +82,8 @@ static struct platform_device heartbeat_device = {
75 .dev = { 82 .dev = {
76 .platform_data = &heartbeat_data, 83 .platform_data = &heartbeat_data,
77 }, 84 },
78 .num_resources = ARRAY_SIZE(heartbeat_resources), 85 .num_resources = 1,
79 .resource = heartbeat_resources, 86 .resource = &heartbeat_resource,
80}; 87};
81 88
82/* MTD */ 89/* MTD */
@@ -119,8 +126,6 @@ static struct platform_device nor_flash_device = {
119 126
120/* SH Eth */ 127/* SH Eth */
121#define SH_ETH_ADDR (0xA4600000) 128#define SH_ETH_ADDR (0xA4600000)
122#define SH_ETH_MAHR (SH_ETH_ADDR + 0x1C0)
123#define SH_ETH_MALR (SH_ETH_ADDR + 0x1C8)
124static struct resource sh_eth_resources[] = { 129static struct resource sh_eth_resources[] = {
125 [0] = { 130 [0] = {
126 .start = SH_ETH_ADDR, 131 .start = SH_ETH_ADDR,
@@ -147,6 +152,9 @@ static struct platform_device sh_eth_device = {
147 }, 152 },
148 .num_resources = ARRAY_SIZE(sh_eth_resources), 153 .num_resources = ARRAY_SIZE(sh_eth_resources),
149 .resource = sh_eth_resources, 154 .resource = sh_eth_resources,
155 .archdata = {
156 .hwblk_id = HWBLK_ETHER,
157 },
150}; 158};
151 159
152/* USB0 host */ 160/* USB0 host */
@@ -185,30 +193,18 @@ static struct platform_device usb0_host_device = {
185 .resource = usb0_host_resources, 193 .resource = usb0_host_resources,
186}; 194};
187 195
188/* 196/* USB1 host/function */
189 * USB1
190 *
191 * CN5 can use both host/function,
192 * and we can determine it by checking PTB[3]
193 *
194 * This time only USB1 host is supported.
195 */
196void usb1_port_power(int port, int power) 197void usb1_port_power(int port, int power)
197{ 198{
198 if (!gpio_get_value(GPIO_PTB3)) {
199 printk(KERN_ERR "USB1 function is not supported\n");
200 return;
201 }
202
203 gpio_set_value(GPIO_PTB5, power); 199 gpio_set_value(GPIO_PTB5, power);
204} 200}
205 201
206static struct r8a66597_platdata usb1_host_data = { 202static struct r8a66597_platdata usb1_common_data = {
207 .on_chip = 1, 203 .on_chip = 1,
208 .port_power = usb1_port_power, 204 .port_power = usb1_port_power,
209}; 205};
210 206
211static struct resource usb1_host_resources[] = { 207static struct resource usb1_common_resources[] = {
212 [0] = { 208 [0] = {
213 .start = 0xa4d90000, 209 .start = 0xa4d90000,
214 .end = 0xa4d90124 - 1, 210 .end = 0xa4d90124 - 1,
@@ -221,16 +217,16 @@ static struct resource usb1_host_resources[] = {
221 }, 217 },
222}; 218};
223 219
224static struct platform_device usb1_host_device = { 220static struct platform_device usb1_common_device = {
225 .name = "r8a66597_hcd", 221 /* .name will be added in arch_setup */
226 .id = 1, 222 .id = 1,
227 .dev = { 223 .dev = {
228 .dma_mask = NULL, /* not use dma */ 224 .dma_mask = NULL, /* not use dma */
229 .coherent_dma_mask = 0xffffffff, 225 .coherent_dma_mask = 0xffffffff,
230 .platform_data = &usb1_host_data, 226 .platform_data = &usb1_common_data,
231 }, 227 },
232 .num_resources = ARRAY_SIZE(usb1_host_resources), 228 .num_resources = ARRAY_SIZE(usb1_common_resources),
233 .resource = usb1_host_resources, 229 .resource = usb1_common_resources,
234}; 230};
235 231
236/* LCDC */ 232/* LCDC */
@@ -345,10 +341,20 @@ static struct platform_device ceu1_device = {
345}; 341};
346 342
347/* I2C device */ 343/* I2C device */
344static struct i2c_board_info i2c0_devices[] = {
345 {
346 I2C_BOARD_INFO("da7210", 0x1a),
347 },
348};
349
348static struct i2c_board_info i2c1_devices[] = { 350static struct i2c_board_info i2c1_devices[] = {
349 { 351 {
350 I2C_BOARD_INFO("r2025sd", 0x32), 352 I2C_BOARD_INFO("r2025sd", 0x32),
351 }, 353 },
354 {
355 I2C_BOARD_INFO("lis3lv02d", 0x1c),
356 .irq = 33,
357 }
352}; 358};
353 359
354/* KEYSC */ 360/* KEYSC */
@@ -428,18 +434,367 @@ static struct i2c_board_info ts_i2c_clients = {
428 .irq = IRQ0, 434 .irq = IRQ0,
429}; 435};
430 436
437#ifdef CONFIG_MFD_SH_MOBILE_SDHI
438/* SHDI0 */
439static void sdhi0_set_pwr(struct platform_device *pdev, int state)
440{
441 gpio_set_value(GPIO_PTB6, state);
442}
443
444static struct sh_mobile_sdhi_info sdhi0_info = {
445 .set_pwr = sdhi0_set_pwr,
446};
447
448static struct resource sdhi0_resources[] = {
449 [0] = {
450 .name = "SDHI0",
451 .start = 0x04ce0000,
452 .end = 0x04ce01ff,
453 .flags = IORESOURCE_MEM,
454 },
455 [1] = {
456 .start = 100,
457 .flags = IORESOURCE_IRQ,
458 },
459};
460
461static struct platform_device sdhi0_device = {
462 .name = "sh_mobile_sdhi",
463 .num_resources = ARRAY_SIZE(sdhi0_resources),
464 .resource = sdhi0_resources,
465 .id = 0,
466 .dev = {
467 .platform_data = &sdhi0_info,
468 },
469 .archdata = {
470 .hwblk_id = HWBLK_SDHI0,
471 },
472};
473
474/* SHDI1 */
475static void sdhi1_set_pwr(struct platform_device *pdev, int state)
476{
477 gpio_set_value(GPIO_PTB7, state);
478}
479
480static struct sh_mobile_sdhi_info sdhi1_info = {
481 .set_pwr = sdhi1_set_pwr,
482};
483
484static struct resource sdhi1_resources[] = {
485 [0] = {
486 .name = "SDHI1",
487 .start = 0x04cf0000,
488 .end = 0x04cf01ff,
489 .flags = IORESOURCE_MEM,
490 },
491 [1] = {
492 .start = 23,
493 .flags = IORESOURCE_IRQ,
494 },
495};
496
497static struct platform_device sdhi1_device = {
498 .name = "sh_mobile_sdhi",
499 .num_resources = ARRAY_SIZE(sdhi1_resources),
500 .resource = sdhi1_resources,
501 .id = 1,
502 .dev = {
503 .platform_data = &sdhi1_info,
504 },
505 .archdata = {
506 .hwblk_id = HWBLK_SDHI1,
507 },
508};
509
510#else
511
512/* MMC SPI */
513static int mmc_spi_get_ro(struct device *dev)
514{
515 return gpio_get_value(GPIO_PTY6);
516}
517
518static int mmc_spi_get_cd(struct device *dev)
519{
520 return !gpio_get_value(GPIO_PTY7);
521}
522
523static void mmc_spi_setpower(struct device *dev, unsigned int maskval)
524{
525 gpio_set_value(GPIO_PTB6, maskval ? 1 : 0);
526}
527
528static struct mmc_spi_platform_data mmc_spi_info = {
529 .get_ro = mmc_spi_get_ro,
530 .get_cd = mmc_spi_get_cd,
531 .caps = MMC_CAP_NEEDS_POLL,
532 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3.3V only */
533 .setpower = mmc_spi_setpower,
534};
535
536static struct spi_board_info spi_bus[] = {
537 {
538 .modalias = "mmc_spi",
539 .platform_data = &mmc_spi_info,
540 .max_speed_hz = 5000000,
541 .mode = SPI_MODE_0,
542 .controller_data = (void *) GPIO_PTM4,
543 },
544};
545
546/* MSIOF0 */
547static struct sh_msiof_spi_info msiof0_data = {
548 .num_chipselect = 1,
549};
550
551static struct resource msiof0_resources[] = {
552 [0] = {
553 .name = "MSIOF0",
554 .start = 0xa4c40000,
555 .end = 0xa4c40063,
556 .flags = IORESOURCE_MEM,
557 },
558 [1] = {
559 .start = 84,
560 .flags = IORESOURCE_IRQ,
561 },
562};
563
564static struct platform_device msiof0_device = {
565 .name = "spi_sh_msiof",
566 .id = 0, /* MSIOF0 */
567 .dev = {
568 .platform_data = &msiof0_data,
569 },
570 .num_resources = ARRAY_SIZE(msiof0_resources),
571 .resource = msiof0_resources,
572 .archdata = {
573 .hwblk_id = HWBLK_MSIOF0,
574 },
575};
576
577#endif
578
579/* I2C Video/Camera */
580static struct i2c_board_info i2c_camera[] = {
581 {
582 I2C_BOARD_INFO("tw9910", 0x45),
583 },
584 {
585 /* 1st camera */
586 I2C_BOARD_INFO("mt9t112", 0x3c),
587 },
588 {
589 /* 2nd camera */
590 I2C_BOARD_INFO("mt9t112", 0x3c),
591 },
592};
593
594/* tw9910 */
595static int tw9910_power(struct device *dev, int mode)
596{
597 int val = mode ? 0 : 1;
598
599 gpio_set_value(GPIO_PTU2, val);
600 if (mode)
601 mdelay(100);
602
603 return 0;
604}
605
606static struct tw9910_video_info tw9910_info = {
607 .buswidth = SOCAM_DATAWIDTH_8,
608 .mpout = TW9910_MPO_FIELD,
609};
610
611static struct soc_camera_link tw9910_link = {
612 .i2c_adapter_id = 0,
613 .bus_id = 1,
614 .power = tw9910_power,
615 .board_info = &i2c_camera[0],
616 .module_name = "tw9910",
617 .priv = &tw9910_info,
618};
619
620/* mt9t112 */
621static int mt9t112_power1(struct device *dev, int mode)
622{
623 gpio_set_value(GPIO_PTA3, mode);
624 if (mode)
625 mdelay(100);
626
627 return 0;
628}
629
630static struct mt9t112_camera_info mt9t112_info1 = {
631 .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
632 .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
633};
634
635static struct soc_camera_link mt9t112_link1 = {
636 .i2c_adapter_id = 0,
637 .power = mt9t112_power1,
638 .bus_id = 0,
639 .board_info = &i2c_camera[1],
640 .module_name = "mt9t112",
641 .priv = &mt9t112_info1,
642};
643
644static int mt9t112_power2(struct device *dev, int mode)
645{
646 gpio_set_value(GPIO_PTA4, mode);
647 if (mode)
648 mdelay(100);
649
650 return 0;
651}
652
653static struct mt9t112_camera_info mt9t112_info2 = {
654 .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
655 .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
656};
657
658static struct soc_camera_link mt9t112_link2 = {
659 .i2c_adapter_id = 1,
660 .power = mt9t112_power2,
661 .bus_id = 1,
662 .board_info = &i2c_camera[2],
663 .module_name = "mt9t112",
664 .priv = &mt9t112_info2,
665};
666
667static struct platform_device camera_devices[] = {
668 {
669 .name = "soc-camera-pdrv",
670 .id = 0,
671 .dev = {
672 .platform_data = &tw9910_link,
673 },
674 },
675 {
676 .name = "soc-camera-pdrv",
677 .id = 1,
678 .dev = {
679 .platform_data = &mt9t112_link1,
680 },
681 },
682 {
683 .name = "soc-camera-pdrv",
684 .id = 2,
685 .dev = {
686 .platform_data = &mt9t112_link2,
687 },
688 },
689};
690
691/* FSI */
692/*
693 * FSI-B use external clock which came from da7210.
694 * So, we should change parent of fsi
695 */
696#define FCLKBCR 0xa415000c
697static void fsimck_init(struct clk *clk)
698{
699 u32 status = __raw_readl(clk->enable_reg);
700
701 /* use external clock */
702 status &= ~0x000000ff;
703 status |= 0x00000080;
704
705 __raw_writel(status, clk->enable_reg);
706}
707
708static struct clk_ops fsimck_clk_ops = {
709 .init = fsimck_init,
710};
711
712static struct clk fsimckb_clk = {
713 .name = "fsimckb_clk",
714 .id = -1,
715 .ops = &fsimck_clk_ops,
716 .enable_reg = (void __iomem *)FCLKBCR,
717 .rate = 0, /* unknown */
718};
719
720struct sh_fsi_platform_info fsi_info = {
721 .portb_flags = SH_FSI_BRS_INV |
722 SH_FSI_OUT_SLAVE_MODE |
723 SH_FSI_IN_SLAVE_MODE |
724 SH_FSI_OFMT(I2S) |
725 SH_FSI_IFMT(I2S),
726};
727
728static struct resource fsi_resources[] = {
729 [0] = {
730 .name = "FSI",
731 .start = 0xFE3C0000,
732 .end = 0xFE3C021d,
733 .flags = IORESOURCE_MEM,
734 },
735 [1] = {
736 .start = 108,
737 .flags = IORESOURCE_IRQ,
738 },
739};
740
741static struct platform_device fsi_device = {
742 .name = "sh_fsi",
743 .id = 0,
744 .num_resources = ARRAY_SIZE(fsi_resources),
745 .resource = fsi_resources,
746 .dev = {
747 .platform_data = &fsi_info,
748 },
749 .archdata = {
750 .hwblk_id = HWBLK_SPU, /* FSI needs SPU hwblk */
751 },
752};
753
754/* IrDA */
755static struct resource irda_resources[] = {
756 [0] = {
757 .name = "IrDA",
758 .start = 0xA45D0000,
759 .end = 0xA45D0049,
760 .flags = IORESOURCE_MEM,
761 },
762 [1] = {
763 .start = 20,
764 .flags = IORESOURCE_IRQ,
765 },
766};
767
768static struct platform_device irda_device = {
769 .name = "sh_sir",
770 .num_resources = ARRAY_SIZE(irda_resources),
771 .resource = irda_resources,
772};
773
431static struct platform_device *ecovec_devices[] __initdata = { 774static struct platform_device *ecovec_devices[] __initdata = {
432 &heartbeat_device, 775 &heartbeat_device,
433 &nor_flash_device, 776 &nor_flash_device,
434 &sh_eth_device, 777 &sh_eth_device,
435 &usb0_host_device, 778 &usb0_host_device,
436 &usb1_host_device, /* USB1 host support */ 779 &usb1_common_device,
437 &lcdc_device, 780 &lcdc_device,
438 &ceu0_device, 781 &ceu0_device,
439 &ceu1_device, 782 &ceu1_device,
440 &keysc_device, 783 &keysc_device,
784#ifdef CONFIG_MFD_SH_MOBILE_SDHI
785 &sdhi0_device,
786 &sdhi1_device,
787#else
788 &msiof0_device,
789#endif
790 &camera_devices[0],
791 &camera_devices[1],
792 &camera_devices[2],
793 &fsi_device,
794 &irda_device,
441}; 795};
442 796
797#ifdef CONFIG_I2C
443#define EEPROM_ADDR 0x50 798#define EEPROM_ADDR 0x50
444static u8 mac_read(struct i2c_adapter *a, u8 command) 799static u8 mac_read(struct i2c_adapter *a, u8 command)
445{ 800{
@@ -466,12 +821,9 @@ static u8 mac_read(struct i2c_adapter *a, u8 command)
466 return buf; 821 return buf;
467} 822}
468 823
469#define MAC_LEN 6 824static void __init sh_eth_init(struct sh_eth_plat_data *pd)
470static void __init sh_eth_init(void)
471{ 825{
472 struct i2c_adapter *a = i2c_get_adapter(1); 826 struct i2c_adapter *a = i2c_get_adapter(1);
473 struct clk *eth_clk;
474 u8 mac[MAC_LEN];
475 int i; 827 int i;
476 828
477 if (!a) { 829 if (!a) {
@@ -479,39 +831,41 @@ static void __init sh_eth_init(void)
479 return; 831 return;
480 } 832 }
481 833
482 eth_clk = clk_get(NULL, "eth0");
483 if (!eth_clk) {
484 pr_err("can not get eth0 clk\n");
485 return;
486 }
487
488 /* read MAC address frome EEPROM */ 834 /* read MAC address frome EEPROM */
489 for (i = 0; i < MAC_LEN; i++) { 835 for (i = 0; i < sizeof(pd->mac_addr); i++) {
490 mac[i] = mac_read(a, 0x10 + i); 836 pd->mac_addr[i] = mac_read(a, 0x10 + i);
491 msleep(10); 837 msleep(10);
492 } 838 }
493 839
494 /* clock enable */ 840 i2c_put_adapter(a);
495 clk_enable(eth_clk); 841}
496 842#else
497 /* reset sh-eth */ 843static void __init sh_eth_init(struct sh_eth_plat_data *pd)
498 ctrl_outl(0x1, SH_ETH_ADDR + 0x0); 844{
499 845 pr_err("unable to read sh_eth MAC address\n");
500 /* set MAC addr */
501 ctrl_outl((mac[0] << 24) |
502 (mac[1] << 16) |
503 (mac[2] << 8) |
504 (mac[3] << 0), SH_ETH_MAHR);
505 ctrl_outl((mac[4] << 8) |
506 (mac[5] << 0), SH_ETH_MALR);
507
508 clk_put(eth_clk);
509} 846}
847#endif
510 848
511#define PORT_HIZA 0xA4050158 849#define PORT_HIZA 0xA4050158
512#define IODRIVEA 0xA405018A 850#define IODRIVEA 0xA405018A
851
852extern char ecovec24_sdram_enter_start;
853extern char ecovec24_sdram_enter_end;
854extern char ecovec24_sdram_leave_start;
855extern char ecovec24_sdram_leave_end;
856
513static int __init arch_setup(void) 857static int __init arch_setup(void)
514{ 858{
859 struct clk *clk;
860
861 /* register board specific self-refresh code */
862 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
863 SUSP_SH_RSTANDBY,
864 &ecovec24_sdram_enter_start,
865 &ecovec24_sdram_enter_end,
866 &ecovec24_sdram_leave_start,
867 &ecovec24_sdram_leave_end);
868
515 /* enable STATUS0, STATUS2 and PDSTATUS */ 869 /* enable STATUS0, STATUS2 and PDSTATUS */
516 gpio_request(GPIO_FN_STATUS0, NULL); 870 gpio_request(GPIO_FN_STATUS0, NULL);
517 gpio_request(GPIO_FN_STATUS2, NULL); 871 gpio_request(GPIO_FN_STATUS2, NULL);
@@ -530,7 +884,7 @@ static int __init arch_setup(void)
530 gpio_direction_output(GPIO_PTG1, 0); 884 gpio_direction_output(GPIO_PTG1, 0);
531 gpio_direction_output(GPIO_PTG2, 0); 885 gpio_direction_output(GPIO_PTG2, 0);
532 gpio_direction_output(GPIO_PTG3, 0); 886 gpio_direction_output(GPIO_PTG3, 0);
533 ctrl_outw((ctrl_inw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA); 887 __raw_writew((__raw_readw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA);
534 888
535 /* enable SH-Eth */ 889 /* enable SH-Eth */
536 gpio_request(GPIO_PTA1, NULL); 890 gpio_request(GPIO_PTA1, NULL);
@@ -550,16 +904,24 @@ static int __init arch_setup(void)
550 gpio_request(GPIO_FN_LNKSTA, NULL); 904 gpio_request(GPIO_FN_LNKSTA, NULL);
551 905
552 /* enable USB */ 906 /* enable USB */
553 ctrl_outw(0x0000, 0xA4D80000); 907 __raw_writew(0x0000, 0xA4D80000);
554 ctrl_outw(0x0000, 0xA4D90000); 908 __raw_writew(0x0000, 0xA4D90000);
555 gpio_request(GPIO_PTB3, NULL); 909 gpio_request(GPIO_PTB3, NULL);
556 gpio_request(GPIO_PTB4, NULL); 910 gpio_request(GPIO_PTB4, NULL);
557 gpio_request(GPIO_PTB5, NULL); 911 gpio_request(GPIO_PTB5, NULL);
558 gpio_direction_input(GPIO_PTB3); 912 gpio_direction_input(GPIO_PTB3);
559 gpio_direction_output(GPIO_PTB4, 0); 913 gpio_direction_output(GPIO_PTB4, 0);
560 gpio_direction_output(GPIO_PTB5, 0); 914 gpio_direction_output(GPIO_PTB5, 0);
561 ctrl_outw(0x0600, 0xa40501d4); 915 __raw_writew(0x0600, 0xa40501d4);
562 ctrl_outw(0x0600, 0xa4050192); 916 __raw_writew(0x0600, 0xa4050192);
917
918 if (gpio_get_value(GPIO_PTB3)) {
919 printk(KERN_INFO "USB1 function is selected\n");
920 usb1_common_device.name = "r8a66597_udc";
921 } else {
922 printk(KERN_INFO "USB1 host is selected\n");
923 usb1_common_device.name = "r8a66597_hcd";
924 }
563 925
564 /* enable LCDC */ 926 /* enable LCDC */
565 gpio_request(GPIO_FN_LCDD23, NULL); 927 gpio_request(GPIO_FN_LCDD23, NULL);
@@ -592,7 +954,7 @@ static int __init arch_setup(void)
592 gpio_request(GPIO_FN_LCDVSYN, NULL); 954 gpio_request(GPIO_FN_LCDVSYN, NULL);
593 gpio_request(GPIO_FN_LCDDON, NULL); 955 gpio_request(GPIO_FN_LCDDON, NULL);
594 gpio_request(GPIO_FN_LCDLCLK, NULL); 956 gpio_request(GPIO_FN_LCDLCLK, NULL);
595 ctrl_outw((ctrl_inw(PORT_HIZA) & ~0x0001), PORT_HIZA); 957 __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
596 958
597 gpio_request(GPIO_PTE6, NULL); 959 gpio_request(GPIO_PTE6, NULL);
598 gpio_request(GPIO_PTU1, NULL); 960 gpio_request(GPIO_PTU1, NULL);
@@ -603,8 +965,8 @@ static int __init arch_setup(void)
603 gpio_direction_output(GPIO_PTR1, 0); 965 gpio_direction_output(GPIO_PTR1, 0);
604 gpio_direction_output(GPIO_PTA2, 0); 966 gpio_direction_output(GPIO_PTA2, 0);
605 967
606 /* I/O buffer drive ability is low */ 968 /* I/O buffer drive ability is high */
607 ctrl_outw((ctrl_inw(IODRIVEA) & ~0x00c0) | 0x0040 , IODRIVEA); 969 __raw_writew((__raw_readw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA);
608 970
609 if (gpio_get_value(GPIO_PTE6)) { 971 if (gpio_get_value(GPIO_PTE6)) {
610 /* DVI */ 972 /* DVI */
@@ -710,7 +1072,106 @@ static int __init arch_setup(void)
710 gpio_direction_input(GPIO_PTR5); 1072 gpio_direction_input(GPIO_PTR5);
711 gpio_direction_input(GPIO_PTR6); 1073 gpio_direction_input(GPIO_PTR6);
712 1074
1075#ifdef CONFIG_MFD_SH_MOBILE_SDHI
1076 /* enable SDHI0 on CN11 (needs DS2.4 set to ON) */
1077 gpio_request(GPIO_FN_SDHI0CD, NULL);
1078 gpio_request(GPIO_FN_SDHI0WP, NULL);
1079 gpio_request(GPIO_FN_SDHI0CMD, NULL);
1080 gpio_request(GPIO_FN_SDHI0CLK, NULL);
1081 gpio_request(GPIO_FN_SDHI0D3, NULL);
1082 gpio_request(GPIO_FN_SDHI0D2, NULL);
1083 gpio_request(GPIO_FN_SDHI0D1, NULL);
1084 gpio_request(GPIO_FN_SDHI0D0, NULL);
1085 gpio_request(GPIO_PTB6, NULL);
1086 gpio_direction_output(GPIO_PTB6, 0);
1087
1088 /* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */
1089 gpio_request(GPIO_FN_SDHI1CD, NULL);
1090 gpio_request(GPIO_FN_SDHI1WP, NULL);
1091 gpio_request(GPIO_FN_SDHI1CMD, NULL);
1092 gpio_request(GPIO_FN_SDHI1CLK, NULL);
1093 gpio_request(GPIO_FN_SDHI1D3, NULL);
1094 gpio_request(GPIO_FN_SDHI1D2, NULL);
1095 gpio_request(GPIO_FN_SDHI1D1, NULL);
1096 gpio_request(GPIO_FN_SDHI1D0, NULL);
1097 gpio_request(GPIO_PTB7, NULL);
1098 gpio_direction_output(GPIO_PTB7, 0);
1099
1100 /* I/O buffer drive ability is high for SDHI1 */
1101 __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
1102#else
1103 /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */
1104 gpio_request(GPIO_FN_MSIOF0_TXD, NULL);
1105 gpio_request(GPIO_FN_MSIOF0_RXD, NULL);
1106 gpio_request(GPIO_FN_MSIOF0_TSCK, NULL);
1107 gpio_request(GPIO_PTM4, NULL); /* software CS control of TSYNC pin */
1108 gpio_direction_output(GPIO_PTM4, 1); /* active low CS */
1109 gpio_request(GPIO_PTB6, NULL); /* 3.3V power control */
1110 gpio_direction_output(GPIO_PTB6, 0); /* disable power by default */
1111 gpio_request(GPIO_PTY6, NULL); /* write protect */
1112 gpio_direction_input(GPIO_PTY6);
1113 gpio_request(GPIO_PTY7, NULL); /* card detect */
1114 gpio_direction_input(GPIO_PTY7);
1115
1116 spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus));
1117#endif
1118
1119 /* enable Video */
1120 gpio_request(GPIO_PTU2, NULL);
1121 gpio_direction_output(GPIO_PTU2, 1);
1122
1123 /* enable Camera */
1124 gpio_request(GPIO_PTA3, NULL);
1125 gpio_request(GPIO_PTA4, NULL);
1126 gpio_direction_output(GPIO_PTA3, 0);
1127 gpio_direction_output(GPIO_PTA4, 0);
1128
1129 /* enable FSI */
1130 gpio_request(GPIO_FN_FSIMCKB, NULL);
1131 gpio_request(GPIO_FN_FSIIBSD, NULL);
1132 gpio_request(GPIO_FN_FSIOBSD, NULL);
1133 gpio_request(GPIO_FN_FSIIBBCK, NULL);
1134 gpio_request(GPIO_FN_FSIIBLRCK, NULL);
1135 gpio_request(GPIO_FN_FSIOBBCK, NULL);
1136 gpio_request(GPIO_FN_FSIOBLRCK, NULL);
1137 gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
1138
1139 /* set SPU2 clock to 83.4 MHz */
1140 clk = clk_get(NULL, "spu_clk");
1141 clk_set_rate(clk, clk_round_rate(clk, 83333333));
1142 clk_put(clk);
1143
1144 /* change parent of FSI B */
1145 clk = clk_get(NULL, "fsib_clk");
1146 clk_register(&fsimckb_clk);
1147 clk_set_parent(clk, &fsimckb_clk);
1148 clk_set_rate(clk, 11000);
1149 clk_set_rate(&fsimckb_clk, 11000);
1150 clk_put(clk);
1151
1152 gpio_request(GPIO_PTU0, NULL);
1153 gpio_direction_output(GPIO_PTU0, 0);
1154 mdelay(20);
1155
1156 /* enable motion sensor */
1157 gpio_request(GPIO_FN_INTC_IRQ1, NULL);
1158 gpio_direction_input(GPIO_FN_INTC_IRQ1);
1159
1160 /* set VPU clock to 166 MHz */
1161 clk = clk_get(NULL, "vpu_clk");
1162 clk_set_rate(clk, clk_round_rate(clk, 166000000));
1163 clk_put(clk);
1164
1165 /* enable IrDA */
1166 gpio_request(GPIO_FN_IRDA_OUT, NULL);
1167 gpio_request(GPIO_FN_IRDA_IN, NULL);
1168 gpio_request(GPIO_PTU5, NULL);
1169 gpio_direction_output(GPIO_PTU5, 0);
1170
713 /* enable I2C device */ 1171 /* enable I2C device */
1172 i2c_register_board_info(0, i2c0_devices,
1173 ARRAY_SIZE(i2c0_devices));
1174
714 i2c_register_board_info(1, i2c1_devices, 1175 i2c_register_board_info(1, i2c1_devices,
715 ARRAY_SIZE(i2c1_devices)); 1176 ARRAY_SIZE(i2c1_devices));
716 1177
@@ -721,12 +1182,11 @@ arch_initcall(arch_setup);
721 1182
722static int __init devices_setup(void) 1183static int __init devices_setup(void)
723{ 1184{
724 sh_eth_init(); 1185 sh_eth_init(&sh_eth_plat);
725 return 0; 1186 return 0;
726} 1187}
727device_initcall(devices_setup); 1188device_initcall(devices_setup);
728 1189
729
730static struct sh_machine_vector mv_ecovec __initmv = { 1190static struct sh_machine_vector mv_ecovec __initmv = {
731 .mv_name = "R0P7724 (EcoVec)", 1191 .mv_name = "R0P7724 (EcoVec)",
732}; 1192};
diff --git a/arch/sh/boards/mach-highlander/irq-r7780mp.c b/arch/sh/boards/mach-highlander/irq-r7780mp.c
index 83c28bcd4d2a..9893fd3a1358 100644
--- a/arch/sh/boards/mach-highlander/irq-r7780mp.c
+++ b/arch/sh/boards/mach-highlander/irq-r7780mp.c
@@ -64,7 +64,7 @@ static DECLARE_INTC_DESC(intc_desc, "r7780mp", vectors,
64 64
65unsigned char * __init highlander_plat_irq_setup(void) 65unsigned char * __init highlander_plat_irq_setup(void)
66{ 66{
67 if ((ctrl_inw(0xa4000700) & 0xf000) == 0x2000) { 67 if ((__raw_readw(0xa4000700) & 0xf000) == 0x2000) {
68 printk(KERN_INFO "Using r7780mp interrupt controller.\n"); 68 printk(KERN_INFO "Using r7780mp interrupt controller.\n");
69 register_intc_controller(&intc_desc); 69 register_intc_controller(&intc_desc);
70 return irl2irq; 70 return irl2irq;
diff --git a/arch/sh/boards/mach-highlander/irq-r7780rp.c b/arch/sh/boards/mach-highlander/irq-r7780rp.c
index b721e86b5af4..0805b2151452 100644
--- a/arch/sh/boards/mach-highlander/irq-r7780rp.c
+++ b/arch/sh/boards/mach-highlander/irq-r7780rp.c
@@ -57,7 +57,7 @@ static DECLARE_INTC_DESC(intc_desc, "r7780rp", vectors,
57 57
58unsigned char * __init highlander_plat_irq_setup(void) 58unsigned char * __init highlander_plat_irq_setup(void)
59{ 59{
60 if (ctrl_inw(0xa5000600)) { 60 if (__raw_readw(0xa5000600)) {
61 printk(KERN_INFO "Using r7780rp interrupt controller.\n"); 61 printk(KERN_INFO "Using r7780rp interrupt controller.\n");
62 register_intc_controller(&intc_desc); 62 register_intc_controller(&intc_desc);
63 return irl2irq; 63 return irl2irq;
diff --git a/arch/sh/boards/mach-highlander/irq-r7785rp.c b/arch/sh/boards/mach-highlander/irq-r7785rp.c
index 3811b060a39b..558b24862776 100644
--- a/arch/sh/boards/mach-highlander/irq-r7785rp.c
+++ b/arch/sh/boards/mach-highlander/irq-r7785rp.c
@@ -66,20 +66,20 @@ static DECLARE_INTC_DESC(intc_desc, "r7785rp", vectors,
66 66
67unsigned char * __init highlander_plat_irq_setup(void) 67unsigned char * __init highlander_plat_irq_setup(void)
68{ 68{
69 if ((ctrl_inw(0xa4000158) & 0xf000) != 0x1000) 69 if ((__raw_readw(0xa4000158) & 0xf000) != 0x1000)
70 return NULL; 70 return NULL;
71 71
72 printk(KERN_INFO "Using r7785rp interrupt controller.\n"); 72 printk(KERN_INFO "Using r7785rp interrupt controller.\n");
73 73
74 ctrl_outw(0x0000, PA_IRLSSR1); /* FPGA IRLSSR1(CF_CD clear) */ 74 __raw_writew(0x0000, PA_IRLSSR1); /* FPGA IRLSSR1(CF_CD clear) */
75 75
76 /* Setup the FPGA IRL */ 76 /* Setup the FPGA IRL */
77 ctrl_outw(0x0000, PA_IRLPRA); /* FPGA IRLA */ 77 __raw_writew(0x0000, PA_IRLPRA); /* FPGA IRLA */
78 ctrl_outw(0xe598, PA_IRLPRB); /* FPGA IRLB */ 78 __raw_writew(0xe598, PA_IRLPRB); /* FPGA IRLB */
79 ctrl_outw(0x7060, PA_IRLPRC); /* FPGA IRLC */ 79 __raw_writew(0x7060, PA_IRLPRC); /* FPGA IRLC */
80 ctrl_outw(0x0000, PA_IRLPRD); /* FPGA IRLD */ 80 __raw_writew(0x0000, PA_IRLPRD); /* FPGA IRLD */
81 ctrl_outw(0x4321, PA_IRLPRE); /* FPGA IRLE */ 81 __raw_writew(0x4321, PA_IRLPRE); /* FPGA IRLE */
82 ctrl_outw(0xdcba, PA_IRLPRF); /* FPGA IRLF */ 82 __raw_writew(0xdcba, PA_IRLPRF); /* FPGA IRLF */
83 83
84 register_intc_controller(&intc_desc); 84 register_intc_controller(&intc_desc);
85 return irl2irq; 85 return irl2irq;
diff --git a/arch/sh/boards/mach-highlander/psw.c b/arch/sh/boards/mach-highlander/psw.c
index 37b1a2ee71a5..522786318d36 100644
--- a/arch/sh/boards/mach-highlander/psw.c
+++ b/arch/sh/boards/mach-highlander/psw.c
@@ -24,7 +24,7 @@ static irqreturn_t psw_irq_handler(int irq, void *arg)
24 unsigned int l, mask; 24 unsigned int l, mask;
25 int ret = 0; 25 int ret = 0;
26 26
27 l = ctrl_inw(PA_DBSW); 27 l = __raw_readw(PA_DBSW);
28 28
29 /* Nothing to do if there's no state change */ 29 /* Nothing to do if there's no state change */
30 if (psw->state) { 30 if (psw->state) {
@@ -45,7 +45,7 @@ static irqreturn_t psw_irq_handler(int irq, void *arg)
45out: 45out:
46 /* Clear the switch IRQs */ 46 /* Clear the switch IRQs */
47 l |= (0x7 << 12); 47 l |= (0x7 << 12);
48 ctrl_outw(l, PA_DBSW); 48 __raw_writew(l, PA_DBSW);
49 49
50 return IRQ_RETVAL(ret); 50 return IRQ_RETVAL(ret);
51} 51}
diff --git a/arch/sh/boards/mach-highlander/setup.c b/arch/sh/boards/mach-highlander/setup.c
index 566e69d8d729..affd66747ba3 100644
--- a/arch/sh/boards/mach-highlander/setup.c
+++ b/arch/sh/boards/mach-highlander/setup.c
@@ -311,13 +311,13 @@ device_initcall(r7780rp_devices_setup);
311 */ 311 */
312static int ivdr_clk_enable(struct clk *clk) 312static int ivdr_clk_enable(struct clk *clk)
313{ 313{
314 ctrl_outw(ctrl_inw(PA_IVDRCTL) | (1 << IVDR_CK_ON), PA_IVDRCTL); 314 __raw_writew(__raw_readw(PA_IVDRCTL) | (1 << IVDR_CK_ON), PA_IVDRCTL);
315 return 0; 315 return 0;
316} 316}
317 317
318static void ivdr_clk_disable(struct clk *clk) 318static void ivdr_clk_disable(struct clk *clk)
319{ 319{
320 ctrl_outw(ctrl_inw(PA_IVDRCTL) & ~(1 << IVDR_CK_ON), PA_IVDRCTL); 320 __raw_writew(__raw_readw(PA_IVDRCTL) & ~(1 << IVDR_CK_ON), PA_IVDRCTL);
321} 321}
322 322
323static struct clk_ops ivdr_clk_ops = { 323static struct clk_ops ivdr_clk_ops = {
@@ -337,7 +337,7 @@ static struct clk *r7780rp_clocks[] = {
337static void r7780rp_power_off(void) 337static void r7780rp_power_off(void)
338{ 338{
339 if (mach_is_r7780mp() || mach_is_r7785rp()) 339 if (mach_is_r7780mp() || mach_is_r7785rp())
340 ctrl_outw(0x0001, PA_POFF); 340 __raw_writew(0x0001, PA_POFF);
341} 341}
342 342
343/* 343/*
@@ -345,7 +345,7 @@ static void r7780rp_power_off(void)
345 */ 345 */
346static void __init highlander_setup(char **cmdline_p) 346static void __init highlander_setup(char **cmdline_p)
347{ 347{
348 u16 ver = ctrl_inw(PA_VERREG); 348 u16 ver = __raw_readw(PA_VERREG);
349 int i; 349 int i;
350 350
351 printk(KERN_INFO "Renesas Solutions Highlander %s support.\n", 351 printk(KERN_INFO "Renesas Solutions Highlander %s support.\n",
@@ -370,12 +370,12 @@ static void __init highlander_setup(char **cmdline_p)
370 clk_enable(clk); 370 clk_enable(clk);
371 } 371 }
372 372
373 ctrl_outw(0x0000, PA_OBLED); /* Clear LED. */ 373 __raw_writew(0x0000, PA_OBLED); /* Clear LED. */
374 374
375 if (mach_is_r7780rp()) 375 if (mach_is_r7780rp())
376 ctrl_outw(0x0001, PA_SDPOW); /* SD Power ON */ 376 __raw_writew(0x0001, PA_SDPOW); /* SD Power ON */
377 377
378 ctrl_outw(ctrl_inw(PA_IVDRCTL) | 0x01, PA_IVDRCTL); /* Si13112 */ 378 __raw_writew(__raw_readw(PA_IVDRCTL) | 0x01, PA_IVDRCTL); /* Si13112 */
379 379
380 pm_power_off = r7780rp_power_off; 380 pm_power_off = r7780rp_power_off;
381} 381}
@@ -384,7 +384,7 @@ static unsigned char irl2irq[HL_NR_IRL];
384 384
385static int highlander_irq_demux(int irq) 385static int highlander_irq_demux(int irq)
386{ 386{
387 if (irq >= HL_NR_IRL || !irl2irq[irq]) 387 if (irq >= HL_NR_IRL || irq < 0 || !irl2irq[irq])
388 return irq; 388 return irq;
389 389
390 return irl2irq[irq]; 390 return irl2irq[irq];
diff --git a/arch/sh/boards/mach-hp6xx/hp6xx_apm.c b/arch/sh/boards/mach-hp6xx/hp6xx_apm.c
index e85212faf40a..b49535c0ddd9 100644
--- a/arch/sh/boards/mach-hp6xx/hp6xx_apm.c
+++ b/arch/sh/boards/mach-hp6xx/hp6xx_apm.c
@@ -53,7 +53,7 @@ static void hp6x0_apm_get_power_status(struct apm_power_info *info)
53 info->ac_line_status = (battery > HP680_BATTERY_AC_ON) ? 53 info->ac_line_status = (battery > HP680_BATTERY_AC_ON) ?
54 APM_AC_ONLINE : APM_AC_OFFLINE; 54 APM_AC_ONLINE : APM_AC_OFFLINE;
55 55
56 pgdr = ctrl_inb(PGDR); 56 pgdr = __raw_readb(PGDR);
57 if (pgdr & PGDR_MAIN_BATTERY_OUT) { 57 if (pgdr & PGDR_MAIN_BATTERY_OUT) {
58 info->battery_status = APM_BATTERY_STATUS_NOT_PRESENT; 58 info->battery_status = APM_BATTERY_STATUS_NOT_PRESENT;
59 info->battery_flag = 0x80; 59 info->battery_flag = 0x80;
diff --git a/arch/sh/boards/mach-hp6xx/pm.c b/arch/sh/boards/mach-hp6xx/pm.c
index d936c1af7620..4499a3749d40 100644
--- a/arch/sh/boards/mach-hp6xx/pm.c
+++ b/arch/sh/boards/mach-hp6xx/pm.c
@@ -53,17 +53,17 @@ static void pm_enter(void)
53 sh_wdt_write_cnt(0); 53 sh_wdt_write_cnt(0);
54 54
55 /* disable PLL1 */ 55 /* disable PLL1 */
56 frqcr = ctrl_inw(FRQCR); 56 frqcr = __raw_readw(FRQCR);
57 frqcr &= ~(FRQCR_PLLEN | FRQCR_PSTBY); 57 frqcr &= ~(FRQCR_PLLEN | FRQCR_PSTBY);
58 ctrl_outw(frqcr, FRQCR); 58 __raw_writew(frqcr, FRQCR);
59 59
60 /* enable standby */ 60 /* enable standby */
61 stbcr = ctrl_inb(STBCR); 61 stbcr = __raw_readb(STBCR);
62 ctrl_outb(stbcr | STBCR_STBY | STBCR_MSTP2, STBCR); 62 __raw_writeb(stbcr | STBCR_STBY | STBCR_MSTP2, STBCR);
63 63
64 /* set self-refresh */ 64 /* set self-refresh */
65 mcr = ctrl_inw(MCR); 65 mcr = __raw_readw(MCR);
66 ctrl_outw(mcr & ~MCR_RFSH, MCR); 66 __raw_writew(mcr & ~MCR_RFSH, MCR);
67 67
68 /* set interrupt handler */ 68 /* set interrupt handler */
69 asm volatile("stc vbr, %0" : "=r" (vbr_old)); 69 asm volatile("stc vbr, %0" : "=r" (vbr_old));
@@ -73,8 +73,8 @@ static void pm_enter(void)
73 &wakeup_start, &wakeup_end - &wakeup_start); 73 &wakeup_start, &wakeup_end - &wakeup_start);
74 asm volatile("ldc %0, vbr" : : "r" (vbr_new)); 74 asm volatile("ldc %0, vbr" : : "r" (vbr_new));
75 75
76 ctrl_outw(0, RTCNT); 76 __raw_writew(0, RTCNT);
77 ctrl_outw(mcr | MCR_RFSH | MCR_RMODE, MCR); 77 __raw_writew(mcr | MCR_RFSH | MCR_RMODE, MCR);
78 78
79 cpu_sleep(); 79 cpu_sleep();
80 80
@@ -83,14 +83,14 @@ static void pm_enter(void)
83 free_page(vbr_new); 83 free_page(vbr_new);
84 84
85 /* enable PLL1 */ 85 /* enable PLL1 */
86 frqcr = ctrl_inw(FRQCR); 86 frqcr = __raw_readw(FRQCR);
87 frqcr |= FRQCR_PSTBY; 87 frqcr |= FRQCR_PSTBY;
88 ctrl_outw(frqcr, FRQCR); 88 __raw_writew(frqcr, FRQCR);
89 udelay(50); 89 udelay(50);
90 frqcr |= FRQCR_PLLEN; 90 frqcr |= FRQCR_PLLEN;
91 ctrl_outw(frqcr, FRQCR); 91 __raw_writew(frqcr, FRQCR);
92 92
93 ctrl_outb(stbcr, STBCR); 93 __raw_writeb(stbcr, STBCR);
94 94
95 clear_bl_bit(); 95 clear_bl_bit();
96} 96}
@@ -115,21 +115,21 @@ static int hp6x0_pm_enter(suspend_state_t state)
115 outw(hd64461_stbcr, HD64461_STBCR); 115 outw(hd64461_stbcr, HD64461_STBCR);
116#endif 116#endif
117 117
118 ctrl_outb(0x1f, DACR); 118 __raw_writeb(0x1f, DACR);
119 119
120 stbcr = ctrl_inb(STBCR); 120 stbcr = __raw_readb(STBCR);
121 ctrl_outb(0x01, STBCR); 121 __raw_writeb(0x01, STBCR);
122 122
123 stbcr2 = ctrl_inb(STBCR2); 123 stbcr2 = __raw_readb(STBCR2);
124 ctrl_outb(0x7f , STBCR2); 124 __raw_writeb(0x7f , STBCR2);
125 125
126 outw(0xf07f, HD64461_SCPUCR); 126 outw(0xf07f, HD64461_SCPUCR);
127 127
128 pm_enter(); 128 pm_enter();
129 129
130 outw(0, HD64461_SCPUCR); 130 outw(0, HD64461_SCPUCR);
131 ctrl_outb(stbcr, STBCR); 131 __raw_writeb(stbcr, STBCR);
132 ctrl_outb(stbcr2, STBCR2); 132 __raw_writeb(stbcr2, STBCR2);
133 133
134#ifdef CONFIG_HD64461_ENABLER 134#ifdef CONFIG_HD64461_ENABLER
135 hd64461_stbcr = inw(HD64461_STBCR); 135 hd64461_stbcr = inw(HD64461_STBCR);
diff --git a/arch/sh/boards/mach-hp6xx/setup.c b/arch/sh/boards/mach-hp6xx/setup.c
index 8f305b36358b..8c9add5f4cfa 100644
--- a/arch/sh/boards/mach-hp6xx/setup.c
+++ b/arch/sh/boards/mach-hp6xx/setup.c
@@ -13,6 +13,7 @@
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15#include <linux/irq.h> 15#include <linux/irq.h>
16#include <sound/sh_dac_audio.h>
16#include <asm/hd64461.h> 17#include <asm/hd64461.h>
17#include <asm/io.h> 18#include <asm/io.h>
18#include <mach/hp6xx.h> 19#include <mach/hp6xx.h>
@@ -51,9 +52,63 @@ static struct platform_device jornadakbd_device = {
51 .id = -1, 52 .id = -1,
52}; 53};
53 54
55static void dac_audio_start(struct dac_audio_pdata *pdata)
56{
57 u16 v;
58 u8 v8;
59
60 /* HP Jornada 680/690 speaker on */
61 v = inw(HD64461_GPADR);
62 v &= ~HD64461_GPADR_SPEAKER;
63 outw(v, HD64461_GPADR);
64
65 /* HP Palmtop 620lx/660lx speaker on */
66 v8 = inb(PKDR);
67 v8 &= ~PKDR_SPEAKER;
68 outb(v8, PKDR);
69
70 sh_dac_enable(pdata->channel);
71}
72
73static void dac_audio_stop(struct dac_audio_pdata *pdata)
74{
75 u16 v;
76 u8 v8;
77
78 /* HP Jornada 680/690 speaker off */
79 v = inw(HD64461_GPADR);
80 v |= HD64461_GPADR_SPEAKER;
81 outw(v, HD64461_GPADR);
82
83 /* HP Palmtop 620lx/660lx speaker off */
84 v8 = inb(PKDR);
85 v8 |= PKDR_SPEAKER;
86 outb(v8, PKDR);
87
88 sh_dac_output(0, pdata->channel);
89 sh_dac_disable(pdata->channel);
90}
91
92static struct dac_audio_pdata dac_audio_platform_data = {
93 .buffer_size = 64000,
94 .channel = 1,
95 .start = dac_audio_start,
96 .stop = dac_audio_stop,
97};
98
99static struct platform_device dac_audio_device = {
100 .name = "dac_audio",
101 .id = -1,
102 .dev = {
103 .platform_data = &dac_audio_platform_data,
104 }
105
106};
107
54static struct platform_device *hp6xx_devices[] __initdata = { 108static struct platform_device *hp6xx_devices[] __initdata = {
55 &cf_ide_device, 109 &cf_ide_device,
56 &jornadakbd_device, 110 &jornadakbd_device,
111 &dac_audio_device,
57}; 112};
58 113
59static void __init hp6xx_init_irq(void) 114static void __init hp6xx_init_irq(void)
@@ -94,19 +149,19 @@ static void __init hp6xx_setup(char **cmdline_p)
94 149
95 sh_dac_output(0, DAC_SPEAKER_VOLUME); 150 sh_dac_output(0, DAC_SPEAKER_VOLUME);
96 sh_dac_disable(DAC_SPEAKER_VOLUME); 151 sh_dac_disable(DAC_SPEAKER_VOLUME);
97 v8 = ctrl_inb(DACR); 152 v8 = __raw_readb(DACR);
98 v8 &= ~DACR_DAE; 153 v8 &= ~DACR_DAE;
99 ctrl_outb(v8,DACR); 154 __raw_writeb(v8,DACR);
100 155
101 v8 = ctrl_inb(SCPDR); 156 v8 = __raw_readb(SCPDR);
102 v8 |= SCPDR_TS_SCAN_X | SCPDR_TS_SCAN_Y; 157 v8 |= SCPDR_TS_SCAN_X | SCPDR_TS_SCAN_Y;
103 v8 &= ~SCPDR_TS_SCAN_ENABLE; 158 v8 &= ~SCPDR_TS_SCAN_ENABLE;
104 ctrl_outb(v8, SCPDR); 159 __raw_writeb(v8, SCPDR);
105 160
106 v = ctrl_inw(SCPCR); 161 v = __raw_readw(SCPCR);
107 v &= ~SCPCR_TS_MASK; 162 v &= ~SCPCR_TS_MASK;
108 v |= SCPCR_TS_ENABLE; 163 v |= SCPCR_TS_ENABLE;
109 ctrl_outw(v, SCPCR); 164 __raw_writew(v, SCPCR);
110} 165}
111device_initcall(hp6xx_devices_setup); 166device_initcall(hp6xx_devices_setup);
112 167
diff --git a/arch/sh/boards/mach-kfr2r09/Makefile b/arch/sh/boards/mach-kfr2r09/Makefile
index 5d5867826e3b..4e577a3bf658 100644
--- a/arch/sh/boards/mach-kfr2r09/Makefile
+++ b/arch/sh/boards/mach-kfr2r09/Makefile
@@ -1,2 +1,2 @@
1obj-y := setup.o 1obj-y := setup.o sdram.o
2obj-$(CONFIG_FB_SH_MOBILE_LCDC) += lcd_wqvga.o 2obj-$(CONFIG_FB_SH_MOBILE_LCDC) += lcd_wqvga.o
diff --git a/arch/sh/boards/mach-kfr2r09/lcd_wqvga.c b/arch/sh/boards/mach-kfr2r09/lcd_wqvga.c
index 8ccb1cc8b589..e9b970846c41 100644
--- a/arch/sh/boards/mach-kfr2r09/lcd_wqvga.c
+++ b/arch/sh/boards/mach-kfr2r09/lcd_wqvga.c
@@ -273,6 +273,12 @@ int kfr2r09_lcd_setup(void *board_data, void *sohandle,
273 return 0; 273 return 0;
274} 274}
275 275
276void kfr2r09_lcd_start(void *board_data, void *sohandle,
277 struct sh_mobile_lcdc_sys_bus_ops *so)
278{
279 write_memory_start(sohandle, so);
280}
281
276#define CTRL_CKSW 0x10 282#define CTRL_CKSW 0x10
277#define CTRL_C10 0x20 283#define CTRL_C10 0x20
278#define CTRL_CPSW 0x80 284#define CTRL_CPSW 0x80
diff --git a/arch/sh/boards/mach-kfr2r09/sdram.S b/arch/sh/boards/mach-kfr2r09/sdram.S
new file mode 100644
index 000000000000..0c9f55bec2fe
--- /dev/null
+++ b/arch/sh/boards/mach-kfr2r09/sdram.S
@@ -0,0 +1,80 @@
1/*
2 * KFR2R09 sdram self/auto-refresh setup code
3 *
4 * Copyright (C) 2009 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/sys.h>
12#include <linux/errno.h>
13#include <linux/linkage.h>
14#include <asm/asm-offsets.h>
15#include <asm/suspend.h>
16#include <asm/romimage-macros.h>
17
18/* code to enter and leave self-refresh. must be self-contained.
19 * this code will be copied to on-chip memory and executed from there.
20 */
21 .balign 4
22ENTRY(kfr2r09_sdram_enter_start)
23
24 /* DBSC: put memory in self-refresh mode */
25
26 ED 0xFD000010, 0x00000000 /* DBEN */
27 ED 0xFD000040, 0x00000000 /* DBRFPDN0 */
28 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
29 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
30 ED 0xFD000040, 0x00000001 /* DBRFPDN0 */
31
32 rts
33 nop
34
35ENTRY(kfr2r09_sdram_enter_end)
36
37 .balign 4
38ENTRY(kfr2r09_sdram_leave_start)
39
40 /* DBSC: put memory in auto-refresh mode */
41
42 mov.l @(SH_SLEEP_MODE, r5), r0
43 tst #SUSP_SH_RSTANDBY, r0
44 bf resume_rstandby
45
46 ED 0xFD000040, 0x00000000 /* DBRFPDN0 */
47 WAIT 1
48 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
49 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
50 ED 0xFD000010, 0x00000001 /* DBEN */
51 ED 0xFD000040, 0x00010000 /* DBRFPDN0 */
52
53 rts
54 nop
55
56resume_rstandby:
57
58 /* DBSC: re-initialize and put in auto-refresh */
59
60 ED 0xFD000108, 0x40000301 /* DBPDCNT0 */
61 ED 0xFD000020, 0x011B0002 /* DBCONF */
62 ED 0xFD000030, 0x03060E02 /* DBTR0 */
63 ED 0xFD000034, 0x01020102 /* DBTR1 */
64 ED 0xFD000038, 0x01090406 /* DBTR2 */
65 ED 0xFD000008, 0x00000004 /* DBKIND */
66 ED 0xFD000040, 0x00000001 /* DBRFPDN0 */
67 ED 0xFD000040, 0x00000000 /* DBRFPDN0 */
68 ED 0xFD000018, 0x00000001 /* DBCKECNT */
69 WAIT 1
70 ED 0xFD000010, 0x00000001 /* DBEN */
71 ED 0xFD000044, 0x000004AF /* DBRFPDN1 */
72 ED 0xFD000048, 0x20CF0037 /* DBRFPDN2 */
73 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
74 ED 0xFD000108, 0x40000300 /* DBPDCNT0 */
75 ED 0xFD000040, 0x00010000 /* DBRFPDN0 */
76
77 rts
78 nop
79
80ENTRY(kfr2r09_sdram_leave_end)
diff --git a/arch/sh/boards/mach-kfr2r09/setup.c b/arch/sh/boards/mach-kfr2r09/setup.c
index c08d33fe2104..b2cd0ed8664e 100644
--- a/arch/sh/boards/mach-kfr2r09/setup.c
+++ b/arch/sh/boards/mach-kfr2r09/setup.c
@@ -16,13 +16,17 @@
16#include <linux/clk.h> 16#include <linux/clk.h>
17#include <linux/gpio.h> 17#include <linux/gpio.h>
18#include <linux/input.h> 18#include <linux/input.h>
19#include <linux/input/sh_keysc.h>
19#include <linux/i2c.h> 20#include <linux/i2c.h>
20#include <linux/usb/r8a66597.h> 21#include <linux/usb/r8a66597.h>
22#include <media/rj54n1cb0c.h>
23#include <media/soc_camera.h>
24#include <media/sh_mobile_ceu.h>
21#include <video/sh_mobile_lcdc.h> 25#include <video/sh_mobile_lcdc.h>
26#include <asm/suspend.h>
22#include <asm/clock.h> 27#include <asm/clock.h>
23#include <asm/machvec.h> 28#include <asm/machvec.h>
24#include <asm/io.h> 29#include <asm/io.h>
25#include <asm/sh_keysc.h>
26#include <cpu/sh7724.h> 30#include <cpu/sh7724.h>
27#include <mach/kfr2r09.h> 31#include <mach/kfr2r09.h>
28 32
@@ -146,6 +150,7 @@ static struct sh_mobile_lcdc_info kfr2r09_sh_lcdc_info = {
146 }, 150 },
147 .board_cfg = { 151 .board_cfg = {
148 .setup_sys = kfr2r09_lcd_setup, 152 .setup_sys = kfr2r09_lcd_setup,
153 .start_transfer = kfr2r09_lcd_start,
149 .display_on = kfr2r09_lcd_on, 154 .display_on = kfr2r09_lcd_on,
150 .display_off = kfr2r09_lcd_off, 155 .display_off = kfr2r09_lcd_off,
151 }, 156 },
@@ -212,11 +217,162 @@ static struct platform_device kfr2r09_usb0_gadget_device = {
212 .resource = kfr2r09_usb0_gadget_resources, 217 .resource = kfr2r09_usb0_gadget_resources,
213}; 218};
214 219
220static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
221 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
222};
223
224static struct resource kfr2r09_ceu_resources[] = {
225 [0] = {
226 .name = "CEU",
227 .start = 0xfe910000,
228 .end = 0xfe91009f,
229 .flags = IORESOURCE_MEM,
230 },
231 [1] = {
232 .start = 52,
233 .end = 52,
234 .flags = IORESOURCE_IRQ,
235 },
236 [2] = {
237 /* place holder for contiguous memory */
238 },
239};
240
241static struct platform_device kfr2r09_ceu_device = {
242 .name = "sh_mobile_ceu",
243 .id = 0, /* "ceu0" clock */
244 .num_resources = ARRAY_SIZE(kfr2r09_ceu_resources),
245 .resource = kfr2r09_ceu_resources,
246 .dev = {
247 .platform_data = &sh_mobile_ceu_info,
248 },
249 .archdata = {
250 .hwblk_id = HWBLK_CEU0,
251 },
252};
253
254static struct i2c_board_info kfr2r09_i2c_camera = {
255 I2C_BOARD_INFO("rj54n1cb0c", 0x50),
256};
257
258static struct clk *camera_clk;
259
260/* set VIO_CKO clock to 25MHz */
261#define CEU_MCLK_FREQ 25000000
262
263#define DRVCRB 0xA405018C
264static int camera_power(struct device *dev, int mode)
265{
266 int ret;
267
268 if (mode) {
269 long rate;
270
271 camera_clk = clk_get(NULL, "video_clk");
272 if (IS_ERR(camera_clk))
273 return PTR_ERR(camera_clk);
274
275 rate = clk_round_rate(camera_clk, CEU_MCLK_FREQ);
276 ret = clk_set_rate(camera_clk, rate);
277 if (ret < 0)
278 goto eclkrate;
279
280 /* set DRVCRB
281 *
282 * use 1.8 V for VccQ_VIO
283 * use 2.85V for VccQ_SR
284 */
285 __raw_writew((__raw_readw(DRVCRB) & ~0x0003) | 0x0001, DRVCRB);
286
287 /* reset clear */
288 ret = gpio_request(GPIO_PTB4, NULL);
289 if (ret < 0)
290 goto eptb4;
291 ret = gpio_request(GPIO_PTB7, NULL);
292 if (ret < 0)
293 goto eptb7;
294
295 ret = gpio_direction_output(GPIO_PTB4, 1);
296 if (!ret)
297 ret = gpio_direction_output(GPIO_PTB7, 1);
298 if (ret < 0)
299 goto egpioout;
300 msleep(1);
301
302 ret = clk_enable(camera_clk); /* start VIO_CKO */
303 if (ret < 0)
304 goto eclkon;
305
306 return 0;
307 }
308
309 ret = 0;
310
311 clk_disable(camera_clk);
312eclkon:
313 gpio_set_value(GPIO_PTB7, 0);
314egpioout:
315 gpio_set_value(GPIO_PTB4, 0);
316 gpio_free(GPIO_PTB7);
317eptb7:
318 gpio_free(GPIO_PTB4);
319eptb4:
320eclkrate:
321 clk_put(camera_clk);
322 return ret;
323}
324
325static struct rj54n1_pdata rj54n1_priv = {
326 .mclk_freq = CEU_MCLK_FREQ,
327 .ioctl_high = false,
328};
329
330static struct soc_camera_link rj54n1_link = {
331 .power = camera_power,
332 .board_info = &kfr2r09_i2c_camera,
333 .i2c_adapter_id = 1,
334 .module_name = "rj54n1cb0c",
335 .priv = &rj54n1_priv,
336};
337
338static struct platform_device kfr2r09_camera = {
339 .name = "soc-camera-pdrv",
340 .id = 0,
341 .dev = {
342 .platform_data = &rj54n1_link,
343 },
344};
345
346static struct resource kfr2r09_sh_sdhi0_resources[] = {
347 [0] = {
348 .name = "SDHI0",
349 .start = 0x04ce0000,
350 .end = 0x04ce01ff,
351 .flags = IORESOURCE_MEM,
352 },
353 [1] = {
354 .start = 100,
355 .flags = IORESOURCE_IRQ,
356 },
357};
358
359static struct platform_device kfr2r09_sh_sdhi0_device = {
360 .name = "sh_mobile_sdhi",
361 .num_resources = ARRAY_SIZE(kfr2r09_sh_sdhi0_resources),
362 .resource = kfr2r09_sh_sdhi0_resources,
363 .archdata = {
364 .hwblk_id = HWBLK_SDHI0,
365 },
366};
367
215static struct platform_device *kfr2r09_devices[] __initdata = { 368static struct platform_device *kfr2r09_devices[] __initdata = {
216 &kfr2r09_nor_flash_device, 369 &kfr2r09_nor_flash_device,
217 &kfr2r09_nand_flash_device, 370 &kfr2r09_nand_flash_device,
218 &kfr2r09_sh_keysc_device, 371 &kfr2r09_sh_keysc_device,
219 &kfr2r09_sh_lcdc_device, 372 &kfr2r09_sh_lcdc_device,
373 &kfr2r09_ceu_device,
374 &kfr2r09_camera,
375 &kfr2r09_sh_sdhi0_device,
220}; 376};
221 377
222#define BSC_CS0BCR 0xfec10004 378#define BSC_CS0BCR 0xfec10004
@@ -268,11 +424,59 @@ static int kfr2r09_usb0_gadget_i2c_setup(void)
268 424
269 return 0; 425 return 0;
270} 426}
427
428static int kfr2r09_serial_i2c_setup(void)
429{
430 struct i2c_adapter *a;
431 struct i2c_msg msg;
432 unsigned char buf[2];
433 int ret;
434
435 a = i2c_get_adapter(0);
436 if (!a)
437 return -ENODEV;
438
439 /* set bit 6 (the 7th bit) of chip at 0x09, register 0x13 */
440 buf[0] = 0x13;
441 msg.addr = 0x09;
442 msg.buf = buf;
443 msg.len = 1;
444 msg.flags = 0;
445 ret = i2c_transfer(a, &msg, 1);
446 if (ret != 1)
447 return -ENODEV;
448
449 buf[0] = 0;
450 msg.addr = 0x09;
451 msg.buf = buf;
452 msg.len = 1;
453 msg.flags = I2C_M_RD;
454 ret = i2c_transfer(a, &msg, 1);
455 if (ret != 1)
456 return -ENODEV;
457
458 buf[1] = buf[0] | (1 << 6);
459 buf[0] = 0x13;
460 msg.addr = 0x09;
461 msg.buf = buf;
462 msg.len = 2;
463 msg.flags = 0;
464 ret = i2c_transfer(a, &msg, 1);
465 if (ret != 1)
466 return -ENODEV;
467
468 return 0;
469}
271#else 470#else
272static int kfr2r09_usb0_gadget_i2c_setup(void) 471static int kfr2r09_usb0_gadget_i2c_setup(void)
273{ 472{
274 return -ENODEV; 473 return -ENODEV;
275} 474}
475
476static int kfr2r09_serial_i2c_setup(void)
477{
478 return -ENODEV;
479}
276#endif 480#endif
277 481
278static int kfr2r09_usb0_gadget_setup(void) 482static int kfr2r09_usb0_gadget_setup(void)
@@ -288,30 +492,46 @@ static int kfr2r09_usb0_gadget_setup(void)
288 if (kfr2r09_usb0_gadget_i2c_setup() != 0) 492 if (kfr2r09_usb0_gadget_i2c_setup() != 0)
289 return -ENODEV; /* unable to configure using i2c */ 493 return -ENODEV; /* unable to configure using i2c */
290 494
291 ctrl_outw((ctrl_inw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB); 495 __raw_writew((__raw_readw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB);
292 gpio_request(GPIO_FN_PDSTATUS, NULL); /* R-standby disables USB clock */ 496 gpio_request(GPIO_FN_PDSTATUS, NULL); /* R-standby disables USB clock */
293 gpio_request(GPIO_PTV6, NULL); /* USBCLK_ON */ 497 gpio_request(GPIO_PTV6, NULL); /* USBCLK_ON */
294 gpio_direction_output(GPIO_PTV6, 1); /* USBCLK_ON = H */ 498 gpio_direction_output(GPIO_PTV6, 1); /* USBCLK_ON = H */
295 msleep(20); /* wait 20ms to let the clock settle */ 499 msleep(20); /* wait 20ms to let the clock settle */
296 clk_enable(clk_get(NULL, "usb0")); 500 clk_enable(clk_get(NULL, "usb0"));
297 ctrl_outw(0x0600, 0xa40501d4); 501 __raw_writew(0x0600, 0xa40501d4);
298 502
299 return 0; 503 return 0;
300} 504}
301 505
506extern char kfr2r09_sdram_enter_start;
507extern char kfr2r09_sdram_enter_end;
508extern char kfr2r09_sdram_leave_start;
509extern char kfr2r09_sdram_leave_end;
510
302static int __init kfr2r09_devices_setup(void) 511static int __init kfr2r09_devices_setup(void)
303{ 512{
513 /* register board specific self-refresh code */
514 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
515 SUSP_SH_RSTANDBY,
516 &kfr2r09_sdram_enter_start,
517 &kfr2r09_sdram_enter_end,
518 &kfr2r09_sdram_leave_start,
519 &kfr2r09_sdram_leave_end);
520
304 /* enable SCIF1 serial port for YC401 console support */ 521 /* enable SCIF1 serial port for YC401 console support */
305 gpio_request(GPIO_FN_SCIF1_RXD, NULL); 522 gpio_request(GPIO_FN_SCIF1_RXD, NULL);
306 gpio_request(GPIO_FN_SCIF1_TXD, NULL); 523 gpio_request(GPIO_FN_SCIF1_TXD, NULL);
524 kfr2r09_serial_i2c_setup(); /* ECONTMSK(bit6=L10ONEN) set 1 */
525 gpio_request(GPIO_PTG3, NULL); /* HPON_ON */
526 gpio_direction_output(GPIO_PTG3, 1); /* HPON_ON = H */
307 527
308 /* setup NOR flash at CS0 */ 528 /* setup NOR flash at CS0 */
309 ctrl_outl(0x36db0400, BSC_CS0BCR); 529 __raw_writel(0x36db0400, BSC_CS0BCR);
310 ctrl_outl(0x00000500, BSC_CS0WCR); 530 __raw_writel(0x00000500, BSC_CS0WCR);
311 531
312 /* setup NAND flash at CS4 */ 532 /* setup NAND flash at CS4 */
313 ctrl_outl(0x36db0400, BSC_CS4BCR); 533 __raw_writel(0x36db0400, BSC_CS4BCR);
314 ctrl_outl(0x00000500, BSC_CS4WCR); 534 __raw_writel(0x00000500, BSC_CS4WCR);
315 535
316 /* setup KEYSC pins */ 536 /* setup KEYSC pins */
317 gpio_request(GPIO_FN_KEYOUT0, NULL); 537 gpio_request(GPIO_FN_KEYOUT0, NULL);
@@ -361,6 +581,32 @@ static int __init kfr2r09_devices_setup(void)
361 if (kfr2r09_usb0_gadget_setup() == 0) 581 if (kfr2r09_usb0_gadget_setup() == 0)
362 platform_device_register(&kfr2r09_usb0_gadget_device); 582 platform_device_register(&kfr2r09_usb0_gadget_device);
363 583
584 /* CEU */
585 gpio_request(GPIO_FN_VIO_CKO, NULL);
586 gpio_request(GPIO_FN_VIO0_CLK, NULL);
587 gpio_request(GPIO_FN_VIO0_VD, NULL);
588 gpio_request(GPIO_FN_VIO0_HD, NULL);
589 gpio_request(GPIO_FN_VIO0_FLD, NULL);
590 gpio_request(GPIO_FN_VIO0_D7, NULL);
591 gpio_request(GPIO_FN_VIO0_D6, NULL);
592 gpio_request(GPIO_FN_VIO0_D5, NULL);
593 gpio_request(GPIO_FN_VIO0_D4, NULL);
594 gpio_request(GPIO_FN_VIO0_D3, NULL);
595 gpio_request(GPIO_FN_VIO0_D2, NULL);
596 gpio_request(GPIO_FN_VIO0_D1, NULL);
597 gpio_request(GPIO_FN_VIO0_D0, NULL);
598
599 platform_resource_setup_memory(&kfr2r09_ceu_device, "ceu", 4 << 20);
600
601 /* SDHI0 connected to yc304 */
602 gpio_request(GPIO_FN_SDHI0CD, NULL);
603 gpio_request(GPIO_FN_SDHI0D3, NULL);
604 gpio_request(GPIO_FN_SDHI0D2, NULL);
605 gpio_request(GPIO_FN_SDHI0D1, NULL);
606 gpio_request(GPIO_FN_SDHI0D0, NULL);
607 gpio_request(GPIO_FN_SDHI0CMD, NULL);
608 gpio_request(GPIO_FN_SDHI0CLK, NULL);
609
364 return platform_add_devices(kfr2r09_devices, 610 return platform_add_devices(kfr2r09_devices,
365 ARRAY_SIZE(kfr2r09_devices)); 611 ARRAY_SIZE(kfr2r09_devices));
366} 612}
diff --git a/arch/sh/boards/mach-landisk/gio.c b/arch/sh/boards/mach-landisk/gio.c
index 528013188196..01e6abb769b9 100644
--- a/arch/sh/boards/mach-landisk/gio.c
+++ b/arch/sh/boards/mach-landisk/gio.c
@@ -76,39 +76,39 @@ static long gio_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
76 break; 76 break;
77 77
78 case GIODRV_IOCSGIODATA1: /* write byte */ 78 case GIODRV_IOCSGIODATA1: /* write byte */
79 ctrl_outb((unsigned char)(0x0ff & data), addr); 79 __raw_writeb((unsigned char)(0x0ff & data), addr);
80 break; 80 break;
81 81
82 case GIODRV_IOCSGIODATA2: /* write word */ 82 case GIODRV_IOCSGIODATA2: /* write word */
83 if (addr & 0x01) { 83 if (addr & 0x01) {
84 return -EFAULT; 84 return -EFAULT;
85 } 85 }
86 ctrl_outw((unsigned short int)(0x0ffff & data), addr); 86 __raw_writew((unsigned short int)(0x0ffff & data), addr);
87 break; 87 break;
88 88
89 case GIODRV_IOCSGIODATA4: /* write long */ 89 case GIODRV_IOCSGIODATA4: /* write long */
90 if (addr & 0x03) { 90 if (addr & 0x03) {
91 return -EFAULT; 91 return -EFAULT;
92 } 92 }
93 ctrl_outl(data, addr); 93 __raw_writel(data, addr);
94 break; 94 break;
95 95
96 case GIODRV_IOCGGIODATA1: /* read byte */ 96 case GIODRV_IOCGGIODATA1: /* read byte */
97 data = ctrl_inb(addr); 97 data = __raw_readb(addr);
98 break; 98 break;
99 99
100 case GIODRV_IOCGGIODATA2: /* read word */ 100 case GIODRV_IOCGGIODATA2: /* read word */
101 if (addr & 0x01) { 101 if (addr & 0x01) {
102 return -EFAULT; 102 return -EFAULT;
103 } 103 }
104 data = ctrl_inw(addr); 104 data = __raw_readw(addr);
105 break; 105 break;
106 106
107 case GIODRV_IOCGGIODATA4: /* read long */ 107 case GIODRV_IOCGGIODATA4: /* read long */
108 if (addr & 0x03) { 108 if (addr & 0x03) {
109 return -EFAULT; 109 return -EFAULT;
110 } 110 }
111 data = ctrl_inl(addr); 111 data = __raw_readl(addr);
112 break; 112 break;
113 default: 113 default:
114 return -EFAULT; 114 return -EFAULT;
diff --git a/arch/sh/boards/mach-landisk/irq.c b/arch/sh/boards/mach-landisk/irq.c
index 7b284cde1f58..96f38a4187d0 100644
--- a/arch/sh/boards/mach-landisk/irq.c
+++ b/arch/sh/boards/mach-landisk/irq.c
@@ -22,14 +22,14 @@ static void disable_landisk_irq(unsigned int irq)
22{ 22{
23 unsigned char mask = 0xff ^ (0x01 << (irq - 5)); 23 unsigned char mask = 0xff ^ (0x01 << (irq - 5));
24 24
25 ctrl_outb(ctrl_inb(PA_IMASK) & mask, PA_IMASK); 25 __raw_writeb(__raw_readb(PA_IMASK) & mask, PA_IMASK);
26} 26}
27 27
28static void enable_landisk_irq(unsigned int irq) 28static void enable_landisk_irq(unsigned int irq)
29{ 29{
30 unsigned char value = (0x01 << (irq - 5)); 30 unsigned char value = (0x01 << (irq - 5));
31 31
32 ctrl_outb(ctrl_inb(PA_IMASK) | value, PA_IMASK); 32 __raw_writeb(__raw_readb(PA_IMASK) | value, PA_IMASK);
33} 33}
34 34
35static struct irq_chip landisk_irq_chip __read_mostly = { 35static struct irq_chip landisk_irq_chip __read_mostly = {
@@ -52,5 +52,5 @@ void __init init_landisk_IRQ(void)
52 handle_level_irq, "level"); 52 handle_level_irq, "level");
53 enable_landisk_irq(i); 53 enable_landisk_irq(i);
54 } 54 }
55 ctrl_outb(0x00, PA_PWRINT_CLR); 55 __raw_writeb(0x00, PA_PWRINT_CLR);
56} 56}
diff --git a/arch/sh/boards/mach-landisk/psw.c b/arch/sh/boards/mach-landisk/psw.c
index e6b0efa098d1..bef83522f958 100644
--- a/arch/sh/boards/mach-landisk/psw.c
+++ b/arch/sh/boards/mach-landisk/psw.c
@@ -25,7 +25,7 @@ static irqreturn_t psw_irq_handler(int irq, void *arg)
25 unsigned int sw_value; 25 unsigned int sw_value;
26 int ret = 0; 26 int ret = 0;
27 27
28 sw_value = (0x0ff & (~ctrl_inb(PA_STATUS))); 28 sw_value = (0x0ff & (~__raw_readb(PA_STATUS)));
29 29
30 /* Nothing to do if there's no state change */ 30 /* Nothing to do if there's no state change */
31 if (psw->state) { 31 if (psw->state) {
@@ -42,7 +42,7 @@ static irqreturn_t psw_irq_handler(int irq, void *arg)
42 42
43out: 43out:
44 /* Clear the switch IRQs */ 44 /* Clear the switch IRQs */
45 ctrl_outb(0x00, PA_PWRINT_CLR); 45 __raw_writeb(0x00, PA_PWRINT_CLR);
46 46
47 return IRQ_RETVAL(ret); 47 return IRQ_RETVAL(ret);
48} 48}
diff --git a/arch/sh/boards/mach-landisk/setup.c b/arch/sh/boards/mach-landisk/setup.c
index db22ea2e6d49..50337acc18c5 100644
--- a/arch/sh/boards/mach-landisk/setup.c
+++ b/arch/sh/boards/mach-landisk/setup.c
@@ -25,7 +25,7 @@ void init_landisk_IRQ(void);
25 25
26static void landisk_power_off(void) 26static void landisk_power_off(void)
27{ 27{
28 ctrl_outb(0x01, PA_SHUTDOWN); 28 __raw_writeb(0x01, PA_SHUTDOWN);
29} 29}
30 30
31static struct resource cf_ide_resources[3]; 31static struct resource cf_ide_resources[3];
@@ -63,7 +63,7 @@ static int __init landisk_devices_setup(void)
63 /* open I/O area window */ 63 /* open I/O area window */
64 paddrbase = virt_to_phys((void *)PA_AREA5_IO); 64 paddrbase = virt_to_phys((void *)PA_AREA5_IO);
65 prot = PAGE_KERNEL_PCC(1, _PAGE_PCC_IO16); 65 prot = PAGE_KERNEL_PCC(1, _PAGE_PCC_IO16);
66 cf_ide_base = p3_ioremap(paddrbase, PAGE_SIZE, prot.pgprot); 66 cf_ide_base = ioremap_prot(paddrbase, PAGE_SIZE, pgprot_val(prot));
67 if (!cf_ide_base) { 67 if (!cf_ide_base) {
68 printk("allocate_cf_area : can't open CF I/O window!\n"); 68 printk("allocate_cf_area : can't open CF I/O window!\n");
69 return -ENOMEM; 69 return -ENOMEM;
@@ -88,7 +88,7 @@ __initcall(landisk_devices_setup);
88static void __init landisk_setup(char **cmdline_p) 88static void __init landisk_setup(char **cmdline_p)
89{ 89{
90 /* LED ON */ 90 /* LED ON */
91 ctrl_outb(ctrl_inb(PA_LED) | 0x03, PA_LED); 91 __raw_writeb(__raw_readb(PA_LED) | 0x03, PA_LED);
92 92
93 printk(KERN_INFO "I-O DATA DEVICE, INC. \"LANDISK Series\" support.\n"); 93 printk(KERN_INFO "I-O DATA DEVICE, INC. \"LANDISK Series\" support.\n");
94 pm_power_off = landisk_power_off; 94 pm_power_off = landisk_power_off;
diff --git a/arch/sh/boards/mach-lboxre2/setup.c b/arch/sh/boards/mach-lboxre2/setup.c
index 2b0b5818e1e4..79b4e0d77b71 100644
--- a/arch/sh/boards/mach-lboxre2/setup.c
+++ b/arch/sh/boards/mach-lboxre2/setup.c
@@ -56,8 +56,8 @@ static int __init lboxre2_devices_setup(void)
56 /* open I/O area window */ 56 /* open I/O area window */
57 paddrbase = virt_to_phys((void*)PA_AREA5_IO); 57 paddrbase = virt_to_phys((void*)PA_AREA5_IO);
58 psize = PAGE_SIZE; 58 psize = PAGE_SIZE;
59 prot = PAGE_KERNEL_PCC( 1 , _PAGE_PCC_IO16); 59 prot = PAGE_KERNEL_PCC(1, _PAGE_PCC_IO16);
60 cf0_io_base = (u32)p3_ioremap(paddrbase, psize, prot.pgprot); 60 cf0_io_base = (u32)ioremap_prot(paddrbase, psize, pgprot_val(prot));
61 if (!cf0_io_base) { 61 if (!cf0_io_base) {
62 printk(KERN_ERR "%s : can't open CF I/O window!\n" , __func__ ); 62 printk(KERN_ERR "%s : can't open CF I/O window!\n" , __func__ );
63 return -ENOMEM; 63 return -ENOMEM;
diff --git a/arch/sh/boards/mach-microdev/io.c b/arch/sh/boards/mach-microdev/io.c
index 52dd748211c7..2960c659020e 100644
--- a/arch/sh/boards/mach-microdev/io.c
+++ b/arch/sh/boards/mach-microdev/io.c
@@ -141,10 +141,10 @@ static inline void delay(void)
141#if defined(CONFIG_PCI) 141#if defined(CONFIG_PCI)
142 /* System board present, just make a dummy SRAM access. (CS0 will be 142 /* System board present, just make a dummy SRAM access. (CS0 will be
143 mapped to PCI memory, probably good to avoid it.) */ 143 mapped to PCI memory, probably good to avoid it.) */
144 ctrl_inw(0xa6800000); 144 __raw_readw(0xa6800000);
145#else 145#else
146 /* CS0 will be mapped to flash, ROM etc so safe to access it. */ 146 /* CS0 will be mapped to flash, ROM etc so safe to access it. */
147 ctrl_inw(0xa0000000); 147 __raw_readw(0xa0000000);
148#endif 148#endif
149} 149}
150 150
diff --git a/arch/sh/boards/mach-microdev/irq.c b/arch/sh/boards/mach-microdev/irq.c
index b551963579c1..a26d16669aa2 100644
--- a/arch/sh/boards/mach-microdev/irq.c
+++ b/arch/sh/boards/mach-microdev/irq.c
@@ -88,7 +88,7 @@ static void disable_microdev_irq(unsigned int irq)
88 fpgaIrq = fpgaIrqTable[irq].fpgaIrq; 88 fpgaIrq = fpgaIrqTable[irq].fpgaIrq;
89 89
90 /* disable interrupts on the FPGA INTC register */ 90 /* disable interrupts on the FPGA INTC register */
91 ctrl_outl(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTDSB_REG); 91 __raw_writel(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTDSB_REG);
92} 92}
93 93
94static void enable_microdev_irq(unsigned int irq) 94static void enable_microdev_irq(unsigned int irq)
@@ -107,13 +107,13 @@ static void enable_microdev_irq(unsigned int irq)
107 priorityReg = MICRODEV_FPGA_INTPRI_REG(fpgaIrq); 107 priorityReg = MICRODEV_FPGA_INTPRI_REG(fpgaIrq);
108 108
109 /* set priority for the interrupt */ 109 /* set priority for the interrupt */
110 priorities = ctrl_inl(priorityReg); 110 priorities = __raw_readl(priorityReg);
111 priorities &= ~MICRODEV_FPGA_INTPRI_MASK(fpgaIrq); 111 priorities &= ~MICRODEV_FPGA_INTPRI_MASK(fpgaIrq);
112 priorities |= MICRODEV_FPGA_INTPRI_LEVEL(fpgaIrq, pri); 112 priorities |= MICRODEV_FPGA_INTPRI_LEVEL(fpgaIrq, pri);
113 ctrl_outl(priorities, priorityReg); 113 __raw_writel(priorities, priorityReg);
114 114
115 /* enable interrupts on the FPGA INTC register */ 115 /* enable interrupts on the FPGA INTC register */
116 ctrl_outl(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTENB_REG); 116 __raw_writel(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTENB_REG);
117} 117}
118 118
119/* This function sets the desired irq handler to be a MicroDev type */ 119/* This function sets the desired irq handler to be a MicroDev type */
@@ -134,7 +134,7 @@ extern void __init init_microdev_irq(void)
134 int i; 134 int i;
135 135
136 /* disable interrupts on the FPGA INTC register */ 136 /* disable interrupts on the FPGA INTC register */
137 ctrl_outl(~0ul, MICRODEV_FPGA_INTDSB_REG); 137 __raw_writel(~0ul, MICRODEV_FPGA_INTDSB_REG);
138 138
139 for (i = 0; i < NUM_EXTERNAL_IRQS; i++) 139 for (i = 0; i < NUM_EXTERNAL_IRQS; i++)
140 make_microdev_irq(i); 140 make_microdev_irq(i);
diff --git a/arch/sh/boards/mach-migor/Makefile b/arch/sh/boards/mach-migor/Makefile
index 5f231dd25c0e..4601a89e5ac7 100644
--- a/arch/sh/boards/mach-migor/Makefile
+++ b/arch/sh/boards/mach-migor/Makefile
@@ -1,2 +1,2 @@
1obj-y := setup.o 1obj-y := setup.o sdram.o
2obj-$(CONFIG_SH_MIGOR_QVGA) += lcd_qvga.o 2obj-$(CONFIG_SH_MIGOR_QVGA) += lcd_qvga.o
diff --git a/arch/sh/boards/mach-migor/sdram.S b/arch/sh/boards/mach-migor/sdram.S
new file mode 100644
index 000000000000..614aa3a1398c
--- /dev/null
+++ b/arch/sh/boards/mach-migor/sdram.S
@@ -0,0 +1,69 @@
1/*
2 * Migo-R sdram self/auto-refresh setup code
3 *
4 * Copyright (C) 2009 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/sys.h>
12#include <linux/errno.h>
13#include <linux/linkage.h>
14#include <asm/asm-offsets.h>
15#include <asm/suspend.h>
16#include <asm/romimage-macros.h>
17
18/* code to enter and leave self-refresh. must be self-contained.
19 * this code will be copied to on-chip memory and executed from there.
20 */
21 .balign 4
22ENTRY(migor_sdram_enter_start)
23
24 /* SBSC: disable power down and put in self-refresh mode */
25 mov.l 1f, r4
26 mov.l 2f, r1
27 mov.l @r4, r2
28 or r1, r2
29 mov.l 3f, r3
30 and r3, r2
31 mov.l r2, @r4
32
33 rts
34 nop
35
36 .balign 4
371: .long 0xfe400008 /* SDCR0 */
382: .long 0x00000400
393: .long 0xffff7fff
40ENTRY(migor_sdram_enter_end)
41
42 .balign 4
43ENTRY(migor_sdram_leave_start)
44
45 /* SBSC: set auto-refresh mode */
46 mov.l 1f, r4
47 mov.l @r4, r0
48 mov.l 4f, r1
49 and r1, r0
50 mov.l r0, @r4
51 mov.l 6f, r4
52 mov.l 8f, r0
53 mov.l @r4, r1
54 mov #-1, r4
55 add r4, r1
56 or r1, r0
57 mov.l 7f, r1
58 mov.l r0, @r1
59
60 rts
61 nop
62
63 .balign 4
641: .long 0xfe400008 /* SDCR0 */
654: .long 0xfffffbff
666: .long 0xfe40001c /* RTCOR */
677: .long 0xfe400018 /* RTCNT */
688: .long 0xa55a0000
69ENTRY(migor_sdram_leave_end)
diff --git a/arch/sh/boards/mach-migor/setup.c b/arch/sh/boards/mach-migor/setup.c
index 6ed1fd32369e..7da0fc94a01e 100644
--- a/arch/sh/boards/mach-migor/setup.c
+++ b/arch/sh/boards/mach-migor/setup.c
@@ -11,6 +11,7 @@
11#include <linux/platform_device.h> 11#include <linux/platform_device.h>
12#include <linux/interrupt.h> 12#include <linux/interrupt.h>
13#include <linux/input.h> 13#include <linux/input.h>
14#include <linux/input/sh_keysc.h>
14#include <linux/mtd/physmap.h> 15#include <linux/mtd/physmap.h>
15#include <linux/mtd/nand.h> 16#include <linux/mtd/nand.h>
16#include <linux/i2c.h> 17#include <linux/i2c.h>
@@ -18,8 +19,6 @@
18#include <linux/delay.h> 19#include <linux/delay.h>
19#include <linux/clk.h> 20#include <linux/clk.h>
20#include <linux/gpio.h> 21#include <linux/gpio.h>
21#include <linux/spi/spi.h>
22#include <linux/spi/spi_gpio.h>
23#include <video/sh_mobile_lcdc.h> 22#include <video/sh_mobile_lcdc.h>
24#include <media/sh_mobile_ceu.h> 23#include <media/sh_mobile_ceu.h>
25#include <media/ov772x.h> 24#include <media/ov772x.h>
@@ -27,7 +26,7 @@
27#include <asm/clock.h> 26#include <asm/clock.h>
28#include <asm/machvec.h> 27#include <asm/machvec.h>
29#include <asm/io.h> 28#include <asm/io.h>
30#include <asm/sh_keysc.h> 29#include <asm/suspend.h>
31#include <mach/migor.h> 30#include <mach/migor.h>
32#include <cpu/sh7722.h> 31#include <cpu/sh7722.h>
33 32
@@ -390,17 +389,25 @@ static struct platform_device migor_ceu_device = {
390 }, 389 },
391}; 390};
392 391
393struct spi_gpio_platform_data sdcard_cn9_platform_data = { 392static struct resource sdhi_cn9_resources[] = {
394 .sck = GPIO_PTD0, 393 [0] = {
395 .mosi = GPIO_PTD1, 394 .name = "SDHI",
396 .miso = GPIO_PTD2, 395 .start = 0x04ce0000,
397 .num_chipselect = 1, 396 .end = 0x04ce01ff,
397 .flags = IORESOURCE_MEM,
398 },
399 [1] = {
400 .start = 100,
401 .flags = IORESOURCE_IRQ,
402 },
398}; 403};
399 404
400static struct platform_device sdcard_cn9_device = { 405static struct platform_device sdhi_cn9_device = {
401 .name = "spi_gpio", 406 .name = "sh_mobile_sdhi",
402 .dev = { 407 .num_resources = ARRAY_SIZE(sdhi_cn9_resources),
403 .platform_data = &sdcard_cn9_platform_data, 408 .resource = sdhi_cn9_resources,
409 .archdata = {
410 .hwblk_id = HWBLK_SDHI,
404 }, 411 },
405}; 412};
406 413
@@ -412,6 +419,9 @@ static struct i2c_board_info migor_i2c_devices[] = {
412 I2C_BOARD_INFO("migor_ts", 0x51), 419 I2C_BOARD_INFO("migor_ts", 0x51),
413 .irq = 38, /* IRQ6 */ 420 .irq = 38, /* IRQ6 */
414 }, 421 },
422 {
423 I2C_BOARD_INFO("wm8978", 0x1a),
424 },
415}; 425};
416 426
417static struct i2c_board_info migor_i2c_camera[] = { 427static struct i2c_board_info migor_i2c_camera[] = {
@@ -424,24 +434,28 @@ static struct i2c_board_info migor_i2c_camera[] = {
424}; 434};
425 435
426static struct ov772x_camera_info ov7725_info = { 436static struct ov772x_camera_info ov7725_info = {
427 .buswidth = SOCAM_DATAWIDTH_8, 437 .flags = OV772X_FLAG_8BIT,
428 .link = { 438};
429 .power = ov7725_power, 439
430 .board_info = &migor_i2c_camera[0], 440static struct soc_camera_link ov7725_link = {
431 .i2c_adapter_id = 0, 441 .power = ov7725_power,
432 .module_name = "ov772x", 442 .board_info = &migor_i2c_camera[0],
433 }, 443 .i2c_adapter_id = 0,
444 .module_name = "ov772x",
445 .priv = &ov7725_info,
434}; 446};
435 447
436static struct tw9910_video_info tw9910_info = { 448static struct tw9910_video_info tw9910_info = {
437 .buswidth = SOCAM_DATAWIDTH_8, 449 .buswidth = SOCAM_DATAWIDTH_8,
438 .mpout = TW9910_MPO_FIELD, 450 .mpout = TW9910_MPO_FIELD,
439 .link = { 451};
440 .power = tw9910_power, 452
441 .board_info = &migor_i2c_camera[1], 453static struct soc_camera_link tw9910_link = {
442 .i2c_adapter_id = 0, 454 .power = tw9910_power,
443 .module_name = "tw9910", 455 .board_info = &migor_i2c_camera[1],
444 } 456 .i2c_adapter_id = 0,
457 .module_name = "tw9910",
458 .priv = &tw9910_info,
445}; 459};
446 460
447static struct platform_device migor_camera[] = { 461static struct platform_device migor_camera[] = {
@@ -449,13 +463,13 @@ static struct platform_device migor_camera[] = {
449 .name = "soc-camera-pdrv", 463 .name = "soc-camera-pdrv",
450 .id = 0, 464 .id = 0,
451 .dev = { 465 .dev = {
452 .platform_data = &ov7725_info.link, 466 .platform_data = &ov7725_link,
453 }, 467 },
454 }, { 468 }, {
455 .name = "soc-camera-pdrv", 469 .name = "soc-camera-pdrv",
456 .id = 1, 470 .id = 1,
457 .dev = { 471 .dev = {
458 .platform_data = &tw9910_info.link, 472 .platform_data = &tw9910_link,
459 }, 473 },
460 }, 474 },
461}; 475};
@@ -467,45 +481,34 @@ static struct platform_device *migor_devices[] __initdata = {
467 &migor_ceu_device, 481 &migor_ceu_device,
468 &migor_nor_flash_device, 482 &migor_nor_flash_device,
469 &migor_nand_flash_device, 483 &migor_nand_flash_device,
470 &sdcard_cn9_device, 484 &sdhi_cn9_device,
471 &migor_camera[0], 485 &migor_camera[0],
472 &migor_camera[1], 486 &migor_camera[1],
473}; 487};
474 488
475static struct spi_board_info migor_spi_devices[] = { 489extern char migor_sdram_enter_start;
476 { 490extern char migor_sdram_enter_end;
477 .modalias = "mmc_spi", 491extern char migor_sdram_leave_start;
478 .max_speed_hz = 5000000, 492extern char migor_sdram_leave_end;
479 .chip_select = 0,
480 .controller_data = (void *) GPIO_PTD5,
481 },
482};
483 493
484static int __init migor_devices_setup(void) 494static int __init migor_devices_setup(void)
485{ 495{
486 496 /* register board specific self-refresh code */
487#ifdef CONFIG_PM 497 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF,
498 &migor_sdram_enter_start,
499 &migor_sdram_enter_end,
500 &migor_sdram_leave_start,
501 &migor_sdram_leave_end);
488 /* Let D11 LED show STATUS0 */ 502 /* Let D11 LED show STATUS0 */
489 gpio_request(GPIO_FN_STATUS0, NULL); 503 gpio_request(GPIO_FN_STATUS0, NULL);
490 504
491 /* Lit D12 LED show PDSTATUS */ 505 /* Lit D12 LED show PDSTATUS */
492 gpio_request(GPIO_FN_PDSTATUS, NULL); 506 gpio_request(GPIO_FN_PDSTATUS, NULL);
493#else
494 /* Lit D11 LED */
495 gpio_request(GPIO_PTJ7, NULL);
496 gpio_direction_output(GPIO_PTJ7, 1);
497 gpio_export(GPIO_PTJ7, 0);
498
499 /* Lit D12 LED */
500 gpio_request(GPIO_PTJ5, NULL);
501 gpio_direction_output(GPIO_PTJ5, 1);
502 gpio_export(GPIO_PTJ5, 0);
503#endif
504 507
505 /* SMC91C111 - Enable IRQ0, Setup CS4 for 16-bit fast access */ 508 /* SMC91C111 - Enable IRQ0, Setup CS4 for 16-bit fast access */
506 gpio_request(GPIO_FN_IRQ0, NULL); 509 gpio_request(GPIO_FN_IRQ0, NULL);
507 ctrl_outl(0x00003400, BSC_CS4BCR); 510 __raw_writel(0x00003400, BSC_CS4BCR);
508 ctrl_outl(0x00110080, BSC_CS4WCR); 511 __raw_writel(0x00110080, BSC_CS4WCR);
509 512
510 /* KEYSC */ 513 /* KEYSC */
511 gpio_request(GPIO_FN_KEYOUT0, NULL); 514 gpio_request(GPIO_FN_KEYOUT0, NULL);
@@ -521,10 +524,20 @@ static int __init migor_devices_setup(void)
521 524
522 /* NAND Flash */ 525 /* NAND Flash */
523 gpio_request(GPIO_FN_CS6A_CE2B, NULL); 526 gpio_request(GPIO_FN_CS6A_CE2B, NULL);
524 ctrl_outl((ctrl_inl(BSC_CS6ABCR) & ~0x0600) | 0x0200, BSC_CS6ABCR); 527 __raw_writel((__raw_readl(BSC_CS6ABCR) & ~0x0600) | 0x0200, BSC_CS6ABCR);
525 gpio_request(GPIO_PTA1, NULL); 528 gpio_request(GPIO_PTA1, NULL);
526 gpio_direction_input(GPIO_PTA1); 529 gpio_direction_input(GPIO_PTA1);
527 530
531 /* SDHI */
532 gpio_request(GPIO_FN_SDHICD, NULL);
533 gpio_request(GPIO_FN_SDHIWP, NULL);
534 gpio_request(GPIO_FN_SDHID3, NULL);
535 gpio_request(GPIO_FN_SDHID2, NULL);
536 gpio_request(GPIO_FN_SDHID1, NULL);
537 gpio_request(GPIO_FN_SDHID0, NULL);
538 gpio_request(GPIO_FN_SDHICMD, NULL);
539 gpio_request(GPIO_FN_SDHICLK, NULL);
540
528 /* Touch Panel */ 541 /* Touch Panel */
529 gpio_request(GPIO_FN_IRQ6, NULL); 542 gpio_request(GPIO_FN_IRQ6, NULL);
530 543
@@ -605,16 +618,26 @@ static int __init migor_devices_setup(void)
605#else 618#else
606 gpio_direction_output(GPIO_PTT0, 1); 619 gpio_direction_output(GPIO_PTT0, 1);
607#endif 620#endif
608 ctrl_outw(ctrl_inw(PORT_MSELCRB) | 0x2000, PORT_MSELCRB); /* D15->D8 */ 621 __raw_writew(__raw_readw(PORT_MSELCRB) | 0x2000, PORT_MSELCRB); /* D15->D8 */
609 622
610 platform_resource_setup_memory(&migor_ceu_device, "ceu", 4 << 20); 623 platform_resource_setup_memory(&migor_ceu_device, "ceu", 4 << 20);
611 624
625 /* SIU: Port B */
626 gpio_request(GPIO_FN_SIUBOLR, NULL);
627 gpio_request(GPIO_FN_SIUBOBT, NULL);
628 gpio_request(GPIO_FN_SIUBISLD, NULL);
629 gpio_request(GPIO_FN_SIUBOSLD, NULL);
630 gpio_request(GPIO_FN_SIUMCKB, NULL);
631
632 /*
633 * The original driver sets SIUB OLR/OBT, ILR/IBT, and SIUA OLR/OBT to
634 * output. Need only SIUB, set to output for master mode (table 34.2)
635 */
636 __raw_writew(__raw_readw(PORT_MSELCRA) | 1, PORT_MSELCRA);
637
612 i2c_register_board_info(0, migor_i2c_devices, 638 i2c_register_board_info(0, migor_i2c_devices,
613 ARRAY_SIZE(migor_i2c_devices)); 639 ARRAY_SIZE(migor_i2c_devices));
614 640
615 spi_register_board_info(migor_spi_devices,
616 ARRAY_SIZE(migor_spi_devices));
617
618 return platform_add_devices(migor_devices, ARRAY_SIZE(migor_devices)); 641 return platform_add_devices(migor_devices, ARRAY_SIZE(migor_devices));
619} 642}
620arch_initcall(migor_devices_setup); 643arch_initcall(migor_devices_setup);
diff --git a/arch/sh/boards/mach-r2d/irq.c b/arch/sh/boards/mach-r2d/irq.c
index c70fecedcac4..574f009c3c31 100644
--- a/arch/sh/boards/mach-r2d/irq.c
+++ b/arch/sh/boards/mach-r2d/irq.c
@@ -116,7 +116,7 @@ static unsigned char irl2irq[R2D_NR_IRL];
116 116
117int rts7751r2d_irq_demux(int irq) 117int rts7751r2d_irq_demux(int irq)
118{ 118{
119 if (irq >= R2D_NR_IRL || !irl2irq[irq]) 119 if (irq >= R2D_NR_IRL || irq < 0 || !irl2irq[irq])
120 return irq; 120 return irq;
121 121
122 return irl2irq[irq]; 122 return irl2irq[irq];
@@ -129,7 +129,7 @@ void __init init_rts7751r2d_IRQ(void)
129{ 129{
130 struct intc_desc *d; 130 struct intc_desc *d;
131 131
132 switch (ctrl_inw(PA_VERREG) & 0xf0) { 132 switch (__raw_readw(PA_VERREG) & 0xf0) {
133#ifdef CONFIG_RTS7751R2D_PLUS 133#ifdef CONFIG_RTS7751R2D_PLUS
134 case 0x10: 134 case 0x10:
135 printk(KERN_INFO "Using R2D-PLUS interrupt controller.\n"); 135 printk(KERN_INFO "Using R2D-PLUS interrupt controller.\n");
@@ -147,7 +147,7 @@ void __init init_rts7751r2d_IRQ(void)
147#endif 147#endif
148 default: 148 default:
149 printk(KERN_INFO "Unknown R2D interrupt controller 0x%04x\n", 149 printk(KERN_INFO "Unknown R2D interrupt controller 0x%04x\n",
150 ctrl_inw(PA_VERREG)); 150 __raw_readw(PA_VERREG));
151 return; 151 return;
152 } 152 }
153 153
diff --git a/arch/sh/boards/mach-r2d/setup.c b/arch/sh/boards/mach-r2d/setup.c
index a625ecb93e47..b84df6a3a93c 100644
--- a/arch/sh/boards/mach-r2d/setup.c
+++ b/arch/sh/boards/mach-r2d/setup.c
@@ -70,7 +70,7 @@ static struct spi_board_info spi_bus[] = {
70static void r2d_chip_select(struct sh_spi_info *spi, int cs, int state) 70static void r2d_chip_select(struct sh_spi_info *spi, int cs, int state)
71{ 71{
72 BUG_ON(cs != 0); /* Single Epson RTC-9701JE attached on CS0 */ 72 BUG_ON(cs != 0); /* Single Epson RTC-9701JE attached on CS0 */
73 ctrl_outw(state == BITBANG_CS_ACTIVE, PA_RTCCE); 73 __raw_writew(state == BITBANG_CS_ACTIVE, PA_RTCCE);
74} 74}
75 75
76static struct sh_spi_info spi_info = { 76static struct sh_spi_info spi_info = {
@@ -262,7 +262,7 @@ __initcall(rts7751r2d_devices_setup);
262 262
263static void rts7751r2d_power_off(void) 263static void rts7751r2d_power_off(void)
264{ 264{
265 ctrl_outw(0x0001, PA_POWOFF); 265 __raw_writew(0x0001, PA_POWOFF);
266} 266}
267 267
268/* 268/*
@@ -271,14 +271,14 @@ static void rts7751r2d_power_off(void)
271static void __init rts7751r2d_setup(char **cmdline_p) 271static void __init rts7751r2d_setup(char **cmdline_p)
272{ 272{
273 void __iomem *sm501_reg; 273 void __iomem *sm501_reg;
274 u16 ver = ctrl_inw(PA_VERREG); 274 u16 ver = __raw_readw(PA_VERREG);
275 275
276 printk(KERN_INFO "Renesas Technology Sales RTS7751R2D support.\n"); 276 printk(KERN_INFO "Renesas Technology Sales RTS7751R2D support.\n");
277 277
278 printk(KERN_INFO "FPGA version:%d (revision:%d)\n", 278 printk(KERN_INFO "FPGA version:%d (revision:%d)\n",
279 (ver >> 4) & 0xf, ver & 0xf); 279 (ver >> 4) & 0xf, ver & 0xf);
280 280
281 ctrl_outw(0x0000, PA_OUTPORT); 281 __raw_writew(0x0000, PA_OUTPORT);
282 pm_power_off = rts7751r2d_power_off; 282 pm_power_off = rts7751r2d_power_off;
283 283
284 /* sm501 dram configuration: 284 /* sm501 dram configuration:
diff --git a/arch/sh/boards/mach-rsk/devices-rsk7203.c b/arch/sh/boards/mach-rsk/devices-rsk7203.c
index c37617e63220..4fa08ba10253 100644
--- a/arch/sh/boards/mach-rsk/devices-rsk7203.c
+++ b/arch/sh/boards/mach-rsk/devices-rsk7203.c
@@ -96,7 +96,7 @@ static int __init rsk7203_devices_setup(void)
96 gpio_request(GPIO_FN_RXD0, NULL); 96 gpio_request(GPIO_FN_RXD0, NULL);
97 97
98 /* Setup LAN9118: CS1 in 16-bit Big Endian Mode, IRQ0 at Port B */ 98 /* Setup LAN9118: CS1 in 16-bit Big Endian Mode, IRQ0 at Port B */
99 ctrl_outl(0x36db0400, 0xfffc0008); /* CS1BCR */ 99 __raw_writel(0x36db0400, 0xfffc0008); /* CS1BCR */
100 gpio_request(GPIO_FN_IRQ0_PB, NULL); 100 gpio_request(GPIO_FN_IRQ0_PB, NULL);
101 101
102 return platform_add_devices(rsk7203_devices, 102 return platform_add_devices(rsk7203_devices,
diff --git a/arch/sh/boards/mach-sdk7780/irq.c b/arch/sh/boards/mach-sdk7780/irq.c
index 855558163c58..e5f7564f2511 100644
--- a/arch/sh/boards/mach-sdk7780/irq.c
+++ b/arch/sh/boards/mach-sdk7780/irq.c
@@ -37,9 +37,9 @@ void __init init_sdk7780_IRQ(void)
37{ 37{
38 printk(KERN_INFO "Using SDK7780 interrupt controller.\n"); 38 printk(KERN_INFO "Using SDK7780 interrupt controller.\n");
39 39
40 ctrl_outw(0xFFFF, FPGA_IRQ0MR); 40 __raw_writew(0xFFFF, FPGA_IRQ0MR);
41 /* Setup IRL 0-3 */ 41 /* Setup IRL 0-3 */
42 ctrl_outw(0x0003, FPGA_IMSR); 42 __raw_writew(0x0003, FPGA_IMSR);
43 plat_irq_setup_pins(IRQ_MODE_IRL3210); 43 plat_irq_setup_pins(IRQ_MODE_IRL3210);
44 44
45 register_intc_controller(&fpga_intc_desc); 45 register_intc_controller(&fpga_intc_desc);
diff --git a/arch/sh/boards/mach-sdk7780/setup.c b/arch/sh/boards/mach-sdk7780/setup.c
index aad94a78dc70..4da38db4b5fe 100644
--- a/arch/sh/boards/mach-sdk7780/setup.c
+++ b/arch/sh/boards/mach-sdk7780/setup.c
@@ -20,27 +20,18 @@
20 20
21#define GPIO_PECR 0xFFEA0008 21#define GPIO_PECR 0xFFEA0008
22 22
23//* Heartbeat */ 23/* Heartbeat */
24static struct heartbeat_data heartbeat_data = { 24static struct resource heartbeat_resource = {
25 .regsize = 16, 25 .start = PA_LED,
26}; 26 .end = PA_LED,
27 27 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
28static struct resource heartbeat_resources[] = {
29 [0] = {
30 .start = PA_LED,
31 .end = PA_LED,
32 .flags = IORESOURCE_MEM,
33 },
34}; 28};
35 29
36static struct platform_device heartbeat_device = { 30static struct platform_device heartbeat_device = {
37 .name = "heartbeat", 31 .name = "heartbeat",
38 .id = -1, 32 .id = -1,
39 .dev = { 33 .num_resources = 1,
40 .platform_data = &heartbeat_data, 34 .resource = &heartbeat_resource,
41 },
42 .num_resources = ARRAY_SIZE(heartbeat_resources),
43 .resource = heartbeat_resources,
44}; 35};
45 36
46/* SMC91x */ 37/* SMC91x */
@@ -83,8 +74,8 @@ device_initcall(sdk7780_devices_setup);
83 74
84static void __init sdk7780_setup(char **cmdline_p) 75static void __init sdk7780_setup(char **cmdline_p)
85{ 76{
86 u16 ver = ctrl_inw(FPGA_FPVERR); 77 u16 ver = __raw_readw(FPGA_FPVERR);
87 u16 dateStamp = ctrl_inw(FPGA_FPDATER); 78 u16 dateStamp = __raw_readw(FPGA_FPDATER);
88 79
89 printk(KERN_INFO "Renesas Technology Europe SDK7780 support.\n"); 80 printk(KERN_INFO "Renesas Technology Europe SDK7780 support.\n");
90 printk(KERN_INFO "Board version: %d (revision %d), " 81 printk(KERN_INFO "Board version: %d (revision %d), "
@@ -94,7 +85,7 @@ static void __init sdk7780_setup(char **cmdline_p)
94 dateStamp); 85 dateStamp);
95 86
96 /* Setup pin mux'ing for PCIC */ 87 /* Setup pin mux'ing for PCIC */
97 ctrl_outw(0x0000, GPIO_PECR); 88 __raw_writew(0x0000, GPIO_PECR);
98} 89}
99 90
100/* 91/*
diff --git a/arch/sh/boards/mach-sdk7786/Makefile b/arch/sh/boards/mach-sdk7786/Makefile
new file mode 100644
index 000000000000..a29f19e85b63
--- /dev/null
+++ b/arch/sh/boards/mach-sdk7786/Makefile
@@ -0,0 +1 @@
obj-y := setup.o fpga.o irq.o
diff --git a/arch/sh/boards/mach-sdk7786/fpga.c b/arch/sh/boards/mach-sdk7786/fpga.c
new file mode 100644
index 000000000000..3e4ec66a0417
--- /dev/null
+++ b/arch/sh/boards/mach-sdk7786/fpga.c
@@ -0,0 +1,72 @@
1/*
2 * SDK7786 FPGA Support.
3 *
4 * Copyright (C) 2010 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/init.h>
11#include <linux/io.h>
12#include <linux/bcd.h>
13#include <mach/fpga.h>
14#include <asm/sizes.h>
15
16#define FPGA_REGS_OFFSET 0x03fff800
17#define FPGA_REGS_SIZE 0x490
18
19/*
20 * The FPGA can be mapped in any of the generally available areas,
21 * so we attempt to scan for it using the fixed SRSTR read magic.
22 *
23 * Once the FPGA is located, the rest of the mapping data for the other
24 * components can be determined dynamically from its section mapping
25 * registers.
26 */
27static void __iomem *sdk7786_fpga_probe(void)
28{
29 unsigned long area;
30 void __iomem *base;
31
32 /*
33 * Iterate over all of the areas where the FPGA could be mapped.
34 * The possible range is anywhere from area 0 through 6, area 7
35 * is reserved.
36 */
37 for (area = PA_AREA0; area < PA_AREA7; area += SZ_64M) {
38 base = ioremap_nocache(area + FPGA_REGS_OFFSET, FPGA_REGS_SIZE);
39 if (!base) {
40 /* Failed to remap this area, move along. */
41 continue;
42 }
43
44 if (ioread16(base + SRSTR) == SRSTR_MAGIC)
45 return base; /* Found it! */
46
47 iounmap(base);
48 }
49
50 return NULL;
51}
52
53void __iomem *sdk7786_fpga_base;
54
55void __init sdk7786_fpga_init(void)
56{
57 u16 version, date;
58
59 sdk7786_fpga_base = sdk7786_fpga_probe();
60 if (unlikely(!sdk7786_fpga_base)) {
61 panic("FPGA detection failed.\n");
62 return;
63 }
64
65 version = fpga_read_reg(FPGAVR);
66 date = fpga_read_reg(FPGADR);
67
68 pr_info("\tFPGA version:\t%d.%d (built on %d/%d/%d)\n",
69 bcd2bin(version >> 8) & 0xf, bcd2bin(version & 0xf),
70 ((date >> 12) & 0xf) + 2000,
71 (date >> 8) & 0xf, bcd2bin(date & 0xff));
72}
diff --git a/arch/sh/boards/mach-sdk7786/irq.c b/arch/sh/boards/mach-sdk7786/irq.c
new file mode 100644
index 000000000000..46943a0da5b7
--- /dev/null
+++ b/arch/sh/boards/mach-sdk7786/irq.c
@@ -0,0 +1,48 @@
1/*
2 * SDK7786 FPGA IRQ Controller Support.
3 *
4 * Copyright (C) 2010 Matt Fleming
5 * Copyright (C) 2010 Paul Mundt
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11#include <linux/irq.h>
12#include <mach/fpga.h>
13#include <mach/irq.h>
14
15enum {
16 ATA_IRQ_BIT = 1,
17 SPI_BUSY_BIT = 2,
18 LIRQ5_BIT = 3,
19 LIRQ6_BIT = 4,
20 LIRQ7_BIT = 5,
21 LIRQ8_BIT = 6,
22 KEY_IRQ_BIT = 7,
23 PEN_IRQ_BIT = 8,
24 ETH_IRQ_BIT = 9,
25 RTC_ALARM_BIT = 10,
26 CRYSTAL_FAIL_BIT = 12,
27 ETH_PME_BIT = 14,
28};
29
30void __init sdk7786_init_irq(void)
31{
32 unsigned int tmp;
33
34 /* Enable priority encoding for all IRLs */
35 fpga_write_reg(fpga_read_reg(INTMSR) | 0x0303, INTMSR);
36
37 /* Clear FPGA interrupt status registers */
38 fpga_write_reg(0x0000, INTASR);
39 fpga_write_reg(0x0000, INTBSR);
40
41 /* Unmask FPGA interrupts */
42 tmp = fpga_read_reg(INTAMR);
43 tmp &= ~(1 << ETH_IRQ_BIT);
44 fpga_write_reg(tmp, INTAMR);
45
46 plat_irq_setup_pins(IRQ_MODE_IRL7654_MASK);
47 plat_irq_setup_pins(IRQ_MODE_IRL3210_MASK);
48}
diff --git a/arch/sh/boards/mach-sdk7786/setup.c b/arch/sh/boards/mach-sdk7786/setup.c
new file mode 100644
index 000000000000..f094ea2ee783
--- /dev/null
+++ b/arch/sh/boards/mach-sdk7786/setup.c
@@ -0,0 +1,189 @@
1/*
2 * Renesas Technology Europe SDK7786 Support.
3 *
4 * Copyright (C) 2010 Matt Fleming
5 * Copyright (C) 2010 Paul Mundt
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11#include <linux/init.h>
12#include <linux/platform_device.h>
13#include <linux/io.h>
14#include <linux/smsc911x.h>
15#include <linux/i2c.h>
16#include <linux/irq.h>
17#include <linux/clk.h>
18#include <mach/fpga.h>
19#include <mach/irq.h>
20#include <asm/machvec.h>
21#include <asm/heartbeat.h>
22#include <asm/sizes.h>
23#include <asm/reboot.h>
24
25static struct resource heartbeat_resource = {
26 .start = 0x07fff8b0,
27 .end = 0x07fff8b0 + sizeof(u16) - 1,
28 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
29};
30
31static struct platform_device heartbeat_device = {
32 .name = "heartbeat",
33 .id = -1,
34 .num_resources = 1,
35 .resource = &heartbeat_resource,
36};
37
38static struct resource smsc911x_resources[] = {
39 [0] = {
40 .name = "smsc911x-memory",
41 .start = 0x07ffff00,
42 .end = 0x07ffff00 + SZ_256 - 1,
43 .flags = IORESOURCE_MEM,
44 },
45 [1] = {
46 .name = "smsc911x-irq",
47 .start = evt2irq(0x2c0),
48 .end = evt2irq(0x2c0),
49 .flags = IORESOURCE_IRQ,
50 },
51};
52
53static struct smsc911x_platform_config smsc911x_config = {
54 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
55 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
56 .flags = SMSC911X_USE_32BIT,
57 .phy_interface = PHY_INTERFACE_MODE_MII,
58};
59
60static struct platform_device smsc911x_device = {
61 .name = "smsc911x",
62 .id = -1,
63 .num_resources = ARRAY_SIZE(smsc911x_resources),
64 .resource = smsc911x_resources,
65 .dev = {
66 .platform_data = &smsc911x_config,
67 },
68};
69
70static struct resource smbus_fpga_resource = {
71 .start = 0x07fff9e0,
72 .end = 0x07fff9e0 + SZ_32 - 1,
73 .flags = IORESOURCE_MEM,
74};
75
76static struct platform_device smbus_fpga_device = {
77 .name = "i2c-sdk7786",
78 .id = 0,
79 .num_resources = 1,
80 .resource = &smbus_fpga_resource,
81};
82
83static struct resource smbus_pcie_resource = {
84 .start = 0x07fffc30,
85 .end = 0x07fffc30 + SZ_32 - 1,
86 .flags = IORESOURCE_MEM,
87};
88
89static struct platform_device smbus_pcie_device = {
90 .name = "i2c-sdk7786",
91 .id = 1,
92 .num_resources = 1,
93 .resource = &smbus_pcie_resource,
94};
95
96static struct i2c_board_info __initdata sdk7786_i2c_devices[] = {
97 {
98 I2C_BOARD_INFO("max6900", 0x68),
99 },
100};
101
102static struct platform_device *sh7786_devices[] __initdata = {
103 &heartbeat_device,
104 &smsc911x_device,
105 &smbus_fpga_device,
106 &smbus_pcie_device,
107};
108
109static int sdk7786_i2c_setup(void)
110{
111 unsigned int tmp;
112
113 /*
114 * Hand over I2C control to the FPGA.
115 */
116 tmp = fpga_read_reg(SBCR);
117 tmp &= ~SCBR_I2CCEN;
118 tmp |= SCBR_I2CMEN;
119 fpga_write_reg(tmp, SBCR);
120
121 return i2c_register_board_info(0, sdk7786_i2c_devices,
122 ARRAY_SIZE(sdk7786_i2c_devices));
123}
124
125static int __init sdk7786_devices_setup(void)
126{
127 int ret;
128
129 ret = platform_add_devices(sh7786_devices, ARRAY_SIZE(sh7786_devices));
130 if (unlikely(ret != 0))
131 return ret;
132
133 return sdk7786_i2c_setup();
134}
135__initcall(sdk7786_devices_setup);
136
137static int sdk7786_mode_pins(void)
138{
139 return fpga_read_reg(MODSWR);
140}
141
142static int sdk7786_clk_init(void)
143{
144 struct clk *clk;
145 int ret;
146
147 /*
148 * Only handle the EXTAL case, anyone interfacing a crystal
149 * resonator will need to provide their own input clock.
150 */
151 if (test_mode_pin(MODE_PIN9))
152 return -EINVAL;
153
154 clk = clk_get(NULL, "extal");
155 if (!clk || IS_ERR(clk))
156 return PTR_ERR(clk);
157 ret = clk_set_rate(clk, 33333333);
158 clk_put(clk);
159
160 return ret;
161}
162
163static void sdk7786_restart(char *cmd)
164{
165 fpga_write_reg(0xa5a5, SRSTR);
166}
167
168/* Initialize the board */
169static void __init sdk7786_setup(char **cmdline_p)
170{
171 pr_info("Renesas Technology Europe SDK7786 support:\n");
172
173 sdk7786_fpga_init();
174
175 pr_info("\tPCB revision:\t%d\n", fpga_read_reg(PCBRR) & 0xf);
176
177 machine_ops.restart = sdk7786_restart;
178}
179
180/*
181 * The Machine Vector
182 */
183static struct sh_machine_vector mv_sdk7786 __initmv = {
184 .mv_name = "SDK7786",
185 .mv_setup = sdk7786_setup,
186 .mv_mode_pins = sdk7786_mode_pins,
187 .mv_clk_init = sdk7786_clk_init,
188 .mv_init_irq = sdk7786_init_irq,
189};
diff --git a/arch/sh/boards/mach-se/7206/io.c b/arch/sh/boards/mach-se/7206/io.c
index 180455642a43..adadc77532ee 100644
--- a/arch/sh/boards/mach-se/7206/io.c
+++ b/arch/sh/boards/mach-se/7206/io.c
@@ -16,7 +16,7 @@
16 16
17static inline void delay(void) 17static inline void delay(void)
18{ 18{
19 ctrl_inw(0x20000000); /* P2 ROM Area */ 19 __raw_readw(0x20000000); /* P2 ROM Area */
20} 20}
21 21
22/* MS7750 requires special versions of in*, out* routines, since 22/* MS7750 requires special versions of in*, out* routines, since
diff --git a/arch/sh/boards/mach-se/7206/irq.c b/arch/sh/boards/mach-se/7206/irq.c
index aef7f052851a..8d82175d83ab 100644
--- a/arch/sh/boards/mach-se/7206/irq.c
+++ b/arch/sh/boards/mach-se/7206/irq.c
@@ -32,12 +32,12 @@ static void disable_se7206_irq(unsigned int irq)
32 unsigned short msk0,msk1; 32 unsigned short msk0,msk1;
33 33
34 /* Set the priority in IPR to 0 */ 34 /* Set the priority in IPR to 0 */
35 val = ctrl_inw(INTC_IPR01); 35 val = __raw_readw(INTC_IPR01);
36 val &= mask; 36 val &= mask;
37 ctrl_outw(val, INTC_IPR01); 37 __raw_writew(val, INTC_IPR01);
38 /* FPGA mask set */ 38 /* FPGA mask set */
39 msk0 = ctrl_inw(INTMSK0); 39 msk0 = __raw_readw(INTMSK0);
40 msk1 = ctrl_inw(INTMSK1); 40 msk1 = __raw_readw(INTMSK1);
41 41
42 switch (irq) { 42 switch (irq) {
43 case IRQ0_IRQ: 43 case IRQ0_IRQ:
@@ -51,8 +51,8 @@ static void disable_se7206_irq(unsigned int irq)
51 msk1 |= 0x00ff; 51 msk1 |= 0x00ff;
52 break; 52 break;
53 } 53 }
54 ctrl_outw(msk0, INTMSK0); 54 __raw_writew(msk0, INTMSK0);
55 ctrl_outw(msk1, INTMSK1); 55 __raw_writew(msk1, INTMSK1);
56} 56}
57 57
58static void enable_se7206_irq(unsigned int irq) 58static void enable_se7206_irq(unsigned int irq)
@@ -62,13 +62,13 @@ static void enable_se7206_irq(unsigned int irq)
62 unsigned short msk0,msk1; 62 unsigned short msk0,msk1;
63 63
64 /* Set priority in IPR back to original value */ 64 /* Set priority in IPR back to original value */
65 val = ctrl_inw(INTC_IPR01); 65 val = __raw_readw(INTC_IPR01);
66 val |= value; 66 val |= value;
67 ctrl_outw(val, INTC_IPR01); 67 __raw_writew(val, INTC_IPR01);
68 68
69 /* FPGA mask reset */ 69 /* FPGA mask reset */
70 msk0 = ctrl_inw(INTMSK0); 70 msk0 = __raw_readw(INTMSK0);
71 msk1 = ctrl_inw(INTMSK1); 71 msk1 = __raw_readw(INTMSK1);
72 72
73 switch (irq) { 73 switch (irq) {
74 case IRQ0_IRQ: 74 case IRQ0_IRQ:
@@ -82,19 +82,20 @@ static void enable_se7206_irq(unsigned int irq)
82 msk1 &= ~0x00ff; 82 msk1 &= ~0x00ff;
83 break; 83 break;
84 } 84 }
85 ctrl_outw(msk0, INTMSK0); 85 __raw_writew(msk0, INTMSK0);
86 ctrl_outw(msk1, INTMSK1); 86 __raw_writew(msk1, INTMSK1);
87} 87}
88 88
89static void eoi_se7206_irq(unsigned int irq) 89static void eoi_se7206_irq(unsigned int irq)
90{ 90{
91 unsigned short sts0,sts1; 91 unsigned short sts0,sts1;
92 struct irq_desc *desc = irq_to_desc(irq);
92 93
93 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) 94 if (!(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
94 enable_se7206_irq(irq); 95 enable_se7206_irq(irq);
95 /* FPGA isr clear */ 96 /* FPGA isr clear */
96 sts0 = ctrl_inw(INTSTS0); 97 sts0 = __raw_readw(INTSTS0);
97 sts1 = ctrl_inw(INTSTS1); 98 sts1 = __raw_readw(INTSTS1);
98 99
99 switch (irq) { 100 switch (irq) {
100 case IRQ0_IRQ: 101 case IRQ0_IRQ:
@@ -108,8 +109,8 @@ static void eoi_se7206_irq(unsigned int irq)
108 sts1 &= ~0x00ff; 109 sts1 &= ~0x00ff;
109 break; 110 break;
110 } 111 }
111 ctrl_outw(sts0, INTSTS0); 112 __raw_writew(sts0, INTSTS0);
112 ctrl_outw(sts1, INTSTS1); 113 __raw_writew(sts1, INTSTS1);
113} 114}
114 115
115static struct irq_chip se7206_irq_chip __read_mostly = { 116static struct irq_chip se7206_irq_chip __read_mostly = {
@@ -136,11 +137,11 @@ void __init init_se7206_IRQ(void)
136 make_se7206_irq(IRQ0_IRQ); /* SMC91C111 */ 137 make_se7206_irq(IRQ0_IRQ); /* SMC91C111 */
137 make_se7206_irq(IRQ1_IRQ); /* ATA */ 138 make_se7206_irq(IRQ1_IRQ); /* ATA */
138 make_se7206_irq(IRQ3_IRQ); /* SLOT / PCM */ 139 make_se7206_irq(IRQ3_IRQ); /* SLOT / PCM */
139 ctrl_outw(inw(INTC_ICR1) | 0x000b ,INTC_ICR1 ) ; /* ICR1 */ 140 __raw_writew(inw(INTC_ICR1) | 0x000b ,INTC_ICR1 ) ; /* ICR1 */
140 141
141 /* FPGA System register setup*/ 142 /* FPGA System register setup*/
142 ctrl_outw(0x0000,INTSTS0); /* Clear INTSTS0 */ 143 __raw_writew(0x0000,INTSTS0); /* Clear INTSTS0 */
143 ctrl_outw(0x0000,INTSTS1); /* Clear INTSTS1 */ 144 __raw_writew(0x0000,INTSTS1); /* Clear INTSTS1 */
144 /* IRQ0=LAN, IRQ1=ATA, IRQ3=SLT,PCM */ 145 /* IRQ0=LAN, IRQ1=ATA, IRQ3=SLT,PCM */
145 ctrl_outw(0x0001,INTSEL); 146 __raw_writew(0x0001,INTSEL);
146} 147}
diff --git a/arch/sh/boards/mach-se/7206/setup.c b/arch/sh/boards/mach-se/7206/setup.c
index f5466384972e..8f5c65d43d1d 100644
--- a/arch/sh/boards/mach-se/7206/setup.c
+++ b/arch/sh/boards/mach-se/7206/setup.c
@@ -50,15 +50,12 @@ static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
50static struct heartbeat_data heartbeat_data = { 50static struct heartbeat_data heartbeat_data = {
51 .bit_pos = heartbeat_bit_pos, 51 .bit_pos = heartbeat_bit_pos,
52 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos), 52 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
53 .regsize = 32,
54}; 53};
55 54
56static struct resource heartbeat_resources[] = { 55static struct resource heartbeat_resource = {
57 [0] = { 56 .start = PA_LED,
58 .start = PA_LED, 57 .end = PA_LED,
59 .end = PA_LED, 58 .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT,
60 .flags = IORESOURCE_MEM,
61 },
62}; 59};
63 60
64static struct platform_device heartbeat_device = { 61static struct platform_device heartbeat_device = {
@@ -67,8 +64,8 @@ static struct platform_device heartbeat_device = {
67 .dev = { 64 .dev = {
68 .platform_data = &heartbeat_data, 65 .platform_data = &heartbeat_data,
69 }, 66 },
70 .num_resources = ARRAY_SIZE(heartbeat_resources), 67 .num_resources = 1,
71 .resource = heartbeat_resources, 68 .resource = &heartbeat_resource,
72}; 69};
73 70
74static struct platform_device *se7206_devices[] __initdata = { 71static struct platform_device *se7206_devices[] __initdata = {
diff --git a/arch/sh/boards/mach-se/7343/irq.c b/arch/sh/boards/mach-se/7343/irq.c
index 051c29d4eae0..d4305c26e9f7 100644
--- a/arch/sh/boards/mach-se/7343/irq.c
+++ b/arch/sh/boards/mach-se/7343/irq.c
@@ -16,16 +16,18 @@
16#include <linux/io.h> 16#include <linux/io.h>
17#include <mach-se/mach/se7343.h> 17#include <mach-se/mach/se7343.h>
18 18
19unsigned int se7343_fpga_irq[SE7343_FPGA_IRQ_NR] = { 0, };
20
19static void disable_se7343_irq(unsigned int irq) 21static void disable_se7343_irq(unsigned int irq)
20{ 22{
21 unsigned int bit = irq - SE7343_FPGA_IRQ_BASE; 23 unsigned int bit = (unsigned int)get_irq_chip_data(irq);
22 ctrl_outw(ctrl_inw(PA_CPLD_IMSK) | 1 << bit, PA_CPLD_IMSK); 24 __raw_writew(__raw_readw(PA_CPLD_IMSK) | 1 << bit, PA_CPLD_IMSK);
23} 25}
24 26
25static void enable_se7343_irq(unsigned int irq) 27static void enable_se7343_irq(unsigned int irq)
26{ 28{
27 unsigned int bit = irq - SE7343_FPGA_IRQ_BASE; 29 unsigned int bit = (unsigned int)get_irq_chip_data(irq);
28 ctrl_outw(ctrl_inw(PA_CPLD_IMSK) & ~(1 << bit), PA_CPLD_IMSK); 30 __raw_writew(__raw_readw(PA_CPLD_IMSK) & ~(1 << bit), PA_CPLD_IMSK);
29} 31}
30 32
31static struct irq_chip se7343_irq_chip __read_mostly = { 33static struct irq_chip se7343_irq_chip __read_mostly = {
@@ -37,19 +39,16 @@ static struct irq_chip se7343_irq_chip __read_mostly = {
37 39
38static void se7343_irq_demux(unsigned int irq, struct irq_desc *desc) 40static void se7343_irq_demux(unsigned int irq, struct irq_desc *desc)
39{ 41{
40 unsigned short intv = ctrl_inw(PA_CPLD_ST); 42 unsigned short intv = __raw_readw(PA_CPLD_ST);
41 struct irq_desc *ext_desc; 43 unsigned int ext_irq = 0;
42 unsigned int ext_irq = SE7343_FPGA_IRQ_BASE;
43 44
44 intv &= (1 << SE7343_FPGA_IRQ_NR) - 1; 45 intv &= (1 << SE7343_FPGA_IRQ_NR) - 1;
45 46
46 while (intv) { 47 for (; intv; intv >>= 1, ext_irq++) {
47 if (intv & 1) { 48 if (!(intv & 1))
48 ext_desc = irq_desc + ext_irq; 49 continue;
49 handle_level_irq(ext_irq, ext_desc); 50
50 } 51 generic_handle_irq(se7343_fpga_irq[ext_irq]);
51 intv >>= 1;
52 ext_irq++;
53 } 52 }
54} 53}
55 54
@@ -58,16 +57,24 @@ static void se7343_irq_demux(unsigned int irq, struct irq_desc *desc)
58 */ 57 */
59void __init init_7343se_IRQ(void) 58void __init init_7343se_IRQ(void)
60{ 59{
61 int i; 60 int i, irq;
61
62 __raw_writew(0, PA_CPLD_IMSK); /* disable all irqs */
63 __raw_writew(0x2000, 0xb03fffec); /* mrshpc irq enable */
62 64
63 ctrl_outw(0, PA_CPLD_IMSK); /* disable all irqs */ 65 for (i = 0; i < SE7343_FPGA_IRQ_NR; i++) {
64 ctrl_outw(0x2000, 0xb03fffec); /* mrshpc irq enable */ 66 irq = create_irq();
67 if (irq < 0)
68 return;
69 se7343_fpga_irq[i] = irq;
65 70
66 for (i = 0; i < SE7343_FPGA_IRQ_NR; i++) 71 set_irq_chip_and_handler_name(se7343_fpga_irq[i],
67 set_irq_chip_and_handler_name(SE7343_FPGA_IRQ_BASE + i,
68 &se7343_irq_chip, 72 &se7343_irq_chip,
69 handle_level_irq, "level"); 73 handle_level_irq, "level");
70 74
75 set_irq_chip_data(se7343_fpga_irq[i], (void *)i);
76 }
77
71 set_irq_chained_handler(IRQ0_IRQ, se7343_irq_demux); 78 set_irq_chained_handler(IRQ0_IRQ, se7343_irq_demux);
72 set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW); 79 set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW);
73 set_irq_chained_handler(IRQ1_IRQ, se7343_irq_demux); 80 set_irq_chained_handler(IRQ1_IRQ, se7343_irq_demux);
diff --git a/arch/sh/boards/mach-se/7343/setup.c b/arch/sh/boards/mach-se/7343/setup.c
index 4de56f35f419..d2370af56d77 100644
--- a/arch/sh/boards/mach-se/7343/setup.c
+++ b/arch/sh/boards/mach-se/7343/setup.c
@@ -11,26 +11,17 @@
11#include <asm/irq.h> 11#include <asm/irq.h>
12#include <asm/io.h> 12#include <asm/io.h>
13 13
14static struct resource heartbeat_resources[] = { 14static struct resource heartbeat_resource = {
15 [0] = { 15 .start = PA_LED,
16 .start = PA_LED, 16 .end = PA_LED,
17 .end = PA_LED, 17 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
18 .flags = IORESOURCE_MEM,
19 },
20};
21
22static struct heartbeat_data heartbeat_data = {
23 .regsize = 16,
24}; 18};
25 19
26static struct platform_device heartbeat_device = { 20static struct platform_device heartbeat_device = {
27 .name = "heartbeat", 21 .name = "heartbeat",
28 .id = -1, 22 .id = -1,
29 .dev = { 23 .num_resources = 1,
30 .platform_data = &heartbeat_data, 24 .resource = &heartbeat_resource,
31 },
32 .num_resources = ARRAY_SIZE(heartbeat_resources),
33 .resource = heartbeat_resources,
34}; 25};
35 26
36static struct mtd_partition nor_flash_partitions[] = { 27static struct mtd_partition nor_flash_partitions[] = {
@@ -82,7 +73,6 @@ static struct plat_serial8250_port serial_platform_data[] = {
82 .mapbase = 0x16000000, 73 .mapbase = 0x16000000,
83 .regshift = 1, 74 .regshift = 1,
84 .flags = ST16C2550C_FLAGS, 75 .flags = ST16C2550C_FLAGS,
85 .irq = UARTA_IRQ,
86 .uartclk = 7372800, 76 .uartclk = 7372800,
87 }, 77 },
88 [1] = { 78 [1] = {
@@ -90,7 +80,6 @@ static struct plat_serial8250_port serial_platform_data[] = {
90 .mapbase = 0x17000000, 80 .mapbase = 0x17000000,
91 .regshift = 1, 81 .regshift = 1,
92 .flags = ST16C2550C_FLAGS, 82 .flags = ST16C2550C_FLAGS,
93 .irq = UARTB_IRQ,
94 .uartclk = 7372800, 83 .uartclk = 7372800,
95 }, 84 },
96 { }, 85 { },
@@ -121,7 +110,7 @@ static struct resource usb_resources[] = {
121 .flags = IORESOURCE_MEM, 110 .flags = IORESOURCE_MEM,
122 }, 111 },
123 [2] = { 112 [2] = {
124 .start = USB_IRQ, 113 /* Filled in later */
125 .flags = IORESOURCE_IRQ, 114 .flags = IORESOURCE_IRQ,
126 }, 115 },
127}; 116};
@@ -138,8 +127,8 @@ static struct isp116x_platform_data usb_platform_data = {
138static struct platform_device usb_device = { 127static struct platform_device usb_device = {
139 .name = "isp116x-hcd", 128 .name = "isp116x-hcd",
140 .id = -1, 129 .id = -1,
141 .num_resources = ARRAY_SIZE(usb_resources), 130 .num_resources = ARRAY_SIZE(usb_resources),
142 .resource = usb_resources, 131 .resource = usb_resources,
143 .dev = { 132 .dev = {
144 .platform_data = &usb_platform_data, 133 .platform_data = &usb_platform_data,
145 }, 134 },
@@ -155,6 +144,13 @@ static struct platform_device *sh7343se_platform_devices[] __initdata = {
155 144
156static int __init sh7343se_devices_setup(void) 145static int __init sh7343se_devices_setup(void)
157{ 146{
147 /* Wire-up dynamic vectors */
148 serial_platform_data[0].irq = se7343_fpga_irq[SE7343_FPGA_IRQ_UARTA];
149 serial_platform_data[1].irq = se7343_fpga_irq[SE7343_FPGA_IRQ_UARTB];
150
151 usb_resources[2].start = usb_resources[2].end =
152 se7343_fpga_irq[SE7343_FPGA_IRQ_USB];
153
158 return platform_add_devices(sh7343se_platform_devices, 154 return platform_add_devices(sh7343se_platform_devices,
159 ARRAY_SIZE(sh7343se_platform_devices)); 155 ARRAY_SIZE(sh7343se_platform_devices));
160} 156}
@@ -165,10 +161,10 @@ device_initcall(sh7343se_devices_setup);
165 */ 161 */
166static void __init sh7343se_setup(char **cmdline_p) 162static void __init sh7343se_setup(char **cmdline_p)
167{ 163{
168 ctrl_outw(0xf900, FPGA_OUT); /* FPGA */ 164 __raw_writew(0xf900, FPGA_OUT); /* FPGA */
169 165
170 ctrl_outw(0x0002, PORT_PECR); /* PORT E 1 = IRQ5 */ 166 __raw_writew(0x0002, PORT_PECR); /* PORT E 1 = IRQ5 */
171 ctrl_outw(0x0020, PORT_PSELD); 167 __raw_writew(0x0020, PORT_PSELD);
172 168
173 printk(KERN_INFO "MS7343CP01 Setup...done\n"); 169 printk(KERN_INFO "MS7343CP01 Setup...done\n");
174} 170}
@@ -179,6 +175,5 @@ static void __init sh7343se_setup(char **cmdline_p)
179static struct sh_machine_vector mv_7343se __initmv = { 175static struct sh_machine_vector mv_7343se __initmv = {
180 .mv_name = "SolutionEngine 7343", 176 .mv_name = "SolutionEngine 7343",
181 .mv_setup = sh7343se_setup, 177 .mv_setup = sh7343se_setup,
182 .mv_nr_irqs = SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_NR,
183 .mv_init_irq = init_7343se_IRQ, 178 .mv_init_irq = init_7343se_IRQ,
184}; 179};
diff --git a/arch/sh/boards/mach-se/770x/irq.c b/arch/sh/boards/mach-se/770x/irq.c
index ec1fea571b52..1028c17b81bc 100644
--- a/arch/sh/boards/mach-se/770x/irq.c
+++ b/arch/sh/boards/mach-se/770x/irq.c
@@ -96,13 +96,13 @@ static struct ipr_desc ipr_irq_desc = {
96void __init init_se_IRQ(void) 96void __init init_se_IRQ(void)
97{ 97{
98 /* Disable all interrupts */ 98 /* Disable all interrupts */
99 ctrl_outw(0, BCR_ILCRA); 99 __raw_writew(0, BCR_ILCRA);
100 ctrl_outw(0, BCR_ILCRB); 100 __raw_writew(0, BCR_ILCRB);
101 ctrl_outw(0, BCR_ILCRC); 101 __raw_writew(0, BCR_ILCRC);
102 ctrl_outw(0, BCR_ILCRD); 102 __raw_writew(0, BCR_ILCRD);
103 ctrl_outw(0, BCR_ILCRE); 103 __raw_writew(0, BCR_ILCRE);
104 ctrl_outw(0, BCR_ILCRF); 104 __raw_writew(0, BCR_ILCRF);
105 ctrl_outw(0, BCR_ILCRG); 105 __raw_writew(0, BCR_ILCRG);
106 106
107 register_ipr_controller(&ipr_irq_desc); 107 register_ipr_controller(&ipr_irq_desc);
108} 108}
diff --git a/arch/sh/boards/mach-se/770x/setup.c b/arch/sh/boards/mach-se/770x/setup.c
index 527eb6b12610..66d39d1b0901 100644
--- a/arch/sh/boards/mach-se/770x/setup.c
+++ b/arch/sh/boards/mach-se/770x/setup.c
@@ -93,15 +93,12 @@ static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
93static struct heartbeat_data heartbeat_data = { 93static struct heartbeat_data heartbeat_data = {
94 .bit_pos = heartbeat_bit_pos, 94 .bit_pos = heartbeat_bit_pos,
95 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos), 95 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
96 .regsize = 16,
97}; 96};
98 97
99static struct resource heartbeat_resources[] = { 98static struct resource heartbeat_resource = {
100 [0] = { 99 .start = PA_LED,
101 .start = PA_LED, 100 .end = PA_LED,
102 .end = PA_LED, 101 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
103 .flags = IORESOURCE_MEM,
104 },
105}; 102};
106 103
107static struct platform_device heartbeat_device = { 104static struct platform_device heartbeat_device = {
@@ -110,8 +107,8 @@ static struct platform_device heartbeat_device = {
110 .dev = { 107 .dev = {
111 .platform_data = &heartbeat_data, 108 .platform_data = &heartbeat_data,
112 }, 109 },
113 .num_resources = ARRAY_SIZE(heartbeat_resources), 110 .num_resources = 1,
114 .resource = heartbeat_resources, 111 .resource = &heartbeat_resource,
115}; 112};
116 113
117#if defined(CONFIG_CPU_SUBTYPE_SH7710) ||\ 114#if defined(CONFIG_CPU_SUBTYPE_SH7710) ||\
diff --git a/arch/sh/boards/mach-se/7721/irq.c b/arch/sh/boards/mach-se/7721/irq.c
index b417acc4dad0..d85022ea3f12 100644
--- a/arch/sh/boards/mach-se/7721/irq.c
+++ b/arch/sh/boards/mach-se/7721/irq.c
@@ -38,7 +38,7 @@ static DECLARE_INTC_DESC(intc_desc, "SE7721", vectors,
38void __init init_se7721_IRQ(void) 38void __init init_se7721_IRQ(void)
39{ 39{
40 /* PPCR */ 40 /* PPCR */
41 ctrl_outw(ctrl_inw(0xa4050118) & ~0x00ff, 0xa4050118); 41 __raw_writew(__raw_readw(0xa4050118) & ~0x00ff, 0xa4050118);
42 42
43 register_intc_controller(&intc_desc); 43 register_intc_controller(&intc_desc);
44 intc_set_priority(MRSHPC_IRQ0, 0xf - MRSHPC_IRQ0); 44 intc_set_priority(MRSHPC_IRQ0, 0xf - MRSHPC_IRQ0);
diff --git a/arch/sh/boards/mach-se/7721/setup.c b/arch/sh/boards/mach-se/7721/setup.c
index 55af4c36b43a..7416ad7ee53a 100644
--- a/arch/sh/boards/mach-se/7721/setup.c
+++ b/arch/sh/boards/mach-se/7721/setup.c
@@ -23,15 +23,12 @@ static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
23static struct heartbeat_data heartbeat_data = { 23static struct heartbeat_data heartbeat_data = {
24 .bit_pos = heartbeat_bit_pos, 24 .bit_pos = heartbeat_bit_pos,
25 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos), 25 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
26 .regsize = 16,
27}; 26};
28 27
29static struct resource heartbeat_resources[] = { 28static struct resource heartbeat_resource = {
30 [0] = { 29 .start = PA_LED,
31 .start = PA_LED, 30 .end = PA_LED,
32 .end = PA_LED, 31 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
33 .flags = IORESOURCE_MEM,
34 },
35}; 32};
36 33
37static struct platform_device heartbeat_device = { 34static struct platform_device heartbeat_device = {
@@ -40,8 +37,8 @@ static struct platform_device heartbeat_device = {
40 .dev = { 37 .dev = {
41 .platform_data = &heartbeat_data, 38 .platform_data = &heartbeat_data,
42 }, 39 },
43 .num_resources = ARRAY_SIZE(heartbeat_resources), 40 .num_resources = 1,
44 .resource = heartbeat_resources, 41 .resource = &heartbeat_resource,
45}; 42};
46 43
47static struct resource cf_ide_resources[] = { 44static struct resource cf_ide_resources[] = {
@@ -83,10 +80,10 @@ device_initcall(se7721_devices_setup);
83static void __init se7721_setup(char **cmdline_p) 80static void __init se7721_setup(char **cmdline_p)
84{ 81{
85 /* for USB */ 82 /* for USB */
86 ctrl_outw(0x0000, 0xA405010C); /* PGCR */ 83 __raw_writew(0x0000, 0xA405010C); /* PGCR */
87 ctrl_outw(0x0000, 0xA405010E); /* PHCR */ 84 __raw_writew(0x0000, 0xA405010E); /* PHCR */
88 ctrl_outw(0x00AA, 0xA4050118); /* PPCR */ 85 __raw_writew(0x00AA, 0xA4050118); /* PPCR */
89 ctrl_outw(0x0000, 0xA4050124); /* PSELA */ 86 __raw_writew(0x0000, 0xA4050124); /* PSELA */
90} 87}
91 88
92/* 89/*
diff --git a/arch/sh/boards/mach-se/7722/irq.c b/arch/sh/boards/mach-se/7722/irq.c
index 02d21a3e2a8f..61605db04ee6 100644
--- a/arch/sh/boards/mach-se/7722/irq.c
+++ b/arch/sh/boards/mach-se/7722/irq.c
@@ -16,16 +16,18 @@
16#include <asm/io.h> 16#include <asm/io.h>
17#include <mach-se/mach/se7722.h> 17#include <mach-se/mach/se7722.h>
18 18
19unsigned int se7722_fpga_irq[SE7722_FPGA_IRQ_NR] = { 0, };
20
19static void disable_se7722_irq(unsigned int irq) 21static void disable_se7722_irq(unsigned int irq)
20{ 22{
21 unsigned int bit = irq - SE7722_FPGA_IRQ_BASE; 23 unsigned int bit = (unsigned int)get_irq_chip_data(irq);
22 ctrl_outw(ctrl_inw(IRQ01_MASK) | 1 << bit, IRQ01_MASK); 24 __raw_writew(__raw_readw(IRQ01_MASK) | 1 << bit, IRQ01_MASK);
23} 25}
24 26
25static void enable_se7722_irq(unsigned int irq) 27static void enable_se7722_irq(unsigned int irq)
26{ 28{
27 unsigned int bit = irq - SE7722_FPGA_IRQ_BASE; 29 unsigned int bit = (unsigned int)get_irq_chip_data(irq);
28 ctrl_outw(ctrl_inw(IRQ01_MASK) & ~(1 << bit), IRQ01_MASK); 30 __raw_writew(__raw_readw(IRQ01_MASK) & ~(1 << bit), IRQ01_MASK);
29} 31}
30 32
31static struct irq_chip se7722_irq_chip __read_mostly = { 33static struct irq_chip se7722_irq_chip __read_mostly = {
@@ -37,19 +39,16 @@ static struct irq_chip se7722_irq_chip __read_mostly = {
37 39
38static void se7722_irq_demux(unsigned int irq, struct irq_desc *desc) 40static void se7722_irq_demux(unsigned int irq, struct irq_desc *desc)
39{ 41{
40 unsigned short intv = ctrl_inw(IRQ01_STS); 42 unsigned short intv = __raw_readw(IRQ01_STS);
41 struct irq_desc *ext_desc; 43 unsigned int ext_irq = 0;
42 unsigned int ext_irq = SE7722_FPGA_IRQ_BASE;
43 44
44 intv &= (1 << SE7722_FPGA_IRQ_NR) - 1; 45 intv &= (1 << SE7722_FPGA_IRQ_NR) - 1;
45 46
46 while (intv) { 47 for (; intv; intv >>= 1, ext_irq++) {
47 if (intv & 1) { 48 if (!(intv & 1))
48 ext_desc = irq_desc + ext_irq; 49 continue;
49 handle_level_irq(ext_irq, ext_desc); 50
50 } 51 generic_handle_irq(se7722_fpga_irq[ext_irq]);
51 intv >>= 1;
52 ext_irq++;
53 } 52 }
54} 53}
55 54
@@ -58,16 +57,24 @@ static void se7722_irq_demux(unsigned int irq, struct irq_desc *desc)
58 */ 57 */
59void __init init_se7722_IRQ(void) 58void __init init_se7722_IRQ(void)
60{ 59{
61 int i; 60 int i, irq;
61
62 __raw_writew(0, IRQ01_MASK); /* disable all irqs */
63 __raw_writew(0x2000, 0xb03fffec); /* mrshpc irq enable */
62 64
63 ctrl_outw(0, IRQ01_MASK); /* disable all irqs */ 65 for (i = 0; i < SE7722_FPGA_IRQ_NR; i++) {
64 ctrl_outw(0x2000, 0xb03fffec); /* mrshpc irq enable */ 66 irq = create_irq();
67 if (irq < 0)
68 return;
69 se7722_fpga_irq[i] = irq;
65 70
66 for (i = 0; i < SE7722_FPGA_IRQ_NR; i++) 71 set_irq_chip_and_handler_name(se7722_fpga_irq[i],
67 set_irq_chip_and_handler_name(SE7722_FPGA_IRQ_BASE + i,
68 &se7722_irq_chip, 72 &se7722_irq_chip,
69 handle_level_irq, "level"); 73 handle_level_irq, "level");
70 74
75 set_irq_chip_data(se7722_fpga_irq[i], (void *)i);
76 }
77
71 set_irq_chained_handler(IRQ0_IRQ, se7722_irq_demux); 78 set_irq_chained_handler(IRQ0_IRQ, se7722_irq_demux);
72 set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW); 79 set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW);
73 80
diff --git a/arch/sh/boards/mach-se/7722/setup.c b/arch/sh/boards/mach-se/7722/setup.c
index 36374078e521..80a4e571b310 100644
--- a/arch/sh/boards/mach-se/7722/setup.c
+++ b/arch/sh/boards/mach-se/7722/setup.c
@@ -14,6 +14,7 @@
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15#include <linux/ata_platform.h> 15#include <linux/ata_platform.h>
16#include <linux/input.h> 16#include <linux/input.h>
17#include <linux/input/sh_keysc.h>
17#include <linux/smc91x.h> 18#include <linux/smc91x.h>
18#include <mach-se/mach/se7722.h> 19#include <mach-se/mach/se7722.h>
19#include <mach-se/mach/mrshpc.h> 20#include <mach-se/mach/mrshpc.h>
@@ -21,30 +22,20 @@
21#include <asm/clock.h> 22#include <asm/clock.h>
22#include <asm/io.h> 23#include <asm/io.h>
23#include <asm/heartbeat.h> 24#include <asm/heartbeat.h>
24#include <asm/sh_keysc.h>
25#include <cpu/sh7722.h> 25#include <cpu/sh7722.h>
26 26
27/* Heartbeat */ 27/* Heartbeat */
28static struct heartbeat_data heartbeat_data = { 28static struct resource heartbeat_resource = {
29 .regsize = 16, 29 .start = PA_LED,
30}; 30 .end = PA_LED,
31 31 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
32static struct resource heartbeat_resources[] = {
33 [0] = {
34 .start = PA_LED,
35 .end = PA_LED,
36 .flags = IORESOURCE_MEM,
37 },
38}; 32};
39 33
40static struct platform_device heartbeat_device = { 34static struct platform_device heartbeat_device = {
41 .name = "heartbeat", 35 .name = "heartbeat",
42 .id = -1, 36 .id = -1,
43 .dev = { 37 .num_resources = 1,
44 .platform_data = &heartbeat_data, 38 .resource = &heartbeat_resource,
45 },
46 .num_resources = ARRAY_SIZE(heartbeat_resources),
47 .resource = heartbeat_resources,
48}; 39};
49 40
50/* SMC91x */ 41/* SMC91x */
@@ -60,8 +51,7 @@ static struct resource smc91x_eth_resources[] = {
60 .flags = IORESOURCE_MEM, 51 .flags = IORESOURCE_MEM,
61 }, 52 },
62 [1] = { 53 [1] = {
63 .start = SMC_IRQ, 54 /* Filled in later */
64 .end = SMC_IRQ,
65 .flags = IORESOURCE_IRQ, 55 .flags = IORESOURCE_IRQ,
66 }, 56 },
67}; 57};
@@ -90,8 +80,7 @@ static struct resource cf_ide_resources[] = {
90 .flags = IORESOURCE_IO, 80 .flags = IORESOURCE_IO,
91 }, 81 },
92 [2] = { 82 [2] = {
93 .start = MRSHPC_IRQ0, 83 /* Filled in later */
94 .end = MRSHPC_IRQ0,
95 .flags = IORESOURCE_IRQ, 84 .flags = IORESOURCE_IRQ,
96 }, 85 },
97}; 86};
@@ -153,38 +142,46 @@ static struct platform_device *se7722_devices[] __initdata = {
153static int __init se7722_devices_setup(void) 142static int __init se7722_devices_setup(void)
154{ 143{
155 mrshpc_setup_windows(); 144 mrshpc_setup_windows();
145
146 /* Wire-up dynamic vectors */
147 cf_ide_resources[2].start = cf_ide_resources[2].end =
148 se7722_fpga_irq[SE7722_FPGA_IRQ_MRSHPC0];
149
150 smc91x_eth_resources[1].start = smc91x_eth_resources[1].end =
151 se7722_fpga_irq[SE7722_FPGA_IRQ_SMC];
152
156 return platform_add_devices(se7722_devices, ARRAY_SIZE(se7722_devices)); 153 return platform_add_devices(se7722_devices, ARRAY_SIZE(se7722_devices));
157} 154}
158device_initcall(se7722_devices_setup); 155device_initcall(se7722_devices_setup);
159 156
160static void __init se7722_setup(char **cmdline_p) 157static void __init se7722_setup(char **cmdline_p)
161{ 158{
162 ctrl_outw(0x010D, FPGA_OUT); /* FPGA */ 159 __raw_writew(0x010D, FPGA_OUT); /* FPGA */
163 160
164 ctrl_outw(0x0000, PORT_PECR); /* PORT E 1 = IRQ5 ,E 0 = BS */ 161 __raw_writew(0x0000, PORT_PECR); /* PORT E 1 = IRQ5 ,E 0 = BS */
165 ctrl_outw(0x1000, PORT_PJCR); /* PORT J 1 = IRQ1,J 0 =IRQ0 */ 162 __raw_writew(0x1000, PORT_PJCR); /* PORT J 1 = IRQ1,J 0 =IRQ0 */
166 163
167 /* LCDC I/O */ 164 /* LCDC I/O */
168 ctrl_outw(0x0020, PORT_PSELD); 165 __raw_writew(0x0020, PORT_PSELD);
169 166
170 /* SIOF1*/ 167 /* SIOF1*/
171 ctrl_outw(0x0003, PORT_PSELB); 168 __raw_writew(0x0003, PORT_PSELB);
172 ctrl_outw(0xe000, PORT_PSELC); 169 __raw_writew(0xe000, PORT_PSELC);
173 ctrl_outw(0x0000, PORT_PKCR); 170 __raw_writew(0x0000, PORT_PKCR);
174 171
175 /* LCDC */ 172 /* LCDC */
176 ctrl_outw(0x4020, PORT_PHCR); 173 __raw_writew(0x4020, PORT_PHCR);
177 ctrl_outw(0x0000, PORT_PLCR); 174 __raw_writew(0x0000, PORT_PLCR);
178 ctrl_outw(0x0000, PORT_PMCR); 175 __raw_writew(0x0000, PORT_PMCR);
179 ctrl_outw(0x0002, PORT_PRCR); 176 __raw_writew(0x0002, PORT_PRCR);
180 ctrl_outw(0x0000, PORT_PXCR); /* LCDC,CS6A */ 177 __raw_writew(0x0000, PORT_PXCR); /* LCDC,CS6A */
181 178
182 /* KEYSC */ 179 /* KEYSC */
183 ctrl_outw(0x0A10, PORT_PSELA); /* BS,SHHID2 */ 180 __raw_writew(0x0A10, PORT_PSELA); /* BS,SHHID2 */
184 ctrl_outw(0x0000, PORT_PYCR); 181 __raw_writew(0x0000, PORT_PYCR);
185 ctrl_outw(0x0000, PORT_PZCR); 182 __raw_writew(0x0000, PORT_PZCR);
186 ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA); 183 __raw_writew(__raw_readw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA);
187 ctrl_outw(ctrl_inw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC); 184 __raw_writew(__raw_readw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC);
188} 185}
189 186
190/* 187/*
@@ -193,6 +190,5 @@ static void __init se7722_setup(char **cmdline_p)
193static struct sh_machine_vector mv_se7722 __initmv = { 190static struct sh_machine_vector mv_se7722 __initmv = {
194 .mv_name = "Solution Engine 7722" , 191 .mv_name = "Solution Engine 7722" ,
195 .mv_setup = se7722_setup , 192 .mv_setup = se7722_setup ,
196 .mv_nr_irqs = SE7722_FPGA_IRQ_BASE + SE7722_FPGA_IRQ_NR,
197 .mv_init_irq = init_se7722_IRQ, 193 .mv_init_irq = init_se7722_IRQ,
198}; 194};
diff --git a/arch/sh/boards/mach-se/7724/Makefile b/arch/sh/boards/mach-se/7724/Makefile
index 349cbd6ce82d..a08b36830f0e 100644
--- a/arch/sh/boards/mach-se/7724/Makefile
+++ b/arch/sh/boards/mach-se/7724/Makefile
@@ -7,4 +7,4 @@
7# 7#
8# 8#
9 9
10obj-y := setup.o irq.o \ No newline at end of file 10obj-y := setup.o irq.o sdram.o
diff --git a/arch/sh/boards/mach-se/7724/irq.c b/arch/sh/boards/mach-se/7724/irq.c
index f76cf3b49f23..0942be2daef6 100644
--- a/arch/sh/boards/mach-se/7724/irq.c
+++ b/arch/sh/boards/mach-se/7724/irq.c
@@ -72,14 +72,14 @@ static void disable_se7724_irq(unsigned int irq)
72{ 72{
73 struct fpga_irq set = get_fpga_irq(fpga2irq(irq)); 73 struct fpga_irq set = get_fpga_irq(fpga2irq(irq));
74 unsigned int bit = irq - set.base; 74 unsigned int bit = irq - set.base;
75 ctrl_outw(ctrl_inw(set.mraddr) | 0x0001 << bit, set.mraddr); 75 __raw_writew(__raw_readw(set.mraddr) | 0x0001 << bit, set.mraddr);
76} 76}
77 77
78static void enable_se7724_irq(unsigned int irq) 78static void enable_se7724_irq(unsigned int irq)
79{ 79{
80 struct fpga_irq set = get_fpga_irq(fpga2irq(irq)); 80 struct fpga_irq set = get_fpga_irq(fpga2irq(irq));
81 unsigned int bit = irq - set.base; 81 unsigned int bit = irq - set.base;
82 ctrl_outw(ctrl_inw(set.mraddr) & ~(0x0001 << bit), set.mraddr); 82 __raw_writew(__raw_readw(set.mraddr) & ~(0x0001 << bit), set.mraddr);
83} 83}
84 84
85static struct irq_chip se7724_irq_chip __read_mostly = { 85static struct irq_chip se7724_irq_chip __read_mostly = {
@@ -92,19 +92,16 @@ static struct irq_chip se7724_irq_chip __read_mostly = {
92static void se7724_irq_demux(unsigned int irq, struct irq_desc *desc) 92static void se7724_irq_demux(unsigned int irq, struct irq_desc *desc)
93{ 93{
94 struct fpga_irq set = get_fpga_irq(irq); 94 struct fpga_irq set = get_fpga_irq(irq);
95 unsigned short intv = ctrl_inw(set.sraddr); 95 unsigned short intv = __raw_readw(set.sraddr);
96 struct irq_desc *ext_desc;
97 unsigned int ext_irq = set.base; 96 unsigned int ext_irq = set.base;
98 97
99 intv &= set.mask; 98 intv &= set.mask;
100 99
101 while (intv) { 100 for (; intv; intv >>= 1, ext_irq++) {
102 if (intv & 0x0001) { 101 if (!(intv & 1))
103 ext_desc = irq_desc + ext_irq; 102 continue;
104 handle_level_irq(ext_irq, ext_desc); 103
105 } 104 generic_handle_irq(ext_irq);
106 intv >>= 1;
107 ext_irq++;
108 } 105 }
109} 106}
110 107
@@ -113,20 +110,39 @@ static void se7724_irq_demux(unsigned int irq, struct irq_desc *desc)
113 */ 110 */
114void __init init_se7724_IRQ(void) 111void __init init_se7724_IRQ(void)
115{ 112{
116 int i; 113 int i, nid = cpu_to_node(boot_cpu_data);
117 114
118 ctrl_outw(0xffff, IRQ0_MR); /* mask all */ 115 __raw_writew(0xffff, IRQ0_MR); /* mask all */
119 ctrl_outw(0xffff, IRQ1_MR); /* mask all */ 116 __raw_writew(0xffff, IRQ1_MR); /* mask all */
120 ctrl_outw(0xffff, IRQ2_MR); /* mask all */ 117 __raw_writew(0xffff, IRQ2_MR); /* mask all */
121 ctrl_outw(0x0000, IRQ0_SR); /* clear irq */ 118 __raw_writew(0x0000, IRQ0_SR); /* clear irq */
122 ctrl_outw(0x0000, IRQ1_SR); /* clear irq */ 119 __raw_writew(0x0000, IRQ1_SR); /* clear irq */
123 ctrl_outw(0x0000, IRQ2_SR); /* clear irq */ 120 __raw_writew(0x0000, IRQ2_SR); /* clear irq */
124 ctrl_outw(0x002a, IRQ_MODE); /* set irq type */ 121 __raw_writew(0x002a, IRQ_MODE); /* set irq type */
125 122
126 for (i = 0; i < SE7724_FPGA_IRQ_NR; i++) 123 for (i = 0; i < SE7724_FPGA_IRQ_NR; i++) {
127 set_irq_chip_and_handler_name(SE7724_FPGA_IRQ_BASE + i, 124 int irq, wanted;
125
126 wanted = SE7724_FPGA_IRQ_BASE + i;
127
128 irq = create_irq_nr(wanted, nid);
129 if (unlikely(irq == 0)) {
130 pr_err("%s: failed hooking irq %d for FPGA\n",
131 __func__, wanted);
132 return;
133 }
134
135 if (unlikely(irq != wanted)) {
136 pr_err("%s: got irq %d but wanted %d, bailing.\n",
137 __func__, irq, wanted);
138 destroy_irq(irq);
139 return;
140 }
141
142 set_irq_chip_and_handler_name(irq,
128 &se7724_irq_chip, 143 &se7724_irq_chip,
129 handle_level_irq, "level"); 144 handle_level_irq, "level");
145 }
130 146
131 set_irq_chained_handler(IRQ0_IRQ, se7724_irq_demux); 147 set_irq_chained_handler(IRQ0_IRQ, se7724_irq_demux);
132 set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW); 148 set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW);
diff --git a/arch/sh/boards/mach-se/7724/sdram.S b/arch/sh/boards/mach-se/7724/sdram.S
new file mode 100644
index 000000000000..6fa4734d09c7
--- /dev/null
+++ b/arch/sh/boards/mach-se/7724/sdram.S
@@ -0,0 +1,131 @@
1/*
2 * MS7724SE sdram self/auto-refresh setup code
3 *
4 * Copyright (C) 2009 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/sys.h>
12#include <linux/errno.h>
13#include <linux/linkage.h>
14#include <asm/asm-offsets.h>
15#include <asm/suspend.h>
16#include <asm/romimage-macros.h>
17
18/* code to enter and leave self-refresh. must be self-contained.
19 * this code will be copied to on-chip memory and executed from there.
20 */
21 .balign 4
22ENTRY(ms7724se_sdram_enter_start)
23
24 /* DBSC: put memory in self-refresh mode */
25
26 ED 0xFD000010, 0x00000000 /* DBEN */
27 ED 0xFD000040, 0x00000000 /* DBRFPDN0 */
28 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
29 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
30 ED 0xFD000040, 0x00000001 /* DBRFPDN0 */
31
32 rts
33 nop
34
35ENTRY(ms7724se_sdram_enter_end)
36
37 .balign 4
38ENTRY(ms7724se_sdram_leave_start)
39
40 /* DBSC: put memory in auto-refresh mode */
41
42 mov.l @(SH_SLEEP_MODE, r5), r0
43 tst #SUSP_SH_RSTANDBY, r0
44 bf resume_rstandby
45
46 ED 0xFD000040, 0x00000000 /* DBRFPDN0 */
47 WAIT 1
48 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
49 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
50 ED 0xFD000010, 0x00000001 /* DBEN */
51 ED 0xFD000040, 0x00010000 /* DBRFPDN0 */
52
53 rts
54 nop
55
56resume_rstandby:
57
58 /* CPG: setup clocks before restarting external memory */
59
60 ED 0xA4150024, 0x00004000 /* PLLCR */
61
62 mov.l FRQCRA,r0
63 mov.l @r0,r3
64 mov.l KICK,r1
65 or r1, r3
66 mov.l r3, @r0
67
68 mov.l LSTATS,r0
69 mov #1,r1
70WAIT_LSTATS:
71 mov.l @r0,r3
72 tst r1,r3
73 bf WAIT_LSTATS
74
75 /* DBSC: re-initialize and put in auto-refresh */
76
77 ED 0xFD000108, 0x00000181 /* DBPDCNT0 */
78 ED 0xFD000020, 0x015B0002 /* DBCONF */
79 ED 0xFD000030, 0x03071502 /* DBTR0 */
80 ED 0xFD000034, 0x02020102 /* DBTR1 */
81 ED 0xFD000038, 0x01090405 /* DBTR2 */
82 ED 0xFD00003C, 0x00000002 /* DBTR3 */
83 ED 0xFD000008, 0x00000005 /* DBKIND */
84 ED 0xFD000040, 0x00000001 /* DBRFPDN0 */
85 ED 0xFD000040, 0x00000000 /* DBRFPDN0 */
86 ED 0xFD000018, 0x00000001 /* DBCKECNT */
87
88 mov #100,r0
89WAIT_400NS:
90 dt r0
91 bf WAIT_400NS
92
93 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
94 ED 0xFD000060, 0x00020000 /* DBMRCNT (EMR2) */
95 ED 0xFD000060, 0x00030000 /* DBMRCNT (EMR3) */
96 ED 0xFD000060, 0x00010004 /* DBMRCNT (EMR) */
97 ED 0xFD000060, 0x00000532 /* DBMRCNT (MRS) */
98 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
99 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
100 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
101 ED 0xFD000060, 0x00000432 /* DBMRCNT (MRS) */
102 ED 0xFD000060, 0x000103c0 /* DBMRCNT (EMR) */
103 ED 0xFD000060, 0x00010040 /* DBMRCNT (EMR) */
104
105 mov #100,r0
106WAIT_400NS_2:
107 dt r0
108 bf WAIT_400NS_2
109
110 ED 0xFD000010, 0x00000001 /* DBEN */
111 ED 0xFD000044, 0x0000050f /* DBRFPDN1 */
112 ED 0xFD000048, 0x236800e6 /* DBRFPDN2 */
113
114 mov.l DUMMY,r0
115 mov.l @r0, r1 /* force single dummy read */
116
117 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
118 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
119 ED 0xFD000108, 0x00000080 /* DBPDCNT0 */
120 ED 0xFD000040, 0x00010000 /* DBRFPDN0 */
121
122 rts
123 nop
124
125 .balign 4
126DUMMY: .long 0xac400000
127FRQCRA: .long 0xa4150000
128KICK: .long 0x80000000
129LSTATS: .long 0xa4150060
130
131ENTRY(ms7724se_sdram_leave_end)
diff --git a/arch/sh/boards/mach-se/7724/setup.c b/arch/sh/boards/mach-se/7724/setup.c
index e78c3be8ad2f..ccaa290e9aba 100644
--- a/arch/sh/boards/mach-se/7724/setup.c
+++ b/arch/sh/boards/mach-se/7724/setup.c
@@ -19,6 +19,7 @@
19#include <linux/smc91x.h> 19#include <linux/smc91x.h>
20#include <linux/gpio.h> 20#include <linux/gpio.h>
21#include <linux/input.h> 21#include <linux/input.h>
22#include <linux/input/sh_keysc.h>
22#include <linux/usb/r8a66597.h> 23#include <linux/usb/r8a66597.h>
23#include <video/sh_mobile_lcdc.h> 24#include <video/sh_mobile_lcdc.h>
24#include <media/sh_mobile_ceu.h> 25#include <media/sh_mobile_ceu.h>
@@ -27,7 +28,7 @@
27#include <asm/heartbeat.h> 28#include <asm/heartbeat.h>
28#include <asm/sh_eth.h> 29#include <asm/sh_eth.h>
29#include <asm/clock.h> 30#include <asm/clock.h>
30#include <asm/sh_keysc.h> 31#include <asm/suspend.h>
31#include <cpu/sh7724.h> 32#include <cpu/sh7724.h>
32#include <mach-se/mach/se7724.h> 33#include <mach-se/mach/se7724.h>
33 34
@@ -51,27 +52,25 @@
51 * and change SW41 to use 720p 52 * and change SW41 to use 720p
52 */ 53 */
53 54
54/* Heartbeat */ 55/*
55static struct heartbeat_data heartbeat_data = { 56 * about sound
56 .regsize = 16, 57 *
57}; 58 * This setup.c supports FSI slave mode.
59 * Please change J20, J21, J22 pin to 1-2 connection.
60 */
58 61
59static struct resource heartbeat_resources[] = { 62/* Heartbeat */
60 [0] = { 63static struct resource heartbeat_resource = {
61 .start = PA_LED, 64 .start = PA_LED,
62 .end = PA_LED, 65 .end = PA_LED,
63 .flags = IORESOURCE_MEM, 66 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
64 },
65}; 67};
66 68
67static struct platform_device heartbeat_device = { 69static struct platform_device heartbeat_device = {
68 .name = "heartbeat", 70 .name = "heartbeat",
69 .id = -1, 71 .id = -1,
70 .dev = { 72 .num_resources = 1,
71 .platform_data = &heartbeat_data, 73 .resource = &heartbeat_resource,
72 },
73 .num_resources = ARRAY_SIZE(heartbeat_resources),
74 .resource = heartbeat_resources,
75}; 74};
76 75
77/* LAN91C111 */ 76/* LAN91C111 */
@@ -264,12 +263,12 @@ static struct platform_device ceu1_device = {
264#define FCLKACR 0xa4150008 263#define FCLKACR 0xa4150008
265static void fsimck_init(struct clk *clk) 264static void fsimck_init(struct clk *clk)
266{ 265{
267 u32 status = ctrl_inl(clk->enable_reg); 266 u32 status = __raw_readl(clk->enable_reg);
268 267
269 /* use external clock */ 268 /* use external clock */
270 status &= ~0x000000ff; 269 status &= ~0x000000ff;
271 status |= 0x00000080; 270 status |= 0x00000080;
272 ctrl_outl(status, clk->enable_reg); 271 __raw_writel(status, clk->enable_reg);
273} 272}
274 273
275static struct clk_ops fsimck_clk_ops = { 274static struct clk_ops fsimck_clk_ops = {
@@ -284,6 +283,7 @@ static struct clk fsimcka_clk = {
284 .rate = 0, /* unknown */ 283 .rate = 0, /* unknown */
285}; 284};
286 285
286/* change J20, J21, J22 pin to 1-2 connection to use slave mode */
287struct sh_fsi_platform_info fsi_info = { 287struct sh_fsi_platform_info fsi_info = {
288 .porta_flags = SH_FSI_BRS_INV | 288 .porta_flags = SH_FSI_BRS_INV |
289 SH_FSI_OUT_SLAVE_MODE | 289 SH_FSI_OUT_SLAVE_MODE |
@@ -313,12 +313,15 @@ static struct platform_device fsi_device = {
313 .dev = { 313 .dev = {
314 .platform_data = &fsi_info, 314 .platform_data = &fsi_info,
315 }, 315 },
316 .archdata = {
317 .hwblk_id = HWBLK_SPU, /* FSI needs SPU hwblk */
318 },
316}; 319};
317 320
318/* KEYSC in SoC (Needs SW33-2 set to ON) */ 321/* KEYSC in SoC (Needs SW33-2 set to ON) */
319static struct sh_keysc_info keysc_info = { 322static struct sh_keysc_info keysc_info = {
320 .mode = SH_KEYSC_MODE_1, 323 .mode = SH_KEYSC_MODE_1,
321 .scan_timing = 10, 324 .scan_timing = 3,
322 .delay = 50, 325 .delay = 50,
323 .keycodes = { 326 .keycodes = {
324 KEY_1, KEY_2, KEY_3, KEY_4, KEY_5, 327 KEY_1, KEY_2, KEY_3, KEY_4, KEY_5,
@@ -448,6 +451,72 @@ static struct platform_device sh7724_usb1_gadget_device = {
448 .resource = sh7724_usb1_gadget_resources, 451 .resource = sh7724_usb1_gadget_resources,
449}; 452};
450 453
454static struct resource sdhi0_cn7_resources[] = {
455 [0] = {
456 .name = "SDHI0",
457 .start = 0x04ce0000,
458 .end = 0x04ce01ff,
459 .flags = IORESOURCE_MEM,
460 },
461 [1] = {
462 .start = 100,
463 .flags = IORESOURCE_IRQ,
464 },
465};
466
467static struct platform_device sdhi0_cn7_device = {
468 .name = "sh_mobile_sdhi",
469 .id = 0,
470 .num_resources = ARRAY_SIZE(sdhi0_cn7_resources),
471 .resource = sdhi0_cn7_resources,
472 .archdata = {
473 .hwblk_id = HWBLK_SDHI0,
474 },
475};
476
477static struct resource sdhi1_cn8_resources[] = {
478 [0] = {
479 .name = "SDHI1",
480 .start = 0x04cf0000,
481 .end = 0x04cf01ff,
482 .flags = IORESOURCE_MEM,
483 },
484 [1] = {
485 .start = 23,
486 .flags = IORESOURCE_IRQ,
487 },
488};
489
490static struct platform_device sdhi1_cn8_device = {
491 .name = "sh_mobile_sdhi",
492 .id = 1,
493 .num_resources = ARRAY_SIZE(sdhi1_cn8_resources),
494 .resource = sdhi1_cn8_resources,
495 .archdata = {
496 .hwblk_id = HWBLK_SDHI1,
497 },
498};
499
500/* IrDA */
501static struct resource irda_resources[] = {
502 [0] = {
503 .name = "IrDA",
504 .start = 0xA45D0000,
505 .end = 0xA45D0049,
506 .flags = IORESOURCE_MEM,
507 },
508 [1] = {
509 .start = 20,
510 .flags = IORESOURCE_IRQ,
511 },
512};
513
514static struct platform_device irda_device = {
515 .name = "sh_sir",
516 .num_resources = ARRAY_SIZE(irda_resources),
517 .resource = irda_resources,
518};
519
451static struct platform_device *ms7724se_devices[] __initdata = { 520static struct platform_device *ms7724se_devices[] __initdata = {
452 &heartbeat_device, 521 &heartbeat_device,
453 &smc91x_eth_device, 522 &smc91x_eth_device,
@@ -460,6 +529,16 @@ static struct platform_device *ms7724se_devices[] __initdata = {
460 &sh7724_usb0_host_device, 529 &sh7724_usb0_host_device,
461 &sh7724_usb1_gadget_device, 530 &sh7724_usb1_gadget_device,
462 &fsi_device, 531 &fsi_device,
532 &sdhi0_cn7_device,
533 &sdhi1_cn8_device,
534 &irda_device,
535};
536
537/* I2C device */
538static struct i2c_board_info i2c0_devices[] = {
539 {
540 I2C_BOARD_INFO("ak4642", 0x12),
541 },
463}; 542};
464 543
465#define EEPROM_OP 0xBA206000 544#define EEPROM_OP 0xBA206000
@@ -472,9 +551,9 @@ static int __init sh_eth_is_eeprom_ready(void)
472 int t = 10000; 551 int t = 10000;
473 552
474 while (t--) { 553 while (t--) {
475 if (!ctrl_inw(EEPROM_STAT)) 554 if (!__raw_readw(EEPROM_STAT))
476 return 1; 555 return 1;
477 cpu_relax(); 556 udelay(1);
478 } 557 }
479 558
480 printk(KERN_ERR "ms7724se can not access to eeprom\n"); 559 printk(KERN_ERR "ms7724se can not access to eeprom\n");
@@ -484,7 +563,7 @@ static int __init sh_eth_is_eeprom_ready(void)
484static void __init sh_eth_init(void) 563static void __init sh_eth_init(void)
485{ 564{
486 int i; 565 int i;
487 u16 mac[3]; 566 u16 mac;
488 567
489 /* check EEPROM status */ 568 /* check EEPROM status */
490 if (!sh_eth_is_eeprom_ready()) 569 if (!sh_eth_is_eeprom_ready())
@@ -492,22 +571,16 @@ static void __init sh_eth_init(void)
492 571
493 /* read MAC addr from EEPROM */ 572 /* read MAC addr from EEPROM */
494 for (i = 0 ; i < 3 ; i++) { 573 for (i = 0 ; i < 3 ; i++) {
495 ctrl_outw(0x0, EEPROM_OP); /* read */ 574 __raw_writew(0x0, EEPROM_OP); /* read */
496 ctrl_outw(i*2, EEPROM_ADR); 575 __raw_writew(i*2, EEPROM_ADR);
497 ctrl_outw(0x1, EEPROM_STRT); 576 __raw_writew(0x1, EEPROM_STRT);
498 if (!sh_eth_is_eeprom_ready()) 577 if (!sh_eth_is_eeprom_ready())
499 return; 578 return;
500 579
501 mac[i] = ctrl_inw(EEPROM_DATA); 580 mac = __raw_readw(EEPROM_DATA);
502 mac[i] = ((mac[i] & 0xFF) << 8) | (mac[i] >> 8); /* swap */ 581 sh_eth_plat.mac_addr[i << 1] = mac & 0xff;
582 sh_eth_plat.mac_addr[(i << 1) + 1] = mac >> 8;
503 } 583 }
504
505 /* reset sh-eth */
506 ctrl_outl(0x1, SH_ETH_ADDR + 0x0);
507
508 /* set MAC addr */
509 ctrl_outl(((mac[0] << 16) | (mac[1])), SH_ETH_MAHR);
510 ctrl_outl((mac[2]), SH_ETH_MALR);
511} 584}
512 585
513#define SW4140 0xBA201000 586#define SW4140 0xBA201000
@@ -524,24 +597,46 @@ static void __init sh_eth_init(void)
524#define SW41_G 0x4000 597#define SW41_G 0x4000
525#define SW41_H 0x8000 598#define SW41_H 0x8000
526 599
527static int __init devices_setup(void) 600extern char ms7724se_sdram_enter_start;
601extern char ms7724se_sdram_enter_end;
602extern char ms7724se_sdram_leave_start;
603extern char ms7724se_sdram_leave_end;
604
605
606static int __init arch_setup(void)
528{ 607{
529 u16 sw = ctrl_inw(SW4140); /* select camera, monitor */ 608 /* enable I2C device */
530 struct clk *fsia_clk; 609 i2c_register_board_info(0, i2c0_devices,
610 ARRAY_SIZE(i2c0_devices));
611 return 0;
612}
613arch_initcall(arch_setup);
531 614
615static int __init devices_setup(void)
616{
617 u16 sw = __raw_readw(SW4140); /* select camera, monitor */
618 struct clk *clk;
619
620 /* register board specific self-refresh code */
621 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
622 SUSP_SH_RSTANDBY,
623 &ms7724se_sdram_enter_start,
624 &ms7724se_sdram_enter_end,
625 &ms7724se_sdram_leave_start,
626 &ms7724se_sdram_leave_end);
532 /* Reset Release */ 627 /* Reset Release */
533 ctrl_outw(ctrl_inw(FPGA_OUT) & 628 __raw_writew(__raw_readw(FPGA_OUT) &
534 ~((1 << 1) | /* LAN */ 629 ~((1 << 1) | /* LAN */
535 (1 << 6) | /* VIDEO DAC */ 630 (1 << 6) | /* VIDEO DAC */
536 (1 << 7) | /* AK4643 */ 631 (1 << 7) | /* AK4643 */
632 (1 << 8) | /* IrDA */
537 (1 << 12) | /* USB0 */ 633 (1 << 12) | /* USB0 */
538 (1 << 14)), /* RMII */ 634 (1 << 14)), /* RMII */
539 FPGA_OUT); 635 FPGA_OUT);
540 636
541 /* turn on USB clocks, use external clock */ 637 /* turn on USB clocks, use external clock */
542 ctrl_outw((ctrl_inw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB); 638 __raw_writew((__raw_readw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB);
543 639
544#ifdef CONFIG_PM
545 /* Let LED9 show STATUS2 */ 640 /* Let LED9 show STATUS2 */
546 gpio_request(GPIO_FN_STATUS2, NULL); 641 gpio_request(GPIO_FN_STATUS2, NULL);
547 642
@@ -550,28 +645,12 @@ static int __init devices_setup(void)
550 645
551 /* Lit LED11 show PDSTATUS */ 646 /* Lit LED11 show PDSTATUS */
552 gpio_request(GPIO_FN_PDSTATUS, NULL); 647 gpio_request(GPIO_FN_PDSTATUS, NULL);
553#else
554 /* Lit LED9 */
555 gpio_request(GPIO_PTJ6, NULL);
556 gpio_direction_output(GPIO_PTJ6, 1);
557 gpio_export(GPIO_PTJ6, 0);
558
559 /* Lit LED10 */
560 gpio_request(GPIO_PTJ5, NULL);
561 gpio_direction_output(GPIO_PTJ5, 1);
562 gpio_export(GPIO_PTJ5, 0);
563
564 /* Lit LED11 */
565 gpio_request(GPIO_PTJ7, NULL);
566 gpio_direction_output(GPIO_PTJ7, 1);
567 gpio_export(GPIO_PTJ7, 0);
568#endif
569 648
570 /* enable USB0 port */ 649 /* enable USB0 port */
571 ctrl_outw(0x0600, 0xa40501d4); 650 __raw_writew(0x0600, 0xa40501d4);
572 651
573 /* enable USB1 port */ 652 /* enable USB1 port */
574 ctrl_outw(0x0600, 0xa4050192); 653 __raw_writew(0x0600, 0xa4050192);
575 654
576 /* enable IRQ 0,1,2 */ 655 /* enable IRQ 0,1,2 */
577 gpio_request(GPIO_FN_INTC_IRQ0, NULL); 656 gpio_request(GPIO_FN_INTC_IRQ0, NULL);
@@ -619,7 +698,7 @@ static int __init devices_setup(void)
619 gpio_request(GPIO_FN_LCDVCPWC, NULL); 698 gpio_request(GPIO_FN_LCDVCPWC, NULL);
620 gpio_request(GPIO_FN_LCDRD, NULL); 699 gpio_request(GPIO_FN_LCDRD, NULL);
621 gpio_request(GPIO_FN_LCDLCLK, NULL); 700 gpio_request(GPIO_FN_LCDLCLK, NULL);
622 ctrl_outw((ctrl_inw(PORT_HIZA) & ~0x0001), PORT_HIZA); 701 __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
623 702
624 /* enable CEU0 */ 703 /* enable CEU0 */
625 gpio_request(GPIO_FN_VIO0_D15, NULL); 704 gpio_request(GPIO_FN_VIO0_D15, NULL);
@@ -690,13 +769,42 @@ static int __init devices_setup(void)
690 gpio_request(GPIO_FN_CLKAUDIOBO, NULL); 769 gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
691 gpio_request(GPIO_FN_FSIIASD, NULL); 770 gpio_request(GPIO_FN_FSIIASD, NULL);
692 771
772 /* set SPU2 clock to 83.4 MHz */
773 clk = clk_get(NULL, "spu_clk");
774 clk_set_rate(clk, clk_round_rate(clk, 83333333));
775 clk_put(clk);
776
693 /* change parent of FSI A */ 777 /* change parent of FSI A */
694 fsia_clk = clk_get(NULL, "fsia_clk"); 778 clk = clk_get(NULL, "fsia_clk");
695 clk_register(&fsimcka_clk); 779 clk_register(&fsimcka_clk);
696 clk_set_parent(fsia_clk, &fsimcka_clk); 780 clk_set_parent(clk, &fsimcka_clk);
697 clk_set_rate(fsia_clk, 11000); 781 clk_set_rate(clk, 11000);
698 clk_set_rate(&fsimcka_clk, 11000); 782 clk_set_rate(&fsimcka_clk, 11000);
699 clk_put(fsia_clk); 783 clk_put(clk);
784
785 /* SDHI0 connected to cn7 */
786 gpio_request(GPIO_FN_SDHI0CD, NULL);
787 gpio_request(GPIO_FN_SDHI0WP, NULL);
788 gpio_request(GPIO_FN_SDHI0D3, NULL);
789 gpio_request(GPIO_FN_SDHI0D2, NULL);
790 gpio_request(GPIO_FN_SDHI0D1, NULL);
791 gpio_request(GPIO_FN_SDHI0D0, NULL);
792 gpio_request(GPIO_FN_SDHI0CMD, NULL);
793 gpio_request(GPIO_FN_SDHI0CLK, NULL);
794
795 /* SDHI1 connected to cn8 */
796 gpio_request(GPIO_FN_SDHI1CD, NULL);
797 gpio_request(GPIO_FN_SDHI1WP, NULL);
798 gpio_request(GPIO_FN_SDHI1D3, NULL);
799 gpio_request(GPIO_FN_SDHI1D2, NULL);
800 gpio_request(GPIO_FN_SDHI1D1, NULL);
801 gpio_request(GPIO_FN_SDHI1D0, NULL);
802 gpio_request(GPIO_FN_SDHI1CMD, NULL);
803 gpio_request(GPIO_FN_SDHI1CLK, NULL);
804
805 /* enable IrDA */
806 gpio_request(GPIO_FN_IRDA_OUT, NULL);
807 gpio_request(GPIO_FN_IRDA_IN, NULL);
700 808
701 /* 809 /*
702 * enable SH-Eth 810 * enable SH-Eth
diff --git a/arch/sh/boards/mach-se/7780/irq.c b/arch/sh/boards/mach-se/7780/irq.c
index 121744c08714..d5c9edc172a3 100644
--- a/arch/sh/boards/mach-se/7780/irq.c
+++ b/arch/sh/boards/mach-se/7780/irq.c
@@ -24,30 +24,30 @@
24void __init init_se7780_IRQ(void) 24void __init init_se7780_IRQ(void)
25{ 25{
26 /* enable all interrupt at FPGA */ 26 /* enable all interrupt at FPGA */
27 ctrl_outw(0, FPGA_INTMSK1); 27 __raw_writew(0, FPGA_INTMSK1);
28 /* mask SM501 interrupt */ 28 /* mask SM501 interrupt */
29 ctrl_outw((ctrl_inw(FPGA_INTMSK1) | 0x0002), FPGA_INTMSK1); 29 __raw_writew((__raw_readw(FPGA_INTMSK1) | 0x0002), FPGA_INTMSK1);
30 /* enable all interrupt at FPGA */ 30 /* enable all interrupt at FPGA */
31 ctrl_outw(0, FPGA_INTMSK2); 31 __raw_writew(0, FPGA_INTMSK2);
32 32
33 /* set FPGA INTSEL register */ 33 /* set FPGA INTSEL register */
34 /* FPGA + 0x06 */ 34 /* FPGA + 0x06 */
35 ctrl_outw( ((IRQPIN_SM501 << IRQPOS_SM501) | 35 __raw_writew( ((IRQPIN_SM501 << IRQPOS_SM501) |
36 (IRQPIN_SMC91CX << IRQPOS_SMC91CX)), FPGA_INTSEL1); 36 (IRQPIN_SMC91CX << IRQPOS_SMC91CX)), FPGA_INTSEL1);
37 37
38 /* FPGA + 0x08 */ 38 /* FPGA + 0x08 */
39 ctrl_outw(((IRQPIN_EXTINT4 << IRQPOS_EXTINT4) | 39 __raw_writew(((IRQPIN_EXTINT4 << IRQPOS_EXTINT4) |
40 (IRQPIN_EXTINT3 << IRQPOS_EXTINT3) | 40 (IRQPIN_EXTINT3 << IRQPOS_EXTINT3) |
41 (IRQPIN_EXTINT2 << IRQPOS_EXTINT2) | 41 (IRQPIN_EXTINT2 << IRQPOS_EXTINT2) |
42 (IRQPIN_EXTINT1 << IRQPOS_EXTINT1)), FPGA_INTSEL2); 42 (IRQPIN_EXTINT1 << IRQPOS_EXTINT1)), FPGA_INTSEL2);
43 43
44 /* FPGA + 0x0A */ 44 /* FPGA + 0x0A */
45 ctrl_outw((IRQPIN_PCCPW << IRQPOS_PCCPW), FPGA_INTSEL3); 45 __raw_writew((IRQPIN_PCCPW << IRQPOS_PCCPW), FPGA_INTSEL3);
46 46
47 plat_irq_setup_pins(IRQ_MODE_IRQ); /* install handlers for IRQ0-7 */ 47 plat_irq_setup_pins(IRQ_MODE_IRQ); /* install handlers for IRQ0-7 */
48 48
49 /* ICR1: detect low level(for 2ndcut) */ 49 /* ICR1: detect low level(for 2ndcut) */
50 ctrl_outl(0xAAAA0000, INTC_ICR1); 50 __raw_writel(0xAAAA0000, INTC_ICR1);
51 51
52 /* 52 /*
53 * FPGA PCISEL register initialize 53 * FPGA PCISEL register initialize
@@ -63,6 +63,6 @@ void __init init_se7780_IRQ(void)
63 * INTD || INTD | INTC | -- | INTA 63 * INTD || INTD | INTC | -- | INTA
64 * ------------------------------------- 64 * -------------------------------------
65 */ 65 */
66 ctrl_outw(0x0013, FPGA_PCI_INTSEL1); 66 __raw_writew(0x0013, FPGA_PCI_INTSEL1);
67 ctrl_outw(0xE402, FPGA_PCI_INTSEL2); 67 __raw_writew(0xE402, FPGA_PCI_INTSEL2);
68} 68}
diff --git a/arch/sh/boards/mach-se/7780/setup.c b/arch/sh/boards/mach-se/7780/setup.c
index 1d3a867e94e3..6f7c207138e1 100644
--- a/arch/sh/boards/mach-se/7780/setup.c
+++ b/arch/sh/boards/mach-se/7780/setup.c
@@ -17,26 +17,17 @@
17#include <asm/heartbeat.h> 17#include <asm/heartbeat.h>
18 18
19/* Heartbeat */ 19/* Heartbeat */
20static struct heartbeat_data heartbeat_data = { 20static struct resource heartbeat_resource = {
21 .regsize = 16, 21 .start = PA_LED,
22}; 22 .end = PA_LED,
23 23 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
24static struct resource heartbeat_resources[] = {
25 [0] = {
26 .start = PA_LED,
27 .end = PA_LED,
28 .flags = IORESOURCE_MEM,
29 },
30}; 24};
31 25
32static struct platform_device heartbeat_device = { 26static struct platform_device heartbeat_device = {
33 .name = "heartbeat", 27 .name = "heartbeat",
34 .id = -1, 28 .id = -1,
35 .dev = { 29 .num_resources = 1,
36 .platform_data = &heartbeat_data, 30 .resource = &heartbeat_resource,
37 },
38 .num_resources = ARRAY_SIZE(heartbeat_resources),
39 .resource = heartbeat_resources,
40}; 31};
41 32
42/* SMC91x */ 33/* SMC91x */
@@ -84,14 +75,14 @@ device_initcall(se7780_devices_setup);
84static void __init se7780_setup(char **cmdline_p) 75static void __init se7780_setup(char **cmdline_p)
85{ 76{
86 /* "SH-Linux" on LED Display */ 77 /* "SH-Linux" on LED Display */
87 ctrl_outw( 'S' , PA_LED_DISP + (DISP_SEL0_ADDR << 1) ); 78 __raw_writew( 'S' , PA_LED_DISP + (DISP_SEL0_ADDR << 1) );
88 ctrl_outw( 'H' , PA_LED_DISP + (DISP_SEL1_ADDR << 1) ); 79 __raw_writew( 'H' , PA_LED_DISP + (DISP_SEL1_ADDR << 1) );
89 ctrl_outw( '-' , PA_LED_DISP + (DISP_SEL2_ADDR << 1) ); 80 __raw_writew( '-' , PA_LED_DISP + (DISP_SEL2_ADDR << 1) );
90 ctrl_outw( 'L' , PA_LED_DISP + (DISP_SEL3_ADDR << 1) ); 81 __raw_writew( 'L' , PA_LED_DISP + (DISP_SEL3_ADDR << 1) );
91 ctrl_outw( 'i' , PA_LED_DISP + (DISP_SEL4_ADDR << 1) ); 82 __raw_writew( 'i' , PA_LED_DISP + (DISP_SEL4_ADDR << 1) );
92 ctrl_outw( 'n' , PA_LED_DISP + (DISP_SEL5_ADDR << 1) ); 83 __raw_writew( 'n' , PA_LED_DISP + (DISP_SEL5_ADDR << 1) );
93 ctrl_outw( 'u' , PA_LED_DISP + (DISP_SEL6_ADDR << 1) ); 84 __raw_writew( 'u' , PA_LED_DISP + (DISP_SEL6_ADDR << 1) );
94 ctrl_outw( 'x' , PA_LED_DISP + (DISP_SEL7_ADDR << 1) ); 85 __raw_writew( 'x' , PA_LED_DISP + (DISP_SEL7_ADDR << 1) );
95 86
96 printk(KERN_INFO "Hitachi UL Solutions Engine 7780SE03 support.\n"); 87 printk(KERN_INFO "Hitachi UL Solutions Engine 7780SE03 support.\n");
97 88
@@ -102,15 +93,15 @@ static void __init se7780_setup(char **cmdline_p)
102 * REQ2/GNT2 -> Serial ATA 93 * REQ2/GNT2 -> Serial ATA
103 * REQ3/GNT3 -> PCI slot 94 * REQ3/GNT3 -> PCI slot
104 */ 95 */
105 ctrl_outw(0x0213, FPGA_REQSEL); 96 __raw_writew(0x0213, FPGA_REQSEL);
106 97
107 /* GPIO setting */ 98 /* GPIO setting */
108 ctrl_outw(0x0000, GPIO_PECR); 99 __raw_writew(0x0000, GPIO_PECR);
109 ctrl_outw(ctrl_inw(GPIO_PHCR)&0xfff3, GPIO_PHCR); 100 __raw_writew(__raw_readw(GPIO_PHCR)&0xfff3, GPIO_PHCR);
110 ctrl_outw(0x0c00, GPIO_PMSELR); 101 __raw_writew(0x0c00, GPIO_PMSELR);
111 102
112 /* iVDR Power ON */ 103 /* iVDR Power ON */
113 ctrl_outw(0x0001, FPGA_IVDRPW); 104 __raw_writew(0x0001, FPGA_IVDRPW);
114} 105}
115 106
116/* 107/*
diff --git a/arch/sh/boards/mach-sh03/rtc.c b/arch/sh/boards/mach-sh03/rtc.c
index a8b9f844ab5b..1b200990500c 100644
--- a/arch/sh/boards/mach-sh03/rtc.c
+++ b/arch/sh/boards/mach-sh03/rtc.c
@@ -44,15 +44,15 @@ unsigned long get_cmos_time(void)
44 spin_lock(&sh03_rtc_lock); 44 spin_lock(&sh03_rtc_lock);
45 again: 45 again:
46 do { 46 do {
47 sec = (ctrl_inb(RTC_SEC1) & 0xf) + (ctrl_inb(RTC_SEC10) & 0x7) * 10; 47 sec = (__raw_readb(RTC_SEC1) & 0xf) + (__raw_readb(RTC_SEC10) & 0x7) * 10;
48 min = (ctrl_inb(RTC_MIN1) & 0xf) + (ctrl_inb(RTC_MIN10) & 0xf) * 10; 48 min = (__raw_readb(RTC_MIN1) & 0xf) + (__raw_readb(RTC_MIN10) & 0xf) * 10;
49 hour = (ctrl_inb(RTC_HOU1) & 0xf) + (ctrl_inb(RTC_HOU10) & 0xf) * 10; 49 hour = (__raw_readb(RTC_HOU1) & 0xf) + (__raw_readb(RTC_HOU10) & 0xf) * 10;
50 day = (ctrl_inb(RTC_DAY1) & 0xf) + (ctrl_inb(RTC_DAY10) & 0xf) * 10; 50 day = (__raw_readb(RTC_DAY1) & 0xf) + (__raw_readb(RTC_DAY10) & 0xf) * 10;
51 mon = (ctrl_inb(RTC_MON1) & 0xf) + (ctrl_inb(RTC_MON10) & 0xf) * 10; 51 mon = (__raw_readb(RTC_MON1) & 0xf) + (__raw_readb(RTC_MON10) & 0xf) * 10;
52 year = (ctrl_inb(RTC_YEA1) & 0xf) + (ctrl_inb(RTC_YEA10) & 0xf) * 10 52 year = (__raw_readb(RTC_YEA1) & 0xf) + (__raw_readb(RTC_YEA10) & 0xf) * 10
53 + (ctrl_inb(RTC_YEA100 ) & 0xf) * 100 53 + (__raw_readb(RTC_YEA100 ) & 0xf) * 100
54 + (ctrl_inb(RTC_YEA1000) & 0xf) * 1000; 54 + (__raw_readb(RTC_YEA1000) & 0xf) * 1000;
55 } while (sec != (ctrl_inb(RTC_SEC1) & 0xf) + (ctrl_inb(RTC_SEC10) & 0x7) * 10); 55 } while (sec != (__raw_readb(RTC_SEC1) & 0xf) + (__raw_readb(RTC_SEC10) & 0x7) * 10);
56 if (year == 0 || mon < 1 || mon > 12 || day > 31 || day < 1 || 56 if (year == 0 || mon < 1 || mon > 12 || day > 31 || day < 1 ||
57 hour > 23 || min > 59 || sec > 59) { 57 hour > 23 || min > 59 || sec > 59) {
58 printk(KERN_ERR 58 printk(KERN_ERR
@@ -60,16 +60,16 @@ unsigned long get_cmos_time(void)
60 printk("year=%d, mon=%d, day=%d, hour=%d, min=%d, sec=%d\n", 60 printk("year=%d, mon=%d, day=%d, hour=%d, min=%d, sec=%d\n",
61 year, mon, day, hour, min, sec); 61 year, mon, day, hour, min, sec);
62 62
63 ctrl_outb(0, RTC_SEC1); ctrl_outb(0, RTC_SEC10); 63 __raw_writeb(0, RTC_SEC1); __raw_writeb(0, RTC_SEC10);
64 ctrl_outb(0, RTC_MIN1); ctrl_outb(0, RTC_MIN10); 64 __raw_writeb(0, RTC_MIN1); __raw_writeb(0, RTC_MIN10);
65 ctrl_outb(0, RTC_HOU1); ctrl_outb(0, RTC_HOU10); 65 __raw_writeb(0, RTC_HOU1); __raw_writeb(0, RTC_HOU10);
66 ctrl_outb(6, RTC_WEE1); 66 __raw_writeb(6, RTC_WEE1);
67 ctrl_outb(1, RTC_DAY1); ctrl_outb(0, RTC_DAY10); 67 __raw_writeb(1, RTC_DAY1); __raw_writeb(0, RTC_DAY10);
68 ctrl_outb(1, RTC_MON1); ctrl_outb(0, RTC_MON10); 68 __raw_writeb(1, RTC_MON1); __raw_writeb(0, RTC_MON10);
69 ctrl_outb(0, RTC_YEA1); ctrl_outb(0, RTC_YEA10); 69 __raw_writeb(0, RTC_YEA1); __raw_writeb(0, RTC_YEA10);
70 ctrl_outb(0, RTC_YEA100); 70 __raw_writeb(0, RTC_YEA100);
71 ctrl_outb(2, RTC_YEA1000); 71 __raw_writeb(2, RTC_YEA1000);
72 ctrl_outb(0, RTC_CTL); 72 __raw_writeb(0, RTC_CTL);
73 goto again; 73 goto again;
74 } 74 }
75 75
@@ -93,9 +93,9 @@ static int set_rtc_mmss(unsigned long nowtime)
93 /* gets recalled with irq locally disabled */ 93 /* gets recalled with irq locally disabled */
94 spin_lock(&sh03_rtc_lock); 94 spin_lock(&sh03_rtc_lock);
95 for (i = 0 ; i < 1000000 ; i++) /* may take up to 1 second... */ 95 for (i = 0 ; i < 1000000 ; i++) /* may take up to 1 second... */
96 if (!(ctrl_inb(RTC_CTL) & RTC_BUSY)) 96 if (!(__raw_readb(RTC_CTL) & RTC_BUSY))
97 break; 97 break;
98 cmos_minutes = (ctrl_inb(RTC_MIN1) & 0xf) + (ctrl_inb(RTC_MIN10) & 0xf) * 10; 98 cmos_minutes = (__raw_readb(RTC_MIN1) & 0xf) + (__raw_readb(RTC_MIN10) & 0xf) * 10;
99 real_seconds = nowtime % 60; 99 real_seconds = nowtime % 60;
100 real_minutes = nowtime / 60; 100 real_minutes = nowtime / 60;
101 if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1) 101 if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1)
@@ -103,10 +103,10 @@ static int set_rtc_mmss(unsigned long nowtime)
103 real_minutes %= 60; 103 real_minutes %= 60;
104 104
105 if (abs(real_minutes - cmos_minutes) < 30) { 105 if (abs(real_minutes - cmos_minutes) < 30) {
106 ctrl_outb(real_seconds % 10, RTC_SEC1); 106 __raw_writeb(real_seconds % 10, RTC_SEC1);
107 ctrl_outb(real_seconds / 10, RTC_SEC10); 107 __raw_writeb(real_seconds / 10, RTC_SEC10);
108 ctrl_outb(real_minutes % 10, RTC_MIN1); 108 __raw_writeb(real_minutes % 10, RTC_MIN1);
109 ctrl_outb(real_minutes / 10, RTC_MIN10); 109 __raw_writeb(real_minutes / 10, RTC_MIN10);
110 } else { 110 } else {
111 printk(KERN_WARNING 111 printk(KERN_WARNING
112 "set_rtc_mmss: can't update from %d to %d\n", 112 "set_rtc_mmss: can't update from %d to %d\n",
diff --git a/arch/sh/boards/mach-sh03/setup.c b/arch/sh/boards/mach-sh03/setup.c
index 74cfb4b8b03d..af4a0c012a96 100644
--- a/arch/sh/boards/mach-sh03/setup.c
+++ b/arch/sh/boards/mach-sh03/setup.c
@@ -82,7 +82,7 @@ static int __init sh03_devices_setup(void)
82 /* open I/O area window */ 82 /* open I/O area window */
83 paddrbase = virt_to_phys((void *)PA_AREA5_IO); 83 paddrbase = virt_to_phys((void *)PA_AREA5_IO);
84 prot = PAGE_KERNEL_PCC(1, _PAGE_PCC_IO16); 84 prot = PAGE_KERNEL_PCC(1, _PAGE_PCC_IO16);
85 cf_ide_base = p3_ioremap(paddrbase, PAGE_SIZE, prot.pgprot); 85 cf_ide_base = ioremap_prot(paddrbase, PAGE_SIZE, pgprot_val(prot));
86 if (!cf_ide_base) { 86 if (!cf_ide_base) {
87 printk("allocate_cf_area : can't open CF I/O window!\n"); 87 printk("allocate_cf_area : can't open CF I/O window!\n");
88 return -ENOMEM; 88 return -ENOMEM;
diff --git a/arch/sh/boards/mach-sh7763rdp/irq.c b/arch/sh/boards/mach-sh7763rdp/irq.c
index d8ebfa7d8c76..add698c8f2b4 100644
--- a/arch/sh/boards/mach-sh7763rdp/irq.c
+++ b/arch/sh/boards/mach-sh7763rdp/irq.c
@@ -28,18 +28,18 @@
28void __init init_sh7763rdp_IRQ(void) 28void __init init_sh7763rdp_IRQ(void)
29{ 29{
30 /* GPIO enabled */ 30 /* GPIO enabled */
31 ctrl_outl(1 << 25, INTC_INT2MSKCR); 31 __raw_writel(1 << 25, INTC_INT2MSKCR);
32 32
33 /* enable GPIO interrupts */ 33 /* enable GPIO interrupts */
34 ctrl_outl((ctrl_inl(INTC_INT2PRI7) & 0xFF00FFFF) | 0x000F0000, 34 __raw_writel((__raw_readl(INTC_INT2PRI7) & 0xFF00FFFF) | 0x000F0000,
35 INTC_INT2PRI7); 35 INTC_INT2PRI7);
36 36
37 /* USBH enabled */ 37 /* USBH enabled */
38 ctrl_outl(1 << 17, INTC_INT2MSKCR1); 38 __raw_writel(1 << 17, INTC_INT2MSKCR1);
39 39
40 /* GETHER enabled */ 40 /* GETHER enabled */
41 ctrl_outl(1 << 16, INTC_INT2MSKCR1); 41 __raw_writel(1 << 16, INTC_INT2MSKCR1);
42 42
43 /* DMAC enabled */ 43 /* DMAC enabled */
44 ctrl_outl(1 << 8, INTC_INT2MSKCR); 44 __raw_writel(1 << 8, INTC_INT2MSKCR);
45} 45}
diff --git a/arch/sh/boards/mach-sh7763rdp/setup.c b/arch/sh/boards/mach-sh7763rdp/setup.c
index 390534a0b35c..f64a6918224c 100644
--- a/arch/sh/boards/mach-sh7763rdp/setup.c
+++ b/arch/sh/boards/mach-sh7763rdp/setup.c
@@ -158,50 +158,50 @@ device_initcall(sh7763rdp_devices_setup);
158static void __init sh7763rdp_setup(char **cmdline_p) 158static void __init sh7763rdp_setup(char **cmdline_p)
159{ 159{
160 /* Board version check */ 160 /* Board version check */
161 if (ctrl_inw(CPLD_BOARD_ID_ERV_REG) == 0xECB1) 161 if (__raw_readw(CPLD_BOARD_ID_ERV_REG) == 0xECB1)
162 printk(KERN_INFO "RTE Standard Configuration\n"); 162 printk(KERN_INFO "RTE Standard Configuration\n");
163 else 163 else
164 printk(KERN_INFO "RTA Standard Configuration\n"); 164 printk(KERN_INFO "RTA Standard Configuration\n");
165 165
166 /* USB pin select bits (clear bit 5-2 to 0) */ 166 /* USB pin select bits (clear bit 5-2 to 0) */
167 ctrl_outw((ctrl_inw(PORT_PSEL2) & 0xFFC3), PORT_PSEL2); 167 __raw_writew((__raw_readw(PORT_PSEL2) & 0xFFC3), PORT_PSEL2);
168 /* USBH setup port I controls to other (clear bits 4-9 to 0) */ 168 /* USBH setup port I controls to other (clear bits 4-9 to 0) */
169 ctrl_outw(ctrl_inw(PORT_PICR) & 0xFC0F, PORT_PICR); 169 __raw_writew(__raw_readw(PORT_PICR) & 0xFC0F, PORT_PICR);
170 170
171 /* Select USB Host controller */ 171 /* Select USB Host controller */
172 ctrl_outw(0x00, USB_USBHSC); 172 __raw_writew(0x00, USB_USBHSC);
173 173
174 /* For LCD */ 174 /* For LCD */
175 /* set PTJ7-1, bits 15-2 of PJCR to 0 */ 175 /* set PTJ7-1, bits 15-2 of PJCR to 0 */
176 ctrl_outw(ctrl_inw(PORT_PJCR) & 0x0003, PORT_PJCR); 176 __raw_writew(__raw_readw(PORT_PJCR) & 0x0003, PORT_PJCR);
177 /* set PTI5, bits 11-10 of PICR to 0 */ 177 /* set PTI5, bits 11-10 of PICR to 0 */
178 ctrl_outw(ctrl_inw(PORT_PICR) & 0xF3FF, PORT_PICR); 178 __raw_writew(__raw_readw(PORT_PICR) & 0xF3FF, PORT_PICR);
179 ctrl_outw(0, PORT_PKCR); 179 __raw_writew(0, PORT_PKCR);
180 ctrl_outw(0, PORT_PLCR); 180 __raw_writew(0, PORT_PLCR);
181 /* set PSEL2 bits 14-8, 5-4, of PSEL2 to 0 */ 181 /* set PSEL2 bits 14-8, 5-4, of PSEL2 to 0 */
182 ctrl_outw((ctrl_inw(PORT_PSEL2) & 0x00C0), PORT_PSEL2); 182 __raw_writew((__raw_readw(PORT_PSEL2) & 0x00C0), PORT_PSEL2);
183 /* set PSEL3 bits 14-12, 6-4, 2-0 of PSEL3 to 0 */ 183 /* set PSEL3 bits 14-12, 6-4, 2-0 of PSEL3 to 0 */
184 ctrl_outw((ctrl_inw(PORT_PSEL3) & 0x0700), PORT_PSEL3); 184 __raw_writew((__raw_readw(PORT_PSEL3) & 0x0700), PORT_PSEL3);
185 185
186 /* For HAC */ 186 /* For HAC */
187 /* bit3-0 0100:HAC & SSI1 enable */ 187 /* bit3-0 0100:HAC & SSI1 enable */
188 ctrl_outw((ctrl_inw(PORT_PSEL1) & 0xFFF0) | 0x0004, PORT_PSEL1); 188 __raw_writew((__raw_readw(PORT_PSEL1) & 0xFFF0) | 0x0004, PORT_PSEL1);
189 /* bit14 1:SSI_HAC_CLK enable */ 189 /* bit14 1:SSI_HAC_CLK enable */
190 ctrl_outw(ctrl_inw(PORT_PSEL4) | 0x4000, PORT_PSEL4); 190 __raw_writew(__raw_readw(PORT_PSEL4) | 0x4000, PORT_PSEL4);
191 191
192 /* SH-Ether */ 192 /* SH-Ether */
193 ctrl_outw((ctrl_inw(PORT_PSEL1) & ~0xff00) | 0x2400, PORT_PSEL1); 193 __raw_writew((__raw_readw(PORT_PSEL1) & ~0xff00) | 0x2400, PORT_PSEL1);
194 ctrl_outw(0x0, PORT_PFCR); 194 __raw_writew(0x0, PORT_PFCR);
195 ctrl_outw(0x0, PORT_PFCR); 195 __raw_writew(0x0, PORT_PFCR);
196 ctrl_outw(0x0, PORT_PFCR); 196 __raw_writew(0x0, PORT_PFCR);
197 197
198 /* MMC */ 198 /* MMC */
199 /*selects SCIF and MMC other functions */ 199 /*selects SCIF and MMC other functions */
200 ctrl_outw(0x0001, PORT_PSEL0); 200 __raw_writew(0x0001, PORT_PSEL0);
201 /* MMC clock operates */ 201 /* MMC clock operates */
202 ctrl_outl(ctrl_inl(MSTPCR1) & ~0x8, MSTPCR1); 202 __raw_writel(__raw_readl(MSTPCR1) & ~0x8, MSTPCR1);
203 ctrl_outw(ctrl_inw(PORT_PACR) & ~0x3000, PORT_PACR); 203 __raw_writew(__raw_readw(PORT_PACR) & ~0x3000, PORT_PACR);
204 ctrl_outw(ctrl_inw(PORT_PCCR) & ~0xCFC3, PORT_PCCR); 204 __raw_writew(__raw_readw(PORT_PCCR) & ~0xCFC3, PORT_PCCR);
205} 205}
206 206
207static struct sh_machine_vector mv_sh7763rdp __initmv = { 207static struct sh_machine_vector mv_sh7763rdp __initmv = {
diff --git a/arch/sh/boards/mach-snapgear/setup.c b/arch/sh/boards/mach-snapgear/setup.c
index a3277a23cf14..331745dee379 100644
--- a/arch/sh/boards/mach-snapgear/setup.c
+++ b/arch/sh/boards/mach-snapgear/setup.c
@@ -30,7 +30,7 @@
30 30
31static irqreturn_t eraseconfig_interrupt(int irq, void *dev_id) 31static irqreturn_t eraseconfig_interrupt(int irq, void *dev_id)
32{ 32{
33 (void)ctrl_inb(0xb8000000); /* dummy read */ 33 (void)__raw_readb(0xb8000000); /* dummy read */
34 34
35 printk("SnapGear: erase switch interrupt!\n"); 35 printk("SnapGear: erase switch interrupt!\n");
36 36
diff --git a/arch/sh/boards/mach-systemh/irq.c b/arch/sh/boards/mach-systemh/irq.c
index 986a0e71d220..523aea5dc94e 100644
--- a/arch/sh/boards/mach-systemh/irq.c
+++ b/arch/sh/boards/mach-systemh/irq.c
@@ -41,13 +41,13 @@ static void disable_systemh_irq(unsigned int irq)
41 unsigned long val, mask = 0x01 << 1; 41 unsigned long val, mask = 0x01 << 1;
42 42
43 /* Clear the "irq"th bit in the mask and set it in the request */ 43 /* Clear the "irq"th bit in the mask and set it in the request */
44 val = ctrl_inl((unsigned long)systemh_irq_mask_register); 44 val = __raw_readl((unsigned long)systemh_irq_mask_register);
45 val &= ~mask; 45 val &= ~mask;
46 ctrl_outl(val, (unsigned long)systemh_irq_mask_register); 46 __raw_writel(val, (unsigned long)systemh_irq_mask_register);
47 47
48 val = ctrl_inl((unsigned long)systemh_irq_request_register); 48 val = __raw_readl((unsigned long)systemh_irq_request_register);
49 val |= mask; 49 val |= mask;
50 ctrl_outl(val, (unsigned long)systemh_irq_request_register); 50 __raw_writel(val, (unsigned long)systemh_irq_request_register);
51 } 51 }
52} 52}
53 53
@@ -57,9 +57,9 @@ static void enable_systemh_irq(unsigned int irq)
57 unsigned long val, mask = 0x01 << 1; 57 unsigned long val, mask = 0x01 << 1;
58 58
59 /* Set "irq"th bit in the mask register */ 59 /* Set "irq"th bit in the mask register */
60 val = ctrl_inl((unsigned long)systemh_irq_mask_register); 60 val = __raw_readl((unsigned long)systemh_irq_mask_register);
61 val |= mask; 61 val |= mask;
62 ctrl_outl(val, (unsigned long)systemh_irq_mask_register); 62 __raw_writel(val, (unsigned long)systemh_irq_mask_register);
63 } 63 }
64} 64}
65 65
diff --git a/arch/sh/boards/mach-titan/Makefile b/arch/sh/boards/mach-titan/Makefile
deleted file mode 100644
index 08d753700062..000000000000
--- a/arch/sh/boards/mach-titan/Makefile
+++ /dev/null
@@ -1,5 +0,0 @@
1#
2# Makefile for the Nimble Microsystems TITAN specific parts of the kernel
3#
4
5obj-y := setup.o io.o
diff --git a/arch/sh/boards/mach-titan/io.c b/arch/sh/boards/mach-titan/io.c
deleted file mode 100644
index 0130e9826aca..000000000000
--- a/arch/sh/boards/mach-titan/io.c
+++ /dev/null
@@ -1,108 +0,0 @@
1/*
2 * I/O routines for Titan
3 */
4#include <linux/pci.h>
5#include <asm/machvec.h>
6#include <asm/addrspace.h>
7#include <mach/titan.h>
8#include <asm/io.h>
9
10static inline unsigned int port2adr(unsigned int port)
11{
12 maybebadio((unsigned long)port);
13 return port;
14}
15
16u8 titan_inb(unsigned long port)
17{
18 if (PXSEG(port))
19 return ctrl_inb(port);
20 return ctrl_inw(port2adr(port)) & 0xff;
21}
22
23u8 titan_inb_p(unsigned long port)
24{
25 u8 v;
26
27 if (PXSEG(port))
28 v = ctrl_inb(port);
29 else
30 v = ctrl_inw(port2adr(port)) & 0xff;
31 ctrl_delay();
32 return v;
33}
34
35u16 titan_inw(unsigned long port)
36{
37 if (PXSEG(port))
38 return ctrl_inw(port);
39 else if (port >= 0x2000)
40 return ctrl_inw(port2adr(port));
41 else
42 maybebadio(port);
43 return 0;
44}
45
46u32 titan_inl(unsigned long port)
47{
48 if (PXSEG(port))
49 return ctrl_inl(port);
50 else if (port >= 0x2000)
51 return ctrl_inw(port2adr(port));
52 else
53 maybebadio(port);
54 return 0;
55}
56
57void titan_outb(u8 value, unsigned long port)
58{
59 if (PXSEG(port))
60 ctrl_outb(value, port);
61 else
62 ctrl_outw(value, port2adr(port));
63}
64
65void titan_outb_p(u8 value, unsigned long port)
66{
67 if (PXSEG(port))
68 ctrl_outb(value, port);
69 else
70 ctrl_outw(value, port2adr(port));
71 ctrl_delay();
72}
73
74void titan_outw(u16 value, unsigned long port)
75{
76 if (PXSEG(port))
77 ctrl_outw(value, port);
78 else if (port >= 0x2000)
79 ctrl_outw(value, port2adr(port));
80 else
81 maybebadio(port);
82}
83
84void titan_outl(u32 value, unsigned long port)
85{
86 if (PXSEG(port))
87 ctrl_outl(value, port);
88 else
89 maybebadio(port);
90}
91
92void titan_insl(unsigned long port, void *dst, unsigned long count)
93{
94 maybebadio(port);
95}
96
97void titan_outsl(unsigned long port, const void *src, unsigned long count)
98{
99 maybebadio(port);
100}
101
102void __iomem *titan_ioport_map(unsigned long port, unsigned int size)
103{
104 if (PXSEG(port))
105 return (void __iomem *)port;
106
107 return (void __iomem *)port2adr(port);
108}
diff --git a/arch/sh/boards/mach-x3proto/ilsel.c b/arch/sh/boards/mach-x3proto/ilsel.c
index b5c673c39337..5c9842704c60 100644
--- a/arch/sh/boards/mach-x3proto/ilsel.c
+++ b/arch/sh/boards/mach-x3proto/ilsel.c
@@ -70,10 +70,10 @@ static void __ilsel_enable(ilsel_source_t set, unsigned int bit)
70 pr_debug("%s: bit#%d: addr - 0x%08lx (shift %d, set %d)\n", 70 pr_debug("%s: bit#%d: addr - 0x%08lx (shift %d, set %d)\n",
71 __func__, bit, addr, shift, set); 71 __func__, bit, addr, shift, set);
72 72
73 tmp = ctrl_inw(addr); 73 tmp = __raw_readw(addr);
74 tmp &= ~(0xf << shift); 74 tmp &= ~(0xf << shift);
75 tmp |= set << shift; 75 tmp |= set << shift;
76 ctrl_outw(tmp, addr); 76 __raw_writew(tmp, addr);
77} 77}
78 78
79/** 79/**
@@ -142,9 +142,9 @@ void ilsel_disable(unsigned int irq)
142 142
143 addr = mk_ilsel_addr(irq); 143 addr = mk_ilsel_addr(irq);
144 144
145 tmp = ctrl_inw(addr); 145 tmp = __raw_readw(addr);
146 tmp &= ~(0xf << mk_ilsel_shift(irq)); 146 tmp &= ~(0xf << mk_ilsel_shift(irq));
147 ctrl_outw(tmp, addr); 147 __raw_writew(tmp, addr);
148 148
149 clear_bit(irq, &ilsel_level_map); 149 clear_bit(irq, &ilsel_level_map);
150} 150}
diff --git a/arch/sh/boards/mach-x3proto/setup.c b/arch/sh/boards/mach-x3proto/setup.c
index efe4cb9f8a77..e284592fd42a 100644
--- a/arch/sh/boards/mach-x3proto/setup.c
+++ b/arch/sh/boards/mach-x3proto/setup.c
@@ -149,7 +149,7 @@ static void __init x3proto_init_irq(void)
149 plat_irq_setup_pins(IRQ_MODE_IRL3210); 149 plat_irq_setup_pins(IRQ_MODE_IRL3210);
150 150
151 /* Set ICR0.LVLMODE */ 151 /* Set ICR0.LVLMODE */
152 ctrl_outl(ctrl_inl(0xfe410000) | (1 << 21), 0xfe410000); 152 __raw_writel(__raw_readl(0xfe410000) | (1 << 21), 0xfe410000);
153} 153}
154 154
155static struct sh_machine_vector mv_x3proto __initmv = { 155static struct sh_machine_vector mv_x3proto __initmv = {
diff --git a/arch/sh/boot/Makefile b/arch/sh/boot/Makefile
index cb8cf5572e79..1ce63624c9b9 100644
--- a/arch/sh/boot/Makefile
+++ b/arch/sh/boot/Makefile
@@ -21,12 +21,15 @@ CONFIG_ZERO_PAGE_OFFSET ?= 0x00001000
21CONFIG_ENTRY_OFFSET ?= 0x00001000 21CONFIG_ENTRY_OFFSET ?= 0x00001000
22 22
23suffix-y := bin 23suffix-y := bin
24suffix-$(CONFIG_KERNEL_GZIP) := gz 24suffix-$(CONFIG_KERNEL_GZIP) := gz
25suffix-$(CONFIG_KERNEL_BZIP2) := bz2 25suffix-$(CONFIG_KERNEL_BZIP2) := bz2
26suffix-$(CONFIG_KERNEL_LZMA) := lzma 26suffix-$(CONFIG_KERNEL_LZMA) := lzma
27 27suffix-$(CONFIG_KERNEL_LZO) := lzo
28targets := zImage vmlinux.srec romImage uImage uImage.srec uImage.gz uImage.bz2 uImage.lzma uImage.bin 28
29extra-y += vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 vmlinux.bin.lzma 29targets := zImage vmlinux.srec romImage uImage uImage.srec uImage.gz \
30 uImage.bz2 uImage.lzma uImage.lzo uImage.bin
31extra-y += vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 vmlinux.bin.lzma \
32 vmlinux.bin.lzo
30subdir- := compressed romimage 33subdir- := compressed romimage
31 34
32$(obj)/zImage: $(obj)/compressed/vmlinux FORCE 35$(obj)/zImage: $(obj)/compressed/vmlinux FORCE
@@ -43,15 +46,8 @@ $(obj)/romImage: $(obj)/romimage/vmlinux FORCE
43$(obj)/romimage/vmlinux: $(obj)/zImage FORCE 46$(obj)/romimage/vmlinux: $(obj)/zImage FORCE
44 $(Q)$(MAKE) $(build)=$(obj)/romimage $@ 47 $(Q)$(MAKE) $(build)=$(obj)/romimage $@
45 48
46KERNEL_MEMORY := 0x00000000 49KERNEL_MEMORY := $(shell /bin/bash -c 'printf "0x%08x" \
47ifeq ($(CONFIG_PMB_FIXED),y)
48KERNEL_MEMORY := $(shell /bin/bash -c 'printf "0x%08x" \
49 $$[$(CONFIG_MEMORY_START) & 0x1fffffff]') 50 $$[$(CONFIG_MEMORY_START) & 0x1fffffff]')
50endif
51ifeq ($(CONFIG_29BIT),y)
52KERNEL_MEMORY := $(shell /bin/bash -c 'printf "0x%08x" \
53 $$[$(CONFIG_MEMORY_START)]')
54endif
55 51
56KERNEL_LOAD := $(shell /bin/bash -c 'printf "0x%08x" \ 52KERNEL_LOAD := $(shell /bin/bash -c 'printf "0x%08x" \
57 $$[$(CONFIG_PAGE_OFFSET) + \ 53 $$[$(CONFIG_PAGE_OFFSET) + \
@@ -80,6 +76,9 @@ $(obj)/vmlinux.bin.bz2: $(obj)/vmlinux.bin FORCE
80$(obj)/vmlinux.bin.lzma: $(obj)/vmlinux.bin FORCE 76$(obj)/vmlinux.bin.lzma: $(obj)/vmlinux.bin FORCE
81 $(call if_changed,lzma) 77 $(call if_changed,lzma)
82 78
79$(obj)/vmlinux.bin.lzo: $(obj)/vmlinux.bin FORCE
80 $(call if_changed,lzo)
81
83$(obj)/uImage.bz2: $(obj)/vmlinux.bin.bz2 82$(obj)/uImage.bz2: $(obj)/vmlinux.bin.bz2
84 $(call if_changed,uimage,bzip2) 83 $(call if_changed,uimage,bzip2)
85 84
@@ -89,6 +88,9 @@ $(obj)/uImage.gz: $(obj)/vmlinux.bin.gz
89$(obj)/uImage.lzma: $(obj)/vmlinux.bin.lzma 88$(obj)/uImage.lzma: $(obj)/vmlinux.bin.lzma
90 $(call if_changed,uimage,lzma) 89 $(call if_changed,uimage,lzma)
91 90
91$(obj)/uImage.lzo: $(obj)/vmlinux.bin.lzo
92 $(call if_changed,uimage,lzo)
93
92$(obj)/uImage.bin: $(obj)/vmlinux.bin 94$(obj)/uImage.bin: $(obj)/vmlinux.bin
93 $(call if_changed,uimage,none) 95 $(call if_changed,uimage,none)
94 96
diff --git a/arch/sh/boot/compressed/Makefile b/arch/sh/boot/compressed/Makefile
index 6182eca5180a..5d660b90943b 100644
--- a/arch/sh/boot/compressed/Makefile
+++ b/arch/sh/boot/compressed/Makefile
@@ -6,14 +6,11 @@
6 6
7targets := vmlinux vmlinux.bin vmlinux.bin.gz \ 7targets := vmlinux vmlinux.bin vmlinux.bin.gz \
8 vmlinux.bin.bz2 vmlinux.bin.lzma \ 8 vmlinux.bin.bz2 vmlinux.bin.lzma \
9 vmlinux.bin.lzo \
9 head_$(BITS).o misc.o piggy.o 10 head_$(BITS).o misc.o piggy.o
10 11
11OBJECTS = $(obj)/head_$(BITS).o $(obj)/misc.o $(obj)/cache.o 12OBJECTS = $(obj)/head_$(BITS).o $(obj)/misc.o $(obj)/cache.o
12 13
13ifdef CONFIG_SH_STANDARD_BIOS
14OBJECTS += $(obj)/../../kernel/sh_bios.o
15endif
16
17# 14#
18# IMAGE_OFFSET is the load offset of the compression loader 15# IMAGE_OFFSET is the load offset of the compression loader
19# 16#
@@ -47,6 +44,8 @@ $(obj)/vmlinux.bin.bz2: $(vmlinux.bin.all-y) FORCE
47 $(call if_changed,bzip2) 44 $(call if_changed,bzip2)
48$(obj)/vmlinux.bin.lzma: $(vmlinux.bin.all-y) FORCE 45$(obj)/vmlinux.bin.lzma: $(vmlinux.bin.all-y) FORCE
49 $(call if_changed,lzma) 46 $(call if_changed,lzma)
47$(obj)/vmlinux.bin.lzo: $(vmlinux.bin.all-y) FORCE
48 $(call if_changed,lzo)
50 49
51OBJCOPYFLAGS += -R .empty_zero_page 50OBJCOPYFLAGS += -R .empty_zero_page
52 51
diff --git a/arch/sh/boot/compressed/cache.c b/arch/sh/boot/compressed/cache.c
index e27fc74f228c..d0b77b68a4d0 100644
--- a/arch/sh/boot/compressed/cache.c
+++ b/arch/sh/boot/compressed/cache.c
@@ -5,7 +5,7 @@ int cache_control(unsigned int command)
5 5
6 for (i = 0; i < (32 * 1024); i += 32) { 6 for (i = 0; i < (32 * 1024); i += 32) {
7 (void)*p; 7 (void)*p;
8 p += (32 / sizeof (int)); 8 p += (32 / sizeof(int));
9 } 9 }
10 10
11 return 0; 11 return 0;
diff --git a/arch/sh/boot/compressed/misc.c b/arch/sh/boot/compressed/misc.c
index fd56a71ca9d9..27140a6b365d 100644
--- a/arch/sh/boot/compressed/misc.c
+++ b/arch/sh/boot/compressed/misc.c
@@ -14,7 +14,6 @@
14#include <asm/uaccess.h> 14#include <asm/uaccess.h>
15#include <asm/addrspace.h> 15#include <asm/addrspace.h>
16#include <asm/page.h> 16#include <asm/page.h>
17#include <asm/sh_bios.h>
18 17
19/* 18/*
20 * gzip declarations 19 * gzip declarations
@@ -62,29 +61,15 @@ static unsigned long free_mem_end_ptr;
62#include "../../../../lib/decompress_unlzma.c" 61#include "../../../../lib/decompress_unlzma.c"
63#endif 62#endif
64 63
65#ifdef CONFIG_SH_STANDARD_BIOS 64#ifdef CONFIG_KERNEL_LZO
66size_t strlen(const char *s) 65#include "../../../../lib/decompress_unlzo.c"
67{ 66#endif
68 int i = 0;
69
70 while (*s++)
71 i++;
72 return i;
73}
74 67
75int puts(const char *s) 68int puts(const char *s)
76{ 69{
77 int len = strlen(s);
78 sh_bios_console_write(s, len);
79 return len;
80}
81#else
82int puts(const char *s)
83{
84 /* This should be updated to use the sh-sci routines */ 70 /* This should be updated to use the sh-sci routines */
85 return 0; 71 return 0;
86} 72}
87#endif
88 73
89void* memset(void* s, int c, size_t n) 74void* memset(void* s, int c, size_t n)
90{ 75{
@@ -131,8 +116,8 @@ void decompress_kernel(void)
131#ifdef CONFIG_SUPERH64 116#ifdef CONFIG_SUPERH64
132 output_addr = (CONFIG_MEMORY_START + 0x2000); 117 output_addr = (CONFIG_MEMORY_START + 0x2000);
133#else 118#else
134 output_addr = PHYSADDR((unsigned long)&_text+PAGE_SIZE); 119 output_addr = __pa((unsigned long)&_text+PAGE_SIZE);
135#ifdef CONFIG_29BIT 120#if defined(CONFIG_29BIT)
136 output_addr |= P2SEG; 121 output_addr |= P2SEG;
137#endif 122#endif
138#endif 123#endif
diff --git a/arch/sh/boot/romimage/Makefile b/arch/sh/boot/romimage/Makefile
index 5806eee84f6f..f473a24a2d92 100644
--- a/arch/sh/boot/romimage/Makefile
+++ b/arch/sh/boot/romimage/Makefile
@@ -4,16 +4,22 @@
4# create an image suitable for burning to flash from zImage 4# create an image suitable for burning to flash from zImage
5# 5#
6 6
7targets := vmlinux head.o 7targets := vmlinux head.o zeropage.bin piggy.o
8 8
9OBJECTS = $(obj)/head.o 9OBJECTS = $(obj)/head.o
10LDFLAGS_vmlinux := --oformat $(ld-bfd) -Ttext 0 -e romstart 10LDFLAGS_vmlinux := --oformat $(ld-bfd) -Ttext 0 -e romstart \
11 -T $(obj)/../../kernel/vmlinux.lds
11 12
12$(obj)/vmlinux: $(OBJECTS) $(obj)/piggy.o FORCE 13$(obj)/vmlinux: $(OBJECTS) $(obj)/piggy.o FORCE
13 $(call if_changed,ld) 14 $(call if_changed,ld)
14 @: 15 @:
15 16
17OBJCOPYFLAGS += -j .empty_zero_page
18
19$(obj)/zeropage.bin: vmlinux FORCE
20 $(call if_changed,objcopy)
21
16LDFLAGS_piggy.o := -r --format binary --oformat $(ld-bfd) -T 22LDFLAGS_piggy.o := -r --format binary --oformat $(ld-bfd) -T
17 23
18$(obj)/piggy.o: $(obj)/vmlinux.scr arch/sh/boot/zImage FORCE 24$(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/zeropage.bin arch/sh/boot/zImage FORCE
19 $(call if_changed,ld) 25 $(call if_changed,ld)
diff --git a/arch/sh/boot/romimage/head.S b/arch/sh/boot/romimage/head.S
index 219bc626dd71..93e779a405ec 100644
--- a/arch/sh/boot/romimage/head.S
+++ b/arch/sh/boot/romimage/head.S
@@ -5,6 +5,44 @@
5 */ 5 */
6 6
7.text 7.text
8 #include <asm/page.h>
9
8 .global romstart 10 .global romstart
9romstart: 11romstart:
12 /* include board specific setup code */
10#include <mach/romimage.h> 13#include <mach/romimage.h>
14
15 /* copy the empty_zero_page contents to where vmlinux expects it */
16 mova empty_zero_page_src, r0
17 mov.l empty_zero_page_dst, r1
18 mov #(PAGE_SHIFT - 4), r4
19 mov #1, r3
20 shld r4, r3 /* r3 = PAGE_SIZE / 16 */
21
221:
23 mov.l @r0, r4
24 mov.l @(4, r0), r5
25 mov.l @(8, r0), r6
26 mov.l @(12, r0), r7
27 add #16,r0
28 mov.l r4, @r1
29 mov.l r5, @(4, r1)
30 mov.l r6, @(8, r1)
31 mov.l r7, @(12, r1)
32 dt r3
33 add #16,r1
34 bf 1b
35
36 /* jump to the zImage entry point located after the zero page data */
37 mov #PAGE_SHIFT, r4
38 mov #1, r1
39 shld r4, r1
40 mova empty_zero_page_src, r0
41 add r1, r0
42 jmp @r0
43 nop
44
45 .align 2
46empty_zero_page_dst:
47 .long _text
48empty_zero_page_src:
diff --git a/arch/sh/cchips/hd6446x/hd64461.c b/arch/sh/cchips/hd6446x/hd64461.c
index 50aa0c1f76ea..bcb31ae84a51 100644
--- a/arch/sh/cchips/hd6446x/hd64461.c
+++ b/arch/sh/cchips/hd6446x/hd64461.c
@@ -55,25 +55,22 @@ static struct irq_chip hd64461_irq_chip = {
55 55
56static void hd64461_irq_demux(unsigned int irq, struct irq_desc *desc) 56static void hd64461_irq_demux(unsigned int irq, struct irq_desc *desc)
57{ 57{
58 unsigned short intv = ctrl_inw(HD64461_NIRR); 58 unsigned short intv = __raw_readw(HD64461_NIRR);
59 struct irq_desc *ext_desc;
60 unsigned int ext_irq = HD64461_IRQBASE; 59 unsigned int ext_irq = HD64461_IRQBASE;
61 60
62 intv &= (1 << HD64461_IRQ_NUM) - 1; 61 intv &= (1 << HD64461_IRQ_NUM) - 1;
63 62
64 while (intv) { 63 for (; intv; intv >>= 1, ext_irq++) {
65 if (intv & 1) { 64 if (!(intv & 1))
66 ext_desc = irq_desc + ext_irq; 65 continue;
67 handle_level_irq(ext_irq, ext_desc); 66
68 } 67 generic_handle_irq(ext_irq);
69 intv >>= 1;
70 ext_irq++;
71 } 68 }
72} 69}
73 70
74int __init setup_hd64461(void) 71int __init setup_hd64461(void)
75{ 72{
76 int i; 73 int i, nid = cpu_to_node(boot_cpu_data);
77 74
78 if (!MACH_HD64461) 75 if (!MACH_HD64461)
79 return 0; 76 return 0;
@@ -90,9 +87,26 @@ int __init setup_hd64461(void)
90 __raw_writew(0xffff, HD64461_NIMR); 87 __raw_writew(0xffff, HD64461_NIMR);
91 88
92 /* IRQ 80 -> 95 belongs to HD64461 */ 89 /* IRQ 80 -> 95 belongs to HD64461 */
93 for (i = HD64461_IRQBASE; i < HD64461_IRQBASE + 16; i++) 90 for (i = HD64461_IRQBASE; i < HD64461_IRQBASE + 16; i++) {
91 unsigned int irq;
92
93 irq = create_irq_nr(i, nid);
94 if (unlikely(irq == 0)) {
95 pr_err("%s: failed hooking irq %d for HD64461\n",
96 __func__, i);
97 return -EBUSY;
98 }
99
100 if (unlikely(irq != i)) {
101 pr_err("%s: got irq %d but wanted %d, bailing.\n",
102 __func__, irq, i);
103 destroy_irq(irq);
104 return -EINVAL;
105 }
106
94 set_irq_chip_and_handler(i, &hd64461_irq_chip, 107 set_irq_chip_and_handler(i, &hd64461_irq_chip,
95 handle_level_irq); 108 handle_level_irq);
109 }
96 110
97 set_irq_chained_handler(CONFIG_HD64461_IRQ, hd64461_irq_demux); 111 set_irq_chained_handler(CONFIG_HD64461_IRQ, hd64461_irq_demux);
98 set_irq_type(CONFIG_HD64461_IRQ, IRQ_TYPE_LEVEL_LOW); 112 set_irq_type(CONFIG_HD64461_IRQ, IRQ_TYPE_LEVEL_LOW);
diff --git a/arch/sh/configs/ap325rxa_defconfig b/arch/sh/configs/ap325rxa_defconfig
index 2f78d01cc6c0..8931a60e37a4 100644
--- a/arch/sh/configs/ap325rxa_defconfig
+++ b/arch/sh/configs/ap325rxa_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Fri Sep 25 11:22:50 2009 4# Mon Jan 4 11:10:59 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -20,6 +20,7 @@ CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
21CONFIG_ARCH_SUSPEND_POSSIBLE=y 21CONFIG_ARCH_SUSPEND_POSSIBLE=y
22CONFIG_ARCH_HIBERNATION_POSSIBLE=y 22CONFIG_ARCH_HIBERNATION_POSSIBLE=y
23CONFIG_SYS_SUPPORTS_HUGETLBFS=y
23CONFIG_SYS_SUPPORTS_CMT=y 24CONFIG_SYS_SUPPORTS_CMT=y
24CONFIG_SYS_SUPPORTS_TMU=y 25CONFIG_SYS_SUPPORTS_TMU=y
25CONFIG_STACKTRACE_SUPPORT=y 26CONFIG_STACKTRACE_SUPPORT=y
@@ -30,6 +31,7 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
30CONFIG_ARCH_NO_VIRT_TO_BUS=y 31CONFIG_ARCH_NO_VIRT_TO_BUS=y
31CONFIG_ARCH_HAS_DEFAULT_IDLE=y 32CONFIG_ARCH_HAS_DEFAULT_IDLE=y
32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
34CONFIG_DMA_NONCOHERENT=y
33CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
34CONFIG_CONSTRUCTORS=y 36CONFIG_CONSTRUCTORS=y
35 37
@@ -62,6 +64,7 @@ CONFIG_BSD_PROCESS_ACCT=y
62# 64#
63CONFIG_TREE_RCU=y 65CONFIG_TREE_RCU=y
64# CONFIG_TREE_PREEMPT_RCU is not set 66# CONFIG_TREE_PREEMPT_RCU is not set
67# CONFIG_TINY_RCU is not set
65# CONFIG_RCU_TRACE is not set 68# CONFIG_RCU_TRACE is not set
66CONFIG_RCU_FANOUT=32 69CONFIG_RCU_FANOUT=32
67# CONFIG_RCU_FANOUT_EXACT is not set 70# CONFIG_RCU_FANOUT_EXACT is not set
@@ -99,6 +102,7 @@ CONFIG_EVENTFD=y
99CONFIG_SHMEM=y 102CONFIG_SHMEM=y
100CONFIG_AIO=y 103CONFIG_AIO=y
101CONFIG_HAVE_PERF_EVENTS=y 104CONFIG_HAVE_PERF_EVENTS=y
105CONFIG_PERF_USE_VMALLOC=y
102 106
103# 107#
104# Kernel Performance Events And Counters 108# Kernel Performance Events And Counters
@@ -116,6 +120,7 @@ CONFIG_HAVE_IOREMAP_PROT=y
116CONFIG_HAVE_KPROBES=y 120CONFIG_HAVE_KPROBES=y
117CONFIG_HAVE_KRETPROBES=y 121CONFIG_HAVE_KRETPROBES=y
118CONFIG_HAVE_ARCH_TRACEHOOK=y 122CONFIG_HAVE_ARCH_TRACEHOOK=y
123CONFIG_HAVE_DMA_ATTRS=y
119CONFIG_HAVE_CLK=y 124CONFIG_HAVE_CLK=y
120CONFIG_HAVE_DMA_API_DEBUG=y 125CONFIG_HAVE_DMA_API_DEBUG=y
121 126
@@ -142,14 +147,41 @@ CONFIG_LBDAF=y
142# IO Schedulers 147# IO Schedulers
143# 148#
144CONFIG_IOSCHED_NOOP=y 149CONFIG_IOSCHED_NOOP=y
145CONFIG_IOSCHED_AS=y
146CONFIG_IOSCHED_DEADLINE=y 150CONFIG_IOSCHED_DEADLINE=y
147CONFIG_IOSCHED_CFQ=y 151CONFIG_IOSCHED_CFQ=y
148# CONFIG_DEFAULT_AS is not set
149# CONFIG_DEFAULT_DEADLINE is not set 152# CONFIG_DEFAULT_DEADLINE is not set
150CONFIG_DEFAULT_CFQ=y 153CONFIG_DEFAULT_CFQ=y
151# CONFIG_DEFAULT_NOOP is not set 154# CONFIG_DEFAULT_NOOP is not set
152CONFIG_DEFAULT_IOSCHED="cfq" 155CONFIG_DEFAULT_IOSCHED="cfq"
156# CONFIG_INLINE_SPIN_TRYLOCK is not set
157# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
158# CONFIG_INLINE_SPIN_LOCK is not set
159# CONFIG_INLINE_SPIN_LOCK_BH is not set
160# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
161# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
162# CONFIG_INLINE_SPIN_UNLOCK is not set
163# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
164# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
165# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
166# CONFIG_INLINE_READ_TRYLOCK is not set
167# CONFIG_INLINE_READ_LOCK is not set
168# CONFIG_INLINE_READ_LOCK_BH is not set
169# CONFIG_INLINE_READ_LOCK_IRQ is not set
170# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
171# CONFIG_INLINE_READ_UNLOCK is not set
172# CONFIG_INLINE_READ_UNLOCK_BH is not set
173# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
174# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
175# CONFIG_INLINE_WRITE_TRYLOCK is not set
176# CONFIG_INLINE_WRITE_LOCK is not set
177# CONFIG_INLINE_WRITE_LOCK_BH is not set
178# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
179# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
180# CONFIG_INLINE_WRITE_UNLOCK is not set
181# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
182# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
183# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
184# CONFIG_MUTEX_SPIN_ON_OWNER is not set
153CONFIG_FREEZER=y 185CONFIG_FREEZER=y
154 186
155# 187#
@@ -205,6 +237,7 @@ CONFIG_FORCE_MAX_ZONEORDER=11
205CONFIG_MEMORY_START=0x08000000 237CONFIG_MEMORY_START=0x08000000
206CONFIG_MEMORY_SIZE=0x08000000 238CONFIG_MEMORY_SIZE=0x08000000
207CONFIG_29BIT=y 239CONFIG_29BIT=y
240# CONFIG_PMB_ENABLE is not set
208# CONFIG_X2TLB is not set 241# CONFIG_X2TLB is not set
209CONFIG_VSYSCALL=y 242CONFIG_VSYSCALL=y
210CONFIG_ARCH_FLATMEM_ENABLE=y 243CONFIG_ARCH_FLATMEM_ENABLE=y
@@ -229,8 +262,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
229# CONFIG_PHYS_ADDR_T_64BIT is not set 262# CONFIG_PHYS_ADDR_T_64BIT is not set
230CONFIG_ZONE_DMA_FLAG=0 263CONFIG_ZONE_DMA_FLAG=0
231CONFIG_NR_QUICK=2 264CONFIG_NR_QUICK=2
232CONFIG_HAVE_MLOCK=y
233CONFIG_HAVE_MLOCKED_PAGE_BIT=y
234# CONFIG_KSM is not set 265# CONFIG_KSM is not set
235CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 266CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
236 267
@@ -262,7 +293,6 @@ CONFIG_SH_AP325RXA=y
262# 293#
263CONFIG_SH_TIMER_TMU=y 294CONFIG_SH_TIMER_TMU=y
264# CONFIG_SH_TIMER_CMT is not set 295# CONFIG_SH_TIMER_CMT is not set
265CONFIG_SH_PCLK_FREQ=33333333
266CONFIG_SH_CLK_CPG=y 296CONFIG_SH_CLK_CPG=y
267CONFIG_TICK_ONESHOT=y 297CONFIG_TICK_ONESHOT=y
268# CONFIG_NO_HZ is not set 298# CONFIG_NO_HZ is not set
@@ -418,9 +448,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
418# CONFIG_AF_RXRPC is not set 448# CONFIG_AF_RXRPC is not set
419CONFIG_WIRELESS=y 449CONFIG_WIRELESS=y
420# CONFIG_CFG80211 is not set 450# CONFIG_CFG80211 is not set
421CONFIG_CFG80211_DEFAULT_PS_VALUE=0
422# CONFIG_WIRELESS_OLD_REGULATORY is not set
423# CONFIG_WIRELESS_EXT is not set
424# CONFIG_LIB80211 is not set 451# CONFIG_LIB80211 is not set
425 452
426# 453#
@@ -550,6 +577,10 @@ CONFIG_MTD_UBI_BEB_RESERVE=1
550CONFIG_BLK_DEV=y 577CONFIG_BLK_DEV=y
551# CONFIG_BLK_DEV_COW_COMMON is not set 578# CONFIG_BLK_DEV_COW_COMMON is not set
552# CONFIG_BLK_DEV_LOOP is not set 579# CONFIG_BLK_DEV_LOOP is not set
580
581#
582# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
583#
553# CONFIG_BLK_DEV_NBD is not set 584# CONFIG_BLK_DEV_NBD is not set
554CONFIG_BLK_DEV_RAM=y 585CONFIG_BLK_DEV_RAM=y
555CONFIG_BLK_DEV_RAM_COUNT=4 586CONFIG_BLK_DEV_RAM_COUNT=4
@@ -559,9 +590,12 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
559# CONFIG_ATA_OVER_ETH is not set 590# CONFIG_ATA_OVER_ETH is not set
560# CONFIG_BLK_DEV_HD is not set 591# CONFIG_BLK_DEV_HD is not set
561CONFIG_MISC_DEVICES=y 592CONFIG_MISC_DEVICES=y
593# CONFIG_AD525X_DPOT is not set
562# CONFIG_ICS932S401 is not set 594# CONFIG_ICS932S401 is not set
563# CONFIG_ENCLOSURE_SERVICES is not set 595# CONFIG_ENCLOSURE_SERVICES is not set
564# CONFIG_ISL29003 is not set 596# CONFIG_ISL29003 is not set
597# CONFIG_DS1682 is not set
598# CONFIG_TI_DAC7512 is not set
565# CONFIG_C2PORT is not set 599# CONFIG_C2PORT is not set
566 600
567# 601#
@@ -572,6 +606,7 @@ CONFIG_MISC_DEVICES=y
572# CONFIG_EEPROM_LEGACY is not set 606# CONFIG_EEPROM_LEGACY is not set
573# CONFIG_EEPROM_MAX6875 is not set 607# CONFIG_EEPROM_MAX6875 is not set
574# CONFIG_EEPROM_93CX6 is not set 608# CONFIG_EEPROM_93CX6 is not set
609# CONFIG_IWMC3200TOP is not set
575CONFIG_HAVE_IDE=y 610CONFIG_HAVE_IDE=y
576# CONFIG_IDE is not set 611# CONFIG_IDE is not set
577 612
@@ -664,11 +699,11 @@ CONFIG_SMSC911X=y
664# CONFIG_B44 is not set 699# CONFIG_B44 is not set
665# CONFIG_KS8842 is not set 700# CONFIG_KS8842 is not set
666# CONFIG_KS8851 is not set 701# CONFIG_KS8851 is not set
702# CONFIG_KS8851_MLL is not set
667# CONFIG_NETDEV_1000 is not set 703# CONFIG_NETDEV_1000 is not set
668# CONFIG_NETDEV_10000 is not set 704# CONFIG_NETDEV_10000 is not set
669CONFIG_WLAN=y 705CONFIG_WLAN=y
670# CONFIG_WLAN_PRE80211 is not set 706# CONFIG_HOSTAP is not set
671# CONFIG_WLAN_80211 is not set
672 707
673# 708#
674# Enable WiMAX (Networking options) to see the WiMAX drivers 709# Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -688,6 +723,7 @@ CONFIG_WLAN=y
688CONFIG_INPUT=y 723CONFIG_INPUT=y
689# CONFIG_INPUT_FF_MEMLESS is not set 724# CONFIG_INPUT_FF_MEMLESS is not set
690# CONFIG_INPUT_POLLDEV is not set 725# CONFIG_INPUT_POLLDEV is not set
726# CONFIG_INPUT_SPARSEKMAP is not set
691 727
692# 728#
693# Userland interfaces 729# Userland interfaces
@@ -782,7 +818,6 @@ CONFIG_I2C_SH_MOBILE=y
782# 818#
783# Miscellaneous I2C Chip support 819# Miscellaneous I2C Chip support
784# 820#
785# CONFIG_DS1682 is not set
786# CONFIG_SENSORS_TSL2550 is not set 821# CONFIG_SENSORS_TSL2550 is not set
787# CONFIG_I2C_DEBUG_CORE is not set 822# CONFIG_I2C_DEBUG_CORE is not set
788# CONFIG_I2C_DEBUG_ALGO is not set 823# CONFIG_I2C_DEBUG_ALGO is not set
@@ -796,7 +831,10 @@ CONFIG_SPI_MASTER=y
796# 831#
797CONFIG_SPI_BITBANG=y 832CONFIG_SPI_BITBANG=y
798CONFIG_SPI_GPIO=y 833CONFIG_SPI_GPIO=y
834# CONFIG_SPI_SH_MSIOF is not set
799# CONFIG_SPI_SH_SCI is not set 835# CONFIG_SPI_SH_SCI is not set
836# CONFIG_SPI_XILINX is not set
837# CONFIG_SPI_DESIGNWARE is not set
800 838
801# 839#
802# SPI Protocol Masters 840# SPI Protocol Masters
@@ -854,11 +892,13 @@ CONFIG_SSB_POSSIBLE=y
854# 892#
855# CONFIG_MFD_CORE is not set 893# CONFIG_MFD_CORE is not set
856# CONFIG_MFD_SM501 is not set 894# CONFIG_MFD_SM501 is not set
895# CONFIG_MFD_SH_MOBILE_SDHI is not set
857# CONFIG_HTC_PASIC3 is not set 896# CONFIG_HTC_PASIC3 is not set
858# CONFIG_TPS65010 is not set 897# CONFIG_TPS65010 is not set
859# CONFIG_TWL4030_CORE is not set 898# CONFIG_TWL4030_CORE is not set
860# CONFIG_MFD_TMIO is not set 899# CONFIG_MFD_TMIO is not set
861# CONFIG_PMIC_DA903X is not set 900# CONFIG_PMIC_DA903X is not set
901# CONFIG_PMIC_ADP5520 is not set
862# CONFIG_MFD_WM8400 is not set 902# CONFIG_MFD_WM8400 is not set
863# CONFIG_MFD_WM831X is not set 903# CONFIG_MFD_WM831X is not set
864# CONFIG_MFD_WM8350_I2C is not set 904# CONFIG_MFD_WM8350_I2C is not set
@@ -866,6 +906,8 @@ CONFIG_SSB_POSSIBLE=y
866# CONFIG_MFD_MC13783 is not set 906# CONFIG_MFD_MC13783 is not set
867# CONFIG_AB3100_CORE is not set 907# CONFIG_AB3100_CORE is not set
868# CONFIG_EZX_PCAP is not set 908# CONFIG_EZX_PCAP is not set
909# CONFIG_MFD_88PM8607 is not set
910# CONFIG_AB4500_CORE is not set
869# CONFIG_REGULATOR is not set 911# CONFIG_REGULATOR is not set
870CONFIG_MEDIA_SUPPORT=y 912CONFIG_MEDIA_SUPPORT=y
871 913
@@ -882,6 +924,8 @@ CONFIG_VIDEO_MEDIA=y
882# 924#
883# Multimedia drivers 925# Multimedia drivers
884# 926#
927CONFIG_IR_CORE=y
928CONFIG_VIDEO_IR=y
885# CONFIG_MEDIA_ATTACH is not set 929# CONFIG_MEDIA_ATTACH is not set
886CONFIG_MEDIA_TUNER=y 930CONFIG_MEDIA_TUNER=y
887# CONFIG_MEDIA_TUNER_CUSTOMISE is not set 931# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
@@ -901,6 +945,7 @@ CONFIG_VIDEO_CAPTURE_DRIVERS=y
901# CONFIG_VIDEO_ADV_DEBUG is not set 945# CONFIG_VIDEO_ADV_DEBUG is not set
902# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set 946# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
903CONFIG_VIDEO_HELPER_CHIPS_AUTO=y 947CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
948CONFIG_VIDEO_IR_I2C=y
904# CONFIG_VIDEO_VIVI is not set 949# CONFIG_VIDEO_VIVI is not set
905# CONFIG_VIDEO_SAA5246A is not set 950# CONFIG_VIDEO_SAA5246A is not set
906# CONFIG_VIDEO_SAA5249 is not set 951# CONFIG_VIDEO_SAA5249 is not set
@@ -908,10 +953,13 @@ CONFIG_SOC_CAMERA=y
908# CONFIG_SOC_CAMERA_MT9M001 is not set 953# CONFIG_SOC_CAMERA_MT9M001 is not set
909# CONFIG_SOC_CAMERA_MT9M111 is not set 954# CONFIG_SOC_CAMERA_MT9M111 is not set
910# CONFIG_SOC_CAMERA_MT9T031 is not set 955# CONFIG_SOC_CAMERA_MT9T031 is not set
956# CONFIG_SOC_CAMERA_MT9T112 is not set
911# CONFIG_SOC_CAMERA_MT9V022 is not set 957# CONFIG_SOC_CAMERA_MT9V022 is not set
958# CONFIG_SOC_CAMERA_RJ54N1 is not set
912# CONFIG_SOC_CAMERA_TW9910 is not set 959# CONFIG_SOC_CAMERA_TW9910 is not set
913CONFIG_SOC_CAMERA_PLATFORM=y 960CONFIG_SOC_CAMERA_PLATFORM=y
914CONFIG_SOC_CAMERA_OV772X=y 961CONFIG_SOC_CAMERA_OV772X=y
962# CONFIG_SOC_CAMERA_OV9640 is not set
915CONFIG_VIDEO_SH_MOBILE_CEU=y 963CONFIG_VIDEO_SH_MOBILE_CEU=y
916# CONFIG_RADIO_ADAPTERS is not set 964# CONFIG_RADIO_ADAPTERS is not set
917# CONFIG_DAB is not set 965# CONFIG_DAB is not set
@@ -996,6 +1044,7 @@ CONFIG_MMC_BLOCK_BOUNCE=y
996# CONFIG_MMC_AT91 is not set 1044# CONFIG_MMC_AT91 is not set
997# CONFIG_MMC_ATMELMCI is not set 1045# CONFIG_MMC_ATMELMCI is not set
998CONFIG_MMC_SPI=y 1046CONFIG_MMC_SPI=y
1047# CONFIG_MMC_TMIO is not set
999# CONFIG_MEMSTICK is not set 1048# CONFIG_MEMSTICK is not set
1000# CONFIG_NEW_LEDS is not set 1049# CONFIG_NEW_LEDS is not set
1001# CONFIG_ACCESSIBILITY is not set 1050# CONFIG_ACCESSIBILITY is not set
@@ -1027,6 +1076,7 @@ CONFIG_RTC_INTF_DEV=y
1027CONFIG_RTC_DRV_PCF8563=y 1076CONFIG_RTC_DRV_PCF8563=y
1028# CONFIG_RTC_DRV_PCF8583 is not set 1077# CONFIG_RTC_DRV_PCF8583 is not set
1029# CONFIG_RTC_DRV_M41T80 is not set 1078# CONFIG_RTC_DRV_M41T80 is not set
1079# CONFIG_RTC_DRV_BQ32K is not set
1030# CONFIG_RTC_DRV_S35390A is not set 1080# CONFIG_RTC_DRV_S35390A is not set
1031# CONFIG_RTC_DRV_FM3130 is not set 1081# CONFIG_RTC_DRV_FM3130 is not set
1032# CONFIG_RTC_DRV_RX8581 is not set 1082# CONFIG_RTC_DRV_RX8581 is not set
@@ -1055,7 +1105,9 @@ CONFIG_RTC_DRV_PCF8563=y
1055# CONFIG_RTC_DRV_M48T86 is not set 1105# CONFIG_RTC_DRV_M48T86 is not set
1056# CONFIG_RTC_DRV_M48T35 is not set 1106# CONFIG_RTC_DRV_M48T35 is not set
1057# CONFIG_RTC_DRV_M48T59 is not set 1107# CONFIG_RTC_DRV_M48T59 is not set
1108# CONFIG_RTC_DRV_MSM6242 is not set
1058# CONFIG_RTC_DRV_BQ4802 is not set 1109# CONFIG_RTC_DRV_BQ4802 is not set
1110# CONFIG_RTC_DRV_RP5C01 is not set
1059# CONFIG_RTC_DRV_V3020 is not set 1111# CONFIG_RTC_DRV_V3020 is not set
1060 1112
1061# 1113#
@@ -1248,7 +1300,7 @@ CONFIG_FRAME_WARN=1024
1248# CONFIG_DEBUG_FS is not set 1300# CONFIG_DEBUG_FS is not set
1249# CONFIG_HEADERS_CHECK is not set 1301# CONFIG_HEADERS_CHECK is not set
1250# CONFIG_DEBUG_KERNEL is not set 1302# CONFIG_DEBUG_KERNEL is not set
1251# CONFIG_DEBUG_BUGVERBOSE is not set 1303CONFIG_DEBUG_BUGVERBOSE=y
1252# CONFIG_DEBUG_MEMORY_INIT is not set 1304# CONFIG_DEBUG_MEMORY_INIT is not set
1253# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1305# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1254# CONFIG_LATENCYTOP is not set 1306# CONFIG_LATENCYTOP is not set
@@ -1265,7 +1317,6 @@ CONFIG_TRACING_SUPPORT=y
1265# CONFIG_SAMPLES is not set 1317# CONFIG_SAMPLES is not set
1266CONFIG_HAVE_ARCH_KGDB=y 1318CONFIG_HAVE_ARCH_KGDB=y
1267# CONFIG_SH_STANDARD_BIOS is not set 1319# CONFIG_SH_STANDARD_BIOS is not set
1268# CONFIG_EARLY_SCIF_CONSOLE is not set
1269# CONFIG_DWARF_UNWINDER is not set 1320# CONFIG_DWARF_UNWINDER is not set
1270 1321
1271# 1322#
@@ -1274,7 +1325,11 @@ CONFIG_HAVE_ARCH_KGDB=y
1274# CONFIG_KEYS is not set 1325# CONFIG_KEYS is not set
1275# CONFIG_SECURITY is not set 1326# CONFIG_SECURITY is not set
1276# CONFIG_SECURITYFS is not set 1327# CONFIG_SECURITYFS is not set
1277# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1328# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1329# CONFIG_DEFAULT_SECURITY_SMACK is not set
1330# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1331CONFIG_DEFAULT_SECURITY_DAC=y
1332CONFIG_DEFAULT_SECURITY=""
1278CONFIG_CRYPTO=y 1333CONFIG_CRYPTO=y
1279 1334
1280# 1335#
diff --git a/arch/sh/configs/cayman_defconfig b/arch/sh/configs/cayman_defconfig
index 6b863cb1e248..92589a950d07 100644
--- a/arch/sh/configs/cayman_defconfig
+++ b/arch/sh/configs/cayman_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.30 3# Linux kernel version: 2.6.33-rc2
4# Thu Jun 18 12:21:54 2009 4# Mon Jan 4 11:14:50 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7# CONFIG_SUPERH32 is not set 7# CONFIG_SUPERH32 is not set
@@ -14,11 +14,13 @@ CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y 16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y
17# CONFIG_GENERIC_GPIO is not set 18# CONFIG_GENERIC_GPIO is not set
18CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
19CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
20# CONFIG_ARCH_SUSPEND_POSSIBLE is not set 21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
21# CONFIG_ARCH_HIBERNATION_POSSIBLE is not set 22# CONFIG_ARCH_HIBERNATION_POSSIBLE is not set
23CONFIG_SYS_SUPPORTS_HUGETLBFS=y
22CONFIG_SYS_SUPPORTS_PCI=y 24CONFIG_SYS_SUPPORTS_PCI=y
23CONFIG_SYS_SUPPORTS_TMU=y 25CONFIG_SYS_SUPPORTS_TMU=y
24CONFIG_STACKTRACE_SUPPORT=y 26CONFIG_STACKTRACE_SUPPORT=y
@@ -28,7 +30,10 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
28# CONFIG_ARCH_HAS_ILOG2_U64 is not set 30# CONFIG_ARCH_HAS_ILOG2_U64 is not set
29CONFIG_ARCH_NO_VIRT_TO_BUS=y 31CONFIG_ARCH_NO_VIRT_TO_BUS=y
30CONFIG_ARCH_HAS_DEFAULT_IDLE=y 32CONFIG_ARCH_HAS_DEFAULT_IDLE=y
33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
34CONFIG_DMA_NONCOHERENT=y
31CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
36CONFIG_CONSTRUCTORS=y
32 37
33# 38#
34# General setup 39# General setup
@@ -39,6 +44,12 @@ CONFIG_LOCK_KERNEL=y
39CONFIG_INIT_ENV_ARG_LIMIT=32 44CONFIG_INIT_ENV_ARG_LIMIT=32
40CONFIG_LOCALVERSION="" 45CONFIG_LOCALVERSION=""
41CONFIG_LOCALVERSION_AUTO=y 46CONFIG_LOCALVERSION_AUTO=y
47CONFIG_HAVE_KERNEL_GZIP=y
48CONFIG_HAVE_KERNEL_BZIP2=y
49CONFIG_HAVE_KERNEL_LZMA=y
50CONFIG_KERNEL_GZIP=y
51# CONFIG_KERNEL_BZIP2 is not set
52# CONFIG_KERNEL_LZMA is not set
42CONFIG_SWAP=y 53CONFIG_SWAP=y
43# CONFIG_SYSVIPC is not set 54# CONFIG_SYSVIPC is not set
44CONFIG_POSIX_MQUEUE=y 55CONFIG_POSIX_MQUEUE=y
@@ -50,11 +61,13 @@ CONFIG_POSIX_MQUEUE_SYSCTL=y
50# 61#
51# RCU Subsystem 62# RCU Subsystem
52# 63#
53CONFIG_CLASSIC_RCU=y 64CONFIG_TREE_RCU=y
54# CONFIG_TREE_RCU is not set 65# CONFIG_TREE_PREEMPT_RCU is not set
55# CONFIG_PREEMPT_RCU is not set 66# CONFIG_TINY_RCU is not set
67# CONFIG_RCU_TRACE is not set
68CONFIG_RCU_FANOUT=32
69# CONFIG_RCU_FANOUT_EXACT is not set
56# CONFIG_TREE_RCU_TRACE is not set 70# CONFIG_TREE_RCU_TRACE is not set
57# CONFIG_PREEMPT_RCU_TRACE is not set
58# CONFIG_IKCONFIG is not set 71# CONFIG_IKCONFIG is not set
59CONFIG_LOG_BUF_SHIFT=14 72CONFIG_LOG_BUF_SHIFT=14
60# CONFIG_GROUP_SCHED is not set 73# CONFIG_GROUP_SCHED is not set
@@ -85,24 +98,32 @@ CONFIG_TIMERFD=y
85CONFIG_EVENTFD=y 98CONFIG_EVENTFD=y
86CONFIG_SHMEM=y 99CONFIG_SHMEM=y
87CONFIG_AIO=y 100CONFIG_AIO=y
101CONFIG_HAVE_PERF_EVENTS=y
102CONFIG_PERF_USE_VMALLOC=y
88 103
89# 104#
90# Performance Counters 105# Kernel Performance Events And Counters
91# 106#
107# CONFIG_PERF_EVENTS is not set
108# CONFIG_PERF_COUNTERS is not set
92CONFIG_VM_EVENT_COUNTERS=y 109CONFIG_VM_EVENT_COUNTERS=y
93CONFIG_PCI_QUIRKS=y 110CONFIG_PCI_QUIRKS=y
94# CONFIG_STRIP_ASM_SYMS is not set
95CONFIG_COMPAT_BRK=y 111CONFIG_COMPAT_BRK=y
96CONFIG_SLAB=y 112CONFIG_SLAB=y
97# CONFIG_SLUB is not set 113# CONFIG_SLUB is not set
98# CONFIG_SLOB is not set 114# CONFIG_SLOB is not set
99# CONFIG_PROFILING is not set 115# CONFIG_PROFILING is not set
100# CONFIG_MARKERS is not set
101CONFIG_HAVE_OPROFILE=y 116CONFIG_HAVE_OPROFILE=y
102CONFIG_HAVE_IOREMAP_PROT=y 117CONFIG_HAVE_IOREMAP_PROT=y
103CONFIG_HAVE_ARCH_TRACEHOOK=y 118CONFIG_HAVE_ARCH_TRACEHOOK=y
119CONFIG_HAVE_DMA_ATTRS=y
104CONFIG_HAVE_CLK=y 120CONFIG_HAVE_CLK=y
105CONFIG_HAVE_DMA_API_DEBUG=y 121CONFIG_HAVE_DMA_API_DEBUG=y
122
123#
124# GCOV-based kernel profiling
125#
126# CONFIG_GCOV_KERNEL is not set
106# CONFIG_SLOW_WORK is not set 127# CONFIG_SLOW_WORK is not set
107CONFIG_HAVE_GENERIC_DMA_COHERENT=y 128CONFIG_HAVE_GENERIC_DMA_COHERENT=y
108CONFIG_SLABINFO=y 129CONFIG_SLABINFO=y
@@ -115,7 +136,7 @@ CONFIG_MODULE_UNLOAD=y
115# CONFIG_MODVERSIONS is not set 136# CONFIG_MODVERSIONS is not set
116# CONFIG_MODULE_SRCVERSION_ALL is not set 137# CONFIG_MODULE_SRCVERSION_ALL is not set
117CONFIG_BLOCK=y 138CONFIG_BLOCK=y
118# CONFIG_LBD is not set 139CONFIG_LBDAF=y
119# CONFIG_BLK_DEV_BSG is not set 140# CONFIG_BLK_DEV_BSG is not set
120# CONFIG_BLK_DEV_INTEGRITY is not set 141# CONFIG_BLK_DEV_INTEGRITY is not set
121 142
@@ -123,14 +144,41 @@ CONFIG_BLOCK=y
123# IO Schedulers 144# IO Schedulers
124# 145#
125CONFIG_IOSCHED_NOOP=y 146CONFIG_IOSCHED_NOOP=y
126CONFIG_IOSCHED_AS=y
127CONFIG_IOSCHED_DEADLINE=y 147CONFIG_IOSCHED_DEADLINE=y
128CONFIG_IOSCHED_CFQ=y 148CONFIG_IOSCHED_CFQ=y
129# CONFIG_DEFAULT_AS is not set
130# CONFIG_DEFAULT_DEADLINE is not set 149# CONFIG_DEFAULT_DEADLINE is not set
131CONFIG_DEFAULT_CFQ=y 150CONFIG_DEFAULT_CFQ=y
132# CONFIG_DEFAULT_NOOP is not set 151# CONFIG_DEFAULT_NOOP is not set
133CONFIG_DEFAULT_IOSCHED="cfq" 152CONFIG_DEFAULT_IOSCHED="cfq"
153# CONFIG_INLINE_SPIN_TRYLOCK is not set
154# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
155# CONFIG_INLINE_SPIN_LOCK is not set
156# CONFIG_INLINE_SPIN_LOCK_BH is not set
157# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
158# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
159# CONFIG_INLINE_SPIN_UNLOCK is not set
160# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
161# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
162# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
163# CONFIG_INLINE_READ_TRYLOCK is not set
164# CONFIG_INLINE_READ_LOCK is not set
165# CONFIG_INLINE_READ_LOCK_BH is not set
166# CONFIG_INLINE_READ_LOCK_IRQ is not set
167# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
168# CONFIG_INLINE_READ_UNLOCK is not set
169# CONFIG_INLINE_READ_UNLOCK_BH is not set
170# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
171# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
172# CONFIG_INLINE_WRITE_TRYLOCK is not set
173# CONFIG_INLINE_WRITE_LOCK is not set
174# CONFIG_INLINE_WRITE_LOCK_BH is not set
175# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
176# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
177# CONFIG_INLINE_WRITE_UNLOCK is not set
178# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
179# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
180# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
181# CONFIG_MUTEX_SPIN_ON_OWNER is not set
134# CONFIG_FREEZER is not set 182# CONFIG_FREEZER is not set
135 183
136# 184#
@@ -178,8 +226,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
178# CONFIG_PHYS_ADDR_T_64BIT is not set 226# CONFIG_PHYS_ADDR_T_64BIT is not set
179CONFIG_ZONE_DMA_FLAG=0 227CONFIG_ZONE_DMA_FLAG=0
180CONFIG_NR_QUICK=2 228CONFIG_NR_QUICK=2
181CONFIG_HAVE_MLOCK=y 229# CONFIG_KSM is not set
182CONFIG_HAVE_MLOCKED_PAGE_BIT=y
183CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 230CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
184 231
185# 232#
@@ -255,13 +302,13 @@ CONFIG_PREEMPT=y
255CONFIG_ZERO_PAGE_OFFSET=0x00001000 302CONFIG_ZERO_PAGE_OFFSET=0x00001000
256CONFIG_BOOT_LINK_OFFSET=0x00400000 303CONFIG_BOOT_LINK_OFFSET=0x00400000
257CONFIG_ENTRY_OFFSET=0x00001000 304CONFIG_ENTRY_OFFSET=0x00001000
258# CONFIG_CMDLINE_BOOL is not set 305# CONFIG_CMDLINE_OVERWRITE is not set
306# CONFIG_CMDLINE_EXTEND is not set
259 307
260# 308#
261# Bus options 309# Bus options
262# 310#
263CONFIG_PCI=y 311CONFIG_PCI=y
264CONFIG_SH_PCIDMA_NONCOHERENT=y
265# CONFIG_PCIEPORTBUS is not set 312# CONFIG_PCIEPORTBUS is not set
266# CONFIG_ARCH_SUPPORTS_MSI is not set 313# CONFIG_ARCH_SUPPORTS_MSI is not set
267CONFIG_PCI_LEGACY=y 314CONFIG_PCI_LEGACY=y
@@ -330,6 +377,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
330# CONFIG_NETFILTER is not set 377# CONFIG_NETFILTER is not set
331# CONFIG_IP_DCCP is not set 378# CONFIG_IP_DCCP is not set
332# CONFIG_IP_SCTP is not set 379# CONFIG_IP_SCTP is not set
380# CONFIG_RDS is not set
333# CONFIG_TIPC is not set 381# CONFIG_TIPC is not set
334# CONFIG_ATM is not set 382# CONFIG_ATM is not set
335# CONFIG_BRIDGE is not set 383# CONFIG_BRIDGE is not set
@@ -359,14 +407,11 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
359# CONFIG_AF_RXRPC is not set 407# CONFIG_AF_RXRPC is not set
360CONFIG_WIRELESS=y 408CONFIG_WIRELESS=y
361# CONFIG_CFG80211 is not set 409# CONFIG_CFG80211 is not set
362# CONFIG_WIRELESS_OLD_REGULATORY is not set
363# CONFIG_WIRELESS_EXT is not set
364# CONFIG_LIB80211 is not set 410# CONFIG_LIB80211 is not set
365 411
366# 412#
367# CFG80211 needs to be enabled for MAC80211 413# CFG80211 needs to be enabled for MAC80211
368# 414#
369CONFIG_MAC80211_DEFAULT_PS_VALUE=0
370# CONFIG_WIMAX is not set 415# CONFIG_WIMAX is not set
371# CONFIG_RFKILL is not set 416# CONFIG_RFKILL is not set
372# CONFIG_NET_9P is not set 417# CONFIG_NET_9P is not set
@@ -379,6 +424,7 @@ CONFIG_MAC80211_DEFAULT_PS_VALUE=0
379# Generic Driver Options 424# Generic Driver Options
380# 425#
381CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 426CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
427# CONFIG_DEVTMPFS is not set
382CONFIG_STANDALONE=y 428CONFIG_STANDALONE=y
383CONFIG_PREVENT_FIRMWARE_BUILD=y 429CONFIG_PREVENT_FIRMWARE_BUILD=y
384# CONFIG_FW_LOADER is not set 430# CONFIG_FW_LOADER is not set
@@ -395,6 +441,10 @@ CONFIG_BLK_DEV=y
395# CONFIG_BLK_DEV_COW_COMMON is not set 441# CONFIG_BLK_DEV_COW_COMMON is not set
396CONFIG_BLK_DEV_LOOP=y 442CONFIG_BLK_DEV_LOOP=y
397# CONFIG_BLK_DEV_CRYPTOLOOP is not set 443# CONFIG_BLK_DEV_CRYPTOLOOP is not set
444
445#
446# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
447#
398# CONFIG_BLK_DEV_NBD is not set 448# CONFIG_BLK_DEV_NBD is not set
399# CONFIG_BLK_DEV_SX8 is not set 449# CONFIG_BLK_DEV_SX8 is not set
400CONFIG_BLK_DEV_RAM=y 450CONFIG_BLK_DEV_RAM=y
@@ -405,6 +455,7 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
405# CONFIG_ATA_OVER_ETH is not set 455# CONFIG_ATA_OVER_ETH is not set
406# CONFIG_BLK_DEV_HD is not set 456# CONFIG_BLK_DEV_HD is not set
407CONFIG_MISC_DEVICES=y 457CONFIG_MISC_DEVICES=y
458# CONFIG_AD525X_DPOT is not set
408# CONFIG_PHANTOM is not set 459# CONFIG_PHANTOM is not set
409# CONFIG_SGI_IOC4 is not set 460# CONFIG_SGI_IOC4 is not set
410# CONFIG_TIFM_CORE is not set 461# CONFIG_TIFM_CORE is not set
@@ -412,6 +463,7 @@ CONFIG_MISC_DEVICES=y
412# CONFIG_ENCLOSURE_SERVICES is not set 463# CONFIG_ENCLOSURE_SERVICES is not set
413# CONFIG_HP_ILO is not set 464# CONFIG_HP_ILO is not set
414# CONFIG_ISL29003 is not set 465# CONFIG_ISL29003 is not set
466# CONFIG_DS1682 is not set
415# CONFIG_C2PORT is not set 467# CONFIG_C2PORT is not set
416 468
417# 469#
@@ -462,8 +514,11 @@ CONFIG_SCSI_LOWLEVEL=y
462# CONFIG_ISCSI_TCP is not set 514# CONFIG_ISCSI_TCP is not set
463# CONFIG_SCSI_CXGB3_ISCSI is not set 515# CONFIG_SCSI_CXGB3_ISCSI is not set
464# CONFIG_SCSI_BNX2_ISCSI is not set 516# CONFIG_SCSI_BNX2_ISCSI is not set
517# CONFIG_BE2ISCSI is not set
465# CONFIG_BLK_DEV_3W_XXXX_RAID is not set 518# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
519# CONFIG_SCSI_HPSA is not set
466# CONFIG_SCSI_3W_9XXX is not set 520# CONFIG_SCSI_3W_9XXX is not set
521# CONFIG_SCSI_3W_SAS is not set
467# CONFIG_SCSI_ACARD is not set 522# CONFIG_SCSI_ACARD is not set
468# CONFIG_SCSI_AACRAID is not set 523# CONFIG_SCSI_AACRAID is not set
469# CONFIG_SCSI_AIC7XXX is not set 524# CONFIG_SCSI_AIC7XXX is not set
@@ -495,7 +550,10 @@ CONFIG_SCSI_LOWLEVEL=y
495# CONFIG_SCSI_DC390T is not set 550# CONFIG_SCSI_DC390T is not set
496# CONFIG_SCSI_NSP32 is not set 551# CONFIG_SCSI_NSP32 is not set
497# CONFIG_SCSI_DEBUG is not set 552# CONFIG_SCSI_DEBUG is not set
553# CONFIG_SCSI_PMCRAID is not set
554# CONFIG_SCSI_PM8001 is not set
498# CONFIG_SCSI_SRP is not set 555# CONFIG_SCSI_SRP is not set
556# CONFIG_SCSI_BFA_FC is not set
499# CONFIG_SCSI_DH is not set 557# CONFIG_SCSI_DH is not set
500# CONFIG_SCSI_OSD_INITIATOR is not set 558# CONFIG_SCSI_OSD_INITIATOR is not set
501# CONFIG_ATA is not set 559# CONFIG_ATA is not set
@@ -507,7 +565,11 @@ CONFIG_SCSI_LOWLEVEL=y
507# 565#
508 566
509# 567#
510# Enable only one of the two stacks, unless you know what you are doing 568# You can enable one or both FireWire driver stacks.
569#
570
571#
572# See the help texts for more information.
511# 573#
512# CONFIG_FIREWIRE is not set 574# CONFIG_FIREWIRE is not set
513# CONFIG_IEEE1394 is not set 575# CONFIG_IEEE1394 is not set
@@ -546,6 +608,7 @@ CONFIG_NET_ETHERNET=y
546# CONFIG_NET_PCI is not set 608# CONFIG_NET_PCI is not set
547# CONFIG_B44 is not set 609# CONFIG_B44 is not set
548# CONFIG_KS8842 is not set 610# CONFIG_KS8842 is not set
611# CONFIG_KS8851_MLL is not set
549# CONFIG_ATL2 is not set 612# CONFIG_ATL2 is not set
550CONFIG_NETDEV_1000=y 613CONFIG_NETDEV_1000=y
551# CONFIG_ACENIC is not set 614# CONFIG_ACENIC is not set
@@ -565,6 +628,7 @@ CONFIG_NETDEV_1000=y
565# CONFIG_VIA_VELOCITY is not set 628# CONFIG_VIA_VELOCITY is not set
566# CONFIG_TIGON3 is not set 629# CONFIG_TIGON3 is not set
567# CONFIG_BNX2 is not set 630# CONFIG_BNX2 is not set
631# CONFIG_CNIC is not set
568# CONFIG_QLA3XXX is not set 632# CONFIG_QLA3XXX is not set
569# CONFIG_ATL1 is not set 633# CONFIG_ATL1 is not set
570# CONFIG_ATL1E is not set 634# CONFIG_ATL1E is not set
@@ -590,12 +654,10 @@ CONFIG_CHELSIO_T3_DEPENDS=y
590# CONFIG_SFC is not set 654# CONFIG_SFC is not set
591# CONFIG_BE2NET is not set 655# CONFIG_BE2NET is not set
592# CONFIG_TR is not set 656# CONFIG_TR is not set
593 657CONFIG_WLAN=y
594# 658# CONFIG_ATMEL is not set
595# Wireless LAN 659# CONFIG_PRISM54 is not set
596# 660# CONFIG_HOSTAP is not set
597# CONFIG_WLAN_PRE80211 is not set
598# CONFIG_WLAN_80211 is not set
599 661
600# 662#
601# Enable WiMAX (Networking options) to see the WiMAX drivers 663# Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -609,6 +671,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
609# CONFIG_NETCONSOLE is not set 671# CONFIG_NETCONSOLE is not set
610# CONFIG_NETPOLL is not set 672# CONFIG_NETPOLL is not set
611# CONFIG_NET_POLL_CONTROLLER is not set 673# CONFIG_NET_POLL_CONTROLLER is not set
674# CONFIG_VMXNET3 is not set
612# CONFIG_ISDN is not set 675# CONFIG_ISDN is not set
613# CONFIG_PHONE is not set 676# CONFIG_PHONE is not set
614 677
@@ -618,6 +681,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
618CONFIG_INPUT=y 681CONFIG_INPUT=y
619# CONFIG_INPUT_FF_MEMLESS is not set 682# CONFIG_INPUT_FF_MEMLESS is not set
620# CONFIG_INPUT_POLLDEV is not set 683# CONFIG_INPUT_POLLDEV is not set
684# CONFIG_INPUT_SPARSEKMAP is not set
621 685
622# 686#
623# Userland interfaces 687# Userland interfaces
@@ -682,6 +746,7 @@ CONFIG_HW_RANDOM=y
682CONFIG_DEVPORT=y 746CONFIG_DEVPORT=y
683CONFIG_I2C=m 747CONFIG_I2C=m
684CONFIG_I2C_BOARDINFO=y 748CONFIG_I2C_BOARDINFO=y
749CONFIG_I2C_COMPAT=y
685# CONFIG_I2C_CHARDEV is not set 750# CONFIG_I2C_CHARDEV is not set
686CONFIG_I2C_HELPER_AUTO=y 751CONFIG_I2C_HELPER_AUTO=y
687 752
@@ -710,6 +775,7 @@ CONFIG_I2C_HELPER_AUTO=y
710# 775#
711# I2C system bus drivers (mostly embedded / system-on-chip) 776# I2C system bus drivers (mostly embedded / system-on-chip)
712# 777#
778# CONFIG_I2C_DESIGNWARE is not set
713# CONFIG_I2C_OCORES is not set 779# CONFIG_I2C_OCORES is not set
714# CONFIG_I2C_SH_MOBILE is not set 780# CONFIG_I2C_SH_MOBILE is not set
715# CONFIG_I2C_SIMTEC is not set 781# CONFIG_I2C_SIMTEC is not set
@@ -721,11 +787,6 @@ CONFIG_I2C_HELPER_AUTO=y
721# CONFIG_I2C_TAOS_EVM is not set 787# CONFIG_I2C_TAOS_EVM is not set
722 788
723# 789#
724# Graphics adapter I2C/DDC channel drivers
725#
726# CONFIG_I2C_VOODOO3 is not set
727
728#
729# Other I2C/SMBus bus drivers 790# Other I2C/SMBus bus drivers
730# 791#
731# CONFIG_I2C_PCA_PLATFORM is not set 792# CONFIG_I2C_PCA_PLATFORM is not set
@@ -734,20 +795,26 @@ CONFIG_I2C_HELPER_AUTO=y
734# 795#
735# Miscellaneous I2C Chip support 796# Miscellaneous I2C Chip support
736# 797#
737# CONFIG_DS1682 is not set
738# CONFIG_SENSORS_PCF8574 is not set
739# CONFIG_PCF8575 is not set
740# CONFIG_SENSORS_PCA9539 is not set
741# CONFIG_SENSORS_TSL2550 is not set 798# CONFIG_SENSORS_TSL2550 is not set
742# CONFIG_I2C_DEBUG_CORE is not set 799# CONFIG_I2C_DEBUG_CORE is not set
743# CONFIG_I2C_DEBUG_ALGO is not set 800# CONFIG_I2C_DEBUG_ALGO is not set
744# CONFIG_I2C_DEBUG_BUS is not set 801# CONFIG_I2C_DEBUG_BUS is not set
745# CONFIG_I2C_DEBUG_CHIP is not set 802# CONFIG_I2C_DEBUG_CHIP is not set
746# CONFIG_SPI is not set 803# CONFIG_SPI is not set
804
805#
806# PPS support
807#
808# CONFIG_PPS is not set
747# CONFIG_W1 is not set 809# CONFIG_W1 is not set
748# CONFIG_POWER_SUPPLY is not set 810# CONFIG_POWER_SUPPLY is not set
749CONFIG_HWMON=y 811CONFIG_HWMON=y
750# CONFIG_HWMON_VID is not set 812# CONFIG_HWMON_VID is not set
813# CONFIG_HWMON_DEBUG_CHIP is not set
814
815#
816# Native drivers
817#
751# CONFIG_SENSORS_AD7414 is not set 818# CONFIG_SENSORS_AD7414 is not set
752# CONFIG_SENSORS_AD7418 is not set 819# CONFIG_SENSORS_AD7418 is not set
753# CONFIG_SENSORS_ADM1021 is not set 820# CONFIG_SENSORS_ADM1021 is not set
@@ -771,6 +838,7 @@ CONFIG_HWMON=y
771# CONFIG_SENSORS_GL520SM is not set 838# CONFIG_SENSORS_GL520SM is not set
772# CONFIG_SENSORS_IT87 is not set 839# CONFIG_SENSORS_IT87 is not set
773# CONFIG_SENSORS_LM63 is not set 840# CONFIG_SENSORS_LM63 is not set
841# CONFIG_SENSORS_LM73 is not set
774# CONFIG_SENSORS_LM75 is not set 842# CONFIG_SENSORS_LM75 is not set
775# CONFIG_SENSORS_LM77 is not set 843# CONFIG_SENSORS_LM77 is not set
776# CONFIG_SENSORS_LM78 is not set 844# CONFIG_SENSORS_LM78 is not set
@@ -797,6 +865,7 @@ CONFIG_HWMON=y
797# CONFIG_SENSORS_ADS7828 is not set 865# CONFIG_SENSORS_ADS7828 is not set
798# CONFIG_SENSORS_THMC50 is not set 866# CONFIG_SENSORS_THMC50 is not set
799# CONFIG_SENSORS_TMP401 is not set 867# CONFIG_SENSORS_TMP401 is not set
868# CONFIG_SENSORS_TMP421 is not set
800# CONFIG_SENSORS_VIA686A is not set 869# CONFIG_SENSORS_VIA686A is not set
801# CONFIG_SENSORS_VT1211 is not set 870# CONFIG_SENSORS_VT1211 is not set
802# CONFIG_SENSORS_VT8231 is not set 871# CONFIG_SENSORS_VT8231 is not set
@@ -808,9 +877,8 @@ CONFIG_HWMON=y
808# CONFIG_SENSORS_W83L786NG is not set 877# CONFIG_SENSORS_W83L786NG is not set
809# CONFIG_SENSORS_W83627HF is not set 878# CONFIG_SENSORS_W83627HF is not set
810# CONFIG_SENSORS_W83627EHF is not set 879# CONFIG_SENSORS_W83627EHF is not set
811# CONFIG_HWMON_DEBUG_CHIP is not set 880# CONFIG_SENSORS_LIS3_I2C is not set
812# CONFIG_THERMAL is not set 881# CONFIG_THERMAL is not set
813# CONFIG_THERMAL_HWMON is not set
814CONFIG_WATCHDOG=y 882CONFIG_WATCHDOG=y
815# CONFIG_WATCHDOG_NOWAYOUT is not set 883# CONFIG_WATCHDOG_NOWAYOUT is not set
816 884
@@ -837,17 +905,20 @@ CONFIG_SSB_POSSIBLE=y
837# 905#
838# CONFIG_MFD_CORE is not set 906# CONFIG_MFD_CORE is not set
839# CONFIG_MFD_SM501 is not set 907# CONFIG_MFD_SM501 is not set
908# CONFIG_MFD_SH_MOBILE_SDHI is not set
840# CONFIG_HTC_PASIC3 is not set 909# CONFIG_HTC_PASIC3 is not set
841# CONFIG_MFD_TMIO is not set 910# CONFIG_MFD_TMIO is not set
842# CONFIG_MFD_WM8400 is not set 911# CONFIG_MFD_WM8400 is not set
843# CONFIG_MFD_WM8350_I2C is not set 912# CONFIG_MFD_WM8350_I2C is not set
844# CONFIG_MFD_PCF50633 is not set 913# CONFIG_MFD_PCF50633 is not set
914# CONFIG_AB3100_CORE is not set
845# CONFIG_REGULATOR is not set 915# CONFIG_REGULATOR is not set
846# CONFIG_MEDIA_SUPPORT is not set 916# CONFIG_MEDIA_SUPPORT is not set
847 917
848# 918#
849# Graphics support 919# Graphics support
850# 920#
921CONFIG_VGA_ARB=y
851# CONFIG_DRM is not set 922# CONFIG_DRM is not set
852# CONFIG_VGASTATE is not set 923# CONFIG_VGASTATE is not set
853CONFIG_VIDEO_OUTPUT_CONTROL=y 924CONFIG_VIDEO_OUTPUT_CONTROL=y
@@ -939,7 +1010,6 @@ CONFIG_LOGO_SUPERH_CLUT224=y
939# CONFIG_SOUND is not set 1010# CONFIG_SOUND is not set
940CONFIG_HID_SUPPORT=y 1011CONFIG_HID_SUPPORT=y
941CONFIG_HID=y 1012CONFIG_HID=y
942# CONFIG_HID_DEBUG is not set
943# CONFIG_HIDRAW is not set 1013# CONFIG_HIDRAW is not set
944# CONFIG_HID_PID is not set 1014# CONFIG_HID_PID is not set
945 1015
@@ -1002,8 +1072,10 @@ CONFIG_FS_MBCACHE=y
1002# CONFIG_JFS_FS is not set 1072# CONFIG_JFS_FS is not set
1003# CONFIG_FS_POSIX_ACL is not set 1073# CONFIG_FS_POSIX_ACL is not set
1004# CONFIG_XFS_FS is not set 1074# CONFIG_XFS_FS is not set
1075# CONFIG_GFS2_FS is not set
1005# CONFIG_OCFS2_FS is not set 1076# CONFIG_OCFS2_FS is not set
1006# CONFIG_BTRFS_FS is not set 1077# CONFIG_BTRFS_FS is not set
1078# CONFIG_NILFS2_FS is not set
1007CONFIG_FILE_LOCKING=y 1079CONFIG_FILE_LOCKING=y
1008CONFIG_FSNOTIFY=y 1080CONFIG_FSNOTIFY=y
1009CONFIG_DNOTIFY=y 1081CONFIG_DNOTIFY=y
@@ -1067,7 +1139,6 @@ CONFIG_ROMFS_BACKED_BY_BLOCK=y
1067CONFIG_ROMFS_ON_BLOCK=y 1139CONFIG_ROMFS_ON_BLOCK=y
1068# CONFIG_SYSV_FS is not set 1140# CONFIG_SYSV_FS is not set
1069# CONFIG_UFS_FS is not set 1141# CONFIG_UFS_FS is not set
1070# CONFIG_NILFS2_FS is not set
1071CONFIG_NETWORK_FILESYSTEMS=y 1142CONFIG_NETWORK_FILESYSTEMS=y
1072CONFIG_NFS_FS=y 1143CONFIG_NFS_FS=y
1073CONFIG_NFS_V3=y 1144CONFIG_NFS_V3=y
@@ -1120,6 +1191,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
1120CONFIG_ENABLE_MUST_CHECK=y 1191CONFIG_ENABLE_MUST_CHECK=y
1121CONFIG_FRAME_WARN=1024 1192CONFIG_FRAME_WARN=1024
1122CONFIG_MAGIC_SYSRQ=y 1193CONFIG_MAGIC_SYSRQ=y
1194# CONFIG_STRIP_ASM_SYMS is not set
1123# CONFIG_UNUSED_SYMBOLS is not set 1195# CONFIG_UNUSED_SYMBOLS is not set
1124CONFIG_DEBUG_FS=y 1196CONFIG_DEBUG_FS=y
1125# CONFIG_HEADERS_CHECK is not set 1197# CONFIG_HEADERS_CHECK is not set
@@ -1155,21 +1227,25 @@ CONFIG_DEBUG_BUGVERBOSE=y
1155# CONFIG_DEBUG_LIST is not set 1227# CONFIG_DEBUG_LIST is not set
1156# CONFIG_DEBUG_SG is not set 1228# CONFIG_DEBUG_SG is not set
1157# CONFIG_DEBUG_NOTIFIERS is not set 1229# CONFIG_DEBUG_NOTIFIERS is not set
1230# CONFIG_DEBUG_CREDENTIALS is not set
1158CONFIG_FRAME_POINTER=y 1231CONFIG_FRAME_POINTER=y
1159# CONFIG_RCU_TORTURE_TEST is not set 1232# CONFIG_RCU_TORTURE_TEST is not set
1160# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1233# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1161# CONFIG_BACKTRACE_SELF_TEST is not set 1234# CONFIG_BACKTRACE_SELF_TEST is not set
1162# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set 1235# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1236# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
1163# CONFIG_FAULT_INJECTION is not set 1237# CONFIG_FAULT_INJECTION is not set
1164# CONFIG_LATENCYTOP is not set 1238# CONFIG_LATENCYTOP is not set
1165# CONFIG_SYSCTL_SYSCALL_CHECK is not set 1239# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1166# CONFIG_PAGE_POISONING is not set 1240# CONFIG_PAGE_POISONING is not set
1241CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
1167CONFIG_TRACING_SUPPORT=y 1242CONFIG_TRACING_SUPPORT=y
1168CONFIG_FTRACE=y 1243CONFIG_FTRACE=y
1169# CONFIG_IRQSOFF_TRACER is not set 1244# CONFIG_IRQSOFF_TRACER is not set
1170# CONFIG_PREEMPT_TRACER is not set 1245# CONFIG_PREEMPT_TRACER is not set
1171# CONFIG_SCHED_TRACER is not set 1246# CONFIG_SCHED_TRACER is not set
1172# CONFIG_ENABLE_DEFAULT_TRACERS is not set 1247# CONFIG_ENABLE_DEFAULT_TRACERS is not set
1248# CONFIG_FTRACE_SYSCALLS is not set
1173# CONFIG_BOOT_TRACER is not set 1249# CONFIG_BOOT_TRACER is not set
1174CONFIG_BRANCH_PROFILE_NONE=y 1250CONFIG_BRANCH_PROFILE_NONE=y
1175# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set 1251# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
@@ -1180,11 +1256,9 @@ CONFIG_BRANCH_PROFILE_NONE=y
1180# CONFIG_DYNAMIC_DEBUG is not set 1256# CONFIG_DYNAMIC_DEBUG is not set
1181# CONFIG_DMA_API_DEBUG is not set 1257# CONFIG_DMA_API_DEBUG is not set
1182# CONFIG_SAMPLES is not set 1258# CONFIG_SAMPLES is not set
1183# CONFIG_KMEMCHECK is not set
1184# CONFIG_EARLY_SCIF_CONSOLE is not set
1185# CONFIG_DEBUG_BOOTMEM is not set
1186# CONFIG_DEBUG_STACK_USAGE is not set 1259# CONFIG_DEBUG_STACK_USAGE is not set
1187# CONFIG_4KSTACKS is not set 1260# CONFIG_4KSTACKS is not set
1261# CONFIG_DWARF_UNWINDER is not set
1188# CONFIG_SH_NO_BSS_INIT is not set 1262# CONFIG_SH_NO_BSS_INIT is not set
1189CONFIG_SH64_SR_WATCH=y 1263CONFIG_SH64_SR_WATCH=y
1190 1264
@@ -1194,13 +1268,16 @@ CONFIG_SH64_SR_WATCH=y
1194# CONFIG_KEYS is not set 1268# CONFIG_KEYS is not set
1195# CONFIG_SECURITY is not set 1269# CONFIG_SECURITY is not set
1196# CONFIG_SECURITYFS is not set 1270# CONFIG_SECURITYFS is not set
1197# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1271# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1272# CONFIG_DEFAULT_SECURITY_SMACK is not set
1273# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1274CONFIG_DEFAULT_SECURITY_DAC=y
1275CONFIG_DEFAULT_SECURITY=""
1198CONFIG_CRYPTO=y 1276CONFIG_CRYPTO=y
1199 1277
1200# 1278#
1201# Crypto core or helper 1279# Crypto core or helper
1202# 1280#
1203# CONFIG_CRYPTO_FIPS is not set
1204# CONFIG_CRYPTO_MANAGER is not set 1281# CONFIG_CRYPTO_MANAGER is not set
1205# CONFIG_CRYPTO_MANAGER2 is not set 1282# CONFIG_CRYPTO_MANAGER2 is not set
1206# CONFIG_CRYPTO_GF128MUL is not set 1283# CONFIG_CRYPTO_GF128MUL is not set
@@ -1232,11 +1309,13 @@ CONFIG_CRYPTO=y
1232# 1309#
1233# CONFIG_CRYPTO_HMAC is not set 1310# CONFIG_CRYPTO_HMAC is not set
1234# CONFIG_CRYPTO_XCBC is not set 1311# CONFIG_CRYPTO_XCBC is not set
1312# CONFIG_CRYPTO_VMAC is not set
1235 1313
1236# 1314#
1237# Digest 1315# Digest
1238# 1316#
1239# CONFIG_CRYPTO_CRC32C is not set 1317# CONFIG_CRYPTO_CRC32C is not set
1318# CONFIG_CRYPTO_GHASH is not set
1240# CONFIG_CRYPTO_MD4 is not set 1319# CONFIG_CRYPTO_MD4 is not set
1241# CONFIG_CRYPTO_MD5 is not set 1320# CONFIG_CRYPTO_MD5 is not set
1242# CONFIG_CRYPTO_MICHAEL_MIC is not set 1321# CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1299,5 +1378,6 @@ CONFIG_CRC32=y
1299CONFIG_HAS_IOMEM=y 1378CONFIG_HAS_IOMEM=y
1300CONFIG_HAS_IOPORT=y 1379CONFIG_HAS_IOPORT=y
1301CONFIG_HAS_DMA=y 1380CONFIG_HAS_DMA=y
1381CONFIG_HAVE_LMB=y
1302CONFIG_NLATTR=y 1382CONFIG_NLATTR=y
1303CONFIG_GENERIC_ATOMIC64=y 1383CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/dreamcast_defconfig b/arch/sh/configs/dreamcast_defconfig
index aedbd4f13046..55f652be954b 100644
--- a/arch/sh/configs/dreamcast_defconfig
+++ b/arch/sh/configs/dreamcast_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Thu Sep 24 17:56:07 2009 4# Mon Jan 4 11:17:35 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -21,6 +21,7 @@ CONFIG_GENERIC_CLOCKEVENTS=y
21CONFIG_GENERIC_CMOS_UPDATE=y 21CONFIG_GENERIC_CMOS_UPDATE=y
22# CONFIG_ARCH_SUSPEND_POSSIBLE is not set 22# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
23CONFIG_ARCH_HIBERNATION_POSSIBLE=y 23CONFIG_ARCH_HIBERNATION_POSSIBLE=y
24CONFIG_SYS_SUPPORTS_HUGETLBFS=y
24CONFIG_SYS_SUPPORTS_PCI=y 25CONFIG_SYS_SUPPORTS_PCI=y
25CONFIG_SYS_SUPPORTS_TMU=y 26CONFIG_SYS_SUPPORTS_TMU=y
26CONFIG_STACKTRACE_SUPPORT=y 27CONFIG_STACKTRACE_SUPPORT=y
@@ -31,6 +32,7 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
31CONFIG_ARCH_NO_VIRT_TO_BUS=y 32CONFIG_ARCH_NO_VIRT_TO_BUS=y
32CONFIG_ARCH_HAS_DEFAULT_IDLE=y 33CONFIG_ARCH_HAS_DEFAULT_IDLE=y
33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 34CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
35CONFIG_DMA_NONCOHERENT=y
34CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 36CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
35CONFIG_CONSTRUCTORS=y 37CONFIG_CONSTRUCTORS=y
36 38
@@ -63,6 +65,7 @@ CONFIG_BSD_PROCESS_ACCT=y
63# 65#
64CONFIG_TREE_RCU=y 66CONFIG_TREE_RCU=y
65# CONFIG_TREE_PREEMPT_RCU is not set 67# CONFIG_TREE_PREEMPT_RCU is not set
68# CONFIG_TINY_RCU is not set
66# CONFIG_RCU_TRACE is not set 69# CONFIG_RCU_TRACE is not set
67CONFIG_RCU_FANOUT=32 70CONFIG_RCU_FANOUT=32
68# CONFIG_RCU_FANOUT_EXACT is not set 71# CONFIG_RCU_FANOUT_EXACT is not set
@@ -97,6 +100,7 @@ CONFIG_EVENTFD=y
97CONFIG_SHMEM=y 100CONFIG_SHMEM=y
98CONFIG_AIO=y 101CONFIG_AIO=y
99CONFIG_HAVE_PERF_EVENTS=y 102CONFIG_HAVE_PERF_EVENTS=y
103CONFIG_PERF_USE_VMALLOC=y
100 104
101# 105#
102# Kernel Performance Events And Counters 106# Kernel Performance Events And Counters
@@ -117,6 +121,7 @@ CONFIG_HAVE_IOREMAP_PROT=y
117CONFIG_HAVE_KPROBES=y 121CONFIG_HAVE_KPROBES=y
118CONFIG_HAVE_KRETPROBES=y 122CONFIG_HAVE_KRETPROBES=y
119CONFIG_HAVE_ARCH_TRACEHOOK=y 123CONFIG_HAVE_ARCH_TRACEHOOK=y
124CONFIG_HAVE_DMA_ATTRS=y
120CONFIG_HAVE_CLK=y 125CONFIG_HAVE_CLK=y
121CONFIG_HAVE_DMA_API_DEBUG=y 126CONFIG_HAVE_DMA_API_DEBUG=y
122 127
@@ -143,14 +148,41 @@ CONFIG_LBDAF=y
143# IO Schedulers 148# IO Schedulers
144# 149#
145CONFIG_IOSCHED_NOOP=y 150CONFIG_IOSCHED_NOOP=y
146CONFIG_IOSCHED_AS=y
147CONFIG_IOSCHED_DEADLINE=y 151CONFIG_IOSCHED_DEADLINE=y
148CONFIG_IOSCHED_CFQ=y 152CONFIG_IOSCHED_CFQ=y
149CONFIG_DEFAULT_AS=y
150# CONFIG_DEFAULT_DEADLINE is not set 153# CONFIG_DEFAULT_DEADLINE is not set
151# CONFIG_DEFAULT_CFQ is not set 154CONFIG_DEFAULT_CFQ=y
152# CONFIG_DEFAULT_NOOP is not set 155# CONFIG_DEFAULT_NOOP is not set
153CONFIG_DEFAULT_IOSCHED="anticipatory" 156CONFIG_DEFAULT_IOSCHED="cfq"
157# CONFIG_INLINE_SPIN_TRYLOCK is not set
158# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
159# CONFIG_INLINE_SPIN_LOCK is not set
160# CONFIG_INLINE_SPIN_LOCK_BH is not set
161# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
162# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
163# CONFIG_INLINE_SPIN_UNLOCK is not set
164# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
165# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
166# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
167# CONFIG_INLINE_READ_TRYLOCK is not set
168# CONFIG_INLINE_READ_LOCK is not set
169# CONFIG_INLINE_READ_LOCK_BH is not set
170# CONFIG_INLINE_READ_LOCK_IRQ is not set
171# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
172# CONFIG_INLINE_READ_UNLOCK is not set
173# CONFIG_INLINE_READ_UNLOCK_BH is not set
174# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
175# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
176# CONFIG_INLINE_WRITE_TRYLOCK is not set
177# CONFIG_INLINE_WRITE_LOCK is not set
178# CONFIG_INLINE_WRITE_LOCK_BH is not set
179# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
180# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
181# CONFIG_INLINE_WRITE_UNLOCK is not set
182# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
183# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
184# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
185# CONFIG_MUTEX_SPIN_ON_OWNER is not set
154# CONFIG_FREEZER is not set 186# CONFIG_FREEZER is not set
155 187
156# 188#
@@ -232,8 +264,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
232# CONFIG_PHYS_ADDR_T_64BIT is not set 264# CONFIG_PHYS_ADDR_T_64BIT is not set
233CONFIG_ZONE_DMA_FLAG=0 265CONFIG_ZONE_DMA_FLAG=0
234CONFIG_NR_QUICK=2 266CONFIG_NR_QUICK=2
235CONFIG_HAVE_MLOCK=y
236CONFIG_HAVE_MLOCKED_PAGE_BIT=y
237# CONFIG_KSM is not set 267# CONFIG_KSM is not set
238CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 268CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
239 269
@@ -294,9 +324,9 @@ CONFIG_CPU_FREQ_GOV_USERSPACE=y
294# 324#
295# DMA support 325# DMA support
296# 326#
297CONFIG_SH_DMA_API=y
298CONFIG_SH_DMA=y 327CONFIG_SH_DMA=y
299CONFIG_SH_DMA_IRQ_MULTI=y 328CONFIG_SH_DMA_IRQ_MULTI=y
329CONFIG_SH_DMA_API=y
300CONFIG_NR_ONCHIP_DMA_CHANNELS=4 330CONFIG_NR_ONCHIP_DMA_CHANNELS=4
301CONFIG_NR_DMA_CHANNELS_BOOL=y 331CONFIG_NR_DMA_CHANNELS_BOOL=y
302CONFIG_NR_DMA_CHANNELS=9 332CONFIG_NR_DMA_CHANNELS=9
@@ -338,7 +368,6 @@ CONFIG_GUSA=y
338CONFIG_ZERO_PAGE_OFFSET=0x00001000 368CONFIG_ZERO_PAGE_OFFSET=0x00001000
339CONFIG_BOOT_LINK_OFFSET=0x00800000 369CONFIG_BOOT_LINK_OFFSET=0x00800000
340CONFIG_ENTRY_OFFSET=0x00001000 370CONFIG_ENTRY_OFFSET=0x00001000
341# CONFIG_UBC_WAKEUP is not set
342CONFIG_CMDLINE_OVERWRITE=y 371CONFIG_CMDLINE_OVERWRITE=y
343# CONFIG_CMDLINE_EXTEND is not set 372# CONFIG_CMDLINE_EXTEND is not set
344CONFIG_CMDLINE="console=ttySC1,115200 panic=3" 373CONFIG_CMDLINE="console=ttySC1,115200 panic=3"
@@ -348,7 +377,6 @@ CONFIG_CMDLINE="console=ttySC1,115200 panic=3"
348# 377#
349CONFIG_MAPLE=y 378CONFIG_MAPLE=y
350CONFIG_PCI=y 379CONFIG_PCI=y
351CONFIG_SH_PCIDMA_NONCOHERENT=y
352# CONFIG_PCIEPORTBUS is not set 380# CONFIG_PCIEPORTBUS is not set
353# CONFIG_ARCH_SUPPORTS_MSI is not set 381# CONFIG_ARCH_SUPPORTS_MSI is not set
354CONFIG_PCI_LEGACY=y 382CONFIG_PCI_LEGACY=y
@@ -443,9 +471,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
443# CONFIG_AF_RXRPC is not set 471# CONFIG_AF_RXRPC is not set
444CONFIG_WIRELESS=y 472CONFIG_WIRELESS=y
445# CONFIG_CFG80211 is not set 473# CONFIG_CFG80211 is not set
446CONFIG_CFG80211_DEFAULT_PS_VALUE=0
447# CONFIG_WIRELESS_OLD_REGULATORY is not set
448# CONFIG_WIRELESS_EXT is not set
449# CONFIG_LIB80211 is not set 474# CONFIG_LIB80211 is not set
450 475
451# 476#
@@ -478,6 +503,10 @@ CONFIG_GDROM=y
478# CONFIG_BLK_DEV_UMEM is not set 503# CONFIG_BLK_DEV_UMEM is not set
479# CONFIG_BLK_DEV_COW_COMMON is not set 504# CONFIG_BLK_DEV_COW_COMMON is not set
480# CONFIG_BLK_DEV_LOOP is not set 505# CONFIG_BLK_DEV_LOOP is not set
506
507#
508# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
509#
481# CONFIG_BLK_DEV_NBD is not set 510# CONFIG_BLK_DEV_NBD is not set
482# CONFIG_BLK_DEV_SX8 is not set 511# CONFIG_BLK_DEV_SX8 is not set
483# CONFIG_BLK_DEV_RAM is not set 512# CONFIG_BLK_DEV_RAM is not set
@@ -579,6 +608,7 @@ CONFIG_8139TOO=y
579# CONFIG_SUNDANCE is not set 608# CONFIG_SUNDANCE is not set
580# CONFIG_TLAN is not set 609# CONFIG_TLAN is not set
581# CONFIG_KS8842 is not set 610# CONFIG_KS8842 is not set
611# CONFIG_KS8851_MLL is not set
582# CONFIG_VIA_RHINE is not set 612# CONFIG_VIA_RHINE is not set
583# CONFIG_SC92031 is not set 613# CONFIG_SC92031 is not set
584# CONFIG_ATL2 is not set 614# CONFIG_ATL2 is not set
@@ -586,8 +616,9 @@ CONFIG_8139TOO=y
586# CONFIG_NETDEV_10000 is not set 616# CONFIG_NETDEV_10000 is not set
587# CONFIG_TR is not set 617# CONFIG_TR is not set
588CONFIG_WLAN=y 618CONFIG_WLAN=y
589# CONFIG_WLAN_PRE80211 is not set 619# CONFIG_ATMEL is not set
590# CONFIG_WLAN_80211 is not set 620# CONFIG_PRISM54 is not set
621# CONFIG_HOSTAP is not set
591 622
592# 623#
593# Enable WiMAX (Networking options) to see the WiMAX drivers 624# Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -600,6 +631,7 @@ CONFIG_WLAN=y
600# CONFIG_NETCONSOLE is not set 631# CONFIG_NETCONSOLE is not set
601# CONFIG_NETPOLL is not set 632# CONFIG_NETPOLL is not set
602# CONFIG_NET_POLL_CONTROLLER is not set 633# CONFIG_NET_POLL_CONTROLLER is not set
634# CONFIG_VMXNET3 is not set
603# CONFIG_ISDN is not set 635# CONFIG_ISDN is not set
604# CONFIG_PHONE is not set 636# CONFIG_PHONE is not set
605 637
@@ -609,6 +641,7 @@ CONFIG_WLAN=y
609CONFIG_INPUT=y 641CONFIG_INPUT=y
610# CONFIG_INPUT_FF_MEMLESS is not set 642# CONFIG_INPUT_FF_MEMLESS is not set
611# CONFIG_INPUT_POLLDEV is not set 643# CONFIG_INPUT_POLLDEV is not set
644# CONFIG_INPUT_SPARSEKMAP is not set
612 645
613# 646#
614# Userland interfaces 647# Userland interfaces
@@ -655,6 +688,7 @@ CONFIG_SERIO=y
655# CONFIG_SERIO_PCIPS2 is not set 688# CONFIG_SERIO_PCIPS2 is not set
656CONFIG_SERIO_LIBPS2=y 689CONFIG_SERIO_LIBPS2=y
657# CONFIG_SERIO_RAW is not set 690# CONFIG_SERIO_RAW is not set
691# CONFIG_SERIO_ALTERA_PS2 is not set
658# CONFIG_GAMEPORT is not set 692# CONFIG_GAMEPORT is not set
659 693
660# 694#
@@ -734,6 +768,7 @@ CONFIG_SSB_POSSIBLE=y
734# 768#
735# CONFIG_MFD_CORE is not set 769# CONFIG_MFD_CORE is not set
736# CONFIG_MFD_SM501 is not set 770# CONFIG_MFD_SM501 is not set
771# CONFIG_MFD_SH_MOBILE_SDHI is not set
737# CONFIG_HTC_PASIC3 is not set 772# CONFIG_HTC_PASIC3 is not set
738# CONFIG_MFD_TMIO is not set 773# CONFIG_MFD_TMIO is not set
739# CONFIG_REGULATOR is not set 774# CONFIG_REGULATOR is not set
@@ -883,6 +918,7 @@ CONFIG_RTC_LIB=y
883# CONFIG_EXT2_FS is not set 918# CONFIG_EXT2_FS is not set
884# CONFIG_EXT3_FS is not set 919# CONFIG_EXT3_FS is not set
885# CONFIG_EXT4_FS is not set 920# CONFIG_EXT4_FS is not set
921CONFIG_EXT4_USE_FOR_EXT23=y
886# CONFIG_REISERFS_FS is not set 922# CONFIG_REISERFS_FS is not set
887# CONFIG_JFS_FS is not set 923# CONFIG_JFS_FS is not set
888# CONFIG_FS_POSIX_ACL is not set 924# CONFIG_FS_POSIX_ACL is not set
@@ -981,10 +1017,11 @@ CONFIG_FRAME_WARN=1024
981# CONFIG_DEBUG_FS is not set 1017# CONFIG_DEBUG_FS is not set
982# CONFIG_HEADERS_CHECK is not set 1018# CONFIG_HEADERS_CHECK is not set
983# CONFIG_DEBUG_KERNEL is not set 1019# CONFIG_DEBUG_KERNEL is not set
984# CONFIG_DEBUG_BUGVERBOSE is not set 1020CONFIG_DEBUG_BUGVERBOSE=y
985# CONFIG_DEBUG_MEMORY_INIT is not set 1021# CONFIG_DEBUG_MEMORY_INIT is not set
986# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1022# CONFIG_RCU_CPU_STALL_DETECTOR is not set
987# CONFIG_LATENCYTOP is not set 1023# CONFIG_LATENCYTOP is not set
1024# CONFIG_SYSCTL_SYSCALL_CHECK is not set
988CONFIG_HAVE_FUNCTION_TRACER=y 1025CONFIG_HAVE_FUNCTION_TRACER=y
989CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 1026CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
990CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y 1027CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
@@ -997,7 +1034,6 @@ CONFIG_TRACING_SUPPORT=y
997# CONFIG_SAMPLES is not set 1034# CONFIG_SAMPLES is not set
998CONFIG_HAVE_ARCH_KGDB=y 1035CONFIG_HAVE_ARCH_KGDB=y
999# CONFIG_SH_STANDARD_BIOS is not set 1036# CONFIG_SH_STANDARD_BIOS is not set
1000# CONFIG_EARLY_SCIF_CONSOLE is not set
1001# CONFIG_DWARF_UNWINDER is not set 1037# CONFIG_DWARF_UNWINDER is not set
1002 1038
1003# 1039#
@@ -1006,7 +1042,11 @@ CONFIG_HAVE_ARCH_KGDB=y
1006# CONFIG_KEYS is not set 1042# CONFIG_KEYS is not set
1007# CONFIG_SECURITY is not set 1043# CONFIG_SECURITY is not set
1008# CONFIG_SECURITYFS is not set 1044# CONFIG_SECURITYFS is not set
1009# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1045# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1046# CONFIG_DEFAULT_SECURITY_SMACK is not set
1047# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1048CONFIG_DEFAULT_SECURITY_DAC=y
1049CONFIG_DEFAULT_SECURITY=""
1010CONFIG_CRYPTO=y 1050CONFIG_CRYPTO=y
1011 1051
1012# 1052#
diff --git a/arch/sh/configs/ecovec24-romimage_defconfig b/arch/sh/configs/ecovec24-romimage_defconfig
index 0774924623cc..662c1ad20494 100644
--- a/arch/sh/configs/ecovec24-romimage_defconfig
+++ b/arch/sh/configs/ecovec24-romimage_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Thu Sep 24 17:56:41 2009 4# Mon Jan 4 11:18:17 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -20,6 +20,7 @@ CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
21CONFIG_ARCH_SUSPEND_POSSIBLE=y 21CONFIG_ARCH_SUSPEND_POSSIBLE=y
22CONFIG_ARCH_HIBERNATION_POSSIBLE=y 22CONFIG_ARCH_HIBERNATION_POSSIBLE=y
23CONFIG_SYS_SUPPORTS_HUGETLBFS=y
23CONFIG_SYS_SUPPORTS_CMT=y 24CONFIG_SYS_SUPPORTS_CMT=y
24CONFIG_SYS_SUPPORTS_TMU=y 25CONFIG_SYS_SUPPORTS_TMU=y
25CONFIG_STACKTRACE_SUPPORT=y 26CONFIG_STACKTRACE_SUPPORT=y
@@ -30,6 +31,7 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
30CONFIG_ARCH_NO_VIRT_TO_BUS=y 31CONFIG_ARCH_NO_VIRT_TO_BUS=y
31CONFIG_ARCH_HAS_DEFAULT_IDLE=y 32CONFIG_ARCH_HAS_DEFAULT_IDLE=y
32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
34CONFIG_DMA_NONCOHERENT=y
33CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
34CONFIG_CONSTRUCTORS=y 36CONFIG_CONSTRUCTORS=y
35 37
@@ -61,6 +63,7 @@ CONFIG_BSD_PROCESS_ACCT=y
61# 63#
62CONFIG_TREE_RCU=y 64CONFIG_TREE_RCU=y
63# CONFIG_TREE_PREEMPT_RCU is not set 65# CONFIG_TREE_PREEMPT_RCU is not set
66# CONFIG_TINY_RCU is not set
64# CONFIG_RCU_TRACE is not set 67# CONFIG_RCU_TRACE is not set
65CONFIG_RCU_FANOUT=32 68CONFIG_RCU_FANOUT=32
66# CONFIG_RCU_FANOUT_EXACT is not set 69# CONFIG_RCU_FANOUT_EXACT is not set
@@ -103,6 +106,7 @@ CONFIG_EVENTFD=y
103CONFIG_SHMEM=y 106CONFIG_SHMEM=y
104CONFIG_AIO=y 107CONFIG_AIO=y
105CONFIG_HAVE_PERF_EVENTS=y 108CONFIG_HAVE_PERF_EVENTS=y
109CONFIG_PERF_USE_VMALLOC=y
106 110
107# 111#
108# Kernel Performance Events And Counters 112# Kernel Performance Events And Counters
@@ -120,6 +124,7 @@ CONFIG_HAVE_IOREMAP_PROT=y
120CONFIG_HAVE_KPROBES=y 124CONFIG_HAVE_KPROBES=y
121CONFIG_HAVE_KRETPROBES=y 125CONFIG_HAVE_KRETPROBES=y
122CONFIG_HAVE_ARCH_TRACEHOOK=y 126CONFIG_HAVE_ARCH_TRACEHOOK=y
127CONFIG_HAVE_DMA_ATTRS=y
123CONFIG_HAVE_CLK=y 128CONFIG_HAVE_CLK=y
124CONFIG_HAVE_DMA_API_DEBUG=y 129CONFIG_HAVE_DMA_API_DEBUG=y
125 130
@@ -142,14 +147,41 @@ CONFIG_BLOCK=y
142# IO Schedulers 147# IO Schedulers
143# 148#
144CONFIG_IOSCHED_NOOP=y 149CONFIG_IOSCHED_NOOP=y
145CONFIG_IOSCHED_AS=y
146CONFIG_IOSCHED_DEADLINE=y 150CONFIG_IOSCHED_DEADLINE=y
147CONFIG_IOSCHED_CFQ=y 151CONFIG_IOSCHED_CFQ=y
148# CONFIG_DEFAULT_AS is not set
149# CONFIG_DEFAULT_DEADLINE is not set 152# CONFIG_DEFAULT_DEADLINE is not set
150CONFIG_DEFAULT_CFQ=y 153CONFIG_DEFAULT_CFQ=y
151# CONFIG_DEFAULT_NOOP is not set 154# CONFIG_DEFAULT_NOOP is not set
152CONFIG_DEFAULT_IOSCHED="cfq" 155CONFIG_DEFAULT_IOSCHED="cfq"
156# CONFIG_INLINE_SPIN_TRYLOCK is not set
157# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
158# CONFIG_INLINE_SPIN_LOCK is not set
159# CONFIG_INLINE_SPIN_LOCK_BH is not set
160# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
161# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
162CONFIG_INLINE_SPIN_UNLOCK=y
163# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
164CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
165# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
166# CONFIG_INLINE_READ_TRYLOCK is not set
167# CONFIG_INLINE_READ_LOCK is not set
168# CONFIG_INLINE_READ_LOCK_BH is not set
169# CONFIG_INLINE_READ_LOCK_IRQ is not set
170# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
171CONFIG_INLINE_READ_UNLOCK=y
172# CONFIG_INLINE_READ_UNLOCK_BH is not set
173CONFIG_INLINE_READ_UNLOCK_IRQ=y
174# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
175# CONFIG_INLINE_WRITE_TRYLOCK is not set
176# CONFIG_INLINE_WRITE_LOCK is not set
177# CONFIG_INLINE_WRITE_LOCK_BH is not set
178# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
179# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
180CONFIG_INLINE_WRITE_UNLOCK=y
181# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
182CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
183# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
184# CONFIG_MUTEX_SPIN_ON_OWNER is not set
153# CONFIG_FREEZER is not set 185# CONFIG_FREEZER is not set
154 186
155# 187#
@@ -203,8 +235,9 @@ CONFIG_MMU=y
203CONFIG_PAGE_OFFSET=0x80000000 235CONFIG_PAGE_OFFSET=0x80000000
204CONFIG_FORCE_MAX_ZONEORDER=11 236CONFIG_FORCE_MAX_ZONEORDER=11
205CONFIG_MEMORY_START=0x08000000 237CONFIG_MEMORY_START=0x08000000
206CONFIG_MEMORY_SIZE=0x08000000 238CONFIG_MEMORY_SIZE=0x10000000
207CONFIG_29BIT=y 239CONFIG_29BIT=y
240# CONFIG_PMB_ENABLE is not set
208# CONFIG_X2TLB is not set 241# CONFIG_X2TLB is not set
209CONFIG_VSYSCALL=y 242CONFIG_VSYSCALL=y
210CONFIG_ARCH_FLATMEM_ENABLE=y 243CONFIG_ARCH_FLATMEM_ENABLE=y
@@ -229,8 +262,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
229# CONFIG_PHYS_ADDR_T_64BIT is not set 262# CONFIG_PHYS_ADDR_T_64BIT is not set
230CONFIG_ZONE_DMA_FLAG=0 263CONFIG_ZONE_DMA_FLAG=0
231CONFIG_NR_QUICK=2 264CONFIG_NR_QUICK=2
232CONFIG_HAVE_MLOCK=y
233CONFIG_HAVE_MLOCKED_PAGE_BIT=y
234# CONFIG_KSM is not set 265# CONFIG_KSM is not set
235CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 266CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
236 267
@@ -264,7 +295,6 @@ CONFIG_SH_ECOVEC=y
264# 295#
265# CONFIG_SH_TIMER_TMU is not set 296# CONFIG_SH_TIMER_TMU is not set
266CONFIG_SH_TIMER_CMT=y 297CONFIG_SH_TIMER_CMT=y
267CONFIG_SH_PCLK_FREQ=33333333
268CONFIG_SH_CLK_CPG=y 298CONFIG_SH_CLK_CPG=y
269# CONFIG_NO_HZ is not set 299# CONFIG_NO_HZ is not set
270# CONFIG_HIGH_RES_TIMERS is not set 300# CONFIG_HIGH_RES_TIMERS is not set
@@ -406,7 +436,13 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
406# CONFIG_IRDA is not set 436# CONFIG_IRDA is not set
407# CONFIG_BT is not set 437# CONFIG_BT is not set
408# CONFIG_AF_RXRPC is not set 438# CONFIG_AF_RXRPC is not set
409# CONFIG_WIRELESS is not set 439CONFIG_WIRELESS=y
440# CONFIG_CFG80211 is not set
441# CONFIG_LIB80211 is not set
442
443#
444# CFG80211 needs to be enabled for MAC80211
445#
410# CONFIG_WIMAX is not set 446# CONFIG_WIMAX is not set
411# CONFIG_RFKILL is not set 447# CONFIG_RFKILL is not set
412# CONFIG_NET_9P is not set 448# CONFIG_NET_9P is not set
@@ -432,6 +468,10 @@ CONFIG_EXTRA_FIRMWARE=""
432CONFIG_BLK_DEV=y 468CONFIG_BLK_DEV=y
433# CONFIG_BLK_DEV_COW_COMMON is not set 469# CONFIG_BLK_DEV_COW_COMMON is not set
434# CONFIG_BLK_DEV_LOOP is not set 470# CONFIG_BLK_DEV_LOOP is not set
471
472#
473# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
474#
435# CONFIG_BLK_DEV_NBD is not set 475# CONFIG_BLK_DEV_NBD is not set
436# CONFIG_BLK_DEV_UB is not set 476# CONFIG_BLK_DEV_UB is not set
437# CONFIG_BLK_DEV_RAM is not set 477# CONFIG_BLK_DEV_RAM is not set
@@ -526,11 +566,12 @@ CONFIG_SH_ETH=y
526# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set 566# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
527# CONFIG_B44 is not set 567# CONFIG_B44 is not set
528# CONFIG_KS8842 is not set 568# CONFIG_KS8842 is not set
569# CONFIG_KS8851_MLL is not set
529# CONFIG_NETDEV_1000 is not set 570# CONFIG_NETDEV_1000 is not set
530# CONFIG_NETDEV_10000 is not set 571# CONFIG_NETDEV_10000 is not set
531CONFIG_WLAN=y 572CONFIG_WLAN=y
532# CONFIG_WLAN_PRE80211 is not set 573# CONFIG_USB_ZD1201 is not set
533# CONFIG_WLAN_80211 is not set 574# CONFIG_HOSTAP is not set
534 575
535# 576#
536# Enable WiMAX (Networking options) to see the WiMAX drivers 577# Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -559,6 +600,7 @@ CONFIG_WLAN=y
559CONFIG_INPUT=y 600CONFIG_INPUT=y
560# CONFIG_INPUT_FF_MEMLESS is not set 601# CONFIG_INPUT_FF_MEMLESS is not set
561# CONFIG_INPUT_POLLDEV is not set 602# CONFIG_INPUT_POLLDEV is not set
603# CONFIG_INPUT_SPARSEKMAP is not set
562 604
563# 605#
564# Userland interfaces 606# Userland interfaces
@@ -652,7 +694,6 @@ CONFIG_I2C_SH_MOBILE=y
652# 694#
653# Miscellaneous I2C Chip support 695# Miscellaneous I2C Chip support
654# 696#
655# CONFIG_DS1682 is not set
656# CONFIG_SENSORS_TSL2550 is not set 697# CONFIG_SENSORS_TSL2550 is not set
657# CONFIG_I2C_DEBUG_CORE is not set 698# CONFIG_I2C_DEBUG_CORE is not set
658# CONFIG_I2C_DEBUG_ALGO is not set 699# CONFIG_I2C_DEBUG_ALGO is not set
@@ -707,16 +748,19 @@ CONFIG_SSB_POSSIBLE=y
707# 748#
708# CONFIG_MFD_CORE is not set 749# CONFIG_MFD_CORE is not set
709# CONFIG_MFD_SM501 is not set 750# CONFIG_MFD_SM501 is not set
751# CONFIG_MFD_SH_MOBILE_SDHI is not set
710# CONFIG_HTC_PASIC3 is not set 752# CONFIG_HTC_PASIC3 is not set
711# CONFIG_TPS65010 is not set 753# CONFIG_TPS65010 is not set
712# CONFIG_TWL4030_CORE is not set 754# CONFIG_TWL4030_CORE is not set
713# CONFIG_MFD_TMIO is not set 755# CONFIG_MFD_TMIO is not set
714# CONFIG_PMIC_DA903X is not set 756# CONFIG_PMIC_DA903X is not set
757# CONFIG_PMIC_ADP5520 is not set
715# CONFIG_MFD_WM8400 is not set 758# CONFIG_MFD_WM8400 is not set
716# CONFIG_MFD_WM831X is not set 759# CONFIG_MFD_WM831X is not set
717# CONFIG_MFD_WM8350_I2C is not set 760# CONFIG_MFD_WM8350_I2C is not set
718# CONFIG_MFD_PCF50633 is not set 761# CONFIG_MFD_PCF50633 is not set
719# CONFIG_AB3100_CORE is not set 762# CONFIG_AB3100_CORE is not set
763# CONFIG_MFD_88PM8607 is not set
720# CONFIG_REGULATOR is not set 764# CONFIG_REGULATOR is not set
721# CONFIG_MEDIA_SUPPORT is not set 765# CONFIG_MEDIA_SUPPORT is not set
722 766
@@ -867,6 +911,7 @@ CONFIG_EXT2_FS=y
867# CONFIG_EXT2_FS_XIP is not set 911# CONFIG_EXT2_FS_XIP is not set
868# CONFIG_EXT3_FS is not set 912# CONFIG_EXT3_FS is not set
869# CONFIG_EXT4_FS is not set 913# CONFIG_EXT4_FS is not set
914CONFIG_EXT4_USE_FOR_EXT23=y
870# CONFIG_REISERFS_FS is not set 915# CONFIG_REISERFS_FS is not set
871# CONFIG_JFS_FS is not set 916# CONFIG_JFS_FS is not set
872# CONFIG_FS_POSIX_ACL is not set 917# CONFIG_FS_POSIX_ACL is not set
@@ -979,7 +1024,7 @@ CONFIG_FRAME_WARN=1024
979CONFIG_DEBUG_FS=y 1024CONFIG_DEBUG_FS=y
980# CONFIG_HEADERS_CHECK is not set 1025# CONFIG_HEADERS_CHECK is not set
981# CONFIG_DEBUG_KERNEL is not set 1026# CONFIG_DEBUG_KERNEL is not set
982# CONFIG_DEBUG_BUGVERBOSE is not set 1027CONFIG_DEBUG_BUGVERBOSE=y
983# CONFIG_DEBUG_MEMORY_INIT is not set 1028# CONFIG_DEBUG_MEMORY_INIT is not set
984# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1029# CONFIG_RCU_CPU_STALL_DETECTOR is not set
985# CONFIG_LATENCYTOP is not set 1030# CONFIG_LATENCYTOP is not set
@@ -997,7 +1042,6 @@ CONFIG_TRACING_SUPPORT=y
997# CONFIG_SAMPLES is not set 1042# CONFIG_SAMPLES is not set
998CONFIG_HAVE_ARCH_KGDB=y 1043CONFIG_HAVE_ARCH_KGDB=y
999# CONFIG_SH_STANDARD_BIOS is not set 1044# CONFIG_SH_STANDARD_BIOS is not set
1000# CONFIG_EARLY_SCIF_CONSOLE is not set
1001# CONFIG_DWARF_UNWINDER is not set 1045# CONFIG_DWARF_UNWINDER is not set
1002 1046
1003# 1047#
@@ -1006,7 +1050,11 @@ CONFIG_HAVE_ARCH_KGDB=y
1006# CONFIG_KEYS is not set 1050# CONFIG_KEYS is not set
1007# CONFIG_SECURITY is not set 1051# CONFIG_SECURITY is not set
1008# CONFIG_SECURITYFS is not set 1052# CONFIG_SECURITYFS is not set
1009# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1053# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1054# CONFIG_DEFAULT_SECURITY_SMACK is not set
1055# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1056CONFIG_DEFAULT_SECURITY_DAC=y
1057CONFIG_DEFAULT_SECURITY=""
1010# CONFIG_CRYPTO is not set 1058# CONFIG_CRYPTO is not set
1011# CONFIG_BINARY_PRINTF is not set 1059# CONFIG_BINARY_PRINTF is not set
1012 1060
diff --git a/arch/sh/configs/ecovec24_defconfig b/arch/sh/configs/ecovec24_defconfig
index ac6469718a2c..6041c66dd10e 100644
--- a/arch/sh/configs/ecovec24_defconfig
+++ b/arch/sh/configs/ecovec24_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.34-rc2
4# Thu Sep 24 17:45:39 2009 4# Mon Mar 29 02:21:58 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,13 +13,14 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18CONFIG_GENERIC_GPIO=y 18CONFIG_GENERIC_GPIO=y
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
21CONFIG_ARCH_SUSPEND_POSSIBLE=y 21CONFIG_ARCH_SUSPEND_POSSIBLE=y
22CONFIG_ARCH_HIBERNATION_POSSIBLE=y 22CONFIG_ARCH_HIBERNATION_POSSIBLE=y
23CONFIG_SYS_SUPPORTS_HUGETLBFS=y
23CONFIG_SYS_SUPPORTS_CMT=y 24CONFIG_SYS_SUPPORTS_CMT=y
24CONFIG_SYS_SUPPORTS_TMU=y 25CONFIG_SYS_SUPPORTS_TMU=y
25CONFIG_STACKTRACE_SUPPORT=y 26CONFIG_STACKTRACE_SUPPORT=y
@@ -30,6 +31,8 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
30CONFIG_ARCH_NO_VIRT_TO_BUS=y 31CONFIG_ARCH_NO_VIRT_TO_BUS=y
31CONFIG_ARCH_HAS_DEFAULT_IDLE=y 32CONFIG_ARCH_HAS_DEFAULT_IDLE=y
32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
34CONFIG_DMA_NONCOHERENT=y
35CONFIG_NEED_DMA_MAP_STATE=y
33CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 36CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
34CONFIG_CONSTRUCTORS=y 37CONFIG_CONSTRUCTORS=y
35 38
@@ -45,9 +48,11 @@ CONFIG_LOCALVERSION=""
45CONFIG_HAVE_KERNEL_GZIP=y 48CONFIG_HAVE_KERNEL_GZIP=y
46CONFIG_HAVE_KERNEL_BZIP2=y 49CONFIG_HAVE_KERNEL_BZIP2=y
47CONFIG_HAVE_KERNEL_LZMA=y 50CONFIG_HAVE_KERNEL_LZMA=y
51CONFIG_HAVE_KERNEL_LZO=y
48CONFIG_KERNEL_GZIP=y 52CONFIG_KERNEL_GZIP=y
49# CONFIG_KERNEL_BZIP2 is not set 53# CONFIG_KERNEL_BZIP2 is not set
50# CONFIG_KERNEL_LZMA is not set 54# CONFIG_KERNEL_LZMA is not set
55# CONFIG_KERNEL_LZO is not set
51CONFIG_SWAP=y 56CONFIG_SWAP=y
52CONFIG_SYSVIPC=y 57CONFIG_SYSVIPC=y
53CONFIG_SYSVIPC_SYSCTL=y 58CONFIG_SYSVIPC_SYSCTL=y
@@ -62,20 +67,15 @@ CONFIG_BSD_PROCESS_ACCT=y
62# 67#
63CONFIG_TREE_RCU=y 68CONFIG_TREE_RCU=y
64# CONFIG_TREE_PREEMPT_RCU is not set 69# CONFIG_TREE_PREEMPT_RCU is not set
70# CONFIG_TINY_RCU is not set
65# CONFIG_RCU_TRACE is not set 71# CONFIG_RCU_TRACE is not set
66CONFIG_RCU_FANOUT=32 72CONFIG_RCU_FANOUT=32
67# CONFIG_RCU_FANOUT_EXACT is not set 73# CONFIG_RCU_FANOUT_EXACT is not set
68# CONFIG_TREE_RCU_TRACE is not set 74# CONFIG_TREE_RCU_TRACE is not set
69# CONFIG_IKCONFIG is not set 75# CONFIG_IKCONFIG is not set
70CONFIG_LOG_BUF_SHIFT=14 76CONFIG_LOG_BUF_SHIFT=14
71CONFIG_GROUP_SCHED=y
72CONFIG_FAIR_GROUP_SCHED=y
73# CONFIG_RT_GROUP_SCHED is not set
74CONFIG_USER_SCHED=y
75# CONFIG_CGROUP_SCHED is not set
76# CONFIG_CGROUPS is not set 77# CONFIG_CGROUPS is not set
77CONFIG_SYSFS_DEPRECATED=y 78# CONFIG_SYSFS_DEPRECATED_V2 is not set
78CONFIG_SYSFS_DEPRECATED_V2=y
79# CONFIG_RELAY is not set 79# CONFIG_RELAY is not set
80# CONFIG_NAMESPACES is not set 80# CONFIG_NAMESPACES is not set
81# CONFIG_BLK_DEV_INITRD is not set 81# CONFIG_BLK_DEV_INITRD is not set
@@ -99,11 +99,12 @@ CONFIG_EVENTFD=y
99CONFIG_SHMEM=y 99CONFIG_SHMEM=y
100CONFIG_AIO=y 100CONFIG_AIO=y
101CONFIG_HAVE_PERF_EVENTS=y 101CONFIG_HAVE_PERF_EVENTS=y
102CONFIG_PERF_USE_VMALLOC=y
102 103
103# 104#
104# Kernel Performance Events And Counters 105# Kernel Performance Events And Counters
105# 106#
106# CONFIG_PERF_EVENTS is not set 107CONFIG_PERF_EVENTS=y
107# CONFIG_PERF_COUNTERS is not set 108# CONFIG_PERF_COUNTERS is not set
108CONFIG_VM_EVENT_COUNTERS=y 109CONFIG_VM_EVENT_COUNTERS=y
109CONFIG_COMPAT_BRK=y 110CONFIG_COMPAT_BRK=y
@@ -112,12 +113,13 @@ CONFIG_SLAB=y
112# CONFIG_SLOB is not set 113# CONFIG_SLOB is not set
113# CONFIG_PROFILING is not set 114# CONFIG_PROFILING is not set
114CONFIG_HAVE_OPROFILE=y 115CONFIG_HAVE_OPROFILE=y
115CONFIG_HAVE_IOREMAP_PROT=y
116CONFIG_HAVE_KPROBES=y 116CONFIG_HAVE_KPROBES=y
117CONFIG_HAVE_KRETPROBES=y 117CONFIG_HAVE_KRETPROBES=y
118CONFIG_HAVE_ARCH_TRACEHOOK=y 118CONFIG_HAVE_ARCH_TRACEHOOK=y
119CONFIG_HAVE_DMA_ATTRS=y
119CONFIG_HAVE_CLK=y 120CONFIG_HAVE_CLK=y
120CONFIG_HAVE_DMA_API_DEBUG=y 121CONFIG_HAVE_DMA_API_DEBUG=y
122CONFIG_HAVE_HW_BREAKPOINT=y
121 123
122# 124#
123# GCOV-based kernel profiling 125# GCOV-based kernel profiling
@@ -143,14 +145,41 @@ CONFIG_LBDAF=y
143# IO Schedulers 145# IO Schedulers
144# 146#
145CONFIG_IOSCHED_NOOP=y 147CONFIG_IOSCHED_NOOP=y
146CONFIG_IOSCHED_AS=y
147CONFIG_IOSCHED_DEADLINE=y 148CONFIG_IOSCHED_DEADLINE=y
148CONFIG_IOSCHED_CFQ=y 149CONFIG_IOSCHED_CFQ=y
149# CONFIG_DEFAULT_AS is not set
150# CONFIG_DEFAULT_DEADLINE is not set 150# CONFIG_DEFAULT_DEADLINE is not set
151CONFIG_DEFAULT_CFQ=y 151CONFIG_DEFAULT_CFQ=y
152# CONFIG_DEFAULT_NOOP is not set 152# CONFIG_DEFAULT_NOOP is not set
153CONFIG_DEFAULT_IOSCHED="cfq" 153CONFIG_DEFAULT_IOSCHED="cfq"
154# CONFIG_INLINE_SPIN_TRYLOCK is not set
155# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
156# CONFIG_INLINE_SPIN_LOCK is not set
157# CONFIG_INLINE_SPIN_LOCK_BH is not set
158# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
159# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
160# CONFIG_INLINE_SPIN_UNLOCK is not set
161# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
162# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
163# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
164# CONFIG_INLINE_READ_TRYLOCK is not set
165# CONFIG_INLINE_READ_LOCK is not set
166# CONFIG_INLINE_READ_LOCK_BH is not set
167# CONFIG_INLINE_READ_LOCK_IRQ is not set
168# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
169# CONFIG_INLINE_READ_UNLOCK is not set
170# CONFIG_INLINE_READ_UNLOCK_BH is not set
171# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
172# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
173# CONFIG_INLINE_WRITE_TRYLOCK is not set
174# CONFIG_INLINE_WRITE_LOCK is not set
175# CONFIG_INLINE_WRITE_LOCK_BH is not set
176# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
177# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
178# CONFIG_INLINE_WRITE_UNLOCK is not set
179# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
180# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
181# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
182# CONFIG_MUTEX_SPIN_ON_OWNER is not set
154CONFIG_FREEZER=y 183CONFIG_FREEZER=y
155 184
156# 185#
@@ -202,11 +231,12 @@ CONFIG_CPU_SUBTYPE_SH7724=y
202CONFIG_QUICKLIST=y 231CONFIG_QUICKLIST=y
203CONFIG_MMU=y 232CONFIG_MMU=y
204CONFIG_PAGE_OFFSET=0x80000000 233CONFIG_PAGE_OFFSET=0x80000000
205CONFIG_FORCE_MAX_ZONEORDER=11 234CONFIG_FORCE_MAX_ZONEORDER=12
206CONFIG_MEMORY_START=0x08000000 235CONFIG_MEMORY_START=0x08000000
207CONFIG_MEMORY_SIZE=0x08000000 236CONFIG_MEMORY_SIZE=0x10000000
208CONFIG_29BIT=y 237CONFIG_29BIT=y
209# CONFIG_X2TLB is not set 238# CONFIG_PMB is not set
239CONFIG_X2TLB=y
210CONFIG_VSYSCALL=y 240CONFIG_VSYSCALL=y
211CONFIG_ARCH_FLATMEM_ENABLE=y 241CONFIG_ARCH_FLATMEM_ENABLE=y
212CONFIG_ARCH_SPARSEMEM_ENABLE=y 242CONFIG_ARCH_SPARSEMEM_ENABLE=y
@@ -214,6 +244,8 @@ CONFIG_ARCH_SPARSEMEM_DEFAULT=y
214CONFIG_MAX_ACTIVE_REGIONS=1 244CONFIG_MAX_ACTIVE_REGIONS=1
215CONFIG_ARCH_POPULATES_NODE_MAP=y 245CONFIG_ARCH_POPULATES_NODE_MAP=y
216CONFIG_ARCH_SELECT_MEMORY_MODEL=y 246CONFIG_ARCH_SELECT_MEMORY_MODEL=y
247CONFIG_IOREMAP_FIXED=y
248CONFIG_UNCACHED_MAPPING=y
217CONFIG_PAGE_SIZE_4KB=y 249CONFIG_PAGE_SIZE_4KB=y
218# CONFIG_PAGE_SIZE_8KB is not set 250# CONFIG_PAGE_SIZE_8KB is not set
219# CONFIG_PAGE_SIZE_16KB is not set 251# CONFIG_PAGE_SIZE_16KB is not set
@@ -229,9 +261,7 @@ CONFIG_PAGEFLAGS_EXTENDED=y
229CONFIG_SPLIT_PTLOCK_CPUS=4 261CONFIG_SPLIT_PTLOCK_CPUS=4
230# CONFIG_PHYS_ADDR_T_64BIT is not set 262# CONFIG_PHYS_ADDR_T_64BIT is not set
231CONFIG_ZONE_DMA_FLAG=0 263CONFIG_ZONE_DMA_FLAG=0
232CONFIG_NR_QUICK=2 264CONFIG_NR_QUICK=1
233CONFIG_HAVE_MLOCK=y
234CONFIG_HAVE_MLOCKED_PAGE_BIT=y
235# CONFIG_KSM is not set 265# CONFIG_KSM is not set
236CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 266CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
237 267
@@ -265,7 +295,6 @@ CONFIG_SH_ECOVEC=y
265# 295#
266CONFIG_SH_TIMER_TMU=y 296CONFIG_SH_TIMER_TMU=y
267# CONFIG_SH_TIMER_CMT is not set 297# CONFIG_SH_TIMER_CMT is not set
268CONFIG_SH_PCLK_FREQ=33333333
269CONFIG_SH_CLK_CPG=y 298CONFIG_SH_CLK_CPG=y
270# CONFIG_NO_HZ is not set 299# CONFIG_NO_HZ is not set
271# CONFIG_HIGH_RES_TIMERS is not set 300# CONFIG_HIGH_RES_TIMERS is not set
@@ -307,7 +336,6 @@ CONFIG_SECCOMP=y
307# CONFIG_PREEMPT_VOLUNTARY is not set 336# CONFIG_PREEMPT_VOLUNTARY is not set
308CONFIG_PREEMPT=y 337CONFIG_PREEMPT=y
309CONFIG_GUSA=y 338CONFIG_GUSA=y
310# CONFIG_SPARSE_IRQ is not set
311 339
312# 340#
313# Boot options 341# Boot options
@@ -317,7 +345,7 @@ CONFIG_BOOT_LINK_OFFSET=0x00800000
317CONFIG_ENTRY_OFFSET=0x00001000 345CONFIG_ENTRY_OFFSET=0x00001000
318CONFIG_CMDLINE_OVERWRITE=y 346CONFIG_CMDLINE_OVERWRITE=y
319# CONFIG_CMDLINE_EXTEND is not set 347# CONFIG_CMDLINE_EXTEND is not set
320CONFIG_CMDLINE="console=tty0, console=ttySC0,115200 root=/dev/nfs ip=dhcp mem=120M memchunk.vpu=4m" 348CONFIG_CMDLINE="console=tty0, console=ttySC0,115200 root=/dev/nfs ip=dhcp mem=248M memchunk.vpu=8m memchunk.veu0=4m"
321 349
322# 350#
323# Bus options 351# Bus options
@@ -343,6 +371,7 @@ CONFIG_SUSPEND=y
343CONFIG_SUSPEND_FREEZER=y 371CONFIG_SUSPEND_FREEZER=y
344# CONFIG_HIBERNATION is not set 372# CONFIG_HIBERNATION is not set
345CONFIG_PM_RUNTIME=y 373CONFIG_PM_RUNTIME=y
374CONFIG_PM_OPS=y
346# CONFIG_CPU_IDLE is not set 375# CONFIG_CPU_IDLE is not set
347CONFIG_NET=y 376CONFIG_NET=y
348 377
@@ -350,7 +379,6 @@ CONFIG_NET=y
350# Networking options 379# Networking options
351# 380#
352CONFIG_PACKET=y 381CONFIG_PACKET=y
353# CONFIG_PACKET_MMAP is not set
354CONFIG_UNIX=y 382CONFIG_UNIX=y
355# CONFIG_NET_KEY is not set 383# CONFIG_NET_KEY is not set
356CONFIG_INET=y 384CONFIG_INET=y
@@ -415,14 +443,49 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
415# CONFIG_NET_PKTGEN is not set 443# CONFIG_NET_PKTGEN is not set
416# CONFIG_HAMRADIO is not set 444# CONFIG_HAMRADIO is not set
417# CONFIG_CAN is not set 445# CONFIG_CAN is not set
418# CONFIG_IRDA is not set 446CONFIG_IRDA=y
447
448#
449# IrDA protocols
450#
451# CONFIG_IRLAN is not set
452# CONFIG_IRCOMM is not set
453# CONFIG_IRDA_ULTRA is not set
454
455#
456# IrDA options
457#
458# CONFIG_IRDA_CACHE_LAST_LSAP is not set
459# CONFIG_IRDA_FAST_RR is not set
460# CONFIG_IRDA_DEBUG is not set
461
462#
463# Infrared-port device drivers
464#
465
466#
467# SIR device drivers
468#
469# CONFIG_IRTTY_SIR is not set
470
471#
472# Dongle support
473#
474CONFIG_SH_SIR=y
475# CONFIG_KINGSUN_DONGLE is not set
476# CONFIG_KSDAZZLE_DONGLE is not set
477# CONFIG_KS959_DONGLE is not set
478
479#
480# FIR device drivers
481#
482# CONFIG_USB_IRDA is not set
483# CONFIG_SIGMATEL_FIR is not set
484# CONFIG_MCS_FIR is not set
419# CONFIG_BT is not set 485# CONFIG_BT is not set
420# CONFIG_AF_RXRPC is not set 486# CONFIG_AF_RXRPC is not set
421CONFIG_WIRELESS=y 487CONFIG_WIRELESS=y
422# CONFIG_CFG80211 is not set 488# CONFIG_CFG80211 is not set
423CONFIG_CFG80211_DEFAULT_PS_VALUE=0
424# CONFIG_WIRELESS_OLD_REGULATORY is not set
425# CONFIG_WIRELESS_EXT is not set
426# CONFIG_LIB80211 is not set 489# CONFIG_LIB80211 is not set
427 490
428# 491#
@@ -529,6 +592,7 @@ CONFIG_MTD_NAND_IDS=y
529# CONFIG_MTD_NAND_NANDSIM is not set 592# CONFIG_MTD_NAND_NANDSIM is not set
530# CONFIG_MTD_NAND_PLATFORM is not set 593# CONFIG_MTD_NAND_PLATFORM is not set
531# CONFIG_MTD_ALAUDA is not set 594# CONFIG_MTD_ALAUDA is not set
595# CONFIG_MTD_NAND_SH_FLCTL is not set
532# CONFIG_MTD_ONENAND is not set 596# CONFIG_MTD_ONENAND is not set
533 597
534# 598#
@@ -552,6 +616,10 @@ CONFIG_MTD_UBI_BEB_RESERVE=1
552CONFIG_BLK_DEV=y 616CONFIG_BLK_DEV=y
553# CONFIG_BLK_DEV_COW_COMMON is not set 617# CONFIG_BLK_DEV_COW_COMMON is not set
554# CONFIG_BLK_DEV_LOOP is not set 618# CONFIG_BLK_DEV_LOOP is not set
619
620#
621# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
622#
555# CONFIG_BLK_DEV_NBD is not set 623# CONFIG_BLK_DEV_NBD is not set
556# CONFIG_BLK_DEV_UB is not set 624# CONFIG_BLK_DEV_UB is not set
557CONFIG_BLK_DEV_RAM=y 625CONFIG_BLK_DEV_RAM=y
@@ -562,9 +630,13 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
562# CONFIG_ATA_OVER_ETH is not set 630# CONFIG_ATA_OVER_ETH is not set
563# CONFIG_BLK_DEV_HD is not set 631# CONFIG_BLK_DEV_HD is not set
564CONFIG_MISC_DEVICES=y 632CONFIG_MISC_DEVICES=y
633# CONFIG_AD525X_DPOT is not set
565# CONFIG_ICS932S401 is not set 634# CONFIG_ICS932S401 is not set
566# CONFIG_ENCLOSURE_SERVICES is not set 635# CONFIG_ENCLOSURE_SERVICES is not set
567# CONFIG_ISL29003 is not set 636# CONFIG_ISL29003 is not set
637# CONFIG_SENSORS_TSL2550 is not set
638# CONFIG_DS1682 is not set
639# CONFIG_TI_DAC7512 is not set
568# CONFIG_C2PORT is not set 640# CONFIG_C2PORT is not set
569 641
570# 642#
@@ -575,12 +647,14 @@ CONFIG_MISC_DEVICES=y
575# CONFIG_EEPROM_LEGACY is not set 647# CONFIG_EEPROM_LEGACY is not set
576# CONFIG_EEPROM_MAX6875 is not set 648# CONFIG_EEPROM_MAX6875 is not set
577# CONFIG_EEPROM_93CX6 is not set 649# CONFIG_EEPROM_93CX6 is not set
650# CONFIG_IWMC3200TOP is not set
578CONFIG_HAVE_IDE=y 651CONFIG_HAVE_IDE=y
579# CONFIG_IDE is not set 652# CONFIG_IDE is not set
580 653
581# 654#
582# SCSI device support 655# SCSI device support
583# 656#
657CONFIG_SCSI_MOD=y
584# CONFIG_RAID_ATTRS is not set 658# CONFIG_RAID_ATTRS is not set
585CONFIG_SCSI=y 659CONFIG_SCSI=y
586CONFIG_SCSI_DMA=y 660CONFIG_SCSI_DMA=y
@@ -669,11 +743,12 @@ CONFIG_SH_ETH=y
669# CONFIG_B44 is not set 743# CONFIG_B44 is not set
670# CONFIG_KS8842 is not set 744# CONFIG_KS8842 is not set
671# CONFIG_KS8851 is not set 745# CONFIG_KS8851 is not set
746# CONFIG_KS8851_MLL is not set
672# CONFIG_NETDEV_1000 is not set 747# CONFIG_NETDEV_1000 is not set
673# CONFIG_NETDEV_10000 is not set 748# CONFIG_NETDEV_10000 is not set
674CONFIG_WLAN=y 749CONFIG_WLAN=y
675# CONFIG_WLAN_PRE80211 is not set 750# CONFIG_USB_ZD1201 is not set
676# CONFIG_WLAN_80211 is not set 751# CONFIG_HOSTAP is not set
677 752
678# 753#
679# Enable WiMAX (Networking options) to see the WiMAX drivers 754# Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -702,6 +777,7 @@ CONFIG_WLAN=y
702CONFIG_INPUT=y 777CONFIG_INPUT=y
703# CONFIG_INPUT_FF_MEMLESS is not set 778# CONFIG_INPUT_FF_MEMLESS is not set
704# CONFIG_INPUT_POLLDEV is not set 779# CONFIG_INPUT_POLLDEV is not set
780# CONFIG_INPUT_SPARSEKMAP is not set
705 781
706# 782#
707# Userland interfaces 783# Userland interfaces
@@ -731,7 +807,29 @@ CONFIG_KEYBOARD_SH_KEYSC=y
731# CONFIG_INPUT_MOUSE is not set 807# CONFIG_INPUT_MOUSE is not set
732# CONFIG_INPUT_JOYSTICK is not set 808# CONFIG_INPUT_JOYSTICK is not set
733# CONFIG_INPUT_TABLET is not set 809# CONFIG_INPUT_TABLET is not set
734# CONFIG_INPUT_TOUCHSCREEN is not set 810CONFIG_INPUT_TOUCHSCREEN=y
811# CONFIG_TOUCHSCREEN_ADS7846 is not set
812# CONFIG_TOUCHSCREEN_AD7877 is not set
813# CONFIG_TOUCHSCREEN_AD7879_I2C is not set
814# CONFIG_TOUCHSCREEN_AD7879_SPI is not set
815# CONFIG_TOUCHSCREEN_AD7879 is not set
816# CONFIG_TOUCHSCREEN_DYNAPRO is not set
817# CONFIG_TOUCHSCREEN_EETI is not set
818# CONFIG_TOUCHSCREEN_FUJITSU is not set
819# CONFIG_TOUCHSCREEN_GUNZE is not set
820# CONFIG_TOUCHSCREEN_ELO is not set
821# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
822# CONFIG_TOUCHSCREEN_MCS5000 is not set
823# CONFIG_TOUCHSCREEN_MTOUCH is not set
824# CONFIG_TOUCHSCREEN_INEXIO is not set
825# CONFIG_TOUCHSCREEN_MK712 is not set
826# CONFIG_TOUCHSCREEN_PENMOUNT is not set
827# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
828# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
829# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
830# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
831CONFIG_TOUCHSCREEN_TSC2007=y
832# CONFIG_TOUCHSCREEN_W90X900 is not set
735# CONFIG_INPUT_MISC is not set 833# CONFIG_INPUT_MISC is not set
736 834
737# 835#
@@ -765,10 +863,10 @@ CONFIG_SERIAL_SH_SCI_NR_UARTS=6
765CONFIG_SERIAL_SH_SCI_CONSOLE=y 863CONFIG_SERIAL_SH_SCI_CONSOLE=y
766CONFIG_SERIAL_CORE=y 864CONFIG_SERIAL_CORE=y
767CONFIG_SERIAL_CORE_CONSOLE=y 865CONFIG_SERIAL_CORE_CONSOLE=y
866# CONFIG_SERIAL_TIMBERDALE is not set
768CONFIG_UNIX98_PTYS=y 867CONFIG_UNIX98_PTYS=y
769# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 868# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
770CONFIG_LEGACY_PTYS=y 869# CONFIG_LEGACY_PTYS is not set
771CONFIG_LEGACY_PTY_COUNT=256
772# CONFIG_IPMI_HANDLER is not set 870# CONFIG_IPMI_HANDLER is not set
773CONFIG_HW_RANDOM=y 871CONFIG_HW_RANDOM=y
774# CONFIG_HW_RANDOM_TIMERIOMEM is not set 872# CONFIG_HW_RANDOM_TIMERIOMEM is not set
@@ -793,6 +891,7 @@ CONFIG_I2C_HELPER_AUTO=y
793# CONFIG_I2C_OCORES is not set 891# CONFIG_I2C_OCORES is not set
794CONFIG_I2C_SH_MOBILE=y 892CONFIG_I2C_SH_MOBILE=y
795# CONFIG_I2C_SIMTEC is not set 893# CONFIG_I2C_SIMTEC is not set
894# CONFIG_I2C_XILINX is not set
796 895
797# 896#
798# External I2C/SMBus adapter drivers 897# External I2C/SMBus adapter drivers
@@ -806,16 +905,9 @@ CONFIG_I2C_SH_MOBILE=y
806# 905#
807# CONFIG_I2C_PCA_PLATFORM is not set 906# CONFIG_I2C_PCA_PLATFORM is not set
808# CONFIG_I2C_STUB is not set 907# CONFIG_I2C_STUB is not set
809
810#
811# Miscellaneous I2C Chip support
812#
813# CONFIG_DS1682 is not set
814# CONFIG_SENSORS_TSL2550 is not set
815# CONFIG_I2C_DEBUG_CORE is not set 908# CONFIG_I2C_DEBUG_CORE is not set
816# CONFIG_I2C_DEBUG_ALGO is not set 909# CONFIG_I2C_DEBUG_ALGO is not set
817# CONFIG_I2C_DEBUG_BUS is not set 910# CONFIG_I2C_DEBUG_BUS is not set
818# CONFIG_I2C_DEBUG_CHIP is not set
819CONFIG_SPI=y 911CONFIG_SPI=y
820CONFIG_SPI_MASTER=y 912CONFIG_SPI_MASTER=y
821 913
@@ -824,7 +916,10 @@ CONFIG_SPI_MASTER=y
824# 916#
825CONFIG_SPI_BITBANG=y 917CONFIG_SPI_BITBANG=y
826# CONFIG_SPI_GPIO is not set 918# CONFIG_SPI_GPIO is not set
919# CONFIG_SPI_SH_MSIOF is not set
827# CONFIG_SPI_SH_SCI is not set 920# CONFIG_SPI_SH_SCI is not set
921# CONFIG_SPI_XILINX is not set
922# CONFIG_SPI_DESIGNWARE is not set
828 923
829# 924#
830# SPI Protocol Masters 925# SPI Protocol Masters
@@ -843,13 +938,16 @@ CONFIG_GPIOLIB=y
843# 938#
844# Memory mapped GPIO expanders: 939# Memory mapped GPIO expanders:
845# 940#
941# CONFIG_GPIO_IT8761E is not set
846 942
847# 943#
848# I2C GPIO expanders: 944# I2C GPIO expanders:
849# 945#
946# CONFIG_GPIO_MAX7300 is not set
850# CONFIG_GPIO_MAX732X is not set 947# CONFIG_GPIO_MAX732X is not set
851# CONFIG_GPIO_PCA953X is not set 948# CONFIG_GPIO_PCA953X is not set
852# CONFIG_GPIO_PCF857X is not set 949# CONFIG_GPIO_PCF857X is not set
950# CONFIG_GPIO_ADP5588 is not set
853 951
854# 952#
855# PCI GPIO expanders: 953# PCI GPIO expanders:
@@ -880,20 +978,27 @@ CONFIG_SSB_POSSIBLE=y
880# 978#
881# Multifunction device drivers 979# Multifunction device drivers
882# 980#
883# CONFIG_MFD_CORE is not set 981CONFIG_MFD_CORE=y
982# CONFIG_MFD_88PM860X is not set
884# CONFIG_MFD_SM501 is not set 983# CONFIG_MFD_SM501 is not set
984CONFIG_MFD_SH_MOBILE_SDHI=y
885# CONFIG_HTC_PASIC3 is not set 985# CONFIG_HTC_PASIC3 is not set
986# CONFIG_HTC_I2CPLD is not set
886# CONFIG_TPS65010 is not set 987# CONFIG_TPS65010 is not set
887# CONFIG_TWL4030_CORE is not set 988# CONFIG_TWL4030_CORE is not set
888# CONFIG_MFD_TMIO is not set 989# CONFIG_MFD_TMIO is not set
889# CONFIG_PMIC_DA903X is not set 990# CONFIG_PMIC_DA903X is not set
991# CONFIG_PMIC_ADP5520 is not set
992# CONFIG_MFD_MAX8925 is not set
890# CONFIG_MFD_WM8400 is not set 993# CONFIG_MFD_WM8400 is not set
891# CONFIG_MFD_WM831X is not set 994# CONFIG_MFD_WM831X is not set
892# CONFIG_MFD_WM8350_I2C is not set 995# CONFIG_MFD_WM8350_I2C is not set
996# CONFIG_MFD_WM8994 is not set
893# CONFIG_MFD_PCF50633 is not set 997# CONFIG_MFD_PCF50633 is not set
894# CONFIG_MFD_MC13783 is not set 998# CONFIG_MFD_MC13783 is not set
895# CONFIG_AB3100_CORE is not set 999# CONFIG_AB3100_CORE is not set
896# CONFIG_EZX_PCAP is not set 1000# CONFIG_EZX_PCAP is not set
1001# CONFIG_AB4500_CORE is not set
897# CONFIG_REGULATOR is not set 1002# CONFIG_REGULATOR is not set
898CONFIG_MEDIA_SUPPORT=y 1003CONFIG_MEDIA_SUPPORT=y
899 1004
@@ -910,6 +1015,8 @@ CONFIG_VIDEO_MEDIA=y
910# 1015#
911# Multimedia drivers 1016# Multimedia drivers
912# 1017#
1018CONFIG_IR_CORE=y
1019CONFIG_VIDEO_IR=y
913# CONFIG_MEDIA_ATTACH is not set 1020# CONFIG_MEDIA_ATTACH is not set
914CONFIG_MEDIA_TUNER=y 1021CONFIG_MEDIA_TUNER=y
915# CONFIG_MEDIA_TUNER_CUSTOMISE is not set 1022# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
@@ -930,6 +1037,7 @@ CONFIG_VIDEO_CAPTURE_DRIVERS=y
930# CONFIG_VIDEO_ADV_DEBUG is not set 1037# CONFIG_VIDEO_ADV_DEBUG is not set
931# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set 1038# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
932CONFIG_VIDEO_HELPER_CHIPS_AUTO=y 1039CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
1040CONFIG_VIDEO_IR_I2C=y
933# CONFIG_VIDEO_VIVI is not set 1041# CONFIG_VIDEO_VIVI is not set
934# CONFIG_VIDEO_CPIA is not set 1042# CONFIG_VIDEO_CPIA is not set
935# CONFIG_VIDEO_CPIA2 is not set 1043# CONFIG_VIDEO_CPIA2 is not set
@@ -939,10 +1047,13 @@ CONFIG_SOC_CAMERA=y
939# CONFIG_SOC_CAMERA_MT9M001 is not set 1047# CONFIG_SOC_CAMERA_MT9M001 is not set
940# CONFIG_SOC_CAMERA_MT9M111 is not set 1048# CONFIG_SOC_CAMERA_MT9M111 is not set
941# CONFIG_SOC_CAMERA_MT9T031 is not set 1049# CONFIG_SOC_CAMERA_MT9T031 is not set
1050CONFIG_SOC_CAMERA_MT9T112=y
942# CONFIG_SOC_CAMERA_MT9V022 is not set 1051# CONFIG_SOC_CAMERA_MT9V022 is not set
943# CONFIG_SOC_CAMERA_TW9910 is not set 1052# CONFIG_SOC_CAMERA_RJ54N1 is not set
1053CONFIG_SOC_CAMERA_TW9910=y
944# CONFIG_SOC_CAMERA_PLATFORM is not set 1054# CONFIG_SOC_CAMERA_PLATFORM is not set
945# CONFIG_SOC_CAMERA_OV772X is not set 1055# CONFIG_SOC_CAMERA_OV772X is not set
1056# CONFIG_SOC_CAMERA_OV9640 is not set
946CONFIG_VIDEO_SH_MOBILE_CEU=y 1057CONFIG_VIDEO_SH_MOBILE_CEU=y
947# CONFIG_V4L_USB_DRIVERS is not set 1058# CONFIG_V4L_USB_DRIVERS is not set
948CONFIG_RADIO_ADAPTERS=y 1059CONFIG_RADIO_ADAPTERS=y
@@ -952,6 +1063,8 @@ CONFIG_RADIO_ADAPTERS=y
952# CONFIG_RADIO_SI470X is not set 1063# CONFIG_RADIO_SI470X is not set
953# CONFIG_USB_MR800 is not set 1064# CONFIG_USB_MR800 is not set
954# CONFIG_RADIO_TEA5764 is not set 1065# CONFIG_RADIO_TEA5764 is not set
1066# CONFIG_RADIO_SAA7706H is not set
1067# CONFIG_RADIO_TEF6862 is not set
955# CONFIG_DAB is not set 1068# CONFIG_DAB is not set
956 1069
957# 1070#
@@ -984,6 +1097,7 @@ CONFIG_FB_DEFERRED_IO=y
984# 1097#
985# CONFIG_FB_S1D13XXX is not set 1098# CONFIG_FB_S1D13XXX is not set
986CONFIG_FB_SH_MOBILE_LCDC=y 1099CONFIG_FB_SH_MOBILE_LCDC=y
1100# CONFIG_FB_TMIO is not set
987# CONFIG_FB_VIRTUAL is not set 1101# CONFIG_FB_VIRTUAL is not set
988# CONFIG_FB_METRONOME is not set 1102# CONFIG_FB_METRONOME is not set
989# CONFIG_FB_MB862XX is not set 1103# CONFIG_FB_MB862XX is not set
@@ -1012,7 +1126,46 @@ CONFIG_LOGO=y
1012# CONFIG_LOGO_SUPERH_MONO is not set 1126# CONFIG_LOGO_SUPERH_MONO is not set
1013# CONFIG_LOGO_SUPERH_VGA16 is not set 1127# CONFIG_LOGO_SUPERH_VGA16 is not set
1014CONFIG_LOGO_SUPERH_CLUT224=y 1128CONFIG_LOGO_SUPERH_CLUT224=y
1015# CONFIG_SOUND is not set 1129CONFIG_SOUND=y
1130CONFIG_SOUND_OSS_CORE=y
1131CONFIG_SOUND_OSS_CORE_PRECLAIM=y
1132CONFIG_SND=y
1133CONFIG_SND_TIMER=y
1134CONFIG_SND_PCM=y
1135CONFIG_SND_JACK=y
1136CONFIG_SND_SEQUENCER=y
1137CONFIG_SND_SEQ_DUMMY=y
1138CONFIG_SND_OSSEMUL=y
1139CONFIG_SND_MIXER_OSS=y
1140CONFIG_SND_PCM_OSS=y
1141CONFIG_SND_PCM_OSS_PLUGINS=y
1142# CONFIG_SND_SEQUENCER_OSS is not set
1143# CONFIG_SND_DYNAMIC_MINORS is not set
1144CONFIG_SND_SUPPORT_OLD_API=y
1145CONFIG_SND_VERBOSE_PROCFS=y
1146# CONFIG_SND_VERBOSE_PRINTK is not set
1147# CONFIG_SND_DEBUG is not set
1148# CONFIG_SND_RAWMIDI_SEQ is not set
1149# CONFIG_SND_OPL3_LIB_SEQ is not set
1150# CONFIG_SND_OPL4_LIB_SEQ is not set
1151# CONFIG_SND_SBAWE_SEQ is not set
1152# CONFIG_SND_EMU10K1_SEQ is not set
1153# CONFIG_SND_DRIVERS is not set
1154# CONFIG_SND_SPI is not set
1155CONFIG_SND_SUPERH=y
1156# CONFIG_SND_USB is not set
1157CONFIG_SND_SOC=y
1158
1159#
1160# SoC Audio support for SuperH
1161#
1162CONFIG_SND_SOC_SH4_FSI=y
1163# CONFIG_SND_FSI_AK4642 is not set
1164CONFIG_SND_FSI_DA7210=y
1165CONFIG_SND_SOC_I2C_AND_SPI=y
1166# CONFIG_SND_SOC_ALL_CODECS is not set
1167CONFIG_SND_SOC_DA7210=y
1168# CONFIG_SOUND_PRIME is not set
1016CONFIG_HID_SUPPORT=y 1169CONFIG_HID_SUPPORT=y
1017CONFIG_HID=y 1170CONFIG_HID=y
1018# CONFIG_HIDRAW is not set 1171# CONFIG_HIDRAW is not set
@@ -1027,6 +1180,7 @@ CONFIG_USB_HID=y
1027# 1180#
1028# Special HID drivers 1181# Special HID drivers
1029# 1182#
1183# CONFIG_HID_3M_PCT is not set
1030# CONFIG_HID_A4TECH is not set 1184# CONFIG_HID_A4TECH is not set
1031# CONFIG_HID_APPLE is not set 1185# CONFIG_HID_APPLE is not set
1032# CONFIG_HID_BELKIN is not set 1186# CONFIG_HID_BELKIN is not set
@@ -1041,12 +1195,16 @@ CONFIG_USB_HID=y
1041# CONFIG_HID_KENSINGTON is not set 1195# CONFIG_HID_KENSINGTON is not set
1042# CONFIG_HID_LOGITECH is not set 1196# CONFIG_HID_LOGITECH is not set
1043# CONFIG_HID_MICROSOFT is not set 1197# CONFIG_HID_MICROSOFT is not set
1198# CONFIG_HID_MOSART is not set
1044# CONFIG_HID_MONTEREY is not set 1199# CONFIG_HID_MONTEREY is not set
1045# CONFIG_HID_NTRIG is not set 1200# CONFIG_HID_NTRIG is not set
1201# CONFIG_HID_ORTEK is not set
1046# CONFIG_HID_PANTHERLORD is not set 1202# CONFIG_HID_PANTHERLORD is not set
1047# CONFIG_HID_PETALYNX is not set 1203# CONFIG_HID_PETALYNX is not set
1204# CONFIG_HID_QUANTA is not set
1048# CONFIG_HID_SAMSUNG is not set 1205# CONFIG_HID_SAMSUNG is not set
1049# CONFIG_HID_SONY is not set 1206# CONFIG_HID_SONY is not set
1207# CONFIG_HID_STANTUM is not set
1050# CONFIG_HID_SUNPLUS is not set 1208# CONFIG_HID_SUNPLUS is not set
1051# CONFIG_HID_GREENASIA is not set 1209# CONFIG_HID_GREENASIA is not set
1052# CONFIG_HID_SMARTJOYPLUS is not set 1210# CONFIG_HID_SMARTJOYPLUS is not set
@@ -1086,6 +1244,7 @@ CONFIG_USB_MON=y
1086# CONFIG_USB_SL811_HCD is not set 1244# CONFIG_USB_SL811_HCD is not set
1087CONFIG_USB_R8A66597_HCD=y 1245CONFIG_USB_R8A66597_HCD=y
1088# CONFIG_USB_HWA_HCD is not set 1246# CONFIG_USB_HWA_HCD is not set
1247# CONFIG_USB_GADGET_MUSB_HDRC is not set
1089 1248
1090# 1249#
1091# USB Device Class drivers 1250# USB Device Class drivers
@@ -1138,7 +1297,6 @@ CONFIG_USB_STORAGE=y
1138# CONFIG_USB_RIO500 is not set 1297# CONFIG_USB_RIO500 is not set
1139# CONFIG_USB_LEGOTOWER is not set 1298# CONFIG_USB_LEGOTOWER is not set
1140# CONFIG_USB_LCD is not set 1299# CONFIG_USB_LCD is not set
1141# CONFIG_USB_BERRY_CHARGE is not set
1142# CONFIG_USB_LED is not set 1300# CONFIG_USB_LED is not set
1143# CONFIG_USB_CYPRESS_CY7C63 is not set 1301# CONFIG_USB_CYPRESS_CY7C63 is not set
1144# CONFIG_USB_CYTHERM is not set 1302# CONFIG_USB_CYTHERM is not set
@@ -1150,8 +1308,45 @@ CONFIG_USB_STORAGE=y
1150# CONFIG_USB_IOWARRIOR is not set 1308# CONFIG_USB_IOWARRIOR is not set
1151# CONFIG_USB_TEST is not set 1309# CONFIG_USB_TEST is not set
1152# CONFIG_USB_ISIGHTFW is not set 1310# CONFIG_USB_ISIGHTFW is not set
1153# CONFIG_USB_VST is not set 1311CONFIG_USB_GADGET=y
1154# CONFIG_USB_GADGET is not set 1312# CONFIG_USB_GADGET_DEBUG_FILES is not set
1313# CONFIG_USB_GADGET_DEBUG_FS is not set
1314CONFIG_USB_GADGET_VBUS_DRAW=2
1315CONFIG_USB_GADGET_SELECTED=y
1316# CONFIG_USB_GADGET_AT91 is not set
1317# CONFIG_USB_GADGET_ATMEL_USBA is not set
1318# CONFIG_USB_GADGET_FSL_USB2 is not set
1319# CONFIG_USB_GADGET_LH7A40X is not set
1320# CONFIG_USB_GADGET_OMAP is not set
1321# CONFIG_USB_GADGET_PXA25X is not set
1322CONFIG_USB_GADGET_R8A66597=y
1323CONFIG_USB_R8A66597=y
1324# CONFIG_USB_GADGET_PXA27X is not set
1325# CONFIG_USB_GADGET_S3C_HSOTG is not set
1326# CONFIG_USB_GADGET_IMX is not set
1327# CONFIG_USB_GADGET_S3C2410 is not set
1328# CONFIG_USB_GADGET_M66592 is not set
1329# CONFIG_USB_GADGET_AMD5536UDC is not set
1330# CONFIG_USB_GADGET_FSL_QE is not set
1331# CONFIG_USB_GADGET_CI13XXX is not set
1332# CONFIG_USB_GADGET_NET2280 is not set
1333# CONFIG_USB_GADGET_GOKU is not set
1334# CONFIG_USB_GADGET_LANGWELL is not set
1335# CONFIG_USB_GADGET_DUMMY_HCD is not set
1336CONFIG_USB_GADGET_DUALSPEED=y
1337# CONFIG_USB_ZERO is not set
1338# CONFIG_USB_AUDIO is not set
1339# CONFIG_USB_ETH is not set
1340# CONFIG_USB_GADGETFS is not set
1341CONFIG_USB_FILE_STORAGE=m
1342# CONFIG_USB_FILE_STORAGE_TEST is not set
1343# CONFIG_USB_MASS_STORAGE is not set
1344# CONFIG_USB_G_SERIAL is not set
1345# CONFIG_USB_MIDI_GADGET is not set
1346# CONFIG_USB_G_PRINTER is not set
1347# CONFIG_USB_CDC_COMPOSITE is not set
1348# CONFIG_USB_G_NOKIA is not set
1349# CONFIG_USB_G_MULTI is not set
1155 1350
1156# 1351#
1157# OTG and related infrastructure 1352# OTG and related infrastructure
@@ -1174,9 +1369,8 @@ CONFIG_MMC_BLOCK_BOUNCE=y
1174# MMC/SD/SDIO Host Controller Drivers 1369# MMC/SD/SDIO Host Controller Drivers
1175# 1370#
1176# CONFIG_MMC_SDHCI is not set 1371# CONFIG_MMC_SDHCI is not set
1177# CONFIG_MMC_AT91 is not set
1178# CONFIG_MMC_ATMELMCI is not set
1179CONFIG_MMC_SPI=y 1372CONFIG_MMC_SPI=y
1373CONFIG_MMC_TMIO=y
1180# CONFIG_MEMSTICK is not set 1374# CONFIG_MEMSTICK is not set
1181# CONFIG_NEW_LEDS is not set 1375# CONFIG_NEW_LEDS is not set
1182# CONFIG_ACCESSIBILITY is not set 1376# CONFIG_ACCESSIBILITY is not set
@@ -1202,12 +1396,13 @@ CONFIG_RTC_INTF_DEV=y
1202# CONFIG_RTC_DRV_DS1374 is not set 1396# CONFIG_RTC_DRV_DS1374 is not set
1203# CONFIG_RTC_DRV_DS1672 is not set 1397# CONFIG_RTC_DRV_DS1672 is not set
1204# CONFIG_RTC_DRV_MAX6900 is not set 1398# CONFIG_RTC_DRV_MAX6900 is not set
1205# CONFIG_RTC_DRV_RS5C372 is not set 1399CONFIG_RTC_DRV_RS5C372=y
1206# CONFIG_RTC_DRV_ISL1208 is not set 1400# CONFIG_RTC_DRV_ISL1208 is not set
1207# CONFIG_RTC_DRV_X1205 is not set 1401# CONFIG_RTC_DRV_X1205 is not set
1208CONFIG_RTC_DRV_PCF8563=y 1402# CONFIG_RTC_DRV_PCF8563 is not set
1209# CONFIG_RTC_DRV_PCF8583 is not set 1403# CONFIG_RTC_DRV_PCF8583 is not set
1210# CONFIG_RTC_DRV_M41T80 is not set 1404# CONFIG_RTC_DRV_M41T80 is not set
1405# CONFIG_RTC_DRV_BQ32K is not set
1211# CONFIG_RTC_DRV_S35390A is not set 1406# CONFIG_RTC_DRV_S35390A is not set
1212# CONFIG_RTC_DRV_FM3130 is not set 1407# CONFIG_RTC_DRV_FM3130 is not set
1213# CONFIG_RTC_DRV_RX8581 is not set 1408# CONFIG_RTC_DRV_RX8581 is not set
@@ -1236,7 +1431,9 @@ CONFIG_RTC_DRV_PCF8563=y
1236# CONFIG_RTC_DRV_M48T86 is not set 1431# CONFIG_RTC_DRV_M48T86 is not set
1237# CONFIG_RTC_DRV_M48T35 is not set 1432# CONFIG_RTC_DRV_M48T35 is not set
1238# CONFIG_RTC_DRV_M48T59 is not set 1433# CONFIG_RTC_DRV_M48T59 is not set
1434# CONFIG_RTC_DRV_MSM6242 is not set
1239# CONFIG_RTC_DRV_BQ4802 is not set 1435# CONFIG_RTC_DRV_BQ4802 is not set
1436# CONFIG_RTC_DRV_RP5C01 is not set
1240# CONFIG_RTC_DRV_V3020 is not set 1437# CONFIG_RTC_DRV_V3020 is not set
1241 1438
1242# 1439#
@@ -1249,8 +1446,6 @@ CONFIG_RTC_DRV_PCF8563=y
1249CONFIG_UIO=y 1446CONFIG_UIO=y
1250# CONFIG_UIO_PDRV is not set 1447# CONFIG_UIO_PDRV is not set
1251CONFIG_UIO_PDRV_GENIRQ=y 1448CONFIG_UIO_PDRV_GENIRQ=y
1252# CONFIG_UIO_SMX is not set
1253# CONFIG_UIO_SERCOS3 is not set
1254 1449
1255# 1450#
1256# TI VLYNQ 1451# TI VLYNQ
@@ -1336,6 +1531,7 @@ CONFIG_MISC_FILESYSTEMS=y
1336# CONFIG_EFS_FS is not set 1531# CONFIG_EFS_FS is not set
1337# CONFIG_JFFS2_FS is not set 1532# CONFIG_JFFS2_FS is not set
1338# CONFIG_UBIFS_FS is not set 1533# CONFIG_UBIFS_FS is not set
1534# CONFIG_LOGFS is not set
1339# CONFIG_CRAMFS is not set 1535# CONFIG_CRAMFS is not set
1340# CONFIG_SQUASHFS is not set 1536# CONFIG_SQUASHFS is not set
1341# CONFIG_VXFS_FS is not set 1537# CONFIG_VXFS_FS is not set
@@ -1364,6 +1560,7 @@ CONFIG_SUNRPC=y
1364# CONFIG_RPCSEC_GSS_KRB5 is not set 1560# CONFIG_RPCSEC_GSS_KRB5 is not set
1365# CONFIG_RPCSEC_GSS_SPKM3 is not set 1561# CONFIG_RPCSEC_GSS_SPKM3 is not set
1366# CONFIG_SMB_FS is not set 1562# CONFIG_SMB_FS is not set
1563# CONFIG_CEPH_FS is not set
1367# CONFIG_CIFS is not set 1564# CONFIG_CIFS is not set
1368# CONFIG_NCP_FS is not set 1565# CONFIG_NCP_FS is not set
1369# CONFIG_CODA_FS is not set 1566# CONFIG_CODA_FS is not set
@@ -1430,9 +1627,10 @@ CONFIG_FRAME_WARN=1024
1430CONFIG_DEBUG_FS=y 1627CONFIG_DEBUG_FS=y
1431# CONFIG_HEADERS_CHECK is not set 1628# CONFIG_HEADERS_CHECK is not set
1432# CONFIG_DEBUG_KERNEL is not set 1629# CONFIG_DEBUG_KERNEL is not set
1433# CONFIG_DEBUG_BUGVERBOSE is not set 1630CONFIG_DEBUG_BUGVERBOSE=y
1434# CONFIG_DEBUG_MEMORY_INIT is not set 1631# CONFIG_DEBUG_MEMORY_INIT is not set
1435# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1632# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1633# CONFIG_LKDTM is not set
1436# CONFIG_LATENCYTOP is not set 1634# CONFIG_LATENCYTOP is not set
1437CONFIG_SYSCTL_SYSCALL_CHECK=y 1635CONFIG_SYSCTL_SYSCALL_CHECK=y
1438CONFIG_HAVE_FUNCTION_TRACER=y 1636CONFIG_HAVE_FUNCTION_TRACER=y
@@ -1448,7 +1646,6 @@ CONFIG_TRACING_SUPPORT=y
1448# CONFIG_SAMPLES is not set 1646# CONFIG_SAMPLES is not set
1449CONFIG_HAVE_ARCH_KGDB=y 1647CONFIG_HAVE_ARCH_KGDB=y
1450# CONFIG_SH_STANDARD_BIOS is not set 1648# CONFIG_SH_STANDARD_BIOS is not set
1451# CONFIG_EARLY_SCIF_CONSOLE is not set
1452# CONFIG_DWARF_UNWINDER is not set 1649# CONFIG_DWARF_UNWINDER is not set
1453 1650
1454# 1651#
@@ -1457,7 +1654,11 @@ CONFIG_HAVE_ARCH_KGDB=y
1457# CONFIG_KEYS is not set 1654# CONFIG_KEYS is not set
1458# CONFIG_SECURITY is not set 1655# CONFIG_SECURITY is not set
1459# CONFIG_SECURITYFS is not set 1656# CONFIG_SECURITYFS is not set
1460# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1657# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1658# CONFIG_DEFAULT_SECURITY_SMACK is not set
1659# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1660CONFIG_DEFAULT_SECURITY_DAC=y
1661CONFIG_DEFAULT_SECURITY=""
1461CONFIG_CRYPTO=y 1662CONFIG_CRYPTO=y
1462 1663
1463# 1664#
@@ -1561,7 +1762,7 @@ CONFIG_CRYPTO_HW=y
1561# 1762#
1562CONFIG_BITREVERSE=y 1763CONFIG_BITREVERSE=y
1563CONFIG_GENERIC_FIND_LAST_BIT=y 1764CONFIG_GENERIC_FIND_LAST_BIT=y
1564# CONFIG_CRC_CCITT is not set 1765CONFIG_CRC_CCITT=y
1565# CONFIG_CRC16 is not set 1766# CONFIG_CRC16 is not set
1566CONFIG_CRC_T10DIF=y 1767CONFIG_CRC_T10DIF=y
1567CONFIG_CRC_ITU_T=y 1768CONFIG_CRC_ITU_T=y
diff --git a/arch/sh/configs/edosk7705_defconfig b/arch/sh/configs/edosk7705_defconfig
index 86c9bc050629..72f8718dd738 100644
--- a/arch/sh/configs/edosk7705_defconfig
+++ b/arch/sh/configs/edosk7705_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Thu Sep 24 17:57:13 2009 4# Mon Jan 4 11:24:26 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -28,6 +28,7 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
28CONFIG_ARCH_NO_VIRT_TO_BUS=y 28CONFIG_ARCH_NO_VIRT_TO_BUS=y
29CONFIG_ARCH_HAS_DEFAULT_IDLE=y 29CONFIG_ARCH_HAS_DEFAULT_IDLE=y
30CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 30CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
31CONFIG_DMA_NONCOHERENT=y
31CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 32CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
32CONFIG_CONSTRUCTORS=y 33CONFIG_CONSTRUCTORS=y
33 34
@@ -53,6 +54,7 @@ CONFIG_KERNEL_GZIP=y
53# 54#
54CONFIG_TREE_RCU=y 55CONFIG_TREE_RCU=y
55# CONFIG_TREE_PREEMPT_RCU is not set 56# CONFIG_TREE_PREEMPT_RCU is not set
57# CONFIG_TINY_RCU is not set
56# CONFIG_RCU_TRACE is not set 58# CONFIG_RCU_TRACE is not set
57CONFIG_RCU_FANOUT=32 59CONFIG_RCU_FANOUT=32
58# CONFIG_RCU_FANOUT_EXACT is not set 60# CONFIG_RCU_FANOUT_EXACT is not set
@@ -66,7 +68,6 @@ CONFIG_LOG_BUF_SHIFT=17
66# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 68# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
67CONFIG_EMBEDDED=y 69CONFIG_EMBEDDED=y
68# CONFIG_UID16 is not set 70# CONFIG_UID16 is not set
69# CONFIG_SYSCTL_SYSCALL is not set
70# CONFIG_KALLSYMS is not set 71# CONFIG_KALLSYMS is not set
71# CONFIG_HOTPLUG is not set 72# CONFIG_HOTPLUG is not set
72# CONFIG_PRINTK is not set 73# CONFIG_PRINTK is not set
@@ -81,6 +82,7 @@ CONFIG_EMBEDDED=y
81CONFIG_SHMEM=y 82CONFIG_SHMEM=y
82# CONFIG_AIO is not set 83# CONFIG_AIO is not set
83CONFIG_HAVE_PERF_EVENTS=y 84CONFIG_HAVE_PERF_EVENTS=y
85CONFIG_PERF_USE_VMALLOC=y
84 86
85# 87#
86# Kernel Performance Events And Counters 88# Kernel Performance Events And Counters
@@ -98,6 +100,7 @@ CONFIG_HAVE_IOREMAP_PROT=y
98CONFIG_HAVE_KPROBES=y 100CONFIG_HAVE_KPROBES=y
99CONFIG_HAVE_KRETPROBES=y 101CONFIG_HAVE_KRETPROBES=y
100CONFIG_HAVE_ARCH_TRACEHOOK=y 102CONFIG_HAVE_ARCH_TRACEHOOK=y
103CONFIG_HAVE_DMA_ATTRS=y
101CONFIG_HAVE_CLK=y 104CONFIG_HAVE_CLK=y
102CONFIG_HAVE_DMA_API_DEBUG=y 105CONFIG_HAVE_DMA_API_DEBUG=y
103 106
@@ -109,6 +112,35 @@ CONFIG_HAVE_GENERIC_DMA_COHERENT=y
109CONFIG_BASE_SMALL=1 112CONFIG_BASE_SMALL=1
110# CONFIG_MODULES is not set 113# CONFIG_MODULES is not set
111# CONFIG_BLOCK is not set 114# CONFIG_BLOCK is not set
115# CONFIG_INLINE_SPIN_TRYLOCK is not set
116# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
117# CONFIG_INLINE_SPIN_LOCK is not set
118# CONFIG_INLINE_SPIN_LOCK_BH is not set
119# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
120# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
121CONFIG_INLINE_SPIN_UNLOCK=y
122# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
123CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
124# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
125# CONFIG_INLINE_READ_TRYLOCK is not set
126# CONFIG_INLINE_READ_LOCK is not set
127# CONFIG_INLINE_READ_LOCK_BH is not set
128# CONFIG_INLINE_READ_LOCK_IRQ is not set
129# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
130CONFIG_INLINE_READ_UNLOCK=y
131# CONFIG_INLINE_READ_UNLOCK_BH is not set
132CONFIG_INLINE_READ_UNLOCK_IRQ=y
133# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
134# CONFIG_INLINE_WRITE_TRYLOCK is not set
135# CONFIG_INLINE_WRITE_LOCK is not set
136# CONFIG_INLINE_WRITE_LOCK_BH is not set
137# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
138# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
139CONFIG_INLINE_WRITE_UNLOCK=y
140# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
141CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
142# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
143# CONFIG_MUTEX_SPIN_ON_OWNER is not set
112# CONFIG_FREEZER is not set 144# CONFIG_FREEZER is not set
113 145
114# 146#
@@ -186,8 +218,6 @@ CONFIG_MIGRATION=y
186# CONFIG_PHYS_ADDR_T_64BIT is not set 218# CONFIG_PHYS_ADDR_T_64BIT is not set
187CONFIG_ZONE_DMA_FLAG=0 219CONFIG_ZONE_DMA_FLAG=0
188CONFIG_NR_QUICK=2 220CONFIG_NR_QUICK=2
189CONFIG_HAVE_MLOCK=y
190CONFIG_HAVE_MLOCKED_PAGE_BIT=y
191# CONFIG_KSM is not set 221# CONFIG_KSM is not set
192CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 222CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
193 223
@@ -359,6 +389,7 @@ CONFIG_SSB_POSSIBLE=y
359# 389#
360# CONFIG_MFD_CORE is not set 390# CONFIG_MFD_CORE is not set
361# CONFIG_MFD_SM501 is not set 391# CONFIG_MFD_SM501 is not set
392# CONFIG_MFD_SH_MOBILE_SDHI is not set
362# CONFIG_HTC_PASIC3 is not set 393# CONFIG_HTC_PASIC3 is not set
363# CONFIG_MFD_TMIO is not set 394# CONFIG_MFD_TMIO is not set
364# CONFIG_REGULATOR is not set 395# CONFIG_REGULATOR is not set
@@ -416,7 +447,6 @@ CONFIG_INOTIFY_USER=y
416# CONFIG_PROC_FS is not set 447# CONFIG_PROC_FS is not set
417# CONFIG_SYSFS is not set 448# CONFIG_SYSFS is not set
418# CONFIG_TMPFS is not set 449# CONFIG_TMPFS is not set
419# CONFIG_HUGETLBFS is not set
420# CONFIG_HUGETLB_PAGE is not set 450# CONFIG_HUGETLB_PAGE is not set
421CONFIG_MISC_FILESYSTEMS=y 451CONFIG_MISC_FILESYSTEMS=y
422# CONFIG_NLS is not set 452# CONFIG_NLS is not set
@@ -448,7 +478,6 @@ CONFIG_TRACING_SUPPORT=y
448# CONFIG_SAMPLES is not set 478# CONFIG_SAMPLES is not set
449CONFIG_HAVE_ARCH_KGDB=y 479CONFIG_HAVE_ARCH_KGDB=y
450# CONFIG_SH_STANDARD_BIOS is not set 480# CONFIG_SH_STANDARD_BIOS is not set
451# CONFIG_EARLY_SCIF_CONSOLE is not set
452# CONFIG_DWARF_UNWINDER is not set 481# CONFIG_DWARF_UNWINDER is not set
453 482
454# 483#
@@ -456,7 +485,11 @@ CONFIG_HAVE_ARCH_KGDB=y
456# 485#
457# CONFIG_KEYS is not set 486# CONFIG_KEYS is not set
458# CONFIG_SECURITYFS is not set 487# CONFIG_SECURITYFS is not set
459# CONFIG_SECURITY_FILE_CAPABILITIES is not set 488# CONFIG_DEFAULT_SECURITY_SELINUX is not set
489# CONFIG_DEFAULT_SECURITY_SMACK is not set
490# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
491CONFIG_DEFAULT_SECURITY_DAC=y
492CONFIG_DEFAULT_SECURITY=""
460# CONFIG_CRYPTO is not set 493# CONFIG_CRYPTO is not set
461# CONFIG_BINARY_PRINTF is not set 494# CONFIG_BINARY_PRINTF is not set
462 495
diff --git a/arch/sh/configs/edosk7760_defconfig b/arch/sh/configs/edosk7760_defconfig
index 4c0f82b7def2..0932e6d656eb 100644
--- a/arch/sh/configs/edosk7760_defconfig
+++ b/arch/sh/configs/edosk7760_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Thu Sep 24 17:57:30 2009 4# Mon Jan 4 11:24:44 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -20,6 +20,7 @@ CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set 21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
22CONFIG_ARCH_HIBERNATION_POSSIBLE=y 22CONFIG_ARCH_HIBERNATION_POSSIBLE=y
23CONFIG_SYS_SUPPORTS_HUGETLBFS=y
23CONFIG_SYS_SUPPORTS_TMU=y 24CONFIG_SYS_SUPPORTS_TMU=y
24CONFIG_STACKTRACE_SUPPORT=y 25CONFIG_STACKTRACE_SUPPORT=y
25CONFIG_LOCKDEP_SUPPORT=y 26CONFIG_LOCKDEP_SUPPORT=y
@@ -29,6 +30,7 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
29CONFIG_ARCH_NO_VIRT_TO_BUS=y 30CONFIG_ARCH_NO_VIRT_TO_BUS=y
30CONFIG_ARCH_HAS_DEFAULT_IDLE=y 31CONFIG_ARCH_HAS_DEFAULT_IDLE=y
31CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
33CONFIG_DMA_NONCOHERENT=y
32CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 34CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
33CONFIG_CONSTRUCTORS=y 35CONFIG_CONSTRUCTORS=y
34 36
@@ -62,6 +64,7 @@ CONFIG_BSD_PROCESS_ACCT=y
62# 64#
63CONFIG_TREE_RCU=y 65CONFIG_TREE_RCU=y
64# CONFIG_TREE_PREEMPT_RCU is not set 66# CONFIG_TREE_PREEMPT_RCU is not set
67# CONFIG_TINY_RCU is not set
65# CONFIG_RCU_TRACE is not set 68# CONFIG_RCU_TRACE is not set
66CONFIG_RCU_FANOUT=32 69CONFIG_RCU_FANOUT=32
67# CONFIG_RCU_FANOUT_EXACT is not set 70# CONFIG_RCU_FANOUT_EXACT is not set
@@ -102,6 +105,7 @@ CONFIG_EVENTFD=y
102CONFIG_SHMEM=y 105CONFIG_SHMEM=y
103CONFIG_AIO=y 106CONFIG_AIO=y
104CONFIG_HAVE_PERF_EVENTS=y 107CONFIG_HAVE_PERF_EVENTS=y
108CONFIG_PERF_USE_VMALLOC=y
105 109
106# 110#
107# Kernel Performance Events And Counters 111# Kernel Performance Events And Counters
@@ -121,6 +125,7 @@ CONFIG_HAVE_IOREMAP_PROT=y
121CONFIG_HAVE_KPROBES=y 125CONFIG_HAVE_KPROBES=y
122CONFIG_HAVE_KRETPROBES=y 126CONFIG_HAVE_KRETPROBES=y
123CONFIG_HAVE_ARCH_TRACEHOOK=y 127CONFIG_HAVE_ARCH_TRACEHOOK=y
128CONFIG_HAVE_DMA_ATTRS=y
124CONFIG_HAVE_CLK=y 129CONFIG_HAVE_CLK=y
125CONFIG_HAVE_DMA_API_DEBUG=y 130CONFIG_HAVE_DMA_API_DEBUG=y
126 131
@@ -147,14 +152,41 @@ CONFIG_LBDAF=y
147# IO Schedulers 152# IO Schedulers
148# 153#
149CONFIG_IOSCHED_NOOP=y 154CONFIG_IOSCHED_NOOP=y
150CONFIG_IOSCHED_AS=y
151CONFIG_IOSCHED_DEADLINE=y 155CONFIG_IOSCHED_DEADLINE=y
152CONFIG_IOSCHED_CFQ=y 156CONFIG_IOSCHED_CFQ=y
153# CONFIG_DEFAULT_AS is not set
154# CONFIG_DEFAULT_DEADLINE is not set 157# CONFIG_DEFAULT_DEADLINE is not set
155CONFIG_DEFAULT_CFQ=y 158CONFIG_DEFAULT_CFQ=y
156# CONFIG_DEFAULT_NOOP is not set 159# CONFIG_DEFAULT_NOOP is not set
157CONFIG_DEFAULT_IOSCHED="cfq" 160CONFIG_DEFAULT_IOSCHED="cfq"
161# CONFIG_INLINE_SPIN_TRYLOCK is not set
162# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
163# CONFIG_INLINE_SPIN_LOCK is not set
164# CONFIG_INLINE_SPIN_LOCK_BH is not set
165# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
166# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
167# CONFIG_INLINE_SPIN_UNLOCK is not set
168# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
169# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
170# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
171# CONFIG_INLINE_READ_TRYLOCK is not set
172# CONFIG_INLINE_READ_LOCK is not set
173# CONFIG_INLINE_READ_LOCK_BH is not set
174# CONFIG_INLINE_READ_LOCK_IRQ is not set
175# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
176# CONFIG_INLINE_READ_UNLOCK is not set
177# CONFIG_INLINE_READ_UNLOCK_BH is not set
178# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
179# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
180# CONFIG_INLINE_WRITE_TRYLOCK is not set
181# CONFIG_INLINE_WRITE_LOCK is not set
182# CONFIG_INLINE_WRITE_LOCK_BH is not set
183# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
184# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
185# CONFIG_INLINE_WRITE_UNLOCK is not set
186# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
187# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
188# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
189# CONFIG_MUTEX_SPIN_ON_OWNER is not set
158# CONFIG_FREEZER is not set 190# CONFIG_FREEZER is not set
159 191
160# 192#
@@ -230,8 +262,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
230# CONFIG_PHYS_ADDR_T_64BIT is not set 262# CONFIG_PHYS_ADDR_T_64BIT is not set
231CONFIG_ZONE_DMA_FLAG=0 263CONFIG_ZONE_DMA_FLAG=0
232CONFIG_NR_QUICK=2 264CONFIG_NR_QUICK=2
233CONFIG_HAVE_MLOCK=y
234CONFIG_HAVE_MLOCKED_PAGE_BIT=y
235# CONFIG_KSM is not set 265# CONFIG_KSM is not set
236CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 266CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
237 267
@@ -278,9 +308,9 @@ CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
278# 308#
279# DMA support 309# DMA support
280# 310#
281CONFIG_SH_DMA_API=y
282CONFIG_SH_DMA=y 311CONFIG_SH_DMA=y
283CONFIG_SH_DMA_IRQ_MULTI=y 312CONFIG_SH_DMA_IRQ_MULTI=y
313CONFIG_SH_DMA_API=y
284CONFIG_NR_ONCHIP_DMA_CHANNELS=8 314CONFIG_NR_ONCHIP_DMA_CHANNELS=8
285# CONFIG_NR_DMA_CHANNELS_BOOL is not set 315# CONFIG_NR_DMA_CHANNELS_BOOL is not set
286# CONFIG_SH_DMABRG is not set 316# CONFIG_SH_DMABRG is not set
@@ -320,7 +350,6 @@ CONFIG_GUSA=y
320CONFIG_ZERO_PAGE_OFFSET=0x00001000 350CONFIG_ZERO_PAGE_OFFSET=0x00001000
321CONFIG_BOOT_LINK_OFFSET=0x02000000 351CONFIG_BOOT_LINK_OFFSET=0x02000000
322CONFIG_ENTRY_OFFSET=0x00001000 352CONFIG_ENTRY_OFFSET=0x00001000
323# CONFIG_UBC_WAKEUP is not set
324CONFIG_CMDLINE_OVERWRITE=y 353CONFIG_CMDLINE_OVERWRITE=y
325# CONFIG_CMDLINE_EXTEND is not set 354# CONFIG_CMDLINE_EXTEND is not set
326CONFIG_CMDLINE="mem=64M console=ttySC2,115200 root=/dev/nfs rw nfsroot=192.168.0.3:/scripts/filesys ip=192.168.0.4" 355CONFIG_CMDLINE="mem=64M console=ttySC2,115200 root=/dev/nfs rw nfsroot=192.168.0.3:/scripts/filesys ip=192.168.0.4"
@@ -415,9 +444,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
415# CONFIG_AF_RXRPC is not set 444# CONFIG_AF_RXRPC is not set
416CONFIG_WIRELESS=y 445CONFIG_WIRELESS=y
417# CONFIG_CFG80211 is not set 446# CONFIG_CFG80211 is not set
418CONFIG_CFG80211_DEFAULT_PS_VALUE=0
419# CONFIG_WIRELESS_OLD_REGULATORY is not set
420# CONFIG_WIRELESS_EXT is not set
421# CONFIG_LIB80211 is not set 447# CONFIG_LIB80211 is not set
422 448
423# 449#
@@ -534,6 +560,10 @@ CONFIG_MTD_PHYSMAP=y
534CONFIG_BLK_DEV=y 560CONFIG_BLK_DEV=y
535# CONFIG_BLK_DEV_COW_COMMON is not set 561# CONFIG_BLK_DEV_COW_COMMON is not set
536# CONFIG_BLK_DEV_LOOP is not set 562# CONFIG_BLK_DEV_LOOP is not set
563
564#
565# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
566#
537# CONFIG_BLK_DEV_NBD is not set 567# CONFIG_BLK_DEV_NBD is not set
538CONFIG_BLK_DEV_RAM=y 568CONFIG_BLK_DEV_RAM=y
539CONFIG_BLK_DEV_RAM_COUNT=16 569CONFIG_BLK_DEV_RAM_COUNT=16
@@ -581,11 +611,11 @@ CONFIG_SMC91X=y
581# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set 611# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
582# CONFIG_B44 is not set 612# CONFIG_B44 is not set
583# CONFIG_KS8842 is not set 613# CONFIG_KS8842 is not set
614# CONFIG_KS8851_MLL is not set
584# CONFIG_NETDEV_1000 is not set 615# CONFIG_NETDEV_1000 is not set
585# CONFIG_NETDEV_10000 is not set 616# CONFIG_NETDEV_10000 is not set
586CONFIG_WLAN=y 617CONFIG_WLAN=y
587# CONFIG_WLAN_PRE80211 is not set 618# CONFIG_HOSTAP is not set
588# CONFIG_WLAN_80211 is not set
589 619
590# 620#
591# Enable WiMAX (Networking options) to see the WiMAX drivers 621# Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -605,6 +635,7 @@ CONFIG_WLAN=y
605CONFIG_INPUT=y 635CONFIG_INPUT=y
606# CONFIG_INPUT_FF_MEMLESS is not set 636# CONFIG_INPUT_FF_MEMLESS is not set
607# CONFIG_INPUT_POLLDEV is not set 637# CONFIG_INPUT_POLLDEV is not set
638# CONFIG_INPUT_SPARSEKMAP is not set
608 639
609# 640#
610# Userland interfaces 641# Userland interfaces
@@ -698,7 +729,6 @@ CONFIG_I2C_SH7760=y
698# 729#
699# Miscellaneous I2C Chip support 730# Miscellaneous I2C Chip support
700# 731#
701# CONFIG_DS1682 is not set
702# CONFIG_SENSORS_TSL2550 is not set 732# CONFIG_SENSORS_TSL2550 is not set
703CONFIG_I2C_DEBUG_CORE=y 733CONFIG_I2C_DEBUG_CORE=y
704CONFIG_I2C_DEBUG_ALGO=y 734CONFIG_I2C_DEBUG_ALGO=y
@@ -727,15 +757,18 @@ CONFIG_SSB_POSSIBLE=y
727# 757#
728# CONFIG_MFD_CORE is not set 758# CONFIG_MFD_CORE is not set
729# CONFIG_MFD_SM501 is not set 759# CONFIG_MFD_SM501 is not set
760# CONFIG_MFD_SH_MOBILE_SDHI is not set
730# CONFIG_HTC_PASIC3 is not set 761# CONFIG_HTC_PASIC3 is not set
731# CONFIG_TWL4030_CORE is not set 762# CONFIG_TWL4030_CORE is not set
732# CONFIG_MFD_TMIO is not set 763# CONFIG_MFD_TMIO is not set
733# CONFIG_PMIC_DA903X is not set 764# CONFIG_PMIC_DA903X is not set
765# CONFIG_PMIC_ADP5520 is not set
734# CONFIG_MFD_WM8400 is not set 766# CONFIG_MFD_WM8400 is not set
735# CONFIG_MFD_WM831X is not set 767# CONFIG_MFD_WM831X is not set
736# CONFIG_MFD_WM8350_I2C is not set 768# CONFIG_MFD_WM8350_I2C is not set
737# CONFIG_MFD_PCF50633 is not set 769# CONFIG_MFD_PCF50633 is not set
738# CONFIG_AB3100_CORE is not set 770# CONFIG_AB3100_CORE is not set
771# CONFIG_MFD_88PM8607 is not set
739# CONFIG_REGULATOR is not set 772# CONFIG_REGULATOR is not set
740# CONFIG_MEDIA_SUPPORT is not set 773# CONFIG_MEDIA_SUPPORT is not set
741 774
@@ -1072,9 +1105,6 @@ CONFIG_BRANCH_PROFILE_NONE=y
1072CONFIG_HAVE_ARCH_KGDB=y 1105CONFIG_HAVE_ARCH_KGDB=y
1073# CONFIG_KGDB is not set 1106# CONFIG_KGDB is not set
1074# CONFIG_SH_STANDARD_BIOS is not set 1107# CONFIG_SH_STANDARD_BIOS is not set
1075CONFIG_EARLY_SCIF_CONSOLE=y
1076CONFIG_EARLY_SCIF_CONSOLE_PORT=0xffe80000
1077CONFIG_EARLY_PRINTK=y
1078# CONFIG_STACK_DEBUG is not set 1108# CONFIG_STACK_DEBUG is not set
1079# CONFIG_DEBUG_STACK_USAGE is not set 1109# CONFIG_DEBUG_STACK_USAGE is not set
1080# CONFIG_4KSTACKS is not set 1110# CONFIG_4KSTACKS is not set
@@ -1088,7 +1118,11 @@ CONFIG_DUMP_CODE=y
1088# CONFIG_KEYS is not set 1118# CONFIG_KEYS is not set
1089# CONFIG_SECURITY is not set 1119# CONFIG_SECURITY is not set
1090# CONFIG_SECURITYFS is not set 1120# CONFIG_SECURITYFS is not set
1091# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1121# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1122# CONFIG_DEFAULT_SECURITY_SMACK is not set
1123# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1124CONFIG_DEFAULT_SECURITY_DAC=y
1125CONFIG_DEFAULT_SECURITY=""
1092CONFIG_CRYPTO=y 1126CONFIG_CRYPTO=y
1093 1127
1094# 1128#
diff --git a/arch/sh/configs/espt_defconfig b/arch/sh/configs/espt_defconfig
index 9b785517abcf..f899e5613f86 100644
--- a/arch/sh/configs/espt_defconfig
+++ b/arch/sh/configs/espt_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Thu Sep 24 17:58:18 2009 4# Mon Jan 4 11:26:55 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -20,6 +20,7 @@ CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set 21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
22CONFIG_ARCH_HIBERNATION_POSSIBLE=y 22CONFIG_ARCH_HIBERNATION_POSSIBLE=y
23CONFIG_SYS_SUPPORTS_HUGETLBFS=y
23CONFIG_SYS_SUPPORTS_TMU=y 24CONFIG_SYS_SUPPORTS_TMU=y
24CONFIG_STACKTRACE_SUPPORT=y 25CONFIG_STACKTRACE_SUPPORT=y
25CONFIG_LOCKDEP_SUPPORT=y 26CONFIG_LOCKDEP_SUPPORT=y
@@ -29,6 +30,7 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
29CONFIG_ARCH_NO_VIRT_TO_BUS=y 30CONFIG_ARCH_NO_VIRT_TO_BUS=y
30CONFIG_ARCH_HAS_DEFAULT_IDLE=y 31CONFIG_ARCH_HAS_DEFAULT_IDLE=y
31CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
33CONFIG_DMA_NONCOHERENT=y
32CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 34CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
33CONFIG_CONSTRUCTORS=y 35CONFIG_CONSTRUCTORS=y
34 36
@@ -59,6 +61,7 @@ CONFIG_SYSVIPC_SYSCTL=y
59# 61#
60CONFIG_TREE_RCU=y 62CONFIG_TREE_RCU=y
61# CONFIG_TREE_PREEMPT_RCU is not set 63# CONFIG_TREE_PREEMPT_RCU is not set
64# CONFIG_TINY_RCU is not set
62# CONFIG_RCU_TRACE is not set 65# CONFIG_RCU_TRACE is not set
63CONFIG_RCU_FANOUT=32 66CONFIG_RCU_FANOUT=32
64# CONFIG_RCU_FANOUT_EXACT is not set 67# CONFIG_RCU_FANOUT_EXACT is not set
@@ -103,6 +106,7 @@ CONFIG_EVENTFD=y
103CONFIG_SHMEM=y 106CONFIG_SHMEM=y
104CONFIG_AIO=y 107CONFIG_AIO=y
105CONFIG_HAVE_PERF_EVENTS=y 108CONFIG_HAVE_PERF_EVENTS=y
109CONFIG_PERF_USE_VMALLOC=y
106 110
107# 111#
108# Kernel Performance Events And Counters 112# Kernel Performance Events And Counters
@@ -124,6 +128,7 @@ CONFIG_HAVE_IOREMAP_PROT=y
124CONFIG_HAVE_KPROBES=y 128CONFIG_HAVE_KPROBES=y
125CONFIG_HAVE_KRETPROBES=y 129CONFIG_HAVE_KRETPROBES=y
126CONFIG_HAVE_ARCH_TRACEHOOK=y 130CONFIG_HAVE_ARCH_TRACEHOOK=y
131CONFIG_HAVE_DMA_ATTRS=y
127CONFIG_HAVE_CLK=y 132CONFIG_HAVE_CLK=y
128CONFIG_HAVE_DMA_API_DEBUG=y 133CONFIG_HAVE_DMA_API_DEBUG=y
129 134
@@ -150,14 +155,41 @@ CONFIG_LBDAF=y
150# IO Schedulers 155# IO Schedulers
151# 156#
152CONFIG_IOSCHED_NOOP=y 157CONFIG_IOSCHED_NOOP=y
153CONFIG_IOSCHED_AS=y
154CONFIG_IOSCHED_DEADLINE=y 158CONFIG_IOSCHED_DEADLINE=y
155CONFIG_IOSCHED_CFQ=y 159CONFIG_IOSCHED_CFQ=y
156CONFIG_DEFAULT_AS=y
157# CONFIG_DEFAULT_DEADLINE is not set 160# CONFIG_DEFAULT_DEADLINE is not set
158# CONFIG_DEFAULT_CFQ is not set 161CONFIG_DEFAULT_CFQ=y
159# CONFIG_DEFAULT_NOOP is not set 162# CONFIG_DEFAULT_NOOP is not set
160CONFIG_DEFAULT_IOSCHED="anticipatory" 163CONFIG_DEFAULT_IOSCHED="cfq"
164# CONFIG_INLINE_SPIN_TRYLOCK is not set
165# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
166# CONFIG_INLINE_SPIN_LOCK is not set
167# CONFIG_INLINE_SPIN_LOCK_BH is not set
168# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
169# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
170CONFIG_INLINE_SPIN_UNLOCK=y
171# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
172CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
173# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
174# CONFIG_INLINE_READ_TRYLOCK is not set
175# CONFIG_INLINE_READ_LOCK is not set
176# CONFIG_INLINE_READ_LOCK_BH is not set
177# CONFIG_INLINE_READ_LOCK_IRQ is not set
178# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
179CONFIG_INLINE_READ_UNLOCK=y
180# CONFIG_INLINE_READ_UNLOCK_BH is not set
181CONFIG_INLINE_READ_UNLOCK_IRQ=y
182# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
183# CONFIG_INLINE_WRITE_TRYLOCK is not set
184# CONFIG_INLINE_WRITE_LOCK is not set
185# CONFIG_INLINE_WRITE_LOCK_BH is not set
186# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
187# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
188CONFIG_INLINE_WRITE_UNLOCK=y
189# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
190CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
191# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
192# CONFIG_MUTEX_SPIN_ON_OWNER is not set
161# CONFIG_FREEZER is not set 193# CONFIG_FREEZER is not set
162 194
163# 195#
@@ -211,6 +243,7 @@ CONFIG_FORCE_MAX_ZONEORDER=11
211CONFIG_MEMORY_START=0x0c000000 243CONFIG_MEMORY_START=0x0c000000
212CONFIG_MEMORY_SIZE=0x04000000 244CONFIG_MEMORY_SIZE=0x04000000
213CONFIG_29BIT=y 245CONFIG_29BIT=y
246# CONFIG_PMB_ENABLE is not set
214CONFIG_VSYSCALL=y 247CONFIG_VSYSCALL=y
215CONFIG_ARCH_FLATMEM_ENABLE=y 248CONFIG_ARCH_FLATMEM_ENABLE=y
216CONFIG_ARCH_SPARSEMEM_ENABLE=y 249CONFIG_ARCH_SPARSEMEM_ENABLE=y
@@ -237,8 +270,6 @@ CONFIG_MIGRATION=y
237# CONFIG_PHYS_ADDR_T_64BIT is not set 270# CONFIG_PHYS_ADDR_T_64BIT is not set
238CONFIG_ZONE_DMA_FLAG=0 271CONFIG_ZONE_DMA_FLAG=0
239CONFIG_NR_QUICK=2 272CONFIG_NR_QUICK=2
240CONFIG_HAVE_MLOCK=y
241CONFIG_HAVE_MLOCKED_PAGE_BIT=y
242# CONFIG_KSM is not set 273# CONFIG_KSM is not set
243CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 274CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
244 275
@@ -419,7 +450,13 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
419# CONFIG_IRDA is not set 450# CONFIG_IRDA is not set
420# CONFIG_BT is not set 451# CONFIG_BT is not set
421# CONFIG_AF_RXRPC is not set 452# CONFIG_AF_RXRPC is not set
422# CONFIG_WIRELESS is not set 453CONFIG_WIRELESS=y
454# CONFIG_CFG80211 is not set
455# CONFIG_LIB80211 is not set
456
457#
458# CFG80211 needs to be enabled for MAC80211
459#
423# CONFIG_WIMAX is not set 460# CONFIG_WIMAX is not set
424# CONFIG_RFKILL is not set 461# CONFIG_RFKILL is not set
425# CONFIG_NET_9P is not set 462# CONFIG_NET_9P is not set
@@ -498,7 +535,6 @@ CONFIG_MTD_CFI_UTIL=y
498CONFIG_MTD_COMPLEX_MAPPINGS=y 535CONFIG_MTD_COMPLEX_MAPPINGS=y
499CONFIG_MTD_PHYSMAP=y 536CONFIG_MTD_PHYSMAP=y
500# CONFIG_MTD_PHYSMAP_COMPAT is not set 537# CONFIG_MTD_PHYSMAP_COMPAT is not set
501# CONFIG_MTD_GPIO_ADDR is not set
502# CONFIG_MTD_PLATRAM is not set 538# CONFIG_MTD_PLATRAM is not set
503 539
504# 540#
@@ -531,6 +567,10 @@ CONFIG_MTD_PHYSMAP=y
531CONFIG_BLK_DEV=y 567CONFIG_BLK_DEV=y
532# CONFIG_BLK_DEV_COW_COMMON is not set 568# CONFIG_BLK_DEV_COW_COMMON is not set
533# CONFIG_BLK_DEV_LOOP is not set 569# CONFIG_BLK_DEV_LOOP is not set
570
571#
572# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
573#
534# CONFIG_BLK_DEV_NBD is not set 574# CONFIG_BLK_DEV_NBD is not set
535# CONFIG_BLK_DEV_UB is not set 575# CONFIG_BLK_DEV_UB is not set
536# CONFIG_BLK_DEV_RAM is not set 576# CONFIG_BLK_DEV_RAM is not set
@@ -629,11 +669,12 @@ CONFIG_SH_ETH=y
629# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set 669# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
630# CONFIG_B44 is not set 670# CONFIG_B44 is not set
631# CONFIG_KS8842 is not set 671# CONFIG_KS8842 is not set
672# CONFIG_KS8851_MLL is not set
632# CONFIG_NETDEV_1000 is not set 673# CONFIG_NETDEV_1000 is not set
633# CONFIG_NETDEV_10000 is not set 674# CONFIG_NETDEV_10000 is not set
634CONFIG_WLAN=y 675CONFIG_WLAN=y
635# CONFIG_WLAN_PRE80211 is not set 676# CONFIG_USB_ZD1201 is not set
636# CONFIG_WLAN_80211 is not set 677# CONFIG_HOSTAP is not set
637 678
638# 679#
639# Enable WiMAX (Networking options) to see the WiMAX drivers 680# Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -662,6 +703,7 @@ CONFIG_WLAN=y
662CONFIG_INPUT=y 703CONFIG_INPUT=y
663# CONFIG_INPUT_FF_MEMLESS is not set 704# CONFIG_INPUT_FF_MEMLESS is not set
664# CONFIG_INPUT_POLLDEV is not set 705# CONFIG_INPUT_POLLDEV is not set
706# CONFIG_INPUT_SPARSEKMAP is not set
665 707
666# 708#
667# Userland interfaces 709# Userland interfaces
@@ -745,6 +787,7 @@ CONFIG_SSB_POSSIBLE=y
745# 787#
746# CONFIG_MFD_CORE is not set 788# CONFIG_MFD_CORE is not set
747# CONFIG_MFD_SM501 is not set 789# CONFIG_MFD_SM501 is not set
790# CONFIG_MFD_SH_MOBILE_SDHI is not set
748# CONFIG_HTC_PASIC3 is not set 791# CONFIG_HTC_PASIC3 is not set
749# CONFIG_MFD_TMIO is not set 792# CONFIG_MFD_TMIO is not set
750# CONFIG_REGULATOR is not set 793# CONFIG_REGULATOR is not set
@@ -1102,10 +1145,11 @@ CONFIG_DEBUG_FS=y
1102# CONFIG_HEADERS_CHECK is not set 1145# CONFIG_HEADERS_CHECK is not set
1103# CONFIG_DEBUG_KERNEL is not set 1146# CONFIG_DEBUG_KERNEL is not set
1104CONFIG_STACKTRACE=y 1147CONFIG_STACKTRACE=y
1105# CONFIG_DEBUG_BUGVERBOSE is not set 1148CONFIG_DEBUG_BUGVERBOSE=y
1106# CONFIG_DEBUG_MEMORY_INIT is not set 1149# CONFIG_DEBUG_MEMORY_INIT is not set
1107# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1150# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1108# CONFIG_LATENCYTOP is not set 1151# CONFIG_LATENCYTOP is not set
1152# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1109CONFIG_NOP_TRACER=y 1153CONFIG_NOP_TRACER=y
1110CONFIG_HAVE_FUNCTION_TRACER=y 1154CONFIG_HAVE_FUNCTION_TRACER=y
1111CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 1155CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
@@ -1125,7 +1169,6 @@ CONFIG_TRACING_SUPPORT=y
1125# CONFIG_SAMPLES is not set 1169# CONFIG_SAMPLES is not set
1126CONFIG_HAVE_ARCH_KGDB=y 1170CONFIG_HAVE_ARCH_KGDB=y
1127# CONFIG_SH_STANDARD_BIOS is not set 1171# CONFIG_SH_STANDARD_BIOS is not set
1128# CONFIG_EARLY_SCIF_CONSOLE is not set
1129# CONFIG_DWARF_UNWINDER is not set 1172# CONFIG_DWARF_UNWINDER is not set
1130 1173
1131# 1174#
@@ -1134,7 +1177,11 @@ CONFIG_HAVE_ARCH_KGDB=y
1134# CONFIG_KEYS is not set 1177# CONFIG_KEYS is not set
1135# CONFIG_SECURITY is not set 1178# CONFIG_SECURITY is not set
1136# CONFIG_SECURITYFS is not set 1179# CONFIG_SECURITYFS is not set
1137# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1180# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1181# CONFIG_DEFAULT_SECURITY_SMACK is not set
1182# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1183CONFIG_DEFAULT_SECURITY_DAC=y
1184CONFIG_DEFAULT_SECURITY=""
1138CONFIG_CRYPTO=y 1185CONFIG_CRYPTO=y
1139 1186
1140# 1187#
diff --git a/arch/sh/configs/hp6xx_defconfig b/arch/sh/configs/hp6xx_defconfig
index f59be446f829..06644908631e 100644
--- a/arch/sh/configs/hp6xx_defconfig
+++ b/arch/sh/configs/hp6xx_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Thu Sep 24 17:59:45 2009 4# Mon Jan 4 11:30:31 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -30,6 +30,7 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
30CONFIG_ARCH_NO_VIRT_TO_BUS=y 30CONFIG_ARCH_NO_VIRT_TO_BUS=y
31CONFIG_ARCH_HAS_DEFAULT_IDLE=y 31CONFIG_ARCH_HAS_DEFAULT_IDLE=y
32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
33CONFIG_DMA_NONCOHERENT=y
33CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 34CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
34CONFIG_CONSTRUCTORS=y 35CONFIG_CONSTRUCTORS=y
35 36
@@ -57,6 +58,7 @@ CONFIG_BSD_PROCESS_ACCT=y
57# 58#
58CONFIG_TREE_RCU=y 59CONFIG_TREE_RCU=y
59# CONFIG_TREE_PREEMPT_RCU is not set 60# CONFIG_TREE_PREEMPT_RCU is not set
61# CONFIG_TINY_RCU is not set
60# CONFIG_RCU_TRACE is not set 62# CONFIG_RCU_TRACE is not set
61CONFIG_RCU_FANOUT=32 63CONFIG_RCU_FANOUT=32
62# CONFIG_RCU_FANOUT_EXACT is not set 64# CONFIG_RCU_FANOUT_EXACT is not set
@@ -92,6 +94,7 @@ CONFIG_EVENTFD=y
92CONFIG_SHMEM=y 94CONFIG_SHMEM=y
93CONFIG_AIO=y 95CONFIG_AIO=y
94CONFIG_HAVE_PERF_EVENTS=y 96CONFIG_HAVE_PERF_EVENTS=y
97CONFIG_PERF_USE_VMALLOC=y
95 98
96# 99#
97# Kernel Performance Events And Counters 100# Kernel Performance Events And Counters
@@ -109,6 +112,7 @@ CONFIG_HAVE_IOREMAP_PROT=y
109CONFIG_HAVE_KPROBES=y 112CONFIG_HAVE_KPROBES=y
110CONFIG_HAVE_KRETPROBES=y 113CONFIG_HAVE_KRETPROBES=y
111CONFIG_HAVE_ARCH_TRACEHOOK=y 114CONFIG_HAVE_ARCH_TRACEHOOK=y
115CONFIG_HAVE_DMA_ATTRS=y
112CONFIG_HAVE_CLK=y 116CONFIG_HAVE_CLK=y
113CONFIG_HAVE_DMA_API_DEBUG=y 117CONFIG_HAVE_DMA_API_DEBUG=y
114 118
@@ -130,14 +134,41 @@ CONFIG_LBDAF=y
130# IO Schedulers 134# IO Schedulers
131# 135#
132CONFIG_IOSCHED_NOOP=y 136CONFIG_IOSCHED_NOOP=y
133CONFIG_IOSCHED_AS=y
134CONFIG_IOSCHED_DEADLINE=y 137CONFIG_IOSCHED_DEADLINE=y
135CONFIG_IOSCHED_CFQ=y 138CONFIG_IOSCHED_CFQ=y
136CONFIG_DEFAULT_AS=y
137# CONFIG_DEFAULT_DEADLINE is not set 139# CONFIG_DEFAULT_DEADLINE is not set
138# CONFIG_DEFAULT_CFQ is not set 140CONFIG_DEFAULT_CFQ=y
139# CONFIG_DEFAULT_NOOP is not set 141# CONFIG_DEFAULT_NOOP is not set
140CONFIG_DEFAULT_IOSCHED="anticipatory" 142CONFIG_DEFAULT_IOSCHED="cfq"
143# CONFIG_INLINE_SPIN_TRYLOCK is not set
144# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
145# CONFIG_INLINE_SPIN_LOCK is not set
146# CONFIG_INLINE_SPIN_LOCK_BH is not set
147# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
148# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
149CONFIG_INLINE_SPIN_UNLOCK=y
150# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
151CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
152# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
153# CONFIG_INLINE_READ_TRYLOCK is not set
154# CONFIG_INLINE_READ_LOCK is not set
155# CONFIG_INLINE_READ_LOCK_BH is not set
156# CONFIG_INLINE_READ_LOCK_IRQ is not set
157# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
158CONFIG_INLINE_READ_UNLOCK=y
159# CONFIG_INLINE_READ_UNLOCK_BH is not set
160CONFIG_INLINE_READ_UNLOCK_IRQ=y
161# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
162# CONFIG_INLINE_WRITE_TRYLOCK is not set
163# CONFIG_INLINE_WRITE_LOCK is not set
164# CONFIG_INLINE_WRITE_LOCK_BH is not set
165# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
166# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
167CONFIG_INLINE_WRITE_UNLOCK=y
168# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
169CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
170# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
171# CONFIG_MUTEX_SPIN_ON_OWNER is not set
141CONFIG_FREEZER=y 172CONFIG_FREEZER=y
142 173
143# 174#
@@ -213,8 +244,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
213# CONFIG_PHYS_ADDR_T_64BIT is not set 244# CONFIG_PHYS_ADDR_T_64BIT is not set
214CONFIG_ZONE_DMA_FLAG=0 245CONFIG_ZONE_DMA_FLAG=0
215CONFIG_NR_QUICK=2 246CONFIG_NR_QUICK=2
216CONFIG_HAVE_MLOCK=y
217CONFIG_HAVE_MLOCKED_PAGE_BIT=y
218# CONFIG_KSM is not set 247# CONFIG_KSM is not set
219CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 248CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
220 249
@@ -261,8 +290,8 @@ CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
261# 290#
262# DMA support 291# DMA support
263# 292#
264CONFIG_SH_DMA_API=y
265CONFIG_SH_DMA=y 293CONFIG_SH_DMA=y
294CONFIG_SH_DMA_API=y
266CONFIG_NR_ONCHIP_DMA_CHANNELS=6 295CONFIG_NR_ONCHIP_DMA_CHANNELS=6
267# CONFIG_NR_DMA_CHANNELS_BOOL is not set 296# CONFIG_NR_DMA_CHANNELS_BOOL is not set
268 297
@@ -313,7 +342,6 @@ CONFIG_ENTRY_OFFSET=0x00001000
313# 342#
314# CONFIG_ARCH_SUPPORTS_MSI is not set 343# CONFIG_ARCH_SUPPORTS_MSI is not set
315CONFIG_PCCARD=y 344CONFIG_PCCARD=y
316# CONFIG_PCMCIA_DEBUG is not set
317CONFIG_PCMCIA=y 345CONFIG_PCMCIA=y
318CONFIG_PCMCIA_LOAD_CIS=y 346CONFIG_PCMCIA_LOAD_CIS=y
319CONFIG_PCMCIA_IOCTL=y 347CONFIG_PCMCIA_IOCTL=y
@@ -363,6 +391,10 @@ CONFIG_EXTRA_FIRMWARE=""
363CONFIG_BLK_DEV=y 391CONFIG_BLK_DEV=y
364# CONFIG_BLK_DEV_COW_COMMON is not set 392# CONFIG_BLK_DEV_COW_COMMON is not set
365# CONFIG_BLK_DEV_LOOP is not set 393# CONFIG_BLK_DEV_LOOP is not set
394
395#
396# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
397#
366# CONFIG_BLK_DEV_RAM is not set 398# CONFIG_BLK_DEV_RAM is not set
367# CONFIG_CDROM_PKTCDVD is not set 399# CONFIG_CDROM_PKTCDVD is not set
368# CONFIG_BLK_DEV_HD is not set 400# CONFIG_BLK_DEV_HD is not set
@@ -432,6 +464,7 @@ CONFIG_PATA_PLATFORM=y
432CONFIG_INPUT=y 464CONFIG_INPUT=y
433# CONFIG_INPUT_FF_MEMLESS is not set 465# CONFIG_INPUT_FF_MEMLESS is not set
434CONFIG_INPUT_POLLDEV=y 466CONFIG_INPUT_POLLDEV=y
467# CONFIG_INPUT_SPARSEKMAP is not set
435 468
436# 469#
437# Userland interfaces 470# Userland interfaces
@@ -460,6 +493,7 @@ CONFIG_KEYBOARD_HP6XX=y
460# CONFIG_INPUT_TABLET is not set 493# CONFIG_INPUT_TABLET is not set
461CONFIG_INPUT_TOUCHSCREEN=y 494CONFIG_INPUT_TOUCHSCREEN=y
462# CONFIG_TOUCHSCREEN_AD7879 is not set 495# CONFIG_TOUCHSCREEN_AD7879 is not set
496# CONFIG_TOUCHSCREEN_DYNAPRO is not set
463# CONFIG_TOUCHSCREEN_FUJITSU is not set 497# CONFIG_TOUCHSCREEN_FUJITSU is not set
464# CONFIG_TOUCHSCREEN_GUNZE is not set 498# CONFIG_TOUCHSCREEN_GUNZE is not set
465# CONFIG_TOUCHSCREEN_ELO is not set 499# CONFIG_TOUCHSCREEN_ELO is not set
@@ -483,6 +517,7 @@ CONFIG_SERIO=y
483# CONFIG_SERIO_SERPORT is not set 517# CONFIG_SERIO_SERPORT is not set
484# CONFIG_SERIO_LIBPS2 is not set 518# CONFIG_SERIO_LIBPS2 is not set
485# CONFIG_SERIO_RAW is not set 519# CONFIG_SERIO_RAW is not set
520# CONFIG_SERIO_ALTERA_PS2 is not set
486# CONFIG_GAMEPORT is not set 521# CONFIG_GAMEPORT is not set
487 522
488# 523#
@@ -550,6 +585,7 @@ CONFIG_SSB_POSSIBLE=y
550# 585#
551# CONFIG_MFD_CORE is not set 586# CONFIG_MFD_CORE is not set
552# CONFIG_MFD_SM501 is not set 587# CONFIG_MFD_SM501 is not set
588# CONFIG_MFD_SH_MOBILE_SDHI is not set
553# CONFIG_HTC_PASIC3 is not set 589# CONFIG_HTC_PASIC3 is not set
554# CONFIG_MFD_TMIO is not set 590# CONFIG_MFD_TMIO is not set
555# CONFIG_REGULATOR is not set 591# CONFIG_REGULATOR is not set
@@ -659,7 +695,9 @@ CONFIG_RTC_INTF_DEV=y
659# CONFIG_RTC_DRV_M48T86 is not set 695# CONFIG_RTC_DRV_M48T86 is not set
660# CONFIG_RTC_DRV_M48T35 is not set 696# CONFIG_RTC_DRV_M48T35 is not set
661# CONFIG_RTC_DRV_M48T59 is not set 697# CONFIG_RTC_DRV_M48T59 is not set
698# CONFIG_RTC_DRV_MSM6242 is not set
662# CONFIG_RTC_DRV_BQ4802 is not set 699# CONFIG_RTC_DRV_BQ4802 is not set
700# CONFIG_RTC_DRV_RP5C01 is not set
663# CONFIG_RTC_DRV_V3020 is not set 701# CONFIG_RTC_DRV_V3020 is not set
664 702
665# 703#
@@ -684,6 +722,7 @@ CONFIG_EXT2_FS=y
684# CONFIG_EXT2_FS_XIP is not set 722# CONFIG_EXT2_FS_XIP is not set
685# CONFIG_EXT3_FS is not set 723# CONFIG_EXT3_FS is not set
686# CONFIG_EXT4_FS is not set 724# CONFIG_EXT4_FS is not set
725CONFIG_EXT4_USE_FOR_EXT23=y
687# CONFIG_REISERFS_FS is not set 726# CONFIG_REISERFS_FS is not set
688# CONFIG_JFS_FS is not set 727# CONFIG_JFS_FS is not set
689# CONFIG_FS_POSIX_ACL is not set 728# CONFIG_FS_POSIX_ACL is not set
@@ -731,7 +770,6 @@ CONFIG_PROC_SYSCTL=y
731CONFIG_PROC_PAGE_MONITOR=y 770CONFIG_PROC_PAGE_MONITOR=y
732CONFIG_SYSFS=y 771CONFIG_SYSFS=y
733# CONFIG_TMPFS is not set 772# CONFIG_TMPFS is not set
734# CONFIG_HUGETLBFS is not set
735# CONFIG_HUGETLB_PAGE is not set 773# CONFIG_HUGETLB_PAGE is not set
736# CONFIG_CONFIGFS_FS is not set 774# CONFIG_CONFIGFS_FS is not set
737CONFIG_MISC_FILESYSTEMS=y 775CONFIG_MISC_FILESYSTEMS=y
@@ -813,10 +851,11 @@ CONFIG_FRAME_WARN=1024
813# CONFIG_DEBUG_FS is not set 851# CONFIG_DEBUG_FS is not set
814# CONFIG_HEADERS_CHECK is not set 852# CONFIG_HEADERS_CHECK is not set
815# CONFIG_DEBUG_KERNEL is not set 853# CONFIG_DEBUG_KERNEL is not set
816# CONFIG_DEBUG_BUGVERBOSE is not set 854CONFIG_DEBUG_BUGVERBOSE=y
817# CONFIG_DEBUG_MEMORY_INIT is not set 855# CONFIG_DEBUG_MEMORY_INIT is not set
818# CONFIG_RCU_CPU_STALL_DETECTOR is not set 856# CONFIG_RCU_CPU_STALL_DETECTOR is not set
819# CONFIG_LATENCYTOP is not set 857# CONFIG_LATENCYTOP is not set
858# CONFIG_SYSCTL_SYSCALL_CHECK is not set
820CONFIG_HAVE_FUNCTION_TRACER=y 859CONFIG_HAVE_FUNCTION_TRACER=y
821CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 860CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
822CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y 861CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
@@ -829,7 +868,6 @@ CONFIG_TRACING_SUPPORT=y
829# CONFIG_SAMPLES is not set 868# CONFIG_SAMPLES is not set
830CONFIG_HAVE_ARCH_KGDB=y 869CONFIG_HAVE_ARCH_KGDB=y
831# CONFIG_SH_STANDARD_BIOS is not set 870# CONFIG_SH_STANDARD_BIOS is not set
832# CONFIG_EARLY_SCIF_CONSOLE is not set
833# CONFIG_DWARF_UNWINDER is not set 871# CONFIG_DWARF_UNWINDER is not set
834 872
835# 873#
@@ -838,7 +876,11 @@ CONFIG_HAVE_ARCH_KGDB=y
838# CONFIG_KEYS is not set 876# CONFIG_KEYS is not set
839# CONFIG_SECURITY is not set 877# CONFIG_SECURITY is not set
840# CONFIG_SECURITYFS is not set 878# CONFIG_SECURITYFS is not set
841# CONFIG_SECURITY_FILE_CAPABILITIES is not set 879# CONFIG_DEFAULT_SECURITY_SELINUX is not set
880# CONFIG_DEFAULT_SECURITY_SMACK is not set
881# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
882CONFIG_DEFAULT_SECURITY_DAC=y
883CONFIG_DEFAULT_SECURITY=""
842CONFIG_CRYPTO=y 884CONFIG_CRYPTO=y
843 885
844# 886#
diff --git a/arch/sh/configs/kfr2r09-romimage_defconfig b/arch/sh/configs/kfr2r09-romimage_defconfig
index 02590e127f74..3d834e59e8f9 100644
--- a/arch/sh/configs/kfr2r09-romimage_defconfig
+++ b/arch/sh/configs/kfr2r09-romimage_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Thu Sep 24 18:01:48 2009 4# Mon Jan 4 11:31:09 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -20,6 +20,7 @@ CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
21CONFIG_ARCH_SUSPEND_POSSIBLE=y 21CONFIG_ARCH_SUSPEND_POSSIBLE=y
22CONFIG_ARCH_HIBERNATION_POSSIBLE=y 22CONFIG_ARCH_HIBERNATION_POSSIBLE=y
23CONFIG_SYS_SUPPORTS_HUGETLBFS=y
23CONFIG_SYS_SUPPORTS_CMT=y 24CONFIG_SYS_SUPPORTS_CMT=y
24CONFIG_SYS_SUPPORTS_TMU=y 25CONFIG_SYS_SUPPORTS_TMU=y
25CONFIG_STACKTRACE_SUPPORT=y 26CONFIG_STACKTRACE_SUPPORT=y
@@ -30,6 +31,7 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
30CONFIG_ARCH_NO_VIRT_TO_BUS=y 31CONFIG_ARCH_NO_VIRT_TO_BUS=y
31CONFIG_ARCH_HAS_DEFAULT_IDLE=y 32CONFIG_ARCH_HAS_DEFAULT_IDLE=y
32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
34CONFIG_DMA_NONCOHERENT=y
33CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
34CONFIG_CONSTRUCTORS=y 36CONFIG_CONSTRUCTORS=y
35 37
@@ -60,6 +62,7 @@ CONFIG_BSD_PROCESS_ACCT=y
60# 62#
61CONFIG_TREE_RCU=y 63CONFIG_TREE_RCU=y
62# CONFIG_TREE_PREEMPT_RCU is not set 64# CONFIG_TREE_PREEMPT_RCU is not set
65# CONFIG_TINY_RCU is not set
63# CONFIG_RCU_TRACE is not set 66# CONFIG_RCU_TRACE is not set
64CONFIG_RCU_FANOUT=32 67CONFIG_RCU_FANOUT=32
65# CONFIG_RCU_FANOUT_EXACT is not set 68# CONFIG_RCU_FANOUT_EXACT is not set
@@ -102,6 +105,7 @@ CONFIG_EVENTFD=y
102CONFIG_SHMEM=y 105CONFIG_SHMEM=y
103CONFIG_AIO=y 106CONFIG_AIO=y
104CONFIG_HAVE_PERF_EVENTS=y 107CONFIG_HAVE_PERF_EVENTS=y
108CONFIG_PERF_USE_VMALLOC=y
105 109
106# 110#
107# Kernel Performance Events And Counters 111# Kernel Performance Events And Counters
@@ -119,6 +123,7 @@ CONFIG_HAVE_IOREMAP_PROT=y
119CONFIG_HAVE_KPROBES=y 123CONFIG_HAVE_KPROBES=y
120CONFIG_HAVE_KRETPROBES=y 124CONFIG_HAVE_KRETPROBES=y
121CONFIG_HAVE_ARCH_TRACEHOOK=y 125CONFIG_HAVE_ARCH_TRACEHOOK=y
126CONFIG_HAVE_DMA_ATTRS=y
122CONFIG_HAVE_CLK=y 127CONFIG_HAVE_CLK=y
123CONFIG_HAVE_DMA_API_DEBUG=y 128CONFIG_HAVE_DMA_API_DEBUG=y
124 129
@@ -133,6 +138,35 @@ CONFIG_RT_MUTEXES=y
133CONFIG_BASE_SMALL=0 138CONFIG_BASE_SMALL=0
134# CONFIG_MODULES is not set 139# CONFIG_MODULES is not set
135# CONFIG_BLOCK is not set 140# CONFIG_BLOCK is not set
141# CONFIG_INLINE_SPIN_TRYLOCK is not set
142# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
143# CONFIG_INLINE_SPIN_LOCK is not set
144# CONFIG_INLINE_SPIN_LOCK_BH is not set
145# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
146# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
147CONFIG_INLINE_SPIN_UNLOCK=y
148# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
149CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
150# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
151# CONFIG_INLINE_READ_TRYLOCK is not set
152# CONFIG_INLINE_READ_LOCK is not set
153# CONFIG_INLINE_READ_LOCK_BH is not set
154# CONFIG_INLINE_READ_LOCK_IRQ is not set
155# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
156CONFIG_INLINE_READ_UNLOCK=y
157# CONFIG_INLINE_READ_UNLOCK_BH is not set
158CONFIG_INLINE_READ_UNLOCK_IRQ=y
159# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
160# CONFIG_INLINE_WRITE_TRYLOCK is not set
161# CONFIG_INLINE_WRITE_LOCK is not set
162# CONFIG_INLINE_WRITE_LOCK_BH is not set
163# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
164# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
165CONFIG_INLINE_WRITE_UNLOCK=y
166# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
167CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
168# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
169# CONFIG_MUTEX_SPIN_ON_OWNER is not set
136# CONFIG_FREEZER is not set 170# CONFIG_FREEZER is not set
137 171
138# 172#
@@ -188,6 +222,7 @@ CONFIG_FORCE_MAX_ZONEORDER=11
188CONFIG_MEMORY_START=0x08000000 222CONFIG_MEMORY_START=0x08000000
189CONFIG_MEMORY_SIZE=0x08000000 223CONFIG_MEMORY_SIZE=0x08000000
190CONFIG_29BIT=y 224CONFIG_29BIT=y
225# CONFIG_PMB_ENABLE is not set
191# CONFIG_X2TLB is not set 226# CONFIG_X2TLB is not set
192CONFIG_VSYSCALL=y 227CONFIG_VSYSCALL=y
193CONFIG_ARCH_FLATMEM_ENABLE=y 228CONFIG_ARCH_FLATMEM_ENABLE=y
@@ -212,8 +247,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
212# CONFIG_PHYS_ADDR_T_64BIT is not set 247# CONFIG_PHYS_ADDR_T_64BIT is not set
213CONFIG_ZONE_DMA_FLAG=0 248CONFIG_ZONE_DMA_FLAG=0
214CONFIG_NR_QUICK=2 249CONFIG_NR_QUICK=2
215CONFIG_HAVE_MLOCK=y
216CONFIG_HAVE_MLOCKED_PAGE_BIT=y
217# CONFIG_KSM is not set 250# CONFIG_KSM is not set
218CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 251CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
219 252
@@ -247,7 +280,6 @@ CONFIG_SH_KFR2R09=y
247# 280#
248# CONFIG_SH_TIMER_TMU is not set 281# CONFIG_SH_TIMER_TMU is not set
249CONFIG_SH_TIMER_CMT=y 282CONFIG_SH_TIMER_CMT=y
250CONFIG_SH_PCLK_FREQ=33333333
251CONFIG_SH_CLK_CPG=y 283CONFIG_SH_CLK_CPG=y
252# CONFIG_NO_HZ is not set 284# CONFIG_NO_HZ is not set
253# CONFIG_HIGH_RES_TIMERS is not set 285# CONFIG_HIGH_RES_TIMERS is not set
@@ -429,6 +461,7 @@ CONFIG_HAVE_IDE=y
429CONFIG_INPUT=y 461CONFIG_INPUT=y
430# CONFIG_INPUT_FF_MEMLESS is not set 462# CONFIG_INPUT_FF_MEMLESS is not set
431# CONFIG_INPUT_POLLDEV is not set 463# CONFIG_INPUT_POLLDEV is not set
464# CONFIG_INPUT_SPARSEKMAP is not set
432 465
433# 466#
434# Userland interfaces 467# Userland interfaces
@@ -520,7 +553,6 @@ CONFIG_I2C_SH_MOBILE=y
520# 553#
521# Miscellaneous I2C Chip support 554# Miscellaneous I2C Chip support
522# 555#
523# CONFIG_DS1682 is not set
524# CONFIG_SENSORS_TSL2550 is not set 556# CONFIG_SENSORS_TSL2550 is not set
525# CONFIG_I2C_DEBUG_CORE is not set 557# CONFIG_I2C_DEBUG_CORE is not set
526# CONFIG_I2C_DEBUG_ALGO is not set 558# CONFIG_I2C_DEBUG_ALGO is not set
@@ -575,16 +607,19 @@ CONFIG_SSB_POSSIBLE=y
575# 607#
576# CONFIG_MFD_CORE is not set 608# CONFIG_MFD_CORE is not set
577# CONFIG_MFD_SM501 is not set 609# CONFIG_MFD_SM501 is not set
610# CONFIG_MFD_SH_MOBILE_SDHI is not set
578# CONFIG_HTC_PASIC3 is not set 611# CONFIG_HTC_PASIC3 is not set
579# CONFIG_TPS65010 is not set 612# CONFIG_TPS65010 is not set
580# CONFIG_TWL4030_CORE is not set 613# CONFIG_TWL4030_CORE is not set
581# CONFIG_MFD_TMIO is not set 614# CONFIG_MFD_TMIO is not set
582# CONFIG_PMIC_DA903X is not set 615# CONFIG_PMIC_DA903X is not set
616# CONFIG_PMIC_ADP5520 is not set
583# CONFIG_MFD_WM8400 is not set 617# CONFIG_MFD_WM8400 is not set
584# CONFIG_MFD_WM831X is not set 618# CONFIG_MFD_WM831X is not set
585# CONFIG_MFD_WM8350_I2C is not set 619# CONFIG_MFD_WM8350_I2C is not set
586# CONFIG_MFD_PCF50633 is not set 620# CONFIG_MFD_PCF50633 is not set
587# CONFIG_AB3100_CORE is not set 621# CONFIG_AB3100_CORE is not set
622# CONFIG_MFD_88PM8607 is not set
588# CONFIG_REGULATOR is not set 623# CONFIG_REGULATOR is not set
589# CONFIG_MEDIA_SUPPORT is not set 624# CONFIG_MEDIA_SUPPORT is not set
590 625
@@ -650,10 +685,12 @@ CONFIG_USB_GADGET_DUALSPEED=y
650# CONFIG_USB_ETH is not set 685# CONFIG_USB_ETH is not set
651# CONFIG_USB_GADGETFS is not set 686# CONFIG_USB_GADGETFS is not set
652# CONFIG_USB_FILE_STORAGE is not set 687# CONFIG_USB_FILE_STORAGE is not set
688# CONFIG_USB_MASS_STORAGE is not set
653# CONFIG_USB_G_SERIAL is not set 689# CONFIG_USB_G_SERIAL is not set
654# CONFIG_USB_MIDI_GADGET is not set 690# CONFIG_USB_MIDI_GADGET is not set
655# CONFIG_USB_G_PRINTER is not set 691# CONFIG_USB_G_PRINTER is not set
656CONFIG_USB_CDC_COMPOSITE=y 692CONFIG_USB_CDC_COMPOSITE=y
693# CONFIG_USB_G_MULTI is not set
657 694
658# 695#
659# OTG and related infrastructure 696# OTG and related infrastructure
@@ -725,7 +762,7 @@ CONFIG_FRAME_WARN=1024
725CONFIG_DEBUG_FS=y 762CONFIG_DEBUG_FS=y
726# CONFIG_HEADERS_CHECK is not set 763# CONFIG_HEADERS_CHECK is not set
727# CONFIG_DEBUG_KERNEL is not set 764# CONFIG_DEBUG_KERNEL is not set
728# CONFIG_DEBUG_BUGVERBOSE is not set 765CONFIG_DEBUG_BUGVERBOSE=y
729# CONFIG_DEBUG_MEMORY_INIT is not set 766# CONFIG_DEBUG_MEMORY_INIT is not set
730# CONFIG_RCU_CPU_STALL_DETECTOR is not set 767# CONFIG_RCU_CPU_STALL_DETECTOR is not set
731# CONFIG_LATENCYTOP is not set 768# CONFIG_LATENCYTOP is not set
@@ -743,7 +780,6 @@ CONFIG_TRACING_SUPPORT=y
743# CONFIG_SAMPLES is not set 780# CONFIG_SAMPLES is not set
744CONFIG_HAVE_ARCH_KGDB=y 781CONFIG_HAVE_ARCH_KGDB=y
745# CONFIG_SH_STANDARD_BIOS is not set 782# CONFIG_SH_STANDARD_BIOS is not set
746# CONFIG_EARLY_SCIF_CONSOLE is not set
747# CONFIG_DWARF_UNWINDER is not set 783# CONFIG_DWARF_UNWINDER is not set
748 784
749# 785#
@@ -752,7 +788,11 @@ CONFIG_HAVE_ARCH_KGDB=y
752# CONFIG_KEYS is not set 788# CONFIG_KEYS is not set
753# CONFIG_SECURITY is not set 789# CONFIG_SECURITY is not set
754# CONFIG_SECURITYFS is not set 790# CONFIG_SECURITYFS is not set
755# CONFIG_SECURITY_FILE_CAPABILITIES is not set 791# CONFIG_DEFAULT_SECURITY_SELINUX is not set
792# CONFIG_DEFAULT_SECURITY_SMACK is not set
793# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
794CONFIG_DEFAULT_SECURITY_DAC=y
795CONFIG_DEFAULT_SECURITY=""
756# CONFIG_CRYPTO is not set 796# CONFIG_CRYPTO is not set
757# CONFIG_BINARY_PRINTF is not set 797# CONFIG_BINARY_PRINTF is not set
758 798
diff --git a/arch/sh/configs/kfr2r09_defconfig b/arch/sh/configs/kfr2r09_defconfig
index 8ae65d294b11..f22be494ed99 100644
--- a/arch/sh/configs/kfr2r09_defconfig
+++ b/arch/sh/configs/kfr2r09_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Fri Sep 25 11:54:22 2009 4# Mon Jan 4 11:32:55 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -20,6 +20,7 @@ CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
21CONFIG_ARCH_SUSPEND_POSSIBLE=y 21CONFIG_ARCH_SUSPEND_POSSIBLE=y
22CONFIG_ARCH_HIBERNATION_POSSIBLE=y 22CONFIG_ARCH_HIBERNATION_POSSIBLE=y
23CONFIG_SYS_SUPPORTS_HUGETLBFS=y
23CONFIG_SYS_SUPPORTS_CMT=y 24CONFIG_SYS_SUPPORTS_CMT=y
24CONFIG_SYS_SUPPORTS_TMU=y 25CONFIG_SYS_SUPPORTS_TMU=y
25CONFIG_STACKTRACE_SUPPORT=y 26CONFIG_STACKTRACE_SUPPORT=y
@@ -30,6 +31,7 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
30CONFIG_ARCH_NO_VIRT_TO_BUS=y 31CONFIG_ARCH_NO_VIRT_TO_BUS=y
31CONFIG_ARCH_HAS_DEFAULT_IDLE=y 32CONFIG_ARCH_HAS_DEFAULT_IDLE=y
32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
34CONFIG_DMA_NONCOHERENT=y
33CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
34CONFIG_CONSTRUCTORS=y 36CONFIG_CONSTRUCTORS=y
35 37
@@ -62,6 +64,7 @@ CONFIG_BSD_PROCESS_ACCT=y
62# 64#
63CONFIG_TREE_RCU=y 65CONFIG_TREE_RCU=y
64# CONFIG_TREE_PREEMPT_RCU is not set 66# CONFIG_TREE_PREEMPT_RCU is not set
67# CONFIG_TINY_RCU is not set
65# CONFIG_RCU_TRACE is not set 68# CONFIG_RCU_TRACE is not set
66CONFIG_RCU_FANOUT=32 69CONFIG_RCU_FANOUT=32
67# CONFIG_RCU_FANOUT_EXACT is not set 70# CONFIG_RCU_FANOUT_EXACT is not set
@@ -104,6 +107,7 @@ CONFIG_EVENTFD=y
104CONFIG_SHMEM=y 107CONFIG_SHMEM=y
105CONFIG_AIO=y 108CONFIG_AIO=y
106CONFIG_HAVE_PERF_EVENTS=y 109CONFIG_HAVE_PERF_EVENTS=y
110CONFIG_PERF_USE_VMALLOC=y
107 111
108# 112#
109# Kernel Performance Events And Counters 113# Kernel Performance Events And Counters
@@ -121,6 +125,7 @@ CONFIG_HAVE_IOREMAP_PROT=y
121CONFIG_HAVE_KPROBES=y 125CONFIG_HAVE_KPROBES=y
122CONFIG_HAVE_KRETPROBES=y 126CONFIG_HAVE_KRETPROBES=y
123CONFIG_HAVE_ARCH_TRACEHOOK=y 127CONFIG_HAVE_ARCH_TRACEHOOK=y
128CONFIG_HAVE_DMA_ATTRS=y
124CONFIG_HAVE_CLK=y 129CONFIG_HAVE_CLK=y
125CONFIG_HAVE_DMA_API_DEBUG=y 130CONFIG_HAVE_DMA_API_DEBUG=y
126 131
@@ -148,14 +153,41 @@ CONFIG_LBDAF=y
148# IO Schedulers 153# IO Schedulers
149# 154#
150CONFIG_IOSCHED_NOOP=y 155CONFIG_IOSCHED_NOOP=y
151# CONFIG_IOSCHED_AS is not set
152# CONFIG_IOSCHED_DEADLINE is not set 156# CONFIG_IOSCHED_DEADLINE is not set
153# CONFIG_IOSCHED_CFQ is not set 157# CONFIG_IOSCHED_CFQ is not set
154# CONFIG_DEFAULT_AS is not set
155# CONFIG_DEFAULT_DEADLINE is not set 158# CONFIG_DEFAULT_DEADLINE is not set
156# CONFIG_DEFAULT_CFQ is not set 159# CONFIG_DEFAULT_CFQ is not set
157CONFIG_DEFAULT_NOOP=y 160CONFIG_DEFAULT_NOOP=y
158CONFIG_DEFAULT_IOSCHED="noop" 161CONFIG_DEFAULT_IOSCHED="noop"
162# CONFIG_INLINE_SPIN_TRYLOCK is not set
163# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
164# CONFIG_INLINE_SPIN_LOCK is not set
165# CONFIG_INLINE_SPIN_LOCK_BH is not set
166# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
167# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
168# CONFIG_INLINE_SPIN_UNLOCK is not set
169# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
170# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
171# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
172# CONFIG_INLINE_READ_TRYLOCK is not set
173# CONFIG_INLINE_READ_LOCK is not set
174# CONFIG_INLINE_READ_LOCK_BH is not set
175# CONFIG_INLINE_READ_LOCK_IRQ is not set
176# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
177# CONFIG_INLINE_READ_UNLOCK is not set
178# CONFIG_INLINE_READ_UNLOCK_BH is not set
179# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
180# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
181# CONFIG_INLINE_WRITE_TRYLOCK is not set
182# CONFIG_INLINE_WRITE_LOCK is not set
183# CONFIG_INLINE_WRITE_LOCK_BH is not set
184# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
185# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
186# CONFIG_INLINE_WRITE_UNLOCK is not set
187# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
188# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
189# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
190# CONFIG_MUTEX_SPIN_ON_OWNER is not set
159# CONFIG_FREEZER is not set 191# CONFIG_FREEZER is not set
160 192
161# 193#
@@ -211,6 +243,7 @@ CONFIG_FORCE_MAX_ZONEORDER=11
211CONFIG_MEMORY_START=0x08000000 243CONFIG_MEMORY_START=0x08000000
212CONFIG_MEMORY_SIZE=0x08000000 244CONFIG_MEMORY_SIZE=0x08000000
213CONFIG_29BIT=y 245CONFIG_29BIT=y
246# CONFIG_PMB_ENABLE is not set
214# CONFIG_X2TLB is not set 247# CONFIG_X2TLB is not set
215CONFIG_VSYSCALL=y 248CONFIG_VSYSCALL=y
216CONFIG_ARCH_FLATMEM_ENABLE=y 249CONFIG_ARCH_FLATMEM_ENABLE=y
@@ -235,8 +268,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
235# CONFIG_PHYS_ADDR_T_64BIT is not set 268# CONFIG_PHYS_ADDR_T_64BIT is not set
236CONFIG_ZONE_DMA_FLAG=0 269CONFIG_ZONE_DMA_FLAG=0
237CONFIG_NR_QUICK=2 270CONFIG_NR_QUICK=2
238CONFIG_HAVE_MLOCK=y
239CONFIG_HAVE_MLOCKED_PAGE_BIT=y
240# CONFIG_KSM is not set 271# CONFIG_KSM is not set
241CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 272CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
242 273
@@ -270,7 +301,6 @@ CONFIG_SH_KFR2R09=y
270# 301#
271# CONFIG_SH_TIMER_TMU is not set 302# CONFIG_SH_TIMER_TMU is not set
272CONFIG_SH_TIMER_CMT=y 303CONFIG_SH_TIMER_CMT=y
273CONFIG_SH_PCLK_FREQ=33333333
274CONFIG_SH_CLK_CPG=y 304CONFIG_SH_CLK_CPG=y
275CONFIG_TICK_ONESHOT=y 305CONFIG_TICK_ONESHOT=y
276CONFIG_NO_HZ=y 306CONFIG_NO_HZ=y
@@ -534,6 +564,10 @@ CONFIG_MTD_UBI_BEB_RESERVE=1
534CONFIG_BLK_DEV=y 564CONFIG_BLK_DEV=y
535# CONFIG_BLK_DEV_COW_COMMON is not set 565# CONFIG_BLK_DEV_COW_COMMON is not set
536# CONFIG_BLK_DEV_LOOP is not set 566# CONFIG_BLK_DEV_LOOP is not set
567
568#
569# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
570#
537# CONFIG_BLK_DEV_NBD is not set 571# CONFIG_BLK_DEV_NBD is not set
538# CONFIG_BLK_DEV_RAM is not set 572# CONFIG_BLK_DEV_RAM is not set
539# CONFIG_CDROM_PKTCDVD is not set 573# CONFIG_CDROM_PKTCDVD is not set
@@ -562,6 +596,7 @@ CONFIG_HAVE_IDE=y
562CONFIG_INPUT=y 596CONFIG_INPUT=y
563# CONFIG_INPUT_FF_MEMLESS is not set 597# CONFIG_INPUT_FF_MEMLESS is not set
564# CONFIG_INPUT_POLLDEV is not set 598# CONFIG_INPUT_POLLDEV is not set
599# CONFIG_INPUT_SPARSEKMAP is not set
565 600
566# 601#
567# Userland interfaces 602# Userland interfaces
@@ -668,7 +703,6 @@ CONFIG_I2C_SH_MOBILE=y
668# 703#
669# Miscellaneous I2C Chip support 704# Miscellaneous I2C Chip support
670# 705#
671# CONFIG_DS1682 is not set
672# CONFIG_SENSORS_TSL2550 is not set 706# CONFIG_SENSORS_TSL2550 is not set
673# CONFIG_I2C_DEBUG_CORE is not set 707# CONFIG_I2C_DEBUG_CORE is not set
674# CONFIG_I2C_DEBUG_ALGO is not set 708# CONFIG_I2C_DEBUG_ALGO is not set
@@ -723,16 +757,19 @@ CONFIG_SSB_POSSIBLE=y
723# 757#
724# CONFIG_MFD_CORE is not set 758# CONFIG_MFD_CORE is not set
725# CONFIG_MFD_SM501 is not set 759# CONFIG_MFD_SM501 is not set
760# CONFIG_MFD_SH_MOBILE_SDHI is not set
726# CONFIG_HTC_PASIC3 is not set 761# CONFIG_HTC_PASIC3 is not set
727# CONFIG_TPS65010 is not set 762# CONFIG_TPS65010 is not set
728# CONFIG_TWL4030_CORE is not set 763# CONFIG_TWL4030_CORE is not set
729# CONFIG_MFD_TMIO is not set 764# CONFIG_MFD_TMIO is not set
730# CONFIG_PMIC_DA903X is not set 765# CONFIG_PMIC_DA903X is not set
766# CONFIG_PMIC_ADP5520 is not set
731# CONFIG_MFD_WM8400 is not set 767# CONFIG_MFD_WM8400 is not set
732# CONFIG_MFD_WM831X is not set 768# CONFIG_MFD_WM831X is not set
733# CONFIG_MFD_WM8350_I2C is not set 769# CONFIG_MFD_WM8350_I2C is not set
734# CONFIG_MFD_PCF50633 is not set 770# CONFIG_MFD_PCF50633 is not set
735# CONFIG_AB3100_CORE is not set 771# CONFIG_AB3100_CORE is not set
772# CONFIG_MFD_88PM8607 is not set
736# CONFIG_REGULATOR is not set 773# CONFIG_REGULATOR is not set
737# CONFIG_MEDIA_SUPPORT is not set 774# CONFIG_MEDIA_SUPPORT is not set
738 775
@@ -847,10 +884,12 @@ CONFIG_USB_GADGET_DUALSPEED=y
847# CONFIG_USB_ETH is not set 884# CONFIG_USB_ETH is not set
848# CONFIG_USB_GADGETFS is not set 885# CONFIG_USB_GADGETFS is not set
849# CONFIG_USB_FILE_STORAGE is not set 886# CONFIG_USB_FILE_STORAGE is not set
887# CONFIG_USB_MASS_STORAGE is not set
850# CONFIG_USB_G_SERIAL is not set 888# CONFIG_USB_G_SERIAL is not set
851# CONFIG_USB_MIDI_GADGET is not set 889# CONFIG_USB_MIDI_GADGET is not set
852# CONFIG_USB_G_PRINTER is not set 890# CONFIG_USB_G_PRINTER is not set
853CONFIG_USB_CDC_COMPOSITE=y 891CONFIG_USB_CDC_COMPOSITE=m
892# CONFIG_USB_G_MULTI is not set
854 893
855# 894#
856# OTG and related infrastructure 895# OTG and related infrastructure
@@ -875,6 +914,7 @@ CONFIG_MMC_BLOCK_BOUNCE=y
875# CONFIG_MMC_SDHCI is not set 914# CONFIG_MMC_SDHCI is not set
876# CONFIG_MMC_AT91 is not set 915# CONFIG_MMC_AT91 is not set
877# CONFIG_MMC_ATMELMCI is not set 916# CONFIG_MMC_ATMELMCI is not set
917# CONFIG_MMC_TMIO is not set
878# CONFIG_MEMSTICK is not set 918# CONFIG_MEMSTICK is not set
879# CONFIG_NEW_LEDS is not set 919# CONFIG_NEW_LEDS is not set
880# CONFIG_ACCESSIBILITY is not set 920# CONFIG_ACCESSIBILITY is not set
@@ -906,6 +946,7 @@ CONFIG_RTC_INTF_DEV=y
906# CONFIG_RTC_DRV_PCF8563 is not set 946# CONFIG_RTC_DRV_PCF8563 is not set
907# CONFIG_RTC_DRV_PCF8583 is not set 947# CONFIG_RTC_DRV_PCF8583 is not set
908# CONFIG_RTC_DRV_M41T80 is not set 948# CONFIG_RTC_DRV_M41T80 is not set
949# CONFIG_RTC_DRV_BQ32K is not set
909# CONFIG_RTC_DRV_S35390A is not set 950# CONFIG_RTC_DRV_S35390A is not set
910# CONFIG_RTC_DRV_FM3130 is not set 951# CONFIG_RTC_DRV_FM3130 is not set
911# CONFIG_RTC_DRV_RX8581 is not set 952# CONFIG_RTC_DRV_RX8581 is not set
@@ -926,7 +967,9 @@ CONFIG_RTC_INTF_DEV=y
926# CONFIG_RTC_DRV_M48T86 is not set 967# CONFIG_RTC_DRV_M48T86 is not set
927# CONFIG_RTC_DRV_M48T35 is not set 968# CONFIG_RTC_DRV_M48T35 is not set
928# CONFIG_RTC_DRV_M48T59 is not set 969# CONFIG_RTC_DRV_M48T59 is not set
970# CONFIG_RTC_DRV_MSM6242 is not set
929# CONFIG_RTC_DRV_BQ4802 is not set 971# CONFIG_RTC_DRV_BQ4802 is not set
972# CONFIG_RTC_DRV_RP5C01 is not set
930# CONFIG_RTC_DRV_V3020 is not set 973# CONFIG_RTC_DRV_V3020 is not set
931 974
932# 975#
@@ -953,6 +996,7 @@ CONFIG_UIO_PDRV_GENIRQ=y
953# CONFIG_EXT2_FS is not set 996# CONFIG_EXT2_FS is not set
954# CONFIG_EXT3_FS is not set 997# CONFIG_EXT3_FS is not set
955# CONFIG_EXT4_FS is not set 998# CONFIG_EXT4_FS is not set
999CONFIG_EXT4_USE_FOR_EXT23=y
956# CONFIG_REISERFS_FS is not set 1000# CONFIG_REISERFS_FS is not set
957# CONFIG_JFS_FS is not set 1001# CONFIG_JFS_FS is not set
958# CONFIG_FS_POSIX_ACL is not set 1002# CONFIG_FS_POSIX_ACL is not set
@@ -1027,7 +1071,7 @@ CONFIG_FRAME_WARN=1024
1027CONFIG_DEBUG_FS=y 1071CONFIG_DEBUG_FS=y
1028# CONFIG_HEADERS_CHECK is not set 1072# CONFIG_HEADERS_CHECK is not set
1029# CONFIG_DEBUG_KERNEL is not set 1073# CONFIG_DEBUG_KERNEL is not set
1030# CONFIG_DEBUG_BUGVERBOSE is not set 1074CONFIG_DEBUG_BUGVERBOSE=y
1031# CONFIG_DEBUG_MEMORY_INIT is not set 1075# CONFIG_DEBUG_MEMORY_INIT is not set
1032# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1076# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1033# CONFIG_LATENCYTOP is not set 1077# CONFIG_LATENCYTOP is not set
@@ -1045,7 +1089,6 @@ CONFIG_TRACING_SUPPORT=y
1045# CONFIG_SAMPLES is not set 1089# CONFIG_SAMPLES is not set
1046CONFIG_HAVE_ARCH_KGDB=y 1090CONFIG_HAVE_ARCH_KGDB=y
1047# CONFIG_SH_STANDARD_BIOS is not set 1091# CONFIG_SH_STANDARD_BIOS is not set
1048# CONFIG_EARLY_SCIF_CONSOLE is not set
1049# CONFIG_DWARF_UNWINDER is not set 1092# CONFIG_DWARF_UNWINDER is not set
1050 1093
1051# 1094#
@@ -1054,7 +1097,11 @@ CONFIG_HAVE_ARCH_KGDB=y
1054# CONFIG_KEYS is not set 1097# CONFIG_KEYS is not set
1055# CONFIG_SECURITY is not set 1098# CONFIG_SECURITY is not set
1056# CONFIG_SECURITYFS is not set 1099# CONFIG_SECURITYFS is not set
1057# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1100# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1101# CONFIG_DEFAULT_SECURITY_SMACK is not set
1102# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1103CONFIG_DEFAULT_SECURITY_DAC=y
1104CONFIG_DEFAULT_SECURITY=""
1058# CONFIG_CRYPTO is not set 1105# CONFIG_CRYPTO is not set
1059# CONFIG_BINARY_PRINTF is not set 1106# CONFIG_BINARY_PRINTF is not set
1060 1107
diff --git a/arch/sh/configs/landisk_defconfig b/arch/sh/configs/landisk_defconfig
index c2a9a3996388..2a42d4977fe4 100644
--- a/arch/sh/configs/landisk_defconfig
+++ b/arch/sh/configs/landisk_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Thu Sep 24 18:05:49 2009 4# Mon Jan 4 11:35:31 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -20,6 +20,7 @@ CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set 21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
22CONFIG_ARCH_HIBERNATION_POSSIBLE=y 22CONFIG_ARCH_HIBERNATION_POSSIBLE=y
23CONFIG_SYS_SUPPORTS_HUGETLBFS=y
23CONFIG_SYS_SUPPORTS_PCI=y 24CONFIG_SYS_SUPPORTS_PCI=y
24CONFIG_SYS_SUPPORTS_TMU=y 25CONFIG_SYS_SUPPORTS_TMU=y
25CONFIG_STACKTRACE_SUPPORT=y 26CONFIG_STACKTRACE_SUPPORT=y
@@ -30,6 +31,7 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
30CONFIG_ARCH_NO_VIRT_TO_BUS=y 31CONFIG_ARCH_NO_VIRT_TO_BUS=y
31CONFIG_ARCH_HAS_DEFAULT_IDLE=y 32CONFIG_ARCH_HAS_DEFAULT_IDLE=y
32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
34CONFIG_DMA_NONCOHERENT=y
33CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
34CONFIG_CONSTRUCTORS=y 36CONFIG_CONSTRUCTORS=y
35 37
@@ -60,6 +62,7 @@ CONFIG_SYSVIPC_SYSCTL=y
60# 62#
61CONFIG_TREE_RCU=y 63CONFIG_TREE_RCU=y
62# CONFIG_TREE_PREEMPT_RCU is not set 64# CONFIG_TREE_PREEMPT_RCU is not set
65# CONFIG_TINY_RCU is not set
63# CONFIG_RCU_TRACE is not set 66# CONFIG_RCU_TRACE is not set
64CONFIG_RCU_FANOUT=32 67CONFIG_RCU_FANOUT=32
65# CONFIG_RCU_FANOUT_EXACT is not set 68# CONFIG_RCU_FANOUT_EXACT is not set
@@ -94,6 +97,7 @@ CONFIG_EVENTFD=y
94CONFIG_SHMEM=y 97CONFIG_SHMEM=y
95CONFIG_AIO=y 98CONFIG_AIO=y
96CONFIG_HAVE_PERF_EVENTS=y 99CONFIG_HAVE_PERF_EVENTS=y
100CONFIG_PERF_USE_VMALLOC=y
97 101
98# 102#
99# Kernel Performance Events And Counters 103# Kernel Performance Events And Counters
@@ -113,6 +117,7 @@ CONFIG_HAVE_IOREMAP_PROT=y
113CONFIG_HAVE_KPROBES=y 117CONFIG_HAVE_KPROBES=y
114CONFIG_HAVE_KRETPROBES=y 118CONFIG_HAVE_KRETPROBES=y
115CONFIG_HAVE_ARCH_TRACEHOOK=y 119CONFIG_HAVE_ARCH_TRACEHOOK=y
120CONFIG_HAVE_DMA_ATTRS=y
116CONFIG_HAVE_CLK=y 121CONFIG_HAVE_CLK=y
117CONFIG_HAVE_DMA_API_DEBUG=y 122CONFIG_HAVE_DMA_API_DEBUG=y
118 123
@@ -139,14 +144,41 @@ CONFIG_LBDAF=y
139# IO Schedulers 144# IO Schedulers
140# 145#
141CONFIG_IOSCHED_NOOP=y 146CONFIG_IOSCHED_NOOP=y
142CONFIG_IOSCHED_AS=y
143CONFIG_IOSCHED_DEADLINE=y 147CONFIG_IOSCHED_DEADLINE=y
144CONFIG_IOSCHED_CFQ=y 148CONFIG_IOSCHED_CFQ=y
145CONFIG_DEFAULT_AS=y
146# CONFIG_DEFAULT_DEADLINE is not set 149# CONFIG_DEFAULT_DEADLINE is not set
147# CONFIG_DEFAULT_CFQ is not set 150CONFIG_DEFAULT_CFQ=y
148# CONFIG_DEFAULT_NOOP is not set 151# CONFIG_DEFAULT_NOOP is not set
149CONFIG_DEFAULT_IOSCHED="anticipatory" 152CONFIG_DEFAULT_IOSCHED="cfq"
153# CONFIG_INLINE_SPIN_TRYLOCK is not set
154# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
155# CONFIG_INLINE_SPIN_LOCK is not set
156# CONFIG_INLINE_SPIN_LOCK_BH is not set
157# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
158# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
159CONFIG_INLINE_SPIN_UNLOCK=y
160# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
161CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
162# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
163# CONFIG_INLINE_READ_TRYLOCK is not set
164# CONFIG_INLINE_READ_LOCK is not set
165# CONFIG_INLINE_READ_LOCK_BH is not set
166# CONFIG_INLINE_READ_LOCK_IRQ is not set
167# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
168CONFIG_INLINE_READ_UNLOCK=y
169# CONFIG_INLINE_READ_UNLOCK_BH is not set
170CONFIG_INLINE_READ_UNLOCK_IRQ=y
171# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
172# CONFIG_INLINE_WRITE_TRYLOCK is not set
173# CONFIG_INLINE_WRITE_LOCK is not set
174# CONFIG_INLINE_WRITE_LOCK_BH is not set
175# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
176# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
177CONFIG_INLINE_WRITE_UNLOCK=y
178# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
179CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
180# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
181# CONFIG_MUTEX_SPIN_ON_OWNER is not set
150# CONFIG_FREEZER is not set 182# CONFIG_FREEZER is not set
151 183
152# 184#
@@ -222,8 +254,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
222# CONFIG_PHYS_ADDR_T_64BIT is not set 254# CONFIG_PHYS_ADDR_T_64BIT is not set
223CONFIG_ZONE_DMA_FLAG=0 255CONFIG_ZONE_DMA_FLAG=0
224CONFIG_NR_QUICK=2 256CONFIG_NR_QUICK=2
225CONFIG_HAVE_MLOCK=y
226CONFIG_HAVE_MLOCKED_PAGE_BIT=y
227# CONFIG_KSM is not set 257# CONFIG_KSM is not set
228CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 258CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
229 259
@@ -311,7 +341,6 @@ CONFIG_GUSA=y
311CONFIG_ZERO_PAGE_OFFSET=0x00001000 341CONFIG_ZERO_PAGE_OFFSET=0x00001000
312CONFIG_BOOT_LINK_OFFSET=0x00800000 342CONFIG_BOOT_LINK_OFFSET=0x00800000
313CONFIG_ENTRY_OFFSET=0x00001000 343CONFIG_ENTRY_OFFSET=0x00001000
314# CONFIG_UBC_WAKEUP is not set
315# CONFIG_CMDLINE_OVERWRITE is not set 344# CONFIG_CMDLINE_OVERWRITE is not set
316# CONFIG_CMDLINE_EXTEND is not set 345# CONFIG_CMDLINE_EXTEND is not set
317 346
@@ -319,14 +348,12 @@ CONFIG_ENTRY_OFFSET=0x00001000
319# Bus options 348# Bus options
320# 349#
321CONFIG_PCI=y 350CONFIG_PCI=y
322CONFIG_SH_PCIDMA_NONCOHERENT=y
323# CONFIG_PCIEPORTBUS is not set 351# CONFIG_PCIEPORTBUS is not set
324# CONFIG_ARCH_SUPPORTS_MSI is not set 352# CONFIG_ARCH_SUPPORTS_MSI is not set
325CONFIG_PCI_LEGACY=y 353CONFIG_PCI_LEGACY=y
326# CONFIG_PCI_STUB is not set 354# CONFIG_PCI_STUB is not set
327# CONFIG_PCI_IOV is not set 355# CONFIG_PCI_IOV is not set
328CONFIG_PCCARD=y 356CONFIG_PCCARD=y
329# CONFIG_PCMCIA_DEBUG is not set
330CONFIG_PCMCIA=y 357CONFIG_PCMCIA=y
331CONFIG_PCMCIA_LOAD_CIS=y 358CONFIG_PCMCIA_LOAD_CIS=y
332CONFIG_PCMCIA_IOCTL=y 359CONFIG_PCMCIA_IOCTL=y
@@ -461,9 +488,6 @@ CONFIG_ATALK=m
461# CONFIG_AF_RXRPC is not set 488# CONFIG_AF_RXRPC is not set
462CONFIG_WIRELESS=y 489CONFIG_WIRELESS=y
463# CONFIG_CFG80211 is not set 490# CONFIG_CFG80211 is not set
464CONFIG_CFG80211_DEFAULT_PS_VALUE=0
465# CONFIG_WIRELESS_OLD_REGULATORY is not set
466# CONFIG_WIRELESS_EXT is not set
467# CONFIG_LIB80211 is not set 491# CONFIG_LIB80211 is not set
468 492
469# 493#
@@ -498,6 +522,10 @@ CONFIG_BLK_DEV=y
498# CONFIG_BLK_DEV_COW_COMMON is not set 522# CONFIG_BLK_DEV_COW_COMMON is not set
499CONFIG_BLK_DEV_LOOP=y 523CONFIG_BLK_DEV_LOOP=y
500# CONFIG_BLK_DEV_CRYPTOLOOP is not set 524# CONFIG_BLK_DEV_CRYPTOLOOP is not set
525
526#
527# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
528#
501# CONFIG_BLK_DEV_NBD is not set 529# CONFIG_BLK_DEV_NBD is not set
502# CONFIG_BLK_DEV_SX8 is not set 530# CONFIG_BLK_DEV_SX8 is not set
503# CONFIG_BLK_DEV_UB is not set 531# CONFIG_BLK_DEV_UB is not set
@@ -618,8 +646,11 @@ CONFIG_SCSI_LOWLEVEL=y
618# CONFIG_ISCSI_TCP is not set 646# CONFIG_ISCSI_TCP is not set
619# CONFIG_SCSI_CXGB3_ISCSI is not set 647# CONFIG_SCSI_CXGB3_ISCSI is not set
620# CONFIG_SCSI_BNX2_ISCSI is not set 648# CONFIG_SCSI_BNX2_ISCSI is not set
649# CONFIG_BE2ISCSI is not set
621# CONFIG_BLK_DEV_3W_XXXX_RAID is not set 650# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
651# CONFIG_SCSI_HPSA is not set
622# CONFIG_SCSI_3W_9XXX is not set 652# CONFIG_SCSI_3W_9XXX is not set
653# CONFIG_SCSI_3W_SAS is not set
623# CONFIG_SCSI_ACARD is not set 654# CONFIG_SCSI_ACARD is not set
624# CONFIG_SCSI_AACRAID is not set 655# CONFIG_SCSI_AACRAID is not set
625# CONFIG_SCSI_AIC7XXX is not set 656# CONFIG_SCSI_AIC7XXX is not set
@@ -652,7 +683,9 @@ CONFIG_SCSI_LOWLEVEL=y
652# CONFIG_SCSI_NSP32 is not set 683# CONFIG_SCSI_NSP32 is not set
653# CONFIG_SCSI_DEBUG is not set 684# CONFIG_SCSI_DEBUG is not set
654# CONFIG_SCSI_PMCRAID is not set 685# CONFIG_SCSI_PMCRAID is not set
686# CONFIG_SCSI_PM8001 is not set
655# CONFIG_SCSI_SRP is not set 687# CONFIG_SCSI_SRP is not set
688# CONFIG_SCSI_BFA_FC is not set
656# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set 689# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set
657# CONFIG_SCSI_DH is not set 690# CONFIG_SCSI_DH is not set
658# CONFIG_SCSI_OSD_INITIATOR is not set 691# CONFIG_SCSI_OSD_INITIATOR is not set
@@ -733,6 +766,7 @@ CONFIG_8139CP=y
733# CONFIG_SUNDANCE is not set 766# CONFIG_SUNDANCE is not set
734# CONFIG_TLAN is not set 767# CONFIG_TLAN is not set
735# CONFIG_KS8842 is not set 768# CONFIG_KS8842 is not set
769# CONFIG_KS8851_MLL is not set
736# CONFIG_VIA_RHINE is not set 770# CONFIG_VIA_RHINE is not set
737# CONFIG_SC92031 is not set 771# CONFIG_SC92031 is not set
738# CONFIG_ATL2 is not set 772# CONFIG_ATL2 is not set
@@ -781,8 +815,13 @@ CONFIG_CHELSIO_T3_DEPENDS=y
781# CONFIG_BE2NET is not set 815# CONFIG_BE2NET is not set
782# CONFIG_TR is not set 816# CONFIG_TR is not set
783CONFIG_WLAN=y 817CONFIG_WLAN=y
784# CONFIG_WLAN_PRE80211 is not set 818# CONFIG_PCMCIA_RAYCS is not set
785# CONFIG_WLAN_80211 is not set 819# CONFIG_ATMEL is not set
820# CONFIG_AIRO_CS is not set
821# CONFIG_PCMCIA_WL3501 is not set
822# CONFIG_PRISM54 is not set
823# CONFIG_USB_ZD1201 is not set
824# CONFIG_HOSTAP is not set
786 825
787# 826#
788# Enable WiMAX (Networking options) to see the WiMAX drivers 827# Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -806,6 +845,7 @@ CONFIG_USB_RTL8150=m
806# CONFIG_NETCONSOLE is not set 845# CONFIG_NETCONSOLE is not set
807# CONFIG_NETPOLL is not set 846# CONFIG_NETPOLL is not set
808# CONFIG_NET_POLL_CONTROLLER is not set 847# CONFIG_NET_POLL_CONTROLLER is not set
848# CONFIG_VMXNET3 is not set
809# CONFIG_ISDN is not set 849# CONFIG_ISDN is not set
810# CONFIG_PHONE is not set 850# CONFIG_PHONE is not set
811 851
@@ -815,6 +855,7 @@ CONFIG_USB_RTL8150=m
815CONFIG_INPUT=y 855CONFIG_INPUT=y
816CONFIG_INPUT_FF_MEMLESS=m 856CONFIG_INPUT_FF_MEMLESS=m
817# CONFIG_INPUT_POLLDEV is not set 857# CONFIG_INPUT_POLLDEV is not set
858# CONFIG_INPUT_SPARSEKMAP is not set
818 859
819# 860#
820# Userland interfaces 861# Userland interfaces
@@ -933,6 +974,7 @@ CONFIG_SSB_POSSIBLE=y
933# 974#
934# CONFIG_MFD_CORE is not set 975# CONFIG_MFD_CORE is not set
935# CONFIG_MFD_SM501 is not set 976# CONFIG_MFD_SM501 is not set
977# CONFIG_MFD_SH_MOBILE_SDHI is not set
936# CONFIG_HTC_PASIC3 is not set 978# CONFIG_HTC_PASIC3 is not set
937# CONFIG_MFD_TMIO is not set 979# CONFIG_MFD_TMIO is not set
938# CONFIG_REGULATOR is not set 980# CONFIG_REGULATOR is not set
@@ -1371,10 +1413,11 @@ CONFIG_FRAME_WARN=1024
1371# CONFIG_DEBUG_FS is not set 1413# CONFIG_DEBUG_FS is not set
1372# CONFIG_HEADERS_CHECK is not set 1414# CONFIG_HEADERS_CHECK is not set
1373# CONFIG_DEBUG_KERNEL is not set 1415# CONFIG_DEBUG_KERNEL is not set
1374# CONFIG_DEBUG_BUGVERBOSE is not set 1416CONFIG_DEBUG_BUGVERBOSE=y
1375# CONFIG_DEBUG_MEMORY_INIT is not set 1417# CONFIG_DEBUG_MEMORY_INIT is not set
1376# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1418# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1377# CONFIG_LATENCYTOP is not set 1419# CONFIG_LATENCYTOP is not set
1420# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1378CONFIG_HAVE_FUNCTION_TRACER=y 1421CONFIG_HAVE_FUNCTION_TRACER=y
1379CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 1422CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
1380CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y 1423CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
@@ -1387,8 +1430,6 @@ CONFIG_TRACING_SUPPORT=y
1387# CONFIG_SAMPLES is not set 1430# CONFIG_SAMPLES is not set
1388CONFIG_HAVE_ARCH_KGDB=y 1431CONFIG_HAVE_ARCH_KGDB=y
1389CONFIG_SH_STANDARD_BIOS=y 1432CONFIG_SH_STANDARD_BIOS=y
1390# CONFIG_EARLY_SCIF_CONSOLE is not set
1391# CONFIG_EARLY_PRINTK is not set
1392# CONFIG_DWARF_UNWINDER is not set 1433# CONFIG_DWARF_UNWINDER is not set
1393 1434
1394# 1435#
@@ -1397,7 +1438,11 @@ CONFIG_SH_STANDARD_BIOS=y
1397# CONFIG_KEYS is not set 1438# CONFIG_KEYS is not set
1398# CONFIG_SECURITY is not set 1439# CONFIG_SECURITY is not set
1399# CONFIG_SECURITYFS is not set 1440# CONFIG_SECURITYFS is not set
1400# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1441# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1442# CONFIG_DEFAULT_SECURITY_SMACK is not set
1443# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1444CONFIG_DEFAULT_SECURITY_DAC=y
1445CONFIG_DEFAULT_SECURITY=""
1401CONFIG_CRYPTO=y 1446CONFIG_CRYPTO=y
1402 1447
1403# 1448#
diff --git a/arch/sh/configs/lboxre2_defconfig b/arch/sh/configs/lboxre2_defconfig
index ec0c0b432c74..f2f1f8c73b2f 100644
--- a/arch/sh/configs/lboxre2_defconfig
+++ b/arch/sh/configs/lboxre2_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Thu Sep 24 18:09:59 2009 4# Mon Jan 4 11:37:01 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -20,6 +20,7 @@ CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set 21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
22CONFIG_ARCH_HIBERNATION_POSSIBLE=y 22CONFIG_ARCH_HIBERNATION_POSSIBLE=y
23CONFIG_SYS_SUPPORTS_HUGETLBFS=y
23CONFIG_SYS_SUPPORTS_PCI=y 24CONFIG_SYS_SUPPORTS_PCI=y
24CONFIG_SYS_SUPPORTS_TMU=y 25CONFIG_SYS_SUPPORTS_TMU=y
25CONFIG_STACKTRACE_SUPPORT=y 26CONFIG_STACKTRACE_SUPPORT=y
@@ -30,6 +31,7 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
30CONFIG_ARCH_NO_VIRT_TO_BUS=y 31CONFIG_ARCH_NO_VIRT_TO_BUS=y
31CONFIG_ARCH_HAS_DEFAULT_IDLE=y 32CONFIG_ARCH_HAS_DEFAULT_IDLE=y
32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
34CONFIG_DMA_NONCOHERENT=y
33CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
34CONFIG_CONSTRUCTORS=y 36CONFIG_CONSTRUCTORS=y
35 37
@@ -60,6 +62,7 @@ CONFIG_SYSVIPC_SYSCTL=y
60# 62#
61CONFIG_TREE_RCU=y 63CONFIG_TREE_RCU=y
62# CONFIG_TREE_PREEMPT_RCU is not set 64# CONFIG_TREE_PREEMPT_RCU is not set
65# CONFIG_TINY_RCU is not set
63# CONFIG_RCU_TRACE is not set 66# CONFIG_RCU_TRACE is not set
64CONFIG_RCU_FANOUT=32 67CONFIG_RCU_FANOUT=32
65# CONFIG_RCU_FANOUT_EXACT is not set 68# CONFIG_RCU_FANOUT_EXACT is not set
@@ -94,6 +97,7 @@ CONFIG_EVENTFD=y
94CONFIG_SHMEM=y 97CONFIG_SHMEM=y
95CONFIG_AIO=y 98CONFIG_AIO=y
96CONFIG_HAVE_PERF_EVENTS=y 99CONFIG_HAVE_PERF_EVENTS=y
100CONFIG_PERF_USE_VMALLOC=y
97 101
98# 102#
99# Kernel Performance Events And Counters 103# Kernel Performance Events And Counters
@@ -113,6 +117,7 @@ CONFIG_HAVE_IOREMAP_PROT=y
113CONFIG_HAVE_KPROBES=y 117CONFIG_HAVE_KPROBES=y
114CONFIG_HAVE_KRETPROBES=y 118CONFIG_HAVE_KRETPROBES=y
115CONFIG_HAVE_ARCH_TRACEHOOK=y 119CONFIG_HAVE_ARCH_TRACEHOOK=y
120CONFIG_HAVE_DMA_ATTRS=y
116CONFIG_HAVE_CLK=y 121CONFIG_HAVE_CLK=y
117CONFIG_HAVE_DMA_API_DEBUG=y 122CONFIG_HAVE_DMA_API_DEBUG=y
118 123
@@ -139,14 +144,41 @@ CONFIG_LBDAF=y
139# IO Schedulers 144# IO Schedulers
140# 145#
141CONFIG_IOSCHED_NOOP=y 146CONFIG_IOSCHED_NOOP=y
142CONFIG_IOSCHED_AS=y
143CONFIG_IOSCHED_DEADLINE=y 147CONFIG_IOSCHED_DEADLINE=y
144CONFIG_IOSCHED_CFQ=y 148CONFIG_IOSCHED_CFQ=y
145CONFIG_DEFAULT_AS=y
146# CONFIG_DEFAULT_DEADLINE is not set 149# CONFIG_DEFAULT_DEADLINE is not set
147# CONFIG_DEFAULT_CFQ is not set 150CONFIG_DEFAULT_CFQ=y
148# CONFIG_DEFAULT_NOOP is not set 151# CONFIG_DEFAULT_NOOP is not set
149CONFIG_DEFAULT_IOSCHED="anticipatory" 152CONFIG_DEFAULT_IOSCHED="cfq"
153# CONFIG_INLINE_SPIN_TRYLOCK is not set
154# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
155# CONFIG_INLINE_SPIN_LOCK is not set
156# CONFIG_INLINE_SPIN_LOCK_BH is not set
157# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
158# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
159CONFIG_INLINE_SPIN_UNLOCK=y
160# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
161CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
162# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
163# CONFIG_INLINE_READ_TRYLOCK is not set
164# CONFIG_INLINE_READ_LOCK is not set
165# CONFIG_INLINE_READ_LOCK_BH is not set
166# CONFIG_INLINE_READ_LOCK_IRQ is not set
167# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
168CONFIG_INLINE_READ_UNLOCK=y
169# CONFIG_INLINE_READ_UNLOCK_BH is not set
170CONFIG_INLINE_READ_UNLOCK_IRQ=y
171# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
172# CONFIG_INLINE_WRITE_TRYLOCK is not set
173# CONFIG_INLINE_WRITE_LOCK is not set
174# CONFIG_INLINE_WRITE_LOCK_BH is not set
175# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
176# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
177CONFIG_INLINE_WRITE_UNLOCK=y
178# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
179CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
180# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
181# CONFIG_MUTEX_SPIN_ON_OWNER is not set
150# CONFIG_FREEZER is not set 182# CONFIG_FREEZER is not set
151 183
152# 184#
@@ -222,8 +254,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
222# CONFIG_PHYS_ADDR_T_64BIT is not set 254# CONFIG_PHYS_ADDR_T_64BIT is not set
223CONFIG_ZONE_DMA_FLAG=0 255CONFIG_ZONE_DMA_FLAG=0
224CONFIG_NR_QUICK=2 256CONFIG_NR_QUICK=2
225CONFIG_HAVE_MLOCK=y
226CONFIG_HAVE_MLOCKED_PAGE_BIT=y
227# CONFIG_KSM is not set 257# CONFIG_KSM is not set
228CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 258CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
229 259
@@ -311,7 +341,6 @@ CONFIG_GUSA=y
311CONFIG_ZERO_PAGE_OFFSET=0x00001000 341CONFIG_ZERO_PAGE_OFFSET=0x00001000
312CONFIG_BOOT_LINK_OFFSET=0x00800000 342CONFIG_BOOT_LINK_OFFSET=0x00800000
313CONFIG_ENTRY_OFFSET=0x00001000 343CONFIG_ENTRY_OFFSET=0x00001000
314# CONFIG_UBC_WAKEUP is not set
315CONFIG_CMDLINE_OVERWRITE=y 344CONFIG_CMDLINE_OVERWRITE=y
316# CONFIG_CMDLINE_EXTEND is not set 345# CONFIG_CMDLINE_EXTEND is not set
317CONFIG_CMDLINE="console=ttySC1,115200 root=/dev/sda1" 346CONFIG_CMDLINE="console=ttySC1,115200 root=/dev/sda1"
@@ -320,14 +349,12 @@ CONFIG_CMDLINE="console=ttySC1,115200 root=/dev/sda1"
320# Bus options 349# Bus options
321# 350#
322CONFIG_PCI=y 351CONFIG_PCI=y
323CONFIG_SH_PCIDMA_NONCOHERENT=y
324# CONFIG_PCIEPORTBUS is not set 352# CONFIG_PCIEPORTBUS is not set
325# CONFIG_ARCH_SUPPORTS_MSI is not set 353# CONFIG_ARCH_SUPPORTS_MSI is not set
326CONFIG_PCI_LEGACY=y 354CONFIG_PCI_LEGACY=y
327# CONFIG_PCI_STUB is not set 355# CONFIG_PCI_STUB is not set
328# CONFIG_PCI_IOV is not set 356# CONFIG_PCI_IOV is not set
329CONFIG_PCCARD=y 357CONFIG_PCCARD=y
330CONFIG_PCMCIA_DEBUG=y
331CONFIG_PCMCIA=y 358CONFIG_PCMCIA=y
332CONFIG_PCMCIA_LOAD_CIS=y 359CONFIG_PCMCIA_LOAD_CIS=y
333CONFIG_PCMCIA_IOCTL=y 360CONFIG_PCMCIA_IOCTL=y
@@ -459,9 +486,6 @@ CONFIG_NETFILTER_ADVANCED=y
459# CONFIG_AF_RXRPC is not set 486# CONFIG_AF_RXRPC is not set
460CONFIG_WIRELESS=y 487CONFIG_WIRELESS=y
461# CONFIG_CFG80211 is not set 488# CONFIG_CFG80211 is not set
462CONFIG_CFG80211_DEFAULT_PS_VALUE=0
463# CONFIG_WIRELESS_OLD_REGULATORY is not set
464# CONFIG_WIRELESS_EXT is not set
465# CONFIG_LIB80211 is not set 489# CONFIG_LIB80211 is not set
466 490
467# 491#
@@ -496,6 +520,10 @@ CONFIG_BLK_DEV=y
496# CONFIG_BLK_DEV_COW_COMMON is not set 520# CONFIG_BLK_DEV_COW_COMMON is not set
497CONFIG_BLK_DEV_LOOP=y 521CONFIG_BLK_DEV_LOOP=y
498# CONFIG_BLK_DEV_CRYPTOLOOP is not set 522# CONFIG_BLK_DEV_CRYPTOLOOP is not set
523
524#
525# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
526#
499# CONFIG_BLK_DEV_NBD is not set 527# CONFIG_BLK_DEV_NBD is not set
500# CONFIG_BLK_DEV_SX8 is not set 528# CONFIG_BLK_DEV_SX8 is not set
501CONFIG_BLK_DEV_RAM=y 529CONFIG_BLK_DEV_RAM=y
@@ -558,8 +586,11 @@ CONFIG_SCSI_LOWLEVEL=y
558# CONFIG_ISCSI_TCP is not set 586# CONFIG_ISCSI_TCP is not set
559# CONFIG_SCSI_CXGB3_ISCSI is not set 587# CONFIG_SCSI_CXGB3_ISCSI is not set
560# CONFIG_SCSI_BNX2_ISCSI is not set 588# CONFIG_SCSI_BNX2_ISCSI is not set
589# CONFIG_BE2ISCSI is not set
561# CONFIG_BLK_DEV_3W_XXXX_RAID is not set 590# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
591# CONFIG_SCSI_HPSA is not set
562# CONFIG_SCSI_3W_9XXX is not set 592# CONFIG_SCSI_3W_9XXX is not set
593# CONFIG_SCSI_3W_SAS is not set
563# CONFIG_SCSI_ACARD is not set 594# CONFIG_SCSI_ACARD is not set
564# CONFIG_SCSI_AACRAID is not set 595# CONFIG_SCSI_AACRAID is not set
565# CONFIG_SCSI_AIC7XXX is not set 596# CONFIG_SCSI_AIC7XXX is not set
@@ -593,7 +624,9 @@ CONFIG_SCSI_LOWLEVEL=y
593# CONFIG_SCSI_NSP32 is not set 624# CONFIG_SCSI_NSP32 is not set
594# CONFIG_SCSI_DEBUG is not set 625# CONFIG_SCSI_DEBUG is not set
595# CONFIG_SCSI_PMCRAID is not set 626# CONFIG_SCSI_PMCRAID is not set
627# CONFIG_SCSI_PM8001 is not set
596# CONFIG_SCSI_SRP is not set 628# CONFIG_SCSI_SRP is not set
629# CONFIG_SCSI_BFA_FC is not set
597# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set 630# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set
598# CONFIG_SCSI_DH is not set 631# CONFIG_SCSI_DH is not set
599# CONFIG_SCSI_OSD_INITIATOR is not set 632# CONFIG_SCSI_OSD_INITIATOR is not set
@@ -648,15 +681,16 @@ CONFIG_ATA_SFF=y
648# CONFIG_PATA_OPTI is not set 681# CONFIG_PATA_OPTI is not set
649# CONFIG_PATA_OPTIDMA is not set 682# CONFIG_PATA_OPTIDMA is not set
650# CONFIG_PATA_PCMCIA is not set 683# CONFIG_PATA_PCMCIA is not set
684# CONFIG_PATA_PDC2027X is not set
651# CONFIG_PATA_PDC_OLD is not set 685# CONFIG_PATA_PDC_OLD is not set
652# CONFIG_PATA_RADISYS is not set 686# CONFIG_PATA_RADISYS is not set
653# CONFIG_PATA_RDC is not set 687# CONFIG_PATA_RDC is not set
654# CONFIG_PATA_RZ1000 is not set 688# CONFIG_PATA_RZ1000 is not set
655# CONFIG_PATA_SC1200 is not set 689# CONFIG_PATA_SC1200 is not set
656# CONFIG_PATA_SERVERWORKS is not set 690# CONFIG_PATA_SERVERWORKS is not set
657# CONFIG_PATA_PDC2027X is not set
658# CONFIG_PATA_SIL680 is not set 691# CONFIG_PATA_SIL680 is not set
659# CONFIG_PATA_SIS is not set 692# CONFIG_PATA_SIS is not set
693# CONFIG_PATA_TOSHIBA is not set
660# CONFIG_PATA_VIA is not set 694# CONFIG_PATA_VIA is not set
661# CONFIG_PATA_WINBOND is not set 695# CONFIG_PATA_WINBOND is not set
662CONFIG_PATA_PLATFORM=y 696CONFIG_PATA_PLATFORM=y
@@ -732,6 +766,7 @@ CONFIG_8139TOO_TUNE_TWISTER=y
732# CONFIG_SUNDANCE is not set 766# CONFIG_SUNDANCE is not set
733# CONFIG_TLAN is not set 767# CONFIG_TLAN is not set
734# CONFIG_KS8842 is not set 768# CONFIG_KS8842 is not set
769# CONFIG_KS8851_MLL is not set
735# CONFIG_VIA_RHINE is not set 770# CONFIG_VIA_RHINE is not set
736# CONFIG_SC92031 is not set 771# CONFIG_SC92031 is not set
737# CONFIG_ATL2 is not set 772# CONFIG_ATL2 is not set
@@ -780,8 +815,12 @@ CONFIG_CHELSIO_T3_DEPENDS=y
780# CONFIG_BE2NET is not set 815# CONFIG_BE2NET is not set
781# CONFIG_TR is not set 816# CONFIG_TR is not set
782CONFIG_WLAN=y 817CONFIG_WLAN=y
783# CONFIG_WLAN_PRE80211 is not set 818# CONFIG_PCMCIA_RAYCS is not set
784# CONFIG_WLAN_80211 is not set 819# CONFIG_ATMEL is not set
820# CONFIG_AIRO_CS is not set
821# CONFIG_PCMCIA_WL3501 is not set
822# CONFIG_PRISM54 is not set
823# CONFIG_HOSTAP is not set
785 824
786# 825#
787# Enable WiMAX (Networking options) to see the WiMAX drivers 826# Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -804,6 +843,7 @@ CONFIG_PCMCIA_PCNET=y
804# CONFIG_NETCONSOLE is not set 843# CONFIG_NETCONSOLE is not set
805# CONFIG_NETPOLL is not set 844# CONFIG_NETPOLL is not set
806# CONFIG_NET_POLL_CONTROLLER is not set 845# CONFIG_NET_POLL_CONTROLLER is not set
846# CONFIG_VMXNET3 is not set
807# CONFIG_ISDN is not set 847# CONFIG_ISDN is not set
808# CONFIG_PHONE is not set 848# CONFIG_PHONE is not set
809 849
@@ -813,6 +853,7 @@ CONFIG_PCMCIA_PCNET=y
813CONFIG_INPUT=y 853CONFIG_INPUT=y
814# CONFIG_INPUT_FF_MEMLESS is not set 854# CONFIG_INPUT_FF_MEMLESS is not set
815# CONFIG_INPUT_POLLDEV is not set 855# CONFIG_INPUT_POLLDEV is not set
856# CONFIG_INPUT_SPARSEKMAP is not set
816 857
817# 858#
818# Userland interfaces 859# Userland interfaces
@@ -931,6 +972,7 @@ CONFIG_SSB_POSSIBLE=y
931# 972#
932# CONFIG_MFD_CORE is not set 973# CONFIG_MFD_CORE is not set
933# CONFIG_MFD_SM501 is not set 974# CONFIG_MFD_SM501 is not set
975# CONFIG_MFD_SH_MOBILE_SDHI is not set
934# CONFIG_HTC_PASIC3 is not set 976# CONFIG_HTC_PASIC3 is not set
935# CONFIG_MFD_TMIO is not set 977# CONFIG_MFD_TMIO is not set
936# CONFIG_REGULATOR is not set 978# CONFIG_REGULATOR is not set
@@ -1020,7 +1062,9 @@ CONFIG_RTC_INTF_DEV=y
1020# CONFIG_RTC_DRV_M48T86 is not set 1062# CONFIG_RTC_DRV_M48T86 is not set
1021# CONFIG_RTC_DRV_M48T35 is not set 1063# CONFIG_RTC_DRV_M48T35 is not set
1022# CONFIG_RTC_DRV_M48T59 is not set 1064# CONFIG_RTC_DRV_M48T59 is not set
1065# CONFIG_RTC_DRV_MSM6242 is not set
1023# CONFIG_RTC_DRV_BQ4802 is not set 1066# CONFIG_RTC_DRV_BQ4802 is not set
1067# CONFIG_RTC_DRV_RP5C01 is not set
1024# CONFIG_RTC_DRV_V3020 is not set 1068# CONFIG_RTC_DRV_V3020 is not set
1025 1069
1026# 1070#
@@ -1195,10 +1239,11 @@ CONFIG_FRAME_WARN=1024
1195# CONFIG_DEBUG_FS is not set 1239# CONFIG_DEBUG_FS is not set
1196# CONFIG_HEADERS_CHECK is not set 1240# CONFIG_HEADERS_CHECK is not set
1197# CONFIG_DEBUG_KERNEL is not set 1241# CONFIG_DEBUG_KERNEL is not set
1198# CONFIG_DEBUG_BUGVERBOSE is not set 1242CONFIG_DEBUG_BUGVERBOSE=y
1199# CONFIG_DEBUG_MEMORY_INIT is not set 1243# CONFIG_DEBUG_MEMORY_INIT is not set
1200# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1244# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1201# CONFIG_LATENCYTOP is not set 1245# CONFIG_LATENCYTOP is not set
1246# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1202CONFIG_HAVE_FUNCTION_TRACER=y 1247CONFIG_HAVE_FUNCTION_TRACER=y
1203CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 1248CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
1204CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y 1249CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
@@ -1211,8 +1256,6 @@ CONFIG_TRACING_SUPPORT=y
1211# CONFIG_SAMPLES is not set 1256# CONFIG_SAMPLES is not set
1212CONFIG_HAVE_ARCH_KGDB=y 1257CONFIG_HAVE_ARCH_KGDB=y
1213CONFIG_SH_STANDARD_BIOS=y 1258CONFIG_SH_STANDARD_BIOS=y
1214# CONFIG_EARLY_SCIF_CONSOLE is not set
1215# CONFIG_EARLY_PRINTK is not set
1216# CONFIG_DWARF_UNWINDER is not set 1259# CONFIG_DWARF_UNWINDER is not set
1217 1260
1218# 1261#
@@ -1221,7 +1264,11 @@ CONFIG_SH_STANDARD_BIOS=y
1221# CONFIG_KEYS is not set 1264# CONFIG_KEYS is not set
1222# CONFIG_SECURITY is not set 1265# CONFIG_SECURITY is not set
1223# CONFIG_SECURITYFS is not set 1266# CONFIG_SECURITYFS is not set
1224# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1267# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1268# CONFIG_DEFAULT_SECURITY_SMACK is not set
1269# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1270CONFIG_DEFAULT_SECURITY_DAC=y
1271CONFIG_DEFAULT_SECURITY=""
1225CONFIG_CRYPTO=y 1272CONFIG_CRYPTO=y
1226 1273
1227# 1274#
diff --git a/arch/sh/configs/magicpanelr2_defconfig b/arch/sh/configs/magicpanelr2_defconfig
index 79091e3e32c4..a7a16ce357ad 100644
--- a/arch/sh/configs/magicpanelr2_defconfig
+++ b/arch/sh/configs/magicpanelr2_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Thu Sep 24 18:10:49 2009 4# Mon Jan 4 11:37:42 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -30,6 +30,7 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
30CONFIG_ARCH_NO_VIRT_TO_BUS=y 30CONFIG_ARCH_NO_VIRT_TO_BUS=y
31CONFIG_ARCH_HAS_DEFAULT_IDLE=y 31CONFIG_ARCH_HAS_DEFAULT_IDLE=y
32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
33CONFIG_DMA_NONCOHERENT=y
33CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 34CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
34CONFIG_CONSTRUCTORS=y 35CONFIG_CONSTRUCTORS=y
35 36
@@ -63,6 +64,7 @@ CONFIG_AUDIT=y
63# 64#
64CONFIG_TREE_RCU=y 65CONFIG_TREE_RCU=y
65# CONFIG_TREE_PREEMPT_RCU is not set 66# CONFIG_TREE_PREEMPT_RCU is not set
67# CONFIG_TINY_RCU is not set
66# CONFIG_RCU_TRACE is not set 68# CONFIG_RCU_TRACE is not set
67CONFIG_RCU_FANOUT=32 69CONFIG_RCU_FANOUT=32
68# CONFIG_RCU_FANOUT_EXACT is not set 70# CONFIG_RCU_FANOUT_EXACT is not set
@@ -102,6 +104,7 @@ CONFIG_EVENTFD=y
102CONFIG_SHMEM=y 104CONFIG_SHMEM=y
103CONFIG_AIO=y 105CONFIG_AIO=y
104CONFIG_HAVE_PERF_EVENTS=y 106CONFIG_HAVE_PERF_EVENTS=y
107CONFIG_PERF_USE_VMALLOC=y
105 108
106# 109#
107# Kernel Performance Events And Counters 110# Kernel Performance Events And Counters
@@ -120,6 +123,7 @@ CONFIG_HAVE_IOREMAP_PROT=y
120CONFIG_HAVE_KPROBES=y 123CONFIG_HAVE_KPROBES=y
121CONFIG_HAVE_KRETPROBES=y 124CONFIG_HAVE_KRETPROBES=y
122CONFIG_HAVE_ARCH_TRACEHOOK=y 125CONFIG_HAVE_ARCH_TRACEHOOK=y
126CONFIG_HAVE_DMA_ATTRS=y
123CONFIG_HAVE_CLK=y 127CONFIG_HAVE_CLK=y
124CONFIG_HAVE_DMA_API_DEBUG=y 128CONFIG_HAVE_DMA_API_DEBUG=y
125 129
@@ -146,14 +150,41 @@ CONFIG_LBDAF=y
146# IO Schedulers 150# IO Schedulers
147# 151#
148CONFIG_IOSCHED_NOOP=y 152CONFIG_IOSCHED_NOOP=y
149# CONFIG_IOSCHED_AS is not set
150# CONFIG_IOSCHED_DEADLINE is not set 153# CONFIG_IOSCHED_DEADLINE is not set
151# CONFIG_IOSCHED_CFQ is not set 154# CONFIG_IOSCHED_CFQ is not set
152# CONFIG_DEFAULT_AS is not set
153# CONFIG_DEFAULT_DEADLINE is not set 155# CONFIG_DEFAULT_DEADLINE is not set
154# CONFIG_DEFAULT_CFQ is not set 156# CONFIG_DEFAULT_CFQ is not set
155CONFIG_DEFAULT_NOOP=y 157CONFIG_DEFAULT_NOOP=y
156CONFIG_DEFAULT_IOSCHED="noop" 158CONFIG_DEFAULT_IOSCHED="noop"
159# CONFIG_INLINE_SPIN_TRYLOCK is not set
160# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
161# CONFIG_INLINE_SPIN_LOCK is not set
162# CONFIG_INLINE_SPIN_LOCK_BH is not set
163# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
164# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
165CONFIG_INLINE_SPIN_UNLOCK=y
166# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
167CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
168# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
169# CONFIG_INLINE_READ_TRYLOCK is not set
170# CONFIG_INLINE_READ_LOCK is not set
171# CONFIG_INLINE_READ_LOCK_BH is not set
172# CONFIG_INLINE_READ_LOCK_IRQ is not set
173# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
174CONFIG_INLINE_READ_UNLOCK=y
175# CONFIG_INLINE_READ_UNLOCK_BH is not set
176CONFIG_INLINE_READ_UNLOCK_IRQ=y
177# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
178# CONFIG_INLINE_WRITE_TRYLOCK is not set
179# CONFIG_INLINE_WRITE_LOCK is not set
180# CONFIG_INLINE_WRITE_LOCK_BH is not set
181# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
182# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
183CONFIG_INLINE_WRITE_UNLOCK=y
184# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
185CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
186# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
187# CONFIG_MUTEX_SPIN_ON_OWNER is not set
157# CONFIG_FREEZER is not set 188# CONFIG_FREEZER is not set
158 189
159# 190#
@@ -229,8 +260,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
229# CONFIG_PHYS_ADDR_T_64BIT is not set 260# CONFIG_PHYS_ADDR_T_64BIT is not set
230CONFIG_ZONE_DMA_FLAG=0 261CONFIG_ZONE_DMA_FLAG=0
231CONFIG_NR_QUICK=2 262CONFIG_NR_QUICK=2
232CONFIG_HAVE_MLOCK=y
233CONFIG_HAVE_MLOCKED_PAGE_BIT=y
234# CONFIG_KSM is not set 263# CONFIG_KSM is not set
235CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 264CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
236 265
@@ -283,8 +312,8 @@ CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
283# 312#
284# DMA support 313# DMA support
285# 314#
286CONFIG_SH_DMA_API=y
287CONFIG_SH_DMA=y 315CONFIG_SH_DMA=y
316CONFIG_SH_DMA_API=y
288CONFIG_NR_ONCHIP_DMA_CHANNELS=6 317CONFIG_NR_ONCHIP_DMA_CHANNELS=6
289# CONFIG_NR_DMA_CHANNELS_BOOL is not set 318# CONFIG_NR_DMA_CHANNELS_BOOL is not set
290 319
@@ -416,9 +445,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
416# CONFIG_AF_RXRPC is not set 445# CONFIG_AF_RXRPC is not set
417CONFIG_WIRELESS=y 446CONFIG_WIRELESS=y
418# CONFIG_CFG80211 is not set 447# CONFIG_CFG80211 is not set
419CONFIG_CFG80211_DEFAULT_PS_VALUE=0
420# CONFIG_WIRELESS_OLD_REGULATORY is not set
421# CONFIG_WIRELESS_EXT is not set
422# CONFIG_LIB80211 is not set 448# CONFIG_LIB80211 is not set
423 449
424# 450#
@@ -534,6 +560,10 @@ CONFIG_MTD_PHYSMAP=y
534CONFIG_BLK_DEV=y 560CONFIG_BLK_DEV=y
535# CONFIG_BLK_DEV_COW_COMMON is not set 561# CONFIG_BLK_DEV_COW_COMMON is not set
536# CONFIG_BLK_DEV_LOOP is not set 562# CONFIG_BLK_DEV_LOOP is not set
563
564#
565# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
566#
537# CONFIG_BLK_DEV_NBD is not set 567# CONFIG_BLK_DEV_NBD is not set
538CONFIG_BLK_DEV_RAM=y 568CONFIG_BLK_DEV_RAM=y
539CONFIG_BLK_DEV_RAM_COUNT=16 569CONFIG_BLK_DEV_RAM_COUNT=16
@@ -607,11 +637,11 @@ CONFIG_SMSC911X=y
607# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set 637# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
608# CONFIG_B44 is not set 638# CONFIG_B44 is not set
609# CONFIG_KS8842 is not set 639# CONFIG_KS8842 is not set
640# CONFIG_KS8851_MLL is not set
610# CONFIG_NETDEV_1000 is not set 641# CONFIG_NETDEV_1000 is not set
611# CONFIG_NETDEV_10000 is not set 642# CONFIG_NETDEV_10000 is not set
612CONFIG_WLAN=y 643CONFIG_WLAN=y
613# CONFIG_WLAN_PRE80211 is not set 644# CONFIG_HOSTAP is not set
614# CONFIG_WLAN_80211 is not set
615 645
616# 646#
617# Enable WiMAX (Networking options) to see the WiMAX drivers 647# Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -631,6 +661,7 @@ CONFIG_WLAN=y
631CONFIG_INPUT=y 661CONFIG_INPUT=y
632# CONFIG_INPUT_FF_MEMLESS is not set 662# CONFIG_INPUT_FF_MEMLESS is not set
633# CONFIG_INPUT_POLLDEV is not set 663# CONFIG_INPUT_POLLDEV is not set
664# CONFIG_INPUT_SPARSEKMAP is not set
634 665
635# 666#
636# Userland interfaces 667# Userland interfaces
@@ -675,6 +706,7 @@ CONFIG_SERIO=y
675CONFIG_SERIO_SERPORT=y 706CONFIG_SERIO_SERPORT=y
676CONFIG_SERIO_LIBPS2=y 707CONFIG_SERIO_LIBPS2=y
677# CONFIG_SERIO_RAW is not set 708# CONFIG_SERIO_RAW is not set
709# CONFIG_SERIO_ALTERA_PS2 is not set
678# CONFIG_GAMEPORT is not set 710# CONFIG_GAMEPORT is not set
679 711
680# 712#
@@ -766,6 +798,7 @@ CONFIG_SSB_POSSIBLE=y
766# 798#
767# CONFIG_MFD_CORE is not set 799# CONFIG_MFD_CORE is not set
768# CONFIG_MFD_SM501 is not set 800# CONFIG_MFD_SM501 is not set
801# CONFIG_MFD_SH_MOBILE_SDHI is not set
769# CONFIG_HTC_PASIC3 is not set 802# CONFIG_HTC_PASIC3 is not set
770# CONFIG_MFD_TMIO is not set 803# CONFIG_MFD_TMIO is not set
771# CONFIG_REGULATOR is not set 804# CONFIG_REGULATOR is not set
@@ -824,7 +857,9 @@ CONFIG_RTC_INTF_DEV=y
824# CONFIG_RTC_DRV_M48T86 is not set 857# CONFIG_RTC_DRV_M48T86 is not set
825# CONFIG_RTC_DRV_M48T35 is not set 858# CONFIG_RTC_DRV_M48T35 is not set
826# CONFIG_RTC_DRV_M48T59 is not set 859# CONFIG_RTC_DRV_M48T59 is not set
860# CONFIG_RTC_DRV_MSM6242 is not set
827# CONFIG_RTC_DRV_BQ4802 is not set 861# CONFIG_RTC_DRV_BQ4802 is not set
862# CONFIG_RTC_DRV_RP5C01 is not set
828# CONFIG_RTC_DRV_V3020 is not set 863# CONFIG_RTC_DRV_V3020 is not set
829 864
830# 865#
@@ -898,7 +933,6 @@ CONFIG_PROC_PAGE_MONITOR=y
898CONFIG_SYSFS=y 933CONFIG_SYSFS=y
899CONFIG_TMPFS=y 934CONFIG_TMPFS=y
900# CONFIG_TMPFS_POSIX_ACL is not set 935# CONFIG_TMPFS_POSIX_ACL is not set
901# CONFIG_HUGETLBFS is not set
902# CONFIG_HUGETLB_PAGE is not set 936# CONFIG_HUGETLB_PAGE is not set
903# CONFIG_CONFIGFS_FS is not set 937# CONFIG_CONFIGFS_FS is not set
904CONFIG_MISC_FILESYSTEMS=y 938CONFIG_MISC_FILESYSTEMS=y
@@ -1072,9 +1106,6 @@ CONFIG_BRANCH_PROFILE_NONE=y
1072CONFIG_HAVE_ARCH_KGDB=y 1106CONFIG_HAVE_ARCH_KGDB=y
1073# CONFIG_KGDB is not set 1107# CONFIG_KGDB is not set
1074# CONFIG_SH_STANDARD_BIOS is not set 1108# CONFIG_SH_STANDARD_BIOS is not set
1075CONFIG_EARLY_SCIF_CONSOLE=y
1076CONFIG_EARLY_SCIF_CONSOLE_PORT=0xa4430000
1077CONFIG_EARLY_PRINTK=y
1078# CONFIG_STACK_DEBUG is not set 1109# CONFIG_STACK_DEBUG is not set
1079# CONFIG_DEBUG_STACK_USAGE is not set 1110# CONFIG_DEBUG_STACK_USAGE is not set
1080# CONFIG_4KSTACKS is not set 1111# CONFIG_4KSTACKS is not set
@@ -1088,7 +1119,11 @@ CONFIG_DUMP_CODE=y
1088# CONFIG_KEYS is not set 1119# CONFIG_KEYS is not set
1089# CONFIG_SECURITY is not set 1120# CONFIG_SECURITY is not set
1090# CONFIG_SECURITYFS is not set 1121# CONFIG_SECURITYFS is not set
1091# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1122# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1123# CONFIG_DEFAULT_SECURITY_SMACK is not set
1124# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1125CONFIG_DEFAULT_SECURITY_DAC=y
1126CONFIG_DEFAULT_SECURITY=""
1092# CONFIG_CRYPTO is not set 1127# CONFIG_CRYPTO is not set
1093# CONFIG_BINARY_PRINTF is not set 1128# CONFIG_BINARY_PRINTF is not set
1094 1129
diff --git a/arch/sh/configs/microdev_defconfig b/arch/sh/configs/microdev_defconfig
index 6bb5976aff2a..7d43fabdc073 100644
--- a/arch/sh/configs/microdev_defconfig
+++ b/arch/sh/configs/microdev_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Thu Sep 24 18:14:35 2009 4# Mon Jan 4 11:40:41 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -20,6 +20,7 @@ CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set 21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
22CONFIG_ARCH_HIBERNATION_POSSIBLE=y 22CONFIG_ARCH_HIBERNATION_POSSIBLE=y
23CONFIG_SYS_SUPPORTS_HUGETLBFS=y
23CONFIG_SYS_SUPPORTS_TMU=y 24CONFIG_SYS_SUPPORTS_TMU=y
24CONFIG_STACKTRACE_SUPPORT=y 25CONFIG_STACKTRACE_SUPPORT=y
25CONFIG_LOCKDEP_SUPPORT=y 26CONFIG_LOCKDEP_SUPPORT=y
@@ -29,6 +30,7 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
29CONFIG_ARCH_NO_VIRT_TO_BUS=y 30CONFIG_ARCH_NO_VIRT_TO_BUS=y
30CONFIG_ARCH_HAS_DEFAULT_IDLE=y 31CONFIG_ARCH_HAS_DEFAULT_IDLE=y
31CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
33CONFIG_DMA_NONCOHERENT=y
32CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 34CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
33CONFIG_CONSTRUCTORS=y 35CONFIG_CONSTRUCTORS=y
34 36
@@ -60,6 +62,7 @@ CONFIG_BSD_PROCESS_ACCT=y
60# 62#
61CONFIG_TREE_RCU=y 63CONFIG_TREE_RCU=y
62# CONFIG_TREE_PREEMPT_RCU is not set 64# CONFIG_TREE_PREEMPT_RCU is not set
65# CONFIG_TINY_RCU is not set
63# CONFIG_RCU_TRACE is not set 66# CONFIG_RCU_TRACE is not set
64CONFIG_RCU_FANOUT=32 67CONFIG_RCU_FANOUT=32
65# CONFIG_RCU_FANOUT_EXACT is not set 68# CONFIG_RCU_FANOUT_EXACT is not set
@@ -98,6 +101,7 @@ CONFIG_EVENTFD=y
98CONFIG_SHMEM=y 101CONFIG_SHMEM=y
99CONFIG_AIO=y 102CONFIG_AIO=y
100CONFIG_HAVE_PERF_EVENTS=y 103CONFIG_HAVE_PERF_EVENTS=y
104CONFIG_PERF_USE_VMALLOC=y
101 105
102# 106#
103# Kernel Performance Events And Counters 107# Kernel Performance Events And Counters
@@ -115,6 +119,7 @@ CONFIG_HAVE_IOREMAP_PROT=y
115CONFIG_HAVE_KPROBES=y 119CONFIG_HAVE_KPROBES=y
116CONFIG_HAVE_KRETPROBES=y 120CONFIG_HAVE_KRETPROBES=y
117CONFIG_HAVE_ARCH_TRACEHOOK=y 121CONFIG_HAVE_ARCH_TRACEHOOK=y
122CONFIG_HAVE_DMA_ATTRS=y
118CONFIG_HAVE_CLK=y 123CONFIG_HAVE_CLK=y
119CONFIG_HAVE_DMA_API_DEBUG=y 124CONFIG_HAVE_DMA_API_DEBUG=y
120 125
@@ -136,14 +141,41 @@ CONFIG_LBDAF=y
136# IO Schedulers 141# IO Schedulers
137# 142#
138CONFIG_IOSCHED_NOOP=y 143CONFIG_IOSCHED_NOOP=y
139CONFIG_IOSCHED_AS=y
140CONFIG_IOSCHED_DEADLINE=y 144CONFIG_IOSCHED_DEADLINE=y
141CONFIG_IOSCHED_CFQ=y 145CONFIG_IOSCHED_CFQ=y
142CONFIG_DEFAULT_AS=y
143# CONFIG_DEFAULT_DEADLINE is not set 146# CONFIG_DEFAULT_DEADLINE is not set
144# CONFIG_DEFAULT_CFQ is not set 147CONFIG_DEFAULT_CFQ=y
145# CONFIG_DEFAULT_NOOP is not set 148# CONFIG_DEFAULT_NOOP is not set
146CONFIG_DEFAULT_IOSCHED="anticipatory" 149CONFIG_DEFAULT_IOSCHED="cfq"
150# CONFIG_INLINE_SPIN_TRYLOCK is not set
151# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
152# CONFIG_INLINE_SPIN_LOCK is not set
153# CONFIG_INLINE_SPIN_LOCK_BH is not set
154# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
155# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
156# CONFIG_INLINE_SPIN_UNLOCK is not set
157# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
158# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
159# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
160# CONFIG_INLINE_READ_TRYLOCK is not set
161# CONFIG_INLINE_READ_LOCK is not set
162# CONFIG_INLINE_READ_LOCK_BH is not set
163# CONFIG_INLINE_READ_LOCK_IRQ is not set
164# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
165# CONFIG_INLINE_READ_UNLOCK is not set
166# CONFIG_INLINE_READ_UNLOCK_BH is not set
167# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
168# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
169# CONFIG_INLINE_WRITE_TRYLOCK is not set
170# CONFIG_INLINE_WRITE_LOCK is not set
171# CONFIG_INLINE_WRITE_LOCK_BH is not set
172# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
173# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
174# CONFIG_INLINE_WRITE_UNLOCK is not set
175# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
176# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
177# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
178# CONFIG_MUTEX_SPIN_ON_OWNER is not set
147# CONFIG_FREEZER is not set 179# CONFIG_FREEZER is not set
148 180
149# 181#
@@ -225,8 +257,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
225# CONFIG_PHYS_ADDR_T_64BIT is not set 257# CONFIG_PHYS_ADDR_T_64BIT is not set
226CONFIG_ZONE_DMA_FLAG=0 258CONFIG_ZONE_DMA_FLAG=0
227CONFIG_NR_QUICK=2 259CONFIG_NR_QUICK=2
228CONFIG_HAVE_MLOCK=y
229CONFIG_HAVE_MLOCKED_PAGE_BIT=y
230# CONFIG_KSM is not set 260# CONFIG_KSM is not set
231CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 261CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
232 262
@@ -272,8 +302,8 @@ CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
272# 302#
273# DMA support 303# DMA support
274# 304#
275CONFIG_SH_DMA_API=y
276CONFIG_SH_DMA=y 305CONFIG_SH_DMA=y
306CONFIG_SH_DMA_API=y
277CONFIG_NR_ONCHIP_DMA_CHANNELS=6 307CONFIG_NR_ONCHIP_DMA_CHANNELS=6
278# CONFIG_NR_DMA_CHANNELS_BOOL is not set 308# CONFIG_NR_DMA_CHANNELS_BOOL is not set
279 309
@@ -312,7 +342,6 @@ CONFIG_GUSA=y
312CONFIG_ZERO_PAGE_OFFSET=0x00001000 342CONFIG_ZERO_PAGE_OFFSET=0x00001000
313CONFIG_BOOT_LINK_OFFSET=0x00800000 343CONFIG_BOOT_LINK_OFFSET=0x00800000
314CONFIG_ENTRY_OFFSET=0x00001000 344CONFIG_ENTRY_OFFSET=0x00001000
315# CONFIG_UBC_WAKEUP is not set
316CONFIG_CMDLINE_OVERWRITE=y 345CONFIG_CMDLINE_OVERWRITE=y
317# CONFIG_CMDLINE_EXTEND is not set 346# CONFIG_CMDLINE_EXTEND is not set
318CONFIG_CMDLINE="console=ttySC0,115200 root=/dev/hda1" 347CONFIG_CMDLINE="console=ttySC0,115200 root=/dev/hda1"
@@ -412,9 +441,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
412# CONFIG_AF_RXRPC is not set 441# CONFIG_AF_RXRPC is not set
413CONFIG_WIRELESS=y 442CONFIG_WIRELESS=y
414# CONFIG_CFG80211 is not set 443# CONFIG_CFG80211 is not set
415CONFIG_CFG80211_DEFAULT_PS_VALUE=0
416# CONFIG_WIRELESS_OLD_REGULATORY is not set
417# CONFIG_WIRELESS_EXT is not set
418# CONFIG_LIB80211 is not set 444# CONFIG_LIB80211 is not set
419 445
420# 446#
@@ -443,6 +469,10 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
443CONFIG_BLK_DEV=y 469CONFIG_BLK_DEV=y
444# CONFIG_BLK_DEV_COW_COMMON is not set 470# CONFIG_BLK_DEV_COW_COMMON is not set
445# CONFIG_BLK_DEV_LOOP is not set 471# CONFIG_BLK_DEV_LOOP is not set
472
473#
474# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
475#
446# CONFIG_BLK_DEV_NBD is not set 476# CONFIG_BLK_DEV_NBD is not set
447CONFIG_BLK_DEV_RAM=y 477CONFIG_BLK_DEV_RAM=y
448CONFIG_BLK_DEV_RAM_COUNT=16 478CONFIG_BLK_DEV_RAM_COUNT=16
@@ -517,11 +547,11 @@ CONFIG_SMC91X=y
517# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set 547# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
518# CONFIG_B44 is not set 548# CONFIG_B44 is not set
519# CONFIG_KS8842 is not set 549# CONFIG_KS8842 is not set
550# CONFIG_KS8851_MLL is not set
520CONFIG_NETDEV_1000=y 551CONFIG_NETDEV_1000=y
521CONFIG_NETDEV_10000=y 552CONFIG_NETDEV_10000=y
522CONFIG_WLAN=y 553CONFIG_WLAN=y
523# CONFIG_WLAN_PRE80211 is not set 554# CONFIG_HOSTAP is not set
524# CONFIG_WLAN_80211 is not set
525 555
526# 556#
527# Enable WiMAX (Networking options) to see the WiMAX drivers 557# Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -616,6 +646,7 @@ CONFIG_SSB_POSSIBLE=y
616# 646#
617# CONFIG_MFD_CORE is not set 647# CONFIG_MFD_CORE is not set
618# CONFIG_MFD_SM501 is not set 648# CONFIG_MFD_SM501 is not set
649# CONFIG_MFD_SH_MOBILE_SDHI is not set
619# CONFIG_HTC_PASIC3 is not set 650# CONFIG_HTC_PASIC3 is not set
620# CONFIG_MFD_TMIO is not set 651# CONFIG_MFD_TMIO is not set
621# CONFIG_REGULATOR is not set 652# CONFIG_REGULATOR is not set
@@ -835,10 +866,11 @@ CONFIG_FRAME_WARN=1024
835# CONFIG_DEBUG_FS is not set 866# CONFIG_DEBUG_FS is not set
836# CONFIG_HEADERS_CHECK is not set 867# CONFIG_HEADERS_CHECK is not set
837# CONFIG_DEBUG_KERNEL is not set 868# CONFIG_DEBUG_KERNEL is not set
838# CONFIG_DEBUG_BUGVERBOSE is not set 869CONFIG_DEBUG_BUGVERBOSE=y
839# CONFIG_DEBUG_MEMORY_INIT is not set 870# CONFIG_DEBUG_MEMORY_INIT is not set
840# CONFIG_RCU_CPU_STALL_DETECTOR is not set 871# CONFIG_RCU_CPU_STALL_DETECTOR is not set
841# CONFIG_LATENCYTOP is not set 872# CONFIG_LATENCYTOP is not set
873# CONFIG_SYSCTL_SYSCALL_CHECK is not set
842CONFIG_HAVE_FUNCTION_TRACER=y 874CONFIG_HAVE_FUNCTION_TRACER=y
843CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 875CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
844CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y 876CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
@@ -851,7 +883,6 @@ CONFIG_TRACING_SUPPORT=y
851# CONFIG_SAMPLES is not set 883# CONFIG_SAMPLES is not set
852CONFIG_HAVE_ARCH_KGDB=y 884CONFIG_HAVE_ARCH_KGDB=y
853# CONFIG_SH_STANDARD_BIOS is not set 885# CONFIG_SH_STANDARD_BIOS is not set
854# CONFIG_EARLY_SCIF_CONSOLE is not set
855# CONFIG_DWARF_UNWINDER is not set 886# CONFIG_DWARF_UNWINDER is not set
856 887
857# 888#
@@ -860,7 +891,11 @@ CONFIG_HAVE_ARCH_KGDB=y
860# CONFIG_KEYS is not set 891# CONFIG_KEYS is not set
861# CONFIG_SECURITY is not set 892# CONFIG_SECURITY is not set
862# CONFIG_SECURITYFS is not set 893# CONFIG_SECURITYFS is not set
863# CONFIG_SECURITY_FILE_CAPABILITIES is not set 894# CONFIG_DEFAULT_SECURITY_SELINUX is not set
895# CONFIG_DEFAULT_SECURITY_SMACK is not set
896# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
897CONFIG_DEFAULT_SECURITY_DAC=y
898CONFIG_DEFAULT_SECURITY=""
864CONFIG_CRYPTO=y 899CONFIG_CRYPTO=y
865 900
866# 901#
diff --git a/arch/sh/configs/migor_defconfig b/arch/sh/configs/migor_defconfig
index 65018283c3a8..d2b183117771 100644
--- a/arch/sh/configs/migor_defconfig
+++ b/arch/sh/configs/migor_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Thu Sep 24 18:17:41 2009 4# Mon Jan 4 11:41:41 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -20,6 +20,7 @@ CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
21CONFIG_ARCH_SUSPEND_POSSIBLE=y 21CONFIG_ARCH_SUSPEND_POSSIBLE=y
22CONFIG_ARCH_HIBERNATION_POSSIBLE=y 22CONFIG_ARCH_HIBERNATION_POSSIBLE=y
23CONFIG_SYS_SUPPORTS_HUGETLBFS=y
23CONFIG_SYS_SUPPORTS_NUMA=y 24CONFIG_SYS_SUPPORTS_NUMA=y
24CONFIG_SYS_SUPPORTS_CMT=y 25CONFIG_SYS_SUPPORTS_CMT=y
25CONFIG_SYS_SUPPORTS_TMU=y 26CONFIG_SYS_SUPPORTS_TMU=y
@@ -31,6 +32,7 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
31CONFIG_ARCH_NO_VIRT_TO_BUS=y 32CONFIG_ARCH_NO_VIRT_TO_BUS=y
32CONFIG_ARCH_HAS_DEFAULT_IDLE=y 33CONFIG_ARCH_HAS_DEFAULT_IDLE=y
33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 34CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
35CONFIG_DMA_NONCOHERENT=y
34CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 36CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
35CONFIG_CONSTRUCTORS=y 37CONFIG_CONSTRUCTORS=y
36 38
@@ -61,6 +63,7 @@ CONFIG_SYSVIPC_SYSCTL=y
61# 63#
62CONFIG_TREE_RCU=y 64CONFIG_TREE_RCU=y
63# CONFIG_TREE_PREEMPT_RCU is not set 65# CONFIG_TREE_PREEMPT_RCU is not set
66# CONFIG_TINY_RCU is not set
64# CONFIG_RCU_TRACE is not set 67# CONFIG_RCU_TRACE is not set
65CONFIG_RCU_FANOUT=32 68CONFIG_RCU_FANOUT=32
66# CONFIG_RCU_FANOUT_EXACT is not set 69# CONFIG_RCU_FANOUT_EXACT is not set
@@ -100,6 +103,7 @@ CONFIG_EVENTFD=y
100CONFIG_SHMEM=y 103CONFIG_SHMEM=y
101CONFIG_AIO=y 104CONFIG_AIO=y
102CONFIG_HAVE_PERF_EVENTS=y 105CONFIG_HAVE_PERF_EVENTS=y
106CONFIG_PERF_USE_VMALLOC=y
103 107
104# 108#
105# Kernel Performance Events And Counters 109# Kernel Performance Events And Counters
@@ -121,6 +125,7 @@ CONFIG_HAVE_IOREMAP_PROT=y
121CONFIG_HAVE_KPROBES=y 125CONFIG_HAVE_KPROBES=y
122CONFIG_HAVE_KRETPROBES=y 126CONFIG_HAVE_KRETPROBES=y
123CONFIG_HAVE_ARCH_TRACEHOOK=y 127CONFIG_HAVE_ARCH_TRACEHOOK=y
128CONFIG_HAVE_DMA_ATTRS=y
124CONFIG_HAVE_CLK=y 129CONFIG_HAVE_CLK=y
125CONFIG_HAVE_DMA_API_DEBUG=y 130CONFIG_HAVE_DMA_API_DEBUG=y
126 131
@@ -147,14 +152,41 @@ CONFIG_LBDAF=y
147# IO Schedulers 152# IO Schedulers
148# 153#
149CONFIG_IOSCHED_NOOP=y 154CONFIG_IOSCHED_NOOP=y
150CONFIG_IOSCHED_AS=y
151CONFIG_IOSCHED_DEADLINE=y 155CONFIG_IOSCHED_DEADLINE=y
152CONFIG_IOSCHED_CFQ=y 156CONFIG_IOSCHED_CFQ=y
153CONFIG_DEFAULT_AS=y
154# CONFIG_DEFAULT_DEADLINE is not set 157# CONFIG_DEFAULT_DEADLINE is not set
155# CONFIG_DEFAULT_CFQ is not set 158CONFIG_DEFAULT_CFQ=y
156# CONFIG_DEFAULT_NOOP is not set 159# CONFIG_DEFAULT_NOOP is not set
157CONFIG_DEFAULT_IOSCHED="anticipatory" 160CONFIG_DEFAULT_IOSCHED="cfq"
161# CONFIG_INLINE_SPIN_TRYLOCK is not set
162# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
163# CONFIG_INLINE_SPIN_LOCK is not set
164# CONFIG_INLINE_SPIN_LOCK_BH is not set
165# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
166# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
167CONFIG_INLINE_SPIN_UNLOCK=y
168# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
169CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
170# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
171# CONFIG_INLINE_READ_TRYLOCK is not set
172# CONFIG_INLINE_READ_LOCK is not set
173# CONFIG_INLINE_READ_LOCK_BH is not set
174# CONFIG_INLINE_READ_LOCK_IRQ is not set
175# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
176CONFIG_INLINE_READ_UNLOCK=y
177# CONFIG_INLINE_READ_UNLOCK_BH is not set
178CONFIG_INLINE_READ_UNLOCK_IRQ=y
179# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
180# CONFIG_INLINE_WRITE_TRYLOCK is not set
181# CONFIG_INLINE_WRITE_LOCK is not set
182# CONFIG_INLINE_WRITE_LOCK_BH is not set
183# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
184# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
185CONFIG_INLINE_WRITE_UNLOCK=y
186# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
187CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
188# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
189# CONFIG_MUTEX_SPIN_ON_OWNER is not set
158CONFIG_FREEZER=y 190CONFIG_FREEZER=y
159 191
160# 192#
@@ -240,8 +272,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
240# CONFIG_PHYS_ADDR_T_64BIT is not set 272# CONFIG_PHYS_ADDR_T_64BIT is not set
241CONFIG_ZONE_DMA_FLAG=0 273CONFIG_ZONE_DMA_FLAG=0
242CONFIG_NR_QUICK=2 274CONFIG_NR_QUICK=2
243CONFIG_HAVE_MLOCK=y
244CONFIG_HAVE_MLOCKED_PAGE_BIT=y
245# CONFIG_KSM is not set 275# CONFIG_KSM is not set
246CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 276CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
247 277
@@ -277,7 +307,6 @@ CONFIG_SH_MIGOR_QVGA=y
277# 307#
278CONFIG_SH_TIMER_TMU=y 308CONFIG_SH_TIMER_TMU=y
279# CONFIG_SH_TIMER_CMT is not set 309# CONFIG_SH_TIMER_CMT is not set
280CONFIG_SH_PCLK_FREQ=33333333
281CONFIG_SH_CLK_CPG=y 310CONFIG_SH_CLK_CPG=y
282# CONFIG_NO_HZ is not set 311# CONFIG_NO_HZ is not set
283# CONFIG_HIGH_RES_TIMERS is not set 312# CONFIG_HIGH_RES_TIMERS is not set
@@ -433,10 +462,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
433# CONFIG_AF_RXRPC is not set 462# CONFIG_AF_RXRPC is not set
434CONFIG_WIRELESS=y 463CONFIG_WIRELESS=y
435# CONFIG_CFG80211 is not set 464# CONFIG_CFG80211 is not set
436CONFIG_CFG80211_DEFAULT_PS_VALUE=0
437# CONFIG_WIRELESS_OLD_REGULATORY is not set
438CONFIG_WIRELESS_EXT=y
439CONFIG_WIRELESS_EXT_SYSFS=y
440# CONFIG_LIB80211 is not set 465# CONFIG_LIB80211 is not set
441 466
442# 467#
@@ -554,6 +579,10 @@ CONFIG_MTD_NAND_PLATFORM=y
554CONFIG_BLK_DEV=y 579CONFIG_BLK_DEV=y
555# CONFIG_BLK_DEV_COW_COMMON is not set 580# CONFIG_BLK_DEV_COW_COMMON is not set
556# CONFIG_BLK_DEV_LOOP is not set 581# CONFIG_BLK_DEV_LOOP is not set
582
583#
584# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
585#
557# CONFIG_BLK_DEV_NBD is not set 586# CONFIG_BLK_DEV_NBD is not set
558CONFIG_BLK_DEV_RAM=y 587CONFIG_BLK_DEV_RAM=y
559CONFIG_BLK_DEV_RAM_COUNT=16 588CONFIG_BLK_DEV_RAM_COUNT=16
@@ -563,9 +592,11 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
563# CONFIG_ATA_OVER_ETH is not set 592# CONFIG_ATA_OVER_ETH is not set
564# CONFIG_BLK_DEV_HD is not set 593# CONFIG_BLK_DEV_HD is not set
565CONFIG_MISC_DEVICES=y 594CONFIG_MISC_DEVICES=y
595# CONFIG_AD525X_DPOT is not set
566# CONFIG_ICS932S401 is not set 596# CONFIG_ICS932S401 is not set
567# CONFIG_ENCLOSURE_SERVICES is not set 597# CONFIG_ENCLOSURE_SERVICES is not set
568# CONFIG_ISL29003 is not set 598# CONFIG_ISL29003 is not set
599# CONFIG_DS1682 is not set
569# CONFIG_C2PORT is not set 600# CONFIG_C2PORT is not set
570 601
571# 602#
@@ -646,11 +677,11 @@ CONFIG_SMC91X=y
646# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set 677# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
647# CONFIG_B44 is not set 678# CONFIG_B44 is not set
648# CONFIG_KS8842 is not set 679# CONFIG_KS8842 is not set
680# CONFIG_KS8851_MLL is not set
649# CONFIG_NETDEV_1000 is not set 681# CONFIG_NETDEV_1000 is not set
650# CONFIG_NETDEV_10000 is not set 682# CONFIG_NETDEV_10000 is not set
651CONFIG_WLAN=y 683CONFIG_WLAN=y
652# CONFIG_WLAN_PRE80211 is not set 684# CONFIG_HOSTAP is not set
653# CONFIG_WLAN_80211 is not set
654 685
655# 686#
656# Enable WiMAX (Networking options) to see the WiMAX drivers 687# Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -670,6 +701,7 @@ CONFIG_WLAN=y
670CONFIG_INPUT=y 701CONFIG_INPUT=y
671# CONFIG_INPUT_FF_MEMLESS is not set 702# CONFIG_INPUT_FF_MEMLESS is not set
672# CONFIG_INPUT_POLLDEV is not set 703# CONFIG_INPUT_POLLDEV is not set
704# CONFIG_INPUT_SPARSEKMAP is not set
673 705
674# 706#
675# Userland interfaces 707# Userland interfaces
@@ -776,7 +808,6 @@ CONFIG_I2C_SH_MOBILE=y
776# 808#
777# Miscellaneous I2C Chip support 809# Miscellaneous I2C Chip support
778# 810#
779# CONFIG_DS1682 is not set
780# CONFIG_SENSORS_TSL2550 is not set 811# CONFIG_SENSORS_TSL2550 is not set
781# CONFIG_I2C_DEBUG_CORE is not set 812# CONFIG_I2C_DEBUG_CORE is not set
782# CONFIG_I2C_DEBUG_ALGO is not set 813# CONFIG_I2C_DEBUG_ALGO is not set
@@ -831,16 +862,19 @@ CONFIG_SSB_POSSIBLE=y
831# 862#
832# CONFIG_MFD_CORE is not set 863# CONFIG_MFD_CORE is not set
833# CONFIG_MFD_SM501 is not set 864# CONFIG_MFD_SM501 is not set
865# CONFIG_MFD_SH_MOBILE_SDHI is not set
834# CONFIG_HTC_PASIC3 is not set 866# CONFIG_HTC_PASIC3 is not set
835# CONFIG_TPS65010 is not set 867# CONFIG_TPS65010 is not set
836# CONFIG_TWL4030_CORE is not set 868# CONFIG_TWL4030_CORE is not set
837# CONFIG_MFD_TMIO is not set 869# CONFIG_MFD_TMIO is not set
838# CONFIG_PMIC_DA903X is not set 870# CONFIG_PMIC_DA903X is not set
871# CONFIG_PMIC_ADP5520 is not set
839# CONFIG_MFD_WM8400 is not set 872# CONFIG_MFD_WM8400 is not set
840# CONFIG_MFD_WM831X is not set 873# CONFIG_MFD_WM831X is not set
841# CONFIG_MFD_WM8350_I2C is not set 874# CONFIG_MFD_WM8350_I2C is not set
842# CONFIG_MFD_PCF50633 is not set 875# CONFIG_MFD_PCF50633 is not set
843# CONFIG_AB3100_CORE is not set 876# CONFIG_AB3100_CORE is not set
877# CONFIG_MFD_88PM8607 is not set
844# CONFIG_REGULATOR is not set 878# CONFIG_REGULATOR is not set
845CONFIG_MEDIA_SUPPORT=y 879CONFIG_MEDIA_SUPPORT=y
846 880
@@ -857,6 +891,8 @@ CONFIG_VIDEO_MEDIA=y
857# 891#
858# Multimedia drivers 892# Multimedia drivers
859# 893#
894CONFIG_IR_CORE=y
895CONFIG_VIDEO_IR=y
860# CONFIG_MEDIA_ATTACH is not set 896# CONFIG_MEDIA_ATTACH is not set
861CONFIG_MEDIA_TUNER=y 897CONFIG_MEDIA_TUNER=y
862# CONFIG_MEDIA_TUNER_CUSTOMISE is not set 898# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
@@ -876,6 +912,7 @@ CONFIG_VIDEO_CAPTURE_DRIVERS=y
876# CONFIG_VIDEO_ADV_DEBUG is not set 912# CONFIG_VIDEO_ADV_DEBUG is not set
877# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set 913# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
878CONFIG_VIDEO_HELPER_CHIPS_AUTO=y 914CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
915CONFIG_VIDEO_IR_I2C=y
879# CONFIG_VIDEO_VIVI is not set 916# CONFIG_VIDEO_VIVI is not set
880# CONFIG_VIDEO_SAA5246A is not set 917# CONFIG_VIDEO_SAA5246A is not set
881# CONFIG_VIDEO_SAA5249 is not set 918# CONFIG_VIDEO_SAA5249 is not set
@@ -883,10 +920,13 @@ CONFIG_SOC_CAMERA=y
883# CONFIG_SOC_CAMERA_MT9M001 is not set 920# CONFIG_SOC_CAMERA_MT9M001 is not set
884# CONFIG_SOC_CAMERA_MT9M111 is not set 921# CONFIG_SOC_CAMERA_MT9M111 is not set
885# CONFIG_SOC_CAMERA_MT9T031 is not set 922# CONFIG_SOC_CAMERA_MT9T031 is not set
923# CONFIG_SOC_CAMERA_MT9T112 is not set
886# CONFIG_SOC_CAMERA_MT9V022 is not set 924# CONFIG_SOC_CAMERA_MT9V022 is not set
925# CONFIG_SOC_CAMERA_RJ54N1 is not set
887CONFIG_SOC_CAMERA_TW9910=y 926CONFIG_SOC_CAMERA_TW9910=y
888# CONFIG_SOC_CAMERA_PLATFORM is not set 927# CONFIG_SOC_CAMERA_PLATFORM is not set
889CONFIG_SOC_CAMERA_OV772X=y 928CONFIG_SOC_CAMERA_OV772X=y
929# CONFIG_SOC_CAMERA_OV9640 is not set
890CONFIG_VIDEO_SH_MOBILE_CEU=y 930CONFIG_VIDEO_SH_MOBILE_CEU=y
891# CONFIG_RADIO_ADAPTERS is not set 931# CONFIG_RADIO_ADAPTERS is not set
892# CONFIG_DAB is not set 932# CONFIG_DAB is not set
@@ -1009,10 +1049,12 @@ CONFIG_USB_GADGET_DUALSPEED=y
1009# CONFIG_USB_ETH is not set 1049# CONFIG_USB_ETH is not set
1010# CONFIG_USB_GADGETFS is not set 1050# CONFIG_USB_GADGETFS is not set
1011# CONFIG_USB_FILE_STORAGE is not set 1051# CONFIG_USB_FILE_STORAGE is not set
1012CONFIG_USB_G_SERIAL=y 1052# CONFIG_USB_MASS_STORAGE is not set
1053CONFIG_USB_G_SERIAL=m
1013# CONFIG_USB_MIDI_GADGET is not set 1054# CONFIG_USB_MIDI_GADGET is not set
1014# CONFIG_USB_G_PRINTER is not set 1055# CONFIG_USB_G_PRINTER is not set
1015# CONFIG_USB_CDC_COMPOSITE is not set 1056# CONFIG_USB_CDC_COMPOSITE is not set
1057# CONFIG_USB_G_MULTI is not set
1016 1058
1017# 1059#
1018# OTG and related infrastructure 1060# OTG and related infrastructure
@@ -1051,6 +1093,7 @@ CONFIG_RTC_DRV_RS5C372=y
1051# CONFIG_RTC_DRV_PCF8563 is not set 1093# CONFIG_RTC_DRV_PCF8563 is not set
1052# CONFIG_RTC_DRV_PCF8583 is not set 1094# CONFIG_RTC_DRV_PCF8583 is not set
1053# CONFIG_RTC_DRV_M41T80 is not set 1095# CONFIG_RTC_DRV_M41T80 is not set
1096# CONFIG_RTC_DRV_BQ32K is not set
1054# CONFIG_RTC_DRV_S35390A is not set 1097# CONFIG_RTC_DRV_S35390A is not set
1055# CONFIG_RTC_DRV_FM3130 is not set 1098# CONFIG_RTC_DRV_FM3130 is not set
1056# CONFIG_RTC_DRV_RX8581 is not set 1099# CONFIG_RTC_DRV_RX8581 is not set
@@ -1071,7 +1114,9 @@ CONFIG_RTC_DRV_RS5C372=y
1071# CONFIG_RTC_DRV_M48T86 is not set 1114# CONFIG_RTC_DRV_M48T86 is not set
1072# CONFIG_RTC_DRV_M48T35 is not set 1115# CONFIG_RTC_DRV_M48T35 is not set
1073# CONFIG_RTC_DRV_M48T59 is not set 1116# CONFIG_RTC_DRV_M48T59 is not set
1117# CONFIG_RTC_DRV_MSM6242 is not set
1074# CONFIG_RTC_DRV_BQ4802 is not set 1118# CONFIG_RTC_DRV_BQ4802 is not set
1119# CONFIG_RTC_DRV_RP5C01 is not set
1075# CONFIG_RTC_DRV_V3020 is not set 1120# CONFIG_RTC_DRV_V3020 is not set
1076 1121
1077# 1122#
@@ -1098,6 +1143,7 @@ CONFIG_UIO_PDRV_GENIRQ=y
1098# CONFIG_EXT2_FS is not set 1143# CONFIG_EXT2_FS is not set
1099# CONFIG_EXT3_FS is not set 1144# CONFIG_EXT3_FS is not set
1100# CONFIG_EXT4_FS is not set 1145# CONFIG_EXT4_FS is not set
1146CONFIG_EXT4_USE_FOR_EXT23=y
1101# CONFIG_REISERFS_FS is not set 1147# CONFIG_REISERFS_FS is not set
1102# CONFIG_JFS_FS is not set 1148# CONFIG_JFS_FS is not set
1103# CONFIG_FS_POSIX_ACL is not set 1149# CONFIG_FS_POSIX_ACL is not set
@@ -1206,10 +1252,11 @@ CONFIG_DEBUG_FS=y
1206# CONFIG_HEADERS_CHECK is not set 1252# CONFIG_HEADERS_CHECK is not set
1207# CONFIG_DEBUG_KERNEL is not set 1253# CONFIG_DEBUG_KERNEL is not set
1208CONFIG_STACKTRACE=y 1254CONFIG_STACKTRACE=y
1209# CONFIG_DEBUG_BUGVERBOSE is not set 1255CONFIG_DEBUG_BUGVERBOSE=y
1210# CONFIG_DEBUG_MEMORY_INIT is not set 1256# CONFIG_DEBUG_MEMORY_INIT is not set
1211# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1257# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1212# CONFIG_LATENCYTOP is not set 1258# CONFIG_LATENCYTOP is not set
1259# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1213CONFIG_NOP_TRACER=y 1260CONFIG_NOP_TRACER=y
1214CONFIG_HAVE_FUNCTION_TRACER=y 1261CONFIG_HAVE_FUNCTION_TRACER=y
1215CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 1262CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
@@ -1229,9 +1276,6 @@ CONFIG_TRACING_SUPPORT=y
1229# CONFIG_SAMPLES is not set 1276# CONFIG_SAMPLES is not set
1230CONFIG_HAVE_ARCH_KGDB=y 1277CONFIG_HAVE_ARCH_KGDB=y
1231# CONFIG_SH_STANDARD_BIOS is not set 1278# CONFIG_SH_STANDARD_BIOS is not set
1232CONFIG_EARLY_SCIF_CONSOLE=y
1233CONFIG_EARLY_SCIF_CONSOLE_PORT=0xffe00000
1234CONFIG_EARLY_PRINTK=y
1235# CONFIG_DWARF_UNWINDER is not set 1279# CONFIG_DWARF_UNWINDER is not set
1236 1280
1237# 1281#
@@ -1240,7 +1284,11 @@ CONFIG_EARLY_PRINTK=y
1240# CONFIG_KEYS is not set 1284# CONFIG_KEYS is not set
1241# CONFIG_SECURITY is not set 1285# CONFIG_SECURITY is not set
1242# CONFIG_SECURITYFS is not set 1286# CONFIG_SECURITYFS is not set
1243# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1287# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1288# CONFIG_DEFAULT_SECURITY_SMACK is not set
1289# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1290CONFIG_DEFAULT_SECURITY_DAC=y
1291CONFIG_DEFAULT_SECURITY=""
1244CONFIG_CRYPTO=y 1292CONFIG_CRYPTO=y
1245 1293
1246# 1294#
diff --git a/arch/sh/configs/polaris_defconfig b/arch/sh/configs/polaris_defconfig
index 7fc1952419aa..d50c0314281e 100644
--- a/arch/sh/configs/polaris_defconfig
+++ b/arch/sh/configs/polaris_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Thu Sep 24 18:20:53 2009 4# Mon Jan 4 11:45:25 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -29,6 +29,7 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
29CONFIG_ARCH_NO_VIRT_TO_BUS=y 29CONFIG_ARCH_NO_VIRT_TO_BUS=y
30CONFIG_ARCH_HAS_DEFAULT_IDLE=y 30CONFIG_ARCH_HAS_DEFAULT_IDLE=y
31CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 31CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
32CONFIG_DMA_NONCOHERENT=y
32CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 33CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
33CONFIG_CONSTRUCTORS=y 34CONFIG_CONSTRUCTORS=y
34 35
@@ -63,6 +64,7 @@ CONFIG_AUDIT=y
63# 64#
64CONFIG_TREE_RCU=y 65CONFIG_TREE_RCU=y
65# CONFIG_TREE_PREEMPT_RCU is not set 66# CONFIG_TREE_PREEMPT_RCU is not set
67# CONFIG_TINY_RCU is not set
66# CONFIG_RCU_TRACE is not set 68# CONFIG_RCU_TRACE is not set
67CONFIG_RCU_FANOUT=32 69CONFIG_RCU_FANOUT=32
68# CONFIG_RCU_FANOUT_EXACT is not set 70# CONFIG_RCU_FANOUT_EXACT is not set
@@ -102,6 +104,7 @@ CONFIG_EVENTFD=y
102CONFIG_SHMEM=y 104CONFIG_SHMEM=y
103CONFIG_AIO=y 105CONFIG_AIO=y
104CONFIG_HAVE_PERF_EVENTS=y 106CONFIG_HAVE_PERF_EVENTS=y
107CONFIG_PERF_USE_VMALLOC=y
105 108
106# 109#
107# Kernel Performance Events And Counters 110# Kernel Performance Events And Counters
@@ -120,6 +123,7 @@ CONFIG_HAVE_IOREMAP_PROT=y
120CONFIG_HAVE_KPROBES=y 123CONFIG_HAVE_KPROBES=y
121CONFIG_HAVE_KRETPROBES=y 124CONFIG_HAVE_KRETPROBES=y
122CONFIG_HAVE_ARCH_TRACEHOOK=y 125CONFIG_HAVE_ARCH_TRACEHOOK=y
126CONFIG_HAVE_DMA_ATTRS=y
123CONFIG_HAVE_CLK=y 127CONFIG_HAVE_CLK=y
124CONFIG_HAVE_DMA_API_DEBUG=y 128CONFIG_HAVE_DMA_API_DEBUG=y
125 129
@@ -146,14 +150,41 @@ CONFIG_LBDAF=y
146# IO Schedulers 150# IO Schedulers
147# 151#
148CONFIG_IOSCHED_NOOP=y 152CONFIG_IOSCHED_NOOP=y
149# CONFIG_IOSCHED_AS is not set
150# CONFIG_IOSCHED_DEADLINE is not set 153# CONFIG_IOSCHED_DEADLINE is not set
151CONFIG_IOSCHED_CFQ=y 154CONFIG_IOSCHED_CFQ=y
152# CONFIG_DEFAULT_AS is not set
153# CONFIG_DEFAULT_DEADLINE is not set 155# CONFIG_DEFAULT_DEADLINE is not set
154CONFIG_DEFAULT_CFQ=y 156CONFIG_DEFAULT_CFQ=y
155# CONFIG_DEFAULT_NOOP is not set 157# CONFIG_DEFAULT_NOOP is not set
156CONFIG_DEFAULT_IOSCHED="cfq" 158CONFIG_DEFAULT_IOSCHED="cfq"
159# CONFIG_INLINE_SPIN_TRYLOCK is not set
160# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
161# CONFIG_INLINE_SPIN_LOCK is not set
162# CONFIG_INLINE_SPIN_LOCK_BH is not set
163# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
164# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
165# CONFIG_INLINE_SPIN_UNLOCK is not set
166# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
167# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
168# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
169# CONFIG_INLINE_READ_TRYLOCK is not set
170# CONFIG_INLINE_READ_LOCK is not set
171# CONFIG_INLINE_READ_LOCK_BH is not set
172# CONFIG_INLINE_READ_LOCK_IRQ is not set
173# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
174# CONFIG_INLINE_READ_UNLOCK is not set
175# CONFIG_INLINE_READ_UNLOCK_BH is not set
176# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
177# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
178# CONFIG_INLINE_WRITE_TRYLOCK is not set
179# CONFIG_INLINE_WRITE_LOCK is not set
180# CONFIG_INLINE_WRITE_LOCK_BH is not set
181# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
182# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
183# CONFIG_INLINE_WRITE_UNLOCK is not set
184# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
185# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
186# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
187# CONFIG_MUTEX_SPIN_ON_OWNER is not set
157# CONFIG_FREEZER is not set 188# CONFIG_FREEZER is not set
158 189
159# 190#
@@ -225,12 +256,10 @@ CONFIG_FLATMEM=y
225CONFIG_FLAT_NODE_MEM_MAP=y 256CONFIG_FLAT_NODE_MEM_MAP=y
226CONFIG_SPARSEMEM_STATIC=y 257CONFIG_SPARSEMEM_STATIC=y
227CONFIG_PAGEFLAGS_EXTENDED=y 258CONFIG_PAGEFLAGS_EXTENDED=y
228CONFIG_SPLIT_PTLOCK_CPUS=4 259CONFIG_SPLIT_PTLOCK_CPUS=999999
229# CONFIG_PHYS_ADDR_T_64BIT is not set 260# CONFIG_PHYS_ADDR_T_64BIT is not set
230CONFIG_ZONE_DMA_FLAG=0 261CONFIG_ZONE_DMA_FLAG=0
231CONFIG_NR_QUICK=2 262CONFIG_NR_QUICK=2
232CONFIG_HAVE_MLOCK=y
233CONFIG_HAVE_MLOCKED_PAGE_BIT=y
234# CONFIG_KSM is not set 263# CONFIG_KSM is not set
235CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 264CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
236 265
@@ -279,8 +308,8 @@ CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
279# 308#
280# DMA support 309# DMA support
281# 310#
282CONFIG_SH_DMA_API=y
283CONFIG_SH_DMA=y 311CONFIG_SH_DMA=y
312CONFIG_SH_DMA_API=y
284CONFIG_NR_ONCHIP_DMA_CHANNELS=6 313CONFIG_NR_ONCHIP_DMA_CHANNELS=6
285# CONFIG_NR_DMA_CHANNELS_BOOL is not set 314# CONFIG_NR_DMA_CHANNELS_BOOL is not set
286 315
@@ -409,7 +438,13 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
409# CONFIG_IRDA is not set 438# CONFIG_IRDA is not set
410# CONFIG_BT is not set 439# CONFIG_BT is not set
411# CONFIG_AF_RXRPC is not set 440# CONFIG_AF_RXRPC is not set
412# CONFIG_WIRELESS is not set 441CONFIG_WIRELESS=y
442# CONFIG_CFG80211 is not set
443# CONFIG_LIB80211 is not set
444
445#
446# CFG80211 needs to be enabled for MAC80211
447#
413# CONFIG_WIMAX is not set 448# CONFIG_WIMAX is not set
414# CONFIG_RFKILL is not set 449# CONFIG_RFKILL is not set
415# CONFIG_NET_9P is not set 450# CONFIG_NET_9P is not set
@@ -525,6 +560,10 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2
525CONFIG_BLK_DEV=y 560CONFIG_BLK_DEV=y
526# CONFIG_BLK_DEV_COW_COMMON is not set 561# CONFIG_BLK_DEV_COW_COMMON is not set
527# CONFIG_BLK_DEV_LOOP is not set 562# CONFIG_BLK_DEV_LOOP is not set
563
564#
565# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
566#
528# CONFIG_BLK_DEV_NBD is not set 567# CONFIG_BLK_DEV_NBD is not set
529# CONFIG_BLK_DEV_RAM is not set 568# CONFIG_BLK_DEV_RAM is not set
530# CONFIG_CDROM_PKTCDVD is not set 569# CONFIG_CDROM_PKTCDVD is not set
@@ -595,11 +634,11 @@ CONFIG_SMSC911X=y
595# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set 634# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
596# CONFIG_B44 is not set 635# CONFIG_B44 is not set
597# CONFIG_KS8842 is not set 636# CONFIG_KS8842 is not set
637# CONFIG_KS8851_MLL is not set
598# CONFIG_NETDEV_1000 is not set 638# CONFIG_NETDEV_1000 is not set
599# CONFIG_NETDEV_10000 is not set 639# CONFIG_NETDEV_10000 is not set
600CONFIG_WLAN=y 640CONFIG_WLAN=y
601# CONFIG_WLAN_PRE80211 is not set 641# CONFIG_HOSTAP is not set
602# CONFIG_WLAN_80211 is not set
603 642
604# 643#
605# Enable WiMAX (Networking options) to see the WiMAX drivers 644# Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -619,6 +658,7 @@ CONFIG_WLAN=y
619CONFIG_INPUT=y 658CONFIG_INPUT=y
620# CONFIG_INPUT_FF_MEMLESS is not set 659# CONFIG_INPUT_FF_MEMLESS is not set
621# CONFIG_INPUT_POLLDEV is not set 660# CONFIG_INPUT_POLLDEV is not set
661# CONFIG_INPUT_SPARSEKMAP is not set
622 662
623# 663#
624# Userland interfaces 664# Userland interfaces
@@ -657,7 +697,6 @@ CONFIG_SERIAL_NONSTANDARD=y
657# CONFIG_N_HDLC is not set 697# CONFIG_N_HDLC is not set
658# CONFIG_RISCOM8 is not set 698# CONFIG_RISCOM8 is not set
659# CONFIG_SPECIALIX is not set 699# CONFIG_SPECIALIX is not set
660# CONFIG_RIO is not set
661# CONFIG_STALDRV is not set 700# CONFIG_STALDRV is not set
662 701
663# 702#
@@ -705,6 +744,7 @@ CONFIG_SSB_POSSIBLE=y
705# 744#
706# CONFIG_MFD_CORE is not set 745# CONFIG_MFD_CORE is not set
707# CONFIG_MFD_SM501 is not set 746# CONFIG_MFD_SM501 is not set
747# CONFIG_MFD_SH_MOBILE_SDHI is not set
708# CONFIG_HTC_PASIC3 is not set 748# CONFIG_HTC_PASIC3 is not set
709# CONFIG_MFD_TMIO is not set 749# CONFIG_MFD_TMIO is not set
710# CONFIG_REGULATOR is not set 750# CONFIG_REGULATOR is not set
@@ -764,7 +804,9 @@ CONFIG_RTC_INTF_DEV=y
764# CONFIG_RTC_DRV_M48T86 is not set 804# CONFIG_RTC_DRV_M48T86 is not set
765# CONFIG_RTC_DRV_M48T35 is not set 805# CONFIG_RTC_DRV_M48T35 is not set
766# CONFIG_RTC_DRV_M48T59 is not set 806# CONFIG_RTC_DRV_M48T59 is not set
807# CONFIG_RTC_DRV_MSM6242 is not set
767# CONFIG_RTC_DRV_BQ4802 is not set 808# CONFIG_RTC_DRV_BQ4802 is not set
809# CONFIG_RTC_DRV_RP5C01 is not set
768# CONFIG_RTC_DRV_V3020 is not set 810# CONFIG_RTC_DRV_V3020 is not set
769 811
770# 812#
@@ -787,6 +829,7 @@ CONFIG_RTC_DRV_SH=y
787# CONFIG_EXT2_FS is not set 829# CONFIG_EXT2_FS is not set
788# CONFIG_EXT3_FS is not set 830# CONFIG_EXT3_FS is not set
789# CONFIG_EXT4_FS is not set 831# CONFIG_EXT4_FS is not set
832CONFIG_EXT4_USE_FOR_EXT23=y
790# CONFIG_REISERFS_FS is not set 833# CONFIG_REISERFS_FS is not set
791# CONFIG_JFS_FS is not set 834# CONFIG_JFS_FS is not set
792# CONFIG_FS_POSIX_ACL is not set 835# CONFIG_FS_POSIX_ACL is not set
@@ -833,7 +876,6 @@ CONFIG_PROC_PAGE_MONITOR=y
833CONFIG_SYSFS=y 876CONFIG_SYSFS=y
834CONFIG_TMPFS=y 877CONFIG_TMPFS=y
835# CONFIG_TMPFS_POSIX_ACL is not set 878# CONFIG_TMPFS_POSIX_ACL is not set
836# CONFIG_HUGETLBFS is not set
837# CONFIG_HUGETLB_PAGE is not set 879# CONFIG_HUGETLB_PAGE is not set
838# CONFIG_CONFIGFS_FS is not set 880# CONFIG_CONFIGFS_FS is not set
839CONFIG_MISC_FILESYSTEMS=y 881CONFIG_MISC_FILESYSTEMS=y
@@ -977,9 +1019,6 @@ CONFIG_BRANCH_PROFILE_NONE=y
977CONFIG_HAVE_ARCH_KGDB=y 1019CONFIG_HAVE_ARCH_KGDB=y
978# CONFIG_KGDB is not set 1020# CONFIG_KGDB is not set
979# CONFIG_SH_STANDARD_BIOS is not set 1021# CONFIG_SH_STANDARD_BIOS is not set
980CONFIG_EARLY_SCIF_CONSOLE=y
981CONFIG_EARLY_SCIF_CONSOLE_PORT=0xa4000150
982CONFIG_EARLY_PRINTK=y
983# CONFIG_STACK_DEBUG is not set 1022# CONFIG_STACK_DEBUG is not set
984# CONFIG_DEBUG_STACK_USAGE is not set 1023# CONFIG_DEBUG_STACK_USAGE is not set
985# CONFIG_4KSTACKS is not set 1024# CONFIG_4KSTACKS is not set
@@ -993,7 +1032,11 @@ CONFIG_DUMP_CODE=y
993# CONFIG_KEYS is not set 1032# CONFIG_KEYS is not set
994# CONFIG_SECURITY is not set 1033# CONFIG_SECURITY is not set
995# CONFIG_SECURITYFS is not set 1034# CONFIG_SECURITYFS is not set
996# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1035# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1036# CONFIG_DEFAULT_SECURITY_SMACK is not set
1037# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1038CONFIG_DEFAULT_SECURITY_DAC=y
1039CONFIG_DEFAULT_SECURITY=""
997# CONFIG_CRYPTO is not set 1040# CONFIG_CRYPTO is not set
998# CONFIG_BINARY_PRINTF is not set 1041# CONFIG_BINARY_PRINTF is not set
999 1042
diff --git a/arch/sh/configs/r7780mp_defconfig b/arch/sh/configs/r7780mp_defconfig
index 903b021e8d93..efda63d4070a 100644
--- a/arch/sh/configs/r7780mp_defconfig
+++ b/arch/sh/configs/r7780mp_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Thu Sep 24 18:24:31 2009 4# Mon Jan 4 13:16:13 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -20,6 +20,7 @@ CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set 21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
22CONFIG_ARCH_HIBERNATION_POSSIBLE=y 22CONFIG_ARCH_HIBERNATION_POSSIBLE=y
23CONFIG_SYS_SUPPORTS_HUGETLBFS=y
23CONFIG_SYS_SUPPORTS_PCI=y 24CONFIG_SYS_SUPPORTS_PCI=y
24CONFIG_SYS_SUPPORTS_TMU=y 25CONFIG_SYS_SUPPORTS_TMU=y
25CONFIG_STACKTRACE_SUPPORT=y 26CONFIG_STACKTRACE_SUPPORT=y
@@ -31,6 +32,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
31CONFIG_ARCH_HAS_DEFAULT_IDLE=y 32CONFIG_ARCH_HAS_DEFAULT_IDLE=y
32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
33CONFIG_IO_TRAPPED=y 34CONFIG_IO_TRAPPED=y
35CONFIG_DMA_NONCOHERENT=y
34CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 36CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
35CONFIG_CONSTRUCTORS=y 37CONFIG_CONSTRUCTORS=y
36 38
@@ -63,6 +65,7 @@ CONFIG_BSD_PROCESS_ACCT=y
63# 65#
64CONFIG_TREE_RCU=y 66CONFIG_TREE_RCU=y
65# CONFIG_TREE_PREEMPT_RCU is not set 67# CONFIG_TREE_PREEMPT_RCU is not set
68# CONFIG_TINY_RCU is not set
66# CONFIG_RCU_TRACE is not set 69# CONFIG_RCU_TRACE is not set
67CONFIG_RCU_FANOUT=32 70CONFIG_RCU_FANOUT=32
68# CONFIG_RCU_FANOUT_EXACT is not set 71# CONFIG_RCU_FANOUT_EXACT is not set
@@ -103,6 +106,7 @@ CONFIG_EVENTFD=y
103CONFIG_SHMEM=y 106CONFIG_SHMEM=y
104CONFIG_AIO=y 107CONFIG_AIO=y
105CONFIG_HAVE_PERF_EVENTS=y 108CONFIG_HAVE_PERF_EVENTS=y
109CONFIG_PERF_USE_VMALLOC=y
106 110
107# 111#
108# Kernel Performance Events And Counters 112# Kernel Performance Events And Counters
@@ -110,6 +114,7 @@ CONFIG_HAVE_PERF_EVENTS=y
110CONFIG_PERF_EVENTS=y 114CONFIG_PERF_EVENTS=y
111CONFIG_EVENT_PROFILE=y 115CONFIG_EVENT_PROFILE=y
112# CONFIG_PERF_COUNTERS is not set 116# CONFIG_PERF_COUNTERS is not set
117# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
113CONFIG_VM_EVENT_COUNTERS=y 118CONFIG_VM_EVENT_COUNTERS=y
114CONFIG_PCI_QUIRKS=y 119CONFIG_PCI_QUIRKS=y
115CONFIG_COMPAT_BRK=y 120CONFIG_COMPAT_BRK=y
@@ -125,6 +130,7 @@ CONFIG_HAVE_IOREMAP_PROT=y
125CONFIG_HAVE_KPROBES=y 130CONFIG_HAVE_KPROBES=y
126CONFIG_HAVE_KRETPROBES=y 131CONFIG_HAVE_KRETPROBES=y
127CONFIG_HAVE_ARCH_TRACEHOOK=y 132CONFIG_HAVE_ARCH_TRACEHOOK=y
133CONFIG_HAVE_DMA_ATTRS=y
128CONFIG_HAVE_CLK=y 134CONFIG_HAVE_CLK=y
129CONFIG_HAVE_DMA_API_DEBUG=y 135CONFIG_HAVE_DMA_API_DEBUG=y
130 136
@@ -135,6 +141,7 @@ CONFIG_HAVE_DMA_API_DEBUG=y
135# CONFIG_SLOW_WORK is not set 141# CONFIG_SLOW_WORK is not set
136CONFIG_HAVE_GENERIC_DMA_COHERENT=y 142CONFIG_HAVE_GENERIC_DMA_COHERENT=y
137CONFIG_SLABINFO=y 143CONFIG_SLABINFO=y
144CONFIG_RT_MUTEXES=y
138CONFIG_BASE_SMALL=0 145CONFIG_BASE_SMALL=0
139CONFIG_MODULES=y 146CONFIG_MODULES=y
140# CONFIG_MODULE_FORCE_LOAD is not set 147# CONFIG_MODULE_FORCE_LOAD is not set
@@ -151,14 +158,41 @@ CONFIG_LBDAF=y
151# IO Schedulers 158# IO Schedulers
152# 159#
153CONFIG_IOSCHED_NOOP=y 160CONFIG_IOSCHED_NOOP=y
154# CONFIG_IOSCHED_AS is not set
155# CONFIG_IOSCHED_DEADLINE is not set 161# CONFIG_IOSCHED_DEADLINE is not set
156# CONFIG_IOSCHED_CFQ is not set 162# CONFIG_IOSCHED_CFQ is not set
157# CONFIG_DEFAULT_AS is not set
158# CONFIG_DEFAULT_DEADLINE is not set 163# CONFIG_DEFAULT_DEADLINE is not set
159# CONFIG_DEFAULT_CFQ is not set 164# CONFIG_DEFAULT_CFQ is not set
160CONFIG_DEFAULT_NOOP=y 165CONFIG_DEFAULT_NOOP=y
161CONFIG_DEFAULT_IOSCHED="noop" 166CONFIG_DEFAULT_IOSCHED="noop"
167# CONFIG_INLINE_SPIN_TRYLOCK is not set
168# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
169# CONFIG_INLINE_SPIN_LOCK is not set
170# CONFIG_INLINE_SPIN_LOCK_BH is not set
171# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
172# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
173# CONFIG_INLINE_SPIN_UNLOCK is not set
174# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
175# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
176# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
177# CONFIG_INLINE_READ_TRYLOCK is not set
178# CONFIG_INLINE_READ_LOCK is not set
179# CONFIG_INLINE_READ_LOCK_BH is not set
180# CONFIG_INLINE_READ_LOCK_IRQ is not set
181# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
182# CONFIG_INLINE_READ_UNLOCK is not set
183# CONFIG_INLINE_READ_UNLOCK_BH is not set
184# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
185# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
186# CONFIG_INLINE_WRITE_TRYLOCK is not set
187# CONFIG_INLINE_WRITE_LOCK is not set
188# CONFIG_INLINE_WRITE_LOCK_BH is not set
189# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
190# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
191# CONFIG_INLINE_WRITE_UNLOCK is not set
192# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
193# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
194# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
195# CONFIG_MUTEX_SPIN_ON_OWNER is not set
162# CONFIG_FREEZER is not set 196# CONFIG_FREEZER is not set
163 197
164# 198#
@@ -245,8 +279,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
245# CONFIG_PHYS_ADDR_T_64BIT is not set 279# CONFIG_PHYS_ADDR_T_64BIT is not set
246CONFIG_ZONE_DMA_FLAG=0 280CONFIG_ZONE_DMA_FLAG=0
247CONFIG_NR_QUICK=2 281CONFIG_NR_QUICK=2
248CONFIG_HAVE_MLOCK=y
249CONFIG_HAVE_MLOCKED_PAGE_BIT=y
250# CONFIG_KSM is not set 282# CONFIG_KSM is not set
251CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 283CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
252 284
@@ -342,7 +374,6 @@ CONFIG_CMDLINE="console=ttySC0,115200 root=/dev/sda1"
342# Bus options 374# Bus options
343# 375#
344CONFIG_PCI=y 376CONFIG_PCI=y
345CONFIG_SH_PCIDMA_NONCOHERENT=y
346# CONFIG_PCIEPORTBUS is not set 377# CONFIG_PCIEPORTBUS is not set
347# CONFIG_ARCH_SUPPORTS_MSI is not set 378# CONFIG_ARCH_SUPPORTS_MSI is not set
348CONFIG_PCI_LEGACY=y 379CONFIG_PCI_LEGACY=y
@@ -449,10 +480,6 @@ CONFIG_LLC=m
449# CONFIG_AF_RXRPC is not set 480# CONFIG_AF_RXRPC is not set
450CONFIG_WIRELESS=y 481CONFIG_WIRELESS=y
451# CONFIG_CFG80211 is not set 482# CONFIG_CFG80211 is not set
452CONFIG_CFG80211_DEFAULT_PS_VALUE=0
453# CONFIG_WIRELESS_OLD_REGULATORY is not set
454CONFIG_WIRELESS_EXT=y
455CONFIG_WIRELESS_EXT_SYSFS=y
456# CONFIG_LIB80211 is not set 483# CONFIG_LIB80211 is not set
457 484
458# 485#
@@ -535,7 +562,6 @@ CONFIG_MTD_COMPLEX_MAPPINGS=y
535CONFIG_MTD_PHYSMAP=y 562CONFIG_MTD_PHYSMAP=y
536# CONFIG_MTD_PHYSMAP_COMPAT is not set 563# CONFIG_MTD_PHYSMAP_COMPAT is not set
537# CONFIG_MTD_PCI is not set 564# CONFIG_MTD_PCI is not set
538# CONFIG_MTD_GPIO_ADDR is not set
539# CONFIG_MTD_INTEL_VR_NOR is not set 565# CONFIG_MTD_INTEL_VR_NOR is not set
540# CONFIG_MTD_PLATRAM is not set 566# CONFIG_MTD_PLATRAM is not set
541 567
@@ -573,6 +599,10 @@ CONFIG_BLK_DEV=y
573# CONFIG_BLK_DEV_UMEM is not set 599# CONFIG_BLK_DEV_UMEM is not set
574# CONFIG_BLK_DEV_COW_COMMON is not set 600# CONFIG_BLK_DEV_COW_COMMON is not set
575# CONFIG_BLK_DEV_LOOP is not set 601# CONFIG_BLK_DEV_LOOP is not set
602
603#
604# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
605#
576# CONFIG_BLK_DEV_NBD is not set 606# CONFIG_BLK_DEV_NBD is not set
577# CONFIG_BLK_DEV_SX8 is not set 607# CONFIG_BLK_DEV_SX8 is not set
578CONFIG_BLK_DEV_RAM=y 608CONFIG_BLK_DEV_RAM=y
@@ -583,6 +613,7 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
583# CONFIG_ATA_OVER_ETH is not set 613# CONFIG_ATA_OVER_ETH is not set
584# CONFIG_BLK_DEV_HD is not set 614# CONFIG_BLK_DEV_HD is not set
585CONFIG_MISC_DEVICES=y 615CONFIG_MISC_DEVICES=y
616# CONFIG_AD525X_DPOT is not set
586# CONFIG_PHANTOM is not set 617# CONFIG_PHANTOM is not set
587# CONFIG_SGI_IOC4 is not set 618# CONFIG_SGI_IOC4 is not set
588# CONFIG_TIFM_CORE is not set 619# CONFIG_TIFM_CORE is not set
@@ -590,6 +621,7 @@ CONFIG_MISC_DEVICES=y
590# CONFIG_ENCLOSURE_SERVICES is not set 621# CONFIG_ENCLOSURE_SERVICES is not set
591# CONFIG_HP_ILO is not set 622# CONFIG_HP_ILO is not set
592# CONFIG_ISL29003 is not set 623# CONFIG_ISL29003 is not set
624# CONFIG_DS1682 is not set
593# CONFIG_C2PORT is not set 625# CONFIG_C2PORT is not set
594 626
595# 627#
@@ -640,8 +672,11 @@ CONFIG_SCSI_LOWLEVEL=y
640# CONFIG_ISCSI_TCP is not set 672# CONFIG_ISCSI_TCP is not set
641# CONFIG_SCSI_CXGB3_ISCSI is not set 673# CONFIG_SCSI_CXGB3_ISCSI is not set
642# CONFIG_SCSI_BNX2_ISCSI is not set 674# CONFIG_SCSI_BNX2_ISCSI is not set
675# CONFIG_BE2ISCSI is not set
643# CONFIG_BLK_DEV_3W_XXXX_RAID is not set 676# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
677# CONFIG_SCSI_HPSA is not set
644# CONFIG_SCSI_3W_9XXX is not set 678# CONFIG_SCSI_3W_9XXX is not set
679# CONFIG_SCSI_3W_SAS is not set
645# CONFIG_SCSI_ACARD is not set 680# CONFIG_SCSI_ACARD is not set
646# CONFIG_SCSI_AACRAID is not set 681# CONFIG_SCSI_AACRAID is not set
647# CONFIG_SCSI_AIC7XXX is not set 682# CONFIG_SCSI_AIC7XXX is not set
@@ -675,7 +710,9 @@ CONFIG_SCSI_LOWLEVEL=y
675# CONFIG_SCSI_NSP32 is not set 710# CONFIG_SCSI_NSP32 is not set
676# CONFIG_SCSI_DEBUG is not set 711# CONFIG_SCSI_DEBUG is not set
677# CONFIG_SCSI_PMCRAID is not set 712# CONFIG_SCSI_PMCRAID is not set
713# CONFIG_SCSI_PM8001 is not set
678# CONFIG_SCSI_SRP is not set 714# CONFIG_SCSI_SRP is not set
715# CONFIG_SCSI_BFA_FC is not set
679# CONFIG_SCSI_DH is not set 716# CONFIG_SCSI_DH is not set
680# CONFIG_SCSI_OSD_INITIATOR is not set 717# CONFIG_SCSI_OSD_INITIATOR is not set
681CONFIG_ATA=y 718CONFIG_ATA=y
@@ -728,15 +765,16 @@ CONFIG_SATA_SIL=y
728# CONFIG_PATA_NS87415 is not set 765# CONFIG_PATA_NS87415 is not set
729# CONFIG_PATA_OPTI is not set 766# CONFIG_PATA_OPTI is not set
730# CONFIG_PATA_OPTIDMA is not set 767# CONFIG_PATA_OPTIDMA is not set
768# CONFIG_PATA_PDC2027X is not set
731# CONFIG_PATA_PDC_OLD is not set 769# CONFIG_PATA_PDC_OLD is not set
732# CONFIG_PATA_RADISYS is not set 770# CONFIG_PATA_RADISYS is not set
733# CONFIG_PATA_RDC is not set 771# CONFIG_PATA_RDC is not set
734# CONFIG_PATA_RZ1000 is not set 772# CONFIG_PATA_RZ1000 is not set
735# CONFIG_PATA_SC1200 is not set 773# CONFIG_PATA_SC1200 is not set
736# CONFIG_PATA_SERVERWORKS is not set 774# CONFIG_PATA_SERVERWORKS is not set
737# CONFIG_PATA_PDC2027X is not set
738# CONFIG_PATA_SIL680 is not set 775# CONFIG_PATA_SIL680 is not set
739# CONFIG_PATA_SIS is not set 776# CONFIG_PATA_SIS is not set
777# CONFIG_PATA_TOSHIBA is not set
740# CONFIG_PATA_VIA is not set 778# CONFIG_PATA_VIA is not set
741# CONFIG_PATA_WINBOND is not set 779# CONFIG_PATA_WINBOND is not set
742CONFIG_PATA_PLATFORM=y 780CONFIG_PATA_PLATFORM=y
@@ -813,6 +851,7 @@ CONFIG_8139TOO_8129=y
813# CONFIG_SUNDANCE is not set 851# CONFIG_SUNDANCE is not set
814# CONFIG_TLAN is not set 852# CONFIG_TLAN is not set
815# CONFIG_KS8842 is not set 853# CONFIG_KS8842 is not set
854# CONFIG_KS8851_MLL is not set
816CONFIG_VIA_RHINE=m 855CONFIG_VIA_RHINE=m
817CONFIG_VIA_RHINE_MMIO=y 856CONFIG_VIA_RHINE_MMIO=y
818# CONFIG_SC92031 is not set 857# CONFIG_SC92031 is not set
@@ -862,8 +901,9 @@ CONFIG_CHELSIO_T3_DEPENDS=y
862# CONFIG_BE2NET is not set 901# CONFIG_BE2NET is not set
863# CONFIG_TR is not set 902# CONFIG_TR is not set
864CONFIG_WLAN=y 903CONFIG_WLAN=y
865# CONFIG_WLAN_PRE80211 is not set 904# CONFIG_ATMEL is not set
866# CONFIG_WLAN_80211 is not set 905# CONFIG_PRISM54 is not set
906# CONFIG_HOSTAP is not set
867 907
868# 908#
869# Enable WiMAX (Networking options) to see the WiMAX drivers 909# Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -877,6 +917,7 @@ CONFIG_WLAN=y
877# CONFIG_NETCONSOLE is not set 917# CONFIG_NETCONSOLE is not set
878# CONFIG_NETPOLL is not set 918# CONFIG_NETPOLL is not set
879# CONFIG_NET_POLL_CONTROLLER is not set 919# CONFIG_NET_POLL_CONTROLLER is not set
920# CONFIG_VMXNET3 is not set
880# CONFIG_ISDN is not set 921# CONFIG_ISDN is not set
881# CONFIG_PHONE is not set 922# CONFIG_PHONE is not set
882 923
@@ -886,6 +927,7 @@ CONFIG_WLAN=y
886CONFIG_INPUT=y 927CONFIG_INPUT=y
887# CONFIG_INPUT_FF_MEMLESS is not set 928# CONFIG_INPUT_FF_MEMLESS is not set
888# CONFIG_INPUT_POLLDEV is not set 929# CONFIG_INPUT_POLLDEV is not set
930# CONFIG_INPUT_SPARSEKMAP is not set
889 931
890# 932#
891# Userland interfaces 933# Userland interfaces
@@ -928,6 +970,7 @@ CONFIG_SERIO=y
928# CONFIG_SERIO_PCIPS2 is not set 970# CONFIG_SERIO_PCIPS2 is not set
929CONFIG_SERIO_LIBPS2=y 971CONFIG_SERIO_LIBPS2=y
930# CONFIG_SERIO_RAW is not set 972# CONFIG_SERIO_RAW is not set
973# CONFIG_SERIO_ALTERA_PS2 is not set
931# CONFIG_GAMEPORT is not set 974# CONFIG_GAMEPORT is not set
932 975
933# 976#
@@ -1008,11 +1051,6 @@ CONFIG_I2C_HIGHLANDER=y
1008# CONFIG_I2C_TAOS_EVM is not set 1051# CONFIG_I2C_TAOS_EVM is not set
1009 1052
1010# 1053#
1011# Graphics adapter I2C/DDC channel drivers
1012#
1013# CONFIG_I2C_VOODOO3 is not set
1014
1015#
1016# Other I2C/SMBus bus drivers 1054# Other I2C/SMBus bus drivers
1017# 1055#
1018# CONFIG_I2C_PCA_PLATFORM is not set 1056# CONFIG_I2C_PCA_PLATFORM is not set
@@ -1021,7 +1059,6 @@ CONFIG_I2C_HIGHLANDER=y
1021# 1059#
1022# Miscellaneous I2C Chip support 1060# Miscellaneous I2C Chip support
1023# 1061#
1024# CONFIG_DS1682 is not set
1025# CONFIG_SENSORS_TSL2550 is not set 1062# CONFIG_SENSORS_TSL2550 is not set
1026# CONFIG_I2C_DEBUG_CORE is not set 1063# CONFIG_I2C_DEBUG_CORE is not set
1027# CONFIG_I2C_DEBUG_ALGO is not set 1064# CONFIG_I2C_DEBUG_ALGO is not set
@@ -1065,6 +1102,7 @@ CONFIG_HWMON=y
1065# CONFIG_SENSORS_GL520SM is not set 1102# CONFIG_SENSORS_GL520SM is not set
1066# CONFIG_SENSORS_IT87 is not set 1103# CONFIG_SENSORS_IT87 is not set
1067# CONFIG_SENSORS_LM63 is not set 1104# CONFIG_SENSORS_LM63 is not set
1105# CONFIG_SENSORS_LM73 is not set
1068# CONFIG_SENSORS_LM75 is not set 1106# CONFIG_SENSORS_LM75 is not set
1069# CONFIG_SENSORS_LM77 is not set 1107# CONFIG_SENSORS_LM77 is not set
1070# CONFIG_SENSORS_LM78 is not set 1108# CONFIG_SENSORS_LM78 is not set
@@ -1103,6 +1141,7 @@ CONFIG_HWMON=y
1103# CONFIG_SENSORS_W83L786NG is not set 1141# CONFIG_SENSORS_W83L786NG is not set
1104# CONFIG_SENSORS_W83627HF is not set 1142# CONFIG_SENSORS_W83627HF is not set
1105# CONFIG_SENSORS_W83627EHF is not set 1143# CONFIG_SENSORS_W83627EHF is not set
1144# CONFIG_SENSORS_LIS3_I2C is not set
1106CONFIG_THERMAL=y 1145CONFIG_THERMAL=y
1107# CONFIG_THERMAL_HWMON is not set 1146# CONFIG_THERMAL_HWMON is not set
1108# CONFIG_WATCHDOG is not set 1147# CONFIG_WATCHDOG is not set
@@ -1118,15 +1157,18 @@ CONFIG_SSB_POSSIBLE=y
1118# 1157#
1119# CONFIG_MFD_CORE is not set 1158# CONFIG_MFD_CORE is not set
1120# CONFIG_MFD_SM501 is not set 1159# CONFIG_MFD_SM501 is not set
1160# CONFIG_MFD_SH_MOBILE_SDHI is not set
1121# CONFIG_HTC_PASIC3 is not set 1161# CONFIG_HTC_PASIC3 is not set
1122# CONFIG_TWL4030_CORE is not set 1162# CONFIG_TWL4030_CORE is not set
1123# CONFIG_MFD_TMIO is not set 1163# CONFIG_MFD_TMIO is not set
1124# CONFIG_PMIC_DA903X is not set 1164# CONFIG_PMIC_DA903X is not set
1165# CONFIG_PMIC_ADP5520 is not set
1125# CONFIG_MFD_WM8400 is not set 1166# CONFIG_MFD_WM8400 is not set
1126# CONFIG_MFD_WM831X is not set 1167# CONFIG_MFD_WM831X is not set
1127# CONFIG_MFD_WM8350_I2C is not set 1168# CONFIG_MFD_WM8350_I2C is not set
1128# CONFIG_MFD_PCF50633 is not set 1169# CONFIG_MFD_PCF50633 is not set
1129# CONFIG_AB3100_CORE is not set 1170# CONFIG_AB3100_CORE is not set
1171# CONFIG_MFD_88PM8607 is not set
1130# CONFIG_REGULATOR is not set 1172# CONFIG_REGULATOR is not set
1131# CONFIG_MEDIA_SUPPORT is not set 1173# CONFIG_MEDIA_SUPPORT is not set
1132 1174
@@ -1211,6 +1253,7 @@ CONFIG_RTC_DRV_RS5C372=y
1211# CONFIG_RTC_DRV_PCF8563 is not set 1253# CONFIG_RTC_DRV_PCF8563 is not set
1212# CONFIG_RTC_DRV_PCF8583 is not set 1254# CONFIG_RTC_DRV_PCF8583 is not set
1213# CONFIG_RTC_DRV_M41T80 is not set 1255# CONFIG_RTC_DRV_M41T80 is not set
1256# CONFIG_RTC_DRV_BQ32K is not set
1214# CONFIG_RTC_DRV_S35390A is not set 1257# CONFIG_RTC_DRV_S35390A is not set
1215# CONFIG_RTC_DRV_FM3130 is not set 1258# CONFIG_RTC_DRV_FM3130 is not set
1216# CONFIG_RTC_DRV_RX8581 is not set 1259# CONFIG_RTC_DRV_RX8581 is not set
@@ -1231,7 +1274,9 @@ CONFIG_RTC_DRV_RS5C372=y
1231# CONFIG_RTC_DRV_M48T86 is not set 1274# CONFIG_RTC_DRV_M48T86 is not set
1232# CONFIG_RTC_DRV_M48T35 is not set 1275# CONFIG_RTC_DRV_M48T35 is not set
1233# CONFIG_RTC_DRV_M48T59 is not set 1276# CONFIG_RTC_DRV_M48T59 is not set
1277# CONFIG_RTC_DRV_MSM6242 is not set
1234# CONFIG_RTC_DRV_BQ4802 is not set 1278# CONFIG_RTC_DRV_BQ4802 is not set
1279# CONFIG_RTC_DRV_RP5C01 is not set
1235# CONFIG_RTC_DRV_V3020 is not set 1280# CONFIG_RTC_DRV_V3020 is not set
1236 1281
1237# 1282#
@@ -1436,6 +1481,8 @@ CONFIG_SCHED_DEBUG=y
1436# CONFIG_DEBUG_OBJECTS is not set 1481# CONFIG_DEBUG_OBJECTS is not set
1437# CONFIG_DEBUG_SLAB is not set 1482# CONFIG_DEBUG_SLAB is not set
1438# CONFIG_DEBUG_PREEMPT is not set 1483# CONFIG_DEBUG_PREEMPT is not set
1484# CONFIG_DEBUG_RT_MUTEXES is not set
1485# CONFIG_RT_MUTEX_TESTER is not set
1439# CONFIG_DEBUG_SPINLOCK is not set 1486# CONFIG_DEBUG_SPINLOCK is not set
1440# CONFIG_DEBUG_MUTEXES is not set 1487# CONFIG_DEBUG_MUTEXES is not set
1441# CONFIG_DEBUG_LOCK_ALLOC is not set 1488# CONFIG_DEBUG_LOCK_ALLOC is not set
@@ -1462,6 +1509,7 @@ CONFIG_DEBUG_INFO=y
1462# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set 1509# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
1463# CONFIG_FAULT_INJECTION is not set 1510# CONFIG_FAULT_INJECTION is not set
1464# CONFIG_LATENCYTOP is not set 1511# CONFIG_LATENCYTOP is not set
1512# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1465# CONFIG_PAGE_POISONING is not set 1513# CONFIG_PAGE_POISONING is not set
1466CONFIG_NOP_TRACER=y 1514CONFIG_NOP_TRACER=y
1467CONFIG_HAVE_FUNCTION_TRACER=y 1515CONFIG_HAVE_FUNCTION_TRACER=y
@@ -1498,9 +1546,6 @@ CONFIG_BRANCH_PROFILE_NONE=y
1498CONFIG_HAVE_ARCH_KGDB=y 1546CONFIG_HAVE_ARCH_KGDB=y
1499# CONFIG_KGDB is not set 1547# CONFIG_KGDB is not set
1500# CONFIG_SH_STANDARD_BIOS is not set 1548# CONFIG_SH_STANDARD_BIOS is not set
1501CONFIG_EARLY_SCIF_CONSOLE=y
1502CONFIG_EARLY_SCIF_CONSOLE_PORT=0xffe00000
1503# CONFIG_EARLY_PRINTK is not set
1504# CONFIG_STACK_DEBUG is not set 1549# CONFIG_STACK_DEBUG is not set
1505# CONFIG_DEBUG_STACK_USAGE is not set 1550# CONFIG_DEBUG_STACK_USAGE is not set
1506# CONFIG_4KSTACKS is not set 1551# CONFIG_4KSTACKS is not set
@@ -1514,7 +1559,11 @@ CONFIG_DUMP_CODE=y
1514# CONFIG_KEYS is not set 1559# CONFIG_KEYS is not set
1515# CONFIG_SECURITY is not set 1560# CONFIG_SECURITY is not set
1516# CONFIG_SECURITYFS is not set 1561# CONFIG_SECURITYFS is not set
1517# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1562# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1563# CONFIG_DEFAULT_SECURITY_SMACK is not set
1564# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1565CONFIG_DEFAULT_SECURITY_DAC=y
1566CONFIG_DEFAULT_SECURITY=""
1518CONFIG_CRYPTO=y 1567CONFIG_CRYPTO=y
1519 1568
1520# 1569#
diff --git a/arch/sh/configs/r7785rp_defconfig b/arch/sh/configs/r7785rp_defconfig
index 27ff46c13a87..f4b00451dcee 100644
--- a/arch/sh/configs/r7785rp_defconfig
+++ b/arch/sh/configs/r7785rp_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Thu Sep 24 18:29:23 2009 4# Mon Jan 4 13:19:35 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -20,6 +20,7 @@ CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set 21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
22CONFIG_ARCH_HIBERNATION_POSSIBLE=y 22CONFIG_ARCH_HIBERNATION_POSSIBLE=y
23CONFIG_SYS_SUPPORTS_HUGETLBFS=y
23CONFIG_SYS_SUPPORTS_NUMA=y 24CONFIG_SYS_SUPPORTS_NUMA=y
24CONFIG_SYS_SUPPORTS_PCI=y 25CONFIG_SYS_SUPPORTS_PCI=y
25CONFIG_SYS_SUPPORTS_TMU=y 26CONFIG_SYS_SUPPORTS_TMU=y
@@ -32,6 +33,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
32CONFIG_ARCH_HAS_DEFAULT_IDLE=y 33CONFIG_ARCH_HAS_DEFAULT_IDLE=y
33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 34CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
34CONFIG_IO_TRAPPED=y 35CONFIG_IO_TRAPPED=y
36CONFIG_DMA_NONCOHERENT=y
35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 37CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
36CONFIG_CONSTRUCTORS=y 38CONFIG_CONSTRUCTORS=y
37 39
@@ -67,6 +69,7 @@ CONFIG_AUDIT_TREE=y
67# 69#
68CONFIG_TREE_RCU=y 70CONFIG_TREE_RCU=y
69# CONFIG_TREE_PREEMPT_RCU is not set 71# CONFIG_TREE_PREEMPT_RCU is not set
72# CONFIG_TINY_RCU is not set
70CONFIG_RCU_TRACE=y 73CONFIG_RCU_TRACE=y
71CONFIG_RCU_FANOUT=32 74CONFIG_RCU_FANOUT=32
72# CONFIG_RCU_FANOUT_EXACT is not set 75# CONFIG_RCU_FANOUT_EXACT is not set
@@ -103,6 +106,7 @@ CONFIG_EVENTFD=y
103CONFIG_SHMEM=y 106CONFIG_SHMEM=y
104CONFIG_AIO=y 107CONFIG_AIO=y
105CONFIG_HAVE_PERF_EVENTS=y 108CONFIG_HAVE_PERF_EVENTS=y
109CONFIG_PERF_USE_VMALLOC=y
106 110
107# 111#
108# Kernel Performance Events And Counters 112# Kernel Performance Events And Counters
@@ -110,6 +114,7 @@ CONFIG_HAVE_PERF_EVENTS=y
110CONFIG_PERF_EVENTS=y 114CONFIG_PERF_EVENTS=y
111CONFIG_EVENT_PROFILE=y 115CONFIG_EVENT_PROFILE=y
112# CONFIG_PERF_COUNTERS is not set 116# CONFIG_PERF_COUNTERS is not set
117# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
113CONFIG_VM_EVENT_COUNTERS=y 118CONFIG_VM_EVENT_COUNTERS=y
114CONFIG_PCI_QUIRKS=y 119CONFIG_PCI_QUIRKS=y
115CONFIG_COMPAT_BRK=y 120CONFIG_COMPAT_BRK=y
@@ -126,6 +131,7 @@ CONFIG_HAVE_IOREMAP_PROT=y
126CONFIG_HAVE_KPROBES=y 131CONFIG_HAVE_KPROBES=y
127CONFIG_HAVE_KRETPROBES=y 132CONFIG_HAVE_KRETPROBES=y
128CONFIG_HAVE_ARCH_TRACEHOOK=y 133CONFIG_HAVE_ARCH_TRACEHOOK=y
134CONFIG_HAVE_DMA_ATTRS=y
129CONFIG_HAVE_CLK=y 135CONFIG_HAVE_CLK=y
130CONFIG_HAVE_DMA_API_DEBUG=y 136CONFIG_HAVE_DMA_API_DEBUG=y
131 137
@@ -153,14 +159,41 @@ CONFIG_LBDAF=y
153# IO Schedulers 159# IO Schedulers
154# 160#
155CONFIG_IOSCHED_NOOP=y 161CONFIG_IOSCHED_NOOP=y
156# CONFIG_IOSCHED_AS is not set
157# CONFIG_IOSCHED_DEADLINE is not set 162# CONFIG_IOSCHED_DEADLINE is not set
158# CONFIG_IOSCHED_CFQ is not set 163# CONFIG_IOSCHED_CFQ is not set
159# CONFIG_DEFAULT_AS is not set
160# CONFIG_DEFAULT_DEADLINE is not set 164# CONFIG_DEFAULT_DEADLINE is not set
161# CONFIG_DEFAULT_CFQ is not set 165# CONFIG_DEFAULT_CFQ is not set
162CONFIG_DEFAULT_NOOP=y 166CONFIG_DEFAULT_NOOP=y
163CONFIG_DEFAULT_IOSCHED="noop" 167CONFIG_DEFAULT_IOSCHED="noop"
168# CONFIG_INLINE_SPIN_TRYLOCK is not set
169# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
170# CONFIG_INLINE_SPIN_LOCK is not set
171# CONFIG_INLINE_SPIN_LOCK_BH is not set
172# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
173# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
174# CONFIG_INLINE_SPIN_UNLOCK is not set
175# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
176# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
177# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
178# CONFIG_INLINE_READ_TRYLOCK is not set
179# CONFIG_INLINE_READ_LOCK is not set
180# CONFIG_INLINE_READ_LOCK_BH is not set
181# CONFIG_INLINE_READ_LOCK_IRQ is not set
182# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
183# CONFIG_INLINE_READ_UNLOCK is not set
184# CONFIG_INLINE_READ_UNLOCK_BH is not set
185# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
186# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
187# CONFIG_INLINE_WRITE_TRYLOCK is not set
188# CONFIG_INLINE_WRITE_LOCK is not set
189# CONFIG_INLINE_WRITE_LOCK_BH is not set
190# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
191# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
192# CONFIG_INLINE_WRITE_UNLOCK is not set
193# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
194# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
195# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
196# CONFIG_MUTEX_SPIN_ON_OWNER is not set
164# CONFIG_FREEZER is not set 197# CONFIG_FREEZER is not set
165 198
166# 199#
@@ -248,13 +281,11 @@ CONFIG_SPARSEMEM=y
248CONFIG_HAVE_MEMORY_PRESENT=y 281CONFIG_HAVE_MEMORY_PRESENT=y
249CONFIG_SPARSEMEM_STATIC=y 282CONFIG_SPARSEMEM_STATIC=y
250# CONFIG_MEMORY_HOTPLUG is not set 283# CONFIG_MEMORY_HOTPLUG is not set
251CONFIG_SPLIT_PTLOCK_CPUS=4 284CONFIG_SPLIT_PTLOCK_CPUS=999999
252CONFIG_MIGRATION=y 285CONFIG_MIGRATION=y
253# CONFIG_PHYS_ADDR_T_64BIT is not set 286# CONFIG_PHYS_ADDR_T_64BIT is not set
254CONFIG_ZONE_DMA_FLAG=0 287CONFIG_ZONE_DMA_FLAG=0
255CONFIG_NR_QUICK=2 288CONFIG_NR_QUICK=2
256CONFIG_HAVE_MLOCK=y
257CONFIG_HAVE_MLOCKED_PAGE_BIT=y
258# CONFIG_KSM is not set 289# CONFIG_KSM is not set
259CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 290CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
260 291
@@ -289,7 +320,6 @@ CONFIG_SH_R7785RP=y
289# Timer and clock configuration 320# Timer and clock configuration
290# 321#
291CONFIG_SH_TIMER_TMU=y 322CONFIG_SH_TIMER_TMU=y
292CONFIG_SH_PCLK_FREQ=33333333
293CONFIG_SH_CLK_CPG=y 323CONFIG_SH_CLK_CPG=y
294CONFIG_TICK_ONESHOT=y 324CONFIG_TICK_ONESHOT=y
295CONFIG_NO_HZ=y 325CONFIG_NO_HZ=y
@@ -363,7 +393,6 @@ CONFIG_CMDLINE="console=ttySC0,115200 root=/dev/sda1"
363# Bus options 393# Bus options
364# 394#
365CONFIG_PCI=y 395CONFIG_PCI=y
366CONFIG_SH_PCIDMA_NONCOHERENT=y
367# CONFIG_PCIEPORTBUS is not set 396# CONFIG_PCIEPORTBUS is not set
368# CONFIG_ARCH_SUPPORTS_MSI is not set 397# CONFIG_ARCH_SUPPORTS_MSI is not set
369# CONFIG_PCI_LEGACY is not set 398# CONFIG_PCI_LEGACY is not set
@@ -471,10 +500,6 @@ CONFIG_LLC=m
471# CONFIG_AF_RXRPC is not set 500# CONFIG_AF_RXRPC is not set
472CONFIG_WIRELESS=y 501CONFIG_WIRELESS=y
473# CONFIG_CFG80211 is not set 502# CONFIG_CFG80211 is not set
474CONFIG_CFG80211_DEFAULT_PS_VALUE=0
475# CONFIG_WIRELESS_OLD_REGULATORY is not set
476CONFIG_WIRELESS_EXT=y
477CONFIG_WIRELESS_EXT_SYSFS=y
478# CONFIG_LIB80211 is not set 503# CONFIG_LIB80211 is not set
479 504
480# 505#
@@ -510,6 +535,10 @@ CONFIG_BLK_DEV=y
510# CONFIG_BLK_DEV_UMEM is not set 535# CONFIG_BLK_DEV_UMEM is not set
511# CONFIG_BLK_DEV_COW_COMMON is not set 536# CONFIG_BLK_DEV_COW_COMMON is not set
512# CONFIG_BLK_DEV_LOOP is not set 537# CONFIG_BLK_DEV_LOOP is not set
538
539#
540# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
541#
513# CONFIG_BLK_DEV_NBD is not set 542# CONFIG_BLK_DEV_NBD is not set
514# CONFIG_BLK_DEV_SX8 is not set 543# CONFIG_BLK_DEV_SX8 is not set
515CONFIG_BLK_DEV_RAM=y 544CONFIG_BLK_DEV_RAM=y
@@ -520,6 +549,7 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
520# CONFIG_ATA_OVER_ETH is not set 549# CONFIG_ATA_OVER_ETH is not set
521# CONFIG_BLK_DEV_HD is not set 550# CONFIG_BLK_DEV_HD is not set
522CONFIG_MISC_DEVICES=y 551CONFIG_MISC_DEVICES=y
552# CONFIG_AD525X_DPOT is not set
523# CONFIG_PHANTOM is not set 553# CONFIG_PHANTOM is not set
524# CONFIG_SGI_IOC4 is not set 554# CONFIG_SGI_IOC4 is not set
525# CONFIG_TIFM_CORE is not set 555# CONFIG_TIFM_CORE is not set
@@ -527,6 +557,7 @@ CONFIG_MISC_DEVICES=y
527# CONFIG_ENCLOSURE_SERVICES is not set 557# CONFIG_ENCLOSURE_SERVICES is not set
528# CONFIG_HP_ILO is not set 558# CONFIG_HP_ILO is not set
529# CONFIG_ISL29003 is not set 559# CONFIG_ISL29003 is not set
560# CONFIG_DS1682 is not set
530# CONFIG_C2PORT is not set 561# CONFIG_C2PORT is not set
531 562
532# 563#
@@ -577,8 +608,11 @@ CONFIG_SCSI_LOWLEVEL=y
577# CONFIG_ISCSI_TCP is not set 608# CONFIG_ISCSI_TCP is not set
578# CONFIG_SCSI_CXGB3_ISCSI is not set 609# CONFIG_SCSI_CXGB3_ISCSI is not set
579# CONFIG_SCSI_BNX2_ISCSI is not set 610# CONFIG_SCSI_BNX2_ISCSI is not set
611# CONFIG_BE2ISCSI is not set
580# CONFIG_BLK_DEV_3W_XXXX_RAID is not set 612# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
613# CONFIG_SCSI_HPSA is not set
581# CONFIG_SCSI_3W_9XXX is not set 614# CONFIG_SCSI_3W_9XXX is not set
615# CONFIG_SCSI_3W_SAS is not set
582# CONFIG_SCSI_ACARD is not set 616# CONFIG_SCSI_ACARD is not set
583# CONFIG_SCSI_AACRAID is not set 617# CONFIG_SCSI_AACRAID is not set
584# CONFIG_SCSI_AIC7XXX is not set 618# CONFIG_SCSI_AIC7XXX is not set
@@ -612,7 +646,9 @@ CONFIG_SCSI_LOWLEVEL=y
612# CONFIG_SCSI_NSP32 is not set 646# CONFIG_SCSI_NSP32 is not set
613# CONFIG_SCSI_DEBUG is not set 647# CONFIG_SCSI_DEBUG is not set
614# CONFIG_SCSI_PMCRAID is not set 648# CONFIG_SCSI_PMCRAID is not set
649# CONFIG_SCSI_PM8001 is not set
615# CONFIG_SCSI_SRP is not set 650# CONFIG_SCSI_SRP is not set
651# CONFIG_SCSI_BFA_FC is not set
616# CONFIG_SCSI_DH is not set 652# CONFIG_SCSI_DH is not set
617# CONFIG_SCSI_OSD_INITIATOR is not set 653# CONFIG_SCSI_OSD_INITIATOR is not set
618CONFIG_ATA=y 654CONFIG_ATA=y
@@ -665,15 +701,16 @@ CONFIG_SATA_SIL=y
665# CONFIG_PATA_NS87415 is not set 701# CONFIG_PATA_NS87415 is not set
666# CONFIG_PATA_OPTI is not set 702# CONFIG_PATA_OPTI is not set
667# CONFIG_PATA_OPTIDMA is not set 703# CONFIG_PATA_OPTIDMA is not set
704# CONFIG_PATA_PDC2027X is not set
668# CONFIG_PATA_PDC_OLD is not set 705# CONFIG_PATA_PDC_OLD is not set
669# CONFIG_PATA_RADISYS is not set 706# CONFIG_PATA_RADISYS is not set
670# CONFIG_PATA_RDC is not set 707# CONFIG_PATA_RDC is not set
671# CONFIG_PATA_RZ1000 is not set 708# CONFIG_PATA_RZ1000 is not set
672# CONFIG_PATA_SC1200 is not set 709# CONFIG_PATA_SC1200 is not set
673# CONFIG_PATA_SERVERWORKS is not set 710# CONFIG_PATA_SERVERWORKS is not set
674# CONFIG_PATA_PDC2027X is not set
675# CONFIG_PATA_SIL680 is not set 711# CONFIG_PATA_SIL680 is not set
676# CONFIG_PATA_SIS is not set 712# CONFIG_PATA_SIS is not set
713# CONFIG_PATA_TOSHIBA is not set
677# CONFIG_PATA_VIA is not set 714# CONFIG_PATA_VIA is not set
678# CONFIG_PATA_WINBOND is not set 715# CONFIG_PATA_WINBOND is not set
679CONFIG_PATA_PLATFORM=y 716CONFIG_PATA_PLATFORM=y
@@ -730,6 +767,7 @@ CONFIG_AX88796_93CX6=y
730# CONFIG_NET_PCI is not set 767# CONFIG_NET_PCI is not set
731# CONFIG_B44 is not set 768# CONFIG_B44 is not set
732# CONFIG_KS8842 is not set 769# CONFIG_KS8842 is not set
770# CONFIG_KS8851_MLL is not set
733# CONFIG_ATL2 is not set 771# CONFIG_ATL2 is not set
734CONFIG_NETDEV_1000=y 772CONFIG_NETDEV_1000=y
735# CONFIG_ACENIC is not set 773# CONFIG_ACENIC is not set
@@ -776,8 +814,9 @@ CONFIG_CHELSIO_T3_DEPENDS=y
776# CONFIG_BE2NET is not set 814# CONFIG_BE2NET is not set
777# CONFIG_TR is not set 815# CONFIG_TR is not set
778CONFIG_WLAN=y 816CONFIG_WLAN=y
779# CONFIG_WLAN_PRE80211 is not set 817# CONFIG_ATMEL is not set
780# CONFIG_WLAN_80211 is not set 818# CONFIG_PRISM54 is not set
819# CONFIG_HOSTAP is not set
781 820
782# 821#
783# Enable WiMAX (Networking options) to see the WiMAX drivers 822# Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -791,6 +830,7 @@ CONFIG_WLAN=y
791# CONFIG_NETCONSOLE is not set 830# CONFIG_NETCONSOLE is not set
792# CONFIG_NETPOLL is not set 831# CONFIG_NETPOLL is not set
793# CONFIG_NET_POLL_CONTROLLER is not set 832# CONFIG_NET_POLL_CONTROLLER is not set
833# CONFIG_VMXNET3 is not set
794# CONFIG_ISDN is not set 834# CONFIG_ISDN is not set
795# CONFIG_PHONE is not set 835# CONFIG_PHONE is not set
796 836
@@ -800,6 +840,7 @@ CONFIG_WLAN=y
800CONFIG_INPUT=y 840CONFIG_INPUT=y
801# CONFIG_INPUT_FF_MEMLESS is not set 841# CONFIG_INPUT_FF_MEMLESS is not set
802# CONFIG_INPUT_POLLDEV is not set 842# CONFIG_INPUT_POLLDEV is not set
843# CONFIG_INPUT_SPARSEKMAP is not set
803 844
804# 845#
805# Userland interfaces 846# Userland interfaces
@@ -844,6 +885,7 @@ CONFIG_SERIO=y
844# CONFIG_SERIO_PCIPS2 is not set 885# CONFIG_SERIO_PCIPS2 is not set
845CONFIG_SERIO_LIBPS2=y 886CONFIG_SERIO_LIBPS2=y
846# CONFIG_SERIO_RAW is not set 887# CONFIG_SERIO_RAW is not set
888# CONFIG_SERIO_ALTERA_PS2 is not set
847# CONFIG_GAMEPORT is not set 889# CONFIG_GAMEPORT is not set
848 890
849# 891#
@@ -925,11 +967,6 @@ CONFIG_I2C_HIGHLANDER=y
925# CONFIG_I2C_TAOS_EVM is not set 967# CONFIG_I2C_TAOS_EVM is not set
926 968
927# 969#
928# Graphics adapter I2C/DDC channel drivers
929#
930# CONFIG_I2C_VOODOO3 is not set
931
932#
933# Other I2C/SMBus bus drivers 970# Other I2C/SMBus bus drivers
934# 971#
935# CONFIG_I2C_PCA_PLATFORM is not set 972# CONFIG_I2C_PCA_PLATFORM is not set
@@ -938,7 +975,6 @@ CONFIG_I2C_HIGHLANDER=y
938# 975#
939# Miscellaneous I2C Chip support 976# Miscellaneous I2C Chip support
940# 977#
941# CONFIG_DS1682 is not set
942# CONFIG_SENSORS_TSL2550 is not set 978# CONFIG_SENSORS_TSL2550 is not set
943# CONFIG_I2C_DEBUG_CORE is not set 979# CONFIG_I2C_DEBUG_CORE is not set
944# CONFIG_I2C_DEBUG_ALGO is not set 980# CONFIG_I2C_DEBUG_ALGO is not set
@@ -969,6 +1005,7 @@ CONFIG_GPIOLIB=y
969# 1005#
970# PCI GPIO expanders: 1006# PCI GPIO expanders:
971# 1007#
1008# CONFIG_GPIO_CS5535 is not set
972# CONFIG_GPIO_BT8XX is not set 1009# CONFIG_GPIO_BT8XX is not set
973# CONFIG_GPIO_LANGWELL is not set 1010# CONFIG_GPIO_LANGWELL is not set
974 1011
@@ -1011,6 +1048,7 @@ CONFIG_HWMON=y
1011# CONFIG_SENSORS_GL520SM is not set 1048# CONFIG_SENSORS_GL520SM is not set
1012# CONFIG_SENSORS_IT87 is not set 1049# CONFIG_SENSORS_IT87 is not set
1013# CONFIG_SENSORS_LM63 is not set 1050# CONFIG_SENSORS_LM63 is not set
1051# CONFIG_SENSORS_LM73 is not set
1014# CONFIG_SENSORS_LM75 is not set 1052# CONFIG_SENSORS_LM75 is not set
1015# CONFIG_SENSORS_LM77 is not set 1053# CONFIG_SENSORS_LM77 is not set
1016# CONFIG_SENSORS_LM78 is not set 1054# CONFIG_SENSORS_LM78 is not set
@@ -1050,6 +1088,7 @@ CONFIG_HWMON=y
1050# CONFIG_SENSORS_W83L786NG is not set 1088# CONFIG_SENSORS_W83L786NG is not set
1051# CONFIG_SENSORS_W83627HF is not set 1089# CONFIG_SENSORS_W83627HF is not set
1052# CONFIG_SENSORS_W83627EHF is not set 1090# CONFIG_SENSORS_W83627EHF is not set
1091# CONFIG_SENSORS_LIS3_I2C is not set
1053# CONFIG_THERMAL is not set 1092# CONFIG_THERMAL is not set
1054# CONFIG_WATCHDOG is not set 1093# CONFIG_WATCHDOG is not set
1055CONFIG_SSB_POSSIBLE=y 1094CONFIG_SSB_POSSIBLE=y
@@ -1064,16 +1103,19 @@ CONFIG_SSB_POSSIBLE=y
1064# 1103#
1065# CONFIG_MFD_CORE is not set 1104# CONFIG_MFD_CORE is not set
1066# CONFIG_MFD_SM501 is not set 1105# CONFIG_MFD_SM501 is not set
1106# CONFIG_MFD_SH_MOBILE_SDHI is not set
1067# CONFIG_HTC_PASIC3 is not set 1107# CONFIG_HTC_PASIC3 is not set
1068# CONFIG_TPS65010 is not set 1108# CONFIG_TPS65010 is not set
1069# CONFIG_TWL4030_CORE is not set 1109# CONFIG_TWL4030_CORE is not set
1070# CONFIG_MFD_TMIO is not set 1110# CONFIG_MFD_TMIO is not set
1071# CONFIG_PMIC_DA903X is not set 1111# CONFIG_PMIC_DA903X is not set
1112# CONFIG_PMIC_ADP5520 is not set
1072# CONFIG_MFD_WM8400 is not set 1113# CONFIG_MFD_WM8400 is not set
1073# CONFIG_MFD_WM831X is not set 1114# CONFIG_MFD_WM831X is not set
1074# CONFIG_MFD_WM8350_I2C is not set 1115# CONFIG_MFD_WM8350_I2C is not set
1075# CONFIG_MFD_PCF50633 is not set 1116# CONFIG_MFD_PCF50633 is not set
1076# CONFIG_AB3100_CORE is not set 1117# CONFIG_AB3100_CORE is not set
1118# CONFIG_MFD_88PM8607 is not set
1077# CONFIG_REGULATOR is not set 1119# CONFIG_REGULATOR is not set
1078# CONFIG_MEDIA_SUPPORT is not set 1120# CONFIG_MEDIA_SUPPORT is not set
1079 1121
@@ -1211,6 +1253,7 @@ CONFIG_RTC_DRV_RS5C372=y
1211# CONFIG_RTC_DRV_PCF8563 is not set 1253# CONFIG_RTC_DRV_PCF8563 is not set
1212# CONFIG_RTC_DRV_PCF8583 is not set 1254# CONFIG_RTC_DRV_PCF8583 is not set
1213# CONFIG_RTC_DRV_M41T80 is not set 1255# CONFIG_RTC_DRV_M41T80 is not set
1256# CONFIG_RTC_DRV_BQ32K is not set
1214# CONFIG_RTC_DRV_S35390A is not set 1257# CONFIG_RTC_DRV_S35390A is not set
1215# CONFIG_RTC_DRV_FM3130 is not set 1258# CONFIG_RTC_DRV_FM3130 is not set
1216# CONFIG_RTC_DRV_RX8581 is not set 1259# CONFIG_RTC_DRV_RX8581 is not set
@@ -1231,7 +1274,9 @@ CONFIG_RTC_DRV_RS5C372=y
1231# CONFIG_RTC_DRV_M48T86 is not set 1274# CONFIG_RTC_DRV_M48T86 is not set
1232# CONFIG_RTC_DRV_M48T35 is not set 1275# CONFIG_RTC_DRV_M48T35 is not set
1233# CONFIG_RTC_DRV_M48T59 is not set 1276# CONFIG_RTC_DRV_M48T59 is not set
1277# CONFIG_RTC_DRV_MSM6242 is not set
1234# CONFIG_RTC_DRV_BQ4802 is not set 1278# CONFIG_RTC_DRV_BQ4802 is not set
1279# CONFIG_RTC_DRV_RP5C01 is not set
1235# CONFIG_RTC_DRV_V3020 is not set 1280# CONFIG_RTC_DRV_V3020 is not set
1236 1281
1237# 1282#
@@ -1463,6 +1508,7 @@ CONFIG_FRAME_POINTER=y
1463# CONFIG_LKDTM is not set 1508# CONFIG_LKDTM is not set
1464# CONFIG_FAULT_INJECTION is not set 1509# CONFIG_FAULT_INJECTION is not set
1465# CONFIG_LATENCYTOP is not set 1510# CONFIG_LATENCYTOP is not set
1511# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1466# CONFIG_PAGE_POISONING is not set 1512# CONFIG_PAGE_POISONING is not set
1467CONFIG_NOP_TRACER=y 1513CONFIG_NOP_TRACER=y
1468CONFIG_HAVE_FUNCTION_TRACER=y 1514CONFIG_HAVE_FUNCTION_TRACER=y
@@ -1499,8 +1545,6 @@ CONFIG_BRANCH_PROFILE_NONE=y
1499CONFIG_HAVE_ARCH_KGDB=y 1545CONFIG_HAVE_ARCH_KGDB=y
1500# CONFIG_KGDB is not set 1546# CONFIG_KGDB is not set
1501CONFIG_SH_STANDARD_BIOS=y 1547CONFIG_SH_STANDARD_BIOS=y
1502# CONFIG_EARLY_SCIF_CONSOLE is not set
1503CONFIG_EARLY_PRINTK=y
1504# CONFIG_STACK_DEBUG is not set 1548# CONFIG_STACK_DEBUG is not set
1505CONFIG_DEBUG_STACK_USAGE=y 1549CONFIG_DEBUG_STACK_USAGE=y
1506CONFIG_4KSTACKS=y 1550CONFIG_4KSTACKS=y
@@ -1514,7 +1558,11 @@ CONFIG_DUMP_CODE=y
1514# CONFIG_KEYS is not set 1558# CONFIG_KEYS is not set
1515# CONFIG_SECURITY is not set 1559# CONFIG_SECURITY is not set
1516# CONFIG_SECURITYFS is not set 1560# CONFIG_SECURITYFS is not set
1517# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1561# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1562# CONFIG_DEFAULT_SECURITY_SMACK is not set
1563# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1564CONFIG_DEFAULT_SECURITY_DAC=y
1565CONFIG_DEFAULT_SECURITY=""
1518CONFIG_CRYPTO=y 1566CONFIG_CRYPTO=y
1519 1567
1520# 1568#
diff --git a/arch/sh/configs/rsk7201_defconfig b/arch/sh/configs/rsk7201_defconfig
index c40db12e9ad7..2fc635a5a8c5 100644
--- a/arch/sh/configs/rsk7201_defconfig
+++ b/arch/sh/configs/rsk7201_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Thu Sep 24 18:34:29 2009 4# Mon Jan 4 13:23:12 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -29,6 +29,7 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
29CONFIG_ARCH_NO_VIRT_TO_BUS=y 29CONFIG_ARCH_NO_VIRT_TO_BUS=y
30CONFIG_ARCH_HAS_DEFAULT_IDLE=y 30CONFIG_ARCH_HAS_DEFAULT_IDLE=y
31CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 31CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
32CONFIG_DMA_NONCOHERENT=y
32CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 33CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
33CONFIG_CONSTRUCTORS=y 34CONFIG_CONSTRUCTORS=y
34 35
@@ -56,6 +57,7 @@ CONFIG_BSD_PROCESS_ACCT=y
56# 57#
57CONFIG_TREE_RCU=y 58CONFIG_TREE_RCU=y
58# CONFIG_TREE_PREEMPT_RCU is not set 59# CONFIG_TREE_PREEMPT_RCU is not set
60# CONFIG_TINY_RCU is not set
59# CONFIG_RCU_TRACE is not set 61# CONFIG_RCU_TRACE is not set
60CONFIG_RCU_FANOUT=32 62CONFIG_RCU_FANOUT=32
61# CONFIG_RCU_FANOUT_EXACT is not set 63# CONFIG_RCU_FANOUT_EXACT is not set
@@ -97,6 +99,7 @@ CONFIG_TIMERFD=y
97CONFIG_EVENTFD=y 99CONFIG_EVENTFD=y
98# CONFIG_AIO is not set 100# CONFIG_AIO is not set
99CONFIG_HAVE_PERF_EVENTS=y 101CONFIG_HAVE_PERF_EVENTS=y
102CONFIG_PERF_USE_VMALLOC=y
100 103
101# 104#
102# Kernel Performance Events And Counters 105# Kernel Performance Events And Counters
@@ -109,6 +112,7 @@ CONFIG_COMPAT_BRK=y
109# CONFIG_SLAB is not set 112# CONFIG_SLAB is not set
110# CONFIG_SLUB is not set 113# CONFIG_SLUB is not set
111CONFIG_SLOB=y 114CONFIG_SLOB=y
115# CONFIG_MMAP_ALLOW_UNINITIALIZED is not set
112CONFIG_PROFILING=y 116CONFIG_PROFILING=y
113CONFIG_TRACEPOINTS=y 117CONFIG_TRACEPOINTS=y
114CONFIG_OPROFILE=y 118CONFIG_OPROFILE=y
@@ -117,6 +121,7 @@ CONFIG_HAVE_OPROFILE=y
117CONFIG_HAVE_KPROBES=y 121CONFIG_HAVE_KPROBES=y
118CONFIG_HAVE_KRETPROBES=y 122CONFIG_HAVE_KRETPROBES=y
119CONFIG_HAVE_ARCH_TRACEHOOK=y 123CONFIG_HAVE_ARCH_TRACEHOOK=y
124CONFIG_HAVE_DMA_ATTRS=y
120CONFIG_HAVE_CLK=y 125CONFIG_HAVE_CLK=y
121CONFIG_HAVE_DMA_API_DEBUG=y 126CONFIG_HAVE_DMA_API_DEBUG=y
122 127
@@ -142,14 +147,41 @@ CONFIG_LBDAF=y
142# IO Schedulers 147# IO Schedulers
143# 148#
144CONFIG_IOSCHED_NOOP=y 149CONFIG_IOSCHED_NOOP=y
145# CONFIG_IOSCHED_AS is not set
146# CONFIG_IOSCHED_DEADLINE is not set 150# CONFIG_IOSCHED_DEADLINE is not set
147# CONFIG_IOSCHED_CFQ is not set 151# CONFIG_IOSCHED_CFQ is not set
148# CONFIG_DEFAULT_AS is not set
149# CONFIG_DEFAULT_DEADLINE is not set 152# CONFIG_DEFAULT_DEADLINE is not set
150# CONFIG_DEFAULT_CFQ is not set 153# CONFIG_DEFAULT_CFQ is not set
151CONFIG_DEFAULT_NOOP=y 154CONFIG_DEFAULT_NOOP=y
152CONFIG_DEFAULT_IOSCHED="noop" 155CONFIG_DEFAULT_IOSCHED="noop"
156# CONFIG_INLINE_SPIN_TRYLOCK is not set
157# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
158# CONFIG_INLINE_SPIN_LOCK is not set
159# CONFIG_INLINE_SPIN_LOCK_BH is not set
160# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
161# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
162CONFIG_INLINE_SPIN_UNLOCK=y
163# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
164CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
165# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
166# CONFIG_INLINE_READ_TRYLOCK is not set
167# CONFIG_INLINE_READ_LOCK is not set
168# CONFIG_INLINE_READ_LOCK_BH is not set
169# CONFIG_INLINE_READ_LOCK_IRQ is not set
170# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
171CONFIG_INLINE_READ_UNLOCK=y
172# CONFIG_INLINE_READ_UNLOCK_BH is not set
173CONFIG_INLINE_READ_UNLOCK_IRQ=y
174# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
175# CONFIG_INLINE_WRITE_TRYLOCK is not set
176# CONFIG_INLINE_WRITE_LOCK is not set
177# CONFIG_INLINE_WRITE_LOCK_BH is not set
178# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
179# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
180CONFIG_INLINE_WRITE_UNLOCK=y
181# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
182CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
183# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
184# CONFIG_MUTEX_SPIN_ON_OWNER is not set
153# CONFIG_FREEZER is not set 185# CONFIG_FREEZER is not set
154 186
155# 187#
@@ -224,7 +256,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
224# CONFIG_PHYS_ADDR_T_64BIT is not set 256# CONFIG_PHYS_ADDR_T_64BIT is not set
225CONFIG_ZONE_DMA_FLAG=0 257CONFIG_ZONE_DMA_FLAG=0
226CONFIG_NR_QUICK=2 258CONFIG_NR_QUICK=2
227CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
228CONFIG_NOMMU_INITIAL_TRIM_EXCESS=1 259CONFIG_NOMMU_INITIAL_TRIM_EXCESS=1
229 260
230# 261#
@@ -433,6 +464,10 @@ CONFIG_MTD_PHYSMAP=y
433CONFIG_BLK_DEV=y 464CONFIG_BLK_DEV=y
434# CONFIG_BLK_DEV_COW_COMMON is not set 465# CONFIG_BLK_DEV_COW_COMMON is not set
435# CONFIG_BLK_DEV_LOOP is not set 466# CONFIG_BLK_DEV_LOOP is not set
467
468#
469# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
470#
436# CONFIG_BLK_DEV_RAM is not set 471# CONFIG_BLK_DEV_RAM is not set
437# CONFIG_CDROM_PKTCDVD is not set 472# CONFIG_CDROM_PKTCDVD is not set
438# CONFIG_BLK_DEV_HD is not set 473# CONFIG_BLK_DEV_HD is not set
@@ -464,6 +499,7 @@ CONFIG_HAVE_IDE=y
464CONFIG_INPUT=y 499CONFIG_INPUT=y
465# CONFIG_INPUT_FF_MEMLESS is not set 500# CONFIG_INPUT_FF_MEMLESS is not set
466# CONFIG_INPUT_POLLDEV is not set 501# CONFIG_INPUT_POLLDEV is not set
502# CONFIG_INPUT_SPARSEKMAP is not set
467 503
468# 504#
469# Userland interfaces 505# Userland interfaces
@@ -540,6 +576,7 @@ CONFIG_SSB_POSSIBLE=y
540# 576#
541# CONFIG_MFD_CORE is not set 577# CONFIG_MFD_CORE is not set
542# CONFIG_MFD_SM501 is not set 578# CONFIG_MFD_SM501 is not set
579# CONFIG_MFD_SH_MOBILE_SDHI is not set
543# CONFIG_HTC_PASIC3 is not set 580# CONFIG_HTC_PASIC3 is not set
544# CONFIG_MFD_TMIO is not set 581# CONFIG_MFD_TMIO is not set
545# CONFIG_REGULATOR is not set 582# CONFIG_REGULATOR is not set
@@ -594,7 +631,9 @@ CONFIG_RTC_INTF_DEV=y
594# CONFIG_RTC_DRV_M48T86 is not set 631# CONFIG_RTC_DRV_M48T86 is not set
595# CONFIG_RTC_DRV_M48T35 is not set 632# CONFIG_RTC_DRV_M48T35 is not set
596# CONFIG_RTC_DRV_M48T59 is not set 633# CONFIG_RTC_DRV_M48T59 is not set
634# CONFIG_RTC_DRV_MSM6242 is not set
597# CONFIG_RTC_DRV_BQ4802 is not set 635# CONFIG_RTC_DRV_BQ4802 is not set
636# CONFIG_RTC_DRV_RP5C01 is not set
598# CONFIG_RTC_DRV_V3020 is not set 637# CONFIG_RTC_DRV_V3020 is not set
599 638
600# 639#
@@ -618,6 +657,7 @@ CONFIG_EXT2_FS=y
618# CONFIG_EXT2_FS_XATTR is not set 657# CONFIG_EXT2_FS_XATTR is not set
619# CONFIG_EXT3_FS is not set 658# CONFIG_EXT3_FS is not set
620# CONFIG_EXT4_FS is not set 659# CONFIG_EXT4_FS is not set
660CONFIG_EXT4_USE_FOR_EXT23=y
621# CONFIG_REISERFS_FS is not set 661# CONFIG_REISERFS_FS is not set
622# CONFIG_JFS_FS is not set 662# CONFIG_JFS_FS is not set
623# CONFIG_FS_POSIX_ACL is not set 663# CONFIG_FS_POSIX_ACL is not set
@@ -717,7 +757,7 @@ CONFIG_DEBUG_FS=y
717# CONFIG_HEADERS_CHECK is not set 757# CONFIG_HEADERS_CHECK is not set
718# CONFIG_DEBUG_KERNEL is not set 758# CONFIG_DEBUG_KERNEL is not set
719CONFIG_STACKTRACE=y 759CONFIG_STACKTRACE=y
720# CONFIG_DEBUG_BUGVERBOSE is not set 760CONFIG_DEBUG_BUGVERBOSE=y
721# CONFIG_DEBUG_MEMORY_INIT is not set 761# CONFIG_DEBUG_MEMORY_INIT is not set
722# CONFIG_RCU_CPU_STALL_DETECTOR is not set 762# CONFIG_RCU_CPU_STALL_DETECTOR is not set
723# CONFIG_LATENCYTOP is not set 763# CONFIG_LATENCYTOP is not set
@@ -741,7 +781,6 @@ CONFIG_TRACING_SUPPORT=y
741# CONFIG_SAMPLES is not set 781# CONFIG_SAMPLES is not set
742CONFIG_HAVE_ARCH_KGDB=y 782CONFIG_HAVE_ARCH_KGDB=y
743# CONFIG_SH_STANDARD_BIOS is not set 783# CONFIG_SH_STANDARD_BIOS is not set
744# CONFIG_EARLY_SCIF_CONSOLE is not set
745# CONFIG_DWARF_UNWINDER is not set 784# CONFIG_DWARF_UNWINDER is not set
746 785
747# 786#
@@ -750,7 +789,11 @@ CONFIG_HAVE_ARCH_KGDB=y
750# CONFIG_KEYS is not set 789# CONFIG_KEYS is not set
751# CONFIG_SECURITY is not set 790# CONFIG_SECURITY is not set
752# CONFIG_SECURITYFS is not set 791# CONFIG_SECURITYFS is not set
753# CONFIG_SECURITY_FILE_CAPABILITIES is not set 792# CONFIG_DEFAULT_SECURITY_SELINUX is not set
793# CONFIG_DEFAULT_SECURITY_SMACK is not set
794# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
795CONFIG_DEFAULT_SECURITY_DAC=y
796CONFIG_DEFAULT_SECURITY=""
754# CONFIG_CRYPTO is not set 797# CONFIG_CRYPTO is not set
755CONFIG_BINARY_PRINTF=y 798CONFIG_BINARY_PRINTF=y
756 799
diff --git a/arch/sh/configs/rsk7203_defconfig b/arch/sh/configs/rsk7203_defconfig
index 5cabdb3a84fb..0169e60e0947 100644
--- a/arch/sh/configs/rsk7203_defconfig
+++ b/arch/sh/configs/rsk7203_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Thu Sep 24 18:35:04 2009 4# Mon Jan 4 13:23:54 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -30,6 +30,7 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
30CONFIG_ARCH_NO_VIRT_TO_BUS=y 30CONFIG_ARCH_NO_VIRT_TO_BUS=y
31CONFIG_ARCH_HAS_DEFAULT_IDLE=y 31CONFIG_ARCH_HAS_DEFAULT_IDLE=y
32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
33CONFIG_DMA_NONCOHERENT=y
33CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 34CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
34CONFIG_CONSTRUCTORS=y 35CONFIG_CONSTRUCTORS=y
35 36
@@ -61,6 +62,7 @@ CONFIG_BSD_PROCESS_ACCT=y
61# 62#
62CONFIG_TREE_RCU=y 63CONFIG_TREE_RCU=y
63# CONFIG_TREE_PREEMPT_RCU is not set 64# CONFIG_TREE_PREEMPT_RCU is not set
65# CONFIG_TINY_RCU is not set
64# CONFIG_RCU_TRACE is not set 66# CONFIG_RCU_TRACE is not set
65CONFIG_RCU_FANOUT=32 67CONFIG_RCU_FANOUT=32
66# CONFIG_RCU_FANOUT_EXACT is not set 68# CONFIG_RCU_FANOUT_EXACT is not set
@@ -104,6 +106,7 @@ CONFIG_TIMERFD=y
104CONFIG_EVENTFD=y 106CONFIG_EVENTFD=y
105CONFIG_AIO=y 107CONFIG_AIO=y
106CONFIG_HAVE_PERF_EVENTS=y 108CONFIG_HAVE_PERF_EVENTS=y
109CONFIG_PERF_USE_VMALLOC=y
107 110
108# 111#
109# Kernel Performance Events And Counters 112# Kernel Performance Events And Counters
@@ -111,11 +114,13 @@ CONFIG_HAVE_PERF_EVENTS=y
111CONFIG_PERF_EVENTS=y 114CONFIG_PERF_EVENTS=y
112CONFIG_EVENT_PROFILE=y 115CONFIG_EVENT_PROFILE=y
113# CONFIG_PERF_COUNTERS is not set 116# CONFIG_PERF_COUNTERS is not set
117# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
114CONFIG_VM_EVENT_COUNTERS=y 118CONFIG_VM_EVENT_COUNTERS=y
115CONFIG_COMPAT_BRK=y 119CONFIG_COMPAT_BRK=y
116# CONFIG_SLAB is not set 120# CONFIG_SLAB is not set
117# CONFIG_SLUB is not set 121# CONFIG_SLUB is not set
118CONFIG_SLOB=y 122CONFIG_SLOB=y
123# CONFIG_MMAP_ALLOW_UNINITIALIZED is not set
119CONFIG_PROFILING=y 124CONFIG_PROFILING=y
120CONFIG_TRACEPOINTS=y 125CONFIG_TRACEPOINTS=y
121CONFIG_OPROFILE=y 126CONFIG_OPROFILE=y
@@ -124,6 +129,7 @@ CONFIG_HAVE_OPROFILE=y
124CONFIG_HAVE_KPROBES=y 129CONFIG_HAVE_KPROBES=y
125CONFIG_HAVE_KRETPROBES=y 130CONFIG_HAVE_KRETPROBES=y
126CONFIG_HAVE_ARCH_TRACEHOOK=y 131CONFIG_HAVE_ARCH_TRACEHOOK=y
132CONFIG_HAVE_DMA_ATTRS=y
127CONFIG_HAVE_CLK=y 133CONFIG_HAVE_CLK=y
128CONFIG_HAVE_DMA_API_DEBUG=y 134CONFIG_HAVE_DMA_API_DEBUG=y
129 135
@@ -149,14 +155,41 @@ CONFIG_LBDAF=y
149# IO Schedulers 155# IO Schedulers
150# 156#
151CONFIG_IOSCHED_NOOP=y 157CONFIG_IOSCHED_NOOP=y
152# CONFIG_IOSCHED_AS is not set
153# CONFIG_IOSCHED_DEADLINE is not set 158# CONFIG_IOSCHED_DEADLINE is not set
154# CONFIG_IOSCHED_CFQ is not set 159# CONFIG_IOSCHED_CFQ is not set
155# CONFIG_DEFAULT_AS is not set
156# CONFIG_DEFAULT_DEADLINE is not set 160# CONFIG_DEFAULT_DEADLINE is not set
157# CONFIG_DEFAULT_CFQ is not set 161# CONFIG_DEFAULT_CFQ is not set
158CONFIG_DEFAULT_NOOP=y 162CONFIG_DEFAULT_NOOP=y
159CONFIG_DEFAULT_IOSCHED="noop" 163CONFIG_DEFAULT_IOSCHED="noop"
164# CONFIG_INLINE_SPIN_TRYLOCK is not set
165# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
166# CONFIG_INLINE_SPIN_LOCK is not set
167# CONFIG_INLINE_SPIN_LOCK_BH is not set
168# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
169# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
170CONFIG_INLINE_SPIN_UNLOCK=y
171# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
172CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
173# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
174# CONFIG_INLINE_READ_TRYLOCK is not set
175# CONFIG_INLINE_READ_LOCK is not set
176# CONFIG_INLINE_READ_LOCK_BH is not set
177# CONFIG_INLINE_READ_LOCK_IRQ is not set
178# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
179CONFIG_INLINE_READ_UNLOCK=y
180# CONFIG_INLINE_READ_UNLOCK_BH is not set
181CONFIG_INLINE_READ_UNLOCK_IRQ=y
182# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
183# CONFIG_INLINE_WRITE_TRYLOCK is not set
184# CONFIG_INLINE_WRITE_LOCK is not set
185# CONFIG_INLINE_WRITE_LOCK_BH is not set
186# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
187# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
188CONFIG_INLINE_WRITE_UNLOCK=y
189# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
190CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
191# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
192# CONFIG_MUTEX_SPIN_ON_OWNER is not set
160# CONFIG_FREEZER is not set 193# CONFIG_FREEZER is not set
161 194
162# 195#
@@ -231,7 +264,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
231# CONFIG_PHYS_ADDR_T_64BIT is not set 264# CONFIG_PHYS_ADDR_T_64BIT is not set
232CONFIG_ZONE_DMA_FLAG=0 265CONFIG_ZONE_DMA_FLAG=0
233CONFIG_NR_QUICK=2 266CONFIG_NR_QUICK=2
234CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
235CONFIG_NOMMU_INITIAL_TRIM_EXCESS=1 267CONFIG_NOMMU_INITIAL_TRIM_EXCESS=1
236 268
237# 269#
@@ -424,9 +456,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
424# CONFIG_AF_RXRPC is not set 456# CONFIG_AF_RXRPC is not set
425CONFIG_WIRELESS=y 457CONFIG_WIRELESS=y
426# CONFIG_CFG80211 is not set 458# CONFIG_CFG80211 is not set
427CONFIG_CFG80211_DEFAULT_PS_VALUE=0
428# CONFIG_WIRELESS_OLD_REGULATORY is not set
429# CONFIG_WIRELESS_EXT is not set
430# CONFIG_LIB80211 is not set 459# CONFIG_LIB80211 is not set
431 460
432# 461#
@@ -539,6 +568,10 @@ CONFIG_MTD_PHYSMAP=y
539CONFIG_BLK_DEV=y 568CONFIG_BLK_DEV=y
540# CONFIG_BLK_DEV_COW_COMMON is not set 569# CONFIG_BLK_DEV_COW_COMMON is not set
541# CONFIG_BLK_DEV_LOOP is not set 570# CONFIG_BLK_DEV_LOOP is not set
571
572#
573# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
574#
542# CONFIG_BLK_DEV_NBD is not set 575# CONFIG_BLK_DEV_NBD is not set
543# CONFIG_BLK_DEV_UB is not set 576# CONFIG_BLK_DEV_UB is not set
544# CONFIG_BLK_DEV_RAM is not set 577# CONFIG_BLK_DEV_RAM is not set
@@ -610,11 +643,12 @@ CONFIG_SMSC911X=y
610# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set 643# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
611# CONFIG_B44 is not set 644# CONFIG_B44 is not set
612# CONFIG_KS8842 is not set 645# CONFIG_KS8842 is not set
646# CONFIG_KS8851_MLL is not set
613# CONFIG_NETDEV_1000 is not set 647# CONFIG_NETDEV_1000 is not set
614# CONFIG_NETDEV_10000 is not set 648# CONFIG_NETDEV_10000 is not set
615CONFIG_WLAN=y 649CONFIG_WLAN=y
616# CONFIG_WLAN_PRE80211 is not set 650# CONFIG_USB_ZD1201 is not set
617# CONFIG_WLAN_80211 is not set 651# CONFIG_HOSTAP is not set
618 652
619# 653#
620# Enable WiMAX (Networking options) to see the WiMAX drivers 654# Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -643,6 +677,7 @@ CONFIG_WLAN=y
643CONFIG_INPUT=y 677CONFIG_INPUT=y
644CONFIG_INPUT_FF_MEMLESS=m 678CONFIG_INPUT_FF_MEMLESS=m
645# CONFIG_INPUT_POLLDEV is not set 679# CONFIG_INPUT_POLLDEV is not set
680# CONFIG_INPUT_SPARSEKMAP is not set
646 681
647# 682#
648# Userland interfaces 683# Userland interfaces
@@ -743,6 +778,7 @@ CONFIG_SSB_POSSIBLE=y
743# 778#
744# CONFIG_MFD_CORE is not set 779# CONFIG_MFD_CORE is not set
745# CONFIG_MFD_SM501 is not set 780# CONFIG_MFD_SM501 is not set
781# CONFIG_MFD_SH_MOBILE_SDHI is not set
746# CONFIG_HTC_PASIC3 is not set 782# CONFIG_HTC_PASIC3 is not set
747# CONFIG_MFD_TMIO is not set 783# CONFIG_MFD_TMIO is not set
748CONFIG_REGULATOR=y 784CONFIG_REGULATOR=y
@@ -910,6 +946,8 @@ CONFIG_LEDS_CLASS=y
910# 946#
911CONFIG_LEDS_GPIO=y 947CONFIG_LEDS_GPIO=y
912CONFIG_LEDS_GPIO_PLATFORM=y 948CONFIG_LEDS_GPIO_PLATFORM=y
949# CONFIG_LEDS_REGULATOR is not set
950# CONFIG_LEDS_LT3593 is not set
913 951
914# 952#
915# LED Triggers 953# LED Triggers
@@ -955,7 +993,9 @@ CONFIG_RTC_INTF_DEV=y
955# CONFIG_RTC_DRV_M48T86 is not set 993# CONFIG_RTC_DRV_M48T86 is not set
956# CONFIG_RTC_DRV_M48T35 is not set 994# CONFIG_RTC_DRV_M48T35 is not set
957# CONFIG_RTC_DRV_M48T59 is not set 995# CONFIG_RTC_DRV_M48T59 is not set
996# CONFIG_RTC_DRV_MSM6242 is not set
958# CONFIG_RTC_DRV_BQ4802 is not set 997# CONFIG_RTC_DRV_BQ4802 is not set
998# CONFIG_RTC_DRV_RP5C01 is not set
959# CONFIG_RTC_DRV_V3020 is not set 999# CONFIG_RTC_DRV_V3020 is not set
960 1000
961# 1001#
@@ -978,6 +1018,7 @@ CONFIG_RTC_DRV_SH=y
978# CONFIG_EXT2_FS is not set 1018# CONFIG_EXT2_FS is not set
979# CONFIG_EXT3_FS is not set 1019# CONFIG_EXT3_FS is not set
980# CONFIG_EXT4_FS is not set 1020# CONFIG_EXT4_FS is not set
1021CONFIG_EXT4_USE_FOR_EXT23=y
981# CONFIG_REISERFS_FS is not set 1022# CONFIG_REISERFS_FS is not set
982# CONFIG_JFS_FS is not set 1023# CONFIG_JFS_FS is not set
983# CONFIG_FS_POSIX_ACL is not set 1024# CONFIG_FS_POSIX_ACL is not set
@@ -1137,6 +1178,7 @@ CONFIG_DEBUG_OBJECTS=y
1137# CONFIG_DEBUG_OBJECTS_SELFTEST is not set 1178# CONFIG_DEBUG_OBJECTS_SELFTEST is not set
1138# CONFIG_DEBUG_OBJECTS_FREE is not set 1179# CONFIG_DEBUG_OBJECTS_FREE is not set
1139# CONFIG_DEBUG_OBJECTS_TIMERS is not set 1180# CONFIG_DEBUG_OBJECTS_TIMERS is not set
1181# CONFIG_DEBUG_OBJECTS_WORK is not set
1140CONFIG_DEBUG_OBJECTS_ENABLE_DEFAULT=1 1182CONFIG_DEBUG_OBJECTS_ENABLE_DEFAULT=1
1141# CONFIG_DEBUG_RT_MUTEXES is not set 1183# CONFIG_DEBUG_RT_MUTEXES is not set
1142# CONFIG_RT_MUTEX_TESTER is not set 1184# CONFIG_RT_MUTEX_TESTER is not set
@@ -1203,9 +1245,6 @@ CONFIG_BRANCH_PROFILE_NONE=y
1203CONFIG_HAVE_ARCH_KGDB=y 1245CONFIG_HAVE_ARCH_KGDB=y
1204# CONFIG_KGDB is not set 1246# CONFIG_KGDB is not set
1205# CONFIG_SH_STANDARD_BIOS is not set 1247# CONFIG_SH_STANDARD_BIOS is not set
1206CONFIG_EARLY_SCIF_CONSOLE=y
1207CONFIG_EARLY_SCIF_CONSOLE_PORT=0xfffe8000
1208CONFIG_EARLY_PRINTK=y
1209# CONFIG_STACK_DEBUG is not set 1248# CONFIG_STACK_DEBUG is not set
1210CONFIG_DEBUG_STACK_USAGE=y 1249CONFIG_DEBUG_STACK_USAGE=y
1211CONFIG_DUMP_CODE=y 1250CONFIG_DUMP_CODE=y
@@ -1218,7 +1257,11 @@ CONFIG_DUMP_CODE=y
1218# CONFIG_KEYS is not set 1257# CONFIG_KEYS is not set
1219# CONFIG_SECURITY is not set 1258# CONFIG_SECURITY is not set
1220# CONFIG_SECURITYFS is not set 1259# CONFIG_SECURITYFS is not set
1221# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1260# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1261# CONFIG_DEFAULT_SECURITY_SMACK is not set
1262# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1263CONFIG_DEFAULT_SECURITY_DAC=y
1264CONFIG_DEFAULT_SECURITY=""
1222# CONFIG_CRYPTO is not set 1265# CONFIG_CRYPTO is not set
1223CONFIG_BINARY_PRINTF=y 1266CONFIG_BINARY_PRINTF=y
1224 1267
diff --git a/arch/sh/configs/rts7751r2d1_defconfig b/arch/sh/configs/rts7751r2d1_defconfig
index f521e82cc19e..dba024d72a89 100644
--- a/arch/sh/configs/rts7751r2d1_defconfig
+++ b/arch/sh/configs/rts7751r2d1_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Thu Sep 24 18:36:25 2009 4# Mon Jan 4 13:25:36 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -20,6 +20,7 @@ CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set 21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
22CONFIG_ARCH_HIBERNATION_POSSIBLE=y 22CONFIG_ARCH_HIBERNATION_POSSIBLE=y
23CONFIG_SYS_SUPPORTS_HUGETLBFS=y
23CONFIG_SYS_SUPPORTS_PCI=y 24CONFIG_SYS_SUPPORTS_PCI=y
24CONFIG_SYS_SUPPORTS_TMU=y 25CONFIG_SYS_SUPPORTS_TMU=y
25CONFIG_STACKTRACE_SUPPORT=y 26CONFIG_STACKTRACE_SUPPORT=y
@@ -31,6 +32,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
31CONFIG_ARCH_HAS_DEFAULT_IDLE=y 32CONFIG_ARCH_HAS_DEFAULT_IDLE=y
32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
33CONFIG_IO_TRAPPED=y 34CONFIG_IO_TRAPPED=y
35CONFIG_DMA_NONCOHERENT=y
34CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 36CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
35CONFIG_CONSTRUCTORS=y 37CONFIG_CONSTRUCTORS=y
36 38
@@ -61,6 +63,7 @@ CONFIG_SYSVIPC_SYSCTL=y
61# 63#
62CONFIG_TREE_RCU=y 64CONFIG_TREE_RCU=y
63# CONFIG_TREE_PREEMPT_RCU is not set 65# CONFIG_TREE_PREEMPT_RCU is not set
66# CONFIG_TINY_RCU is not set
64# CONFIG_RCU_TRACE is not set 67# CONFIG_RCU_TRACE is not set
65CONFIG_RCU_FANOUT=32 68CONFIG_RCU_FANOUT=32
66# CONFIG_RCU_FANOUT_EXACT is not set 69# CONFIG_RCU_FANOUT_EXACT is not set
@@ -95,6 +98,7 @@ CONFIG_EVENTFD=y
95CONFIG_SHMEM=y 98CONFIG_SHMEM=y
96CONFIG_AIO=y 99CONFIG_AIO=y
97CONFIG_HAVE_PERF_EVENTS=y 100CONFIG_HAVE_PERF_EVENTS=y
101CONFIG_PERF_USE_VMALLOC=y
98 102
99# 103#
100# Kernel Performance Events And Counters 104# Kernel Performance Events And Counters
@@ -117,6 +121,7 @@ CONFIG_HAVE_IOREMAP_PROT=y
117CONFIG_HAVE_KPROBES=y 121CONFIG_HAVE_KPROBES=y
118CONFIG_HAVE_KRETPROBES=y 122CONFIG_HAVE_KRETPROBES=y
119CONFIG_HAVE_ARCH_TRACEHOOK=y 123CONFIG_HAVE_ARCH_TRACEHOOK=y
124CONFIG_HAVE_DMA_ATTRS=y
120CONFIG_HAVE_CLK=y 125CONFIG_HAVE_CLK=y
121CONFIG_HAVE_DMA_API_DEBUG=y 126CONFIG_HAVE_DMA_API_DEBUG=y
122 127
@@ -143,14 +148,41 @@ CONFIG_LBDAF=y
143# IO Schedulers 148# IO Schedulers
144# 149#
145CONFIG_IOSCHED_NOOP=y 150CONFIG_IOSCHED_NOOP=y
146CONFIG_IOSCHED_AS=y
147CONFIG_IOSCHED_DEADLINE=y 151CONFIG_IOSCHED_DEADLINE=y
148CONFIG_IOSCHED_CFQ=y 152CONFIG_IOSCHED_CFQ=y
149CONFIG_DEFAULT_AS=y
150# CONFIG_DEFAULT_DEADLINE is not set 153# CONFIG_DEFAULT_DEADLINE is not set
151# CONFIG_DEFAULT_CFQ is not set 154CONFIG_DEFAULT_CFQ=y
152# CONFIG_DEFAULT_NOOP is not set 155# CONFIG_DEFAULT_NOOP is not set
153CONFIG_DEFAULT_IOSCHED="anticipatory" 156CONFIG_DEFAULT_IOSCHED="cfq"
157# CONFIG_INLINE_SPIN_TRYLOCK is not set
158# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
159# CONFIG_INLINE_SPIN_LOCK is not set
160# CONFIG_INLINE_SPIN_LOCK_BH is not set
161# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
162# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
163CONFIG_INLINE_SPIN_UNLOCK=y
164# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
165CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
166# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
167# CONFIG_INLINE_READ_TRYLOCK is not set
168# CONFIG_INLINE_READ_LOCK is not set
169# CONFIG_INLINE_READ_LOCK_BH is not set
170# CONFIG_INLINE_READ_LOCK_IRQ is not set
171# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
172CONFIG_INLINE_READ_UNLOCK=y
173# CONFIG_INLINE_READ_UNLOCK_BH is not set
174CONFIG_INLINE_READ_UNLOCK_IRQ=y
175# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
176# CONFIG_INLINE_WRITE_TRYLOCK is not set
177# CONFIG_INLINE_WRITE_LOCK is not set
178# CONFIG_INLINE_WRITE_LOCK_BH is not set
179# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
180# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
181CONFIG_INLINE_WRITE_UNLOCK=y
182# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
183CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
184# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
185# CONFIG_MUTEX_SPIN_ON_OWNER is not set
154# CONFIG_FREEZER is not set 186# CONFIG_FREEZER is not set
155 187
156# 188#
@@ -226,8 +258,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
226# CONFIG_PHYS_ADDR_T_64BIT is not set 258# CONFIG_PHYS_ADDR_T_64BIT is not set
227CONFIG_ZONE_DMA_FLAG=0 259CONFIG_ZONE_DMA_FLAG=0
228CONFIG_NR_QUICK=2 260CONFIG_NR_QUICK=2
229CONFIG_HAVE_MLOCK=y
230CONFIG_HAVE_MLOCKED_PAGE_BIT=y
231# CONFIG_KSM is not set 261# CONFIG_KSM is not set
232CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 262CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
233 263
@@ -321,16 +351,14 @@ CONFIG_GUSA=y
321CONFIG_ZERO_PAGE_OFFSET=0x00010000 351CONFIG_ZERO_PAGE_OFFSET=0x00010000
322CONFIG_BOOT_LINK_OFFSET=0x00800000 352CONFIG_BOOT_LINK_OFFSET=0x00800000
323CONFIG_ENTRY_OFFSET=0x00001000 353CONFIG_ENTRY_OFFSET=0x00001000
324# CONFIG_UBC_WAKEUP is not set
325CONFIG_CMDLINE_OVERWRITE=y 354CONFIG_CMDLINE_OVERWRITE=y
326# CONFIG_CMDLINE_EXTEND is not set 355# CONFIG_CMDLINE_EXTEND is not set
327CONFIG_CMDLINE="console=tty0 console=ttySC0,115200 root=/dev/sda1 earlyprintk=serial" 356CONFIG_CMDLINE="console=tty0 console=ttySC1,115200 root=/dev/sda1"
328 357
329# 358#
330# Bus options 359# Bus options
331# 360#
332CONFIG_PCI=y 361CONFIG_PCI=y
333CONFIG_SH_PCIDMA_NONCOHERENT=y
334# CONFIG_PCIEPORTBUS is not set 362# CONFIG_PCIEPORTBUS is not set
335# CONFIG_ARCH_SUPPORTS_MSI is not set 363# CONFIG_ARCH_SUPPORTS_MSI is not set
336CONFIG_PCI_LEGACY=y 364CONFIG_PCI_LEGACY=y
@@ -429,10 +457,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
429# CONFIG_AF_RXRPC is not set 457# CONFIG_AF_RXRPC is not set
430CONFIG_WIRELESS=y 458CONFIG_WIRELESS=y
431# CONFIG_CFG80211 is not set 459# CONFIG_CFG80211 is not set
432CONFIG_CFG80211_DEFAULT_PS_VALUE=0
433# CONFIG_WIRELESS_OLD_REGULATORY is not set
434CONFIG_WIRELESS_EXT=y
435CONFIG_WIRELESS_EXT_SYSFS=y
436# CONFIG_LIB80211 is not set 460# CONFIG_LIB80211 is not set
437 461
438# 462#
@@ -466,6 +490,10 @@ CONFIG_BLK_DEV=y
466# CONFIG_BLK_DEV_UMEM is not set 490# CONFIG_BLK_DEV_UMEM is not set
467# CONFIG_BLK_DEV_COW_COMMON is not set 491# CONFIG_BLK_DEV_COW_COMMON is not set
468# CONFIG_BLK_DEV_LOOP is not set 492# CONFIG_BLK_DEV_LOOP is not set
493
494#
495# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
496#
469# CONFIG_BLK_DEV_NBD is not set 497# CONFIG_BLK_DEV_NBD is not set
470# CONFIG_BLK_DEV_SX8 is not set 498# CONFIG_BLK_DEV_SX8 is not set
471# CONFIG_BLK_DEV_UB is not set 499# CONFIG_BLK_DEV_UB is not set
@@ -482,6 +510,7 @@ CONFIG_MISC_DEVICES=y
482# CONFIG_TIFM_CORE is not set 510# CONFIG_TIFM_CORE is not set
483# CONFIG_ENCLOSURE_SERVICES is not set 511# CONFIG_ENCLOSURE_SERVICES is not set
484# CONFIG_HP_ILO is not set 512# CONFIG_HP_ILO is not set
513# CONFIG_TI_DAC7512 is not set
485# CONFIG_C2PORT is not set 514# CONFIG_C2PORT is not set
486 515
487# 516#
@@ -530,8 +559,11 @@ CONFIG_SCSI_LOWLEVEL=y
530# CONFIG_ISCSI_TCP is not set 559# CONFIG_ISCSI_TCP is not set
531# CONFIG_SCSI_CXGB3_ISCSI is not set 560# CONFIG_SCSI_CXGB3_ISCSI is not set
532# CONFIG_SCSI_BNX2_ISCSI is not set 561# CONFIG_SCSI_BNX2_ISCSI is not set
562# CONFIG_BE2ISCSI is not set
533# CONFIG_BLK_DEV_3W_XXXX_RAID is not set 563# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
564# CONFIG_SCSI_HPSA is not set
534# CONFIG_SCSI_3W_9XXX is not set 565# CONFIG_SCSI_3W_9XXX is not set
566# CONFIG_SCSI_3W_SAS is not set
535# CONFIG_SCSI_ACARD is not set 567# CONFIG_SCSI_ACARD is not set
536# CONFIG_SCSI_AACRAID is not set 568# CONFIG_SCSI_AACRAID is not set
537# CONFIG_SCSI_AIC7XXX is not set 569# CONFIG_SCSI_AIC7XXX is not set
@@ -565,7 +597,9 @@ CONFIG_SCSI_LOWLEVEL=y
565# CONFIG_SCSI_NSP32 is not set 597# CONFIG_SCSI_NSP32 is not set
566# CONFIG_SCSI_DEBUG is not set 598# CONFIG_SCSI_DEBUG is not set
567# CONFIG_SCSI_PMCRAID is not set 599# CONFIG_SCSI_PMCRAID is not set
600# CONFIG_SCSI_PM8001 is not set
568# CONFIG_SCSI_SRP is not set 601# CONFIG_SCSI_SRP is not set
602# CONFIG_SCSI_BFA_FC is not set
569# CONFIG_SCSI_DH is not set 603# CONFIG_SCSI_DH is not set
570# CONFIG_SCSI_OSD_INITIATOR is not set 604# CONFIG_SCSI_OSD_INITIATOR is not set
571CONFIG_ATA=y 605CONFIG_ATA=y
@@ -618,15 +652,16 @@ CONFIG_ATA_SFF=y
618# CONFIG_PATA_NS87415 is not set 652# CONFIG_PATA_NS87415 is not set
619# CONFIG_PATA_OPTI is not set 653# CONFIG_PATA_OPTI is not set
620# CONFIG_PATA_OPTIDMA is not set 654# CONFIG_PATA_OPTIDMA is not set
655# CONFIG_PATA_PDC2027X is not set
621# CONFIG_PATA_PDC_OLD is not set 656# CONFIG_PATA_PDC_OLD is not set
622# CONFIG_PATA_RADISYS is not set 657# CONFIG_PATA_RADISYS is not set
623# CONFIG_PATA_RDC is not set 658# CONFIG_PATA_RDC is not set
624# CONFIG_PATA_RZ1000 is not set 659# CONFIG_PATA_RZ1000 is not set
625# CONFIG_PATA_SC1200 is not set 660# CONFIG_PATA_SC1200 is not set
626# CONFIG_PATA_SERVERWORKS is not set 661# CONFIG_PATA_SERVERWORKS is not set
627# CONFIG_PATA_PDC2027X is not set
628# CONFIG_PATA_SIL680 is not set 662# CONFIG_PATA_SIL680 is not set
629# CONFIG_PATA_SIS is not set 663# CONFIG_PATA_SIS is not set
664# CONFIG_PATA_TOSHIBA is not set
630# CONFIG_PATA_VIA is not set 665# CONFIG_PATA_VIA is not set
631# CONFIG_PATA_WINBOND is not set 666# CONFIG_PATA_WINBOND is not set
632CONFIG_PATA_PLATFORM=y 667CONFIG_PATA_PLATFORM=y
@@ -704,6 +739,7 @@ CONFIG_8139TOO=y
704# CONFIG_TLAN is not set 739# CONFIG_TLAN is not set
705# CONFIG_KS8842 is not set 740# CONFIG_KS8842 is not set
706# CONFIG_KS8851 is not set 741# CONFIG_KS8851 is not set
742# CONFIG_KS8851_MLL is not set
707# CONFIG_VIA_RHINE is not set 743# CONFIG_VIA_RHINE is not set
708# CONFIG_SC92031 is not set 744# CONFIG_SC92031 is not set
709# CONFIG_ATL2 is not set 745# CONFIG_ATL2 is not set
@@ -752,8 +788,10 @@ CONFIG_CHELSIO_T3_DEPENDS=y
752# CONFIG_BE2NET is not set 788# CONFIG_BE2NET is not set
753# CONFIG_TR is not set 789# CONFIG_TR is not set
754CONFIG_WLAN=y 790CONFIG_WLAN=y
755# CONFIG_WLAN_PRE80211 is not set 791# CONFIG_ATMEL is not set
756# CONFIG_WLAN_80211 is not set 792# CONFIG_PRISM54 is not set
793# CONFIG_USB_ZD1201 is not set
794# CONFIG_HOSTAP is not set
757 795
758# 796#
759# Enable WiMAX (Networking options) to see the WiMAX drivers 797# Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -776,6 +814,7 @@ CONFIG_WLAN=y
776# CONFIG_NETCONSOLE is not set 814# CONFIG_NETCONSOLE is not set
777# CONFIG_NETPOLL is not set 815# CONFIG_NETPOLL is not set
778# CONFIG_NET_POLL_CONTROLLER is not set 816# CONFIG_NET_POLL_CONTROLLER is not set
817# CONFIG_VMXNET3 is not set
779# CONFIG_ISDN is not set 818# CONFIG_ISDN is not set
780# CONFIG_PHONE is not set 819# CONFIG_PHONE is not set
781 820
@@ -785,6 +824,7 @@ CONFIG_WLAN=y
785CONFIG_INPUT=y 824CONFIG_INPUT=y
786CONFIG_INPUT_FF_MEMLESS=m 825CONFIG_INPUT_FF_MEMLESS=m
787# CONFIG_INPUT_POLLDEV is not set 826# CONFIG_INPUT_POLLDEV is not set
827# CONFIG_INPUT_SPARSEKMAP is not set
788 828
789# 829#
790# Userland interfaces 830# Userland interfaces
@@ -837,7 +877,7 @@ CONFIG_SERIAL_8250_RUNTIME_UARTS=4
837# 877#
838# CONFIG_SERIAL_MAX3100 is not set 878# CONFIG_SERIAL_MAX3100 is not set
839CONFIG_SERIAL_SH_SCI=y 879CONFIG_SERIAL_SH_SCI=y
840CONFIG_SERIAL_SH_SCI_NR_UARTS=1 880CONFIG_SERIAL_SH_SCI_NR_UARTS=2
841CONFIG_SERIAL_SH_SCI_CONSOLE=y 881CONFIG_SERIAL_SH_SCI_CONSOLE=y
842CONFIG_SERIAL_CORE=y 882CONFIG_SERIAL_CORE=y
843CONFIG_SERIAL_CORE_CONSOLE=y 883CONFIG_SERIAL_CORE_CONSOLE=y
@@ -862,7 +902,10 @@ CONFIG_SPI_MASTER=y
862# SPI Master Controller Drivers 902# SPI Master Controller Drivers
863# 903#
864CONFIG_SPI_BITBANG=y 904CONFIG_SPI_BITBANG=y
905# CONFIG_SPI_SH_MSIOF is not set
865CONFIG_SPI_SH_SCI=y 906CONFIG_SPI_SH_SCI=y
907# CONFIG_SPI_XILINX is not set
908# CONFIG_SPI_DESIGNWARE is not set
866 909
867# 910#
868# SPI Protocol Masters 911# SPI Protocol Masters
@@ -915,10 +958,12 @@ CONFIG_SSB_POSSIBLE=y
915# 958#
916# CONFIG_MFD_CORE is not set 959# CONFIG_MFD_CORE is not set
917CONFIG_MFD_SM501=y 960CONFIG_MFD_SM501=y
961# CONFIG_MFD_SH_MOBILE_SDHI is not set
918# CONFIG_HTC_PASIC3 is not set 962# CONFIG_HTC_PASIC3 is not set
919# CONFIG_MFD_TMIO is not set 963# CONFIG_MFD_TMIO is not set
920# CONFIG_MFD_MC13783 is not set 964# CONFIG_MFD_MC13783 is not set
921# CONFIG_EZX_PCAP is not set 965# CONFIG_EZX_PCAP is not set
966# CONFIG_AB4500_CORE is not set
922# CONFIG_REGULATOR is not set 967# CONFIG_REGULATOR is not set
923# CONFIG_MEDIA_SUPPORT is not set 968# CONFIG_MEDIA_SUPPORT is not set
924 969
@@ -1055,6 +1100,7 @@ CONFIG_SND_PCI=y
1055# CONFIG_SND_OXYGEN is not set 1100# CONFIG_SND_OXYGEN is not set
1056# CONFIG_SND_CS4281 is not set 1101# CONFIG_SND_CS4281 is not set
1057# CONFIG_SND_CS46XX is not set 1102# CONFIG_SND_CS46XX is not set
1103# CONFIG_SND_CS5535AUDIO is not set
1058# CONFIG_SND_CTXFI is not set 1104# CONFIG_SND_CTXFI is not set
1059# CONFIG_SND_DARLA20 is not set 1105# CONFIG_SND_DARLA20 is not set
1060# CONFIG_SND_GINA20 is not set 1106# CONFIG_SND_GINA20 is not set
@@ -1308,7 +1354,9 @@ CONFIG_RTC_DRV_R9701=y
1308# CONFIG_RTC_DRV_M48T86 is not set 1354# CONFIG_RTC_DRV_M48T86 is not set
1309# CONFIG_RTC_DRV_M48T35 is not set 1355# CONFIG_RTC_DRV_M48T35 is not set
1310# CONFIG_RTC_DRV_M48T59 is not set 1356# CONFIG_RTC_DRV_M48T59 is not set
1357# CONFIG_RTC_DRV_MSM6242 is not set
1311# CONFIG_RTC_DRV_BQ4802 is not set 1358# CONFIG_RTC_DRV_BQ4802 is not set
1359# CONFIG_RTC_DRV_RP5C01 is not set
1312# CONFIG_RTC_DRV_V3020 is not set 1360# CONFIG_RTC_DRV_V3020 is not set
1313 1361
1314# 1362#
@@ -1333,6 +1381,7 @@ CONFIG_EXT2_FS=y
1333# CONFIG_EXT2_FS_XIP is not set 1381# CONFIG_EXT2_FS_XIP is not set
1334# CONFIG_EXT3_FS is not set 1382# CONFIG_EXT3_FS is not set
1335# CONFIG_EXT4_FS is not set 1383# CONFIG_EXT4_FS is not set
1384CONFIG_EXT4_USE_FOR_EXT23=y
1336# CONFIG_REISERFS_FS is not set 1385# CONFIG_REISERFS_FS is not set
1337# CONFIG_JFS_FS is not set 1386# CONFIG_JFS_FS is not set
1338# CONFIG_FS_POSIX_ACL is not set 1387# CONFIG_FS_POSIX_ACL is not set
@@ -1474,10 +1523,11 @@ CONFIG_DEBUG_FS=y
1474# CONFIG_HEADERS_CHECK is not set 1523# CONFIG_HEADERS_CHECK is not set
1475# CONFIG_DEBUG_KERNEL is not set 1524# CONFIG_DEBUG_KERNEL is not set
1476CONFIG_STACKTRACE=y 1525CONFIG_STACKTRACE=y
1477# CONFIG_DEBUG_BUGVERBOSE is not set 1526CONFIG_DEBUG_BUGVERBOSE=y
1478# CONFIG_DEBUG_MEMORY_INIT is not set 1527# CONFIG_DEBUG_MEMORY_INIT is not set
1479# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1528# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1480# CONFIG_LATENCYTOP is not set 1529# CONFIG_LATENCYTOP is not set
1530# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1481CONFIG_NOP_TRACER=y 1531CONFIG_NOP_TRACER=y
1482CONFIG_HAVE_FUNCTION_TRACER=y 1532CONFIG_HAVE_FUNCTION_TRACER=y
1483CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 1533CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
@@ -1497,9 +1547,6 @@ CONFIG_TRACING_SUPPORT=y
1497# CONFIG_SAMPLES is not set 1547# CONFIG_SAMPLES is not set
1498CONFIG_HAVE_ARCH_KGDB=y 1548CONFIG_HAVE_ARCH_KGDB=y
1499# CONFIG_SH_STANDARD_BIOS is not set 1549# CONFIG_SH_STANDARD_BIOS is not set
1500CONFIG_EARLY_SCIF_CONSOLE=y
1501CONFIG_EARLY_SCIF_CONSOLE_PORT=0xffe80000
1502CONFIG_EARLY_PRINTK=y
1503# CONFIG_DWARF_UNWINDER is not set 1550# CONFIG_DWARF_UNWINDER is not set
1504 1551
1505# 1552#
@@ -1508,7 +1555,11 @@ CONFIG_EARLY_PRINTK=y
1508# CONFIG_KEYS is not set 1555# CONFIG_KEYS is not set
1509# CONFIG_SECURITY is not set 1556# CONFIG_SECURITY is not set
1510# CONFIG_SECURITYFS is not set 1557# CONFIG_SECURITYFS is not set
1511# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1558# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1559# CONFIG_DEFAULT_SECURITY_SMACK is not set
1560# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1561CONFIG_DEFAULT_SECURITY_DAC=y
1562CONFIG_DEFAULT_SECURITY=""
1512CONFIG_CRYPTO=y 1563CONFIG_CRYPTO=y
1513 1564
1514# 1565#
diff --git a/arch/sh/configs/rts7751r2dplus_defconfig b/arch/sh/configs/rts7751r2dplus_defconfig
index a156cd1e0617..6d511d06cbf6 100644
--- a/arch/sh/configs/rts7751r2dplus_defconfig
+++ b/arch/sh/configs/rts7751r2dplus_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Thu Sep 24 18:39:48 2009 4# Mon Jan 4 13:26:39 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -20,6 +20,7 @@ CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set 21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
22CONFIG_ARCH_HIBERNATION_POSSIBLE=y 22CONFIG_ARCH_HIBERNATION_POSSIBLE=y
23CONFIG_SYS_SUPPORTS_HUGETLBFS=y
23CONFIG_SYS_SUPPORTS_PCI=y 24CONFIG_SYS_SUPPORTS_PCI=y
24CONFIG_SYS_SUPPORTS_TMU=y 25CONFIG_SYS_SUPPORTS_TMU=y
25CONFIG_STACKTRACE_SUPPORT=y 26CONFIG_STACKTRACE_SUPPORT=y
@@ -31,6 +32,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
31CONFIG_ARCH_HAS_DEFAULT_IDLE=y 32CONFIG_ARCH_HAS_DEFAULT_IDLE=y
32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
33CONFIG_IO_TRAPPED=y 34CONFIG_IO_TRAPPED=y
35CONFIG_DMA_NONCOHERENT=y
34CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 36CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
35CONFIG_CONSTRUCTORS=y 37CONFIG_CONSTRUCTORS=y
36 38
@@ -61,6 +63,7 @@ CONFIG_SYSVIPC_SYSCTL=y
61# 63#
62CONFIG_TREE_RCU=y 64CONFIG_TREE_RCU=y
63# CONFIG_TREE_PREEMPT_RCU is not set 65# CONFIG_TREE_PREEMPT_RCU is not set
66# CONFIG_TINY_RCU is not set
64# CONFIG_RCU_TRACE is not set 67# CONFIG_RCU_TRACE is not set
65CONFIG_RCU_FANOUT=32 68CONFIG_RCU_FANOUT=32
66# CONFIG_RCU_FANOUT_EXACT is not set 69# CONFIG_RCU_FANOUT_EXACT is not set
@@ -95,6 +98,7 @@ CONFIG_EVENTFD=y
95CONFIG_SHMEM=y 98CONFIG_SHMEM=y
96CONFIG_AIO=y 99CONFIG_AIO=y
97CONFIG_HAVE_PERF_EVENTS=y 100CONFIG_HAVE_PERF_EVENTS=y
101CONFIG_PERF_USE_VMALLOC=y
98 102
99# 103#
100# Kernel Performance Events And Counters 104# Kernel Performance Events And Counters
@@ -117,6 +121,7 @@ CONFIG_HAVE_IOREMAP_PROT=y
117CONFIG_HAVE_KPROBES=y 121CONFIG_HAVE_KPROBES=y
118CONFIG_HAVE_KRETPROBES=y 122CONFIG_HAVE_KRETPROBES=y
119CONFIG_HAVE_ARCH_TRACEHOOK=y 123CONFIG_HAVE_ARCH_TRACEHOOK=y
124CONFIG_HAVE_DMA_ATTRS=y
120CONFIG_HAVE_CLK=y 125CONFIG_HAVE_CLK=y
121CONFIG_HAVE_DMA_API_DEBUG=y 126CONFIG_HAVE_DMA_API_DEBUG=y
122 127
@@ -143,14 +148,41 @@ CONFIG_LBDAF=y
143# IO Schedulers 148# IO Schedulers
144# 149#
145CONFIG_IOSCHED_NOOP=y 150CONFIG_IOSCHED_NOOP=y
146CONFIG_IOSCHED_AS=y
147CONFIG_IOSCHED_DEADLINE=y 151CONFIG_IOSCHED_DEADLINE=y
148CONFIG_IOSCHED_CFQ=y 152CONFIG_IOSCHED_CFQ=y
149CONFIG_DEFAULT_AS=y
150# CONFIG_DEFAULT_DEADLINE is not set 153# CONFIG_DEFAULT_DEADLINE is not set
151# CONFIG_DEFAULT_CFQ is not set 154CONFIG_DEFAULT_CFQ=y
152# CONFIG_DEFAULT_NOOP is not set 155# CONFIG_DEFAULT_NOOP is not set
153CONFIG_DEFAULT_IOSCHED="anticipatory" 156CONFIG_DEFAULT_IOSCHED="cfq"
157# CONFIG_INLINE_SPIN_TRYLOCK is not set
158# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
159# CONFIG_INLINE_SPIN_LOCK is not set
160# CONFIG_INLINE_SPIN_LOCK_BH is not set
161# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
162# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
163CONFIG_INLINE_SPIN_UNLOCK=y
164# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
165CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
166# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
167# CONFIG_INLINE_READ_TRYLOCK is not set
168# CONFIG_INLINE_READ_LOCK is not set
169# CONFIG_INLINE_READ_LOCK_BH is not set
170# CONFIG_INLINE_READ_LOCK_IRQ is not set
171# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
172CONFIG_INLINE_READ_UNLOCK=y
173# CONFIG_INLINE_READ_UNLOCK_BH is not set
174CONFIG_INLINE_READ_UNLOCK_IRQ=y
175# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
176# CONFIG_INLINE_WRITE_TRYLOCK is not set
177# CONFIG_INLINE_WRITE_LOCK is not set
178# CONFIG_INLINE_WRITE_LOCK_BH is not set
179# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
180# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
181CONFIG_INLINE_WRITE_UNLOCK=y
182# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
183CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
184# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
185# CONFIG_MUTEX_SPIN_ON_OWNER is not set
154# CONFIG_FREEZER is not set 186# CONFIG_FREEZER is not set
155 187
156# 188#
@@ -226,8 +258,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
226# CONFIG_PHYS_ADDR_T_64BIT is not set 258# CONFIG_PHYS_ADDR_T_64BIT is not set
227CONFIG_ZONE_DMA_FLAG=0 259CONFIG_ZONE_DMA_FLAG=0
228CONFIG_NR_QUICK=2 260CONFIG_NR_QUICK=2
229CONFIG_HAVE_MLOCK=y
230CONFIG_HAVE_MLOCKED_PAGE_BIT=y
231# CONFIG_KSM is not set 261# CONFIG_KSM is not set
232CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 262CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
233 263
@@ -321,16 +351,14 @@ CONFIG_GUSA=y
321CONFIG_ZERO_PAGE_OFFSET=0x00010000 351CONFIG_ZERO_PAGE_OFFSET=0x00010000
322CONFIG_BOOT_LINK_OFFSET=0x00800000 352CONFIG_BOOT_LINK_OFFSET=0x00800000
323CONFIG_ENTRY_OFFSET=0x00001000 353CONFIG_ENTRY_OFFSET=0x00001000
324# CONFIG_UBC_WAKEUP is not set
325CONFIG_CMDLINE_OVERWRITE=y 354CONFIG_CMDLINE_OVERWRITE=y
326# CONFIG_CMDLINE_EXTEND is not set 355# CONFIG_CMDLINE_EXTEND is not set
327CONFIG_CMDLINE="console=tty0 console=ttySC0,115200 root=/dev/sda1 earlyprintk=serial" 356CONFIG_CMDLINE="console=tty0 console=ttySC1,115200 root=/dev/sda1"
328 357
329# 358#
330# Bus options 359# Bus options
331# 360#
332CONFIG_PCI=y 361CONFIG_PCI=y
333CONFIG_SH_PCIDMA_NONCOHERENT=y
334# CONFIG_PCIEPORTBUS is not set 362# CONFIG_PCIEPORTBUS is not set
335# CONFIG_ARCH_SUPPORTS_MSI is not set 363# CONFIG_ARCH_SUPPORTS_MSI is not set
336CONFIG_PCI_LEGACY=y 364CONFIG_PCI_LEGACY=y
@@ -429,10 +457,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
429# CONFIG_AF_RXRPC is not set 457# CONFIG_AF_RXRPC is not set
430CONFIG_WIRELESS=y 458CONFIG_WIRELESS=y
431# CONFIG_CFG80211 is not set 459# CONFIG_CFG80211 is not set
432CONFIG_CFG80211_DEFAULT_PS_VALUE=0
433# CONFIG_WIRELESS_OLD_REGULATORY is not set
434CONFIG_WIRELESS_EXT=y
435CONFIG_WIRELESS_EXT_SYSFS=y
436# CONFIG_LIB80211 is not set 460# CONFIG_LIB80211 is not set
437 461
438# 462#
@@ -552,6 +576,10 @@ CONFIG_BLK_DEV=y
552# CONFIG_BLK_DEV_UMEM is not set 576# CONFIG_BLK_DEV_UMEM is not set
553# CONFIG_BLK_DEV_COW_COMMON is not set 577# CONFIG_BLK_DEV_COW_COMMON is not set
554# CONFIG_BLK_DEV_LOOP is not set 578# CONFIG_BLK_DEV_LOOP is not set
579
580#
581# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
582#
555# CONFIG_BLK_DEV_NBD is not set 583# CONFIG_BLK_DEV_NBD is not set
556# CONFIG_BLK_DEV_SX8 is not set 584# CONFIG_BLK_DEV_SX8 is not set
557# CONFIG_BLK_DEV_UB is not set 585# CONFIG_BLK_DEV_UB is not set
@@ -568,6 +596,7 @@ CONFIG_MISC_DEVICES=y
568# CONFIG_TIFM_CORE is not set 596# CONFIG_TIFM_CORE is not set
569# CONFIG_ENCLOSURE_SERVICES is not set 597# CONFIG_ENCLOSURE_SERVICES is not set
570# CONFIG_HP_ILO is not set 598# CONFIG_HP_ILO is not set
599# CONFIG_TI_DAC7512 is not set
571# CONFIG_C2PORT is not set 600# CONFIG_C2PORT is not set
572 601
573# 602#
@@ -616,8 +645,11 @@ CONFIG_SCSI_LOWLEVEL=y
616# CONFIG_ISCSI_TCP is not set 645# CONFIG_ISCSI_TCP is not set
617# CONFIG_SCSI_CXGB3_ISCSI is not set 646# CONFIG_SCSI_CXGB3_ISCSI is not set
618# CONFIG_SCSI_BNX2_ISCSI is not set 647# CONFIG_SCSI_BNX2_ISCSI is not set
648# CONFIG_BE2ISCSI is not set
619# CONFIG_BLK_DEV_3W_XXXX_RAID is not set 649# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
650# CONFIG_SCSI_HPSA is not set
620# CONFIG_SCSI_3W_9XXX is not set 651# CONFIG_SCSI_3W_9XXX is not set
652# CONFIG_SCSI_3W_SAS is not set
621# CONFIG_SCSI_ACARD is not set 653# CONFIG_SCSI_ACARD is not set
622# CONFIG_SCSI_AACRAID is not set 654# CONFIG_SCSI_AACRAID is not set
623# CONFIG_SCSI_AIC7XXX is not set 655# CONFIG_SCSI_AIC7XXX is not set
@@ -651,7 +683,9 @@ CONFIG_SCSI_LOWLEVEL=y
651# CONFIG_SCSI_NSP32 is not set 683# CONFIG_SCSI_NSP32 is not set
652# CONFIG_SCSI_DEBUG is not set 684# CONFIG_SCSI_DEBUG is not set
653# CONFIG_SCSI_PMCRAID is not set 685# CONFIG_SCSI_PMCRAID is not set
686# CONFIG_SCSI_PM8001 is not set
654# CONFIG_SCSI_SRP is not set 687# CONFIG_SCSI_SRP is not set
688# CONFIG_SCSI_BFA_FC is not set
655# CONFIG_SCSI_DH is not set 689# CONFIG_SCSI_DH is not set
656# CONFIG_SCSI_OSD_INITIATOR is not set 690# CONFIG_SCSI_OSD_INITIATOR is not set
657CONFIG_ATA=y 691CONFIG_ATA=y
@@ -704,15 +738,16 @@ CONFIG_ATA_SFF=y
704# CONFIG_PATA_NS87415 is not set 738# CONFIG_PATA_NS87415 is not set
705# CONFIG_PATA_OPTI is not set 739# CONFIG_PATA_OPTI is not set
706# CONFIG_PATA_OPTIDMA is not set 740# CONFIG_PATA_OPTIDMA is not set
741# CONFIG_PATA_PDC2027X is not set
707# CONFIG_PATA_PDC_OLD is not set 742# CONFIG_PATA_PDC_OLD is not set
708# CONFIG_PATA_RADISYS is not set 743# CONFIG_PATA_RADISYS is not set
709# CONFIG_PATA_RDC is not set 744# CONFIG_PATA_RDC is not set
710# CONFIG_PATA_RZ1000 is not set 745# CONFIG_PATA_RZ1000 is not set
711# CONFIG_PATA_SC1200 is not set 746# CONFIG_PATA_SC1200 is not set
712# CONFIG_PATA_SERVERWORKS is not set 747# CONFIG_PATA_SERVERWORKS is not set
713# CONFIG_PATA_PDC2027X is not set
714# CONFIG_PATA_SIL680 is not set 748# CONFIG_PATA_SIL680 is not set
715# CONFIG_PATA_SIS is not set 749# CONFIG_PATA_SIS is not set
750# CONFIG_PATA_TOSHIBA is not set
716# CONFIG_PATA_VIA is not set 751# CONFIG_PATA_VIA is not set
717# CONFIG_PATA_WINBOND is not set 752# CONFIG_PATA_WINBOND is not set
718CONFIG_PATA_PLATFORM=y 753CONFIG_PATA_PLATFORM=y
@@ -790,6 +825,7 @@ CONFIG_8139TOO=y
790# CONFIG_TLAN is not set 825# CONFIG_TLAN is not set
791# CONFIG_KS8842 is not set 826# CONFIG_KS8842 is not set
792# CONFIG_KS8851 is not set 827# CONFIG_KS8851 is not set
828# CONFIG_KS8851_MLL is not set
793# CONFIG_VIA_RHINE is not set 829# CONFIG_VIA_RHINE is not set
794# CONFIG_SC92031 is not set 830# CONFIG_SC92031 is not set
795# CONFIG_ATL2 is not set 831# CONFIG_ATL2 is not set
@@ -838,8 +874,10 @@ CONFIG_CHELSIO_T3_DEPENDS=y
838# CONFIG_BE2NET is not set 874# CONFIG_BE2NET is not set
839# CONFIG_TR is not set 875# CONFIG_TR is not set
840CONFIG_WLAN=y 876CONFIG_WLAN=y
841# CONFIG_WLAN_PRE80211 is not set 877# CONFIG_ATMEL is not set
842# CONFIG_WLAN_80211 is not set 878# CONFIG_PRISM54 is not set
879# CONFIG_USB_ZD1201 is not set
880# CONFIG_HOSTAP is not set
843 881
844# 882#
845# Enable WiMAX (Networking options) to see the WiMAX drivers 883# Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -862,6 +900,7 @@ CONFIG_WLAN=y
862# CONFIG_NETCONSOLE is not set 900# CONFIG_NETCONSOLE is not set
863# CONFIG_NETPOLL is not set 901# CONFIG_NETPOLL is not set
864# CONFIG_NET_POLL_CONTROLLER is not set 902# CONFIG_NET_POLL_CONTROLLER is not set
903# CONFIG_VMXNET3 is not set
865# CONFIG_ISDN is not set 904# CONFIG_ISDN is not set
866# CONFIG_PHONE is not set 905# CONFIG_PHONE is not set
867 906
@@ -871,6 +910,7 @@ CONFIG_WLAN=y
871CONFIG_INPUT=y 910CONFIG_INPUT=y
872CONFIG_INPUT_FF_MEMLESS=m 911CONFIG_INPUT_FF_MEMLESS=m
873# CONFIG_INPUT_POLLDEV is not set 912# CONFIG_INPUT_POLLDEV is not set
913# CONFIG_INPUT_SPARSEKMAP is not set
874 914
875# 915#
876# Userland interfaces 916# Userland interfaces
@@ -923,7 +963,7 @@ CONFIG_SERIAL_8250_RUNTIME_UARTS=4
923# 963#
924# CONFIG_SERIAL_MAX3100 is not set 964# CONFIG_SERIAL_MAX3100 is not set
925CONFIG_SERIAL_SH_SCI=y 965CONFIG_SERIAL_SH_SCI=y
926CONFIG_SERIAL_SH_SCI_NR_UARTS=1 966CONFIG_SERIAL_SH_SCI_NR_UARTS=2
927CONFIG_SERIAL_SH_SCI_CONSOLE=y 967CONFIG_SERIAL_SH_SCI_CONSOLE=y
928CONFIG_SERIAL_CORE=y 968CONFIG_SERIAL_CORE=y
929CONFIG_SERIAL_CORE_CONSOLE=y 969CONFIG_SERIAL_CORE_CONSOLE=y
@@ -948,7 +988,10 @@ CONFIG_SPI_MASTER=y
948# SPI Master Controller Drivers 988# SPI Master Controller Drivers
949# 989#
950CONFIG_SPI_BITBANG=y 990CONFIG_SPI_BITBANG=y
991# CONFIG_SPI_SH_MSIOF is not set
951CONFIG_SPI_SH_SCI=y 992CONFIG_SPI_SH_SCI=y
993# CONFIG_SPI_XILINX is not set
994# CONFIG_SPI_DESIGNWARE is not set
952 995
953# 996#
954# SPI Protocol Masters 997# SPI Protocol Masters
@@ -1001,10 +1044,12 @@ CONFIG_SSB_POSSIBLE=y
1001# 1044#
1002# CONFIG_MFD_CORE is not set 1045# CONFIG_MFD_CORE is not set
1003CONFIG_MFD_SM501=y 1046CONFIG_MFD_SM501=y
1047# CONFIG_MFD_SH_MOBILE_SDHI is not set
1004# CONFIG_HTC_PASIC3 is not set 1048# CONFIG_HTC_PASIC3 is not set
1005# CONFIG_MFD_TMIO is not set 1049# CONFIG_MFD_TMIO is not set
1006# CONFIG_MFD_MC13783 is not set 1050# CONFIG_MFD_MC13783 is not set
1007# CONFIG_EZX_PCAP is not set 1051# CONFIG_EZX_PCAP is not set
1052# CONFIG_AB4500_CORE is not set
1008# CONFIG_REGULATOR is not set 1053# CONFIG_REGULATOR is not set
1009# CONFIG_MEDIA_SUPPORT is not set 1054# CONFIG_MEDIA_SUPPORT is not set
1010 1055
@@ -1141,6 +1186,7 @@ CONFIG_SND_PCI=y
1141# CONFIG_SND_OXYGEN is not set 1186# CONFIG_SND_OXYGEN is not set
1142# CONFIG_SND_CS4281 is not set 1187# CONFIG_SND_CS4281 is not set
1143# CONFIG_SND_CS46XX is not set 1188# CONFIG_SND_CS46XX is not set
1189# CONFIG_SND_CS5535AUDIO is not set
1144# CONFIG_SND_CTXFI is not set 1190# CONFIG_SND_CTXFI is not set
1145# CONFIG_SND_DARLA20 is not set 1191# CONFIG_SND_DARLA20 is not set
1146# CONFIG_SND_GINA20 is not set 1192# CONFIG_SND_GINA20 is not set
@@ -1394,7 +1440,9 @@ CONFIG_RTC_DRV_R9701=y
1394# CONFIG_RTC_DRV_M48T86 is not set 1440# CONFIG_RTC_DRV_M48T86 is not set
1395# CONFIG_RTC_DRV_M48T35 is not set 1441# CONFIG_RTC_DRV_M48T35 is not set
1396# CONFIG_RTC_DRV_M48T59 is not set 1442# CONFIG_RTC_DRV_M48T59 is not set
1443# CONFIG_RTC_DRV_MSM6242 is not set
1397# CONFIG_RTC_DRV_BQ4802 is not set 1444# CONFIG_RTC_DRV_BQ4802 is not set
1445# CONFIG_RTC_DRV_RP5C01 is not set
1398# CONFIG_RTC_DRV_V3020 is not set 1446# CONFIG_RTC_DRV_V3020 is not set
1399 1447
1400# 1448#
@@ -1419,6 +1467,7 @@ CONFIG_EXT2_FS=y
1419# CONFIG_EXT2_FS_XIP is not set 1467# CONFIG_EXT2_FS_XIP is not set
1420# CONFIG_EXT3_FS is not set 1468# CONFIG_EXT3_FS is not set
1421# CONFIG_EXT4_FS is not set 1469# CONFIG_EXT4_FS is not set
1470CONFIG_EXT4_USE_FOR_EXT23=y
1422# CONFIG_REISERFS_FS is not set 1471# CONFIG_REISERFS_FS is not set
1423# CONFIG_JFS_FS is not set 1472# CONFIG_JFS_FS is not set
1424# CONFIG_FS_POSIX_ACL is not set 1473# CONFIG_FS_POSIX_ACL is not set
@@ -1561,10 +1610,11 @@ CONFIG_DEBUG_FS=y
1561# CONFIG_HEADERS_CHECK is not set 1610# CONFIG_HEADERS_CHECK is not set
1562# CONFIG_DEBUG_KERNEL is not set 1611# CONFIG_DEBUG_KERNEL is not set
1563CONFIG_STACKTRACE=y 1612CONFIG_STACKTRACE=y
1564# CONFIG_DEBUG_BUGVERBOSE is not set 1613CONFIG_DEBUG_BUGVERBOSE=y
1565# CONFIG_DEBUG_MEMORY_INIT is not set 1614# CONFIG_DEBUG_MEMORY_INIT is not set
1566# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1615# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1567# CONFIG_LATENCYTOP is not set 1616# CONFIG_LATENCYTOP is not set
1617# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1568CONFIG_NOP_TRACER=y 1618CONFIG_NOP_TRACER=y
1569CONFIG_HAVE_FUNCTION_TRACER=y 1619CONFIG_HAVE_FUNCTION_TRACER=y
1570CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 1620CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
@@ -1584,9 +1634,6 @@ CONFIG_TRACING_SUPPORT=y
1584# CONFIG_SAMPLES is not set 1634# CONFIG_SAMPLES is not set
1585CONFIG_HAVE_ARCH_KGDB=y 1635CONFIG_HAVE_ARCH_KGDB=y
1586# CONFIG_SH_STANDARD_BIOS is not set 1636# CONFIG_SH_STANDARD_BIOS is not set
1587CONFIG_EARLY_SCIF_CONSOLE=y
1588CONFIG_EARLY_SCIF_CONSOLE_PORT=0xffe80000
1589CONFIG_EARLY_PRINTK=y
1590# CONFIG_DWARF_UNWINDER is not set 1637# CONFIG_DWARF_UNWINDER is not set
1591 1638
1592# 1639#
@@ -1595,7 +1642,11 @@ CONFIG_EARLY_PRINTK=y
1595# CONFIG_KEYS is not set 1642# CONFIG_KEYS is not set
1596# CONFIG_SECURITY is not set 1643# CONFIG_SECURITY is not set
1597# CONFIG_SECURITYFS is not set 1644# CONFIG_SECURITYFS is not set
1598# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1645# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1646# CONFIG_DEFAULT_SECURITY_SMACK is not set
1647# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1648CONFIG_DEFAULT_SECURITY_DAC=y
1649CONFIG_DEFAULT_SECURITY=""
1599CONFIG_CRYPTO=y 1650CONFIG_CRYPTO=y
1600 1651
1601# 1652#
diff --git a/arch/sh/configs/sdk7780_defconfig b/arch/sh/configs/sdk7780_defconfig
index 055536b5c5cd..1859ba099945 100644
--- a/arch/sh/configs/sdk7780_defconfig
+++ b/arch/sh/configs/sdk7780_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Thu Sep 24 18:40:25 2009 4# Mon Jan 4 13:27:20 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -20,6 +20,7 @@ CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set 21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
22CONFIG_ARCH_HIBERNATION_POSSIBLE=y 22CONFIG_ARCH_HIBERNATION_POSSIBLE=y
23CONFIG_SYS_SUPPORTS_HUGETLBFS=y
23CONFIG_SYS_SUPPORTS_PCI=y 24CONFIG_SYS_SUPPORTS_PCI=y
24CONFIG_SYS_SUPPORTS_TMU=y 25CONFIG_SYS_SUPPORTS_TMU=y
25CONFIG_STACKTRACE_SUPPORT=y 26CONFIG_STACKTRACE_SUPPORT=y
@@ -30,6 +31,7 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
30CONFIG_ARCH_NO_VIRT_TO_BUS=y 31CONFIG_ARCH_NO_VIRT_TO_BUS=y
31CONFIG_ARCH_HAS_DEFAULT_IDLE=y 32CONFIG_ARCH_HAS_DEFAULT_IDLE=y
32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
34CONFIG_DMA_NONCOHERENT=y
33CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
34CONFIG_CONSTRUCTORS=y 36CONFIG_CONSTRUCTORS=y
35 37
@@ -63,6 +65,7 @@ CONFIG_BSD_PROCESS_ACCT=y
63# 65#
64CONFIG_TREE_RCU=y 66CONFIG_TREE_RCU=y
65# CONFIG_TREE_PREEMPT_RCU is not set 67# CONFIG_TREE_PREEMPT_RCU is not set
68# CONFIG_TINY_RCU is not set
66# CONFIG_RCU_TRACE is not set 69# CONFIG_RCU_TRACE is not set
67CONFIG_RCU_FANOUT=32 70CONFIG_RCU_FANOUT=32
68# CONFIG_RCU_FANOUT_EXACT is not set 71# CONFIG_RCU_FANOUT_EXACT is not set
@@ -99,6 +102,7 @@ CONFIG_EVENTFD=y
99CONFIG_SHMEM=y 102CONFIG_SHMEM=y
100CONFIG_AIO=y 103CONFIG_AIO=y
101CONFIG_HAVE_PERF_EVENTS=y 104CONFIG_HAVE_PERF_EVENTS=y
105CONFIG_PERF_USE_VMALLOC=y
102 106
103# 107#
104# Kernel Performance Events And Counters 108# Kernel Performance Events And Counters
@@ -119,6 +123,7 @@ CONFIG_HAVE_IOREMAP_PROT=y
119CONFIG_HAVE_KPROBES=y 123CONFIG_HAVE_KPROBES=y
120CONFIG_HAVE_KRETPROBES=y 124CONFIG_HAVE_KRETPROBES=y
121CONFIG_HAVE_ARCH_TRACEHOOK=y 125CONFIG_HAVE_ARCH_TRACEHOOK=y
126CONFIG_HAVE_DMA_ATTRS=y
122CONFIG_HAVE_CLK=y 127CONFIG_HAVE_CLK=y
123CONFIG_HAVE_DMA_API_DEBUG=y 128CONFIG_HAVE_DMA_API_DEBUG=y
124 129
@@ -145,14 +150,41 @@ CONFIG_LBDAF=y
145# IO Schedulers 150# IO Schedulers
146# 151#
147CONFIG_IOSCHED_NOOP=y 152CONFIG_IOSCHED_NOOP=y
148CONFIG_IOSCHED_AS=y
149CONFIG_IOSCHED_DEADLINE=y 153CONFIG_IOSCHED_DEADLINE=y
150CONFIG_IOSCHED_CFQ=y 154CONFIG_IOSCHED_CFQ=y
151CONFIG_DEFAULT_AS=y
152# CONFIG_DEFAULT_DEADLINE is not set 155# CONFIG_DEFAULT_DEADLINE is not set
153# CONFIG_DEFAULT_CFQ is not set 156CONFIG_DEFAULT_CFQ=y
154# CONFIG_DEFAULT_NOOP is not set 157# CONFIG_DEFAULT_NOOP is not set
155CONFIG_DEFAULT_IOSCHED="anticipatory" 158CONFIG_DEFAULT_IOSCHED="cfq"
159# CONFIG_INLINE_SPIN_TRYLOCK is not set
160# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
161# CONFIG_INLINE_SPIN_LOCK is not set
162# CONFIG_INLINE_SPIN_LOCK_BH is not set
163# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
164# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
165# CONFIG_INLINE_SPIN_UNLOCK is not set
166# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
167# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
168# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
169# CONFIG_INLINE_READ_TRYLOCK is not set
170# CONFIG_INLINE_READ_LOCK is not set
171# CONFIG_INLINE_READ_LOCK_BH is not set
172# CONFIG_INLINE_READ_LOCK_IRQ is not set
173# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
174# CONFIG_INLINE_READ_UNLOCK is not set
175# CONFIG_INLINE_READ_UNLOCK_BH is not set
176# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
177# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
178# CONFIG_INLINE_WRITE_TRYLOCK is not set
179# CONFIG_INLINE_WRITE_LOCK is not set
180# CONFIG_INLINE_WRITE_LOCK_BH is not set
181# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
182# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
183# CONFIG_INLINE_WRITE_UNLOCK is not set
184# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
185# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
186# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
187# CONFIG_MUTEX_SPIN_ON_OWNER is not set
156# CONFIG_FREEZER is not set 188# CONFIG_FREEZER is not set
157 189
158# 190#
@@ -239,8 +271,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
239# CONFIG_PHYS_ADDR_T_64BIT is not set 271# CONFIG_PHYS_ADDR_T_64BIT is not set
240CONFIG_ZONE_DMA_FLAG=0 272CONFIG_ZONE_DMA_FLAG=0
241CONFIG_NR_QUICK=2 273CONFIG_NR_QUICK=2
242CONFIG_HAVE_MLOCK=y
243CONFIG_HAVE_MLOCKED_PAGE_BIT=y
244# CONFIG_KSM is not set 274# CONFIG_KSM is not set
245CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 275CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
246 276
@@ -291,9 +321,9 @@ CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
291# 321#
292# DMA support 322# DMA support
293# 323#
294CONFIG_SH_DMA_API=y
295CONFIG_SH_DMA=y 324CONFIG_SH_DMA=y
296CONFIG_SH_DMA_IRQ_MULTI=y 325CONFIG_SH_DMA_IRQ_MULTI=y
326CONFIG_SH_DMA_API=y
297CONFIG_NR_ONCHIP_DMA_CHANNELS=12 327CONFIG_NR_ONCHIP_DMA_CHANNELS=12
298# CONFIG_NR_DMA_CHANNELS_BOOL is not set 328# CONFIG_NR_DMA_CHANNELS_BOOL is not set
299 329
@@ -339,7 +369,6 @@ CONFIG_CMDLINE="mem=128M console=tty0 console=ttySC0,115200 ip=bootp root=/dev/n
339# Bus options 369# Bus options
340# 370#
341CONFIG_PCI=y 371CONFIG_PCI=y
342CONFIG_SH_PCIDMA_NONCOHERENT=y
343# CONFIG_PCIEPORTBUS is not set 372# CONFIG_PCIEPORTBUS is not set
344# CONFIG_ARCH_SUPPORTS_MSI is not set 373# CONFIG_ARCH_SUPPORTS_MSI is not set
345# CONFIG_PCI_LEGACY is not set 374# CONFIG_PCI_LEGACY is not set
@@ -347,7 +376,6 @@ CONFIG_PCI_DEBUG=y
347# CONFIG_PCI_STUB is not set 376# CONFIG_PCI_STUB is not set
348# CONFIG_PCI_IOV is not set 377# CONFIG_PCI_IOV is not set
349CONFIG_PCCARD=y 378CONFIG_PCCARD=y
350# CONFIG_PCMCIA_DEBUG is not set
351CONFIG_PCMCIA=y 379CONFIG_PCMCIA=y
352CONFIG_PCMCIA_LOAD_CIS=y 380CONFIG_PCMCIA_LOAD_CIS=y
353CONFIG_PCMCIA_IOCTL=y 381CONFIG_PCMCIA_IOCTL=y
@@ -445,6 +473,7 @@ CONFIG_INET6_XFRM_MODE_TUNNEL=y
445# CONFIG_INET6_XFRM_MODE_BEET is not set 473# CONFIG_INET6_XFRM_MODE_BEET is not set
446# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set 474# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
447CONFIG_IPV6_SIT=y 475CONFIG_IPV6_SIT=y
476# CONFIG_IPV6_SIT_6RD is not set
448CONFIG_IPV6_NDISC_NODETYPE=y 477CONFIG_IPV6_NDISC_NODETYPE=y
449# CONFIG_IPV6_TUNNEL is not set 478# CONFIG_IPV6_TUNNEL is not set
450# CONFIG_IPV6_MULTIPLE_TABLES is not set 479# CONFIG_IPV6_MULTIPLE_TABLES is not set
@@ -515,9 +544,6 @@ CONFIG_NET_SCH_FIFO=y
515# CONFIG_AF_RXRPC is not set 544# CONFIG_AF_RXRPC is not set
516CONFIG_WIRELESS=y 545CONFIG_WIRELESS=y
517# CONFIG_CFG80211 is not set 546# CONFIG_CFG80211 is not set
518CONFIG_CFG80211_DEFAULT_PS_VALUE=0
519# CONFIG_WIRELESS_OLD_REGULATORY is not set
520# CONFIG_WIRELESS_EXT is not set
521# CONFIG_LIB80211 is not set 547# CONFIG_LIB80211 is not set
522 548
523# 549#
@@ -558,6 +584,10 @@ CONFIG_BLK_DEV=y
558# CONFIG_BLK_DEV_COW_COMMON is not set 584# CONFIG_BLK_DEV_COW_COMMON is not set
559CONFIG_BLK_DEV_LOOP=y 585CONFIG_BLK_DEV_LOOP=y
560# CONFIG_BLK_DEV_CRYPTOLOOP is not set 586# CONFIG_BLK_DEV_CRYPTOLOOP is not set
587
588#
589# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
590#
561# CONFIG_BLK_DEV_NBD is not set 591# CONFIG_BLK_DEV_NBD is not set
562# CONFIG_BLK_DEV_SX8 is not set 592# CONFIG_BLK_DEV_SX8 is not set
563# CONFIG_BLK_DEV_UB is not set 593# CONFIG_BLK_DEV_UB is not set
@@ -663,8 +693,11 @@ CONFIG_SCSI_FC_ATTRS=y
663CONFIG_SCSI_LOWLEVEL=y 693CONFIG_SCSI_LOWLEVEL=y
664# CONFIG_ISCSI_TCP is not set 694# CONFIG_ISCSI_TCP is not set
665# CONFIG_SCSI_BNX2_ISCSI is not set 695# CONFIG_SCSI_BNX2_ISCSI is not set
696# CONFIG_BE2ISCSI is not set
666# CONFIG_BLK_DEV_3W_XXXX_RAID is not set 697# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
698# CONFIG_SCSI_HPSA is not set
667# CONFIG_SCSI_3W_9XXX is not set 699# CONFIG_SCSI_3W_9XXX is not set
700# CONFIG_SCSI_3W_SAS is not set
668# CONFIG_SCSI_ACARD is not set 701# CONFIG_SCSI_ACARD is not set
669# CONFIG_SCSI_AACRAID is not set 702# CONFIG_SCSI_AACRAID is not set
670# CONFIG_SCSI_AIC7XXX is not set 703# CONFIG_SCSI_AIC7XXX is not set
@@ -698,7 +731,9 @@ CONFIG_SCSI_LOWLEVEL=y
698# CONFIG_SCSI_NSP32 is not set 731# CONFIG_SCSI_NSP32 is not set
699# CONFIG_SCSI_DEBUG is not set 732# CONFIG_SCSI_DEBUG is not set
700# CONFIG_SCSI_PMCRAID is not set 733# CONFIG_SCSI_PMCRAID is not set
734# CONFIG_SCSI_PM8001 is not set
701# CONFIG_SCSI_SRP is not set 735# CONFIG_SCSI_SRP is not set
736# CONFIG_SCSI_BFA_FC is not set
702# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set 737# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set
703# CONFIG_SCSI_DH is not set 738# CONFIG_SCSI_DH is not set
704# CONFIG_SCSI_OSD_INITIATOR is not set 739# CONFIG_SCSI_OSD_INITIATOR is not set
@@ -753,15 +788,16 @@ CONFIG_ATA_SFF=y
753# CONFIG_PATA_OPTI is not set 788# CONFIG_PATA_OPTI is not set
754# CONFIG_PATA_OPTIDMA is not set 789# CONFIG_PATA_OPTIDMA is not set
755# CONFIG_PATA_PCMCIA is not set 790# CONFIG_PATA_PCMCIA is not set
791# CONFIG_PATA_PDC2027X is not set
756# CONFIG_PATA_PDC_OLD is not set 792# CONFIG_PATA_PDC_OLD is not set
757# CONFIG_PATA_RADISYS is not set 793# CONFIG_PATA_RADISYS is not set
758# CONFIG_PATA_RDC is not set 794# CONFIG_PATA_RDC is not set
759# CONFIG_PATA_RZ1000 is not set 795# CONFIG_PATA_RZ1000 is not set
760# CONFIG_PATA_SC1200 is not set 796# CONFIG_PATA_SC1200 is not set
761# CONFIG_PATA_SERVERWORKS is not set 797# CONFIG_PATA_SERVERWORKS is not set
762# CONFIG_PATA_PDC2027X is not set
763# CONFIG_PATA_SIL680 is not set 798# CONFIG_PATA_SIL680 is not set
764# CONFIG_PATA_SIS is not set 799# CONFIG_PATA_SIS is not set
800# CONFIG_PATA_TOSHIBA is not set
765# CONFIG_PATA_VIA is not set 801# CONFIG_PATA_VIA is not set
766# CONFIG_PATA_WINBOND is not set 802# CONFIG_PATA_WINBOND is not set
767# CONFIG_PATA_PLATFORM is not set 803# CONFIG_PATA_PLATFORM is not set
@@ -827,14 +863,20 @@ CONFIG_SMC91X=y
827# CONFIG_NET_PCI is not set 863# CONFIG_NET_PCI is not set
828# CONFIG_B44 is not set 864# CONFIG_B44 is not set
829# CONFIG_KS8842 is not set 865# CONFIG_KS8842 is not set
866# CONFIG_KS8851_MLL is not set
830# CONFIG_NET_POCKET is not set 867# CONFIG_NET_POCKET is not set
831# CONFIG_ATL2 is not set 868# CONFIG_ATL2 is not set
832# CONFIG_NETDEV_1000 is not set 869# CONFIG_NETDEV_1000 is not set
833# CONFIG_NETDEV_10000 is not set 870# CONFIG_NETDEV_10000 is not set
834# CONFIG_TR is not set 871# CONFIG_TR is not set
835CONFIG_WLAN=y 872CONFIG_WLAN=y
836# CONFIG_WLAN_PRE80211 is not set 873# CONFIG_PCMCIA_RAYCS is not set
837# CONFIG_WLAN_80211 is not set 874# CONFIG_ATMEL is not set
875# CONFIG_AIRO_CS is not set
876# CONFIG_PCMCIA_WL3501 is not set
877# CONFIG_PRISM54 is not set
878# CONFIG_USB_ZD1201 is not set
879# CONFIG_HOSTAP is not set
838 880
839# 881#
840# Enable WiMAX (Networking options) to see the WiMAX drivers 882# Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -861,6 +903,7 @@ CONFIG_NETCONSOLE=y
861CONFIG_NETPOLL=y 903CONFIG_NETPOLL=y
862# CONFIG_NETPOLL_TRAP is not set 904# CONFIG_NETPOLL_TRAP is not set
863CONFIG_NET_POLL_CONTROLLER=y 905CONFIG_NET_POLL_CONTROLLER=y
906# CONFIG_VMXNET3 is not set
864# CONFIG_ISDN is not set 907# CONFIG_ISDN is not set
865# CONFIG_PHONE is not set 908# CONFIG_PHONE is not set
866 909
@@ -870,6 +913,7 @@ CONFIG_NET_POLL_CONTROLLER=y
870CONFIG_INPUT=y 913CONFIG_INPUT=y
871CONFIG_INPUT_FF_MEMLESS=m 914CONFIG_INPUT_FF_MEMLESS=m
872# CONFIG_INPUT_POLLDEV is not set 915# CONFIG_INPUT_POLLDEV is not set
916# CONFIG_INPUT_SPARSEKMAP is not set
873 917
874# 918#
875# Userland interfaces 919# Userland interfaces
@@ -922,6 +966,7 @@ CONFIG_SERIO=y
922# CONFIG_SERIO_PCIPS2 is not set 966# CONFIG_SERIO_PCIPS2 is not set
923CONFIG_SERIO_LIBPS2=y 967CONFIG_SERIO_LIBPS2=y
924# CONFIG_SERIO_RAW is not set 968# CONFIG_SERIO_RAW is not set
969# CONFIG_SERIO_ALTERA_PS2 is not set
925# CONFIG_GAMEPORT is not set 970# CONFIG_GAMEPORT is not set
926 971
927# 972#
@@ -1009,6 +1054,7 @@ CONFIG_SSB_DRIVER_PCICORE=y
1009# 1054#
1010# CONFIG_MFD_CORE is not set 1055# CONFIG_MFD_CORE is not set
1011# CONFIG_MFD_SM501 is not set 1056# CONFIG_MFD_SM501 is not set
1057# CONFIG_MFD_SH_MOBILE_SDHI is not set
1012# CONFIG_HTC_PASIC3 is not set 1058# CONFIG_HTC_PASIC3 is not set
1013# CONFIG_MFD_TMIO is not set 1059# CONFIG_MFD_TMIO is not set
1014# CONFIG_REGULATOR is not set 1060# CONFIG_REGULATOR is not set
@@ -1534,8 +1580,6 @@ CONFIG_BRANCH_PROFILE_NONE=y
1534CONFIG_HAVE_ARCH_KGDB=y 1580CONFIG_HAVE_ARCH_KGDB=y
1535# CONFIG_KGDB is not set 1581# CONFIG_KGDB is not set
1536CONFIG_SH_STANDARD_BIOS=y 1582CONFIG_SH_STANDARD_BIOS=y
1537# CONFIG_EARLY_SCIF_CONSOLE is not set
1538# CONFIG_EARLY_PRINTK is not set
1539# CONFIG_STACK_DEBUG is not set 1583# CONFIG_STACK_DEBUG is not set
1540# CONFIG_DEBUG_STACK_USAGE is not set 1584# CONFIG_DEBUG_STACK_USAGE is not set
1541# CONFIG_4KSTACKS is not set 1585# CONFIG_4KSTACKS is not set
@@ -1549,7 +1593,11 @@ CONFIG_DUMP_CODE=y
1549# CONFIG_KEYS is not set 1593# CONFIG_KEYS is not set
1550# CONFIG_SECURITY is not set 1594# CONFIG_SECURITY is not set
1551# CONFIG_SECURITYFS is not set 1595# CONFIG_SECURITYFS is not set
1552# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1596# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1597# CONFIG_DEFAULT_SECURITY_SMACK is not set
1598# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1599CONFIG_DEFAULT_SECURITY_DAC=y
1600CONFIG_DEFAULT_SECURITY=""
1553CONFIG_CRYPTO=y 1601CONFIG_CRYPTO=y
1554 1602
1555# 1603#
diff --git a/arch/sh/configs/sdk7786_defconfig b/arch/sh/configs/sdk7786_defconfig
new file mode 100644
index 000000000000..9b331eab968e
--- /dev/null
+++ b/arch/sh/configs/sdk7786_defconfig
@@ -0,0 +1,1754 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc7
4# Tue Feb 9 15:27:06 2010
5#
6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y
8# CONFIG_SUPERH64 is not set
9CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
10CONFIG_RWSEM_GENERIC_SPINLOCK=y
11CONFIG_GENERIC_BUG=y
12CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18# CONFIG_GENERIC_GPIO is not set
19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y
21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
22CONFIG_ARCH_HIBERNATION_POSSIBLE=y
23CONFIG_SYS_SUPPORTS_HUGETLBFS=y
24CONFIG_SYS_SUPPORTS_SMP=y
25CONFIG_SYS_SUPPORTS_NUMA=y
26CONFIG_SYS_SUPPORTS_PCI=y
27CONFIG_SYS_SUPPORTS_TMU=y
28CONFIG_STACKTRACE_SUPPORT=y
29CONFIG_LOCKDEP_SUPPORT=y
30CONFIG_HAVE_LATENCYTOP_SUPPORT=y
31# CONFIG_ARCH_HAS_ILOG2_U32 is not set
32# CONFIG_ARCH_HAS_ILOG2_U64 is not set
33CONFIG_ARCH_NO_VIRT_TO_BUS=y
34CONFIG_ARCH_HAS_DEFAULT_IDLE=y
35CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
36CONFIG_DMA_COHERENT=y
37# CONFIG_DMA_NONCOHERENT is not set
38CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
39CONFIG_CONSTRUCTORS=y
40
41#
42# General setup
43#
44CONFIG_EXPERIMENTAL=y
45CONFIG_BROKEN_ON_SMP=y
46CONFIG_LOCK_KERNEL=y
47CONFIG_INIT_ENV_ARG_LIMIT=32
48CONFIG_LOCALVERSION=""
49CONFIG_LOCALVERSION_AUTO=y
50CONFIG_HAVE_KERNEL_GZIP=y
51CONFIG_HAVE_KERNEL_BZIP2=y
52CONFIG_HAVE_KERNEL_LZMA=y
53CONFIG_HAVE_KERNEL_LZO=y
54CONFIG_KERNEL_GZIP=y
55# CONFIG_KERNEL_BZIP2 is not set
56# CONFIG_KERNEL_LZMA is not set
57# CONFIG_KERNEL_LZO is not set
58CONFIG_SWAP=y
59CONFIG_SYSVIPC=y
60CONFIG_SYSVIPC_SYSCTL=y
61CONFIG_POSIX_MQUEUE=y
62CONFIG_POSIX_MQUEUE_SYSCTL=y
63CONFIG_BSD_PROCESS_ACCT=y
64# CONFIG_BSD_PROCESS_ACCT_V3 is not set
65# CONFIG_TASKSTATS is not set
66# CONFIG_AUDIT is not set
67
68#
69# RCU Subsystem
70#
71CONFIG_TREE_RCU=y
72# CONFIG_TREE_PREEMPT_RCU is not set
73# CONFIG_TINY_RCU is not set
74CONFIG_RCU_TRACE=y
75CONFIG_RCU_FANOUT=32
76# CONFIG_RCU_FANOUT_EXACT is not set
77CONFIG_TREE_RCU_TRACE=y
78CONFIG_IKCONFIG=y
79CONFIG_IKCONFIG_PROC=y
80CONFIG_LOG_BUF_SHIFT=14
81CONFIG_GROUP_SCHED=y
82CONFIG_FAIR_GROUP_SCHED=y
83CONFIG_RT_GROUP_SCHED=y
84CONFIG_USER_SCHED=y
85# CONFIG_CGROUP_SCHED is not set
86CONFIG_CGROUPS=y
87# CONFIG_CGROUP_DEBUG is not set
88CONFIG_CGROUP_NS=y
89CONFIG_CGROUP_FREEZER=y
90CONFIG_CGROUP_DEVICE=y
91# CONFIG_CPUSETS is not set
92CONFIG_CGROUP_CPUACCT=y
93CONFIG_RESOURCE_COUNTERS=y
94CONFIG_CGROUP_MEM_RES_CTLR=y
95# CONFIG_CGROUP_MEM_RES_CTLR_SWAP is not set
96CONFIG_MM_OWNER=y
97# CONFIG_SYSFS_DEPRECATED_V2 is not set
98# CONFIG_RELAY is not set
99CONFIG_NAMESPACES=y
100CONFIG_UTS_NS=y
101CONFIG_IPC_NS=y
102CONFIG_USER_NS=y
103CONFIG_PID_NS=y
104CONFIG_NET_NS=y
105# CONFIG_BLK_DEV_INITRD is not set
106CONFIG_CC_OPTIMIZE_FOR_SIZE=y
107CONFIG_SYSCTL=y
108CONFIG_ANON_INODES=y
109CONFIG_EMBEDDED=y
110CONFIG_UID16=y
111CONFIG_SYSCTL_SYSCALL=y
112CONFIG_KALLSYMS=y
113CONFIG_KALLSYMS_ALL=y
114# CONFIG_KALLSYMS_EXTRA_PASS is not set
115CONFIG_HOTPLUG=y
116CONFIG_PRINTK=y
117CONFIG_BUG=y
118CONFIG_ELF_CORE=y
119CONFIG_BASE_FULL=y
120CONFIG_FUTEX=y
121CONFIG_EPOLL=y
122CONFIG_SIGNALFD=y
123CONFIG_TIMERFD=y
124CONFIG_EVENTFD=y
125CONFIG_SHMEM=y
126CONFIG_AIO=y
127CONFIG_HAVE_PERF_EVENTS=y
128CONFIG_PERF_USE_VMALLOC=y
129
130#
131# Kernel Performance Events And Counters
132#
133CONFIG_PERF_EVENTS=y
134CONFIG_EVENT_PROFILE=y
135# CONFIG_PERF_COUNTERS is not set
136# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
137CONFIG_VM_EVENT_COUNTERS=y
138CONFIG_PCI_QUIRKS=y
139# CONFIG_COMPAT_BRK is not set
140CONFIG_SLAB=y
141# CONFIG_SLUB is not set
142# CONFIG_SLOB is not set
143CONFIG_PROFILING=y
144CONFIG_TRACEPOINTS=y
145# CONFIG_OPROFILE is not set
146CONFIG_HAVE_OPROFILE=y
147# CONFIG_KPROBES is not set
148CONFIG_HAVE_KPROBES=y
149CONFIG_HAVE_KRETPROBES=y
150CONFIG_HAVE_ARCH_TRACEHOOK=y
151CONFIG_HAVE_DMA_ATTRS=y
152CONFIG_HAVE_CLK=y
153CONFIG_HAVE_DMA_API_DEBUG=y
154CONFIG_HAVE_HW_BREAKPOINT=y
155
156#
157# GCOV-based kernel profiling
158#
159# CONFIG_GCOV_KERNEL is not set
160# CONFIG_SLOW_WORK is not set
161CONFIG_HAVE_GENERIC_DMA_COHERENT=y
162CONFIG_SLABINFO=y
163CONFIG_RT_MUTEXES=y
164CONFIG_BASE_SMALL=0
165CONFIG_MODULES=y
166# CONFIG_MODULE_FORCE_LOAD is not set
167CONFIG_MODULE_UNLOAD=y
168# CONFIG_MODULE_FORCE_UNLOAD is not set
169# CONFIG_MODVERSIONS is not set
170# CONFIG_MODULE_SRCVERSION_ALL is not set
171CONFIG_BLOCK=y
172# CONFIG_LBDAF is not set
173# CONFIG_BLK_DEV_BSG is not set
174# CONFIG_BLK_DEV_INTEGRITY is not set
175CONFIG_BLK_CGROUP=y
176# CONFIG_DEBUG_BLK_CGROUP is not set
177
178#
179# IO Schedulers
180#
181CONFIG_IOSCHED_NOOP=y
182CONFIG_IOSCHED_DEADLINE=y
183CONFIG_IOSCHED_CFQ=y
184CONFIG_CFQ_GROUP_IOSCHED=y
185# CONFIG_DEBUG_CFQ_IOSCHED is not set
186# CONFIG_DEFAULT_DEADLINE is not set
187CONFIG_DEFAULT_CFQ=y
188# CONFIG_DEFAULT_NOOP is not set
189CONFIG_DEFAULT_IOSCHED="cfq"
190# CONFIG_INLINE_SPIN_TRYLOCK is not set
191# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
192# CONFIG_INLINE_SPIN_LOCK is not set
193# CONFIG_INLINE_SPIN_LOCK_BH is not set
194# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
195# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
196# CONFIG_INLINE_SPIN_UNLOCK is not set
197# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
198# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
199# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
200# CONFIG_INLINE_READ_TRYLOCK is not set
201# CONFIG_INLINE_READ_LOCK is not set
202# CONFIG_INLINE_READ_LOCK_BH is not set
203# CONFIG_INLINE_READ_LOCK_IRQ is not set
204# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
205# CONFIG_INLINE_READ_UNLOCK is not set
206# CONFIG_INLINE_READ_UNLOCK_BH is not set
207# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
208# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
209# CONFIG_INLINE_WRITE_TRYLOCK is not set
210# CONFIG_INLINE_WRITE_LOCK is not set
211# CONFIG_INLINE_WRITE_LOCK_BH is not set
212# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
213# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
214# CONFIG_INLINE_WRITE_UNLOCK is not set
215# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
216# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
217# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
218# CONFIG_MUTEX_SPIN_ON_OWNER is not set
219CONFIG_FREEZER=y
220
221#
222# System type
223#
224CONFIG_CPU_SH4=y
225CONFIG_CPU_SH4A=y
226CONFIG_CPU_SHX3=y
227# CONFIG_CPU_SUBTYPE_SH7619 is not set
228# CONFIG_CPU_SUBTYPE_SH7201 is not set
229# CONFIG_CPU_SUBTYPE_SH7203 is not set
230# CONFIG_CPU_SUBTYPE_SH7206 is not set
231# CONFIG_CPU_SUBTYPE_SH7263 is not set
232# CONFIG_CPU_SUBTYPE_MXG is not set
233# CONFIG_CPU_SUBTYPE_SH7705 is not set
234# CONFIG_CPU_SUBTYPE_SH7706 is not set
235# CONFIG_CPU_SUBTYPE_SH7707 is not set
236# CONFIG_CPU_SUBTYPE_SH7708 is not set
237# CONFIG_CPU_SUBTYPE_SH7709 is not set
238# CONFIG_CPU_SUBTYPE_SH7710 is not set
239# CONFIG_CPU_SUBTYPE_SH7712 is not set
240# CONFIG_CPU_SUBTYPE_SH7720 is not set
241# CONFIG_CPU_SUBTYPE_SH7721 is not set
242# CONFIG_CPU_SUBTYPE_SH7750 is not set
243# CONFIG_CPU_SUBTYPE_SH7091 is not set
244# CONFIG_CPU_SUBTYPE_SH7750R is not set
245# CONFIG_CPU_SUBTYPE_SH7750S is not set
246# CONFIG_CPU_SUBTYPE_SH7751 is not set
247# CONFIG_CPU_SUBTYPE_SH7751R is not set
248# CONFIG_CPU_SUBTYPE_SH7760 is not set
249# CONFIG_CPU_SUBTYPE_SH4_202 is not set
250# CONFIG_CPU_SUBTYPE_SH7723 is not set
251# CONFIG_CPU_SUBTYPE_SH7724 is not set
252# CONFIG_CPU_SUBTYPE_SH7757 is not set
253# CONFIG_CPU_SUBTYPE_SH7763 is not set
254# CONFIG_CPU_SUBTYPE_SH7770 is not set
255# CONFIG_CPU_SUBTYPE_SH7780 is not set
256# CONFIG_CPU_SUBTYPE_SH7785 is not set
257CONFIG_CPU_SUBTYPE_SH7786=y
258# CONFIG_CPU_SUBTYPE_SHX3 is not set
259# CONFIG_CPU_SUBTYPE_SH7343 is not set
260# CONFIG_CPU_SUBTYPE_SH7722 is not set
261# CONFIG_CPU_SUBTYPE_SH7366 is not set
262
263#
264# Memory management options
265#
266CONFIG_QUICKLIST=y
267CONFIG_MMU=y
268CONFIG_PAGE_OFFSET=0x80000000
269CONFIG_FORCE_MAX_ZONEORDER=11
270CONFIG_MEMORY_START=0x60000000
271CONFIG_MEMORY_SIZE=0x20000000
272# CONFIG_29BIT is not set
273CONFIG_32BIT=y
274CONFIG_PMB=y
275# CONFIG_PMB_LEGACY is not set
276CONFIG_X2TLB=y
277CONFIG_VSYSCALL=y
278# CONFIG_NUMA is not set
279CONFIG_ARCH_FLATMEM_ENABLE=y
280CONFIG_ARCH_SPARSEMEM_ENABLE=y
281CONFIG_ARCH_SPARSEMEM_DEFAULT=y
282CONFIG_MAX_ACTIVE_REGIONS=1
283CONFIG_ARCH_POPULATES_NODE_MAP=y
284CONFIG_ARCH_SELECT_MEMORY_MODEL=y
285CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
286CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
287CONFIG_ARCH_MEMORY_PROBE=y
288CONFIG_IOREMAP_FIXED=y
289CONFIG_PAGE_SIZE_4KB=y
290# CONFIG_PAGE_SIZE_8KB is not set
291# CONFIG_PAGE_SIZE_16KB is not set
292# CONFIG_PAGE_SIZE_64KB is not set
293# CONFIG_HUGETLB_PAGE_SIZE_64K is not set
294# CONFIG_HUGETLB_PAGE_SIZE_256K is not set
295CONFIG_HUGETLB_PAGE_SIZE_1MB=y
296# CONFIG_HUGETLB_PAGE_SIZE_4MB is not set
297# CONFIG_HUGETLB_PAGE_SIZE_64MB is not set
298# CONFIG_HUGETLB_PAGE_SIZE_512MB is not set
299CONFIG_SELECT_MEMORY_MODEL=y
300# CONFIG_FLATMEM_MANUAL is not set
301# CONFIG_DISCONTIGMEM_MANUAL is not set
302CONFIG_SPARSEMEM_MANUAL=y
303CONFIG_SPARSEMEM=y
304CONFIG_HAVE_MEMORY_PRESENT=y
305CONFIG_SPARSEMEM_STATIC=y
306CONFIG_MEMORY_HOTPLUG=y
307CONFIG_MEMORY_HOTPLUG_SPARSE=y
308CONFIG_MEMORY_HOTREMOVE=y
309CONFIG_SPLIT_PTLOCK_CPUS=4
310CONFIG_MIGRATION=y
311# CONFIG_PHYS_ADDR_T_64BIT is not set
312CONFIG_ZONE_DMA_FLAG=0
313CONFIG_NR_QUICK=1
314CONFIG_KSM=y
315CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
316
317#
318# Cache configuration
319#
320CONFIG_CACHE_WRITEBACK=y
321# CONFIG_CACHE_WRITETHROUGH is not set
322# CONFIG_CACHE_OFF is not set
323
324#
325# Processor features
326#
327CONFIG_CPU_LITTLE_ENDIAN=y
328# CONFIG_CPU_BIG_ENDIAN is not set
329CONFIG_SH_FPU=y
330CONFIG_SH_STORE_QUEUES=y
331CONFIG_CPU_HAS_INTEVT=y
332CONFIG_CPU_HAS_SR_RB=y
333CONFIG_CPU_HAS_PTEAEX=y
334CONFIG_CPU_HAS_FPU=y
335
336#
337# Board support
338#
339CONFIG_SH_SDK7786=y
340# CONFIG_SH_URQUELL is not set
341
342#
343# Timer and clock configuration
344#
345CONFIG_SH_TIMER_TMU=y
346CONFIG_SH_CLK_CPG=y
347CONFIG_TICK_ONESHOT=y
348CONFIG_NO_HZ=y
349CONFIG_HIGH_RES_TIMERS=y
350CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
351
352#
353# CPU Frequency scaling
354#
355CONFIG_CPU_FREQ=y
356CONFIG_CPU_FREQ_TABLE=y
357# CONFIG_CPU_FREQ_DEBUG is not set
358CONFIG_CPU_FREQ_STAT=y
359# CONFIG_CPU_FREQ_STAT_DETAILS is not set
360CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
361# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
362# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
363# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
364# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
365CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
366CONFIG_CPU_FREQ_GOV_POWERSAVE=m
367CONFIG_CPU_FREQ_GOV_USERSPACE=m
368CONFIG_CPU_FREQ_GOV_ONDEMAND=m
369CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m
370CONFIG_SH_CPU_FREQ=y
371
372#
373# DMA support
374#
375# CONFIG_SH_DMA is not set
376
377#
378# Companion Chips
379#
380
381#
382# Additional SuperH Device Drivers
383#
384CONFIG_HEARTBEAT=y
385# CONFIG_PUSH_SWITCH is not set
386
387#
388# Kernel features
389#
390# CONFIG_HZ_100 is not set
391CONFIG_HZ_250=y
392# CONFIG_HZ_300 is not set
393# CONFIG_HZ_1000 is not set
394CONFIG_HZ=250
395CONFIG_SCHED_HRTICK=y
396CONFIG_KEXEC=y
397# CONFIG_CRASH_DUMP is not set
398CONFIG_SECCOMP=y
399# CONFIG_SMP is not set
400# CONFIG_PREEMPT_NONE is not set
401# CONFIG_PREEMPT_VOLUNTARY is not set
402CONFIG_PREEMPT=y
403CONFIG_GUSA=y
404
405#
406# Boot options
407#
408CONFIG_ZERO_PAGE_OFFSET=0x00001000
409CONFIG_BOOT_LINK_OFFSET=0x00800000
410CONFIG_ENTRY_OFFSET=0x00001000
411CONFIG_CMDLINE_OVERWRITE=y
412# CONFIG_CMDLINE_EXTEND is not set
413CONFIG_CMDLINE="console=ttySC1,115200 earlyprintk=sh-sci.1,115200 root=/dev/sda1 nmi_debug=state,debounce rootdelay=10"
414
415#
416# Bus options
417#
418CONFIG_PCI=y
419CONFIG_PCI_DOMAINS=y
420CONFIG_PCIEPORTBUS=y
421CONFIG_PCIEAER=y
422# CONFIG_PCIE_ECRC is not set
423CONFIG_PCIEAER_INJECT=y
424CONFIG_PCIEASPM=y
425CONFIG_PCIEASPM_DEBUG=y
426# CONFIG_ARCH_SUPPORTS_MSI is not set
427# CONFIG_PCI_LEGACY is not set
428CONFIG_PCI_DEBUG=y
429# CONFIG_PCI_STUB is not set
430# CONFIG_PCI_IOV is not set
431# CONFIG_PCCARD is not set
432# CONFIG_HOTPLUG_PCI is not set
433
434#
435# Executable file formats
436#
437CONFIG_BINFMT_ELF=y
438# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
439# CONFIG_HAVE_AOUT is not set
440CONFIG_BINFMT_MISC=y
441
442#
443# Power management options (EXPERIMENTAL)
444#
445CONFIG_PM=y
446CONFIG_PM_DEBUG=y
447CONFIG_PM_VERBOSE=y
448# CONFIG_HIBERNATION is not set
449CONFIG_PM_RUNTIME=y
450CONFIG_CPU_IDLE=y
451CONFIG_CPU_IDLE_GOV_LADDER=y
452CONFIG_CPU_IDLE_GOV_MENU=y
453CONFIG_NET=y
454
455#
456# Networking options
457#
458CONFIG_PACKET=y
459CONFIG_PACKET_MMAP=y
460CONFIG_UNIX=y
461CONFIG_XFRM=y
462# CONFIG_XFRM_USER is not set
463# CONFIG_XFRM_SUB_POLICY is not set
464# CONFIG_XFRM_MIGRATE is not set
465# CONFIG_XFRM_STATISTICS is not set
466CONFIG_NET_KEY=y
467# CONFIG_NET_KEY_MIGRATE is not set
468CONFIG_INET=y
469# CONFIG_IP_MULTICAST is not set
470# CONFIG_IP_ADVANCED_ROUTER is not set
471CONFIG_IP_FIB_HASH=y
472CONFIG_IP_PNP=y
473CONFIG_IP_PNP_DHCP=y
474# CONFIG_IP_PNP_BOOTP is not set
475# CONFIG_IP_PNP_RARP is not set
476# CONFIG_NET_IPIP is not set
477# CONFIG_NET_IPGRE is not set
478# CONFIG_ARPD is not set
479# CONFIG_SYN_COOKIES is not set
480# CONFIG_INET_AH is not set
481# CONFIG_INET_ESP is not set
482# CONFIG_INET_IPCOMP is not set
483# CONFIG_INET_XFRM_TUNNEL is not set
484# CONFIG_INET_TUNNEL is not set
485CONFIG_INET_XFRM_MODE_TRANSPORT=y
486CONFIG_INET_XFRM_MODE_TUNNEL=y
487CONFIG_INET_XFRM_MODE_BEET=y
488# CONFIG_INET_LRO is not set
489CONFIG_INET_DIAG=y
490CONFIG_INET_TCP_DIAG=y
491# CONFIG_TCP_CONG_ADVANCED is not set
492CONFIG_TCP_CONG_CUBIC=y
493CONFIG_DEFAULT_TCP_CONG="cubic"
494# CONFIG_TCP_MD5SIG is not set
495# CONFIG_IPV6 is not set
496# CONFIG_NETWORK_SECMARK is not set
497# CONFIG_NETFILTER is not set
498# CONFIG_IP_DCCP is not set
499# CONFIG_IP_SCTP is not set
500# CONFIG_RDS is not set
501# CONFIG_TIPC is not set
502# CONFIG_ATM is not set
503# CONFIG_BRIDGE is not set
504# CONFIG_NET_DSA is not set
505# CONFIG_VLAN_8021Q is not set
506# CONFIG_DECNET is not set
507# CONFIG_LLC2 is not set
508# CONFIG_IPX is not set
509# CONFIG_ATALK is not set
510# CONFIG_X25 is not set
511# CONFIG_LAPB is not set
512# CONFIG_ECONET is not set
513# CONFIG_WAN_ROUTER is not set
514# CONFIG_PHONET is not set
515# CONFIG_IEEE802154 is not set
516# CONFIG_NET_SCHED is not set
517# CONFIG_DCB is not set
518
519#
520# Network testing
521#
522# CONFIG_NET_PKTGEN is not set
523# CONFIG_NET_DROP_MONITOR is not set
524# CONFIG_HAMRADIO is not set
525# CONFIG_CAN is not set
526# CONFIG_IRDA is not set
527# CONFIG_BT is not set
528# CONFIG_AF_RXRPC is not set
529CONFIG_WIRELESS=y
530# CONFIG_CFG80211 is not set
531# CONFIG_LIB80211 is not set
532
533#
534# CFG80211 needs to be enabled for MAC80211
535#
536# CONFIG_WIMAX is not set
537# CONFIG_RFKILL is not set
538# CONFIG_NET_9P is not set
539
540#
541# Device Drivers
542#
543
544#
545# Generic Driver Options
546#
547CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
548# CONFIG_DEVTMPFS is not set
549CONFIG_STANDALONE=y
550CONFIG_PREVENT_FIRMWARE_BUILD=y
551# CONFIG_FW_LOADER is not set
552# CONFIG_DEBUG_DRIVER is not set
553# CONFIG_DEBUG_DEVRES is not set
554# CONFIG_SYS_HYPERVISOR is not set
555# CONFIG_CONNECTOR is not set
556# CONFIG_MTD is not set
557# CONFIG_PARPORT is not set
558CONFIG_BLK_DEV=y
559# CONFIG_BLK_CPQ_CISS_DA is not set
560# CONFIG_BLK_DEV_DAC960 is not set
561# CONFIG_BLK_DEV_UMEM is not set
562# CONFIG_BLK_DEV_COW_COMMON is not set
563# CONFIG_BLK_DEV_LOOP is not set
564
565#
566# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
567#
568# CONFIG_BLK_DEV_NBD is not set
569# CONFIG_BLK_DEV_SX8 is not set
570# CONFIG_BLK_DEV_UB is not set
571CONFIG_BLK_DEV_RAM=y
572CONFIG_BLK_DEV_RAM_COUNT=16
573CONFIG_BLK_DEV_RAM_SIZE=4096
574# CONFIG_BLK_DEV_XIP is not set
575# CONFIG_CDROM_PKTCDVD is not set
576# CONFIG_ATA_OVER_ETH is not set
577# CONFIG_BLK_DEV_HD is not set
578CONFIG_MISC_DEVICES=y
579# CONFIG_AD525X_DPOT is not set
580# CONFIG_PHANTOM is not set
581# CONFIG_SGI_IOC4 is not set
582# CONFIG_TIFM_CORE is not set
583# CONFIG_ICS932S401 is not set
584# CONFIG_ENCLOSURE_SERVICES is not set
585# CONFIG_HP_ILO is not set
586# CONFIG_ISL29003 is not set
587# CONFIG_DS1682 is not set
588# CONFIG_TI_DAC7512 is not set
589# CONFIG_C2PORT is not set
590
591#
592# EEPROM support
593#
594# CONFIG_EEPROM_AT24 is not set
595# CONFIG_EEPROM_AT25 is not set
596# CONFIG_EEPROM_LEGACY is not set
597# CONFIG_EEPROM_MAX6875 is not set
598# CONFIG_EEPROM_93CX6 is not set
599# CONFIG_CB710_CORE is not set
600CONFIG_HAVE_IDE=y
601# CONFIG_IDE is not set
602
603#
604# SCSI device support
605#
606# CONFIG_RAID_ATTRS is not set
607CONFIG_SCSI=y
608CONFIG_SCSI_DMA=y
609# CONFIG_SCSI_TGT is not set
610# CONFIG_SCSI_NETLINK is not set
611CONFIG_SCSI_PROC_FS=y
612
613#
614# SCSI support type (disk, tape, CD-ROM)
615#
616CONFIG_BLK_DEV_SD=y
617# CONFIG_CHR_DEV_ST is not set
618# CONFIG_CHR_DEV_OSST is not set
619# CONFIG_BLK_DEV_SR is not set
620# CONFIG_CHR_DEV_SG is not set
621# CONFIG_CHR_DEV_SCH is not set
622# CONFIG_SCSI_MULTI_LUN is not set
623# CONFIG_SCSI_CONSTANTS is not set
624# CONFIG_SCSI_LOGGING is not set
625# CONFIG_SCSI_SCAN_ASYNC is not set
626CONFIG_SCSI_WAIT_SCAN=m
627
628#
629# SCSI Transports
630#
631# CONFIG_SCSI_SPI_ATTRS is not set
632# CONFIG_SCSI_FC_ATTRS is not set
633# CONFIG_SCSI_ISCSI_ATTRS is not set
634# CONFIG_SCSI_SAS_LIBSAS is not set
635# CONFIG_SCSI_SRP_ATTRS is not set
636CONFIG_SCSI_LOWLEVEL=y
637# CONFIG_ISCSI_TCP is not set
638# CONFIG_SCSI_BNX2_ISCSI is not set
639# CONFIG_BE2ISCSI is not set
640# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
641# CONFIG_SCSI_HPSA is not set
642# CONFIG_SCSI_3W_9XXX is not set
643# CONFIG_SCSI_3W_SAS is not set
644# CONFIG_SCSI_ACARD is not set
645# CONFIG_SCSI_AACRAID is not set
646# CONFIG_SCSI_AIC7XXX is not set
647# CONFIG_SCSI_AIC7XXX_OLD is not set
648# CONFIG_SCSI_AIC79XX is not set
649# CONFIG_SCSI_AIC94XX is not set
650# CONFIG_SCSI_MVSAS is not set
651# CONFIG_SCSI_ARCMSR is not set
652# CONFIG_MEGARAID_NEWGEN is not set
653# CONFIG_MEGARAID_LEGACY is not set
654# CONFIG_MEGARAID_SAS is not set
655# CONFIG_SCSI_MPT2SAS is not set
656# CONFIG_SCSI_HPTIOP is not set
657# CONFIG_LIBFC is not set
658# CONFIG_LIBFCOE is not set
659# CONFIG_FCOE is not set
660# CONFIG_SCSI_DMX3191D is not set
661# CONFIG_SCSI_FUTURE_DOMAIN is not set
662# CONFIG_SCSI_IPS is not set
663# CONFIG_SCSI_INITIO is not set
664# CONFIG_SCSI_INIA100 is not set
665# CONFIG_SCSI_STEX is not set
666# CONFIG_SCSI_SYM53C8XX_2 is not set
667# CONFIG_SCSI_IPR is not set
668# CONFIG_SCSI_QLOGIC_1280 is not set
669# CONFIG_SCSI_QLA_FC is not set
670# CONFIG_SCSI_QLA_ISCSI is not set
671# CONFIG_SCSI_LPFC is not set
672# CONFIG_SCSI_DC395x is not set
673# CONFIG_SCSI_DC390T is not set
674# CONFIG_SCSI_NSP32 is not set
675# CONFIG_SCSI_DEBUG is not set
676# CONFIG_SCSI_PMCRAID is not set
677# CONFIG_SCSI_PM8001 is not set
678# CONFIG_SCSI_SRP is not set
679# CONFIG_SCSI_BFA_FC is not set
680# CONFIG_SCSI_DH is not set
681# CONFIG_SCSI_OSD_INITIATOR is not set
682CONFIG_ATA=y
683# CONFIG_ATA_NONSTANDARD is not set
684CONFIG_ATA_VERBOSE_ERROR=y
685CONFIG_SATA_PMP=y
686# CONFIG_SATA_AHCI is not set
687CONFIG_SATA_SIL24=y
688CONFIG_ATA_SFF=y
689# CONFIG_SATA_SVW is not set
690# CONFIG_ATA_PIIX is not set
691# CONFIG_SATA_MV is not set
692# CONFIG_SATA_NV is not set
693# CONFIG_PDC_ADMA is not set
694# CONFIG_SATA_QSTOR is not set
695# CONFIG_SATA_PROMISE is not set
696# CONFIG_SATA_SX4 is not set
697# CONFIG_SATA_SIL is not set
698# CONFIG_SATA_SIS is not set
699# CONFIG_SATA_ULI is not set
700# CONFIG_SATA_VIA is not set
701# CONFIG_SATA_VITESSE is not set
702# CONFIG_SATA_INIC162X is not set
703# CONFIG_PATA_ALI is not set
704# CONFIG_PATA_AMD is not set
705# CONFIG_PATA_ARTOP is not set
706# CONFIG_PATA_ATP867X is not set
707# CONFIG_PATA_ATIIXP is not set
708# CONFIG_PATA_CMD640_PCI is not set
709# CONFIG_PATA_CMD64X is not set
710# CONFIG_PATA_CS5520 is not set
711# CONFIG_PATA_CS5530 is not set
712# CONFIG_PATA_CYPRESS is not set
713# CONFIG_PATA_EFAR is not set
714# CONFIG_ATA_GENERIC is not set
715# CONFIG_PATA_HPT366 is not set
716# CONFIG_PATA_HPT37X is not set
717# CONFIG_PATA_HPT3X2N is not set
718# CONFIG_PATA_HPT3X3 is not set
719# CONFIG_PATA_IT821X is not set
720# CONFIG_PATA_IT8213 is not set
721# CONFIG_PATA_JMICRON is not set
722# CONFIG_PATA_TRIFLEX is not set
723# CONFIG_PATA_MARVELL is not set
724# CONFIG_PATA_MPIIX is not set
725# CONFIG_PATA_OLDPIIX is not set
726# CONFIG_PATA_NETCELL is not set
727# CONFIG_PATA_NINJA32 is not set
728# CONFIG_PATA_NS87410 is not set
729# CONFIG_PATA_NS87415 is not set
730# CONFIG_PATA_OPTI is not set
731# CONFIG_PATA_OPTIDMA is not set
732# CONFIG_PATA_PDC2027X is not set
733# CONFIG_PATA_PDC_OLD is not set
734# CONFIG_PATA_RADISYS is not set
735# CONFIG_PATA_RDC is not set
736# CONFIG_PATA_RZ1000 is not set
737# CONFIG_PATA_SC1200 is not set
738# CONFIG_PATA_SERVERWORKS is not set
739# CONFIG_PATA_SIL680 is not set
740# CONFIG_PATA_SIS is not set
741# CONFIG_PATA_TOSHIBA is not set
742# CONFIG_PATA_VIA is not set
743# CONFIG_PATA_WINBOND is not set
744CONFIG_PATA_PLATFORM=y
745# CONFIG_PATA_SCH is not set
746# CONFIG_MD is not set
747# CONFIG_FUSION is not set
748
749#
750# IEEE 1394 (FireWire) support
751#
752
753#
754# You can enable one or both FireWire driver stacks.
755#
756
757#
758# The newer stack is recommended.
759#
760# CONFIG_FIREWIRE is not set
761# CONFIG_IEEE1394 is not set
762# CONFIG_I2O is not set
763CONFIG_NETDEVICES=y
764# CONFIG_DUMMY is not set
765# CONFIG_BONDING is not set
766# CONFIG_MACVLAN is not set
767# CONFIG_EQUALIZER is not set
768# CONFIG_TUN is not set
769# CONFIG_VETH is not set
770# CONFIG_ARCNET is not set
771CONFIG_PHYLIB=y
772
773#
774# MII PHY device drivers
775#
776# CONFIG_MARVELL_PHY is not set
777# CONFIG_DAVICOM_PHY is not set
778# CONFIG_QSEMI_PHY is not set
779# CONFIG_LXT_PHY is not set
780# CONFIG_CICADA_PHY is not set
781# CONFIG_VITESSE_PHY is not set
782# CONFIG_SMSC_PHY is not set
783# CONFIG_BROADCOM_PHY is not set
784# CONFIG_ICPLUS_PHY is not set
785# CONFIG_REALTEK_PHY is not set
786# CONFIG_NATIONAL_PHY is not set
787# CONFIG_STE10XP is not set
788# CONFIG_LSI_ET1011C_PHY is not set
789# CONFIG_FIXED_PHY is not set
790CONFIG_MDIO_BITBANG=y
791CONFIG_NET_ETHERNET=y
792CONFIG_MII=y
793# CONFIG_AX88796 is not set
794# CONFIG_STNIC is not set
795# CONFIG_HAPPYMEAL is not set
796# CONFIG_SUNGEM is not set
797# CONFIG_CASSINI is not set
798# CONFIG_NET_VENDOR_3COM is not set
799CONFIG_SMC91X=y
800# CONFIG_ENC28J60 is not set
801# CONFIG_ETHOC is not set
802# CONFIG_SMC911X is not set
803CONFIG_SMSC911X=y
804# CONFIG_DNET is not set
805# CONFIG_NET_TULIP is not set
806# CONFIG_HP100 is not set
807# CONFIG_IBM_NEW_EMAC_ZMII is not set
808# CONFIG_IBM_NEW_EMAC_RGMII is not set
809# CONFIG_IBM_NEW_EMAC_TAH is not set
810# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
811# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
812# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
813# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
814# CONFIG_NET_PCI is not set
815# CONFIG_B44 is not set
816# CONFIG_KS8842 is not set
817# CONFIG_KS8851 is not set
818# CONFIG_KS8851_MLL is not set
819# CONFIG_ATL2 is not set
820# CONFIG_NETDEV_1000 is not set
821# CONFIG_NETDEV_10000 is not set
822# CONFIG_TR is not set
823CONFIG_WLAN=y
824# CONFIG_ATMEL is not set
825# CONFIG_PRISM54 is not set
826# CONFIG_USB_ZD1201 is not set
827# CONFIG_HOSTAP is not set
828
829#
830# Enable WiMAX (Networking options) to see the WiMAX drivers
831#
832
833#
834# USB Network Adapters
835#
836# CONFIG_USB_CATC is not set
837# CONFIG_USB_KAWETH is not set
838# CONFIG_USB_PEGASUS is not set
839# CONFIG_USB_RTL8150 is not set
840# CONFIG_USB_USBNET is not set
841# CONFIG_WAN is not set
842# CONFIG_FDDI is not set
843# CONFIG_HIPPI is not set
844# CONFIG_PPP is not set
845# CONFIG_SLIP is not set
846# CONFIG_NET_FC is not set
847# CONFIG_NETCONSOLE is not set
848# CONFIG_NETPOLL is not set
849# CONFIG_NET_POLL_CONTROLLER is not set
850# CONFIG_VMXNET3 is not set
851# CONFIG_ISDN is not set
852# CONFIG_PHONE is not set
853
854#
855# Input device support
856#
857CONFIG_INPUT=y
858# CONFIG_INPUT_FF_MEMLESS is not set
859# CONFIG_INPUT_POLLDEV is not set
860# CONFIG_INPUT_SPARSEKMAP is not set
861
862#
863# Userland interfaces
864#
865CONFIG_INPUT_MOUSEDEV=y
866CONFIG_INPUT_MOUSEDEV_PSAUX=y
867CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
868CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
869# CONFIG_INPUT_JOYDEV is not set
870# CONFIG_INPUT_EVDEV is not set
871# CONFIG_INPUT_EVBUG is not set
872
873#
874# Input Device Drivers
875#
876CONFIG_INPUT_KEYBOARD=y
877# CONFIG_KEYBOARD_ADP5588 is not set
878CONFIG_KEYBOARD_ATKBD=y
879# CONFIG_QT2160 is not set
880# CONFIG_KEYBOARD_LKKBD is not set
881# CONFIG_KEYBOARD_MAX7359 is not set
882# CONFIG_KEYBOARD_NEWTON is not set
883# CONFIG_KEYBOARD_OPENCORES is not set
884# CONFIG_KEYBOARD_STOWAWAY is not set
885# CONFIG_KEYBOARD_SUNKBD is not set
886# CONFIG_KEYBOARD_SH_KEYSC is not set
887# CONFIG_KEYBOARD_XTKBD is not set
888CONFIG_INPUT_MOUSE=y
889CONFIG_MOUSE_PS2=y
890CONFIG_MOUSE_PS2_ALPS=y
891CONFIG_MOUSE_PS2_LOGIPS2PP=y
892CONFIG_MOUSE_PS2_SYNAPTICS=y
893CONFIG_MOUSE_PS2_TRACKPOINT=y
894# CONFIG_MOUSE_PS2_ELANTECH is not set
895# CONFIG_MOUSE_PS2_SENTELIC is not set
896# CONFIG_MOUSE_PS2_TOUCHKIT is not set
897# CONFIG_MOUSE_SERIAL is not set
898# CONFIG_MOUSE_APPLETOUCH is not set
899# CONFIG_MOUSE_BCM5974 is not set
900# CONFIG_MOUSE_VSXXXAA is not set
901# CONFIG_MOUSE_SYNAPTICS_I2C is not set
902# CONFIG_INPUT_JOYSTICK is not set
903# CONFIG_INPUT_TABLET is not set
904# CONFIG_INPUT_TOUCHSCREEN is not set
905# CONFIG_INPUT_MISC is not set
906
907#
908# Hardware I/O ports
909#
910CONFIG_SERIO=y
911CONFIG_SERIO_I8042=y
912CONFIG_SERIO_SERPORT=y
913# CONFIG_SERIO_PCIPS2 is not set
914CONFIG_SERIO_LIBPS2=y
915# CONFIG_SERIO_RAW is not set
916# CONFIG_SERIO_ALTERA_PS2 is not set
917# CONFIG_GAMEPORT is not set
918
919#
920# Character devices
921#
922CONFIG_VT=y
923CONFIG_CONSOLE_TRANSLATIONS=y
924CONFIG_VT_CONSOLE=y
925CONFIG_HW_CONSOLE=y
926# CONFIG_VT_HW_CONSOLE_BINDING is not set
927CONFIG_DEVKMEM=y
928# CONFIG_SERIAL_NONSTANDARD is not set
929# CONFIG_NOZOMI is not set
930
931#
932# Serial drivers
933#
934# CONFIG_SERIAL_8250 is not set
935
936#
937# Non-8250 serial port support
938#
939# CONFIG_SERIAL_MAX3100 is not set
940CONFIG_SERIAL_SH_SCI=y
941CONFIG_SERIAL_SH_SCI_NR_UARTS=6
942CONFIG_SERIAL_SH_SCI_CONSOLE=y
943CONFIG_SERIAL_CORE=y
944CONFIG_SERIAL_CORE_CONSOLE=y
945# CONFIG_SERIAL_JSM is not set
946CONFIG_UNIX98_PTYS=y
947# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
948# CONFIG_LEGACY_PTYS is not set
949# CONFIG_IPMI_HANDLER is not set
950# CONFIG_HW_RANDOM is not set
951# CONFIG_R3964 is not set
952# CONFIG_APPLICOM is not set
953# CONFIG_RAW_DRIVER is not set
954# CONFIG_TCG_TPM is not set
955CONFIG_DEVPORT=y
956CONFIG_I2C=y
957CONFIG_I2C_BOARDINFO=y
958# CONFIG_I2C_COMPAT is not set
959CONFIG_I2C_CHARDEV=y
960CONFIG_I2C_HELPER_AUTO=y
961
962#
963# I2C Hardware Bus support
964#
965
966#
967# PC SMBus host controller drivers
968#
969# CONFIG_I2C_ALI1535 is not set
970# CONFIG_I2C_ALI1563 is not set
971# CONFIG_I2C_ALI15X3 is not set
972# CONFIG_I2C_AMD756 is not set
973# CONFIG_I2C_AMD8111 is not set
974# CONFIG_I2C_I801 is not set
975# CONFIG_I2C_ISCH is not set
976# CONFIG_I2C_PIIX4 is not set
977# CONFIG_I2C_NFORCE2 is not set
978# CONFIG_I2C_SIS5595 is not set
979# CONFIG_I2C_SIS630 is not set
980# CONFIG_I2C_SIS96X is not set
981# CONFIG_I2C_VIA is not set
982# CONFIG_I2C_VIAPRO is not set
983
984#
985# I2C system bus drivers (mostly embedded / system-on-chip)
986#
987# CONFIG_I2C_DESIGNWARE is not set
988# CONFIG_I2C_OCORES is not set
989# CONFIG_I2C_SH_MOBILE is not set
990# CONFIG_I2C_SIMTEC is not set
991
992#
993# External I2C/SMBus adapter drivers
994#
995# CONFIG_I2C_PARPORT_LIGHT is not set
996# CONFIG_I2C_TAOS_EVM is not set
997# CONFIG_I2C_TINY_USB is not set
998
999#
1000# Other I2C/SMBus bus drivers
1001#
1002# CONFIG_I2C_PCA_PLATFORM is not set
1003# CONFIG_I2C_STUB is not set
1004
1005#
1006# Miscellaneous I2C Chip support
1007#
1008# CONFIG_SENSORS_TSL2550 is not set
1009# CONFIG_I2C_DEBUG_CORE is not set
1010# CONFIG_I2C_DEBUG_ALGO is not set
1011# CONFIG_I2C_DEBUG_BUS is not set
1012# CONFIG_I2C_DEBUG_CHIP is not set
1013CONFIG_SPI=y
1014# CONFIG_SPI_DEBUG is not set
1015CONFIG_SPI_MASTER=y
1016
1017#
1018# SPI Master Controller Drivers
1019#
1020# CONFIG_SPI_BITBANG is not set
1021# CONFIG_SPI_SH_MSIOF is not set
1022# CONFIG_SPI_SH_SCI is not set
1023# CONFIG_SPI_XILINX is not set
1024# CONFIG_SPI_DESIGNWARE is not set
1025
1026#
1027# SPI Protocol Masters
1028#
1029# CONFIG_SPI_SPIDEV is not set
1030# CONFIG_SPI_TLE62X0 is not set
1031
1032#
1033# PPS support
1034#
1035# CONFIG_PPS is not set
1036# CONFIG_W1 is not set
1037# CONFIG_POWER_SUPPLY is not set
1038# CONFIG_HWMON is not set
1039# CONFIG_THERMAL is not set
1040CONFIG_WATCHDOG=y
1041# CONFIG_WATCHDOG_NOWAYOUT is not set
1042
1043#
1044# Watchdog Device Drivers
1045#
1046# CONFIG_SOFT_WATCHDOG is not set
1047# CONFIG_ALIM7101_WDT is not set
1048# CONFIG_SH_WDT is not set
1049
1050#
1051# PCI-based Watchdog Cards
1052#
1053# CONFIG_PCIPCWATCHDOG is not set
1054# CONFIG_WDTPCI is not set
1055
1056#
1057# USB-based Watchdog Cards
1058#
1059# CONFIG_USBPCWATCHDOG is not set
1060CONFIG_SSB_POSSIBLE=y
1061
1062#
1063# Sonics Silicon Backplane
1064#
1065# CONFIG_SSB is not set
1066
1067#
1068# Multifunction device drivers
1069#
1070# CONFIG_MFD_CORE is not set
1071# CONFIG_MFD_SM501 is not set
1072# CONFIG_MFD_SH_MOBILE_SDHI is not set
1073# CONFIG_HTC_PASIC3 is not set
1074# CONFIG_TWL4030_CORE is not set
1075# CONFIG_MFD_TMIO is not set
1076# CONFIG_PMIC_DA903X is not set
1077# CONFIG_PMIC_ADP5520 is not set
1078# CONFIG_MFD_WM8400 is not set
1079# CONFIG_MFD_WM831X is not set
1080# CONFIG_MFD_WM8350_I2C is not set
1081# CONFIG_MFD_PCF50633 is not set
1082# CONFIG_MFD_MC13783 is not set
1083# CONFIG_AB3100_CORE is not set
1084# CONFIG_EZX_PCAP is not set
1085# CONFIG_MFD_88PM8607 is not set
1086# CONFIG_AB4500_CORE is not set
1087# CONFIG_REGULATOR is not set
1088# CONFIG_MEDIA_SUPPORT is not set
1089
1090#
1091# Graphics support
1092#
1093CONFIG_VGA_ARB=y
1094# CONFIG_DRM is not set
1095# CONFIG_VGASTATE is not set
1096CONFIG_VIDEO_OUTPUT_CONTROL=m
1097# CONFIG_FB is not set
1098# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
1099
1100#
1101# Display device support
1102#
1103# CONFIG_DISPLAY_SUPPORT is not set
1104
1105#
1106# Console display driver support
1107#
1108CONFIG_DUMMY_CONSOLE=y
1109# CONFIG_SOUND is not set
1110CONFIG_HID_SUPPORT=y
1111CONFIG_HID=y
1112# CONFIG_HIDRAW is not set
1113
1114#
1115# USB Input Devices
1116#
1117CONFIG_USB_HID=y
1118# CONFIG_HID_PID is not set
1119# CONFIG_USB_HIDDEV is not set
1120
1121#
1122# Special HID drivers
1123#
1124# CONFIG_HID_A4TECH is not set
1125# CONFIG_HID_APPLE is not set
1126# CONFIG_HID_BELKIN is not set
1127# CONFIG_HID_CHERRY is not set
1128# CONFIG_HID_CHICONY is not set
1129# CONFIG_HID_CYPRESS is not set
1130# CONFIG_HID_DRAGONRISE is not set
1131# CONFIG_HID_EZKEY is not set
1132# CONFIG_HID_KYE is not set
1133# CONFIG_HID_GYRATION is not set
1134# CONFIG_HID_TWINHAN is not set
1135# CONFIG_HID_KENSINGTON is not set
1136# CONFIG_HID_LOGITECH is not set
1137# CONFIG_HID_MICROSOFT is not set
1138# CONFIG_HID_MONTEREY is not set
1139# CONFIG_HID_NTRIG is not set
1140# CONFIG_HID_PANTHERLORD is not set
1141# CONFIG_HID_PETALYNX is not set
1142# CONFIG_HID_SAMSUNG is not set
1143# CONFIG_HID_SONY is not set
1144# CONFIG_HID_SUNPLUS is not set
1145# CONFIG_HID_GREENASIA is not set
1146# CONFIG_HID_SMARTJOYPLUS is not set
1147# CONFIG_HID_TOPSEED is not set
1148# CONFIG_HID_THRUSTMASTER is not set
1149# CONFIG_HID_ZEROPLUS is not set
1150CONFIG_USB_SUPPORT=y
1151CONFIG_USB_ARCH_HAS_HCD=y
1152CONFIG_USB_ARCH_HAS_OHCI=y
1153CONFIG_USB_ARCH_HAS_EHCI=y
1154CONFIG_USB=y
1155# CONFIG_USB_DEBUG is not set
1156# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
1157
1158#
1159# Miscellaneous USB options
1160#
1161# CONFIG_USB_DEVICEFS is not set
1162CONFIG_USB_DEVICE_CLASS=y
1163# CONFIG_USB_DYNAMIC_MINORS is not set
1164# CONFIG_USB_SUSPEND is not set
1165# CONFIG_USB_OTG is not set
1166# CONFIG_USB_OTG_WHITELIST is not set
1167# CONFIG_USB_OTG_BLACKLIST_HUB is not set
1168CONFIG_USB_MON=y
1169# CONFIG_USB_WUSB is not set
1170# CONFIG_USB_WUSB_CBAF is not set
1171
1172#
1173# USB Host Controller Drivers
1174#
1175# CONFIG_USB_C67X00_HCD is not set
1176# CONFIG_USB_XHCI_HCD is not set
1177# CONFIG_USB_EHCI_HCD is not set
1178# CONFIG_USB_OXU210HP_HCD is not set
1179# CONFIG_USB_ISP116X_HCD is not set
1180# CONFIG_USB_ISP1760_HCD is not set
1181# CONFIG_USB_ISP1362_HCD is not set
1182CONFIG_USB_OHCI_HCD=y
1183# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
1184# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
1185CONFIG_USB_OHCI_LITTLE_ENDIAN=y
1186# CONFIG_USB_UHCI_HCD is not set
1187# CONFIG_USB_SL811_HCD is not set
1188# CONFIG_USB_R8A66597_HCD is not set
1189# CONFIG_USB_WHCI_HCD is not set
1190# CONFIG_USB_HWA_HCD is not set
1191# CONFIG_USB_GADGET_MUSB_HDRC is not set
1192
1193#
1194# USB Device Class drivers
1195#
1196# CONFIG_USB_ACM is not set
1197# CONFIG_USB_PRINTER is not set
1198# CONFIG_USB_WDM is not set
1199# CONFIG_USB_TMC is not set
1200
1201#
1202# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
1203#
1204
1205#
1206# also be needed; see USB_STORAGE Help for more info
1207#
1208CONFIG_USB_STORAGE=y
1209# CONFIG_USB_STORAGE_DEBUG is not set
1210# CONFIG_USB_STORAGE_DATAFAB is not set
1211# CONFIG_USB_STORAGE_FREECOM is not set
1212# CONFIG_USB_STORAGE_ISD200 is not set
1213# CONFIG_USB_STORAGE_USBAT is not set
1214# CONFIG_USB_STORAGE_SDDR09 is not set
1215# CONFIG_USB_STORAGE_SDDR55 is not set
1216# CONFIG_USB_STORAGE_JUMPSHOT is not set
1217# CONFIG_USB_STORAGE_ALAUDA is not set
1218# CONFIG_USB_STORAGE_ONETOUCH is not set
1219# CONFIG_USB_STORAGE_KARMA is not set
1220# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
1221# CONFIG_USB_LIBUSUAL is not set
1222
1223#
1224# USB Imaging devices
1225#
1226# CONFIG_USB_MDC800 is not set
1227# CONFIG_USB_MICROTEK is not set
1228
1229#
1230# USB port drivers
1231#
1232# CONFIG_USB_SERIAL is not set
1233
1234#
1235# USB Miscellaneous drivers
1236#
1237# CONFIG_USB_EMI62 is not set
1238# CONFIG_USB_EMI26 is not set
1239# CONFIG_USB_ADUTUX is not set
1240# CONFIG_USB_SEVSEG is not set
1241# CONFIG_USB_RIO500 is not set
1242# CONFIG_USB_LEGOTOWER is not set
1243# CONFIG_USB_LCD is not set
1244# CONFIG_USB_BERRY_CHARGE is not set
1245# CONFIG_USB_LED is not set
1246# CONFIG_USB_CYPRESS_CY7C63 is not set
1247# CONFIG_USB_CYTHERM is not set
1248# CONFIG_USB_IDMOUSE is not set
1249# CONFIG_USB_FTDI_ELAN is not set
1250# CONFIG_USB_APPLEDISPLAY is not set
1251# CONFIG_USB_LD is not set
1252# CONFIG_USB_TRANCEVIBRATOR is not set
1253# CONFIG_USB_IOWARRIOR is not set
1254# CONFIG_USB_TEST is not set
1255# CONFIG_USB_ISIGHTFW is not set
1256# CONFIG_USB_VST is not set
1257CONFIG_USB_GADGET=y
1258# CONFIG_USB_GADGET_DEBUG is not set
1259# CONFIG_USB_GADGET_DEBUG_FILES is not set
1260# CONFIG_USB_GADGET_DEBUG_FS is not set
1261CONFIG_USB_GADGET_VBUS_DRAW=2
1262CONFIG_USB_GADGET_SELECTED=y
1263# CONFIG_USB_GADGET_AT91 is not set
1264# CONFIG_USB_GADGET_ATMEL_USBA is not set
1265# CONFIG_USB_GADGET_FSL_USB2 is not set
1266# CONFIG_USB_GADGET_LH7A40X is not set
1267# CONFIG_USB_GADGET_OMAP is not set
1268# CONFIG_USB_GADGET_PXA25X is not set
1269# CONFIG_USB_GADGET_R8A66597 is not set
1270# CONFIG_USB_GADGET_PXA27X is not set
1271# CONFIG_USB_GADGET_S3C_HSOTG is not set
1272# CONFIG_USB_GADGET_IMX is not set
1273# CONFIG_USB_GADGET_S3C2410 is not set
1274CONFIG_USB_GADGET_M66592=y
1275CONFIG_USB_M66592=y
1276# CONFIG_USB_GADGET_AMD5536UDC is not set
1277# CONFIG_USB_GADGET_FSL_QE is not set
1278# CONFIG_USB_GADGET_CI13XXX is not set
1279# CONFIG_USB_GADGET_NET2280 is not set
1280# CONFIG_USB_GADGET_GOKU is not set
1281# CONFIG_USB_GADGET_LANGWELL is not set
1282# CONFIG_USB_GADGET_DUMMY_HCD is not set
1283CONFIG_USB_GADGET_DUALSPEED=y
1284# CONFIG_USB_ZERO is not set
1285# CONFIG_USB_AUDIO is not set
1286# CONFIG_USB_ETH is not set
1287# CONFIG_USB_GADGETFS is not set
1288# CONFIG_USB_FILE_STORAGE is not set
1289# CONFIG_USB_MASS_STORAGE is not set
1290# CONFIG_USB_G_SERIAL is not set
1291# CONFIG_USB_MIDI_GADGET is not set
1292# CONFIG_USB_G_PRINTER is not set
1293# CONFIG_USB_CDC_COMPOSITE is not set
1294# CONFIG_USB_G_MULTI is not set
1295
1296#
1297# OTG and related infrastructure
1298#
1299# CONFIG_NOP_USB_XCEIV is not set
1300# CONFIG_UWB is not set
1301# CONFIG_MMC is not set
1302# CONFIG_MEMSTICK is not set
1303# CONFIG_NEW_LEDS is not set
1304# CONFIG_ACCESSIBILITY is not set
1305# CONFIG_INFINIBAND is not set
1306CONFIG_RTC_LIB=y
1307CONFIG_RTC_CLASS=y
1308CONFIG_RTC_HCTOSYS=y
1309CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
1310# CONFIG_RTC_DEBUG is not set
1311
1312#
1313# RTC interfaces
1314#
1315CONFIG_RTC_INTF_SYSFS=y
1316CONFIG_RTC_INTF_PROC=y
1317CONFIG_RTC_INTF_DEV=y
1318# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
1319# CONFIG_RTC_DRV_TEST is not set
1320
1321#
1322# I2C RTC drivers
1323#
1324# CONFIG_RTC_DRV_DS1307 is not set
1325# CONFIG_RTC_DRV_DS1374 is not set
1326# CONFIG_RTC_DRV_DS1672 is not set
1327CONFIG_RTC_DRV_MAX6900=y
1328# CONFIG_RTC_DRV_RS5C372 is not set
1329# CONFIG_RTC_DRV_ISL1208 is not set
1330# CONFIG_RTC_DRV_X1205 is not set
1331# CONFIG_RTC_DRV_PCF8563 is not set
1332# CONFIG_RTC_DRV_PCF8583 is not set
1333# CONFIG_RTC_DRV_M41T80 is not set
1334# CONFIG_RTC_DRV_BQ32K is not set
1335# CONFIG_RTC_DRV_S35390A is not set
1336# CONFIG_RTC_DRV_FM3130 is not set
1337# CONFIG_RTC_DRV_RX8581 is not set
1338# CONFIG_RTC_DRV_RX8025 is not set
1339
1340#
1341# SPI RTC drivers
1342#
1343# CONFIG_RTC_DRV_M41T94 is not set
1344# CONFIG_RTC_DRV_DS1305 is not set
1345# CONFIG_RTC_DRV_DS1390 is not set
1346# CONFIG_RTC_DRV_MAX6902 is not set
1347# CONFIG_RTC_DRV_R9701 is not set
1348# CONFIG_RTC_DRV_RS5C348 is not set
1349# CONFIG_RTC_DRV_DS3234 is not set
1350# CONFIG_RTC_DRV_PCF2123 is not set
1351
1352#
1353# Platform RTC drivers
1354#
1355# CONFIG_RTC_DRV_DS1286 is not set
1356# CONFIG_RTC_DRV_DS1511 is not set
1357# CONFIG_RTC_DRV_DS1553 is not set
1358# CONFIG_RTC_DRV_DS1742 is not set
1359# CONFIG_RTC_DRV_STK17TA8 is not set
1360# CONFIG_RTC_DRV_M48T86 is not set
1361# CONFIG_RTC_DRV_M48T35 is not set
1362# CONFIG_RTC_DRV_M48T59 is not set
1363# CONFIG_RTC_DRV_MSM6242 is not set
1364# CONFIG_RTC_DRV_BQ4802 is not set
1365# CONFIG_RTC_DRV_RP5C01 is not set
1366# CONFIG_RTC_DRV_V3020 is not set
1367
1368#
1369# on-CPU RTC drivers
1370#
1371CONFIG_RTC_DRV_SH=y
1372# CONFIG_RTC_DRV_GENERIC is not set
1373# CONFIG_DMADEVICES is not set
1374# CONFIG_AUXDISPLAY is not set
1375CONFIG_UIO=m
1376# CONFIG_UIO_CIF is not set
1377# CONFIG_UIO_PDRV is not set
1378# CONFIG_UIO_PDRV_GENIRQ is not set
1379# CONFIG_UIO_SMX is not set
1380# CONFIG_UIO_AEC is not set
1381# CONFIG_UIO_SERCOS3 is not set
1382# CONFIG_UIO_PCI_GENERIC is not set
1383
1384#
1385# TI VLYNQ
1386#
1387# CONFIG_STAGING is not set
1388
1389#
1390# File systems
1391#
1392CONFIG_EXT2_FS=y
1393# CONFIG_EXT2_FS_XATTR is not set
1394# CONFIG_EXT2_FS_XIP is not set
1395CONFIG_EXT3_FS=y
1396# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
1397CONFIG_EXT3_FS_XATTR=y
1398# CONFIG_EXT3_FS_POSIX_ACL is not set
1399# CONFIG_EXT3_FS_SECURITY is not set
1400# CONFIG_EXT4_FS is not set
1401CONFIG_JBD=y
1402# CONFIG_JBD_DEBUG is not set
1403CONFIG_FS_MBCACHE=y
1404# CONFIG_REISERFS_FS is not set
1405# CONFIG_JFS_FS is not set
1406# CONFIG_FS_POSIX_ACL is not set
1407# CONFIG_XFS_FS is not set
1408# CONFIG_OCFS2_FS is not set
1409# CONFIG_BTRFS_FS is not set
1410# CONFIG_NILFS2_FS is not set
1411CONFIG_FILE_LOCKING=y
1412CONFIG_FSNOTIFY=y
1413CONFIG_DNOTIFY=y
1414CONFIG_INOTIFY=y
1415CONFIG_INOTIFY_USER=y
1416# CONFIG_QUOTA is not set
1417# CONFIG_AUTOFS_FS is not set
1418# CONFIG_AUTOFS4_FS is not set
1419# CONFIG_FUSE_FS is not set
1420
1421#
1422# Caches
1423#
1424# CONFIG_FSCACHE is not set
1425
1426#
1427# CD-ROM/DVD Filesystems
1428#
1429# CONFIG_ISO9660_FS is not set
1430# CONFIG_UDF_FS is not set
1431
1432#
1433# DOS/FAT/NT Filesystems
1434#
1435# CONFIG_MSDOS_FS is not set
1436# CONFIG_VFAT_FS is not set
1437# CONFIG_NTFS_FS is not set
1438
1439#
1440# Pseudo filesystems
1441#
1442CONFIG_PROC_FS=y
1443CONFIG_PROC_KCORE=y
1444CONFIG_PROC_SYSCTL=y
1445CONFIG_PROC_PAGE_MONITOR=y
1446CONFIG_SYSFS=y
1447CONFIG_TMPFS=y
1448# CONFIG_TMPFS_POSIX_ACL is not set
1449CONFIG_HUGETLBFS=y
1450CONFIG_HUGETLB_PAGE=y
1451# CONFIG_CONFIGFS_FS is not set
1452CONFIG_MISC_FILESYSTEMS=y
1453# CONFIG_ADFS_FS is not set
1454# CONFIG_AFFS_FS is not set
1455# CONFIG_HFS_FS is not set
1456# CONFIG_HFSPLUS_FS is not set
1457# CONFIG_BEFS_FS is not set
1458# CONFIG_BFS_FS is not set
1459# CONFIG_EFS_FS is not set
1460# CONFIG_CRAMFS is not set
1461# CONFIG_SQUASHFS is not set
1462# CONFIG_VXFS_FS is not set
1463# CONFIG_MINIX_FS is not set
1464# CONFIG_OMFS_FS is not set
1465# CONFIG_HPFS_FS is not set
1466# CONFIG_QNX4FS_FS is not set
1467# CONFIG_ROMFS_FS is not set
1468# CONFIG_SYSV_FS is not set
1469# CONFIG_UFS_FS is not set
1470CONFIG_NETWORK_FILESYSTEMS=y
1471CONFIG_NFS_FS=y
1472CONFIG_NFS_V3=y
1473# CONFIG_NFS_V3_ACL is not set
1474# CONFIG_NFS_V4 is not set
1475CONFIG_ROOT_NFS=y
1476# CONFIG_NFSD is not set
1477CONFIG_LOCKD=y
1478CONFIG_LOCKD_V4=y
1479CONFIG_NFS_COMMON=y
1480CONFIG_SUNRPC=y
1481# CONFIG_RPCSEC_GSS_KRB5 is not set
1482# CONFIG_RPCSEC_GSS_SPKM3 is not set
1483# CONFIG_SMB_FS is not set
1484# CONFIG_CIFS is not set
1485# CONFIG_NCP_FS is not set
1486# CONFIG_CODA_FS is not set
1487# CONFIG_AFS_FS is not set
1488
1489#
1490# Partition Types
1491#
1492# CONFIG_PARTITION_ADVANCED is not set
1493CONFIG_MSDOS_PARTITION=y
1494CONFIG_NLS=y
1495CONFIG_NLS_DEFAULT="iso8859-1"
1496# CONFIG_NLS_CODEPAGE_437 is not set
1497# CONFIG_NLS_CODEPAGE_737 is not set
1498# CONFIG_NLS_CODEPAGE_775 is not set
1499# CONFIG_NLS_CODEPAGE_850 is not set
1500# CONFIG_NLS_CODEPAGE_852 is not set
1501# CONFIG_NLS_CODEPAGE_855 is not set
1502# CONFIG_NLS_CODEPAGE_857 is not set
1503# CONFIG_NLS_CODEPAGE_860 is not set
1504# CONFIG_NLS_CODEPAGE_861 is not set
1505# CONFIG_NLS_CODEPAGE_862 is not set
1506# CONFIG_NLS_CODEPAGE_863 is not set
1507# CONFIG_NLS_CODEPAGE_864 is not set
1508# CONFIG_NLS_CODEPAGE_865 is not set
1509# CONFIG_NLS_CODEPAGE_866 is not set
1510# CONFIG_NLS_CODEPAGE_869 is not set
1511# CONFIG_NLS_CODEPAGE_936 is not set
1512# CONFIG_NLS_CODEPAGE_950 is not set
1513# CONFIG_NLS_CODEPAGE_932 is not set
1514# CONFIG_NLS_CODEPAGE_949 is not set
1515# CONFIG_NLS_CODEPAGE_874 is not set
1516# CONFIG_NLS_ISO8859_8 is not set
1517# CONFIG_NLS_CODEPAGE_1250 is not set
1518# CONFIG_NLS_CODEPAGE_1251 is not set
1519# CONFIG_NLS_ASCII is not set
1520# CONFIG_NLS_ISO8859_1 is not set
1521# CONFIG_NLS_ISO8859_2 is not set
1522# CONFIG_NLS_ISO8859_3 is not set
1523# CONFIG_NLS_ISO8859_4 is not set
1524# CONFIG_NLS_ISO8859_5 is not set
1525# CONFIG_NLS_ISO8859_6 is not set
1526# CONFIG_NLS_ISO8859_7 is not set
1527# CONFIG_NLS_ISO8859_9 is not set
1528# CONFIG_NLS_ISO8859_13 is not set
1529# CONFIG_NLS_ISO8859_14 is not set
1530# CONFIG_NLS_ISO8859_15 is not set
1531# CONFIG_NLS_KOI8_R is not set
1532# CONFIG_NLS_KOI8_U is not set
1533# CONFIG_NLS_UTF8 is not set
1534# CONFIG_DLM is not set
1535
1536#
1537# Kernel hacking
1538#
1539CONFIG_TRACE_IRQFLAGS_SUPPORT=y
1540CONFIG_PRINTK_TIME=y
1541CONFIG_ENABLE_WARN_DEPRECATED=y
1542# CONFIG_ENABLE_MUST_CHECK is not set
1543CONFIG_FRAME_WARN=1024
1544CONFIG_MAGIC_SYSRQ=y
1545# CONFIG_STRIP_ASM_SYMS is not set
1546# CONFIG_UNUSED_SYMBOLS is not set
1547CONFIG_DEBUG_FS=y
1548# CONFIG_HEADERS_CHECK is not set
1549CONFIG_DEBUG_KERNEL=y
1550CONFIG_DEBUG_SHIRQ=y
1551CONFIG_DETECT_SOFTLOCKUP=y
1552# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
1553CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
1554CONFIG_DETECT_HUNG_TASK=y
1555# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
1556CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
1557CONFIG_SCHED_DEBUG=y
1558# CONFIG_SCHEDSTATS is not set
1559# CONFIG_TIMER_STATS is not set
1560# CONFIG_DEBUG_OBJECTS is not set
1561# CONFIG_DEBUG_SLAB is not set
1562CONFIG_DEBUG_PREEMPT=y
1563# CONFIG_DEBUG_RT_MUTEXES is not set
1564# CONFIG_RT_MUTEX_TESTER is not set
1565# CONFIG_DEBUG_SPINLOCK is not set
1566# CONFIG_DEBUG_MUTEXES is not set
1567# CONFIG_DEBUG_LOCK_ALLOC is not set
1568# CONFIG_PROVE_LOCKING is not set
1569# CONFIG_LOCK_STAT is not set
1570# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1571# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1572CONFIG_STACKTRACE=y
1573# CONFIG_DEBUG_KOBJECT is not set
1574CONFIG_DEBUG_BUGVERBOSE=y
1575# CONFIG_DEBUG_INFO is not set
1576CONFIG_DEBUG_VM=y
1577# CONFIG_DEBUG_WRITECOUNT is not set
1578# CONFIG_DEBUG_MEMORY_INIT is not set
1579# CONFIG_DEBUG_LIST is not set
1580# CONFIG_DEBUG_SG is not set
1581# CONFIG_DEBUG_NOTIFIERS is not set
1582# CONFIG_DEBUG_CREDENTIALS is not set
1583CONFIG_FRAME_POINTER=y
1584# CONFIG_RCU_TORTURE_TEST is not set
1585# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1586# CONFIG_BACKTRACE_SELF_TEST is not set
1587# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1588# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
1589# CONFIG_FAULT_INJECTION is not set
1590# CONFIG_LATENCYTOP is not set
1591# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1592# CONFIG_PAGE_POISONING is not set
1593CONFIG_NOP_TRACER=y
1594CONFIG_HAVE_FUNCTION_TRACER=y
1595CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
1596CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
1597CONFIG_HAVE_DYNAMIC_FTRACE=y
1598CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
1599CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
1600CONFIG_RING_BUFFER=y
1601CONFIG_EVENT_TRACING=y
1602CONFIG_CONTEXT_SWITCH_TRACER=y
1603CONFIG_TRACING=y
1604CONFIG_TRACING_SUPPORT=y
1605CONFIG_FTRACE=y
1606# CONFIG_FUNCTION_TRACER is not set
1607# CONFIG_IRQSOFF_TRACER is not set
1608# CONFIG_PREEMPT_TRACER is not set
1609# CONFIG_SCHED_TRACER is not set
1610# CONFIG_ENABLE_DEFAULT_TRACERS is not set
1611# CONFIG_FTRACE_SYSCALLS is not set
1612# CONFIG_BOOT_TRACER is not set
1613CONFIG_BRANCH_PROFILE_NONE=y
1614# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
1615# CONFIG_PROFILE_ALL_BRANCHES is not set
1616CONFIG_KSYM_TRACER=y
1617# CONFIG_PROFILE_KSYM_TRACER is not set
1618# CONFIG_STACK_TRACER is not set
1619# CONFIG_KMEMTRACE is not set
1620# CONFIG_WORKQUEUE_TRACER is not set
1621# CONFIG_BLK_DEV_IO_TRACE is not set
1622# CONFIG_RING_BUFFER_BENCHMARK is not set
1623# CONFIG_DYNAMIC_DEBUG is not set
1624# CONFIG_DMA_API_DEBUG is not set
1625# CONFIG_SAMPLES is not set
1626CONFIG_HAVE_ARCH_KGDB=y
1627# CONFIG_KGDB is not set
1628# CONFIG_SH_STANDARD_BIOS is not set
1629# CONFIG_STACK_DEBUG is not set
1630CONFIG_DEBUG_STACK_USAGE=y
1631# CONFIG_4KSTACKS is not set
1632CONFIG_DUMP_CODE=y
1633CONFIG_DWARF_UNWINDER=y
1634# CONFIG_SH_NO_BSS_INIT is not set
1635
1636#
1637# Security options
1638#
1639# CONFIG_KEYS is not set
1640# CONFIG_SECURITY is not set
1641# CONFIG_SECURITYFS is not set
1642# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1643# CONFIG_DEFAULT_SECURITY_SMACK is not set
1644# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1645CONFIG_DEFAULT_SECURITY_DAC=y
1646CONFIG_DEFAULT_SECURITY=""
1647CONFIG_CRYPTO=y
1648
1649#
1650# Crypto core or helper
1651#
1652# CONFIG_CRYPTO_MANAGER is not set
1653# CONFIG_CRYPTO_MANAGER2 is not set
1654# CONFIG_CRYPTO_GF128MUL is not set
1655# CONFIG_CRYPTO_NULL is not set
1656# CONFIG_CRYPTO_CRYPTD is not set
1657# CONFIG_CRYPTO_AUTHENC is not set
1658# CONFIG_CRYPTO_TEST is not set
1659
1660#
1661# Authenticated Encryption with Associated Data
1662#
1663# CONFIG_CRYPTO_CCM is not set
1664# CONFIG_CRYPTO_GCM is not set
1665# CONFIG_CRYPTO_SEQIV is not set
1666
1667#
1668# Block modes
1669#
1670# CONFIG_CRYPTO_CBC is not set
1671# CONFIG_CRYPTO_CTR is not set
1672# CONFIG_CRYPTO_CTS is not set
1673# CONFIG_CRYPTO_ECB is not set
1674# CONFIG_CRYPTO_LRW is not set
1675# CONFIG_CRYPTO_PCBC is not set
1676# CONFIG_CRYPTO_XTS is not set
1677
1678#
1679# Hash modes
1680#
1681# CONFIG_CRYPTO_HMAC is not set
1682# CONFIG_CRYPTO_XCBC is not set
1683# CONFIG_CRYPTO_VMAC is not set
1684
1685#
1686# Digest
1687#
1688# CONFIG_CRYPTO_CRC32C is not set
1689# CONFIG_CRYPTO_GHASH is not set
1690# CONFIG_CRYPTO_MD4 is not set
1691# CONFIG_CRYPTO_MD5 is not set
1692# CONFIG_CRYPTO_MICHAEL_MIC is not set
1693# CONFIG_CRYPTO_RMD128 is not set
1694# CONFIG_CRYPTO_RMD160 is not set
1695# CONFIG_CRYPTO_RMD256 is not set
1696# CONFIG_CRYPTO_RMD320 is not set
1697# CONFIG_CRYPTO_SHA1 is not set
1698# CONFIG_CRYPTO_SHA256 is not set
1699# CONFIG_CRYPTO_SHA512 is not set
1700# CONFIG_CRYPTO_TGR192 is not set
1701# CONFIG_CRYPTO_WP512 is not set
1702
1703#
1704# Ciphers
1705#
1706# CONFIG_CRYPTO_AES is not set
1707# CONFIG_CRYPTO_ANUBIS is not set
1708# CONFIG_CRYPTO_ARC4 is not set
1709# CONFIG_CRYPTO_BLOWFISH is not set
1710# CONFIG_CRYPTO_CAMELLIA is not set
1711# CONFIG_CRYPTO_CAST5 is not set
1712# CONFIG_CRYPTO_CAST6 is not set
1713# CONFIG_CRYPTO_DES is not set
1714# CONFIG_CRYPTO_FCRYPT is not set
1715# CONFIG_CRYPTO_KHAZAD is not set
1716# CONFIG_CRYPTO_SALSA20 is not set
1717# CONFIG_CRYPTO_SEED is not set
1718# CONFIG_CRYPTO_SERPENT is not set
1719# CONFIG_CRYPTO_TEA is not set
1720# CONFIG_CRYPTO_TWOFISH is not set
1721
1722#
1723# Compression
1724#
1725# CONFIG_CRYPTO_DEFLATE is not set
1726# CONFIG_CRYPTO_ZLIB is not set
1727# CONFIG_CRYPTO_LZO is not set
1728
1729#
1730# Random Number Generation
1731#
1732# CONFIG_CRYPTO_ANSI_CPRNG is not set
1733CONFIG_CRYPTO_HW=y
1734# CONFIG_CRYPTO_DEV_HIFN_795X is not set
1735CONFIG_BINARY_PRINTF=y
1736
1737#
1738# Library routines
1739#
1740CONFIG_BITREVERSE=y
1741CONFIG_GENERIC_FIND_LAST_BIT=y
1742# CONFIG_CRC_CCITT is not set
1743# CONFIG_CRC16 is not set
1744# CONFIG_CRC_T10DIF is not set
1745# CONFIG_CRC_ITU_T is not set
1746CONFIG_CRC32=y
1747# CONFIG_CRC7 is not set
1748# CONFIG_LIBCRC32C is not set
1749CONFIG_HAS_IOMEM=y
1750CONFIG_HAS_IOPORT=y
1751CONFIG_HAS_DMA=y
1752CONFIG_HAVE_LMB=y
1753CONFIG_NLATTR=y
1754CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/se7206_defconfig b/arch/sh/configs/se7206_defconfig
index 1cd1777aa436..43e6780a89d1 100644
--- a/arch/sh/configs/se7206_defconfig
+++ b/arch/sh/configs/se7206_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Thu Sep 24 18:45:28 2009 4# Mon Jan 4 13:30:00 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -30,6 +30,7 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
30CONFIG_ARCH_NO_VIRT_TO_BUS=y 30CONFIG_ARCH_NO_VIRT_TO_BUS=y
31CONFIG_ARCH_HAS_DEFAULT_IDLE=y 31CONFIG_ARCH_HAS_DEFAULT_IDLE=y
32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
33CONFIG_DMA_NONCOHERENT=y
33CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 34CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
34CONFIG_CONSTRUCTORS=y 35CONFIG_CONSTRUCTORS=y
35 36
@@ -64,6 +65,7 @@ CONFIG_AUDIT_TREE=y
64# 65#
65CONFIG_TREE_RCU=y 66CONFIG_TREE_RCU=y
66# CONFIG_TREE_PREEMPT_RCU is not set 67# CONFIG_TREE_PREEMPT_RCU is not set
68# CONFIG_TINY_RCU is not set
67CONFIG_RCU_TRACE=y 69CONFIG_RCU_TRACE=y
68CONFIG_RCU_FANOUT=32 70CONFIG_RCU_FANOUT=32
69# CONFIG_RCU_FANOUT_EXACT is not set 71# CONFIG_RCU_FANOUT_EXACT is not set
@@ -115,6 +117,7 @@ CONFIG_TIMERFD=y
115CONFIG_EVENTFD=y 117CONFIG_EVENTFD=y
116CONFIG_AIO=y 118CONFIG_AIO=y
117CONFIG_HAVE_PERF_EVENTS=y 119CONFIG_HAVE_PERF_EVENTS=y
120CONFIG_PERF_USE_VMALLOC=y
118 121
119# 122#
120# Kernel Performance Events And Counters 123# Kernel Performance Events And Counters
@@ -122,11 +125,13 @@ CONFIG_HAVE_PERF_EVENTS=y
122CONFIG_PERF_EVENTS=y 125CONFIG_PERF_EVENTS=y
123CONFIG_EVENT_PROFILE=y 126CONFIG_EVENT_PROFILE=y
124# CONFIG_PERF_COUNTERS is not set 127# CONFIG_PERF_COUNTERS is not set
128# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
125CONFIG_VM_EVENT_COUNTERS=y 129CONFIG_VM_EVENT_COUNTERS=y
126# CONFIG_COMPAT_BRK is not set 130# CONFIG_COMPAT_BRK is not set
127# CONFIG_SLAB is not set 131# CONFIG_SLAB is not set
128# CONFIG_SLUB is not set 132# CONFIG_SLUB is not set
129CONFIG_SLOB=y 133CONFIG_SLOB=y
134# CONFIG_MMAP_ALLOW_UNINITIALIZED is not set
130CONFIG_PROFILING=y 135CONFIG_PROFILING=y
131CONFIG_TRACEPOINTS=y 136CONFIG_TRACEPOINTS=y
132CONFIG_OPROFILE=y 137CONFIG_OPROFILE=y
@@ -135,6 +140,7 @@ CONFIG_HAVE_OPROFILE=y
135CONFIG_HAVE_KPROBES=y 140CONFIG_HAVE_KPROBES=y
136CONFIG_HAVE_KRETPROBES=y 141CONFIG_HAVE_KRETPROBES=y
137CONFIG_HAVE_ARCH_TRACEHOOK=y 142CONFIG_HAVE_ARCH_TRACEHOOK=y
143CONFIG_HAVE_DMA_ATTRS=y
138CONFIG_HAVE_CLK=y 144CONFIG_HAVE_CLK=y
139CONFIG_HAVE_DMA_API_DEBUG=y 145CONFIG_HAVE_DMA_API_DEBUG=y
140 146
@@ -156,19 +162,47 @@ CONFIG_BLOCK=y
156CONFIG_LBDAF=y 162CONFIG_LBDAF=y
157# CONFIG_BLK_DEV_BSG is not set 163# CONFIG_BLK_DEV_BSG is not set
158# CONFIG_BLK_DEV_INTEGRITY is not set 164# CONFIG_BLK_DEV_INTEGRITY is not set
165# CONFIG_BLK_CGROUP is not set
159 166
160# 167#
161# IO Schedulers 168# IO Schedulers
162# 169#
163CONFIG_IOSCHED_NOOP=y 170CONFIG_IOSCHED_NOOP=y
164# CONFIG_IOSCHED_AS is not set
165# CONFIG_IOSCHED_DEADLINE is not set 171# CONFIG_IOSCHED_DEADLINE is not set
166# CONFIG_IOSCHED_CFQ is not set 172# CONFIG_IOSCHED_CFQ is not set
167# CONFIG_DEFAULT_AS is not set
168# CONFIG_DEFAULT_DEADLINE is not set 173# CONFIG_DEFAULT_DEADLINE is not set
169# CONFIG_DEFAULT_CFQ is not set 174# CONFIG_DEFAULT_CFQ is not set
170CONFIG_DEFAULT_NOOP=y 175CONFIG_DEFAULT_NOOP=y
171CONFIG_DEFAULT_IOSCHED="noop" 176CONFIG_DEFAULT_IOSCHED="noop"
177# CONFIG_INLINE_SPIN_TRYLOCK is not set
178# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
179# CONFIG_INLINE_SPIN_LOCK is not set
180# CONFIG_INLINE_SPIN_LOCK_BH is not set
181# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
182# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
183# CONFIG_INLINE_SPIN_UNLOCK is not set
184# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
185# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
186# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
187# CONFIG_INLINE_READ_TRYLOCK is not set
188# CONFIG_INLINE_READ_LOCK is not set
189# CONFIG_INLINE_READ_LOCK_BH is not set
190# CONFIG_INLINE_READ_LOCK_IRQ is not set
191# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
192# CONFIG_INLINE_READ_UNLOCK is not set
193# CONFIG_INLINE_READ_UNLOCK_BH is not set
194# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
195# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
196# CONFIG_INLINE_WRITE_TRYLOCK is not set
197# CONFIG_INLINE_WRITE_LOCK is not set
198# CONFIG_INLINE_WRITE_LOCK_BH is not set
199# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
200# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
201# CONFIG_INLINE_WRITE_UNLOCK is not set
202# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
203# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
204# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
205# CONFIG_MUTEX_SPIN_ON_OWNER is not set
172# CONFIG_FREEZER is not set 206# CONFIG_FREEZER is not set
173 207
174# 208#
@@ -243,7 +277,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
243# CONFIG_PHYS_ADDR_T_64BIT is not set 277# CONFIG_PHYS_ADDR_T_64BIT is not set
244CONFIG_ZONE_DMA_FLAG=0 278CONFIG_ZONE_DMA_FLAG=0
245CONFIG_NR_QUICK=2 279CONFIG_NR_QUICK=2
246CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
247CONFIG_NOMMU_INITIAL_TRIM_EXCESS=1 280CONFIG_NOMMU_INITIAL_TRIM_EXCESS=1
248 281
249# 282#
@@ -438,9 +471,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
438# CONFIG_AF_RXRPC is not set 471# CONFIG_AF_RXRPC is not set
439CONFIG_WIRELESS=y 472CONFIG_WIRELESS=y
440# CONFIG_CFG80211 is not set 473# CONFIG_CFG80211 is not set
441CONFIG_CFG80211_DEFAULT_PS_VALUE=0
442# CONFIG_WIRELESS_OLD_REGULATORY is not set
443# CONFIG_WIRELESS_EXT is not set
444# CONFIG_LIB80211 is not set 474# CONFIG_LIB80211 is not set
445 475
446# 476#
@@ -551,6 +581,10 @@ CONFIG_BLK_DEV=y
551# CONFIG_BLK_DEV_COW_COMMON is not set 581# CONFIG_BLK_DEV_COW_COMMON is not set
552CONFIG_BLK_DEV_LOOP=y 582CONFIG_BLK_DEV_LOOP=y
553# CONFIG_BLK_DEV_CRYPTOLOOP is not set 583# CONFIG_BLK_DEV_CRYPTOLOOP is not set
584
585#
586# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
587#
554# CONFIG_BLK_DEV_NBD is not set 588# CONFIG_BLK_DEV_NBD is not set
555CONFIG_BLK_DEV_RAM=y 589CONFIG_BLK_DEV_RAM=y
556CONFIG_BLK_DEV_RAM_COUNT=16 590CONFIG_BLK_DEV_RAM_COUNT=16
@@ -605,11 +639,11 @@ CONFIG_SMC91X=y
605# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set 639# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
606# CONFIG_B44 is not set 640# CONFIG_B44 is not set
607# CONFIG_KS8842 is not set 641# CONFIG_KS8842 is not set
642# CONFIG_KS8851_MLL is not set
608# CONFIG_NETDEV_1000 is not set 643# CONFIG_NETDEV_1000 is not set
609# CONFIG_NETDEV_10000 is not set 644# CONFIG_NETDEV_10000 is not set
610CONFIG_WLAN=y 645CONFIG_WLAN=y
611# CONFIG_WLAN_PRE80211 is not set 646# CONFIG_HOSTAP is not set
612# CONFIG_WLAN_80211 is not set
613 647
614# 648#
615# Enable WiMAX (Networking options) to see the WiMAX drivers 649# Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -685,6 +719,7 @@ CONFIG_SSB_POSSIBLE=y
685# 719#
686# CONFIG_MFD_CORE is not set 720# CONFIG_MFD_CORE is not set
687# CONFIG_MFD_SM501 is not set 721# CONFIG_MFD_SM501 is not set
722# CONFIG_MFD_SH_MOBILE_SDHI is not set
688# CONFIG_HTC_PASIC3 is not set 723# CONFIG_HTC_PASIC3 is not set
689# CONFIG_MFD_TMIO is not set 724# CONFIG_MFD_TMIO is not set
690# CONFIG_REGULATOR is not set 725# CONFIG_REGULATOR is not set
@@ -738,7 +773,9 @@ CONFIG_RTC_INTF_DEV=y
738# CONFIG_RTC_DRV_M48T86 is not set 773# CONFIG_RTC_DRV_M48T86 is not set
739# CONFIG_RTC_DRV_M48T35 is not set 774# CONFIG_RTC_DRV_M48T35 is not set
740# CONFIG_RTC_DRV_M48T59 is not set 775# CONFIG_RTC_DRV_M48T59 is not set
776# CONFIG_RTC_DRV_MSM6242 is not set
741# CONFIG_RTC_DRV_BQ4802 is not set 777# CONFIG_RTC_DRV_BQ4802 is not set
778# CONFIG_RTC_DRV_RP5C01 is not set
742# CONFIG_RTC_DRV_V3020 is not set 779# CONFIG_RTC_DRV_V3020 is not set
743 780
744# 781#
@@ -762,6 +799,7 @@ CONFIG_EXT2_FS=y
762# CONFIG_EXT2_FS_XATTR is not set 799# CONFIG_EXT2_FS_XATTR is not set
763# CONFIG_EXT3_FS is not set 800# CONFIG_EXT3_FS is not set
764# CONFIG_EXT4_FS is not set 801# CONFIG_EXT4_FS is not set
802CONFIG_EXT4_USE_FOR_EXT23=y
765# CONFIG_REISERFS_FS is not set 803# CONFIG_REISERFS_FS is not set
766# CONFIG_JFS_FS is not set 804# CONFIG_JFS_FS is not set
767# CONFIG_FS_POSIX_ACL is not set 805# CONFIG_FS_POSIX_ACL is not set
@@ -911,6 +949,7 @@ CONFIG_FRAME_POINTER=y
911# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set 949# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
912# CONFIG_FAULT_INJECTION is not set 950# CONFIG_FAULT_INJECTION is not set
913# CONFIG_LATENCYTOP is not set 951# CONFIG_LATENCYTOP is not set
952# CONFIG_SYSCTL_SYSCALL_CHECK is not set
914# CONFIG_PAGE_POISONING is not set 953# CONFIG_PAGE_POISONING is not set
915CONFIG_NOP_TRACER=y 954CONFIG_NOP_TRACER=y
916CONFIG_HAVE_FUNCTION_TRACER=y 955CONFIG_HAVE_FUNCTION_TRACER=y
@@ -947,7 +986,6 @@ CONFIG_BRANCH_PROFILE_NONE=y
947CONFIG_HAVE_ARCH_KGDB=y 986CONFIG_HAVE_ARCH_KGDB=y
948# CONFIG_KGDB is not set 987# CONFIG_KGDB is not set
949# CONFIG_SH_STANDARD_BIOS is not set 988# CONFIG_SH_STANDARD_BIOS is not set
950# CONFIG_EARLY_SCIF_CONSOLE is not set
951# CONFIG_STACK_DEBUG is not set 989# CONFIG_STACK_DEBUG is not set
952CONFIG_DEBUG_STACK_USAGE=y 990CONFIG_DEBUG_STACK_USAGE=y
953CONFIG_DUMP_CODE=y 991CONFIG_DUMP_CODE=y
@@ -960,7 +998,11 @@ CONFIG_DUMP_CODE=y
960# CONFIG_KEYS is not set 998# CONFIG_KEYS is not set
961# CONFIG_SECURITY is not set 999# CONFIG_SECURITY is not set
962# CONFIG_SECURITYFS is not set 1000# CONFIG_SECURITYFS is not set
963# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1001# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1002# CONFIG_DEFAULT_SECURITY_SMACK is not set
1003# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1004CONFIG_DEFAULT_SECURITY_DAC=y
1005CONFIG_DEFAULT_SECURITY=""
964CONFIG_CRYPTO=y 1006CONFIG_CRYPTO=y
965 1007
966# 1008#
diff --git a/arch/sh/configs/se7343_defconfig b/arch/sh/configs/se7343_defconfig
index 5531444b808c..ec494e32fa2e 100644
--- a/arch/sh/configs/se7343_defconfig
+++ b/arch/sh/configs/se7343_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Thu Sep 24 18:46:55 2009 4# Mon Jan 4 13:30:41 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -20,6 +20,7 @@ CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
21CONFIG_ARCH_SUSPEND_POSSIBLE=y 21CONFIG_ARCH_SUSPEND_POSSIBLE=y
22CONFIG_ARCH_HIBERNATION_POSSIBLE=y 22CONFIG_ARCH_HIBERNATION_POSSIBLE=y
23CONFIG_SYS_SUPPORTS_HUGETLBFS=y
23CONFIG_SYS_SUPPORTS_CMT=y 24CONFIG_SYS_SUPPORTS_CMT=y
24CONFIG_SYS_SUPPORTS_TMU=y 25CONFIG_SYS_SUPPORTS_TMU=y
25CONFIG_STACKTRACE_SUPPORT=y 26CONFIG_STACKTRACE_SUPPORT=y
@@ -30,6 +31,7 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
30CONFIG_ARCH_NO_VIRT_TO_BUS=y 31CONFIG_ARCH_NO_VIRT_TO_BUS=y
31CONFIG_ARCH_HAS_DEFAULT_IDLE=y 32CONFIG_ARCH_HAS_DEFAULT_IDLE=y
32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
34CONFIG_DMA_NONCOHERENT=y
33CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
34CONFIG_CONSTRUCTORS=y 36CONFIG_CONSTRUCTORS=y
35 37
@@ -61,6 +63,7 @@ CONFIG_POSIX_MQUEUE_SYSCTL=y
61# 63#
62CONFIG_TREE_RCU=y 64CONFIG_TREE_RCU=y
63# CONFIG_TREE_PREEMPT_RCU is not set 65# CONFIG_TREE_PREEMPT_RCU is not set
66# CONFIG_TINY_RCU is not set
64# CONFIG_RCU_TRACE is not set 67# CONFIG_RCU_TRACE is not set
65CONFIG_RCU_FANOUT=32 68CONFIG_RCU_FANOUT=32
66# CONFIG_RCU_FANOUT_EXACT is not set 69# CONFIG_RCU_FANOUT_EXACT is not set
@@ -99,6 +102,7 @@ CONFIG_EVENTFD=y
99# CONFIG_SHMEM is not set 102# CONFIG_SHMEM is not set
100CONFIG_AIO=y 103CONFIG_AIO=y
101CONFIG_HAVE_PERF_EVENTS=y 104CONFIG_HAVE_PERF_EVENTS=y
105CONFIG_PERF_USE_VMALLOC=y
102 106
103# 107#
104# Kernel Performance Events And Counters 108# Kernel Performance Events And Counters
@@ -117,6 +121,7 @@ CONFIG_HAVE_IOREMAP_PROT=y
117CONFIG_HAVE_KPROBES=y 121CONFIG_HAVE_KPROBES=y
118CONFIG_HAVE_KRETPROBES=y 122CONFIG_HAVE_KRETPROBES=y
119CONFIG_HAVE_ARCH_TRACEHOOK=y 123CONFIG_HAVE_ARCH_TRACEHOOK=y
124CONFIG_HAVE_DMA_ATTRS=y
120CONFIG_HAVE_CLK=y 125CONFIG_HAVE_CLK=y
121CONFIG_HAVE_DMA_API_DEBUG=y 126CONFIG_HAVE_DMA_API_DEBUG=y
122 127
@@ -126,6 +131,7 @@ CONFIG_HAVE_DMA_API_DEBUG=y
126# CONFIG_SLOW_WORK is not set 131# CONFIG_SLOW_WORK is not set
127CONFIG_HAVE_GENERIC_DMA_COHERENT=y 132CONFIG_HAVE_GENERIC_DMA_COHERENT=y
128CONFIG_SLABINFO=y 133CONFIG_SLABINFO=y
134CONFIG_RT_MUTEXES=y
129CONFIG_BASE_SMALL=0 135CONFIG_BASE_SMALL=0
130CONFIG_MODULES=y 136CONFIG_MODULES=y
131# CONFIG_MODULE_FORCE_LOAD is not set 137# CONFIG_MODULE_FORCE_LOAD is not set
@@ -142,14 +148,41 @@ CONFIG_LBDAF=y
142# IO Schedulers 148# IO Schedulers
143# 149#
144CONFIG_IOSCHED_NOOP=y 150CONFIG_IOSCHED_NOOP=y
145# CONFIG_IOSCHED_AS is not set
146CONFIG_IOSCHED_DEADLINE=y 151CONFIG_IOSCHED_DEADLINE=y
147# CONFIG_IOSCHED_CFQ is not set 152# CONFIG_IOSCHED_CFQ is not set
148# CONFIG_DEFAULT_AS is not set
149CONFIG_DEFAULT_DEADLINE=y 153CONFIG_DEFAULT_DEADLINE=y
150# CONFIG_DEFAULT_CFQ is not set 154# CONFIG_DEFAULT_CFQ is not set
151# CONFIG_DEFAULT_NOOP is not set 155# CONFIG_DEFAULT_NOOP is not set
152CONFIG_DEFAULT_IOSCHED="deadline" 156CONFIG_DEFAULT_IOSCHED="deadline"
157# CONFIG_INLINE_SPIN_TRYLOCK is not set
158# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
159# CONFIG_INLINE_SPIN_LOCK is not set
160# CONFIG_INLINE_SPIN_LOCK_BH is not set
161# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
162# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
163CONFIG_INLINE_SPIN_UNLOCK=y
164# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
165CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
166# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
167# CONFIG_INLINE_READ_TRYLOCK is not set
168# CONFIG_INLINE_READ_LOCK is not set
169# CONFIG_INLINE_READ_LOCK_BH is not set
170# CONFIG_INLINE_READ_LOCK_IRQ is not set
171# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
172CONFIG_INLINE_READ_UNLOCK=y
173# CONFIG_INLINE_READ_UNLOCK_BH is not set
174CONFIG_INLINE_READ_UNLOCK_IRQ=y
175# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
176# CONFIG_INLINE_WRITE_TRYLOCK is not set
177# CONFIG_INLINE_WRITE_LOCK is not set
178# CONFIG_INLINE_WRITE_LOCK_BH is not set
179# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
180# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
181CONFIG_INLINE_WRITE_UNLOCK=y
182# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
183CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
184# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
185# CONFIG_MUTEX_SPIN_ON_OWNER is not set
153CONFIG_FREEZER=y 186CONFIG_FREEZER=y
154 187
155# 188#
@@ -228,8 +261,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
228# CONFIG_PHYS_ADDR_T_64BIT is not set 261# CONFIG_PHYS_ADDR_T_64BIT is not set
229CONFIG_ZONE_DMA_FLAG=0 262CONFIG_ZONE_DMA_FLAG=0
230CONFIG_NR_QUICK=2 263CONFIG_NR_QUICK=2
231CONFIG_HAVE_MLOCK=y
232CONFIG_HAVE_MLOCKED_PAGE_BIT=y
233# CONFIG_KSM is not set 264# CONFIG_KSM is not set
234CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 265CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
235 266
@@ -263,7 +294,6 @@ CONFIG_SH_7343_SOLUTION_ENGINE=y
263# 294#
264CONFIG_SH_TIMER_TMU=y 295CONFIG_SH_TIMER_TMU=y
265# CONFIG_SH_TIMER_CMT is not set 296# CONFIG_SH_TIMER_CMT is not set
266CONFIG_SH_PCLK_FREQ=33333333
267CONFIG_SH_CLK_CPG=y 297CONFIG_SH_CLK_CPG=y
268# CONFIG_NO_HZ is not set 298# CONFIG_NO_HZ is not set
269# CONFIG_HIGH_RES_TIMERS is not set 299# CONFIG_HIGH_RES_TIMERS is not set
@@ -413,9 +443,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
413# CONFIG_AF_RXRPC is not set 443# CONFIG_AF_RXRPC is not set
414CONFIG_WIRELESS=y 444CONFIG_WIRELESS=y
415# CONFIG_CFG80211 is not set 445# CONFIG_CFG80211 is not set
416CONFIG_CFG80211_DEFAULT_PS_VALUE=0
417# CONFIG_WIRELESS_OLD_REGULATORY is not set
418# CONFIG_WIRELESS_EXT is not set
419# CONFIG_LIB80211 is not set 446# CONFIG_LIB80211 is not set
420 447
421# 448#
@@ -525,6 +552,10 @@ CONFIG_MTD_PHYSMAP=y
525CONFIG_BLK_DEV=y 552CONFIG_BLK_DEV=y
526# CONFIG_BLK_DEV_COW_COMMON is not set 553# CONFIG_BLK_DEV_COW_COMMON is not set
527# CONFIG_BLK_DEV_LOOP is not set 554# CONFIG_BLK_DEV_LOOP is not set
555
556#
557# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
558#
528# CONFIG_BLK_DEV_NBD is not set 559# CONFIG_BLK_DEV_NBD is not set
529# CONFIG_BLK_DEV_UB is not set 560# CONFIG_BLK_DEV_UB is not set
530# CONFIG_BLK_DEV_RAM is not set 561# CONFIG_BLK_DEV_RAM is not set
@@ -585,8 +616,8 @@ CONFIG_MII=y
585# CONFIG_NETDEV_1000 is not set 616# CONFIG_NETDEV_1000 is not set
586# CONFIG_NETDEV_10000 is not set 617# CONFIG_NETDEV_10000 is not set
587CONFIG_WLAN=y 618CONFIG_WLAN=y
588# CONFIG_WLAN_PRE80211 is not set 619# CONFIG_USB_ZD1201 is not set
589# CONFIG_WLAN_80211 is not set 620# CONFIG_HOSTAP is not set
590 621
591# 622#
592# Enable WiMAX (Networking options) to see the WiMAX drivers 623# Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -628,6 +659,7 @@ CONFIG_USB_NET_DM9601=y
628CONFIG_INPUT=y 659CONFIG_INPUT=y
629# CONFIG_INPUT_FF_MEMLESS is not set 660# CONFIG_INPUT_FF_MEMLESS is not set
630# CONFIG_INPUT_POLLDEV is not set 661# CONFIG_INPUT_POLLDEV is not set
662# CONFIG_INPUT_SPARSEKMAP is not set
631 663
632# 664#
633# Userland interfaces 665# Userland interfaces
@@ -724,7 +756,6 @@ CONFIG_I2C_SH_MOBILE=y
724# 756#
725# Miscellaneous I2C Chip support 757# Miscellaneous I2C Chip support
726# 758#
727# CONFIG_DS1682 is not set
728# CONFIG_SENSORS_TSL2550 is not set 759# CONFIG_SENSORS_TSL2550 is not set
729# CONFIG_I2C_DEBUG_CORE is not set 760# CONFIG_I2C_DEBUG_CORE is not set
730# CONFIG_I2C_DEBUG_ALGO is not set 761# CONFIG_I2C_DEBUG_ALGO is not set
@@ -753,15 +784,18 @@ CONFIG_SSB_POSSIBLE=y
753# 784#
754# CONFIG_MFD_CORE is not set 785# CONFIG_MFD_CORE is not set
755# CONFIG_MFD_SM501 is not set 786# CONFIG_MFD_SM501 is not set
787# CONFIG_MFD_SH_MOBILE_SDHI is not set
756# CONFIG_HTC_PASIC3 is not set 788# CONFIG_HTC_PASIC3 is not set
757# CONFIG_TWL4030_CORE is not set 789# CONFIG_TWL4030_CORE is not set
758# CONFIG_MFD_TMIO is not set 790# CONFIG_MFD_TMIO is not set
759# CONFIG_PMIC_DA903X is not set 791# CONFIG_PMIC_DA903X is not set
792# CONFIG_PMIC_ADP5520 is not set
760# CONFIG_MFD_WM8400 is not set 793# CONFIG_MFD_WM8400 is not set
761# CONFIG_MFD_WM831X is not set 794# CONFIG_MFD_WM831X is not set
762# CONFIG_MFD_WM8350_I2C is not set 795# CONFIG_MFD_WM8350_I2C is not set
763# CONFIG_MFD_PCF50633 is not set 796# CONFIG_MFD_PCF50633 is not set
764# CONFIG_AB3100_CORE is not set 797# CONFIG_AB3100_CORE is not set
798# CONFIG_MFD_88PM8607 is not set
765# CONFIG_REGULATOR is not set 799# CONFIG_REGULATOR is not set
766# CONFIG_MEDIA_SUPPORT is not set 800# CONFIG_MEDIA_SUPPORT is not set
767 801
@@ -1173,10 +1207,11 @@ CONFIG_FRAME_WARN=1024
1173# CONFIG_DEBUG_FS is not set 1207# CONFIG_DEBUG_FS is not set
1174# CONFIG_HEADERS_CHECK is not set 1208# CONFIG_HEADERS_CHECK is not set
1175# CONFIG_DEBUG_KERNEL is not set 1209# CONFIG_DEBUG_KERNEL is not set
1176# CONFIG_DEBUG_BUGVERBOSE is not set 1210CONFIG_DEBUG_BUGVERBOSE=y
1177# CONFIG_DEBUG_MEMORY_INIT is not set 1211# CONFIG_DEBUG_MEMORY_INIT is not set
1178# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1212# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1179# CONFIG_LATENCYTOP is not set 1213# CONFIG_LATENCYTOP is not set
1214# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1180CONFIG_HAVE_FUNCTION_TRACER=y 1215CONFIG_HAVE_FUNCTION_TRACER=y
1181CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 1216CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
1182CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y 1217CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
@@ -1189,9 +1224,6 @@ CONFIG_TRACING_SUPPORT=y
1189# CONFIG_SAMPLES is not set 1224# CONFIG_SAMPLES is not set
1190CONFIG_HAVE_ARCH_KGDB=y 1225CONFIG_HAVE_ARCH_KGDB=y
1191# CONFIG_SH_STANDARD_BIOS is not set 1226# CONFIG_SH_STANDARD_BIOS is not set
1192CONFIG_EARLY_SCIF_CONSOLE=y
1193CONFIG_EARLY_SCIF_CONSOLE_PORT=0xffe00000
1194CONFIG_EARLY_PRINTK=y
1195# CONFIG_DWARF_UNWINDER is not set 1227# CONFIG_DWARF_UNWINDER is not set
1196 1228
1197# 1229#
@@ -1200,7 +1232,11 @@ CONFIG_EARLY_PRINTK=y
1200# CONFIG_KEYS is not set 1232# CONFIG_KEYS is not set
1201# CONFIG_SECURITY is not set 1233# CONFIG_SECURITY is not set
1202# CONFIG_SECURITYFS is not set 1234# CONFIG_SECURITYFS is not set
1203# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1235# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1236# CONFIG_DEFAULT_SECURITY_SMACK is not set
1237# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1238CONFIG_DEFAULT_SECURITY_DAC=y
1239CONFIG_DEFAULT_SECURITY=""
1204CONFIG_CRYPTO=y 1240CONFIG_CRYPTO=y
1205 1241
1206# 1242#
diff --git a/arch/sh/configs/se7619_defconfig b/arch/sh/configs/se7619_defconfig
index 6921b199b1d6..ee87e2b2168f 100644
--- a/arch/sh/configs/se7619_defconfig
+++ b/arch/sh/configs/se7619_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Thu Sep 24 18:50:05 2009 4# Mon Jan 4 13:34:15 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -29,6 +29,7 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
29CONFIG_ARCH_NO_VIRT_TO_BUS=y 29CONFIG_ARCH_NO_VIRT_TO_BUS=y
30CONFIG_ARCH_HAS_DEFAULT_IDLE=y 30CONFIG_ARCH_HAS_DEFAULT_IDLE=y
31CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 31CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
32CONFIG_DMA_NONCOHERENT=y
32CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 33CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
33CONFIG_CONSTRUCTORS=y 34CONFIG_CONSTRUCTORS=y
34 35
@@ -54,6 +55,7 @@ CONFIG_KERNEL_GZIP=y
54# 55#
55CONFIG_TREE_RCU=y 56CONFIG_TREE_RCU=y
56# CONFIG_TREE_PREEMPT_RCU is not set 57# CONFIG_TREE_PREEMPT_RCU is not set
58# CONFIG_TINY_RCU is not set
57# CONFIG_RCU_TRACE is not set 59# CONFIG_RCU_TRACE is not set
58CONFIG_RCU_FANOUT=32 60CONFIG_RCU_FANOUT=32
59# CONFIG_RCU_FANOUT_EXACT is not set 61# CONFIG_RCU_FANOUT_EXACT is not set
@@ -84,6 +86,7 @@ CONFIG_TIMERFD=y
84CONFIG_EVENTFD=y 86CONFIG_EVENTFD=y
85CONFIG_AIO=y 87CONFIG_AIO=y
86CONFIG_HAVE_PERF_EVENTS=y 88CONFIG_HAVE_PERF_EVENTS=y
89CONFIG_PERF_USE_VMALLOC=y
87 90
88# 91#
89# Kernel Performance Events And Counters 92# Kernel Performance Events And Counters
@@ -95,11 +98,13 @@ CONFIG_COMPAT_BRK=y
95CONFIG_SLAB=y 98CONFIG_SLAB=y
96# CONFIG_SLUB is not set 99# CONFIG_SLUB is not set
97# CONFIG_SLOB is not set 100# CONFIG_SLOB is not set
101# CONFIG_MMAP_ALLOW_UNINITIALIZED is not set
98# CONFIG_PROFILING is not set 102# CONFIG_PROFILING is not set
99CONFIG_HAVE_OPROFILE=y 103CONFIG_HAVE_OPROFILE=y
100CONFIG_HAVE_KPROBES=y 104CONFIG_HAVE_KPROBES=y
101CONFIG_HAVE_KRETPROBES=y 105CONFIG_HAVE_KRETPROBES=y
102CONFIG_HAVE_ARCH_TRACEHOOK=y 106CONFIG_HAVE_ARCH_TRACEHOOK=y
107CONFIG_HAVE_DMA_ATTRS=y
103CONFIG_HAVE_CLK=y 108CONFIG_HAVE_CLK=y
104CONFIG_HAVE_DMA_API_DEBUG=y 109CONFIG_HAVE_DMA_API_DEBUG=y
105 110
@@ -120,14 +125,41 @@ CONFIG_LBDAF=y
120# IO Schedulers 125# IO Schedulers
121# 126#
122CONFIG_IOSCHED_NOOP=y 127CONFIG_IOSCHED_NOOP=y
123# CONFIG_IOSCHED_AS is not set
124# CONFIG_IOSCHED_DEADLINE is not set 128# CONFIG_IOSCHED_DEADLINE is not set
125# CONFIG_IOSCHED_CFQ is not set 129# CONFIG_IOSCHED_CFQ is not set
126# CONFIG_DEFAULT_AS is not set
127# CONFIG_DEFAULT_DEADLINE is not set 130# CONFIG_DEFAULT_DEADLINE is not set
128# CONFIG_DEFAULT_CFQ is not set 131# CONFIG_DEFAULT_CFQ is not set
129CONFIG_DEFAULT_NOOP=y 132CONFIG_DEFAULT_NOOP=y
130CONFIG_DEFAULT_IOSCHED="noop" 133CONFIG_DEFAULT_IOSCHED="noop"
134# CONFIG_INLINE_SPIN_TRYLOCK is not set
135# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
136# CONFIG_INLINE_SPIN_LOCK is not set
137# CONFIG_INLINE_SPIN_LOCK_BH is not set
138# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
139# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
140CONFIG_INLINE_SPIN_UNLOCK=y
141# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
142CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
143# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
144# CONFIG_INLINE_READ_TRYLOCK is not set
145# CONFIG_INLINE_READ_LOCK is not set
146# CONFIG_INLINE_READ_LOCK_BH is not set
147# CONFIG_INLINE_READ_LOCK_IRQ is not set
148# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
149CONFIG_INLINE_READ_UNLOCK=y
150# CONFIG_INLINE_READ_UNLOCK_BH is not set
151CONFIG_INLINE_READ_UNLOCK_IRQ=y
152# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
153# CONFIG_INLINE_WRITE_TRYLOCK is not set
154# CONFIG_INLINE_WRITE_LOCK is not set
155# CONFIG_INLINE_WRITE_LOCK_BH is not set
156# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
157# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
158CONFIG_INLINE_WRITE_UNLOCK=y
159# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
160CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
161# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
162# CONFIG_MUTEX_SPIN_ON_OWNER is not set
131# CONFIG_FREEZER is not set 163# CONFIG_FREEZER is not set
132 164
133# 165#
@@ -201,7 +233,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
201# CONFIG_PHYS_ADDR_T_64BIT is not set 233# CONFIG_PHYS_ADDR_T_64BIT is not set
202CONFIG_ZONE_DMA_FLAG=0 234CONFIG_ZONE_DMA_FLAG=0
203CONFIG_NR_QUICK=2 235CONFIG_NR_QUICK=2
204CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
205CONFIG_NOMMU_INITIAL_TRIM_EXCESS=1 236CONFIG_NOMMU_INITIAL_TRIM_EXCESS=1
206 237
207# 238#
@@ -401,6 +432,10 @@ CONFIG_MTD_PHYSMAP=y
401CONFIG_BLK_DEV=y 432CONFIG_BLK_DEV=y
402# CONFIG_BLK_DEV_COW_COMMON is not set 433# CONFIG_BLK_DEV_COW_COMMON is not set
403# CONFIG_BLK_DEV_LOOP is not set 434# CONFIG_BLK_DEV_LOOP is not set
435
436#
437# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
438#
404# CONFIG_BLK_DEV_RAM is not set 439# CONFIG_BLK_DEV_RAM is not set
405# CONFIG_CDROM_PKTCDVD is not set 440# CONFIG_CDROM_PKTCDVD is not set
406# CONFIG_BLK_DEV_HD is not set 441# CONFIG_BLK_DEV_HD is not set
@@ -432,6 +467,7 @@ CONFIG_HAVE_IDE=y
432CONFIG_INPUT=y 467CONFIG_INPUT=y
433# CONFIG_INPUT_FF_MEMLESS is not set 468# CONFIG_INPUT_FF_MEMLESS is not set
434# CONFIG_INPUT_POLLDEV is not set 469# CONFIG_INPUT_POLLDEV is not set
470# CONFIG_INPUT_SPARSEKMAP is not set
435 471
436# 472#
437# Userland interfaces 473# Userland interfaces
@@ -508,6 +544,7 @@ CONFIG_SSB_POSSIBLE=y
508# 544#
509# CONFIG_MFD_CORE is not set 545# CONFIG_MFD_CORE is not set
510# CONFIG_MFD_SM501 is not set 546# CONFIG_MFD_SM501 is not set
547# CONFIG_MFD_SH_MOBILE_SDHI is not set
511# CONFIG_HTC_PASIC3 is not set 548# CONFIG_HTC_PASIC3 is not set
512# CONFIG_MFD_TMIO is not set 549# CONFIG_MFD_TMIO is not set
513# CONFIG_REGULATOR is not set 550# CONFIG_REGULATOR is not set
@@ -575,6 +612,7 @@ CONFIG_RTC_LIB=y
575# CONFIG_EXT2_FS is not set 612# CONFIG_EXT2_FS is not set
576# CONFIG_EXT3_FS is not set 613# CONFIG_EXT3_FS is not set
577# CONFIG_EXT4_FS is not set 614# CONFIG_EXT4_FS is not set
615CONFIG_EXT4_USE_FOR_EXT23=y
578# CONFIG_REISERFS_FS is not set 616# CONFIG_REISERFS_FS is not set
579# CONFIG_JFS_FS is not set 617# CONFIG_JFS_FS is not set
580# CONFIG_FS_POSIX_ACL is not set 618# CONFIG_FS_POSIX_ACL is not set
@@ -661,10 +699,11 @@ CONFIG_FRAME_WARN=1024
661# CONFIG_UNUSED_SYMBOLS is not set 699# CONFIG_UNUSED_SYMBOLS is not set
662# CONFIG_HEADERS_CHECK is not set 700# CONFIG_HEADERS_CHECK is not set
663# CONFIG_DEBUG_KERNEL is not set 701# CONFIG_DEBUG_KERNEL is not set
664# CONFIG_DEBUG_BUGVERBOSE is not set 702CONFIG_DEBUG_BUGVERBOSE=y
665# CONFIG_DEBUG_MEMORY_INIT is not set 703# CONFIG_DEBUG_MEMORY_INIT is not set
666# CONFIG_RCU_CPU_STALL_DETECTOR is not set 704# CONFIG_RCU_CPU_STALL_DETECTOR is not set
667# CONFIG_LATENCYTOP is not set 705# CONFIG_LATENCYTOP is not set
706# CONFIG_SYSCTL_SYSCALL_CHECK is not set
668CONFIG_HAVE_FUNCTION_TRACER=y 707CONFIG_HAVE_FUNCTION_TRACER=y
669CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 708CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
670CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y 709CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
@@ -677,7 +716,6 @@ CONFIG_TRACING_SUPPORT=y
677# CONFIG_SAMPLES is not set 716# CONFIG_SAMPLES is not set
678CONFIG_HAVE_ARCH_KGDB=y 717CONFIG_HAVE_ARCH_KGDB=y
679# CONFIG_SH_STANDARD_BIOS is not set 718# CONFIG_SH_STANDARD_BIOS is not set
680# CONFIG_EARLY_SCIF_CONSOLE is not set
681# CONFIG_DWARF_UNWINDER is not set 719# CONFIG_DWARF_UNWINDER is not set
682 720
683# 721#
@@ -685,7 +723,11 @@ CONFIG_HAVE_ARCH_KGDB=y
685# 723#
686# CONFIG_KEYS is not set 724# CONFIG_KEYS is not set
687# CONFIG_SECURITYFS is not set 725# CONFIG_SECURITYFS is not set
688# CONFIG_SECURITY_FILE_CAPABILITIES is not set 726# CONFIG_DEFAULT_SECURITY_SELINUX is not set
727# CONFIG_DEFAULT_SECURITY_SMACK is not set
728# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
729CONFIG_DEFAULT_SECURITY_DAC=y
730CONFIG_DEFAULT_SECURITY=""
689# CONFIG_CRYPTO is not set 731# CONFIG_CRYPTO is not set
690# CONFIG_BINARY_PRINTF is not set 732# CONFIG_BINARY_PRINTF is not set
691 733
diff --git a/arch/sh/configs/se7705_defconfig b/arch/sh/configs/se7705_defconfig
index 3abb06879f02..03f4219f2086 100644
--- a/arch/sh/configs/se7705_defconfig
+++ b/arch/sh/configs/se7705_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Thu Sep 24 18:50:52 2009 4# Mon Jan 4 13:34:37 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -29,6 +29,7 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
29CONFIG_ARCH_NO_VIRT_TO_BUS=y 29CONFIG_ARCH_NO_VIRT_TO_BUS=y
30CONFIG_ARCH_HAS_DEFAULT_IDLE=y 30CONFIG_ARCH_HAS_DEFAULT_IDLE=y
31CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 31CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
32CONFIG_DMA_NONCOHERENT=y
32CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 33CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
33CONFIG_CONSTRUCTORS=y 34CONFIG_CONSTRUCTORS=y
34 35
@@ -59,6 +60,7 @@ CONFIG_KERNEL_GZIP=y
59# 60#
60CONFIG_TREE_RCU=y 61CONFIG_TREE_RCU=y
61# CONFIG_TREE_PREEMPT_RCU is not set 62# CONFIG_TREE_PREEMPT_RCU is not set
63# CONFIG_TINY_RCU is not set
62# CONFIG_RCU_TRACE is not set 64# CONFIG_RCU_TRACE is not set
63CONFIG_RCU_FANOUT=32 65CONFIG_RCU_FANOUT=32
64# CONFIG_RCU_FANOUT_EXACT is not set 66# CONFIG_RCU_FANOUT_EXACT is not set
@@ -94,6 +96,7 @@ CONFIG_EVENTFD=y
94CONFIG_SHMEM=y 96CONFIG_SHMEM=y
95CONFIG_AIO=y 97CONFIG_AIO=y
96CONFIG_HAVE_PERF_EVENTS=y 98CONFIG_HAVE_PERF_EVENTS=y
99CONFIG_PERF_USE_VMALLOC=y
97 100
98# 101#
99# Kernel Performance Events And Counters 102# Kernel Performance Events And Counters
@@ -111,6 +114,7 @@ CONFIG_HAVE_IOREMAP_PROT=y
111CONFIG_HAVE_KPROBES=y 114CONFIG_HAVE_KPROBES=y
112CONFIG_HAVE_KRETPROBES=y 115CONFIG_HAVE_KRETPROBES=y
113CONFIG_HAVE_ARCH_TRACEHOOK=y 116CONFIG_HAVE_ARCH_TRACEHOOK=y
117CONFIG_HAVE_DMA_ATTRS=y
114CONFIG_HAVE_CLK=y 118CONFIG_HAVE_CLK=y
115CONFIG_HAVE_DMA_API_DEBUG=y 119CONFIG_HAVE_DMA_API_DEBUG=y
116 120
@@ -136,14 +140,41 @@ CONFIG_LBDAF=y
136# IO Schedulers 140# IO Schedulers
137# 141#
138CONFIG_IOSCHED_NOOP=y 142CONFIG_IOSCHED_NOOP=y
139CONFIG_IOSCHED_AS=y
140# CONFIG_IOSCHED_DEADLINE is not set 143# CONFIG_IOSCHED_DEADLINE is not set
141# CONFIG_IOSCHED_CFQ is not set 144# CONFIG_IOSCHED_CFQ is not set
142CONFIG_DEFAULT_AS=y
143# CONFIG_DEFAULT_DEADLINE is not set 145# CONFIG_DEFAULT_DEADLINE is not set
144# CONFIG_DEFAULT_CFQ is not set 146# CONFIG_DEFAULT_CFQ is not set
145# CONFIG_DEFAULT_NOOP is not set 147CONFIG_DEFAULT_NOOP=y
146CONFIG_DEFAULT_IOSCHED="anticipatory" 148CONFIG_DEFAULT_IOSCHED="noop"
149# CONFIG_INLINE_SPIN_TRYLOCK is not set
150# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
151# CONFIG_INLINE_SPIN_LOCK is not set
152# CONFIG_INLINE_SPIN_LOCK_BH is not set
153# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
154# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
155# CONFIG_INLINE_SPIN_UNLOCK is not set
156# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
157# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
158# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
159# CONFIG_INLINE_READ_TRYLOCK is not set
160# CONFIG_INLINE_READ_LOCK is not set
161# CONFIG_INLINE_READ_LOCK_BH is not set
162# CONFIG_INLINE_READ_LOCK_IRQ is not set
163# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
164# CONFIG_INLINE_READ_UNLOCK is not set
165# CONFIG_INLINE_READ_UNLOCK_BH is not set
166# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
167# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
168# CONFIG_INLINE_WRITE_TRYLOCK is not set
169# CONFIG_INLINE_WRITE_LOCK is not set
170# CONFIG_INLINE_WRITE_LOCK_BH is not set
171# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
172# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
173# CONFIG_INLINE_WRITE_UNLOCK is not set
174# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
175# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
176# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
177# CONFIG_MUTEX_SPIN_ON_OWNER is not set
147# CONFIG_FREEZER is not set 178# CONFIG_FREEZER is not set
148 179
149# 180#
@@ -219,8 +250,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
219# CONFIG_PHYS_ADDR_T_64BIT is not set 250# CONFIG_PHYS_ADDR_T_64BIT is not set
220CONFIG_ZONE_DMA_FLAG=0 251CONFIG_ZONE_DMA_FLAG=0
221CONFIG_NR_QUICK=2 252CONFIG_NR_QUICK=2
222CONFIG_HAVE_MLOCK=y
223CONFIG_HAVE_MLOCKED_PAGE_BIT=y
224# CONFIG_KSM is not set 253# CONFIG_KSM is not set
225CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 254CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
226 255
@@ -403,9 +432,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
403# CONFIG_AF_RXRPC is not set 432# CONFIG_AF_RXRPC is not set
404CONFIG_WIRELESS=y 433CONFIG_WIRELESS=y
405# CONFIG_CFG80211 is not set 434# CONFIG_CFG80211 is not set
406CONFIG_CFG80211_DEFAULT_PS_VALUE=0
407# CONFIG_WIRELESS_OLD_REGULATORY is not set
408# CONFIG_WIRELESS_EXT is not set
409# CONFIG_LIB80211 is not set 435# CONFIG_LIB80211 is not set
410 436
411# 437#
@@ -510,6 +536,10 @@ CONFIG_MTD_CFI_UTIL=y
510CONFIG_BLK_DEV=y 536CONFIG_BLK_DEV=y
511# CONFIG_BLK_DEV_COW_COMMON is not set 537# CONFIG_BLK_DEV_COW_COMMON is not set
512# CONFIG_BLK_DEV_LOOP is not set 538# CONFIG_BLK_DEV_LOOP is not set
539
540#
541# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
542#
513# CONFIG_BLK_DEV_NBD is not set 543# CONFIG_BLK_DEV_NBD is not set
514CONFIG_BLK_DEV_RAM=y 544CONFIG_BLK_DEV_RAM=y
515CONFIG_BLK_DEV_RAM_COUNT=16 545CONFIG_BLK_DEV_RAM_COUNT=16
@@ -564,11 +594,11 @@ CONFIG_STNIC=y
564# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set 594# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
565# CONFIG_B44 is not set 595# CONFIG_B44 is not set
566# CONFIG_KS8842 is not set 596# CONFIG_KS8842 is not set
597# CONFIG_KS8851_MLL is not set
567CONFIG_NETDEV_1000=y 598CONFIG_NETDEV_1000=y
568CONFIG_NETDEV_10000=y 599CONFIG_NETDEV_10000=y
569CONFIG_WLAN=y 600CONFIG_WLAN=y
570# CONFIG_WLAN_PRE80211 is not set 601# CONFIG_HOSTAP is not set
571# CONFIG_WLAN_80211 is not set
572 602
573# 603#
574# Enable WiMAX (Networking options) to see the WiMAX drivers 604# Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -598,6 +628,7 @@ CONFIG_SLHC=y
598CONFIG_INPUT=y 628CONFIG_INPUT=y
599# CONFIG_INPUT_FF_MEMLESS is not set 629# CONFIG_INPUT_FF_MEMLESS is not set
600# CONFIG_INPUT_POLLDEV is not set 630# CONFIG_INPUT_POLLDEV is not set
631# CONFIG_INPUT_SPARSEKMAP is not set
601 632
602# 633#
603# Userland interfaces 634# Userland interfaces
@@ -625,6 +656,7 @@ CONFIG_SERIO=y
625# CONFIG_SERIO_SERPORT is not set 656# CONFIG_SERIO_SERPORT is not set
626# CONFIG_SERIO_LIBPS2 is not set 657# CONFIG_SERIO_LIBPS2 is not set
627# CONFIG_SERIO_RAW is not set 658# CONFIG_SERIO_RAW is not set
659# CONFIG_SERIO_ALTERA_PS2 is not set
628# CONFIG_GAMEPORT is not set 660# CONFIG_GAMEPORT is not set
629 661
630# 662#
@@ -696,6 +728,7 @@ CONFIG_SSB_POSSIBLE=y
696# 728#
697# CONFIG_MFD_CORE is not set 729# CONFIG_MFD_CORE is not set
698# CONFIG_MFD_SM501 is not set 730# CONFIG_MFD_SM501 is not set
731# CONFIG_MFD_SH_MOBILE_SDHI is not set
699# CONFIG_HTC_PASIC3 is not set 732# CONFIG_HTC_PASIC3 is not set
700# CONFIG_MFD_TMIO is not set 733# CONFIG_MFD_TMIO is not set
701# CONFIG_REGULATOR is not set 734# CONFIG_REGULATOR is not set
@@ -765,6 +798,7 @@ CONFIG_EXT2_FS=y
765# CONFIG_EXT2_FS_XIP is not set 798# CONFIG_EXT2_FS_XIP is not set
766# CONFIG_EXT3_FS is not set 799# CONFIG_EXT3_FS is not set
767# CONFIG_EXT4_FS is not set 800# CONFIG_EXT4_FS is not set
801CONFIG_EXT4_USE_FOR_EXT23=y
768# CONFIG_REISERFS_FS is not set 802# CONFIG_REISERFS_FS is not set
769# CONFIG_JFS_FS is not set 803# CONFIG_JFS_FS is not set
770# CONFIG_FS_POSIX_ACL is not set 804# CONFIG_FS_POSIX_ACL is not set
@@ -809,7 +843,6 @@ CONFIG_PROC_SYSCTL=y
809CONFIG_PROC_PAGE_MONITOR=y 843CONFIG_PROC_PAGE_MONITOR=y
810# CONFIG_SYSFS is not set 844# CONFIG_SYSFS is not set
811# CONFIG_TMPFS is not set 845# CONFIG_TMPFS is not set
812# CONFIG_HUGETLBFS is not set
813# CONFIG_HUGETLB_PAGE is not set 846# CONFIG_HUGETLB_PAGE is not set
814CONFIG_MISC_FILESYSTEMS=y 847CONFIG_MISC_FILESYSTEMS=y
815# CONFIG_ADFS_FS is not set 848# CONFIG_ADFS_FS is not set
@@ -877,10 +910,11 @@ CONFIG_FRAME_WARN=1024
877# CONFIG_UNUSED_SYMBOLS is not set 910# CONFIG_UNUSED_SYMBOLS is not set
878# CONFIG_HEADERS_CHECK is not set 911# CONFIG_HEADERS_CHECK is not set
879# CONFIG_DEBUG_KERNEL is not set 912# CONFIG_DEBUG_KERNEL is not set
880# CONFIG_DEBUG_BUGVERBOSE is not set 913CONFIG_DEBUG_BUGVERBOSE=y
881# CONFIG_DEBUG_MEMORY_INIT is not set 914# CONFIG_DEBUG_MEMORY_INIT is not set
882# CONFIG_RCU_CPU_STALL_DETECTOR is not set 915# CONFIG_RCU_CPU_STALL_DETECTOR is not set
883# CONFIG_LATENCYTOP is not set 916# CONFIG_LATENCYTOP is not set
917# CONFIG_SYSCTL_SYSCALL_CHECK is not set
884CONFIG_HAVE_FUNCTION_TRACER=y 918CONFIG_HAVE_FUNCTION_TRACER=y
885CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 919CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
886CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y 920CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
@@ -893,7 +927,6 @@ CONFIG_TRACING_SUPPORT=y
893# CONFIG_SAMPLES is not set 927# CONFIG_SAMPLES is not set
894CONFIG_HAVE_ARCH_KGDB=y 928CONFIG_HAVE_ARCH_KGDB=y
895# CONFIG_SH_STANDARD_BIOS is not set 929# CONFIG_SH_STANDARD_BIOS is not set
896# CONFIG_EARLY_SCIF_CONSOLE is not set
897# CONFIG_DWARF_UNWINDER is not set 930# CONFIG_DWARF_UNWINDER is not set
898 931
899# 932#
@@ -901,7 +934,11 @@ CONFIG_HAVE_ARCH_KGDB=y
901# 934#
902# CONFIG_KEYS is not set 935# CONFIG_KEYS is not set
903# CONFIG_SECURITYFS is not set 936# CONFIG_SECURITYFS is not set
904# CONFIG_SECURITY_FILE_CAPABILITIES is not set 937# CONFIG_DEFAULT_SECURITY_SELINUX is not set
938# CONFIG_DEFAULT_SECURITY_SMACK is not set
939# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
940CONFIG_DEFAULT_SECURITY_DAC=y
941CONFIG_DEFAULT_SECURITY=""
905CONFIG_CRYPTO=y 942CONFIG_CRYPTO=y
906 943
907# 944#
diff --git a/arch/sh/configs/se7712_defconfig b/arch/sh/configs/se7712_defconfig
index 1a43cfecb392..cfa58199a368 100644
--- a/arch/sh/configs/se7712_defconfig
+++ b/arch/sh/configs/se7712_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Thu Sep 24 18:53:32 2009 4# Mon Jan 4 13:44:56 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -28,6 +28,7 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
28CONFIG_ARCH_NO_VIRT_TO_BUS=y 28CONFIG_ARCH_NO_VIRT_TO_BUS=y
29CONFIG_ARCH_HAS_DEFAULT_IDLE=y 29CONFIG_ARCH_HAS_DEFAULT_IDLE=y
30CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 30CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
31CONFIG_DMA_NONCOHERENT=y
31CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 32CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
32CONFIG_CONSTRUCTORS=y 33CONFIG_CONSTRUCTORS=y
33 34
@@ -60,6 +61,7 @@ CONFIG_BSD_PROCESS_ACCT=y
60# 61#
61CONFIG_TREE_RCU=y 62CONFIG_TREE_RCU=y
62# CONFIG_TREE_PREEMPT_RCU is not set 63# CONFIG_TREE_PREEMPT_RCU is not set
64# CONFIG_TINY_RCU is not set
63# CONFIG_RCU_TRACE is not set 65# CONFIG_RCU_TRACE is not set
64CONFIG_RCU_FANOUT=32 66CONFIG_RCU_FANOUT=32
65# CONFIG_RCU_FANOUT_EXACT is not set 67# CONFIG_RCU_FANOUT_EXACT is not set
@@ -95,6 +97,7 @@ CONFIG_EVENTFD=y
95# CONFIG_SHMEM is not set 97# CONFIG_SHMEM is not set
96CONFIG_AIO=y 98CONFIG_AIO=y
97CONFIG_HAVE_PERF_EVENTS=y 99CONFIG_HAVE_PERF_EVENTS=y
100CONFIG_PERF_USE_VMALLOC=y
98 101
99# 102#
100# Kernel Performance Events And Counters 103# Kernel Performance Events And Counters
@@ -113,6 +116,7 @@ CONFIG_HAVE_IOREMAP_PROT=y
113CONFIG_HAVE_KPROBES=y 116CONFIG_HAVE_KPROBES=y
114CONFIG_HAVE_KRETPROBES=y 117CONFIG_HAVE_KRETPROBES=y
115CONFIG_HAVE_ARCH_TRACEHOOK=y 118CONFIG_HAVE_ARCH_TRACEHOOK=y
119CONFIG_HAVE_DMA_ATTRS=y
116CONFIG_HAVE_CLK=y 120CONFIG_HAVE_CLK=y
117CONFIG_HAVE_DMA_API_DEBUG=y 121CONFIG_HAVE_DMA_API_DEBUG=y
118 122
@@ -138,14 +142,41 @@ CONFIG_LBDAF=y
138# IO Schedulers 142# IO Schedulers
139# 143#
140CONFIG_IOSCHED_NOOP=y 144CONFIG_IOSCHED_NOOP=y
141# CONFIG_IOSCHED_AS is not set
142# CONFIG_IOSCHED_DEADLINE is not set 145# CONFIG_IOSCHED_DEADLINE is not set
143# CONFIG_IOSCHED_CFQ is not set 146# CONFIG_IOSCHED_CFQ is not set
144# CONFIG_DEFAULT_AS is not set
145# CONFIG_DEFAULT_DEADLINE is not set 147# CONFIG_DEFAULT_DEADLINE is not set
146# CONFIG_DEFAULT_CFQ is not set 148# CONFIG_DEFAULT_CFQ is not set
147CONFIG_DEFAULT_NOOP=y 149CONFIG_DEFAULT_NOOP=y
148CONFIG_DEFAULT_IOSCHED="noop" 150CONFIG_DEFAULT_IOSCHED="noop"
151# CONFIG_INLINE_SPIN_TRYLOCK is not set
152# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
153# CONFIG_INLINE_SPIN_LOCK is not set
154# CONFIG_INLINE_SPIN_LOCK_BH is not set
155# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
156# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
157CONFIG_INLINE_SPIN_UNLOCK=y
158# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
159CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
160# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
161# CONFIG_INLINE_READ_TRYLOCK is not set
162# CONFIG_INLINE_READ_LOCK is not set
163# CONFIG_INLINE_READ_LOCK_BH is not set
164# CONFIG_INLINE_READ_LOCK_IRQ is not set
165# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
166CONFIG_INLINE_READ_UNLOCK=y
167# CONFIG_INLINE_READ_UNLOCK_BH is not set
168CONFIG_INLINE_READ_UNLOCK_IRQ=y
169# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
170# CONFIG_INLINE_WRITE_TRYLOCK is not set
171# CONFIG_INLINE_WRITE_LOCK is not set
172# CONFIG_INLINE_WRITE_LOCK_BH is not set
173# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
174# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
175CONFIG_INLINE_WRITE_UNLOCK=y
176# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
177CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
178# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
179# CONFIG_MUTEX_SPIN_ON_OWNER is not set
149# CONFIG_FREEZER is not set 180# CONFIG_FREEZER is not set
150 181
151# 182#
@@ -221,8 +252,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
221# CONFIG_PHYS_ADDR_T_64BIT is not set 252# CONFIG_PHYS_ADDR_T_64BIT is not set
222CONFIG_ZONE_DMA_FLAG=0 253CONFIG_ZONE_DMA_FLAG=0
223CONFIG_NR_QUICK=2 254CONFIG_NR_QUICK=2
224CONFIG_HAVE_MLOCK=y
225CONFIG_HAVE_MLOCKED_PAGE_BIT=y
226# CONFIG_KSM is not set 255# CONFIG_KSM is not set
227CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 256CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
228 257
@@ -452,9 +481,6 @@ CONFIG_NET_SCH_FIFO=y
452CONFIG_FIB_RULES=y 481CONFIG_FIB_RULES=y
453CONFIG_WIRELESS=y 482CONFIG_WIRELESS=y
454# CONFIG_CFG80211 is not set 483# CONFIG_CFG80211 is not set
455CONFIG_CFG80211_DEFAULT_PS_VALUE=0
456# CONFIG_WIRELESS_OLD_REGULATORY is not set
457# CONFIG_WIRELESS_EXT is not set
458# CONFIG_LIB80211 is not set 484# CONFIG_LIB80211 is not set
459 485
460# 486#
@@ -565,6 +591,10 @@ CONFIG_MTD_CFI_UTIL=y
565CONFIG_BLK_DEV=y 591CONFIG_BLK_DEV=y
566# CONFIG_BLK_DEV_COW_COMMON is not set 592# CONFIG_BLK_DEV_COW_COMMON is not set
567# CONFIG_BLK_DEV_LOOP is not set 593# CONFIG_BLK_DEV_LOOP is not set
594
595#
596# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
597#
568# CONFIG_BLK_DEV_NBD is not set 598# CONFIG_BLK_DEV_NBD is not set
569# CONFIG_BLK_DEV_RAM is not set 599# CONFIG_BLK_DEV_RAM is not set
570# CONFIG_CDROM_PKTCDVD is not set 600# CONFIG_CDROM_PKTCDVD is not set
@@ -675,11 +705,11 @@ CONFIG_SH_ETH=y
675# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set 705# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
676# CONFIG_B44 is not set 706# CONFIG_B44 is not set
677# CONFIG_KS8842 is not set 707# CONFIG_KS8842 is not set
708# CONFIG_KS8851_MLL is not set
678CONFIG_NETDEV_1000=y 709CONFIG_NETDEV_1000=y
679CONFIG_NETDEV_10000=y 710CONFIG_NETDEV_10000=y
680CONFIG_WLAN=y 711CONFIG_WLAN=y
681# CONFIG_WLAN_PRE80211 is not set 712# CONFIG_HOSTAP is not set
682# CONFIG_WLAN_80211 is not set
683 713
684# 714#
685# Enable WiMAX (Networking options) to see the WiMAX drivers 715# Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -757,6 +787,7 @@ CONFIG_SSB_POSSIBLE=y
757# 787#
758# CONFIG_MFD_CORE is not set 788# CONFIG_MFD_CORE is not set
759# CONFIG_MFD_SM501 is not set 789# CONFIG_MFD_SM501 is not set
790# CONFIG_MFD_SH_MOBILE_SDHI is not set
760# CONFIG_HTC_PASIC3 is not set 791# CONFIG_HTC_PASIC3 is not set
761# CONFIG_MFD_TMIO is not set 792# CONFIG_MFD_TMIO is not set
762# CONFIG_REGULATOR is not set 793# CONFIG_REGULATOR is not set
@@ -888,7 +919,6 @@ CONFIG_PROC_FS=y
888CONFIG_PROC_SYSCTL=y 919CONFIG_PROC_SYSCTL=y
889CONFIG_PROC_PAGE_MONITOR=y 920CONFIG_PROC_PAGE_MONITOR=y
890CONFIG_SYSFS=y 921CONFIG_SYSFS=y
891# CONFIG_HUGETLBFS is not set
892# CONFIG_HUGETLB_PAGE is not set 922# CONFIG_HUGETLB_PAGE is not set
893# CONFIG_CONFIGFS_FS is not set 923# CONFIG_CONFIGFS_FS is not set
894CONFIG_MISC_FILESYSTEMS=y 924CONFIG_MISC_FILESYSTEMS=y
@@ -1021,7 +1051,6 @@ CONFIG_BRANCH_PROFILE_NONE=y
1021CONFIG_HAVE_ARCH_KGDB=y 1051CONFIG_HAVE_ARCH_KGDB=y
1022# CONFIG_KGDB is not set 1052# CONFIG_KGDB is not set
1023# CONFIG_SH_STANDARD_BIOS is not set 1053# CONFIG_SH_STANDARD_BIOS is not set
1024# CONFIG_EARLY_SCIF_CONSOLE is not set
1025# CONFIG_STACK_DEBUG is not set 1054# CONFIG_STACK_DEBUG is not set
1026# CONFIG_DEBUG_STACK_USAGE is not set 1055# CONFIG_DEBUG_STACK_USAGE is not set
1027# CONFIG_4KSTACKS is not set 1056# CONFIG_4KSTACKS is not set
@@ -1035,7 +1064,11 @@ CONFIG_HAVE_ARCH_KGDB=y
1035# CONFIG_KEYS is not set 1064# CONFIG_KEYS is not set
1036# CONFIG_SECURITY is not set 1065# CONFIG_SECURITY is not set
1037# CONFIG_SECURITYFS is not set 1066# CONFIG_SECURITYFS is not set
1038# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1067# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1068# CONFIG_DEFAULT_SECURITY_SMACK is not set
1069# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1070CONFIG_DEFAULT_SECURITY_DAC=y
1071CONFIG_DEFAULT_SECURITY=""
1039CONFIG_CRYPTO=y 1072CONFIG_CRYPTO=y
1040 1073
1041# 1074#
diff --git a/arch/sh/configs/se7721_defconfig b/arch/sh/configs/se7721_defconfig
index b8a3c8c4bac3..201283c829a1 100644
--- a/arch/sh/configs/se7721_defconfig
+++ b/arch/sh/configs/se7721_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Thu Sep 24 18:57:11 2009 4# Mon Jan 4 13:46:58 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -29,6 +29,7 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
29CONFIG_ARCH_NO_VIRT_TO_BUS=y 29CONFIG_ARCH_NO_VIRT_TO_BUS=y
30CONFIG_ARCH_HAS_DEFAULT_IDLE=y 30CONFIG_ARCH_HAS_DEFAULT_IDLE=y
31CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 31CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
32CONFIG_DMA_NONCOHERENT=y
32CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 33CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
33CONFIG_CONSTRUCTORS=y 34CONFIG_CONSTRUCTORS=y
34 35
@@ -61,6 +62,7 @@ CONFIG_BSD_PROCESS_ACCT=y
61# 62#
62CONFIG_TREE_RCU=y 63CONFIG_TREE_RCU=y
63# CONFIG_TREE_PREEMPT_RCU is not set 64# CONFIG_TREE_PREEMPT_RCU is not set
65# CONFIG_TINY_RCU is not set
64# CONFIG_RCU_TRACE is not set 66# CONFIG_RCU_TRACE is not set
65CONFIG_RCU_FANOUT=32 67CONFIG_RCU_FANOUT=32
66# CONFIG_RCU_FANOUT_EXACT is not set 68# CONFIG_RCU_FANOUT_EXACT is not set
@@ -100,6 +102,7 @@ CONFIG_EVENTFD=y
100# CONFIG_SHMEM is not set 102# CONFIG_SHMEM is not set
101CONFIG_AIO=y 103CONFIG_AIO=y
102CONFIG_HAVE_PERF_EVENTS=y 104CONFIG_HAVE_PERF_EVENTS=y
105CONFIG_PERF_USE_VMALLOC=y
103 106
104# 107#
105# Kernel Performance Events And Counters 108# Kernel Performance Events And Counters
@@ -118,6 +121,7 @@ CONFIG_HAVE_IOREMAP_PROT=y
118CONFIG_HAVE_KPROBES=y 121CONFIG_HAVE_KPROBES=y
119CONFIG_HAVE_KRETPROBES=y 122CONFIG_HAVE_KRETPROBES=y
120CONFIG_HAVE_ARCH_TRACEHOOK=y 123CONFIG_HAVE_ARCH_TRACEHOOK=y
124CONFIG_HAVE_DMA_ATTRS=y
121CONFIG_HAVE_CLK=y 125CONFIG_HAVE_CLK=y
122CONFIG_HAVE_DMA_API_DEBUG=y 126CONFIG_HAVE_DMA_API_DEBUG=y
123 127
@@ -143,14 +147,41 @@ CONFIG_LBDAF=y
143# IO Schedulers 147# IO Schedulers
144# 148#
145CONFIG_IOSCHED_NOOP=y 149CONFIG_IOSCHED_NOOP=y
146# CONFIG_IOSCHED_AS is not set
147# CONFIG_IOSCHED_DEADLINE is not set 150# CONFIG_IOSCHED_DEADLINE is not set
148# CONFIG_IOSCHED_CFQ is not set 151# CONFIG_IOSCHED_CFQ is not set
149# CONFIG_DEFAULT_AS is not set
150# CONFIG_DEFAULT_DEADLINE is not set 152# CONFIG_DEFAULT_DEADLINE is not set
151# CONFIG_DEFAULT_CFQ is not set 153# CONFIG_DEFAULT_CFQ is not set
152CONFIG_DEFAULT_NOOP=y 154CONFIG_DEFAULT_NOOP=y
153CONFIG_DEFAULT_IOSCHED="noop" 155CONFIG_DEFAULT_IOSCHED="noop"
156# CONFIG_INLINE_SPIN_TRYLOCK is not set
157# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
158# CONFIG_INLINE_SPIN_LOCK is not set
159# CONFIG_INLINE_SPIN_LOCK_BH is not set
160# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
161# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
162CONFIG_INLINE_SPIN_UNLOCK=y
163# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
164CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
165# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
166# CONFIG_INLINE_READ_TRYLOCK is not set
167# CONFIG_INLINE_READ_LOCK is not set
168# CONFIG_INLINE_READ_LOCK_BH is not set
169# CONFIG_INLINE_READ_LOCK_IRQ is not set
170# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
171CONFIG_INLINE_READ_UNLOCK=y
172# CONFIG_INLINE_READ_UNLOCK_BH is not set
173CONFIG_INLINE_READ_UNLOCK_IRQ=y
174# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
175# CONFIG_INLINE_WRITE_TRYLOCK is not set
176# CONFIG_INLINE_WRITE_LOCK is not set
177# CONFIG_INLINE_WRITE_LOCK_BH is not set
178# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
179# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
180CONFIG_INLINE_WRITE_UNLOCK=y
181# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
182CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
183# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
184# CONFIG_MUTEX_SPIN_ON_OWNER is not set
154# CONFIG_FREEZER is not set 185# CONFIG_FREEZER is not set
155 186
156# 187#
@@ -226,8 +257,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
226# CONFIG_PHYS_ADDR_T_64BIT is not set 257# CONFIG_PHYS_ADDR_T_64BIT is not set
227CONFIG_ZONE_DMA_FLAG=0 258CONFIG_ZONE_DMA_FLAG=0
228CONFIG_NR_QUICK=2 259CONFIG_NR_QUICK=2
229CONFIG_HAVE_MLOCK=y
230CONFIG_HAVE_MLOCKED_PAGE_BIT=y
231# CONFIG_KSM is not set 260# CONFIG_KSM is not set
232CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 261CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
233 262
@@ -457,9 +486,6 @@ CONFIG_NET_SCH_FIFO=y
457CONFIG_FIB_RULES=y 486CONFIG_FIB_RULES=y
458CONFIG_WIRELESS=y 487CONFIG_WIRELESS=y
459# CONFIG_CFG80211 is not set 488# CONFIG_CFG80211 is not set
460CONFIG_CFG80211_DEFAULT_PS_VALUE=0
461# CONFIG_WIRELESS_OLD_REGULATORY is not set
462# CONFIG_WIRELESS_EXT is not set
463# CONFIG_LIB80211 is not set 489# CONFIG_LIB80211 is not set
464 490
465# 491#
@@ -570,6 +596,10 @@ CONFIG_MTD_CFI_UTIL=y
570CONFIG_BLK_DEV=y 596CONFIG_BLK_DEV=y
571# CONFIG_BLK_DEV_COW_COMMON is not set 597# CONFIG_BLK_DEV_COW_COMMON is not set
572# CONFIG_BLK_DEV_LOOP is not set 598# CONFIG_BLK_DEV_LOOP is not set
599
600#
601# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
602#
573# CONFIG_BLK_DEV_NBD is not set 603# CONFIG_BLK_DEV_NBD is not set
574# CONFIG_BLK_DEV_UB is not set 604# CONFIG_BLK_DEV_UB is not set
575# CONFIG_BLK_DEV_RAM is not set 605# CONFIG_BLK_DEV_RAM is not set
@@ -642,8 +672,8 @@ CONFIG_NETDEVICES=y
642CONFIG_NETDEV_1000=y 672CONFIG_NETDEV_1000=y
643CONFIG_NETDEV_10000=y 673CONFIG_NETDEV_10000=y
644CONFIG_WLAN=y 674CONFIG_WLAN=y
645# CONFIG_WLAN_PRE80211 is not set 675# CONFIG_USB_ZD1201 is not set
646# CONFIG_WLAN_80211 is not set 676# CONFIG_HOSTAP is not set
647 677
648# 678#
649# Enable WiMAX (Networking options) to see the WiMAX drivers 679# Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -672,6 +702,7 @@ CONFIG_WLAN=y
672CONFIG_INPUT=y 702CONFIG_INPUT=y
673CONFIG_INPUT_FF_MEMLESS=m 703CONFIG_INPUT_FF_MEMLESS=m
674# CONFIG_INPUT_POLLDEV is not set 704# CONFIG_INPUT_POLLDEV is not set
705# CONFIG_INPUT_SPARSEKMAP is not set
675 706
676# 707#
677# Userland interfaces 708# Userland interfaces
@@ -765,6 +796,7 @@ CONFIG_SSB_POSSIBLE=y
765# 796#
766# CONFIG_MFD_CORE is not set 797# CONFIG_MFD_CORE is not set
767# CONFIG_MFD_SM501 is not set 798# CONFIG_MFD_SM501 is not set
799# CONFIG_MFD_SH_MOBILE_SDHI is not set
768# CONFIG_HTC_PASIC3 is not set 800# CONFIG_HTC_PASIC3 is not set
769# CONFIG_MFD_TMIO is not set 801# CONFIG_MFD_TMIO is not set
770# CONFIG_REGULATOR is not set 802# CONFIG_REGULATOR is not set
@@ -1029,7 +1061,6 @@ CONFIG_PROC_FS=y
1029CONFIG_PROC_SYSCTL=y 1061CONFIG_PROC_SYSCTL=y
1030CONFIG_PROC_PAGE_MONITOR=y 1062CONFIG_PROC_PAGE_MONITOR=y
1031CONFIG_SYSFS=y 1063CONFIG_SYSFS=y
1032# CONFIG_HUGETLBFS is not set
1033# CONFIG_HUGETLB_PAGE is not set 1064# CONFIG_HUGETLB_PAGE is not set
1034# CONFIG_CONFIGFS_FS is not set 1065# CONFIG_CONFIGFS_FS is not set
1035CONFIG_MISC_FILESYSTEMS=y 1066CONFIG_MISC_FILESYSTEMS=y
@@ -1186,7 +1217,6 @@ CONFIG_BRANCH_PROFILE_NONE=y
1186CONFIG_HAVE_ARCH_KGDB=y 1217CONFIG_HAVE_ARCH_KGDB=y
1187# CONFIG_KGDB is not set 1218# CONFIG_KGDB is not set
1188# CONFIG_SH_STANDARD_BIOS is not set 1219# CONFIG_SH_STANDARD_BIOS is not set
1189# CONFIG_EARLY_SCIF_CONSOLE is not set
1190# CONFIG_STACK_DEBUG is not set 1220# CONFIG_STACK_DEBUG is not set
1191# CONFIG_DEBUG_STACK_USAGE is not set 1221# CONFIG_DEBUG_STACK_USAGE is not set
1192# CONFIG_4KSTACKS is not set 1222# CONFIG_4KSTACKS is not set
@@ -1200,7 +1230,11 @@ CONFIG_HAVE_ARCH_KGDB=y
1200# CONFIG_KEYS is not set 1230# CONFIG_KEYS is not set
1201# CONFIG_SECURITY is not set 1231# CONFIG_SECURITY is not set
1202# CONFIG_SECURITYFS is not set 1232# CONFIG_SECURITYFS is not set
1203# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1233# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1234# CONFIG_DEFAULT_SECURITY_SMACK is not set
1235# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1236CONFIG_DEFAULT_SECURITY_DAC=y
1237CONFIG_DEFAULT_SECURITY=""
1204CONFIG_CRYPTO=y 1238CONFIG_CRYPTO=y
1205 1239
1206# 1240#
diff --git a/arch/sh/configs/se7722_defconfig b/arch/sh/configs/se7722_defconfig
index d709b7f35ace..4a4efd261d03 100644
--- a/arch/sh/configs/se7722_defconfig
+++ b/arch/sh/configs/se7722_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Thu Sep 24 18:57:41 2009 4# Mon Jan 4 13:49:15 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -20,6 +20,7 @@ CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
21CONFIG_ARCH_SUSPEND_POSSIBLE=y 21CONFIG_ARCH_SUSPEND_POSSIBLE=y
22CONFIG_ARCH_HIBERNATION_POSSIBLE=y 22CONFIG_ARCH_HIBERNATION_POSSIBLE=y
23CONFIG_SYS_SUPPORTS_HUGETLBFS=y
23CONFIG_SYS_SUPPORTS_NUMA=y 24CONFIG_SYS_SUPPORTS_NUMA=y
24CONFIG_SYS_SUPPORTS_CMT=y 25CONFIG_SYS_SUPPORTS_CMT=y
25CONFIG_SYS_SUPPORTS_TMU=y 26CONFIG_SYS_SUPPORTS_TMU=y
@@ -31,6 +32,7 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
31CONFIG_ARCH_NO_VIRT_TO_BUS=y 32CONFIG_ARCH_NO_VIRT_TO_BUS=y
32CONFIG_ARCH_HAS_DEFAULT_IDLE=y 33CONFIG_ARCH_HAS_DEFAULT_IDLE=y
33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 34CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
35CONFIG_DMA_NONCOHERENT=y
34CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 36CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
35CONFIG_CONSTRUCTORS=y 37CONFIG_CONSTRUCTORS=y
36 38
@@ -63,6 +65,7 @@ CONFIG_BSD_PROCESS_ACCT=y
63# 65#
64CONFIG_TREE_RCU=y 66CONFIG_TREE_RCU=y
65# CONFIG_TREE_PREEMPT_RCU is not set 67# CONFIG_TREE_PREEMPT_RCU is not set
68# CONFIG_TINY_RCU is not set
66# CONFIG_RCU_TRACE is not set 69# CONFIG_RCU_TRACE is not set
67CONFIG_RCU_FANOUT=32 70CONFIG_RCU_FANOUT=32
68# CONFIG_RCU_FANOUT_EXACT is not set 71# CONFIG_RCU_FANOUT_EXACT is not set
@@ -102,6 +105,7 @@ CONFIG_EVENTFD=y
102CONFIG_SHMEM=y 105CONFIG_SHMEM=y
103CONFIG_AIO=y 106CONFIG_AIO=y
104CONFIG_HAVE_PERF_EVENTS=y 107CONFIG_HAVE_PERF_EVENTS=y
108CONFIG_PERF_USE_VMALLOC=y
105 109
106# 110#
107# Kernel Performance Events And Counters 111# Kernel Performance Events And Counters
@@ -122,6 +126,7 @@ CONFIG_HAVE_IOREMAP_PROT=y
122CONFIG_HAVE_KPROBES=y 126CONFIG_HAVE_KPROBES=y
123CONFIG_HAVE_KRETPROBES=y 127CONFIG_HAVE_KRETPROBES=y
124CONFIG_HAVE_ARCH_TRACEHOOK=y 128CONFIG_HAVE_ARCH_TRACEHOOK=y
129CONFIG_HAVE_DMA_ATTRS=y
125CONFIG_HAVE_CLK=y 130CONFIG_HAVE_CLK=y
126CONFIG_HAVE_DMA_API_DEBUG=y 131CONFIG_HAVE_DMA_API_DEBUG=y
127 132
@@ -149,14 +154,41 @@ CONFIG_LBDAF=y
149# IO Schedulers 154# IO Schedulers
150# 155#
151CONFIG_IOSCHED_NOOP=y 156CONFIG_IOSCHED_NOOP=y
152# CONFIG_IOSCHED_AS is not set
153# CONFIG_IOSCHED_DEADLINE is not set 157# CONFIG_IOSCHED_DEADLINE is not set
154# CONFIG_IOSCHED_CFQ is not set 158# CONFIG_IOSCHED_CFQ is not set
155# CONFIG_DEFAULT_AS is not set
156# CONFIG_DEFAULT_DEADLINE is not set 159# CONFIG_DEFAULT_DEADLINE is not set
157# CONFIG_DEFAULT_CFQ is not set 160# CONFIG_DEFAULT_CFQ is not set
158CONFIG_DEFAULT_NOOP=y 161CONFIG_DEFAULT_NOOP=y
159CONFIG_DEFAULT_IOSCHED="noop" 162CONFIG_DEFAULT_IOSCHED="noop"
163# CONFIG_INLINE_SPIN_TRYLOCK is not set
164# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
165# CONFIG_INLINE_SPIN_LOCK is not set
166# CONFIG_INLINE_SPIN_LOCK_BH is not set
167# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
168# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
169# CONFIG_INLINE_SPIN_UNLOCK is not set
170# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
171# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
172# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
173# CONFIG_INLINE_READ_TRYLOCK is not set
174# CONFIG_INLINE_READ_LOCK is not set
175# CONFIG_INLINE_READ_LOCK_BH is not set
176# CONFIG_INLINE_READ_LOCK_IRQ is not set
177# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
178# CONFIG_INLINE_READ_UNLOCK is not set
179# CONFIG_INLINE_READ_UNLOCK_BH is not set
180# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
181# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
182# CONFIG_INLINE_WRITE_TRYLOCK is not set
183# CONFIG_INLINE_WRITE_LOCK is not set
184# CONFIG_INLINE_WRITE_LOCK_BH is not set
185# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
186# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
187# CONFIG_INLINE_WRITE_UNLOCK is not set
188# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
189# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
190# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
191# CONFIG_MUTEX_SPIN_ON_OWNER is not set
160CONFIG_FREEZER=y 192CONFIG_FREEZER=y
161 193
162# 194#
@@ -248,8 +280,6 @@ CONFIG_MIGRATION=y
248# CONFIG_PHYS_ADDR_T_64BIT is not set 280# CONFIG_PHYS_ADDR_T_64BIT is not set
249CONFIG_ZONE_DMA_FLAG=0 281CONFIG_ZONE_DMA_FLAG=0
250CONFIG_NR_QUICK=2 282CONFIG_NR_QUICK=2
251CONFIG_HAVE_MLOCK=y
252CONFIG_HAVE_MLOCKED_PAGE_BIT=y
253# CONFIG_KSM is not set 283# CONFIG_KSM is not set
254CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 284CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
255 285
@@ -284,7 +314,6 @@ CONFIG_SH_7722_SOLUTION_ENGINE=y
284# 314#
285CONFIG_SH_TIMER_TMU=y 315CONFIG_SH_TIMER_TMU=y
286# CONFIG_SH_TIMER_CMT is not set 316# CONFIG_SH_TIMER_CMT is not set
287CONFIG_SH_PCLK_FREQ=33333333
288CONFIG_SH_CLK_CPG=y 317CONFIG_SH_CLK_CPG=y
289CONFIG_TICK_ONESHOT=y 318CONFIG_TICK_ONESHOT=y
290CONFIG_NO_HZ=y 319CONFIG_NO_HZ=y
@@ -436,9 +465,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
436# CONFIG_AF_RXRPC is not set 465# CONFIG_AF_RXRPC is not set
437CONFIG_WIRELESS=y 466CONFIG_WIRELESS=y
438# CONFIG_CFG80211 is not set 467# CONFIG_CFG80211 is not set
439CONFIG_CFG80211_DEFAULT_PS_VALUE=0
440# CONFIG_WIRELESS_OLD_REGULATORY is not set
441# CONFIG_WIRELESS_EXT is not set
442# CONFIG_LIB80211 is not set 468# CONFIG_LIB80211 is not set
443 469
444# 470#
@@ -467,6 +493,10 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
467CONFIG_BLK_DEV=y 493CONFIG_BLK_DEV=y
468# CONFIG_BLK_DEV_COW_COMMON is not set 494# CONFIG_BLK_DEV_COW_COMMON is not set
469# CONFIG_BLK_DEV_LOOP is not set 495# CONFIG_BLK_DEV_LOOP is not set
496
497#
498# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
499#
470# CONFIG_BLK_DEV_NBD is not set 500# CONFIG_BLK_DEV_NBD is not set
471CONFIG_BLK_DEV_RAM=y 501CONFIG_BLK_DEV_RAM=y
472CONFIG_BLK_DEV_RAM_COUNT=16 502CONFIG_BLK_DEV_RAM_COUNT=16
@@ -560,11 +590,11 @@ CONFIG_SMC91X=y
560# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set 590# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
561# CONFIG_B44 is not set 591# CONFIG_B44 is not set
562# CONFIG_KS8842 is not set 592# CONFIG_KS8842 is not set
593# CONFIG_KS8851_MLL is not set
563CONFIG_NETDEV_1000=y 594CONFIG_NETDEV_1000=y
564CONFIG_NETDEV_10000=y 595CONFIG_NETDEV_10000=y
565CONFIG_WLAN=y 596CONFIG_WLAN=y
566# CONFIG_WLAN_PRE80211 is not set 597# CONFIG_HOSTAP is not set
567# CONFIG_WLAN_80211 is not set
568 598
569# 599#
570# Enable WiMAX (Networking options) to see the WiMAX drivers 600# Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -584,6 +614,7 @@ CONFIG_WLAN=y
584CONFIG_INPUT=y 614CONFIG_INPUT=y
585# CONFIG_INPUT_FF_MEMLESS is not set 615# CONFIG_INPUT_FF_MEMLESS is not set
586# CONFIG_INPUT_POLLDEV is not set 616# CONFIG_INPUT_POLLDEV is not set
617# CONFIG_INPUT_SPARSEKMAP is not set
587 618
588# 619#
589# Userland interfaces 620# Userland interfaces
@@ -622,6 +653,7 @@ CONFIG_SERIO=y
622# CONFIG_SERIO_SERPORT is not set 653# CONFIG_SERIO_SERPORT is not set
623CONFIG_SERIO_LIBPS2=y 654CONFIG_SERIO_LIBPS2=y
624# CONFIG_SERIO_RAW is not set 655# CONFIG_SERIO_RAW is not set
656# CONFIG_SERIO_ALTERA_PS2 is not set
625# CONFIG_GAMEPORT is not set 657# CONFIG_GAMEPORT is not set
626 658
627# 659#
@@ -694,6 +726,7 @@ CONFIG_SSB_POSSIBLE=y
694# 726#
695# CONFIG_MFD_CORE is not set 727# CONFIG_MFD_CORE is not set
696# CONFIG_MFD_SM501 is not set 728# CONFIG_MFD_SM501 is not set
729# CONFIG_MFD_SH_MOBILE_SDHI is not set
697# CONFIG_HTC_PASIC3 is not set 730# CONFIG_HTC_PASIC3 is not set
698# CONFIG_MFD_TMIO is not set 731# CONFIG_MFD_TMIO is not set
699# CONFIG_REGULATOR is not set 732# CONFIG_REGULATOR is not set
@@ -774,7 +807,9 @@ CONFIG_RTC_INTF_DEV=y
774# CONFIG_RTC_DRV_M48T86 is not set 807# CONFIG_RTC_DRV_M48T86 is not set
775# CONFIG_RTC_DRV_M48T35 is not set 808# CONFIG_RTC_DRV_M48T35 is not set
776# CONFIG_RTC_DRV_M48T59 is not set 809# CONFIG_RTC_DRV_M48T59 is not set
810# CONFIG_RTC_DRV_MSM6242 is not set
777# CONFIG_RTC_DRV_BQ4802 is not set 811# CONFIG_RTC_DRV_BQ4802 is not set
812# CONFIG_RTC_DRV_RP5C01 is not set
778# CONFIG_RTC_DRV_V3020 is not set 813# CONFIG_RTC_DRV_V3020 is not set
779 814
780# 815#
@@ -906,7 +941,7 @@ CONFIG_DEBUG_FS=y
906# CONFIG_DEBUG_KERNEL is not set 941# CONFIG_DEBUG_KERNEL is not set
907# CONFIG_SLUB_DEBUG_ON is not set 942# CONFIG_SLUB_DEBUG_ON is not set
908# CONFIG_SLUB_STATS is not set 943# CONFIG_SLUB_STATS is not set
909# CONFIG_DEBUG_BUGVERBOSE is not set 944CONFIG_DEBUG_BUGVERBOSE=y
910# CONFIG_DEBUG_MEMORY_INIT is not set 945# CONFIG_DEBUG_MEMORY_INIT is not set
911# CONFIG_RCU_CPU_STALL_DETECTOR is not set 946# CONFIG_RCU_CPU_STALL_DETECTOR is not set
912# CONFIG_LATENCYTOP is not set 947# CONFIG_LATENCYTOP is not set
@@ -924,8 +959,6 @@ CONFIG_TRACING_SUPPORT=y
924# CONFIG_SAMPLES is not set 959# CONFIG_SAMPLES is not set
925CONFIG_HAVE_ARCH_KGDB=y 960CONFIG_HAVE_ARCH_KGDB=y
926CONFIG_SH_STANDARD_BIOS=y 961CONFIG_SH_STANDARD_BIOS=y
927# CONFIG_EARLY_SCIF_CONSOLE is not set
928# CONFIG_EARLY_PRINTK is not set
929# CONFIG_DWARF_UNWINDER is not set 962# CONFIG_DWARF_UNWINDER is not set
930 963
931# 964#
@@ -934,7 +967,11 @@ CONFIG_SH_STANDARD_BIOS=y
934# CONFIG_KEYS is not set 967# CONFIG_KEYS is not set
935# CONFIG_SECURITY is not set 968# CONFIG_SECURITY is not set
936# CONFIG_SECURITYFS is not set 969# CONFIG_SECURITYFS is not set
937# CONFIG_SECURITY_FILE_CAPABILITIES is not set 970# CONFIG_DEFAULT_SECURITY_SELINUX is not set
971# CONFIG_DEFAULT_SECURITY_SMACK is not set
972# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
973CONFIG_DEFAULT_SECURITY_DAC=y
974CONFIG_DEFAULT_SECURITY=""
938CONFIG_CRYPTO=y 975CONFIG_CRYPTO=y
939 976
940# 977#
diff --git a/arch/sh/configs/se7724_defconfig b/arch/sh/configs/se7724_defconfig
index 56b0b9ff9e05..ab371afe3595 100644
--- a/arch/sh/configs/se7724_defconfig
+++ b/arch/sh/configs/se7724_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Fri Sep 25 11:50:59 2009 4# Mon Jan 4 14:36:56 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -20,6 +20,7 @@ CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
21CONFIG_ARCH_SUSPEND_POSSIBLE=y 21CONFIG_ARCH_SUSPEND_POSSIBLE=y
22CONFIG_ARCH_HIBERNATION_POSSIBLE=y 22CONFIG_ARCH_HIBERNATION_POSSIBLE=y
23CONFIG_SYS_SUPPORTS_HUGETLBFS=y
23CONFIG_SYS_SUPPORTS_CMT=y 24CONFIG_SYS_SUPPORTS_CMT=y
24CONFIG_SYS_SUPPORTS_TMU=y 25CONFIG_SYS_SUPPORTS_TMU=y
25CONFIG_STACKTRACE_SUPPORT=y 26CONFIG_STACKTRACE_SUPPORT=y
@@ -30,6 +31,7 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
30CONFIG_ARCH_NO_VIRT_TO_BUS=y 31CONFIG_ARCH_NO_VIRT_TO_BUS=y
31CONFIG_ARCH_HAS_DEFAULT_IDLE=y 32CONFIG_ARCH_HAS_DEFAULT_IDLE=y
32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
34CONFIG_DMA_NONCOHERENT=y
33CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
34CONFIG_CONSTRUCTORS=y 36CONFIG_CONSTRUCTORS=y
35 37
@@ -62,6 +64,7 @@ CONFIG_BSD_PROCESS_ACCT=y
62# 64#
63CONFIG_TREE_RCU=y 65CONFIG_TREE_RCU=y
64# CONFIG_TREE_PREEMPT_RCU is not set 66# CONFIG_TREE_PREEMPT_RCU is not set
67# CONFIG_TINY_RCU is not set
65# CONFIG_RCU_TRACE is not set 68# CONFIG_RCU_TRACE is not set
66CONFIG_RCU_FANOUT=32 69CONFIG_RCU_FANOUT=32
67# CONFIG_RCU_FANOUT_EXACT is not set 70# CONFIG_RCU_FANOUT_EXACT is not set
@@ -99,6 +102,7 @@ CONFIG_EVENTFD=y
99CONFIG_SHMEM=y 102CONFIG_SHMEM=y
100CONFIG_AIO=y 103CONFIG_AIO=y
101CONFIG_HAVE_PERF_EVENTS=y 104CONFIG_HAVE_PERF_EVENTS=y
105CONFIG_PERF_USE_VMALLOC=y
102 106
103# 107#
104# Kernel Performance Events And Counters 108# Kernel Performance Events And Counters
@@ -116,6 +120,7 @@ CONFIG_HAVE_IOREMAP_PROT=y
116CONFIG_HAVE_KPROBES=y 120CONFIG_HAVE_KPROBES=y
117CONFIG_HAVE_KRETPROBES=y 121CONFIG_HAVE_KRETPROBES=y
118CONFIG_HAVE_ARCH_TRACEHOOK=y 122CONFIG_HAVE_ARCH_TRACEHOOK=y
123CONFIG_HAVE_DMA_ATTRS=y
119CONFIG_HAVE_CLK=y 124CONFIG_HAVE_CLK=y
120CONFIG_HAVE_DMA_API_DEBUG=y 125CONFIG_HAVE_DMA_API_DEBUG=y
121 126
@@ -142,14 +147,41 @@ CONFIG_LBDAF=y
142# IO Schedulers 147# IO Schedulers
143# 148#
144CONFIG_IOSCHED_NOOP=y 149CONFIG_IOSCHED_NOOP=y
145CONFIG_IOSCHED_AS=y
146CONFIG_IOSCHED_DEADLINE=y 150CONFIG_IOSCHED_DEADLINE=y
147CONFIG_IOSCHED_CFQ=y 151CONFIG_IOSCHED_CFQ=y
148# CONFIG_DEFAULT_AS is not set
149# CONFIG_DEFAULT_DEADLINE is not set 152# CONFIG_DEFAULT_DEADLINE is not set
150CONFIG_DEFAULT_CFQ=y 153CONFIG_DEFAULT_CFQ=y
151# CONFIG_DEFAULT_NOOP is not set 154# CONFIG_DEFAULT_NOOP is not set
152CONFIG_DEFAULT_IOSCHED="cfq" 155CONFIG_DEFAULT_IOSCHED="cfq"
156# CONFIG_INLINE_SPIN_TRYLOCK is not set
157# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
158# CONFIG_INLINE_SPIN_LOCK is not set
159# CONFIG_INLINE_SPIN_LOCK_BH is not set
160# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
161# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
162# CONFIG_INLINE_SPIN_UNLOCK is not set
163# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
164# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
165# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
166# CONFIG_INLINE_READ_TRYLOCK is not set
167# CONFIG_INLINE_READ_LOCK is not set
168# CONFIG_INLINE_READ_LOCK_BH is not set
169# CONFIG_INLINE_READ_LOCK_IRQ is not set
170# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
171# CONFIG_INLINE_READ_UNLOCK is not set
172# CONFIG_INLINE_READ_UNLOCK_BH is not set
173# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
174# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
175# CONFIG_INLINE_WRITE_TRYLOCK is not set
176# CONFIG_INLINE_WRITE_LOCK is not set
177# CONFIG_INLINE_WRITE_LOCK_BH is not set
178# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
179# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
180# CONFIG_INLINE_WRITE_UNLOCK is not set
181# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
182# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
183# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
184# CONFIG_MUTEX_SPIN_ON_OWNER is not set
153CONFIG_FREEZER=y 185CONFIG_FREEZER=y
154 186
155# 187#
@@ -205,6 +237,7 @@ CONFIG_FORCE_MAX_ZONEORDER=11
205CONFIG_MEMORY_START=0x08000000 237CONFIG_MEMORY_START=0x08000000
206CONFIG_MEMORY_SIZE=0x08000000 238CONFIG_MEMORY_SIZE=0x08000000
207CONFIG_29BIT=y 239CONFIG_29BIT=y
240# CONFIG_PMB_ENABLE is not set
208# CONFIG_X2TLB is not set 241# CONFIG_X2TLB is not set
209CONFIG_VSYSCALL=y 242CONFIG_VSYSCALL=y
210CONFIG_ARCH_FLATMEM_ENABLE=y 243CONFIG_ARCH_FLATMEM_ENABLE=y
@@ -229,8 +262,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
229# CONFIG_PHYS_ADDR_T_64BIT is not set 262# CONFIG_PHYS_ADDR_T_64BIT is not set
230CONFIG_ZONE_DMA_FLAG=0 263CONFIG_ZONE_DMA_FLAG=0
231CONFIG_NR_QUICK=2 264CONFIG_NR_QUICK=2
232CONFIG_HAVE_MLOCK=y
233CONFIG_HAVE_MLOCKED_PAGE_BIT=y
234# CONFIG_KSM is not set 265# CONFIG_KSM is not set
235CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 266CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
236 267
@@ -265,7 +296,6 @@ CONFIG_SH_7724_SOLUTION_ENGINE=y
265# 296#
266CONFIG_SH_TIMER_TMU=y 297CONFIG_SH_TIMER_TMU=y
267# CONFIG_SH_TIMER_CMT is not set 298# CONFIG_SH_TIMER_CMT is not set
268CONFIG_SH_PCLK_FREQ=33333333
269CONFIG_SH_CLK_CPG=y 299CONFIG_SH_CLK_CPG=y
270# CONFIG_NO_HZ is not set 300# CONFIG_NO_HZ is not set
271# CONFIG_HIGH_RES_TIMERS is not set 301# CONFIG_HIGH_RES_TIMERS is not set
@@ -279,8 +309,8 @@ CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
279# 309#
280# DMA support 310# DMA support
281# 311#
282CONFIG_SH_DMA_API=y
283CONFIG_SH_DMA=y 312CONFIG_SH_DMA=y
313CONFIG_SH_DMA_API=y
284CONFIG_NR_ONCHIP_DMA_CHANNELS=12 314CONFIG_NR_ONCHIP_DMA_CHANNELS=12
285# CONFIG_NR_DMA_CHANNELS_BOOL is not set 315# CONFIG_NR_DMA_CHANNELS_BOOL is not set
286 316
@@ -423,9 +453,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
423# CONFIG_AF_RXRPC is not set 453# CONFIG_AF_RXRPC is not set
424CONFIG_WIRELESS=y 454CONFIG_WIRELESS=y
425# CONFIG_CFG80211 is not set 455# CONFIG_CFG80211 is not set
426CONFIG_CFG80211_DEFAULT_PS_VALUE=0
427# CONFIG_WIRELESS_OLD_REGULATORY is not set
428# CONFIG_WIRELESS_EXT is not set
429# CONFIG_LIB80211 is not set 456# CONFIG_LIB80211 is not set
430 457
431# 458#
@@ -555,6 +582,10 @@ CONFIG_MTD_UBI_BEB_RESERVE=1
555CONFIG_BLK_DEV=y 582CONFIG_BLK_DEV=y
556# CONFIG_BLK_DEV_COW_COMMON is not set 583# CONFIG_BLK_DEV_COW_COMMON is not set
557# CONFIG_BLK_DEV_LOOP is not set 584# CONFIG_BLK_DEV_LOOP is not set
585
586#
587# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
588#
558# CONFIG_BLK_DEV_NBD is not set 589# CONFIG_BLK_DEV_NBD is not set
559# CONFIG_BLK_DEV_UB is not set 590# CONFIG_BLK_DEV_UB is not set
560CONFIG_BLK_DEV_RAM=y 591CONFIG_BLK_DEV_RAM=y
@@ -565,9 +596,12 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
565# CONFIG_ATA_OVER_ETH is not set 596# CONFIG_ATA_OVER_ETH is not set
566# CONFIG_BLK_DEV_HD is not set 597# CONFIG_BLK_DEV_HD is not set
567CONFIG_MISC_DEVICES=y 598CONFIG_MISC_DEVICES=y
599# CONFIG_AD525X_DPOT is not set
568# CONFIG_ICS932S401 is not set 600# CONFIG_ICS932S401 is not set
569# CONFIG_ENCLOSURE_SERVICES is not set 601# CONFIG_ENCLOSURE_SERVICES is not set
570# CONFIG_ISL29003 is not set 602# CONFIG_ISL29003 is not set
603# CONFIG_DS1682 is not set
604# CONFIG_TI_DAC7512 is not set
571# CONFIG_C2PORT is not set 605# CONFIG_C2PORT is not set
572 606
573# 607#
@@ -578,6 +612,7 @@ CONFIG_MISC_DEVICES=y
578# CONFIG_EEPROM_LEGACY is not set 612# CONFIG_EEPROM_LEGACY is not set
579# CONFIG_EEPROM_MAX6875 is not set 613# CONFIG_EEPROM_MAX6875 is not set
580# CONFIG_EEPROM_93CX6 is not set 614# CONFIG_EEPROM_93CX6 is not set
615# CONFIG_IWMC3200TOP is not set
581CONFIG_HAVE_IDE=y 616CONFIG_HAVE_IDE=y
582# CONFIG_IDE is not set 617# CONFIG_IDE is not set
583 618
@@ -672,11 +707,12 @@ CONFIG_SMC91X=y
672# CONFIG_B44 is not set 707# CONFIG_B44 is not set
673# CONFIG_KS8842 is not set 708# CONFIG_KS8842 is not set
674# CONFIG_KS8851 is not set 709# CONFIG_KS8851 is not set
710# CONFIG_KS8851_MLL is not set
675# CONFIG_NETDEV_1000 is not set 711# CONFIG_NETDEV_1000 is not set
676# CONFIG_NETDEV_10000 is not set 712# CONFIG_NETDEV_10000 is not set
677CONFIG_WLAN=y 713CONFIG_WLAN=y
678# CONFIG_WLAN_PRE80211 is not set 714# CONFIG_USB_ZD1201 is not set
679# CONFIG_WLAN_80211 is not set 715# CONFIG_HOSTAP is not set
680 716
681# 717#
682# Enable WiMAX (Networking options) to see the WiMAX drivers 718# Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -705,6 +741,7 @@ CONFIG_WLAN=y
705CONFIG_INPUT=y 741CONFIG_INPUT=y
706# CONFIG_INPUT_FF_MEMLESS is not set 742# CONFIG_INPUT_FF_MEMLESS is not set
707# CONFIG_INPUT_POLLDEV is not set 743# CONFIG_INPUT_POLLDEV is not set
744# CONFIG_INPUT_SPARSEKMAP is not set
708 745
709# 746#
710# Userland interfaces 747# Userland interfaces
@@ -813,7 +850,6 @@ CONFIG_I2C_SH_MOBILE=y
813# 850#
814# Miscellaneous I2C Chip support 851# Miscellaneous I2C Chip support
815# 852#
816# CONFIG_DS1682 is not set
817# CONFIG_SENSORS_TSL2550 is not set 853# CONFIG_SENSORS_TSL2550 is not set
818# CONFIG_I2C_DEBUG_CORE is not set 854# CONFIG_I2C_DEBUG_CORE is not set
819# CONFIG_I2C_DEBUG_ALGO is not set 855# CONFIG_I2C_DEBUG_ALGO is not set
@@ -827,7 +863,10 @@ CONFIG_SPI_MASTER=y
827# 863#
828CONFIG_SPI_BITBANG=y 864CONFIG_SPI_BITBANG=y
829# CONFIG_SPI_GPIO is not set 865# CONFIG_SPI_GPIO is not set
866# CONFIG_SPI_SH_MSIOF is not set
830# CONFIG_SPI_SH_SCI is not set 867# CONFIG_SPI_SH_SCI is not set
868# CONFIG_SPI_XILINX is not set
869# CONFIG_SPI_DESIGNWARE is not set
831 870
832# 871#
833# SPI Protocol Masters 872# SPI Protocol Masters
@@ -885,11 +924,13 @@ CONFIG_SSB_POSSIBLE=y
885# 924#
886# CONFIG_MFD_CORE is not set 925# CONFIG_MFD_CORE is not set
887# CONFIG_MFD_SM501 is not set 926# CONFIG_MFD_SM501 is not set
927# CONFIG_MFD_SH_MOBILE_SDHI is not set
888# CONFIG_HTC_PASIC3 is not set 928# CONFIG_HTC_PASIC3 is not set
889# CONFIG_TPS65010 is not set 929# CONFIG_TPS65010 is not set
890# CONFIG_TWL4030_CORE is not set 930# CONFIG_TWL4030_CORE is not set
891# CONFIG_MFD_TMIO is not set 931# CONFIG_MFD_TMIO is not set
892# CONFIG_PMIC_DA903X is not set 932# CONFIG_PMIC_DA903X is not set
933# CONFIG_PMIC_ADP5520 is not set
893# CONFIG_MFD_WM8400 is not set 934# CONFIG_MFD_WM8400 is not set
894# CONFIG_MFD_WM831X is not set 935# CONFIG_MFD_WM831X is not set
895# CONFIG_MFD_WM8350_I2C is not set 936# CONFIG_MFD_WM8350_I2C is not set
@@ -897,6 +938,8 @@ CONFIG_SSB_POSSIBLE=y
897# CONFIG_MFD_MC13783 is not set 938# CONFIG_MFD_MC13783 is not set
898# CONFIG_AB3100_CORE is not set 939# CONFIG_AB3100_CORE is not set
899# CONFIG_EZX_PCAP is not set 940# CONFIG_EZX_PCAP is not set
941# CONFIG_MFD_88PM8607 is not set
942# CONFIG_AB4500_CORE is not set
900# CONFIG_REGULATOR is not set 943# CONFIG_REGULATOR is not set
901CONFIG_MEDIA_SUPPORT=y 944CONFIG_MEDIA_SUPPORT=y
902 945
@@ -913,6 +956,8 @@ CONFIG_VIDEO_MEDIA=m
913# 956#
914# Multimedia drivers 957# Multimedia drivers
915# 958#
959CONFIG_IR_CORE=y
960CONFIG_VIDEO_IR=y
916# CONFIG_MEDIA_ATTACH is not set 961# CONFIG_MEDIA_ATTACH is not set
917CONFIG_MEDIA_TUNER=m 962CONFIG_MEDIA_TUNER=m
918# CONFIG_MEDIA_TUNER_CUSTOMISE is not set 963# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
@@ -932,6 +977,7 @@ CONFIG_VIDEO_CAPTURE_DRIVERS=y
932# CONFIG_VIDEO_ADV_DEBUG is not set 977# CONFIG_VIDEO_ADV_DEBUG is not set
933# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set 978# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
934CONFIG_VIDEO_HELPER_CHIPS_AUTO=y 979CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
980CONFIG_VIDEO_IR_I2C=y
935# CONFIG_VIDEO_VIVI is not set 981# CONFIG_VIDEO_VIVI is not set
936# CONFIG_VIDEO_SAA5246A is not set 982# CONFIG_VIDEO_SAA5246A is not set
937# CONFIG_VIDEO_SAA5249 is not set 983# CONFIG_VIDEO_SAA5249 is not set
@@ -940,10 +986,13 @@ CONFIG_SOC_CAMERA=y
940# CONFIG_SOC_CAMERA_MT9M001 is not set 986# CONFIG_SOC_CAMERA_MT9M001 is not set
941# CONFIG_SOC_CAMERA_MT9M111 is not set 987# CONFIG_SOC_CAMERA_MT9M111 is not set
942# CONFIG_SOC_CAMERA_MT9T031 is not set 988# CONFIG_SOC_CAMERA_MT9T031 is not set
989# CONFIG_SOC_CAMERA_MT9T112 is not set
943# CONFIG_SOC_CAMERA_MT9V022 is not set 990# CONFIG_SOC_CAMERA_MT9V022 is not set
991# CONFIG_SOC_CAMERA_RJ54N1 is not set
944# CONFIG_SOC_CAMERA_TW9910 is not set 992# CONFIG_SOC_CAMERA_TW9910 is not set
945# CONFIG_SOC_CAMERA_PLATFORM is not set 993# CONFIG_SOC_CAMERA_PLATFORM is not set
946CONFIG_SOC_CAMERA_OV772X=y 994CONFIG_SOC_CAMERA_OV772X=y
995# CONFIG_SOC_CAMERA_OV9640 is not set
947CONFIG_VIDEO_SH_MOBILE_CEU=y 996CONFIG_VIDEO_SH_MOBILE_CEU=y
948CONFIG_V4L_USB_DRIVERS=y 997CONFIG_V4L_USB_DRIVERS=y
949# CONFIG_USB_VIDEO_CLASS is not set 998# CONFIG_USB_VIDEO_CLASS is not set
@@ -961,6 +1010,7 @@ CONFIG_USB_GSPCA=m
961# CONFIG_USB_GSPCA_OV519 is not set 1010# CONFIG_USB_GSPCA_OV519 is not set
962# CONFIG_USB_GSPCA_OV534 is not set 1011# CONFIG_USB_GSPCA_OV534 is not set
963# CONFIG_USB_GSPCA_PAC207 is not set 1012# CONFIG_USB_GSPCA_PAC207 is not set
1013# CONFIG_USB_GSPCA_PAC7302 is not set
964# CONFIG_USB_GSPCA_PAC7311 is not set 1014# CONFIG_USB_GSPCA_PAC7311 is not set
965# CONFIG_USB_GSPCA_SN9C20X is not set 1015# CONFIG_USB_GSPCA_SN9C20X is not set
966# CONFIG_USB_GSPCA_SONIXB is not set 1016# CONFIG_USB_GSPCA_SONIXB is not set
@@ -974,6 +1024,7 @@ CONFIG_USB_GSPCA=m
974# CONFIG_USB_GSPCA_SQ905 is not set 1024# CONFIG_USB_GSPCA_SQ905 is not set
975# CONFIG_USB_GSPCA_SQ905C is not set 1025# CONFIG_USB_GSPCA_SQ905C is not set
976# CONFIG_USB_GSPCA_STK014 is not set 1026# CONFIG_USB_GSPCA_STK014 is not set
1027# CONFIG_USB_GSPCA_STV0680 is not set
977# CONFIG_USB_GSPCA_SUNPLUS is not set 1028# CONFIG_USB_GSPCA_SUNPLUS is not set
978# CONFIG_USB_GSPCA_T613 is not set 1029# CONFIG_USB_GSPCA_T613 is not set
979# CONFIG_USB_GSPCA_TV8532 is not set 1030# CONFIG_USB_GSPCA_TV8532 is not set
@@ -1110,9 +1161,11 @@ CONFIG_SND_SOC_WM_HUBS=m
1110CONFIG_SND_SOC_AD1836=m 1161CONFIG_SND_SOC_AD1836=m
1111CONFIG_SND_SOC_AD1938=m 1162CONFIG_SND_SOC_AD1938=m
1112CONFIG_SND_SOC_AD73311=m 1163CONFIG_SND_SOC_AD73311=m
1164CONFIG_SND_SOC_ADS117X=m
1113CONFIG_SND_SOC_AK4104=m 1165CONFIG_SND_SOC_AK4104=m
1114CONFIG_SND_SOC_AK4535=m 1166CONFIG_SND_SOC_AK4535=m
1115CONFIG_SND_SOC_AK4642=m 1167CONFIG_SND_SOC_AK4642=m
1168CONFIG_SND_SOC_AK4671=m
1116CONFIG_SND_SOC_CS4270=m 1169CONFIG_SND_SOC_CS4270=m
1117CONFIG_SND_SOC_L3=m 1170CONFIG_SND_SOC_L3=m
1118CONFIG_SND_SOC_PCM3008=m 1171CONFIG_SND_SOC_PCM3008=m
@@ -1121,11 +1174,14 @@ CONFIG_SND_SOC_SSM2602=m
1121CONFIG_SND_SOC_TLV320AIC23=m 1174CONFIG_SND_SOC_TLV320AIC23=m
1122CONFIG_SND_SOC_TLV320AIC26=m 1175CONFIG_SND_SOC_TLV320AIC26=m
1123CONFIG_SND_SOC_TLV320AIC3X=m 1176CONFIG_SND_SOC_TLV320AIC3X=m
1177CONFIG_SND_SOC_TLV320DAC33=m
1124CONFIG_SND_SOC_UDA134X=m 1178CONFIG_SND_SOC_UDA134X=m
1125CONFIG_SND_SOC_UDA1380=m 1179CONFIG_SND_SOC_UDA1380=m
1126CONFIG_SND_SOC_WM8510=m 1180CONFIG_SND_SOC_WM8510=m
1127CONFIG_SND_SOC_WM8523=m 1181CONFIG_SND_SOC_WM8523=m
1128CONFIG_SND_SOC_WM8580=m 1182CONFIG_SND_SOC_WM8580=m
1183CONFIG_SND_SOC_WM8711=m
1184CONFIG_SND_SOC_WM8727=m
1129CONFIG_SND_SOC_WM8728=m 1185CONFIG_SND_SOC_WM8728=m
1130CONFIG_SND_SOC_WM8731=m 1186CONFIG_SND_SOC_WM8731=m
1131CONFIG_SND_SOC_WM8750=m 1187CONFIG_SND_SOC_WM8750=m
@@ -1143,6 +1199,7 @@ CONFIG_SND_SOC_WM8990=m
1143CONFIG_SND_SOC_WM8993=m 1199CONFIG_SND_SOC_WM8993=m
1144CONFIG_SND_SOC_WM9081=m 1200CONFIG_SND_SOC_WM9081=m
1145CONFIG_SND_SOC_MAX9877=m 1201CONFIG_SND_SOC_MAX9877=m
1202CONFIG_SND_SOC_TPA6130A2=m
1146# CONFIG_SOUND_PRIME is not set 1203# CONFIG_SOUND_PRIME is not set
1147CONFIG_HID_SUPPORT=y 1204CONFIG_HID_SUPPORT=y
1148CONFIG_HID=y 1205CONFIG_HID=y
@@ -1316,10 +1373,12 @@ CONFIG_USB_ETH_RNDIS=y
1316CONFIG_USB_GADGETFS=m 1373CONFIG_USB_GADGETFS=m
1317CONFIG_USB_FILE_STORAGE=m 1374CONFIG_USB_FILE_STORAGE=m
1318# CONFIG_USB_FILE_STORAGE_TEST is not set 1375# CONFIG_USB_FILE_STORAGE_TEST is not set
1376# CONFIG_USB_MASS_STORAGE is not set
1319CONFIG_USB_G_SERIAL=m 1377CONFIG_USB_G_SERIAL=m
1320# CONFIG_USB_MIDI_GADGET is not set 1378# CONFIG_USB_MIDI_GADGET is not set
1321# CONFIG_USB_G_PRINTER is not set 1379# CONFIG_USB_G_PRINTER is not set
1322# CONFIG_USB_CDC_COMPOSITE is not set 1380# CONFIG_USB_CDC_COMPOSITE is not set
1381# CONFIG_USB_G_MULTI is not set
1323 1382
1324# 1383#
1325# OTG and related infrastructure 1384# OTG and related infrastructure
@@ -1345,6 +1404,7 @@ CONFIG_MMC_BLOCK_BOUNCE=y
1345# CONFIG_MMC_AT91 is not set 1404# CONFIG_MMC_AT91 is not set
1346# CONFIG_MMC_ATMELMCI is not set 1405# CONFIG_MMC_ATMELMCI is not set
1347CONFIG_MMC_SPI=y 1406CONFIG_MMC_SPI=y
1407# CONFIG_MMC_TMIO is not set
1348# CONFIG_MEMSTICK is not set 1408# CONFIG_MEMSTICK is not set
1349# CONFIG_NEW_LEDS is not set 1409# CONFIG_NEW_LEDS is not set
1350# CONFIG_ACCESSIBILITY is not set 1410# CONFIG_ACCESSIBILITY is not set
@@ -1376,6 +1436,7 @@ CONFIG_RTC_INTF_DEV=y
1376CONFIG_RTC_DRV_PCF8563=y 1436CONFIG_RTC_DRV_PCF8563=y
1377# CONFIG_RTC_DRV_PCF8583 is not set 1437# CONFIG_RTC_DRV_PCF8583 is not set
1378# CONFIG_RTC_DRV_M41T80 is not set 1438# CONFIG_RTC_DRV_M41T80 is not set
1439# CONFIG_RTC_DRV_BQ32K is not set
1379# CONFIG_RTC_DRV_S35390A is not set 1440# CONFIG_RTC_DRV_S35390A is not set
1380# CONFIG_RTC_DRV_FM3130 is not set 1441# CONFIG_RTC_DRV_FM3130 is not set
1381# CONFIG_RTC_DRV_RX8581 is not set 1442# CONFIG_RTC_DRV_RX8581 is not set
@@ -1404,7 +1465,9 @@ CONFIG_RTC_DRV_PCF8563=y
1404# CONFIG_RTC_DRV_M48T86 is not set 1465# CONFIG_RTC_DRV_M48T86 is not set
1405# CONFIG_RTC_DRV_M48T35 is not set 1466# CONFIG_RTC_DRV_M48T35 is not set
1406# CONFIG_RTC_DRV_M48T59 is not set 1467# CONFIG_RTC_DRV_M48T59 is not set
1468# CONFIG_RTC_DRV_MSM6242 is not set
1407# CONFIG_RTC_DRV_BQ4802 is not set 1469# CONFIG_RTC_DRV_BQ4802 is not set
1470# CONFIG_RTC_DRV_RP5C01 is not set
1408# CONFIG_RTC_DRV_V3020 is not set 1471# CONFIG_RTC_DRV_V3020 is not set
1409 1472
1410# 1473#
@@ -1597,7 +1660,7 @@ CONFIG_FRAME_WARN=1024
1597# CONFIG_DEBUG_FS is not set 1660# CONFIG_DEBUG_FS is not set
1598# CONFIG_HEADERS_CHECK is not set 1661# CONFIG_HEADERS_CHECK is not set
1599# CONFIG_DEBUG_KERNEL is not set 1662# CONFIG_DEBUG_KERNEL is not set
1600# CONFIG_DEBUG_BUGVERBOSE is not set 1663CONFIG_DEBUG_BUGVERBOSE=y
1601# CONFIG_DEBUG_MEMORY_INIT is not set 1664# CONFIG_DEBUG_MEMORY_INIT is not set
1602# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1665# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1603# CONFIG_LATENCYTOP is not set 1666# CONFIG_LATENCYTOP is not set
@@ -1614,7 +1677,6 @@ CONFIG_TRACING_SUPPORT=y
1614# CONFIG_SAMPLES is not set 1677# CONFIG_SAMPLES is not set
1615CONFIG_HAVE_ARCH_KGDB=y 1678CONFIG_HAVE_ARCH_KGDB=y
1616# CONFIG_SH_STANDARD_BIOS is not set 1679# CONFIG_SH_STANDARD_BIOS is not set
1617# CONFIG_EARLY_SCIF_CONSOLE is not set
1618# CONFIG_DWARF_UNWINDER is not set 1680# CONFIG_DWARF_UNWINDER is not set
1619 1681
1620# 1682#
@@ -1623,7 +1685,11 @@ CONFIG_HAVE_ARCH_KGDB=y
1623# CONFIG_KEYS is not set 1685# CONFIG_KEYS is not set
1624# CONFIG_SECURITY is not set 1686# CONFIG_SECURITY is not set
1625# CONFIG_SECURITYFS is not set 1687# CONFIG_SECURITYFS is not set
1626# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1688# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1689# CONFIG_DEFAULT_SECURITY_SMACK is not set
1690# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1691CONFIG_DEFAULT_SECURITY_DAC=y
1692CONFIG_DEFAULT_SECURITY=""
1627CONFIG_CRYPTO=y 1693CONFIG_CRYPTO=y
1628 1694
1629# 1695#
diff --git a/arch/sh/configs/se7750_defconfig b/arch/sh/configs/se7750_defconfig
index 7bc926c17b79..b15a44e2ec43 100644
--- a/arch/sh/configs/se7750_defconfig
+++ b/arch/sh/configs/se7750_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Thu Sep 24 18:58:58 2009 4# Mon Jan 4 14:39:10 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -20,6 +20,7 @@ CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set 21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
22CONFIG_ARCH_HIBERNATION_POSSIBLE=y 22CONFIG_ARCH_HIBERNATION_POSSIBLE=y
23CONFIG_SYS_SUPPORTS_HUGETLBFS=y
23CONFIG_SYS_SUPPORTS_TMU=y 24CONFIG_SYS_SUPPORTS_TMU=y
24CONFIG_STACKTRACE_SUPPORT=y 25CONFIG_STACKTRACE_SUPPORT=y
25CONFIG_LOCKDEP_SUPPORT=y 26CONFIG_LOCKDEP_SUPPORT=y
@@ -29,6 +30,7 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
29CONFIG_ARCH_NO_VIRT_TO_BUS=y 30CONFIG_ARCH_NO_VIRT_TO_BUS=y
30CONFIG_ARCH_HAS_DEFAULT_IDLE=y 31CONFIG_ARCH_HAS_DEFAULT_IDLE=y
31CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
33CONFIG_DMA_NONCOHERENT=y
32CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 34CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
33CONFIG_CONSTRUCTORS=y 35CONFIG_CONSTRUCTORS=y
34 36
@@ -60,6 +62,7 @@ CONFIG_BSD_PROCESS_ACCT=y
60# 62#
61CONFIG_TREE_RCU=y 63CONFIG_TREE_RCU=y
62# CONFIG_TREE_PREEMPT_RCU is not set 64# CONFIG_TREE_PREEMPT_RCU is not set
65# CONFIG_TINY_RCU is not set
63# CONFIG_RCU_TRACE is not set 66# CONFIG_RCU_TRACE is not set
64CONFIG_RCU_FANOUT=32 67CONFIG_RCU_FANOUT=32
65# CONFIG_RCU_FANOUT_EXACT is not set 68# CONFIG_RCU_FANOUT_EXACT is not set
@@ -95,6 +98,7 @@ CONFIG_EVENTFD=y
95CONFIG_SHMEM=y 98CONFIG_SHMEM=y
96CONFIG_AIO=y 99CONFIG_AIO=y
97CONFIG_HAVE_PERF_EVENTS=y 100CONFIG_HAVE_PERF_EVENTS=y
101CONFIG_PERF_USE_VMALLOC=y
98 102
99# 103#
100# Kernel Performance Events And Counters 104# Kernel Performance Events And Counters
@@ -113,6 +117,7 @@ CONFIG_HAVE_IOREMAP_PROT=y
113CONFIG_HAVE_KPROBES=y 117CONFIG_HAVE_KPROBES=y
114CONFIG_HAVE_KRETPROBES=y 118CONFIG_HAVE_KRETPROBES=y
115CONFIG_HAVE_ARCH_TRACEHOOK=y 119CONFIG_HAVE_ARCH_TRACEHOOK=y
120CONFIG_HAVE_DMA_ATTRS=y
116CONFIG_HAVE_CLK=y 121CONFIG_HAVE_CLK=y
117CONFIG_HAVE_DMA_API_DEBUG=y 122CONFIG_HAVE_DMA_API_DEBUG=y
118 123
@@ -138,14 +143,41 @@ CONFIG_LBDAF=y
138# IO Schedulers 143# IO Schedulers
139# 144#
140CONFIG_IOSCHED_NOOP=y 145CONFIG_IOSCHED_NOOP=y
141CONFIG_IOSCHED_AS=y
142CONFIG_IOSCHED_DEADLINE=y 146CONFIG_IOSCHED_DEADLINE=y
143CONFIG_IOSCHED_CFQ=y 147CONFIG_IOSCHED_CFQ=y
144CONFIG_DEFAULT_AS=y
145# CONFIG_DEFAULT_DEADLINE is not set 148# CONFIG_DEFAULT_DEADLINE is not set
146# CONFIG_DEFAULT_CFQ is not set 149CONFIG_DEFAULT_CFQ=y
147# CONFIG_DEFAULT_NOOP is not set 150# CONFIG_DEFAULT_NOOP is not set
148CONFIG_DEFAULT_IOSCHED="anticipatory" 151CONFIG_DEFAULT_IOSCHED="cfq"
152# CONFIG_INLINE_SPIN_TRYLOCK is not set
153# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
154# CONFIG_INLINE_SPIN_LOCK is not set
155# CONFIG_INLINE_SPIN_LOCK_BH is not set
156# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
157# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
158CONFIG_INLINE_SPIN_UNLOCK=y
159# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
160CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
161# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
162# CONFIG_INLINE_READ_TRYLOCK is not set
163# CONFIG_INLINE_READ_LOCK is not set
164# CONFIG_INLINE_READ_LOCK_BH is not set
165# CONFIG_INLINE_READ_LOCK_IRQ is not set
166# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
167CONFIG_INLINE_READ_UNLOCK=y
168# CONFIG_INLINE_READ_UNLOCK_BH is not set
169CONFIG_INLINE_READ_UNLOCK_IRQ=y
170# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
171# CONFIG_INLINE_WRITE_TRYLOCK is not set
172# CONFIG_INLINE_WRITE_LOCK is not set
173# CONFIG_INLINE_WRITE_LOCK_BH is not set
174# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
175# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
176CONFIG_INLINE_WRITE_UNLOCK=y
177# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
178CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
179# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
180# CONFIG_MUTEX_SPIN_ON_OWNER is not set
149# CONFIG_FREEZER is not set 181# CONFIG_FREEZER is not set
150 182
151# 183#
@@ -221,8 +253,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
221# CONFIG_PHYS_ADDR_T_64BIT is not set 253# CONFIG_PHYS_ADDR_T_64BIT is not set
222CONFIG_ZONE_DMA_FLAG=0 254CONFIG_ZONE_DMA_FLAG=0
223CONFIG_NR_QUICK=2 255CONFIG_NR_QUICK=2
224CONFIG_HAVE_MLOCK=y
225CONFIG_HAVE_MLOCKED_PAGE_BIT=y
226# CONFIG_KSM is not set 256# CONFIG_KSM is not set
227CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 257CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
228 258
@@ -307,7 +337,6 @@ CONFIG_GUSA=y
307CONFIG_ZERO_PAGE_OFFSET=0x00001000 337CONFIG_ZERO_PAGE_OFFSET=0x00001000
308CONFIG_BOOT_LINK_OFFSET=0x00800000 338CONFIG_BOOT_LINK_OFFSET=0x00800000
309CONFIG_ENTRY_OFFSET=0x00001000 339CONFIG_ENTRY_OFFSET=0x00001000
310# CONFIG_UBC_WAKEUP is not set
311# CONFIG_CMDLINE_OVERWRITE is not set 340# CONFIG_CMDLINE_OVERWRITE is not set
312# CONFIG_CMDLINE_EXTEND is not set 341# CONFIG_CMDLINE_EXTEND is not set
313 342
@@ -406,9 +435,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
406# CONFIG_AF_RXRPC is not set 435# CONFIG_AF_RXRPC is not set
407CONFIG_WIRELESS=y 436CONFIG_WIRELESS=y
408# CONFIG_CFG80211 is not set 437# CONFIG_CFG80211 is not set
409CONFIG_CFG80211_DEFAULT_PS_VALUE=0
410# CONFIG_WIRELESS_OLD_REGULATORY is not set
411# CONFIG_WIRELESS_EXT is not set
412# CONFIG_LIB80211 is not set 438# CONFIG_LIB80211 is not set
413 439
414# 440#
@@ -513,6 +539,10 @@ CONFIG_MTD_ROM=y
513CONFIG_BLK_DEV=y 539CONFIG_BLK_DEV=y
514# CONFIG_BLK_DEV_COW_COMMON is not set 540# CONFIG_BLK_DEV_COW_COMMON is not set
515# CONFIG_BLK_DEV_LOOP is not set 541# CONFIG_BLK_DEV_LOOP is not set
542
543#
544# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
545#
516# CONFIG_BLK_DEV_NBD is not set 546# CONFIG_BLK_DEV_NBD is not set
517# CONFIG_BLK_DEV_RAM is not set 547# CONFIG_BLK_DEV_RAM is not set
518# CONFIG_CDROM_PKTCDVD is not set 548# CONFIG_CDROM_PKTCDVD is not set
@@ -615,11 +645,11 @@ CONFIG_STNIC=y
615# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set 645# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
616# CONFIG_B44 is not set 646# CONFIG_B44 is not set
617# CONFIG_KS8842 is not set 647# CONFIG_KS8842 is not set
648# CONFIG_KS8851_MLL is not set
618CONFIG_NETDEV_1000=y 649CONFIG_NETDEV_1000=y
619CONFIG_NETDEV_10000=y 650CONFIG_NETDEV_10000=y
620CONFIG_WLAN=y 651CONFIG_WLAN=y
621# CONFIG_WLAN_PRE80211 is not set 652# CONFIG_HOSTAP is not set
622# CONFIG_WLAN_80211 is not set
623 653
624# 654#
625# Enable WiMAX (Networking options) to see the WiMAX drivers 655# Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -726,6 +756,7 @@ CONFIG_SSB_POSSIBLE=y
726# 756#
727# CONFIG_MFD_CORE is not set 757# CONFIG_MFD_CORE is not set
728# CONFIG_MFD_SM501 is not set 758# CONFIG_MFD_SM501 is not set
759# CONFIG_MFD_SH_MOBILE_SDHI is not set
729# CONFIG_HTC_PASIC3 is not set 760# CONFIG_HTC_PASIC3 is not set
730# CONFIG_MFD_TMIO is not set 761# CONFIG_MFD_TMIO is not set
731# CONFIG_REGULATOR is not set 762# CONFIG_REGULATOR is not set
@@ -785,6 +816,7 @@ CONFIG_RTC_LIB=y
785# CONFIG_EXT2_FS is not set 816# CONFIG_EXT2_FS is not set
786# CONFIG_EXT3_FS is not set 817# CONFIG_EXT3_FS is not set
787# CONFIG_EXT4_FS is not set 818# CONFIG_EXT4_FS is not set
819CONFIG_EXT4_USE_FOR_EXT23=y
788# CONFIG_REISERFS_FS is not set 820# CONFIG_REISERFS_FS is not set
789# CONFIG_JFS_FS is not set 821# CONFIG_JFS_FS is not set
790# CONFIG_FS_POSIX_ACL is not set 822# CONFIG_FS_POSIX_ACL is not set
@@ -914,10 +946,11 @@ CONFIG_FRAME_WARN=1024
914# CONFIG_DEBUG_FS is not set 946# CONFIG_DEBUG_FS is not set
915# CONFIG_HEADERS_CHECK is not set 947# CONFIG_HEADERS_CHECK is not set
916# CONFIG_DEBUG_KERNEL is not set 948# CONFIG_DEBUG_KERNEL is not set
917# CONFIG_DEBUG_BUGVERBOSE is not set 949CONFIG_DEBUG_BUGVERBOSE=y
918# CONFIG_DEBUG_MEMORY_INIT is not set 950# CONFIG_DEBUG_MEMORY_INIT is not set
919# CONFIG_RCU_CPU_STALL_DETECTOR is not set 951# CONFIG_RCU_CPU_STALL_DETECTOR is not set
920# CONFIG_LATENCYTOP is not set 952# CONFIG_LATENCYTOP is not set
953# CONFIG_SYSCTL_SYSCALL_CHECK is not set
921CONFIG_HAVE_FUNCTION_TRACER=y 954CONFIG_HAVE_FUNCTION_TRACER=y
922CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 955CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
923CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y 956CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
@@ -930,7 +963,6 @@ CONFIG_TRACING_SUPPORT=y
930# CONFIG_SAMPLES is not set 963# CONFIG_SAMPLES is not set
931CONFIG_HAVE_ARCH_KGDB=y 964CONFIG_HAVE_ARCH_KGDB=y
932# CONFIG_SH_STANDARD_BIOS is not set 965# CONFIG_SH_STANDARD_BIOS is not set
933# CONFIG_EARLY_SCIF_CONSOLE is not set
934# CONFIG_DWARF_UNWINDER is not set 966# CONFIG_DWARF_UNWINDER is not set
935 967
936# 968#
@@ -939,7 +971,11 @@ CONFIG_HAVE_ARCH_KGDB=y
939# CONFIG_KEYS is not set 971# CONFIG_KEYS is not set
940# CONFIG_SECURITY is not set 972# CONFIG_SECURITY is not set
941# CONFIG_SECURITYFS is not set 973# CONFIG_SECURITYFS is not set
942# CONFIG_SECURITY_FILE_CAPABILITIES is not set 974# CONFIG_DEFAULT_SECURITY_SELINUX is not set
975# CONFIG_DEFAULT_SECURITY_SMACK is not set
976# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
977CONFIG_DEFAULT_SECURITY_DAC=y
978CONFIG_DEFAULT_SECURITY=""
943CONFIG_CRYPTO=y 979CONFIG_CRYPTO=y
944 980
945# 981#
diff --git a/arch/sh/configs/se7751_defconfig b/arch/sh/configs/se7751_defconfig
index c20ae5e35c81..d1effdeaa416 100644
--- a/arch/sh/configs/se7751_defconfig
+++ b/arch/sh/configs/se7751_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Thu Sep 24 19:01:41 2009 4# Mon Jan 4 14:39:56 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -20,6 +20,7 @@ CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set 21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
22CONFIG_ARCH_HIBERNATION_POSSIBLE=y 22CONFIG_ARCH_HIBERNATION_POSSIBLE=y
23CONFIG_SYS_SUPPORTS_HUGETLBFS=y
23CONFIG_SYS_SUPPORTS_TMU=y 24CONFIG_SYS_SUPPORTS_TMU=y
24CONFIG_STACKTRACE_SUPPORT=y 25CONFIG_STACKTRACE_SUPPORT=y
25CONFIG_LOCKDEP_SUPPORT=y 26CONFIG_LOCKDEP_SUPPORT=y
@@ -29,6 +30,7 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
29CONFIG_ARCH_NO_VIRT_TO_BUS=y 30CONFIG_ARCH_NO_VIRT_TO_BUS=y
30CONFIG_ARCH_HAS_DEFAULT_IDLE=y 31CONFIG_ARCH_HAS_DEFAULT_IDLE=y
31CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
33CONFIG_DMA_NONCOHERENT=y
32CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 34CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
33CONFIG_CONSTRUCTORS=y 35CONFIG_CONSTRUCTORS=y
34 36
@@ -60,6 +62,7 @@ CONFIG_BSD_PROCESS_ACCT=y
60# 62#
61CONFIG_TREE_RCU=y 63CONFIG_TREE_RCU=y
62# CONFIG_TREE_PREEMPT_RCU is not set 64# CONFIG_TREE_PREEMPT_RCU is not set
65# CONFIG_TINY_RCU is not set
63# CONFIG_RCU_TRACE is not set 66# CONFIG_RCU_TRACE is not set
64CONFIG_RCU_FANOUT=32 67CONFIG_RCU_FANOUT=32
65# CONFIG_RCU_FANOUT_EXACT is not set 68# CONFIG_RCU_FANOUT_EXACT is not set
@@ -98,6 +101,7 @@ CONFIG_EVENTFD=y
98CONFIG_SHMEM=y 101CONFIG_SHMEM=y
99CONFIG_AIO=y 102CONFIG_AIO=y
100CONFIG_HAVE_PERF_EVENTS=y 103CONFIG_HAVE_PERF_EVENTS=y
104CONFIG_PERF_USE_VMALLOC=y
101 105
102# 106#
103# Kernel Performance Events And Counters 107# Kernel Performance Events And Counters
@@ -116,6 +120,7 @@ CONFIG_HAVE_IOREMAP_PROT=y
116CONFIG_HAVE_KPROBES=y 120CONFIG_HAVE_KPROBES=y
117CONFIG_HAVE_KRETPROBES=y 121CONFIG_HAVE_KRETPROBES=y
118CONFIG_HAVE_ARCH_TRACEHOOK=y 122CONFIG_HAVE_ARCH_TRACEHOOK=y
123CONFIG_HAVE_DMA_ATTRS=y
119CONFIG_HAVE_CLK=y 124CONFIG_HAVE_CLK=y
120CONFIG_HAVE_DMA_API_DEBUG=y 125CONFIG_HAVE_DMA_API_DEBUG=y
121 126
@@ -141,14 +146,41 @@ CONFIG_LBDAF=y
141# IO Schedulers 146# IO Schedulers
142# 147#
143CONFIG_IOSCHED_NOOP=y 148CONFIG_IOSCHED_NOOP=y
144CONFIG_IOSCHED_AS=y
145CONFIG_IOSCHED_DEADLINE=y 149CONFIG_IOSCHED_DEADLINE=y
146CONFIG_IOSCHED_CFQ=y 150CONFIG_IOSCHED_CFQ=y
147CONFIG_DEFAULT_AS=y
148# CONFIG_DEFAULT_DEADLINE is not set 151# CONFIG_DEFAULT_DEADLINE is not set
149# CONFIG_DEFAULT_CFQ is not set 152CONFIG_DEFAULT_CFQ=y
150# CONFIG_DEFAULT_NOOP is not set 153# CONFIG_DEFAULT_NOOP is not set
151CONFIG_DEFAULT_IOSCHED="anticipatory" 154CONFIG_DEFAULT_IOSCHED="cfq"
155# CONFIG_INLINE_SPIN_TRYLOCK is not set
156# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
157# CONFIG_INLINE_SPIN_LOCK is not set
158# CONFIG_INLINE_SPIN_LOCK_BH is not set
159# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
160# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
161CONFIG_INLINE_SPIN_UNLOCK=y
162# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
163CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
164# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
165# CONFIG_INLINE_READ_TRYLOCK is not set
166# CONFIG_INLINE_READ_LOCK is not set
167# CONFIG_INLINE_READ_LOCK_BH is not set
168# CONFIG_INLINE_READ_LOCK_IRQ is not set
169# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
170CONFIG_INLINE_READ_UNLOCK=y
171# CONFIG_INLINE_READ_UNLOCK_BH is not set
172CONFIG_INLINE_READ_UNLOCK_IRQ=y
173# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
174# CONFIG_INLINE_WRITE_TRYLOCK is not set
175# CONFIG_INLINE_WRITE_LOCK is not set
176# CONFIG_INLINE_WRITE_LOCK_BH is not set
177# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
178# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
179CONFIG_INLINE_WRITE_UNLOCK=y
180# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
181CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
182# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
183# CONFIG_MUTEX_SPIN_ON_OWNER is not set
152# CONFIG_FREEZER is not set 184# CONFIG_FREEZER is not set
153 185
154# 186#
@@ -224,8 +256,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
224# CONFIG_PHYS_ADDR_T_64BIT is not set 256# CONFIG_PHYS_ADDR_T_64BIT is not set
225CONFIG_ZONE_DMA_FLAG=0 257CONFIG_ZONE_DMA_FLAG=0
226CONFIG_NR_QUICK=2 258CONFIG_NR_QUICK=2
227CONFIG_HAVE_MLOCK=y
228CONFIG_HAVE_MLOCKED_PAGE_BIT=y
229# CONFIG_KSM is not set 259# CONFIG_KSM is not set
230CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 260CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
231 261
@@ -311,7 +341,6 @@ CONFIG_GUSA=y
311CONFIG_ZERO_PAGE_OFFSET=0x00010000 341CONFIG_ZERO_PAGE_OFFSET=0x00010000
312CONFIG_BOOT_LINK_OFFSET=0x00800000 342CONFIG_BOOT_LINK_OFFSET=0x00800000
313CONFIG_ENTRY_OFFSET=0x00001000 343CONFIG_ENTRY_OFFSET=0x00001000
314# CONFIG_UBC_WAKEUP is not set
315CONFIG_CMDLINE_OVERWRITE=y 344CONFIG_CMDLINE_OVERWRITE=y
316# CONFIG_CMDLINE_EXTEND is not set 345# CONFIG_CMDLINE_EXTEND is not set
317CONFIG_CMDLINE="console=ttySC1,38400" 346CONFIG_CMDLINE="console=ttySC1,38400"
@@ -430,9 +459,6 @@ CONFIG_IP_NF_QUEUE=y
430# CONFIG_AF_RXRPC is not set 459# CONFIG_AF_RXRPC is not set
431CONFIG_WIRELESS=y 460CONFIG_WIRELESS=y
432# CONFIG_CFG80211 is not set 461# CONFIG_CFG80211 is not set
433CONFIG_CFG80211_DEFAULT_PS_VALUE=0
434# CONFIG_WIRELESS_OLD_REGULATORY is not set
435# CONFIG_WIRELESS_EXT is not set
436# CONFIG_LIB80211 is not set 462# CONFIG_LIB80211 is not set
437 463
438# 464#
@@ -537,6 +563,10 @@ CONFIG_MTD_RAM=y
537CONFIG_BLK_DEV=y 563CONFIG_BLK_DEV=y
538# CONFIG_BLK_DEV_COW_COMMON is not set 564# CONFIG_BLK_DEV_COW_COMMON is not set
539# CONFIG_BLK_DEV_LOOP is not set 565# CONFIG_BLK_DEV_LOOP is not set
566
567#
568# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
569#
540# CONFIG_BLK_DEV_NBD is not set 570# CONFIG_BLK_DEV_NBD is not set
541CONFIG_BLK_DEV_RAM=y 571CONFIG_BLK_DEV_RAM=y
542CONFIG_BLK_DEV_RAM_COUNT=16 572CONFIG_BLK_DEV_RAM_COUNT=16
@@ -591,11 +621,11 @@ CONFIG_MII=y
591# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set 621# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
592# CONFIG_B44 is not set 622# CONFIG_B44 is not set
593# CONFIG_KS8842 is not set 623# CONFIG_KS8842 is not set
624# CONFIG_KS8851_MLL is not set
594CONFIG_NETDEV_1000=y 625CONFIG_NETDEV_1000=y
595CONFIG_NETDEV_10000=y 626CONFIG_NETDEV_10000=y
596CONFIG_WLAN=y 627CONFIG_WLAN=y
597# CONFIG_WLAN_PRE80211 is not set 628# CONFIG_HOSTAP is not set
598# CONFIG_WLAN_80211 is not set
599 629
600# 630#
601# Enable WiMAX (Networking options) to see the WiMAX drivers 631# Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -693,6 +723,7 @@ CONFIG_SSB_POSSIBLE=y
693# 723#
694# CONFIG_MFD_CORE is not set 724# CONFIG_MFD_CORE is not set
695# CONFIG_MFD_SM501 is not set 725# CONFIG_MFD_SM501 is not set
726# CONFIG_MFD_SH_MOBILE_SDHI is not set
696# CONFIG_HTC_PASIC3 is not set 727# CONFIG_HTC_PASIC3 is not set
697# CONFIG_MFD_TMIO is not set 728# CONFIG_MFD_TMIO is not set
698# CONFIG_REGULATOR is not set 729# CONFIG_REGULATOR is not set
@@ -754,6 +785,7 @@ CONFIG_EXT2_FS=y
754# CONFIG_EXT2_FS_XIP is not set 785# CONFIG_EXT2_FS_XIP is not set
755# CONFIG_EXT3_FS is not set 786# CONFIG_EXT3_FS is not set
756# CONFIG_EXT4_FS is not set 787# CONFIG_EXT4_FS is not set
788CONFIG_EXT4_USE_FOR_EXT23=y
757# CONFIG_REISERFS_FS is not set 789# CONFIG_REISERFS_FS is not set
758# CONFIG_JFS_FS is not set 790# CONFIG_JFS_FS is not set
759# CONFIG_FS_POSIX_ACL is not set 791# CONFIG_FS_POSIX_ACL is not set
@@ -863,10 +895,11 @@ CONFIG_FRAME_WARN=1024
863# CONFIG_DEBUG_FS is not set 895# CONFIG_DEBUG_FS is not set
864# CONFIG_HEADERS_CHECK is not set 896# CONFIG_HEADERS_CHECK is not set
865# CONFIG_DEBUG_KERNEL is not set 897# CONFIG_DEBUG_KERNEL is not set
866# CONFIG_DEBUG_BUGVERBOSE is not set 898CONFIG_DEBUG_BUGVERBOSE=y
867# CONFIG_DEBUG_MEMORY_INIT is not set 899# CONFIG_DEBUG_MEMORY_INIT is not set
868# CONFIG_RCU_CPU_STALL_DETECTOR is not set 900# CONFIG_RCU_CPU_STALL_DETECTOR is not set
869# CONFIG_LATENCYTOP is not set 901# CONFIG_LATENCYTOP is not set
902# CONFIG_SYSCTL_SYSCALL_CHECK is not set
870CONFIG_HAVE_FUNCTION_TRACER=y 903CONFIG_HAVE_FUNCTION_TRACER=y
871CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 904CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
872CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y 905CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
@@ -879,7 +912,6 @@ CONFIG_TRACING_SUPPORT=y
879# CONFIG_SAMPLES is not set 912# CONFIG_SAMPLES is not set
880CONFIG_HAVE_ARCH_KGDB=y 913CONFIG_HAVE_ARCH_KGDB=y
881# CONFIG_SH_STANDARD_BIOS is not set 914# CONFIG_SH_STANDARD_BIOS is not set
882# CONFIG_EARLY_SCIF_CONSOLE is not set
883# CONFIG_DWARF_UNWINDER is not set 915# CONFIG_DWARF_UNWINDER is not set
884 916
885# 917#
@@ -888,7 +920,11 @@ CONFIG_HAVE_ARCH_KGDB=y
888# CONFIG_KEYS is not set 920# CONFIG_KEYS is not set
889# CONFIG_SECURITY is not set 921# CONFIG_SECURITY is not set
890# CONFIG_SECURITYFS is not set 922# CONFIG_SECURITYFS is not set
891# CONFIG_SECURITY_FILE_CAPABILITIES is not set 923# CONFIG_DEFAULT_SECURITY_SELINUX is not set
924# CONFIG_DEFAULT_SECURITY_SMACK is not set
925# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
926CONFIG_DEFAULT_SECURITY_DAC=y
927CONFIG_DEFAULT_SECURITY=""
892CONFIG_CRYPTO=y 928CONFIG_CRYPTO=y
893 929
894# 930#
diff --git a/arch/sh/configs/se7780_defconfig b/arch/sh/configs/se7780_defconfig
index 82baeef40a96..58533d50f06e 100644
--- a/arch/sh/configs/se7780_defconfig
+++ b/arch/sh/configs/se7780_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Thu Sep 24 19:03:59 2009 4# Mon Jan 4 14:40:32 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -20,6 +20,7 @@ CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set 21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
22CONFIG_ARCH_HIBERNATION_POSSIBLE=y 22CONFIG_ARCH_HIBERNATION_POSSIBLE=y
23CONFIG_SYS_SUPPORTS_HUGETLBFS=y
23CONFIG_SYS_SUPPORTS_PCI=y 24CONFIG_SYS_SUPPORTS_PCI=y
24CONFIG_SYS_SUPPORTS_TMU=y 25CONFIG_SYS_SUPPORTS_TMU=y
25CONFIG_STACKTRACE_SUPPORT=y 26CONFIG_STACKTRACE_SUPPORT=y
@@ -30,6 +31,7 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
30CONFIG_ARCH_NO_VIRT_TO_BUS=y 31CONFIG_ARCH_NO_VIRT_TO_BUS=y
31CONFIG_ARCH_HAS_DEFAULT_IDLE=y 32CONFIG_ARCH_HAS_DEFAULT_IDLE=y
32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
34CONFIG_DMA_NONCOHERENT=y
33CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
34CONFIG_CONSTRUCTORS=y 36CONFIG_CONSTRUCTORS=y
35 37
@@ -59,6 +61,7 @@ CONFIG_SYSVIPC_SYSCTL=y
59# 61#
60CONFIG_TREE_RCU=y 62CONFIG_TREE_RCU=y
61# CONFIG_TREE_PREEMPT_RCU is not set 63# CONFIG_TREE_PREEMPT_RCU is not set
64# CONFIG_TINY_RCU is not set
62# CONFIG_RCU_TRACE is not set 65# CONFIG_RCU_TRACE is not set
63CONFIG_RCU_FANOUT=32 66CONFIG_RCU_FANOUT=32
64# CONFIG_RCU_FANOUT_EXACT is not set 67# CONFIG_RCU_FANOUT_EXACT is not set
@@ -92,6 +95,7 @@ CONFIG_EVENTFD=y
92CONFIG_SHMEM=y 95CONFIG_SHMEM=y
93CONFIG_AIO=y 96CONFIG_AIO=y
94CONFIG_HAVE_PERF_EVENTS=y 97CONFIG_HAVE_PERF_EVENTS=y
98CONFIG_PERF_USE_VMALLOC=y
95 99
96# 100#
97# Kernel Performance Events And Counters 101# Kernel Performance Events And Counters
@@ -110,6 +114,7 @@ CONFIG_HAVE_IOREMAP_PROT=y
110CONFIG_HAVE_KPROBES=y 114CONFIG_HAVE_KPROBES=y
111CONFIG_HAVE_KRETPROBES=y 115CONFIG_HAVE_KRETPROBES=y
112CONFIG_HAVE_ARCH_TRACEHOOK=y 116CONFIG_HAVE_ARCH_TRACEHOOK=y
117CONFIG_HAVE_DMA_ATTRS=y
113CONFIG_HAVE_CLK=y 118CONFIG_HAVE_CLK=y
114CONFIG_HAVE_DMA_API_DEBUG=y 119CONFIG_HAVE_DMA_API_DEBUG=y
115 120
@@ -136,14 +141,41 @@ CONFIG_BLK_DEV_BSG=y
136# IO Schedulers 141# IO Schedulers
137# 142#
138CONFIG_IOSCHED_NOOP=y 143CONFIG_IOSCHED_NOOP=y
139# CONFIG_IOSCHED_AS is not set
140CONFIG_IOSCHED_DEADLINE=y 144CONFIG_IOSCHED_DEADLINE=y
141# CONFIG_IOSCHED_CFQ is not set 145# CONFIG_IOSCHED_CFQ is not set
142# CONFIG_DEFAULT_AS is not set
143CONFIG_DEFAULT_DEADLINE=y 146CONFIG_DEFAULT_DEADLINE=y
144# CONFIG_DEFAULT_CFQ is not set 147# CONFIG_DEFAULT_CFQ is not set
145# CONFIG_DEFAULT_NOOP is not set 148# CONFIG_DEFAULT_NOOP is not set
146CONFIG_DEFAULT_IOSCHED="deadline" 149CONFIG_DEFAULT_IOSCHED="deadline"
150# CONFIG_INLINE_SPIN_TRYLOCK is not set
151# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
152# CONFIG_INLINE_SPIN_LOCK is not set
153# CONFIG_INLINE_SPIN_LOCK_BH is not set
154# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
155# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
156CONFIG_INLINE_SPIN_UNLOCK=y
157# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
158CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
159# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
160# CONFIG_INLINE_READ_TRYLOCK is not set
161# CONFIG_INLINE_READ_LOCK is not set
162# CONFIG_INLINE_READ_LOCK_BH is not set
163# CONFIG_INLINE_READ_LOCK_IRQ is not set
164# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
165CONFIG_INLINE_READ_UNLOCK=y
166# CONFIG_INLINE_READ_UNLOCK_BH is not set
167CONFIG_INLINE_READ_UNLOCK_IRQ=y
168# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
169# CONFIG_INLINE_WRITE_TRYLOCK is not set
170# CONFIG_INLINE_WRITE_LOCK is not set
171# CONFIG_INLINE_WRITE_LOCK_BH is not set
172# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
173# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
174CONFIG_INLINE_WRITE_UNLOCK=y
175# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
176CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
177# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
178# CONFIG_MUTEX_SPIN_ON_OWNER is not set
147# CONFIG_FREEZER is not set 179# CONFIG_FREEZER is not set
148 180
149# 181#
@@ -222,8 +254,6 @@ CONFIG_MIGRATION=y
222# CONFIG_PHYS_ADDR_T_64BIT is not set 254# CONFIG_PHYS_ADDR_T_64BIT is not set
223CONFIG_ZONE_DMA_FLAG=0 255CONFIG_ZONE_DMA_FLAG=0
224CONFIG_NR_QUICK=2 256CONFIG_NR_QUICK=2
225CONFIG_HAVE_MLOCK=y
226CONFIG_HAVE_MLOCKED_PAGE_BIT=y
227# CONFIG_KSM is not set 257# CONFIG_KSM is not set
228CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 258CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
229 259
@@ -313,7 +343,6 @@ CONFIG_CMDLINE="console=ttySC0,115200 root=/dev/sda1"
313# Bus options 343# Bus options
314# 344#
315CONFIG_PCI=y 345CONFIG_PCI=y
316CONFIG_SH_PCIDMA_NONCOHERENT=y
317# CONFIG_PCIEPORTBUS is not set 346# CONFIG_PCIEPORTBUS is not set
318# CONFIG_ARCH_SUPPORTS_MSI is not set 347# CONFIG_ARCH_SUPPORTS_MSI is not set
319CONFIG_PCI_LEGACY=y 348CONFIG_PCI_LEGACY=y
@@ -401,9 +430,6 @@ CONFIG_IPV6=y
401# CONFIG_BT is not set 430# CONFIG_BT is not set
402CONFIG_WIRELESS=y 431CONFIG_WIRELESS=y
403# CONFIG_CFG80211 is not set 432# CONFIG_CFG80211 is not set
404CONFIG_CFG80211_DEFAULT_PS_VALUE=0
405# CONFIG_WIRELESS_OLD_REGULATORY is not set
406# CONFIG_WIRELESS_EXT is not set
407# CONFIG_LIB80211 is not set 433# CONFIG_LIB80211 is not set
408 434
409# 435#
@@ -517,6 +543,10 @@ CONFIG_BLK_DEV=y
517# CONFIG_BLK_DEV_COW_COMMON is not set 543# CONFIG_BLK_DEV_COW_COMMON is not set
518CONFIG_BLK_DEV_LOOP=y 544CONFIG_BLK_DEV_LOOP=y
519# CONFIG_BLK_DEV_CRYPTOLOOP is not set 545# CONFIG_BLK_DEV_CRYPTOLOOP is not set
546
547#
548# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
549#
520# CONFIG_BLK_DEV_NBD is not set 550# CONFIG_BLK_DEV_NBD is not set
521# CONFIG_BLK_DEV_SX8 is not set 551# CONFIG_BLK_DEV_SX8 is not set
522# CONFIG_BLK_DEV_UB is not set 552# CONFIG_BLK_DEV_UB is not set
@@ -574,8 +604,11 @@ CONFIG_SCSI_WAIT_SCAN=m
574CONFIG_SCSI_LOWLEVEL=y 604CONFIG_SCSI_LOWLEVEL=y
575# CONFIG_ISCSI_TCP is not set 605# CONFIG_ISCSI_TCP is not set
576# CONFIG_SCSI_BNX2_ISCSI is not set 606# CONFIG_SCSI_BNX2_ISCSI is not set
607# CONFIG_BE2ISCSI is not set
577# CONFIG_BLK_DEV_3W_XXXX_RAID is not set 608# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
609# CONFIG_SCSI_HPSA is not set
578# CONFIG_SCSI_3W_9XXX is not set 610# CONFIG_SCSI_3W_9XXX is not set
611# CONFIG_SCSI_3W_SAS is not set
579# CONFIG_SCSI_ACARD is not set 612# CONFIG_SCSI_ACARD is not set
580# CONFIG_SCSI_AACRAID is not set 613# CONFIG_SCSI_AACRAID is not set
581# CONFIG_SCSI_AIC7XXX is not set 614# CONFIG_SCSI_AIC7XXX is not set
@@ -608,7 +641,9 @@ CONFIG_SCSI_LOWLEVEL=y
608# CONFIG_SCSI_NSP32 is not set 641# CONFIG_SCSI_NSP32 is not set
609# CONFIG_SCSI_DEBUG is not set 642# CONFIG_SCSI_DEBUG is not set
610# CONFIG_SCSI_PMCRAID is not set 643# CONFIG_SCSI_PMCRAID is not set
644# CONFIG_SCSI_PM8001 is not set
611# CONFIG_SCSI_SRP is not set 645# CONFIG_SCSI_SRP is not set
646# CONFIG_SCSI_BFA_FC is not set
612# CONFIG_SCSI_DH is not set 647# CONFIG_SCSI_DH is not set
613# CONFIG_SCSI_OSD_INITIATOR is not set 648# CONFIG_SCSI_OSD_INITIATOR is not set
614CONFIG_ATA=y 649CONFIG_ATA=y
@@ -642,6 +677,8 @@ CONFIG_SATA_SIL=y
642# CONFIG_PATA_EFAR is not set 677# CONFIG_PATA_EFAR is not set
643# CONFIG_ATA_GENERIC is not set 678# CONFIG_ATA_GENERIC is not set
644# CONFIG_PATA_HPT366 is not set 679# CONFIG_PATA_HPT366 is not set
680# CONFIG_PATA_HPT37X is not set
681# CONFIG_PATA_HPT3X2N is not set
645# CONFIG_PATA_HPT3X3 is not set 682# CONFIG_PATA_HPT3X3 is not set
646# CONFIG_PATA_IT821X is not set 683# CONFIG_PATA_IT821X is not set
647# CONFIG_PATA_JMICRON is not set 684# CONFIG_PATA_JMICRON is not set
@@ -650,14 +687,15 @@ CONFIG_SATA_SIL=y
650# CONFIG_PATA_MPIIX is not set 687# CONFIG_PATA_MPIIX is not set
651# CONFIG_PATA_OLDPIIX is not set 688# CONFIG_PATA_OLDPIIX is not set
652# CONFIG_PATA_NETCELL is not set 689# CONFIG_PATA_NETCELL is not set
690# CONFIG_PATA_NINJA32 is not set
653# CONFIG_PATA_NS87410 is not set 691# CONFIG_PATA_NS87410 is not set
654# CONFIG_PATA_NS87415 is not set 692# CONFIG_PATA_NS87415 is not set
693# CONFIG_PATA_PDC2027X is not set
655# CONFIG_PATA_PDC_OLD is not set 694# CONFIG_PATA_PDC_OLD is not set
656# CONFIG_PATA_RDC is not set 695# CONFIG_PATA_RDC is not set
657# CONFIG_PATA_RZ1000 is not set 696# CONFIG_PATA_RZ1000 is not set
658# CONFIG_PATA_SC1200 is not set 697# CONFIG_PATA_SC1200 is not set
659# CONFIG_PATA_SERVERWORKS is not set 698# CONFIG_PATA_SERVERWORKS is not set
660# CONFIG_PATA_PDC2027X is not set
661# CONFIG_PATA_SIL680 is not set 699# CONFIG_PATA_SIL680 is not set
662# CONFIG_PATA_SIS is not set 700# CONFIG_PATA_SIS is not set
663# CONFIG_PATA_VIA is not set 701# CONFIG_PATA_VIA is not set
@@ -748,14 +786,16 @@ CONFIG_NET_PCI=y
748# CONFIG_SUNDANCE is not set 786# CONFIG_SUNDANCE is not set
749# CONFIG_TLAN is not set 787# CONFIG_TLAN is not set
750# CONFIG_KS8842 is not set 788# CONFIG_KS8842 is not set
789# CONFIG_KS8851_MLL is not set
751# CONFIG_VIA_RHINE is not set 790# CONFIG_VIA_RHINE is not set
752# CONFIG_ATL2 is not set 791# CONFIG_ATL2 is not set
753# CONFIG_NETDEV_1000 is not set 792# CONFIG_NETDEV_1000 is not set
754# CONFIG_NETDEV_10000 is not set 793# CONFIG_NETDEV_10000 is not set
755# CONFIG_TR is not set 794# CONFIG_TR is not set
756CONFIG_WLAN=y 795CONFIG_WLAN=y
757# CONFIG_WLAN_PRE80211 is not set 796# CONFIG_ATMEL is not set
758# CONFIG_WLAN_80211 is not set 797# CONFIG_USB_ZD1201 is not set
798# CONFIG_HOSTAP is not set
759 799
760# 800#
761# Enable WiMAX (Networking options) to see the WiMAX drivers 801# Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -774,6 +814,7 @@ CONFIG_WLAN=y
774# CONFIG_NET_FC is not set 814# CONFIG_NET_FC is not set
775# CONFIG_NETPOLL is not set 815# CONFIG_NETPOLL is not set
776# CONFIG_NET_POLL_CONTROLLER is not set 816# CONFIG_NET_POLL_CONTROLLER is not set
817# CONFIG_VMXNET3 is not set
777# CONFIG_ISDN is not set 818# CONFIG_ISDN is not set
778# CONFIG_PHONE is not set 819# CONFIG_PHONE is not set
779 820
@@ -783,6 +824,7 @@ CONFIG_WLAN=y
783CONFIG_INPUT=y 824CONFIG_INPUT=y
784CONFIG_INPUT_FF_MEMLESS=m 825CONFIG_INPUT_FF_MEMLESS=m
785# CONFIG_INPUT_POLLDEV is not set 826# CONFIG_INPUT_POLLDEV is not set
827# CONFIG_INPUT_SPARSEKMAP is not set
786 828
787# 829#
788# Userland interfaces 830# Userland interfaces
@@ -883,6 +925,7 @@ CONFIG_SSB_POSSIBLE=y
883# 925#
884# CONFIG_MFD_CORE is not set 926# CONFIG_MFD_CORE is not set
885# CONFIG_MFD_SM501 is not set 927# CONFIG_MFD_SM501 is not set
928# CONFIG_MFD_SH_MOBILE_SDHI is not set
886# CONFIG_HTC_PASIC3 is not set 929# CONFIG_HTC_PASIC3 is not set
887# CONFIG_MFD_TMIO is not set 930# CONFIG_MFD_TMIO is not set
888# CONFIG_REGULATOR is not set 931# CONFIG_REGULATOR is not set
@@ -1149,6 +1192,7 @@ CONFIG_EXT2_FS=y
1149# CONFIG_EXT2_FS_XIP is not set 1192# CONFIG_EXT2_FS_XIP is not set
1150# CONFIG_EXT3_FS is not set 1193# CONFIG_EXT3_FS is not set
1151# CONFIG_EXT4_FS is not set 1194# CONFIG_EXT4_FS is not set
1195CONFIG_EXT4_USE_FOR_EXT23=y
1152# CONFIG_REISERFS_FS is not set 1196# CONFIG_REISERFS_FS is not set
1153# CONFIG_JFS_FS is not set 1197# CONFIG_JFS_FS is not set
1154# CONFIG_FS_POSIX_ACL is not set 1198# CONFIG_FS_POSIX_ACL is not set
@@ -1285,7 +1329,7 @@ CONFIG_FRAME_WARN=1024
1285CONFIG_DEBUG_FS=y 1329CONFIG_DEBUG_FS=y
1286# CONFIG_HEADERS_CHECK is not set 1330# CONFIG_HEADERS_CHECK is not set
1287# CONFIG_DEBUG_KERNEL is not set 1331# CONFIG_DEBUG_KERNEL is not set
1288# CONFIG_DEBUG_BUGVERBOSE is not set 1332CONFIG_DEBUG_BUGVERBOSE=y
1289# CONFIG_DEBUG_MEMORY_INIT is not set 1333# CONFIG_DEBUG_MEMORY_INIT is not set
1290# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1334# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1291# CONFIG_LATENCYTOP is not set 1335# CONFIG_LATENCYTOP is not set
@@ -1303,7 +1347,6 @@ CONFIG_TRACING_SUPPORT=y
1303# CONFIG_SAMPLES is not set 1347# CONFIG_SAMPLES is not set
1304CONFIG_HAVE_ARCH_KGDB=y 1348CONFIG_HAVE_ARCH_KGDB=y
1305# CONFIG_SH_STANDARD_BIOS is not set 1349# CONFIG_SH_STANDARD_BIOS is not set
1306# CONFIG_EARLY_SCIF_CONSOLE is not set
1307# CONFIG_DWARF_UNWINDER is not set 1350# CONFIG_DWARF_UNWINDER is not set
1308 1351
1309# 1352#
@@ -1312,7 +1355,11 @@ CONFIG_HAVE_ARCH_KGDB=y
1312# CONFIG_KEYS is not set 1355# CONFIG_KEYS is not set
1313# CONFIG_SECURITY is not set 1356# CONFIG_SECURITY is not set
1314# CONFIG_SECURITYFS is not set 1357# CONFIG_SECURITYFS is not set
1315# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1358# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1359# CONFIG_DEFAULT_SECURITY_SMACK is not set
1360# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1361CONFIG_DEFAULT_SECURITY_DAC=y
1362CONFIG_DEFAULT_SECURITY=""
1316CONFIG_CRYPTO=y 1363CONFIG_CRYPTO=y
1317 1364
1318# 1365#
diff --git a/arch/sh/configs/sh03_defconfig b/arch/sh/configs/sh03_defconfig
index dd0e8900afb7..666fde110b27 100644
--- a/arch/sh/configs/sh03_defconfig
+++ b/arch/sh/configs/sh03_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Thu Sep 24 19:07:14 2009 4# Mon Jan 4 14:41:25 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -21,6 +21,7 @@ CONFIG_GENERIC_CLOCKEVENTS=y
21CONFIG_GENERIC_CMOS_UPDATE=y 21CONFIG_GENERIC_CMOS_UPDATE=y
22# CONFIG_ARCH_SUSPEND_POSSIBLE is not set 22# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
23CONFIG_ARCH_HIBERNATION_POSSIBLE=y 23CONFIG_ARCH_HIBERNATION_POSSIBLE=y
24CONFIG_SYS_SUPPORTS_HUGETLBFS=y
24CONFIG_SYS_SUPPORTS_PCI=y 25CONFIG_SYS_SUPPORTS_PCI=y
25CONFIG_SYS_SUPPORTS_TMU=y 26CONFIG_SYS_SUPPORTS_TMU=y
26CONFIG_STACKTRACE_SUPPORT=y 27CONFIG_STACKTRACE_SUPPORT=y
@@ -31,6 +32,7 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
31CONFIG_ARCH_NO_VIRT_TO_BUS=y 32CONFIG_ARCH_NO_VIRT_TO_BUS=y
32CONFIG_ARCH_HAS_DEFAULT_IDLE=y 33CONFIG_ARCH_HAS_DEFAULT_IDLE=y
33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 34CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
35CONFIG_DMA_NONCOHERENT=y
34CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 36CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
35CONFIG_CONSTRUCTORS=y 37CONFIG_CONSTRUCTORS=y
36 38
@@ -64,6 +66,7 @@ CONFIG_BSD_PROCESS_ACCT=y
64# 66#
65CONFIG_TREE_RCU=y 67CONFIG_TREE_RCU=y
66# CONFIG_TREE_PREEMPT_RCU is not set 68# CONFIG_TREE_PREEMPT_RCU is not set
69# CONFIG_TINY_RCU is not set
67# CONFIG_RCU_TRACE is not set 70# CONFIG_RCU_TRACE is not set
68CONFIG_RCU_FANOUT=32 71CONFIG_RCU_FANOUT=32
69# CONFIG_RCU_FANOUT_EXACT is not set 72# CONFIG_RCU_FANOUT_EXACT is not set
@@ -102,6 +105,7 @@ CONFIG_EVENTFD=y
102CONFIG_SHMEM=y 105CONFIG_SHMEM=y
103CONFIG_AIO=y 106CONFIG_AIO=y
104CONFIG_HAVE_PERF_EVENTS=y 107CONFIG_HAVE_PERF_EVENTS=y
108CONFIG_PERF_USE_VMALLOC=y
105 109
106# 110#
107# Kernel Performance Events And Counters 111# Kernel Performance Events And Counters
@@ -124,6 +128,7 @@ CONFIG_HAVE_IOREMAP_PROT=y
124CONFIG_HAVE_KPROBES=y 128CONFIG_HAVE_KPROBES=y
125CONFIG_HAVE_KRETPROBES=y 129CONFIG_HAVE_KRETPROBES=y
126CONFIG_HAVE_ARCH_TRACEHOOK=y 130CONFIG_HAVE_ARCH_TRACEHOOK=y
131CONFIG_HAVE_DMA_ATTRS=y
127CONFIG_HAVE_CLK=y 132CONFIG_HAVE_CLK=y
128CONFIG_HAVE_DMA_API_DEBUG=y 133CONFIG_HAVE_DMA_API_DEBUG=y
129 134
@@ -151,14 +156,41 @@ CONFIG_LBDAF=y
151# IO Schedulers 156# IO Schedulers
152# 157#
153CONFIG_IOSCHED_NOOP=y 158CONFIG_IOSCHED_NOOP=y
154CONFIG_IOSCHED_AS=y
155CONFIG_IOSCHED_DEADLINE=y 159CONFIG_IOSCHED_DEADLINE=y
156CONFIG_IOSCHED_CFQ=y 160CONFIG_IOSCHED_CFQ=y
157CONFIG_DEFAULT_AS=y
158# CONFIG_DEFAULT_DEADLINE is not set 161# CONFIG_DEFAULT_DEADLINE is not set
159# CONFIG_DEFAULT_CFQ is not set 162CONFIG_DEFAULT_CFQ=y
160# CONFIG_DEFAULT_NOOP is not set 163# CONFIG_DEFAULT_NOOP is not set
161CONFIG_DEFAULT_IOSCHED="anticipatory" 164CONFIG_DEFAULT_IOSCHED="cfq"
165# CONFIG_INLINE_SPIN_TRYLOCK is not set
166# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
167# CONFIG_INLINE_SPIN_LOCK is not set
168# CONFIG_INLINE_SPIN_LOCK_BH is not set
169# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
170# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
171# CONFIG_INLINE_SPIN_UNLOCK is not set
172# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
173# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
174# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
175# CONFIG_INLINE_READ_TRYLOCK is not set
176# CONFIG_INLINE_READ_LOCK is not set
177# CONFIG_INLINE_READ_LOCK_BH is not set
178# CONFIG_INLINE_READ_LOCK_IRQ is not set
179# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
180# CONFIG_INLINE_READ_UNLOCK is not set
181# CONFIG_INLINE_READ_UNLOCK_BH is not set
182# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
183# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
184# CONFIG_INLINE_WRITE_TRYLOCK is not set
185# CONFIG_INLINE_WRITE_LOCK is not set
186# CONFIG_INLINE_WRITE_LOCK_BH is not set
187# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
188# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
189# CONFIG_INLINE_WRITE_UNLOCK is not set
190# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
191# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
192# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
193# CONFIG_MUTEX_SPIN_ON_OWNER is not set
162# CONFIG_FREEZER is not set 194# CONFIG_FREEZER is not set
163 195
164# 196#
@@ -234,8 +266,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
234# CONFIG_PHYS_ADDR_T_64BIT is not set 266# CONFIG_PHYS_ADDR_T_64BIT is not set
235CONFIG_ZONE_DMA_FLAG=0 267CONFIG_ZONE_DMA_FLAG=0
236CONFIG_NR_QUICK=2 268CONFIG_NR_QUICK=2
237CONFIG_HAVE_MLOCK=y
238CONFIG_HAVE_MLOCKED_PAGE_BIT=y
239# CONFIG_KSM is not set 269# CONFIG_KSM is not set
240CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 270CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
241 271
@@ -320,7 +350,6 @@ CONFIG_GUSA=y
320CONFIG_ZERO_PAGE_OFFSET=0x00004000 350CONFIG_ZERO_PAGE_OFFSET=0x00004000
321CONFIG_BOOT_LINK_OFFSET=0x00800000 351CONFIG_BOOT_LINK_OFFSET=0x00800000
322CONFIG_ENTRY_OFFSET=0x00001000 352CONFIG_ENTRY_OFFSET=0x00001000
323# CONFIG_UBC_WAKEUP is not set
324CONFIG_CMDLINE_OVERWRITE=y 353CONFIG_CMDLINE_OVERWRITE=y
325# CONFIG_CMDLINE_EXTEND is not set 354# CONFIG_CMDLINE_EXTEND is not set
326CONFIG_CMDLINE="console=ttySC1,115200 mem=64M root=/dev/nfs" 355CONFIG_CMDLINE="console=ttySC1,115200 mem=64M root=/dev/nfs"
@@ -329,7 +358,6 @@ CONFIG_CMDLINE="console=ttySC1,115200 mem=64M root=/dev/nfs"
329# Bus options 358# Bus options
330# 359#
331CONFIG_PCI=y 360CONFIG_PCI=y
332CONFIG_SH_PCIDMA_NONCOHERENT=y
333# CONFIG_PCIEPORTBUS is not set 361# CONFIG_PCIEPORTBUS is not set
334# CONFIG_ARCH_SUPPORTS_MSI is not set 362# CONFIG_ARCH_SUPPORTS_MSI is not set
335CONFIG_PCI_LEGACY=y 363CONFIG_PCI_LEGACY=y
@@ -433,9 +461,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
433# CONFIG_AF_RXRPC is not set 461# CONFIG_AF_RXRPC is not set
434CONFIG_WIRELESS=y 462CONFIG_WIRELESS=y
435# CONFIG_CFG80211 is not set 463# CONFIG_CFG80211 is not set
436CONFIG_CFG80211_DEFAULT_PS_VALUE=0
437# CONFIG_WIRELESS_OLD_REGULATORY is not set
438# CONFIG_WIRELESS_EXT is not set
439# CONFIG_LIB80211 is not set 464# CONFIG_LIB80211 is not set
440 465
441# 466#
@@ -468,6 +493,10 @@ CONFIG_BLK_DEV=y
468# CONFIG_BLK_DEV_COW_COMMON is not set 493# CONFIG_BLK_DEV_COW_COMMON is not set
469CONFIG_BLK_DEV_LOOP=y 494CONFIG_BLK_DEV_LOOP=y
470# CONFIG_BLK_DEV_CRYPTOLOOP is not set 495# CONFIG_BLK_DEV_CRYPTOLOOP is not set
496
497#
498# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
499#
471CONFIG_BLK_DEV_NBD=y 500CONFIG_BLK_DEV_NBD=y
472# CONFIG_BLK_DEV_SX8 is not set 501# CONFIG_BLK_DEV_SX8 is not set
473CONFIG_BLK_DEV_RAM=y 502CONFIG_BLK_DEV_RAM=y
@@ -580,8 +609,11 @@ CONFIG_SCSI_LOWLEVEL=y
580# CONFIG_ISCSI_TCP is not set 609# CONFIG_ISCSI_TCP is not set
581# CONFIG_SCSI_CXGB3_ISCSI is not set 610# CONFIG_SCSI_CXGB3_ISCSI is not set
582# CONFIG_SCSI_BNX2_ISCSI is not set 611# CONFIG_SCSI_BNX2_ISCSI is not set
612# CONFIG_BE2ISCSI is not set
583# CONFIG_BLK_DEV_3W_XXXX_RAID is not set 613# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
614# CONFIG_SCSI_HPSA is not set
584# CONFIG_SCSI_3W_9XXX is not set 615# CONFIG_SCSI_3W_9XXX is not set
616# CONFIG_SCSI_3W_SAS is not set
585# CONFIG_SCSI_ACARD is not set 617# CONFIG_SCSI_ACARD is not set
586# CONFIG_SCSI_AACRAID is not set 618# CONFIG_SCSI_AACRAID is not set
587# CONFIG_SCSI_AIC7XXX is not set 619# CONFIG_SCSI_AIC7XXX is not set
@@ -614,7 +646,9 @@ CONFIG_SCSI_LOWLEVEL=y
614# CONFIG_SCSI_NSP32 is not set 646# CONFIG_SCSI_NSP32 is not set
615# CONFIG_SCSI_DEBUG is not set 647# CONFIG_SCSI_DEBUG is not set
616# CONFIG_SCSI_PMCRAID is not set 648# CONFIG_SCSI_PMCRAID is not set
649# CONFIG_SCSI_PM8001 is not set
617# CONFIG_SCSI_SRP is not set 650# CONFIG_SCSI_SRP is not set
651# CONFIG_SCSI_BFA_FC is not set
618# CONFIG_SCSI_DH is not set 652# CONFIG_SCSI_DH is not set
619# CONFIG_SCSI_OSD_INITIATOR is not set 653# CONFIG_SCSI_OSD_INITIATOR is not set
620# CONFIG_ATA is not set 654# CONFIG_ATA is not set
@@ -685,6 +719,7 @@ CONFIG_8139CP=y
685# CONFIG_SUNDANCE is not set 719# CONFIG_SUNDANCE is not set
686# CONFIG_TLAN is not set 720# CONFIG_TLAN is not set
687# CONFIG_KS8842 is not set 721# CONFIG_KS8842 is not set
722# CONFIG_KS8851_MLL is not set
688# CONFIG_VIA_RHINE is not set 723# CONFIG_VIA_RHINE is not set
689# CONFIG_SC92031 is not set 724# CONFIG_SC92031 is not set
690# CONFIG_ATL2 is not set 725# CONFIG_ATL2 is not set
@@ -733,8 +768,9 @@ CONFIG_CHELSIO_T3_DEPENDS=y
733# CONFIG_BE2NET is not set 768# CONFIG_BE2NET is not set
734# CONFIG_TR is not set 769# CONFIG_TR is not set
735CONFIG_WLAN=y 770CONFIG_WLAN=y
736# CONFIG_WLAN_PRE80211 is not set 771# CONFIG_ATMEL is not set
737# CONFIG_WLAN_80211 is not set 772# CONFIG_PRISM54 is not set
773# CONFIG_HOSTAP is not set
738 774
739# 775#
740# Enable WiMAX (Networking options) to see the WiMAX drivers 776# Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -748,6 +784,7 @@ CONFIG_WLAN=y
748# CONFIG_NETCONSOLE is not set 784# CONFIG_NETCONSOLE is not set
749# CONFIG_NETPOLL is not set 785# CONFIG_NETPOLL is not set
750# CONFIG_NET_POLL_CONTROLLER is not set 786# CONFIG_NET_POLL_CONTROLLER is not set
787# CONFIG_VMXNET3 is not set
751# CONFIG_ISDN is not set 788# CONFIG_ISDN is not set
752# CONFIG_PHONE is not set 789# CONFIG_PHONE is not set
753 790
@@ -757,6 +794,7 @@ CONFIG_WLAN=y
757CONFIG_INPUT=y 794CONFIG_INPUT=y
758# CONFIG_INPUT_FF_MEMLESS is not set 795# CONFIG_INPUT_FF_MEMLESS is not set
759# CONFIG_INPUT_POLLDEV is not set 796# CONFIG_INPUT_POLLDEV is not set
797# CONFIG_INPUT_SPARSEKMAP is not set
760 798
761# 799#
762# Userland interfaces 800# Userland interfaces
@@ -886,6 +924,7 @@ CONFIG_SSB_POSSIBLE=y
886# 924#
887# CONFIG_MFD_CORE is not set 925# CONFIG_MFD_CORE is not set
888# CONFIG_MFD_SM501 is not set 926# CONFIG_MFD_SM501 is not set
927# CONFIG_MFD_SH_MOBILE_SDHI is not set
889# CONFIG_HTC_PASIC3 is not set 928# CONFIG_HTC_PASIC3 is not set
890# CONFIG_MFD_TMIO is not set 929# CONFIG_MFD_TMIO is not set
891# CONFIG_REGULATOR is not set 930# CONFIG_REGULATOR is not set
@@ -1149,10 +1188,11 @@ CONFIG_DEBUG_FS=y
1149# CONFIG_HEADERS_CHECK is not set 1188# CONFIG_HEADERS_CHECK is not set
1150# CONFIG_DEBUG_KERNEL is not set 1189# CONFIG_DEBUG_KERNEL is not set
1151CONFIG_STACKTRACE=y 1190CONFIG_STACKTRACE=y
1152# CONFIG_DEBUG_BUGVERBOSE is not set 1191CONFIG_DEBUG_BUGVERBOSE=y
1153# CONFIG_DEBUG_MEMORY_INIT is not set 1192# CONFIG_DEBUG_MEMORY_INIT is not set
1154# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1193# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1155# CONFIG_LATENCYTOP is not set 1194# CONFIG_LATENCYTOP is not set
1195# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1156CONFIG_NOP_TRACER=y 1196CONFIG_NOP_TRACER=y
1157CONFIG_HAVE_FUNCTION_TRACER=y 1197CONFIG_HAVE_FUNCTION_TRACER=y
1158CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 1198CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
@@ -1172,8 +1212,6 @@ CONFIG_TRACING_SUPPORT=y
1172# CONFIG_SAMPLES is not set 1212# CONFIG_SAMPLES is not set
1173CONFIG_HAVE_ARCH_KGDB=y 1213CONFIG_HAVE_ARCH_KGDB=y
1174CONFIG_SH_STANDARD_BIOS=y 1214CONFIG_SH_STANDARD_BIOS=y
1175# CONFIG_EARLY_SCIF_CONSOLE is not set
1176# CONFIG_EARLY_PRINTK is not set
1177# CONFIG_DWARF_UNWINDER is not set 1215# CONFIG_DWARF_UNWINDER is not set
1178 1216
1179# 1217#
@@ -1182,7 +1220,11 @@ CONFIG_SH_STANDARD_BIOS=y
1182# CONFIG_KEYS is not set 1220# CONFIG_KEYS is not set
1183# CONFIG_SECURITY is not set 1221# CONFIG_SECURITY is not set
1184# CONFIG_SECURITYFS is not set 1222# CONFIG_SECURITYFS is not set
1185# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1223# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1224# CONFIG_DEFAULT_SECURITY_SMACK is not set
1225# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1226CONFIG_DEFAULT_SECURITY_DAC=y
1227CONFIG_DEFAULT_SECURITY=""
1186CONFIG_CRYPTO=y 1228CONFIG_CRYPTO=y
1187 1229
1188# 1230#
diff --git a/arch/sh/configs/sh7710voipgw_defconfig b/arch/sh/configs/sh7710voipgw_defconfig
index 662156ec9211..35a3beeba182 100644
--- a/arch/sh/configs/sh7710voipgw_defconfig
+++ b/arch/sh/configs/sh7710voipgw_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Thu Sep 24 19:11:49 2009 4# Mon Jan 4 14:43:04 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -29,6 +29,7 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
29CONFIG_ARCH_NO_VIRT_TO_BUS=y 29CONFIG_ARCH_NO_VIRT_TO_BUS=y
30CONFIG_ARCH_HAS_DEFAULT_IDLE=y 30CONFIG_ARCH_HAS_DEFAULT_IDLE=y
31CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 31CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
32CONFIG_DMA_NONCOHERENT=y
32CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 33CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
33CONFIG_CONSTRUCTORS=y 34CONFIG_CONSTRUCTORS=y
34 35
@@ -60,6 +61,7 @@ CONFIG_POSIX_MQUEUE_SYSCTL=y
60# 61#
61CONFIG_TREE_RCU=y 62CONFIG_TREE_RCU=y
62# CONFIG_TREE_PREEMPT_RCU is not set 63# CONFIG_TREE_PREEMPT_RCU is not set
64# CONFIG_TINY_RCU is not set
63# CONFIG_RCU_TRACE is not set 65# CONFIG_RCU_TRACE is not set
64CONFIG_RCU_FANOUT=32 66CONFIG_RCU_FANOUT=32
65# CONFIG_RCU_FANOUT_EXACT is not set 67# CONFIG_RCU_FANOUT_EXACT is not set
@@ -98,6 +100,7 @@ CONFIG_EVENTFD=y
98# CONFIG_SHMEM is not set 100# CONFIG_SHMEM is not set
99CONFIG_AIO=y 101CONFIG_AIO=y
100CONFIG_HAVE_PERF_EVENTS=y 102CONFIG_HAVE_PERF_EVENTS=y
103CONFIG_PERF_USE_VMALLOC=y
101 104
102# 105#
103# Kernel Performance Events And Counters 106# Kernel Performance Events And Counters
@@ -116,6 +119,7 @@ CONFIG_HAVE_IOREMAP_PROT=y
116CONFIG_HAVE_KPROBES=y 119CONFIG_HAVE_KPROBES=y
117CONFIG_HAVE_KRETPROBES=y 120CONFIG_HAVE_KRETPROBES=y
118CONFIG_HAVE_ARCH_TRACEHOOK=y 121CONFIG_HAVE_ARCH_TRACEHOOK=y
122CONFIG_HAVE_DMA_ATTRS=y
119CONFIG_HAVE_CLK=y 123CONFIG_HAVE_CLK=y
120CONFIG_HAVE_DMA_API_DEBUG=y 124CONFIG_HAVE_DMA_API_DEBUG=y
121 125
@@ -142,14 +146,41 @@ CONFIG_LBDAF=y
142# IO Schedulers 146# IO Schedulers
143# 147#
144CONFIG_IOSCHED_NOOP=y 148CONFIG_IOSCHED_NOOP=y
145# CONFIG_IOSCHED_AS is not set
146CONFIG_IOSCHED_DEADLINE=y 149CONFIG_IOSCHED_DEADLINE=y
147# CONFIG_IOSCHED_CFQ is not set 150# CONFIG_IOSCHED_CFQ is not set
148# CONFIG_DEFAULT_AS is not set
149CONFIG_DEFAULT_DEADLINE=y 151CONFIG_DEFAULT_DEADLINE=y
150# CONFIG_DEFAULT_CFQ is not set 152# CONFIG_DEFAULT_CFQ is not set
151# CONFIG_DEFAULT_NOOP is not set 153# CONFIG_DEFAULT_NOOP is not set
152CONFIG_DEFAULT_IOSCHED="deadline" 154CONFIG_DEFAULT_IOSCHED="deadline"
155# CONFIG_INLINE_SPIN_TRYLOCK is not set
156# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
157# CONFIG_INLINE_SPIN_LOCK is not set
158# CONFIG_INLINE_SPIN_LOCK_BH is not set
159# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
160# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
161CONFIG_INLINE_SPIN_UNLOCK=y
162# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
163CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
164# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
165# CONFIG_INLINE_READ_TRYLOCK is not set
166# CONFIG_INLINE_READ_LOCK is not set
167# CONFIG_INLINE_READ_LOCK_BH is not set
168# CONFIG_INLINE_READ_LOCK_IRQ is not set
169# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
170CONFIG_INLINE_READ_UNLOCK=y
171# CONFIG_INLINE_READ_UNLOCK_BH is not set
172CONFIG_INLINE_READ_UNLOCK_IRQ=y
173# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
174# CONFIG_INLINE_WRITE_TRYLOCK is not set
175# CONFIG_INLINE_WRITE_LOCK is not set
176# CONFIG_INLINE_WRITE_LOCK_BH is not set
177# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
178# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
179CONFIG_INLINE_WRITE_UNLOCK=y
180# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
181CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
182# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
183# CONFIG_MUTEX_SPIN_ON_OWNER is not set
153# CONFIG_FREEZER is not set 184# CONFIG_FREEZER is not set
154 185
155# 186#
@@ -225,8 +256,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
225# CONFIG_PHYS_ADDR_T_64BIT is not set 256# CONFIG_PHYS_ADDR_T_64BIT is not set
226CONFIG_ZONE_DMA_FLAG=0 257CONFIG_ZONE_DMA_FLAG=0
227CONFIG_NR_QUICK=2 258CONFIG_NR_QUICK=2
228CONFIG_HAVE_MLOCK=y
229CONFIG_HAVE_MLOCKED_PAGE_BIT=y
230# CONFIG_KSM is not set 259# CONFIG_KSM is not set
231CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 260CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
232 261
@@ -460,9 +489,6 @@ CONFIG_NET_SCH_FIFO=y
460# CONFIG_AF_RXRPC is not set 489# CONFIG_AF_RXRPC is not set
461CONFIG_WIRELESS=y 490CONFIG_WIRELESS=y
462# CONFIG_CFG80211 is not set 491# CONFIG_CFG80211 is not set
463CONFIG_CFG80211_DEFAULT_PS_VALUE=0
464# CONFIG_WIRELESS_OLD_REGULATORY is not set
465# CONFIG_WIRELESS_EXT is not set
466# CONFIG_LIB80211 is not set 492# CONFIG_LIB80211 is not set
467 493
468# 494#
@@ -571,6 +597,10 @@ CONFIG_MTD_RAM=y
571CONFIG_BLK_DEV=y 597CONFIG_BLK_DEV=y
572# CONFIG_BLK_DEV_COW_COMMON is not set 598# CONFIG_BLK_DEV_COW_COMMON is not set
573# CONFIG_BLK_DEV_LOOP is not set 599# CONFIG_BLK_DEV_LOOP is not set
600
601#
602# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
603#
574# CONFIG_BLK_DEV_NBD is not set 604# CONFIG_BLK_DEV_NBD is not set
575# CONFIG_BLK_DEV_RAM is not set 605# CONFIG_BLK_DEV_RAM is not set
576# CONFIG_CDROM_PKTCDVD is not set 606# CONFIG_CDROM_PKTCDVD is not set
@@ -623,11 +653,11 @@ CONFIG_NET_ETHERNET=y
623# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set 653# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
624# CONFIG_B44 is not set 654# CONFIG_B44 is not set
625# CONFIG_KS8842 is not set 655# CONFIG_KS8842 is not set
656# CONFIG_KS8851_MLL is not set
626CONFIG_NETDEV_1000=y 657CONFIG_NETDEV_1000=y
627CONFIG_NETDEV_10000=y 658CONFIG_NETDEV_10000=y
628CONFIG_WLAN=y 659CONFIG_WLAN=y
629# CONFIG_WLAN_PRE80211 is not set 660# CONFIG_HOSTAP is not set
630# CONFIG_WLAN_80211 is not set
631 661
632# 662#
633# Enable WiMAX (Networking options) to see the WiMAX drivers 663# Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -647,6 +677,7 @@ CONFIG_PHONE=y
647CONFIG_INPUT=y 677CONFIG_INPUT=y
648# CONFIG_INPUT_FF_MEMLESS is not set 678# CONFIG_INPUT_FF_MEMLESS is not set
649# CONFIG_INPUT_POLLDEV is not set 679# CONFIG_INPUT_POLLDEV is not set
680# CONFIG_INPUT_SPARSEKMAP is not set
650 681
651# 682#
652# Userland interfaces 683# Userland interfaces
@@ -725,6 +756,7 @@ CONFIG_SSB_POSSIBLE=y
725# 756#
726# CONFIG_MFD_CORE is not set 757# CONFIG_MFD_CORE is not set
727# CONFIG_MFD_SM501 is not set 758# CONFIG_MFD_SM501 is not set
759# CONFIG_MFD_SH_MOBILE_SDHI is not set
728# CONFIG_HTC_PASIC3 is not set 760# CONFIG_HTC_PASIC3 is not set
729# CONFIG_MFD_TMIO is not set 761# CONFIG_MFD_TMIO is not set
730# CONFIG_REGULATOR is not set 762# CONFIG_REGULATOR is not set
@@ -792,6 +824,7 @@ CONFIG_RTC_LIB=y
792# CONFIG_EXT2_FS is not set 824# CONFIG_EXT2_FS is not set
793# CONFIG_EXT3_FS is not set 825# CONFIG_EXT3_FS is not set
794# CONFIG_EXT4_FS is not set 826# CONFIG_EXT4_FS is not set
827CONFIG_EXT4_USE_FOR_EXT23=y
795# CONFIG_REISERFS_FS is not set 828# CONFIG_REISERFS_FS is not set
796# CONFIG_JFS_FS is not set 829# CONFIG_JFS_FS is not set
797# CONFIG_FS_POSIX_ACL is not set 830# CONFIG_FS_POSIX_ACL is not set
@@ -836,7 +869,6 @@ CONFIG_PROC_FS=y
836CONFIG_PROC_SYSCTL=y 869CONFIG_PROC_SYSCTL=y
837CONFIG_PROC_PAGE_MONITOR=y 870CONFIG_PROC_PAGE_MONITOR=y
838CONFIG_SYSFS=y 871CONFIG_SYSFS=y
839# CONFIG_HUGETLBFS is not set
840# CONFIG_HUGETLB_PAGE is not set 872# CONFIG_HUGETLB_PAGE is not set
841# CONFIG_CONFIGFS_FS is not set 873# CONFIG_CONFIGFS_FS is not set
842CONFIG_MISC_FILESYSTEMS=y 874CONFIG_MISC_FILESYSTEMS=y
@@ -899,10 +931,11 @@ CONFIG_FRAME_WARN=1024
899CONFIG_DEBUG_FS=y 931CONFIG_DEBUG_FS=y
900# CONFIG_HEADERS_CHECK is not set 932# CONFIG_HEADERS_CHECK is not set
901# CONFIG_DEBUG_KERNEL is not set 933# CONFIG_DEBUG_KERNEL is not set
902# CONFIG_DEBUG_BUGVERBOSE is not set 934CONFIG_DEBUG_BUGVERBOSE=y
903# CONFIG_DEBUG_MEMORY_INIT is not set 935# CONFIG_DEBUG_MEMORY_INIT is not set
904# CONFIG_RCU_CPU_STALL_DETECTOR is not set 936# CONFIG_RCU_CPU_STALL_DETECTOR is not set
905# CONFIG_LATENCYTOP is not set 937# CONFIG_LATENCYTOP is not set
938# CONFIG_SYSCTL_SYSCALL_CHECK is not set
906CONFIG_HAVE_FUNCTION_TRACER=y 939CONFIG_HAVE_FUNCTION_TRACER=y
907CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 940CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
908CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y 941CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
@@ -916,7 +949,6 @@ CONFIG_TRACING_SUPPORT=y
916# CONFIG_SAMPLES is not set 949# CONFIG_SAMPLES is not set
917CONFIG_HAVE_ARCH_KGDB=y 950CONFIG_HAVE_ARCH_KGDB=y
918# CONFIG_SH_STANDARD_BIOS is not set 951# CONFIG_SH_STANDARD_BIOS is not set
919# CONFIG_EARLY_SCIF_CONSOLE is not set
920# CONFIG_DWARF_UNWINDER is not set 952# CONFIG_DWARF_UNWINDER is not set
921 953
922# 954#
@@ -925,7 +957,11 @@ CONFIG_HAVE_ARCH_KGDB=y
925# CONFIG_KEYS is not set 957# CONFIG_KEYS is not set
926# CONFIG_SECURITY is not set 958# CONFIG_SECURITY is not set
927# CONFIG_SECURITYFS is not set 959# CONFIG_SECURITYFS is not set
928# CONFIG_SECURITY_FILE_CAPABILITIES is not set 960# CONFIG_DEFAULT_SECURITY_SELINUX is not set
961# CONFIG_DEFAULT_SECURITY_SMACK is not set
962# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
963CONFIG_DEFAULT_SECURITY_DAC=y
964CONFIG_DEFAULT_SECURITY=""
929CONFIG_CRYPTO=y 965CONFIG_CRYPTO=y
930 966
931# 967#
diff --git a/arch/sh/configs/sh7724_generic_defconfig b/arch/sh/configs/sh7724_generic_defconfig
index e06719a30ba1..a3056b69d2ba 100644
--- a/arch/sh/configs/sh7724_generic_defconfig
+++ b/arch/sh/configs/sh7724_generic_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Thu Sep 24 19:14:00 2009 4# Mon Jan 4 15:03:45 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -20,6 +20,7 @@ CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
21CONFIG_ARCH_SUSPEND_POSSIBLE=y 21CONFIG_ARCH_SUSPEND_POSSIBLE=y
22CONFIG_ARCH_HIBERNATION_POSSIBLE=y 22CONFIG_ARCH_HIBERNATION_POSSIBLE=y
23CONFIG_SYS_SUPPORTS_HUGETLBFS=y
23CONFIG_SYS_SUPPORTS_CMT=y 24CONFIG_SYS_SUPPORTS_CMT=y
24CONFIG_SYS_SUPPORTS_TMU=y 25CONFIG_SYS_SUPPORTS_TMU=y
25CONFIG_STACKTRACE_SUPPORT=y 26CONFIG_STACKTRACE_SUPPORT=y
@@ -30,6 +31,7 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
30CONFIG_ARCH_NO_VIRT_TO_BUS=y 31CONFIG_ARCH_NO_VIRT_TO_BUS=y
31CONFIG_ARCH_HAS_DEFAULT_IDLE=y 32CONFIG_ARCH_HAS_DEFAULT_IDLE=y
32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
34CONFIG_DMA_NONCOHERENT=y
33CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
34CONFIG_CONSTRUCTORS=y 36CONFIG_CONSTRUCTORS=y
35 37
@@ -49,7 +51,6 @@ CONFIG_KERNEL_GZIP=y
49# CONFIG_KERNEL_LZMA is not set 51# CONFIG_KERNEL_LZMA is not set
50CONFIG_SWAP=y 52CONFIG_SWAP=y
51CONFIG_SYSVIPC=y 53CONFIG_SYSVIPC=y
52CONFIG_SYSVIPC_SYSCTL=y
53# CONFIG_BSD_PROCESS_ACCT is not set 54# CONFIG_BSD_PROCESS_ACCT is not set
54 55
55# 56#
@@ -57,6 +58,7 @@ CONFIG_SYSVIPC_SYSCTL=y
57# 58#
58CONFIG_TREE_RCU=y 59CONFIG_TREE_RCU=y
59# CONFIG_TREE_PREEMPT_RCU is not set 60# CONFIG_TREE_PREEMPT_RCU is not set
61# CONFIG_TINY_RCU is not set
60# CONFIG_RCU_TRACE is not set 62# CONFIG_RCU_TRACE is not set
61CONFIG_RCU_FANOUT=32 63CONFIG_RCU_FANOUT=32
62# CONFIG_RCU_FANOUT_EXACT is not set 64# CONFIG_RCU_FANOUT_EXACT is not set
@@ -80,11 +82,9 @@ CONFIG_CGROUPS=y
80# CONFIG_NAMESPACES is not set 82# CONFIG_NAMESPACES is not set
81# CONFIG_BLK_DEV_INITRD is not set 83# CONFIG_BLK_DEV_INITRD is not set
82CONFIG_CC_OPTIMIZE_FOR_SIZE=y 84CONFIG_CC_OPTIMIZE_FOR_SIZE=y
83CONFIG_SYSCTL=y
84CONFIG_ANON_INODES=y 85CONFIG_ANON_INODES=y
85CONFIG_EMBEDDED=y 86CONFIG_EMBEDDED=y
86# CONFIG_UID16 is not set 87# CONFIG_UID16 is not set
87CONFIG_SYSCTL_SYSCALL=y
88CONFIG_KALLSYMS=y 88CONFIG_KALLSYMS=y
89# CONFIG_KALLSYMS_EXTRA_PASS is not set 89# CONFIG_KALLSYMS_EXTRA_PASS is not set
90CONFIG_HOTPLUG=y 90CONFIG_HOTPLUG=y
@@ -100,6 +100,7 @@ CONFIG_EVENTFD=y
100CONFIG_SHMEM=y 100CONFIG_SHMEM=y
101CONFIG_AIO=y 101CONFIG_AIO=y
102CONFIG_HAVE_PERF_EVENTS=y 102CONFIG_HAVE_PERF_EVENTS=y
103CONFIG_PERF_USE_VMALLOC=y
103 104
104# 105#
105# Kernel Performance Events And Counters 106# Kernel Performance Events And Counters
@@ -120,6 +121,7 @@ CONFIG_HAVE_IOREMAP_PROT=y
120CONFIG_HAVE_KPROBES=y 121CONFIG_HAVE_KPROBES=y
121CONFIG_HAVE_KRETPROBES=y 122CONFIG_HAVE_KRETPROBES=y
122CONFIG_HAVE_ARCH_TRACEHOOK=y 123CONFIG_HAVE_ARCH_TRACEHOOK=y
124CONFIG_HAVE_DMA_ATTRS=y
123CONFIG_HAVE_CLK=y 125CONFIG_HAVE_CLK=y
124CONFIG_HAVE_DMA_API_DEBUG=y 126CONFIG_HAVE_DMA_API_DEBUG=y
125 127
@@ -136,19 +138,48 @@ CONFIG_BLOCK=y
136CONFIG_LBDAF=y 138CONFIG_LBDAF=y
137# CONFIG_BLK_DEV_BSG is not set 139# CONFIG_BLK_DEV_BSG is not set
138# CONFIG_BLK_DEV_INTEGRITY is not set 140# CONFIG_BLK_DEV_INTEGRITY is not set
141# CONFIG_BLK_CGROUP is not set
139 142
140# 143#
141# IO Schedulers 144# IO Schedulers
142# 145#
143CONFIG_IOSCHED_NOOP=y 146CONFIG_IOSCHED_NOOP=y
144CONFIG_IOSCHED_AS=y
145CONFIG_IOSCHED_DEADLINE=y 147CONFIG_IOSCHED_DEADLINE=y
146CONFIG_IOSCHED_CFQ=y 148CONFIG_IOSCHED_CFQ=y
147CONFIG_DEFAULT_AS=y 149# CONFIG_CFQ_GROUP_IOSCHED is not set
148# CONFIG_DEFAULT_DEADLINE is not set 150# CONFIG_DEFAULT_DEADLINE is not set
149# CONFIG_DEFAULT_CFQ is not set 151CONFIG_DEFAULT_CFQ=y
150# CONFIG_DEFAULT_NOOP is not set 152# CONFIG_DEFAULT_NOOP is not set
151CONFIG_DEFAULT_IOSCHED="anticipatory" 153CONFIG_DEFAULT_IOSCHED="cfq"
154# CONFIG_INLINE_SPIN_TRYLOCK is not set
155# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
156# CONFIG_INLINE_SPIN_LOCK is not set
157# CONFIG_INLINE_SPIN_LOCK_BH is not set
158# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
159# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
160CONFIG_INLINE_SPIN_UNLOCK=y
161# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
162CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
163# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
164# CONFIG_INLINE_READ_TRYLOCK is not set
165# CONFIG_INLINE_READ_LOCK is not set
166# CONFIG_INLINE_READ_LOCK_BH is not set
167# CONFIG_INLINE_READ_LOCK_IRQ is not set
168# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
169CONFIG_INLINE_READ_UNLOCK=y
170# CONFIG_INLINE_READ_UNLOCK_BH is not set
171CONFIG_INLINE_READ_UNLOCK_IRQ=y
172# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
173# CONFIG_INLINE_WRITE_TRYLOCK is not set
174# CONFIG_INLINE_WRITE_LOCK is not set
175# CONFIG_INLINE_WRITE_LOCK_BH is not set
176# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
177# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
178CONFIG_INLINE_WRITE_UNLOCK=y
179# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
180CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
181# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
182# CONFIG_MUTEX_SPIN_ON_OWNER is not set
152CONFIG_FREEZER=y 183CONFIG_FREEZER=y
153 184
154# 185#
@@ -204,6 +235,7 @@ CONFIG_FORCE_MAX_ZONEORDER=11
204CONFIG_MEMORY_START=0x08000000 235CONFIG_MEMORY_START=0x08000000
205CONFIG_MEMORY_SIZE=0x04000000 236CONFIG_MEMORY_SIZE=0x04000000
206CONFIG_29BIT=y 237CONFIG_29BIT=y
238# CONFIG_PMB_ENABLE is not set
207# CONFIG_X2TLB is not set 239# CONFIG_X2TLB is not set
208CONFIG_VSYSCALL=y 240CONFIG_VSYSCALL=y
209CONFIG_ARCH_FLATMEM_ENABLE=y 241CONFIG_ARCH_FLATMEM_ENABLE=y
@@ -225,17 +257,12 @@ CONFIG_SPARSEMEM_MANUAL=y
225CONFIG_SPARSEMEM=y 257CONFIG_SPARSEMEM=y
226CONFIG_HAVE_MEMORY_PRESENT=y 258CONFIG_HAVE_MEMORY_PRESENT=y
227CONFIG_SPARSEMEM_STATIC=y 259CONFIG_SPARSEMEM_STATIC=y
228 260# CONFIG_MEMORY_HOTPLUG is not set
229#
230# Memory hotplug is currently incompatible with Software Suspend
231#
232CONFIG_SPLIT_PTLOCK_CPUS=4 261CONFIG_SPLIT_PTLOCK_CPUS=4
233CONFIG_MIGRATION=y 262CONFIG_MIGRATION=y
234# CONFIG_PHYS_ADDR_T_64BIT is not set 263# CONFIG_PHYS_ADDR_T_64BIT is not set
235CONFIG_ZONE_DMA_FLAG=0 264CONFIG_ZONE_DMA_FLAG=0
236CONFIG_NR_QUICK=2 265CONFIG_NR_QUICK=2
237CONFIG_HAVE_MLOCK=y
238CONFIG_HAVE_MLOCKED_PAGE_BIT=y
239# CONFIG_KSM is not set 266# CONFIG_KSM is not set
240CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 267CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
241 268
@@ -269,7 +296,6 @@ CONFIG_CPU_HAS_FPU=y
269# 296#
270CONFIG_SH_TIMER_TMU=y 297CONFIG_SH_TIMER_TMU=y
271CONFIG_SH_TIMER_CMT=y 298CONFIG_SH_TIMER_CMT=y
272CONFIG_SH_PCLK_FREQ=41666666
273CONFIG_SH_CLK_CPG=y 299CONFIG_SH_CLK_CPG=y
274CONFIG_TICK_ONESHOT=y 300CONFIG_TICK_ONESHOT=y
275CONFIG_NO_HZ=y 301CONFIG_NO_HZ=y
@@ -388,6 +414,10 @@ CONFIG_EXTRA_FIRMWARE=""
388CONFIG_BLK_DEV=y 414CONFIG_BLK_DEV=y
389# CONFIG_BLK_DEV_COW_COMMON is not set 415# CONFIG_BLK_DEV_COW_COMMON is not set
390# CONFIG_BLK_DEV_LOOP is not set 416# CONFIG_BLK_DEV_LOOP is not set
417
418#
419# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
420#
391# CONFIG_BLK_DEV_RAM is not set 421# CONFIG_BLK_DEV_RAM is not set
392# CONFIG_CDROM_PKTCDVD is not set 422# CONFIG_CDROM_PKTCDVD is not set
393# CONFIG_BLK_DEV_HD is not set 423# CONFIG_BLK_DEV_HD is not set
@@ -476,7 +506,6 @@ CONFIG_I2C_SH_MOBILE=y
476# 506#
477# Miscellaneous I2C Chip support 507# Miscellaneous I2C Chip support
478# 508#
479# CONFIG_DS1682 is not set
480# CONFIG_SENSORS_TSL2550 is not set 509# CONFIG_SENSORS_TSL2550 is not set
481# CONFIG_I2C_DEBUG_CORE is not set 510# CONFIG_I2C_DEBUG_CORE is not set
482# CONFIG_I2C_DEBUG_ALGO is not set 511# CONFIG_I2C_DEBUG_ALGO is not set
@@ -505,15 +534,18 @@ CONFIG_SSB_POSSIBLE=y
505# 534#
506# CONFIG_MFD_CORE is not set 535# CONFIG_MFD_CORE is not set
507# CONFIG_MFD_SM501 is not set 536# CONFIG_MFD_SM501 is not set
537# CONFIG_MFD_SH_MOBILE_SDHI is not set
508# CONFIG_HTC_PASIC3 is not set 538# CONFIG_HTC_PASIC3 is not set
509# CONFIG_TWL4030_CORE is not set 539# CONFIG_TWL4030_CORE is not set
510# CONFIG_MFD_TMIO is not set 540# CONFIG_MFD_TMIO is not set
511# CONFIG_PMIC_DA903X is not set 541# CONFIG_PMIC_DA903X is not set
542# CONFIG_PMIC_ADP5520 is not set
512# CONFIG_MFD_WM8400 is not set 543# CONFIG_MFD_WM8400 is not set
513# CONFIG_MFD_WM831X is not set 544# CONFIG_MFD_WM831X is not set
514# CONFIG_MFD_WM8350_I2C is not set 545# CONFIG_MFD_WM8350_I2C is not set
515# CONFIG_MFD_PCF50633 is not set 546# CONFIG_MFD_PCF50633 is not set
516# CONFIG_AB3100_CORE is not set 547# CONFIG_AB3100_CORE is not set
548# CONFIG_MFD_88PM8607 is not set
517# CONFIG_REGULATOR is not set 549# CONFIG_REGULATOR is not set
518# CONFIG_MEDIA_SUPPORT is not set 550# CONFIG_MEDIA_SUPPORT is not set
519 551
@@ -561,6 +593,7 @@ CONFIG_RTC_INTF_DEV=y
561# CONFIG_RTC_DRV_PCF8563 is not set 593# CONFIG_RTC_DRV_PCF8563 is not set
562# CONFIG_RTC_DRV_PCF8583 is not set 594# CONFIG_RTC_DRV_PCF8583 is not set
563# CONFIG_RTC_DRV_M41T80 is not set 595# CONFIG_RTC_DRV_M41T80 is not set
596# CONFIG_RTC_DRV_BQ32K is not set
564# CONFIG_RTC_DRV_S35390A is not set 597# CONFIG_RTC_DRV_S35390A is not set
565# CONFIG_RTC_DRV_FM3130 is not set 598# CONFIG_RTC_DRV_FM3130 is not set
566# CONFIG_RTC_DRV_RX8581 is not set 599# CONFIG_RTC_DRV_RX8581 is not set
@@ -581,7 +614,9 @@ CONFIG_RTC_INTF_DEV=y
581# CONFIG_RTC_DRV_M48T86 is not set 614# CONFIG_RTC_DRV_M48T86 is not set
582# CONFIG_RTC_DRV_M48T35 is not set 615# CONFIG_RTC_DRV_M48T35 is not set
583# CONFIG_RTC_DRV_M48T59 is not set 616# CONFIG_RTC_DRV_M48T59 is not set
617# CONFIG_RTC_DRV_MSM6242 is not set
584# CONFIG_RTC_DRV_BQ4802 is not set 618# CONFIG_RTC_DRV_BQ4802 is not set
619# CONFIG_RTC_DRV_RP5C01 is not set
585# CONFIG_RTC_DRV_V3020 is not set 620# CONFIG_RTC_DRV_V3020 is not set
586 621
587# 622#
@@ -608,6 +643,7 @@ CONFIG_UIO_PDRV_GENIRQ=y
608# CONFIG_EXT2_FS is not set 643# CONFIG_EXT2_FS is not set
609# CONFIG_EXT3_FS is not set 644# CONFIG_EXT3_FS is not set
610# CONFIG_EXT4_FS is not set 645# CONFIG_EXT4_FS is not set
646CONFIG_EXT4_USE_FOR_EXT23=y
611# CONFIG_REISERFS_FS is not set 647# CONFIG_REISERFS_FS is not set
612# CONFIG_JFS_FS is not set 648# CONFIG_JFS_FS is not set
613# CONFIG_FS_POSIX_ACL is not set 649# CONFIG_FS_POSIX_ACL is not set
@@ -675,11 +711,10 @@ CONFIG_DEBUG_FS=y
675# CONFIG_HEADERS_CHECK is not set 711# CONFIG_HEADERS_CHECK is not set
676# CONFIG_DEBUG_KERNEL is not set 712# CONFIG_DEBUG_KERNEL is not set
677CONFIG_STACKTRACE=y 713CONFIG_STACKTRACE=y
678# CONFIG_DEBUG_BUGVERBOSE is not set 714CONFIG_DEBUG_BUGVERBOSE=y
679# CONFIG_DEBUG_MEMORY_INIT is not set 715# CONFIG_DEBUG_MEMORY_INIT is not set
680# CONFIG_RCU_CPU_STALL_DETECTOR is not set 716# CONFIG_RCU_CPU_STALL_DETECTOR is not set
681# CONFIG_LATENCYTOP is not set 717# CONFIG_LATENCYTOP is not set
682# CONFIG_SYSCTL_SYSCALL_CHECK is not set
683CONFIG_NOP_TRACER=y 718CONFIG_NOP_TRACER=y
684CONFIG_HAVE_FUNCTION_TRACER=y 719CONFIG_HAVE_FUNCTION_TRACER=y
685CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 720CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
@@ -699,7 +734,6 @@ CONFIG_TRACING_SUPPORT=y
699# CONFIG_SAMPLES is not set 734# CONFIG_SAMPLES is not set
700CONFIG_HAVE_ARCH_KGDB=y 735CONFIG_HAVE_ARCH_KGDB=y
701# CONFIG_SH_STANDARD_BIOS is not set 736# CONFIG_SH_STANDARD_BIOS is not set
702# CONFIG_EARLY_SCIF_CONSOLE is not set
703# CONFIG_DWARF_UNWINDER is not set 737# CONFIG_DWARF_UNWINDER is not set
704 738
705# 739#
@@ -707,7 +741,11 @@ CONFIG_HAVE_ARCH_KGDB=y
707# 741#
708# CONFIG_KEYS is not set 742# CONFIG_KEYS is not set
709# CONFIG_SECURITYFS is not set 743# CONFIG_SECURITYFS is not set
710# CONFIG_SECURITY_FILE_CAPABILITIES is not set 744# CONFIG_DEFAULT_SECURITY_SELINUX is not set
745# CONFIG_DEFAULT_SECURITY_SMACK is not set
746# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
747CONFIG_DEFAULT_SECURITY_DAC=y
748CONFIG_DEFAULT_SECURITY=""
711# CONFIG_CRYPTO is not set 749# CONFIG_CRYPTO is not set
712CONFIG_BINARY_PRINTF=y 750CONFIG_BINARY_PRINTF=y
713 751
diff --git a/arch/sh/configs/sh7763rdp_defconfig b/arch/sh/configs/sh7763rdp_defconfig
index 194ff703e23d..04b841b29427 100644
--- a/arch/sh/configs/sh7763rdp_defconfig
+++ b/arch/sh/configs/sh7763rdp_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Thu Sep 24 19:15:37 2009 4# Mon Jan 4 15:05:29 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -20,6 +20,7 @@ CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set 21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
22CONFIG_ARCH_HIBERNATION_POSSIBLE=y 22CONFIG_ARCH_HIBERNATION_POSSIBLE=y
23CONFIG_SYS_SUPPORTS_HUGETLBFS=y
23CONFIG_SYS_SUPPORTS_TMU=y 24CONFIG_SYS_SUPPORTS_TMU=y
24CONFIG_STACKTRACE_SUPPORT=y 25CONFIG_STACKTRACE_SUPPORT=y
25CONFIG_LOCKDEP_SUPPORT=y 26CONFIG_LOCKDEP_SUPPORT=y
@@ -29,6 +30,7 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
29CONFIG_ARCH_NO_VIRT_TO_BUS=y 30CONFIG_ARCH_NO_VIRT_TO_BUS=y
30CONFIG_ARCH_HAS_DEFAULT_IDLE=y 31CONFIG_ARCH_HAS_DEFAULT_IDLE=y
31CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
33CONFIG_DMA_NONCOHERENT=y
32CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 34CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
33CONFIG_CONSTRUCTORS=y 35CONFIG_CONSTRUCTORS=y
34 36
@@ -59,6 +61,7 @@ CONFIG_SYSVIPC_SYSCTL=y
59# 61#
60CONFIG_TREE_RCU=y 62CONFIG_TREE_RCU=y
61# CONFIG_TREE_PREEMPT_RCU is not set 63# CONFIG_TREE_PREEMPT_RCU is not set
64# CONFIG_TINY_RCU is not set
62# CONFIG_RCU_TRACE is not set 65# CONFIG_RCU_TRACE is not set
63CONFIG_RCU_FANOUT=32 66CONFIG_RCU_FANOUT=32
64# CONFIG_RCU_FANOUT_EXACT is not set 67# CONFIG_RCU_FANOUT_EXACT is not set
@@ -103,6 +106,7 @@ CONFIG_EVENTFD=y
103CONFIG_SHMEM=y 106CONFIG_SHMEM=y
104CONFIG_AIO=y 107CONFIG_AIO=y
105CONFIG_HAVE_PERF_EVENTS=y 108CONFIG_HAVE_PERF_EVENTS=y
109CONFIG_PERF_USE_VMALLOC=y
106 110
107# 111#
108# Kernel Performance Events And Counters 112# Kernel Performance Events And Counters
@@ -124,6 +128,7 @@ CONFIG_HAVE_IOREMAP_PROT=y
124CONFIG_HAVE_KPROBES=y 128CONFIG_HAVE_KPROBES=y
125CONFIG_HAVE_KRETPROBES=y 129CONFIG_HAVE_KRETPROBES=y
126CONFIG_HAVE_ARCH_TRACEHOOK=y 130CONFIG_HAVE_ARCH_TRACEHOOK=y
131CONFIG_HAVE_DMA_ATTRS=y
127CONFIG_HAVE_CLK=y 132CONFIG_HAVE_CLK=y
128CONFIG_HAVE_DMA_API_DEBUG=y 133CONFIG_HAVE_DMA_API_DEBUG=y
129 134
@@ -150,14 +155,41 @@ CONFIG_LBDAF=y
150# IO Schedulers 155# IO Schedulers
151# 156#
152CONFIG_IOSCHED_NOOP=y 157CONFIG_IOSCHED_NOOP=y
153CONFIG_IOSCHED_AS=y
154CONFIG_IOSCHED_DEADLINE=y 158CONFIG_IOSCHED_DEADLINE=y
155CONFIG_IOSCHED_CFQ=y 159CONFIG_IOSCHED_CFQ=y
156CONFIG_DEFAULT_AS=y
157# CONFIG_DEFAULT_DEADLINE is not set 160# CONFIG_DEFAULT_DEADLINE is not set
158# CONFIG_DEFAULT_CFQ is not set 161CONFIG_DEFAULT_CFQ=y
159# CONFIG_DEFAULT_NOOP is not set 162# CONFIG_DEFAULT_NOOP is not set
160CONFIG_DEFAULT_IOSCHED="anticipatory" 163CONFIG_DEFAULT_IOSCHED="cfq"
164# CONFIG_INLINE_SPIN_TRYLOCK is not set
165# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
166# CONFIG_INLINE_SPIN_LOCK is not set
167# CONFIG_INLINE_SPIN_LOCK_BH is not set
168# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
169# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
170CONFIG_INLINE_SPIN_UNLOCK=y
171# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
172CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
173# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
174# CONFIG_INLINE_READ_TRYLOCK is not set
175# CONFIG_INLINE_READ_LOCK is not set
176# CONFIG_INLINE_READ_LOCK_BH is not set
177# CONFIG_INLINE_READ_LOCK_IRQ is not set
178# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
179CONFIG_INLINE_READ_UNLOCK=y
180# CONFIG_INLINE_READ_UNLOCK_BH is not set
181CONFIG_INLINE_READ_UNLOCK_IRQ=y
182# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
183# CONFIG_INLINE_WRITE_TRYLOCK is not set
184# CONFIG_INLINE_WRITE_LOCK is not set
185# CONFIG_INLINE_WRITE_LOCK_BH is not set
186# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
187# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
188CONFIG_INLINE_WRITE_UNLOCK=y
189# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
190CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
191# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
192# CONFIG_MUTEX_SPIN_ON_OWNER is not set
161# CONFIG_FREEZER is not set 193# CONFIG_FREEZER is not set
162 194
163# 195#
@@ -211,6 +243,7 @@ CONFIG_FORCE_MAX_ZONEORDER=11
211CONFIG_MEMORY_START=0x0c000000 243CONFIG_MEMORY_START=0x0c000000
212CONFIG_MEMORY_SIZE=0x04000000 244CONFIG_MEMORY_SIZE=0x04000000
213CONFIG_29BIT=y 245CONFIG_29BIT=y
246# CONFIG_PMB_ENABLE is not set
214CONFIG_VSYSCALL=y 247CONFIG_VSYSCALL=y
215CONFIG_ARCH_FLATMEM_ENABLE=y 248CONFIG_ARCH_FLATMEM_ENABLE=y
216CONFIG_ARCH_SPARSEMEM_ENABLE=y 249CONFIG_ARCH_SPARSEMEM_ENABLE=y
@@ -237,8 +270,6 @@ CONFIG_MIGRATION=y
237# CONFIG_PHYS_ADDR_T_64BIT is not set 270# CONFIG_PHYS_ADDR_T_64BIT is not set
238CONFIG_ZONE_DMA_FLAG=0 271CONFIG_ZONE_DMA_FLAG=0
239CONFIG_NR_QUICK=2 272CONFIG_NR_QUICK=2
240CONFIG_HAVE_MLOCK=y
241CONFIG_HAVE_MLOCKED_PAGE_BIT=y
242# CONFIG_KSM is not set 273# CONFIG_KSM is not set
243CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 274CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
244 275
@@ -421,10 +452,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
421# CONFIG_AF_RXRPC is not set 452# CONFIG_AF_RXRPC is not set
422CONFIG_WIRELESS=y 453CONFIG_WIRELESS=y
423# CONFIG_CFG80211 is not set 454# CONFIG_CFG80211 is not set
424CONFIG_CFG80211_DEFAULT_PS_VALUE=0
425# CONFIG_WIRELESS_OLD_REGULATORY is not set
426CONFIG_WIRELESS_EXT=y
427CONFIG_WIRELESS_EXT_SYSFS=y
428# CONFIG_LIB80211 is not set 455# CONFIG_LIB80211 is not set
429 456
430# 457#
@@ -509,7 +536,6 @@ CONFIG_MTD_CFI_UTIL=y
509CONFIG_MTD_COMPLEX_MAPPINGS=y 536CONFIG_MTD_COMPLEX_MAPPINGS=y
510CONFIG_MTD_PHYSMAP=y 537CONFIG_MTD_PHYSMAP=y
511# CONFIG_MTD_PHYSMAP_COMPAT is not set 538# CONFIG_MTD_PHYSMAP_COMPAT is not set
512# CONFIG_MTD_GPIO_ADDR is not set
513# CONFIG_MTD_PLATRAM is not set 539# CONFIG_MTD_PLATRAM is not set
514 540
515# 541#
@@ -542,6 +568,10 @@ CONFIG_MTD_PHYSMAP=y
542CONFIG_BLK_DEV=y 568CONFIG_BLK_DEV=y
543# CONFIG_BLK_DEV_COW_COMMON is not set 569# CONFIG_BLK_DEV_COW_COMMON is not set
544# CONFIG_BLK_DEV_LOOP is not set 570# CONFIG_BLK_DEV_LOOP is not set
571
572#
573# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
574#
545# CONFIG_BLK_DEV_NBD is not set 575# CONFIG_BLK_DEV_NBD is not set
546# CONFIG_BLK_DEV_UB is not set 576# CONFIG_BLK_DEV_UB is not set
547# CONFIG_BLK_DEV_RAM is not set 577# CONFIG_BLK_DEV_RAM is not set
@@ -640,11 +670,12 @@ CONFIG_SH_ETH=y
640# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set 670# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
641# CONFIG_B44 is not set 671# CONFIG_B44 is not set
642# CONFIG_KS8842 is not set 672# CONFIG_KS8842 is not set
673# CONFIG_KS8851_MLL is not set
643# CONFIG_NETDEV_1000 is not set 674# CONFIG_NETDEV_1000 is not set
644# CONFIG_NETDEV_10000 is not set 675# CONFIG_NETDEV_10000 is not set
645CONFIG_WLAN=y 676CONFIG_WLAN=y
646# CONFIG_WLAN_PRE80211 is not set 677# CONFIG_USB_ZD1201 is not set
647# CONFIG_WLAN_80211 is not set 678# CONFIG_HOSTAP is not set
648 679
649# 680#
650# Enable WiMAX (Networking options) to see the WiMAX drivers 681# Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -673,6 +704,7 @@ CONFIG_WLAN=y
673CONFIG_INPUT=y 704CONFIG_INPUT=y
674# CONFIG_INPUT_FF_MEMLESS is not set 705# CONFIG_INPUT_FF_MEMLESS is not set
675# CONFIG_INPUT_POLLDEV is not set 706# CONFIG_INPUT_POLLDEV is not set
707# CONFIG_INPUT_SPARSEKMAP is not set
676 708
677# 709#
678# Userland interfaces 710# Userland interfaces
@@ -756,6 +788,7 @@ CONFIG_SSB_POSSIBLE=y
756# 788#
757# CONFIG_MFD_CORE is not set 789# CONFIG_MFD_CORE is not set
758# CONFIG_MFD_SM501 is not set 790# CONFIG_MFD_SM501 is not set
791# CONFIG_MFD_SH_MOBILE_SDHI is not set
759# CONFIG_HTC_PASIC3 is not set 792# CONFIG_HTC_PASIC3 is not set
760# CONFIG_MFD_TMIO is not set 793# CONFIG_MFD_TMIO is not set
761# CONFIG_REGULATOR is not set 794# CONFIG_REGULATOR is not set
@@ -949,6 +982,7 @@ CONFIG_MMC_BLOCK_BOUNCE=y
949# CONFIG_MMC_SDHCI is not set 982# CONFIG_MMC_SDHCI is not set
950# CONFIG_MMC_AT91 is not set 983# CONFIG_MMC_AT91 is not set
951# CONFIG_MMC_ATMELMCI is not set 984# CONFIG_MMC_ATMELMCI is not set
985# CONFIG_MMC_TMIO is not set
952# CONFIG_MEMSTICK is not set 986# CONFIG_MEMSTICK is not set
953# CONFIG_NEW_LEDS is not set 987# CONFIG_NEW_LEDS is not set
954# CONFIG_ACCESSIBILITY is not set 988# CONFIG_ACCESSIBILITY is not set
@@ -1129,10 +1163,11 @@ CONFIG_DEBUG_FS=y
1129# CONFIG_HEADERS_CHECK is not set 1163# CONFIG_HEADERS_CHECK is not set
1130# CONFIG_DEBUG_KERNEL is not set 1164# CONFIG_DEBUG_KERNEL is not set
1131CONFIG_STACKTRACE=y 1165CONFIG_STACKTRACE=y
1132# CONFIG_DEBUG_BUGVERBOSE is not set 1166CONFIG_DEBUG_BUGVERBOSE=y
1133# CONFIG_DEBUG_MEMORY_INIT is not set 1167# CONFIG_DEBUG_MEMORY_INIT is not set
1134# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1168# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1135# CONFIG_LATENCYTOP is not set 1169# CONFIG_LATENCYTOP is not set
1170# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1136CONFIG_NOP_TRACER=y 1171CONFIG_NOP_TRACER=y
1137CONFIG_HAVE_FUNCTION_TRACER=y 1172CONFIG_HAVE_FUNCTION_TRACER=y
1138CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 1173CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
@@ -1152,7 +1187,6 @@ CONFIG_TRACING_SUPPORT=y
1152# CONFIG_SAMPLES is not set 1187# CONFIG_SAMPLES is not set
1153CONFIG_HAVE_ARCH_KGDB=y 1188CONFIG_HAVE_ARCH_KGDB=y
1154# CONFIG_SH_STANDARD_BIOS is not set 1189# CONFIG_SH_STANDARD_BIOS is not set
1155# CONFIG_EARLY_SCIF_CONSOLE is not set
1156# CONFIG_DWARF_UNWINDER is not set 1190# CONFIG_DWARF_UNWINDER is not set
1157 1191
1158# 1192#
@@ -1161,7 +1195,11 @@ CONFIG_HAVE_ARCH_KGDB=y
1161# CONFIG_KEYS is not set 1195# CONFIG_KEYS is not set
1162# CONFIG_SECURITY is not set 1196# CONFIG_SECURITY is not set
1163# CONFIG_SECURITYFS is not set 1197# CONFIG_SECURITYFS is not set
1164# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1198# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1199# CONFIG_DEFAULT_SECURITY_SMACK is not set
1200# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1201CONFIG_DEFAULT_SECURITY_DAC=y
1202CONFIG_DEFAULT_SECURITY=""
1165CONFIG_CRYPTO=y 1203CONFIG_CRYPTO=y
1166 1204
1167# 1205#
diff --git a/arch/sh/configs/sh7770_generic_defconfig b/arch/sh/configs/sh7770_generic_defconfig
index 34bed5541f31..7b247053ece6 100644
--- a/arch/sh/configs/sh7770_generic_defconfig
+++ b/arch/sh/configs/sh7770_generic_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Thu Sep 24 19:17:16 2009 4# Mon Jan 4 15:06:28 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -20,6 +20,7 @@ CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set 21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
22CONFIG_ARCH_HIBERNATION_POSSIBLE=y 22CONFIG_ARCH_HIBERNATION_POSSIBLE=y
23CONFIG_SYS_SUPPORTS_HUGETLBFS=y
23CONFIG_SYS_SUPPORTS_TMU=y 24CONFIG_SYS_SUPPORTS_TMU=y
24CONFIG_STACKTRACE_SUPPORT=y 25CONFIG_STACKTRACE_SUPPORT=y
25CONFIG_LOCKDEP_SUPPORT=y 26CONFIG_LOCKDEP_SUPPORT=y
@@ -29,6 +30,7 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
29CONFIG_ARCH_NO_VIRT_TO_BUS=y 30CONFIG_ARCH_NO_VIRT_TO_BUS=y
30CONFIG_ARCH_HAS_DEFAULT_IDLE=y 31CONFIG_ARCH_HAS_DEFAULT_IDLE=y
31CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
33CONFIG_DMA_NONCOHERENT=y
32CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 34CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
33CONFIG_CONSTRUCTORS=y 35CONFIG_CONSTRUCTORS=y
34 36
@@ -48,7 +50,6 @@ CONFIG_KERNEL_GZIP=y
48# CONFIG_KERNEL_LZMA is not set 50# CONFIG_KERNEL_LZMA is not set
49CONFIG_SWAP=y 51CONFIG_SWAP=y
50CONFIG_SYSVIPC=y 52CONFIG_SYSVIPC=y
51CONFIG_SYSVIPC_SYSCTL=y
52# CONFIG_BSD_PROCESS_ACCT is not set 53# CONFIG_BSD_PROCESS_ACCT is not set
53 54
54# 55#
@@ -56,6 +57,7 @@ CONFIG_SYSVIPC_SYSCTL=y
56# 57#
57CONFIG_TREE_RCU=y 58CONFIG_TREE_RCU=y
58# CONFIG_TREE_PREEMPT_RCU is not set 59# CONFIG_TREE_PREEMPT_RCU is not set
60# CONFIG_TINY_RCU is not set
59# CONFIG_RCU_TRACE is not set 61# CONFIG_RCU_TRACE is not set
60CONFIG_RCU_FANOUT=32 62CONFIG_RCU_FANOUT=32
61# CONFIG_RCU_FANOUT_EXACT is not set 63# CONFIG_RCU_FANOUT_EXACT is not set
@@ -79,11 +81,9 @@ CONFIG_CGROUPS=y
79# CONFIG_NAMESPACES is not set 81# CONFIG_NAMESPACES is not set
80# CONFIG_BLK_DEV_INITRD is not set 82# CONFIG_BLK_DEV_INITRD is not set
81CONFIG_CC_OPTIMIZE_FOR_SIZE=y 83CONFIG_CC_OPTIMIZE_FOR_SIZE=y
82CONFIG_SYSCTL=y
83CONFIG_ANON_INODES=y 84CONFIG_ANON_INODES=y
84CONFIG_EMBEDDED=y 85CONFIG_EMBEDDED=y
85# CONFIG_UID16 is not set 86# CONFIG_UID16 is not set
86CONFIG_SYSCTL_SYSCALL=y
87CONFIG_KALLSYMS=y 87CONFIG_KALLSYMS=y
88# CONFIG_KALLSYMS_EXTRA_PASS is not set 88# CONFIG_KALLSYMS_EXTRA_PASS is not set
89CONFIG_HOTPLUG=y 89CONFIG_HOTPLUG=y
@@ -99,6 +99,7 @@ CONFIG_EVENTFD=y
99CONFIG_SHMEM=y 99CONFIG_SHMEM=y
100CONFIG_AIO=y 100CONFIG_AIO=y
101CONFIG_HAVE_PERF_EVENTS=y 101CONFIG_HAVE_PERF_EVENTS=y
102CONFIG_PERF_USE_VMALLOC=y
102 103
103# 104#
104# Kernel Performance Events And Counters 105# Kernel Performance Events And Counters
@@ -119,6 +120,7 @@ CONFIG_HAVE_IOREMAP_PROT=y
119CONFIG_HAVE_KPROBES=y 120CONFIG_HAVE_KPROBES=y
120CONFIG_HAVE_KRETPROBES=y 121CONFIG_HAVE_KRETPROBES=y
121CONFIG_HAVE_ARCH_TRACEHOOK=y 122CONFIG_HAVE_ARCH_TRACEHOOK=y
123CONFIG_HAVE_DMA_ATTRS=y
122CONFIG_HAVE_CLK=y 124CONFIG_HAVE_CLK=y
123CONFIG_HAVE_DMA_API_DEBUG=y 125CONFIG_HAVE_DMA_API_DEBUG=y
124 126
@@ -135,19 +137,48 @@ CONFIG_BLOCK=y
135CONFIG_LBDAF=y 137CONFIG_LBDAF=y
136# CONFIG_BLK_DEV_BSG is not set 138# CONFIG_BLK_DEV_BSG is not set
137# CONFIG_BLK_DEV_INTEGRITY is not set 139# CONFIG_BLK_DEV_INTEGRITY is not set
140# CONFIG_BLK_CGROUP is not set
138 141
139# 142#
140# IO Schedulers 143# IO Schedulers
141# 144#
142CONFIG_IOSCHED_NOOP=y 145CONFIG_IOSCHED_NOOP=y
143CONFIG_IOSCHED_AS=y
144CONFIG_IOSCHED_DEADLINE=y 146CONFIG_IOSCHED_DEADLINE=y
145CONFIG_IOSCHED_CFQ=y 147CONFIG_IOSCHED_CFQ=y
146CONFIG_DEFAULT_AS=y 148# CONFIG_CFQ_GROUP_IOSCHED is not set
147# CONFIG_DEFAULT_DEADLINE is not set 149# CONFIG_DEFAULT_DEADLINE is not set
148# CONFIG_DEFAULT_CFQ is not set 150CONFIG_DEFAULT_CFQ=y
149# CONFIG_DEFAULT_NOOP is not set 151# CONFIG_DEFAULT_NOOP is not set
150CONFIG_DEFAULT_IOSCHED="anticipatory" 152CONFIG_DEFAULT_IOSCHED="cfq"
153# CONFIG_INLINE_SPIN_TRYLOCK is not set
154# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
155# CONFIG_INLINE_SPIN_LOCK is not set
156# CONFIG_INLINE_SPIN_LOCK_BH is not set
157# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
158# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
159CONFIG_INLINE_SPIN_UNLOCK=y
160# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
161CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
162# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
163# CONFIG_INLINE_READ_TRYLOCK is not set
164# CONFIG_INLINE_READ_LOCK is not set
165# CONFIG_INLINE_READ_LOCK_BH is not set
166# CONFIG_INLINE_READ_LOCK_IRQ is not set
167# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
168CONFIG_INLINE_READ_UNLOCK=y
169# CONFIG_INLINE_READ_UNLOCK_BH is not set
170CONFIG_INLINE_READ_UNLOCK_IRQ=y
171# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
172# CONFIG_INLINE_WRITE_TRYLOCK is not set
173# CONFIG_INLINE_WRITE_LOCK is not set
174# CONFIG_INLINE_WRITE_LOCK_BH is not set
175# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
176# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
177CONFIG_INLINE_WRITE_UNLOCK=y
178# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
179CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
180# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
181# CONFIG_MUTEX_SPIN_ON_OWNER is not set
151CONFIG_FREEZER=y 182CONFIG_FREEZER=y
152 183
153# 184#
@@ -201,6 +232,7 @@ CONFIG_FORCE_MAX_ZONEORDER=11
201CONFIG_MEMORY_START=0x08000000 232CONFIG_MEMORY_START=0x08000000
202CONFIG_MEMORY_SIZE=0x04000000 233CONFIG_MEMORY_SIZE=0x04000000
203CONFIG_29BIT=y 234CONFIG_29BIT=y
235# CONFIG_PMB_ENABLE is not set
204CONFIG_VSYSCALL=y 236CONFIG_VSYSCALL=y
205CONFIG_ARCH_FLATMEM_ENABLE=y 237CONFIG_ARCH_FLATMEM_ENABLE=y
206CONFIG_ARCH_SPARSEMEM_ENABLE=y 238CONFIG_ARCH_SPARSEMEM_ENABLE=y
@@ -221,17 +253,12 @@ CONFIG_SPARSEMEM_MANUAL=y
221CONFIG_SPARSEMEM=y 253CONFIG_SPARSEMEM=y
222CONFIG_HAVE_MEMORY_PRESENT=y 254CONFIG_HAVE_MEMORY_PRESENT=y
223CONFIG_SPARSEMEM_STATIC=y 255CONFIG_SPARSEMEM_STATIC=y
224 256# CONFIG_MEMORY_HOTPLUG is not set
225#
226# Memory hotplug is currently incompatible with Software Suspend
227#
228CONFIG_SPLIT_PTLOCK_CPUS=4 257CONFIG_SPLIT_PTLOCK_CPUS=4
229CONFIG_MIGRATION=y 258CONFIG_MIGRATION=y
230# CONFIG_PHYS_ADDR_T_64BIT is not set 259# CONFIG_PHYS_ADDR_T_64BIT is not set
231CONFIG_ZONE_DMA_FLAG=0 260CONFIG_ZONE_DMA_FLAG=0
232CONFIG_NR_QUICK=2 261CONFIG_NR_QUICK=2
233CONFIG_HAVE_MLOCK=y
234CONFIG_HAVE_MLOCKED_PAGE_BIT=y
235# CONFIG_KSM is not set 262# CONFIG_KSM is not set
236CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 263CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
237 264
@@ -379,6 +406,10 @@ CONFIG_EXTRA_FIRMWARE=""
379CONFIG_BLK_DEV=y 406CONFIG_BLK_DEV=y
380# CONFIG_BLK_DEV_COW_COMMON is not set 407# CONFIG_BLK_DEV_COW_COMMON is not set
381# CONFIG_BLK_DEV_LOOP is not set 408# CONFIG_BLK_DEV_LOOP is not set
409
410#
411# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
412#
382# CONFIG_BLK_DEV_RAM is not set 413# CONFIG_BLK_DEV_RAM is not set
383# CONFIG_CDROM_PKTCDVD is not set 414# CONFIG_CDROM_PKTCDVD is not set
384# CONFIG_BLK_DEV_HD is not set 415# CONFIG_BLK_DEV_HD is not set
@@ -467,7 +498,6 @@ CONFIG_I2C_SH_MOBILE=y
467# 498#
468# Miscellaneous I2C Chip support 499# Miscellaneous I2C Chip support
469# 500#
470# CONFIG_DS1682 is not set
471# CONFIG_SENSORS_TSL2550 is not set 501# CONFIG_SENSORS_TSL2550 is not set
472# CONFIG_I2C_DEBUG_CORE is not set 502# CONFIG_I2C_DEBUG_CORE is not set
473# CONFIG_I2C_DEBUG_ALGO is not set 503# CONFIG_I2C_DEBUG_ALGO is not set
@@ -496,15 +526,18 @@ CONFIG_SSB_POSSIBLE=y
496# 526#
497# CONFIG_MFD_CORE is not set 527# CONFIG_MFD_CORE is not set
498# CONFIG_MFD_SM501 is not set 528# CONFIG_MFD_SM501 is not set
529# CONFIG_MFD_SH_MOBILE_SDHI is not set
499# CONFIG_HTC_PASIC3 is not set 530# CONFIG_HTC_PASIC3 is not set
500# CONFIG_TWL4030_CORE is not set 531# CONFIG_TWL4030_CORE is not set
501# CONFIG_MFD_TMIO is not set 532# CONFIG_MFD_TMIO is not set
502# CONFIG_PMIC_DA903X is not set 533# CONFIG_PMIC_DA903X is not set
534# CONFIG_PMIC_ADP5520 is not set
503# CONFIG_MFD_WM8400 is not set 535# CONFIG_MFD_WM8400 is not set
504# CONFIG_MFD_WM831X is not set 536# CONFIG_MFD_WM831X is not set
505# CONFIG_MFD_WM8350_I2C is not set 537# CONFIG_MFD_WM8350_I2C is not set
506# CONFIG_MFD_PCF50633 is not set 538# CONFIG_MFD_PCF50633 is not set
507# CONFIG_AB3100_CORE is not set 539# CONFIG_AB3100_CORE is not set
540# CONFIG_MFD_88PM8607 is not set
508# CONFIG_REGULATOR is not set 541# CONFIG_REGULATOR is not set
509# CONFIG_MEDIA_SUPPORT is not set 542# CONFIG_MEDIA_SUPPORT is not set
510 543
@@ -552,6 +585,7 @@ CONFIG_RTC_INTF_DEV=y
552# CONFIG_RTC_DRV_PCF8563 is not set 585# CONFIG_RTC_DRV_PCF8563 is not set
553# CONFIG_RTC_DRV_PCF8583 is not set 586# CONFIG_RTC_DRV_PCF8583 is not set
554# CONFIG_RTC_DRV_M41T80 is not set 587# CONFIG_RTC_DRV_M41T80 is not set
588# CONFIG_RTC_DRV_BQ32K is not set
555# CONFIG_RTC_DRV_S35390A is not set 589# CONFIG_RTC_DRV_S35390A is not set
556# CONFIG_RTC_DRV_FM3130 is not set 590# CONFIG_RTC_DRV_FM3130 is not set
557# CONFIG_RTC_DRV_RX8581 is not set 591# CONFIG_RTC_DRV_RX8581 is not set
@@ -572,7 +606,9 @@ CONFIG_RTC_INTF_DEV=y
572# CONFIG_RTC_DRV_M48T86 is not set 606# CONFIG_RTC_DRV_M48T86 is not set
573# CONFIG_RTC_DRV_M48T35 is not set 607# CONFIG_RTC_DRV_M48T35 is not set
574# CONFIG_RTC_DRV_M48T59 is not set 608# CONFIG_RTC_DRV_M48T59 is not set
609# CONFIG_RTC_DRV_MSM6242 is not set
575# CONFIG_RTC_DRV_BQ4802 is not set 610# CONFIG_RTC_DRV_BQ4802 is not set
611# CONFIG_RTC_DRV_RP5C01 is not set
576# CONFIG_RTC_DRV_V3020 is not set 612# CONFIG_RTC_DRV_V3020 is not set
577 613
578# 614#
@@ -599,6 +635,7 @@ CONFIG_UIO_PDRV_GENIRQ=y
599# CONFIG_EXT2_FS is not set 635# CONFIG_EXT2_FS is not set
600# CONFIG_EXT3_FS is not set 636# CONFIG_EXT3_FS is not set
601# CONFIG_EXT4_FS is not set 637# CONFIG_EXT4_FS is not set
638CONFIG_EXT4_USE_FOR_EXT23=y
602# CONFIG_REISERFS_FS is not set 639# CONFIG_REISERFS_FS is not set
603# CONFIG_JFS_FS is not set 640# CONFIG_JFS_FS is not set
604# CONFIG_FS_POSIX_ACL is not set 641# CONFIG_FS_POSIX_ACL is not set
@@ -666,11 +703,10 @@ CONFIG_DEBUG_FS=y
666# CONFIG_HEADERS_CHECK is not set 703# CONFIG_HEADERS_CHECK is not set
667# CONFIG_DEBUG_KERNEL is not set 704# CONFIG_DEBUG_KERNEL is not set
668CONFIG_STACKTRACE=y 705CONFIG_STACKTRACE=y
669# CONFIG_DEBUG_BUGVERBOSE is not set 706CONFIG_DEBUG_BUGVERBOSE=y
670# CONFIG_DEBUG_MEMORY_INIT is not set 707# CONFIG_DEBUG_MEMORY_INIT is not set
671# CONFIG_RCU_CPU_STALL_DETECTOR is not set 708# CONFIG_RCU_CPU_STALL_DETECTOR is not set
672# CONFIG_LATENCYTOP is not set 709# CONFIG_LATENCYTOP is not set
673# CONFIG_SYSCTL_SYSCALL_CHECK is not set
674CONFIG_NOP_TRACER=y 710CONFIG_NOP_TRACER=y
675CONFIG_HAVE_FUNCTION_TRACER=y 711CONFIG_HAVE_FUNCTION_TRACER=y
676CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 712CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
@@ -690,7 +726,6 @@ CONFIG_TRACING_SUPPORT=y
690# CONFIG_SAMPLES is not set 726# CONFIG_SAMPLES is not set
691CONFIG_HAVE_ARCH_KGDB=y 727CONFIG_HAVE_ARCH_KGDB=y
692# CONFIG_SH_STANDARD_BIOS is not set 728# CONFIG_SH_STANDARD_BIOS is not set
693# CONFIG_EARLY_SCIF_CONSOLE is not set
694# CONFIG_DWARF_UNWINDER is not set 729# CONFIG_DWARF_UNWINDER is not set
695 730
696# 731#
@@ -698,7 +733,11 @@ CONFIG_HAVE_ARCH_KGDB=y
698# 733#
699# CONFIG_KEYS is not set 734# CONFIG_KEYS is not set
700# CONFIG_SECURITYFS is not set 735# CONFIG_SECURITYFS is not set
701# CONFIG_SECURITY_FILE_CAPABILITIES is not set 736# CONFIG_DEFAULT_SECURITY_SELINUX is not set
737# CONFIG_DEFAULT_SECURITY_SMACK is not set
738# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
739CONFIG_DEFAULT_SECURITY_DAC=y
740CONFIG_DEFAULT_SECURITY=""
702# CONFIG_CRYPTO is not set 741# CONFIG_CRYPTO is not set
703CONFIG_BINARY_PRINTF=y 742CONFIG_BINARY_PRINTF=y
704 743
diff --git a/arch/sh/configs/sh7785lcr_32bit_defconfig b/arch/sh/configs/sh7785lcr_32bit_defconfig
index 51cbaedf7a56..8330813b0c1d 100644
--- a/arch/sh/configs/sh7785lcr_32bit_defconfig
+++ b/arch/sh/configs/sh7785lcr_32bit_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Fri Sep 25 11:39:20 2009 4# Mon Jan 4 15:07:40 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -20,6 +20,7 @@ CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set 21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
22CONFIG_ARCH_HIBERNATION_POSSIBLE=y 22CONFIG_ARCH_HIBERNATION_POSSIBLE=y
23CONFIG_SYS_SUPPORTS_HUGETLBFS=y
23CONFIG_SYS_SUPPORTS_NUMA=y 24CONFIG_SYS_SUPPORTS_NUMA=y
24CONFIG_SYS_SUPPORTS_PCI=y 25CONFIG_SYS_SUPPORTS_PCI=y
25CONFIG_SYS_SUPPORTS_TMU=y 26CONFIG_SYS_SUPPORTS_TMU=y
@@ -31,6 +32,7 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
31CONFIG_ARCH_NO_VIRT_TO_BUS=y 32CONFIG_ARCH_NO_VIRT_TO_BUS=y
32CONFIG_ARCH_HAS_DEFAULT_IDLE=y 33CONFIG_ARCH_HAS_DEFAULT_IDLE=y
33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 34CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
35CONFIG_DMA_NONCOHERENT=y
34CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 36CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
35CONFIG_CONSTRUCTORS=y 37CONFIG_CONSTRUCTORS=y
36 38
@@ -64,6 +66,7 @@ CONFIG_BSD_PROCESS_ACCT=y
64# 66#
65CONFIG_TREE_RCU=y 67CONFIG_TREE_RCU=y
66# CONFIG_TREE_PREEMPT_RCU is not set 68# CONFIG_TREE_PREEMPT_RCU is not set
69# CONFIG_TINY_RCU is not set
67# CONFIG_RCU_TRACE is not set 70# CONFIG_RCU_TRACE is not set
68CONFIG_RCU_FANOUT=32 71CONFIG_RCU_FANOUT=32
69# CONFIG_RCU_FANOUT_EXACT is not set 72# CONFIG_RCU_FANOUT_EXACT is not set
@@ -103,6 +106,7 @@ CONFIG_EVENTFD=y
103CONFIG_SHMEM=y 106CONFIG_SHMEM=y
104CONFIG_AIO=y 107CONFIG_AIO=y
105CONFIG_HAVE_PERF_EVENTS=y 108CONFIG_HAVE_PERF_EVENTS=y
109CONFIG_PERF_USE_VMALLOC=y
106 110
107# 111#
108# Kernel Performance Events And Counters 112# Kernel Performance Events And Counters
@@ -126,6 +130,7 @@ CONFIG_HAVE_IOREMAP_PROT=y
126CONFIG_HAVE_KPROBES=y 130CONFIG_HAVE_KPROBES=y
127CONFIG_HAVE_KRETPROBES=y 131CONFIG_HAVE_KRETPROBES=y
128CONFIG_HAVE_ARCH_TRACEHOOK=y 132CONFIG_HAVE_ARCH_TRACEHOOK=y
133CONFIG_HAVE_DMA_ATTRS=y
129CONFIG_HAVE_CLK=y 134CONFIG_HAVE_CLK=y
130CONFIG_HAVE_DMA_API_DEBUG=y 135CONFIG_HAVE_DMA_API_DEBUG=y
131 136
@@ -153,14 +158,41 @@ CONFIG_BLOCK=y
153# IO Schedulers 158# IO Schedulers
154# 159#
155CONFIG_IOSCHED_NOOP=y 160CONFIG_IOSCHED_NOOP=y
156CONFIG_IOSCHED_AS=y
157CONFIG_IOSCHED_DEADLINE=y 161CONFIG_IOSCHED_DEADLINE=y
158CONFIG_IOSCHED_CFQ=y 162CONFIG_IOSCHED_CFQ=y
159# CONFIG_DEFAULT_AS is not set
160# CONFIG_DEFAULT_DEADLINE is not set 163# CONFIG_DEFAULT_DEADLINE is not set
161CONFIG_DEFAULT_CFQ=y 164CONFIG_DEFAULT_CFQ=y
162# CONFIG_DEFAULT_NOOP is not set 165# CONFIG_DEFAULT_NOOP is not set
163CONFIG_DEFAULT_IOSCHED="cfq" 166CONFIG_DEFAULT_IOSCHED="cfq"
167# CONFIG_INLINE_SPIN_TRYLOCK is not set
168# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
169# CONFIG_INLINE_SPIN_LOCK is not set
170# CONFIG_INLINE_SPIN_LOCK_BH is not set
171# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
172# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
173# CONFIG_INLINE_SPIN_UNLOCK is not set
174# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
175# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
176# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
177# CONFIG_INLINE_READ_TRYLOCK is not set
178# CONFIG_INLINE_READ_LOCK is not set
179# CONFIG_INLINE_READ_LOCK_BH is not set
180# CONFIG_INLINE_READ_LOCK_IRQ is not set
181# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
182# CONFIG_INLINE_READ_UNLOCK is not set
183# CONFIG_INLINE_READ_UNLOCK_BH is not set
184# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
185# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
186# CONFIG_INLINE_WRITE_TRYLOCK is not set
187# CONFIG_INLINE_WRITE_LOCK is not set
188# CONFIG_INLINE_WRITE_LOCK_BH is not set
189# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
190# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
191# CONFIG_INLINE_WRITE_UNLOCK is not set
192# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
193# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
194# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
195# CONFIG_MUTEX_SPIN_ON_OWNER is not set
164# CONFIG_FREEZER is not set 196# CONFIG_FREEZER is not set
165 197
166# 198#
@@ -253,8 +285,6 @@ CONFIG_MIGRATION=y
253# CONFIG_PHYS_ADDR_T_64BIT is not set 285# CONFIG_PHYS_ADDR_T_64BIT is not set
254CONFIG_ZONE_DMA_FLAG=0 286CONFIG_ZONE_DMA_FLAG=0
255CONFIG_NR_QUICK=2 287CONFIG_NR_QUICK=2
256CONFIG_HAVE_MLOCK=y
257CONFIG_HAVE_MLOCKED_PAGE_BIT=y
258# CONFIG_KSM is not set 288# CONFIG_KSM is not set
259CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 289CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
260 290
@@ -287,7 +317,6 @@ CONFIG_SH_SH7785LCR=y
287# Timer and clock configuration 317# Timer and clock configuration
288# 318#
289CONFIG_SH_TIMER_TMU=y 319CONFIG_SH_TIMER_TMU=y
290CONFIG_SH_PCLK_FREQ=50000000
291CONFIG_SH_CLK_CPG=y 320CONFIG_SH_CLK_CPG=y
292CONFIG_TICK_ONESHOT=y 321CONFIG_TICK_ONESHOT=y
293CONFIG_NO_HZ=y 322CONFIG_NO_HZ=y
@@ -360,7 +389,6 @@ CONFIG_ENTRY_OFFSET=0x00001000
360# Bus options 389# Bus options
361# 390#
362CONFIG_PCI=y 391CONFIG_PCI=y
363CONFIG_SH_PCIDMA_NONCOHERENT=y
364# CONFIG_PCIEPORTBUS is not set 392# CONFIG_PCIEPORTBUS is not set
365# CONFIG_ARCH_SUPPORTS_MSI is not set 393# CONFIG_ARCH_SUPPORTS_MSI is not set
366# CONFIG_PCI_LEGACY is not set 394# CONFIG_PCI_LEGACY is not set
@@ -470,10 +498,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
470# CONFIG_AF_RXRPC is not set 498# CONFIG_AF_RXRPC is not set
471CONFIG_WIRELESS=y 499CONFIG_WIRELESS=y
472# CONFIG_CFG80211 is not set 500# CONFIG_CFG80211 is not set
473CONFIG_CFG80211_DEFAULT_PS_VALUE=0
474# CONFIG_WIRELESS_OLD_REGULATORY is not set
475CONFIG_WIRELESS_EXT=y
476CONFIG_WIRELESS_EXT_SYSFS=y
477# CONFIG_LIB80211 is not set 501# CONFIG_LIB80211 is not set
478 502
479# 503#
@@ -588,6 +612,10 @@ CONFIG_BLK_DEV=y
588# CONFIG_BLK_DEV_COW_COMMON is not set 612# CONFIG_BLK_DEV_COW_COMMON is not set
589CONFIG_BLK_DEV_LOOP=y 613CONFIG_BLK_DEV_LOOP=y
590CONFIG_BLK_DEV_CRYPTOLOOP=m 614CONFIG_BLK_DEV_CRYPTOLOOP=m
615
616#
617# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
618#
591# CONFIG_BLK_DEV_NBD is not set 619# CONFIG_BLK_DEV_NBD is not set
592# CONFIG_BLK_DEV_SX8 is not set 620# CONFIG_BLK_DEV_SX8 is not set
593# CONFIG_BLK_DEV_UB is not set 621# CONFIG_BLK_DEV_UB is not set
@@ -688,15 +716,16 @@ CONFIG_SATA_SIL=y
688# CONFIG_PATA_NS87415 is not set 716# CONFIG_PATA_NS87415 is not set
689# CONFIG_PATA_OPTI is not set 717# CONFIG_PATA_OPTI is not set
690# CONFIG_PATA_OPTIDMA is not set 718# CONFIG_PATA_OPTIDMA is not set
719# CONFIG_PATA_PDC2027X is not set
691# CONFIG_PATA_PDC_OLD is not set 720# CONFIG_PATA_PDC_OLD is not set
692# CONFIG_PATA_RADISYS is not set 721# CONFIG_PATA_RADISYS is not set
693# CONFIG_PATA_RDC is not set 722# CONFIG_PATA_RDC is not set
694# CONFIG_PATA_RZ1000 is not set 723# CONFIG_PATA_RZ1000 is not set
695# CONFIG_PATA_SC1200 is not set 724# CONFIG_PATA_SC1200 is not set
696# CONFIG_PATA_SERVERWORKS is not set 725# CONFIG_PATA_SERVERWORKS is not set
697# CONFIG_PATA_PDC2027X is not set
698# CONFIG_PATA_SIL680 is not set 726# CONFIG_PATA_SIL680 is not set
699# CONFIG_PATA_SIS is not set 727# CONFIG_PATA_SIS is not set
728# CONFIG_PATA_TOSHIBA is not set
700# CONFIG_PATA_VIA is not set 729# CONFIG_PATA_VIA is not set
701# CONFIG_PATA_WINBOND is not set 730# CONFIG_PATA_WINBOND is not set
702# CONFIG_PATA_PLATFORM is not set 731# CONFIG_PATA_PLATFORM is not set
@@ -777,6 +806,7 @@ CONFIG_R8169=y
777# CONFIG_NETCONSOLE is not set 806# CONFIG_NETCONSOLE is not set
778# CONFIG_NETPOLL is not set 807# CONFIG_NETPOLL is not set
779# CONFIG_NET_POLL_CONTROLLER is not set 808# CONFIG_NET_POLL_CONTROLLER is not set
809# CONFIG_VMXNET3 is not set
780# CONFIG_ISDN is not set 810# CONFIG_ISDN is not set
781# CONFIG_PHONE is not set 811# CONFIG_PHONE is not set
782 812
@@ -786,6 +816,7 @@ CONFIG_R8169=y
786CONFIG_INPUT=y 816CONFIG_INPUT=y
787CONFIG_INPUT_FF_MEMLESS=m 817CONFIG_INPUT_FF_MEMLESS=m
788# CONFIG_INPUT_POLLDEV is not set 818# CONFIG_INPUT_POLLDEV is not set
819# CONFIG_INPUT_SPARSEKMAP is not set
789 820
790# 821#
791# Userland interfaces 822# Userland interfaces
@@ -841,6 +872,7 @@ CONFIG_SERIO_SERPORT=y
841# CONFIG_SERIO_PCIPS2 is not set 872# CONFIG_SERIO_PCIPS2 is not set
842CONFIG_SERIO_LIBPS2=y 873CONFIG_SERIO_LIBPS2=y
843# CONFIG_SERIO_RAW is not set 874# CONFIG_SERIO_RAW is not set
875# CONFIG_SERIO_ALTERA_PS2 is not set
844# CONFIG_GAMEPORT is not set 876# CONFIG_GAMEPORT is not set
845 877
846# 878#
@@ -924,11 +956,6 @@ CONFIG_I2C_ALGOPCA=y
924# CONFIG_I2C_TINY_USB is not set 956# CONFIG_I2C_TINY_USB is not set
925 957
926# 958#
927# Graphics adapter I2C/DDC channel drivers
928#
929# CONFIG_I2C_VOODOO3 is not set
930
931#
932# Other I2C/SMBus bus drivers 959# Other I2C/SMBus bus drivers
933# 960#
934CONFIG_I2C_PCA_PLATFORM=y 961CONFIG_I2C_PCA_PLATFORM=y
@@ -937,7 +964,6 @@ CONFIG_I2C_PCA_PLATFORM=y
937# 964#
938# Miscellaneous I2C Chip support 965# Miscellaneous I2C Chip support
939# 966#
940# CONFIG_DS1682 is not set
941# CONFIG_SENSORS_TSL2550 is not set 967# CONFIG_SENSORS_TSL2550 is not set
942# CONFIG_I2C_DEBUG_CORE is not set 968# CONFIG_I2C_DEBUG_CORE is not set
943# CONFIG_I2C_DEBUG_ALGO is not set 969# CONFIG_I2C_DEBUG_ALGO is not set
@@ -986,15 +1012,18 @@ CONFIG_SSB_POSSIBLE=y
986# 1012#
987# CONFIG_MFD_CORE is not set 1013# CONFIG_MFD_CORE is not set
988CONFIG_MFD_SM501=y 1014CONFIG_MFD_SM501=y
1015# CONFIG_MFD_SH_MOBILE_SDHI is not set
989# CONFIG_HTC_PASIC3 is not set 1016# CONFIG_HTC_PASIC3 is not set
990# CONFIG_TWL4030_CORE is not set 1017# CONFIG_TWL4030_CORE is not set
991# CONFIG_MFD_TMIO is not set 1018# CONFIG_MFD_TMIO is not set
992# CONFIG_PMIC_DA903X is not set 1019# CONFIG_PMIC_DA903X is not set
1020# CONFIG_PMIC_ADP5520 is not set
993# CONFIG_MFD_WM8400 is not set 1021# CONFIG_MFD_WM8400 is not set
994# CONFIG_MFD_WM831X is not set 1022# CONFIG_MFD_WM831X is not set
995# CONFIG_MFD_WM8350_I2C is not set 1023# CONFIG_MFD_WM8350_I2C is not set
996# CONFIG_MFD_PCF50633 is not set 1024# CONFIG_MFD_PCF50633 is not set
997# CONFIG_AB3100_CORE is not set 1025# CONFIG_AB3100_CORE is not set
1026# CONFIG_MFD_88PM8607 is not set
998# CONFIG_REGULATOR is not set 1027# CONFIG_REGULATOR is not set
999# CONFIG_MEDIA_SUPPORT is not set 1028# CONFIG_MEDIA_SUPPORT is not set
1000 1029
@@ -1129,6 +1158,7 @@ CONFIG_SND_CMIPCI=y
1129# CONFIG_SND_OXYGEN is not set 1158# CONFIG_SND_OXYGEN is not set
1130# CONFIG_SND_CS4281 is not set 1159# CONFIG_SND_CS4281 is not set
1131# CONFIG_SND_CS46XX is not set 1160# CONFIG_SND_CS46XX is not set
1161# CONFIG_SND_CS5535AUDIO is not set
1132# CONFIG_SND_CTXFI is not set 1162# CONFIG_SND_CTXFI is not set
1133# CONFIG_SND_DARLA20 is not set 1163# CONFIG_SND_DARLA20 is not set
1134# CONFIG_SND_GINA20 is not set 1164# CONFIG_SND_GINA20 is not set
@@ -1363,6 +1393,7 @@ CONFIG_MMC_SDHCI_PLTFM=m
1363# CONFIG_MMC_AT91 is not set 1393# CONFIG_MMC_AT91 is not set
1364# CONFIG_MMC_ATMELMCI is not set 1394# CONFIG_MMC_ATMELMCI is not set
1365# CONFIG_MMC_TIFM_SD is not set 1395# CONFIG_MMC_TIFM_SD is not set
1396# CONFIG_MMC_TMIO is not set
1366# CONFIG_MMC_CB710 is not set 1397# CONFIG_MMC_CB710 is not set
1367# CONFIG_MMC_VIA_SDMMC is not set 1398# CONFIG_MMC_VIA_SDMMC is not set
1368# CONFIG_MEMSTICK is not set 1399# CONFIG_MEMSTICK is not set
@@ -1397,6 +1428,7 @@ CONFIG_RTC_DRV_RS5C372=y
1397# CONFIG_RTC_DRV_PCF8563 is not set 1428# CONFIG_RTC_DRV_PCF8563 is not set
1398# CONFIG_RTC_DRV_PCF8583 is not set 1429# CONFIG_RTC_DRV_PCF8583 is not set
1399# CONFIG_RTC_DRV_M41T80 is not set 1430# CONFIG_RTC_DRV_M41T80 is not set
1431# CONFIG_RTC_DRV_BQ32K is not set
1400# CONFIG_RTC_DRV_S35390A is not set 1432# CONFIG_RTC_DRV_S35390A is not set
1401# CONFIG_RTC_DRV_FM3130 is not set 1433# CONFIG_RTC_DRV_FM3130 is not set
1402# CONFIG_RTC_DRV_RX8581 is not set 1434# CONFIG_RTC_DRV_RX8581 is not set
@@ -1417,7 +1449,9 @@ CONFIG_RTC_DRV_RS5C372=y
1417# CONFIG_RTC_DRV_M48T86 is not set 1449# CONFIG_RTC_DRV_M48T86 is not set
1418# CONFIG_RTC_DRV_M48T35 is not set 1450# CONFIG_RTC_DRV_M48T35 is not set
1419# CONFIG_RTC_DRV_M48T59 is not set 1451# CONFIG_RTC_DRV_M48T59 is not set
1452# CONFIG_RTC_DRV_MSM6242 is not set
1420# CONFIG_RTC_DRV_BQ4802 is not set 1453# CONFIG_RTC_DRV_BQ4802 is not set
1454# CONFIG_RTC_DRV_RP5C01 is not set
1421# CONFIG_RTC_DRV_V3020 is not set 1455# CONFIG_RTC_DRV_V3020 is not set
1422 1456
1423# 1457#
@@ -1622,13 +1656,14 @@ CONFIG_SCHED_DEBUG=y
1622CONFIG_SCHEDSTATS=y 1656CONFIG_SCHEDSTATS=y
1623CONFIG_TRACE_IRQFLAGS=y 1657CONFIG_TRACE_IRQFLAGS=y
1624CONFIG_STACKTRACE=y 1658CONFIG_STACKTRACE=y
1625# CONFIG_DEBUG_BUGVERBOSE is not set 1659CONFIG_DEBUG_BUGVERBOSE=y
1626# CONFIG_DEBUG_MEMORY_INIT is not set 1660# CONFIG_DEBUG_MEMORY_INIT is not set
1627CONFIG_FRAME_POINTER=y 1661CONFIG_FRAME_POINTER=y
1628# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1662# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1629CONFIG_LATENCYTOP=y 1663CONFIG_LATENCYTOP=y
1630CONFIG_SYSCTL_SYSCALL_CHECK=y 1664CONFIG_SYSCTL_SYSCALL_CHECK=y
1631CONFIG_NOP_TRACER=y 1665CONFIG_NOP_TRACER=y
1666CONFIG_HAVE_FTRACE_NMI_ENTER=y
1632CONFIG_HAVE_FUNCTION_TRACER=y 1667CONFIG_HAVE_FUNCTION_TRACER=y
1633CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 1668CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
1634CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y 1669CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
@@ -1637,6 +1672,7 @@ CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
1637CONFIG_HAVE_SYSCALL_TRACEPOINTS=y 1672CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
1638CONFIG_TRACER_MAX_TRACE=y 1673CONFIG_TRACER_MAX_TRACE=y
1639CONFIG_RING_BUFFER=y 1674CONFIG_RING_BUFFER=y
1675CONFIG_FTRACE_NMI_ENTER=y
1640CONFIG_EVENT_TRACING=y 1676CONFIG_EVENT_TRACING=y
1641CONFIG_CONTEXT_SWITCH_TRACER=y 1677CONFIG_CONTEXT_SWITCH_TRACER=y
1642CONFIG_RING_BUFFER_ALLOW_SWAP=y 1678CONFIG_RING_BUFFER_ALLOW_SWAP=y
@@ -1668,7 +1704,6 @@ CONFIG_FTRACE_MCOUNT_RECORD=y
1668# CONFIG_SAMPLES is not set 1704# CONFIG_SAMPLES is not set
1669CONFIG_HAVE_ARCH_KGDB=y 1705CONFIG_HAVE_ARCH_KGDB=y
1670# CONFIG_SH_STANDARD_BIOS is not set 1706# CONFIG_SH_STANDARD_BIOS is not set
1671# CONFIG_EARLY_SCIF_CONSOLE is not set
1672CONFIG_DWARF_UNWINDER=y 1707CONFIG_DWARF_UNWINDER=y
1673CONFIG_MCOUNT=y 1708CONFIG_MCOUNT=y
1674 1709
@@ -1678,7 +1713,11 @@ CONFIG_MCOUNT=y
1678# CONFIG_KEYS is not set 1713# CONFIG_KEYS is not set
1679# CONFIG_SECURITY is not set 1714# CONFIG_SECURITY is not set
1680# CONFIG_SECURITYFS is not set 1715# CONFIG_SECURITYFS is not set
1681# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1716# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1717# CONFIG_DEFAULT_SECURITY_SMACK is not set
1718# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1719CONFIG_DEFAULT_SECURITY_DAC=y
1720CONFIG_DEFAULT_SECURITY=""
1682CONFIG_CRYPTO=y 1721CONFIG_CRYPTO=y
1683 1722
1684# 1723#
diff --git a/arch/sh/configs/sh7785lcr_defconfig b/arch/sh/configs/sh7785lcr_defconfig
index 8c2c47ed3991..f196e87c7665 100644
--- a/arch/sh/configs/sh7785lcr_defconfig
+++ b/arch/sh/configs/sh7785lcr_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Thu Sep 24 19:23:18 2009 4# Mon Jan 4 15:09:09 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -20,6 +20,7 @@ CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set 21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
22CONFIG_ARCH_HIBERNATION_POSSIBLE=y 22CONFIG_ARCH_HIBERNATION_POSSIBLE=y
23CONFIG_SYS_SUPPORTS_HUGETLBFS=y
23CONFIG_SYS_SUPPORTS_NUMA=y 24CONFIG_SYS_SUPPORTS_NUMA=y
24CONFIG_SYS_SUPPORTS_PCI=y 25CONFIG_SYS_SUPPORTS_PCI=y
25CONFIG_SYS_SUPPORTS_TMU=y 26CONFIG_SYS_SUPPORTS_TMU=y
@@ -31,6 +32,7 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
31CONFIG_ARCH_NO_VIRT_TO_BUS=y 32CONFIG_ARCH_NO_VIRT_TO_BUS=y
32CONFIG_ARCH_HAS_DEFAULT_IDLE=y 33CONFIG_ARCH_HAS_DEFAULT_IDLE=y
33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 34CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
35CONFIG_DMA_NONCOHERENT=y
34CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 36CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
35CONFIG_CONSTRUCTORS=y 37CONFIG_CONSTRUCTORS=y
36 38
@@ -63,6 +65,7 @@ CONFIG_BSD_PROCESS_ACCT=y
63# 65#
64CONFIG_TREE_RCU=y 66CONFIG_TREE_RCU=y
65# CONFIG_TREE_PREEMPT_RCU is not set 67# CONFIG_TREE_PREEMPT_RCU is not set
68# CONFIG_TINY_RCU is not set
66# CONFIG_RCU_TRACE is not set 69# CONFIG_RCU_TRACE is not set
67CONFIG_RCU_FANOUT=32 70CONFIG_RCU_FANOUT=32
68# CONFIG_RCU_FANOUT_EXACT is not set 71# CONFIG_RCU_FANOUT_EXACT is not set
@@ -103,12 +106,14 @@ CONFIG_EVENTFD=y
103CONFIG_SHMEM=y 106CONFIG_SHMEM=y
104CONFIG_AIO=y 107CONFIG_AIO=y
105CONFIG_HAVE_PERF_EVENTS=y 108CONFIG_HAVE_PERF_EVENTS=y
109CONFIG_PERF_USE_VMALLOC=y
106 110
107# 111#
108# Kernel Performance Events And Counters 112# Kernel Performance Events And Counters
109# 113#
110CONFIG_PERF_EVENTS=y 114CONFIG_PERF_EVENTS=y
111# CONFIG_PERF_COUNTERS is not set 115# CONFIG_PERF_COUNTERS is not set
116# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
112CONFIG_VM_EVENT_COUNTERS=y 117CONFIG_VM_EVENT_COUNTERS=y
113CONFIG_PCI_QUIRKS=y 118CONFIG_PCI_QUIRKS=y
114CONFIG_COMPAT_BRK=y 119CONFIG_COMPAT_BRK=y
@@ -123,6 +128,7 @@ CONFIG_HAVE_IOREMAP_PROT=y
123CONFIG_HAVE_KPROBES=y 128CONFIG_HAVE_KPROBES=y
124CONFIG_HAVE_KRETPROBES=y 129CONFIG_HAVE_KRETPROBES=y
125CONFIG_HAVE_ARCH_TRACEHOOK=y 130CONFIG_HAVE_ARCH_TRACEHOOK=y
131CONFIG_HAVE_DMA_ATTRS=y
126CONFIG_HAVE_CLK=y 132CONFIG_HAVE_CLK=y
127CONFIG_HAVE_DMA_API_DEBUG=y 133CONFIG_HAVE_DMA_API_DEBUG=y
128 134
@@ -149,14 +155,41 @@ CONFIG_LBDAF=y
149# IO Schedulers 155# IO Schedulers
150# 156#
151CONFIG_IOSCHED_NOOP=y 157CONFIG_IOSCHED_NOOP=y
152CONFIG_IOSCHED_AS=y
153CONFIG_IOSCHED_DEADLINE=y 158CONFIG_IOSCHED_DEADLINE=y
154CONFIG_IOSCHED_CFQ=y 159CONFIG_IOSCHED_CFQ=y
155# CONFIG_DEFAULT_AS is not set
156# CONFIG_DEFAULT_DEADLINE is not set 160# CONFIG_DEFAULT_DEADLINE is not set
157CONFIG_DEFAULT_CFQ=y 161CONFIG_DEFAULT_CFQ=y
158# CONFIG_DEFAULT_NOOP is not set 162# CONFIG_DEFAULT_NOOP is not set
159CONFIG_DEFAULT_IOSCHED="cfq" 163CONFIG_DEFAULT_IOSCHED="cfq"
164# CONFIG_INLINE_SPIN_TRYLOCK is not set
165# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
166# CONFIG_INLINE_SPIN_LOCK is not set
167# CONFIG_INLINE_SPIN_LOCK_BH is not set
168# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
169# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
170# CONFIG_INLINE_SPIN_UNLOCK is not set
171# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
172# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
173# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
174# CONFIG_INLINE_READ_TRYLOCK is not set
175# CONFIG_INLINE_READ_LOCK is not set
176# CONFIG_INLINE_READ_LOCK_BH is not set
177# CONFIG_INLINE_READ_LOCK_IRQ is not set
178# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
179# CONFIG_INLINE_READ_UNLOCK is not set
180# CONFIG_INLINE_READ_UNLOCK_BH is not set
181# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
182# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
183# CONFIG_INLINE_WRITE_TRYLOCK is not set
184# CONFIG_INLINE_WRITE_LOCK is not set
185# CONFIG_INLINE_WRITE_LOCK_BH is not set
186# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
187# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
188# CONFIG_INLINE_WRITE_UNLOCK is not set
189# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
190# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
191# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
192# CONFIG_MUTEX_SPIN_ON_OWNER is not set
160# CONFIG_FREEZER is not set 193# CONFIG_FREEZER is not set
161 194
162# 195#
@@ -237,8 +270,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
237# CONFIG_PHYS_ADDR_T_64BIT is not set 270# CONFIG_PHYS_ADDR_T_64BIT is not set
238CONFIG_ZONE_DMA_FLAG=0 271CONFIG_ZONE_DMA_FLAG=0
239CONFIG_NR_QUICK=2 272CONFIG_NR_QUICK=2
240CONFIG_HAVE_MLOCK=y
241CONFIG_HAVE_MLOCKED_PAGE_BIT=y
242# CONFIG_KSM is not set 273# CONFIG_KSM is not set
243CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 274CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
244 275
@@ -271,7 +302,6 @@ CONFIG_SH_SH7785LCR_29BIT_PHYSMAPS=y
271# Timer and clock configuration 302# Timer and clock configuration
272# 303#
273CONFIG_SH_TIMER_TMU=y 304CONFIG_SH_TIMER_TMU=y
274CONFIG_SH_PCLK_FREQ=50000000
275CONFIG_SH_CLK_CPG=y 305CONFIG_SH_CLK_CPG=y
276CONFIG_TICK_ONESHOT=y 306CONFIG_TICK_ONESHOT=y
277# CONFIG_NO_HZ is not set 307# CONFIG_NO_HZ is not set
@@ -329,7 +359,6 @@ CONFIG_ENTRY_OFFSET=0x00001000
329# Bus options 359# Bus options
330# 360#
331CONFIG_PCI=y 361CONFIG_PCI=y
332CONFIG_SH_PCIDMA_NONCOHERENT=y
333# CONFIG_PCIEPORTBUS is not set 362# CONFIG_PCIEPORTBUS is not set
334# CONFIG_ARCH_SUPPORTS_MSI is not set 363# CONFIG_ARCH_SUPPORTS_MSI is not set
335CONFIG_PCI_LEGACY=y 364CONFIG_PCI_LEGACY=y
@@ -433,10 +462,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
433# CONFIG_AF_RXRPC is not set 462# CONFIG_AF_RXRPC is not set
434CONFIG_WIRELESS=y 463CONFIG_WIRELESS=y
435# CONFIG_CFG80211 is not set 464# CONFIG_CFG80211 is not set
436CONFIG_CFG80211_DEFAULT_PS_VALUE=0
437# CONFIG_WIRELESS_OLD_REGULATORY is not set
438CONFIG_WIRELESS_EXT=y
439CONFIG_WIRELESS_EXT_SYSFS=y
440# CONFIG_LIB80211 is not set 465# CONFIG_LIB80211 is not set
441 466
442# 467#
@@ -552,6 +577,10 @@ CONFIG_BLK_DEV=y
552# CONFIG_BLK_DEV_UMEM is not set 577# CONFIG_BLK_DEV_UMEM is not set
553# CONFIG_BLK_DEV_COW_COMMON is not set 578# CONFIG_BLK_DEV_COW_COMMON is not set
554# CONFIG_BLK_DEV_LOOP is not set 579# CONFIG_BLK_DEV_LOOP is not set
580
581#
582# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
583#
555# CONFIG_BLK_DEV_NBD is not set 584# CONFIG_BLK_DEV_NBD is not set
556# CONFIG_BLK_DEV_SX8 is not set 585# CONFIG_BLK_DEV_SX8 is not set
557# CONFIG_BLK_DEV_UB is not set 586# CONFIG_BLK_DEV_UB is not set
@@ -652,15 +681,16 @@ CONFIG_SATA_SIL=y
652# CONFIG_PATA_NS87415 is not set 681# CONFIG_PATA_NS87415 is not set
653# CONFIG_PATA_OPTI is not set 682# CONFIG_PATA_OPTI is not set
654# CONFIG_PATA_OPTIDMA is not set 683# CONFIG_PATA_OPTIDMA is not set
684# CONFIG_PATA_PDC2027X is not set
655# CONFIG_PATA_PDC_OLD is not set 685# CONFIG_PATA_PDC_OLD is not set
656# CONFIG_PATA_RADISYS is not set 686# CONFIG_PATA_RADISYS is not set
657# CONFIG_PATA_RDC is not set 687# CONFIG_PATA_RDC is not set
658# CONFIG_PATA_RZ1000 is not set 688# CONFIG_PATA_RZ1000 is not set
659# CONFIG_PATA_SC1200 is not set 689# CONFIG_PATA_SC1200 is not set
660# CONFIG_PATA_SERVERWORKS is not set 690# CONFIG_PATA_SERVERWORKS is not set
661# CONFIG_PATA_PDC2027X is not set
662# CONFIG_PATA_SIL680 is not set 691# CONFIG_PATA_SIL680 is not set
663# CONFIG_PATA_SIS is not set 692# CONFIG_PATA_SIS is not set
693# CONFIG_PATA_TOSHIBA is not set
664# CONFIG_PATA_VIA is not set 694# CONFIG_PATA_VIA is not set
665# CONFIG_PATA_WINBOND is not set 695# CONFIG_PATA_WINBOND is not set
666# CONFIG_PATA_PLATFORM is not set 696# CONFIG_PATA_PLATFORM is not set
@@ -719,8 +749,10 @@ CONFIG_R8169=y
719# CONFIG_NETDEV_10000 is not set 749# CONFIG_NETDEV_10000 is not set
720# CONFIG_TR is not set 750# CONFIG_TR is not set
721CONFIG_WLAN=y 751CONFIG_WLAN=y
722# CONFIG_WLAN_PRE80211 is not set 752# CONFIG_ATMEL is not set
723# CONFIG_WLAN_80211 is not set 753# CONFIG_PRISM54 is not set
754# CONFIG_USB_ZD1201 is not set
755# CONFIG_HOSTAP is not set
724 756
725# 757#
726# Enable WiMAX (Networking options) to see the WiMAX drivers 758# Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -743,6 +775,7 @@ CONFIG_WLAN=y
743# CONFIG_NETCONSOLE is not set 775# CONFIG_NETCONSOLE is not set
744# CONFIG_NETPOLL is not set 776# CONFIG_NETPOLL is not set
745# CONFIG_NET_POLL_CONTROLLER is not set 777# CONFIG_NET_POLL_CONTROLLER is not set
778# CONFIG_VMXNET3 is not set
746# CONFIG_ISDN is not set 779# CONFIG_ISDN is not set
747# CONFIG_PHONE is not set 780# CONFIG_PHONE is not set
748 781
@@ -752,6 +785,7 @@ CONFIG_WLAN=y
752CONFIG_INPUT=y 785CONFIG_INPUT=y
753CONFIG_INPUT_FF_MEMLESS=m 786CONFIG_INPUT_FF_MEMLESS=m
754# CONFIG_INPUT_POLLDEV is not set 787# CONFIG_INPUT_POLLDEV is not set
788# CONFIG_INPUT_SPARSEKMAP is not set
755 789
756# 790#
757# Userland interfaces 791# Userland interfaces
@@ -874,11 +908,6 @@ CONFIG_I2C_ALGOPCA=y
874# CONFIG_I2C_TINY_USB is not set 908# CONFIG_I2C_TINY_USB is not set
875 909
876# 910#
877# Graphics adapter I2C/DDC channel drivers
878#
879# CONFIG_I2C_VOODOO3 is not set
880
881#
882# Other I2C/SMBus bus drivers 911# Other I2C/SMBus bus drivers
883# 912#
884CONFIG_I2C_PCA_PLATFORM=y 913CONFIG_I2C_PCA_PLATFORM=y
@@ -887,7 +916,6 @@ CONFIG_I2C_PCA_PLATFORM=y
887# 916#
888# Miscellaneous I2C Chip support 917# Miscellaneous I2C Chip support
889# 918#
890# CONFIG_DS1682 is not set
891# CONFIG_SENSORS_TSL2550 is not set 919# CONFIG_SENSORS_TSL2550 is not set
892# CONFIG_I2C_DEBUG_CORE is not set 920# CONFIG_I2C_DEBUG_CORE is not set
893# CONFIG_I2C_DEBUG_ALGO is not set 921# CONFIG_I2C_DEBUG_ALGO is not set
@@ -916,15 +944,18 @@ CONFIG_SSB_POSSIBLE=y
916# 944#
917# CONFIG_MFD_CORE is not set 945# CONFIG_MFD_CORE is not set
918CONFIG_MFD_SM501=y 946CONFIG_MFD_SM501=y
947# CONFIG_MFD_SH_MOBILE_SDHI is not set
919# CONFIG_HTC_PASIC3 is not set 948# CONFIG_HTC_PASIC3 is not set
920# CONFIG_TWL4030_CORE is not set 949# CONFIG_TWL4030_CORE is not set
921# CONFIG_MFD_TMIO is not set 950# CONFIG_MFD_TMIO is not set
922# CONFIG_PMIC_DA903X is not set 951# CONFIG_PMIC_DA903X is not set
952# CONFIG_PMIC_ADP5520 is not set
923# CONFIG_MFD_WM8400 is not set 953# CONFIG_MFD_WM8400 is not set
924# CONFIG_MFD_WM831X is not set 954# CONFIG_MFD_WM831X is not set
925# CONFIG_MFD_WM8350_I2C is not set 955# CONFIG_MFD_WM8350_I2C is not set
926# CONFIG_MFD_PCF50633 is not set 956# CONFIG_MFD_PCF50633 is not set
927# CONFIG_AB3100_CORE is not set 957# CONFIG_AB3100_CORE is not set
958# CONFIG_MFD_88PM8607 is not set
928# CONFIG_REGULATOR is not set 959# CONFIG_REGULATOR is not set
929# CONFIG_MEDIA_SUPPORT is not set 960# CONFIG_MEDIA_SUPPORT is not set
930 961
@@ -1205,6 +1236,7 @@ CONFIG_RTC_DRV_RS5C372=y
1205# CONFIG_RTC_DRV_PCF8563 is not set 1236# CONFIG_RTC_DRV_PCF8563 is not set
1206# CONFIG_RTC_DRV_PCF8583 is not set 1237# CONFIG_RTC_DRV_PCF8583 is not set
1207# CONFIG_RTC_DRV_M41T80 is not set 1238# CONFIG_RTC_DRV_M41T80 is not set
1239# CONFIG_RTC_DRV_BQ32K is not set
1208# CONFIG_RTC_DRV_S35390A is not set 1240# CONFIG_RTC_DRV_S35390A is not set
1209# CONFIG_RTC_DRV_FM3130 is not set 1241# CONFIG_RTC_DRV_FM3130 is not set
1210# CONFIG_RTC_DRV_RX8581 is not set 1242# CONFIG_RTC_DRV_RX8581 is not set
@@ -1225,7 +1257,9 @@ CONFIG_RTC_DRV_RS5C372=y
1225# CONFIG_RTC_DRV_M48T86 is not set 1257# CONFIG_RTC_DRV_M48T86 is not set
1226# CONFIG_RTC_DRV_M48T35 is not set 1258# CONFIG_RTC_DRV_M48T35 is not set
1227# CONFIG_RTC_DRV_M48T59 is not set 1259# CONFIG_RTC_DRV_M48T59 is not set
1260# CONFIG_RTC_DRV_MSM6242 is not set
1228# CONFIG_RTC_DRV_BQ4802 is not set 1261# CONFIG_RTC_DRV_BQ4802 is not set
1262# CONFIG_RTC_DRV_RP5C01 is not set
1229# CONFIG_RTC_DRV_V3020 is not set 1263# CONFIG_RTC_DRV_V3020 is not set
1230 1264
1231# 1265#
@@ -1484,7 +1518,6 @@ CONFIG_BRANCH_PROFILE_NONE=y
1484CONFIG_HAVE_ARCH_KGDB=y 1518CONFIG_HAVE_ARCH_KGDB=y
1485# CONFIG_KGDB is not set 1519# CONFIG_KGDB is not set
1486# CONFIG_SH_STANDARD_BIOS is not set 1520# CONFIG_SH_STANDARD_BIOS is not set
1487# CONFIG_EARLY_SCIF_CONSOLE is not set
1488# CONFIG_STACK_DEBUG is not set 1521# CONFIG_STACK_DEBUG is not set
1489# CONFIG_DEBUG_STACK_USAGE is not set 1522# CONFIG_DEBUG_STACK_USAGE is not set
1490# CONFIG_4KSTACKS is not set 1523# CONFIG_4KSTACKS is not set
@@ -1498,7 +1531,11 @@ CONFIG_HAVE_ARCH_KGDB=y
1498# CONFIG_KEYS is not set 1531# CONFIG_KEYS is not set
1499# CONFIG_SECURITY is not set 1532# CONFIG_SECURITY is not set
1500# CONFIG_SECURITYFS is not set 1533# CONFIG_SECURITYFS is not set
1501# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1534# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1535# CONFIG_DEFAULT_SECURITY_SMACK is not set
1536# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1537CONFIG_DEFAULT_SECURITY_DAC=y
1538CONFIG_DEFAULT_SECURITY=""
1502CONFIG_CRYPTO=y 1539CONFIG_CRYPTO=y
1503 1540
1504# 1541#
diff --git a/arch/sh/configs/shmin_defconfig b/arch/sh/configs/shmin_defconfig
index 92115e612750..45441c0ab30c 100644
--- a/arch/sh/configs/shmin_defconfig
+++ b/arch/sh/configs/shmin_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Thu Sep 24 19:27:17 2009 4# Mon Jan 4 15:10:09 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -28,6 +28,7 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
28CONFIG_ARCH_NO_VIRT_TO_BUS=y 28CONFIG_ARCH_NO_VIRT_TO_BUS=y
29CONFIG_ARCH_HAS_DEFAULT_IDLE=y 29CONFIG_ARCH_HAS_DEFAULT_IDLE=y
30CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 30CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
31CONFIG_DMA_NONCOHERENT=y
31CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 32CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
32CONFIG_CONSTRUCTORS=y 33CONFIG_CONSTRUCTORS=y
33 34
@@ -57,6 +58,7 @@ CONFIG_KERNEL_GZIP=y
57# 58#
58CONFIG_TREE_RCU=y 59CONFIG_TREE_RCU=y
59# CONFIG_TREE_PREEMPT_RCU is not set 60# CONFIG_TREE_PREEMPT_RCU is not set
61# CONFIG_TINY_RCU is not set
60# CONFIG_RCU_TRACE is not set 62# CONFIG_RCU_TRACE is not set
61CONFIG_RCU_FANOUT=32 63CONFIG_RCU_FANOUT=32
62# CONFIG_RCU_FANOUT_EXACT is not set 64# CONFIG_RCU_FANOUT_EXACT is not set
@@ -88,6 +90,7 @@ CONFIG_EVENTFD=y
88# CONFIG_SHMEM is not set 90# CONFIG_SHMEM is not set
89CONFIG_AIO=y 91CONFIG_AIO=y
90CONFIG_HAVE_PERF_EVENTS=y 92CONFIG_HAVE_PERF_EVENTS=y
93CONFIG_PERF_USE_VMALLOC=y
91 94
92# 95#
93# Kernel Performance Events And Counters 96# Kernel Performance Events And Counters
@@ -105,6 +108,7 @@ CONFIG_HAVE_IOREMAP_PROT=y
105CONFIG_HAVE_KPROBES=y 108CONFIG_HAVE_KPROBES=y
106CONFIG_HAVE_KRETPROBES=y 109CONFIG_HAVE_KRETPROBES=y
107CONFIG_HAVE_ARCH_TRACEHOOK=y 110CONFIG_HAVE_ARCH_TRACEHOOK=y
111CONFIG_HAVE_DMA_ATTRS=y
108CONFIG_HAVE_CLK=y 112CONFIG_HAVE_CLK=y
109CONFIG_HAVE_DMA_API_DEBUG=y 113CONFIG_HAVE_DMA_API_DEBUG=y
110 114
@@ -124,14 +128,41 @@ CONFIG_LBDAF=y
124# IO Schedulers 128# IO Schedulers
125# 129#
126CONFIG_IOSCHED_NOOP=y 130CONFIG_IOSCHED_NOOP=y
127# CONFIG_IOSCHED_AS is not set
128# CONFIG_IOSCHED_DEADLINE is not set 131# CONFIG_IOSCHED_DEADLINE is not set
129# CONFIG_IOSCHED_CFQ is not set 132# CONFIG_IOSCHED_CFQ is not set
130# CONFIG_DEFAULT_AS is not set
131# CONFIG_DEFAULT_DEADLINE is not set 133# CONFIG_DEFAULT_DEADLINE is not set
132# CONFIG_DEFAULT_CFQ is not set 134# CONFIG_DEFAULT_CFQ is not set
133CONFIG_DEFAULT_NOOP=y 135CONFIG_DEFAULT_NOOP=y
134CONFIG_DEFAULT_IOSCHED="noop" 136CONFIG_DEFAULT_IOSCHED="noop"
137# CONFIG_INLINE_SPIN_TRYLOCK is not set
138# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
139# CONFIG_INLINE_SPIN_LOCK is not set
140# CONFIG_INLINE_SPIN_LOCK_BH is not set
141# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
142# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
143CONFIG_INLINE_SPIN_UNLOCK=y
144# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
145CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
146# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
147# CONFIG_INLINE_READ_TRYLOCK is not set
148# CONFIG_INLINE_READ_LOCK is not set
149# CONFIG_INLINE_READ_LOCK_BH is not set
150# CONFIG_INLINE_READ_LOCK_IRQ is not set
151# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
152CONFIG_INLINE_READ_UNLOCK=y
153# CONFIG_INLINE_READ_UNLOCK_BH is not set
154CONFIG_INLINE_READ_UNLOCK_IRQ=y
155# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
156# CONFIG_INLINE_WRITE_TRYLOCK is not set
157# CONFIG_INLINE_WRITE_LOCK is not set
158# CONFIG_INLINE_WRITE_LOCK_BH is not set
159# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
160# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
161CONFIG_INLINE_WRITE_UNLOCK=y
162# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
163CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
164# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
165# CONFIG_MUTEX_SPIN_ON_OWNER is not set
135# CONFIG_FREEZER is not set 166# CONFIG_FREEZER is not set
136 167
137# 168#
@@ -207,8 +238,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
207# CONFIG_PHYS_ADDR_T_64BIT is not set 238# CONFIG_PHYS_ADDR_T_64BIT is not set
208CONFIG_ZONE_DMA_FLAG=0 239CONFIG_ZONE_DMA_FLAG=0
209CONFIG_NR_QUICK=2 240CONFIG_NR_QUICK=2
210CONFIG_HAVE_MLOCK=y
211CONFIG_HAVE_MLOCKED_PAGE_BIT=y
212# CONFIG_KSM is not set 241# CONFIG_KSM is not set
213CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 242CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
214 243
@@ -387,9 +416,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
387# CONFIG_AF_RXRPC is not set 416# CONFIG_AF_RXRPC is not set
388CONFIG_WIRELESS=y 417CONFIG_WIRELESS=y
389# CONFIG_CFG80211 is not set 418# CONFIG_CFG80211 is not set
390CONFIG_CFG80211_DEFAULT_PS_VALUE=0
391# CONFIG_WIRELESS_OLD_REGULATORY is not set
392# CONFIG_WIRELESS_EXT is not set
393# CONFIG_LIB80211 is not set 419# CONFIG_LIB80211 is not set
394 420
395# 421#
@@ -495,6 +521,10 @@ CONFIG_BLK_DEV=y
495# CONFIG_BLK_DEV_COW_COMMON is not set 521# CONFIG_BLK_DEV_COW_COMMON is not set
496CONFIG_BLK_DEV_LOOP=y 522CONFIG_BLK_DEV_LOOP=y
497# CONFIG_BLK_DEV_CRYPTOLOOP is not set 523# CONFIG_BLK_DEV_CRYPTOLOOP is not set
524
525#
526# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
527#
498# CONFIG_BLK_DEV_NBD is not set 528# CONFIG_BLK_DEV_NBD is not set
499# CONFIG_BLK_DEV_RAM is not set 529# CONFIG_BLK_DEV_RAM is not set
500# CONFIG_CDROM_PKTCDVD is not set 530# CONFIG_CDROM_PKTCDVD is not set
@@ -546,11 +576,11 @@ CONFIG_NET_ETHERNET=y
546# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set 576# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
547# CONFIG_B44 is not set 577# CONFIG_B44 is not set
548# CONFIG_KS8842 is not set 578# CONFIG_KS8842 is not set
579# CONFIG_KS8851_MLL is not set
549CONFIG_NETDEV_1000=y 580CONFIG_NETDEV_1000=y
550CONFIG_NETDEV_10000=y 581CONFIG_NETDEV_10000=y
551CONFIG_WLAN=y 582CONFIG_WLAN=y
552# CONFIG_WLAN_PRE80211 is not set 583# CONFIG_HOSTAP is not set
553# CONFIG_WLAN_80211 is not set
554 584
555# 585#
556# Enable WiMAX (Networking options) to see the WiMAX drivers 586# Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -629,6 +659,7 @@ CONFIG_SSB_POSSIBLE=y
629# 659#
630# CONFIG_MFD_CORE is not set 660# CONFIG_MFD_CORE is not set
631# CONFIG_MFD_SM501 is not set 661# CONFIG_MFD_SM501 is not set
662# CONFIG_MFD_SH_MOBILE_SDHI is not set
632# CONFIG_HTC_PASIC3 is not set 663# CONFIG_HTC_PASIC3 is not set
633# CONFIG_MFD_TMIO is not set 664# CONFIG_MFD_TMIO is not set
634# CONFIG_REGULATOR is not set 665# CONFIG_REGULATOR is not set
@@ -688,6 +719,7 @@ CONFIG_RTC_LIB=y
688# CONFIG_EXT2_FS is not set 719# CONFIG_EXT2_FS is not set
689# CONFIG_EXT3_FS is not set 720# CONFIG_EXT3_FS is not set
690# CONFIG_EXT4_FS is not set 721# CONFIG_EXT4_FS is not set
722CONFIG_EXT4_USE_FOR_EXT23=y
691# CONFIG_REISERFS_FS is not set 723# CONFIG_REISERFS_FS is not set
692# CONFIG_JFS_FS is not set 724# CONFIG_JFS_FS is not set
693# CONFIG_FS_POSIX_ACL is not set 725# CONFIG_FS_POSIX_ACL is not set
@@ -731,7 +763,6 @@ CONFIG_PROC_FS=y
731CONFIG_PROC_SYSCTL=y 763CONFIG_PROC_SYSCTL=y
732CONFIG_PROC_PAGE_MONITOR=y 764CONFIG_PROC_PAGE_MONITOR=y
733# CONFIG_SYSFS is not set 765# CONFIG_SYSFS is not set
734# CONFIG_HUGETLBFS is not set
735# CONFIG_HUGETLB_PAGE is not set 766# CONFIG_HUGETLB_PAGE is not set
736CONFIG_MISC_FILESYSTEMS=y 767CONFIG_MISC_FILESYSTEMS=y
737# CONFIG_ADFS_FS is not set 768# CONFIG_ADFS_FS is not set
@@ -794,6 +825,7 @@ CONFIG_FRAME_WARN=1024
794# CONFIG_DEBUG_MEMORY_INIT is not set 825# CONFIG_DEBUG_MEMORY_INIT is not set
795# CONFIG_RCU_CPU_STALL_DETECTOR is not set 826# CONFIG_RCU_CPU_STALL_DETECTOR is not set
796# CONFIG_LATENCYTOP is not set 827# CONFIG_LATENCYTOP is not set
828# CONFIG_SYSCTL_SYSCALL_CHECK is not set
797CONFIG_HAVE_FUNCTION_TRACER=y 829CONFIG_HAVE_FUNCTION_TRACER=y
798CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 830CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
799CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y 831CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
@@ -806,8 +838,6 @@ CONFIG_TRACING_SUPPORT=y
806# CONFIG_SAMPLES is not set 838# CONFIG_SAMPLES is not set
807CONFIG_HAVE_ARCH_KGDB=y 839CONFIG_HAVE_ARCH_KGDB=y
808CONFIG_SH_STANDARD_BIOS=y 840CONFIG_SH_STANDARD_BIOS=y
809# CONFIG_EARLY_SCIF_CONSOLE is not set
810CONFIG_EARLY_PRINTK=y
811# CONFIG_DWARF_UNWINDER is not set 841# CONFIG_DWARF_UNWINDER is not set
812 842
813# 843#
@@ -815,7 +845,11 @@ CONFIG_EARLY_PRINTK=y
815# 845#
816# CONFIG_KEYS is not set 846# CONFIG_KEYS is not set
817# CONFIG_SECURITYFS is not set 847# CONFIG_SECURITYFS is not set
818# CONFIG_SECURITY_FILE_CAPABILITIES is not set 848# CONFIG_DEFAULT_SECURITY_SELINUX is not set
849# CONFIG_DEFAULT_SECURITY_SMACK is not set
850# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
851CONFIG_DEFAULT_SECURITY_DAC=y
852CONFIG_DEFAULT_SECURITY=""
819CONFIG_CRYPTO=y 853CONFIG_CRYPTO=y
820 854
821# 855#
diff --git a/arch/sh/configs/shx3_defconfig b/arch/sh/configs/shx3_defconfig
index e3858d757d5e..ecf50cda4cbc 100644
--- a/arch/sh/configs/shx3_defconfig
+++ b/arch/sh/configs/shx3_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Thu Sep 24 19:29:26 2009 4# Mon Jan 4 15:10:45 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -22,6 +22,7 @@ CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
22CONFIG_GENERIC_LOCKBREAK=y 22CONFIG_GENERIC_LOCKBREAK=y
23# CONFIG_ARCH_SUSPEND_POSSIBLE is not set 23# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
24CONFIG_ARCH_HIBERNATION_POSSIBLE=y 24CONFIG_ARCH_HIBERNATION_POSSIBLE=y
25CONFIG_SYS_SUPPORTS_HUGETLBFS=y
25CONFIG_SYS_SUPPORTS_SMP=y 26CONFIG_SYS_SUPPORTS_SMP=y
26CONFIG_SYS_SUPPORTS_NUMA=y 27CONFIG_SYS_SUPPORTS_NUMA=y
27CONFIG_SYS_SUPPORTS_TMU=y 28CONFIG_SYS_SUPPORTS_TMU=y
@@ -32,6 +33,8 @@ CONFIG_LOCKDEP_SUPPORT=y
32CONFIG_ARCH_NO_VIRT_TO_BUS=y 33CONFIG_ARCH_NO_VIRT_TO_BUS=y
33CONFIG_ARCH_HAS_DEFAULT_IDLE=y 34CONFIG_ARCH_HAS_DEFAULT_IDLE=y
34CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 35CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
36CONFIG_DMA_COHERENT=y
37# CONFIG_DMA_NONCOHERENT is not set
35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 38CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
36CONFIG_CONSTRUCTORS=y 39CONFIG_CONSTRUCTORS=y
37 40
@@ -66,6 +69,7 @@ CONFIG_AUDIT_TREE=y
66# 69#
67CONFIG_TREE_RCU=y 70CONFIG_TREE_RCU=y
68# CONFIG_TREE_PREEMPT_RCU is not set 71# CONFIG_TREE_PREEMPT_RCU is not set
72# CONFIG_TINY_RCU is not set
69CONFIG_RCU_TRACE=y 73CONFIG_RCU_TRACE=y
70CONFIG_RCU_FANOUT=32 74CONFIG_RCU_FANOUT=32
71# CONFIG_RCU_FANOUT_EXACT is not set 75# CONFIG_RCU_FANOUT_EXACT is not set
@@ -121,6 +125,7 @@ CONFIG_EVENTFD=y
121CONFIG_SHMEM=y 125CONFIG_SHMEM=y
122CONFIG_AIO=y 126CONFIG_AIO=y
123CONFIG_HAVE_PERF_EVENTS=y 127CONFIG_HAVE_PERF_EVENTS=y
128CONFIG_PERF_USE_VMALLOC=y
124 129
125# 130#
126# Kernel Performance Events And Counters 131# Kernel Performance Events And Counters
@@ -128,6 +133,7 @@ CONFIG_HAVE_PERF_EVENTS=y
128CONFIG_PERF_EVENTS=y 133CONFIG_PERF_EVENTS=y
129CONFIG_EVENT_PROFILE=y 134CONFIG_EVENT_PROFILE=y
130# CONFIG_PERF_COUNTERS is not set 135# CONFIG_PERF_COUNTERS is not set
136# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
131CONFIG_VM_EVENT_COUNTERS=y 137CONFIG_VM_EVENT_COUNTERS=y
132CONFIG_COMPAT_BRK=y 138CONFIG_COMPAT_BRK=y
133# CONFIG_SLAB is not set 139# CONFIG_SLAB is not set
@@ -143,6 +149,7 @@ CONFIG_HAVE_IOREMAP_PROT=y
143CONFIG_HAVE_KPROBES=y 149CONFIG_HAVE_KPROBES=y
144CONFIG_HAVE_KRETPROBES=y 150CONFIG_HAVE_KRETPROBES=y
145CONFIG_HAVE_ARCH_TRACEHOOK=y 151CONFIG_HAVE_ARCH_TRACEHOOK=y
152CONFIG_HAVE_DMA_ATTRS=y
146CONFIG_USE_GENERIC_SMP_HELPERS=y 153CONFIG_USE_GENERIC_SMP_HELPERS=y
147CONFIG_HAVE_CLK=y 154CONFIG_HAVE_CLK=y
148CONFIG_HAVE_DMA_API_DEBUG=y 155CONFIG_HAVE_DMA_API_DEBUG=y
@@ -166,19 +173,48 @@ CONFIG_BLOCK=y
166CONFIG_LBDAF=y 173CONFIG_LBDAF=y
167# CONFIG_BLK_DEV_BSG is not set 174# CONFIG_BLK_DEV_BSG is not set
168# CONFIG_BLK_DEV_INTEGRITY is not set 175# CONFIG_BLK_DEV_INTEGRITY is not set
176# CONFIG_BLK_CGROUP is not set
169 177
170# 178#
171# IO Schedulers 179# IO Schedulers
172# 180#
173CONFIG_IOSCHED_NOOP=y 181CONFIG_IOSCHED_NOOP=y
174CONFIG_IOSCHED_AS=y
175CONFIG_IOSCHED_DEADLINE=y 182CONFIG_IOSCHED_DEADLINE=y
176CONFIG_IOSCHED_CFQ=y 183CONFIG_IOSCHED_CFQ=y
177CONFIG_DEFAULT_AS=y 184# CONFIG_CFQ_GROUP_IOSCHED is not set
178# CONFIG_DEFAULT_DEADLINE is not set 185# CONFIG_DEFAULT_DEADLINE is not set
179# CONFIG_DEFAULT_CFQ is not set 186CONFIG_DEFAULT_CFQ=y
180# CONFIG_DEFAULT_NOOP is not set 187# CONFIG_DEFAULT_NOOP is not set
181CONFIG_DEFAULT_IOSCHED="anticipatory" 188CONFIG_DEFAULT_IOSCHED="cfq"
189# CONFIG_INLINE_SPIN_TRYLOCK is not set
190# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
191# CONFIG_INLINE_SPIN_LOCK is not set
192# CONFIG_INLINE_SPIN_LOCK_BH is not set
193# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
194# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
195# CONFIG_INLINE_SPIN_UNLOCK is not set
196# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
197# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
198# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
199# CONFIG_INLINE_READ_TRYLOCK is not set
200# CONFIG_INLINE_READ_LOCK is not set
201# CONFIG_INLINE_READ_LOCK_BH is not set
202# CONFIG_INLINE_READ_LOCK_IRQ is not set
203# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
204# CONFIG_INLINE_READ_UNLOCK is not set
205# CONFIG_INLINE_READ_UNLOCK_BH is not set
206# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
207# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
208# CONFIG_INLINE_WRITE_TRYLOCK is not set
209# CONFIG_INLINE_WRITE_LOCK is not set
210# CONFIG_INLINE_WRITE_LOCK_BH is not set
211# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
212# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
213# CONFIG_INLINE_WRITE_UNLOCK is not set
214# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
215# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
216# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
217CONFIG_MUTEX_SPIN_ON_OWNER=y
182CONFIG_FREEZER=y 218CONFIG_FREEZER=y
183 219
184# 220#
@@ -233,6 +269,7 @@ CONFIG_FORCE_MAX_ZONEORDER=7
233CONFIG_MEMORY_START=0x0c000000 269CONFIG_MEMORY_START=0x0c000000
234CONFIG_MEMORY_SIZE=0x04000000 270CONFIG_MEMORY_SIZE=0x04000000
235CONFIG_29BIT=y 271CONFIG_29BIT=y
272# CONFIG_PMB_ENABLE is not set
236# CONFIG_X2TLB is not set 273# CONFIG_X2TLB is not set
237CONFIG_VSYSCALL=y 274CONFIG_VSYSCALL=y
238CONFIG_NUMA=y 275CONFIG_NUMA=y
@@ -271,10 +308,9 @@ CONFIG_MIGRATION=y
271# CONFIG_PHYS_ADDR_T_64BIT is not set 308# CONFIG_PHYS_ADDR_T_64BIT is not set
272CONFIG_ZONE_DMA_FLAG=0 309CONFIG_ZONE_DMA_FLAG=0
273CONFIG_NR_QUICK=2 310CONFIG_NR_QUICK=2
274CONFIG_HAVE_MLOCK=y
275CONFIG_HAVE_MLOCKED_PAGE_BIT=y
276# CONFIG_KSM is not set 311# CONFIG_KSM is not set
277CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 312CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
313CONFIG_SCHED_MC=y
278 314
279# 315#
280# Cache configuration 316# Cache configuration
@@ -449,6 +485,7 @@ CONFIG_INET6_XFRM_MODE_TUNNEL=m
449CONFIG_INET6_XFRM_MODE_BEET=m 485CONFIG_INET6_XFRM_MODE_BEET=m
450# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set 486# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
451CONFIG_IPV6_SIT=m 487CONFIG_IPV6_SIT=m
488# CONFIG_IPV6_SIT_6RD is not set
452CONFIG_IPV6_NDISC_NODETYPE=y 489CONFIG_IPV6_NDISC_NODETYPE=y
453# CONFIG_IPV6_TUNNEL is not set 490# CONFIG_IPV6_TUNNEL is not set
454# CONFIG_IPV6_MULTIPLE_TABLES is not set 491# CONFIG_IPV6_MULTIPLE_TABLES is not set
@@ -496,7 +533,13 @@ CONFIG_CAN_VCAN=m
496# CONFIG_IRDA is not set 533# CONFIG_IRDA is not set
497# CONFIG_BT is not set 534# CONFIG_BT is not set
498# CONFIG_AF_RXRPC is not set 535# CONFIG_AF_RXRPC is not set
499# CONFIG_WIRELESS is not set 536CONFIG_WIRELESS=y
537# CONFIG_CFG80211 is not set
538# CONFIG_LIB80211 is not set
539
540#
541# CFG80211 needs to be enabled for MAC80211
542#
500# CONFIG_WIMAX is not set 543# CONFIG_WIMAX is not set
501# CONFIG_RFKILL is not set 544# CONFIG_RFKILL is not set
502# CONFIG_NET_9P is not set 545# CONFIG_NET_9P is not set
@@ -522,6 +565,10 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
522CONFIG_BLK_DEV=y 565CONFIG_BLK_DEV=y
523# CONFIG_BLK_DEV_COW_COMMON is not set 566# CONFIG_BLK_DEV_COW_COMMON is not set
524# CONFIG_BLK_DEV_LOOP is not set 567# CONFIG_BLK_DEV_LOOP is not set
568
569#
570# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
571#
525# CONFIG_BLK_DEV_NBD is not set 572# CONFIG_BLK_DEV_NBD is not set
526# CONFIG_BLK_DEV_UB is not set 573# CONFIG_BLK_DEV_UB is not set
527CONFIG_BLK_DEV_RAM=y 574CONFIG_BLK_DEV_RAM=y
@@ -532,9 +579,12 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
532# CONFIG_ATA_OVER_ETH is not set 579# CONFIG_ATA_OVER_ETH is not set
533# CONFIG_BLK_DEV_HD is not set 580# CONFIG_BLK_DEV_HD is not set
534CONFIG_MISC_DEVICES=y 581CONFIG_MISC_DEVICES=y
582# CONFIG_AD525X_DPOT is not set
535# CONFIG_ICS932S401 is not set 583# CONFIG_ICS932S401 is not set
536# CONFIG_ENCLOSURE_SERVICES is not set 584# CONFIG_ENCLOSURE_SERVICES is not set
537# CONFIG_ISL29003 is not set 585# CONFIG_ISL29003 is not set
586# CONFIG_DS1682 is not set
587# CONFIG_TI_DAC7512 is not set
538# CONFIG_C2PORT is not set 588# CONFIG_C2PORT is not set
539 589
540# 590#
@@ -624,11 +674,12 @@ CONFIG_SMC91X=y
624# CONFIG_B44 is not set 674# CONFIG_B44 is not set
625# CONFIG_KS8842 is not set 675# CONFIG_KS8842 is not set
626# CONFIG_KS8851 is not set 676# CONFIG_KS8851 is not set
677# CONFIG_KS8851_MLL is not set
627# CONFIG_NETDEV_1000 is not set 678# CONFIG_NETDEV_1000 is not set
628# CONFIG_NETDEV_10000 is not set 679# CONFIG_NETDEV_10000 is not set
629CONFIG_WLAN=y 680CONFIG_WLAN=y
630# CONFIG_WLAN_PRE80211 is not set 681# CONFIG_USB_ZD1201 is not set
631# CONFIG_WLAN_80211 is not set 682# CONFIG_HOSTAP is not set
632 683
633# 684#
634# Enable WiMAX (Networking options) to see the WiMAX drivers 685# Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -726,7 +777,6 @@ CONFIG_I2C_HELPER_AUTO=y
726# 777#
727# Miscellaneous I2C Chip support 778# Miscellaneous I2C Chip support
728# 779#
729# CONFIG_DS1682 is not set
730# CONFIG_SENSORS_TSL2550 is not set 780# CONFIG_SENSORS_TSL2550 is not set
731# CONFIG_I2C_DEBUG_CORE is not set 781# CONFIG_I2C_DEBUG_CORE is not set
732# CONFIG_I2C_DEBUG_ALGO is not set 782# CONFIG_I2C_DEBUG_ALGO is not set
@@ -740,7 +790,10 @@ CONFIG_SPI_MASTER=y
740# SPI Master Controller Drivers 790# SPI Master Controller Drivers
741# 791#
742# CONFIG_SPI_BITBANG is not set 792# CONFIG_SPI_BITBANG is not set
793# CONFIG_SPI_SH_MSIOF is not set
743# CONFIG_SPI_SH_SCI is not set 794# CONFIG_SPI_SH_SCI is not set
795# CONFIG_SPI_XILINX is not set
796# CONFIG_SPI_DESIGNWARE is not set
744 797
745# 798#
746# SPI Protocol Masters 799# SPI Protocol Masters
@@ -781,15 +834,16 @@ CONFIG_SSB_POSSIBLE=y
781# 834#
782# CONFIG_MFD_CORE is not set 835# CONFIG_MFD_CORE is not set
783# CONFIG_MFD_SM501 is not set 836# CONFIG_MFD_SM501 is not set
837# CONFIG_MFD_SH_MOBILE_SDHI is not set
784# CONFIG_HTC_PASIC3 is not set 838# CONFIG_HTC_PASIC3 is not set
785# CONFIG_MFD_TMIO is not set 839# CONFIG_MFD_TMIO is not set
786# CONFIG_MFD_WM8400 is not set 840# CONFIG_MFD_WM8400 is not set
787# CONFIG_MFD_WM831X is not set
788# CONFIG_MFD_WM8350_I2C is not set 841# CONFIG_MFD_WM8350_I2C is not set
789# CONFIG_MFD_PCF50633 is not set 842# CONFIG_MFD_PCF50633 is not set
790# CONFIG_MFD_MC13783 is not set 843# CONFIG_MFD_MC13783 is not set
791# CONFIG_AB3100_CORE is not set 844# CONFIG_AB3100_CORE is not set
792# CONFIG_EZX_PCAP is not set 845# CONFIG_EZX_PCAP is not set
846# CONFIG_AB4500_CORE is not set
793# CONFIG_REGULATOR is not set 847# CONFIG_REGULATOR is not set
794# CONFIG_MEDIA_SUPPORT is not set 848# CONFIG_MEDIA_SUPPORT is not set
795 849
@@ -924,10 +978,12 @@ CONFIG_USB_GADGET_DUALSPEED=y
924# CONFIG_USB_ETH is not set 978# CONFIG_USB_ETH is not set
925# CONFIG_USB_GADGETFS is not set 979# CONFIG_USB_GADGETFS is not set
926# CONFIG_USB_FILE_STORAGE is not set 980# CONFIG_USB_FILE_STORAGE is not set
981# CONFIG_USB_MASS_STORAGE is not set
927# CONFIG_USB_G_SERIAL is not set 982# CONFIG_USB_G_SERIAL is not set
928# CONFIG_USB_MIDI_GADGET is not set 983# CONFIG_USB_MIDI_GADGET is not set
929# CONFIG_USB_G_PRINTER is not set 984# CONFIG_USB_G_PRINTER is not set
930# CONFIG_USB_CDC_COMPOSITE is not set 985# CONFIG_USB_CDC_COMPOSITE is not set
986# CONFIG_USB_G_MULTI is not set
931 987
932# 988#
933# OTG and related infrastructure 989# OTG and related infrastructure
@@ -965,6 +1021,7 @@ CONFIG_RTC_INTF_DEV=y
965# CONFIG_RTC_DRV_PCF8563 is not set 1021# CONFIG_RTC_DRV_PCF8563 is not set
966# CONFIG_RTC_DRV_PCF8583 is not set 1022# CONFIG_RTC_DRV_PCF8583 is not set
967# CONFIG_RTC_DRV_M41T80 is not set 1023# CONFIG_RTC_DRV_M41T80 is not set
1024# CONFIG_RTC_DRV_BQ32K is not set
968# CONFIG_RTC_DRV_S35390A is not set 1025# CONFIG_RTC_DRV_S35390A is not set
969# CONFIG_RTC_DRV_FM3130 is not set 1026# CONFIG_RTC_DRV_FM3130 is not set
970# CONFIG_RTC_DRV_RX8581 is not set 1027# CONFIG_RTC_DRV_RX8581 is not set
@@ -993,7 +1050,9 @@ CONFIG_RTC_INTF_DEV=y
993# CONFIG_RTC_DRV_M48T86 is not set 1050# CONFIG_RTC_DRV_M48T86 is not set
994# CONFIG_RTC_DRV_M48T35 is not set 1051# CONFIG_RTC_DRV_M48T35 is not set
995# CONFIG_RTC_DRV_M48T59 is not set 1052# CONFIG_RTC_DRV_M48T59 is not set
1053# CONFIG_RTC_DRV_MSM6242 is not set
996# CONFIG_RTC_DRV_BQ4802 is not set 1054# CONFIG_RTC_DRV_BQ4802 is not set
1055# CONFIG_RTC_DRV_RP5C01 is not set
997# CONFIG_RTC_DRV_V3020 is not set 1056# CONFIG_RTC_DRV_V3020 is not set
998 1057
999# 1058#
@@ -1244,8 +1303,6 @@ CONFIG_BRANCH_PROFILE_NONE=y
1244CONFIG_HAVE_ARCH_KGDB=y 1303CONFIG_HAVE_ARCH_KGDB=y
1245# CONFIG_KGDB is not set 1304# CONFIG_KGDB is not set
1246CONFIG_SH_STANDARD_BIOS=y 1305CONFIG_SH_STANDARD_BIOS=y
1247# CONFIG_EARLY_SCIF_CONSOLE is not set
1248CONFIG_EARLY_PRINTK=y
1249# CONFIG_STACK_DEBUG is not set 1306# CONFIG_STACK_DEBUG is not set
1250CONFIG_DEBUG_STACK_USAGE=y 1307CONFIG_DEBUG_STACK_USAGE=y
1251CONFIG_DUMP_CODE=y 1308CONFIG_DUMP_CODE=y
@@ -1258,7 +1315,11 @@ CONFIG_DUMP_CODE=y
1258# CONFIG_KEYS is not set 1315# CONFIG_KEYS is not set
1259# CONFIG_SECURITY is not set 1316# CONFIG_SECURITY is not set
1260# CONFIG_SECURITYFS is not set 1317# CONFIG_SECURITYFS is not set
1261# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1318# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1319# CONFIG_DEFAULT_SECURITY_SMACK is not set
1320# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1321CONFIG_DEFAULT_SECURITY_DAC=y
1322CONFIG_DEFAULT_SECURITY=""
1262CONFIG_CRYPTO=y 1323CONFIG_CRYPTO=y
1263 1324
1264# 1325#
diff --git a/arch/sh/configs/snapgear_defconfig b/arch/sh/configs/snapgear_defconfig
index cb919a0de4b2..98352d757851 100644
--- a/arch/sh/configs/snapgear_defconfig
+++ b/arch/sh/configs/snapgear_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Thu Sep 24 19:33:00 2009 4# Mon Jan 4 15:14:18 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -20,6 +20,7 @@ CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set 21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
22CONFIG_ARCH_HIBERNATION_POSSIBLE=y 22CONFIG_ARCH_HIBERNATION_POSSIBLE=y
23CONFIG_SYS_SUPPORTS_HUGETLBFS=y
23CONFIG_SYS_SUPPORTS_PCI=y 24CONFIG_SYS_SUPPORTS_PCI=y
24CONFIG_SYS_SUPPORTS_TMU=y 25CONFIG_SYS_SUPPORTS_TMU=y
25CONFIG_STACKTRACE_SUPPORT=y 26CONFIG_STACKTRACE_SUPPORT=y
@@ -30,6 +31,7 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
30CONFIG_ARCH_NO_VIRT_TO_BUS=y 31CONFIG_ARCH_NO_VIRT_TO_BUS=y
31CONFIG_ARCH_HAS_DEFAULT_IDLE=y 32CONFIG_ARCH_HAS_DEFAULT_IDLE=y
32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
34CONFIG_DMA_NONCOHERENT=y
33CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
34CONFIG_CONSTRUCTORS=y 36CONFIG_CONSTRUCTORS=y
35 37
@@ -59,6 +61,7 @@ CONFIG_KERNEL_GZIP=y
59# 61#
60CONFIG_TREE_RCU=y 62CONFIG_TREE_RCU=y
61# CONFIG_TREE_PREEMPT_RCU is not set 63# CONFIG_TREE_PREEMPT_RCU is not set
64# CONFIG_TINY_RCU is not set
62# CONFIG_RCU_TRACE is not set 65# CONFIG_RCU_TRACE is not set
63CONFIG_RCU_FANOUT=32 66CONFIG_RCU_FANOUT=32
64# CONFIG_RCU_FANOUT_EXACT is not set 67# CONFIG_RCU_FANOUT_EXACT is not set
@@ -97,6 +100,7 @@ CONFIG_EVENTFD=y
97CONFIG_SHMEM=y 100CONFIG_SHMEM=y
98CONFIG_AIO=y 101CONFIG_AIO=y
99CONFIG_HAVE_PERF_EVENTS=y 102CONFIG_HAVE_PERF_EVENTS=y
103CONFIG_PERF_USE_VMALLOC=y
100 104
101# 105#
102# Kernel Performance Events And Counters 106# Kernel Performance Events And Counters
@@ -115,6 +119,7 @@ CONFIG_HAVE_IOREMAP_PROT=y
115CONFIG_HAVE_KPROBES=y 119CONFIG_HAVE_KPROBES=y
116CONFIG_HAVE_KRETPROBES=y 120CONFIG_HAVE_KRETPROBES=y
117CONFIG_HAVE_ARCH_TRACEHOOK=y 121CONFIG_HAVE_ARCH_TRACEHOOK=y
122CONFIG_HAVE_DMA_ATTRS=y
118CONFIG_HAVE_CLK=y 123CONFIG_HAVE_CLK=y
119CONFIG_HAVE_DMA_API_DEBUG=y 124CONFIG_HAVE_DMA_API_DEBUG=y
120 125
@@ -136,14 +141,41 @@ CONFIG_LBDAF=y
136# IO Schedulers 141# IO Schedulers
137# 142#
138CONFIG_IOSCHED_NOOP=y 143CONFIG_IOSCHED_NOOP=y
139CONFIG_IOSCHED_AS=y
140CONFIG_IOSCHED_DEADLINE=y 144CONFIG_IOSCHED_DEADLINE=y
141CONFIG_IOSCHED_CFQ=y 145CONFIG_IOSCHED_CFQ=y
142CONFIG_DEFAULT_AS=y
143# CONFIG_DEFAULT_DEADLINE is not set 146# CONFIG_DEFAULT_DEADLINE is not set
144# CONFIG_DEFAULT_CFQ is not set 147CONFIG_DEFAULT_CFQ=y
145# CONFIG_DEFAULT_NOOP is not set 148# CONFIG_DEFAULT_NOOP is not set
146CONFIG_DEFAULT_IOSCHED="anticipatory" 149CONFIG_DEFAULT_IOSCHED="cfq"
150# CONFIG_INLINE_SPIN_TRYLOCK is not set
151# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
152# CONFIG_INLINE_SPIN_LOCK is not set
153# CONFIG_INLINE_SPIN_LOCK_BH is not set
154# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
155# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
156CONFIG_INLINE_SPIN_UNLOCK=y
157# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
158CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
159# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
160# CONFIG_INLINE_READ_TRYLOCK is not set
161# CONFIG_INLINE_READ_LOCK is not set
162# CONFIG_INLINE_READ_LOCK_BH is not set
163# CONFIG_INLINE_READ_LOCK_IRQ is not set
164# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
165CONFIG_INLINE_READ_UNLOCK=y
166# CONFIG_INLINE_READ_UNLOCK_BH is not set
167CONFIG_INLINE_READ_UNLOCK_IRQ=y
168# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
169# CONFIG_INLINE_WRITE_TRYLOCK is not set
170# CONFIG_INLINE_WRITE_LOCK is not set
171# CONFIG_INLINE_WRITE_LOCK_BH is not set
172# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
173# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
174CONFIG_INLINE_WRITE_UNLOCK=y
175# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
176CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
177# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
178# CONFIG_MUTEX_SPIN_ON_OWNER is not set
147# CONFIG_FREEZER is not set 179# CONFIG_FREEZER is not set
148 180
149# 181#
@@ -219,8 +251,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
219# CONFIG_PHYS_ADDR_T_64BIT is not set 251# CONFIG_PHYS_ADDR_T_64BIT is not set
220CONFIG_ZONE_DMA_FLAG=0 252CONFIG_ZONE_DMA_FLAG=0
221CONFIG_NR_QUICK=2 253CONFIG_NR_QUICK=2
222CONFIG_HAVE_MLOCK=y
223CONFIG_HAVE_MLOCKED_PAGE_BIT=y
224# CONFIG_KSM is not set 254# CONFIG_KSM is not set
225CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 255CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
226 256
@@ -272,9 +302,9 @@ CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
272# 302#
273# DMA support 303# DMA support
274# 304#
275CONFIG_SH_DMA_API=y
276CONFIG_SH_DMA=y 305CONFIG_SH_DMA=y
277CONFIG_SH_DMA_IRQ_MULTI=y 306CONFIG_SH_DMA_IRQ_MULTI=y
307CONFIG_SH_DMA_API=y
278CONFIG_NR_ONCHIP_DMA_CHANNELS=8 308CONFIG_NR_ONCHIP_DMA_CHANNELS=8
279# CONFIG_NR_DMA_CHANNELS_BOOL is not set 309# CONFIG_NR_DMA_CHANNELS_BOOL is not set
280 310
@@ -313,7 +343,6 @@ CONFIG_GUSA=y
313CONFIG_ZERO_PAGE_OFFSET=0x00001000 343CONFIG_ZERO_PAGE_OFFSET=0x00001000
314CONFIG_BOOT_LINK_OFFSET=0x00800000 344CONFIG_BOOT_LINK_OFFSET=0x00800000
315CONFIG_ENTRY_OFFSET=0x00001000 345CONFIG_ENTRY_OFFSET=0x00001000
316# CONFIG_UBC_WAKEUP is not set
317# CONFIG_CMDLINE_OVERWRITE is not set 346# CONFIG_CMDLINE_OVERWRITE is not set
318# CONFIG_CMDLINE_EXTEND is not set 347# CONFIG_CMDLINE_EXTEND is not set
319 348
@@ -321,7 +350,6 @@ CONFIG_ENTRY_OFFSET=0x00001000
321# Bus options 350# Bus options
322# 351#
323CONFIG_PCI=y 352CONFIG_PCI=y
324CONFIG_SH_PCIDMA_NONCOHERENT=y
325# CONFIG_PCIEPORTBUS is not set 353# CONFIG_PCIEPORTBUS is not set
326# CONFIG_ARCH_SUPPORTS_MSI is not set 354# CONFIG_ARCH_SUPPORTS_MSI is not set
327CONFIG_PCI_LEGACY=y 355CONFIG_PCI_LEGACY=y
@@ -407,9 +435,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
407# CONFIG_AF_RXRPC is not set 435# CONFIG_AF_RXRPC is not set
408CONFIG_WIRELESS=y 436CONFIG_WIRELESS=y
409# CONFIG_CFG80211 is not set 437# CONFIG_CFG80211 is not set
410CONFIG_CFG80211_DEFAULT_PS_VALUE=0
411# CONFIG_WIRELESS_OLD_REGULATORY is not set
412# CONFIG_WIRELESS_EXT is not set
413# CONFIG_LIB80211 is not set 438# CONFIG_LIB80211 is not set
414 439
415# 440#
@@ -524,6 +549,10 @@ CONFIG_BLK_DEV=y
524# CONFIG_BLK_DEV_UMEM is not set 549# CONFIG_BLK_DEV_UMEM is not set
525# CONFIG_BLK_DEV_COW_COMMON is not set 550# CONFIG_BLK_DEV_COW_COMMON is not set
526# CONFIG_BLK_DEV_LOOP is not set 551# CONFIG_BLK_DEV_LOOP is not set
552
553#
554# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
555#
527# CONFIG_BLK_DEV_NBD is not set 556# CONFIG_BLK_DEV_NBD is not set
528# CONFIG_BLK_DEV_SX8 is not set 557# CONFIG_BLK_DEV_SX8 is not set
529CONFIG_BLK_DEV_RAM=y 558CONFIG_BLK_DEV_RAM=y
@@ -616,6 +645,7 @@ CONFIG_8139TOO_PIO=y
616# CONFIG_SUNDANCE is not set 645# CONFIG_SUNDANCE is not set
617# CONFIG_TLAN is not set 646# CONFIG_TLAN is not set
618# CONFIG_KS8842 is not set 647# CONFIG_KS8842 is not set
648# CONFIG_KS8851_MLL is not set
619# CONFIG_VIA_RHINE is not set 649# CONFIG_VIA_RHINE is not set
620# CONFIG_SC92031 is not set 650# CONFIG_SC92031 is not set
621# CONFIG_ATL2 is not set 651# CONFIG_ATL2 is not set
@@ -623,8 +653,9 @@ CONFIG_8139TOO_PIO=y
623# CONFIG_NETDEV_10000 is not set 653# CONFIG_NETDEV_10000 is not set
624# CONFIG_TR is not set 654# CONFIG_TR is not set
625CONFIG_WLAN=y 655CONFIG_WLAN=y
626# CONFIG_WLAN_PRE80211 is not set 656# CONFIG_ATMEL is not set
627# CONFIG_WLAN_80211 is not set 657# CONFIG_PRISM54 is not set
658# CONFIG_HOSTAP is not set
628 659
629# 660#
630# Enable WiMAX (Networking options) to see the WiMAX drivers 661# Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -637,6 +668,7 @@ CONFIG_WLAN=y
637# CONFIG_NETCONSOLE is not set 668# CONFIG_NETCONSOLE is not set
638# CONFIG_NETPOLL is not set 669# CONFIG_NETPOLL is not set
639# CONFIG_NET_POLL_CONTROLLER is not set 670# CONFIG_NET_POLL_CONTROLLER is not set
671# CONFIG_VMXNET3 is not set
640# CONFIG_ISDN is not set 672# CONFIG_ISDN is not set
641# CONFIG_PHONE is not set 673# CONFIG_PHONE is not set
642 674
@@ -646,6 +678,7 @@ CONFIG_WLAN=y
646CONFIG_INPUT=y 678CONFIG_INPUT=y
647# CONFIG_INPUT_FF_MEMLESS is not set 679# CONFIG_INPUT_FF_MEMLESS is not set
648# CONFIG_INPUT_POLLDEV is not set 680# CONFIG_INPUT_POLLDEV is not set
681# CONFIG_INPUT_SPARSEKMAP is not set
649 682
650# 683#
651# Userland interfaces 684# Userland interfaces
@@ -728,6 +761,7 @@ CONFIG_SSB_POSSIBLE=y
728# 761#
729# CONFIG_MFD_CORE is not set 762# CONFIG_MFD_CORE is not set
730# CONFIG_MFD_SM501 is not set 763# CONFIG_MFD_SM501 is not set
764# CONFIG_MFD_SH_MOBILE_SDHI is not set
731# CONFIG_HTC_PASIC3 is not set 765# CONFIG_HTC_PASIC3 is not set
732# CONFIG_MFD_TMIO is not set 766# CONFIG_MFD_TMIO is not set
733# CONFIG_REGULATOR is not set 767# CONFIG_REGULATOR is not set
@@ -787,7 +821,9 @@ CONFIG_RTC_DRV_DS1302=y
787# CONFIG_RTC_DRV_M48T86 is not set 821# CONFIG_RTC_DRV_M48T86 is not set
788# CONFIG_RTC_DRV_M48T35 is not set 822# CONFIG_RTC_DRV_M48T35 is not set
789# CONFIG_RTC_DRV_M48T59 is not set 823# CONFIG_RTC_DRV_M48T59 is not set
824# CONFIG_RTC_DRV_MSM6242 is not set
790# CONFIG_RTC_DRV_BQ4802 is not set 825# CONFIG_RTC_DRV_BQ4802 is not set
826# CONFIG_RTC_DRV_RP5C01 is not set
791# CONFIG_RTC_DRV_V3020 is not set 827# CONFIG_RTC_DRV_V3020 is not set
792 828
793# 829#
@@ -812,6 +848,7 @@ CONFIG_EXT2_FS=y
812# CONFIG_EXT2_FS_XIP is not set 848# CONFIG_EXT2_FS_XIP is not set
813# CONFIG_EXT3_FS is not set 849# CONFIG_EXT3_FS is not set
814# CONFIG_EXT4_FS is not set 850# CONFIG_EXT4_FS is not set
851CONFIG_EXT4_USE_FOR_EXT23=y
815# CONFIG_REISERFS_FS is not set 852# CONFIG_REISERFS_FS is not set
816# CONFIG_JFS_FS is not set 853# CONFIG_JFS_FS is not set
817# CONFIG_FS_POSIX_ACL is not set 854# CONFIG_FS_POSIX_ACL is not set
@@ -915,10 +952,11 @@ CONFIG_FRAME_WARN=1024
915# CONFIG_DEBUG_FS is not set 952# CONFIG_DEBUG_FS is not set
916# CONFIG_HEADERS_CHECK is not set 953# CONFIG_HEADERS_CHECK is not set
917# CONFIG_DEBUG_KERNEL is not set 954# CONFIG_DEBUG_KERNEL is not set
918# CONFIG_DEBUG_BUGVERBOSE is not set 955CONFIG_DEBUG_BUGVERBOSE=y
919# CONFIG_DEBUG_MEMORY_INIT is not set 956# CONFIG_DEBUG_MEMORY_INIT is not set
920# CONFIG_RCU_CPU_STALL_DETECTOR is not set 957# CONFIG_RCU_CPU_STALL_DETECTOR is not set
921# CONFIG_LATENCYTOP is not set 958# CONFIG_LATENCYTOP is not set
959# CONFIG_SYSCTL_SYSCALL_CHECK is not set
922CONFIG_HAVE_FUNCTION_TRACER=y 960CONFIG_HAVE_FUNCTION_TRACER=y
923CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 961CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
924CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y 962CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
@@ -931,7 +969,6 @@ CONFIG_TRACING_SUPPORT=y
931# CONFIG_SAMPLES is not set 969# CONFIG_SAMPLES is not set
932CONFIG_HAVE_ARCH_KGDB=y 970CONFIG_HAVE_ARCH_KGDB=y
933# CONFIG_SH_STANDARD_BIOS is not set 971# CONFIG_SH_STANDARD_BIOS is not set
934# CONFIG_EARLY_SCIF_CONSOLE is not set
935# CONFIG_DWARF_UNWINDER is not set 972# CONFIG_DWARF_UNWINDER is not set
936 973
937# 974#
@@ -940,7 +977,11 @@ CONFIG_HAVE_ARCH_KGDB=y
940# CONFIG_KEYS is not set 977# CONFIG_KEYS is not set
941# CONFIG_SECURITY is not set 978# CONFIG_SECURITY is not set
942# CONFIG_SECURITYFS is not set 979# CONFIG_SECURITYFS is not set
943# CONFIG_SECURITY_FILE_CAPABILITIES is not set 980# CONFIG_DEFAULT_SECURITY_SELINUX is not set
981# CONFIG_DEFAULT_SECURITY_SMACK is not set
982# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
983CONFIG_DEFAULT_SECURITY_DAC=y
984CONFIG_DEFAULT_SECURITY=""
944# CONFIG_CRYPTO is not set 985# CONFIG_CRYPTO is not set
945# CONFIG_BINARY_PRINTF is not set 986# CONFIG_BINARY_PRINTF is not set
946 987
diff --git a/arch/sh/configs/systemh_defconfig b/arch/sh/configs/systemh_defconfig
index b9fe960309f5..72982e360e3f 100644
--- a/arch/sh/configs/systemh_defconfig
+++ b/arch/sh/configs/systemh_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Thu Sep 24 19:35:03 2009 4# Mon Jan 4 15:14:50 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -20,6 +20,7 @@ CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set 21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
22CONFIG_ARCH_HIBERNATION_POSSIBLE=y 22CONFIG_ARCH_HIBERNATION_POSSIBLE=y
23CONFIG_SYS_SUPPORTS_HUGETLBFS=y
23CONFIG_SYS_SUPPORTS_TMU=y 24CONFIG_SYS_SUPPORTS_TMU=y
24CONFIG_STACKTRACE_SUPPORT=y 25CONFIG_STACKTRACE_SUPPORT=y
25CONFIG_LOCKDEP_SUPPORT=y 26CONFIG_LOCKDEP_SUPPORT=y
@@ -29,6 +30,7 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
29CONFIG_ARCH_NO_VIRT_TO_BUS=y 30CONFIG_ARCH_NO_VIRT_TO_BUS=y
30CONFIG_ARCH_HAS_DEFAULT_IDLE=y 31CONFIG_ARCH_HAS_DEFAULT_IDLE=y
31CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
33CONFIG_DMA_NONCOHERENT=y
32CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 34CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
33CONFIG_CONSTRUCTORS=y 35CONFIG_CONSTRUCTORS=y
34 36
@@ -56,6 +58,7 @@ CONFIG_SWAP=y
56# 58#
57CONFIG_TREE_RCU=y 59CONFIG_TREE_RCU=y
58# CONFIG_TREE_PREEMPT_RCU is not set 60# CONFIG_TREE_PREEMPT_RCU is not set
61# CONFIG_TINY_RCU is not set
59# CONFIG_RCU_TRACE is not set 62# CONFIG_RCU_TRACE is not set
60CONFIG_RCU_FANOUT=32 63CONFIG_RCU_FANOUT=32
61# CONFIG_RCU_FANOUT_EXACT is not set 64# CONFIG_RCU_FANOUT_EXACT is not set
@@ -94,6 +97,7 @@ CONFIG_EVENTFD=y
94CONFIG_SHMEM=y 97CONFIG_SHMEM=y
95CONFIG_AIO=y 98CONFIG_AIO=y
96CONFIG_HAVE_PERF_EVENTS=y 99CONFIG_HAVE_PERF_EVENTS=y
100CONFIG_PERF_USE_VMALLOC=y
97 101
98# 102#
99# Kernel Performance Events And Counters 103# Kernel Performance Events And Counters
@@ -112,6 +116,7 @@ CONFIG_HAVE_IOREMAP_PROT=y
112CONFIG_HAVE_KPROBES=y 116CONFIG_HAVE_KPROBES=y
113CONFIG_HAVE_KRETPROBES=y 117CONFIG_HAVE_KRETPROBES=y
114CONFIG_HAVE_ARCH_TRACEHOOK=y 118CONFIG_HAVE_ARCH_TRACEHOOK=y
119CONFIG_HAVE_DMA_ATTRS=y
115CONFIG_HAVE_CLK=y 120CONFIG_HAVE_CLK=y
116CONFIG_HAVE_DMA_API_DEBUG=y 121CONFIG_HAVE_DMA_API_DEBUG=y
117 122
@@ -138,14 +143,41 @@ CONFIG_LBDAF=y
138# IO Schedulers 143# IO Schedulers
139# 144#
140CONFIG_IOSCHED_NOOP=y 145CONFIG_IOSCHED_NOOP=y
141CONFIG_IOSCHED_AS=y
142CONFIG_IOSCHED_DEADLINE=y 146CONFIG_IOSCHED_DEADLINE=y
143CONFIG_IOSCHED_CFQ=y 147CONFIG_IOSCHED_CFQ=y
144CONFIG_DEFAULT_AS=y
145# CONFIG_DEFAULT_DEADLINE is not set 148# CONFIG_DEFAULT_DEADLINE is not set
146# CONFIG_DEFAULT_CFQ is not set 149CONFIG_DEFAULT_CFQ=y
147# CONFIG_DEFAULT_NOOP is not set 150# CONFIG_DEFAULT_NOOP is not set
148CONFIG_DEFAULT_IOSCHED="anticipatory" 151CONFIG_DEFAULT_IOSCHED="cfq"
152# CONFIG_INLINE_SPIN_TRYLOCK is not set
153# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
154# CONFIG_INLINE_SPIN_LOCK is not set
155# CONFIG_INLINE_SPIN_LOCK_BH is not set
156# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
157# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
158# CONFIG_INLINE_SPIN_UNLOCK is not set
159# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
160# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
161# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
162# CONFIG_INLINE_READ_TRYLOCK is not set
163# CONFIG_INLINE_READ_LOCK is not set
164# CONFIG_INLINE_READ_LOCK_BH is not set
165# CONFIG_INLINE_READ_LOCK_IRQ is not set
166# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
167# CONFIG_INLINE_READ_UNLOCK is not set
168# CONFIG_INLINE_READ_UNLOCK_BH is not set
169# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
170# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
171# CONFIG_INLINE_WRITE_TRYLOCK is not set
172# CONFIG_INLINE_WRITE_LOCK is not set
173# CONFIG_INLINE_WRITE_LOCK_BH is not set
174# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
175# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
176# CONFIG_INLINE_WRITE_UNLOCK is not set
177# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
178# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
179# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
180# CONFIG_MUTEX_SPIN_ON_OWNER is not set
149# CONFIG_FREEZER is not set 181# CONFIG_FREEZER is not set
150 182
151# 183#
@@ -221,8 +253,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
221# CONFIG_PHYS_ADDR_T_64BIT is not set 253# CONFIG_PHYS_ADDR_T_64BIT is not set
222CONFIG_ZONE_DMA_FLAG=0 254CONFIG_ZONE_DMA_FLAG=0
223CONFIG_NR_QUICK=2 255CONFIG_NR_QUICK=2
224CONFIG_HAVE_MLOCK=y
225CONFIG_HAVE_MLOCKED_PAGE_BIT=y
226# CONFIG_KSM is not set 256# CONFIG_KSM is not set
227CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 257CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
228 258
@@ -310,7 +340,6 @@ CONFIG_GUSA=y
310CONFIG_ZERO_PAGE_OFFSET=0x00001000 340CONFIG_ZERO_PAGE_OFFSET=0x00001000
311CONFIG_BOOT_LINK_OFFSET=0x00800000 341CONFIG_BOOT_LINK_OFFSET=0x00800000
312CONFIG_ENTRY_OFFSET=0x00001000 342CONFIG_ENTRY_OFFSET=0x00001000
313# CONFIG_UBC_WAKEUP is not set
314# CONFIG_CMDLINE_OVERWRITE is not set 343# CONFIG_CMDLINE_OVERWRITE is not set
315# CONFIG_CMDLINE_EXTEND is not set 344# CONFIG_CMDLINE_EXTEND is not set
316 345
@@ -349,6 +378,10 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
349CONFIG_BLK_DEV=y 378CONFIG_BLK_DEV=y
350# CONFIG_BLK_DEV_COW_COMMON is not set 379# CONFIG_BLK_DEV_COW_COMMON is not set
351# CONFIG_BLK_DEV_LOOP is not set 380# CONFIG_BLK_DEV_LOOP is not set
381
382#
383# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
384#
352CONFIG_BLK_DEV_RAM=y 385CONFIG_BLK_DEV_RAM=y
353CONFIG_BLK_DEV_RAM_COUNT=16 386CONFIG_BLK_DEV_RAM_COUNT=16
354CONFIG_BLK_DEV_RAM_SIZE=1024 387CONFIG_BLK_DEV_RAM_SIZE=1024
@@ -390,6 +423,7 @@ CONFIG_SERIO=y
390# CONFIG_SERIO_SERPORT is not set 423# CONFIG_SERIO_SERPORT is not set
391# CONFIG_SERIO_LIBPS2 is not set 424# CONFIG_SERIO_LIBPS2 is not set
392# CONFIG_SERIO_RAW is not set 425# CONFIG_SERIO_RAW is not set
426# CONFIG_SERIO_ALTERA_PS2 is not set
393# CONFIG_GAMEPORT is not set 427# CONFIG_GAMEPORT is not set
394 428
395# 429#
@@ -458,6 +492,7 @@ CONFIG_SSB_POSSIBLE=y
458# 492#
459# CONFIG_MFD_CORE is not set 493# CONFIG_MFD_CORE is not set
460# CONFIG_MFD_SM501 is not set 494# CONFIG_MFD_SM501 is not set
495# CONFIG_MFD_SH_MOBILE_SDHI is not set
461# CONFIG_HTC_PASIC3 is not set 496# CONFIG_HTC_PASIC3 is not set
462# CONFIG_MFD_TMIO is not set 497# CONFIG_MFD_TMIO is not set
463# CONFIG_REGULATOR is not set 498# CONFIG_REGULATOR is not set
@@ -517,6 +552,7 @@ CONFIG_RTC_LIB=y
517# CONFIG_EXT2_FS is not set 552# CONFIG_EXT2_FS is not set
518# CONFIG_EXT3_FS is not set 553# CONFIG_EXT3_FS is not set
519# CONFIG_EXT4_FS is not set 554# CONFIG_EXT4_FS is not set
555CONFIG_EXT4_USE_FOR_EXT23=y
520# CONFIG_REISERFS_FS is not set 556# CONFIG_REISERFS_FS is not set
521# CONFIG_JFS_FS is not set 557# CONFIG_JFS_FS is not set
522# CONFIG_FS_POSIX_ACL is not set 558# CONFIG_FS_POSIX_ACL is not set
@@ -609,10 +645,11 @@ CONFIG_FRAME_WARN=1024
609# CONFIG_DEBUG_FS is not set 645# CONFIG_DEBUG_FS is not set
610# CONFIG_HEADERS_CHECK is not set 646# CONFIG_HEADERS_CHECK is not set
611# CONFIG_DEBUG_KERNEL is not set 647# CONFIG_DEBUG_KERNEL is not set
612# CONFIG_DEBUG_BUGVERBOSE is not set 648CONFIG_DEBUG_BUGVERBOSE=y
613# CONFIG_DEBUG_MEMORY_INIT is not set 649# CONFIG_DEBUG_MEMORY_INIT is not set
614# CONFIG_RCU_CPU_STALL_DETECTOR is not set 650# CONFIG_RCU_CPU_STALL_DETECTOR is not set
615# CONFIG_LATENCYTOP is not set 651# CONFIG_LATENCYTOP is not set
652# CONFIG_SYSCTL_SYSCALL_CHECK is not set
616CONFIG_HAVE_FUNCTION_TRACER=y 653CONFIG_HAVE_FUNCTION_TRACER=y
617CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 654CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
618CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y 655CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
@@ -625,7 +662,6 @@ CONFIG_TRACING_SUPPORT=y
625# CONFIG_SAMPLES is not set 662# CONFIG_SAMPLES is not set
626CONFIG_HAVE_ARCH_KGDB=y 663CONFIG_HAVE_ARCH_KGDB=y
627# CONFIG_SH_STANDARD_BIOS is not set 664# CONFIG_SH_STANDARD_BIOS is not set
628# CONFIG_EARLY_SCIF_CONSOLE is not set
629# CONFIG_DWARF_UNWINDER is not set 665# CONFIG_DWARF_UNWINDER is not set
630 666
631# 667#
@@ -634,7 +670,11 @@ CONFIG_HAVE_ARCH_KGDB=y
634# CONFIG_KEYS is not set 670# CONFIG_KEYS is not set
635# CONFIG_SECURITY is not set 671# CONFIG_SECURITY is not set
636# CONFIG_SECURITYFS is not set 672# CONFIG_SECURITYFS is not set
637# CONFIG_SECURITY_FILE_CAPABILITIES is not set 673# CONFIG_DEFAULT_SECURITY_SELINUX is not set
674# CONFIG_DEFAULT_SECURITY_SMACK is not set
675# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
676CONFIG_DEFAULT_SECURITY_DAC=y
677CONFIG_DEFAULT_SECURITY=""
638# CONFIG_CRYPTO is not set 678# CONFIG_CRYPTO is not set
639# CONFIG_BINARY_PRINTF is not set 679# CONFIG_BINARY_PRINTF is not set
640 680
diff --git a/arch/sh/configs/titan_defconfig b/arch/sh/configs/titan_defconfig
index 2ca79ed9fb62..78c257053c79 100644
--- a/arch/sh/configs/titan_defconfig
+++ b/arch/sh/configs/titan_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Thu Sep 24 19:36:36 2009 4# Mon Jan 4 15:17:20 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -20,6 +20,7 @@ CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set 21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
22CONFIG_ARCH_HIBERNATION_POSSIBLE=y 22CONFIG_ARCH_HIBERNATION_POSSIBLE=y
23CONFIG_SYS_SUPPORTS_HUGETLBFS=y
23CONFIG_SYS_SUPPORTS_PCI=y 24CONFIG_SYS_SUPPORTS_PCI=y
24CONFIG_SYS_SUPPORTS_TMU=y 25CONFIG_SYS_SUPPORTS_TMU=y
25CONFIG_STACKTRACE_SUPPORT=y 26CONFIG_STACKTRACE_SUPPORT=y
@@ -30,6 +31,7 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
30CONFIG_ARCH_NO_VIRT_TO_BUS=y 31CONFIG_ARCH_NO_VIRT_TO_BUS=y
31CONFIG_ARCH_HAS_DEFAULT_IDLE=y 32CONFIG_ARCH_HAS_DEFAULT_IDLE=y
32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
34CONFIG_DMA_NONCOHERENT=y
33CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
34CONFIG_CONSTRUCTORS=y 36CONFIG_CONSTRUCTORS=y
35 37
@@ -61,6 +63,7 @@ CONFIG_POSIX_MQUEUE_SYSCTL=y
61# 63#
62CONFIG_TREE_RCU=y 64CONFIG_TREE_RCU=y
63# CONFIG_TREE_PREEMPT_RCU is not set 65# CONFIG_TREE_PREEMPT_RCU is not set
66# CONFIG_TINY_RCU is not set
64# CONFIG_RCU_TRACE is not set 67# CONFIG_RCU_TRACE is not set
65CONFIG_RCU_FANOUT=32 68CONFIG_RCU_FANOUT=32
66# CONFIG_RCU_FANOUT_EXACT is not set 69# CONFIG_RCU_FANOUT_EXACT is not set
@@ -101,6 +104,7 @@ CONFIG_EVENTFD=y
101CONFIG_SHMEM=y 104CONFIG_SHMEM=y
102CONFIG_AIO=y 105CONFIG_AIO=y
103CONFIG_HAVE_PERF_EVENTS=y 106CONFIG_HAVE_PERF_EVENTS=y
107CONFIG_PERF_USE_VMALLOC=y
104 108
105# 109#
106# Kernel Performance Events And Counters 110# Kernel Performance Events And Counters
@@ -120,13 +124,14 @@ CONFIG_HAVE_IOREMAP_PROT=y
120CONFIG_HAVE_KPROBES=y 124CONFIG_HAVE_KPROBES=y
121CONFIG_HAVE_KRETPROBES=y 125CONFIG_HAVE_KRETPROBES=y
122CONFIG_HAVE_ARCH_TRACEHOOK=y 126CONFIG_HAVE_ARCH_TRACEHOOK=y
127CONFIG_HAVE_DMA_ATTRS=y
123CONFIG_HAVE_CLK=y 128CONFIG_HAVE_CLK=y
124CONFIG_HAVE_DMA_API_DEBUG=y 129CONFIG_HAVE_DMA_API_DEBUG=y
125 130
126# 131#
127# GCOV-based kernel profiling 132# GCOV-based kernel profiling
128# 133#
129# CONFIG_SLOW_WORK is not set 134CONFIG_SLOW_WORK=y
130CONFIG_HAVE_GENERIC_DMA_COHERENT=y 135CONFIG_HAVE_GENERIC_DMA_COHERENT=y
131CONFIG_SLABINFO=y 136CONFIG_SLABINFO=y
132CONFIG_RT_MUTEXES=y 137CONFIG_RT_MUTEXES=y
@@ -146,14 +151,41 @@ CONFIG_LBDAF=y
146# IO Schedulers 151# IO Schedulers
147# 152#
148CONFIG_IOSCHED_NOOP=y 153CONFIG_IOSCHED_NOOP=y
149CONFIG_IOSCHED_AS=y
150CONFIG_IOSCHED_DEADLINE=y 154CONFIG_IOSCHED_DEADLINE=y
151CONFIG_IOSCHED_CFQ=y 155CONFIG_IOSCHED_CFQ=y
152CONFIG_DEFAULT_AS=y
153# CONFIG_DEFAULT_DEADLINE is not set 156# CONFIG_DEFAULT_DEADLINE is not set
154# CONFIG_DEFAULT_CFQ is not set 157CONFIG_DEFAULT_CFQ=y
155# CONFIG_DEFAULT_NOOP is not set 158# CONFIG_DEFAULT_NOOP is not set
156CONFIG_DEFAULT_IOSCHED="anticipatory" 159CONFIG_DEFAULT_IOSCHED="cfq"
160# CONFIG_INLINE_SPIN_TRYLOCK is not set
161# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
162# CONFIG_INLINE_SPIN_LOCK is not set
163# CONFIG_INLINE_SPIN_LOCK_BH is not set
164# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
165# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
166CONFIG_INLINE_SPIN_UNLOCK=y
167# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
168CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
169# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
170# CONFIG_INLINE_READ_TRYLOCK is not set
171# CONFIG_INLINE_READ_LOCK is not set
172# CONFIG_INLINE_READ_LOCK_BH is not set
173# CONFIG_INLINE_READ_LOCK_IRQ is not set
174# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
175CONFIG_INLINE_READ_UNLOCK=y
176# CONFIG_INLINE_READ_UNLOCK_BH is not set
177CONFIG_INLINE_READ_UNLOCK_IRQ=y
178# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
179# CONFIG_INLINE_WRITE_TRYLOCK is not set
180# CONFIG_INLINE_WRITE_LOCK is not set
181# CONFIG_INLINE_WRITE_LOCK_BH is not set
182# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
183# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
184CONFIG_INLINE_WRITE_UNLOCK=y
185# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
186CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
187# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
188# CONFIG_MUTEX_SPIN_ON_OWNER is not set
157# CONFIG_FREEZER is not set 189# CONFIG_FREEZER is not set
158 190
159# 191#
@@ -229,8 +261,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
229# CONFIG_PHYS_ADDR_T_64BIT is not set 261# CONFIG_PHYS_ADDR_T_64BIT is not set
230CONFIG_ZONE_DMA_FLAG=0 262CONFIG_ZONE_DMA_FLAG=0
231CONFIG_NR_QUICK=2 263CONFIG_NR_QUICK=2
232CONFIG_HAVE_MLOCK=y
233CONFIG_HAVE_MLOCKED_PAGE_BIT=y
234# CONFIG_KSM is not set 264# CONFIG_KSM is not set
235CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 265CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
236 266
@@ -282,9 +312,9 @@ CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
282# 312#
283# DMA support 313# DMA support
284# 314#
285CONFIG_SH_DMA_API=y
286CONFIG_SH_DMA=y 315CONFIG_SH_DMA=y
287CONFIG_SH_DMA_IRQ_MULTI=y 316CONFIG_SH_DMA_IRQ_MULTI=y
317CONFIG_SH_DMA_API=y
288CONFIG_NR_ONCHIP_DMA_CHANNELS=8 318CONFIG_NR_ONCHIP_DMA_CHANNELS=8
289# CONFIG_NR_DMA_CHANNELS_BOOL is not set 319# CONFIG_NR_DMA_CHANNELS_BOOL is not set
290 320
@@ -323,7 +353,6 @@ CONFIG_GUSA=y
323CONFIG_ZERO_PAGE_OFFSET=0x00001000 353CONFIG_ZERO_PAGE_OFFSET=0x00001000
324CONFIG_BOOT_LINK_OFFSET=0x009e0000 354CONFIG_BOOT_LINK_OFFSET=0x009e0000
325CONFIG_ENTRY_OFFSET=0x00001000 355CONFIG_ENTRY_OFFSET=0x00001000
326# CONFIG_UBC_WAKEUP is not set
327CONFIG_CMDLINE_OVERWRITE=y 356CONFIG_CMDLINE_OVERWRITE=y
328# CONFIG_CMDLINE_EXTEND is not set 357# CONFIG_CMDLINE_EXTEND is not set
329CONFIG_CMDLINE="console=ttySC1,38400N81 root=/dev/nfs ip=:::::eth1:autoconf rw" 358CONFIG_CMDLINE="console=ttySC1,38400N81 root=/dev/nfs ip=:::::eth1:autoconf rw"
@@ -332,7 +361,6 @@ CONFIG_CMDLINE="console=ttySC1,38400N81 root=/dev/nfs ip=:::::eth1:autoconf rw"
332# Bus options 361# Bus options
333# 362#
334CONFIG_PCI=y 363CONFIG_PCI=y
335CONFIG_SH_PCIDMA_NONCOHERENT=y
336# CONFIG_PCIEPORTBUS is not set 364# CONFIG_PCIEPORTBUS is not set
337# CONFIG_ARCH_SUPPORTS_MSI is not set 365# CONFIG_ARCH_SUPPORTS_MSI is not set
338CONFIG_PCI_LEGACY=y 366CONFIG_PCI_LEGACY=y
@@ -425,6 +453,7 @@ CONFIG_INET6_XFRM_MODE_TUNNEL=y
425CONFIG_INET6_XFRM_MODE_BEET=y 453CONFIG_INET6_XFRM_MODE_BEET=y
426# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set 454# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
427CONFIG_IPV6_SIT=m 455CONFIG_IPV6_SIT=m
456# CONFIG_IPV6_SIT_6RD is not set
428CONFIG_IPV6_NDISC_NODETYPE=y 457CONFIG_IPV6_NDISC_NODETYPE=y
429CONFIG_IPV6_TUNNEL=y 458CONFIG_IPV6_TUNNEL=y
430# CONFIG_IPV6_MULTIPLE_TABLES is not set 459# CONFIG_IPV6_MULTIPLE_TABLES is not set
@@ -614,10 +643,6 @@ CONFIG_NET_SCH_FIFO=y
614CONFIG_FIB_RULES=y 643CONFIG_FIB_RULES=y
615CONFIG_WIRELESS=y 644CONFIG_WIRELESS=y
616# CONFIG_CFG80211 is not set 645# CONFIG_CFG80211 is not set
617CONFIG_CFG80211_DEFAULT_PS_VALUE=0
618# CONFIG_WIRELESS_OLD_REGULATORY is not set
619CONFIG_WIRELESS_EXT=y
620CONFIG_WIRELESS_EXT_SYSFS=y
621# CONFIG_LIB80211 is not set 646# CONFIG_LIB80211 is not set
622 647
623# 648#
@@ -743,6 +768,11 @@ CONFIG_BLK_DEV=y
743# CONFIG_BLK_DEV_COW_COMMON is not set 768# CONFIG_BLK_DEV_COW_COMMON is not set
744CONFIG_BLK_DEV_LOOP=m 769CONFIG_BLK_DEV_LOOP=m
745CONFIG_BLK_DEV_CRYPTOLOOP=m 770CONFIG_BLK_DEV_CRYPTOLOOP=m
771
772#
773# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
774#
775# CONFIG_BLK_DEV_DRBD is not set
746# CONFIG_BLK_DEV_NBD is not set 776# CONFIG_BLK_DEV_NBD is not set
747# CONFIG_BLK_DEV_SX8 is not set 777# CONFIG_BLK_DEV_SX8 is not set
748# CONFIG_BLK_DEV_UB is not set 778# CONFIG_BLK_DEV_UB is not set
@@ -807,8 +837,11 @@ CONFIG_SCSI_LOWLEVEL=y
807# CONFIG_ISCSI_TCP is not set 837# CONFIG_ISCSI_TCP is not set
808# CONFIG_SCSI_CXGB3_ISCSI is not set 838# CONFIG_SCSI_CXGB3_ISCSI is not set
809# CONFIG_SCSI_BNX2_ISCSI is not set 839# CONFIG_SCSI_BNX2_ISCSI is not set
840# CONFIG_BE2ISCSI is not set
810# CONFIG_BLK_DEV_3W_XXXX_RAID is not set 841# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
842# CONFIG_SCSI_HPSA is not set
811# CONFIG_SCSI_3W_9XXX is not set 843# CONFIG_SCSI_3W_9XXX is not set
844# CONFIG_SCSI_3W_SAS is not set
812# CONFIG_SCSI_ACARD is not set 845# CONFIG_SCSI_ACARD is not set
813# CONFIG_SCSI_AACRAID is not set 846# CONFIG_SCSI_AACRAID is not set
814# CONFIG_SCSI_AIC7XXX is not set 847# CONFIG_SCSI_AIC7XXX is not set
@@ -841,7 +874,9 @@ CONFIG_SCSI_LOWLEVEL=y
841# CONFIG_SCSI_NSP32 is not set 874# CONFIG_SCSI_NSP32 is not set
842# CONFIG_SCSI_DEBUG is not set 875# CONFIG_SCSI_DEBUG is not set
843# CONFIG_SCSI_PMCRAID is not set 876# CONFIG_SCSI_PMCRAID is not set
877# CONFIG_SCSI_PM8001 is not set
844# CONFIG_SCSI_SRP is not set 878# CONFIG_SCSI_SRP is not set
879# CONFIG_SCSI_BFA_FC is not set
845# CONFIG_SCSI_DH is not set 880# CONFIG_SCSI_DH is not set
846# CONFIG_SCSI_OSD_INITIATOR is not set 881# CONFIG_SCSI_OSD_INITIATOR is not set
847# CONFIG_ATA is not set 882# CONFIG_ATA is not set
@@ -935,6 +970,7 @@ CONFIG_8139_OLD_RX_RESET=y
935# CONFIG_SUNDANCE is not set 970# CONFIG_SUNDANCE is not set
936# CONFIG_TLAN is not set 971# CONFIG_TLAN is not set
937# CONFIG_KS8842 is not set 972# CONFIG_KS8842 is not set
973# CONFIG_KS8851_MLL is not set
938# CONFIG_VIA_RHINE is not set 974# CONFIG_VIA_RHINE is not set
939# CONFIG_SC92031 is not set 975# CONFIG_SC92031 is not set
940# CONFIG_ATL2 is not set 976# CONFIG_ATL2 is not set
@@ -983,8 +1019,10 @@ CONFIG_CHELSIO_T3_DEPENDS=y
983# CONFIG_BE2NET is not set 1019# CONFIG_BE2NET is not set
984# CONFIG_TR is not set 1020# CONFIG_TR is not set
985CONFIG_WLAN=y 1021CONFIG_WLAN=y
986# CONFIG_WLAN_PRE80211 is not set 1022# CONFIG_ATMEL is not set
987# CONFIG_WLAN_80211 is not set 1023# CONFIG_PRISM54 is not set
1024# CONFIG_USB_ZD1201 is not set
1025# CONFIG_HOSTAP is not set
988 1026
989# 1027#
990# Enable WiMAX (Networking options) to see the WiMAX drivers 1028# Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -1033,6 +1071,7 @@ CONFIG_SLIP_SMART=y
1033# CONFIG_NETCONSOLE is not set 1071# CONFIG_NETCONSOLE is not set
1034# CONFIG_NETPOLL is not set 1072# CONFIG_NETPOLL is not set
1035# CONFIG_NET_POLL_CONTROLLER is not set 1073# CONFIG_NET_POLL_CONTROLLER is not set
1074# CONFIG_VMXNET3 is not set
1036# CONFIG_ISDN is not set 1075# CONFIG_ISDN is not set
1037# CONFIG_PHONE is not set 1076# CONFIG_PHONE is not set
1038 1077
@@ -1042,6 +1081,7 @@ CONFIG_SLIP_SMART=y
1042CONFIG_INPUT=y 1081CONFIG_INPUT=y
1043# CONFIG_INPUT_FF_MEMLESS is not set 1082# CONFIG_INPUT_FF_MEMLESS is not set
1044# CONFIG_INPUT_POLLDEV is not set 1083# CONFIG_INPUT_POLLDEV is not set
1084# CONFIG_INPUT_SPARSEKMAP is not set
1045 1085
1046# 1086#
1047# Userland interfaces 1087# Userland interfaces
@@ -1172,6 +1212,7 @@ CONFIG_SSB_POSSIBLE=y
1172# 1212#
1173# CONFIG_MFD_CORE is not set 1213# CONFIG_MFD_CORE is not set
1174# CONFIG_MFD_SM501 is not set 1214# CONFIG_MFD_SM501 is not set
1215# CONFIG_MFD_SH_MOBILE_SDHI is not set
1175# CONFIG_HTC_PASIC3 is not set 1216# CONFIG_HTC_PASIC3 is not set
1176# CONFIG_MFD_TMIO is not set 1217# CONFIG_MFD_TMIO is not set
1177# CONFIG_REGULATOR is not set 1218# CONFIG_REGULATOR is not set
@@ -1409,7 +1450,9 @@ CONFIG_RTC_INTF_DEV=y
1409# CONFIG_RTC_DRV_M48T86 is not set 1450# CONFIG_RTC_DRV_M48T86 is not set
1410# CONFIG_RTC_DRV_M48T35 is not set 1451# CONFIG_RTC_DRV_M48T35 is not set
1411# CONFIG_RTC_DRV_M48T59 is not set 1452# CONFIG_RTC_DRV_M48T59 is not set
1453# CONFIG_RTC_DRV_MSM6242 is not set
1412# CONFIG_RTC_DRV_BQ4802 is not set 1454# CONFIG_RTC_DRV_BQ4802 is not set
1455# CONFIG_RTC_DRV_RP5C01 is not set
1413# CONFIG_RTC_DRV_V3020 is not set 1456# CONFIG_RTC_DRV_V3020 is not set
1414 1457
1415# 1458#
@@ -1664,6 +1707,7 @@ CONFIG_SCHED_DEBUG=y
1664# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set 1707# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
1665# CONFIG_FAULT_INJECTION is not set 1708# CONFIG_FAULT_INJECTION is not set
1666# CONFIG_LATENCYTOP is not set 1709# CONFIG_LATENCYTOP is not set
1710# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1667# CONFIG_PAGE_POISONING is not set 1711# CONFIG_PAGE_POISONING is not set
1668CONFIG_HAVE_FUNCTION_TRACER=y 1712CONFIG_HAVE_FUNCTION_TRACER=y
1669CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 1713CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
@@ -1691,7 +1735,6 @@ CONFIG_BRANCH_PROFILE_NONE=y
1691CONFIG_HAVE_ARCH_KGDB=y 1735CONFIG_HAVE_ARCH_KGDB=y
1692# CONFIG_KGDB is not set 1736# CONFIG_KGDB is not set
1693# CONFIG_SH_STANDARD_BIOS is not set 1737# CONFIG_SH_STANDARD_BIOS is not set
1694# CONFIG_EARLY_SCIF_CONSOLE is not set
1695# CONFIG_STACK_DEBUG is not set 1738# CONFIG_STACK_DEBUG is not set
1696# CONFIG_DEBUG_STACK_USAGE is not set 1739# CONFIG_DEBUG_STACK_USAGE is not set
1697# CONFIG_4KSTACKS is not set 1740# CONFIG_4KSTACKS is not set
@@ -1705,7 +1748,11 @@ CONFIG_HAVE_ARCH_KGDB=y
1705# CONFIG_KEYS is not set 1748# CONFIG_KEYS is not set
1706# CONFIG_SECURITY is not set 1749# CONFIG_SECURITY is not set
1707# CONFIG_SECURITYFS is not set 1750# CONFIG_SECURITYFS is not set
1708# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1751# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1752# CONFIG_DEFAULT_SECURITY_SMACK is not set
1753# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1754CONFIG_DEFAULT_SECURITY_DAC=y
1755CONFIG_DEFAULT_SECURITY=""
1709CONFIG_CRYPTO=y 1756CONFIG_CRYPTO=y
1710 1757
1711# 1758#
diff --git a/arch/sh/configs/ul2_defconfig b/arch/sh/configs/ul2_defconfig
index b012ca77f029..4fa03bf086dd 100644
--- a/arch/sh/configs/ul2_defconfig
+++ b/arch/sh/configs/ul2_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Thu Sep 24 19:42:33 2009 4# Mon Jan 4 15:18:53 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -20,6 +20,7 @@ CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
21CONFIG_ARCH_SUSPEND_POSSIBLE=y 21CONFIG_ARCH_SUSPEND_POSSIBLE=y
22CONFIG_ARCH_HIBERNATION_POSSIBLE=y 22CONFIG_ARCH_HIBERNATION_POSSIBLE=y
23CONFIG_SYS_SUPPORTS_HUGETLBFS=y
23CONFIG_SYS_SUPPORTS_NUMA=y 24CONFIG_SYS_SUPPORTS_NUMA=y
24CONFIG_SYS_SUPPORTS_CMT=y 25CONFIG_SYS_SUPPORTS_CMT=y
25CONFIG_SYS_SUPPORTS_TMU=y 26CONFIG_SYS_SUPPORTS_TMU=y
@@ -31,6 +32,7 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
31CONFIG_ARCH_NO_VIRT_TO_BUS=y 32CONFIG_ARCH_NO_VIRT_TO_BUS=y
32CONFIG_ARCH_HAS_DEFAULT_IDLE=y 33CONFIG_ARCH_HAS_DEFAULT_IDLE=y
33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 34CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
35CONFIG_DMA_NONCOHERENT=y
34CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 36CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
35CONFIG_CONSTRUCTORS=y 37CONFIG_CONSTRUCTORS=y
36 38
@@ -63,6 +65,7 @@ CONFIG_BSD_PROCESS_ACCT=y
63# 65#
64CONFIG_TREE_RCU=y 66CONFIG_TREE_RCU=y
65# CONFIG_TREE_PREEMPT_RCU is not set 67# CONFIG_TREE_PREEMPT_RCU is not set
68# CONFIG_TINY_RCU is not set
66# CONFIG_RCU_TRACE is not set 69# CONFIG_RCU_TRACE is not set
67CONFIG_RCU_FANOUT=32 70CONFIG_RCU_FANOUT=32
68# CONFIG_RCU_FANOUT_EXACT is not set 71# CONFIG_RCU_FANOUT_EXACT is not set
@@ -102,6 +105,7 @@ CONFIG_EVENTFD=y
102CONFIG_SHMEM=y 105CONFIG_SHMEM=y
103CONFIG_AIO=y 106CONFIG_AIO=y
104CONFIG_HAVE_PERF_EVENTS=y 107CONFIG_HAVE_PERF_EVENTS=y
108CONFIG_PERF_USE_VMALLOC=y
105 109
106# 110#
107# Kernel Performance Events And Counters 111# Kernel Performance Events And Counters
@@ -122,6 +126,7 @@ CONFIG_HAVE_IOREMAP_PROT=y
122CONFIG_HAVE_KPROBES=y 126CONFIG_HAVE_KPROBES=y
123CONFIG_HAVE_KRETPROBES=y 127CONFIG_HAVE_KRETPROBES=y
124CONFIG_HAVE_ARCH_TRACEHOOK=y 128CONFIG_HAVE_ARCH_TRACEHOOK=y
129CONFIG_HAVE_DMA_ATTRS=y
125CONFIG_HAVE_CLK=y 130CONFIG_HAVE_CLK=y
126CONFIG_HAVE_DMA_API_DEBUG=y 131CONFIG_HAVE_DMA_API_DEBUG=y
127 132
@@ -148,14 +153,41 @@ CONFIG_LBDAF=y
148# IO Schedulers 153# IO Schedulers
149# 154#
150CONFIG_IOSCHED_NOOP=y 155CONFIG_IOSCHED_NOOP=y
151# CONFIG_IOSCHED_AS is not set
152# CONFIG_IOSCHED_DEADLINE is not set 156# CONFIG_IOSCHED_DEADLINE is not set
153# CONFIG_IOSCHED_CFQ is not set 157# CONFIG_IOSCHED_CFQ is not set
154# CONFIG_DEFAULT_AS is not set
155# CONFIG_DEFAULT_DEADLINE is not set 158# CONFIG_DEFAULT_DEADLINE is not set
156# CONFIG_DEFAULT_CFQ is not set 159# CONFIG_DEFAULT_CFQ is not set
157CONFIG_DEFAULT_NOOP=y 160CONFIG_DEFAULT_NOOP=y
158CONFIG_DEFAULT_IOSCHED="noop" 161CONFIG_DEFAULT_IOSCHED="noop"
162# CONFIG_INLINE_SPIN_TRYLOCK is not set
163# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
164# CONFIG_INLINE_SPIN_LOCK is not set
165# CONFIG_INLINE_SPIN_LOCK_BH is not set
166# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
167# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
168# CONFIG_INLINE_SPIN_UNLOCK is not set
169# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
170# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
171# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
172# CONFIG_INLINE_READ_TRYLOCK is not set
173# CONFIG_INLINE_READ_LOCK is not set
174# CONFIG_INLINE_READ_LOCK_BH is not set
175# CONFIG_INLINE_READ_LOCK_IRQ is not set
176# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
177# CONFIG_INLINE_READ_UNLOCK is not set
178# CONFIG_INLINE_READ_UNLOCK_BH is not set
179# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
180# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
181# CONFIG_INLINE_WRITE_TRYLOCK is not set
182# CONFIG_INLINE_WRITE_LOCK is not set
183# CONFIG_INLINE_WRITE_LOCK_BH is not set
184# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
185# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
186# CONFIG_INLINE_WRITE_UNLOCK is not set
187# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
188# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
189# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
190# CONFIG_MUTEX_SPIN_ON_OWNER is not set
159CONFIG_FREEZER=y 191CONFIG_FREEZER=y
160 192
161# 193#
@@ -247,8 +279,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
247# CONFIG_PHYS_ADDR_T_64BIT is not set 279# CONFIG_PHYS_ADDR_T_64BIT is not set
248CONFIG_ZONE_DMA_FLAG=0 280CONFIG_ZONE_DMA_FLAG=0
249CONFIG_NR_QUICK=2 281CONFIG_NR_QUICK=2
250CONFIG_HAVE_MLOCK=y
251CONFIG_HAVE_MLOCKED_PAGE_BIT=y
252# CONFIG_KSM is not set 282# CONFIG_KSM is not set
253CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 283CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
254 284
@@ -280,7 +310,6 @@ CONFIG_CPU_HAS_DSP=y
280# 310#
281CONFIG_SH_TIMER_TMU=y 311CONFIG_SH_TIMER_TMU=y
282# CONFIG_SH_TIMER_CMT is not set 312# CONFIG_SH_TIMER_CMT is not set
283CONFIG_SH_PCLK_FREQ=33333333
284CONFIG_SH_CLK_CPG=y 313CONFIG_SH_CLK_CPG=y
285CONFIG_TICK_ONESHOT=y 314CONFIG_TICK_ONESHOT=y
286# CONFIG_NO_HZ is not set 315# CONFIG_NO_HZ is not set
@@ -435,14 +464,17 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
435# CONFIG_BT is not set 464# CONFIG_BT is not set
436# CONFIG_AF_RXRPC is not set 465# CONFIG_AF_RXRPC is not set
437CONFIG_WIRELESS=y 466CONFIG_WIRELESS=y
467CONFIG_WIRELESS_EXT=y
468CONFIG_WEXT_CORE=y
469CONFIG_WEXT_PROC=y
470CONFIG_WEXT_SPY=y
438CONFIG_CFG80211=y 471CONFIG_CFG80211=y
439# CONFIG_NL80211_TESTMODE is not set 472# CONFIG_NL80211_TESTMODE is not set
440# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set 473# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set
441# CONFIG_CFG80211_REG_DEBUG is not set 474# CONFIG_CFG80211_REG_DEBUG is not set
442CONFIG_CFG80211_DEFAULT_PS=y 475CONFIG_CFG80211_DEFAULT_PS=y
443CONFIG_CFG80211_DEFAULT_PS_VALUE=1
444# CONFIG_WIRELESS_OLD_REGULATORY is not set 476# CONFIG_WIRELESS_OLD_REGULATORY is not set
445CONFIG_WIRELESS_EXT=y 477CONFIG_CFG80211_WEXT=y
446CONFIG_WIRELESS_EXT_SYSFS=y 478CONFIG_WIRELESS_EXT_SYSFS=y
447CONFIG_LIB80211=m 479CONFIG_LIB80211=m
448# CONFIG_LIB80211_DEBUG is not set 480# CONFIG_LIB80211_DEBUG is not set
@@ -559,6 +591,10 @@ CONFIG_MTD_RAM=y
559CONFIG_BLK_DEV=y 591CONFIG_BLK_DEV=y
560# CONFIG_BLK_DEV_COW_COMMON is not set 592# CONFIG_BLK_DEV_COW_COMMON is not set
561# CONFIG_BLK_DEV_LOOP is not set 593# CONFIG_BLK_DEV_LOOP is not set
594
595#
596# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
597#
562# CONFIG_BLK_DEV_NBD is not set 598# CONFIG_BLK_DEV_NBD is not set
563# CONFIG_BLK_DEV_UB is not set 599# CONFIG_BLK_DEV_UB is not set
564CONFIG_BLK_DEV_RAM=y 600CONFIG_BLK_DEV_RAM=y
@@ -576,6 +612,7 @@ CONFIG_MISC_DEVICES=y
576# EEPROM support 612# EEPROM support
577# 613#
578# CONFIG_EEPROM_93CX6 is not set 614# CONFIG_EEPROM_93CX6 is not set
615# CONFIG_IWMC3200TOP is not set
579CONFIG_HAVE_IDE=y 616CONFIG_HAVE_IDE=y
580# CONFIG_IDE is not set 617# CONFIG_IDE is not set
581 618
@@ -653,30 +690,29 @@ CONFIG_MII=y
653# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set 690# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
654# CONFIG_B44 is not set 691# CONFIG_B44 is not set
655# CONFIG_KS8842 is not set 692# CONFIG_KS8842 is not set
693# CONFIG_KS8851_MLL is not set
656# CONFIG_NETDEV_1000 is not set 694# CONFIG_NETDEV_1000 is not set
657# CONFIG_NETDEV_10000 is not set 695# CONFIG_NETDEV_10000 is not set
658CONFIG_WLAN=y 696CONFIG_WLAN=y
659# CONFIG_WLAN_PRE80211 is not set
660CONFIG_WLAN_80211=y
661CONFIG_LIBERTAS=m
662# CONFIG_LIBERTAS_USB is not set
663CONFIG_LIBERTAS_SDIO=m
664CONFIG_LIBERTAS_DEBUG=y
665# CONFIG_LIBERTAS_THINFIRM is not set 697# CONFIG_LIBERTAS_THINFIRM is not set
666# CONFIG_AT76C50X_USB is not set 698# CONFIG_AT76C50X_USB is not set
667# CONFIG_USB_ZD1201 is not set 699# CONFIG_USB_ZD1201 is not set
668# CONFIG_USB_NET_RNDIS_WLAN is not set 700# CONFIG_USB_NET_RNDIS_WLAN is not set
669# CONFIG_RTL8187 is not set 701# CONFIG_RTL8187 is not set
670# CONFIG_MAC80211_HWSIM is not set 702# CONFIG_MAC80211_HWSIM is not set
671# CONFIG_P54_COMMON is not set
672# CONFIG_ATH_COMMON is not set 703# CONFIG_ATH_COMMON is not set
673# CONFIG_HOSTAP is not set
674# CONFIG_B43 is not set 704# CONFIG_B43 is not set
675# CONFIG_B43LEGACY is not set 705# CONFIG_B43LEGACY is not set
676# CONFIG_ZD1211RW is not set 706# CONFIG_HOSTAP is not set
707# CONFIG_IWM is not set
708CONFIG_LIBERTAS=m
709# CONFIG_LIBERTAS_USB is not set
710CONFIG_LIBERTAS_SDIO=m
711CONFIG_LIBERTAS_DEBUG=y
712# CONFIG_P54_COMMON is not set
677# CONFIG_RT2X00 is not set 713# CONFIG_RT2X00 is not set
678# CONFIG_WL12XX is not set 714# CONFIG_WL12XX is not set
679# CONFIG_IWM is not set 715# CONFIG_ZD1211RW is not set
680 716
681# 717#
682# Enable WiMAX (Networking options) to see the WiMAX drivers 718# Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -718,6 +754,7 @@ CONFIG_USB_NET_CDCETHER=y
718CONFIG_INPUT=y 754CONFIG_INPUT=y
719# CONFIG_INPUT_FF_MEMLESS is not set 755# CONFIG_INPUT_FF_MEMLESS is not set
720# CONFIG_INPUT_POLLDEV is not set 756# CONFIG_INPUT_POLLDEV is not set
757# CONFIG_INPUT_SPARSEKMAP is not set
721 758
722# 759#
723# Userland interfaces 760# Userland interfaces
@@ -810,6 +847,7 @@ CONFIG_SSB_POSSIBLE=y
810# 847#
811# CONFIG_MFD_CORE is not set 848# CONFIG_MFD_CORE is not set
812# CONFIG_MFD_SM501 is not set 849# CONFIG_MFD_SM501 is not set
850# CONFIG_MFD_SH_MOBILE_SDHI is not set
813# CONFIG_HTC_PASIC3 is not set 851# CONFIG_HTC_PASIC3 is not set
814# CONFIG_MFD_TMIO is not set 852# CONFIG_MFD_TMIO is not set
815# CONFIG_REGULATOR is not set 853# CONFIG_REGULATOR is not set
@@ -951,6 +989,7 @@ CONFIG_MMC_BLOCK_BOUNCE=y
951# CONFIG_MMC_SDHCI is not set 989# CONFIG_MMC_SDHCI is not set
952# CONFIG_MMC_AT91 is not set 990# CONFIG_MMC_AT91 is not set
953# CONFIG_MMC_ATMELMCI is not set 991# CONFIG_MMC_ATMELMCI is not set
992# CONFIG_MMC_TMIO is not set
954# CONFIG_MEMSTICK is not set 993# CONFIG_MEMSTICK is not set
955# CONFIG_NEW_LEDS is not set 994# CONFIG_NEW_LEDS is not set
956# CONFIG_ACCESSIBILITY is not set 995# CONFIG_ACCESSIBILITY is not set
@@ -1133,7 +1172,7 @@ CONFIG_FRAME_WARN=1024
1133# CONFIG_DEBUG_KERNEL is not set 1172# CONFIG_DEBUG_KERNEL is not set
1134# CONFIG_SLUB_DEBUG_ON is not set 1173# CONFIG_SLUB_DEBUG_ON is not set
1135# CONFIG_SLUB_STATS is not set 1174# CONFIG_SLUB_STATS is not set
1136# CONFIG_DEBUG_BUGVERBOSE is not set 1175CONFIG_DEBUG_BUGVERBOSE=y
1137# CONFIG_DEBUG_MEMORY_INIT is not set 1176# CONFIG_DEBUG_MEMORY_INIT is not set
1138# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1177# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1139# CONFIG_LATENCYTOP is not set 1178# CONFIG_LATENCYTOP is not set
@@ -1150,7 +1189,6 @@ CONFIG_TRACING_SUPPORT=y
1150# CONFIG_SAMPLES is not set 1189# CONFIG_SAMPLES is not set
1151CONFIG_HAVE_ARCH_KGDB=y 1190CONFIG_HAVE_ARCH_KGDB=y
1152# CONFIG_SH_STANDARD_BIOS is not set 1191# CONFIG_SH_STANDARD_BIOS is not set
1153# CONFIG_EARLY_SCIF_CONSOLE is not set
1154# CONFIG_DWARF_UNWINDER is not set 1192# CONFIG_DWARF_UNWINDER is not set
1155 1193
1156# 1194#
@@ -1159,7 +1197,11 @@ CONFIG_HAVE_ARCH_KGDB=y
1159# CONFIG_KEYS is not set 1197# CONFIG_KEYS is not set
1160# CONFIG_SECURITY is not set 1198# CONFIG_SECURITY is not set
1161# CONFIG_SECURITYFS is not set 1199# CONFIG_SECURITYFS is not set
1162# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1200# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1201# CONFIG_DEFAULT_SECURITY_SMACK is not set
1202# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1203CONFIG_DEFAULT_SECURITY_DAC=y
1204CONFIG_DEFAULT_SECURITY=""
1163CONFIG_CRYPTO=y 1205CONFIG_CRYPTO=y
1164 1206
1165# 1207#
diff --git a/arch/sh/configs/urquell_defconfig b/arch/sh/configs/urquell_defconfig
index 9f8aee5bc559..23bda1916f4d 100644
--- a/arch/sh/configs/urquell_defconfig
+++ b/arch/sh/configs/urquell_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31 3# Linux kernel version: 2.6.33-rc2
4# Thu Sep 24 19:46:13 2009 4# Mon Jan 4 15:27:53 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -20,6 +20,7 @@ CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set 21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
22CONFIG_ARCH_HIBERNATION_POSSIBLE=y 22CONFIG_ARCH_HIBERNATION_POSSIBLE=y
23CONFIG_SYS_SUPPORTS_HUGETLBFS=y
23CONFIG_SYS_SUPPORTS_SMP=y 24CONFIG_SYS_SUPPORTS_SMP=y
24CONFIG_SYS_SUPPORTS_NUMA=y 25CONFIG_SYS_SUPPORTS_NUMA=y
25CONFIG_SYS_SUPPORTS_PCI=y 26CONFIG_SYS_SUPPORTS_PCI=y
@@ -32,6 +33,8 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
32CONFIG_ARCH_NO_VIRT_TO_BUS=y 33CONFIG_ARCH_NO_VIRT_TO_BUS=y
33CONFIG_ARCH_HAS_DEFAULT_IDLE=y 34CONFIG_ARCH_HAS_DEFAULT_IDLE=y
34CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 35CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
36CONFIG_DMA_COHERENT=y
37# CONFIG_DMA_NONCOHERENT is not set
35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 38CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
36CONFIG_CONSTRUCTORS=y 39CONFIG_CONSTRUCTORS=y
37 40
@@ -66,6 +69,7 @@ CONFIG_AUDIT_TREE=y
66# 69#
67CONFIG_TREE_RCU=y 70CONFIG_TREE_RCU=y
68# CONFIG_TREE_PREEMPT_RCU is not set 71# CONFIG_TREE_PREEMPT_RCU is not set
72# CONFIG_TINY_RCU is not set
69# CONFIG_RCU_TRACE is not set 73# CONFIG_RCU_TRACE is not set
70CONFIG_RCU_FANOUT=32 74CONFIG_RCU_FANOUT=32
71# CONFIG_RCU_FANOUT_EXACT is not set 75# CONFIG_RCU_FANOUT_EXACT is not set
@@ -120,12 +124,14 @@ CONFIG_EVENTFD=y
120CONFIG_SHMEM=y 124CONFIG_SHMEM=y
121CONFIG_AIO=y 125CONFIG_AIO=y
122CONFIG_HAVE_PERF_EVENTS=y 126CONFIG_HAVE_PERF_EVENTS=y
127CONFIG_PERF_USE_VMALLOC=y
123 128
124# 129#
125# Kernel Performance Events And Counters 130# Kernel Performance Events And Counters
126# 131#
127CONFIG_PERF_EVENTS=y 132CONFIG_PERF_EVENTS=y
128# CONFIG_PERF_COUNTERS is not set 133# CONFIG_PERF_COUNTERS is not set
134# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
129CONFIG_VM_EVENT_COUNTERS=y 135CONFIG_VM_EVENT_COUNTERS=y
130CONFIG_PCI_QUIRKS=y 136CONFIG_PCI_QUIRKS=y
131CONFIG_COMPAT_BRK=y 137CONFIG_COMPAT_BRK=y
@@ -140,6 +146,7 @@ CONFIG_HAVE_IOREMAP_PROT=y
140CONFIG_HAVE_KPROBES=y 146CONFIG_HAVE_KPROBES=y
141CONFIG_HAVE_KRETPROBES=y 147CONFIG_HAVE_KRETPROBES=y
142CONFIG_HAVE_ARCH_TRACEHOOK=y 148CONFIG_HAVE_ARCH_TRACEHOOK=y
149CONFIG_HAVE_DMA_ATTRS=y
143CONFIG_HAVE_CLK=y 150CONFIG_HAVE_CLK=y
144CONFIG_HAVE_DMA_API_DEBUG=y 151CONFIG_HAVE_DMA_API_DEBUG=y
145 152
@@ -162,19 +169,48 @@ CONFIG_BLOCK=y
162CONFIG_LBDAF=y 169CONFIG_LBDAF=y
163# CONFIG_BLK_DEV_BSG is not set 170# CONFIG_BLK_DEV_BSG is not set
164# CONFIG_BLK_DEV_INTEGRITY is not set 171# CONFIG_BLK_DEV_INTEGRITY is not set
172# CONFIG_BLK_CGROUP is not set
165 173
166# 174#
167# IO Schedulers 175# IO Schedulers
168# 176#
169CONFIG_IOSCHED_NOOP=y 177CONFIG_IOSCHED_NOOP=y
170CONFIG_IOSCHED_AS=y
171CONFIG_IOSCHED_DEADLINE=y 178CONFIG_IOSCHED_DEADLINE=y
172CONFIG_IOSCHED_CFQ=y 179CONFIG_IOSCHED_CFQ=y
173CONFIG_DEFAULT_AS=y 180# CONFIG_CFQ_GROUP_IOSCHED is not set
174# CONFIG_DEFAULT_DEADLINE is not set 181# CONFIG_DEFAULT_DEADLINE is not set
175# CONFIG_DEFAULT_CFQ is not set 182CONFIG_DEFAULT_CFQ=y
176# CONFIG_DEFAULT_NOOP is not set 183# CONFIG_DEFAULT_NOOP is not set
177CONFIG_DEFAULT_IOSCHED="anticipatory" 184CONFIG_DEFAULT_IOSCHED="cfq"
185# CONFIG_INLINE_SPIN_TRYLOCK is not set
186# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
187# CONFIG_INLINE_SPIN_LOCK is not set
188# CONFIG_INLINE_SPIN_LOCK_BH is not set
189# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
190# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
191CONFIG_INLINE_SPIN_UNLOCK=y
192# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
193CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
194# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
195# CONFIG_INLINE_READ_TRYLOCK is not set
196# CONFIG_INLINE_READ_LOCK is not set
197# CONFIG_INLINE_READ_LOCK_BH is not set
198# CONFIG_INLINE_READ_LOCK_IRQ is not set
199# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
200CONFIG_INLINE_READ_UNLOCK=y
201# CONFIG_INLINE_READ_UNLOCK_BH is not set
202CONFIG_INLINE_READ_UNLOCK_IRQ=y
203# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
204# CONFIG_INLINE_WRITE_TRYLOCK is not set
205# CONFIG_INLINE_WRITE_LOCK is not set
206# CONFIG_INLINE_WRITE_LOCK_BH is not set
207# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
208# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
209CONFIG_INLINE_WRITE_UNLOCK=y
210# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
211CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
212# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
213# CONFIG_MUTEX_SPIN_ON_OWNER is not set
178CONFIG_FREEZER=y 214CONFIG_FREEZER=y
179 215
180# 216#
@@ -229,6 +265,7 @@ CONFIG_FORCE_MAX_ZONEORDER=11
229CONFIG_MEMORY_START=0x08000000 265CONFIG_MEMORY_START=0x08000000
230CONFIG_MEMORY_SIZE=0x08000000 266CONFIG_MEMORY_SIZE=0x08000000
231CONFIG_29BIT=y 267CONFIG_29BIT=y
268# CONFIG_PMB_ENABLE is not set
232# CONFIG_X2TLB is not set 269# CONFIG_X2TLB is not set
233CONFIG_VSYSCALL=y 270CONFIG_VSYSCALL=y
234# CONFIG_NUMA is not set 271# CONFIG_NUMA is not set
@@ -263,8 +300,6 @@ CONFIG_MIGRATION=y
263# CONFIG_PHYS_ADDR_T_64BIT is not set 300# CONFIG_PHYS_ADDR_T_64BIT is not set
264CONFIG_ZONE_DMA_FLAG=0 301CONFIG_ZONE_DMA_FLAG=0
265CONFIG_NR_QUICK=2 302CONFIG_NR_QUICK=2
266CONFIG_HAVE_MLOCK=y
267CONFIG_HAVE_MLOCKED_PAGE_BIT=y
268# CONFIG_KSM is not set 303# CONFIG_KSM is not set
269CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 304CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
270 305
@@ -356,7 +391,6 @@ CONFIG_ENTRY_OFFSET=0x00001000
356# Bus options 391# Bus options
357# 392#
358CONFIG_PCI=y 393CONFIG_PCI=y
359# CONFIG_SH_PCIDMA_NONCOHERENT is not set
360CONFIG_PCIEPORTBUS=y 394CONFIG_PCIEPORTBUS=y
361CONFIG_PCIEAER=y 395CONFIG_PCIEAER=y
362# CONFIG_PCIE_ECRC is not set 396# CONFIG_PCIE_ECRC is not set
@@ -469,10 +503,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
469# CONFIG_AF_RXRPC is not set 503# CONFIG_AF_RXRPC is not set
470CONFIG_WIRELESS=y 504CONFIG_WIRELESS=y
471# CONFIG_CFG80211 is not set 505# CONFIG_CFG80211 is not set
472CONFIG_CFG80211_DEFAULT_PS_VALUE=0
473# CONFIG_WIRELESS_OLD_REGULATORY is not set
474CONFIG_WIRELESS_EXT=y
475CONFIG_WIRELESS_EXT_SYSFS=y
476# CONFIG_LIB80211 is not set 506# CONFIG_LIB80211 is not set
477 507
478# 508#
@@ -588,6 +618,10 @@ CONFIG_BLK_DEV=y
588# CONFIG_BLK_DEV_UMEM is not set 618# CONFIG_BLK_DEV_UMEM is not set
589# CONFIG_BLK_DEV_COW_COMMON is not set 619# CONFIG_BLK_DEV_COW_COMMON is not set
590# CONFIG_BLK_DEV_LOOP is not set 620# CONFIG_BLK_DEV_LOOP is not set
621
622#
623# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
624#
591# CONFIG_BLK_DEV_NBD is not set 625# CONFIG_BLK_DEV_NBD is not set
592# CONFIG_BLK_DEV_SX8 is not set 626# CONFIG_BLK_DEV_SX8 is not set
593# CONFIG_BLK_DEV_UB is not set 627# CONFIG_BLK_DEV_UB is not set
@@ -688,15 +722,16 @@ CONFIG_ATA_SFF=y
688# CONFIG_PATA_NS87415 is not set 722# CONFIG_PATA_NS87415 is not set
689# CONFIG_PATA_OPTI is not set 723# CONFIG_PATA_OPTI is not set
690# CONFIG_PATA_OPTIDMA is not set 724# CONFIG_PATA_OPTIDMA is not set
725# CONFIG_PATA_PDC2027X is not set
691# CONFIG_PATA_PDC_OLD is not set 726# CONFIG_PATA_PDC_OLD is not set
692# CONFIG_PATA_RADISYS is not set 727# CONFIG_PATA_RADISYS is not set
693# CONFIG_PATA_RDC is not set 728# CONFIG_PATA_RDC is not set
694# CONFIG_PATA_RZ1000 is not set 729# CONFIG_PATA_RZ1000 is not set
695# CONFIG_PATA_SC1200 is not set 730# CONFIG_PATA_SC1200 is not set
696# CONFIG_PATA_SERVERWORKS is not set 731# CONFIG_PATA_SERVERWORKS is not set
697# CONFIG_PATA_PDC2027X is not set
698# CONFIG_PATA_SIL680 is not set 732# CONFIG_PATA_SIL680 is not set
699# CONFIG_PATA_SIS is not set 733# CONFIG_PATA_SIS is not set
734# CONFIG_PATA_TOSHIBA is not set
700# CONFIG_PATA_VIA is not set 735# CONFIG_PATA_VIA is not set
701# CONFIG_PATA_WINBOND is not set 736# CONFIG_PATA_WINBOND is not set
702# CONFIG_PATA_PLATFORM is not set 737# CONFIG_PATA_PLATFORM is not set
@@ -787,6 +822,7 @@ CONFIG_8139CP=y
787# CONFIG_SUNDANCE is not set 822# CONFIG_SUNDANCE is not set
788# CONFIG_TLAN is not set 823# CONFIG_TLAN is not set
789# CONFIG_KS8842 is not set 824# CONFIG_KS8842 is not set
825# CONFIG_KS8851_MLL is not set
790# CONFIG_VIA_RHINE is not set 826# CONFIG_VIA_RHINE is not set
791# CONFIG_SC92031 is not set 827# CONFIG_SC92031 is not set
792# CONFIG_ATL2 is not set 828# CONFIG_ATL2 is not set
@@ -818,8 +854,10 @@ CONFIG_SKY2_DEBUG=y
818# CONFIG_NETDEV_10000 is not set 854# CONFIG_NETDEV_10000 is not set
819# CONFIG_TR is not set 855# CONFIG_TR is not set
820CONFIG_WLAN=y 856CONFIG_WLAN=y
821# CONFIG_WLAN_PRE80211 is not set 857# CONFIG_ATMEL is not set
822# CONFIG_WLAN_80211 is not set 858# CONFIG_PRISM54 is not set
859# CONFIG_USB_ZD1201 is not set
860# CONFIG_HOSTAP is not set
823 861
824# 862#
825# Enable WiMAX (Networking options) to see the WiMAX drivers 863# Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -842,6 +880,7 @@ CONFIG_WLAN=y
842# CONFIG_NETCONSOLE is not set 880# CONFIG_NETCONSOLE is not set
843# CONFIG_NETPOLL is not set 881# CONFIG_NETPOLL is not set
844# CONFIG_NET_POLL_CONTROLLER is not set 882# CONFIG_NET_POLL_CONTROLLER is not set
883# CONFIG_VMXNET3 is not set
845# CONFIG_ISDN is not set 884# CONFIG_ISDN is not set
846# CONFIG_PHONE is not set 885# CONFIG_PHONE is not set
847 886
@@ -851,6 +890,7 @@ CONFIG_WLAN=y
851CONFIG_INPUT=y 890CONFIG_INPUT=y
852CONFIG_INPUT_FF_MEMLESS=m 891CONFIG_INPUT_FF_MEMLESS=m
853# CONFIG_INPUT_POLLDEV is not set 892# CONFIG_INPUT_POLLDEV is not set
893# CONFIG_INPUT_SPARSEKMAP is not set
854 894
855# 895#
856# Userland interfaces 896# Userland interfaces
@@ -976,11 +1016,6 @@ CONFIG_I2C_ALGOPCA=y
976# CONFIG_I2C_TINY_USB is not set 1016# CONFIG_I2C_TINY_USB is not set
977 1017
978# 1018#
979# Graphics adapter I2C/DDC channel drivers
980#
981# CONFIG_I2C_VOODOO3 is not set
982
983#
984# Other I2C/SMBus bus drivers 1019# Other I2C/SMBus bus drivers
985# 1020#
986CONFIG_I2C_PCA_PLATFORM=y 1021CONFIG_I2C_PCA_PLATFORM=y
@@ -989,7 +1024,6 @@ CONFIG_I2C_PCA_PLATFORM=y
989# 1024#
990# Miscellaneous I2C Chip support 1025# Miscellaneous I2C Chip support
991# 1026#
992# CONFIG_DS1682 is not set
993# CONFIG_SENSORS_TSL2550 is not set 1027# CONFIG_SENSORS_TSL2550 is not set
994# CONFIG_I2C_DEBUG_CORE is not set 1028# CONFIG_I2C_DEBUG_CORE is not set
995# CONFIG_I2C_DEBUG_ALGO is not set 1029# CONFIG_I2C_DEBUG_ALGO is not set
@@ -1020,6 +1054,7 @@ CONFIG_GPIOLIB=y
1020# 1054#
1021# PCI GPIO expanders: 1055# PCI GPIO expanders:
1022# 1056#
1057# CONFIG_GPIO_CS5535 is not set
1023# CONFIG_GPIO_BT8XX is not set 1058# CONFIG_GPIO_BT8XX is not set
1024# CONFIG_GPIO_LANGWELL is not set 1059# CONFIG_GPIO_LANGWELL is not set
1025 1060
@@ -1062,6 +1097,7 @@ CONFIG_HWMON=y
1062# CONFIG_SENSORS_GL520SM is not set 1097# CONFIG_SENSORS_GL520SM is not set
1063# CONFIG_SENSORS_IT87 is not set 1098# CONFIG_SENSORS_IT87 is not set
1064# CONFIG_SENSORS_LM63 is not set 1099# CONFIG_SENSORS_LM63 is not set
1100# CONFIG_SENSORS_LM73 is not set
1065# CONFIG_SENSORS_LM75 is not set 1101# CONFIG_SENSORS_LM75 is not set
1066# CONFIG_SENSORS_LM77 is not set 1102# CONFIG_SENSORS_LM77 is not set
1067# CONFIG_SENSORS_LM78 is not set 1103# CONFIG_SENSORS_LM78 is not set
@@ -1101,6 +1137,7 @@ CONFIG_HWMON=y
1101# CONFIG_SENSORS_W83L786NG is not set 1137# CONFIG_SENSORS_W83L786NG is not set
1102# CONFIG_SENSORS_W83627HF is not set 1138# CONFIG_SENSORS_W83627HF is not set
1103# CONFIG_SENSORS_W83627EHF is not set 1139# CONFIG_SENSORS_W83627EHF is not set
1140# CONFIG_SENSORS_LIS3_I2C is not set
1104# CONFIG_THERMAL is not set 1141# CONFIG_THERMAL is not set
1105# CONFIG_WATCHDOG is not set 1142# CONFIG_WATCHDOG is not set
1106CONFIG_SSB_POSSIBLE=y 1143CONFIG_SSB_POSSIBLE=y
@@ -1116,16 +1153,19 @@ CONFIG_SSB_POSSIBLE=y
1116# CONFIG_MFD_CORE is not set 1153# CONFIG_MFD_CORE is not set
1117CONFIG_MFD_SM501=y 1154CONFIG_MFD_SM501=y
1118# CONFIG_MFD_SM501_GPIO is not set 1155# CONFIG_MFD_SM501_GPIO is not set
1156# CONFIG_MFD_SH_MOBILE_SDHI is not set
1119# CONFIG_HTC_PASIC3 is not set 1157# CONFIG_HTC_PASIC3 is not set
1120# CONFIG_TPS65010 is not set 1158# CONFIG_TPS65010 is not set
1121# CONFIG_TWL4030_CORE is not set 1159# CONFIG_TWL4030_CORE is not set
1122# CONFIG_MFD_TMIO is not set 1160# CONFIG_MFD_TMIO is not set
1123# CONFIG_PMIC_DA903X is not set 1161# CONFIG_PMIC_DA903X is not set
1162# CONFIG_PMIC_ADP5520 is not set
1124# CONFIG_MFD_WM8400 is not set 1163# CONFIG_MFD_WM8400 is not set
1125# CONFIG_MFD_WM831X is not set 1164# CONFIG_MFD_WM831X is not set
1126# CONFIG_MFD_WM8350_I2C is not set 1165# CONFIG_MFD_WM8350_I2C is not set
1127# CONFIG_MFD_PCF50633 is not set 1166# CONFIG_MFD_PCF50633 is not set
1128# CONFIG_AB3100_CORE is not set 1167# CONFIG_AB3100_CORE is not set
1168# CONFIG_MFD_88PM8607 is not set
1129# CONFIG_REGULATOR is not set 1169# CONFIG_REGULATOR is not set
1130CONFIG_MEDIA_SUPPORT=y 1170CONFIG_MEDIA_SUPPORT=y
1131 1171
@@ -1139,6 +1179,8 @@ CONFIG_MEDIA_SUPPORT=y
1139# 1179#
1140# Multimedia drivers 1180# Multimedia drivers
1141# 1181#
1182CONFIG_IR_CORE=y
1183CONFIG_VIDEO_IR=y
1142# CONFIG_DAB is not set 1184# CONFIG_DAB is not set
1143 1185
1144# 1186#
@@ -1417,6 +1459,7 @@ CONFIG_RTC_INTF_DEV=y
1417# CONFIG_RTC_DRV_PCF8563 is not set 1459# CONFIG_RTC_DRV_PCF8563 is not set
1418# CONFIG_RTC_DRV_PCF8583 is not set 1460# CONFIG_RTC_DRV_PCF8583 is not set
1419# CONFIG_RTC_DRV_M41T80 is not set 1461# CONFIG_RTC_DRV_M41T80 is not set
1462# CONFIG_RTC_DRV_BQ32K is not set
1420# CONFIG_RTC_DRV_S35390A is not set 1463# CONFIG_RTC_DRV_S35390A is not set
1421# CONFIG_RTC_DRV_FM3130 is not set 1464# CONFIG_RTC_DRV_FM3130 is not set
1422# CONFIG_RTC_DRV_RX8581 is not set 1465# CONFIG_RTC_DRV_RX8581 is not set
@@ -1437,7 +1480,9 @@ CONFIG_RTC_INTF_DEV=y
1437# CONFIG_RTC_DRV_M48T86 is not set 1480# CONFIG_RTC_DRV_M48T86 is not set
1438# CONFIG_RTC_DRV_M48T35 is not set 1481# CONFIG_RTC_DRV_M48T35 is not set
1439# CONFIG_RTC_DRV_M48T59 is not set 1482# CONFIG_RTC_DRV_M48T59 is not set
1483# CONFIG_RTC_DRV_MSM6242 is not set
1440# CONFIG_RTC_DRV_BQ4802 is not set 1484# CONFIG_RTC_DRV_BQ4802 is not set
1485# CONFIG_RTC_DRV_RP5C01 is not set
1441# CONFIG_RTC_DRV_V3020 is not set 1486# CONFIG_RTC_DRV_V3020 is not set
1442 1487
1443# 1488#
@@ -1466,7 +1511,6 @@ CONFIG_EXT3_FS_XATTR=y
1466# CONFIG_EXT3_FS_POSIX_ACL is not set 1511# CONFIG_EXT3_FS_POSIX_ACL is not set
1467# CONFIG_EXT3_FS_SECURITY is not set 1512# CONFIG_EXT3_FS_SECURITY is not set
1468CONFIG_EXT4_FS=y 1513CONFIG_EXT4_FS=y
1469# CONFIG_EXT4DEV_COMPAT is not set
1470CONFIG_EXT4_FS_XATTR=y 1514CONFIG_EXT4_FS_XATTR=y
1471# CONFIG_EXT4_FS_POSIX_ACL is not set 1515# CONFIG_EXT4_FS_POSIX_ACL is not set
1472# CONFIG_EXT4_FS_SECURITY is not set 1516# CONFIG_EXT4_FS_SECURITY is not set
@@ -1687,9 +1731,6 @@ CONFIG_TRACING_SUPPORT=y
1687CONFIG_HAVE_ARCH_KGDB=y 1731CONFIG_HAVE_ARCH_KGDB=y
1688# CONFIG_KGDB is not set 1732# CONFIG_KGDB is not set
1689# CONFIG_SH_STANDARD_BIOS is not set 1733# CONFIG_SH_STANDARD_BIOS is not set
1690CONFIG_EARLY_SCIF_CONSOLE=y
1691CONFIG_EARLY_SCIF_CONSOLE_PORT=0xffeb0000
1692CONFIG_EARLY_PRINTK=y
1693# CONFIG_STACK_DEBUG is not set 1734# CONFIG_STACK_DEBUG is not set
1694# CONFIG_DEBUG_STACK_USAGE is not set 1735# CONFIG_DEBUG_STACK_USAGE is not set
1695# CONFIG_4KSTACKS is not set 1736# CONFIG_4KSTACKS is not set
@@ -1703,7 +1744,11 @@ CONFIG_EARLY_PRINTK=y
1703# CONFIG_KEYS is not set 1744# CONFIG_KEYS is not set
1704# CONFIG_SECURITY is not set 1745# CONFIG_SECURITY is not set
1705# CONFIG_SECURITYFS is not set 1746# CONFIG_SECURITYFS is not set
1706# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1747# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1748# CONFIG_DEFAULT_SECURITY_SMACK is not set
1749# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1750CONFIG_DEFAULT_SECURITY_DAC=y
1751CONFIG_DEFAULT_SECURITY=""
1707CONFIG_CRYPTO=y 1752CONFIG_CRYPTO=y
1708 1753
1709# 1754#
diff --git a/arch/sh/drivers/dma/dma-api.c b/arch/sh/drivers/dma/dma-api.c
index 727126e907e3..4a277224a871 100644
--- a/arch/sh/drivers/dma/dma-api.c
+++ b/arch/sh/drivers/dma/dma-api.c
@@ -17,6 +17,7 @@
17#include <linux/platform_device.h> 17#include <linux/platform_device.h>
18#include <linux/mm.h> 18#include <linux/mm.h>
19#include <linux/sched.h> 19#include <linux/sched.h>
20#include <linux/slab.h>
20#include <asm/dma.h> 21#include <asm/dma.h>
21 22
22DEFINE_SPINLOCK(dma_spin_lock); 23DEFINE_SPINLOCK(dma_spin_lock);
diff --git a/arch/sh/drivers/dma/dma-pvr2.c b/arch/sh/drivers/dma/dma-pvr2.c
index 391cbe1c2956..3cee58e7f1e5 100644
--- a/arch/sh/drivers/dma/dma-pvr2.c
+++ b/arch/sh/drivers/dma/dma-pvr2.c
@@ -40,10 +40,10 @@ static irqreturn_t pvr2_dma_interrupt(int irq, void *dev_id)
40 40
41static int pvr2_request_dma(struct dma_channel *chan) 41static int pvr2_request_dma(struct dma_channel *chan)
42{ 42{
43 if (ctrl_inl(PVR2_DMA_MODE) != 0) 43 if (__raw_readl(PVR2_DMA_MODE) != 0)
44 return -EBUSY; 44 return -EBUSY;
45 45
46 ctrl_outl(0, PVR2_DMA_LMMODE0); 46 __raw_writel(0, PVR2_DMA_LMMODE0);
47 47
48 return 0; 48 return 0;
49} 49}
@@ -60,9 +60,9 @@ static int pvr2_xfer_dma(struct dma_channel *chan)
60 60
61 xfer_complete = 0; 61 xfer_complete = 0;
62 62
63 ctrl_outl(chan->dar, PVR2_DMA_ADDR); 63 __raw_writel(chan->dar, PVR2_DMA_ADDR);
64 ctrl_outl(chan->count, PVR2_DMA_COUNT); 64 __raw_writel(chan->count, PVR2_DMA_COUNT);
65 ctrl_outl(chan->mode & DMA_MODE_MASK, PVR2_DMA_MODE); 65 __raw_writel(chan->mode & DMA_MODE_MASK, PVR2_DMA_MODE);
66 66
67 return 0; 67 return 0;
68} 68}
diff --git a/arch/sh/drivers/dma/dma-sh.c b/arch/sh/drivers/dma/dma-sh.c
index 37fb5b8bbc3f..827208781ed5 100644
--- a/arch/sh/drivers/dma/dma-sh.c
+++ b/arch/sh/drivers/dma/dma-sh.c
@@ -52,11 +52,14 @@ static inline unsigned int get_dmte_irq(unsigned int chan)
52 * 52 *
53 * iterations to complete the transfer. 53 * iterations to complete the transfer.
54 */ 54 */
55static unsigned int ts_shift[] = TS_SHIFT;
55static inline unsigned int calc_xmit_shift(struct dma_channel *chan) 56static inline unsigned int calc_xmit_shift(struct dma_channel *chan)
56{ 57{
57 u32 chcr = ctrl_inl(dma_base_addr[chan->chan] + CHCR); 58 u32 chcr = __raw_readl(dma_base_addr[chan->chan] + CHCR);
59 int cnt = ((chcr & CHCR_TS_LOW_MASK) >> CHCR_TS_LOW_SHIFT) |
60 ((chcr & CHCR_TS_HIGH_MASK) >> CHCR_TS_HIGH_SHIFT);
58 61
59 return ts_shift[(chcr & CHCR_TS_MASK)>>CHCR_TS_SHIFT]; 62 return ts_shift[cnt];
60} 63}
61 64
62/* 65/*
@@ -70,13 +73,13 @@ static irqreturn_t dma_tei(int irq, void *dev_id)
70 struct dma_channel *chan = dev_id; 73 struct dma_channel *chan = dev_id;
71 u32 chcr; 74 u32 chcr;
72 75
73 chcr = ctrl_inl(dma_base_addr[chan->chan] + CHCR); 76 chcr = __raw_readl(dma_base_addr[chan->chan] + CHCR);
74 77
75 if (!(chcr & CHCR_TE)) 78 if (!(chcr & CHCR_TE))
76 return IRQ_NONE; 79 return IRQ_NONE;
77 80
78 chcr &= ~(CHCR_IE | CHCR_DE); 81 chcr &= ~(CHCR_IE | CHCR_DE);
79 ctrl_outl(chcr, (dma_base_addr[chan->chan] + CHCR)); 82 __raw_writel(chcr, (dma_base_addr[chan->chan] + CHCR));
80 83
81 wake_up(&chan->wait_queue); 84 wake_up(&chan->wait_queue);
82 85
@@ -115,7 +118,7 @@ sh_dmac_configure_channel(struct dma_channel *chan, unsigned long chcr)
115 chan->flags &= ~DMA_TEI_CAPABLE; 118 chan->flags &= ~DMA_TEI_CAPABLE;
116 } 119 }
117 120
118 ctrl_outl(chcr, (dma_base_addr[chan->chan] + CHCR)); 121 __raw_writel(chcr, (dma_base_addr[chan->chan] + CHCR));
119 122
120 chan->flags |= DMA_CONFIGURED; 123 chan->flags |= DMA_CONFIGURED;
121 return 0; 124 return 0;
@@ -126,13 +129,13 @@ static void sh_dmac_enable_dma(struct dma_channel *chan)
126 int irq; 129 int irq;
127 u32 chcr; 130 u32 chcr;
128 131
129 chcr = ctrl_inl(dma_base_addr[chan->chan] + CHCR); 132 chcr = __raw_readl(dma_base_addr[chan->chan] + CHCR);
130 chcr |= CHCR_DE; 133 chcr |= CHCR_DE;
131 134
132 if (chan->flags & DMA_TEI_CAPABLE) 135 if (chan->flags & DMA_TEI_CAPABLE)
133 chcr |= CHCR_IE; 136 chcr |= CHCR_IE;
134 137
135 ctrl_outl(chcr, (dma_base_addr[chan->chan] + CHCR)); 138 __raw_writel(chcr, (dma_base_addr[chan->chan] + CHCR));
136 139
137 if (chan->flags & DMA_TEI_CAPABLE) { 140 if (chan->flags & DMA_TEI_CAPABLE) {
138 irq = get_dmte_irq(chan->chan); 141 irq = get_dmte_irq(chan->chan);
@@ -150,9 +153,9 @@ static void sh_dmac_disable_dma(struct dma_channel *chan)
150 disable_irq(irq); 153 disable_irq(irq);
151 } 154 }
152 155
153 chcr = ctrl_inl(dma_base_addr[chan->chan] + CHCR); 156 chcr = __raw_readl(dma_base_addr[chan->chan] + CHCR);
154 chcr &= ~(CHCR_DE | CHCR_TE | CHCR_IE); 157 chcr &= ~(CHCR_DE | CHCR_TE | CHCR_IE);
155 ctrl_outl(chcr, (dma_base_addr[chan->chan] + CHCR)); 158 __raw_writel(chcr, (dma_base_addr[chan->chan] + CHCR));
156} 159}
157 160
158static int sh_dmac_xfer_dma(struct dma_channel *chan) 161static int sh_dmac_xfer_dma(struct dma_channel *chan)
@@ -183,12 +186,12 @@ static int sh_dmac_xfer_dma(struct dma_channel *chan)
183 */ 186 */
184 if (chan->sar || (mach_is_dreamcast() && 187 if (chan->sar || (mach_is_dreamcast() &&
185 chan->chan == PVR2_CASCADE_CHAN)) 188 chan->chan == PVR2_CASCADE_CHAN))
186 ctrl_outl(chan->sar, (dma_base_addr[chan->chan]+SAR)); 189 __raw_writel(chan->sar, (dma_base_addr[chan->chan]+SAR));
187 if (chan->dar || (mach_is_dreamcast() && 190 if (chan->dar || (mach_is_dreamcast() &&
188 chan->chan == PVR2_CASCADE_CHAN)) 191 chan->chan == PVR2_CASCADE_CHAN))
189 ctrl_outl(chan->dar, (dma_base_addr[chan->chan] + DAR)); 192 __raw_writel(chan->dar, (dma_base_addr[chan->chan] + DAR));
190 193
191 ctrl_outl(chan->count >> calc_xmit_shift(chan), 194 __raw_writel(chan->count >> calc_xmit_shift(chan),
192 (dma_base_addr[chan->chan] + TCR)); 195 (dma_base_addr[chan->chan] + TCR));
193 196
194 sh_dmac_enable_dma(chan); 197 sh_dmac_enable_dma(chan);
@@ -198,10 +201,10 @@ static int sh_dmac_xfer_dma(struct dma_channel *chan)
198 201
199static int sh_dmac_get_dma_residue(struct dma_channel *chan) 202static int sh_dmac_get_dma_residue(struct dma_channel *chan)
200{ 203{
201 if (!(ctrl_inl(dma_base_addr[chan->chan] + CHCR) & CHCR_DE)) 204 if (!(__raw_readl(dma_base_addr[chan->chan] + CHCR) & CHCR_DE))
202 return 0; 205 return 0;
203 206
204 return ctrl_inl(dma_base_addr[chan->chan] + TCR) 207 return __raw_readl(dma_base_addr[chan->chan] + TCR)
205 << calc_xmit_shift(chan); 208 << calc_xmit_shift(chan);
206} 209}
207 210
diff --git a/arch/sh/drivers/dma/dma-sysfs.c b/arch/sh/drivers/dma/dma-sysfs.c
index 347ee11351ec..1ee631d3725e 100644
--- a/arch/sh/drivers/dma/dma-sysfs.c
+++ b/arch/sh/drivers/dma/dma-sysfs.c
@@ -13,7 +13,6 @@
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/sysdev.h> 14#include <linux/sysdev.h>
15#include <linux/platform_device.h> 15#include <linux/platform_device.h>
16#include <linux/module.h>
17#include <linux/err.h> 16#include <linux/err.h>
18#include <linux/string.h> 17#include <linux/string.h>
19#include <asm/dma.h> 18#include <asm/dma.h>
@@ -21,7 +20,6 @@
21static struct sysdev_class dma_sysclass = { 20static struct sysdev_class dma_sysclass = {
22 .name = "dma", 21 .name = "dma",
23}; 22};
24EXPORT_SYMBOL(dma_sysclass);
25 23
26static ssize_t dma_show_devices(struct sys_device *dev, 24static ssize_t dma_show_devices(struct sys_device *dev,
27 struct sysdev_attribute *attr, char *buf) 25 struct sysdev_attribute *attr, char *buf)
diff --git a/arch/sh/drivers/dma/dmabrg.c b/arch/sh/drivers/dma/dmabrg.c
index 5e22689c2fcf..6ab9c4a15439 100644
--- a/arch/sh/drivers/dma/dmabrg.c
+++ b/arch/sh/drivers/dma/dmabrg.c
@@ -8,6 +8,7 @@
8 8
9#include <linux/interrupt.h> 9#include <linux/interrupt.h>
10#include <linux/kernel.h> 10#include <linux/kernel.h>
11#include <linux/slab.h>
11#include <asm/dma.h> 12#include <asm/dma.h>
12#include <asm/dmabrg.h> 13#include <asm/dmabrg.h>
13#include <asm/io.h> 14#include <asm/io.h>
@@ -86,8 +87,8 @@ static irqreturn_t dmabrg_irq(int irq, void *data)
86 unsigned long dcr; 87 unsigned long dcr;
87 unsigned int i; 88 unsigned int i;
88 89
89 dcr = ctrl_inl(DMABRGCR); 90 dcr = __raw_readl(DMABRGCR);
90 ctrl_outl(dcr & ~0x00ff0003, DMABRGCR); /* ack all */ 91 __raw_writel(dcr & ~0x00ff0003, DMABRGCR); /* ack all */
91 dcr &= dcr >> 8; /* ignore masked */ 92 dcr &= dcr >> 8; /* ignore masked */
92 93
93 /* USB stuff, get it out of the way first */ 94 /* USB stuff, get it out of the way first */
@@ -109,17 +110,17 @@ static irqreturn_t dmabrg_irq(int irq, void *data)
109static void dmabrg_disable_irq(unsigned int dmairq) 110static void dmabrg_disable_irq(unsigned int dmairq)
110{ 111{
111 unsigned long dcr; 112 unsigned long dcr;
112 dcr = ctrl_inl(DMABRGCR); 113 dcr = __raw_readl(DMABRGCR);
113 dcr &= ~(1 << ((dmairq > 1) ? dmairq + 22 : dmairq + 8)); 114 dcr &= ~(1 << ((dmairq > 1) ? dmairq + 22 : dmairq + 8));
114 ctrl_outl(dcr, DMABRGCR); 115 __raw_writel(dcr, DMABRGCR);
115} 116}
116 117
117static void dmabrg_enable_irq(unsigned int dmairq) 118static void dmabrg_enable_irq(unsigned int dmairq)
118{ 119{
119 unsigned long dcr; 120 unsigned long dcr;
120 dcr = ctrl_inl(DMABRGCR); 121 dcr = __raw_readl(DMABRGCR);
121 dcr |= (1 << ((dmairq > 1) ? dmairq + 22 : dmairq + 8)); 122 dcr |= (1 << ((dmairq > 1) ? dmairq + 22 : dmairq + 8));
122 ctrl_outl(dcr, DMABRGCR); 123 __raw_writel(dcr, DMABRGCR);
123} 124}
124 125
125int dmabrg_request_irq(unsigned int dmairq, void(*handler)(void*), 126int dmabrg_request_irq(unsigned int dmairq, void(*handler)(void*),
@@ -165,13 +166,13 @@ static int __init dmabrg_init(void)
165 printk(KERN_INFO "DMABRG: DMAC ch0 not reserved!\n"); 166 printk(KERN_INFO "DMABRG: DMAC ch0 not reserved!\n");
166#endif 167#endif
167 168
168 ctrl_outl(0, DMABRGCR); 169 __raw_writel(0, DMABRGCR);
169 ctrl_outl(0, DMACHCR0); 170 __raw_writel(0, DMACHCR0);
170 ctrl_outl(0x94000000, DMARSRA); /* enable DMABRG in DMAC 0 */ 171 __raw_writel(0x94000000, DMARSRA); /* enable DMABRG in DMAC 0 */
171 172
172 /* enable DMABRG mode, enable the DMAC */ 173 /* enable DMABRG mode, enable the DMAC */
173 or = ctrl_inl(DMAOR); 174 or = __raw_readl(DMAOR);
174 ctrl_outl(or | DMAOR_BRG | DMAOR_DMEN, DMAOR); 175 __raw_writel(or | DMAOR_BRG | DMAOR_DMEN, DMAOR);
175 176
176 ret = request_irq(DMABRGI0, dmabrg_irq, IRQF_DISABLED, 177 ret = request_irq(DMABRGI0, dmabrg_irq, IRQF_DISABLED,
177 "DMABRG USB address error", NULL); 178 "DMABRG USB address error", NULL);
diff --git a/arch/sh/drivers/heartbeat.c b/arch/sh/drivers/heartbeat.c
index a9339a6174fc..7efc9c354fc7 100644
--- a/arch/sh/drivers/heartbeat.c
+++ b/arch/sh/drivers/heartbeat.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Generic heartbeat driver for regular LED banks 2 * Generic heartbeat driver for regular LED banks
3 * 3 *
4 * Copyright (C) 2007 Paul Mundt 4 * Copyright (C) 2007 - 2010 Paul Mundt
5 * 5 *
6 * Most SH reference boards include a number of individual LEDs that can 6 * Most SH reference boards include a number of individual LEDs that can
7 * be independently controlled (either via a pre-defined hardware 7 * be independently controlled (either via a pre-defined hardware
@@ -24,10 +24,11 @@
24#include <linux/sched.h> 24#include <linux/sched.h>
25#include <linux/timer.h> 25#include <linux/timer.h>
26#include <linux/io.h> 26#include <linux/io.h>
27#include <linux/slab.h>
27#include <asm/heartbeat.h> 28#include <asm/heartbeat.h>
28 29
29#define DRV_NAME "heartbeat" 30#define DRV_NAME "heartbeat"
30#define DRV_VERSION "0.1.1" 31#define DRV_VERSION "0.1.2"
31 32
32static unsigned char default_bit_pos[] = { 0, 1, 2, 3, 4, 5, 6, 7 }; 33static unsigned char default_bit_pos[] = { 0, 1, 2, 3, 4, 5, 6, 7 };
33 34
@@ -98,7 +99,7 @@ static int heartbeat_drv_probe(struct platform_device *pdev)
98 return -ENOMEM; 99 return -ENOMEM;
99 } 100 }
100 101
101 hd->base = ioremap_nocache(res->start, res->end - res->start + 1); 102 hd->base = ioremap_nocache(res->start, resource_size(res));
102 if (unlikely(!hd->base)) { 103 if (unlikely(!hd->base)) {
103 dev_err(&pdev->dev, "ioremap failed\n"); 104 dev_err(&pdev->dev, "ioremap failed\n");
104 105
@@ -117,8 +118,20 @@ static int heartbeat_drv_probe(struct platform_device *pdev)
117 for (i = 0; i < hd->nr_bits; i++) 118 for (i = 0; i < hd->nr_bits; i++)
118 hd->mask |= (1 << hd->bit_pos[i]); 119 hd->mask |= (1 << hd->bit_pos[i]);
119 120
120 if (!hd->regsize) 121 if (!hd->regsize) {
121 hd->regsize = 8; /* default access size */ 122 switch (res->flags & IORESOURCE_MEM_TYPE_MASK) {
123 case IORESOURCE_MEM_32BIT:
124 hd->regsize = 32;
125 break;
126 case IORESOURCE_MEM_16BIT:
127 hd->regsize = 16;
128 break;
129 case IORESOURCE_MEM_8BIT:
130 default:
131 hd->regsize = 8;
132 break;
133 }
134 }
122 135
123 setup_timer(&hd->timer, heartbeat_timer, (unsigned long)hd); 136 setup_timer(&hd->timer, heartbeat_timer, (unsigned long)hd);
124 platform_set_drvdata(pdev, hd); 137 platform_set_drvdata(pdev, hd);
diff --git a/arch/sh/drivers/pci/Kconfig b/arch/sh/drivers/pci/Kconfig
deleted file mode 100644
index e8db585a6638..000000000000
--- a/arch/sh/drivers/pci/Kconfig
+++ /dev/null
@@ -1,19 +0,0 @@
1config PCI
2 bool "PCI support"
3 depends on SYS_SUPPORTS_PCI
4 help
5 Find out whether you have a PCI motherboard. PCI is the name of a
6 bus system, i.e. the way the CPU talks to the other stuff inside
7 your box. If you have PCI, say Y, otherwise N.
8
9config SH_PCIDMA_NONCOHERENT
10 bool "Cache and PCI noncoherent"
11 depends on PCI
12 default y
13 help
14 Enable this option if your platform does not have a CPU cache which
15 remains coherent with PCI DMA. It is safest to say 'Y', although you
16 will see better performance if you can say 'N', because the PCI DMA
17 code will not have to flush the CPU's caches. If you have a PCI host
18 bridge integrated with your SH CPU, refer carefully to the chip specs
19 to see if you can say 'N' here. Otherwise, leave it as 'Y'.
diff --git a/arch/sh/drivers/pci/Makefile b/arch/sh/drivers/pci/Makefile
index 08af1f459756..4a59e6890876 100644
--- a/arch/sh/drivers/pci/Makefile
+++ b/arch/sh/drivers/pci/Makefile
@@ -1,14 +1,14 @@
1# 1#
2# Makefile for the PCI specific kernel interface routines under Linux. 2# Makefile for the PCI specific kernel interface routines under Linux.
3# 3#
4obj-y += pci.o 4obj-y += common.o pci.o
5 5
6obj-$(CONFIG_CPU_SUBTYPE_SH7751) += pci-sh7751.o ops-sh4.o 6obj-$(CONFIG_CPU_SUBTYPE_SH7751) += pci-sh7751.o ops-sh4.o
7obj-$(CONFIG_CPU_SUBTYPE_SH7751R) += pci-sh7751.o ops-sh4.o 7obj-$(CONFIG_CPU_SUBTYPE_SH7751R) += pci-sh7751.o ops-sh4.o
8obj-$(CONFIG_CPU_SUBTYPE_SH7763) += pci-sh7780.o ops-sh4.o 8obj-$(CONFIG_CPU_SUBTYPE_SH7763) += pci-sh7780.o ops-sh4.o
9obj-$(CONFIG_CPU_SUBTYPE_SH7780) += pci-sh7780.o ops-sh4.o 9obj-$(CONFIG_CPU_SUBTYPE_SH7780) += pci-sh7780.o ops-sh4.o
10obj-$(CONFIG_CPU_SUBTYPE_SH7785) += pci-sh7780.o ops-sh4.o 10obj-$(CONFIG_CPU_SUBTYPE_SH7785) += pci-sh7780.o ops-sh4.o
11obj-$(CONFIG_CPU_SUBTYPE_SH7786) += ops-sh7786.o 11obj-$(CONFIG_CPU_SUBTYPE_SH7786) += pcie-sh7786.o ops-sh7786.o
12obj-$(CONFIG_CPU_SH5) += pci-sh5.o ops-sh5.o 12obj-$(CONFIG_CPU_SH5) += pci-sh5.o ops-sh5.o
13 13
14obj-$(CONFIG_SH_DREAMCAST) += ops-dreamcast.o fixups-dreamcast.o \ 14obj-$(CONFIG_SH_DREAMCAST) += ops-dreamcast.o fixups-dreamcast.o \
@@ -25,4 +25,3 @@ obj-$(CONFIG_SH_TITAN) += fixups-titan.o
25obj-$(CONFIG_SH_LANDISK) += fixups-landisk.o 25obj-$(CONFIG_SH_LANDISK) += fixups-landisk.o
26obj-$(CONFIG_SH_LBOX_RE2) += fixups-rts7751r2d.o 26obj-$(CONFIG_SH_LBOX_RE2) += fixups-rts7751r2d.o
27obj-$(CONFIG_SH_CAYMAN) += fixups-cayman.o 27obj-$(CONFIG_SH_CAYMAN) += fixups-cayman.o
28obj-$(CONFIG_SH_URQUELL) += pcie-sh7786.o
diff --git a/arch/sh/drivers/pci/common.c b/arch/sh/drivers/pci/common.c
new file mode 100644
index 000000000000..dbf138199871
--- /dev/null
+++ b/arch/sh/drivers/pci/common.c
@@ -0,0 +1,162 @@
1#include <linux/pci.h>
2#include <linux/interrupt.h>
3#include <linux/timer.h>
4#include <linux/kernel.h>
5
6/*
7 * These functions are used early on before PCI scanning is done
8 * and all of the pci_dev and pci_bus structures have been created.
9 */
10static struct pci_dev *fake_pci_dev(struct pci_channel *hose,
11 int top_bus, int busnr, int devfn)
12{
13 static struct pci_dev dev;
14 static struct pci_bus bus;
15
16 dev.bus = &bus;
17 dev.sysdata = hose;
18 dev.devfn = devfn;
19 bus.number = busnr;
20 bus.sysdata = hose;
21 bus.ops = hose->pci_ops;
22
23 if(busnr != top_bus)
24 /* Fake a parent bus structure. */
25 bus.parent = &bus;
26 else
27 bus.parent = NULL;
28
29 return &dev;
30}
31
32#define EARLY_PCI_OP(rw, size, type) \
33int __init early_##rw##_config_##size(struct pci_channel *hose, \
34 int top_bus, int bus, int devfn, int offset, type value) \
35{ \
36 return pci_##rw##_config_##size( \
37 fake_pci_dev(hose, top_bus, bus, devfn), \
38 offset, value); \
39}
40
41EARLY_PCI_OP(read, byte, u8 *)
42EARLY_PCI_OP(read, word, u16 *)
43EARLY_PCI_OP(read, dword, u32 *)
44EARLY_PCI_OP(write, byte, u8)
45EARLY_PCI_OP(write, word, u16)
46EARLY_PCI_OP(write, dword, u32)
47
48int __init pci_is_66mhz_capable(struct pci_channel *hose,
49 int top_bus, int current_bus)
50{
51 u32 pci_devfn;
52 unsigned short vid;
53 int cap66 = -1;
54 u16 stat;
55
56 printk(KERN_INFO "PCI: Checking 66MHz capabilities...\n");
57
58 for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) {
59 if (PCI_FUNC(pci_devfn))
60 continue;
61 if (early_read_config_word(hose, top_bus, current_bus,
62 pci_devfn, PCI_VENDOR_ID, &vid) !=
63 PCIBIOS_SUCCESSFUL)
64 continue;
65 if (vid == 0xffff)
66 continue;
67
68 /* check 66MHz capability */
69 if (cap66 < 0)
70 cap66 = 1;
71 if (cap66) {
72 early_read_config_word(hose, top_bus, current_bus,
73 pci_devfn, PCI_STATUS, &stat);
74 if (!(stat & PCI_STATUS_66MHZ)) {
75 printk(KERN_DEBUG
76 "PCI: %02x:%02x not 66MHz capable.\n",
77 current_bus, pci_devfn);
78 cap66 = 0;
79 break;
80 }
81 }
82 }
83
84 return cap66 > 0;
85}
86
87static void pcibios_enable_err(unsigned long __data)
88{
89 struct pci_channel *hose = (struct pci_channel *)__data;
90
91 del_timer(&hose->err_timer);
92 printk(KERN_DEBUG "PCI: re-enabling error IRQ.\n");
93 enable_irq(hose->err_irq);
94}
95
96static void pcibios_enable_serr(unsigned long __data)
97{
98 struct pci_channel *hose = (struct pci_channel *)__data;
99
100 del_timer(&hose->serr_timer);
101 printk(KERN_DEBUG "PCI: re-enabling system error IRQ.\n");
102 enable_irq(hose->serr_irq);
103}
104
105void pcibios_enable_timers(struct pci_channel *hose)
106{
107 if (hose->err_irq) {
108 init_timer(&hose->err_timer);
109 hose->err_timer.data = (unsigned long)hose;
110 hose->err_timer.function = pcibios_enable_err;
111 }
112
113 if (hose->serr_irq) {
114 init_timer(&hose->serr_timer);
115 hose->serr_timer.data = (unsigned long)hose;
116 hose->serr_timer.function = pcibios_enable_serr;
117 }
118}
119
120/*
121 * A simple handler for the regular PCI status errors, called from IRQ
122 * context.
123 */
124unsigned int pcibios_handle_status_errors(unsigned long addr,
125 unsigned int status,
126 struct pci_channel *hose)
127{
128 unsigned int cmd = 0;
129
130 if (status & PCI_STATUS_REC_MASTER_ABORT) {
131 printk(KERN_DEBUG "PCI: master abort, pc=0x%08lx\n", addr);
132 cmd |= PCI_STATUS_REC_MASTER_ABORT;
133 }
134
135 if (status & PCI_STATUS_REC_TARGET_ABORT) {
136 printk(KERN_DEBUG "PCI: target abort: ");
137 pcibios_report_status(PCI_STATUS_REC_TARGET_ABORT |
138 PCI_STATUS_SIG_TARGET_ABORT |
139 PCI_STATUS_REC_MASTER_ABORT, 1);
140 printk("\n");
141
142 cmd |= PCI_STATUS_REC_TARGET_ABORT;
143 }
144
145 if (status & (PCI_STATUS_PARITY | PCI_STATUS_DETECTED_PARITY)) {
146 printk(KERN_DEBUG "PCI: parity error detected: ");
147 pcibios_report_status(PCI_STATUS_PARITY |
148 PCI_STATUS_DETECTED_PARITY, 1);
149 printk("\n");
150
151 cmd |= PCI_STATUS_PARITY | PCI_STATUS_DETECTED_PARITY;
152
153 /* Now back off of the IRQ for awhile */
154 if (hose->err_irq) {
155 disable_irq_nosync(hose->err_irq);
156 hose->err_timer.expires = jiffies + HZ;
157 add_timer(&hose->err_timer);
158 }
159 }
160
161 return cmd;
162}
diff --git a/arch/sh/drivers/pci/fixups-dreamcast.c b/arch/sh/drivers/pci/fixups-dreamcast.c
index ed7f489936f1..942ef4f155f5 100644
--- a/arch/sh/drivers/pci/fixups-dreamcast.c
+++ b/arch/sh/drivers/pci/fixups-dreamcast.c
@@ -39,7 +39,7 @@ static void __init gapspci_fixup_resources(struct pci_dev *dev)
39 /* 39 /*
40 * We also assume that dev->devfn == 0 40 * We also assume that dev->devfn == 0
41 */ 41 */
42 dev->resource[1].start = p->io_resource->start + 0x100; 42 dev->resource[1].start = p->resources[0].start + 0x100;
43 dev->resource[1].end = dev->resource[1].start + 0x200 - 1; 43 dev->resource[1].end = dev->resource[1].start + 0x200 - 1;
44 44
45 /* 45 /*
diff --git a/arch/sh/drivers/pci/fixups-r7780rp.c b/arch/sh/drivers/pci/fixups-r7780rp.c
index 15ca65cb667e..08b2d8658a00 100644
--- a/arch/sh/drivers/pci/fixups-r7780rp.c
+++ b/arch/sh/drivers/pci/fixups-r7780rp.c
@@ -22,15 +22,3 @@ int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
22{ 22{
23 return irq_tab[slot]; 23 return irq_tab[slot];
24} 24}
25
26int pci_fixup_pcic(struct pci_channel *chan)
27{
28 pci_write_reg(chan, 0x000043ff, SH4_PCIINTM);
29 pci_write_reg(chan, 0x00000000, SH7780_PCIIBAR);
30 pci_write_reg(chan, 0x08000000, SH7780_PCICSCR0);
31 pci_write_reg(chan, 0x0000001b, SH7780_PCICSAR0);
32 pci_write_reg(chan, 0xfd000000, SH7780_PCICSCR1);
33 pci_write_reg(chan, 0x0000000f, SH7780_PCICSAR1);
34
35 return 0;
36}
diff --git a/arch/sh/drivers/pci/fixups-rts7751r2d.c b/arch/sh/drivers/pci/fixups-rts7751r2d.c
index 052b354236dc..e248516118a9 100644
--- a/arch/sh/drivers/pci/fixups-rts7751r2d.c
+++ b/arch/sh/drivers/pci/fixups-rts7751r2d.c
@@ -15,7 +15,7 @@
15#include <mach/lboxre2.h> 15#include <mach/lboxre2.h>
16#include <mach/r2d.h> 16#include <mach/r2d.h>
17#include "pci-sh4.h" 17#include "pci-sh4.h"
18#include <asm/machtypes.h> 18#include <generated/machtypes.h>
19 19
20#define PCIMCR_MRSET_OFF 0xBFFFFFFF 20#define PCIMCR_MRSET_OFF 0xBFFFFFFF
21#define PCIMCR_RFSH_OFF 0xFFFFFFFB 21#define PCIMCR_RFSH_OFF 0xFFFFFFFB
@@ -43,7 +43,7 @@ int pci_fixup_pcic(struct pci_channel *chan)
43{ 43{
44 unsigned long bcr1, mcr; 44 unsigned long bcr1, mcr;
45 45
46 bcr1 = ctrl_inl(SH7751_BCR1); 46 bcr1 = __raw_readl(SH7751_BCR1);
47 bcr1 |= 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */ 47 bcr1 |= 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */
48 pci_write_reg(chan, bcr1, SH4_PCIBCR1); 48 pci_write_reg(chan, bcr1, SH4_PCIBCR1);
49 49
@@ -54,7 +54,7 @@ int pci_fixup_pcic(struct pci_channel *chan)
54 pci_write_reg(chan, 0xfb900047, SH7751_PCICONF1); 54 pci_write_reg(chan, 0xfb900047, SH7751_PCICONF1);
55 pci_write_reg(chan, 0xab000001, SH7751_PCICONF4); 55 pci_write_reg(chan, 0xab000001, SH7751_PCICONF4);
56 56
57 mcr = ctrl_inl(SH7751_MCR); 57 mcr = __raw_readl(SH7751_MCR);
58 mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF; 58 mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF;
59 pci_write_reg(chan, mcr, SH4_PCIMCR); 59 pci_write_reg(chan, mcr, SH4_PCIMCR);
60 60
diff --git a/arch/sh/drivers/pci/fixups-sdk7780.c b/arch/sh/drivers/pci/fixups-sdk7780.c
index 250b0edd7365..0930f988ac29 100644
--- a/arch/sh/drivers/pci/fixups-sdk7780.c
+++ b/arch/sh/drivers/pci/fixups-sdk7780.c
@@ -31,22 +31,3 @@ int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
31{ 31{
32 return sdk7780_irq_tab[pin-1][slot]; 32 return sdk7780_irq_tab[pin-1][slot];
33} 33}
34int pci_fixup_pcic(struct pci_channel *chan)
35{
36 /* Enable all interrupts, so we know what to fix */
37 pci_write_reg(chan, 0x0000C3FF, SH7780_PCIIMR);
38
39 /* Set up standard PCI config registers */
40 pci_write_reg(chan, 0x08000000, SH7780_PCIMBAR0); /* PCI */
41 pci_write_reg(chan, 0x08000000, SH4_PCILAR0); /* SHwy */
42 pci_write_reg(chan, 0x07F00001, SH4_PCILSR0); /* size 128M w/ MBAR */
43
44 pci_write_reg(chan, 0x00000000, SH7780_PCIMBAR1);
45 pci_write_reg(chan, 0x00000000, SH4_PCILAR1);
46 pci_write_reg(chan, 0x00000000, SH4_PCILSR1);
47
48 pci_write_reg(chan, 0xAB000801, SH7780_PCIIBAR);
49 pci_write_reg(chan, 0xA5000C01, SH4_PCICR);
50
51 return 0;
52}
diff --git a/arch/sh/drivers/pci/fixups-se7751.c b/arch/sh/drivers/pci/fixups-se7751.c
index 475fa9f0fe2c..a4c7d3a4efca 100644
--- a/arch/sh/drivers/pci/fixups-se7751.c
+++ b/arch/sh/drivers/pci/fixups-se7751.c
@@ -97,12 +97,12 @@ int pci_fixup_pcic(struct pci_channel *chan)
97 * meaning all calls go straight through... use BUG_ON to 97 * meaning all calls go straight through... use BUG_ON to
98 * catch erroneous assumption. 98 * catch erroneous assumption.
99 */ 99 */
100 BUG_ON(chan->mem_resource->start != SH7751_PCI_MEMORY_BASE); 100 BUG_ON(chan->resources[1].start != SH7751_PCI_MEMORY_BASE);
101 101
102 PCIC_WRITE(SH7751_PCIMBR, chan->mem_resource->start); 102 PCIC_WRITE(SH7751_PCIMBR, chan->resources[1].start);
103 103
104 /* Set IOBR for window containing area specified in pci.h */ 104 /* Set IOBR for window containing area specified in pci.h */
105 PCIC_WRITE(SH7751_PCIIOBR, (chan->io_resource->start & SH7751_PCIIOBR_MASK)); 105 PCIC_WRITE(SH7751_PCIIOBR, (chan->resources[0].start & SH7751_PCIIOBR_MASK));
106 106
107 /* All done, may as well say so... */ 107 /* All done, may as well say so... */
108 printk("SH7751 PCI: Finished initialization of the PCI controller\n"); 108 printk("SH7751 PCI: Finished initialization of the PCI controller\n");
diff --git a/arch/sh/drivers/pci/ops-sh4.c b/arch/sh/drivers/pci/ops-sh4.c
index 78bebebdc99c..0b81999fb88b 100644
--- a/arch/sh/drivers/pci/ops-sh4.c
+++ b/arch/sh/drivers/pci/ops-sh4.c
@@ -16,7 +16,7 @@
16 * Direct access to PCI hardware... 16 * Direct access to PCI hardware...
17 */ 17 */
18#define CONFIG_CMD(bus, devfn, where) \ 18#define CONFIG_CMD(bus, devfn, where) \
19 (P1SEG | (bus->number << 16) | (devfn << 8) | (where & ~3)) 19 (0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3))
20 20
21static DEFINE_SPINLOCK(sh4_pci_lock); 21static DEFINE_SPINLOCK(sh4_pci_lock);
22 22
@@ -102,34 +102,6 @@ struct pci_ops sh4_pci_ops = {
102 .write = sh4_pci_write, 102 .write = sh4_pci_write,
103}; 103};
104 104
105/*
106 * Not really related to pci_ops, but it's common and not worth shoving
107 * somewhere else for now..
108 */
109int __init sh4_pci_check_direct(struct pci_channel *chan)
110{
111 /*
112 * Check if configuration works.
113 */
114 unsigned int tmp = pci_read_reg(chan, SH4_PCIPAR);
115
116 pci_write_reg(chan, P1SEG, SH4_PCIPAR);
117
118 if (pci_read_reg(chan, SH4_PCIPAR) == P1SEG) {
119 pci_write_reg(chan, tmp, SH4_PCIPAR);
120 printk(KERN_INFO "PCI: Using configuration type 1\n");
121 request_region(chan->reg_base + SH4_PCIPAR, 8,
122 "PCI conf1");
123 return 0;
124 }
125
126 pci_write_reg(chan, tmp, SH4_PCIPAR);
127
128 printk(KERN_ERR "PCI: %s failed\n", __func__);
129
130 return -EINVAL;
131}
132
133int __attribute__((weak)) pci_fixup_pcic(struct pci_channel *chan) 105int __attribute__((weak)) pci_fixup_pcic(struct pci_channel *chan)
134{ 106{
135 /* Nothing to do. */ 107 /* Nothing to do. */
diff --git a/arch/sh/drivers/pci/pci-dreamcast.c b/arch/sh/drivers/pci/pci-dreamcast.c
index 210f9d4af141..633694193af8 100644
--- a/arch/sh/drivers/pci/pci-dreamcast.c
+++ b/arch/sh/drivers/pci/pci-dreamcast.c
@@ -25,25 +25,25 @@
25#include <asm/irq.h> 25#include <asm/irq.h>
26#include <mach/pci.h> 26#include <mach/pci.h>
27 27
28static struct resource gapspci_io_resource = { 28static struct resource gapspci_resources[] = {
29 .name = "GAPSPCI IO", 29 {
30 .start = GAPSPCI_BBA_CONFIG, 30 .name = "GAPSPCI IO",
31 .end = GAPSPCI_BBA_CONFIG + GAPSPCI_BBA_CONFIG_SIZE - 1, 31 .start = GAPSPCI_BBA_CONFIG,
32 .flags = IORESOURCE_IO, 32 .end = GAPSPCI_BBA_CONFIG + GAPSPCI_BBA_CONFIG_SIZE - 1,
33}; 33 .flags = IORESOURCE_IO,
34 34 }, {
35static struct resource gapspci_mem_resource = { 35 .name = "GAPSPCI mem",
36 .name = "GAPSPCI mem", 36 .start = GAPSPCI_DMA_BASE,
37 .start = GAPSPCI_DMA_BASE, 37 .end = GAPSPCI_DMA_BASE + GAPSPCI_DMA_SIZE - 1,
38 .end = GAPSPCI_DMA_BASE + GAPSPCI_DMA_SIZE - 1, 38 .flags = IORESOURCE_MEM,
39 .flags = IORESOURCE_MEM, 39 },
40}; 40};
41 41
42static struct pci_channel dreamcast_pci_controller = { 42static struct pci_channel dreamcast_pci_controller = {
43 .pci_ops = &gapspci_pci_ops, 43 .pci_ops = &gapspci_pci_ops,
44 .io_resource = &gapspci_io_resource, 44 .resources = gapspci_resources,
45 .nr_resources = ARRAY_SIZE(gapspci_resources),
45 .io_offset = 0x00000000, 46 .io_offset = 0x00000000,
46 .mem_resource = &gapspci_mem_resource,
47 .mem_offset = 0x00000000, 47 .mem_offset = 0x00000000,
48}; 48};
49 49
@@ -95,8 +95,6 @@ static int __init gapspci_init(void)
95 outl(0x00002001, GAPSPCI_BBA_CONFIG+0x10); 95 outl(0x00002001, GAPSPCI_BBA_CONFIG+0x10);
96 outl(0x01000000, GAPSPCI_BBA_CONFIG+0x14); 96 outl(0x01000000, GAPSPCI_BBA_CONFIG+0x14);
97 97
98 register_pci_controller(&dreamcast_pci_controller); 98 return register_pci_controller(&dreamcast_pci_controller);
99
100 return 0;
101} 99}
102arch_initcall(gapspci_init); 100arch_initcall(gapspci_init);
diff --git a/arch/sh/drivers/pci/pci-sh4.h b/arch/sh/drivers/pci/pci-sh4.h
index 3d5296cde622..cbf763b3015e 100644
--- a/arch/sh/drivers/pci/pci-sh4.h
+++ b/arch/sh/drivers/pci/pci-sh4.h
@@ -49,6 +49,17 @@
49 #define SH4_PCIINT_MWPD 0x00000002 /* Master Write PERR Detect */ 49 #define SH4_PCIINT_MWPD 0x00000002 /* Master Write PERR Detect */
50 #define SH4_PCIINT_MRPD 0x00000001 /* Master Read PERR Detect */ 50 #define SH4_PCIINT_MRPD 0x00000001 /* Master Read PERR Detect */
51#define SH4_PCIINTM 0x118 /* PCI Interrupt Mask */ 51#define SH4_PCIINTM 0x118 /* PCI Interrupt Mask */
52 #define SH4_PCIINTM_TTADIM BIT(14) /* Target-target abort interrupt */
53 #define SH4_PCIINTM_TMTOIM BIT(9) /* Target retry timeout */
54 #define SH4_PCIINTM_MDEIM BIT(8) /* Master function disable error */
55 #define SH4_PCIINTM_APEDIM BIT(7) /* Address parity error detection */
56 #define SH4_PCIINTM_SDIM BIT(6) /* SERR detection */
57 #define SH4_PCIINTM_DPEITWM BIT(5) /* Data parity error for target write */
58 #define SH4_PCIINTM_PEDITRM BIT(4) /* PERR detection for target read */
59 #define SH4_PCIINTM_TADIMM BIT(3) /* Target abort for master */
60 #define SH4_PCIINTM_MADIMM BIT(2) /* Master abort for master */
61 #define SH4_PCIINTM_MWPDIM BIT(1) /* Master write data parity error */
62 #define SH4_PCIINTM_MRDPEIM BIT(0) /* Master read data parity error */
52#define SH4_PCIALR 0x11C /* Error Address Register */ 63#define SH4_PCIALR 0x11C /* Error Address Register */
53#define SH4_PCICLR 0x120 /* Error Command/Data */ 64#define SH4_PCICLR 0x120 /* Error Command/Data */
54 #define SH4_PCICLR_MPIO 0x80000000 65 #define SH4_PCICLR_MPIO 0x80000000
@@ -61,7 +72,7 @@
61#define SH4_PCIAINT 0x130 /* Arbiter Interrupt Register */ 72#define SH4_PCIAINT 0x130 /* Arbiter Interrupt Register */
62 #define SH4_PCIAINT_MBKN 0x00002000 /* Master Broken Interrupt */ 73 #define SH4_PCIAINT_MBKN 0x00002000 /* Master Broken Interrupt */
63 #define SH4_PCIAINT_TBTO 0x00001000 /* Target Bus Time Out */ 74 #define SH4_PCIAINT_TBTO 0x00001000 /* Target Bus Time Out */
64 #define SH4_PCIAINT_MBTO 0x00001000 /* Master Bus Time Out */ 75 #define SH4_PCIAINT_MBTO 0x00000800 /* Master Bus Time Out */
65 #define SH4_PCIAINT_TABT 0x00000008 /* Target Abort */ 76 #define SH4_PCIAINT_TABT 0x00000008 /* Target Abort */
66 #define SH4_PCIAINT_MABT 0x00000004 /* Master Abort */ 77 #define SH4_PCIAINT_MABT 0x00000004 /* Master Abort */
67 #define SH4_PCIAINT_RDPE 0x00000002 /* Read Data Parity Error */ 78 #define SH4_PCIAINT_RDPE 0x00000002 /* Read Data Parity Error */
@@ -151,7 +162,6 @@
151 162
152/* arch/sh/kernel/drivers/pci/ops-sh4.c */ 163/* arch/sh/kernel/drivers/pci/ops-sh4.c */
153extern struct pci_ops sh4_pci_ops; 164extern struct pci_ops sh4_pci_ops;
154int sh4_pci_check_direct(struct pci_channel *chan);
155int pci_fixup_pcic(struct pci_channel *chan); 165int pci_fixup_pcic(struct pci_channel *chan);
156 166
157struct sh4_pci_address_space { 167struct sh4_pci_address_space {
@@ -167,13 +177,13 @@ struct sh4_pci_address_map {
167static inline void pci_write_reg(struct pci_channel *chan, 177static inline void pci_write_reg(struct pci_channel *chan,
168 unsigned long val, unsigned long reg) 178 unsigned long val, unsigned long reg)
169{ 179{
170 ctrl_outl(val, chan->reg_base + reg); 180 __raw_writel(val, chan->reg_base + reg);
171} 181}
172 182
173static inline unsigned long pci_read_reg(struct pci_channel *chan, 183static inline unsigned long pci_read_reg(struct pci_channel *chan,
174 unsigned long reg) 184 unsigned long reg)
175{ 185{
176 return ctrl_inl(chan->reg_base + reg); 186 return __raw_readl(chan->reg_base + reg);
177} 187}
178 188
179#endif /* __PCI_SH4_H */ 189#endif /* __PCI_SH4_H */
diff --git a/arch/sh/drivers/pci/pci-sh5.c b/arch/sh/drivers/pci/pci-sh5.c
index 873ed2b44055..0bf296c78795 100644
--- a/arch/sh/drivers/pci/pci-sh5.c
+++ b/arch/sh/drivers/pci/pci-sh5.c
@@ -89,14 +89,13 @@ static irqreturn_t pcish5_serr_irq(int irq, void *dev_id)
89 return IRQ_NONE; 89 return IRQ_NONE;
90} 90}
91 91
92static struct resource sh5_io_resource = { /* place holder */ }; 92static struct resource sh5_pci_resources[2];
93static struct resource sh5_mem_resource = { /* place holder */ };
94 93
95static struct pci_channel sh5pci_controller = { 94static struct pci_channel sh5pci_controller = {
96 .pci_ops = &sh5_pci_ops, 95 .pci_ops = &sh5_pci_ops,
97 .mem_resource = &sh5_mem_resource, 96 .resources = sh5_pci_resources,
97 .nr_resources = ARRAY_SIZE(sh5_pci_resources),
98 .mem_offset = 0x00000000, 98 .mem_offset = 0x00000000,
99 .io_resource = &sh5_io_resource,
100 .io_offset = 0x00000000, 99 .io_offset = 0x00000000,
101}; 100};
102 101
@@ -210,14 +209,12 @@ static int __init sh5pci_init(void)
210 SH5PCI_WRITE(AINTM, ~0); 209 SH5PCI_WRITE(AINTM, ~0);
211 SH5PCI_WRITE(PINTM, ~0); 210 SH5PCI_WRITE(PINTM, ~0);
212 211
213 sh5_io_resource.start = PCI_IO_AREA; 212 sh5_pci_resources[0].start = PCI_IO_AREA;
214 sh5_io_resource.end = PCI_IO_AREA + 0x10000; 213 sh5_pci_resources[0].end = PCI_IO_AREA + 0x10000;
215 214
216 sh5_mem_resource.start = memStart; 215 sh5_pci_resources[1].start = memStart;
217 sh5_mem_resource.end = memStart + memSize; 216 sh5_pci_resources[1].end = memStart + memSize;
218 217
219 register_pci_controller(&sh5pci_controller); 218 return register_pci_controller(&sh5pci_controller);
220
221 return 0;
222} 219}
223arch_initcall(sh5pci_init); 220arch_initcall(sh5pci_init);
diff --git a/arch/sh/drivers/pci/pci-sh5.h b/arch/sh/drivers/pci/pci-sh5.h
index f277628221f3..3f01decb4307 100644
--- a/arch/sh/drivers/pci/pci-sh5.h
+++ b/arch/sh/drivers/pci/pci-sh5.h
@@ -86,14 +86,14 @@ extern unsigned long pcicr_virt;
86/* #define PCISH5_VCR_REG(x) ( SH5PCI_VCR_BASE (PCISH5_VCR_##x)) */ 86/* #define PCISH5_VCR_REG(x) ( SH5PCI_VCR_BASE (PCISH5_VCR_##x)) */
87 87
88/* Write I/O functions */ 88/* Write I/O functions */
89#define SH5PCI_WRITE(reg,val) ctrl_outl((u32)(val),PCISH5_ICR_REG(reg)) 89#define SH5PCI_WRITE(reg,val) __raw_writel((u32)(val),PCISH5_ICR_REG(reg))
90#define SH5PCI_WRITE_SHORT(reg,val) ctrl_outw((u16)(val),PCISH5_ICR_REG(reg)) 90#define SH5PCI_WRITE_SHORT(reg,val) __raw_writew((u16)(val),PCISH5_ICR_REG(reg))
91#define SH5PCI_WRITE_BYTE(reg,val) ctrl_outb((u8)(val),PCISH5_ICR_REG(reg)) 91#define SH5PCI_WRITE_BYTE(reg,val) __raw_writeb((u8)(val),PCISH5_ICR_REG(reg))
92 92
93/* Read I/O functions */ 93/* Read I/O functions */
94#define SH5PCI_READ(reg) ctrl_inl(PCISH5_ICR_REG(reg)) 94#define SH5PCI_READ(reg) __raw_readl(PCISH5_ICR_REG(reg))
95#define SH5PCI_READ_SHORT(reg) ctrl_inw(PCISH5_ICR_REG(reg)) 95#define SH5PCI_READ_SHORT(reg) __raw_readw(PCISH5_ICR_REG(reg))
96#define SH5PCI_READ_BYTE(reg) ctrl_inb(PCISH5_ICR_REG(reg)) 96#define SH5PCI_READ_BYTE(reg) __raw_readb(PCISH5_ICR_REG(reg))
97 97
98/* Set PCI config bits */ 98/* Set PCI config bits */
99#define SET_CONFIG_BITS(bus,devfn,where) ((((bus) << 16) | ((devfn) << 8) | ((where) & ~3)) | 0x80000000) 99#define SET_CONFIG_BITS(bus,devfn,where) ((((bus) << 16) | ((devfn) << 8) | ((where) & ~3)) | 0x80000000)
diff --git a/arch/sh/drivers/pci/pci-sh7751.c b/arch/sh/drivers/pci/pci-sh7751.c
index 70c1999a0ec4..f98141b3b7d7 100644
--- a/arch/sh/drivers/pci/pci-sh7751.c
+++ b/arch/sh/drivers/pci/pci-sh7751.c
@@ -17,6 +17,7 @@
17#include <linux/io.h> 17#include <linux/io.h>
18#include "pci-sh4.h" 18#include "pci-sh4.h"
19#include <asm/addrspace.h> 19#include <asm/addrspace.h>
20#include <asm/sizes.h>
20 21
21static int __init __area_sdram_check(struct pci_channel *chan, 22static int __init __area_sdram_check(struct pci_channel *chan,
22 unsigned int area) 23 unsigned int area)
@@ -44,25 +45,25 @@ static int __init __area_sdram_check(struct pci_channel *chan,
44 return 1; 45 return 1;
45} 46}
46 47
47static struct resource sh7751_io_resource = { 48static struct resource sh7751_pci_resources[] = {
48 .name = "SH7751_IO", 49 {
49 .start = SH7751_PCI_IO_BASE, 50 .name = "SH7751_IO",
50 .end = SH7751_PCI_IO_BASE + SH7751_PCI_IO_SIZE - 1, 51 .start = 0x1000,
51 .flags = IORESOURCE_IO 52 .end = SZ_4M - 1,
52}; 53 .flags = IORESOURCE_IO
53 54 }, {
54static struct resource sh7751_mem_resource = { 55 .name = "SH7751_mem",
55 .name = "SH7751_mem", 56 .start = SH7751_PCI_MEMORY_BASE,
56 .start = SH7751_PCI_MEMORY_BASE, 57 .end = SH7751_PCI_MEMORY_BASE + SH7751_PCI_MEM_SIZE - 1,
57 .end = SH7751_PCI_MEMORY_BASE + SH7751_PCI_MEM_SIZE - 1, 58 .flags = IORESOURCE_MEM
58 .flags = IORESOURCE_MEM 59 },
59}; 60};
60 61
61static struct pci_channel sh7751_pci_controller = { 62static struct pci_channel sh7751_pci_controller = {
62 .pci_ops = &sh4_pci_ops, 63 .pci_ops = &sh4_pci_ops,
63 .mem_resource = &sh7751_mem_resource, 64 .resources = sh7751_pci_resources,
65 .nr_resources = ARRAY_SIZE(sh7751_pci_resources),
64 .mem_offset = 0x00000000, 66 .mem_offset = 0x00000000,
65 .io_resource = &sh7751_io_resource,
66 .io_offset = 0x00000000, 67 .io_offset = 0x00000000,
67 .io_map_base = SH7751_PCI_IO_BASE, 68 .io_map_base = SH7751_PCI_IO_BASE,
68}; 69};
@@ -79,7 +80,6 @@ static int __init sh7751_pci_init(void)
79 struct pci_channel *chan = &sh7751_pci_controller; 80 struct pci_channel *chan = &sh7751_pci_controller;
80 unsigned int id; 81 unsigned int id;
81 u32 word, reg; 82 u32 word, reg;
82 int ret;
83 83
84 printk(KERN_NOTICE "PCI: Starting intialization.\n"); 84 printk(KERN_NOTICE "PCI: Starting intialization.\n");
85 85
@@ -93,13 +93,10 @@ static int __init sh7751_pci_init(void)
93 return -ENODEV; 93 return -ENODEV;
94 } 94 }
95 95
96 if ((ret = sh4_pci_check_direct(chan)) != 0)
97 return ret;
98
99 /* Set the BCR's to enable PCI access */ 96 /* Set the BCR's to enable PCI access */
100 reg = ctrl_inl(SH7751_BCR1); 97 reg = __raw_readl(SH7751_BCR1);
101 reg |= 0x80000; 98 reg |= 0x80000;
102 ctrl_outl(reg, SH7751_BCR1); 99 __raw_writel(reg, SH7751_BCR1);
103 100
104 /* Turn the clocks back on (not done in reset)*/ 101 /* Turn the clocks back on (not done in reset)*/
105 pci_write_reg(chan, 0, SH4_PCICLKR); 102 pci_write_reg(chan, 0, SH4_PCICLKR);
@@ -132,13 +129,13 @@ static int __init sh7751_pci_init(void)
132 /* Set the local 16MB PCI memory space window to 129 /* Set the local 16MB PCI memory space window to
133 * the lowest PCI mapped address 130 * the lowest PCI mapped address
134 */ 131 */
135 word = chan->mem_resource->start & SH4_PCIMBR_MASK; 132 word = chan->resources[1].start & SH4_PCIMBR_MASK;
136 pr_debug("PCI: Setting upper bits of Memory window to 0x%x\n", word); 133 pr_debug("PCI: Setting upper bits of Memory window to 0x%x\n", word);
137 pci_write_reg(chan, word , SH4_PCIMBR); 134 pci_write_reg(chan, word , SH4_PCIMBR);
138 135
139 /* Make sure the MSB's of IO window are set to access PCI space 136 /* Make sure the MSB's of IO window are set to access PCI space
140 * correctly */ 137 * correctly */
141 word = chan->io_resource->start & SH4_PCIIOBR_MASK; 138 word = chan->resources[0].start & SH4_PCIIOBR_MASK;
142 pr_debug("PCI: Setting upper bits of IO window to 0x%x\n", word); 139 pr_debug("PCI: Setting upper bits of IO window to 0x%x\n", word);
143 pci_write_reg(chan, word, SH4_PCIIOBR); 140 pci_write_reg(chan, word, SH4_PCIIOBR);
144 141
@@ -159,13 +156,13 @@ static int __init sh7751_pci_init(void)
159 return -1; 156 return -1;
160 157
161 /* configure the wait control registers */ 158 /* configure the wait control registers */
162 word = ctrl_inl(SH7751_WCR1); 159 word = __raw_readl(SH7751_WCR1);
163 pci_write_reg(chan, word, SH4_PCIWCR1); 160 pci_write_reg(chan, word, SH4_PCIWCR1);
164 word = ctrl_inl(SH7751_WCR2); 161 word = __raw_readl(SH7751_WCR2);
165 pci_write_reg(chan, word, SH4_PCIWCR2); 162 pci_write_reg(chan, word, SH4_PCIWCR2);
166 word = ctrl_inl(SH7751_WCR3); 163 word = __raw_readl(SH7751_WCR3);
167 pci_write_reg(chan, word, SH4_PCIWCR3); 164 pci_write_reg(chan, word, SH4_PCIWCR3);
168 word = ctrl_inl(SH7751_MCR); 165 word = __raw_readl(SH7751_MCR);
169 pci_write_reg(chan, word, SH4_PCIMCR); 166 pci_write_reg(chan, word, SH4_PCIMCR);
170 167
171 /* NOTE: I'm ignoring the PCI error IRQs for now.. 168 /* NOTE: I'm ignoring the PCI error IRQs for now..
@@ -180,8 +177,6 @@ static int __init sh7751_pci_init(void)
180 word = SH4_PCICR_PREFIX | SH4_PCICR_CFIN | SH4_PCICR_ARBM; 177 word = SH4_PCICR_PREFIX | SH4_PCICR_CFIN | SH4_PCICR_ARBM;
181 pci_write_reg(chan, word, SH4_PCICR); 178 pci_write_reg(chan, word, SH4_PCICR);
182 179
183 register_pci_controller(chan); 180 return register_pci_controller(chan);
184
185 return 0;
186} 181}
187arch_initcall(sh7751_pci_init); 182arch_initcall(sh7751_pci_init);
diff --git a/arch/sh/drivers/pci/pci-sh7780.c b/arch/sh/drivers/pci/pci-sh7780.c
index 323b92d565fe..ffdcbf10b95e 100644
--- a/arch/sh/drivers/pci/pci-sh7780.c
+++ b/arch/sh/drivers/pci/pci-sh7780.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Low-Level PCI Support for the SH7780 2 * Low-Level PCI Support for the SH7780
3 * 3 *
4 * Copyright (C) 2005 - 2009 Paul Mundt 4 * Copyright (C) 2005 - 2010 Paul Mundt
5 * 5 *
6 * This file is subject to the terms and conditions of the GNU General Public 6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive 7 * License. See the file "COPYING" in the main directory of this archive
@@ -11,52 +11,240 @@
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/pci.h> 13#include <linux/pci.h>
14#include <linux/interrupt.h>
15#include <linux/timer.h>
16#include <linux/irq.h>
14#include <linux/errno.h> 17#include <linux/errno.h>
15#include <linux/delay.h> 18#include <linux/delay.h>
19#include <linux/log2.h>
16#include "pci-sh4.h" 20#include "pci-sh4.h"
21#include <asm/mmu.h>
22#include <asm/sizes.h>
17 23
18static struct resource sh7785_io_resource = { 24static struct resource sh7785_pci_resources[] = {
19 .name = "SH7785_IO", 25 {
20 .start = SH7780_PCI_IO_BASE, 26 .name = "PCI IO",
21 .end = SH7780_PCI_IO_BASE + SH7780_PCI_IO_SIZE - 1, 27 .start = 0x1000,
22 .flags = IORESOURCE_IO 28 .end = SZ_4M - 1,
23}; 29 .flags = IORESOURCE_IO,
24 30 }, {
25static struct resource sh7785_mem_resource = { 31 .name = "PCI MEM 0",
26 .name = "SH7785_mem", 32 .start = 0xfd000000,
27 .start = SH7780_PCI_MEMORY_BASE, 33 .end = 0xfd000000 + SZ_16M - 1,
28 .end = SH7780_PCI_MEMORY_BASE + SH7780_PCI_MEM_SIZE - 1, 34 .flags = IORESOURCE_MEM,
29 .flags = IORESOURCE_MEM 35 }, {
36 .name = "PCI MEM 1",
37 .start = 0x10000000,
38 .end = 0x10000000 + SZ_64M - 1,
39 .flags = IORESOURCE_MEM,
40 }, {
41 /*
42 * 32-bit only resources must be last.
43 */
44 .name = "PCI MEM 2",
45 .start = 0xc0000000,
46 .end = 0xc0000000 + SZ_512M - 1,
47 .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT,
48 },
30}; 49};
31 50
32static struct pci_channel sh7780_pci_controller = { 51static struct pci_channel sh7780_pci_controller = {
33 .pci_ops = &sh4_pci_ops, 52 .pci_ops = &sh4_pci_ops,
34 .mem_resource = &sh7785_mem_resource, 53 .resources = sh7785_pci_resources,
35 .mem_offset = 0x00000000, 54 .nr_resources = ARRAY_SIZE(sh7785_pci_resources),
36 .io_resource = &sh7785_io_resource, 55 .io_offset = 0,
37 .io_offset = 0x00000000, 56 .mem_offset = 0,
38 .io_map_base = SH7780_PCI_IO_BASE, 57 .io_map_base = 0xfe200000,
58 .serr_irq = evt2irq(0xa00),
59 .err_irq = evt2irq(0xaa0),
39}; 60};
40 61
41static struct sh4_pci_address_map sh7780_pci_map = { 62struct pci_errors {
42 .window0 = { 63 unsigned int mask;
43#if defined(CONFIG_32BIT) 64 const char *str;
44 .base = SH7780_32BIT_DDR_BASE_ADDR, 65} pci_arbiter_errors[] = {
45 .size = 0x40000000, 66 { SH4_PCIAINT_MBKN, "master broken" },
46#else 67 { SH4_PCIAINT_TBTO, "target bus time out" },
47 .base = SH7780_CS0_BASE_ADDR, 68 { SH4_PCIAINT_MBTO, "master bus time out" },
48 .size = 0x20000000, 69 { SH4_PCIAINT_TABT, "target abort" },
49#endif 70 { SH4_PCIAINT_MABT, "master abort" },
50 }, 71 { SH4_PCIAINT_RDPE, "read data parity error" },
72 { SH4_PCIAINT_WDPE, "write data parity error" },
73}, pci_interrupt_errors[] = {
74 { SH4_PCIINT_MLCK, "master lock error" },
75 { SH4_PCIINT_TABT, "target-target abort" },
76 { SH4_PCIINT_TRET, "target retry time out" },
77 { SH4_PCIINT_MFDE, "master function disable erorr" },
78 { SH4_PCIINT_PRTY, "address parity error" },
79 { SH4_PCIINT_SERR, "SERR" },
80 { SH4_PCIINT_TWDP, "data parity error for target write" },
81 { SH4_PCIINT_TRDP, "PERR detected for target read" },
82 { SH4_PCIINT_MTABT, "target abort for master" },
83 { SH4_PCIINT_MMABT, "master abort for master" },
84 { SH4_PCIINT_MWPD, "master write data parity error" },
85 { SH4_PCIINT_MRPD, "master read data parity error" },
51}; 86};
52 87
88static irqreturn_t sh7780_pci_err_irq(int irq, void *dev_id)
89{
90 struct pci_channel *hose = dev_id;
91 unsigned long addr;
92 unsigned int status;
93 unsigned int cmd;
94 int i;
95
96 addr = __raw_readl(hose->reg_base + SH4_PCIALR);
97
98 /*
99 * Handle status errors.
100 */
101 status = __raw_readw(hose->reg_base + PCI_STATUS);
102 if (status & (PCI_STATUS_PARITY |
103 PCI_STATUS_DETECTED_PARITY |
104 PCI_STATUS_SIG_TARGET_ABORT |
105 PCI_STATUS_REC_TARGET_ABORT |
106 PCI_STATUS_REC_MASTER_ABORT)) {
107 cmd = pcibios_handle_status_errors(addr, status, hose);
108 if (likely(cmd))
109 __raw_writew(cmd, hose->reg_base + PCI_STATUS);
110 }
111
112 /*
113 * Handle arbiter errors.
114 */
115 status = __raw_readl(hose->reg_base + SH4_PCIAINT);
116 for (i = cmd = 0; i < ARRAY_SIZE(pci_arbiter_errors); i++) {
117 if (status & pci_arbiter_errors[i].mask) {
118 printk(KERN_DEBUG "PCI: %s, addr=%08lx\n",
119 pci_arbiter_errors[i].str, addr);
120 cmd |= pci_arbiter_errors[i].mask;
121 }
122 }
123 __raw_writel(cmd, hose->reg_base + SH4_PCIAINT);
124
125 /*
126 * Handle the remaining PCI errors.
127 */
128 status = __raw_readl(hose->reg_base + SH4_PCIINT);
129 for (i = cmd = 0; i < ARRAY_SIZE(pci_interrupt_errors); i++) {
130 if (status & pci_interrupt_errors[i].mask) {
131 printk(KERN_DEBUG "PCI: %s, addr=%08lx\n",
132 pci_interrupt_errors[i].str, addr);
133 cmd |= pci_interrupt_errors[i].mask;
134 }
135 }
136 __raw_writel(cmd, hose->reg_base + SH4_PCIINT);
137
138 return IRQ_HANDLED;
139}
140
141static irqreturn_t sh7780_pci_serr_irq(int irq, void *dev_id)
142{
143 struct pci_channel *hose = dev_id;
144
145 printk(KERN_DEBUG "PCI: system error received: ");
146 pcibios_report_status(PCI_STATUS_SIG_SYSTEM_ERROR, 1);
147 printk("\n");
148
149 /* Deassert SERR */
150 __raw_writel(SH4_PCIINTM_SDIM, hose->reg_base + SH4_PCIINTM);
151
152 /* Back off the IRQ for awhile */
153 disable_irq_nosync(irq);
154 hose->serr_timer.expires = jiffies + HZ;
155 add_timer(&hose->serr_timer);
156
157 return IRQ_HANDLED;
158}
159
160static int __init sh7780_pci_setup_irqs(struct pci_channel *hose)
161{
162 int ret;
163
164 /* Clear out PCI arbiter IRQs */
165 __raw_writel(0, hose->reg_base + SH4_PCIAINT);
166
167 /* Clear all error conditions */
168 __raw_writew(PCI_STATUS_DETECTED_PARITY | \
169 PCI_STATUS_SIG_SYSTEM_ERROR | \
170 PCI_STATUS_REC_MASTER_ABORT | \
171 PCI_STATUS_REC_TARGET_ABORT | \
172 PCI_STATUS_SIG_TARGET_ABORT | \
173 PCI_STATUS_PARITY, hose->reg_base + PCI_STATUS);
174
175 ret = request_irq(hose->serr_irq, sh7780_pci_serr_irq, IRQF_DISABLED,
176 "PCI SERR interrupt", hose);
177 if (unlikely(ret)) {
178 printk(KERN_ERR "PCI: Failed hooking SERR IRQ\n");
179 return ret;
180 }
181
182 /*
183 * The PCI ERR IRQ needs to be IRQF_SHARED since all of the power
184 * down IRQ vectors are routed through the ERR IRQ vector. We
185 * only request_irq() once as there is only a single masking
186 * source for multiple events.
187 */
188 ret = request_irq(hose->err_irq, sh7780_pci_err_irq, IRQF_SHARED,
189 "PCI ERR interrupt", hose);
190 if (unlikely(ret)) {
191 free_irq(hose->serr_irq, hose);
192 return ret;
193 }
194
195 /* Unmask all of the arbiter IRQs. */
196 __raw_writel(SH4_PCIAINT_MBKN | SH4_PCIAINT_TBTO | SH4_PCIAINT_MBTO | \
197 SH4_PCIAINT_TABT | SH4_PCIAINT_MABT | SH4_PCIAINT_RDPE | \
198 SH4_PCIAINT_WDPE, hose->reg_base + SH4_PCIAINTM);
199
200 /* Unmask all of the PCI IRQs */
201 __raw_writel(SH4_PCIINTM_TTADIM | SH4_PCIINTM_TMTOIM | \
202 SH4_PCIINTM_MDEIM | SH4_PCIINTM_APEDIM | \
203 SH4_PCIINTM_SDIM | SH4_PCIINTM_DPEITWM | \
204 SH4_PCIINTM_PEDITRM | SH4_PCIINTM_TADIMM | \
205 SH4_PCIINTM_MADIMM | SH4_PCIINTM_MWPDIM | \
206 SH4_PCIINTM_MRDPEIM, hose->reg_base + SH4_PCIINTM);
207
208 return ret;
209}
210
211static inline void __init sh7780_pci_teardown_irqs(struct pci_channel *hose)
212{
213 free_irq(hose->err_irq, hose);
214 free_irq(hose->serr_irq, hose);
215}
216
217static void __init sh7780_pci66_init(struct pci_channel *hose)
218{
219 unsigned int tmp;
220
221 if (!pci_is_66mhz_capable(hose, 0, 0))
222 return;
223
224 /* Enable register access */
225 tmp = __raw_readl(hose->reg_base + SH4_PCICR);
226 tmp |= SH4_PCICR_PREFIX;
227 __raw_writel(tmp, hose->reg_base + SH4_PCICR);
228
229 /* Enable 66MHz operation */
230 tmp = __raw_readw(hose->reg_base + PCI_STATUS);
231 tmp |= PCI_STATUS_66MHZ;
232 __raw_writew(tmp, hose->reg_base + PCI_STATUS);
233
234 /* Done */
235 tmp = __raw_readl(hose->reg_base + SH4_PCICR);
236 tmp |= SH4_PCICR_PREFIX | SH4_PCICR_CFIN;
237 __raw_writel(tmp, hose->reg_base + SH4_PCICR);
238}
239
53static int __init sh7780_pci_init(void) 240static int __init sh7780_pci_init(void)
54{ 241{
55 struct pci_channel *chan = &sh7780_pci_controller; 242 struct pci_channel *chan = &sh7780_pci_controller;
243 phys_addr_t memphys;
244 size_t memsize;
56 unsigned int id; 245 unsigned int id;
57 const char *type = NULL; 246 const char *type;
58 int ret; 247 int ret, i;
59 u32 word;
60 248
61 printk(KERN_NOTICE "PCI: Starting intialization.\n"); 249 printk(KERN_NOTICE "PCI: Starting intialization.\n");
62 250
@@ -65,17 +253,28 @@ static int __init sh7780_pci_init(void)
65 /* Enable CPU access to the PCIC registers. */ 253 /* Enable CPU access to the PCIC registers. */
66 __raw_writel(PCIECR_ENBL, PCIECR); 254 __raw_writel(PCIECR_ENBL, PCIECR);
67 255
68 id = __raw_readw(chan->reg_base + SH7780_PCIVID); 256 /* Reset */
69 if (id != SH7780_VENDOR_ID) { 257 __raw_writel(SH4_PCICR_PREFIX | SH4_PCICR_PRST,
258 chan->reg_base + SH4_PCICR);
259
260 /*
261 * Wait for it to come back up. The spec says to allow for up to
262 * 1 second after toggling the reset pin, but in practice 100ms
263 * is more than enough.
264 */
265 mdelay(100);
266
267 id = __raw_readw(chan->reg_base + PCI_VENDOR_ID);
268 if (id != PCI_VENDOR_ID_RENESAS) {
70 printk(KERN_ERR "PCI: Unknown vendor ID 0x%04x.\n", id); 269 printk(KERN_ERR "PCI: Unknown vendor ID 0x%04x.\n", id);
71 return -ENODEV; 270 return -ENODEV;
72 } 271 }
73 272
74 id = __raw_readw(chan->reg_base + SH7780_PCIDID); 273 id = __raw_readw(chan->reg_base + PCI_DEVICE_ID);
75 type = (id == SH7763_DEVICE_ID) ? "SH7763" : 274 type = (id == PCI_DEVICE_ID_RENESAS_SH7763) ? "SH7763" :
76 (id == SH7780_DEVICE_ID) ? "SH7780" : 275 (id == PCI_DEVICE_ID_RENESAS_SH7780) ? "SH7780" :
77 (id == SH7781_DEVICE_ID) ? "SH7781" : 276 (id == PCI_DEVICE_ID_RENESAS_SH7781) ? "SH7781" :
78 (id == SH7785_DEVICE_ID) ? "SH7785" : 277 (id == PCI_DEVICE_ID_RENESAS_SH7785) ? "SH7785" :
79 NULL; 278 NULL;
80 if (unlikely(!type)) { 279 if (unlikely(!type)) {
81 printk(KERN_ERR "PCI: Found an unsupported Renesas host " 280 printk(KERN_ERR "PCI: Found an unsupported Renesas host "
@@ -85,62 +284,119 @@ static int __init sh7780_pci_init(void)
85 284
86 printk(KERN_NOTICE "PCI: Found a Renesas %s host " 285 printk(KERN_NOTICE "PCI: Found a Renesas %s host "
87 "controller, revision %d.\n", type, 286 "controller, revision %d.\n", type,
88 __raw_readb(chan->reg_base + SH7780_PCIRID)); 287 __raw_readb(chan->reg_base + PCI_REVISION_ID));
89 288
90 if ((ret = sh4_pci_check_direct(chan)) != 0) 289 /*
290 * Now throw it in to register initialization mode and
291 * start the real work.
292 */
293 __raw_writel(SH4_PCICR_PREFIX, chan->reg_base + SH4_PCICR);
294
295 memphys = __pa(memory_start);
296 memsize = roundup_pow_of_two(memory_end - memory_start);
297
298 /*
299 * If there's more than 512MB of memory, we need to roll over to
300 * LAR1/LSR1.
301 */
302 if (memsize > SZ_512M) {
303 __raw_writel(memphys + SZ_512M, chan->reg_base + SH4_PCILAR1);
304 __raw_writel((((memsize - SZ_512M) - SZ_1M) & 0x1ff00000) | 1,
305 chan->reg_base + SH4_PCILSR1);
306 memsize = SZ_512M;
307 } else {
308 /*
309 * Otherwise just zero it out and disable it.
310 */
311 __raw_writel(0, chan->reg_base + SH4_PCILAR1);
312 __raw_writel(0, chan->reg_base + SH4_PCILSR1);
313 }
314
315 /*
316 * LAR0/LSR0 covers up to the first 512MB, which is enough to
317 * cover all of lowmem on most platforms.
318 */
319 __raw_writel(memphys, chan->reg_base + SH4_PCILAR0);
320 __raw_writel(((memsize - SZ_1M) & 0x1ff00000) | 1,
321 chan->reg_base + SH4_PCILSR0);
322
323 /*
324 * Hook up the ERR and SERR IRQs.
325 */
326 ret = sh7780_pci_setup_irqs(chan);
327 if (unlikely(ret))
91 return ret; 328 return ret;
92 329
93 /* 330 /*
94 * Set the class and sub-class codes. 331 * Disable the cache snoop controller for non-coherent DMA.
95 */ 332 */
96 __raw_writeb(PCI_CLASS_BRIDGE_HOST >> 8, 333 __raw_writel(0, chan->reg_base + SH7780_PCICSCR0);
97 chan->reg_base + SH7780_PCIBCC); 334 __raw_writel(0, chan->reg_base + SH7780_PCICSAR0);
98 __raw_writeb(PCI_CLASS_BRIDGE_HOST & 0xff, 335 __raw_writel(0, chan->reg_base + SH7780_PCICSCR1);
99 chan->reg_base + SH7780_PCISUB); 336 __raw_writel(0, chan->reg_base + SH7780_PCICSAR1);
100 337
101 /* 338 /*
102 * Set IO and Mem windows to local address 339 * Setup the memory BARs
103 * Make PCI and local address the same for easy 1 to 1 mapping
104 */ 340 */
105 pci_write_reg(chan, sh7780_pci_map.window0.size - 0xfffff, SH4_PCILSR0); 341 for (i = 1; i < chan->nr_resources; i++) {
106 /* Set the values on window 0 PCI config registers */ 342 struct resource *res = chan->resources + i;
107 pci_write_reg(chan, sh7780_pci_map.window0.base, SH4_PCILAR0); 343 resource_size_t size;
108 pci_write_reg(chan, sh7780_pci_map.window0.base, SH7780_PCIMBAR0);
109 344
110 pci_write_reg(chan, 0x0000380f, SH4_PCIAINTM); 345 if (unlikely(res->flags & IORESOURCE_IO))
346 continue;
111 347
112 /* Set up standard PCI config registers */ 348 /*
113 __raw_writew(0xFB00, chan->reg_base + SH7780_PCISTATUS); 349 * Make sure we're in the right physical addressing mode
114 __raw_writew(0x0047, chan->reg_base + SH7780_PCICMD); 350 * for dealing with the resource.
115 __raw_writew(0x1912, chan->reg_base + SH7780_PCISVID); 351 */
116 __raw_writew(0x0001, chan->reg_base + SH7780_PCISID); 352 if ((res->flags & IORESOURCE_MEM_32BIT) && __in_29bit_mode()) {
353 chan->nr_resources--;
354 continue;
355 }
117 356
118 __raw_writeb(0x00, chan->reg_base + SH7780_PCIPIF); 357 size = resource_size(res);
358
359 /*
360 * The MBMR mask is calculated in units of 256kB, which
361 * keeps things pretty simple.
362 */
363 __raw_writel(((roundup_pow_of_two(size) / SZ_256K) - 1) << 18,
364 chan->reg_base + SH7780_PCIMBMR(i - 1));
365 __raw_writel(res->start, chan->reg_base + SH7780_PCIMBR(i - 1));
366 }
119 367
120 /* Apply any last-minute PCIC fixups */ 368 /*
121 pci_fixup_pcic(chan); 369 * And I/O.
370 */
371 __raw_writel(0, chan->reg_base + PCI_BASE_ADDRESS_0);
372 __raw_writel(0, chan->reg_base + SH7780_PCIIOBR);
373 __raw_writel(0, chan->reg_base + SH7780_PCIIOBMR);
122 374
123 pci_write_reg(chan, 0xfd000000, SH7780_PCIMBR0); 375 __raw_writew(PCI_COMMAND_SERR | PCI_COMMAND_WAIT | \
124 pci_write_reg(chan, 0x00fc0000, SH7780_PCIMBMR0); 376 PCI_COMMAND_PARITY | PCI_COMMAND_MASTER | \
377 PCI_COMMAND_MEMORY, chan->reg_base + PCI_COMMAND);
125 378
126#ifdef CONFIG_32BIT 379 /*
127 pci_write_reg(chan, 0xc0000000, SH7780_PCIMBR2); 380 * Initialization mode complete, release the control register and
128 pci_write_reg(chan, 0x20000000 - SH7780_PCI_IO_SIZE, SH7780_PCIMBMR2); 381 * enable round robin mode to stop device overruns/starvation.
129#endif 382 */
383 __raw_writel(SH4_PCICR_PREFIX | SH4_PCICR_CFIN | SH4_PCICR_FTO,
384 chan->reg_base + SH4_PCICR);
130 385
131 /* Set IOBR for windows containing area specified in pci.h */ 386 ret = register_pci_controller(chan);
132 pci_write_reg(chan, chan->io_resource->start & ~(SH7780_PCI_IO_SIZE-1), 387 if (unlikely(ret))
133 SH7780_PCIIOBR); 388 goto err;
134 pci_write_reg(chan, ((SH7780_PCI_IO_SIZE-1) & (7<<18)),
135 SH7780_PCIIOBMR);
136 389
137 /* SH7780 init done, set central function init complete */ 390 sh7780_pci66_init(chan);
138 /* use round robin mode to stop a device starving/overruning */
139 word = SH4_PCICR_PREFIX | SH4_PCICR_CFIN | SH4_PCICR_FTO;
140 pci_write_reg(chan, word, SH4_PCICR);
141 391
142 register_pci_controller(chan); 392 printk(KERN_NOTICE "PCI: Running at %dMHz.\n",
393 (__raw_readw(chan->reg_base + PCI_STATUS) & PCI_STATUS_66MHZ) ?
394 66 : 33);
143 395
144 return 0; 396 return 0;
397
398err:
399 sh7780_pci_teardown_irqs(chan);
400 return ret;
145} 401}
146arch_initcall(sh7780_pci_init); 402arch_initcall(sh7780_pci_init);
diff --git a/arch/sh/drivers/pci/pci-sh7780.h b/arch/sh/drivers/pci/pci-sh7780.h
index 4a52478c97cf..205dcbefe275 100644
--- a/arch/sh/drivers/pci/pci-sh7780.h
+++ b/arch/sh/drivers/pci/pci-sh7780.h
@@ -12,12 +12,11 @@
12#ifndef _PCI_SH7780_H_ 12#ifndef _PCI_SH7780_H_
13#define _PCI_SH7780_H_ 13#define _PCI_SH7780_H_
14 14
15/* Platform Specific Values */ 15#define PCI_VENDOR_ID_RENESAS 0x1912
16#define SH7780_VENDOR_ID 0x1912 16#define PCI_DEVICE_ID_RENESAS_SH7781 0x0001
17#define SH7781_DEVICE_ID 0x0001 17#define PCI_DEVICE_ID_RENESAS_SH7780 0x0002
18#define SH7780_DEVICE_ID 0x0002 18#define PCI_DEVICE_ID_RENESAS_SH7763 0x0004
19#define SH7763_DEVICE_ID 0x0004 19#define PCI_DEVICE_ID_RENESAS_SH7785 0x0007
20#define SH7785_DEVICE_ID 0x0007
21 20
22/* SH7780 Control Registers */ 21/* SH7780 Control Registers */
23#define PCIECR 0xFE000008 22#define PCIECR 0xFE000008
@@ -27,44 +26,9 @@
27#define SH7780_PCI_CONFIG_BASE 0xFD000000 /* Config space base addr */ 26#define SH7780_PCI_CONFIG_BASE 0xFD000000 /* Config space base addr */
28#define SH7780_PCI_CONFIG_SIZE 0x01000000 /* Config space size */ 27#define SH7780_PCI_CONFIG_SIZE 0x01000000 /* Config space size */
29 28
30#define SH7780_PCI_MEMORY_BASE 0xFD000000 /* Memory space base addr */
31#define SH7780_PCI_MEM_SIZE 0x01000000 /* Size of Memory window */
32
33#define SH7780_PCI_IO_BASE 0xFE200000 /* IO space base address */
34#define SH7780_PCI_IO_SIZE 0x00400000 /* Size of IO window */
35
36#define SH7780_PCIREG_BASE 0xFE040000 /* PCI regs base address */ 29#define SH7780_PCIREG_BASE 0xFE040000 /* PCI regs base address */
37 30
38/* SH7780 PCI Config Registers */ 31/* SH7780 PCI Config Registers */
39#define SH7780_PCIVID 0x000 /* Vendor ID */
40#define SH7780_PCIDID 0x002 /* Device ID */
41#define SH7780_PCICMD 0x004 /* Command */
42#define SH7780_PCISTATUS 0x006 /* Status */
43#define SH7780_PCIRID 0x008 /* Revision ID */
44#define SH7780_PCIPIF 0x009 /* Program Interface */
45#define SH7780_PCISUB 0x00a /* Sub class code */
46#define SH7780_PCIBCC 0x00b /* Base class code */
47#define SH7780_PCICLS 0x00c /* Cache line size */
48#define SH7780_PCILTM 0x00d /* latency timer */
49#define SH7780_PCIHDR 0x00e /* Header type */
50#define SH7780_PCIBIST 0x00f /* BIST */
51#define SH7780_PCIIBAR 0x010 /* IO Base address */
52#define SH7780_PCIMBAR0 0x014 /* Memory base address0 */
53#define SH7780_PCIMBAR1 0x018 /* Memory base address1 */
54#define SH7780_PCISVID 0x02c /* Sub system vendor ID */
55#define SH7780_PCISID 0x02e /* Sub system ID */
56#define SH7780_PCICP 0x034
57#define SH7780_PCIINTLINE 0x03c /* Interrupt line */
58#define SH7780_PCIINTPIN 0x03d /* Interrupt pin */
59#define SH7780_PCIMINGNT 0x03e /* Minumum grand */
60#define SH7780_PCIMAXLAT 0x03f /* Maxmum latency */
61#define SH7780_PCICID 0x040
62#define SH7780_PCINIP 0x041
63#define SH7780_PCIPMC 0x042
64#define SH7780_PCIPMCSR 0x044
65#define SH7780_PCIPMCSR_BSE 0x046
66#define SH7780_PCICDD 0x047
67
68#define SH7780_PCIIR 0x114 /* PCI Interrupt Register */ 32#define SH7780_PCIIR 0x114 /* PCI Interrupt Register */
69#define SH7780_PCIIMR 0x118 /* PCI Interrupt Mask Register */ 33#define SH7780_PCIIMR 0x118 /* PCI Interrupt Mask Register */
70#define SH7780_PCIAIR 0x11C /* Error Address Register */ 34#define SH7780_PCIAIR 0x11C /* Error Address Register */
@@ -76,10 +40,8 @@
76#define SH7780_PCIPINT 0x1CC /* Power Mgmnt Int. Register */ 40#define SH7780_PCIPINT 0x1CC /* Power Mgmnt Int. Register */
77#define SH7780_PCIPINTM 0x1D0 /* Power Mgmnt Mask Register */ 41#define SH7780_PCIPINTM 0x1D0 /* Power Mgmnt Mask Register */
78 42
79#define SH7780_PCIMBR0 0x1E0 43#define SH7780_PCIMBR(x) (0x1E0 + ((x) * 8))
80#define SH7780_PCIMBMR0 0x1E4 44#define SH7780_PCIMBMR(x) (0x1E4 + ((x) * 8))
81#define SH7780_PCIMBR2 0x1F0
82#define SH7780_PCIMBMR2 0x1F4
83#define SH7780_PCIIOBR 0x1F8 45#define SH7780_PCIIOBR 0x1F8
84#define SH7780_PCIIOBMR 0x1FC 46#define SH7780_PCIIOBMR 0x1FC
85#define SH7780_PCICSCR0 0x210 /* Cache Snoop1 Cnt. Register */ 47#define SH7780_PCICSCR0 0x210 /* Cache Snoop1 Cnt. Register */
@@ -87,16 +49,4 @@
87#define SH7780_PCICSAR0 0x218 /* Cache Snoop1 Addr. Register */ 49#define SH7780_PCICSAR0 0x218 /* Cache Snoop1 Addr. Register */
88#define SH7780_PCICSAR1 0x21C /* Cache Snoop2 Addr. Register */ 50#define SH7780_PCICSAR1 0x21C /* Cache Snoop2 Addr. Register */
89 51
90/* General Memory Config Addresses */
91#define SH7780_CS0_BASE_ADDR 0x0
92#define SH7780_MEM_REGION_SIZE 0x04000000
93#define SH7780_CS1_BASE_ADDR (SH7780_CS0_BASE_ADDR + SH7780_MEM_REGION_SIZE)
94#define SH7780_CS2_BASE_ADDR (SH7780_CS1_BASE_ADDR + SH7780_MEM_REGION_SIZE)
95#define SH7780_CS3_BASE_ADDR (SH7780_CS2_BASE_ADDR + SH7780_MEM_REGION_SIZE)
96#define SH7780_CS4_BASE_ADDR (SH7780_CS3_BASE_ADDR + SH7780_MEM_REGION_SIZE)
97#define SH7780_CS5_BASE_ADDR (SH7780_CS4_BASE_ADDR + SH7780_MEM_REGION_SIZE)
98#define SH7780_CS6_BASE_ADDR (SH7780_CS5_BASE_ADDR + SH7780_MEM_REGION_SIZE)
99
100#define SH7780_32BIT_DDR_BASE_ADDR 0x40000000
101
102#endif /* _PCI_SH7780_H_ */ 52#endif /* _PCI_SH7780_H_ */
diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c
index c481df639022..953af139e230 100644
--- a/arch/sh/drivers/pci/pci.c
+++ b/arch/sh/drivers/pci/pci.c
@@ -33,15 +33,22 @@ static int pci_initialized;
33static void __devinit pcibios_scanbus(struct pci_channel *hose) 33static void __devinit pcibios_scanbus(struct pci_channel *hose)
34{ 34{
35 static int next_busno; 35 static int next_busno;
36 static int need_domain_info;
36 struct pci_bus *bus; 37 struct pci_bus *bus;
37 38
38 bus = pci_scan_bus(next_busno, hose->pci_ops, hose); 39 bus = pci_scan_bus(next_busno, hose->pci_ops, hose);
40 hose->bus = bus;
41
42 need_domain_info = need_domain_info || hose->index;
43 hose->need_domain_info = need_domain_info;
39 if (bus) { 44 if (bus) {
40 next_busno = bus->subordinate + 1; 45 next_busno = bus->subordinate + 1;
41 /* Don't allow 8-bit bus number overflow inside the hose - 46 /* Don't allow 8-bit bus number overflow inside the hose -
42 reserve some space for bridges. */ 47 reserve some space for bridges. */
43 if (next_busno > 224) 48 if (next_busno > 224) {
44 next_busno = 0; 49 next_busno = 0;
50 need_domain_info = 1;
51 }
45 52
46 pci_bus_size_bridges(bus); 53 pci_bus_size_bridges(bus);
47 pci_bus_assign_resources(bus); 54 pci_bus_assign_resources(bus);
@@ -51,10 +58,21 @@ static void __devinit pcibios_scanbus(struct pci_channel *hose)
51 58
52static DEFINE_MUTEX(pci_scan_mutex); 59static DEFINE_MUTEX(pci_scan_mutex);
53 60
54void __devinit register_pci_controller(struct pci_channel *hose) 61int __devinit register_pci_controller(struct pci_channel *hose)
55{ 62{
56 request_resource(&iomem_resource, hose->mem_resource); 63 int i;
57 request_resource(&ioport_resource, hose->io_resource); 64
65 for (i = 0; i < hose->nr_resources; i++) {
66 struct resource *res = hose->resources + i;
67
68 if (res->flags & IORESOURCE_IO) {
69 if (request_resource(&ioport_resource, res) < 0)
70 goto out;
71 } else {
72 if (request_resource(&iomem_resource, res) < 0)
73 goto out;
74 }
75 }
58 76
59 *hose_tail = hose; 77 *hose_tail = hose;
60 hose_tail = &hose->next; 78 hose_tail = &hose->next;
@@ -68,6 +86,11 @@ void __devinit register_pci_controller(struct pci_channel *hose)
68 } 86 }
69 87
70 /* 88 /*
89 * Setup the ERR/PERR and SERR timers, if available.
90 */
91 pcibios_enable_timers(hose);
92
93 /*
71 * Scan the bus if it is register after the PCI subsystem 94 * Scan the bus if it is register after the PCI subsystem
72 * initialization. 95 * initialization.
73 */ 96 */
@@ -76,6 +99,15 @@ void __devinit register_pci_controller(struct pci_channel *hose)
76 pcibios_scanbus(hose); 99 pcibios_scanbus(hose);
77 mutex_unlock(&pci_scan_mutex); 100 mutex_unlock(&pci_scan_mutex);
78 } 101 }
102
103 return 0;
104
105out:
106 for (--i; i >= 0; i--)
107 release_resource(&hose->resources[i]);
108
109 printk(KERN_WARNING "Skipping PCI bus scan due to resource conflict\n");
110 return -1;
79} 111}
80 112
81static int __init pcibios_init(void) 113static int __init pcibios_init(void)
@@ -127,11 +159,13 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus)
127{ 159{
128 struct pci_dev *dev = bus->self; 160 struct pci_dev *dev = bus->self;
129 struct list_head *ln; 161 struct list_head *ln;
130 struct pci_channel *chan = bus->sysdata; 162 struct pci_channel *hose = bus->sysdata;
131 163
132 if (!dev) { 164 if (!dev) {
133 bus->resource[0] = chan->io_resource; 165 int i;
134 bus->resource[1] = chan->mem_resource; 166
167 for (i = 0; i < hose->nr_resources; i++)
168 bus->resource[i] = hose->resources + i;
135 } 169 }
136 170
137 for (ln = bus->devices.next; ln != &bus->devices; ln = ln->next) { 171 for (ln = bus->devices.next; ln != &bus->devices; ln = ln->next) {
@@ -148,34 +182,29 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus)
148 * addresses to be allocated in the 0x000-0x0ff region 182 * addresses to be allocated in the 0x000-0x0ff region
149 * modulo 0x400. 183 * modulo 0x400.
150 */ 184 */
151void pcibios_align_resource(void *data, struct resource *res, 185resource_size_t pcibios_align_resource(void *data, const struct resource *res,
152 resource_size_t size, resource_size_t align) 186 resource_size_t size, resource_size_t align)
153{ 187{
154 struct pci_dev *dev = data; 188 struct pci_dev *dev = data;
155 struct pci_channel *chan = dev->sysdata; 189 struct pci_channel *hose = dev->sysdata;
156 resource_size_t start = res->start; 190 resource_size_t start = res->start;
157 191
158 if (res->flags & IORESOURCE_IO) { 192 if (res->flags & IORESOURCE_IO) {
159 if (start < PCIBIOS_MIN_IO + chan->io_resource->start) 193 if (start < PCIBIOS_MIN_IO + hose->resources[0].start)
160 start = PCIBIOS_MIN_IO + chan->io_resource->start; 194 start = PCIBIOS_MIN_IO + hose->resources[0].start;
161 195
162 /* 196 /*
163 * Put everything into 0x00-0xff region modulo 0x400. 197 * Put everything into 0x00-0xff region modulo 0x400.
164 */ 198 */
165 if (start & 0x300) { 199 if (start & 0x300)
166 start = (start + 0x3ff) & ~0x3ff; 200 start = (start + 0x3ff) & ~0x3ff;
167 res->start = start;
168 }
169 } else if (res->flags & IORESOURCE_MEM) {
170 if (start < PCIBIOS_MIN_MEM + chan->mem_resource->start)
171 start = PCIBIOS_MIN_MEM + chan->mem_resource->start;
172 } 201 }
173 202
174 res->start = start; 203 return start;
175} 204}
176 205
177void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, 206void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
178 struct resource *res) 207 struct resource *res)
179{ 208{
180 struct pci_channel *hose = dev->sysdata; 209 struct pci_channel *hose = dev->sysdata;
181 unsigned long offset = 0; 210 unsigned long offset = 0;
@@ -189,9 +218,8 @@ void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
189 region->end = res->end - offset; 218 region->end = res->end - offset;
190} 219}
191 220
192void __devinit 221void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
193pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res, 222 struct pci_bus_region *region)
194 struct pci_bus_region *region)
195{ 223{
196 struct pci_channel *hose = dev->sysdata; 224 struct pci_channel *hose = dev->sysdata;
197 unsigned long offset = 0; 225 unsigned long offset = 0;
@@ -274,6 +302,86 @@ char * __devinit pcibios_setup(char *str)
274 return str; 302 return str;
275} 303}
276 304
305static void __init
306pcibios_bus_report_status_early(struct pci_channel *hose,
307 int top_bus, int current_bus,
308 unsigned int status_mask, int warn)
309{
310 unsigned int pci_devfn;
311 u16 status;
312 int ret;
313
314 for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) {
315 if (PCI_FUNC(pci_devfn))
316 continue;
317 ret = early_read_config_word(hose, top_bus, current_bus,
318 pci_devfn, PCI_STATUS, &status);
319 if (ret != PCIBIOS_SUCCESSFUL)
320 continue;
321 if (status == 0xffff)
322 continue;
323
324 early_write_config_word(hose, top_bus, current_bus,
325 pci_devfn, PCI_STATUS,
326 status & status_mask);
327 if (warn)
328 printk("(%02x:%02x: %04X) ", current_bus,
329 pci_devfn, status);
330 }
331}
332
333/*
334 * We can't use pci_find_device() here since we are
335 * called from interrupt context.
336 */
337static void __init_refok
338pcibios_bus_report_status(struct pci_bus *bus, unsigned int status_mask,
339 int warn)
340{
341 struct pci_dev *dev;
342
343 list_for_each_entry(dev, &bus->devices, bus_list) {
344 u16 status;
345
346 /*
347 * ignore host bridge - we handle
348 * that separately
349 */
350 if (dev->bus->number == 0 && dev->devfn == 0)
351 continue;
352
353 pci_read_config_word(dev, PCI_STATUS, &status);
354 if (status == 0xffff)
355 continue;
356
357 if ((status & status_mask) == 0)
358 continue;
359
360 /* clear the status errors */
361 pci_write_config_word(dev, PCI_STATUS, status & status_mask);
362
363 if (warn)
364 printk("(%s: %04X) ", pci_name(dev), status);
365 }
366
367 list_for_each_entry(dev, &bus->devices, bus_list)
368 if (dev->subordinate)
369 pcibios_bus_report_status(dev->subordinate, status_mask, warn);
370}
371
372void __init_refok pcibios_report_status(unsigned int status_mask, int warn)
373{
374 struct pci_channel *hose;
375
376 for (hose = hose_head; hose; hose = hose->next) {
377 if (unlikely(!hose->bus))
378 pcibios_bus_report_status_early(hose, hose_head->index,
379 hose->index, status_mask, warn);
380 else
381 pcibios_bus_report_status(hose->bus, status_mask, warn);
382 }
383}
384
277int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, 385int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
278 enum pci_mmap_state mmap_state, int write_combine) 386 enum pci_mmap_state mmap_state, int write_combine)
279{ 387{
@@ -302,9 +410,15 @@ static void __iomem *ioport_map_pci(struct pci_dev *dev,
302{ 410{
303 struct pci_channel *chan = dev->sysdata; 411 struct pci_channel *chan = dev->sysdata;
304 412
305 if (!chan->io_map_base) 413 if (unlikely(!chan->io_map_base)) {
306 chan->io_map_base = generic_io_base; 414 chan->io_map_base = generic_io_base;
307 415
416 if (pci_domains_supported)
417 panic("To avoid data corruption io_map_base MUST be "
418 "set with multiple PCI domains.");
419 }
420
421
308 return (void __iomem *)(chan->io_map_base + port); 422 return (void __iomem *)(chan->io_map_base + port);
309} 423}
310 424
@@ -321,20 +435,9 @@ void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
321 435
322 if (flags & IORESOURCE_IO) 436 if (flags & IORESOURCE_IO)
323 return ioport_map_pci(dev, start, len); 437 return ioport_map_pci(dev, start, len);
324
325 /*
326 * Presently the IORESOURCE_MEM case is a bit special, most
327 * SH7751 style PCI controllers have PCI memory at a fixed
328 * location in the address space where no remapping is desired.
329 * With the IORESOURCE_MEM case more care has to be taken
330 * to inhibit page table mapping for legacy cores, but this is
331 * punted off to __ioremap().
332 * -- PFM.
333 */
334 if (flags & IORESOURCE_MEM) { 438 if (flags & IORESOURCE_MEM) {
335 if (flags & IORESOURCE_CACHEABLE) 439 if (flags & IORESOURCE_CACHEABLE)
336 return ioremap(start, len); 440 return ioremap(start, len);
337
338 return ioremap_nocache(start, len); 441 return ioremap_nocache(start, len);
339 } 442 }
340 443
diff --git a/arch/sh/drivers/pci/pcie-sh7786.c b/arch/sh/drivers/pci/pcie-sh7786.c
index ac37ee879bab..68cb9b0ac9d2 100644
--- a/arch/sh/drivers/pci/pcie-sh7786.c
+++ b/arch/sh/drivers/pci/pcie-sh7786.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Low-Level PCI Express Support for the SH7786 2 * Low-Level PCI Express Support for the SH7786
3 * 3 *
4 * Copyright (C) 2009 Paul Mundt 4 * Copyright (C) 2009 - 2010 Paul Mundt
5 * 5 *
6 * This file is subject to the terms and conditions of the GNU General Public 6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive 7 * License. See the file "COPYING" in the main directory of this archive
@@ -12,6 +12,7 @@
12#include <linux/kernel.h> 12#include <linux/kernel.h>
13#include <linux/io.h> 13#include <linux/io.h>
14#include <linux/delay.h> 14#include <linux/delay.h>
15#include <linux/slab.h>
15#include "pcie-sh7786.h" 16#include "pcie-sh7786.h"
16#include <asm/sizes.h> 17#include <asm/sizes.h>
17 18
@@ -30,60 +31,84 @@ static struct sh7786_pcie_hwops {
30 int (*port_init_hw)(struct sh7786_pcie_port *port); 31 int (*port_init_hw)(struct sh7786_pcie_port *port);
31} *sh7786_pcie_hwops; 32} *sh7786_pcie_hwops;
32 33
33static struct resource sh7786_pci_32bit_mem_resources[] = { 34static struct resource sh7786_pci0_resources[] = {
34 { 35 {
35 .name = "pci0_mem", 36 .name = "PCIe0 IO",
36 .start = SH4A_PCIMEM_BASEA, 37 .start = 0xfd000000,
37 .end = SH4A_PCIMEM_BASEA + SZ_64M - 1, 38 .end = 0xfd000000 + SZ_8M - 1,
38 .flags = IORESOURCE_MEM, 39 .flags = IORESOURCE_IO,
39 }, { 40 }, {
40 .name = "pci1_mem", 41 .name = "PCIe0 MEM 0",
41 .start = SH4A_PCIMEM_BASEA1, 42 .start = 0xc0000000,
42 .end = SH4A_PCIMEM_BASEA1 + SZ_64M - 1, 43 .end = 0xc0000000 + SZ_512M - 1,
43 .flags = IORESOURCE_MEM, 44 .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT,
44 }, { 45 }, {
45 .name = "pci2_mem", 46 .name = "PCIe0 MEM 1",
46 .start = SH4A_PCIMEM_BASEA2, 47 .start = 0x10000000,
47 .end = SH4A_PCIMEM_BASEA2 + SZ_64M - 1, 48 .end = 0x10000000 + SZ_64M - 1,
48 .flags = IORESOURCE_MEM, 49 .flags = IORESOURCE_MEM,
50 }, {
51 .name = "PCIe0 MEM 2",
52 .start = 0xfe100000,
53 .end = 0xfe100000 + SZ_1M - 1,
49 }, 54 },
50}; 55};
51 56
52static struct resource sh7786_pci_29bit_mem_resource = { 57static struct resource sh7786_pci1_resources[] = {
53 .start = SH4A_PCIMEM_BASE, 58 {
54 .end = SH4A_PCIMEM_BASE + SZ_64M - 1, 59 .name = "PCIe1 IO",
55 .flags = IORESOURCE_MEM, 60 .start = 0xfd800000,
61 .end = 0xfd800000 + SZ_8M - 1,
62 .flags = IORESOURCE_IO,
63 }, {
64 .name = "PCIe1 MEM 0",
65 .start = 0xa0000000,
66 .end = 0xa0000000 + SZ_512M - 1,
67 .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT,
68 }, {
69 .name = "PCIe1 MEM 1",
70 .start = 0x30000000,
71 .end = 0x30000000 + SZ_256M - 1,
72 .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT,
73 }, {
74 .name = "PCIe1 MEM 2",
75 .start = 0xfe300000,
76 .end = 0xfe300000 + SZ_1M - 1,
77 },
56}; 78};
57 79
58static struct resource sh7786_pci_io_resources[] = { 80static struct resource sh7786_pci2_resources[] = {
59 { 81 {
60 .name = "pci0_io", 82 .name = "PCIe2 IO",
61 .start = SH4A_PCIIO_BASE, 83 .start = 0xfc800000,
62 .end = SH4A_PCIIO_BASE + SZ_8M - 1, 84 .end = 0xfc800000 + SZ_4M - 1,
63 .flags = IORESOURCE_IO,
64 }, { 85 }, {
65 .name = "pci1_io", 86 .name = "PCIe2 MEM 0",
66 .start = SH4A_PCIIO_BASE1, 87 .start = 0x80000000,
67 .end = SH4A_PCIIO_BASE1 + SZ_8M - 1, 88 .end = 0x80000000 + SZ_512M - 1,
68 .flags = IORESOURCE_IO, 89 .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT,
69 }, { 90 }, {
70 .name = "pci2_io", 91 .name = "PCIe2 MEM 1",
71 .start = SH4A_PCIIO_BASE2, 92 .start = 0x20000000,
72 .end = SH4A_PCIIO_BASE2 + SZ_4M - 1, 93 .end = 0x20000000 + SZ_256M - 1,
73 .flags = IORESOURCE_IO, 94 .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT,
95 }, {
96 .name = "PCIe2 MEM 2",
97 .start = 0xfcd00000,
98 .end = 0xfcd00000 + SZ_1M - 1,
74 }, 99 },
75}; 100};
76 101
77extern struct pci_ops sh7786_pci_ops; 102extern struct pci_ops sh7786_pci_ops;
78 103
79#define DEFINE_CONTROLLER(start, idx) \ 104#define DEFINE_CONTROLLER(start, idx) \
80{ \ 105{ \
81 .pci_ops = &sh7786_pci_ops, \ 106 .pci_ops = &sh7786_pci_ops, \
82 .reg_base = start, \ 107 .resources = sh7786_pci##idx##_resources, \
83 /* mem_resource filled in at probe time */ \ 108 .nr_resources = ARRAY_SIZE(sh7786_pci##idx##_resources), \
84 .mem_offset = 0, \ 109 .reg_base = start, \
85 .io_resource = &sh7786_pci_io_resources[idx], \ 110 .mem_offset = 0, \
86 .io_offset = 0, \ 111 .io_offset = 0, \
87} 112}
88 113
89static struct pci_channel sh7786_pci_channels[] = { 114static struct pci_channel sh7786_pci_channels[] = {
@@ -180,7 +205,9 @@ static int pcie_init(struct sh7786_pcie_port *port)
180{ 205{
181 struct pci_channel *chan = port->hose; 206 struct pci_channel *chan = port->hose;
182 unsigned int data; 207 unsigned int data;
183 int ret; 208 phys_addr_t memphys;
209 size_t memsize;
210 int ret, i;
184 211
185 /* Begin initialization */ 212 /* Begin initialization */
186 pci_write_reg(chan, 0, SH4A_PCIETCTLR); 213 pci_write_reg(chan, 0, SH4A_PCIETCTLR);
@@ -203,15 +230,24 @@ static int pcie_init(struct sh7786_pcie_port *port)
203 data |= PCI_CAP_ID_EXP; 230 data |= PCI_CAP_ID_EXP;
204 pci_write_reg(chan, data, SH4A_PCIEEXPCAP0); 231 pci_write_reg(chan, data, SH4A_PCIEEXPCAP0);
205 232
206 /* Enable x4 link width and extended sync. */ 233 /* Enable data link layer active state reporting */
234 pci_write_reg(chan, PCI_EXP_LNKCAP_DLLLARC, SH4A_PCIEEXPCAP3);
235
236 /* Enable extended sync and ASPM L0s support */
207 data = pci_read_reg(chan, SH4A_PCIEEXPCAP4); 237 data = pci_read_reg(chan, SH4A_PCIEEXPCAP4);
208 data &= ~(PCI_EXP_LNKSTA_NLW << 16); 238 data &= ~PCI_EXP_LNKCTL_ASPMC;
209 data |= (1 << 22) | PCI_EXP_LNKCTL_ES; 239 data |= PCI_EXP_LNKCTL_ES | 1;
210 pci_write_reg(chan, data, SH4A_PCIEEXPCAP4); 240 pci_write_reg(chan, data, SH4A_PCIEEXPCAP4);
211 241
242 /* Write out the physical slot number */
243 data = pci_read_reg(chan, SH4A_PCIEEXPCAP5);
244 data &= ~PCI_EXP_SLTCAP_PSN;
245 data |= (port->index + 1) << 19;
246 pci_write_reg(chan, data, SH4A_PCIEEXPCAP5);
247
212 /* Set the completion timer timeout to the maximum 32ms. */ 248 /* Set the completion timer timeout to the maximum 32ms. */
213 data = pci_read_reg(chan, SH4A_PCIETLCTLR); 249 data = pci_read_reg(chan, SH4A_PCIETLCTLR);
214 data &= ~0xffff; 250 data &= ~0x3f00;
215 data |= 0x32 << 8; 251 data |= 0x32 << 8;
216 pci_write_reg(chan, data, SH4A_PCIETLCTLR); 252 pci_write_reg(chan, data, SH4A_PCIETLCTLR);
217 253
@@ -224,6 +260,33 @@ static int pcie_init(struct sh7786_pcie_port *port)
224 data |= (0xff << 16); 260 data |= (0xff << 16);
225 pci_write_reg(chan, data, SH4A_PCIEMACCTLR); 261 pci_write_reg(chan, data, SH4A_PCIEMACCTLR);
226 262
263 memphys = __pa(memory_start);
264 memsize = roundup_pow_of_two(memory_end - memory_start);
265
266 /*
267 * If there's more than 512MB of memory, we need to roll over to
268 * LAR1/LAMR1.
269 */
270 if (memsize > SZ_512M) {
271 __raw_writel(memphys + SZ_512M, chan->reg_base + SH4A_PCIELAR1);
272 __raw_writel(((memsize - SZ_512M) - SZ_256) | 1,
273 chan->reg_base + SH4A_PCIELAMR1);
274 memsize = SZ_512M;
275 } else {
276 /*
277 * Otherwise just zero it out and disable it.
278 */
279 __raw_writel(0, chan->reg_base + SH4A_PCIELAR1);
280 __raw_writel(0, chan->reg_base + SH4A_PCIELAMR1);
281 }
282
283 /*
284 * LAR0/LAMR0 covers up to the first 512MB, which is enough to
285 * cover all of lowmem on most platforms.
286 */
287 __raw_writel(memphys, chan->reg_base + SH4A_PCIELAR0);
288 __raw_writel((memsize - SZ_256) | 1, chan->reg_base + SH4A_PCIELAMR0);
289
227 /* Finish initialization */ 290 /* Finish initialization */
228 data = pci_read_reg(chan, SH4A_PCIETCTLR); 291 data = pci_read_reg(chan, SH4A_PCIETCTLR);
229 data |= 0x1; 292 data |= 0x1;
@@ -243,10 +306,14 @@ static int pcie_init(struct sh7786_pcie_port *port)
243 if (unlikely(ret != 0)) 306 if (unlikely(ret != 0))
244 return -ENODEV; 307 return -ENODEV;
245 308
246 pci_write_reg(chan, 0x00100007, SH4A_PCIEPCICONF1); 309 data = pci_read_reg(chan, SH4A_PCIEPCICONF1);
310 data &= ~(PCI_STATUS_DEVSEL_MASK << 16);
311 data |= PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
312 (PCI_STATUS_CAP_LIST | PCI_STATUS_DEVSEL_FAST) << 16;
313 pci_write_reg(chan, data, SH4A_PCIEPCICONF1);
314
247 pci_write_reg(chan, 0x80888000, SH4A_PCIETXVC0DCTLR); 315 pci_write_reg(chan, 0x80888000, SH4A_PCIETXVC0DCTLR);
248 pci_write_reg(chan, 0x00222000, SH4A_PCIERXVC0DCTLR); 316 pci_write_reg(chan, 0x00222000, SH4A_PCIERXVC0DCTLR);
249 pci_write_reg(chan, 0x000050A0, SH4A_PCIEEXPCAP2);
250 317
251 wmb(); 318 wmb();
252 319
@@ -254,15 +321,32 @@ static int pcie_init(struct sh7786_pcie_port *port)
254 printk(KERN_NOTICE "PCI: PCIe#%d link width %d\n", 321 printk(KERN_NOTICE "PCI: PCIe#%d link width %d\n",
255 port->index, (data >> 20) & 0x3f); 322 port->index, (data >> 20) & 0x3f);
256 323
257 pci_write_reg(chan, 0x007c0000, SH4A_PCIEPAMR0);
258 pci_write_reg(chan, 0x00000000, SH4A_PCIEPARH0);
259 pci_write_reg(chan, 0x00000000, SH4A_PCIEPARL0);
260 pci_write_reg(chan, 0x80000100, SH4A_PCIEPTCTLR0);
261 324
262 pci_write_reg(chan, 0x03fc0000, SH4A_PCIEPAMR2); 325 for (i = 0; i < chan->nr_resources; i++) {
263 pci_write_reg(chan, 0x00000000, SH4A_PCIEPARH2); 326 struct resource *res = chan->resources + i;
264 pci_write_reg(chan, 0x00000000, SH4A_PCIEPARL2); 327 resource_size_t size;
265 pci_write_reg(chan, 0x80000000, SH4A_PCIEPTCTLR2); 328 u32 enable_mask;
329
330 pci_write_reg(chan, 0x00000000, SH4A_PCIEPTCTLR(i));
331
332 size = resource_size(res);
333
334 /*
335 * The PAMR mask is calculated in units of 256kB, which
336 * keeps things pretty simple.
337 */
338 __raw_writel(((roundup_pow_of_two(size) / SZ_256K) - 1) << 18,
339 chan->reg_base + SH4A_PCIEPAMR(i));
340
341 pci_write_reg(chan, 0x00000000, SH4A_PCIEPARH(i));
342 pci_write_reg(chan, 0x00000000, SH4A_PCIEPARL(i));
343
344 enable_mask = MASK_PARE;
345 if (res->flags & IORESOURCE_IO)
346 enable_mask |= MASK_SPC;
347
348 pci_write_reg(chan, enable_mask, SH4A_PCIEPTCTLR(i));
349 }
266 350
267 return 0; 351 return 0;
268} 352}
@@ -296,9 +380,7 @@ static int __devinit sh7786_pcie_init_hw(struct sh7786_pcie_port *port)
296 if (unlikely(ret < 0)) 380 if (unlikely(ret < 0))
297 return ret; 381 return ret;
298 382
299 register_pci_controller(port->hose); 383 return register_pci_controller(port->hose);
300
301 return 0;
302} 384}
303 385
304static struct sh7786_pcie_hwops sh7786_65nm_pcie_hwops __initdata = { 386static struct sh7786_pcie_hwops sh7786_65nm_pcie_hwops __initdata = {
@@ -332,17 +414,7 @@ static int __init sh7786_pcie_init(void)
332 414
333 port->index = i; 415 port->index = i;
334 port->hose = sh7786_pci_channels + i; 416 port->hose = sh7786_pci_channels + i;
335 port->hose->io_map_base = port->hose->io_resource->start; 417 port->hose->io_map_base = port->hose->resources[0].start;
336
337 /*
338 * Check if we are booting in 29 or 32-bit mode
339 *
340 * 32-bit mode provides each controller with its own
341 * memory window, while 29-bit mode uses a shared one.
342 */
343 port->hose->mem_resource = test_mode_pin(MODE_PIN10) ?
344 &sh7786_pci_32bit_mem_resources[i] :
345 &sh7786_pci_29bit_mem_resource;
346 418
347 ret |= sh7786_pcie_hwops->port_init_hw(port); 419 ret |= sh7786_pcie_hwops->port_init_hw(port);
348 } 420 }
diff --git a/arch/sh/drivers/pci/pcie-sh7786.h b/arch/sh/drivers/pci/pcie-sh7786.h
index c655290a7750..90a6992576b0 100644
--- a/arch/sh/drivers/pci/pcie-sh7786.h
+++ b/arch/sh/drivers/pci/pcie-sh7786.h
@@ -30,47 +30,9 @@
30 * for other(Max Payload Size=4096B,PCIIO_SIZE=8M) 30 * for other(Max Payload Size=4096B,PCIIO_SIZE=8M)
31 */ 31 */
32 32
33/* PCI0-0: PCI I/O space */
34#define SH4A_PCIIO_BASE 0xFD000000 /* PCI I/O for controller 0 */
35#define SH4A_PCIIO_BASE1 0xFD800000 /* PCI I/O for controller 1 (Rev1.14)*/
36#define SH4A_PCIIO_BASE2 0xFC800000 /* PCI I/O for controller 2 (Rev1.171)*/
37
38#define SH4A_PCIIO_SIZE64 0x00010000 /* PLX allows only 64K */
39#define SH4A_PCIIO_SIZE 0x00800000 /* 8M */
40#define SH4A_PCIIO_SIZE2 0x00400000 /* 4M (Rev1.171)*/
41
42/* PCI0-1: PCI memory space 29-bit address */
43#define SH4A_PCIMEM_BASE 0x10000000
44#define SH4A_PCIMEM_SIZE 0x04000000 /* 64M */
45
46/* PCI0-2: PCI memory space 32-bit address */
47#define SH4A_PCIMEM_BASEA 0xC0000000 /* for controller 0 */
48#define SH4A_PCIMEM_BASEA1 0xA0000000 /* for controller 1 (Rev1.14)*/
49#define SH4A_PCIMEM_BASEA2 0x80000000 /* for controller 2 (Rev1.171)*/
50#define SH4A_PCIMEM_SIZEA 0x20000000 /* 512M */
51
52/* PCI0: PCI memory target transfer 32-bit address translation value(Rev1.11T)*/ 33/* PCI0: PCI memory target transfer 32-bit address translation value(Rev1.11T)*/
53#define SH4A_PCIBMSTR_TRANSLATION 0x20000000 34#define SH4A_PCIBMSTR_TRANSLATION 0x20000000
54 35
55#define SH4A_PCI_DEVICE_ID 0x0002
56#define SH4A_PCI_VENDOR_ID 0x1912
57
58// PCI compatible 000-03f
59#define PCI_CMD 0x004
60#define PCI_RID 0x008
61#define PCI_IBAR 0x010
62#define PCI_MBAR0 0x014
63#define PCI_MBAR1 0x018
64
65/* PCI power management/MSI/capablity 040-0ff */
66/* PCIE extended 100-fff */
67
68/* SH7786 device identification */ // Rev1.171
69#define SH4A_PVR (0xFF000030)
70#define SH4A_PVR_SHX3 (0x10400000)
71#define SH4A_PRR (0xFF000044)
72#define SH4A_PRR_SH7786 (0x00000400) // Rev1.171
73
74/* SPVCR0 */ 36/* SPVCR0 */
75#define SH4A_PCIEVCR0 (0x000000) /* R - 0x0000 0000 32 */ 37#define SH4A_PCIEVCR0 (0x000000) /* R - 0x0000 0000 32 */
76#define BITS_TOP_MB (24) 38#define BITS_TOP_MB (24)
@@ -350,23 +312,23 @@
350#define SH4A_PCIECSAR5 (0x0202B4) /* R/W R/W 0x0000 0000 32 */ 312#define SH4A_PCIECSAR5 (0x0202B4) /* R/W R/W 0x0000 0000 32 */
351#define SH4A_PCIESTCTLR5 (0x0202B8) /* R/W R/W 0x0000 0000 32 */ 313#define SH4A_PCIESTCTLR5 (0x0202B8) /* R/W R/W 0x0000 0000 32 */
352 314
353/* PCIEPARL0 */ 315/* PCIEPARL */
354#define SH4A_PCIEPARL0 (0x020400) /* R/W R/W 0x0000 0000 32 */ 316#define SH4A_PCIEPARL(x) (0x020400 + ((x) * 0x20)) /* R/W R/W 0x0000 0000 32 */
355#define BITS_PAL (18) 317#define BITS_PAL (18)
356#define MASK_PAL (0x3fff<<BITS_PAL) 318#define MASK_PAL (0x3fff<<BITS_PAL)
357 319
358/* PCIEPARH0 */ 320/* PCIEPARH */
359#define SH4A_PCIEPARH0 (0x020404) /* R/W R/W 0x0000 0000 32 */ 321#define SH4A_PCIEPARH(x) (0x020404 + ((x) * 0x20)) /* R/W R/W 0x0000 0000 32 */
360#define BITS_PAH (0) 322#define BITS_PAH (0)
361#define MASK_PAH (0xffffffff<<BITS_PAH) 323#define MASK_PAH (0xffffffff<<BITS_PAH)
362 324
363/* PCIEPAMR0 */ 325/* PCIEPAMR */
364#define SH4A_PCIEPAMR0 (0x020408) /* R/W R/W 0x0000 0000 32 */ 326#define SH4A_PCIEPAMR(x) (0x020408 + ((x) * 0x20)) /* R/W R/W 0x0000 0000 32 */
365#define BITS_PAM (18) 327#define BITS_PAM (18)
366#define MASK_PAM (0x3fff<<BITS_PAM) 328#define MASK_PAM (0x3fff<<BITS_PAM)
367 329
368/* PCIEPTCTLR0 */ 330/* PCIEPTCTLR */
369#define SH4A_PCIEPTCTLR0 (0x02040C) /* R/W R/W 0x0000 0000 32 */ 331#define SH4A_PCIEPTCTLR(x) (0x02040C + ((x) * 0x20))
370#define BITS_PARE (31) 332#define BITS_PARE (31)
371#define MASK_PARE (0x1<<BITS_PARE) 333#define MASK_PARE (0x1<<BITS_PARE)
372#define BITS_TC (20) 334#define BITS_TC (20)
@@ -378,26 +340,6 @@
378#define BITS_SPC (8) 340#define BITS_SPC (8)
379#define MASK_SPC (0x1<<BITS_SPC) 341#define MASK_SPC (0x1<<BITS_SPC)
380 342
381#define SH4A_PCIEPARL1 (0x020420) /* R/W R/W 0x0000 0000 32 */
382#define SH4A_PCIEPARH1 (0x020424) /* R/W R/W 0x0000 0000 32 */
383#define SH4A_PCIEPAMR1 (0x020428) /* R/W R/W 0x0000 0000 32 */
384#define SH4A_PCIEPTCTLR1 (0x02042C) /* R/W R/W 0x0000 0000 32 */
385#define SH4A_PCIEPARL2 (0x020440) /* R/W R/W 0x0000 0000 32 */
386#define SH4A_PCIEPARH2 (0x020444) /* R/W R/W 0x0000 0000 32 */
387#define SH4A_PCIEPAMR2 (0x020448) /* R/W R/W 0x0000 0000 32 */
388#define SH4A_PCIEPTCTLR2 (0x02044C) /* R/W R/W 0x0000 0000 32 */
389#define SH4A_PCIEPARL3 (0x020460) /* R/W R/W 0x0000 0000 32 */
390#define SH4A_PCIEPARH3 (0x020464) /* R/W R/W 0x0000 0000 32 */
391#define SH4A_PCIEPAMR3 (0x020468) /* R/W R/W 0x0000 0000 32 */
392#define SH4A_PCIEPTCTLR3 (0x02046C) /* R/W R/W 0x0000 0000 32 */
393#define SH4A_PCIEPARL4 (0x020480) /* R/W R/W 0x0000 0000 32 */
394#define SH4A_PCIEPARH4 (0x020484) /* R/W R/W 0x0000 0000 32 */
395#define SH4A_PCIEPAMR4 (0x020488) /* R/W R/W 0x0000 0000 32 */
396#define SH4A_PCIEPTCTLR4 (0x02048C) /* R/W R/W 0x0000 0000 32 */
397#define SH4A_PCIEPARL5 (0x0204A0) /* R/W R/W 0x0000 0000 32 */
398#define SH4A_PCIEPARH5 (0x0204A4) /* R/W R/W 0x0000 0000 32 */
399#define SH4A_PCIEPAMR5 (0x0204A8) /* R/W R/W 0x0000 0000 32 */
400#define SH4A_PCIEPTCTLR5 (0x0204AC) /* R/W R/W 0x0000 0000 32 */
401#define SH4A_PCIEDMAOR (0x021000) /* R/W R/W 0x0000 0000 32 */ 343#define SH4A_PCIEDMAOR (0x021000) /* R/W R/W 0x0000 0000 32 */
402#define SH4A_PCIEDMSAR0 (0x021100) /* R/W R/W 0x0000 0000 32 */ 344#define SH4A_PCIEDMSAR0 (0x021100) /* R/W R/W 0x0000 0000 32 */
403#define SH4A_PCIEDMSAHR0 (0x021104) /* R/W R/W 0x0000 0000 32 */ 345#define SH4A_PCIEDMSAHR0 (0x021104) /* R/W R/W 0x0000 0000 32 */
diff --git a/arch/sh/drivers/push-switch.c b/arch/sh/drivers/push-switch.c
index 725be6de589b..7b42c247316c 100644
--- a/arch/sh/drivers/push-switch.c
+++ b/arch/sh/drivers/push-switch.c
@@ -8,6 +8,7 @@
8 * for more details. 8 * for more details.
9 */ 9 */
10#include <linux/init.h> 10#include <linux/init.h>
11#include <linux/slab.h>
11#include <linux/module.h> 12#include <linux/module.h>
12#include <linux/interrupt.h> 13#include <linux/interrupt.h>
13#include <linux/platform_device.h> 14#include <linux/platform_device.h>
diff --git a/arch/sh/drivers/superhyway/ops-sh4-202.c b/arch/sh/drivers/superhyway/ops-sh4-202.c
index 3b14bf860db6..6da62e9475c4 100644
--- a/arch/sh/drivers/superhyway/ops-sh4-202.c
+++ b/arch/sh/drivers/superhyway/ops-sh4-202.c
@@ -134,8 +134,8 @@ static int sh4202_read_vcr(unsigned long base, struct superhyway_vcr_info *vcr)
134 * 134 *
135 * Do not trust the documentation, for it is evil. 135 * Do not trust the documentation, for it is evil.
136 */ 136 */
137 vcrh = ctrl_inl(base); 137 vcrh = __raw_readl(base);
138 vcrl = ctrl_inl(base + sizeof(u32)); 138 vcrl = __raw_readl(base + sizeof(u32));
139 139
140 tmp = ((u64)vcrh << 32) | vcrl; 140 tmp = ((u64)vcrh << 32) | vcrl;
141 memcpy(vcr, &tmp, sizeof(u64)); 141 memcpy(vcr, &tmp, sizeof(u64));
@@ -147,8 +147,8 @@ static int sh4202_write_vcr(unsigned long base, struct superhyway_vcr_info vcr)
147{ 147{
148 u64 tmp = *(u64 *)&vcr; 148 u64 tmp = *(u64 *)&vcr;
149 149
150 ctrl_outl((tmp >> 32) & 0xffffffff, base); 150 __raw_writel((tmp >> 32) & 0xffffffff, base);
151 ctrl_outl(tmp & 0xffffffff, base + sizeof(u32)); 151 __raw_writel(tmp & 0xffffffff, base + sizeof(u32));
152 152
153 return 0; 153 return 0;
154} 154}
diff --git a/arch/sh/include/asm/.gitignore b/arch/sh/include/asm/.gitignore
deleted file mode 100644
index 378db779fb6c..000000000000
--- a/arch/sh/include/asm/.gitignore
+++ /dev/null
@@ -1 +0,0 @@
1machtypes.h
diff --git a/arch/sh/include/asm/Kbuild b/arch/sh/include/asm/Kbuild
index e121c30f797d..46cb93477bcb 100644
--- a/arch/sh/include/asm/Kbuild
+++ b/arch/sh/include/asm/Kbuild
@@ -1,6 +1,8 @@
1include include/asm-generic/Kbuild.asm 1include include/asm-generic/Kbuild.asm
2 2
3header-y += cachectl.h cpu-features.h 3header-y += cachectl.h
4header-y += cpu-features.h
5header-y += hw_breakpoint.h
4 6
5unifdef-y += unistd_32.h 7unifdef-y += unistd_32.h
6unifdef-y += unistd_64.h 8unifdef-y += unistd_64.h
diff --git a/arch/sh/include/asm/addrspace.h b/arch/sh/include/asm/addrspace.h
index 80d40813e057..446b3831c214 100644
--- a/arch/sh/include/asm/addrspace.h
+++ b/arch/sh/include/asm/addrspace.h
@@ -28,10 +28,7 @@
28/* Returns the privileged segment base of a given address */ 28/* Returns the privileged segment base of a given address */
29#define PXSEG(a) (((unsigned long)(a)) & 0xe0000000) 29#define PXSEG(a) (((unsigned long)(a)) & 0xe0000000)
30 30
31/* Returns the physical address of a PnSEG (n=1,2) address */ 31#ifdef CONFIG_29BIT
32#define PHYSADDR(a) (((unsigned long)(a)) & 0x1fffffff)
33
34#if defined(CONFIG_29BIT) || defined(CONFIG_PMB_FIXED)
35/* 32/*
36 * Map an address to a certain privileged segment 33 * Map an address to a certain privileged segment
37 */ 34 */
@@ -43,7 +40,15 @@
43 ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P3SEG)) 40 ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P3SEG))
44#define P4SEGADDR(a) \ 41#define P4SEGADDR(a) \
45 ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P4SEG)) 42 ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P4SEG))
46#endif /* 29BIT || PMB_FIXED */ 43#else
44/*
45 * These will never work in 32-bit, don't even bother.
46 */
47#define P1SEGADDR(a) __futile_remapping_attempt
48#define P2SEGADDR(a) __futile_remapping_attempt
49#define P3SEGADDR(a) __futile_remapping_attempt
50#define P4SEGADDR(a) __futile_remapping_attempt
51#endif
47#endif /* P1SEG */ 52#endif /* P1SEG */
48 53
49/* Check if an address can be reached in 29 bits */ 54/* Check if an address can be reached in 29 bits */
diff --git a/arch/sh/include/asm/alignment.h b/arch/sh/include/asm/alignment.h
new file mode 100644
index 000000000000..b12efecf5294
--- /dev/null
+++ b/arch/sh/include/asm/alignment.h
@@ -0,0 +1,21 @@
1#ifndef __ASM_SH_ALIGNMENT_H
2#define __ASM_SH_ALIGNMENT_H
3
4#include <linux/types.h>
5
6extern void inc_unaligned_byte_access(void);
7extern void inc_unaligned_word_access(void);
8extern void inc_unaligned_dword_access(void);
9extern void inc_unaligned_multi_access(void);
10extern void inc_unaligned_user_access(void);
11extern void inc_unaligned_kernel_access(void);
12
13#define UM_WARN (1 << 0)
14#define UM_FIXUP (1 << 1)
15#define UM_SIGNAL (1 << 2)
16
17extern unsigned int unaligned_user_action(void);
18
19extern void unaligned_fixups_notify(struct task_struct *, insn_size_t, struct pt_regs *);
20
21#endif /* __ASM_SH_ALIGNMENT_H */
diff --git a/arch/sh/include/asm/asm-offsets.h b/arch/sh/include/asm/asm-offsets.h
new file mode 100644
index 000000000000..d370ee36a182
--- /dev/null
+++ b/arch/sh/include/asm/asm-offsets.h
@@ -0,0 +1 @@
#include <generated/asm-offsets.h>
diff --git a/arch/sh/include/asm/atomic-grb.h b/arch/sh/include/asm/atomic-grb.h
index 4c5b7dbfcedb..a273c88578fc 100644
--- a/arch/sh/include/asm/atomic-grb.h
+++ b/arch/sh/include/asm/atomic-grb.h
@@ -120,50 +120,4 @@ static inline void atomic_set_mask(unsigned int mask, atomic_t *v)
120 : "memory" , "r0", "r1"); 120 : "memory" , "r0", "r1");
121} 121}
122 122
123static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
124{
125 int ret;
126
127 __asm__ __volatile__ (
128 " .align 2 \n\t"
129 " mova 1f, r0 \n\t"
130 " nop \n\t"
131 " mov r15, r1 \n\t"
132 " mov #-8, r15 \n\t"
133 " mov.l @%1, %0 \n\t"
134 " cmp/eq %2, %0 \n\t"
135 " bf 1f \n\t"
136 " mov.l %3, @%1 \n\t"
137 "1: mov r1, r15 \n\t"
138 : "=&r" (ret)
139 : "r" (v), "r" (old), "r" (new)
140 : "memory" , "r0", "r1" , "t");
141
142 return ret;
143}
144
145static inline int atomic_add_unless(atomic_t *v, int a, int u)
146{
147 int ret;
148 unsigned long tmp;
149
150 __asm__ __volatile__ (
151 " .align 2 \n\t"
152 " mova 1f, r0 \n\t"
153 " nop \n\t"
154 " mov r15, r1 \n\t"
155 " mov #-12, r15 \n\t"
156 " mov.l @%2, %1 \n\t"
157 " mov %1, %0 \n\t"
158 " cmp/eq %4, %0 \n\t"
159 " bt/s 1f \n\t"
160 " add %3, %1 \n\t"
161 " mov.l %1, @%2 \n\t"
162 "1: mov r1, r15 \n\t"
163 : "=&r" (ret), "=&r" (tmp)
164 : "r" (v), "r" (a), "r" (u)
165 : "memory" , "r0", "r1" , "t");
166
167 return ret != u;
168}
169#endif /* __ASM_SH_ATOMIC_GRB_H */ 123#endif /* __ASM_SH_ATOMIC_GRB_H */
diff --git a/arch/sh/include/asm/atomic-llsc.h b/arch/sh/include/asm/atomic-llsc.h
index b040e1e08610..4b00b78e3f4f 100644
--- a/arch/sh/include/asm/atomic-llsc.h
+++ b/arch/sh/include/asm/atomic-llsc.h
@@ -104,31 +104,4 @@ static inline void atomic_set_mask(unsigned int mask, atomic_t *v)
104 : "t"); 104 : "t");
105} 105}
106 106
107#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
108
109/**
110 * atomic_add_unless - add unless the number is a given value
111 * @v: pointer of type atomic_t
112 * @a: the amount to add to v...
113 * @u: ...unless v is equal to u.
114 *
115 * Atomically adds @a to @v, so long as it was not @u.
116 * Returns non-zero if @v was not @u, and zero otherwise.
117 */
118static inline int atomic_add_unless(atomic_t *v, int a, int u)
119{
120 int c, old;
121 c = atomic_read(v);
122 for (;;) {
123 if (unlikely(c == (u)))
124 break;
125 old = atomic_cmpxchg((v), c, c + (a));
126 if (likely(old == c))
127 break;
128 c = old;
129 }
130
131 return c != (u);
132}
133
134#endif /* __ASM_SH_ATOMIC_LLSC_H */ 107#endif /* __ASM_SH_ATOMIC_LLSC_H */
diff --git a/arch/sh/include/asm/atomic.h b/arch/sh/include/asm/atomic.h
index e8e78137c6f5..275a448ae8c2 100644
--- a/arch/sh/include/asm/atomic.h
+++ b/arch/sh/include/asm/atomic.h
@@ -25,64 +25,48 @@
25#endif 25#endif
26 26
27#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0) 27#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0)
28#define atomic_dec_return(v) atomic_sub_return(1, (v))
29#define atomic_inc_return(v) atomic_add_return(1, (v))
30#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
31#define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0)
32#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0)
33#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
28 34
29#define atomic_dec_return(v) atomic_sub_return(1,(v)) 35#define atomic_inc(v) atomic_add(1, (v))
30#define atomic_inc_return(v) atomic_add_return(1,(v)) 36#define atomic_dec(v) atomic_sub(1, (v))
31 37
32/* 38#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
33 * atomic_inc_and_test - increment and test 39#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
40
41/**
42 * atomic_add_unless - add unless the number is a given value
34 * @v: pointer of type atomic_t 43 * @v: pointer of type atomic_t
44 * @a: the amount to add to v...
45 * @u: ...unless v is equal to u.
35 * 46 *
36 * Atomically increments @v by 1 47 * Atomically adds @a to @v, so long as it was not @u.
37 * and returns true if the result is zero, or false for all 48 * Returns non-zero if @v was not @u, and zero otherwise.
38 * other cases.
39 */ 49 */
40#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
41
42#define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0)
43#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0)
44
45#define atomic_inc(v) atomic_add(1,(v))
46#define atomic_dec(v) atomic_sub(1,(v))
47
48#if !defined(CONFIG_GUSA_RB) && !defined(CONFIG_CPU_SH4A)
49static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
50{
51 int ret;
52 unsigned long flags;
53
54 local_irq_save(flags);
55 ret = v->counter;
56 if (likely(ret == old))
57 v->counter = new;
58 local_irq_restore(flags);
59
60 return ret;
61}
62
63static inline int atomic_add_unless(atomic_t *v, int a, int u) 50static inline int atomic_add_unless(atomic_t *v, int a, int u)
64{ 51{
65 int ret; 52 int c, old;
66 unsigned long flags; 53 c = atomic_read(v);
67 54 for (;;) {
68 local_irq_save(flags); 55 if (unlikely(c == (u)))
69 ret = v->counter; 56 break;
70 if (ret != u) 57 old = atomic_cmpxchg((v), c, c + (a));
71 v->counter += a; 58 if (likely(old == c))
72 local_irq_restore(flags); 59 break;
73 60 c = old;
74 return ret != u; 61 }
62
63 return c != (u);
75} 64}
76#endif /* !CONFIG_GUSA_RB && !CONFIG_CPU_SH4A */
77
78#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
79#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
80 65
81/* Atomic operations are already serializing on SH */ 66#define smp_mb__before_atomic_dec() smp_mb()
82#define smp_mb__before_atomic_dec() barrier() 67#define smp_mb__after_atomic_dec() smp_mb()
83#define smp_mb__after_atomic_dec() barrier() 68#define smp_mb__before_atomic_inc() smp_mb()
84#define smp_mb__before_atomic_inc() barrier() 69#define smp_mb__after_atomic_inc() smp_mb()
85#define smp_mb__after_atomic_inc() barrier()
86 70
87#include <asm-generic/atomic-long.h> 71#include <asm-generic/atomic-long.h>
88#include <asm-generic/atomic64.h> 72#include <asm-generic/atomic64.h>
diff --git a/arch/sh/include/asm/bitops.h b/arch/sh/include/asm/bitops.h
index ebe595b7ab1f..98511e4d28cb 100644
--- a/arch/sh/include/asm/bitops.h
+++ b/arch/sh/include/asm/bitops.h
@@ -26,8 +26,8 @@
26/* 26/*
27 * clear_bit() doesn't provide any barrier for the compiler. 27 * clear_bit() doesn't provide any barrier for the compiler.
28 */ 28 */
29#define smp_mb__before_clear_bit() barrier() 29#define smp_mb__before_clear_bit() smp_mb()
30#define smp_mb__after_clear_bit() barrier() 30#define smp_mb__after_clear_bit() smp_mb()
31 31
32#ifdef CONFIG_SUPERH32 32#ifdef CONFIG_SUPERH32
33static inline unsigned long ffz(unsigned long word) 33static inline unsigned long ffz(unsigned long word)
diff --git a/arch/sh/include/asm/bugs.h b/arch/sh/include/asm/bugs.h
index 46260fcbdf4b..02a19a1c033a 100644
--- a/arch/sh/include/asm/bugs.h
+++ b/arch/sh/include/asm/bugs.h
@@ -14,11 +14,15 @@
14 14
15#include <asm/processor.h> 15#include <asm/processor.h>
16 16
17extern void select_idle_routine(void);
18
17static void __init check_bugs(void) 19static void __init check_bugs(void)
18{ 20{
19 extern unsigned long loops_per_jiffy; 21 extern unsigned long loops_per_jiffy;
20 char *p = &init_utsname()->machine[2]; /* "sh" */ 22 char *p = &init_utsname()->machine[2]; /* "sh" */
21 23
24 select_idle_routine();
25
22 current_cpu_data.loops_per_jiffy = loops_per_jiffy; 26 current_cpu_data.loops_per_jiffy = loops_per_jiffy;
23 27
24 switch (current_cpu_data.family) { 28 switch (current_cpu_data.family) {
diff --git a/arch/sh/include/asm/cacheflush.h b/arch/sh/include/asm/cacheflush.h
index c29918f3c819..1f4e562c5e8c 100644
--- a/arch/sh/include/asm/cacheflush.h
+++ b/arch/sh/include/asm/cacheflush.h
@@ -42,6 +42,7 @@ extern void flush_cache_page(struct vm_area_struct *vma,
42 unsigned long addr, unsigned long pfn); 42 unsigned long addr, unsigned long pfn);
43extern void flush_cache_range(struct vm_area_struct *vma, 43extern void flush_cache_range(struct vm_area_struct *vma,
44 unsigned long start, unsigned long end); 44 unsigned long start, unsigned long end);
45#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
45extern void flush_dcache_page(struct page *page); 46extern void flush_dcache_page(struct page *page);
46extern void flush_icache_range(unsigned long start, unsigned long end); 47extern void flush_icache_range(unsigned long start, unsigned long end);
47extern void flush_icache_page(struct vm_area_struct *vma, 48extern void flush_icache_page(struct vm_area_struct *vma,
@@ -62,6 +63,14 @@ static inline void flush_anon_page(struct vm_area_struct *vma,
62 if (boot_cpu_data.dcache.n_aliases && PageAnon(page)) 63 if (boot_cpu_data.dcache.n_aliases && PageAnon(page))
63 __flush_anon_page(page, vmaddr); 64 __flush_anon_page(page, vmaddr);
64} 65}
66static inline void flush_kernel_vmap_range(void *addr, int size)
67{
68 __flush_wback_region(addr, size);
69}
70static inline void invalidate_kernel_vmap_range(void *addr, int size)
71{
72 __flush_invalidate_region(addr, size);
73}
65 74
66#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE 75#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE
67static inline void flush_kernel_dcache_page(struct page *page) 76static inline void flush_kernel_dcache_page(struct page *page)
@@ -77,8 +86,8 @@ extern void copy_from_user_page(struct vm_area_struct *vma,
77 struct page *page, unsigned long vaddr, void *dst, const void *src, 86 struct page *page, unsigned long vaddr, void *dst, const void *src,
78 unsigned long len); 87 unsigned long len);
79 88
80#define flush_cache_vmap(start, end) flush_cache_all() 89#define flush_cache_vmap(start, end) local_flush_cache_all(NULL)
81#define flush_cache_vunmap(start, end) flush_cache_all() 90#define flush_cache_vunmap(start, end) local_flush_cache_all(NULL)
82 91
83#define flush_dcache_mmap_lock(mapping) do { } while (0) 92#define flush_dcache_mmap_lock(mapping) do { } while (0)
84#define flush_dcache_mmap_unlock(mapping) do { } while (0) 93#define flush_dcache_mmap_unlock(mapping) do { } while (0)
diff --git a/arch/sh/include/asm/clock.h b/arch/sh/include/asm/clock.h
index 9fe7d7f8af40..11da4c5beb68 100644
--- a/arch/sh/include/asm/clock.h
+++ b/arch/sh/include/asm/clock.h
@@ -146,8 +146,17 @@ int sh_clk_mstp32_register(struct clk *clks, int nr);
146 .flags = _flags, \ 146 .flags = _flags, \
147} 147}
148 148
149struct clk_div4_table {
150 struct clk_div_mult_table *div_mult_table;
151 void (*kick)(struct clk *clk);
152};
153
149int sh_clk_div4_register(struct clk *clks, int nr, 154int sh_clk_div4_register(struct clk *clks, int nr,
150 struct clk_div_mult_table *table); 155 struct clk_div4_table *table);
156int sh_clk_div4_enable_register(struct clk *clks, int nr,
157 struct clk_div4_table *table);
158int sh_clk_div4_reparent_register(struct clk *clks, int nr,
159 struct clk_div4_table *table);
151 160
152#define SH_CLK_DIV6(_name, _parent, _reg, _flags) \ 161#define SH_CLK_DIV6(_name, _parent, _reg, _flags) \
153{ \ 162{ \
diff --git a/arch/sh/include/asm/cmpxchg-grb.h b/arch/sh/include/asm/cmpxchg-grb.h
index e2681abe764f..4676bf57693a 100644
--- a/arch/sh/include/asm/cmpxchg-grb.h
+++ b/arch/sh/include/asm/cmpxchg-grb.h
@@ -57,11 +57,10 @@ static inline unsigned long __cmpxchg_u32(volatile int *m, unsigned long old,
57 " mov.l @%1, %0 \n\t" /* load old value */ 57 " mov.l @%1, %0 \n\t" /* load old value */
58 " cmp/eq %0, %2 \n\t" 58 " cmp/eq %0, %2 \n\t"
59 " bf 1f \n\t" /* if not equal */ 59 " bf 1f \n\t" /* if not equal */
60 " mov.l %2, @%1 \n\t" /* store new value */ 60 " mov.l %3, @%1 \n\t" /* store new value */
61 "1: mov r1, r15 \n\t" /* LOGOUT */ 61 "1: mov r1, r15 \n\t" /* LOGOUT */
62 : "=&r" (retval), 62 : "=&r" (retval)
63 "+r" (m) 63 : "r" (m), "r" (old), "r" (new)
64 : "r" (new)
65 : "memory" , "r0", "r1", "t"); 64 : "memory" , "r0", "r1", "t");
66 65
67 return retval; 66 return retval;
diff --git a/arch/sh/include/asm/dma-mapping.h b/arch/sh/include/asm/dma-mapping.h
index 69d56dd4c968..bea3337a426a 100644
--- a/arch/sh/include/asm/dma-mapping.h
+++ b/arch/sh/include/asm/dma-mapping.h
@@ -1,219 +1,106 @@
1#ifndef __ASM_SH_DMA_MAPPING_H 1#ifndef __ASM_SH_DMA_MAPPING_H
2#define __ASM_SH_DMA_MAPPING_H 2#define __ASM_SH_DMA_MAPPING_H
3 3
4#include <linux/mm.h> 4extern struct dma_map_ops *dma_ops;
5#include <linux/scatterlist.h> 5extern void no_iommu_init(void);
6#include <linux/dma-debug.h> 6
7#include <asm/cacheflush.h> 7static inline struct dma_map_ops *get_dma_ops(struct device *dev)
8#include <asm/io.h> 8{
9 return dma_ops;
10}
11
9#include <asm-generic/dma-coherent.h> 12#include <asm-generic/dma-coherent.h>
13#include <asm-generic/dma-mapping-common.h>
14
15static inline int dma_supported(struct device *dev, u64 mask)
16{
17 struct dma_map_ops *ops = get_dma_ops(dev);
10 18
11extern struct bus_type pci_bus_type; 19 if (ops->dma_supported)
20 return ops->dma_supported(dev, mask);
12 21
13#define dma_supported(dev, mask) (1) 22 return 1;
23}
14 24
15static inline int dma_set_mask(struct device *dev, u64 mask) 25static inline int dma_set_mask(struct device *dev, u64 mask)
16{ 26{
27 struct dma_map_ops *ops = get_dma_ops(dev);
28
17 if (!dev->dma_mask || !dma_supported(dev, mask)) 29 if (!dev->dma_mask || !dma_supported(dev, mask))
18 return -EIO; 30 return -EIO;
31 if (ops->set_dma_mask)
32 return ops->set_dma_mask(dev, mask);
19 33
20 *dev->dma_mask = mask; 34 *dev->dma_mask = mask;
21 35
22 return 0; 36 return 0;
23} 37}
24 38
25void *dma_alloc_coherent(struct device *dev, size_t size,
26 dma_addr_t *dma_handle, gfp_t flag);
27
28void dma_free_coherent(struct device *dev, size_t size,
29 void *vaddr, dma_addr_t dma_handle);
30
31void dma_cache_sync(struct device *dev, void *vaddr, size_t size, 39void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
32 enum dma_data_direction dir); 40 enum dma_data_direction dir);
33 41
34#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) 42#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
35#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) 43#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
36#define dma_is_consistent(d, h) (1)
37
38static inline dma_addr_t dma_map_single(struct device *dev,
39 void *ptr, size_t size,
40 enum dma_data_direction dir)
41{
42 dma_addr_t addr = virt_to_phys(ptr);
43
44#if defined(CONFIG_PCI) && !defined(CONFIG_SH_PCIDMA_NONCOHERENT)
45 if (dev->bus == &pci_bus_type)
46 return addr;
47#endif
48 dma_cache_sync(dev, ptr, size, dir);
49 44
50 debug_dma_map_page(dev, virt_to_page(ptr), 45#ifdef CONFIG_DMA_COHERENT
51 (unsigned long)ptr & ~PAGE_MASK, size, 46#define dma_is_consistent(d, h) (1)
52 dir, addr, true); 47#else
53 48#define dma_is_consistent(d, h) (0)
54 return addr;
55}
56
57static inline void dma_unmap_single(struct device *dev, dma_addr_t addr,
58 size_t size, enum dma_data_direction dir)
59{
60 debug_dma_unmap_page(dev, addr, size, dir, true);
61}
62
63static inline int dma_map_sg(struct device *dev, struct scatterlist *sg,
64 int nents, enum dma_data_direction dir)
65{
66 int i;
67
68 for (i = 0; i < nents; i++) {
69#if !defined(CONFIG_PCI) || defined(CONFIG_SH_PCIDMA_NONCOHERENT)
70 dma_cache_sync(dev, sg_virt(&sg[i]), sg[i].length, dir);
71#endif
72 sg[i].dma_address = sg_phys(&sg[i]);
73 sg[i].dma_length = sg[i].length;
74 }
75
76 debug_dma_map_sg(dev, sg, nents, i, dir);
77
78 return nents;
79}
80
81static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
82 int nents, enum dma_data_direction dir)
83{
84 debug_dma_unmap_sg(dev, sg, nents, dir);
85}
86
87static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
88 unsigned long offset, size_t size,
89 enum dma_data_direction dir)
90{
91 return dma_map_single(dev, page_address(page) + offset, size, dir);
92}
93
94static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
95 size_t size, enum dma_data_direction dir)
96{
97 dma_unmap_single(dev, dma_address, size, dir);
98}
99
100static inline void __dma_sync_single(struct device *dev, dma_addr_t dma_handle,
101 size_t size, enum dma_data_direction dir)
102{
103#if defined(CONFIG_PCI) && !defined(CONFIG_SH_PCIDMA_NONCOHERENT)
104 if (dev->bus == &pci_bus_type)
105 return;
106#endif 49#endif
107 dma_cache_sync(dev, phys_to_virt(dma_handle), size, dir);
108}
109 50
110static inline void dma_sync_single_range(struct device *dev, 51static inline int dma_get_cache_alignment(void)
111 dma_addr_t dma_handle,
112 unsigned long offset, size_t size,
113 enum dma_data_direction dir)
114{ 52{
115#if defined(CONFIG_PCI) && !defined(CONFIG_SH_PCIDMA_NONCOHERENT) 53 /*
116 if (dev->bus == &pci_bus_type) 54 * Each processor family will define its own L1_CACHE_SHIFT,
117 return; 55 * L1_CACHE_BYTES wraps to this, so this is always safe.
118#endif 56 */
119 dma_cache_sync(dev, phys_to_virt(dma_handle) + offset, size, dir); 57 return L1_CACHE_BYTES;
120} 58}
121 59
122static inline void __dma_sync_sg(struct device *dev, struct scatterlist *sg, 60static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
123 int nelems, enum dma_data_direction dir)
124{ 61{
125 int i; 62 struct dma_map_ops *ops = get_dma_ops(dev);
126 63
127 for (i = 0; i < nelems; i++) { 64 if (ops->mapping_error)
128#if !defined(CONFIG_PCI) || defined(CONFIG_SH_PCIDMA_NONCOHERENT) 65 return ops->mapping_error(dev, dma_addr);
129 dma_cache_sync(dev, sg_virt(&sg[i]), sg[i].length, dir);
130#endif
131 sg[i].dma_address = sg_phys(&sg[i]);
132 sg[i].dma_length = sg[i].length;
133 }
134}
135 66
136static inline void dma_sync_single_for_cpu(struct device *dev, 67 return dma_addr == 0;
137 dma_addr_t dma_handle, size_t size,
138 enum dma_data_direction dir)
139{
140 __dma_sync_single(dev, dma_handle, size, dir);
141 debug_dma_sync_single_for_cpu(dev, dma_handle, size, dir);
142}
143
144static inline void dma_sync_single_for_device(struct device *dev,
145 dma_addr_t dma_handle,
146 size_t size,
147 enum dma_data_direction dir)
148{
149 __dma_sync_single(dev, dma_handle, size, dir);
150 debug_dma_sync_single_for_device(dev, dma_handle, size, dir);
151} 68}
152 69
153static inline void dma_sync_single_range_for_cpu(struct device *dev, 70static inline void *dma_alloc_coherent(struct device *dev, size_t size,
154 dma_addr_t dma_handle, 71 dma_addr_t *dma_handle, gfp_t gfp)
155 unsigned long offset,
156 size_t size,
157 enum dma_data_direction direction)
158{ 72{
159 dma_sync_single_for_cpu(dev, dma_handle+offset, size, direction); 73 struct dma_map_ops *ops = get_dma_ops(dev);
160 debug_dma_sync_single_range_for_cpu(dev, dma_handle, 74 void *memory;
161 offset, size, direction);
162}
163 75
164static inline void dma_sync_single_range_for_device(struct device *dev, 76 if (dma_alloc_from_coherent(dev, size, dma_handle, &memory))
165 dma_addr_t dma_handle, 77 return memory;
166 unsigned long offset, 78 if (!ops->alloc_coherent)
167 size_t size, 79 return NULL;
168 enum dma_data_direction direction)
169{
170 dma_sync_single_for_device(dev, dma_handle+offset, size, direction);
171 debug_dma_sync_single_range_for_device(dev, dma_handle,
172 offset, size, direction);
173}
174 80
81 memory = ops->alloc_coherent(dev, size, dma_handle, gfp);
82 debug_dma_alloc_coherent(dev, size, *dma_handle, memory);
175 83
176static inline void dma_sync_sg_for_cpu(struct device *dev, 84 return memory;
177 struct scatterlist *sg, int nelems,
178 enum dma_data_direction dir)
179{
180 __dma_sync_sg(dev, sg, nelems, dir);
181 debug_dma_sync_sg_for_cpu(dev, sg, nelems, dir);
182} 85}
183 86
184static inline void dma_sync_sg_for_device(struct device *dev, 87static inline void dma_free_coherent(struct device *dev, size_t size,
185 struct scatterlist *sg, int nelems, 88 void *vaddr, dma_addr_t dma_handle)
186 enum dma_data_direction dir)
187{ 89{
188 __dma_sync_sg(dev, sg, nelems, dir); 90 struct dma_map_ops *ops = get_dma_ops(dev);
189 debug_dma_sync_sg_for_device(dev, sg, nelems, dir);
190}
191 91
192static inline int dma_get_cache_alignment(void) 92 if (dma_release_from_coherent(dev, get_order(size), vaddr))
193{ 93 return;
194 /*
195 * Each processor family will define its own L1_CACHE_SHIFT,
196 * L1_CACHE_BYTES wraps to this, so this is always safe.
197 */
198 return L1_CACHE_BYTES;
199}
200 94
201static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) 95 debug_dma_free_coherent(dev, size, vaddr, dma_handle);
202{ 96 if (ops->free_coherent)
203 return dma_addr == 0; 97 ops->free_coherent(dev, size, vaddr, dma_handle);
204} 98}
205 99
206#define ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY 100/* arch/sh/mm/consistent.c */
207 101extern void *dma_generic_alloc_coherent(struct device *dev, size_t size,
208extern int 102 dma_addr_t *dma_addr, gfp_t flag);
209dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr, 103extern void dma_generic_free_coherent(struct device *dev, size_t size,
210 dma_addr_t device_addr, size_t size, int flags); 104 void *vaddr, dma_addr_t dma_handle);
211
212extern void
213dma_release_declared_memory(struct device *dev);
214
215extern void *
216dma_mark_declared_memory_occupied(struct device *dev,
217 dma_addr_t device_addr, size_t size);
218 105
219#endif /* __ASM_SH_DMA_MAPPING_H */ 106#endif /* __ASM_SH_DMA_MAPPING_H */
diff --git a/arch/sh/include/asm/dma-register.h b/arch/sh/include/asm/dma-register.h
new file mode 100644
index 000000000000..51cd78feacff
--- /dev/null
+++ b/arch/sh/include/asm/dma-register.h
@@ -0,0 +1,51 @@
1/*
2 * Common header for the legacy SH DMA driver and the new dmaengine driver
3 *
4 * extracted from arch/sh/include/asm/dma-sh.h:
5 *
6 * Copyright (C) 2000 Takashi YOSHII
7 * Copyright (C) 2003 Paul Mundt
8 *
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file "COPYING" in the main directory of this archive
11 * for more details.
12 */
13#ifndef DMA_REGISTER_H
14#define DMA_REGISTER_H
15
16/* DMA register */
17#define SAR 0x00
18#define DAR 0x04
19#define TCR 0x08
20#define CHCR 0x0C
21#define DMAOR 0x40
22
23/* DMAOR definitions */
24#define DMAOR_AE 0x00000004
25#define DMAOR_NMIF 0x00000002
26#define DMAOR_DME 0x00000001
27
28/* Definitions for the SuperH DMAC */
29#define REQ_L 0x00000000
30#define REQ_E 0x00080000
31#define RACK_H 0x00000000
32#define RACK_L 0x00040000
33#define ACK_R 0x00000000
34#define ACK_W 0x00020000
35#define ACK_H 0x00000000
36#define ACK_L 0x00010000
37#define DM_INC 0x00004000
38#define DM_DEC 0x00008000
39#define DM_FIX 0x0000c000
40#define SM_INC 0x00001000
41#define SM_DEC 0x00002000
42#define SM_FIX 0x00003000
43#define RS_IN 0x00000200
44#define RS_OUT 0x00000300
45#define TS_BLK 0x00000040
46#define TM_BUR 0x00000020
47#define CHCR_DE 0x00000001
48#define CHCR_TE 0x00000002
49#define CHCR_IE 0x00000004
50
51#endif
diff --git a/arch/sh/include/asm/dma-sh.h b/arch/sh/include/asm/dma-sh.h
index 78eed3e0bdf5..f3acb8e34c6b 100644
--- a/arch/sh/include/asm/dma-sh.h
+++ b/arch/sh/include/asm/dma-sh.h
@@ -11,7 +11,8 @@
11#ifndef __DMA_SH_H 11#ifndef __DMA_SH_H
12#define __DMA_SH_H 12#define __DMA_SH_H
13 13
14#include <asm/dma.h> 14#include <asm/dma-register.h>
15#include <cpu/dma-register.h>
15#include <cpu/dma.h> 16#include <cpu/dma.h>
16 17
17/* DMAOR contorl: The DMAOR access size is different by CPU.*/ 18/* DMAOR contorl: The DMAOR access size is different by CPU.*/
@@ -20,14 +21,14 @@
20 defined(CONFIG_CPU_SUBTYPE_SH7780) || \ 21 defined(CONFIG_CPU_SUBTYPE_SH7780) || \
21 defined(CONFIG_CPU_SUBTYPE_SH7785) 22 defined(CONFIG_CPU_SUBTYPE_SH7785)
22#define dmaor_read_reg(n) \ 23#define dmaor_read_reg(n) \
23 (n ? ctrl_inw(SH_DMAC_BASE1 + DMAOR) \ 24 (n ? __raw_readw(SH_DMAC_BASE1 + DMAOR) \
24 : ctrl_inw(SH_DMAC_BASE0 + DMAOR)) 25 : __raw_readw(SH_DMAC_BASE0 + DMAOR))
25#define dmaor_write_reg(n, data) \ 26#define dmaor_write_reg(n, data) \
26 (n ? ctrl_outw(data, SH_DMAC_BASE1 + DMAOR) \ 27 (n ? __raw_writew(data, SH_DMAC_BASE1 + DMAOR) \
27 : ctrl_outw(data, SH_DMAC_BASE0 + DMAOR)) 28 : __raw_writew(data, SH_DMAC_BASE0 + DMAOR))
28#else /* Other CPU */ 29#else /* Other CPU */
29#define dmaor_read_reg(n) ctrl_inw(SH_DMAC_BASE0 + DMAOR) 30#define dmaor_read_reg(n) __raw_readw(SH_DMAC_BASE0 + DMAOR)
30#define dmaor_write_reg(n, data) ctrl_outw(data, SH_DMAC_BASE0 + DMAOR) 31#define dmaor_write_reg(n, data) __raw_writew(data, SH_DMAC_BASE0 + DMAOR)
31#endif 32#endif
32 33
33static int dmte_irq_map[] __maybe_unused = { 34static int dmte_irq_map[] __maybe_unused = {
@@ -53,37 +54,11 @@ static int dmte_irq_map[] __maybe_unused = {
53#endif 54#endif
54}; 55};
55 56
56/* Definitions for the SuperH DMAC */
57#define REQ_L 0x00000000
58#define REQ_E 0x00080000
59#define RACK_H 0x00000000
60#define RACK_L 0x00040000
61#define ACK_R 0x00000000
62#define ACK_W 0x00020000
63#define ACK_H 0x00000000
64#define ACK_L 0x00010000
65#define DM_INC 0x00004000
66#define DM_DEC 0x00008000
67#define SM_INC 0x00001000
68#define SM_DEC 0x00002000
69#define RS_IN 0x00000200
70#define RS_OUT 0x00000300
71#define TS_BLK 0x00000040
72#define TM_BUR 0x00000020
73#define CHCR_DE 0x00000001
74#define CHCR_TE 0x00000002
75#define CHCR_IE 0x00000004
76
77/* DMAOR definitions */
78#define DMAOR_AE 0x00000004
79#define DMAOR_NMIF 0x00000002
80#define DMAOR_DME 0x00000001
81
82/* 57/*
83 * Define the default configuration for dual address memory-memory transfer. 58 * Define the default configuration for dual address memory-memory transfer.
84 * The 0x400 value represents auto-request, external->external. 59 * The 0x400 value represents auto-request, external->external.
85 */ 60 */
86#define RS_DUAL (DM_INC | SM_INC | 0x400 | TS_32) 61#define RS_DUAL (DM_INC | SM_INC | 0x400 | TS_INDEX2VAL(XMIT_SZ_32BIT))
87 62
88/* DMA base address */ 63/* DMA base address */
89static u32 dma_base_addr[] __maybe_unused = { 64static u32 dma_base_addr[] __maybe_unused = {
@@ -109,24 +84,4 @@ static u32 dma_base_addr[] __maybe_unused = {
109#endif 84#endif
110}; 85};
111 86
112/* DMA register */
113#define SAR 0x00
114#define DAR 0x04
115#define TCR 0x08
116#define CHCR 0x0C
117#define DMAOR 0x40
118
119/*
120 * for dma engine
121 *
122 * SuperH DMA mode
123 */
124#define SHDMA_MIX_IRQ (1 << 1)
125#define SHDMA_DMAOR1 (1 << 2)
126#define SHDMA_DMAE1 (1 << 3)
127
128struct sh_dmae_pdata {
129 unsigned int mode;
130};
131
132#endif /* __DMA_SH_H */ 87#endif /* __DMA_SH_H */
diff --git a/arch/sh/include/asm/dma.h b/arch/sh/include/asm/dma.h
index 04ad0e1e637e..07373a074090 100644
--- a/arch/sh/include/asm/dma.h
+++ b/arch/sh/include/asm/dma.h
@@ -19,9 +19,11 @@
19#include <asm-generic/dma.h> 19#include <asm-generic/dma.h>
20 20
21#ifdef CONFIG_NR_DMA_CHANNELS 21#ifdef CONFIG_NR_DMA_CHANNELS
22# define MAX_DMA_CHANNELS (CONFIG_NR_DMA_CHANNELS) 22# define MAX_DMA_CHANNELS (CONFIG_NR_DMA_CHANNELS)
23#elif defined(CONFIG_NR_ONCHIP_DMA_CHANNELS)
24# define MAX_DMA_CHANNELS (CONFIG_NR_ONCHIP_DMA_CHANNELS)
23#else 25#else
24# define MAX_DMA_CHANNELS (CONFIG_NR_ONCHIP_DMA_CHANNELS) 26# define MAX_DMA_CHANNELS 0
25#endif 27#endif
26 28
27/* 29/*
diff --git a/arch/sh/include/asm/dmaengine.h b/arch/sh/include/asm/dmaengine.h
new file mode 100644
index 000000000000..bf2f30cf0a27
--- /dev/null
+++ b/arch/sh/include/asm/dmaengine.h
@@ -0,0 +1,93 @@
1/*
2 * Header for the new SH dmaengine driver
3 *
4 * Copyright (C) 2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef ASM_DMAENGINE_H
11#define ASM_DMAENGINE_H
12
13#include <linux/dmaengine.h>
14#include <linux/list.h>
15
16#include <asm/dma-register.h>
17
18#define SH_DMAC_MAX_CHANNELS 6
19
20enum sh_dmae_slave_chan_id {
21 SHDMA_SLAVE_SCIF0_TX,
22 SHDMA_SLAVE_SCIF0_RX,
23 SHDMA_SLAVE_SCIF1_TX,
24 SHDMA_SLAVE_SCIF1_RX,
25 SHDMA_SLAVE_SCIF2_TX,
26 SHDMA_SLAVE_SCIF2_RX,
27 SHDMA_SLAVE_SCIF3_TX,
28 SHDMA_SLAVE_SCIF3_RX,
29 SHDMA_SLAVE_SCIF4_TX,
30 SHDMA_SLAVE_SCIF4_RX,
31 SHDMA_SLAVE_SCIF5_TX,
32 SHDMA_SLAVE_SCIF5_RX,
33 SHDMA_SLAVE_SIUA_TX,
34 SHDMA_SLAVE_SIUA_RX,
35 SHDMA_SLAVE_SIUB_TX,
36 SHDMA_SLAVE_SIUB_RX,
37 SHDMA_SLAVE_NUMBER, /* Must stay last */
38};
39
40struct sh_dmae_slave_config {
41 enum sh_dmae_slave_chan_id slave_id;
42 dma_addr_t addr;
43 u32 chcr;
44 char mid_rid;
45};
46
47struct sh_dmae_channel {
48 unsigned int offset;
49 unsigned int dmars;
50 unsigned int dmars_bit;
51};
52
53struct sh_dmae_pdata {
54 struct sh_dmae_slave_config *slave;
55 int slave_num;
56 struct sh_dmae_channel *channel;
57 int channel_num;
58 unsigned int ts_low_shift;
59 unsigned int ts_low_mask;
60 unsigned int ts_high_shift;
61 unsigned int ts_high_mask;
62 unsigned int *ts_shift;
63 int ts_shift_num;
64 u16 dmaor_init;
65};
66
67struct device;
68
69/* Used by slave DMA clients to request DMA to/from a specific peripheral */
70struct sh_dmae_slave {
71 enum sh_dmae_slave_chan_id slave_id; /* Set by the platform */
72 struct device *dma_dev; /* Set by the platform */
73 struct sh_dmae_slave_config *config; /* Set by the driver */
74};
75
76struct sh_dmae_regs {
77 u32 sar; /* SAR / source address */
78 u32 dar; /* DAR / destination address */
79 u32 tcr; /* TCR / transfer count */
80};
81
82struct sh_desc {
83 struct sh_dmae_regs hw;
84 struct list_head node;
85 struct dma_async_tx_descriptor async_tx;
86 enum dma_data_direction direction;
87 dma_cookie_t cookie;
88 size_t partial;
89 int chunks;
90 int mark;
91};
92
93#endif
diff --git a/arch/sh/include/asm/dwarf.h b/arch/sh/include/asm/dwarf.h
index ced6795891a6..d62abd1d0c05 100644
--- a/arch/sh/include/asm/dwarf.h
+++ b/arch/sh/include/asm/dwarf.h
@@ -194,6 +194,12 @@
194#define DWARF_ARCH_RA_REG 17 194#define DWARF_ARCH_RA_REG 17
195 195
196#ifndef __ASSEMBLY__ 196#ifndef __ASSEMBLY__
197
198#include <linux/compiler.h>
199#include <linux/bug.h>
200#include <linux/list.h>
201#include <linux/module.h>
202
197/* 203/*
198 * Read either the frame pointer (r14) or the stack pointer (r15). 204 * Read either the frame pointer (r14) or the stack pointer (r15).
199 * NOTE: this MUST be inlined. 205 * NOTE: this MUST be inlined.
@@ -237,10 +243,13 @@ struct dwarf_cie {
237 243
238 unsigned long cie_pointer; 244 unsigned long cie_pointer;
239 245
240 struct list_head link;
241
242 unsigned long flags; 246 unsigned long flags;
243#define DWARF_CIE_Z_AUGMENTATION (1 << 0) 247#define DWARF_CIE_Z_AUGMENTATION (1 << 0)
248
249 /* linked-list entry if this CIE is from a module */
250 struct list_head link;
251
252 struct rb_node node;
244}; 253};
245 254
246/** 255/**
@@ -254,7 +263,11 @@ struct dwarf_fde {
254 unsigned long address_range; 263 unsigned long address_range;
255 unsigned char *instructions; 264 unsigned char *instructions;
256 unsigned char *end; 265 unsigned char *end;
266
267 /* linked-list entry if this FDE is from a module */
257 struct list_head link; 268 struct list_head link;
269
270 struct rb_node node;
258}; 271};
259 272
260/** 273/**
@@ -364,6 +377,12 @@ static inline unsigned int DW_CFA_operand(unsigned long insn)
364 377
365extern struct dwarf_frame *dwarf_unwind_stack(unsigned long, 378extern struct dwarf_frame *dwarf_unwind_stack(unsigned long,
366 struct dwarf_frame *); 379 struct dwarf_frame *);
380extern void dwarf_free_frame(struct dwarf_frame *);
381
382extern int module_dwarf_finalize(const Elf_Ehdr *, const Elf_Shdr *,
383 struct module *);
384extern void module_dwarf_cleanup(struct module *);
385
367#endif /* !__ASSEMBLY__ */ 386#endif /* !__ASSEMBLY__ */
368 387
369#define CFI_STARTPROC .cfi_startproc 388#define CFI_STARTPROC .cfi_startproc
@@ -391,6 +410,10 @@ extern struct dwarf_frame *dwarf_unwind_stack(unsigned long,
391static inline void dwarf_unwinder_init(void) 410static inline void dwarf_unwinder_init(void)
392{ 411{
393} 412}
413
414#define module_dwarf_finalize(hdr, sechdrs, me) (0)
415#define module_dwarf_cleanup(mod) do { } while (0)
416
394#endif 417#endif
395 418
396#endif /* CONFIG_DWARF_UNWINDER */ 419#endif /* CONFIG_DWARF_UNWINDER */
diff --git a/arch/sh/include/asm/elf.h b/arch/sh/include/asm/elf.h
index ccb1d93bb043..ce830faeebbf 100644
--- a/arch/sh/include/asm/elf.h
+++ b/arch/sh/include/asm/elf.h
@@ -114,7 +114,6 @@ typedef struct user_fpu_struct elf_fpregset_t;
114 */ 114 */
115#define CORE_DUMP_USE_REGSET 115#define CORE_DUMP_USE_REGSET
116 116
117#define USE_ELF_CORE_DUMP
118#define ELF_FDPIC_CORE_EFLAGS EF_SH_FDPIC 117#define ELF_FDPIC_CORE_EFLAGS EF_SH_FDPIC
119#define ELF_EXEC_PAGESIZE PAGE_SIZE 118#define ELF_EXEC_PAGESIZE PAGE_SIZE
120 119
@@ -212,7 +211,9 @@ extern void __kernel_vsyscall;
212 211
213#define VSYSCALL_AUX_ENT \ 212#define VSYSCALL_AUX_ENT \
214 if (vdso_enabled) \ 213 if (vdso_enabled) \
215 NEW_AUX_ENT(AT_SYSINFO_EHDR, VDSO_BASE); 214 NEW_AUX_ENT(AT_SYSINFO_EHDR, VDSO_BASE); \
215 else \
216 NEW_AUX_ENT(AT_IGNORE, 0);
216#else 217#else
217#define VSYSCALL_AUX_ENT 218#define VSYSCALL_AUX_ENT
218#endif /* CONFIG_VSYSCALL */ 219#endif /* CONFIG_VSYSCALL */
@@ -220,7 +221,7 @@ extern void __kernel_vsyscall;
220#ifdef CONFIG_SH_FPU 221#ifdef CONFIG_SH_FPU
221#define FPU_AUX_ENT NEW_AUX_ENT(AT_FPUCW, FPSCR_INIT) 222#define FPU_AUX_ENT NEW_AUX_ENT(AT_FPUCW, FPSCR_INIT)
222#else 223#else
223#define FPU_AUX_ENT 224#define FPU_AUX_ENT NEW_AUX_ENT(AT_IGNORE, 0)
224#endif 225#endif
225 226
226extern int l1i_cache_shape, l1d_cache_shape, l2_cache_shape; 227extern int l1i_cache_shape, l1d_cache_shape, l2_cache_shape;
diff --git a/arch/sh/include/asm/fixmap.h b/arch/sh/include/asm/fixmap.h
index 721fcc4d5e98..6e7cea453895 100644
--- a/arch/sh/include/asm/fixmap.h
+++ b/arch/sh/include/asm/fixmap.h
@@ -14,9 +14,9 @@
14#define _ASM_FIXMAP_H 14#define _ASM_FIXMAP_H
15 15
16#include <linux/kernel.h> 16#include <linux/kernel.h>
17#include <linux/threads.h>
17#include <asm/page.h> 18#include <asm/page.h>
18#ifdef CONFIG_HIGHMEM 19#ifdef CONFIG_HIGHMEM
19#include <linux/threads.h>
20#include <asm/kmap_types.h> 20#include <asm/kmap_types.h>
21#endif 21#endif
22 22
@@ -46,19 +46,38 @@
46 * fix-mapped? 46 * fix-mapped?
47 */ 47 */
48enum fixed_addresses { 48enum fixed_addresses {
49#define FIX_N_COLOURS 16 49 /*
50 * The FIX_CMAP entries are used by kmap_coherent() to get virtual
51 * addresses which are of a known color, and so their values are
52 * important. __fix_to_virt(FIX_CMAP_END - n) must give an address
53 * which is the same color as a page (n<<PAGE_SHIFT).
54 */
55#define FIX_N_COLOURS 8
50 FIX_CMAP_BEGIN, 56 FIX_CMAP_BEGIN,
51 FIX_CMAP_END = FIX_CMAP_BEGIN + FIX_N_COLOURS, 57 FIX_CMAP_END = FIX_CMAP_BEGIN + (FIX_N_COLOURS * NR_CPUS) - 1,
52 FIX_UNCACHED, 58
53#ifdef CONFIG_HIGHMEM 59#ifdef CONFIG_HIGHMEM
54 FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */ 60 FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */
55 FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1, 61 FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1,
56#endif 62#endif
63
64#ifdef CONFIG_IOREMAP_FIXED
65 /*
66 * FIX_IOREMAP entries are useful for mapping physical address
67 * space before ioremap() is useable, e.g. really early in boot
68 * before kmalloc() is working.
69 */
70#define FIX_N_IOREMAPS 32
71 FIX_IOREMAP_BEGIN,
72 FIX_IOREMAP_END = FIX_IOREMAP_BEGIN + FIX_N_IOREMAPS,
73#endif
74
57 __end_of_fixed_addresses 75 __end_of_fixed_addresses
58}; 76};
59 77
60extern void __set_fixmap(enum fixed_addresses idx, 78extern void __set_fixmap(enum fixed_addresses idx,
61 unsigned long phys, pgprot_t flags); 79 unsigned long phys, pgprot_t flags);
80extern void __clear_fixmap(enum fixed_addresses idx, pgprot_t flags);
62 81
63#define set_fixmap(idx, phys) \ 82#define set_fixmap(idx, phys) \
64 __set_fixmap(idx, phys, PAGE_KERNEL) 83 __set_fixmap(idx, phys, PAGE_KERNEL)
diff --git a/arch/sh/include/asm/fpu.h b/arch/sh/include/asm/fpu.h
index 1d3aee04b5cc..06c4281aab65 100644
--- a/arch/sh/include/asm/fpu.h
+++ b/arch/sh/include/asm/fpu.h
@@ -2,8 +2,8 @@
2#define __ASM_SH_FPU_H 2#define __ASM_SH_FPU_H
3 3
4#ifndef __ASSEMBLY__ 4#ifndef __ASSEMBLY__
5#include <linux/preempt.h> 5
6#include <asm/ptrace.h> 6struct task_struct;
7 7
8#ifdef CONFIG_SH_FPU 8#ifdef CONFIG_SH_FPU
9static inline void release_fpu(struct pt_regs *regs) 9static inline void release_fpu(struct pt_regs *regs)
@@ -16,59 +16,56 @@ static inline void grab_fpu(struct pt_regs *regs)
16 regs->sr &= ~SR_FD; 16 regs->sr &= ~SR_FD;
17} 17}
18 18
19struct task_struct; 19extern void save_fpu(struct task_struct *__tsk);
20 20extern void restore_fpu(struct task_struct *__tsk);
21extern void save_fpu(struct task_struct *__tsk, struct pt_regs *regs); 21extern void fpu_state_restore(struct pt_regs *regs);
22extern void __fpu_state_restore(void);
22#else 23#else
23 24#define save_fpu(tsk) do { } while (0)
24#define release_fpu(regs) do { } while (0) 25#define restore_fpu(tsk) do { } while (0)
25#define grab_fpu(regs) do { } while (0) 26#define release_fpu(regs) do { } while (0)
26 27#define grab_fpu(regs) do { } while (0)
27static inline void save_fpu(struct task_struct *tsk, struct pt_regs *regs) 28#define fpu_state_restore(regs) do { } while (0)
28{ 29#define __fpu_state_restore(regs) do { } while (0)
29 clear_tsk_thread_flag(tsk, TIF_USEDFPU);
30}
31#endif 30#endif
32 31
33struct user_regset; 32struct user_regset;
34 33
35extern int do_fpu_inst(unsigned short, struct pt_regs *); 34extern int do_fpu_inst(unsigned short, struct pt_regs *);
35extern int init_fpu(struct task_struct *);
36 36
37extern int fpregs_get(struct task_struct *target, 37extern int fpregs_get(struct task_struct *target,
38 const struct user_regset *regset, 38 const struct user_regset *regset,
39 unsigned int pos, unsigned int count, 39 unsigned int pos, unsigned int count,
40 void *kbuf, void __user *ubuf); 40 void *kbuf, void __user *ubuf);
41 41
42static inline void __unlazy_fpu(struct task_struct *tsk, struct pt_regs *regs)
43{
44 if (task_thread_info(tsk)->status & TS_USEDFPU) {
45 task_thread_info(tsk)->status &= ~TS_USEDFPU;
46 save_fpu(tsk);
47 release_fpu(regs);
48 } else
49 tsk->fpu_counter = 0;
50}
51
42static inline void unlazy_fpu(struct task_struct *tsk, struct pt_regs *regs) 52static inline void unlazy_fpu(struct task_struct *tsk, struct pt_regs *regs)
43{ 53{
44 preempt_disable(); 54 preempt_disable();
45 if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) 55 __unlazy_fpu(tsk, regs);
46 save_fpu(tsk, regs);
47 preempt_enable(); 56 preempt_enable();
48} 57}
49 58
50static inline void clear_fpu(struct task_struct *tsk, struct pt_regs *regs) 59static inline void clear_fpu(struct task_struct *tsk, struct pt_regs *regs)
51{ 60{
52 preempt_disable(); 61 preempt_disable();
53 if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { 62 if (task_thread_info(tsk)->status & TS_USEDFPU) {
54 clear_tsk_thread_flag(tsk, TIF_USEDFPU); 63 task_thread_info(tsk)->status &= ~TS_USEDFPU;
55 release_fpu(regs); 64 release_fpu(regs);
56 } 65 }
57 preempt_enable(); 66 preempt_enable();
58} 67}
59 68
60static inline int init_fpu(struct task_struct *tsk)
61{
62 if (tsk_used_math(tsk)) {
63 if ((boot_cpu_data.flags & CPU_HAS_FPU) && tsk == current)
64 unlazy_fpu(tsk, task_pt_regs(tsk));
65 return 0;
66 }
67
68 set_stopped_child_used_math(tsk);
69 return 0;
70}
71
72#endif /* __ASSEMBLY__ */ 69#endif /* __ASSEMBLY__ */
73 70
74#endif /* __ASM_SH_FPU_H */ 71#endif /* __ASM_SH_FPU_H */
diff --git a/arch/sh/include/asm/ftrace.h b/arch/sh/include/asm/ftrace.h
index 12f3a31f20af..13e9966464c2 100644
--- a/arch/sh/include/asm/ftrace.h
+++ b/arch/sh/include/asm/ftrace.h
@@ -35,4 +35,21 @@ static inline unsigned long ftrace_call_adjust(unsigned long addr)
35#endif /* __ASSEMBLY__ */ 35#endif /* __ASSEMBLY__ */
36#endif /* CONFIG_FUNCTION_TRACER */ 36#endif /* CONFIG_FUNCTION_TRACER */
37 37
38#ifndef __ASSEMBLY__
39
40/* arch/sh/kernel/return_address.c */
41extern void *return_address(unsigned int);
42
43#define HAVE_ARCH_CALLER_ADDR
44
45#define CALLER_ADDR0 ((unsigned long)__builtin_return_address(0))
46#define CALLER_ADDR1 ((unsigned long)return_address(1))
47#define CALLER_ADDR2 ((unsigned long)return_address(2))
48#define CALLER_ADDR3 ((unsigned long)return_address(3))
49#define CALLER_ADDR4 ((unsigned long)return_address(4))
50#define CALLER_ADDR5 ((unsigned long)return_address(5))
51#define CALLER_ADDR6 ((unsigned long)return_address(6))
52
53#endif /* __ASSEMBLY__ */
54
38#endif /* __ASM_SH_FTRACE_H */ 55#endif /* __ASM_SH_FTRACE_H */
diff --git a/arch/sh/include/asm/gpio.h b/arch/sh/include/asm/gpio.h
index 61f93da2c62e..f8d9a731e903 100644
--- a/arch/sh/include/asm/gpio.h
+++ b/arch/sh/include/asm/gpio.h
@@ -20,7 +20,7 @@
20#endif 20#endif
21 21
22#define ARCH_NR_GPIOS 512 22#define ARCH_NR_GPIOS 512
23#include <asm-generic/gpio.h> 23#include <linux/sh_pfc.h>
24 24
25#ifdef CONFIG_GPIOLIB 25#ifdef CONFIG_GPIOLIB
26 26
@@ -53,84 +53,4 @@ static inline int irq_to_gpio(unsigned int irq)
53 53
54#endif /* CONFIG_GPIOLIB */ 54#endif /* CONFIG_GPIOLIB */
55 55
56typedef unsigned short pinmux_enum_t;
57typedef unsigned short pinmux_flag_t;
58
59#define PINMUX_TYPE_NONE 0
60#define PINMUX_TYPE_FUNCTION 1
61#define PINMUX_TYPE_GPIO 2
62#define PINMUX_TYPE_OUTPUT 3
63#define PINMUX_TYPE_INPUT 4
64#define PINMUX_TYPE_INPUT_PULLUP 5
65#define PINMUX_TYPE_INPUT_PULLDOWN 6
66
67#define PINMUX_FLAG_TYPE (0x7)
68#define PINMUX_FLAG_WANT_PULLUP (1 << 3)
69#define PINMUX_FLAG_WANT_PULLDOWN (1 << 4)
70
71#define PINMUX_FLAG_DBIT_SHIFT 5
72#define PINMUX_FLAG_DBIT (0x1f << PINMUX_FLAG_DBIT_SHIFT)
73#define PINMUX_FLAG_DREG_SHIFT 10
74#define PINMUX_FLAG_DREG (0x3f << PINMUX_FLAG_DREG_SHIFT)
75
76struct pinmux_gpio {
77 pinmux_enum_t enum_id;
78 pinmux_flag_t flags;
79};
80
81#define PINMUX_GPIO(gpio, data_or_mark) [gpio] = { data_or_mark }
82#define PINMUX_DATA(data_or_mark, ids...) data_or_mark, ids, 0
83
84struct pinmux_cfg_reg {
85 unsigned long reg, reg_width, field_width;
86 unsigned long *cnt;
87 pinmux_enum_t *enum_ids;
88};
89
90#define PINMUX_CFG_REG(name, r, r_width, f_width) \
91 .reg = r, .reg_width = r_width, .field_width = f_width, \
92 .cnt = (unsigned long [r_width / f_width]) {}, \
93 .enum_ids = (pinmux_enum_t [(r_width / f_width) * (1 << f_width)]) \
94
95struct pinmux_data_reg {
96 unsigned long reg, reg_width, reg_shadow;
97 pinmux_enum_t *enum_ids;
98};
99
100#define PINMUX_DATA_REG(name, r, r_width) \
101 .reg = r, .reg_width = r_width, \
102 .enum_ids = (pinmux_enum_t [r_width]) \
103
104struct pinmux_range {
105 pinmux_enum_t begin;
106 pinmux_enum_t end;
107 pinmux_enum_t force;
108};
109
110struct pinmux_info {
111 char *name;
112 pinmux_enum_t reserved_id;
113 struct pinmux_range data;
114 struct pinmux_range input;
115 struct pinmux_range input_pd;
116 struct pinmux_range input_pu;
117 struct pinmux_range output;
118 struct pinmux_range mark;
119 struct pinmux_range function;
120
121 unsigned first_gpio, last_gpio;
122
123 struct pinmux_gpio *gpios;
124 struct pinmux_cfg_reg *cfg_regs;
125 struct pinmux_data_reg *data_regs;
126
127 pinmux_enum_t *gpio_data;
128 unsigned int gpio_data_size;
129
130 unsigned long *gpio_in_use;
131 struct gpio_chip chip;
132};
133
134int register_pinmux(struct pinmux_info *pip);
135
136#endif /* __ASM_SH_GPIO_H */ 56#endif /* __ASM_SH_GPIO_H */
diff --git a/arch/sh/include/asm/hardirq.h b/arch/sh/include/asm/hardirq.h
index a5be4afa790b..48b191313a99 100644
--- a/arch/sh/include/asm/hardirq.h
+++ b/arch/sh/include/asm/hardirq.h
@@ -1,9 +1,16 @@
1#ifndef __ASM_SH_HARDIRQ_H 1#ifndef __ASM_SH_HARDIRQ_H
2#define __ASM_SH_HARDIRQ_H 2#define __ASM_SH_HARDIRQ_H
3 3
4extern void ack_bad_irq(unsigned int irq); 4#include <linux/threads.h>
5#define ack_bad_irq ack_bad_irq 5#include <linux/irq.h>
6
7typedef struct {
8 unsigned int __softirq_pending;
9 unsigned int __nmi_count; /* arch dependent */
10} ____cacheline_aligned irq_cpustat_t;
6 11
7#include <asm-generic/hardirq.h> 12#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
13
14extern void ack_bad_irq(unsigned int irq);
8 15
9#endif /* __ASM_SH_HARDIRQ_H */ 16#endif /* __ASM_SH_HARDIRQ_H */
diff --git a/arch/sh/include/asm/hw_breakpoint.h b/arch/sh/include/asm/hw_breakpoint.h
new file mode 100644
index 000000000000..965dd780d51b
--- /dev/null
+++ b/arch/sh/include/asm/hw_breakpoint.h
@@ -0,0 +1,67 @@
1#ifndef __ASM_SH_HW_BREAKPOINT_H
2#define __ASM_SH_HW_BREAKPOINT_H
3
4#ifdef __KERNEL__
5#define __ARCH_HW_BREAKPOINT_H
6
7#include <linux/kdebug.h>
8#include <linux/types.h>
9
10struct arch_hw_breakpoint {
11 char *name; /* Contains name of the symbol to set bkpt */
12 unsigned long address;
13 u16 len;
14 u16 type;
15};
16
17enum {
18 SH_BREAKPOINT_READ = (1 << 1),
19 SH_BREAKPOINT_WRITE = (1 << 2),
20 SH_BREAKPOINT_RW = SH_BREAKPOINT_READ | SH_BREAKPOINT_WRITE,
21
22 SH_BREAKPOINT_LEN_1 = (1 << 12),
23 SH_BREAKPOINT_LEN_2 = (1 << 13),
24 SH_BREAKPOINT_LEN_4 = SH_BREAKPOINT_LEN_1 | SH_BREAKPOINT_LEN_2,
25 SH_BREAKPOINT_LEN_8 = (1 << 14),
26};
27
28struct sh_ubc {
29 const char *name;
30 unsigned int num_events;
31 unsigned int trap_nr;
32 void (*enable)(struct arch_hw_breakpoint *, int);
33 void (*disable)(struct arch_hw_breakpoint *, int);
34 void (*enable_all)(unsigned long);
35 void (*disable_all)(void);
36 unsigned long (*active_mask)(void);
37 unsigned long (*triggered_mask)(void);
38 void (*clear_triggered_mask)(unsigned long);
39 struct clk *clk; /* optional interface clock / MSTP bit */
40};
41
42struct perf_event;
43struct task_struct;
44struct pmu;
45
46/* Maximum number of UBC channels */
47#define HBP_NUM 2
48
49/* arch/sh/kernel/hw_breakpoint.c */
50extern int arch_check_va_in_userspace(unsigned long va, u16 hbp_len);
51extern int arch_validate_hwbkpt_settings(struct perf_event *bp,
52 struct task_struct *tsk);
53extern int hw_breakpoint_exceptions_notify(struct notifier_block *unused,
54 unsigned long val, void *data);
55
56int arch_install_hw_breakpoint(struct perf_event *bp);
57void arch_uninstall_hw_breakpoint(struct perf_event *bp);
58void hw_breakpoint_pmu_read(struct perf_event *bp);
59void hw_breakpoint_pmu_unthrottle(struct perf_event *bp);
60
61extern void arch_fill_perf_breakpoint(struct perf_event *bp);
62extern int register_sh_ubc(struct sh_ubc *);
63
64extern struct pmu perf_ops_bp;
65
66#endif /* __KERNEL__ */
67#endif /* __ASM_SH_HW_BREAKPOINT_H */
diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h
index 5be45ea4dfec..f689554e17c1 100644
--- a/arch/sh/include/asm/io.h
+++ b/arch/sh/include/asm/io.h
@@ -22,6 +22,7 @@
22 * for old compat code for I/O offseting to SuperIOs, all of which are 22 * for old compat code for I/O offseting to SuperIOs, all of which are
23 * better handled through the machvec ioport mapping routines these days. 23 * better handled through the machvec ioport mapping routines these days.
24 */ 24 */
25#include <linux/errno.h>
25#include <asm/cache.h> 26#include <asm/cache.h>
26#include <asm/system.h> 27#include <asm/system.h>
27#include <asm/addrspace.h> 28#include <asm/addrspace.h>
@@ -79,28 +80,81 @@
79#define writel(v,a) ({ __raw_writel((v),(a)); mb(); }) 80#define writel(v,a) ({ __raw_writel((v),(a)); mb(); })
80#define writeq(v,a) ({ __raw_writeq((v),(a)); mb(); }) 81#define writeq(v,a) ({ __raw_writeq((v),(a)); mb(); })
81 82
82/* SuperH on-chip I/O functions */ 83/*
83#define ctrl_inb __raw_readb 84 * Legacy SuperH on-chip I/O functions
84#define ctrl_inw __raw_readw 85 *
85#define ctrl_inl __raw_readl 86 * These are all deprecated, all new (and especially cross-platform) code
86#define ctrl_inq __raw_readq 87 * should be using the __raw_xxx() routines directly.
88 */
89static inline u8 __deprecated ctrl_inb(unsigned long addr)
90{
91 return __raw_readb(addr);
92}
93
94static inline u16 __deprecated ctrl_inw(unsigned long addr)
95{
96 return __raw_readw(addr);
97}
98
99static inline u32 __deprecated ctrl_inl(unsigned long addr)
100{
101 return __raw_readl(addr);
102}
103
104static inline u64 __deprecated ctrl_inq(unsigned long addr)
105{
106 return __raw_readq(addr);
107}
108
109static inline void __deprecated ctrl_outb(u8 v, unsigned long addr)
110{
111 __raw_writeb(v, addr);
112}
87 113
88#define ctrl_outb __raw_writeb 114static inline void __deprecated ctrl_outw(u16 v, unsigned long addr)
89#define ctrl_outw __raw_writew 115{
90#define ctrl_outl __raw_writel 116 __raw_writew(v, addr);
91#define ctrl_outq __raw_writeq 117}
118
119static inline void __deprecated ctrl_outl(u32 v, unsigned long addr)
120{
121 __raw_writel(v, addr);
122}
123
124static inline void __deprecated ctrl_outq(u64 v, unsigned long addr)
125{
126 __raw_writeq(v, addr);
127}
128
129extern unsigned long generic_io_base;
92 130
93static inline void ctrl_delay(void) 131static inline void ctrl_delay(void)
94{ 132{
95#ifdef CONFIG_CPU_SH4 133 __raw_readw(generic_io_base);
96 __raw_readw(CCN_PVR);
97#elif defined(P2SEG)
98 __raw_readw(P2SEG);
99#else
100#error "Need a dummy address for delay"
101#endif
102} 134}
103 135
136#define __BUILD_UNCACHED_IO(bwlq, type) \
137static inline type read##bwlq##_uncached(unsigned long addr) \
138{ \
139 type ret; \
140 jump_to_uncached(); \
141 ret = __raw_read##bwlq(addr); \
142 back_to_cached(); \
143 return ret; \
144} \
145 \
146static inline void write##bwlq##_uncached(type v, unsigned long addr) \
147{ \
148 jump_to_uncached(); \
149 __raw_write##bwlq(v, addr); \
150 back_to_cached(); \
151}
152
153__BUILD_UNCACHED_IO(b, u8)
154__BUILD_UNCACHED_IO(w, u16)
155__BUILD_UNCACHED_IO(l, u32)
156__BUILD_UNCACHED_IO(q, u64)
157
104#define __BUILD_MEMORY_STRING(bwlq, type) \ 158#define __BUILD_MEMORY_STRING(bwlq, type) \
105 \ 159 \
106static inline void __raw_writes##bwlq(volatile void __iomem *mem, \ 160static inline void __raw_writes##bwlq(volatile void __iomem *mem, \
@@ -186,8 +240,6 @@ __BUILD_MEMORY_STRING(q, u64)
186 240
187#define IO_SPACE_LIMIT 0xffffffff 241#define IO_SPACE_LIMIT 0xffffffff
188 242
189extern unsigned long generic_io_base;
190
191/* 243/*
192 * This function provides a method for the generic case where a 244 * This function provides a method for the generic case where a
193 * board-specific ioport_map simply needs to return the port + some 245 * board-specific ioport_map simply needs to return the port + some
@@ -239,23 +291,22 @@ unsigned long long poke_real_address_q(unsigned long long addr,
239 * doesn't exist, so everything must go through page tables. 291 * doesn't exist, so everything must go through page tables.
240 */ 292 */
241#ifdef CONFIG_MMU 293#ifdef CONFIG_MMU
242void __iomem *__ioremap(unsigned long offset, unsigned long size, 294void __iomem *__ioremap_caller(phys_addr_t offset, unsigned long size,
243 unsigned long flags); 295 pgprot_t prot, void *caller);
244void __iounmap(void __iomem *addr); 296void __iounmap(void __iomem *addr);
245 297
246static inline void __iomem * 298static inline void __iomem *
247__ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags) 299__ioremap(phys_addr_t offset, unsigned long size, pgprot_t prot)
248{ 300{
249#if defined(CONFIG_SUPERH32) && !defined(CONFIG_PMB_FIXED) 301 return __ioremap_caller(offset, size, prot, __builtin_return_address(0));
250 unsigned long last_addr = offset + size - 1; 302}
251#endif
252 void __iomem *ret;
253 303
254 ret = __ioremap_trapped(offset, size); 304static inline void __iomem *
255 if (ret) 305__ioremap_29bit(phys_addr_t offset, unsigned long size, pgprot_t prot)
256 return ret; 306{
307#ifdef CONFIG_29BIT
308 phys_addr_t last_addr = offset + size - 1;
257 309
258#if defined(CONFIG_SUPERH32) && !defined(CONFIG_PMB_FIXED)
259 /* 310 /*
260 * For P1 and P2 space this is trivial, as everything is already 311 * For P1 and P2 space this is trivial, as everything is already
261 * mapped. Uncached access for P1 addresses are done through P2. 312 * mapped. Uncached access for P1 addresses are done through P2.
@@ -263,7 +314,7 @@ __ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags)
263 * mapping must be done by the PMB or by using page tables. 314 * mapping must be done by the PMB or by using page tables.
264 */ 315 */
265 if (likely(PXSEG(offset) < P3SEG && PXSEG(last_addr) < P3SEG)) { 316 if (likely(PXSEG(offset) < P3SEG && PXSEG(last_addr) < P3SEG)) {
266 if (unlikely(flags & _PAGE_CACHABLE)) 317 if (unlikely(pgprot_val(prot) & _PAGE_CACHABLE))
267 return (void __iomem *)P1SEGADDR(offset); 318 return (void __iomem *)P1SEGADDR(offset);
268 319
269 return (void __iomem *)P2SEGADDR(offset); 320 return (void __iomem *)P2SEGADDR(offset);
@@ -274,25 +325,67 @@ __ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags)
274 return (void __iomem *)P4SEGADDR(offset); 325 return (void __iomem *)P4SEGADDR(offset);
275#endif 326#endif
276 327
277 return __ioremap(offset, size, flags); 328 return NULL;
329}
330
331static inline void __iomem *
332__ioremap_mode(phys_addr_t offset, unsigned long size, pgprot_t prot)
333{
334 void __iomem *ret;
335
336 ret = __ioremap_trapped(offset, size);
337 if (ret)
338 return ret;
339
340 ret = __ioremap_29bit(offset, size, prot);
341 if (ret)
342 return ret;
343
344 return __ioremap(offset, size, prot);
278} 345}
279#else 346#else
280#define __ioremap_mode(offset, size, flags) ((void __iomem *)(offset)) 347#define __ioremap(offset, size, prot) ((void __iomem *)(offset))
348#define __ioremap_mode(offset, size, prot) ((void __iomem *)(offset))
281#define __iounmap(addr) do { } while (0) 349#define __iounmap(addr) do { } while (0)
282#endif /* CONFIG_MMU */ 350#endif /* CONFIG_MMU */
283 351
284#define ioremap(offset, size) \ 352static inline void __iomem *ioremap(phys_addr_t offset, unsigned long size)
285 __ioremap_mode((offset), (size), 0) 353{
286#define ioremap_nocache(offset, size) \ 354 return __ioremap_mode(offset, size, PAGE_KERNEL_NOCACHE);
287 __ioremap_mode((offset), (size), 0) 355}
288#define ioremap_cache(offset, size) \ 356
289 __ioremap_mode((offset), (size), _PAGE_CACHABLE) 357static inline void __iomem *
290#define p3_ioremap(offset, size, flags) \ 358ioremap_cache(phys_addr_t offset, unsigned long size)
291 __ioremap((offset), (size), (flags)) 359{
292#define ioremap_prot(offset, size, flags) \ 360 return __ioremap_mode(offset, size, PAGE_KERNEL);
293 __ioremap_mode((offset), (size), (flags)) 361}
294#define iounmap(addr) \ 362
295 __iounmap((addr)) 363#ifdef CONFIG_HAVE_IOREMAP_PROT
364static inline void __iomem *
365ioremap_prot(phys_addr_t offset, unsigned long size, unsigned long flags)
366{
367 return __ioremap_mode(offset, size, __pgprot(flags));
368}
369#endif
370
371#ifdef CONFIG_IOREMAP_FIXED
372extern void __iomem *ioremap_fixed(phys_addr_t, unsigned long, pgprot_t);
373extern int iounmap_fixed(void __iomem *);
374extern void ioremap_fixed_init(void);
375#else
376static inline void __iomem *
377ioremap_fixed(phys_addr_t phys_addr, unsigned long size, pgprot_t prot)
378{
379 BUG();
380 return NULL;
381}
382
383static inline void ioremap_fixed_init(void) { }
384static inline int iounmap_fixed(void __iomem *addr) { return -EINVAL; }
385#endif
386
387#define ioremap_nocache ioremap
388#define iounmap __iounmap
296 389
297#define maybebadio(port) \ 390#define maybebadio(port) \
298 printk(KERN_ERR "bad PC-like io %s:%u for port 0x%lx at 0x%08x\n", \ 391 printk(KERN_ERR "bad PC-like io %s:%u for port 0x%lx at 0x%08x\n", \
diff --git a/arch/sh/include/asm/irqflags.h b/arch/sh/include/asm/irqflags.h
index 46e71da5be6b..a741153b41c2 100644
--- a/arch/sh/include/asm/irqflags.h
+++ b/arch/sh/include/asm/irqflags.h
@@ -1,34 +1,9 @@
1#ifndef __ASM_SH_IRQFLAGS_H 1#ifndef __ASM_SH_IRQFLAGS_H
2#define __ASM_SH_IRQFLAGS_H 2#define __ASM_SH_IRQFLAGS_H
3 3
4#ifdef CONFIG_SUPERH32 4#define RAW_IRQ_DISABLED 0xf0
5#include "irqflags_32.h" 5#define RAW_IRQ_ENABLED 0x00
6#else
7#include "irqflags_64.h"
8#endif
9 6
10#define raw_local_save_flags(flags) \ 7#include <asm-generic/irqflags.h>
11 do { (flags) = __raw_local_save_flags(); } while (0)
12
13static inline int raw_irqs_disabled_flags(unsigned long flags)
14{
15 return (flags != 0);
16}
17
18static inline int raw_irqs_disabled(void)
19{
20 unsigned long flags = __raw_local_save_flags();
21
22 return raw_irqs_disabled_flags(flags);
23}
24
25#define raw_local_irq_save(flags) \
26 do { (flags) = __raw_local_irq_save(); } while (0)
27
28static inline void raw_local_irq_restore(unsigned long flags)
29{
30 if ((flags & 0xf0) != 0xf0)
31 raw_local_irq_enable();
32}
33 8
34#endif /* __ASM_SH_IRQFLAGS_H */ 9#endif /* __ASM_SH_IRQFLAGS_H */
diff --git a/arch/sh/include/asm/irqflags_32.h b/arch/sh/include/asm/irqflags_32.h
deleted file mode 100644
index 60218f541340..000000000000
--- a/arch/sh/include/asm/irqflags_32.h
+++ /dev/null
@@ -1,99 +0,0 @@
1#ifndef __ASM_SH_IRQFLAGS_32_H
2#define __ASM_SH_IRQFLAGS_32_H
3
4static inline void raw_local_irq_enable(void)
5{
6 unsigned long __dummy0, __dummy1;
7
8 __asm__ __volatile__ (
9 "stc sr, %0\n\t"
10 "and %1, %0\n\t"
11#ifdef CONFIG_CPU_HAS_SR_RB
12 "stc r6_bank, %1\n\t"
13 "or %1, %0\n\t"
14#endif
15 "ldc %0, sr\n\t"
16 : "=&r" (__dummy0), "=r" (__dummy1)
17 : "1" (~0x000000f0)
18 : "memory"
19 );
20}
21
22static inline void raw_local_irq_disable(void)
23{
24 unsigned long flags;
25
26 __asm__ __volatile__ (
27 "stc sr, %0\n\t"
28 "or #0xf0, %0\n\t"
29 "ldc %0, sr\n\t"
30 : "=&z" (flags)
31 : /* no inputs */
32 : "memory"
33 );
34}
35
36static inline void set_bl_bit(void)
37{
38 unsigned long __dummy0, __dummy1;
39
40 __asm__ __volatile__ (
41 "stc sr, %0\n\t"
42 "or %2, %0\n\t"
43 "and %3, %0\n\t"
44 "ldc %0, sr\n\t"
45 : "=&r" (__dummy0), "=r" (__dummy1)
46 : "r" (0x10000000), "r" (0xffffff0f)
47 : "memory"
48 );
49}
50
51static inline void clear_bl_bit(void)
52{
53 unsigned long __dummy0, __dummy1;
54
55 __asm__ __volatile__ (
56 "stc sr, %0\n\t"
57 "and %2, %0\n\t"
58 "ldc %0, sr\n\t"
59 : "=&r" (__dummy0), "=r" (__dummy1)
60 : "1" (~0x10000000)
61 : "memory"
62 );
63}
64
65static inline unsigned long __raw_local_save_flags(void)
66{
67 unsigned long flags;
68
69 __asm__ __volatile__ (
70 "stc sr, %0\n\t"
71 "and #0xf0, %0\n\t"
72 : "=&z" (flags)
73 : /* no inputs */
74 : "memory"
75 );
76
77 return flags;
78}
79
80static inline unsigned long __raw_local_irq_save(void)
81{
82 unsigned long flags, __dummy;
83
84 __asm__ __volatile__ (
85 "stc sr, %1\n\t"
86 "mov %1, %0\n\t"
87 "or #0xf0, %0\n\t"
88 "ldc %0, sr\n\t"
89 "mov %1, %0\n\t"
90 "and #0xf0, %0\n\t"
91 : "=&z" (flags), "=&r" (__dummy)
92 : /* no inputs */
93 : "memory"
94 );
95
96 return flags;
97}
98
99#endif /* __ASM_SH_IRQFLAGS_32_H */
diff --git a/arch/sh/include/asm/irqflags_64.h b/arch/sh/include/asm/irqflags_64.h
deleted file mode 100644
index 88f65222c1d4..000000000000
--- a/arch/sh/include/asm/irqflags_64.h
+++ /dev/null
@@ -1,85 +0,0 @@
1#ifndef __ASM_SH_IRQFLAGS_64_H
2#define __ASM_SH_IRQFLAGS_64_H
3
4#include <cpu/registers.h>
5
6#define SR_MASK_LL 0x00000000000000f0LL
7#define SR_BL_LL 0x0000000010000000LL
8
9static inline void raw_local_irq_enable(void)
10{
11 unsigned long long __dummy0, __dummy1 = ~SR_MASK_LL;
12
13 __asm__ __volatile__("getcon " __SR ", %0\n\t"
14 "and %0, %1, %0\n\t"
15 "putcon %0, " __SR "\n\t"
16 : "=&r" (__dummy0)
17 : "r" (__dummy1));
18}
19
20static inline void raw_local_irq_disable(void)
21{
22 unsigned long long __dummy0, __dummy1 = SR_MASK_LL;
23
24 __asm__ __volatile__("getcon " __SR ", %0\n\t"
25 "or %0, %1, %0\n\t"
26 "putcon %0, " __SR "\n\t"
27 : "=&r" (__dummy0)
28 : "r" (__dummy1));
29}
30
31static inline void set_bl_bit(void)
32{
33 unsigned long long __dummy0, __dummy1 = SR_BL_LL;
34
35 __asm__ __volatile__("getcon " __SR ", %0\n\t"
36 "or %0, %1, %0\n\t"
37 "putcon %0, " __SR "\n\t"
38 : "=&r" (__dummy0)
39 : "r" (__dummy1));
40
41}
42
43static inline void clear_bl_bit(void)
44{
45 unsigned long long __dummy0, __dummy1 = ~SR_BL_LL;
46
47 __asm__ __volatile__("getcon " __SR ", %0\n\t"
48 "and %0, %1, %0\n\t"
49 "putcon %0, " __SR "\n\t"
50 : "=&r" (__dummy0)
51 : "r" (__dummy1));
52}
53
54static inline unsigned long __raw_local_save_flags(void)
55{
56 unsigned long long __dummy = SR_MASK_LL;
57 unsigned long flags;
58
59 __asm__ __volatile__ (
60 "getcon " __SR ", %0\n\t"
61 "and %0, %1, %0"
62 : "=&r" (flags)
63 : "r" (__dummy));
64
65 return flags;
66}
67
68static inline unsigned long __raw_local_irq_save(void)
69{
70 unsigned long long __dummy0, __dummy1 = SR_MASK_LL;
71 unsigned long flags;
72
73 __asm__ __volatile__ (
74 "getcon " __SR ", %1\n\t"
75 "or %1, r63, %0\n\t"
76 "or %1, %2, %1\n\t"
77 "putcon %1, " __SR "\n\t"
78 "and %0, %2, %0"
79 : "=&r" (flags), "=&r" (__dummy0)
80 : "r" (__dummy1));
81
82 return flags;
83}
84
85#endif /* __ASM_SH_IRQFLAGS_64_H */
diff --git a/arch/sh/include/asm/kdebug.h b/arch/sh/include/asm/kdebug.h
index 985219f9759e..5f6d2e9ccb7c 100644
--- a/arch/sh/include/asm/kdebug.h
+++ b/arch/sh/include/asm/kdebug.h
@@ -6,6 +6,8 @@ enum die_val {
6 DIE_TRAP, 6 DIE_TRAP,
7 DIE_NMI, 7 DIE_NMI,
8 DIE_OOPS, 8 DIE_OOPS,
9 DIE_BREAKPOINT,
10 DIE_SSTEP,
9}; 11};
10 12
11#endif /* __ASM_SH_KDEBUG_H */ 13#endif /* __ASM_SH_KDEBUG_H */
diff --git a/arch/sh/include/asm/machvec.h b/arch/sh/include/asm/machvec.h
index 84dd37761f56..9c30955630ff 100644
--- a/arch/sh/include/asm/machvec.h
+++ b/arch/sh/include/asm/machvec.h
@@ -12,7 +12,7 @@
12 12
13#include <linux/types.h> 13#include <linux/types.h>
14#include <linux/time.h> 14#include <linux/time.h>
15#include <asm/machtypes.h> 15#include <generated/machtypes.h>
16 16
17struct sh_machine_vector { 17struct sh_machine_vector {
18 void (*mv_setup)(char **cmdline_p); 18 void (*mv_setup)(char **cmdline_p);
diff --git a/arch/sh/include/asm/mmu.h b/arch/sh/include/asm/mmu.h
index f5963037c9d6..56e4418c19b9 100644
--- a/arch/sh/include/asm/mmu.h
+++ b/arch/sh/include/asm/mmu.h
@@ -7,12 +7,18 @@
7#define PMB_PASCR 0xff000070 7#define PMB_PASCR 0xff000070
8#define PMB_IRMCR 0xff000078 8#define PMB_IRMCR 0xff000078
9 9
10#define PASCR_SE 0x80000000
11
10#define PMB_ADDR 0xf6100000 12#define PMB_ADDR 0xf6100000
11#define PMB_DATA 0xf7100000 13#define PMB_DATA 0xf7100000
12#define PMB_ENTRY_MAX 16 14
15#define NR_PMB_ENTRIES 16
16
13#define PMB_E_MASK 0x0000000f 17#define PMB_E_MASK 0x0000000f
14#define PMB_E_SHIFT 8 18#define PMB_E_SHIFT 8
15 19
20#define PMB_PFN_MASK 0xff000000
21
16#define PMB_SZ_16M 0x00000000 22#define PMB_SZ_16M 0x00000000
17#define PMB_SZ_64M 0x00000010 23#define PMB_SZ_64M 0x00000010
18#define PMB_SZ_128M 0x00000080 24#define PMB_SZ_128M 0x00000080
@@ -21,11 +27,15 @@
21#define PMB_C 0x00000008 27#define PMB_C 0x00000008
22#define PMB_WT 0x00000001 28#define PMB_WT 0x00000001
23#define PMB_UB 0x00000200 29#define PMB_UB 0x00000200
30#define PMB_CACHE_MASK (PMB_C | PMB_WT | PMB_UB)
24#define PMB_V 0x00000100 31#define PMB_V 0x00000100
25 32
26#define PMB_NO_ENTRY (-1) 33#define PMB_NO_ENTRY (-1)
27 34
28#ifndef __ASSEMBLY__ 35#ifndef __ASSEMBLY__
36#include <linux/errno.h>
37#include <linux/threads.h>
38#include <asm/page.h>
29 39
30/* Default "unsigned long" context */ 40/* Default "unsigned long" context */
31typedef unsigned long mm_context_id_t[NR_CPUS]; 41typedef unsigned long mm_context_id_t[NR_CPUS];
@@ -43,36 +53,54 @@ typedef struct {
43#endif 53#endif
44} mm_context_t; 54} mm_context_t;
45 55
46struct pmb_entry; 56#ifdef CONFIG_PMB
57/* arch/sh/mm/pmb.c */
58bool __in_29bit_mode(void);
59
60void pmb_init(void);
61int pmb_bolt_mapping(unsigned long virt, phys_addr_t phys,
62 unsigned long size, pgprot_t prot);
63void __iomem *pmb_remap_caller(phys_addr_t phys, unsigned long size,
64 pgprot_t prot, void *caller);
65int pmb_unmap(void __iomem *addr);
47 66
48struct pmb_entry { 67#else
49 unsigned long vpn;
50 unsigned long ppn;
51 unsigned long flags;
52 68
53 /* 69static inline int
54 * 0 .. NR_PMB_ENTRIES for specific entry selection, or 70pmb_bolt_mapping(unsigned long virt, phys_addr_t phys,
55 * PMB_NO_ENTRY to search for a free one 71 unsigned long size, pgprot_t prot)
56 */ 72{
57 int entry; 73 return -EINVAL;
74}
58 75
59 struct pmb_entry *next; 76static inline void __iomem *
60 /* Adjacent entry link for contiguous multi-entry mappings */ 77pmb_remap_caller(phys_addr_t phys, unsigned long size,
61 struct pmb_entry *link; 78 pgprot_t prot, void *caller)
62}; 79{
80 return NULL;
81}
82
83static inline int pmb_unmap(void __iomem *addr)
84{
85 return -EINVAL;
86}
87
88#define pmb_init(addr) do { } while (0)
89
90#ifdef CONFIG_29BIT
91#define __in_29bit_mode() (1)
92#else
93#define __in_29bit_mode() (0)
94#endif
95
96#endif /* CONFIG_PMB */
97
98static inline void __iomem *
99pmb_remap(phys_addr_t phys, unsigned long size, pgprot_t prot)
100{
101 return pmb_remap_caller(phys, size, prot, __builtin_return_address(0));
102}
63 103
64/* arch/sh/mm/pmb.c */
65int __set_pmb_entry(unsigned long vpn, unsigned long ppn,
66 unsigned long flags, int *entry);
67int set_pmb_entry(struct pmb_entry *pmbe);
68void clear_pmb_entry(struct pmb_entry *pmbe);
69struct pmb_entry *pmb_alloc(unsigned long vpn, unsigned long ppn,
70 unsigned long flags);
71void pmb_free(struct pmb_entry *pmbe);
72long pmb_remap(unsigned long virt, unsigned long phys,
73 unsigned long size, unsigned long flags);
74void pmb_unmap(unsigned long addr);
75#endif /* __ASSEMBLY__ */ 104#endif /* __ASSEMBLY__ */
76 105
77#endif /* __MMU_H */ 106#endif /* __MMU_H */
78
diff --git a/arch/sh/include/asm/mmu_context.h b/arch/sh/include/asm/mmu_context.h
index 41080b173a7a..384c7471a374 100644
--- a/arch/sh/include/asm/mmu_context.h
+++ b/arch/sh/include/asm/mmu_context.h
@@ -158,7 +158,7 @@ static inline void enable_mmu(void)
158 unsigned int cpu = smp_processor_id(); 158 unsigned int cpu = smp_processor_id();
159 159
160 /* Enable MMU */ 160 /* Enable MMU */
161 ctrl_outl(MMU_CONTROL_INIT, MMUCR); 161 __raw_writel(MMU_CONTROL_INIT, MMUCR);
162 ctrl_barrier(); 162 ctrl_barrier();
163 163
164 if (asid_cache(cpu) == NO_CONTEXT) 164 if (asid_cache(cpu) == NO_CONTEXT)
@@ -171,9 +171,9 @@ static inline void disable_mmu(void)
171{ 171{
172 unsigned long cr; 172 unsigned long cr;
173 173
174 cr = ctrl_inl(MMUCR); 174 cr = __raw_readl(MMUCR);
175 cr &= ~MMU_CONTROL_INIT; 175 cr &= ~MMU_CONTROL_INIT;
176 ctrl_outl(cr, MMUCR); 176 __raw_writel(cr, MMUCR);
177 177
178 ctrl_barrier(); 178 ctrl_barrier();
179} 179}
diff --git a/arch/sh/include/asm/mmu_context_32.h b/arch/sh/include/asm/mmu_context_32.h
index 8ef800c549ab..10e2e17210d2 100644
--- a/arch/sh/include/asm/mmu_context_32.h
+++ b/arch/sh/include/asm/mmu_context_32.h
@@ -49,11 +49,11 @@ static inline unsigned long get_asid(void)
49/* MMU_TTB is used for optimizing the fault handling. */ 49/* MMU_TTB is used for optimizing the fault handling. */
50static inline void set_TTB(pgd_t *pgd) 50static inline void set_TTB(pgd_t *pgd)
51{ 51{
52 ctrl_outl((unsigned long)pgd, MMU_TTB); 52 __raw_writel((unsigned long)pgd, MMU_TTB);
53} 53}
54 54
55static inline pgd_t *get_TTB(void) 55static inline pgd_t *get_TTB(void)
56{ 56{
57 return (pgd_t *)ctrl_inl(MMU_TTB); 57 return (pgd_t *)__raw_readl(MMU_TTB);
58} 58}
59#endif /* __ASM_SH_MMU_CONTEXT_32_H */ 59#endif /* __ASM_SH_MMU_CONTEXT_32_H */
diff --git a/arch/sh/include/asm/module.h b/arch/sh/include/asm/module.h
index 068bf1659750..b7927de86f9f 100644
--- a/arch/sh/include/asm/module.h
+++ b/arch/sh/include/asm/module.h
@@ -1,7 +1,22 @@
1#ifndef _ASM_SH_MODULE_H 1#ifndef _ASM_SH_MODULE_H
2#define _ASM_SH_MODULE_H 2#define _ASM_SH_MODULE_H
3 3
4#include <asm-generic/module.h> 4struct mod_arch_specific {
5#ifdef CONFIG_DWARF_UNWINDER
6 struct list_head fde_list;
7 struct list_head cie_list;
8#endif
9};
10
11#ifdef CONFIG_64BIT
12#define Elf_Shdr Elf64_Shdr
13#define Elf_Sym Elf64_Sym
14#define Elf_Ehdr Elf64_Ehdr
15#else
16#define Elf_Shdr Elf32_Shdr
17#define Elf_Sym Elf32_Sym
18#define Elf_Ehdr Elf32_Ehdr
19#endif
5 20
6#ifdef CONFIG_CPU_LITTLE_ENDIAN 21#ifdef CONFIG_CPU_LITTLE_ENDIAN
7# ifdef CONFIG_CPU_SH2 22# ifdef CONFIG_CPU_SH2
diff --git a/arch/sh/include/asm/page.h b/arch/sh/include/asm/page.h
index 81bffc0d6860..d71feb359304 100644
--- a/arch/sh/include/asm/page.h
+++ b/arch/sh/include/asm/page.h
@@ -45,6 +45,7 @@
45#endif 45#endif
46 46
47#ifndef __ASSEMBLY__ 47#ifndef __ASSEMBLY__
48#include <asm/uncached.h>
48 49
49extern unsigned long shm_align_mask; 50extern unsigned long shm_align_mask;
50extern unsigned long max_low_pfn, min_low_pfn; 51extern unsigned long max_low_pfn, min_low_pfn;
@@ -56,7 +57,6 @@ pages_do_alias(unsigned long addr1, unsigned long addr2)
56 return (addr1 ^ addr2) & shm_align_mask; 57 return (addr1 ^ addr2) & shm_align_mask;
57} 58}
58 59
59
60#define clear_page(page) memset((void *)(page), 0, PAGE_SIZE) 60#define clear_page(page) memset((void *)(page), 0, PAGE_SIZE)
61extern void copy_page(void *to, void *from); 61extern void copy_page(void *to, void *from);
62 62
@@ -88,7 +88,7 @@ typedef struct { unsigned long pgd; } pgd_t;
88#define __pte(x) ((pte_t) { (x) } ) 88#define __pte(x) ((pte_t) { (x) } )
89#else 89#else
90typedef struct { unsigned long long pte_low; } pte_t; 90typedef struct { unsigned long long pte_low; } pte_t;
91typedef struct { unsigned long pgprot; } pgprot_t; 91typedef struct { unsigned long long pgprot; } pgprot_t;
92typedef struct { unsigned long pgd; } pgd_t; 92typedef struct { unsigned long pgd; } pgd_t;
93#define pte_val(x) ((x).pte_low) 93#define pte_val(x) ((x).pte_low)
94#define __pte(x) ((pte_t) { (x) } ) 94#define __pte(x) ((pte_t) { (x) } )
@@ -127,12 +127,7 @@ typedef struct page *pgtable_t;
127 * is not visible (it is part of the PMB mapping) and so needs to be 127 * is not visible (it is part of the PMB mapping) and so needs to be
128 * added or subtracted as required. 128 * added or subtracted as required.
129 */ 129 */
130#if defined(CONFIG_PMB_FIXED) 130#ifdef CONFIG_PMB
131/* phys = virt - PAGE_OFFSET - (__MEMORY_START & 0xe0000000) */
132#define PMB_OFFSET (PAGE_OFFSET - PXSEG(__MEMORY_START))
133#define __pa(x) ((unsigned long)(x) - PMB_OFFSET)
134#define __va(x) ((void *)((unsigned long)(x) + PMB_OFFSET))
135#elif defined(CONFIG_32BIT)
136#define __pa(x) ((unsigned long)(x)-PAGE_OFFSET+__MEMORY_START) 131#define __pa(x) ((unsigned long)(x)-PAGE_OFFSET+__MEMORY_START)
137#define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET-__MEMORY_START)) 132#define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET-__MEMORY_START))
138#else 133#else
@@ -140,6 +135,14 @@ typedef struct page *pgtable_t;
140#define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET)) 135#define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET))
141#endif 136#endif
142 137
138#ifdef CONFIG_UNCACHED_MAPPING
139#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + uncached_start)
140#define CAC_ADDR(addr) ((addr) - uncached_start + PAGE_OFFSET)
141#else
142#define UNCAC_ADDR(addr) ((addr))
143#define CAC_ADDR(addr) ((addr))
144#endif
145
143#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) 146#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
144#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) 147#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
145 148
diff --git a/arch/sh/include/asm/pci.h b/arch/sh/include/asm/pci.h
index 4163950cd1c6..8bd952fcf3ba 100644
--- a/arch/sh/include/asm/pci.h
+++ b/arch/sh/include/asm/pci.h
@@ -3,8 +3,6 @@
3 3
4#ifdef __KERNEL__ 4#ifdef __KERNEL__
5 5
6#include <linux/dma-mapping.h>
7
8/* Can be used to override the logic in pci_scan_bus for skipping 6/* Can be used to override the logic in pci_scan_bus for skipping
9 already-configured bus numbers - to be used for buggy BIOSes 7 already-configured bus numbers - to be used for buggy BIOSes
10 or architectures with incomplete PCI setup by the loader */ 8 or architectures with incomplete PCI setup by the loader */
@@ -17,20 +15,49 @@
17 */ 15 */
18struct pci_channel { 16struct pci_channel {
19 struct pci_channel *next; 17 struct pci_channel *next;
18 struct pci_bus *bus;
20 19
21 struct pci_ops *pci_ops; 20 struct pci_ops *pci_ops;
22 struct resource *io_resource; 21
23 struct resource *mem_resource; 22 struct resource *resources;
23 unsigned int nr_resources;
24 24
25 unsigned long io_offset; 25 unsigned long io_offset;
26 unsigned long mem_offset; 26 unsigned long mem_offset;
27 27
28 unsigned long reg_base; 28 unsigned long reg_base;
29
30 unsigned long io_map_base; 29 unsigned long io_map_base;
30
31 unsigned int index;
32 unsigned int need_domain_info;
33
34 /* Optional error handling */
35 struct timer_list err_timer, serr_timer;
36 unsigned int err_irq, serr_irq;
31}; 37};
32 38
33extern void register_pci_controller(struct pci_channel *hose); 39/* arch/sh/drivers/pci/pci.c */
40extern int register_pci_controller(struct pci_channel *hose);
41extern void pcibios_report_status(unsigned int status_mask, int warn);
42
43/* arch/sh/drivers/pci/common.c */
44extern int early_read_config_byte(struct pci_channel *hose, int top_bus,
45 int bus, int devfn, int offset, u8 *value);
46extern int early_read_config_word(struct pci_channel *hose, int top_bus,
47 int bus, int devfn, int offset, u16 *value);
48extern int early_read_config_dword(struct pci_channel *hose, int top_bus,
49 int bus, int devfn, int offset, u32 *value);
50extern int early_write_config_byte(struct pci_channel *hose, int top_bus,
51 int bus, int devfn, int offset, u8 value);
52extern int early_write_config_word(struct pci_channel *hose, int top_bus,
53 int bus, int devfn, int offset, u16 value);
54extern int early_write_config_dword(struct pci_channel *hose, int top_bus,
55 int bus, int devfn, int offset, u32 value);
56extern void pcibios_enable_timers(struct pci_channel *hose);
57extern unsigned int pcibios_handle_status_errors(unsigned long addr,
58 unsigned int status, struct pci_channel *hose);
59extern int pci_is_66mhz_capable(struct pci_channel *hose,
60 int top_bus, int current_bus);
34 61
35extern unsigned long PCIBIOS_MIN_IO, PCIBIOS_MIN_MEM; 62extern unsigned long PCIBIOS_MIN_IO, PCIBIOS_MIN_MEM;
36 63
@@ -54,38 +81,7 @@ static inline void pcibios_penalize_isa_irq(int irq, int active)
54 * address space. The networking and block device layers use 81 * address space. The networking and block device layers use
55 * this boolean for bounce buffer decisions. 82 * this boolean for bounce buffer decisions.
56 */ 83 */
57#define PCI_DMA_BUS_IS_PHYS (1) 84#define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys)
58
59#include <linux/types.h>
60#include <linux/slab.h>
61#include <asm/scatterlist.h>
62#include <linux/string.h>
63#include <asm/io.h>
64
65/* pci_unmap_{single,page} being a nop depends upon the
66 * configuration.
67 */
68#ifdef CONFIG_SH_PCIDMA_NONCOHERENT
69#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
70 dma_addr_t ADDR_NAME;
71#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
72 __u32 LEN_NAME;
73#define pci_unmap_addr(PTR, ADDR_NAME) \
74 ((PTR)->ADDR_NAME)
75#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
76 (((PTR)->ADDR_NAME) = (VAL))
77#define pci_unmap_len(PTR, LEN_NAME) \
78 ((PTR)->LEN_NAME)
79#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
80 (((PTR)->LEN_NAME) = (VAL))
81#else
82#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
83#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
84#define pci_unmap_addr(PTR, ADDR_NAME) (0)
85#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
86#define pci_unmap_len(PTR, LEN_NAME) (0)
87#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
88#endif
89 85
90#ifdef CONFIG_PCI 86#ifdef CONFIG_PCI
91/* 87/*
@@ -113,20 +109,6 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
113} 109}
114#endif 110#endif
115 111
116#ifdef CONFIG_SUPERH32
117/*
118 * If we're on an SH7751 or SH7780 PCI controller, PCI memory is mapped
119 * at the end of the address space in a special non-translatable area.
120 */
121#define PCI_MEM_FIXED_START 0xfd000000
122#define PCI_MEM_FIXED_END (PCI_MEM_FIXED_START + 0x01000000)
123
124#define is_pci_memory_fixed_range(s, e) \
125 ((s) >= PCI_MEM_FIXED_START && (e) < PCI_MEM_FIXED_END)
126#else
127#define is_pci_memory_fixed_range(s, e) (0)
128#endif
129
130/* Board-specific fixup routines. */ 112/* Board-specific fixup routines. */
131int pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin); 113int pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin);
132 114
@@ -136,6 +118,14 @@ extern void pcibios_resource_to_bus(struct pci_dev *dev,
136extern void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res, 118extern void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
137 struct pci_bus_region *region); 119 struct pci_bus_region *region);
138 120
121#define pci_domain_nr(bus) ((struct pci_channel *)(bus)->sysdata)->index
122
123static inline int pci_proc_domain(struct pci_bus *bus)
124{
125 struct pci_channel *hose = bus->sysdata;
126 return hose->need_domain_info;
127}
128
139/* Chances are this interrupt is wired PC-style ... */ 129/* Chances are this interrupt is wired PC-style ... */
140static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) 130static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
141{ 131{
diff --git a/arch/sh/include/asm/perf_event.h b/arch/sh/include/asm/perf_event.h
index 11a302297ab7..3d0c9f36d150 100644
--- a/arch/sh/include/asm/perf_event.h
+++ b/arch/sh/include/asm/perf_event.h
@@ -1,8 +1,35 @@
1#ifndef __ASM_SH_PERF_EVENT_H 1#ifndef __ASM_SH_PERF_EVENT_H
2#define __ASM_SH_PERF_EVENT_H 2#define __ASM_SH_PERF_EVENT_H
3 3
4/* SH only supports software events through this interface. */ 4struct hw_perf_event;
5static inline void set_perf_event_pending(void) {} 5
6#define MAX_HWEVENTS 2
7
8struct sh_pmu {
9 const char *name;
10 unsigned int num_events;
11 void (*disable_all)(void);
12 void (*enable_all)(void);
13 void (*enable)(struct hw_perf_event *, int);
14 void (*disable)(struct hw_perf_event *, int);
15 u64 (*read)(int);
16 int (*event_map)(int);
17 unsigned int max_events;
18 unsigned long raw_event_mask;
19 const int (*cache_events)[PERF_COUNT_HW_CACHE_MAX]
20 [PERF_COUNT_HW_CACHE_OP_MAX]
21 [PERF_COUNT_HW_CACHE_RESULT_MAX];
22};
23
24/* arch/sh/kernel/perf_event.c */
25extern int register_sh_pmu(struct sh_pmu *);
26extern int reserve_pmc_hardware(void);
27extern void release_pmc_hardware(void);
28
29static inline void set_perf_event_pending(void)
30{
31 /* Nothing to see here, move along. */
32}
6 33
7#define PERF_EVENT_INDEX_OFFSET 0 34#define PERF_EVENT_INDEX_OFFSET 0
8 35
diff --git a/arch/sh/include/asm/pgalloc.h b/arch/sh/include/asm/pgalloc.h
index 63ca37bd9a95..8c00785c60d5 100644
--- a/arch/sh/include/asm/pgalloc.h
+++ b/arch/sh/include/asm/pgalloc.h
@@ -4,8 +4,16 @@
4#include <linux/quicklist.h> 4#include <linux/quicklist.h>
5#include <asm/page.h> 5#include <asm/page.h>
6 6
7#define QUICK_PGD 0 /* We preserve special mappings over free */ 7#define QUICK_PT 0 /* Other page table pages that are zero on free */
8#define QUICK_PT 1 /* Other page table pages that are zero on free */ 8
9extern pgd_t *pgd_alloc(struct mm_struct *);
10extern void pgd_free(struct mm_struct *mm, pgd_t *pgd);
11
12#if PAGETABLE_LEVELS > 2
13extern void pud_populate(struct mm_struct *mm, pud_t *pudp, pmd_t *pmd);
14extern pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address);
15extern void pmd_free(struct mm_struct *mm, pmd_t *pmd);
16#endif
9 17
10static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd, 18static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd,
11 pte_t *pte) 19 pte_t *pte)
@@ -20,28 +28,9 @@ static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd,
20} 28}
21#define pmd_pgtable(pmd) pmd_page(pmd) 29#define pmd_pgtable(pmd) pmd_page(pmd)
22 30
23static inline void pgd_ctor(void *x)
24{
25 pgd_t *pgd = x;
26
27 memcpy(pgd + USER_PTRS_PER_PGD,
28 swapper_pg_dir + USER_PTRS_PER_PGD,
29 (PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t));
30}
31
32/* 31/*
33 * Allocate and free page tables. 32 * Allocate and free page tables.
34 */ 33 */
35static inline pgd_t *pgd_alloc(struct mm_struct *mm)
36{
37 return quicklist_alloc(QUICK_PGD, GFP_KERNEL | __GFP_REPEAT, pgd_ctor);
38}
39
40static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd)
41{
42 quicklist_free(QUICK_PGD, NULL, pgd);
43}
44
45static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, 34static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
46 unsigned long address) 35 unsigned long address)
47{ 36{
@@ -81,7 +70,6 @@ do { \
81 70
82static inline void check_pgt_cache(void) 71static inline void check_pgt_cache(void)
83{ 72{
84 quicklist_trim(QUICK_PGD, NULL, 25, 16);
85 quicklist_trim(QUICK_PT, NULL, 25, 16); 73 quicklist_trim(QUICK_PT, NULL, 25, 16);
86} 74}
87 75
diff --git a/arch/sh/include/asm/pgtable-2level.h b/arch/sh/include/asm/pgtable-2level.h
new file mode 100644
index 000000000000..19bd89db17e7
--- /dev/null
+++ b/arch/sh/include/asm/pgtable-2level.h
@@ -0,0 +1,23 @@
1#ifndef __ASM_SH_PGTABLE_2LEVEL_H
2#define __ASM_SH_PGTABLE_2LEVEL_H
3
4#include <asm-generic/pgtable-nopmd.h>
5
6/*
7 * traditional two-level paging structure
8 */
9#define PAGETABLE_LEVELS 2
10
11/* PTE bits */
12#define PTE_MAGNITUDE 2 /* 32-bit PTEs */
13
14#define PTE_SHIFT PAGE_SHIFT
15#define PTE_BITS (PTE_SHIFT - PTE_MAGNITUDE)
16
17/* PGD bits */
18#define PGDIR_SHIFT (PTE_SHIFT + PTE_BITS)
19
20#define PTRS_PER_PGD (PAGE_SIZE / (1 << PTE_MAGNITUDE))
21#define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE)
22
23#endif /* __ASM_SH_PGTABLE_2LEVEL_H */
diff --git a/arch/sh/include/asm/pgtable-3level.h b/arch/sh/include/asm/pgtable-3level.h
new file mode 100644
index 000000000000..249a985d9648
--- /dev/null
+++ b/arch/sh/include/asm/pgtable-3level.h
@@ -0,0 +1,56 @@
1#ifndef __ASM_SH_PGTABLE_3LEVEL_H
2#define __ASM_SH_PGTABLE_3LEVEL_H
3
4#include <asm-generic/pgtable-nopud.h>
5
6/*
7 * Some cores need a 3-level page table layout, for example when using
8 * 64-bit PTEs and 4K pages.
9 */
10#define PAGETABLE_LEVELS 3
11
12#define PTE_MAGNITUDE 3 /* 64-bit PTEs on SH-X2 TLB */
13
14/* PGD bits */
15#define PGDIR_SHIFT 30
16
17#define PTRS_PER_PGD 4
18#define USER_PTRS_PER_PGD 2
19
20/* PMD bits */
21#define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT - PTE_MAGNITUDE))
22#define PMD_SIZE (1UL << PMD_SHIFT)
23#define PMD_MASK (~(PMD_SIZE-1))
24
25#define PTRS_PER_PMD ((1 << PGDIR_SHIFT) / PMD_SIZE)
26
27#define pmd_ERROR(e) \
28 printk("%s:%d: bad pmd %016llx.\n", __FILE__, __LINE__, pmd_val(e))
29
30typedef struct { unsigned long long pmd; } pmd_t;
31#define pmd_val(x) ((x).pmd)
32#define __pmd(x) ((pmd_t) { (x) } )
33
34static inline unsigned long pud_page_vaddr(pud_t pud)
35{
36 return pud_val(pud);
37}
38
39#define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
40static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
41{
42 return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address);
43}
44
45#define pud_none(x) (!pud_val(x))
46#define pud_present(x) (pud_val(x))
47#define pud_clear(xp) do { set_pud(xp, __pud(0)); } while (0)
48#define pud_bad(x) (pud_val(x) & ~PAGE_MASK)
49
50/*
51 * (puds are folded into pgds so this doesn't get actually called,
52 * but the define is needed for a generic inline function.)
53 */
54#define set_pud(pudptr, pudval) do { *(pudptr) = (pudval); } while(0)
55
56#endif /* __ASM_SH_PGTABLE_3LEVEL_H */
diff --git a/arch/sh/include/asm/pgtable.h b/arch/sh/include/asm/pgtable.h
index 4f3efa7d5a64..02f77450cd8f 100644
--- a/arch/sh/include/asm/pgtable.h
+++ b/arch/sh/include/asm/pgtable.h
@@ -12,7 +12,11 @@
12#ifndef __ASM_SH_PGTABLE_H 12#ifndef __ASM_SH_PGTABLE_H
13#define __ASM_SH_PGTABLE_H 13#define __ASM_SH_PGTABLE_H
14 14
15#include <asm-generic/pgtable-nopmd.h> 15#ifdef CONFIG_X2TLB
16#include <asm/pgtable-3level.h>
17#else
18#include <asm/pgtable-2level.h>
19#endif
16#include <asm/page.h> 20#include <asm/page.h>
17 21
18#ifndef __ASSEMBLY__ 22#ifndef __ASSEMBLY__
@@ -51,37 +55,39 @@ static inline unsigned long long neff_sign_extend(unsigned long val)
51#define NPHYS_SIGN (1LL << (NPHYS - 1)) 55#define NPHYS_SIGN (1LL << (NPHYS - 1))
52#define NPHYS_MASK (-1LL << NPHYS) 56#define NPHYS_MASK (-1LL << NPHYS)
53 57
54/*
55 * traditional two-level paging structure
56 */
57/* PTE bits */
58#if defined(CONFIG_X2TLB) || defined(CONFIG_SUPERH64)
59# define PTE_MAGNITUDE 3 /* 64-bit PTEs on extended mode SH-X2 TLB */
60#else
61# define PTE_MAGNITUDE 2 /* 32-bit PTEs */
62#endif
63#define PTE_SHIFT PAGE_SHIFT
64#define PTE_BITS (PTE_SHIFT - PTE_MAGNITUDE)
65
66/* PGD bits */
67#define PGDIR_SHIFT (PTE_SHIFT + PTE_BITS)
68#define PGDIR_SIZE (1UL << PGDIR_SHIFT) 58#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
69#define PGDIR_MASK (~(PGDIR_SIZE-1)) 59#define PGDIR_MASK (~(PGDIR_SIZE-1))
70 60
71/* Entries per level */ 61/* Entries per level */
72#define PTRS_PER_PTE (PAGE_SIZE / (1 << PTE_MAGNITUDE)) 62#define PTRS_PER_PTE (PAGE_SIZE / (1 << PTE_MAGNITUDE))
73#define PTRS_PER_PGD (PAGE_SIZE / sizeof(pgd_t))
74 63
75#define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE)
76#define FIRST_USER_ADDRESS 0 64#define FIRST_USER_ADDRESS 0
77 65
78#ifdef CONFIG_32BIT 66#define PHYS_ADDR_MASK29 0x1fffffff
79#define PHYS_ADDR_MASK 0xffffffff 67#define PHYS_ADDR_MASK32 0xffffffff
68
69#ifdef CONFIG_PMB
70static inline unsigned long phys_addr_mask(void)
71{
72 /* Is the MMU in 29bit mode? */
73 if (__in_29bit_mode())
74 return PHYS_ADDR_MASK29;
75
76 return PHYS_ADDR_MASK32;
77}
78#elif defined(CONFIG_32BIT)
79static inline unsigned long phys_addr_mask(void)
80{
81 return PHYS_ADDR_MASK32;
82}
80#else 83#else
81#define PHYS_ADDR_MASK 0x1fffffff 84static inline unsigned long phys_addr_mask(void)
85{
86 return PHYS_ADDR_MASK29;
87}
82#endif 88#endif
83 89
84#define PTE_PHYS_MASK (PHYS_ADDR_MASK & PAGE_MASK) 90#define PTE_PHYS_MASK (phys_addr_mask() & PAGE_MASK)
85#define PTE_FLAGS_MASK (~(PTE_PHYS_MASK) << PAGE_SHIFT) 91#define PTE_FLAGS_MASK (~(PTE_PHYS_MASK) << PAGE_SHIFT)
86 92
87#ifdef CONFIG_SUPERH32 93#ifdef CONFIG_SUPERH32
@@ -135,9 +141,9 @@ typedef pte_t *pte_addr_t;
135#define pte_pfn(x) ((unsigned long)(((x).pte_low >> PAGE_SHIFT))) 141#define pte_pfn(x) ((unsigned long)(((x).pte_low >> PAGE_SHIFT)))
136 142
137/* 143/*
138 * No page table caches to initialise 144 * Initialise the page table caches
139 */ 145 */
140#define pgtable_cache_init() do { } while (0) 146extern void pgtable_cache_init(void);
141 147
142struct vm_area_struct; 148struct vm_area_struct;
143 149
@@ -147,8 +153,9 @@ extern void __update_tlb(struct vm_area_struct *vma,
147 unsigned long address, pte_t pte); 153 unsigned long address, pte_t pte);
148 154
149static inline void 155static inline void
150update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t pte) 156update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *ptep)
151{ 157{
158 pte_t pte = *ptep;
152 __update_cache(vma, address, pte); 159 __update_cache(vma, address, pte);
153 __update_tlb(vma, address, pte); 160 __update_tlb(vma, address, pte);
154} 161}
diff --git a/arch/sh/include/asm/pgtable_32.h b/arch/sh/include/asm/pgtable_32.h
index c0d359ce337b..e172d696e52b 100644
--- a/arch/sh/include/asm/pgtable_32.h
+++ b/arch/sh/include/asm/pgtable_32.h
@@ -71,6 +71,8 @@
71#define _PAGE_EXT_KERN_WRITE 0x1000 /* EPR4-bit: Kernel space writable */ 71#define _PAGE_EXT_KERN_WRITE 0x1000 /* EPR4-bit: Kernel space writable */
72#define _PAGE_EXT_KERN_READ 0x2000 /* EPR5-bit: Kernel space readable */ 72#define _PAGE_EXT_KERN_READ 0x2000 /* EPR5-bit: Kernel space readable */
73 73
74#define _PAGE_EXT_WIRED 0x4000 /* software: Wire TLB entry */
75
74/* Wrapper for extended mode pgprot twiddling */ 76/* Wrapper for extended mode pgprot twiddling */
75#define _PAGE_EXT(x) ((unsigned long long)(x) << 32) 77#define _PAGE_EXT(x) ((unsigned long long)(x) << 32)
76 78
@@ -108,7 +110,7 @@ static inline unsigned long copy_ptea_attributes(unsigned long x)
108#define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED | _PAGE_FILE) 110#define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED | _PAGE_FILE)
109#endif 111#endif
110 112
111#define _PAGE_FLAGS_HARDWARE_MASK (PHYS_ADDR_MASK & ~(_PAGE_CLEAR_FLAGS)) 113#define _PAGE_FLAGS_HARDWARE_MASK (phys_addr_mask() & ~(_PAGE_CLEAR_FLAGS))
112 114
113/* Hardware flags, page size encoding */ 115/* Hardware flags, page size encoding */
114#if !defined(CONFIG_MMU) 116#if !defined(CONFIG_MMU)
@@ -141,12 +143,14 @@ static inline unsigned long copy_ptea_attributes(unsigned long x)
141# elif defined(CONFIG_HUGETLB_PAGE_SIZE_64MB) 143# elif defined(CONFIG_HUGETLB_PAGE_SIZE_64MB)
142# define _PAGE_SZHUGE (_PAGE_EXT_ESZ2 | _PAGE_EXT_ESZ3) 144# define _PAGE_SZHUGE (_PAGE_EXT_ESZ2 | _PAGE_EXT_ESZ3)
143# endif 145# endif
146# define _PAGE_WIRED (_PAGE_EXT(_PAGE_EXT_WIRED))
144#else 147#else
145# if defined(CONFIG_HUGETLB_PAGE_SIZE_64K) 148# if defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
146# define _PAGE_SZHUGE (_PAGE_SZ1) 149# define _PAGE_SZHUGE (_PAGE_SZ1)
147# elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB) 150# elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB)
148# define _PAGE_SZHUGE (_PAGE_SZ0 | _PAGE_SZ1) 151# define _PAGE_SZHUGE (_PAGE_SZ0 | _PAGE_SZ1)
149# endif 152# endif
153# define _PAGE_WIRED (0)
150#endif 154#endif
151 155
152/* 156/*
@@ -344,7 +348,8 @@ static inline void set_pte(pte_t *ptep, pte_t pte)
344#define pte_special(pte) ((pte).pte_low & _PAGE_SPECIAL) 348#define pte_special(pte) ((pte).pte_low & _PAGE_SPECIAL)
345 349
346#ifdef CONFIG_X2TLB 350#ifdef CONFIG_X2TLB
347#define pte_write(pte) ((pte).pte_high & _PAGE_EXT_USER_WRITE) 351#define pte_write(pte) \
352 ((pte).pte_high & (_PAGE_EXT_USER_WRITE | _PAGE_EXT_KERN_WRITE))
348#else 353#else
349#define pte_write(pte) ((pte).pte_low & _PAGE_RW) 354#define pte_write(pte) ((pte).pte_low & _PAGE_RW)
350#endif 355#endif
@@ -358,7 +363,7 @@ static inline pte_t pte_##fn(pte_t pte) { pte.pte_##h op; return pte; }
358 * individually toggled (and user permissions are entirely decoupled from 363 * individually toggled (and user permissions are entirely decoupled from
359 * kernel permissions), we attempt to couple them a bit more sanely here. 364 * kernel permissions), we attempt to couple them a bit more sanely here.
360 */ 365 */
361PTE_BIT_FUNC(high, wrprotect, &= ~_PAGE_EXT_USER_WRITE); 366PTE_BIT_FUNC(high, wrprotect, &= ~(_PAGE_EXT_USER_WRITE | _PAGE_EXT_KERN_WRITE));
362PTE_BIT_FUNC(high, mkwrite, |= _PAGE_EXT_USER_WRITE | _PAGE_EXT_KERN_WRITE); 367PTE_BIT_FUNC(high, mkwrite, |= _PAGE_EXT_USER_WRITE | _PAGE_EXT_KERN_WRITE);
363PTE_BIT_FUNC(high, mkhuge, |= _PAGE_SZHUGE); 368PTE_BIT_FUNC(high, mkhuge, |= _PAGE_SZHUGE);
364#else 369#else
diff --git a/arch/sh/include/asm/pgtable_64.h b/arch/sh/include/asm/pgtable_64.h
index 17cdbecc3adc..0ee46776dad6 100644
--- a/arch/sh/include/asm/pgtable_64.h
+++ b/arch/sh/include/asm/pgtable_64.h
@@ -43,11 +43,6 @@ static __inline__ void set_pte(pte_t *pteptr, pte_t pteval)
43} 43}
44#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) 44#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
45 45
46static __inline__ void pmd_set(pmd_t *pmdp,pte_t *ptep)
47{
48 pmd_val(*pmdp) = (unsigned long) ptep;
49}
50
51/* 46/*
52 * PGD defines. Top level. 47 * PGD defines. Top level.
53 */ 48 */
@@ -128,8 +123,21 @@ static __inline__ void pmd_set(pmd_t *pmdp,pte_t *ptep)
128#define _PAGE_DIRTY 0x400 /* software: page accessed in write */ 123#define _PAGE_DIRTY 0x400 /* software: page accessed in write */
129#define _PAGE_ACCESSED 0x800 /* software: page referenced */ 124#define _PAGE_ACCESSED 0x800 /* software: page referenced */
130 125
126/* Wrapper for extended mode pgprot twiddling */
127#define _PAGE_EXT(x) ((unsigned long long)(x) << 32)
128
129/*
130 * We can use the sign-extended bits in the PTEL to get 32 bits of
131 * software flags. This works for now because no implementations uses
132 * anything above the PPN field.
133 */
134#define _PAGE_WIRED _PAGE_EXT(0x001) /* software: wire the tlb entry */
135
136#define _PAGE_CLEAR_FLAGS (_PAGE_PRESENT | _PAGE_FILE | _PAGE_SHARED | \
137 _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_WIRED)
138
131/* Mask which drops software flags */ 139/* Mask which drops software flags */
132#define _PAGE_FLAGS_HARDWARE_MASK 0xfffffffffffff3dbLL 140#define _PAGE_FLAGS_HARDWARE_MASK (NEFF_MASK & ~(_PAGE_CLEAR_FLAGS))
133 141
134/* 142/*
135 * HugeTLB support 143 * HugeTLB support
@@ -203,12 +211,6 @@ static __inline__ void pmd_set(pmd_t *pmdp,pte_t *ptep)
203#define pgprot_writecombine(prot) __pgprot(pgprot_val(prot) & ~_PAGE_CACHABLE) 211#define pgprot_writecombine(prot) __pgprot(pgprot_val(prot) & ~_PAGE_CACHABLE)
204 212
205/* 213/*
206 * Handling allocation failures during page table setup.
207 */
208extern void __handle_bad_pmd_kernel(pmd_t * pmd);
209#define __handle_bad_pmd(x) __handle_bad_pmd_kernel(x)
210
211/*
212 * PTE level access routines. 214 * PTE level access routines.
213 * 215 *
214 * Note1: 216 * Note1:
diff --git a/arch/sh/include/asm/processor.h b/arch/sh/include/asm/processor.h
index 017e0c1807b2..9605e062840f 100644
--- a/arch/sh/include/asm/processor.h
+++ b/arch/sh/include/asm/processor.h
@@ -98,13 +98,34 @@ extern struct sh_cpuinfo cpu_data[];
98 98
99/* Forward decl */ 99/* Forward decl */
100struct seq_operations; 100struct seq_operations;
101struct task_struct;
101 102
102extern struct pt_regs fake_swapper_regs; 103extern struct pt_regs fake_swapper_regs;
103 104
105/* arch/sh/kernel/process.c */
106extern unsigned int xstate_size;
107extern void free_thread_xstate(struct task_struct *);
108extern struct kmem_cache *task_xstate_cachep;
109
110/* arch/sh/mm/alignment.c */
111extern int get_unalign_ctl(struct task_struct *, unsigned long addr);
112extern int set_unalign_ctl(struct task_struct *, unsigned int val);
113
114#define GET_UNALIGN_CTL(tsk, addr) get_unalign_ctl((tsk), (addr))
115#define SET_UNALIGN_CTL(tsk, val) set_unalign_ctl((tsk), (val))
116
117/* arch/sh/mm/init.c */
118extern unsigned int mem_init_done;
119
104/* arch/sh/kernel/setup.c */ 120/* arch/sh/kernel/setup.c */
105const char *get_cpu_subtype(struct sh_cpuinfo *c); 121const char *get_cpu_subtype(struct sh_cpuinfo *c);
106extern const struct seq_operations cpuinfo_op; 122extern const struct seq_operations cpuinfo_op;
107 123
124/* thread_struct flags */
125#define SH_THREAD_UAC_NOPRINT (1 << 0)
126#define SH_THREAD_UAC_SIGBUS (1 << 1)
127#define SH_THREAD_UAC_MASK (SH_THREAD_UAC_NOPRINT | SH_THREAD_UAC_SIGBUS)
128
108/* processor boot mode configuration */ 129/* processor boot mode configuration */
109#define MODE_PIN0 (1 << 0) 130#define MODE_PIN0 (1 << 0)
110#define MODE_PIN1 (1 << 1) 131#define MODE_PIN1 (1 << 1)
diff --git a/arch/sh/include/asm/processor_32.h b/arch/sh/include/asm/processor_32.h
index 9a8714945dc9..572b4eb09493 100644
--- a/arch/sh/include/asm/processor_32.h
+++ b/arch/sh/include/asm/processor_32.h
@@ -14,6 +14,7 @@
14#include <asm/page.h> 14#include <asm/page.h>
15#include <asm/types.h> 15#include <asm/types.h>
16#include <asm/ptrace.h> 16#include <asm/ptrace.h>
17#include <asm/hw_breakpoint.h>
17 18
18/* 19/*
19 * Default implementation of macro that returns current 20 * Default implementation of macro that returns current
@@ -56,6 +57,7 @@ asmlinkage void __init sh_cpu_init(void);
56#define SR_DSP 0x00001000 57#define SR_DSP 0x00001000
57#define SR_IMASK 0x000000f0 58#define SR_IMASK 0x000000f0
58#define SR_FD 0x00008000 59#define SR_FD 0x00008000
60#define SR_MD 0x40000000
59 61
60/* 62/*
61 * DSP structure and data 63 * DSP structure and data
@@ -89,9 +91,9 @@ struct sh_fpu_soft_struct {
89 unsigned long entry_pc; 91 unsigned long entry_pc;
90}; 92};
91 93
92union sh_fpu_union { 94union thread_xstate {
93 struct sh_fpu_hard_struct hard; 95 struct sh_fpu_hard_struct hardfpu;
94 struct sh_fpu_soft_struct soft; 96 struct sh_fpu_soft_struct softfpu;
95}; 97};
96 98
97struct thread_struct { 99struct thread_struct {
@@ -99,44 +101,36 @@ struct thread_struct {
99 unsigned long sp; 101 unsigned long sp;
100 unsigned long pc; 102 unsigned long pc;
101 103
102 /* Hardware debugging registers */ 104 /* Various thread flags, see SH_THREAD_xxx */
103 unsigned long ubc_pc; 105 unsigned long flags;
104 106
105 /* floating point info */ 107 /* Save middle states of ptrace breakpoints */
106 union sh_fpu_union fpu; 108 struct perf_event *ptrace_bps[HBP_NUM];
107 109
108#ifdef CONFIG_SH_DSP 110#ifdef CONFIG_SH_DSP
109 /* Dsp status information */ 111 /* Dsp status information */
110 struct sh_dsp_struct dsp_status; 112 struct sh_dsp_struct dsp_status;
111#endif 113#endif
112};
113 114
114/* Count of active tasks with UBC settings */ 115 /* Extended processor state */
115extern int ubc_usercnt; 116 union thread_xstate *xstate;
117};
116 118
117#define INIT_THREAD { \ 119#define INIT_THREAD { \
118 .sp = sizeof(init_stack) + (long) &init_stack, \ 120 .sp = sizeof(init_stack) + (long) &init_stack, \
121 .flags = 0, \
119} 122}
120 123
121/*
122 * Do necessary setup to start up a newly executed thread.
123 */
124#define start_thread(_regs, new_pc, new_sp) \
125 set_fs(USER_DS); \
126 _regs->pr = 0; \
127 _regs->sr = SR_FD; /* User mode. */ \
128 _regs->pc = new_pc; \
129 _regs->regs[15] = new_sp
130
131/* Forward declaration, a strange C thing */ 124/* Forward declaration, a strange C thing */
132struct task_struct; 125struct task_struct;
133struct mm_struct; 126
127extern void start_thread(struct pt_regs *regs, unsigned long new_pc, unsigned long new_sp);
134 128
135/* Free all resources held by a thread. */ 129/* Free all resources held by a thread. */
136extern void release_thread(struct task_struct *); 130extern void release_thread(struct task_struct *);
137 131
138/* Prepare to copy thread state - unlazy all lazy status */ 132/* Prepare to copy thread state - unlazy all lazy status */
139#define prepare_to_copy(tsk) do { } while (0) 133void prepare_to_copy(struct task_struct *tsk);
140 134
141/* 135/*
142 * create a kernel thread without removing it from tasklists 136 * create a kernel thread without removing it from tasklists
diff --git a/arch/sh/include/asm/processor_64.h b/arch/sh/include/asm/processor_64.h
index 5727d31b0ccf..621bc4618c6b 100644
--- a/arch/sh/include/asm/processor_64.h
+++ b/arch/sh/include/asm/processor_64.h
@@ -87,26 +87,31 @@ struct sh_fpu_hard_struct {
87 /* long status; * software status information */ 87 /* long status; * software status information */
88}; 88};
89 89
90#if 0
91/* Dummy fpu emulator */ 90/* Dummy fpu emulator */
92struct sh_fpu_soft_struct { 91struct sh_fpu_soft_struct {
93 unsigned long long fp_regs[32]; 92 unsigned long fp_regs[64];
94 unsigned int fpscr; 93 unsigned int fpscr;
95 unsigned char lookahead; 94 unsigned char lookahead;
96 unsigned long entry_pc; 95 unsigned long entry_pc;
97}; 96};
98#endif
99 97
100union sh_fpu_union { 98union thread_xstate {
101 struct sh_fpu_hard_struct hard; 99 struct sh_fpu_hard_struct hardfpu;
102 /* 'hard' itself only produces 32 bit alignment, yet we need 100 struct sh_fpu_soft_struct softfpu;
103 to access it using 64 bit load/store as well. */ 101 /*
102 * The structure definitions only produce 32 bit alignment, yet we need
103 * to access them using 64 bit load/store as well.
104 */
104 unsigned long long alignment_dummy; 105 unsigned long long alignment_dummy;
105}; 106};
106 107
107struct thread_struct { 108struct thread_struct {
108 unsigned long sp; 109 unsigned long sp;
109 unsigned long pc; 110 unsigned long pc;
111
112 /* Various thread flags, see SH_THREAD_xxx */
113 unsigned long flags;
114
110 /* This stores the address of the pt_regs built during a context 115 /* This stores the address of the pt_regs built during a context
111 switch, or of the register save area built for a kernel mode 116 switch, or of the register save area built for a kernel mode
112 exception. It is used for backtracing the stack of a sleeping task 117 exception. It is used for backtracing the stack of a sleeping task
@@ -122,7 +127,7 @@ struct thread_struct {
122 /* Hardware debugging registers may come here */ 127 /* Hardware debugging registers may come here */
123 128
124 /* floating point info */ 129 /* floating point info */
125 union sh_fpu_union fpu; 130 union thread_xstate *xstate;
126}; 131};
127 132
128#define INIT_MMAP \ 133#define INIT_MMAP \
@@ -137,7 +142,7 @@ struct thread_struct {
137 .trap_no = 0, \ 142 .trap_no = 0, \
138 .error_code = 0, \ 143 .error_code = 0, \
139 .address = 0, \ 144 .address = 0, \
140 .fpu = { { { 0, } }, } \ 145 .flags = 0, \
141} 146}
142 147
143/* 148/*
diff --git a/arch/sh/include/asm/ptrace.h b/arch/sh/include/asm/ptrace.h
index 1dc12cb44a2d..2168fde25611 100644
--- a/arch/sh/include/asm/ptrace.h
+++ b/arch/sh/include/asm/ptrace.h
@@ -102,13 +102,15 @@ struct pt_dspregs {
102#define PTRACE_GETDSPREGS 55 /* DSP registers */ 102#define PTRACE_GETDSPREGS 55 /* DSP registers */
103#define PTRACE_SETDSPREGS 56 103#define PTRACE_SETDSPREGS 56
104 104
105#define PT_TEXT_END_ADDR 240 105#define PT_TEXT_END_ADDR 240
106#define PT_TEXT_ADDR 244 /* &(struct user)->start_code */ 106#define PT_TEXT_ADDR 244 /* &(struct user)->start_code */
107#define PT_DATA_ADDR 248 /* &(struct user)->start_data */ 107#define PT_DATA_ADDR 248 /* &(struct user)->start_data */
108#define PT_TEXT_LEN 252 108#define PT_TEXT_LEN 252
109 109
110#ifdef __KERNEL__ 110#ifdef __KERNEL__
111#include <asm/addrspace.h> 111#include <asm/addrspace.h>
112#include <asm/page.h>
113#include <asm/system.h>
112 114
113#define user_mode(regs) (((regs)->sr & 0x40000000)==0) 115#define user_mode(regs) (((regs)->sr & 0x40000000)==0)
114#define instruction_pointer(regs) ((unsigned long)(regs)->pc) 116#define instruction_pointer(regs) ((unsigned long)(regs)->pc)
@@ -121,8 +123,12 @@ extern void show_regs(struct pt_regs *);
121struct task_struct; 123struct task_struct;
122 124
123#define arch_has_single_step() (1) 125#define arch_has_single_step() (1)
124extern void user_enable_single_step(struct task_struct *); 126
125extern void user_disable_single_step(struct task_struct *); 127struct perf_event;
128struct perf_sample_data;
129
130extern void ptrace_triggered(struct perf_event *bp, int nmi,
131 struct perf_sample_data *data, struct pt_regs *regs);
126 132
127#define task_pt_regs(task) \ 133#define task_pt_regs(task) \
128 ((struct pt_regs *) (task_stack_page(task) + THREAD_SIZE) - 1) 134 ((struct pt_regs *) (task_stack_page(task) + THREAD_SIZE) - 1)
@@ -131,10 +137,8 @@ static inline unsigned long profile_pc(struct pt_regs *regs)
131{ 137{
132 unsigned long pc = instruction_pointer(regs); 138 unsigned long pc = instruction_pointer(regs);
133 139
134#ifdef P2SEG 140 if (virt_addr_uncached(pc))
135 if (pc >= P2SEG && pc < P3SEG) 141 return CAC_ADDR(pc);
136 pc -= 0x20000000;
137#endif
138 142
139 return pc; 143 return pc;
140} 144}
diff --git a/arch/sh/include/asm/reboot.h b/arch/sh/include/asm/reboot.h
new file mode 100644
index 000000000000..b3da0c63fc3d
--- /dev/null
+++ b/arch/sh/include/asm/reboot.h
@@ -0,0 +1,21 @@
1#ifndef __ASM_SH_REBOOT_H
2#define __ASM_SH_REBOOT_H
3
4#include <linux/kdebug.h>
5
6struct pt_regs;
7
8struct machine_ops {
9 void (*restart)(char *cmd);
10 void (*halt)(void);
11 void (*power_off)(void);
12 void (*shutdown)(void);
13 void (*crash_shutdown)(struct pt_regs *);
14};
15
16extern struct machine_ops machine_ops;
17
18/* arch/sh/kernel/machine_kexec.c */
19void native_machine_crash_shutdown(struct pt_regs *regs);
20
21#endif /* __ASM_SH_REBOOT_H */
diff --git a/arch/sh/include/asm/scatterlist.h b/arch/sh/include/asm/scatterlist.h
index 327cc2e4c97b..e38d1d4c7f6f 100644
--- a/arch/sh/include/asm/scatterlist.h
+++ b/arch/sh/include/asm/scatterlist.h
@@ -1,7 +1,7 @@
1#ifndef __ASM_SH_SCATTERLIST_H 1#ifndef __ASM_SH_SCATTERLIST_H
2#define __ASM_SH_SCATTERLIST_H 2#define __ASM_SH_SCATTERLIST_H
3 3
4#define ISA_DMA_THRESHOLD PHYS_ADDR_MASK 4#define ISA_DMA_THRESHOLD phys_addr_mask()
5 5
6#include <asm-generic/scatterlist.h> 6#include <asm-generic/scatterlist.h>
7 7
diff --git a/arch/sh/include/asm/setup.h b/arch/sh/include/asm/setup.h
index ce3743599b27..4758325bb24a 100644
--- a/arch/sh/include/asm/setup.h
+++ b/arch/sh/include/asm/setup.h
@@ -18,7 +18,6 @@
18/* ... */ 18/* ... */
19#define COMMAND_LINE ((char *) (PARAM+0x100)) 19#define COMMAND_LINE ((char *) (PARAM+0x100))
20 20
21int setup_early_printk(char *);
22void sh_mv_setup(void); 21void sh_mv_setup(void);
23 22
24#endif /* __KERNEL__ */ 23#endif /* __KERNEL__ */
diff --git a/arch/sh/include/asm/sh_bios.h b/arch/sh/include/asm/sh_bios.h
index d9c96d7cf6c7..95714c28422b 100644
--- a/arch/sh/include/asm/sh_bios.h
+++ b/arch/sh/include/asm/sh_bios.h
@@ -1,18 +1,27 @@
1#ifndef __ASM_SH_BIOS_H 1#ifndef __ASM_SH_BIOS_H
2#define __ASM_SH_BIOS_H 2#define __ASM_SH_BIOS_H
3 3
4#ifdef CONFIG_SH_STANDARD_BIOS
5
4/* 6/*
5 * Copyright (C) 2000 Greg Banks, Mitch Davis 7 * Copyright (C) 2000 Greg Banks, Mitch Davis
6 * C API to interface to the standard LinuxSH BIOS 8 * C API to interface to the standard LinuxSH BIOS
7 * usually from within the early stages of kernel boot. 9 * usually from within the early stages of kernel boot.
8 */ 10 */
9
10
11extern void sh_bios_console_write(const char *buf, unsigned int len); 11extern void sh_bios_console_write(const char *buf, unsigned int len);
12extern void sh_bios_char_out(char ch);
13extern void sh_bios_gdb_detach(void); 12extern void sh_bios_gdb_detach(void);
14 13
15extern void sh_bios_get_node_addr(unsigned char *node_addr); 14extern void sh_bios_get_node_addr(unsigned char *node_addr);
16extern void sh_bios_shutdown(unsigned int how); 15extern void sh_bios_shutdown(unsigned int how);
17 16
17extern void sh_bios_vbr_init(void);
18extern void sh_bios_vbr_reload(void);
19
20#else
21
22static inline void sh_bios_vbr_init(void) { }
23static inline void sh_bios_vbr_reload(void) { }
24
25#endif /* CONFIG_SH_STANDARD_BIOS */
26
18#endif /* __ASM_SH_BIOS_H */ 27#endif /* __ASM_SH_BIOS_H */
diff --git a/arch/sh/include/asm/sh_eth.h b/arch/sh/include/asm/sh_eth.h
index acf99700deed..f739061e2ee4 100644
--- a/arch/sh/include/asm/sh_eth.h
+++ b/arch/sh/include/asm/sh_eth.h
@@ -7,6 +7,7 @@ struct sh_eth_plat_data {
7 int phy; 7 int phy;
8 int edmac_endian; 8 int edmac_endian;
9 9
10 unsigned char mac_addr[6];
10 unsigned no_ether_link:1; 11 unsigned no_ether_link:1;
11 unsigned ether_link_active_low:1; 12 unsigned ether_link_active_low:1;
12}; 13};
diff --git a/arch/sh/include/asm/sh_keysc.h b/arch/sh/include/asm/sh_keysc.h
deleted file mode 100644
index 4a65b1e40eab..000000000000
--- a/arch/sh/include/asm/sh_keysc.h
+++ /dev/null
@@ -1,14 +0,0 @@
1#ifndef __ASM_KEYSC_H__
2#define __ASM_KEYSC_H__
3
4#define SH_KEYSC_MAXKEYS 30
5
6struct sh_keysc_info {
7 enum { SH_KEYSC_MODE_1, SH_KEYSC_MODE_2, SH_KEYSC_MODE_3 } mode;
8 int scan_timing; /* 0 -> 7, see KYCR1, SCN[2:0] */
9 int delay;
10 int kycr2_delay;
11 int keycodes[SH_KEYSC_MAXKEYS];
12};
13
14#endif /* __ASM_KEYSC_H__ */
diff --git a/arch/sh/include/asm/siu.h b/arch/sh/include/asm/siu.h
new file mode 100644
index 000000000000..f1b1e6944a5f
--- /dev/null
+++ b/arch/sh/include/asm/siu.h
@@ -0,0 +1,26 @@
1/*
2 * platform header for the SIU ASoC driver
3 *
4 * Copyright (C) 2009-2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef ASM_SIU_H
12#define ASM_SIU_H
13
14#include <asm/dmaengine.h>
15
16struct device;
17
18struct siu_platform {
19 struct device *dma_dev;
20 enum sh_dmae_slave_chan_id dma_slave_tx_a;
21 enum sh_dmae_slave_chan_id dma_slave_rx_a;
22 enum sh_dmae_slave_chan_id dma_slave_tx_b;
23 enum sh_dmae_slave_chan_id dma_slave_rx_b;
24};
25
26#endif /* ASM_SIU_H */
diff --git a/arch/sh/include/asm/spinlock.h b/arch/sh/include/asm/spinlock.h
index a28c9f0053fd..bdc0f3b6c56a 100644
--- a/arch/sh/include/asm/spinlock.h
+++ b/arch/sh/include/asm/spinlock.h
@@ -23,10 +23,10 @@
23 * Your basic SMP spinlocks, allowing only a single CPU anywhere 23 * Your basic SMP spinlocks, allowing only a single CPU anywhere
24 */ 24 */
25 25
26#define __raw_spin_is_locked(x) ((x)->lock <= 0) 26#define arch_spin_is_locked(x) ((x)->lock <= 0)
27#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock) 27#define arch_spin_lock_flags(lock, flags) arch_spin_lock(lock)
28#define __raw_spin_unlock_wait(x) \ 28#define arch_spin_unlock_wait(x) \
29 do { while (__raw_spin_is_locked(x)) cpu_relax(); } while (0) 29 do { while (arch_spin_is_locked(x)) cpu_relax(); } while (0)
30 30
31/* 31/*
32 * Simple spin lock operations. There are two variants, one clears IRQ's 32 * Simple spin lock operations. There are two variants, one clears IRQ's
@@ -34,14 +34,14 @@
34 * 34 *
35 * We make no fairness assumptions. They have a cost. 35 * We make no fairness assumptions. They have a cost.
36 */ 36 */
37static inline void __raw_spin_lock(raw_spinlock_t *lock) 37static inline void arch_spin_lock(arch_spinlock_t *lock)
38{ 38{
39 unsigned long tmp; 39 unsigned long tmp;
40 unsigned long oldval; 40 unsigned long oldval;
41 41
42 __asm__ __volatile__ ( 42 __asm__ __volatile__ (
43 "1: \n\t" 43 "1: \n\t"
44 "movli.l @%2, %0 ! __raw_spin_lock \n\t" 44 "movli.l @%2, %0 ! arch_spin_lock \n\t"
45 "mov %0, %1 \n\t" 45 "mov %0, %1 \n\t"
46 "mov #0, %0 \n\t" 46 "mov #0, %0 \n\t"
47 "movco.l %0, @%2 \n\t" 47 "movco.l %0, @%2 \n\t"
@@ -54,12 +54,12 @@ static inline void __raw_spin_lock(raw_spinlock_t *lock)
54 ); 54 );
55} 55}
56 56
57static inline void __raw_spin_unlock(raw_spinlock_t *lock) 57static inline void arch_spin_unlock(arch_spinlock_t *lock)
58{ 58{
59 unsigned long tmp; 59 unsigned long tmp;
60 60
61 __asm__ __volatile__ ( 61 __asm__ __volatile__ (
62 "mov #1, %0 ! __raw_spin_unlock \n\t" 62 "mov #1, %0 ! arch_spin_unlock \n\t"
63 "mov.l %0, @%1 \n\t" 63 "mov.l %0, @%1 \n\t"
64 : "=&z" (tmp) 64 : "=&z" (tmp)
65 : "r" (&lock->lock) 65 : "r" (&lock->lock)
@@ -67,13 +67,13 @@ static inline void __raw_spin_unlock(raw_spinlock_t *lock)
67 ); 67 );
68} 68}
69 69
70static inline int __raw_spin_trylock(raw_spinlock_t *lock) 70static inline int arch_spin_trylock(arch_spinlock_t *lock)
71{ 71{
72 unsigned long tmp, oldval; 72 unsigned long tmp, oldval;
73 73
74 __asm__ __volatile__ ( 74 __asm__ __volatile__ (
75 "1: \n\t" 75 "1: \n\t"
76 "movli.l @%2, %0 ! __raw_spin_trylock \n\t" 76 "movli.l @%2, %0 ! arch_spin_trylock \n\t"
77 "mov %0, %1 \n\t" 77 "mov %0, %1 \n\t"
78 "mov #0, %0 \n\t" 78 "mov #0, %0 \n\t"
79 "movco.l %0, @%2 \n\t" 79 "movco.l %0, @%2 \n\t"
@@ -100,21 +100,21 @@ static inline int __raw_spin_trylock(raw_spinlock_t *lock)
100 * read_can_lock - would read_trylock() succeed? 100 * read_can_lock - would read_trylock() succeed?
101 * @lock: the rwlock in question. 101 * @lock: the rwlock in question.
102 */ 102 */
103#define __raw_read_can_lock(x) ((x)->lock > 0) 103#define arch_read_can_lock(x) ((x)->lock > 0)
104 104
105/** 105/**
106 * write_can_lock - would write_trylock() succeed? 106 * write_can_lock - would write_trylock() succeed?
107 * @lock: the rwlock in question. 107 * @lock: the rwlock in question.
108 */ 108 */
109#define __raw_write_can_lock(x) ((x)->lock == RW_LOCK_BIAS) 109#define arch_write_can_lock(x) ((x)->lock == RW_LOCK_BIAS)
110 110
111static inline void __raw_read_lock(raw_rwlock_t *rw) 111static inline void arch_read_lock(arch_rwlock_t *rw)
112{ 112{
113 unsigned long tmp; 113 unsigned long tmp;
114 114
115 __asm__ __volatile__ ( 115 __asm__ __volatile__ (
116 "1: \n\t" 116 "1: \n\t"
117 "movli.l @%1, %0 ! __raw_read_lock \n\t" 117 "movli.l @%1, %0 ! arch_read_lock \n\t"
118 "cmp/pl %0 \n\t" 118 "cmp/pl %0 \n\t"
119 "bf 1b \n\t" 119 "bf 1b \n\t"
120 "add #-1, %0 \n\t" 120 "add #-1, %0 \n\t"
@@ -126,13 +126,13 @@ static inline void __raw_read_lock(raw_rwlock_t *rw)
126 ); 126 );
127} 127}
128 128
129static inline void __raw_read_unlock(raw_rwlock_t *rw) 129static inline void arch_read_unlock(arch_rwlock_t *rw)
130{ 130{
131 unsigned long tmp; 131 unsigned long tmp;
132 132
133 __asm__ __volatile__ ( 133 __asm__ __volatile__ (
134 "1: \n\t" 134 "1: \n\t"
135 "movli.l @%1, %0 ! __raw_read_unlock \n\t" 135 "movli.l @%1, %0 ! arch_read_unlock \n\t"
136 "add #1, %0 \n\t" 136 "add #1, %0 \n\t"
137 "movco.l %0, @%1 \n\t" 137 "movco.l %0, @%1 \n\t"
138 "bf 1b \n\t" 138 "bf 1b \n\t"
@@ -142,13 +142,13 @@ static inline void __raw_read_unlock(raw_rwlock_t *rw)
142 ); 142 );
143} 143}
144 144
145static inline void __raw_write_lock(raw_rwlock_t *rw) 145static inline void arch_write_lock(arch_rwlock_t *rw)
146{ 146{
147 unsigned long tmp; 147 unsigned long tmp;
148 148
149 __asm__ __volatile__ ( 149 __asm__ __volatile__ (
150 "1: \n\t" 150 "1: \n\t"
151 "movli.l @%1, %0 ! __raw_write_lock \n\t" 151 "movli.l @%1, %0 ! arch_write_lock \n\t"
152 "cmp/hs %2, %0 \n\t" 152 "cmp/hs %2, %0 \n\t"
153 "bf 1b \n\t" 153 "bf 1b \n\t"
154 "sub %2, %0 \n\t" 154 "sub %2, %0 \n\t"
@@ -160,23 +160,23 @@ static inline void __raw_write_lock(raw_rwlock_t *rw)
160 ); 160 );
161} 161}
162 162
163static inline void __raw_write_unlock(raw_rwlock_t *rw) 163static inline void arch_write_unlock(arch_rwlock_t *rw)
164{ 164{
165 __asm__ __volatile__ ( 165 __asm__ __volatile__ (
166 "mov.l %1, @%0 ! __raw_write_unlock \n\t" 166 "mov.l %1, @%0 ! arch_write_unlock \n\t"
167 : 167 :
168 : "r" (&rw->lock), "r" (RW_LOCK_BIAS) 168 : "r" (&rw->lock), "r" (RW_LOCK_BIAS)
169 : "t", "memory" 169 : "t", "memory"
170 ); 170 );
171} 171}
172 172
173static inline int __raw_read_trylock(raw_rwlock_t *rw) 173static inline int arch_read_trylock(arch_rwlock_t *rw)
174{ 174{
175 unsigned long tmp, oldval; 175 unsigned long tmp, oldval;
176 176
177 __asm__ __volatile__ ( 177 __asm__ __volatile__ (
178 "1: \n\t" 178 "1: \n\t"
179 "movli.l @%2, %0 ! __raw_read_trylock \n\t" 179 "movli.l @%2, %0 ! arch_read_trylock \n\t"
180 "mov %0, %1 \n\t" 180 "mov %0, %1 \n\t"
181 "cmp/pl %0 \n\t" 181 "cmp/pl %0 \n\t"
182 "bf 2f \n\t" 182 "bf 2f \n\t"
@@ -193,13 +193,13 @@ static inline int __raw_read_trylock(raw_rwlock_t *rw)
193 return (oldval > 0); 193 return (oldval > 0);
194} 194}
195 195
196static inline int __raw_write_trylock(raw_rwlock_t *rw) 196static inline int arch_write_trylock(arch_rwlock_t *rw)
197{ 197{
198 unsigned long tmp, oldval; 198 unsigned long tmp, oldval;
199 199
200 __asm__ __volatile__ ( 200 __asm__ __volatile__ (
201 "1: \n\t" 201 "1: \n\t"
202 "movli.l @%2, %0 ! __raw_write_trylock \n\t" 202 "movli.l @%2, %0 ! arch_write_trylock \n\t"
203 "mov %0, %1 \n\t" 203 "mov %0, %1 \n\t"
204 "cmp/hs %3, %0 \n\t" 204 "cmp/hs %3, %0 \n\t"
205 "bf 2f \n\t" 205 "bf 2f \n\t"
@@ -216,11 +216,11 @@ static inline int __raw_write_trylock(raw_rwlock_t *rw)
216 return (oldval > (RW_LOCK_BIAS - 1)); 216 return (oldval > (RW_LOCK_BIAS - 1));
217} 217}
218 218
219#define __raw_read_lock_flags(lock, flags) __raw_read_lock(lock) 219#define arch_read_lock_flags(lock, flags) arch_read_lock(lock)
220#define __raw_write_lock_flags(lock, flags) __raw_write_lock(lock) 220#define arch_write_lock_flags(lock, flags) arch_write_lock(lock)
221 221
222#define _raw_spin_relax(lock) cpu_relax() 222#define arch_spin_relax(lock) cpu_relax()
223#define _raw_read_relax(lock) cpu_relax() 223#define arch_read_relax(lock) cpu_relax()
224#define _raw_write_relax(lock) cpu_relax() 224#define arch_write_relax(lock) cpu_relax()
225 225
226#endif /* __ASM_SH_SPINLOCK_H */ 226#endif /* __ASM_SH_SPINLOCK_H */
diff --git a/arch/sh/include/asm/spinlock_types.h b/arch/sh/include/asm/spinlock_types.h
index b4d244e7b60c..9b7560db06ca 100644
--- a/arch/sh/include/asm/spinlock_types.h
+++ b/arch/sh/include/asm/spinlock_types.h
@@ -7,15 +7,15 @@
7 7
8typedef struct { 8typedef struct {
9 volatile unsigned int lock; 9 volatile unsigned int lock;
10} raw_spinlock_t; 10} arch_spinlock_t;
11 11
12#define __RAW_SPIN_LOCK_UNLOCKED { 1 } 12#define __ARCH_SPIN_LOCK_UNLOCKED { 1 }
13 13
14typedef struct { 14typedef struct {
15 volatile unsigned int lock; 15 volatile unsigned int lock;
16} raw_rwlock_t; 16} arch_rwlock_t;
17 17
18#define RW_LOCK_BIAS 0x01000000 18#define RW_LOCK_BIAS 0x01000000
19#define __RAW_RW_LOCK_UNLOCKED { RW_LOCK_BIAS } 19#define __ARCH_RW_LOCK_UNLOCKED { RW_LOCK_BIAS }
20 20
21#endif 21#endif
diff --git a/arch/sh/include/asm/suspend.h b/arch/sh/include/asm/suspend.h
index 5c8ea28ff7a4..64eb41a063e8 100644
--- a/arch/sh/include/asm/suspend.h
+++ b/arch/sh/include/asm/suspend.h
@@ -2,6 +2,7 @@
2#define _ASM_SH_SUSPEND_H 2#define _ASM_SH_SUSPEND_H
3 3
4#ifndef __ASSEMBLY__ 4#ifndef __ASSEMBLY__
5#include <linux/notifier.h>
5static inline int arch_prepare_suspend(void) { return 0; } 6static inline int arch_prepare_suspend(void) { return 0; }
6 7
7#include <asm/ptrace.h> 8#include <asm/ptrace.h>
@@ -19,6 +20,69 @@ void sh_mobile_setup_cpuidle(void);
19static inline void sh_mobile_setup_cpuidle(void) {} 20static inline void sh_mobile_setup_cpuidle(void) {}
20#endif 21#endif
21 22
23/* notifier chains for pre/post sleep hooks */
24extern struct atomic_notifier_head sh_mobile_pre_sleep_notifier_list;
25extern struct atomic_notifier_head sh_mobile_post_sleep_notifier_list;
26
27/* priority levels for notifiers */
28#define SH_MOBILE_SLEEP_BOARD 0
29#define SH_MOBILE_SLEEP_CPU 1
30#define SH_MOBILE_PRE(x) (x)
31#define SH_MOBILE_POST(x) (-(x))
32
33/* board code registration function for self-refresh assembly snippets */
34void sh_mobile_register_self_refresh(unsigned long flags,
35 void *pre_start, void *pre_end,
36 void *post_start, void *post_end);
37
38/* register structure for address/data information */
39struct sh_sleep_regs {
40 unsigned long stbcr;
41 unsigned long bar;
42
43 /* MMU */
44 unsigned long pteh;
45 unsigned long ptel;
46 unsigned long ttb;
47 unsigned long tea;
48 unsigned long mmucr;
49 unsigned long ptea;
50 unsigned long pascr;
51 unsigned long irmcr;
52
53 /* Cache */
54 unsigned long ccr;
55 unsigned long ramcr;
56};
57
58/* data area for low-level sleep code */
59struct sh_sleep_data {
60 /* current sleep mode (SUSP_SH_...) */
61 unsigned long mode;
62
63 /* addresses of board specific self-refresh snippets */
64 unsigned long sf_pre;
65 unsigned long sf_post;
66
67 /* address of resume code */
68 unsigned long resume;
69
70 /* register state saved and restored by the assembly code */
71 unsigned long vbr;
72 unsigned long spc;
73 unsigned long sr;
74 unsigned long sp;
75
76 /* structure for keeping register addresses */
77 struct sh_sleep_regs addr;
78
79 /* structure for saving/restoring register state */
80 struct sh_sleep_regs data;
81};
82
83/* a bitmap of supported sleep modes (SUSP_SH..) */
84extern unsigned long sh_mobile_sleep_supported;
85
22#endif 86#endif
23 87
24/* flags passed to assembly suspend code */ 88/* flags passed to assembly suspend code */
@@ -27,5 +91,7 @@ static inline void sh_mobile_setup_cpuidle(void) {}
27#define SUSP_SH_RSTANDBY (1 << 2) /* SH-Mobile R-standby mode */ 91#define SUSP_SH_RSTANDBY (1 << 2) /* SH-Mobile R-standby mode */
28#define SUSP_SH_USTANDBY (1 << 3) /* SH-Mobile U-standby mode */ 92#define SUSP_SH_USTANDBY (1 << 3) /* SH-Mobile U-standby mode */
29#define SUSP_SH_SF (1 << 4) /* Enable self-refresh */ 93#define SUSP_SH_SF (1 << 4) /* Enable self-refresh */
94#define SUSP_SH_MMU (1 << 5) /* Save/restore MMU and cache */
95#define SUSP_SH_REGS (1 << 6) /* Save/restore registers */
30 96
31#endif /* _ASM_SH_SUSPEND_H */ 97#endif /* _ASM_SH_SUSPEND_H */
diff --git a/arch/sh/include/asm/syscall.h b/arch/sh/include/asm/syscall.h
index 6a381429ee9d..aa7777bdc370 100644
--- a/arch/sh/include/asm/syscall.h
+++ b/arch/sh/include/asm/syscall.h
@@ -1,6 +1,8 @@
1#ifndef __ASM_SH_SYSCALL_H 1#ifndef __ASM_SH_SYSCALL_H
2#define __ASM_SH_SYSCALL_H 2#define __ASM_SH_SYSCALL_H
3 3
4extern const unsigned long sys_call_table[];
5
4#ifdef CONFIG_SUPERH32 6#ifdef CONFIG_SUPERH32
5# include "syscall_32.h" 7# include "syscall_32.h"
6#else 8#else
diff --git a/arch/sh/include/asm/syscalls.h b/arch/sh/include/asm/syscalls.h
index c1e2b8deb837..507725af2e54 100644
--- a/arch/sh/include/asm/syscalls.h
+++ b/arch/sh/include/asm/syscalls.h
@@ -3,17 +3,12 @@
3 3
4#ifdef __KERNEL__ 4#ifdef __KERNEL__
5 5
6struct old_utsname;
7
8asmlinkage int old_mmap(unsigned long addr, unsigned long len, 6asmlinkage int old_mmap(unsigned long addr, unsigned long len,
9 unsigned long prot, unsigned long flags, 7 unsigned long prot, unsigned long flags,
10 int fd, unsigned long off); 8 int fd, unsigned long off);
11asmlinkage long sys_mmap2(unsigned long addr, unsigned long len, 9asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
12 unsigned long prot, unsigned long flags, 10 unsigned long prot, unsigned long flags,
13 unsigned long fd, unsigned long pgoff); 11 unsigned long fd, unsigned long pgoff);
14asmlinkage int sys_ipc(uint call, int first, int second,
15 int third, void __user *ptr, long fifth);
16asmlinkage int sys_uname(struct old_utsname __user *name);
17 12
18#ifdef CONFIG_SUPERH32 13#ifdef CONFIG_SUPERH32
19# include "syscalls_32.h" 14# include "syscalls_32.h"
diff --git a/arch/sh/include/asm/system.h b/arch/sh/include/asm/system.h
index b5c5acdc8c0e..0bd7a17d5e1a 100644
--- a/arch/sh/include/asm/system.h
+++ b/arch/sh/include/asm/system.h
@@ -10,7 +10,6 @@
10#include <linux/compiler.h> 10#include <linux/compiler.h>
11#include <linux/linkage.h> 11#include <linux/linkage.h>
12#include <asm/types.h> 12#include <asm/types.h>
13#include <asm/ptrace.h>
14 13
15#define AT_VECTOR_SIZE_ARCH 5 /* entries in ARCH_DLINFO */ 14#define AT_VECTOR_SIZE_ARCH 5 /* entries in ARCH_DLINFO */
16 15
@@ -32,7 +31,7 @@
32#define mb() __asm__ __volatile__ ("synco": : :"memory") 31#define mb() __asm__ __volatile__ ("synco": : :"memory")
33#define rmb() mb() 32#define rmb() mb()
34#define wmb() __asm__ __volatile__ ("synco": : :"memory") 33#define wmb() __asm__ __volatile__ ("synco": : :"memory")
35#define ctrl_barrier() __icbi(0xa8000000) 34#define ctrl_barrier() __icbi(PAGE_OFFSET)
36#define read_barrier_depends() do { } while(0) 35#define read_barrier_depends() do { } while(0)
37#else 36#else
38#define mb() __asm__ __volatile__ ("": : :"memory") 37#define mb() __asm__ __volatile__ ("": : :"memory")
@@ -114,6 +113,8 @@ static inline unsigned long __cmpxchg(volatile void * ptr, unsigned long old,
114 (unsigned long)_n_, sizeof(*(ptr))); \ 113 (unsigned long)_n_, sizeof(*(ptr))); \
115 }) 114 })
116 115
116struct pt_regs;
117
117extern void die(const char *str, struct pt_regs *regs, long err) __attribute__ ((noreturn)); 118extern void die(const char *str, struct pt_regs *regs, long err) __attribute__ ((noreturn));
118void free_initmem(void); 119void free_initmem(void);
119void free_initrd_mem(unsigned long start, unsigned long end); 120void free_initrd_mem(unsigned long start, unsigned long end);
@@ -137,14 +138,14 @@ extern unsigned int instruction_size(unsigned int insn);
137#endif 138#endif
138 139
139extern unsigned long cached_to_uncached; 140extern unsigned long cached_to_uncached;
141extern unsigned long uncached_size;
140 142
141extern struct dentry *sh_debugfs_root; 143extern struct dentry *sh_debugfs_root;
142 144
143void per_cpu_trap_init(void); 145void per_cpu_trap_init(void);
144void default_idle(void); 146void default_idle(void);
145void cpu_idle_wait(void); 147void cpu_idle_wait(void);
146 148void stop_this_cpu(void *);
147asmlinkage void break_point_trap(void);
148 149
149#ifdef CONFIG_SUPERH32 150#ifdef CONFIG_SUPERH32
150#define BUILD_TRAP_HANDLER(name) \ 151#define BUILD_TRAP_HANDLER(name) \
@@ -171,10 +172,6 @@ BUILD_TRAP_HANDLER(fpu_error);
171BUILD_TRAP_HANDLER(fpu_state_restore); 172BUILD_TRAP_HANDLER(fpu_state_restore);
172BUILD_TRAP_HANDLER(nmi); 173BUILD_TRAP_HANDLER(nmi);
173 174
174#ifdef CONFIG_BUG
175extern void handle_BUG(struct pt_regs *);
176#endif
177
178#define arch_align_stack(x) (x) 175#define arch_align_stack(x) (x)
179 176
180struct mem_access { 177struct mem_access {
diff --git a/arch/sh/include/asm/system_32.h b/arch/sh/include/asm/system_32.h
index 607d413f6168..51296b36770e 100644
--- a/arch/sh/include/asm/system_32.h
+++ b/arch/sh/include/asm/system_32.h
@@ -2,6 +2,7 @@
2#define __ASM_SH_SYSTEM_32_H 2#define __ASM_SH_SYSTEM_32_H
3 3
4#include <linux/types.h> 4#include <linux/types.h>
5#include <asm/mmu.h>
5 6
6#ifdef CONFIG_SH_DSP 7#ifdef CONFIG_SH_DSP
7 8
@@ -144,9 +145,6 @@ do { \
144 __restore_dsp(prev); \ 145 __restore_dsp(prev); \
145} while (0) 146} while (0)
146 147
147#define __uses_jump_to_uncached \
148 noinline __attribute__ ((__section__ (".uncached.text")))
149
150/* 148/*
151 * Jump to uncached area. 149 * Jump to uncached area.
152 * When handling TLB or caches, we need to do it from an uncached area. 150 * When handling TLB or caches, we need to do it from an uncached area.
@@ -216,6 +214,17 @@ static inline reg_size_t register_align(void *val)
216int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs, 214int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs,
217 struct mem_access *ma, int); 215 struct mem_access *ma, int);
218 216
217static inline void trigger_address_error(void)
218{
219 if (__in_29bit_mode())
220 __asm__ __volatile__ (
221 "ldc %0, sr\n\t"
222 "mov.l @%1, %0"
223 :
224 : "r" (0x10000000), "r" (0x80000001)
225 );
226}
227
219asmlinkage void do_address_error(struct pt_regs *regs, 228asmlinkage void do_address_error(struct pt_regs *regs,
220 unsigned long writeaccess, 229 unsigned long writeaccess,
221 unsigned long address); 230 unsigned long address);
@@ -232,4 +241,33 @@ asmlinkage void do_exception_error(unsigned long r4, unsigned long r5,
232 unsigned long r6, unsigned long r7, 241 unsigned long r6, unsigned long r7,
233 struct pt_regs __regs); 242 struct pt_regs __regs);
234 243
244static inline void set_bl_bit(void)
245{
246 unsigned long __dummy0, __dummy1;
247
248 __asm__ __volatile__ (
249 "stc sr, %0\n\t"
250 "or %2, %0\n\t"
251 "and %3, %0\n\t"
252 "ldc %0, sr\n\t"
253 : "=&r" (__dummy0), "=r" (__dummy1)
254 : "r" (0x10000000), "r" (0xffffff0f)
255 : "memory"
256 );
257}
258
259static inline void clear_bl_bit(void)
260{
261 unsigned long __dummy0, __dummy1;
262
263 __asm__ __volatile__ (
264 "stc sr, %0\n\t"
265 "and %2, %0\n\t"
266 "ldc %0, sr\n\t"
267 : "=&r" (__dummy0), "=r" (__dummy1)
268 : "1" (~0x10000000)
269 : "memory"
270 );
271}
272
235#endif /* __ASM_SH_SYSTEM_32_H */ 273#endif /* __ASM_SH_SYSTEM_32_H */
diff --git a/arch/sh/include/asm/system_64.h b/arch/sh/include/asm/system_64.h
index 8e4a03e7966c..36338646dfc8 100644
--- a/arch/sh/include/asm/system_64.h
+++ b/arch/sh/include/asm/system_64.h
@@ -12,11 +12,13 @@
12 * License. See the file "COPYING" in the main directory of this archive 12 * License. See the file "COPYING" in the main directory of this archive
13 * for more details. 13 * for more details.
14 */ 14 */
15#include <cpu/registers.h>
15#include <asm/processor.h> 16#include <asm/processor.h>
16 17
17/* 18/*
18 * switch_to() should switch tasks to task nr n, first 19 * switch_to() should switch tasks to task nr n, first
19 */ 20 */
21struct thread_struct;
20struct task_struct *sh64_switch_to(struct task_struct *prev, 22struct task_struct *sh64_switch_to(struct task_struct *prev,
21 struct thread_struct *prev_thread, 23 struct thread_struct *prev_thread,
22 struct task_struct *next, 24 struct task_struct *next,
@@ -32,8 +34,6 @@ do { \
32 &next->thread); \ 34 &next->thread); \
33} while (0) 35} while (0)
34 36
35#define __uses_jump_to_uncached
36
37#define jump_to_uncached() do { } while (0) 37#define jump_to_uncached() do { } while (0)
38#define back_to_cached() do { } while (0) 38#define back_to_cached() do { } while (0)
39 39
@@ -47,4 +47,36 @@ static inline reg_size_t register_align(void *val)
47 return (unsigned long long)(signed long long)(signed long)val; 47 return (unsigned long long)(signed long long)(signed long)val;
48} 48}
49 49
50extern void phys_stext(void);
51
52static inline void trigger_address_error(void)
53{
54 phys_stext();
55}
56
57#define SR_BL_LL 0x0000000010000000LL
58
59static inline void set_bl_bit(void)
60{
61 unsigned long long __dummy0, __dummy1 = SR_BL_LL;
62
63 __asm__ __volatile__("getcon " __SR ", %0\n\t"
64 "or %0, %1, %0\n\t"
65 "putcon %0, " __SR "\n\t"
66 : "=&r" (__dummy0)
67 : "r" (__dummy1));
68
69}
70
71static inline void clear_bl_bit(void)
72{
73 unsigned long long __dummy0, __dummy1 = ~SR_BL_LL;
74
75 __asm__ __volatile__("getcon " __SR ", %0\n\t"
76 "and %0, %1, %0\n\t"
77 "putcon %0, " __SR "\n\t"
78 : "=&r" (__dummy0)
79 : "r" (__dummy1));
80}
81
50#endif /* __ASM_SH_SYSTEM_64_H */ 82#endif /* __ASM_SH_SYSTEM_64_H */
diff --git a/arch/sh/include/asm/thread_info.h b/arch/sh/include/asm/thread_info.h
index bdeb9d46d17d..55a36fef6875 100644
--- a/arch/sh/include/asm/thread_info.h
+++ b/arch/sh/include/asm/thread_info.h
@@ -19,6 +19,7 @@ struct thread_info {
19 struct task_struct *task; /* main task structure */ 19 struct task_struct *task; /* main task structure */
20 struct exec_domain *exec_domain; /* execution domain */ 20 struct exec_domain *exec_domain; /* execution domain */
21 unsigned long flags; /* low level flags */ 21 unsigned long flags; /* low level flags */
22 __u32 status; /* thread synchronous flags */
22 __u32 cpu; 23 __u32 cpu;
23 int preempt_count; /* 0 => preemptable, <0 => BUG */ 24 int preempt_count; /* 0 => preemptable, <0 => BUG */
24 mm_segment_t addr_limit; /* thread address space */ 25 mm_segment_t addr_limit; /* thread address space */
@@ -50,6 +51,7 @@ struct thread_info {
50 .task = &tsk, \ 51 .task = &tsk, \
51 .exec_domain = &default_exec_domain, \ 52 .exec_domain = &default_exec_domain, \
52 .flags = 0, \ 53 .flags = 0, \
54 .status = 0, \
53 .cpu = 0, \ 55 .cpu = 0, \
54 .preempt_count = INIT_PREEMPT_COUNT, \ 56 .preempt_count = INIT_PREEMPT_COUNT, \
55 .addr_limit = KERNEL_DS, \ 57 .addr_limit = KERNEL_DS, \
@@ -91,14 +93,16 @@ static inline struct thread_info *current_thread_info(void)
91 93
92#define THREAD_SIZE_ORDER (THREAD_SHIFT - PAGE_SHIFT) 94#define THREAD_SIZE_ORDER (THREAD_SHIFT - PAGE_SHIFT)
93 95
94#else /* THREAD_SHIFT < PAGE_SHIFT */ 96#endif
95
96#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR
97 97
98extern struct thread_info *alloc_thread_info(struct task_struct *tsk); 98extern struct thread_info *alloc_thread_info(struct task_struct *tsk);
99extern void free_thread_info(struct thread_info *ti); 99extern void free_thread_info(struct thread_info *ti);
100extern void arch_task_cache_init(void);
101#define arch_task_cache_init arch_task_cache_init
102extern int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src);
103extern void init_thread_xstate(void);
100 104
101#endif /* THREAD_SHIFT < PAGE_SHIFT */ 105#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR
102 106
103#endif /* __ASSEMBLY__ */ 107#endif /* __ASSEMBLY__ */
104 108
@@ -111,13 +115,11 @@ extern void free_thread_info(struct thread_info *ti);
111#define TIF_SYSCALL_TRACE 0 /* syscall trace active */ 115#define TIF_SYSCALL_TRACE 0 /* syscall trace active */
112#define TIF_SIGPENDING 1 /* signal pending */ 116#define TIF_SIGPENDING 1 /* signal pending */
113#define TIF_NEED_RESCHED 2 /* rescheduling necessary */ 117#define TIF_NEED_RESCHED 2 /* rescheduling necessary */
114#define TIF_RESTORE_SIGMASK 3 /* restore signal mask in do_signal() */
115#define TIF_SINGLESTEP 4 /* singlestepping active */ 118#define TIF_SINGLESTEP 4 /* singlestepping active */
116#define TIF_SYSCALL_AUDIT 5 /* syscall auditing active */ 119#define TIF_SYSCALL_AUDIT 5 /* syscall auditing active */
117#define TIF_SECCOMP 6 /* secure computing */ 120#define TIF_SECCOMP 6 /* secure computing */
118#define TIF_NOTIFY_RESUME 7 /* callback before returning to user */ 121#define TIF_NOTIFY_RESUME 7 /* callback before returning to user */
119#define TIF_SYSCALL_TRACEPOINT 8 /* for ftrace syscall instrumentation */ 122#define TIF_SYSCALL_TRACEPOINT 8 /* for ftrace syscall instrumentation */
120#define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */
121#define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling TIF_NEED_RESCHED */ 123#define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling TIF_NEED_RESCHED */
122#define TIF_MEMDIE 18 124#define TIF_MEMDIE 18
123#define TIF_FREEZE 19 /* Freezing for suspend */ 125#define TIF_FREEZE 19 /* Freezing for suspend */
@@ -125,13 +127,11 @@ extern void free_thread_info(struct thread_info *ti);
125#define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) 127#define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE)
126#define _TIF_SIGPENDING (1 << TIF_SIGPENDING) 128#define _TIF_SIGPENDING (1 << TIF_SIGPENDING)
127#define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) 129#define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED)
128#define _TIF_RESTORE_SIGMASK (1 << TIF_RESTORE_SIGMASK)
129#define _TIF_SINGLESTEP (1 << TIF_SINGLESTEP) 130#define _TIF_SINGLESTEP (1 << TIF_SINGLESTEP)
130#define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT) 131#define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT)
131#define _TIF_SECCOMP (1 << TIF_SECCOMP) 132#define _TIF_SECCOMP (1 << TIF_SECCOMP)
132#define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME) 133#define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME)
133#define _TIF_SYSCALL_TRACEPOINT (1 << TIF_SYSCALL_TRACEPOINT) 134#define _TIF_SYSCALL_TRACEPOINT (1 << TIF_SYSCALL_TRACEPOINT)
134#define _TIF_USEDFPU (1 << TIF_USEDFPU)
135#define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG) 135#define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG)
136#define _TIF_FREEZE (1 << TIF_FREEZE) 136#define _TIF_FREEZE (1 << TIF_FREEZE)
137 137
@@ -149,13 +149,33 @@ extern void free_thread_info(struct thread_info *ti);
149/* work to do on any return to u-space */ 149/* work to do on any return to u-space */
150#define _TIF_ALLWORK_MASK (_TIF_SYSCALL_TRACE | _TIF_SIGPENDING | \ 150#define _TIF_ALLWORK_MASK (_TIF_SYSCALL_TRACE | _TIF_SIGPENDING | \
151 _TIF_NEED_RESCHED | _TIF_SYSCALL_AUDIT | \ 151 _TIF_NEED_RESCHED | _TIF_SYSCALL_AUDIT | \
152 _TIF_SINGLESTEP | _TIF_RESTORE_SIGMASK | \ 152 _TIF_SINGLESTEP | _TIF_NOTIFY_RESUME | \
153 _TIF_NOTIFY_RESUME | _TIF_SYSCALL_TRACEPOINT) 153 _TIF_SYSCALL_TRACEPOINT)
154 154
155/* work to do on interrupt/exception return */ 155/* work to do on interrupt/exception return */
156#define _TIF_WORK_MASK (_TIF_ALLWORK_MASK & ~(_TIF_SYSCALL_TRACE | \ 156#define _TIF_WORK_MASK (_TIF_ALLWORK_MASK & ~(_TIF_SYSCALL_TRACE | \
157 _TIF_SYSCALL_AUDIT | _TIF_SINGLESTEP)) 157 _TIF_SYSCALL_AUDIT | _TIF_SINGLESTEP))
158 158
159/*
160 * Thread-synchronous status.
161 *
162 * This is different from the flags in that nobody else
163 * ever touches our thread-synchronous status, so we don't
164 * have to worry about atomic accesses.
165 */
166#define TS_RESTORE_SIGMASK 0x0001 /* restore signal mask in do_signal() */
167#define TS_USEDFPU 0x0002 /* FPU used by this task this quantum */
168
169#ifndef __ASSEMBLY__
170#define HAVE_SET_RESTORE_SIGMASK 1
171static inline void set_restore_sigmask(void)
172{
173 struct thread_info *ti = current_thread_info();
174 ti->status |= TS_RESTORE_SIGMASK;
175 set_bit(TIF_SIGPENDING, (unsigned long *)&ti->flags);
176}
177#endif /* !__ASSEMBLY__ */
178
159#endif /* __KERNEL__ */ 179#endif /* __KERNEL__ */
160 180
161#endif /* __ASM_SH_THREAD_INFO_H */ 181#endif /* __ASM_SH_THREAD_INFO_H */
diff --git a/arch/sh/include/asm/timex.h b/arch/sh/include/asm/timex.h
index b556d49e5f2b..18bf06d9c764 100644
--- a/arch/sh/include/asm/timex.h
+++ b/arch/sh/include/asm/timex.h
@@ -6,7 +6,17 @@
6#ifndef __ASM_SH_TIMEX_H 6#ifndef __ASM_SH_TIMEX_H
7#define __ASM_SH_TIMEX_H 7#define __ASM_SH_TIMEX_H
8 8
9/*
10 * Only parts using the legacy CPG code for their clock framework
11 * implementation need to define their own Pclk value. If provided, this
12 * can be used for accurately setting CLOCK_TICK_RATE, otherwise we
13 * simply fall back on the i8253 PIT value.
14 */
15#ifdef CONFIG_SH_PCLK_FREQ
9#define CLOCK_TICK_RATE (CONFIG_SH_PCLK_FREQ / 4) /* Underlying HZ */ 16#define CLOCK_TICK_RATE (CONFIG_SH_PCLK_FREQ / 4) /* Underlying HZ */
17#else
18#define CLOCK_TICK_RATE 1193180
19#endif
10 20
11#include <asm-generic/timex.h> 21#include <asm-generic/timex.h>
12 22
diff --git a/arch/sh/include/asm/tlb.h b/arch/sh/include/asm/tlb.h
index da8fe7ab8728..75abb38dffd5 100644
--- a/arch/sh/include/asm/tlb.h
+++ b/arch/sh/include/asm/tlb.h
@@ -11,6 +11,7 @@
11#ifdef CONFIG_MMU 11#ifdef CONFIG_MMU
12#include <asm/pgalloc.h> 12#include <asm/pgalloc.h>
13#include <asm/tlbflush.h> 13#include <asm/tlbflush.h>
14#include <asm/mmu_context.h>
14 15
15/* 16/*
16 * TLB handling. This allows us to remove pages from the page 17 * TLB handling. This allows us to remove pages from the page
@@ -97,6 +98,22 @@ tlb_end_vma(struct mmu_gather *tlb, struct vm_area_struct *vma)
97 98
98#define tlb_migrate_finish(mm) do { } while (0) 99#define tlb_migrate_finish(mm) do { } while (0)
99 100
101#if defined(CONFIG_CPU_SH4) || defined(CONFIG_SUPERH64)
102extern void tlb_wire_entry(struct vm_area_struct *, unsigned long, pte_t);
103extern void tlb_unwire_entry(void);
104#else
105static inline void tlb_wire_entry(struct vm_area_struct *vma ,
106 unsigned long addr, pte_t pte)
107{
108 BUG();
109}
110
111static inline void tlb_unwire_entry(void)
112{
113 BUG();
114}
115#endif
116
100#else /* CONFIG_MMU */ 117#else /* CONFIG_MMU */
101 118
102#define tlb_start_vma(tlb, vma) do { } while (0) 119#define tlb_start_vma(tlb, vma) do { } while (0)
diff --git a/arch/sh/include/asm/topology.h b/arch/sh/include/asm/topology.h
index 65e7bd2f2240..88e734069fa6 100644
--- a/arch/sh/include/asm/topology.h
+++ b/arch/sh/include/asm/topology.h
@@ -35,11 +35,19 @@
35 35
36#define pcibus_to_node(bus) ((void)(bus), -1) 36#define pcibus_to_node(bus) ((void)(bus), -1)
37#define cpumask_of_pcibus(bus) (pcibus_to_node(bus) == -1 ? \ 37#define cpumask_of_pcibus(bus) (pcibus_to_node(bus) == -1 ? \
38 CPU_MASK_ALL_PTR : \ 38 cpu_all_mask : \
39 cpumask_of_node(pcibus_to_node(bus))) 39 cpumask_of_node(pcibus_to_node(bus)))
40 40
41#endif 41#endif
42 42
43#define mc_capable() (1)
44
45const struct cpumask *cpu_coregroup_mask(unsigned int cpu);
46
47extern cpumask_t cpu_core_map[NR_CPUS];
48
49#define topology_core_cpumask(cpu) (&cpu_core_map[cpu])
50
43#include <asm-generic/topology.h> 51#include <asm-generic/topology.h>
44 52
45#endif /* _ASM_SH_TOPOLOGY_H */ 53#endif /* _ASM_SH_TOPOLOGY_H */
diff --git a/arch/sh/include/asm/ubc.h b/arch/sh/include/asm/ubc.h
deleted file mode 100644
index 4ca4b7717371..000000000000
--- a/arch/sh/include/asm/ubc.h
+++ /dev/null
@@ -1,75 +0,0 @@
1/*
2 * include/asm-sh/ubc.h
3 *
4 * Copyright (C) 1999 Niibe Yutaka
5 * Copyright (C) 2002, 2003 Paul Mundt
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11#ifndef __ASM_SH_UBC_H
12#define __ASM_SH_UBC_H
13#ifdef __KERNEL__
14
15#include <cpu/ubc.h>
16
17/* User Break Controller */
18#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
19#define UBC_TYPE_SH7729 (current_cpu_data.type == CPU_SH7729)
20#else
21#define UBC_TYPE_SH7729 0
22#endif
23
24#define BAMR_ASID (1 << 2)
25#define BAMR_NONE 0
26#define BAMR_10 0x1
27#define BAMR_12 0x2
28#define BAMR_ALL 0x3
29#define BAMR_16 0x8
30#define BAMR_20 0x9
31
32#define BBR_INST (1 << 4)
33#define BBR_DATA (2 << 4)
34#define BBR_READ (1 << 2)
35#define BBR_WRITE (2 << 2)
36#define BBR_BYTE 0x1
37#define BBR_HALF 0x2
38#define BBR_LONG 0x3
39#define BBR_QUAD (1 << 6) /* SH7750 */
40#define BBR_CPU (1 << 6) /* SH7709A,SH7729 */
41#define BBR_DMA (2 << 6) /* SH7709A,SH7729 */
42
43#define BRCR_CMFA (1 << 15)
44#define BRCR_CMFB (1 << 14)
45
46#if defined CONFIG_CPU_SH2A
47#define BRCR_CMFCA (1 << 15)
48#define BRCR_CMFCB (1 << 14)
49#define BRCR_CMFDA (1 << 13)
50#define BRCR_CMFDB (1 << 12)
51#define BRCR_PCBB (1 << 6) /* 1: after execution */
52#define BRCR_PCBA (1 << 5) /* 1: after execution */
53#define BRCR_PCTE 0
54#else
55#define BRCR_PCTE (1 << 11)
56#define BRCR_PCBA (1 << 10) /* 1: after execution */
57#define BRCR_DBEB (1 << 7)
58#define BRCR_PCBB (1 << 6)
59#define BRCR_SEQ (1 << 3)
60#define BRCR_UBDE (1 << 0)
61#endif
62
63#ifndef __ASSEMBLY__
64/* arch/sh/kernel/cpu/ubc.S */
65extern void ubc_sleep(void);
66
67#ifdef CONFIG_UBC_WAKEUP
68extern void ubc_wakeup(void);
69#else
70#define ubc_wakeup() do { } while (0)
71#endif
72#endif
73
74#endif /* __KERNEL__ */
75#endif /* __ASM_SH_UBC_H */
diff --git a/arch/sh/include/asm/uncached.h b/arch/sh/include/asm/uncached.h
new file mode 100644
index 000000000000..e3419f96626a
--- /dev/null
+++ b/arch/sh/include/asm/uncached.h
@@ -0,0 +1,18 @@
1#ifndef __ASM_SH_UNCACHED_H
2#define __ASM_SH_UNCACHED_H
3
4#include <linux/bug.h>
5
6#ifdef CONFIG_UNCACHED_MAPPING
7extern unsigned long uncached_start, uncached_end;
8
9extern int virt_addr_uncached(unsigned long kaddr);
10extern void uncached_init(void);
11extern void uncached_resize(unsigned long size);
12#else
13#define virt_addr_uncached(kaddr) (0)
14#define uncached_init() do { } while (0)
15#define uncached_resize(size) BUG()
16#endif
17
18#endif /* __ASM_SH_UNCACHED_H */
diff --git a/arch/sh/include/asm/unistd_32.h b/arch/sh/include/asm/unistd_32.h
index f3fd1b9eb6b1..0e7f0fc8f086 100644
--- a/arch/sh/include/asm/unistd_32.h
+++ b/arch/sh/include/asm/unistd_32.h
@@ -350,12 +350,15 @@
350 350
351#ifdef __KERNEL__ 351#ifdef __KERNEL__
352 352
353#define __IGNORE_recvmmsg
354
353#define __ARCH_WANT_IPC_PARSE_VERSION 355#define __ARCH_WANT_IPC_PARSE_VERSION
354#define __ARCH_WANT_OLD_READDIR 356#define __ARCH_WANT_OLD_READDIR
355#define __ARCH_WANT_OLD_STAT 357#define __ARCH_WANT_OLD_STAT
356#define __ARCH_WANT_STAT64 358#define __ARCH_WANT_STAT64
357#define __ARCH_WANT_SYS_ALARM 359#define __ARCH_WANT_SYS_ALARM
358#define __ARCH_WANT_SYS_GETHOSTNAME 360#define __ARCH_WANT_SYS_GETHOSTNAME
361#define __ARCH_WANT_SYS_IPC
359#define __ARCH_WANT_SYS_PAUSE 362#define __ARCH_WANT_SYS_PAUSE
360#define __ARCH_WANT_SYS_SGETMASK 363#define __ARCH_WANT_SYS_SGETMASK
361#define __ARCH_WANT_SYS_SIGNAL 364#define __ARCH_WANT_SYS_SIGNAL
@@ -368,6 +371,7 @@
368#define __ARCH_WANT_SYS_LLSEEK 371#define __ARCH_WANT_SYS_LLSEEK
369#define __ARCH_WANT_SYS_NICE 372#define __ARCH_WANT_SYS_NICE
370#define __ARCH_WANT_SYS_OLD_GETRLIMIT 373#define __ARCH_WANT_SYS_OLD_GETRLIMIT
374#define __ARCH_WANT_SYS_OLD_UNAME
371#define __ARCH_WANT_SYS_OLDUMOUNT 375#define __ARCH_WANT_SYS_OLDUMOUNT
372#define __ARCH_WANT_SYS_SIGPENDING 376#define __ARCH_WANT_SYS_SIGPENDING
373#define __ARCH_WANT_SYS_SIGPROCMASK 377#define __ARCH_WANT_SYS_SIGPROCMASK
diff --git a/arch/sh/include/asm/unistd_64.h b/arch/sh/include/asm/unistd_64.h
index 343ce8f073ea..0580c33a1e04 100644
--- a/arch/sh/include/asm/unistd_64.h
+++ b/arch/sh/include/asm/unistd_64.h
@@ -385,10 +385,12 @@
385#define __NR_pwritev 362 385#define __NR_pwritev 362
386#define __NR_rt_tgsigqueueinfo 363 386#define __NR_rt_tgsigqueueinfo 363
387#define __NR_perf_event_open 364 387#define __NR_perf_event_open 364
388#define __NR_recvmmsg 365
389#define __NR_accept4 366
388 390
389#ifdef __KERNEL__ 391#ifdef __KERNEL__
390 392
391#define NR_syscalls 365 393#define NR_syscalls 367
392 394
393#define __ARCH_WANT_IPC_PARSE_VERSION 395#define __ARCH_WANT_IPC_PARSE_VERSION
394#define __ARCH_WANT_OLD_READDIR 396#define __ARCH_WANT_OLD_READDIR
@@ -396,6 +398,7 @@
396#define __ARCH_WANT_STAT64 398#define __ARCH_WANT_STAT64
397#define __ARCH_WANT_SYS_ALARM 399#define __ARCH_WANT_SYS_ALARM
398#define __ARCH_WANT_SYS_GETHOSTNAME 400#define __ARCH_WANT_SYS_GETHOSTNAME
401#define __ARCH_WANT_SYS_IPC
399#define __ARCH_WANT_SYS_PAUSE 402#define __ARCH_WANT_SYS_PAUSE
400#define __ARCH_WANT_SYS_SGETMASK 403#define __ARCH_WANT_SYS_SGETMASK
401#define __ARCH_WANT_SYS_SIGNAL 404#define __ARCH_WANT_SYS_SIGNAL
@@ -408,6 +411,7 @@
408#define __ARCH_WANT_SYS_LLSEEK 411#define __ARCH_WANT_SYS_LLSEEK
409#define __ARCH_WANT_SYS_NICE 412#define __ARCH_WANT_SYS_NICE
410#define __ARCH_WANT_SYS_OLD_GETRLIMIT 413#define __ARCH_WANT_SYS_OLD_GETRLIMIT
414#define __ARCH_WANT_SYS_OLD_UNAME
411#define __ARCH_WANT_SYS_OLDUMOUNT 415#define __ARCH_WANT_SYS_OLDUMOUNT
412#define __ARCH_WANT_SYS_SIGPENDING 416#define __ARCH_WANT_SYS_SIGPENDING
413#define __ARCH_WANT_SYS_SIGPROCMASK 417#define __ARCH_WANT_SYS_SIGPROCMASK
diff --git a/arch/sh/include/asm/vmlinux.lds.h b/arch/sh/include/asm/vmlinux.lds.h
index 244ec4ad9a79..d58ad493b3a6 100644
--- a/arch/sh/include/asm/vmlinux.lds.h
+++ b/arch/sh/include/asm/vmlinux.lds.h
@@ -14,4 +14,12 @@
14#define DWARF_EH_FRAME 14#define DWARF_EH_FRAME
15#endif 15#endif
16 16
17#ifdef CONFIG_SUPERH64
18#define EXTRA_TEXT \
19 *(.text64) \
20 *(.text..SHmedia32)
21#else
22#define EXTRA_TEXT
23#endif
24
17#endif /* __ASM_SH_VMLINUX_LDS_H */ 25#endif /* __ASM_SH_VMLINUX_LDS_H */
diff --git a/arch/sh/include/asm/watchdog.h b/arch/sh/include/asm/watchdog.h
index 2fe7cee9e43a..85a7aca7fb8f 100644
--- a/arch/sh/include/asm/watchdog.h
+++ b/arch/sh/include/asm/watchdog.h
@@ -2,6 +2,8 @@
2 * include/asm-sh/watchdog.h 2 * include/asm-sh/watchdog.h
3 * 3 *
4 * Copyright (C) 2002, 2003 Paul Mundt 4 * Copyright (C) 2002, 2003 Paul Mundt
5 * Copyright (C) 2009 Siemens AG
6 * Copyright (C) 2009 Valentin Sitdikov
5 * 7 *
6 * This program is free software; you can redistribute it and/or modify it 8 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the 9 * under the terms of the GNU General Public License as published by the
@@ -61,13 +63,68 @@
61#define WTCSR_CKS_2048 0x06 63#define WTCSR_CKS_2048 0x06
62#define WTCSR_CKS_4096 0x07 64#define WTCSR_CKS_4096 0x07
63 65
66#if defined(CONFIG_CPU_SUBTYPE_SH7785) || defined(CONFIG_CPU_SUBTYPE_SH7780)
67/**
68 * sh_wdt_read_cnt - Read from Counter
69 * Reads back the WTCNT value.
70 */
71static inline __u32 sh_wdt_read_cnt(void)
72{
73 return __raw_readl(WTCNT_R);
74}
75
76/**
77 * sh_wdt_write_cnt - Write to Counter
78 * @val: Value to write
79 *
80 * Writes the given value @val to the lower byte of the timer counter.
81 * The upper byte is set manually on each write.
82 */
83static inline void sh_wdt_write_cnt(__u32 val)
84{
85 __raw_writel((WTCNT_HIGH << 24) | (__u32)val, WTCNT);
86}
87
88/**
89 * sh_wdt_write_bst - Write to Counter
90 * @val: Value to write
91 *
92 * Writes the given value @val to the lower byte of the timer counter.
93 * The upper byte is set manually on each write.
94 */
95static inline void sh_wdt_write_bst(__u32 val)
96{
97 __raw_writel((WTBST_HIGH << 24) | (__u32)val, WTBST);
98}
99/**
100 * sh_wdt_read_csr - Read from Control/Status Register
101 *
102 * Reads back the WTCSR value.
103 */
104static inline __u32 sh_wdt_read_csr(void)
105{
106 return __raw_readl(WTCSR_R);
107}
108
109/**
110 * sh_wdt_write_csr - Write to Control/Status Register
111 * @val: Value to write
112 *
113 * Writes the given value @val to the lower byte of the control/status
114 * register. The upper byte is set manually on each write.
115 */
116static inline void sh_wdt_write_csr(__u32 val)
117{
118 __raw_writel((WTCSR_HIGH << 24) | (__u32)val, WTCSR);
119}
120#else
64/** 121/**
65 * sh_wdt_read_cnt - Read from Counter 122 * sh_wdt_read_cnt - Read from Counter
66 * Reads back the WTCNT value. 123 * Reads back the WTCNT value.
67 */ 124 */
68static inline __u8 sh_wdt_read_cnt(void) 125static inline __u8 sh_wdt_read_cnt(void)
69{ 126{
70 return ctrl_inb(WTCNT_R); 127 return __raw_readb(WTCNT_R);
71} 128}
72 129
73/** 130/**
@@ -79,7 +136,7 @@ static inline __u8 sh_wdt_read_cnt(void)
79 */ 136 */
80static inline void sh_wdt_write_cnt(__u8 val) 137static inline void sh_wdt_write_cnt(__u8 val)
81{ 138{
82 ctrl_outw((WTCNT_HIGH << 8) | (__u16)val, WTCNT); 139 __raw_writew((WTCNT_HIGH << 8) | (__u16)val, WTCNT);
83} 140}
84 141
85/** 142/**
@@ -89,7 +146,7 @@ static inline void sh_wdt_write_cnt(__u8 val)
89 */ 146 */
90static inline __u8 sh_wdt_read_csr(void) 147static inline __u8 sh_wdt_read_csr(void)
91{ 148{
92 return ctrl_inb(WTCSR_R); 149 return __raw_readb(WTCSR_R);
93} 150}
94 151
95/** 152/**
@@ -101,8 +158,8 @@ static inline __u8 sh_wdt_read_csr(void)
101 */ 158 */
102static inline void sh_wdt_write_csr(__u8 val) 159static inline void sh_wdt_write_csr(__u8 val)
103{ 160{
104 ctrl_outw((WTCSR_HIGH << 8) | (__u16)val, WTCSR); 161 __raw_writew((WTCSR_HIGH << 8) | (__u16)val, WTCSR);
105} 162}
106 163#endif /* CONFIG_CPU_SUBTYPE_SH7785 || CONFIG_CPU_SUBTYPE_SH7780 */
107#endif /* __KERNEL__ */ 164#endif /* __KERNEL__ */
108#endif /* __ASM_SH_WATCHDOG_H */ 165#endif /* __ASM_SH_WATCHDOG_H */
diff --git a/arch/sh/include/cpu-sh2/cpu/ubc.h b/arch/sh/include/cpu-sh2/cpu/ubc.h
deleted file mode 100644
index ba0e87f19c7a..000000000000
--- a/arch/sh/include/cpu-sh2/cpu/ubc.h
+++ /dev/null
@@ -1,32 +0,0 @@
1/*
2 * include/asm-sh/cpu-sh2/ubc.h
3 *
4 * Copyright (C) 2003 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#ifndef __ASM_CPU_SH2_UBC_H
11#define __ASM_CPU_SH2_UBC_H
12
13#define UBC_BARA 0xffffff40
14#define UBC_BAMRA 0xffffff44
15#define UBC_BBRA 0xffffff48
16#define UBC_BARB 0xffffff60
17#define UBC_BAMRB 0xffffff64
18#define UBC_BBRB 0xffffff68
19#define UBC_BDRB 0xffffff70
20#define UBC_BDMRB 0xffffff74
21#define UBC_BRCR 0xffffff78
22
23/*
24 * We don't have any ASID changes to make in the UBC on the SH-2.
25 *
26 * Make these purposely invalid to track misuse.
27 */
28#define UBC_BASRA 0x00000000
29#define UBC_BASRB 0x00000000
30
31#endif /* __ASM_CPU_SH2_UBC_H */
32
diff --git a/arch/sh/include/cpu-sh2/cpu/watchdog.h b/arch/sh/include/cpu-sh2/cpu/watchdog.h
index 393161c9c6d0..1eab8aa63a6d 100644
--- a/arch/sh/include/cpu-sh2/cpu/watchdog.h
+++ b/arch/sh/include/cpu-sh2/cpu/watchdog.h
@@ -44,7 +44,7 @@ static inline __u8 sh_wdt_read_rstcsr(void)
44 /* 44 /*
45 * Same read/write brain-damage as for WTCNT here.. 45 * Same read/write brain-damage as for WTCNT here..
46 */ 46 */
47 return ctrl_inb(RSTCSR_R); 47 return __raw_readb(RSTCSR_R);
48} 48}
49 49
50/** 50/**
@@ -62,7 +62,7 @@ static inline void sh_wdt_write_rstcsr(__u8 val)
62 * we can't presently touch the WOVF bit, since the upper byte 62 * we can't presently touch the WOVF bit, since the upper byte
63 * has to be swapped for this. So just leave it alone.. 63 * has to be swapped for this. So just leave it alone..
64 */ 64 */
65 ctrl_outw((WTCNT_HIGH << 8) | (__u16)val, RSTCSR); 65 __raw_writeb((WTCNT_HIGH << 8) | (__u16)val, RSTCSR);
66} 66}
67 67
68#endif /* __ASM_CPU_SH2_WATCHDOG_H */ 68#endif /* __ASM_CPU_SH2_WATCHDOG_H */
diff --git a/arch/sh/include/cpu-sh3/cpu/dac.h b/arch/sh/include/cpu-sh3/cpu/dac.h
index 05fda8316ebc..98f1d15f0ab5 100644
--- a/arch/sh/include/cpu-sh3/cpu/dac.h
+++ b/arch/sh/include/cpu-sh3/cpu/dac.h
@@ -17,25 +17,25 @@
17static __inline__ void sh_dac_enable(int channel) 17static __inline__ void sh_dac_enable(int channel)
18{ 18{
19 unsigned char v; 19 unsigned char v;
20 v = ctrl_inb(DACR); 20 v = __raw_readb(DACR);
21 if(channel) v |= DACR_DAOE1; 21 if(channel) v |= DACR_DAOE1;
22 else v |= DACR_DAOE0; 22 else v |= DACR_DAOE0;
23 ctrl_outb(v,DACR); 23 __raw_writeb(v,DACR);
24} 24}
25 25
26static __inline__ void sh_dac_disable(int channel) 26static __inline__ void sh_dac_disable(int channel)
27{ 27{
28 unsigned char v; 28 unsigned char v;
29 v = ctrl_inb(DACR); 29 v = __raw_readb(DACR);
30 if(channel) v &= ~DACR_DAOE1; 30 if(channel) v &= ~DACR_DAOE1;
31 else v &= ~DACR_DAOE0; 31 else v &= ~DACR_DAOE0;
32 ctrl_outb(v,DACR); 32 __raw_writeb(v,DACR);
33} 33}
34 34
35static __inline__ void sh_dac_output(u8 value, int channel) 35static __inline__ void sh_dac_output(u8 value, int channel)
36{ 36{
37 if(channel) ctrl_outb(value,DADR1); 37 if(channel) __raw_writeb(value,DADR1);
38 else ctrl_outb(value,DADR0); 38 else __raw_writeb(value,DADR0);
39} 39}
40 40
41#endif /* __ASM_CPU_SH3_DAC_H */ 41#endif /* __ASM_CPU_SH3_DAC_H */
diff --git a/arch/sh/include/cpu-sh3/cpu/dma-register.h b/arch/sh/include/cpu-sh3/cpu/dma-register.h
new file mode 100644
index 000000000000..2349e488c9a6
--- /dev/null
+++ b/arch/sh/include/cpu-sh3/cpu/dma-register.h
@@ -0,0 +1,41 @@
1/*
2 * SH3 CPU-specific DMA definitions, used by both DMA drivers
3 *
4 * Copyright (C) 2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef CPU_DMA_REGISTER_H
11#define CPU_DMA_REGISTER_H
12
13#define CHCR_TS_LOW_MASK 0x18
14#define CHCR_TS_LOW_SHIFT 3
15#define CHCR_TS_HIGH_MASK 0
16#define CHCR_TS_HIGH_SHIFT 0
17
18#define DMAOR_INIT DMAOR_DME
19
20/*
21 * The SuperH DMAC supports a number of transmit sizes, we list them here,
22 * with their respective values as they appear in the CHCR registers.
23 */
24enum {
25 XMIT_SZ_8BIT,
26 XMIT_SZ_16BIT,
27 XMIT_SZ_32BIT,
28 XMIT_SZ_128BIT,
29};
30
31/* log2(size / 8) - used to calculate number of transfers */
32#define TS_SHIFT { \
33 [XMIT_SZ_8BIT] = 0, \
34 [XMIT_SZ_16BIT] = 1, \
35 [XMIT_SZ_32BIT] = 2, \
36 [XMIT_SZ_128BIT] = 4, \
37}
38
39#define TS_INDEX2VAL(i) (((i) & 3) << CHCR_TS_LOW_SHIFT)
40
41#endif
diff --git a/arch/sh/include/cpu-sh3/cpu/dma.h b/arch/sh/include/cpu-sh3/cpu/dma.h
index 0ea15f3f2363..24e28b91c9d5 100644
--- a/arch/sh/include/cpu-sh3/cpu/dma.h
+++ b/arch/sh/include/cpu-sh3/cpu/dma.h
@@ -20,27 +20,4 @@
20#define TS_32 0x00000010 20#define TS_32 0x00000010
21#define TS_128 0x00000018 21#define TS_128 0x00000018
22 22
23#define CHCR_TS_MASK 0x18
24#define CHCR_TS_SHIFT 3
25
26#define DMAOR_INIT DMAOR_DME
27
28/*
29 * The SuperH DMAC supports a number of transmit sizes, we list them here,
30 * with their respective values as they appear in the CHCR registers.
31 */
32enum {
33 XMIT_SZ_8BIT,
34 XMIT_SZ_16BIT,
35 XMIT_SZ_32BIT,
36 XMIT_SZ_128BIT,
37};
38
39static unsigned int ts_shift[] __maybe_unused = {
40 [XMIT_SZ_8BIT] = 0,
41 [XMIT_SZ_16BIT] = 1,
42 [XMIT_SZ_32BIT] = 2,
43 [XMIT_SZ_128BIT] = 4,
44};
45
46#endif /* __ASM_CPU_SH3_DMA_H */ 23#endif /* __ASM_CPU_SH3_DMA_H */
diff --git a/arch/sh/include/cpu-sh3/cpu/ubc.h b/arch/sh/include/cpu-sh3/cpu/ubc.h
deleted file mode 100644
index 4e6381d5ff7a..000000000000
--- a/arch/sh/include/cpu-sh3/cpu/ubc.h
+++ /dev/null
@@ -1,42 +0,0 @@
1/*
2 * include/asm-sh/cpu-sh3/ubc.h
3 *
4 * Copyright (C) 1999 Niibe Yutaka
5 * Copyright (C) 2003 Paul Mundt
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11#ifndef __ASM_CPU_SH3_UBC_H
12#define __ASM_CPU_SH3_UBC_H
13
14#if defined(CONFIG_CPU_SUBTYPE_SH7710) || \
15 defined(CONFIG_CPU_SUBTYPE_SH7720) || \
16 defined(CONFIG_CPU_SUBTYPE_SH7721)
17#define UBC_BARA 0xa4ffffb0
18#define UBC_BAMRA 0xa4ffffb4
19#define UBC_BBRA 0xa4ffffb8
20#define UBC_BASRA 0xffffffe4
21#define UBC_BARB 0xa4ffffa0
22#define UBC_BAMRB 0xa4ffffa4
23#define UBC_BBRB 0xa4ffffa8
24#define UBC_BASRB 0xffffffe8
25#define UBC_BDRB 0xa4ffff90
26#define UBC_BDMRB 0xa4ffff94
27#define UBC_BRCR 0xa4ffff98
28#else
29#define UBC_BARA 0xffffffb0
30#define UBC_BAMRA 0xffffffb4
31#define UBC_BBRA 0xffffffb8
32#define UBC_BASRA 0xffffffe4
33#define UBC_BARB 0xffffffa0
34#define UBC_BAMRB 0xffffffa4
35#define UBC_BBRB 0xffffffa8
36#define UBC_BASRB 0xffffffe8
37#define UBC_BDRB 0xffffff90
38#define UBC_BDMRB 0xffffff94
39#define UBC_BRCR 0xffffff98
40#endif
41
42#endif /* __ASM_CPU_SH3_UBC_H */
diff --git a/arch/sh/include/cpu-sh4/cpu/addrspace.h b/arch/sh/include/cpu-sh4/cpu/addrspace.h
index a3fa733c1c7d..d51da25da72c 100644
--- a/arch/sh/include/cpu-sh4/cpu/addrspace.h
+++ b/arch/sh/include/cpu-sh4/cpu/addrspace.h
@@ -28,6 +28,15 @@
28#define P4SEG_TLB_DATA 0xf7000000 28#define P4SEG_TLB_DATA 0xf7000000
29#define P4SEG_REG_BASE 0xff000000 29#define P4SEG_REG_BASE 0xff000000
30 30
31#define PA_AREA0 0x00000000
32#define PA_AREA1 0x04000000
33#define PA_AREA2 0x08000000
34#define PA_AREA3 0x0c000000
35#define PA_AREA4 0x10000000
36#define PA_AREA5 0x14000000
37#define PA_AREA6 0x18000000
38#define PA_AREA7 0x1c000000
39
31#define PA_AREA5_IO 0xb4000000 /* Area 5 IO Memory */ 40#define PA_AREA5_IO 0xb4000000 /* Area 5 IO Memory */
32#define PA_AREA6_IO 0xb8000000 /* Area 6 IO Memory */ 41#define PA_AREA6_IO 0xb8000000 /* Area 6 IO Memory */
33 42
diff --git a/arch/sh/include/cpu-sh4/cpu/dma-register.h b/arch/sh/include/cpu-sh4/cpu/dma-register.h
new file mode 100644
index 000000000000..de2359533994
--- /dev/null
+++ b/arch/sh/include/cpu-sh4/cpu/dma-register.h
@@ -0,0 +1,112 @@
1/*
2 * SH4 CPU-specific DMA definitions, used by both DMA drivers
3 *
4 * Copyright (C) 2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef CPU_DMA_REGISTER_H
11#define CPU_DMA_REGISTER_H
12
13/* SH7751/7760/7780 DMA IRQ sources */
14
15#ifdef CONFIG_CPU_SH4A
16
17#define DMAOR_INIT DMAOR_DME
18
19#if defined(CONFIG_CPU_SUBTYPE_SH7343) || \
20 defined(CONFIG_CPU_SUBTYPE_SH7730)
21#define CHCR_TS_LOW_MASK 0x00000018
22#define CHCR_TS_LOW_SHIFT 3
23#define CHCR_TS_HIGH_MASK 0
24#define CHCR_TS_HIGH_SHIFT 0
25#elif defined(CONFIG_CPU_SUBTYPE_SH7722) || \
26 defined(CONFIG_CPU_SUBTYPE_SH7724)
27#define CHCR_TS_LOW_MASK 0x00000018
28#define CHCR_TS_LOW_SHIFT 3
29#define CHCR_TS_HIGH_MASK 0x00300000
30#define CHCR_TS_HIGH_SHIFT (20 - 2) /* 2 bits for shifted low TS */
31#elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \
32 defined(CONFIG_CPU_SUBTYPE_SH7764)
33#define CHCR_TS_LOW_MASK 0x00000018
34#define CHCR_TS_LOW_SHIFT 3
35#define CHCR_TS_HIGH_MASK 0
36#define CHCR_TS_HIGH_SHIFT 0
37#elif defined(CONFIG_CPU_SUBTYPE_SH7723)
38#define CHCR_TS_LOW_MASK 0x00000018
39#define CHCR_TS_LOW_SHIFT 3
40#define CHCR_TS_HIGH_MASK 0
41#define CHCR_TS_HIGH_SHIFT 0
42#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
43#define CHCR_TS_LOW_MASK 0x00000018
44#define CHCR_TS_LOW_SHIFT 3
45#define CHCR_TS_HIGH_MASK 0
46#define CHCR_TS_HIGH_SHIFT 0
47#else /* SH7785 */
48#define CHCR_TS_LOW_MASK 0x00000018
49#define CHCR_TS_LOW_SHIFT 3
50#define CHCR_TS_HIGH_MASK 0
51#define CHCR_TS_HIGH_SHIFT 0
52#endif
53
54/* Transmit sizes and respective CHCR register values */
55enum {
56 XMIT_SZ_8BIT = 0,
57 XMIT_SZ_16BIT = 1,
58 XMIT_SZ_32BIT = 2,
59 XMIT_SZ_64BIT = 7,
60 XMIT_SZ_128BIT = 3,
61 XMIT_SZ_256BIT = 4,
62 XMIT_SZ_128BIT_BLK = 0xb,
63 XMIT_SZ_256BIT_BLK = 0xc,
64};
65
66/* log2(size / 8) - used to calculate number of transfers */
67#define TS_SHIFT { \
68 [XMIT_SZ_8BIT] = 0, \
69 [XMIT_SZ_16BIT] = 1, \
70 [XMIT_SZ_32BIT] = 2, \
71 [XMIT_SZ_64BIT] = 3, \
72 [XMIT_SZ_128BIT] = 4, \
73 [XMIT_SZ_256BIT] = 5, \
74 [XMIT_SZ_128BIT_BLK] = 4, \
75 [XMIT_SZ_256BIT_BLK] = 5, \
76}
77
78#define TS_INDEX2VAL(i) ((((i) & 3) << CHCR_TS_LOW_SHIFT) | \
79 (((i) & 0xc) << CHCR_TS_HIGH_SHIFT))
80
81#else /* CONFIG_CPU_SH4A */
82
83#define DMAOR_INIT (0x8000 | DMAOR_DME)
84
85#define CHCR_TS_LOW_MASK 0x70
86#define CHCR_TS_LOW_SHIFT 4
87#define CHCR_TS_HIGH_MASK 0
88#define CHCR_TS_HIGH_SHIFT 0
89
90/* Transmit sizes and respective CHCR register values */
91enum {
92 XMIT_SZ_8BIT = 1,
93 XMIT_SZ_16BIT = 2,
94 XMIT_SZ_32BIT = 3,
95 XMIT_SZ_64BIT = 0,
96 XMIT_SZ_256BIT = 4,
97};
98
99/* log2(size / 8) - used to calculate number of transfers */
100#define TS_SHIFT { \
101 [XMIT_SZ_8BIT] = 0, \
102 [XMIT_SZ_16BIT] = 1, \
103 [XMIT_SZ_32BIT] = 2, \
104 [XMIT_SZ_64BIT] = 3, \
105 [XMIT_SZ_256BIT] = 5, \
106}
107
108#define TS_INDEX2VAL(i) (((i) & 7) << CHCR_TS_LOW_SHIFT)
109
110#endif /* CONFIG_CPU_SH4A */
111
112#endif
diff --git a/arch/sh/include/cpu-sh4/cpu/dma-sh4a.h b/arch/sh/include/cpu-sh4/cpu/dma-sh4a.h
index f0886bc880e0..9647e681fd27 100644
--- a/arch/sh/include/cpu-sh4/cpu/dma-sh4a.h
+++ b/arch/sh/include/cpu-sh4/cpu/dma-sh4a.h
@@ -2,34 +2,52 @@
2#define __ASM_SH_CPU_SH4_DMA_SH7780_H 2#define __ASM_SH_CPU_SH4_DMA_SH7780_H
3 3
4#if defined(CONFIG_CPU_SUBTYPE_SH7343) || \ 4#if defined(CONFIG_CPU_SUBTYPE_SH7343) || \
5 defined(CONFIG_CPU_SUBTYPE_SH7722) || \
6 defined(CONFIG_CPU_SUBTYPE_SH7730) 5 defined(CONFIG_CPU_SUBTYPE_SH7730)
7#define DMTE0_IRQ 48 6#define DMTE0_IRQ 48
8#define DMTE4_IRQ 76 7#define DMTE4_IRQ 76
9#define DMAE0_IRQ 78 /* DMA Error IRQ*/ 8#define DMAE0_IRQ 78 /* DMA Error IRQ*/
10#define SH_DMAC_BASE0 0xFE008020 9#define SH_DMAC_BASE0 0xFE008020
11#define SH_DMARS_BASE 0xFE009000 10#define SH_DMARS_BASE0 0xFE009000
11#elif defined(CONFIG_CPU_SUBTYPE_SH7722)
12#define DMTE0_IRQ 48
13#define DMTE4_IRQ 76
14#define DMAE0_IRQ 78 /* DMA Error IRQ*/
15#define SH_DMAC_BASE0 0xFE008020
16#define SH_DMARS_BASE0 0xFE009000
12#elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \ 17#elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \
13 defined(CONFIG_CPU_SUBTYPE_SH7764) 18 defined(CONFIG_CPU_SUBTYPE_SH7764)
14#define DMTE0_IRQ 34 19#define DMTE0_IRQ 34
15#define DMTE4_IRQ 44 20#define DMTE4_IRQ 44
16#define DMAE0_IRQ 38 21#define DMAE0_IRQ 38
17#define SH_DMAC_BASE0 0xFF608020 22#define SH_DMAC_BASE0 0xFF608020
18#define SH_DMARS_BASE 0xFF609000 23#define SH_DMARS_BASE0 0xFF609000
19#elif defined(CONFIG_CPU_SUBTYPE_SH7723) || \ 24#elif defined(CONFIG_CPU_SUBTYPE_SH7723)
20 defined(CONFIG_CPU_SUBTYPE_SH7724)
21#define DMTE0_IRQ 48 /* DMAC0A*/ 25#define DMTE0_IRQ 48 /* DMAC0A*/
22#define DMTE4_IRQ 40 /* DMAC0B */ 26#define DMTE4_IRQ 76 /* DMAC0B */
23#define DMTE6_IRQ 42 27#define DMTE6_IRQ 40
24#define DMTE8_IRQ 76 /* DMAC1A */ 28#define DMTE8_IRQ 42 /* DMAC1A */
25#define DMTE9_IRQ 77 29#define DMTE9_IRQ 43
26#define DMTE10_IRQ 72 /* DMAC1B */ 30#define DMTE10_IRQ 72 /* DMAC1B */
27#define DMTE11_IRQ 73 31#define DMTE11_IRQ 73
28#define DMAE0_IRQ 78 /* DMA Error IRQ*/ 32#define DMAE0_IRQ 78 /* DMA Error IRQ*/
29#define DMAE1_IRQ 74 /* DMA Error IRQ*/ 33#define DMAE1_IRQ 74 /* DMA Error IRQ*/
30#define SH_DMAC_BASE0 0xFE008020 34#define SH_DMAC_BASE0 0xFE008020
31#define SH_DMAC_BASE1 0xFDC08020 35#define SH_DMAC_BASE1 0xFDC08020
32#define SH_DMARS_BASE 0xFDC09000 36#define SH_DMARS_BASE0 0xFDC09000
37#elif defined(CONFIG_CPU_SUBTYPE_SH7724)
38#define DMTE0_IRQ 48 /* DMAC0A*/
39#define DMTE4_IRQ 76 /* DMAC0B */
40#define DMTE6_IRQ 40
41#define DMTE8_IRQ 42 /* DMAC1A */
42#define DMTE9_IRQ 43
43#define DMTE10_IRQ 72 /* DMAC1B */
44#define DMTE11_IRQ 73
45#define DMAE0_IRQ 78 /* DMA Error IRQ*/
46#define DMAE1_IRQ 74 /* DMA Error IRQ*/
47#define SH_DMAC_BASE0 0xFE008020
48#define SH_DMAC_BASE1 0xFDC08020
49#define SH_DMARS_BASE0 0xFE009000
50#define SH_DMARS_BASE1 0xFDC09000
33#elif defined(CONFIG_CPU_SUBTYPE_SH7780) 51#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
34#define DMTE0_IRQ 34 52#define DMTE0_IRQ 34
35#define DMTE4_IRQ 44 53#define DMTE4_IRQ 44
@@ -41,7 +59,7 @@
41#define DMAE0_IRQ 38 /* DMA Error IRQ */ 59#define DMAE0_IRQ 38 /* DMA Error IRQ */
42#define SH_DMAC_BASE0 0xFC808020 60#define SH_DMAC_BASE0 0xFC808020
43#define SH_DMAC_BASE1 0xFC818020 61#define SH_DMAC_BASE1 0xFC818020
44#define SH_DMARS_BASE 0xFC809000 62#define SH_DMARS_BASE0 0xFC809000
45#else /* SH7785 */ 63#else /* SH7785 */
46#define DMTE0_IRQ 33 64#define DMTE0_IRQ 33
47#define DMTE4_IRQ 37 65#define DMTE4_IRQ 37
@@ -54,42 +72,12 @@
54#define DMAE1_IRQ 58 /* DMA Error IRQ1 */ 72#define DMAE1_IRQ 58 /* DMA Error IRQ1 */
55#define SH_DMAC_BASE0 0xFC808020 73#define SH_DMAC_BASE0 0xFC808020
56#define SH_DMAC_BASE1 0xFCC08020 74#define SH_DMAC_BASE1 0xFCC08020
57#define SH_DMARS_BASE 0xFC809000 75#define SH_DMARS_BASE0 0xFC809000
58#endif 76#endif
59 77
60#define REQ_HE 0x000000C0 78#define REQ_HE 0x000000C0
61#define REQ_H 0x00000080 79#define REQ_H 0x00000080
62#define REQ_LE 0x00000040 80#define REQ_LE 0x00000040
63#define TM_BURST 0x0000020 81#define TM_BURST 0x00000020
64#define TS_8 0x00000000
65#define TS_16 0x00000008
66#define TS_32 0x00000010
67#define TS_16BLK 0x00000018
68#define TS_32BLK 0x00100000
69
70/*
71 * The SuperH DMAC supports a number of transmit sizes, we list them here,
72 * with their respective values as they appear in the CHCR registers.
73 *
74 * Defaults to a 64-bit transfer size.
75 */
76enum {
77 XMIT_SZ_8BIT,
78 XMIT_SZ_16BIT,
79 XMIT_SZ_32BIT,
80 XMIT_SZ_128BIT,
81 XMIT_SZ_256BIT,
82};
83
84/*
85 * The DMA count is defined as the number of bytes to transfer.
86 */
87static unsigned int ts_shift[] __maybe_unused = {
88 [XMIT_SZ_8BIT] = 0,
89 [XMIT_SZ_16BIT] = 1,
90 [XMIT_SZ_32BIT] = 2,
91 [XMIT_SZ_128BIT] = 4,
92 [XMIT_SZ_256BIT] = 5,
93};
94 82
95#endif /* __ASM_SH_CPU_SH4_DMA_SH7780_H */ 83#endif /* __ASM_SH_CPU_SH4_DMA_SH7780_H */
diff --git a/arch/sh/include/cpu-sh4/cpu/dma.h b/arch/sh/include/cpu-sh4/cpu/dma.h
index bcb30246e85c..ca747e93c2ed 100644
--- a/arch/sh/include/cpu-sh4/cpu/dma.h
+++ b/arch/sh/include/cpu-sh4/cpu/dma.h
@@ -5,11 +5,8 @@
5 5
6#ifdef CONFIG_CPU_SH4A 6#ifdef CONFIG_CPU_SH4A
7 7
8#define DMAOR_INIT (DMAOR_DME)
9#define CHCR_TS_MASK 0x18
10#define CHCR_TS_SHIFT 3
11
12#include <cpu/dma-sh4a.h> 8#include <cpu/dma-sh4a.h>
9
13#else /* CONFIG_CPU_SH4A */ 10#else /* CONFIG_CPU_SH4A */
14/* 11/*
15 * SH7750/SH7751/SH7760 12 * SH7750/SH7751/SH7760
@@ -19,7 +16,6 @@
19#define DMTE6_IRQ 46 16#define DMTE6_IRQ 46
20#define DMAE0_IRQ 38 17#define DMAE0_IRQ 38
21 18
22#define DMAOR_INIT (0x8000|DMAOR_DME)
23#define SH_DMAC_BASE0 0xffa00000 19#define SH_DMAC_BASE0 0xffa00000
24#define SH_DMAC_BASE1 0xffa00070 20#define SH_DMAC_BASE1 0xffa00070
25/* Definitions for the SuperH DMAC */ 21/* Definitions for the SuperH DMAC */
@@ -29,35 +25,8 @@
29#define TS_32 0x00000030 25#define TS_32 0x00000030
30#define TS_64 0x00000000 26#define TS_64 0x00000000
31 27
32#define CHCR_TS_MASK 0x70
33#define CHCR_TS_SHIFT 4
34
35#define DMAOR_COD 0x00000008 28#define DMAOR_COD 0x00000008
36 29
37/*
38 * The SuperH DMAC supports a number of transmit sizes, we list them here,
39 * with their respective values as they appear in the CHCR registers.
40 *
41 * Defaults to a 64-bit transfer size.
42 */
43enum {
44 XMIT_SZ_64BIT,
45 XMIT_SZ_8BIT,
46 XMIT_SZ_16BIT,
47 XMIT_SZ_32BIT,
48 XMIT_SZ_256BIT,
49};
50
51/*
52 * The DMA count is defined as the number of bytes to transfer.
53 */
54static unsigned int ts_shift[] __maybe_unused = {
55 [XMIT_SZ_64BIT] = 3,
56 [XMIT_SZ_8BIT] = 0,
57 [XMIT_SZ_16BIT] = 1,
58 [XMIT_SZ_32BIT] = 2,
59 [XMIT_SZ_256BIT] = 5,
60};
61#endif 30#endif
62 31
63#endif /* __ASM_CPU_SH4_DMA_H */ 32#endif /* __ASM_CPU_SH4_DMA_H */
diff --git a/arch/sh/include/cpu-sh4/cpu/mmu_context.h b/arch/sh/include/cpu-sh4/cpu/mmu_context.h
index 3ce7ef6c2978..5963124c1d4a 100644
--- a/arch/sh/include/cpu-sh4/cpu/mmu_context.h
+++ b/arch/sh/include/cpu-sh4/cpu/mmu_context.h
@@ -19,12 +19,20 @@
19 19
20#define MMUCR 0xFF000010 /* MMU Control Register */ 20#define MMUCR 0xFF000010 /* MMU Control Register */
21 21
22#define MMU_ITLB_ADDRESS_ARRAY 0xF2000000
23#define MMU_ITLB_ADDRESS_ARRAY2 0xF2800000
22#define MMU_UTLB_ADDRESS_ARRAY 0xF6000000 24#define MMU_UTLB_ADDRESS_ARRAY 0xF6000000
23#define MMU_UTLB_ADDRESS_ARRAY2 0xF6800000 25#define MMU_UTLB_ADDRESS_ARRAY2 0xF6800000
24#define MMU_PAGE_ASSOC_BIT 0x80 26#define MMU_PAGE_ASSOC_BIT 0x80
25 27
26#define MMUCR_TI (1<<2) 28#define MMUCR_TI (1<<2)
27 29
30#define MMUCR_URB 0x00FC0000
31#define MMUCR_URB_SHIFT 18
32#define MMUCR_URB_NENTRIES 64
33#define MMUCR_URC 0x0000FC00
34#define MMUCR_URC_SHIFT 10
35
28#if defined(CONFIG_32BIT) && defined(CONFIG_CPU_SUBTYPE_ST40) 36#if defined(CONFIG_32BIT) && defined(CONFIG_CPU_SUBTYPE_ST40)
29#define MMUCR_SE (1 << 4) 37#define MMUCR_SE (1 << 4)
30#else 38#else
diff --git a/arch/sh/include/cpu-sh4/cpu/sq.h b/arch/sh/include/cpu-sh4/cpu/sq.h
index 586d6491816a..74716ba2dc3c 100644
--- a/arch/sh/include/cpu-sh4/cpu/sq.h
+++ b/arch/sh/include/cpu-sh4/cpu/sq.h
@@ -12,6 +12,7 @@
12#define __ASM_CPU_SH4_SQ_H 12#define __ASM_CPU_SH4_SQ_H
13 13
14#include <asm/addrspace.h> 14#include <asm/addrspace.h>
15#include <asm/page.h>
15 16
16/* 17/*
17 * Store queues range from e0000000-e3fffffc, allowing approx. 64MB to be 18 * Store queues range from e0000000-e3fffffc, allowing approx. 64MB to be
@@ -28,7 +29,7 @@
28 29
29/* arch/sh/kernel/cpu/sh4/sq.c */ 30/* arch/sh/kernel/cpu/sh4/sq.c */
30unsigned long sq_remap(unsigned long phys, unsigned int size, 31unsigned long sq_remap(unsigned long phys, unsigned int size,
31 const char *name, unsigned long flags); 32 const char *name, pgprot_t prot);
32void sq_unmap(unsigned long vaddr); 33void sq_unmap(unsigned long vaddr);
33void sq_flush_range(unsigned long start, unsigned int len); 34void sq_flush_range(unsigned long start, unsigned int len);
34 35
diff --git a/arch/sh/include/cpu-sh4/cpu/ubc.h b/arch/sh/include/cpu-sh4/cpu/ubc.h
deleted file mode 100644
index c86e17050935..000000000000
--- a/arch/sh/include/cpu-sh4/cpu/ubc.h
+++ /dev/null
@@ -1,64 +0,0 @@
1/*
2 * include/asm-sh/cpu-sh4/ubc.h
3 *
4 * Copyright (C) 1999 Niibe Yutaka
5 * Copyright (C) 2003 Paul Mundt
6 * Copyright (C) 2006 Lineo Solutions Inc. support SH4A UBC
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#ifndef __ASM_CPU_SH4_UBC_H
13#define __ASM_CPU_SH4_UBC_H
14
15#if defined(CONFIG_CPU_SH4A)
16#define UBC_CBR0 0xff200000
17#define UBC_CRR0 0xff200004
18#define UBC_CAR0 0xff200008
19#define UBC_CAMR0 0xff20000c
20#define UBC_CBR1 0xff200020
21#define UBC_CRR1 0xff200024
22#define UBC_CAR1 0xff200028
23#define UBC_CAMR1 0xff20002c
24#define UBC_CDR1 0xff200030
25#define UBC_CDMR1 0xff200034
26#define UBC_CETR1 0xff200038
27#define UBC_CCMFR 0xff200600
28#define UBC_CBCR 0xff200620
29
30/* CBR */
31#define UBC_CBR_AIE (0x01<<30)
32#define UBC_CBR_ID_INST (0x01<<4)
33#define UBC_CBR_RW_READ (0x01<<1)
34#define UBC_CBR_CE (0x01)
35
36#define UBC_CBR_AIV_MASK (0x00FF0000)
37#define UBC_CBR_AIV_SHIFT (16)
38#define UBC_CBR_AIV_SET(asid) (((asid)<<UBC_CBR_AIV_SHIFT) & UBC_CBR_AIV_MASK)
39
40#define UBC_CBR_INIT 0x20000000
41
42/* CRR */
43#define UBC_CRR_RES (0x01<<13)
44#define UBC_CRR_PCB (0x01<<1)
45#define UBC_CRR_BIE (0x01)
46
47#define UBC_CRR_INIT 0x00002000
48
49#else /* CONFIG_CPU_SH4 */
50#define UBC_BARA 0xff200000
51#define UBC_BAMRA 0xff200004
52#define UBC_BBRA 0xff200008
53#define UBC_BASRA 0xff000014
54#define UBC_BARB 0xff20000c
55#define UBC_BAMRB 0xff200010
56#define UBC_BBRB 0xff200014
57#define UBC_BASRB 0xff000018
58#define UBC_BDRB 0xff200018
59#define UBC_BDMRB 0xff20001c
60#define UBC_BRCR 0xff200020
61#endif /* CONFIG_CPU_SH4 */
62
63#endif /* __ASM_CPU_SH4_UBC_H */
64
diff --git a/arch/sh/include/cpu-sh4/cpu/watchdog.h b/arch/sh/include/cpu-sh4/cpu/watchdog.h
index 259f6a0ce23d..7f62b9380938 100644
--- a/arch/sh/include/cpu-sh4/cpu/watchdog.h
+++ b/arch/sh/include/cpu-sh4/cpu/watchdog.h
@@ -2,6 +2,8 @@
2 * include/asm-sh/cpu-sh4/watchdog.h 2 * include/asm-sh/cpu-sh4/watchdog.h
3 * 3 *
4 * Copyright (C) 2002, 2003 Paul Mundt 4 * Copyright (C) 2002, 2003 Paul Mundt
5 * Copyright (C) 2009 Siemens AG
6 * Copyright (C) 2009 Sitdikov Valentin
5 * 7 *
6 * This file is subject to the terms and conditions of the GNU General Public 8 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive 9 * License. See the file "COPYING" in the main directory of this archive
@@ -10,9 +12,26 @@
10#ifndef __ASM_CPU_SH4_WATCHDOG_H 12#ifndef __ASM_CPU_SH4_WATCHDOG_H
11#define __ASM_CPU_SH4_WATCHDOG_H 13#define __ASM_CPU_SH4_WATCHDOG_H
12 14
15#if defined(CONFIG_CPU_SUBTYPE_SH7785) || defined(CONFIG_CPU_SUBTYPE_SH7780)
16/* Prefix definition */
17#define WTBST_HIGH 0x55
18/* Register definitions */
19#define WTCNT_R 0xffcc0010 /*WDTCNT*/
20#define WTCSR 0xffcc0004 /*WDTCSR*/
21#define WTCNT 0xffcc0000 /*WDTST*/
22#define WTST WTCNT
23#define WTBST 0xffcc0008 /*WDTBST*/
24/* Register definitions */
25#elif defined(CONFIG_CPU_SUBTYPE_SH7722) || \
26 defined(CONFIG_CPU_SUBTYPE_SH7723) || \
27 defined(CONFIG_CPU_SUBTYPE_SH7724)
28#define WTCNT 0xa4520000
29#define WTCSR 0xa4520004
30#else
13/* Register definitions */ 31/* Register definitions */
14#define WTCNT 0xffc00008 32#define WTCNT 0xffc00008
15#define WTCSR 0xffc0000c 33#define WTCSR 0xffc0000c
34#endif
16 35
17/* Bit definitions */ 36/* Bit definitions */
18#define WTCSR_TME 0x80 37#define WTCSR_TME 0x80
diff --git a/arch/sh/include/mach-common/mach/hp6xx.h b/arch/sh/include/mach-common/mach/hp6xx.h
index 0d4165a32dcd..bcc301ac12f4 100644
--- a/arch/sh/include/mach-common/mach/hp6xx.h
+++ b/arch/sh/include/mach-common/mach/hp6xx.h
@@ -29,6 +29,9 @@
29 29
30#define PKDR_LED_GREEN 0x10 30#define PKDR_LED_GREEN 0x10
31 31
32/* HP Palmtop 620lx/660lx speaker on/off */
33#define PKDR_SPEAKER 0x20
34
32#define SCPDR_TS_SCAN_ENABLE 0x20 35#define SCPDR_TS_SCAN_ENABLE 0x20
33#define SCPDR_TS_SCAN_Y 0x02 36#define SCPDR_TS_SCAN_Y 0x02
34#define SCPDR_TS_SCAN_X 0x01 37#define SCPDR_TS_SCAN_X 0x01
@@ -42,6 +45,7 @@
42#define ADC_CHANNEL_BACKUP 4 45#define ADC_CHANNEL_BACKUP 4
43#define ADC_CHANNEL_CHARGE 5 46#define ADC_CHANNEL_CHARGE 5
44 47
48/* HP Jornada 680/690 speaker on/off */
45#define HD64461_GPADR_SPEAKER 0x01 49#define HD64461_GPADR_SPEAKER 0x01
46#define HD64461_GPADR_PCMCIA0 (0x02|0x08) 50#define HD64461_GPADR_PCMCIA0 (0x02|0x08)
47 51
diff --git a/arch/sh/include/mach-common/mach/magicpanelr2.h b/arch/sh/include/mach-common/mach/magicpanelr2.h
index c644a77ee357..183a2f744251 100644
--- a/arch/sh/include/mach-common/mach/magicpanelr2.h
+++ b/arch/sh/include/mach-common/mach/magicpanelr2.h
@@ -19,12 +19,12 @@
19#include <asm/io_generic.h> 19#include <asm/io_generic.h>
20 20
21 21
22#define SETBITS_OUTB(mask, reg) ctrl_outb(ctrl_inb(reg) | mask, reg) 22#define SETBITS_OUTB(mask, reg) __raw_writeb(__raw_readb(reg) | mask, reg)
23#define SETBITS_OUTW(mask, reg) ctrl_outw(ctrl_inw(reg) | mask, reg) 23#define SETBITS_OUTW(mask, reg) __raw_writew(__raw_readw(reg) | mask, reg)
24#define SETBITS_OUTL(mask, reg) ctrl_outl(ctrl_inl(reg) | mask, reg) 24#define SETBITS_OUTL(mask, reg) __raw_writel(__raw_readl(reg) | mask, reg)
25#define CLRBITS_OUTB(mask, reg) ctrl_outb(ctrl_inb(reg) & ~mask, reg) 25#define CLRBITS_OUTB(mask, reg) __raw_writeb(__raw_readb(reg) & ~mask, reg)
26#define CLRBITS_OUTW(mask, reg) ctrl_outw(ctrl_inw(reg) & ~mask, reg) 26#define CLRBITS_OUTW(mask, reg) __raw_writew(__raw_readw(reg) & ~mask, reg)
27#define CLRBITS_OUTL(mask, reg) ctrl_outl(ctrl_inl(reg) & ~mask, reg) 27#define CLRBITS_OUTL(mask, reg) __raw_writel(__raw_readl(reg) & ~mask, reg)
28 28
29 29
30#define PA_LED PORT_PADR /* LED */ 30#define PA_LED PORT_PADR /* LED */
diff --git a/arch/sh/include/mach-common/mach/titan.h b/arch/sh/include/mach-common/mach/titan.h
index 03f3583c8918..4a674d27cbb8 100644
--- a/arch/sh/include/mach-common/mach/titan.h
+++ b/arch/sh/include/mach-common/mach/titan.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Platform defintions for Titan 2 * Platform definitions for Titan
3 */ 3 */
4#ifndef _ASM_SH_TITAN_H 4#ifndef _ASM_SH_TITAN_H
5#define _ASM_SH_TITAN_H 5#define _ASM_SH_TITAN_H
diff --git a/arch/sh/include/mach-dreamcast/mach/sysasic.h b/arch/sh/include/mach-dreamcast/mach/sysasic.h
index f33426608a87..58f710e1ebc2 100644
--- a/arch/sh/include/mach-dreamcast/mach/sysasic.h
+++ b/arch/sh/include/mach-dreamcast/mach/sysasic.h
@@ -39,5 +39,10 @@
39 39
40#define HW_EVENT_IRQ_MAX (HW_EVENT_IRQ_BASE + 95) 40#define HW_EVENT_IRQ_MAX (HW_EVENT_IRQ_BASE + 95)
41 41
42/* arch/sh/boards/mach-dreamcast/irq.c */
43extern int systemasic_irq_demux(int);
44extern void systemasic_irq_init(void);
45extern void aica_time_init(void);
46
42#endif /* __ASM_SH_DREAMCAST_SYSASIC_H */ 47#endif /* __ASM_SH_DREAMCAST_SYSASIC_H */
43 48
diff --git a/arch/sh/include/mach-ecovec24/mach/partner-jet-setup.txt b/arch/sh/include/mach-ecovec24/mach/partner-jet-setup.txt
index 8b8e4fa1fee9..cc737b807334 100644
--- a/arch/sh/include/mach-ecovec24/mach/partner-jet-setup.txt
+++ b/arch/sh/include/mach-ecovec24/mach/partner-jet-setup.txt
@@ -22,13 +22,12 @@ ED 0xff000010, 0x00000004
22LIST "setup clocks" 22LIST "setup clocks"
23ED 0xa4150024, 0x00004000 23ED 0xa4150024, 0x00004000
24ED 0xa4150000, 0x8E003508 24ED 0xa4150000, 0x8E003508
25ED 0xa4150004, 0x00000000
26 25
27WAIT 1 26WAIT 1
28 27
29LIST "BSC" 28LIST "BSC"
30ED 0xff800020, 0xa5a50000 29ED 0xff800020, 0xa5a50000
31ED 0xfec10000, 0x00000013 30ED 0xfec10000, 0x00001013
32ED 0xfec10004, 0x11110400 31ED 0xfec10004, 0x11110400
33ED 0xfec10024, 0x00000440 32ED 0xfec10024, 0x00000440
34 33
diff --git a/arch/sh/include/mach-kfr2r09/mach/kfr2r09.h b/arch/sh/include/mach-kfr2r09/mach/kfr2r09.h
index 174374e19547..484ef42c2fb5 100644
--- a/arch/sh/include/mach-kfr2r09/mach/kfr2r09.h
+++ b/arch/sh/include/mach-kfr2r09/mach/kfr2r09.h
@@ -8,6 +8,8 @@ void kfr2r09_lcd_on(void *board_data);
8void kfr2r09_lcd_off(void *board_data); 8void kfr2r09_lcd_off(void *board_data);
9int kfr2r09_lcd_setup(void *board_data, void *sys_ops_handle, 9int kfr2r09_lcd_setup(void *board_data, void *sys_ops_handle,
10 struct sh_mobile_lcdc_sys_bus_ops *sys_ops); 10 struct sh_mobile_lcdc_sys_bus_ops *sys_ops);
11void kfr2r09_lcd_start(void *board_data, void *sys_ops_handle,
12 struct sh_mobile_lcdc_sys_bus_ops *sys_ops);
11#else 13#else
12static inline void kfr2r09_lcd_on(void *board_data) {} 14static inline void kfr2r09_lcd_on(void *board_data) {}
13static inline void kfr2r09_lcd_off(void *board_data) {} 15static inline void kfr2r09_lcd_off(void *board_data) {}
@@ -16,6 +18,10 @@ static inline int kfr2r09_lcd_setup(void *board_data, void *sys_ops_handle,
16{ 18{
17 return -ENODEV; 19 return -ENODEV;
18} 20}
21static inline void kfr2r09_lcd_start(void *board_data, void *sys_ops_handle,
22 struct sh_mobile_lcdc_sys_bus_ops *sys_ops)
23{
24}
19#endif 25#endif
20 26
21#endif /* __ASM_SH_KFR2R09_H */ 27#endif /* __ASM_SH_KFR2R09_H */
diff --git a/arch/sh/include/mach-migor/mach/migor.h b/arch/sh/include/mach-migor/mach/migor.h
index cee6cb88e020..42fccf93412e 100644
--- a/arch/sh/include/mach-migor/mach/migor.h
+++ b/arch/sh/include/mach-migor/mach/migor.h
@@ -1,6 +1,7 @@
1#ifndef __ASM_SH_MIGOR_H 1#ifndef __ASM_SH_MIGOR_H
2#define __ASM_SH_MIGOR_H 2#define __ASM_SH_MIGOR_H
3 3
4#define PORT_MSELCRA 0xa4050180
4#define PORT_MSELCRB 0xa4050182 5#define PORT_MSELCRB 0xa4050182
5#define BSC_CS4BCR 0xfec10010 6#define BSC_CS4BCR 0xfec10010
6#define BSC_CS6ABCR 0xfec1001c 7#define BSC_CS6ABCR 0xfec1001c
diff --git a/arch/sh/include/mach-sdk7786/mach/fpga.h b/arch/sh/include/mach-sdk7786/mach/fpga.h
new file mode 100644
index 000000000000..2120d67dec70
--- /dev/null
+++ b/arch/sh/include/mach-sdk7786/mach/fpga.h
@@ -0,0 +1,114 @@
1#ifndef __MACH_SDK7786_FPGA_H
2#define __MACH_SDK7786_FPGA_H
3
4#include <linux/io.h>
5#include <linux/types.h>
6#include <linux/bitops.h>
7
8#define SRSTR 0x000
9#define SRSTR_MAGIC 0x1971 /* Fixed magical read value */
10
11#define INTASR 0x010
12#define INTAMR 0x020
13#define MODSWR 0x030
14#define INTTESTR 0x040
15#define SYSSR 0x050
16#define NRGPR 0x060
17#define NMISR 0x070
18
19#define NMIMR 0x080
20#define NMIMR_MAN_NMIM BIT(0) /* Manual NMI mask */
21#define NMIMR_AUX_NMIM BIT(1) /* Auxiliary NMI mask */
22
23#define INTBSR 0x090
24#define INTBMR 0x0a0
25#define USRLEDR 0x0b0
26#define MAPSWR 0x0c0
27#define FPGAVR 0x0d0
28#define FPGADR 0x0e0
29#define PCBRR 0x0f0
30#define RSR 0x100
31#define EXTASR 0x110
32#define SPCAR 0x120
33#define INTMSR 0x130
34#define PCIECR 0x140
35#define FAER 0x150
36#define USRGPIR 0x160
37/* 0x170 reserved */
38#define LCLASR 0x180
39
40#define SBCR 0x190
41#define SCBR_I2CMEN BIT(0) /* FPGA I2C master enable */
42#define SCBR_I2CCEN BIT(1) /* CPU I2C master enable */
43
44#define PWRCR 0x1a0
45#define SPCBR 0x1b0
46#define SPICR 0x1c0
47#define SPIDR 0x1d0
48#define I2CCR 0x1e0
49#define I2CDR 0x1f0
50#define FPGACR 0x200
51#define IASELR1 0x210
52#define IASELR2 0x220
53#define IASELR3 0x230
54#define IASELR4 0x240
55#define IASELR5 0x250
56#define IASELR6 0x260
57#define IASELR7 0x270
58#define IASELR8 0x280
59#define IASELR9 0x290
60#define IASELR10 0x2a0
61#define IASELR11 0x2b0
62#define IASELR12 0x2c0
63#define IASELR13 0x2d0
64#define IASELR14 0x2e0
65#define IASELR15 0x2f0
66/* 0x300 reserved */
67#define IBSELR1 0x310
68#define IBSELR2 0x320
69#define IBSELR3 0x330
70#define IBSELR4 0x340
71#define IBSELR5 0x350
72#define IBSELR6 0x360
73#define IBSELR7 0x370
74#define IBSELR8 0x380
75#define IBSELR9 0x390
76#define IBSELR10 0x3a0
77#define IBSELR11 0x3b0
78#define IBSELR12 0x3c0
79#define IBSELR13 0x3d0
80#define IBSELR14 0x3e0
81#define IBSELR15 0x3f0
82#define USRACR 0x400
83#define BEEPR 0x410
84#define USRLCDR 0x420
85#define SMBCR 0x430
86#define SMBDR 0x440
87#define USBCR 0x450
88#define AMSR 0x460
89#define ACCR 0x470
90#define SDIFCR 0x480
91
92/* arch/sh/boards/mach-sdk7786/fpga.c */
93extern void __iomem *sdk7786_fpga_base;
94extern void sdk7786_fpga_init(void);
95
96#define SDK7786_FPGA_REGADDR(reg) (sdk7786_fpga_base + (reg))
97
98/*
99 * A convenience wrapper from register offset to internal I2C address,
100 * when the FPGA is in I2C slave mode.
101 */
102#define SDK7786_FPGA_I2CADDR(reg) ((reg) >> 3)
103
104static inline u16 fpga_read_reg(unsigned int reg)
105{
106 return ioread16(sdk7786_fpga_base + reg);
107}
108
109static inline void fpga_write_reg(u16 val, unsigned int reg)
110{
111 iowrite16(val, sdk7786_fpga_base + reg);
112}
113
114#endif /* __MACH_SDK7786_FPGA_H */
diff --git a/arch/sh/include/mach-sdk7786/mach/irq.h b/arch/sh/include/mach-sdk7786/mach/irq.h
new file mode 100644
index 000000000000..0f584635e6e5
--- /dev/null
+++ b/arch/sh/include/mach-sdk7786/mach/irq.h
@@ -0,0 +1,7 @@
1#ifndef __MACH_SDK7786_IRQ_H
2#define __MACH_SDK7786_IRQ_H
3
4/* arch/sh/boards/mach-sdk7786/irq.c */
5extern void sdk7786_init_irq(void);
6
7#endif /* __MACH_SDK7786_IRQ_H */
diff --git a/arch/sh/include/mach-se/mach/se7343.h b/arch/sh/include/mach-se/mach/se7343.h
index 749914b400fb..8d8170d6cc43 100644
--- a/arch/sh/include/mach-se/mach/se7343.h
+++ b/arch/sh/include/mach-se/mach/se7343.h
@@ -94,26 +94,26 @@
94 94
95#define PORT_DRVCR 0xA4050180 95#define PORT_DRVCR 0xA4050180
96 96
97#define PORT_PADR 0xA4050120 97#define PORT_PADR 0xA4050120
98#define PORT_PBDR 0xA4050122 98#define PORT_PBDR 0xA4050122
99#define PORT_PCDR 0xA4050124 99#define PORT_PCDR 0xA4050124
100#define PORT_PDDR 0xA4050126 100#define PORT_PDDR 0xA4050126
101#define PORT_PEDR 0xA4050128 101#define PORT_PEDR 0xA4050128
102#define PORT_PFDR 0xA405012A 102#define PORT_PFDR 0xA405012A
103#define PORT_PGDR 0xA405012C 103#define PORT_PGDR 0xA405012C
104#define PORT_PHDR 0xA405012E 104#define PORT_PHDR 0xA405012E
105#define PORT_PJDR 0xA4050130 105#define PORT_PJDR 0xA4050130
106#define PORT_PKDR 0xA4050132 106#define PORT_PKDR 0xA4050132
107#define PORT_PLDR 0xA4050134 107#define PORT_PLDR 0xA4050134
108#define PORT_PMDR 0xA4050136 108#define PORT_PMDR 0xA4050136
109#define PORT_PNDR 0xA4050138 109#define PORT_PNDR 0xA4050138
110#define PORT_PQDR 0xA405013A 110#define PORT_PQDR 0xA405013A
111#define PORT_PRDR 0xA405013C 111#define PORT_PRDR 0xA405013C
112#define PORT_PTDR 0xA4050160 112#define PORT_PTDR 0xA4050160
113#define PORT_PUDR 0xA4050162 113#define PORT_PUDR 0xA4050162
114#define PORT_PVDR 0xA4050164 114#define PORT_PVDR 0xA4050164
115#define PORT_PWDR 0xA4050166 115#define PORT_PWDR 0xA4050166
116#define PORT_PYDR 0xA4050168 116#define PORT_PYDR 0xA4050168
117 117
118#define FPGA_IN 0xb1400000 118#define FPGA_IN 0xb1400000
119#define FPGA_OUT 0xb1400002 119#define FPGA_OUT 0xb1400002
@@ -133,18 +133,10 @@
133#define SE7343_FPGA_IRQ_UARTB 11 133#define SE7343_FPGA_IRQ_UARTB 11
134 134
135#define SE7343_FPGA_IRQ_NR 12 135#define SE7343_FPGA_IRQ_NR 12
136#define SE7343_FPGA_IRQ_BASE 120
137
138#define MRSHPC_IRQ3 (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_MRSHPC3)
139#define MRSHPC_IRQ2 (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_MRSHPC2)
140#define MRSHPC_IRQ1 (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_MRSHPC1)
141#define MRSHPC_IRQ0 (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_MRSHPC0)
142#define SMC_IRQ (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_SMC)
143#define USB_IRQ (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_USB)
144#define UARTA_IRQ (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_UARTA)
145#define UARTB_IRQ (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_UARTB)
146 136
147/* arch/sh/boards/se/7343/irq.c */ 137/* arch/sh/boards/se/7343/irq.c */
138extern unsigned int se7343_fpga_irq[];
139
148void init_7343se_IRQ(void); 140void init_7343se_IRQ(void);
149 141
150#endif /* __ASM_SH_HITACHI_SE7343_H */ 142#endif /* __ASM_SH_HITACHI_SE7343_H */
diff --git a/arch/sh/include/mach-se/mach/se7722.h b/arch/sh/include/mach-se/mach/se7722.h
index e971d9a82f4a..16505bfb8a9e 100644
--- a/arch/sh/include/mach-se/mach/se7722.h
+++ b/arch/sh/include/mach-se/mach/se7722.h
@@ -92,18 +92,11 @@
92#define SE7722_FPGA_IRQ_MRSHPC1 3 /* IRQ1 */ 92#define SE7722_FPGA_IRQ_MRSHPC1 3 /* IRQ1 */
93#define SE7722_FPGA_IRQ_MRSHPC2 4 /* IRQ1 */ 93#define SE7722_FPGA_IRQ_MRSHPC2 4 /* IRQ1 */
94#define SE7722_FPGA_IRQ_MRSHPC3 5 /* IRQ1 */ 94#define SE7722_FPGA_IRQ_MRSHPC3 5 /* IRQ1 */
95
96#define SE7722_FPGA_IRQ_NR 6 95#define SE7722_FPGA_IRQ_NR 6
97#define SE7722_FPGA_IRQ_BASE 110
98
99#define MRSHPC_IRQ3 (SE7722_FPGA_IRQ_BASE + SE7722_FPGA_IRQ_MRSHPC3)
100#define MRSHPC_IRQ2 (SE7722_FPGA_IRQ_BASE + SE7722_FPGA_IRQ_MRSHPC2)
101#define MRSHPC_IRQ1 (SE7722_FPGA_IRQ_BASE + SE7722_FPGA_IRQ_MRSHPC1)
102#define MRSHPC_IRQ0 (SE7722_FPGA_IRQ_BASE + SE7722_FPGA_IRQ_MRSHPC0)
103#define SMC_IRQ (SE7722_FPGA_IRQ_BASE + SE7722_FPGA_IRQ_SMC)
104#define USB_IRQ (SE7722_FPGA_IRQ_BASE + SE7722_FPGA_IRQ_USB)
105 96
106/* arch/sh/boards/se/7722/irq.c */ 97/* arch/sh/boards/se/7722/irq.c */
98extern unsigned int se7722_fpga_irq[];
99
107void init_se7722_IRQ(void); 100void init_se7722_IRQ(void);
108 101
109#define __IO_PREFIX se7722 102#define __IO_PREFIX se7722
diff --git a/arch/sh/kernel/Makefile b/arch/sh/kernel/Makefile
index a2d0a40f3848..02fd3ae8b0ee 100644
--- a/arch/sh/kernel/Makefile
+++ b/arch/sh/kernel/Makefile
@@ -9,8 +9,13 @@ ifdef CONFIG_FUNCTION_TRACER
9CFLAGS_REMOVE_ftrace.o = -pg 9CFLAGS_REMOVE_ftrace.o = -pg
10endif 10endif
11 11
12obj-y := debugtraps.o dumpstack.o idle.o io.o io_generic.o irq.o \ 12CFLAGS_REMOVE_return_address.o = -pg
13 machvec.o nmi_debug.o process_$(BITS).o ptrace_$(BITS).o \ 13
14obj-y := debugtraps.o dma-nommu.o dumpstack.o \
15 idle.o io.o io_generic.o irq.o \
16 irq_$(BITS).o machvec.o nmi_debug.o process.o \
17 process_$(BITS).o ptrace_$(BITS).o \
18 reboot.o return_address.o \
14 setup.o signal_$(BITS).o sys_sh.o sys_sh$(BITS).o \ 19 setup.o signal_$(BITS).o sys_sh.o sys_sh$(BITS).o \
15 syscalls_$(BITS).o time.o topology.o traps.o \ 20 syscalls_$(BITS).o time.o topology.o traps.o \
16 traps_$(BITS).o unwinder.o 21 traps_$(BITS).o unwinder.o
@@ -22,20 +27,20 @@ obj-$(CONFIG_SH_STANDARD_BIOS) += sh_bios.o
22obj-$(CONFIG_KGDB) += kgdb.o 27obj-$(CONFIG_KGDB) += kgdb.o
23obj-$(CONFIG_SH_CPU_FREQ) += cpufreq.o 28obj-$(CONFIG_SH_CPU_FREQ) += cpufreq.o
24obj-$(CONFIG_MODULES) += sh_ksyms_$(BITS).o module.o 29obj-$(CONFIG_MODULES) += sh_ksyms_$(BITS).o module.o
25obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
26obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o 30obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o
27obj-$(CONFIG_CRASH_DUMP) += crash_dump.o 31obj-$(CONFIG_CRASH_DUMP) += crash_dump.o
28obj-$(CONFIG_STACKTRACE) += stacktrace.o 32obj-$(CONFIG_STACKTRACE) += stacktrace.o
29obj-$(CONFIG_IO_TRAPPED) += io_trapped.o 33obj-$(CONFIG_IO_TRAPPED) += io_trapped.o
30obj-$(CONFIG_KPROBES) += kprobes.o 34obj-$(CONFIG_KPROBES) += kprobes.o
31obj-$(CONFIG_GENERIC_GPIO) += gpio.o
32obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o 35obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o
33obj-$(CONFIG_FTRACE_SYSCALLS) += ftrace.o 36obj-$(CONFIG_FTRACE_SYSCALLS) += ftrace.o
34obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += ftrace.o 37obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += ftrace.o
35obj-$(CONFIG_DUMP_CODE) += disassemble.o 38obj-$(CONFIG_DUMP_CODE) += disassemble.o
36obj-$(CONFIG_HIBERNATION) += swsusp.o 39obj-$(CONFIG_HIBERNATION) += swsusp.o
37obj-$(CONFIG_DWARF_UNWINDER) += dwarf.o 40obj-$(CONFIG_DWARF_UNWINDER) += dwarf.o
41obj-$(CONFIG_PERF_EVENTS) += perf_event.o perf_callchain.o
38 42
43obj-$(CONFIG_HAVE_HW_BREAKPOINT) += hw_breakpoint.o
39obj-$(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) += localtimer.o 44obj-$(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) += localtimer.o
40 45
41EXTRA_CFLAGS += -Werror 46EXTRA_CFLAGS += -Werror
diff --git a/arch/sh/kernel/asm-offsets.c b/arch/sh/kernel/asm-offsets.c
index d218e808294e..08a2be775b6c 100644
--- a/arch/sh/kernel/asm-offsets.c
+++ b/arch/sh/kernel/asm-offsets.c
@@ -34,5 +34,28 @@ int main(void)
34 DEFINE(PBE_NEXT, offsetof(struct pbe, next)); 34 DEFINE(PBE_NEXT, offsetof(struct pbe, next));
35 DEFINE(SWSUSP_ARCH_REGS_SIZE, sizeof(struct swsusp_arch_regs)); 35 DEFINE(SWSUSP_ARCH_REGS_SIZE, sizeof(struct swsusp_arch_regs));
36#endif 36#endif
37
38 DEFINE(SH_SLEEP_MODE, offsetof(struct sh_sleep_data, mode));
39 DEFINE(SH_SLEEP_SF_PRE, offsetof(struct sh_sleep_data, sf_pre));
40 DEFINE(SH_SLEEP_SF_POST, offsetof(struct sh_sleep_data, sf_post));
41 DEFINE(SH_SLEEP_RESUME, offsetof(struct sh_sleep_data, resume));
42 DEFINE(SH_SLEEP_VBR, offsetof(struct sh_sleep_data, vbr));
43 DEFINE(SH_SLEEP_SPC, offsetof(struct sh_sleep_data, spc));
44 DEFINE(SH_SLEEP_SR, offsetof(struct sh_sleep_data, sr));
45 DEFINE(SH_SLEEP_SP, offsetof(struct sh_sleep_data, sp));
46 DEFINE(SH_SLEEP_BASE_ADDR, offsetof(struct sh_sleep_data, addr));
47 DEFINE(SH_SLEEP_BASE_DATA, offsetof(struct sh_sleep_data, data));
48 DEFINE(SH_SLEEP_REG_STBCR, offsetof(struct sh_sleep_regs, stbcr));
49 DEFINE(SH_SLEEP_REG_BAR, offsetof(struct sh_sleep_regs, bar));
50 DEFINE(SH_SLEEP_REG_PTEH, offsetof(struct sh_sleep_regs, pteh));
51 DEFINE(SH_SLEEP_REG_PTEL, offsetof(struct sh_sleep_regs, ptel));
52 DEFINE(SH_SLEEP_REG_TTB, offsetof(struct sh_sleep_regs, ttb));
53 DEFINE(SH_SLEEP_REG_TEA, offsetof(struct sh_sleep_regs, tea));
54 DEFINE(SH_SLEEP_REG_MMUCR, offsetof(struct sh_sleep_regs, mmucr));
55 DEFINE(SH_SLEEP_REG_PTEA, offsetof(struct sh_sleep_regs, ptea));
56 DEFINE(SH_SLEEP_REG_PASCR, offsetof(struct sh_sleep_regs, pascr));
57 DEFINE(SH_SLEEP_REG_IRMCR, offsetof(struct sh_sleep_regs, irmcr));
58 DEFINE(SH_SLEEP_REG_CCR, offsetof(struct sh_sleep_regs, ccr));
59 DEFINE(SH_SLEEP_REG_RAMCR, offsetof(struct sh_sleep_regs, ramcr));
37 return 0; 60 return 0;
38} 61}
diff --git a/arch/sh/kernel/cpu/Makefile b/arch/sh/kernel/cpu/Makefile
index 3d6b9312dc47..0e48bc61c272 100644
--- a/arch/sh/kernel/cpu/Makefile
+++ b/arch/sh/kernel/cpu/Makefile
@@ -15,8 +15,9 @@ obj-$(CONFIG_ARCH_SHMOBILE) += shmobile/
15 15
16# Common interfaces. 16# Common interfaces.
17 17
18obj-$(CONFIG_UBC_WAKEUP) += ubc.o
19obj-$(CONFIG_SH_ADC) += adc.o 18obj-$(CONFIG_SH_ADC) += adc.o
20obj-$(CONFIG_SH_CLK_CPG) += clock-cpg.o 19obj-$(CONFIG_SH_CLK_CPG) += clock-cpg.o
20obj-$(CONFIG_SH_FPU) += fpu.o
21obj-$(CONFIG_SH_FPU_EMU) += fpu.o
21 22
22obj-y += irq/ init.o clock.o hwblk.o 23obj-y += irq/ init.o clock.o hwblk.o
diff --git a/arch/sh/kernel/cpu/adc.c b/arch/sh/kernel/cpu/adc.c
index da3d6877f93d..d307571d54b6 100644
--- a/arch/sh/kernel/cpu/adc.c
+++ b/arch/sh/kernel/cpu/adc.c
@@ -18,19 +18,19 @@ int adc_single(unsigned int channel)
18 18
19 off = (channel & 0x03) << 2; 19 off = (channel & 0x03) << 2;
20 20
21 csr = ctrl_inb(ADCSR); 21 csr = __raw_readb(ADCSR);
22 csr = channel | ADCSR_ADST | ADCSR_CKS; 22 csr = channel | ADCSR_ADST | ADCSR_CKS;
23 ctrl_outb(csr, ADCSR); 23 __raw_writeb(csr, ADCSR);
24 24
25 do { 25 do {
26 csr = ctrl_inb(ADCSR); 26 csr = __raw_readb(ADCSR);
27 } while ((csr & ADCSR_ADF) == 0); 27 } while ((csr & ADCSR_ADF) == 0);
28 28
29 csr &= ~(ADCSR_ADF | ADCSR_ADST); 29 csr &= ~(ADCSR_ADF | ADCSR_ADST);
30 ctrl_outb(csr, ADCSR); 30 __raw_writeb(csr, ADCSR);
31 31
32 return (((ctrl_inb(ADDRAH + off) << 8) | 32 return (((__raw_readb(ADDRAH + off) << 8) |
33 ctrl_inb(ADDRAL + off)) >> 6); 33 __raw_readb(ADDRAL + off)) >> 6);
34} 34}
35 35
36EXPORT_SYMBOL(adc_single); 36EXPORT_SYMBOL(adc_single);
diff --git a/arch/sh/kernel/cpu/clock-cpg.c b/arch/sh/kernel/cpu/clock-cpg.c
index 6dfe2cced3fc..eed5eaff96ba 100644
--- a/arch/sh/kernel/cpu/clock-cpg.c
+++ b/arch/sh/kernel/cpu/clock-cpg.c
@@ -149,7 +149,8 @@ int __init sh_clk_div6_register(struct clk *clks, int nr)
149 149
150static unsigned long sh_clk_div4_recalc(struct clk *clk) 150static unsigned long sh_clk_div4_recalc(struct clk *clk)
151{ 151{
152 struct clk_div_mult_table *table = clk->priv; 152 struct clk_div4_table *d4t = clk->priv;
153 struct clk_div_mult_table *table = d4t->div_mult_table;
153 unsigned int idx; 154 unsigned int idx;
154 155
155 clk_rate_table_build(clk, clk->freq_table, table->nr_divisors, 156 clk_rate_table_build(clk, clk->freq_table, table->nr_divisors,
@@ -160,17 +161,90 @@ static unsigned long sh_clk_div4_recalc(struct clk *clk)
160 return clk->freq_table[idx].frequency; 161 return clk->freq_table[idx].frequency;
161} 162}
162 163
164static int sh_clk_div4_set_parent(struct clk *clk, struct clk *parent)
165{
166 struct clk_div4_table *d4t = clk->priv;
167 struct clk_div_mult_table *table = d4t->div_mult_table;
168 u32 value;
169 int ret;
170
171 if (!strcmp("pll_clk", parent->name))
172 value = __raw_readl(clk->enable_reg) & ~(1 << 7);
173 else
174 value = __raw_readl(clk->enable_reg) | (1 << 7);
175
176 ret = clk_reparent(clk, parent);
177 if (ret < 0)
178 return ret;
179
180 __raw_writel(value, clk->enable_reg);
181
182 /* Rebiuld the frequency table */
183 clk_rate_table_build(clk, clk->freq_table, table->nr_divisors,
184 table, &clk->arch_flags);
185
186 return 0;
187}
188
189static int sh_clk_div4_set_rate(struct clk *clk, unsigned long rate, int algo_id)
190{
191 struct clk_div4_table *d4t = clk->priv;
192 unsigned long value;
193 int idx = clk_rate_table_find(clk, clk->freq_table, rate);
194 if (idx < 0)
195 return idx;
196
197 value = __raw_readl(clk->enable_reg);
198 value &= ~(0xf << clk->enable_bit);
199 value |= (idx << clk->enable_bit);
200 __raw_writel(value, clk->enable_reg);
201
202 if (d4t->kick)
203 d4t->kick(clk);
204
205 return 0;
206}
207
208static int sh_clk_div4_enable(struct clk *clk)
209{
210 __raw_writel(__raw_readl(clk->enable_reg) & ~(1 << 8), clk->enable_reg);
211 return 0;
212}
213
214static void sh_clk_div4_disable(struct clk *clk)
215{
216 __raw_writel(__raw_readl(clk->enable_reg) | (1 << 8), clk->enable_reg);
217}
218
163static struct clk_ops sh_clk_div4_clk_ops = { 219static struct clk_ops sh_clk_div4_clk_ops = {
164 .recalc = sh_clk_div4_recalc, 220 .recalc = sh_clk_div4_recalc,
221 .set_rate = sh_clk_div4_set_rate,
165 .round_rate = sh_clk_div_round_rate, 222 .round_rate = sh_clk_div_round_rate,
166}; 223};
167 224
168int __init sh_clk_div4_register(struct clk *clks, int nr, 225static struct clk_ops sh_clk_div4_enable_clk_ops = {
169 struct clk_div_mult_table *table) 226 .recalc = sh_clk_div4_recalc,
227 .set_rate = sh_clk_div4_set_rate,
228 .round_rate = sh_clk_div_round_rate,
229 .enable = sh_clk_div4_enable,
230 .disable = sh_clk_div4_disable,
231};
232
233static struct clk_ops sh_clk_div4_reparent_clk_ops = {
234 .recalc = sh_clk_div4_recalc,
235 .set_rate = sh_clk_div4_set_rate,
236 .round_rate = sh_clk_div_round_rate,
237 .enable = sh_clk_div4_enable,
238 .disable = sh_clk_div4_disable,
239 .set_parent = sh_clk_div4_set_parent,
240};
241
242static int __init sh_clk_div4_register_ops(struct clk *clks, int nr,
243 struct clk_div4_table *table, struct clk_ops *ops)
170{ 244{
171 struct clk *clkp; 245 struct clk *clkp;
172 void *freq_table; 246 void *freq_table;
173 int nr_divs = table->nr_divisors; 247 int nr_divs = table->div_mult_table->nr_divisors;
174 int freq_table_size = sizeof(struct cpufreq_frequency_table); 248 int freq_table_size = sizeof(struct cpufreq_frequency_table);
175 int ret = 0; 249 int ret = 0;
176 int k; 250 int k;
@@ -185,7 +259,7 @@ int __init sh_clk_div4_register(struct clk *clks, int nr,
185 for (k = 0; !ret && (k < nr); k++) { 259 for (k = 0; !ret && (k < nr); k++) {
186 clkp = clks + k; 260 clkp = clks + k;
187 261
188 clkp->ops = &sh_clk_div4_clk_ops; 262 clkp->ops = ops;
189 clkp->id = -1; 263 clkp->id = -1;
190 clkp->priv = table; 264 clkp->priv = table;
191 265
@@ -198,6 +272,26 @@ int __init sh_clk_div4_register(struct clk *clks, int nr,
198 return ret; 272 return ret;
199} 273}
200 274
275int __init sh_clk_div4_register(struct clk *clks, int nr,
276 struct clk_div4_table *table)
277{
278 return sh_clk_div4_register_ops(clks, nr, table, &sh_clk_div4_clk_ops);
279}
280
281int __init sh_clk_div4_enable_register(struct clk *clks, int nr,
282 struct clk_div4_table *table)
283{
284 return sh_clk_div4_register_ops(clks, nr, table,
285 &sh_clk_div4_enable_clk_ops);
286}
287
288int __init sh_clk_div4_reparent_register(struct clk *clks, int nr,
289 struct clk_div4_table *table)
290{
291 return sh_clk_div4_register_ops(clks, nr, table,
292 &sh_clk_div4_reparent_clk_ops);
293}
294
201#ifdef CONFIG_SH_CLK_CPG_LEGACY 295#ifdef CONFIG_SH_CLK_CPG_LEGACY
202static struct clk master_clk = { 296static struct clk master_clk = {
203 .name = "master_clk", 297 .name = "master_clk",
diff --git a/arch/sh/kernel/cpu/clock.c b/arch/sh/kernel/cpu/clock.c
index f3a46be2ae81..e9fa1bfed53e 100644
--- a/arch/sh/kernel/cpu/clock.c
+++ b/arch/sh/kernel/cpu/clock.c
@@ -404,7 +404,7 @@ EXPORT_SYMBOL_GPL(clk_round_rate);
404 * If an entry has a device ID, it must match 404 * If an entry has a device ID, it must match
405 * If an entry has a connection ID, it must match 405 * If an entry has a connection ID, it must match
406 * Then we take the most specific entry - with the following 406 * Then we take the most specific entry - with the following
407 * order of precidence: dev+con > dev only > con only. 407 * order of precedence: dev+con > dev only > con only.
408 */ 408 */
409static struct clk *clk_find(const char *dev_id, const char *con_id) 409static struct clk *clk_find(const char *dev_id, const char *con_id)
410{ 410{
@@ -598,7 +598,7 @@ static struct dentry *clk_debugfs_root;
598static int clk_debugfs_register_one(struct clk *c) 598static int clk_debugfs_register_one(struct clk *c)
599{ 599{
600 int err; 600 int err;
601 struct dentry *d, *child; 601 struct dentry *d, *child, *child_tmp;
602 struct clk *pa = c->parent; 602 struct clk *pa = c->parent;
603 char s[255]; 603 char s[255];
604 char *p = s; 604 char *p = s;
@@ -630,7 +630,7 @@ static int clk_debugfs_register_one(struct clk *c)
630 630
631err_out: 631err_out:
632 d = c->dentry; 632 d = c->dentry;
633 list_for_each_entry(child, &d->d_subdirs, d_u.d_child) 633 list_for_each_entry_safe(child, child_tmp, &d->d_subdirs, d_u.d_child)
634 debugfs_remove(child); 634 debugfs_remove(child);
635 debugfs_remove(c->dentry); 635 debugfs_remove(c->dentry);
636 return err; 636 return err;
diff --git a/arch/sh/kernel/cpu/fpu.c b/arch/sh/kernel/cpu/fpu.c
new file mode 100644
index 000000000000..7f1b70cace35
--- /dev/null
+++ b/arch/sh/kernel/cpu/fpu.c
@@ -0,0 +1,85 @@
1#include <linux/sched.h>
2#include <linux/slab.h>
3#include <asm/processor.h>
4#include <asm/fpu.h>
5
6int init_fpu(struct task_struct *tsk)
7{
8 if (tsk_used_math(tsk)) {
9 if ((boot_cpu_data.flags & CPU_HAS_FPU) && tsk == current)
10 unlazy_fpu(tsk, task_pt_regs(tsk));
11 return 0;
12 }
13
14 /*
15 * Memory allocation at the first usage of the FPU and other state.
16 */
17 if (!tsk->thread.xstate) {
18 tsk->thread.xstate = kmem_cache_alloc(task_xstate_cachep,
19 GFP_KERNEL);
20 if (!tsk->thread.xstate)
21 return -ENOMEM;
22 }
23
24 if (boot_cpu_data.flags & CPU_HAS_FPU) {
25 struct sh_fpu_hard_struct *fp = &tsk->thread.xstate->hardfpu;
26 memset(fp, 0, xstate_size);
27 fp->fpscr = FPSCR_INIT;
28 } else {
29 struct sh_fpu_soft_struct *fp = &tsk->thread.xstate->softfpu;
30 memset(fp, 0, xstate_size);
31 fp->fpscr = FPSCR_INIT;
32 }
33
34 set_stopped_child_used_math(tsk);
35 return 0;
36}
37
38#ifdef CONFIG_SH_FPU
39void __fpu_state_restore(void)
40{
41 struct task_struct *tsk = current;
42
43 restore_fpu(tsk);
44
45 task_thread_info(tsk)->status |= TS_USEDFPU;
46 tsk->fpu_counter++;
47}
48
49void fpu_state_restore(struct pt_regs *regs)
50{
51 struct task_struct *tsk = current;
52
53 if (unlikely(!user_mode(regs))) {
54 printk(KERN_ERR "BUG: FPU is used in kernel mode.\n");
55 BUG();
56 return;
57 }
58
59 if (!tsk_used_math(tsk)) {
60 local_irq_enable();
61 /*
62 * does a slab alloc which can sleep
63 */
64 if (init_fpu(tsk)) {
65 /*
66 * ran out of memory!
67 */
68 do_group_exit(SIGKILL);
69 return;
70 }
71 local_irq_disable();
72 }
73
74 grab_fpu(regs);
75
76 __fpu_state_restore();
77}
78
79BUILD_TRAP_HANDLER(fpu_state_restore)
80{
81 TRAP_HANDLER_DECL;
82
83 fpu_state_restore(regs);
84}
85#endif /* CONFIG_SH_FPU */
diff --git a/arch/sh/kernel/cpu/hwblk.c b/arch/sh/kernel/cpu/hwblk.c
index c0ad7d46e784..67a1e811cfe8 100644
--- a/arch/sh/kernel/cpu/hwblk.c
+++ b/arch/sh/kernel/cpu/hwblk.c
@@ -1,6 +1,5 @@
1#include <linux/clk.h> 1#include <linux/clk.h>
2#include <linux/compiler.h> 2#include <linux/compiler.h>
3#include <linux/slab.h>
4#include <linux/io.h> 3#include <linux/io.h>
5#include <linux/spinlock.h> 4#include <linux/spinlock.h>
6#include <asm/suspend.h> 5#include <asm/suspend.h>
diff --git a/arch/sh/kernel/cpu/init.c b/arch/sh/kernel/cpu/init.c
index e932ebef4738..c736422344eb 100644
--- a/arch/sh/kernel/cpu/init.c
+++ b/arch/sh/kernel/cpu/init.c
@@ -24,22 +24,32 @@
24#include <asm/elf.h> 24#include <asm/elf.h>
25#include <asm/io.h> 25#include <asm/io.h>
26#include <asm/smp.h> 26#include <asm/smp.h>
27#ifdef CONFIG_SUPERH32 27#include <asm/sh_bios.h>
28#include <asm/ubc.h> 28
29#ifdef CONFIG_SH_FPU
30#define cpu_has_fpu 1
31#else
32#define cpu_has_fpu 0
33#endif
34
35#ifdef CONFIG_SH_DSP
36#define cpu_has_dsp 1
37#else
38#define cpu_has_dsp 0
29#endif 39#endif
30 40
31/* 41/*
32 * Generic wrapper for command line arguments to disable on-chip 42 * Generic wrapper for command line arguments to disable on-chip
33 * peripherals (nofpu, nodsp, and so forth). 43 * peripherals (nofpu, nodsp, and so forth).
34 */ 44 */
35#define onchip_setup(x) \ 45#define onchip_setup(x) \
36static int x##_disabled __initdata = 0; \ 46static int x##_disabled __initdata = !cpu_has_##x; \
37 \ 47 \
38static int __init x##_setup(char *opts) \ 48static int __init x##_setup(char *opts) \
39{ \ 49{ \
40 x##_disabled = 1; \ 50 x##_disabled = 1; \
41 return 1; \ 51 return 1; \
42} \ 52} \
43__setup("no" __stringify(x), x##_setup); 53__setup("no" __stringify(x), x##_setup);
44 54
45onchip_setup(fpu); 55onchip_setup(fpu);
@@ -52,10 +62,10 @@ onchip_setup(dsp);
52static void __init speculative_execution_init(void) 62static void __init speculative_execution_init(void)
53{ 63{
54 /* Clear RABD */ 64 /* Clear RABD */
55 ctrl_outl(ctrl_inl(CPUOPM) & ~CPUOPM_RABD, CPUOPM); 65 __raw_writel(__raw_readl(CPUOPM) & ~CPUOPM_RABD, CPUOPM);
56 66
57 /* Flush the update */ 67 /* Flush the update */
58 (void)ctrl_inl(CPUOPM); 68 (void)__raw_readl(CPUOPM);
59 ctrl_barrier(); 69 ctrl_barrier();
60} 70}
61#else 71#else
@@ -75,16 +85,11 @@ static void __init expmask_init(void)
75 /* 85 /*
76 * Future proofing. 86 * Future proofing.
77 * 87 *
78 * Disable support for slottable sleep instruction 88 * Disable support for slottable sleep instruction, non-nop
79 * and non-nop instructions in the rte delay slot. 89 * instructions in the rte delay slot, and associative writes to
90 * the memory-mapped cache array.
80 */ 91 */
81 expmask &= ~(EXPMASK_RTEDS | EXPMASK_BRDSSLP); 92 expmask &= ~(EXPMASK_RTEDS | EXPMASK_BRDSSLP | EXPMASK_MMCAW);
82
83 /*
84 * Enable associative writes to the memory-mapped cache array
85 * until the cache flush ops have been rewritten.
86 */
87 expmask |= EXPMASK_MMCAW;
88 93
89 __raw_writel(expmask, EXPMASK); 94 __raw_writel(expmask, EXPMASK);
90 ctrl_barrier(); 95 ctrl_barrier();
@@ -94,7 +99,7 @@ static void __init expmask_init(void)
94#endif 99#endif
95 100
96/* 2nd-level cache init */ 101/* 2nd-level cache init */
97void __uses_jump_to_uncached __attribute__ ((weak)) l2_cache_init(void) 102void __attribute__ ((weak)) l2_cache_init(void)
98{ 103{
99} 104}
100 105
@@ -102,12 +107,12 @@ void __uses_jump_to_uncached __attribute__ ((weak)) l2_cache_init(void)
102 * Generic first-level cache init 107 * Generic first-level cache init
103 */ 108 */
104#ifdef CONFIG_SUPERH32 109#ifdef CONFIG_SUPERH32
105static void __uses_jump_to_uncached cache_init(void) 110static void cache_init(void)
106{ 111{
107 unsigned long ccr, flags; 112 unsigned long ccr, flags;
108 113
109 jump_to_uncached(); 114 jump_to_uncached();
110 ccr = ctrl_inl(CCR); 115 ccr = __raw_readl(CCR);
111 116
112 /* 117 /*
113 * At this point we don't know whether the cache is enabled or not - a 118 * At this point we don't know whether the cache is enabled or not - a
@@ -151,7 +156,7 @@ static void __uses_jump_to_uncached cache_init(void)
151 for (addr = addrstart; 156 for (addr = addrstart;
152 addr < addrstart + waysize; 157 addr < addrstart + waysize;
153 addr += current_cpu_data.dcache.linesz) 158 addr += current_cpu_data.dcache.linesz)
154 ctrl_outl(0, addr); 159 __raw_writel(0, addr);
155 160
156 addrstart += current_cpu_data.dcache.way_incr; 161 addrstart += current_cpu_data.dcache.way_incr;
157 } while (--ways); 162 } while (--ways);
@@ -184,7 +189,7 @@ static void __uses_jump_to_uncached cache_init(void)
184 189
185 l2_cache_init(); 190 l2_cache_init();
186 191
187 ctrl_outl(flags, CCR); 192 __raw_writel(flags, CCR);
188 back_to_cached(); 193 back_to_cached();
189} 194}
190#else 195#else
@@ -212,6 +217,18 @@ static void detect_cache_shape(void)
212 l2_cache_shape = -1; /* No S-cache */ 217 l2_cache_shape = -1; /* No S-cache */
213} 218}
214 219
220static void __init fpu_init(void)
221{
222 /* Disable the FPU */
223 if (fpu_disabled && (current_cpu_data.flags & CPU_HAS_FPU)) {
224 printk("FPU Disabled\n");
225 current_cpu_data.flags &= ~CPU_HAS_FPU;
226 }
227
228 disable_fpu();
229 clear_used_math();
230}
231
215#ifdef CONFIG_SH_DSP 232#ifdef CONFIG_SH_DSP
216static void __init release_dsp(void) 233static void __init release_dsp(void)
217{ 234{
@@ -249,28 +266,35 @@ static void __init dsp_init(void)
249 if (sr & SR_DSP) 266 if (sr & SR_DSP)
250 current_cpu_data.flags |= CPU_HAS_DSP; 267 current_cpu_data.flags |= CPU_HAS_DSP;
251 268
269 /* Disable the DSP */
270 if (dsp_disabled && (current_cpu_data.flags & CPU_HAS_DSP)) {
271 printk("DSP Disabled\n");
272 current_cpu_data.flags &= ~CPU_HAS_DSP;
273 }
274
252 /* Now that we've determined the DSP status, clear the DSP bit. */ 275 /* Now that we've determined the DSP status, clear the DSP bit. */
253 release_dsp(); 276 release_dsp();
254} 277}
278#else
279static inline void __init dsp_init(void) { }
255#endif /* CONFIG_SH_DSP */ 280#endif /* CONFIG_SH_DSP */
256 281
257/** 282/**
258 * sh_cpu_init 283 * sh_cpu_init
259 * 284 *
260 * This is our initial entry point for each CPU, and is invoked on the boot 285 * This is our initial entry point for each CPU, and is invoked on the
261 * CPU prior to calling start_kernel(). For SMP, a combination of this and 286 * boot CPU prior to calling start_kernel(). For SMP, a combination of
262 * start_secondary() will bring up each processor to a ready state prior 287 * this and start_secondary() will bring up each processor to a ready
263 * to hand forking the idle loop. 288 * state prior to hand forking the idle loop.
264 * 289 *
265 * We do all of the basic processor init here, including setting up the 290 * We do all of the basic processor init here, including setting up
266 * caches, FPU, DSP, kicking the UBC, etc. By the time start_kernel() is 291 * the caches, FPU, DSP, etc. By the time start_kernel() is hit (and
267 * hit (and subsequently platform_setup()) things like determining the 292 * subsequently platform_setup()) things like determining the CPU
268 * CPU subtype and initial configuration will all be done. 293 * subtype and initial configuration will all be done.
269 * 294 *
270 * Each processor family is still responsible for doing its own probing 295 * Each processor family is still responsible for doing its own probing
271 * and cache configuration in detect_cpu_and_cache_system(). 296 * and cache configuration in detect_cpu_and_cache_system().
272 */ 297 */
273
274asmlinkage void __init sh_cpu_init(void) 298asmlinkage void __init sh_cpu_init(void)
275{ 299{
276 current_thread_info()->cpu = hard_smp_processor_id(); 300 current_thread_info()->cpu = hard_smp_processor_id();
@@ -307,18 +331,8 @@ asmlinkage void __init sh_cpu_init(void)
307 detect_cache_shape(); 331 detect_cache_shape();
308 } 332 }
309 333
310 /* Disable the FPU */ 334 fpu_init();
311 if (fpu_disabled) { 335 dsp_init();
312 printk("FPU Disabled\n");
313 current_cpu_data.flags &= ~CPU_HAS_FPU;
314 disable_fpu();
315 }
316
317 /* FPU initialization */
318 if ((current_cpu_data.flags & CPU_HAS_FPU)) {
319 clear_thread_flag(TIF_USEDFPU);
320 clear_used_math();
321 }
322 336
323 /* 337 /*
324 * Initialize the per-CPU ASID cache very early, since the 338 * Initialize the per-CPU ASID cache very early, since the
@@ -326,29 +340,24 @@ asmlinkage void __init sh_cpu_init(void)
326 */ 340 */
327 current_cpu_data.asid_cache = NO_CONTEXT; 341 current_cpu_data.asid_cache = NO_CONTEXT;
328 342
329#ifdef CONFIG_SH_DSP 343 speculative_execution_init();
330 /* Probe for DSP */ 344 expmask_init();
331 dsp_init();
332 345
333 /* Disable the DSP */ 346 /* Do the rest of the boot processor setup */
334 if (dsp_disabled) { 347 if (raw_smp_processor_id() == 0) {
335 printk("DSP Disabled\n"); 348 /* Save off the BIOS VBR, if there is one */
336 current_cpu_data.flags &= ~CPU_HAS_DSP; 349 sh_bios_vbr_init();
337 release_dsp();
338 }
339#endif
340 350
341 /* 351 /*
342 * Some brain-damaged loaders decided it would be a good idea to put 352 * Setup VBR for boot CPU. Secondary CPUs do this through
343 * the UBC to sleep. This causes some issues when it comes to things 353 * start_secondary().
344 * like PTRACE_SINGLESTEP or doing hardware watchpoints in GDB. So .. 354 */
345 * we wake it up and hope that all is well. 355 per_cpu_trap_init();
346 */
347#ifdef CONFIG_SUPERH32
348 if (raw_smp_processor_id() == 0)
349 ubc_wakeup();
350#endif
351 356
352 speculative_execution_init(); 357 /*
353 expmask_init(); 358 * Boot processor to setup the FP and extended state
359 * context info.
360 */
361 init_thread_xstate();
362 }
354} 363}
diff --git a/arch/sh/kernel/cpu/irq/intc-sh5.c b/arch/sh/kernel/cpu/irq/intc-sh5.c
index 06e7e2959b54..96a239583948 100644
--- a/arch/sh/kernel/cpu/irq/intc-sh5.c
+++ b/arch/sh/kernel/cpu/irq/intc-sh5.c
@@ -123,7 +123,7 @@ static void enable_intc_irq(unsigned int irq)
123 bitmask = 1 << (irq - 32); 123 bitmask = 1 << (irq - 32);
124 } 124 }
125 125
126 ctrl_outl(bitmask, reg); 126 __raw_writel(bitmask, reg);
127} 127}
128 128
129static void disable_intc_irq(unsigned int irq) 129static void disable_intc_irq(unsigned int irq)
@@ -139,7 +139,7 @@ static void disable_intc_irq(unsigned int irq)
139 bitmask = 1 << (irq - 32); 139 bitmask = 1 << (irq - 32);
140 } 140 }
141 141
142 ctrl_outl(bitmask, reg); 142 __raw_writel(bitmask, reg);
143} 143}
144 144
145static void mask_and_ack_intc(unsigned int irq) 145static void mask_and_ack_intc(unsigned int irq)
@@ -170,11 +170,11 @@ void __init plat_irq_setup(void)
170 170
171 171
172 /* Disable all interrupts and set all priorities to 0 to avoid trouble */ 172 /* Disable all interrupts and set all priorities to 0 to avoid trouble */
173 ctrl_outl(-1, INTC_INTDSB_0); 173 __raw_writel(-1, INTC_INTDSB_0);
174 ctrl_outl(-1, INTC_INTDSB_1); 174 __raw_writel(-1, INTC_INTDSB_1);
175 175
176 for (reg = INTC_INTPRI_0, i = 0; i < INTC_INTPRI_PREGS; i++, reg += 8) 176 for (reg = INTC_INTPRI_0, i = 0; i < INTC_INTPRI_PREGS; i++, reg += 8)
177 ctrl_outl( NO_PRIORITY, reg); 177 __raw_writel( NO_PRIORITY, reg);
178 178
179 179
180#ifdef CONFIG_SH_CAYMAN 180#ifdef CONFIG_SH_CAYMAN
@@ -199,7 +199,7 @@ void __init plat_irq_setup(void)
199 reg = INTC_ICR_SET; 199 reg = INTC_ICR_SET;
200 i = IRQ_IRL0; 200 i = IRQ_IRL0;
201 } 201 }
202 ctrl_outl(INTC_ICR_IRLM, reg); 202 __raw_writel(INTC_ICR_IRLM, reg);
203 203
204 /* Set interrupt priorities according to platform description */ 204 /* Set interrupt priorities according to platform description */
205 for (data = 0, reg = INTC_INTPRI_0; i < NR_INTC_IRQS; i++) { 205 for (data = 0, reg = INTC_INTPRI_0; i < NR_INTC_IRQS; i++) {
@@ -207,7 +207,7 @@ void __init plat_irq_setup(void)
207 ((i % INTC_INTPRI_PPREG) * 4); 207 ((i % INTC_INTPRI_PPREG) * 4);
208 if ((i % INTC_INTPRI_PPREG) == (INTC_INTPRI_PPREG - 1)) { 208 if ((i % INTC_INTPRI_PPREG) == (INTC_INTPRI_PPREG - 1)) {
209 /* Upon the 7th, set Priority Register */ 209 /* Upon the 7th, set Priority Register */
210 ctrl_outl(data, reg); 210 __raw_writel(data, reg);
211 data = 0; 211 data = 0;
212 reg += 8; 212 reg += 8;
213 } 213 }
diff --git a/arch/sh/kernel/cpu/irq/ipr.c b/arch/sh/kernel/cpu/irq/ipr.c
index c1508a90fc6a..9282d965a1b6 100644
--- a/arch/sh/kernel/cpu/irq/ipr.c
+++ b/arch/sh/kernel/cpu/irq/ipr.c
@@ -17,16 +17,17 @@
17 * for more details. 17 * for more details.
18 */ 18 */
19#include <linux/init.h> 19#include <linux/init.h>
20#include <linux/interrupt.h>
21#include <linux/io.h>
20#include <linux/irq.h> 22#include <linux/irq.h>
23#include <linux/kernel.h>
21#include <linux/module.h> 24#include <linux/module.h>
22#include <linux/io.h>
23#include <linux/interrupt.h>
24#include <linux/topology.h> 25#include <linux/topology.h>
25 26
26static inline struct ipr_desc *get_ipr_desc(unsigned int irq) 27static inline struct ipr_desc *get_ipr_desc(unsigned int irq)
27{ 28{
28 struct irq_chip *chip = get_irq_chip(irq); 29 struct irq_chip *chip = get_irq_chip(irq);
29 return (void *)((char *)chip - offsetof(struct ipr_desc, chip)); 30 return container_of(chip, struct ipr_desc, chip);
30} 31}
31 32
32static void disable_ipr_irq(unsigned int irq) 33static void disable_ipr_irq(unsigned int irq)
diff --git a/arch/sh/kernel/cpu/sh2/clock-sh7619.c b/arch/sh/kernel/cpu/sh2/clock-sh7619.c
index 4fe863170e31..0c9f24d7a02f 100644
--- a/arch/sh/kernel/cpu/sh2/clock-sh7619.c
+++ b/arch/sh/kernel/cpu/sh2/clock-sh7619.c
@@ -31,7 +31,7 @@ static const int pfc_divisors[] = {1,2,0,4};
31 31
32static void master_clk_init(struct clk *clk) 32static void master_clk_init(struct clk *clk)
33{ 33{
34 clk->rate *= PLL2 * pll1rate[(ctrl_inw(FREQCR) >> 8) & 7]; 34 clk->rate *= PLL2 * pll1rate[(__raw_readw(FREQCR) >> 8) & 7];
35} 35}
36 36
37static struct clk_ops sh7619_master_clk_ops = { 37static struct clk_ops sh7619_master_clk_ops = {
@@ -40,7 +40,7 @@ static struct clk_ops sh7619_master_clk_ops = {
40 40
41static unsigned long module_clk_recalc(struct clk *clk) 41static unsigned long module_clk_recalc(struct clk *clk)
42{ 42{
43 int idx = (ctrl_inw(FREQCR) & 0x0007); 43 int idx = (__raw_readw(FREQCR) & 0x0007);
44 return clk->parent->rate / pfc_divisors[idx]; 44 return clk->parent->rate / pfc_divisors[idx];
45} 45}
46 46
@@ -50,7 +50,7 @@ static struct clk_ops sh7619_module_clk_ops = {
50 50
51static unsigned long bus_clk_recalc(struct clk *clk) 51static unsigned long bus_clk_recalc(struct clk *clk)
52{ 52{
53 return clk->parent->rate / pll1rate[(ctrl_inw(FREQCR) >> 8) & 7]; 53 return clk->parent->rate / pll1rate[(__raw_readw(FREQCR) >> 8) & 7];
54} 54}
55 55
56static struct clk_ops sh7619_bus_clk_ops = { 56static struct clk_ops sh7619_bus_clk_ops = {
diff --git a/arch/sh/kernel/cpu/sh2/setup-sh7619.c b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
index 8555c05e8667..114c7cee7184 100644
--- a/arch/sh/kernel/cpu/sh2/setup-sh7619.c
+++ b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
@@ -59,32 +59,48 @@ static struct intc_prio_reg prio_registers[] __initdata = {
59static DECLARE_INTC_DESC(intc_desc, "sh7619", vectors, NULL, 59static DECLARE_INTC_DESC(intc_desc, "sh7619", vectors, NULL,
60 NULL, prio_registers, NULL); 60 NULL, prio_registers, NULL);
61 61
62static struct plat_sci_port sci_platform_data[] = { 62static struct plat_sci_port scif0_platform_data = {
63 { 63 .mapbase = 0xf8400000,
64 .mapbase = 0xf8400000, 64 .flags = UPF_BOOT_AUTOCONF,
65 .flags = UPF_BOOT_AUTOCONF, 65 .type = PORT_SCIF,
66 .type = PORT_SCIF, 66 .irqs = { 88, 88, 88, 88 },
67 .irqs = { 88, 88, 88, 88 }, 67};
68 }, { 68
69 .mapbase = 0xf8410000, 69static struct platform_device scif0_device = {
70 .flags = UPF_BOOT_AUTOCONF, 70 .name = "sh-sci",
71 .type = PORT_SCIF, 71 .id = 0,
72 .irqs = { 92, 92, 92, 92 }, 72 .dev = {
73 }, { 73 .platform_data = &scif0_platform_data,
74 .mapbase = 0xf8420000, 74 },
75 .flags = UPF_BOOT_AUTOCONF, 75};
76 .type = PORT_SCIF, 76
77 .irqs = { 96, 96, 96, 96 }, 77static struct plat_sci_port scif1_platform_data = {
78 }, { 78 .mapbase = 0xf8410000,
79 .flags = 0, 79 .flags = UPF_BOOT_AUTOCONF,
80 } 80 .type = PORT_SCIF,
81}; 81 .irqs = { 92, 92, 92, 92 },
82 82};
83static struct platform_device sci_device = { 83
84static struct platform_device scif1_device = {
85 .name = "sh-sci",
86 .id = 1,
87 .dev = {
88 .platform_data = &scif1_platform_data,
89 },
90};
91
92static struct plat_sci_port scif2_platform_data = {
93 .mapbase = 0xf8420000,
94 .flags = UPF_BOOT_AUTOCONF,
95 .type = PORT_SCIF,
96 .irqs = { 96, 96, 96, 96 },
97};
98
99static struct platform_device scif2_device = {
84 .name = "sh-sci", 100 .name = "sh-sci",
85 .id = -1, 101 .id = 2,
86 .dev = { 102 .dev = {
87 .platform_data = sci_platform_data, 103 .platform_data = &scif2_platform_data,
88 }, 104 },
89}; 105};
90 106
@@ -176,7 +192,9 @@ static struct platform_device cmt1_device = {
176}; 192};
177 193
178static struct platform_device *sh7619_devices[] __initdata = { 194static struct platform_device *sh7619_devices[] __initdata = {
179 &sci_device, 195 &scif0_device,
196 &scif1_device,
197 &scif2_device,
180 &eth_device, 198 &eth_device,
181 &cmt0_device, 199 &cmt0_device,
182 &cmt1_device, 200 &cmt1_device,
@@ -195,6 +213,9 @@ void __init plat_irq_setup(void)
195} 213}
196 214
197static struct platform_device *sh7619_early_devices[] __initdata = { 215static struct platform_device *sh7619_early_devices[] __initdata = {
216 &scif0_device,
217 &scif1_device,
218 &scif2_device,
198 &cmt0_device, 219 &cmt0_device,
199 &cmt1_device, 220 &cmt1_device,
200}; 221};
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7201.c b/arch/sh/kernel/cpu/sh2a/clock-sh7201.c
index 7814c76159a7..b26264dc2aef 100644
--- a/arch/sh/kernel/cpu/sh2a/clock-sh7201.c
+++ b/arch/sh/kernel/cpu/sh2a/clock-sh7201.c
@@ -34,7 +34,7 @@ static const int pfc_divisors[]={1,2,3,4,6,8,12};
34 34
35static void master_clk_init(struct clk *clk) 35static void master_clk_init(struct clk *clk)
36{ 36{
37 return 10000000 * PLL2 * pll1rate[(ctrl_inw(FREQCR) >> 8) & 0x0007]; 37 return 10000000 * PLL2 * pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007];
38} 38}
39 39
40static struct clk_ops sh7201_master_clk_ops = { 40static struct clk_ops sh7201_master_clk_ops = {
@@ -43,7 +43,7 @@ static struct clk_ops sh7201_master_clk_ops = {
43 43
44static unsigned long module_clk_recalc(struct clk *clk) 44static unsigned long module_clk_recalc(struct clk *clk)
45{ 45{
46 int idx = (ctrl_inw(FREQCR) & 0x0007); 46 int idx = (__raw_readw(FREQCR) & 0x0007);
47 return clk->parent->rate / pfc_divisors[idx]; 47 return clk->parent->rate / pfc_divisors[idx];
48} 48}
49 49
@@ -53,7 +53,7 @@ static struct clk_ops sh7201_module_clk_ops = {
53 53
54static unsigned long bus_clk_recalc(struct clk *clk) 54static unsigned long bus_clk_recalc(struct clk *clk)
55{ 55{
56 int idx = (ctrl_inw(FREQCR) & 0x0007); 56 int idx = (__raw_readw(FREQCR) & 0x0007);
57 return clk->parent->rate / pfc_divisors[idx]; 57 return clk->parent->rate / pfc_divisors[idx];
58} 58}
59 59
@@ -63,7 +63,7 @@ static struct clk_ops sh7201_bus_clk_ops = {
63 63
64static unsigned long cpu_clk_recalc(struct clk *clk) 64static unsigned long cpu_clk_recalc(struct clk *clk)
65{ 65{
66 int idx = ((ctrl_inw(FREQCR) >> 4) & 0x0007); 66 int idx = ((__raw_readw(FREQCR) >> 4) & 0x0007);
67 return clk->parent->rate / ifc_divisors[idx]; 67 return clk->parent->rate / ifc_divisors[idx];
68} 68}
69 69
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7203.c b/arch/sh/kernel/cpu/sh2a/clock-sh7203.c
index 940986965102..7e75d8f79502 100644
--- a/arch/sh/kernel/cpu/sh2a/clock-sh7203.c
+++ b/arch/sh/kernel/cpu/sh2a/clock-sh7203.c
@@ -39,7 +39,7 @@ static const int pfc_divisors[]={1,2,3,4,6,8,12};
39 39
40static void master_clk_init(struct clk *clk) 40static void master_clk_init(struct clk *clk)
41{ 41{
42 clk->rate *= pll1rate[(ctrl_inw(FREQCR) >> 8) & 0x0003] * PLL2 ; 42 clk->rate *= pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0003] * PLL2 ;
43} 43}
44 44
45static struct clk_ops sh7203_master_clk_ops = { 45static struct clk_ops sh7203_master_clk_ops = {
@@ -48,7 +48,7 @@ static struct clk_ops sh7203_master_clk_ops = {
48 48
49static unsigned long module_clk_recalc(struct clk *clk) 49static unsigned long module_clk_recalc(struct clk *clk)
50{ 50{
51 int idx = (ctrl_inw(FREQCR) & 0x0007); 51 int idx = (__raw_readw(FREQCR) & 0x0007);
52 return clk->parent->rate / pfc_divisors[idx]; 52 return clk->parent->rate / pfc_divisors[idx];
53} 53}
54 54
@@ -58,7 +58,7 @@ static struct clk_ops sh7203_module_clk_ops = {
58 58
59static unsigned long bus_clk_recalc(struct clk *clk) 59static unsigned long bus_clk_recalc(struct clk *clk)
60{ 60{
61 int idx = (ctrl_inw(FREQCR) & 0x0007); 61 int idx = (__raw_readw(FREQCR) & 0x0007);
62 return clk->parent->rate / pfc_divisors[idx-2]; 62 return clk->parent->rate / pfc_divisors[idx-2];
63} 63}
64 64
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7206.c b/arch/sh/kernel/cpu/sh2a/clock-sh7206.c
index c2268bdeceeb..b27a5e2687ab 100644
--- a/arch/sh/kernel/cpu/sh2a/clock-sh7206.c
+++ b/arch/sh/kernel/cpu/sh2a/clock-sh7206.c
@@ -34,7 +34,7 @@ static const int pfc_divisors[]={1,2,3,4,6,8,12};
34 34
35static void master_clk_init(struct clk *clk) 35static void master_clk_init(struct clk *clk)
36{ 36{
37 clk->rate *= PLL2 * pll1rate[(ctrl_inw(FREQCR) >> 8) & 0x0007]; 37 clk->rate *= PLL2 * pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007];
38} 38}
39 39
40static struct clk_ops sh7206_master_clk_ops = { 40static struct clk_ops sh7206_master_clk_ops = {
@@ -43,7 +43,7 @@ static struct clk_ops sh7206_master_clk_ops = {
43 43
44static unsigned long module_clk_recalc(struct clk *clk) 44static unsigned long module_clk_recalc(struct clk *clk)
45{ 45{
46 int idx = (ctrl_inw(FREQCR) & 0x0007); 46 int idx = (__raw_readw(FREQCR) & 0x0007);
47 return clk->parent->rate / pfc_divisors[idx]; 47 return clk->parent->rate / pfc_divisors[idx];
48} 48}
49 49
@@ -53,7 +53,7 @@ static struct clk_ops sh7206_module_clk_ops = {
53 53
54static unsigned long bus_clk_recalc(struct clk *clk) 54static unsigned long bus_clk_recalc(struct clk *clk)
55{ 55{
56 return clk->parent->rate / pll1rate[(ctrl_inw(FREQCR) >> 8) & 0x0007]; 56 return clk->parent->rate / pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007];
57} 57}
58 58
59static struct clk_ops sh7206_bus_clk_ops = { 59static struct clk_ops sh7206_bus_clk_ops = {
@@ -62,7 +62,7 @@ static struct clk_ops sh7206_bus_clk_ops = {
62 62
63static unsigned long cpu_clk_recalc(struct clk *clk) 63static unsigned long cpu_clk_recalc(struct clk *clk)
64{ 64{
65 int idx = (ctrl_inw(FREQCR) & 0x0007); 65 int idx = (__raw_readw(FREQCR) & 0x0007);
66 return clk->parent->rate / ifc_divisors[idx]; 66 return clk->parent->rate / ifc_divisors[idx];
67} 67}
68 68
diff --git a/arch/sh/kernel/cpu/sh2a/fpu.c b/arch/sh/kernel/cpu/sh2a/fpu.c
index 6df2fb98eb30..488d24e0cdf0 100644
--- a/arch/sh/kernel/cpu/sh2a/fpu.c
+++ b/arch/sh/kernel/cpu/sh2a/fpu.c
@@ -25,14 +25,11 @@
25 25
26/* 26/*
27 * Save FPU registers onto task structure. 27 * Save FPU registers onto task structure.
28 * Assume called with FPU enabled (SR.FD=0).
29 */ 28 */
30void 29void save_fpu(struct task_struct *tsk)
31save_fpu(struct task_struct *tsk, struct pt_regs *regs)
32{ 30{
33 unsigned long dummy; 31 unsigned long dummy;
34 32
35 clear_tsk_thread_flag(tsk, TIF_USEDFPU);
36 enable_fpu(); 33 enable_fpu();
37 asm volatile("sts.l fpul, @-%0\n\t" 34 asm volatile("sts.l fpul, @-%0\n\t"
38 "sts.l fpscr, @-%0\n\t" 35 "sts.l fpscr, @-%0\n\t"
@@ -54,17 +51,15 @@ save_fpu(struct task_struct *tsk, struct pt_regs *regs)
54 "fmov.s fr0, @-%0\n\t" 51 "fmov.s fr0, @-%0\n\t"
55 "lds %3, fpscr\n\t" 52 "lds %3, fpscr\n\t"
56 : "=r" (dummy) 53 : "=r" (dummy)
57 : "0" ((char *)(&tsk->thread.fpu.hard.status)), 54 : "0" ((char *)(&tsk->thread.xstate->hardfpu.status)),
58 "r" (FPSCR_RCHG), 55 "r" (FPSCR_RCHG),
59 "r" (FPSCR_INIT) 56 "r" (FPSCR_INIT)
60 : "memory"); 57 : "memory");
61 58
62 disable_fpu(); 59 disable_fpu();
63 release_fpu(regs);
64} 60}
65 61
66static void 62void restore_fpu(struct task_struct *tsk)
67restore_fpu(struct task_struct *tsk)
68{ 63{
69 unsigned long dummy; 64 unsigned long dummy;
70 65
@@ -88,45 +83,12 @@ restore_fpu(struct task_struct *tsk)
88 "lds.l @%0+, fpscr\n\t" 83 "lds.l @%0+, fpscr\n\t"
89 "lds.l @%0+, fpul\n\t" 84 "lds.l @%0+, fpul\n\t"
90 : "=r" (dummy) 85 : "=r" (dummy)
91 : "0" (&tsk->thread.fpu), "r" (FPSCR_RCHG) 86 : "0" (tsk->thread.xstate), "r" (FPSCR_RCHG)
92 : "memory"); 87 : "memory");
93 disable_fpu(); 88 disable_fpu();
94} 89}
95 90
96/* 91/*
97 * Load the FPU with signalling NANS. This bit pattern we're using
98 * has the property that no matter wether considered as single or as
99 * double precission represents signaling NANS.
100 */
101
102static void
103fpu_init(void)
104{
105 enable_fpu();
106 asm volatile("lds %0, fpul\n\t"
107 "fsts fpul, fr0\n\t"
108 "fsts fpul, fr1\n\t"
109 "fsts fpul, fr2\n\t"
110 "fsts fpul, fr3\n\t"
111 "fsts fpul, fr4\n\t"
112 "fsts fpul, fr5\n\t"
113 "fsts fpul, fr6\n\t"
114 "fsts fpul, fr7\n\t"
115 "fsts fpul, fr8\n\t"
116 "fsts fpul, fr9\n\t"
117 "fsts fpul, fr10\n\t"
118 "fsts fpul, fr11\n\t"
119 "fsts fpul, fr12\n\t"
120 "fsts fpul, fr13\n\t"
121 "fsts fpul, fr14\n\t"
122 "fsts fpul, fr15\n\t"
123 "lds %2, fpscr\n\t"
124 : /* no output */
125 : "r" (0), "r" (FPSCR_RCHG), "r" (FPSCR_INIT));
126 disable_fpu();
127}
128
129/*
130 * Emulate arithmetic ops on denormalized number for some FPU insns. 92 * Emulate arithmetic ops on denormalized number for some FPU insns.
131 */ 93 */
132 94
@@ -493,9 +455,9 @@ ieee_fpe_handler (struct pt_regs *regs)
493 if ((finsn & 0xf1ff) == 0xf0ad) { /* fcnvsd */ 455 if ((finsn & 0xf1ff) == 0xf0ad) { /* fcnvsd */
494 struct task_struct *tsk = current; 456 struct task_struct *tsk = current;
495 457
496 if ((tsk->thread.fpu.hard.fpscr & FPSCR_FPU_ERROR)) { 458 if ((tsk->thread.xstate->hardfpu.fpscr & FPSCR_FPU_ERROR)) {
497 /* FPU error */ 459 /* FPU error */
498 denormal_to_double (&tsk->thread.fpu.hard, 460 denormal_to_double (&tsk->thread.xstate->hardfpu,
499 (finsn >> 8) & 0xf); 461 (finsn >> 8) & 0xf);
500 } else 462 } else
501 return 0; 463 return 0;
@@ -510,9 +472,9 @@ ieee_fpe_handler (struct pt_regs *regs)
510 472
511 n = (finsn >> 8) & 0xf; 473 n = (finsn >> 8) & 0xf;
512 m = (finsn >> 4) & 0xf; 474 m = (finsn >> 4) & 0xf;
513 hx = tsk->thread.fpu.hard.fp_regs[n]; 475 hx = tsk->thread.xstate->hardfpu.fp_regs[n];
514 hy = tsk->thread.fpu.hard.fp_regs[m]; 476 hy = tsk->thread.xstate->hardfpu.fp_regs[m];
515 fpscr = tsk->thread.fpu.hard.fpscr; 477 fpscr = tsk->thread.xstate->hardfpu.fpscr;
516 prec = fpscr & (1 << 19); 478 prec = fpscr & (1 << 19);
517 479
518 if ((fpscr & FPSCR_FPU_ERROR) 480 if ((fpscr & FPSCR_FPU_ERROR)
@@ -522,15 +484,15 @@ ieee_fpe_handler (struct pt_regs *regs)
522 484
523 /* FPU error because of denormal */ 485 /* FPU error because of denormal */
524 llx = ((long long) hx << 32) 486 llx = ((long long) hx << 32)
525 | tsk->thread.fpu.hard.fp_regs[n+1]; 487 | tsk->thread.xstate->hardfpu.fp_regs[n+1];
526 lly = ((long long) hy << 32) 488 lly = ((long long) hy << 32)
527 | tsk->thread.fpu.hard.fp_regs[m+1]; 489 | tsk->thread.xstate->hardfpu.fp_regs[m+1];
528 if ((hx & 0x7fffffff) >= 0x00100000) 490 if ((hx & 0x7fffffff) >= 0x00100000)
529 llx = denormal_muld(lly, llx); 491 llx = denormal_muld(lly, llx);
530 else 492 else
531 llx = denormal_muld(llx, lly); 493 llx = denormal_muld(llx, lly);
532 tsk->thread.fpu.hard.fp_regs[n] = llx >> 32; 494 tsk->thread.xstate->hardfpu.fp_regs[n] = llx >> 32;
533 tsk->thread.fpu.hard.fp_regs[n+1] = llx & 0xffffffff; 495 tsk->thread.xstate->hardfpu.fp_regs[n+1] = llx & 0xffffffff;
534 } else if ((fpscr & FPSCR_FPU_ERROR) 496 } else if ((fpscr & FPSCR_FPU_ERROR)
535 && (!prec && ((hx & 0x7fffffff) < 0x00800000 497 && (!prec && ((hx & 0x7fffffff) < 0x00800000
536 || (hy & 0x7fffffff) < 0x00800000))) { 498 || (hy & 0x7fffffff) < 0x00800000))) {
@@ -539,7 +501,7 @@ ieee_fpe_handler (struct pt_regs *regs)
539 hx = denormal_mulf(hy, hx); 501 hx = denormal_mulf(hy, hx);
540 else 502 else
541 hx = denormal_mulf(hx, hy); 503 hx = denormal_mulf(hx, hy);
542 tsk->thread.fpu.hard.fp_regs[n] = hx; 504 tsk->thread.xstate->hardfpu.fp_regs[n] = hx;
543 } else 505 } else
544 return 0; 506 return 0;
545 507
@@ -553,9 +515,9 @@ ieee_fpe_handler (struct pt_regs *regs)
553 515
554 n = (finsn >> 8) & 0xf; 516 n = (finsn >> 8) & 0xf;
555 m = (finsn >> 4) & 0xf; 517 m = (finsn >> 4) & 0xf;
556 hx = tsk->thread.fpu.hard.fp_regs[n]; 518 hx = tsk->thread.xstate->hardfpu.fp_regs[n];
557 hy = tsk->thread.fpu.hard.fp_regs[m]; 519 hy = tsk->thread.xstate->hardfpu.fp_regs[m];
558 fpscr = tsk->thread.fpu.hard.fpscr; 520 fpscr = tsk->thread.xstate->hardfpu.fpscr;
559 prec = fpscr & (1 << 19); 521 prec = fpscr & (1 << 19);
560 522
561 if ((fpscr & FPSCR_FPU_ERROR) 523 if ((fpscr & FPSCR_FPU_ERROR)
@@ -565,15 +527,15 @@ ieee_fpe_handler (struct pt_regs *regs)
565 527
566 /* FPU error because of denormal */ 528 /* FPU error because of denormal */
567 llx = ((long long) hx << 32) 529 llx = ((long long) hx << 32)
568 | tsk->thread.fpu.hard.fp_regs[n+1]; 530 | tsk->thread.xstate->hardfpu.fp_regs[n+1];
569 lly = ((long long) hy << 32) 531 lly = ((long long) hy << 32)
570 | tsk->thread.fpu.hard.fp_regs[m+1]; 532 | tsk->thread.xstate->hardfpu.fp_regs[m+1];
571 if ((finsn & 0xf00f) == 0xf000) 533 if ((finsn & 0xf00f) == 0xf000)
572 llx = denormal_addd(llx, lly); 534 llx = denormal_addd(llx, lly);
573 else 535 else
574 llx = denormal_addd(llx, lly ^ (1LL << 63)); 536 llx = denormal_addd(llx, lly ^ (1LL << 63));
575 tsk->thread.fpu.hard.fp_regs[n] = llx >> 32; 537 tsk->thread.xstate->hardfpu.fp_regs[n] = llx >> 32;
576 tsk->thread.fpu.hard.fp_regs[n+1] = llx & 0xffffffff; 538 tsk->thread.xstate->hardfpu.fp_regs[n+1] = llx & 0xffffffff;
577 } else if ((fpscr & FPSCR_FPU_ERROR) 539 } else if ((fpscr & FPSCR_FPU_ERROR)
578 && (!prec && ((hx & 0x7fffffff) < 0x00800000 540 && (!prec && ((hx & 0x7fffffff) < 0x00800000
579 || (hy & 0x7fffffff) < 0x00800000))) { 541 || (hy & 0x7fffffff) < 0x00800000))) {
@@ -582,7 +544,7 @@ ieee_fpe_handler (struct pt_regs *regs)
582 hx = denormal_addf(hx, hy); 544 hx = denormal_addf(hx, hy);
583 else 545 else
584 hx = denormal_addf(hx, hy ^ 0x80000000); 546 hx = denormal_addf(hx, hy ^ 0x80000000);
585 tsk->thread.fpu.hard.fp_regs[n] = hx; 547 tsk->thread.xstate->hardfpu.fp_regs[n] = hx;
586 } else 548 } else
587 return 0; 549 return 0;
588 550
@@ -598,37 +560,15 @@ BUILD_TRAP_HANDLER(fpu_error)
598 struct task_struct *tsk = current; 560 struct task_struct *tsk = current;
599 TRAP_HANDLER_DECL; 561 TRAP_HANDLER_DECL;
600 562
601 save_fpu(tsk, regs); 563 __unlazy_fpu(tsk, regs);
602 if (ieee_fpe_handler(regs)) { 564 if (ieee_fpe_handler(regs)) {
603 tsk->thread.fpu.hard.fpscr &= 565 tsk->thread.xstate->hardfpu.fpscr &=
604 ~(FPSCR_CAUSE_MASK | FPSCR_FLAG_MASK); 566 ~(FPSCR_CAUSE_MASK | FPSCR_FLAG_MASK);
605 grab_fpu(regs); 567 grab_fpu(regs);
606 restore_fpu(tsk); 568 restore_fpu(tsk);
607 set_tsk_thread_flag(tsk, TIF_USEDFPU); 569 task_thread_info(tsk)->status |= TS_USEDFPU;
608 return; 570 return;
609 } 571 }
610 572
611 force_sig(SIGFPE, tsk); 573 force_sig(SIGFPE, tsk);
612} 574}
613
614BUILD_TRAP_HANDLER(fpu_state_restore)
615{
616 struct task_struct *tsk = current;
617 TRAP_HANDLER_DECL;
618
619 grab_fpu(regs);
620 if (!user_mode(regs)) {
621 printk(KERN_ERR "BUG: FPU is used in kernel mode.\n");
622 return;
623 }
624
625 if (used_math()) {
626 /* Using the FPU again. */
627 restore_fpu(tsk);
628 } else {
629 /* First time FPU user. */
630 fpu_init();
631 set_used_math();
632 }
633 set_tsk_thread_flag(tsk, TIF_USEDFPU);
634}
diff --git a/arch/sh/kernel/cpu/sh2a/setup-mxg.c b/arch/sh/kernel/cpu/sh2a/setup-mxg.c
index b67376445315..8f669dc9b0da 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-mxg.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-mxg.c
@@ -207,27 +207,23 @@ static struct platform_device mtu2_2_device = {
207 .num_resources = ARRAY_SIZE(mtu2_2_resources), 207 .num_resources = ARRAY_SIZE(mtu2_2_resources),
208}; 208};
209 209
210static struct plat_sci_port sci_platform_data[] = { 210static struct plat_sci_port scif0_platform_data = {
211 { 211 .mapbase = 0xff804000,
212 .mapbase = 0xff804000, 212 .flags = UPF_BOOT_AUTOCONF,
213 .flags = UPF_BOOT_AUTOCONF, 213 .type = PORT_SCIF,
214 .type = PORT_SCIF, 214 .irqs = { 220, 220, 220, 220 },
215 .irqs = { 220, 220, 220, 220 },
216 }, {
217 .flags = 0,
218 }
219}; 215};
220 216
221static struct platform_device sci_device = { 217static struct platform_device scif0_device = {
222 .name = "sh-sci", 218 .name = "sh-sci",
223 .id = -1, 219 .id = 0,
224 .dev = { 220 .dev = {
225 .platform_data = sci_platform_data, 221 .platform_data = &scif0_platform_data,
226 }, 222 },
227}; 223};
228 224
229static struct platform_device *mxg_devices[] __initdata = { 225static struct platform_device *mxg_devices[] __initdata = {
230 &sci_device, 226 &scif0_device,
231 &mtu2_0_device, 227 &mtu2_0_device,
232 &mtu2_1_device, 228 &mtu2_1_device,
233 &mtu2_2_device, 229 &mtu2_2_device,
@@ -246,6 +242,7 @@ void __init plat_irq_setup(void)
246} 242}
247 243
248static struct platform_device *mxg_early_devices[] __initdata = { 244static struct platform_device *mxg_early_devices[] __initdata = {
245 &scif0_device,
249 &mtu2_0_device, 246 &mtu2_0_device,
250 &mtu2_1_device, 247 &mtu2_1_device,
251 &mtu2_2_device, 248 &mtu2_2_device,
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
index fbde5b75deb9..4ccfeb59eb1a 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
@@ -177,57 +177,123 @@ static struct intc_mask_reg mask_registers[] __initdata = {
177static DECLARE_INTC_DESC(intc_desc, "sh7201", vectors, groups, 177static DECLARE_INTC_DESC(intc_desc, "sh7201", vectors, groups,
178 mask_registers, prio_registers, NULL); 178 mask_registers, prio_registers, NULL);
179 179
180static struct plat_sci_port sci_platform_data[] = { 180static struct plat_sci_port scif0_platform_data = {
181 { 181 .mapbase = 0xfffe8000,
182 .mapbase = 0xfffe8000, 182 .flags = UPF_BOOT_AUTOCONF,
183 .flags = UPF_BOOT_AUTOCONF, 183 .type = PORT_SCIF,
184 .type = PORT_SCIF, 184 .irqs = { 180, 180, 180, 180 }
185 .irqs = { 180, 180, 180, 180 } 185};
186 }, { 186
187 .mapbase = 0xfffe8800, 187static struct platform_device scif0_device = {
188 .flags = UPF_BOOT_AUTOCONF,
189 .type = PORT_SCIF,
190 .irqs = { 184, 184, 184, 184 }
191 }, {
192 .mapbase = 0xfffe9000,
193 .flags = UPF_BOOT_AUTOCONF,
194 .type = PORT_SCIF,
195 .irqs = { 188, 188, 188, 188 }
196 }, {
197 .mapbase = 0xfffe9800,
198 .flags = UPF_BOOT_AUTOCONF,
199 .type = PORT_SCIF,
200 .irqs = { 192, 192, 192, 192 }
201 }, {
202 .mapbase = 0xfffea000,
203 .flags = UPF_BOOT_AUTOCONF,
204 .type = PORT_SCIF,
205 .irqs = { 196, 196, 196, 196 }
206 }, {
207 .mapbase = 0xfffea800,
208 .flags = UPF_BOOT_AUTOCONF,
209 .type = PORT_SCIF,
210 .irqs = { 200, 200, 200, 200 }
211 }, {
212 .mapbase = 0xfffeb000,
213 .flags = UPF_BOOT_AUTOCONF,
214 .type = PORT_SCIF,
215 .irqs = { 204, 204, 204, 204 }
216 }, {
217 .mapbase = 0xfffeb800,
218 .flags = UPF_BOOT_AUTOCONF,
219 .type = PORT_SCIF,
220 .irqs = { 208, 208, 208, 208 }
221 }, {
222 .flags = 0,
223 }
224};
225
226static struct platform_device sci_device = {
227 .name = "sh-sci", 188 .name = "sh-sci",
228 .id = -1, 189 .id = 0,
190 .dev = {
191 .platform_data = &scif0_platform_data,
192 },
193};
194
195static struct plat_sci_port scif1_platform_data = {
196 .mapbase = 0xfffe8800,
197 .flags = UPF_BOOT_AUTOCONF,
198 .type = PORT_SCIF,
199 .irqs = { 184, 184, 184, 184 }
200};
201
202static struct platform_device scif1_device = {
203 .name = "sh-sci",
204 .id = 1,
205 .dev = {
206 .platform_data = &scif1_platform_data,
207 },
208};
209
210static struct plat_sci_port scif2_platform_data = {
211 .mapbase = 0xfffe9000,
212 .flags = UPF_BOOT_AUTOCONF,
213 .type = PORT_SCIF,
214 .irqs = { 188, 188, 188, 188 }
215};
216
217static struct platform_device scif2_device = {
218 .name = "sh-sci",
219 .id = 2,
220 .dev = {
221 .platform_data = &scif2_platform_data,
222 },
223};
224
225static struct plat_sci_port scif3_platform_data = {
226 .mapbase = 0xfffe9800,
227 .flags = UPF_BOOT_AUTOCONF,
228 .type = PORT_SCIF,
229 .irqs = { 192, 192, 192, 192 }
230};
231
232static struct platform_device scif3_device = {
233 .name = "sh-sci",
234 .id = 3,
235 .dev = {
236 .platform_data = &scif3_platform_data,
237 },
238};
239
240static struct plat_sci_port scif4_platform_data = {
241 .mapbase = 0xfffea000,
242 .flags = UPF_BOOT_AUTOCONF,
243 .type = PORT_SCIF,
244 .irqs = { 196, 196, 196, 196 }
245};
246
247static struct platform_device scif4_device = {
248 .name = "sh-sci",
249 .id = 4,
250 .dev = {
251 .platform_data = &scif4_platform_data,
252 },
253};
254
255static struct plat_sci_port scif5_platform_data = {
256 .mapbase = 0xfffea800,
257 .flags = UPF_BOOT_AUTOCONF,
258 .type = PORT_SCIF,
259 .irqs = { 200, 200, 200, 200 }
260};
261
262static struct platform_device scif5_device = {
263 .name = "sh-sci",
264 .id = 5,
265 .dev = {
266 .platform_data = &scif5_platform_data,
267 },
268};
269
270static struct plat_sci_port scif6_platform_data = {
271 .mapbase = 0xfffeb000,
272 .flags = UPF_BOOT_AUTOCONF,
273 .type = PORT_SCIF,
274 .irqs = { 204, 204, 204, 204 }
275};
276
277static struct platform_device scif6_device = {
278 .name = "sh-sci",
279 .id = 6,
280 .dev = {
281 .platform_data = &scif6_platform_data,
282 },
283};
284
285static struct plat_sci_port scif7_platform_data = {
286 .mapbase = 0xfffeb800,
287 .flags = UPF_BOOT_AUTOCONF,
288 .type = PORT_SCIF,
289 .irqs = { 208, 208, 208, 208 }
290};
291
292static struct platform_device scif7_device = {
293 .name = "sh-sci",
294 .id = 7,
229 .dev = { 295 .dev = {
230 .platform_data = sci_platform_data, 296 .platform_data = &scif7_platform_data,
231 }, 297 },
232}; 298};
233 299
@@ -345,7 +411,14 @@ static struct platform_device mtu2_2_device = {
345}; 411};
346 412
347static struct platform_device *sh7201_devices[] __initdata = { 413static struct platform_device *sh7201_devices[] __initdata = {
348 &sci_device, 414 &scif0_device,
415 &scif1_device,
416 &scif2_device,
417 &scif3_device,
418 &scif4_device,
419 &scif5_device,
420 &scif6_device,
421 &scif7_device,
349 &rtc_device, 422 &rtc_device,
350 &mtu2_0_device, 423 &mtu2_0_device,
351 &mtu2_1_device, 424 &mtu2_1_device,
@@ -365,6 +438,14 @@ void __init plat_irq_setup(void)
365} 438}
366 439
367static struct platform_device *sh7201_early_devices[] __initdata = { 440static struct platform_device *sh7201_early_devices[] __initdata = {
441 &scif0_device,
442 &scif1_device,
443 &scif2_device,
444 &scif3_device,
445 &scif4_device,
446 &scif5_device,
447 &scif6_device,
448 &scif7_device,
368 &mtu2_0_device, 449 &mtu2_0_device,
369 &mtu2_1_device, 450 &mtu2_1_device,
370 &mtu2_2_device, 451 &mtu2_2_device,
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
index d3fd536c9a84..3136966cc9b3 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
@@ -173,37 +173,63 @@ static struct intc_mask_reg mask_registers[] __initdata = {
173static DECLARE_INTC_DESC(intc_desc, "sh7203", vectors, groups, 173static DECLARE_INTC_DESC(intc_desc, "sh7203", vectors, groups,
174 mask_registers, prio_registers, NULL); 174 mask_registers, prio_registers, NULL);
175 175
176static struct plat_sci_port sci_platform_data[] = { 176static struct plat_sci_port scif0_platform_data = {
177 { 177 .mapbase = 0xfffe8000,
178 .mapbase = 0xfffe8000, 178 .flags = UPF_BOOT_AUTOCONF,
179 .flags = UPF_BOOT_AUTOCONF, 179 .type = PORT_SCIF,
180 .type = PORT_SCIF, 180 .irqs = { 192, 192, 192, 192 },
181 .irqs = { 192, 192, 192, 192 },
182 }, {
183 .mapbase = 0xfffe8800,
184 .flags = UPF_BOOT_AUTOCONF,
185 .type = PORT_SCIF,
186 .irqs = { 196, 196, 196, 196 },
187 }, {
188 .mapbase = 0xfffe9000,
189 .flags = UPF_BOOT_AUTOCONF,
190 .type = PORT_SCIF,
191 .irqs = { 200, 200, 200, 200 },
192 }, {
193 .mapbase = 0xfffe9800,
194 .flags = UPF_BOOT_AUTOCONF,
195 .type = PORT_SCIF,
196 .irqs = { 204, 204, 204, 204 },
197 }, {
198 .flags = 0,
199 }
200}; 181};
201 182
202static struct platform_device sci_device = { 183static struct platform_device scif0_device = {
203 .name = "sh-sci", 184 .name = "sh-sci",
204 .id = -1, 185 .id = 0,
186 .dev = {
187 .platform_data = &scif0_platform_data,
188 },
189};
190
191static struct plat_sci_port scif1_platform_data = {
192 .mapbase = 0xfffe8800,
193 .flags = UPF_BOOT_AUTOCONF,
194 .type = PORT_SCIF,
195 .irqs = { 196, 196, 196, 196 },
196};
197
198static struct platform_device scif1_device = {
199 .name = "sh-sci",
200 .id = 1,
201 .dev = {
202 .platform_data = &scif1_platform_data,
203 },
204};
205
206static struct plat_sci_port scif2_platform_data = {
207 .mapbase = 0xfffe9000,
208 .flags = UPF_BOOT_AUTOCONF,
209 .type = PORT_SCIF,
210 .irqs = { 200, 200, 200, 200 },
211};
212
213static struct platform_device scif2_device = {
214 .name = "sh-sci",
215 .id = 2,
216 .dev = {
217 .platform_data = &scif2_platform_data,
218 },
219};
220
221static struct plat_sci_port scif3_platform_data = {
222 .mapbase = 0xfffe9800,
223 .flags = UPF_BOOT_AUTOCONF,
224 .type = PORT_SCIF,
225 .irqs = { 204, 204, 204, 204 },
226};
227
228static struct platform_device scif3_device = {
229 .name = "sh-sci",
230 .id = 3,
205 .dev = { 231 .dev = {
206 .platform_data = sci_platform_data, 232 .platform_data = &scif3_platform_data,
207 }, 233 },
208}; 234};
209 235
@@ -354,7 +380,10 @@ static struct platform_device rtc_device = {
354}; 380};
355 381
356static struct platform_device *sh7203_devices[] __initdata = { 382static struct platform_device *sh7203_devices[] __initdata = {
357 &sci_device, 383 &scif0_device,
384 &scif1_device,
385 &scif2_device,
386 &scif3_device,
358 &cmt0_device, 387 &cmt0_device,
359 &cmt1_device, 388 &cmt1_device,
360 &mtu2_0_device, 389 &mtu2_0_device,
@@ -375,6 +404,10 @@ void __init plat_irq_setup(void)
375} 404}
376 405
377static struct platform_device *sh7203_early_devices[] __initdata = { 406static struct platform_device *sh7203_early_devices[] __initdata = {
407 &scif0_device,
408 &scif1_device,
409 &scif2_device,
410 &scif3_device,
378 &cmt0_device, 411 &cmt0_device,
379 &cmt1_device, 412 &cmt1_device,
380 &mtu2_0_device, 413 &mtu2_0_device,
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
index a9ccc5e8d9e9..064873585a8b 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
@@ -133,37 +133,63 @@ static struct intc_mask_reg mask_registers[] __initdata = {
133static DECLARE_INTC_DESC(intc_desc, "sh7206", vectors, groups, 133static DECLARE_INTC_DESC(intc_desc, "sh7206", vectors, groups,
134 mask_registers, prio_registers, NULL); 134 mask_registers, prio_registers, NULL);
135 135
136static struct plat_sci_port sci_platform_data[] = { 136static struct plat_sci_port scif0_platform_data = {
137 { 137 .mapbase = 0xfffe8000,
138 .mapbase = 0xfffe8000, 138 .flags = UPF_BOOT_AUTOCONF,
139 .flags = UPF_BOOT_AUTOCONF, 139 .type = PORT_SCIF,
140 .type = PORT_SCIF, 140 .irqs = { 240, 240, 240, 240 },
141 .irqs = { 240, 240, 240, 240 },
142 }, {
143 .mapbase = 0xfffe8800,
144 .flags = UPF_BOOT_AUTOCONF,
145 .type = PORT_SCIF,
146 .irqs = { 244, 244, 244, 244 },
147 }, {
148 .mapbase = 0xfffe9000,
149 .flags = UPF_BOOT_AUTOCONF,
150 .type = PORT_SCIF,
151 .irqs = { 248, 248, 248, 248 },
152 }, {
153 .mapbase = 0xfffe9800,
154 .flags = UPF_BOOT_AUTOCONF,
155 .type = PORT_SCIF,
156 .irqs = { 252, 252, 252, 252 },
157 }, {
158 .flags = 0,
159 }
160}; 141};
161 142
162static struct platform_device sci_device = { 143static struct platform_device scif0_device = {
163 .name = "sh-sci", 144 .name = "sh-sci",
164 .id = -1, 145 .id = 0,
146 .dev = {
147 .platform_data = &scif0_platform_data,
148 },
149};
150
151static struct plat_sci_port scif1_platform_data = {
152 .mapbase = 0xfffe8800,
153 .flags = UPF_BOOT_AUTOCONF,
154 .type = PORT_SCIF,
155 .irqs = { 244, 244, 244, 244 },
156};
157
158static struct platform_device scif1_device = {
159 .name = "sh-sci",
160 .id = 1,
161 .dev = {
162 .platform_data = &scif1_platform_data,
163 },
164};
165
166static struct plat_sci_port scif2_platform_data = {
167 .mapbase = 0xfffe9000,
168 .flags = UPF_BOOT_AUTOCONF,
169 .type = PORT_SCIF,
170 .irqs = { 248, 248, 248, 248 },
171};
172
173static struct platform_device scif2_device = {
174 .name = "sh-sci",
175 .id = 2,
176 .dev = {
177 .platform_data = &scif2_platform_data,
178 },
179};
180
181static struct plat_sci_port scif3_platform_data = {
182 .mapbase = 0xfffe9800,
183 .flags = UPF_BOOT_AUTOCONF,
184 .type = PORT_SCIF,
185 .irqs = { 252, 252, 252, 252 },
186};
187
188static struct platform_device scif3_device = {
189 .name = "sh-sci",
190 .id = 3,
165 .dev = { 191 .dev = {
166 .platform_data = sci_platform_data, 192 .platform_data = &scif3_platform_data,
167 }, 193 },
168}; 194};
169 195
@@ -325,7 +351,10 @@ static struct platform_device mtu2_2_device = {
325}; 351};
326 352
327static struct platform_device *sh7206_devices[] __initdata = { 353static struct platform_device *sh7206_devices[] __initdata = {
328 &sci_device, 354 &scif0_device,
355 &scif1_device,
356 &scif2_device,
357 &scif3_device,
329 &cmt0_device, 358 &cmt0_device,
330 &cmt1_device, 359 &cmt1_device,
331 &mtu2_0_device, 360 &mtu2_0_device,
@@ -346,6 +375,10 @@ void __init plat_irq_setup(void)
346} 375}
347 376
348static struct platform_device *sh7206_early_devices[] __initdata = { 377static struct platform_device *sh7206_early_devices[] __initdata = {
378 &scif0_device,
379 &scif1_device,
380 &scif2_device,
381 &scif3_device,
349 &cmt0_device, 382 &cmt0_device,
350 &cmt1_device, 383 &cmt1_device,
351 &mtu2_0_device, 384 &mtu2_0_device,
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh3.c b/arch/sh/kernel/cpu/sh3/clock-sh3.c
index 27b8738f0b09..b78384afac09 100644
--- a/arch/sh/kernel/cpu/sh3/clock-sh3.c
+++ b/arch/sh/kernel/cpu/sh3/clock-sh3.c
@@ -28,7 +28,7 @@ static int pfc_divisors[] = { 1, 2, 3, 4, 6, 1, 1, 1 };
28 28
29static void master_clk_init(struct clk *clk) 29static void master_clk_init(struct clk *clk)
30{ 30{
31 int frqcr = ctrl_inw(FRQCR); 31 int frqcr = __raw_readw(FRQCR);
32 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); 32 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
33 33
34 clk->rate *= pfc_divisors[idx]; 34 clk->rate *= pfc_divisors[idx];
@@ -40,7 +40,7 @@ static struct clk_ops sh3_master_clk_ops = {
40 40
41static unsigned long module_clk_recalc(struct clk *clk) 41static unsigned long module_clk_recalc(struct clk *clk)
42{ 42{
43 int frqcr = ctrl_inw(FRQCR); 43 int frqcr = __raw_readw(FRQCR);
44 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); 44 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
45 45
46 return clk->parent->rate / pfc_divisors[idx]; 46 return clk->parent->rate / pfc_divisors[idx];
@@ -52,7 +52,7 @@ static struct clk_ops sh3_module_clk_ops = {
52 52
53static unsigned long bus_clk_recalc(struct clk *clk) 53static unsigned long bus_clk_recalc(struct clk *clk)
54{ 54{
55 int frqcr = ctrl_inw(FRQCR); 55 int frqcr = __raw_readw(FRQCR);
56 int idx = ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4); 56 int idx = ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4);
57 57
58 return clk->parent->rate / stc_multipliers[idx]; 58 return clk->parent->rate / stc_multipliers[idx];
@@ -64,7 +64,7 @@ static struct clk_ops sh3_bus_clk_ops = {
64 64
65static unsigned long cpu_clk_recalc(struct clk *clk) 65static unsigned long cpu_clk_recalc(struct clk *clk)
66{ 66{
67 int frqcr = ctrl_inw(FRQCR); 67 int frqcr = __raw_readw(FRQCR);
68 int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2); 68 int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2);
69 69
70 return clk->parent->rate / ifc_divisors[idx]; 70 return clk->parent->rate / ifc_divisors[idx];
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7705.c b/arch/sh/kernel/cpu/sh3/clock-sh7705.c
index 0ca8f2c3646c..0ecea1451c6f 100644
--- a/arch/sh/kernel/cpu/sh3/clock-sh7705.c
+++ b/arch/sh/kernel/cpu/sh3/clock-sh7705.c
@@ -32,7 +32,7 @@ static int pfc_divisors[] = { 1, 2, 3, 4, 6, 1, 1, 1 };
32 32
33static void master_clk_init(struct clk *clk) 33static void master_clk_init(struct clk *clk)
34{ 34{
35 clk->rate *= pfc_divisors[ctrl_inw(FRQCR) & 0x0003]; 35 clk->rate *= pfc_divisors[__raw_readw(FRQCR) & 0x0003];
36} 36}
37 37
38static struct clk_ops sh7705_master_clk_ops = { 38static struct clk_ops sh7705_master_clk_ops = {
@@ -41,7 +41,7 @@ static struct clk_ops sh7705_master_clk_ops = {
41 41
42static unsigned long module_clk_recalc(struct clk *clk) 42static unsigned long module_clk_recalc(struct clk *clk)
43{ 43{
44 int idx = ctrl_inw(FRQCR) & 0x0003; 44 int idx = __raw_readw(FRQCR) & 0x0003;
45 return clk->parent->rate / pfc_divisors[idx]; 45 return clk->parent->rate / pfc_divisors[idx];
46} 46}
47 47
@@ -51,7 +51,7 @@ static struct clk_ops sh7705_module_clk_ops = {
51 51
52static unsigned long bus_clk_recalc(struct clk *clk) 52static unsigned long bus_clk_recalc(struct clk *clk)
53{ 53{
54 int idx = (ctrl_inw(FRQCR) & 0x0300) >> 8; 54 int idx = (__raw_readw(FRQCR) & 0x0300) >> 8;
55 return clk->parent->rate / stc_multipliers[idx]; 55 return clk->parent->rate / stc_multipliers[idx];
56} 56}
57 57
@@ -61,7 +61,7 @@ static struct clk_ops sh7705_bus_clk_ops = {
61 61
62static unsigned long cpu_clk_recalc(struct clk *clk) 62static unsigned long cpu_clk_recalc(struct clk *clk)
63{ 63{
64 int idx = (ctrl_inw(FRQCR) & 0x0030) >> 4; 64 int idx = (__raw_readw(FRQCR) & 0x0030) >> 4;
65 return clk->parent->rate / ifc_divisors[idx]; 65 return clk->parent->rate / ifc_divisors[idx];
66} 66}
67 67
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7706.c b/arch/sh/kernel/cpu/sh3/clock-sh7706.c
index 4bf7887d310a..6f9ff8b57dd6 100644
--- a/arch/sh/kernel/cpu/sh3/clock-sh7706.c
+++ b/arch/sh/kernel/cpu/sh3/clock-sh7706.c
@@ -24,7 +24,7 @@ static int pfc_divisors[] = { 1, 2, 4, 1, 3, 6, 1, 1 };
24 24
25static void master_clk_init(struct clk *clk) 25static void master_clk_init(struct clk *clk)
26{ 26{
27 int frqcr = ctrl_inw(FRQCR); 27 int frqcr = __raw_readw(FRQCR);
28 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); 28 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
29 29
30 clk->rate *= pfc_divisors[idx]; 30 clk->rate *= pfc_divisors[idx];
@@ -36,7 +36,7 @@ static struct clk_ops sh7706_master_clk_ops = {
36 36
37static unsigned long module_clk_recalc(struct clk *clk) 37static unsigned long module_clk_recalc(struct clk *clk)
38{ 38{
39 int frqcr = ctrl_inw(FRQCR); 39 int frqcr = __raw_readw(FRQCR);
40 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); 40 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
41 41
42 return clk->parent->rate / pfc_divisors[idx]; 42 return clk->parent->rate / pfc_divisors[idx];
@@ -48,7 +48,7 @@ static struct clk_ops sh7706_module_clk_ops = {
48 48
49static unsigned long bus_clk_recalc(struct clk *clk) 49static unsigned long bus_clk_recalc(struct clk *clk)
50{ 50{
51 int frqcr = ctrl_inw(FRQCR); 51 int frqcr = __raw_readw(FRQCR);
52 int idx = ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4); 52 int idx = ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4);
53 53
54 return clk->parent->rate / stc_multipliers[idx]; 54 return clk->parent->rate / stc_multipliers[idx];
@@ -60,7 +60,7 @@ static struct clk_ops sh7706_bus_clk_ops = {
60 60
61static unsigned long cpu_clk_recalc(struct clk *clk) 61static unsigned long cpu_clk_recalc(struct clk *clk)
62{ 62{
63 int frqcr = ctrl_inw(FRQCR); 63 int frqcr = __raw_readw(FRQCR);
64 int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2); 64 int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2);
65 65
66 return clk->parent->rate / ifc_divisors[idx]; 66 return clk->parent->rate / ifc_divisors[idx];
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7709.c b/arch/sh/kernel/cpu/sh3/clock-sh7709.c
index e8749505bd2a..f302ba09e681 100644
--- a/arch/sh/kernel/cpu/sh3/clock-sh7709.c
+++ b/arch/sh/kernel/cpu/sh3/clock-sh7709.c
@@ -24,7 +24,7 @@ static int pfc_divisors[] = { 1, 2, 4, 1, 3, 6, 1, 1 };
24 24
25static void master_clk_init(struct clk *clk) 25static void master_clk_init(struct clk *clk)
26{ 26{
27 int frqcr = ctrl_inw(FRQCR); 27 int frqcr = __raw_readw(FRQCR);
28 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); 28 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
29 29
30 clk->rate *= pfc_divisors[idx]; 30 clk->rate *= pfc_divisors[idx];
@@ -36,7 +36,7 @@ static struct clk_ops sh7709_master_clk_ops = {
36 36
37static unsigned long module_clk_recalc(struct clk *clk) 37static unsigned long module_clk_recalc(struct clk *clk)
38{ 38{
39 int frqcr = ctrl_inw(FRQCR); 39 int frqcr = __raw_readw(FRQCR);
40 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); 40 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
41 41
42 return clk->parent->rate / pfc_divisors[idx]; 42 return clk->parent->rate / pfc_divisors[idx];
@@ -48,7 +48,7 @@ static struct clk_ops sh7709_module_clk_ops = {
48 48
49static unsigned long bus_clk_recalc(struct clk *clk) 49static unsigned long bus_clk_recalc(struct clk *clk)
50{ 50{
51 int frqcr = ctrl_inw(FRQCR); 51 int frqcr = __raw_readw(FRQCR);
52 int idx = (frqcr & 0x0080) ? 52 int idx = (frqcr & 0x0080) ?
53 ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4) : 1; 53 ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4) : 1;
54 54
@@ -61,7 +61,7 @@ static struct clk_ops sh7709_bus_clk_ops = {
61 61
62static unsigned long cpu_clk_recalc(struct clk *clk) 62static unsigned long cpu_clk_recalc(struct clk *clk)
63{ 63{
64 int frqcr = ctrl_inw(FRQCR); 64 int frqcr = __raw_readw(FRQCR);
65 int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2); 65 int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2);
66 66
67 return clk->parent->rate / ifc_divisors[idx]; 67 return clk->parent->rate / ifc_divisors[idx];
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7710.c b/arch/sh/kernel/cpu/sh3/clock-sh7710.c
index 030a58ba18a5..29a87d8946a4 100644
--- a/arch/sh/kernel/cpu/sh3/clock-sh7710.c
+++ b/arch/sh/kernel/cpu/sh3/clock-sh7710.c
@@ -26,7 +26,7 @@ static int md_table[] = { 1, 2, 3, 4, 6, 8, 12 };
26 26
27static void master_clk_init(struct clk *clk) 27static void master_clk_init(struct clk *clk)
28{ 28{
29 clk->rate *= md_table[ctrl_inw(FRQCR) & 0x0007]; 29 clk->rate *= md_table[__raw_readw(FRQCR) & 0x0007];
30} 30}
31 31
32static struct clk_ops sh7710_master_clk_ops = { 32static struct clk_ops sh7710_master_clk_ops = {
@@ -35,7 +35,7 @@ static struct clk_ops sh7710_master_clk_ops = {
35 35
36static unsigned long module_clk_recalc(struct clk *clk) 36static unsigned long module_clk_recalc(struct clk *clk)
37{ 37{
38 int idx = (ctrl_inw(FRQCR) & 0x0007); 38 int idx = (__raw_readw(FRQCR) & 0x0007);
39 return clk->parent->rate / md_table[idx]; 39 return clk->parent->rate / md_table[idx];
40} 40}
41 41
@@ -45,7 +45,7 @@ static struct clk_ops sh7710_module_clk_ops = {
45 45
46static unsigned long bus_clk_recalc(struct clk *clk) 46static unsigned long bus_clk_recalc(struct clk *clk)
47{ 47{
48 int idx = (ctrl_inw(FRQCR) & 0x0700) >> 8; 48 int idx = (__raw_readw(FRQCR) & 0x0700) >> 8;
49 return clk->parent->rate / md_table[idx]; 49 return clk->parent->rate / md_table[idx];
50} 50}
51 51
@@ -55,7 +55,7 @@ static struct clk_ops sh7710_bus_clk_ops = {
55 55
56static unsigned long cpu_clk_recalc(struct clk *clk) 56static unsigned long cpu_clk_recalc(struct clk *clk)
57{ 57{
58 int idx = (ctrl_inw(FRQCR) & 0x0070) >> 4; 58 int idx = (__raw_readw(FRQCR) & 0x0070) >> 4;
59 return clk->parent->rate / md_table[idx]; 59 return clk->parent->rate / md_table[idx];
60} 60}
61 61
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7712.c b/arch/sh/kernel/cpu/sh3/clock-sh7712.c
index 6428ee6c77ed..b0d0c5203996 100644
--- a/arch/sh/kernel/cpu/sh3/clock-sh7712.c
+++ b/arch/sh/kernel/cpu/sh3/clock-sh7712.c
@@ -23,7 +23,7 @@ static int divisors[] = { 1, 2, 3, 4, 6 };
23 23
24static void master_clk_init(struct clk *clk) 24static void master_clk_init(struct clk *clk)
25{ 25{
26 int frqcr = ctrl_inw(FRQCR); 26 int frqcr = __raw_readw(FRQCR);
27 int idx = (frqcr & 0x0300) >> 8; 27 int idx = (frqcr & 0x0300) >> 8;
28 28
29 clk->rate *= multipliers[idx]; 29 clk->rate *= multipliers[idx];
@@ -35,7 +35,7 @@ static struct clk_ops sh7712_master_clk_ops = {
35 35
36static unsigned long module_clk_recalc(struct clk *clk) 36static unsigned long module_clk_recalc(struct clk *clk)
37{ 37{
38 int frqcr = ctrl_inw(FRQCR); 38 int frqcr = __raw_readw(FRQCR);
39 int idx = frqcr & 0x0007; 39 int idx = frqcr & 0x0007;
40 40
41 return clk->parent->rate / divisors[idx]; 41 return clk->parent->rate / divisors[idx];
@@ -47,7 +47,7 @@ static struct clk_ops sh7712_module_clk_ops = {
47 47
48static unsigned long cpu_clk_recalc(struct clk *clk) 48static unsigned long cpu_clk_recalc(struct clk *clk)
49{ 49{
50 int frqcr = ctrl_inw(FRQCR); 50 int frqcr = __raw_readw(FRQCR);
51 int idx = (frqcr & 0x0030) >> 4; 51 int idx = (frqcr & 0x0030) >> 4;
52 52
53 return clk->parent->rate / divisors[idx]; 53 return clk->parent->rate / divisors[idx];
diff --git a/arch/sh/kernel/cpu/sh3/entry.S b/arch/sh/kernel/cpu/sh3/entry.S
index bb407ef0b91e..f6a389c996cb 100644
--- a/arch/sh/kernel/cpu/sh3/entry.S
+++ b/arch/sh/kernel/cpu/sh3/entry.S
@@ -132,7 +132,6 @@ ENTRY(tlb_protection_violation_store)
132 mov #1, r5 132 mov #1, r5
133 133
134call_handle_tlbmiss: 134call_handle_tlbmiss:
135 setup_frame_reg
136 mov.l 1f, r0 135 mov.l 1f, r0
137 mov r5, r8 136 mov r5, r8
138 mov.l @r0, r6 137 mov.l @r0, r6
@@ -297,41 +296,8 @@ ENTRY(vbr_base)
297! 296!
298 .balign 256,0,256 297 .balign 256,0,256
299general_exception: 298general_exception:
300#ifndef CONFIG_CPU_SUBTYPE_SHX3
301 bra handle_exception 299 bra handle_exception
302 sts pr, k3 ! save original pr value in k3 300 sts pr, k3 ! save original pr value in k3
303#else
304 mov.l 1f, k4
305 mov.l @k4, k4
306
307 ! Is EXPEVT larger than 0x800?
308 mov #0x8, k0
309 shll8 k0
310 cmp/hs k0, k4
311 bf 0f
312
313 ! then add 0x580 (k2 is 0xd80 or 0xda0)
314 mov #0x58, k0
315 shll2 k0
316 shll2 k0
317 add k0, k4
3180:
319 ! Setup stack and save DSP context (k0 contains original r15 on return)
320 bsr prepare_stack
321 nop
322
323 ! Save registers / Switch to bank 0
324 mov k4, k2 ! keep vector in k2
325 mov.l 1f, k4 ! SR bits to clear in k4
326 bsr save_regs ! needs original pr value in k3
327 nop
328
329 bra handle_exception_special
330 nop
331
332 .align 2
3331: .long EXPEVT
334#endif
335 301
336! prepare_stack() 302! prepare_stack()
337! - roll back gRB 303! - roll back gRB
@@ -398,6 +364,8 @@ handle_exception:
398 mov.l @k2, k2 ! read out vector and keep in k2 364 mov.l @k2, k2 ! read out vector and keep in k2
399 365
400handle_exception_special: 366handle_exception_special:
367 setup_frame_reg
368
401 ! Setup return address and jump to exception handler 369 ! Setup return address and jump to exception handler
402 mov.l 7f, r9 ! fetch return address 370 mov.l 7f, r9 ! fetch return address
403 stc r2_bank, r0 ! k2 (vector) 371 stc r2_bank, r0 ! k2 (vector)
diff --git a/arch/sh/kernel/cpu/sh3/ex.S b/arch/sh/kernel/cpu/sh3/ex.S
index 46610c35c232..99b4d020179a 100644
--- a/arch/sh/kernel/cpu/sh3/ex.S
+++ b/arch/sh/kernel/cpu/sh3/ex.S
@@ -49,7 +49,7 @@ ENTRY(exception_handling_table)
49 .long exception_error ! reserved_instruction (filled by trap_init) /* 180 */ 49 .long exception_error ! reserved_instruction (filled by trap_init) /* 180 */
50 .long exception_error ! illegal_slot_instruction (filled by trap_init) /*1A0*/ 50 .long exception_error ! illegal_slot_instruction (filled by trap_init) /*1A0*/
51 .long nmi_trap_handler /* 1C0 */ ! Allow trap to debugger 51 .long nmi_trap_handler /* 1C0 */ ! Allow trap to debugger
52 .long break_point_trap /* 1E0 */ 52 .long breakpoint_trap_handler /* 1E0 */
53 53
54 /* 54 /*
55 * Pad the remainder of the table out, exceptions residing in far 55 * Pad the remainder of the table out, exceptions residing in far
diff --git a/arch/sh/kernel/cpu/sh3/probe.c b/arch/sh/kernel/cpu/sh3/probe.c
index f9c7df64eb01..295ec4c99e98 100644
--- a/arch/sh/kernel/cpu/sh3/probe.c
+++ b/arch/sh/kernel/cpu/sh3/probe.c
@@ -16,7 +16,7 @@
16#include <asm/cache.h> 16#include <asm/cache.h>
17#include <asm/io.h> 17#include <asm/io.h>
18 18
19int __uses_jump_to_uncached detect_cpu_and_cache_system(void) 19int detect_cpu_and_cache_system(void)
20{ 20{
21 unsigned long addr0, addr1, data0, data1, data2, data3; 21 unsigned long addr0, addr1, data0, data1, data2, data3;
22 22
@@ -30,23 +30,23 @@ int __uses_jump_to_uncached detect_cpu_and_cache_system(void)
30 addr1 = CACHE_OC_ADDRESS_ARRAY + (1 << 12); 30 addr1 = CACHE_OC_ADDRESS_ARRAY + (1 << 12);
31 31
32 /* First, write back & invalidate */ 32 /* First, write back & invalidate */
33 data0 = ctrl_inl(addr0); 33 data0 = __raw_readl(addr0);
34 ctrl_outl(data0&~(SH_CACHE_VALID|SH_CACHE_UPDATED), addr0); 34 __raw_writel(data0&~(SH_CACHE_VALID|SH_CACHE_UPDATED), addr0);
35 data1 = ctrl_inl(addr1); 35 data1 = __raw_readl(addr1);
36 ctrl_outl(data1&~(SH_CACHE_VALID|SH_CACHE_UPDATED), addr1); 36 __raw_writel(data1&~(SH_CACHE_VALID|SH_CACHE_UPDATED), addr1);
37 37
38 /* Next, check if there's shadow or not */ 38 /* Next, check if there's shadow or not */
39 data0 = ctrl_inl(addr0); 39 data0 = __raw_readl(addr0);
40 data0 ^= SH_CACHE_VALID; 40 data0 ^= SH_CACHE_VALID;
41 ctrl_outl(data0, addr0); 41 __raw_writel(data0, addr0);
42 data1 = ctrl_inl(addr1); 42 data1 = __raw_readl(addr1);
43 data2 = data1 ^ SH_CACHE_VALID; 43 data2 = data1 ^ SH_CACHE_VALID;
44 ctrl_outl(data2, addr1); 44 __raw_writel(data2, addr1);
45 data3 = ctrl_inl(addr0); 45 data3 = __raw_readl(addr0);
46 46
47 /* Lastly, invaliate them. */ 47 /* Lastly, invaliate them. */
48 ctrl_outl(data0&~SH_CACHE_VALID, addr0); 48 __raw_writel(data0&~SH_CACHE_VALID, addr0);
49 ctrl_outl(data2&~SH_CACHE_VALID, addr1); 49 __raw_writel(data2&~SH_CACHE_VALID, addr1);
50 50
51 back_to_cached(); 51 back_to_cached();
52 52
@@ -94,9 +94,9 @@ int __uses_jump_to_uncached detect_cpu_and_cache_system(void)
94 boot_cpu_data.dcache.way_incr = (1 << 13); 94 boot_cpu_data.dcache.way_incr = (1 << 13);
95 boot_cpu_data.dcache.entry_mask = 0x1ff0; 95 boot_cpu_data.dcache.entry_mask = 0x1ff0;
96 boot_cpu_data.dcache.sets = 512; 96 boot_cpu_data.dcache.sets = 512;
97 ctrl_outl(CCR_CACHE_32KB, CCR3_REG); 97 __raw_writel(CCR_CACHE_32KB, CCR3_REG);
98#else 98#else
99 ctrl_outl(CCR_CACHE_16KB, CCR3_REG); 99 __raw_writel(CCR_CACHE_16KB, CCR3_REG);
100#endif 100#endif
101#endif 101#endif
102 } 102 }
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh3.c b/arch/sh/kernel/cpu/sh3/setup-sh3.c
index c98846857855..53be70b98116 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh3.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh3.c
@@ -58,7 +58,7 @@ static DECLARE_INTC_DESC_ACK(intc_desc_irq45, "sh3-irq45",
58void __init plat_irq_setup_pins(int mode) 58void __init plat_irq_setup_pins(int mode)
59{ 59{
60 if (mode == IRQ_MODE_IRQ) { 60 if (mode == IRQ_MODE_IRQ) {
61 ctrl_outw(ctrl_inw(INTC_ICR1) & ~INTC_ICR1_IRQLVL, INTC_ICR1); 61 __raw_writew(__raw_readw(INTC_ICR1) & ~INTC_ICR1_IRQLVL, INTC_ICR1);
62 register_intc_controller(&intc_desc_irq0123); 62 register_intc_controller(&intc_desc_irq0123);
63 return; 63 return;
64 } 64 }
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7705.c b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
index c23105983878..7b892d60e3a0 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7705.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
@@ -67,27 +67,33 @@ static struct intc_prio_reg prio_registers[] __initdata = {
67static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, NULL, 67static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, NULL,
68 NULL, prio_registers, NULL); 68 NULL, prio_registers, NULL);
69 69
70static struct plat_sci_port sci_platform_data[] = { 70static struct plat_sci_port scif0_platform_data = {
71 { 71 .mapbase = 0xa4410000,
72 .mapbase = 0xa4410000, 72 .flags = UPF_BOOT_AUTOCONF,
73 .flags = UPF_BOOT_AUTOCONF, 73 .type = PORT_SCIF,
74 .type = PORT_SCIF, 74 .irqs = { 56, 56, 56 },
75 .irqs = { 56, 56, 56 }, 75};
76 }, { 76
77 .mapbase = 0xa4400000, 77static struct platform_device scif0_device = {
78 .flags = UPF_BOOT_AUTOCONF,
79 .type = PORT_SCIF,
80 .irqs = { 52, 52, 52 },
81 }, {
82 .flags = 0,
83 }
84};
85
86static struct platform_device sci_device = {
87 .name = "sh-sci", 78 .name = "sh-sci",
88 .id = -1, 79 .id = 0,
80 .dev = {
81 .platform_data = &scif0_platform_data,
82 },
83};
84
85static struct plat_sci_port scif1_platform_data = {
86 .mapbase = 0xa4400000,
87 .flags = UPF_BOOT_AUTOCONF,
88 .type = PORT_SCIF,
89 .irqs = { 52, 52, 52 },
90};
91
92static struct platform_device scif1_device = {
93 .name = "sh-sci",
94 .id = 1,
89 .dev = { 95 .dev = {
90 .platform_data = sci_platform_data, 96 .platform_data = &scif1_platform_data,
91 }, 97 },
92}; 98};
93 99
@@ -210,10 +216,11 @@ static struct platform_device tmu2_device = {
210}; 216};
211 217
212static struct platform_device *sh7705_devices[] __initdata = { 218static struct platform_device *sh7705_devices[] __initdata = {
219 &scif0_device,
220 &scif1_device,
213 &tmu0_device, 221 &tmu0_device,
214 &tmu1_device, 222 &tmu1_device,
215 &tmu2_device, 223 &tmu2_device,
216 &sci_device,
217 &rtc_device, 224 &rtc_device,
218}; 225};
219 226
@@ -225,6 +232,8 @@ static int __init sh7705_devices_setup(void)
225arch_initcall(sh7705_devices_setup); 232arch_initcall(sh7705_devices_setup);
226 233
227static struct platform_device *sh7705_early_devices[] __initdata = { 234static struct platform_device *sh7705_early_devices[] __initdata = {
235 &scif0_device,
236 &scif1_device,
228 &tmu0_device, 237 &tmu0_device,
229 &tmu1_device, 238 &tmu1_device,
230 &tmu2_device, 239 &tmu2_device,
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh770x.c b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
index 347ab35d0697..bc0c4f68c7c7 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh770x.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
@@ -106,44 +106,55 @@ static struct platform_device rtc_device = {
106 .resource = rtc_resources, 106 .resource = rtc_resources,
107}; 107};
108 108
109static struct plat_sci_port sci_platform_data[] = { 109static struct plat_sci_port scif0_platform_data = {
110 { 110 .mapbase = 0xfffffe80,
111 .mapbase = 0xfffffe80, 111 .flags = UPF_BOOT_AUTOCONF,
112 .flags = UPF_BOOT_AUTOCONF, 112 .type = PORT_SCI,
113 .type = PORT_SCI, 113 .irqs = { 23, 23, 23, 0 },
114 .irqs = { 23, 23, 23, 0 }, 114};
115
116static struct platform_device scif0_device = {
117 .name = "sh-sci",
118 .id = 0,
119 .dev = {
120 .platform_data = &scif0_platform_data,
115 }, 121 },
122};
116#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \ 123#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
117 defined(CONFIG_CPU_SUBTYPE_SH7707) || \ 124 defined(CONFIG_CPU_SUBTYPE_SH7707) || \
118 defined(CONFIG_CPU_SUBTYPE_SH7709) 125 defined(CONFIG_CPU_SUBTYPE_SH7709)
119 { 126static struct plat_sci_port scif1_platform_data = {
120 .mapbase = 0xa4000150, 127 .mapbase = 0xa4000150,
121 .flags = UPF_BOOT_AUTOCONF, 128 .flags = UPF_BOOT_AUTOCONF,
122 .type = PORT_SCIF, 129 .type = PORT_SCIF,
123 .irqs = { 56, 56, 56, 56 }, 130 .irqs = { 56, 56, 56, 56 },
131};
132
133static struct platform_device scif1_device = {
134 .name = "sh-sci",
135 .id = 1,
136 .dev = {
137 .platform_data = &scif1_platform_data,
124 }, 138 },
139};
125#endif 140#endif
126#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \ 141#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
127 defined(CONFIG_CPU_SUBTYPE_SH7709) 142 defined(CONFIG_CPU_SUBTYPE_SH7709)
128 { 143static struct plat_sci_port scif2_platform_data = {
129 .mapbase = 0xa4000140, 144 .mapbase = 0xa4000140,
130 .flags = UPF_BOOT_AUTOCONF, 145 .flags = UPF_BOOT_AUTOCONF,
131 .type = PORT_IRDA, 146 .type = PORT_IRDA,
132 .irqs = { 52, 52, 52, 52 }, 147 .irqs = { 52, 52, 52, 52 },
133 },
134#endif
135 {
136 .flags = 0,
137 }
138}; 148};
139 149
140static struct platform_device sci_device = { 150static struct platform_device scif2_device = {
141 .name = "sh-sci", 151 .name = "sh-sci",
142 .id = -1, 152 .id = 2,
143 .dev = { 153 .dev = {
144 .platform_data = sci_platform_data, 154 .platform_data = &scif2_platform_data,
145 }, 155 },
146}; 156};
157#endif
147 158
148static struct sh_timer_config tmu0_platform_data = { 159static struct sh_timer_config tmu0_platform_data = {
149 .name = "TMU0", 160 .name = "TMU0",
@@ -238,10 +249,19 @@ static struct platform_device tmu2_device = {
238}; 249};
239 250
240static struct platform_device *sh770x_devices[] __initdata = { 251static struct platform_device *sh770x_devices[] __initdata = {
252 &scif0_device,
253#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
254 defined(CONFIG_CPU_SUBTYPE_SH7707) || \
255 defined(CONFIG_CPU_SUBTYPE_SH7709)
256 &scif1_device,
257#endif
258#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
259 defined(CONFIG_CPU_SUBTYPE_SH7709)
260 &scif2_device,
261#endif
241 &tmu0_device, 262 &tmu0_device,
242 &tmu1_device, 263 &tmu1_device,
243 &tmu2_device, 264 &tmu2_device,
244 &sci_device,
245 &rtc_device, 265 &rtc_device,
246}; 266};
247 267
@@ -253,6 +273,16 @@ static int __init sh770x_devices_setup(void)
253arch_initcall(sh770x_devices_setup); 273arch_initcall(sh770x_devices_setup);
254 274
255static struct platform_device *sh770x_early_devices[] __initdata = { 275static struct platform_device *sh770x_early_devices[] __initdata = {
276 &scif0_device,
277#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
278 defined(CONFIG_CPU_SUBTYPE_SH7707) || \
279 defined(CONFIG_CPU_SUBTYPE_SH7709)
280 &scif1_device,
281#endif
282#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
283 defined(CONFIG_CPU_SUBTYPE_SH7709)
284 &scif2_device,
285#endif
256 &tmu0_device, 286 &tmu0_device,
257 &tmu1_device, 287 &tmu1_device,
258 &tmu2_device, 288 &tmu2_device,
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7710.c b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
index 717e90ae1097..0845a3ad006d 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7710.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
@@ -96,28 +96,33 @@ static struct platform_device rtc_device = {
96 }, 96 },
97}; 97};
98 98
99static struct plat_sci_port sci_platform_data[] = { 99static struct plat_sci_port scif0_platform_data = {
100 { 100 .mapbase = 0xa4400000,
101 .mapbase = 0xa4400000, 101 .flags = UPF_BOOT_AUTOCONF,
102 .flags = UPF_BOOT_AUTOCONF, 102 .type = PORT_SCIF,
103 .type = PORT_SCIF, 103 .irqs = { 52, 52, 52, 52 },
104 .irqs = { 52, 52, 52, 52 }, 104};
105 }, { 105
106 .mapbase = 0xa4410000, 106static struct platform_device scif0_device = {
107 .flags = UPF_BOOT_AUTOCONF,
108 .type = PORT_SCIF,
109 .irqs = { 56, 56, 56, 56 },
110 }, {
111
112 .flags = 0,
113 }
114};
115
116static struct platform_device sci_device = {
117 .name = "sh-sci", 107 .name = "sh-sci",
118 .id = -1, 108 .id = 0,
109 .dev = {
110 .platform_data = &scif0_platform_data,
111 },
112};
113
114static struct plat_sci_port scif1_platform_data = {
115 .mapbase = 0xa4410000,
116 .flags = UPF_BOOT_AUTOCONF,
117 .type = PORT_SCIF,
118 .irqs = { 56, 56, 56, 56 },
119};
120
121static struct platform_device scif1_device = {
122 .name = "sh-sci",
123 .id = 1,
119 .dev = { 124 .dev = {
120 .platform_data = sci_platform_data, 125 .platform_data = &scif1_platform_data,
121 }, 126 },
122}; 127};
123 128
@@ -214,10 +219,11 @@ static struct platform_device tmu2_device = {
214}; 219};
215 220
216static struct platform_device *sh7710_devices[] __initdata = { 221static struct platform_device *sh7710_devices[] __initdata = {
222 &scif0_device,
223 &scif1_device,
217 &tmu0_device, 224 &tmu0_device,
218 &tmu1_device, 225 &tmu1_device,
219 &tmu2_device, 226 &tmu2_device,
220 &sci_device,
221 &rtc_device, 227 &rtc_device,
222}; 228};
223 229
@@ -229,6 +235,8 @@ static int __init sh7710_devices_setup(void)
229arch_initcall(sh7710_devices_setup); 235arch_initcall(sh7710_devices_setup);
230 236
231static struct platform_device *sh7710_early_devices[] __initdata = { 237static struct platform_device *sh7710_early_devices[] __initdata = {
238 &scif0_device,
239 &scif1_device,
232 &tmu0_device, 240 &tmu0_device,
233 &tmu1_device, 241 &tmu1_device,
234 &tmu2_device, 242 &tmu2_device,
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7720.c b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
index 74d8baaf8e96..a718a6231091 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7720.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
@@ -48,28 +48,33 @@ static struct platform_device rtc_device = {
48 }, 48 },
49}; 49};
50 50
51static struct plat_sci_port sci_platform_data[] = { 51static struct plat_sci_port scif0_platform_data = {
52 { 52 .mapbase = 0xa4430000,
53 .mapbase = 0xa4430000, 53 .flags = UPF_BOOT_AUTOCONF,
54 .flags = UPF_BOOT_AUTOCONF, 54 .type = PORT_SCIF,
55 .type = PORT_SCIF, 55 .irqs = { 80, 80, 80, 80 },
56 .irqs = { 80, 80, 80, 80 }, 56};
57 }, { 57
58 .mapbase = 0xa4438000, 58static struct platform_device scif0_device = {
59 .flags = UPF_BOOT_AUTOCONF,
60 .type = PORT_SCIF,
61 .irqs = { 81, 81, 81, 81 },
62 }, {
63
64 .flags = 0,
65 }
66};
67
68static struct platform_device sci_device = {
69 .name = "sh-sci", 59 .name = "sh-sci",
70 .id = -1, 60 .id = 0,
61 .dev = {
62 .platform_data = &scif0_platform_data,
63 },
64};
65
66static struct plat_sci_port scif1_platform_data = {
67 .mapbase = 0xa4438000,
68 .flags = UPF_BOOT_AUTOCONF,
69 .type = PORT_SCIF,
70 .irqs = { 81, 81, 81, 81 },
71};
72
73static struct platform_device scif1_device = {
74 .name = "sh-sci",
75 .id = 1,
71 .dev = { 76 .dev = {
72 .platform_data = sci_platform_data, 77 .platform_data = &scif1_platform_data,
73 }, 78 },
74}; 79};
75 80
@@ -369,6 +374,8 @@ static struct platform_device tmu2_device = {
369}; 374};
370 375
371static struct platform_device *sh7720_devices[] __initdata = { 376static struct platform_device *sh7720_devices[] __initdata = {
377 &scif0_device,
378 &scif1_device,
372 &cmt0_device, 379 &cmt0_device,
373 &cmt1_device, 380 &cmt1_device,
374 &cmt2_device, 381 &cmt2_device,
@@ -378,7 +385,6 @@ static struct platform_device *sh7720_devices[] __initdata = {
378 &tmu1_device, 385 &tmu1_device,
379 &tmu2_device, 386 &tmu2_device,
380 &rtc_device, 387 &rtc_device,
381 &sci_device,
382 &usb_ohci_device, 388 &usb_ohci_device,
383 &usbf_device, 389 &usbf_device,
384}; 390};
@@ -391,6 +397,8 @@ static int __init sh7720_devices_setup(void)
391arch_initcall(sh7720_devices_setup); 397arch_initcall(sh7720_devices_setup);
392 398
393static struct platform_device *sh7720_early_devices[] __initdata = { 399static struct platform_device *sh7720_early_devices[] __initdata = {
400 &scif0_device,
401 &scif1_device,
394 &cmt0_device, 402 &cmt0_device,
395 &cmt1_device, 403 &cmt1_device,
396 &cmt2_device, 404 &cmt2_device,
diff --git a/arch/sh/kernel/cpu/sh4/Makefile b/arch/sh/kernel/cpu/sh4/Makefile
index 203b18347b83..3a1dbc709831 100644
--- a/arch/sh/kernel/cpu/sh4/Makefile
+++ b/arch/sh/kernel/cpu/sh4/Makefile
@@ -9,6 +9,11 @@ obj-$(CONFIG_HIBERNATION) += $(addprefix ../sh3/, swsusp.o)
9obj-$(CONFIG_SH_FPU) += fpu.o softfloat.o 9obj-$(CONFIG_SH_FPU) += fpu.o softfloat.o
10obj-$(CONFIG_SH_STORE_QUEUES) += sq.o 10obj-$(CONFIG_SH_STORE_QUEUES) += sq.o
11 11
12# Perf events
13perf-$(CONFIG_CPU_SUBTYPE_SH7750) := perf_event.o
14perf-$(CONFIG_CPU_SUBTYPE_SH7750S) := perf_event.o
15perf-$(CONFIG_CPU_SUBTYPE_SH7091) := perf_event.o
16
12# CPU subtype setup 17# CPU subtype setup
13obj-$(CONFIG_CPU_SUBTYPE_SH7750) += setup-sh7750.o 18obj-$(CONFIG_CPU_SUBTYPE_SH7750) += setup-sh7750.o
14obj-$(CONFIG_CPU_SUBTYPE_SH7750R) += setup-sh7750.o 19obj-$(CONFIG_CPU_SUBTYPE_SH7750R) += setup-sh7750.o
@@ -27,4 +32,5 @@ endif
27# Additional clocks by subtype 32# Additional clocks by subtype
28clock-$(CONFIG_CPU_SUBTYPE_SH4_202) += clock-sh4-202.o 33clock-$(CONFIG_CPU_SUBTYPE_SH4_202) += clock-sh4-202.o
29 34
30obj-y += $(clock-y) 35obj-y += $(clock-y)
36obj-$(CONFIG_PERF_EVENTS) += $(perf-y)
diff --git a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c
index 21421e34e7d5..6b80850294da 100644
--- a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c
+++ b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c
@@ -23,7 +23,7 @@ static int frqcr3_values[] = { 0, 1, 2, 3, 4, 5, 6 };
23 23
24static unsigned long emi_clk_recalc(struct clk *clk) 24static unsigned long emi_clk_recalc(struct clk *clk)
25{ 25{
26 int idx = ctrl_inl(CPG2_FRQCR3) & 0x0007; 26 int idx = __raw_readl(CPG2_FRQCR3) & 0x0007;
27 return clk->parent->rate / frqcr3_divisors[idx]; 27 return clk->parent->rate / frqcr3_divisors[idx];
28} 28}
29 29
@@ -52,7 +52,7 @@ static struct clk sh4202_emi_clk = {
52 52
53static unsigned long femi_clk_recalc(struct clk *clk) 53static unsigned long femi_clk_recalc(struct clk *clk)
54{ 54{
55 int idx = (ctrl_inl(CPG2_FRQCR3) >> 3) & 0x0007; 55 int idx = (__raw_readl(CPG2_FRQCR3) >> 3) & 0x0007;
56 return clk->parent->rate / frqcr3_divisors[idx]; 56 return clk->parent->rate / frqcr3_divisors[idx];
57} 57}
58 58
@@ -92,7 +92,7 @@ static void shoc_clk_init(struct clk *clk)
92 92
93static unsigned long shoc_clk_recalc(struct clk *clk) 93static unsigned long shoc_clk_recalc(struct clk *clk)
94{ 94{
95 int idx = (ctrl_inl(CPG2_FRQCR3) >> 6) & 0x0007; 95 int idx = (__raw_readl(CPG2_FRQCR3) >> 6) & 0x0007;
96 return clk->parent->rate / frqcr3_divisors[idx]; 96 return clk->parent->rate / frqcr3_divisors[idx];
97} 97}
98 98
@@ -122,10 +122,10 @@ static int shoc_clk_set_rate(struct clk *clk, unsigned long rate, int algo_id)
122 122
123 tmp = frqcr3_lookup(clk, rate); 123 tmp = frqcr3_lookup(clk, rate);
124 124
125 frqcr3 = ctrl_inl(CPG2_FRQCR3); 125 frqcr3 = __raw_readl(CPG2_FRQCR3);
126 frqcr3 &= ~(0x0007 << 6); 126 frqcr3 &= ~(0x0007 << 6);
127 frqcr3 |= tmp << 6; 127 frqcr3 |= tmp << 6;
128 ctrl_outl(frqcr3, CPG2_FRQCR3); 128 __raw_writel(frqcr3, CPG2_FRQCR3);
129 129
130 clk->rate = clk->parent->rate / frqcr3_divisors[tmp]; 130 clk->rate = clk->parent->rate / frqcr3_divisors[tmp];
131 131
diff --git a/arch/sh/kernel/cpu/sh4/clock-sh4.c b/arch/sh/kernel/cpu/sh4/clock-sh4.c
index 73294d9cd049..5add75c1f539 100644
--- a/arch/sh/kernel/cpu/sh4/clock-sh4.c
+++ b/arch/sh/kernel/cpu/sh4/clock-sh4.c
@@ -28,7 +28,7 @@ static int pfc_divisors[] = { 2, 3, 4, 6, 8, 2, 2, 2 };
28 28
29static void master_clk_init(struct clk *clk) 29static void master_clk_init(struct clk *clk)
30{ 30{
31 clk->rate *= pfc_divisors[ctrl_inw(FRQCR) & 0x0007]; 31 clk->rate *= pfc_divisors[__raw_readw(FRQCR) & 0x0007];
32} 32}
33 33
34static struct clk_ops sh4_master_clk_ops = { 34static struct clk_ops sh4_master_clk_ops = {
@@ -37,7 +37,7 @@ static struct clk_ops sh4_master_clk_ops = {
37 37
38static unsigned long module_clk_recalc(struct clk *clk) 38static unsigned long module_clk_recalc(struct clk *clk)
39{ 39{
40 int idx = (ctrl_inw(FRQCR) & 0x0007); 40 int idx = (__raw_readw(FRQCR) & 0x0007);
41 return clk->parent->rate / pfc_divisors[idx]; 41 return clk->parent->rate / pfc_divisors[idx];
42} 42}
43 43
@@ -47,7 +47,7 @@ static struct clk_ops sh4_module_clk_ops = {
47 47
48static unsigned long bus_clk_recalc(struct clk *clk) 48static unsigned long bus_clk_recalc(struct clk *clk)
49{ 49{
50 int idx = (ctrl_inw(FRQCR) >> 3) & 0x0007; 50 int idx = (__raw_readw(FRQCR) >> 3) & 0x0007;
51 return clk->parent->rate / bfc_divisors[idx]; 51 return clk->parent->rate / bfc_divisors[idx];
52} 52}
53 53
@@ -57,7 +57,7 @@ static struct clk_ops sh4_bus_clk_ops = {
57 57
58static unsigned long cpu_clk_recalc(struct clk *clk) 58static unsigned long cpu_clk_recalc(struct clk *clk)
59{ 59{
60 int idx = (ctrl_inw(FRQCR) >> 6) & 0x0007; 60 int idx = (__raw_readw(FRQCR) >> 6) & 0x0007;
61 return clk->parent->rate / ifc_divisors[idx]; 61 return clk->parent->rate / ifc_divisors[idx];
62} 62}
63 63
diff --git a/arch/sh/kernel/cpu/sh4/fpu.c b/arch/sh/kernel/cpu/sh4/fpu.c
index e3ea5411da6d..447482d7f65e 100644
--- a/arch/sh/kernel/cpu/sh4/fpu.c
+++ b/arch/sh/kernel/cpu/sh4/fpu.c
@@ -41,13 +41,11 @@ static unsigned int fpu_exception_flags;
41 41
42/* 42/*
43 * Save FPU registers onto task structure. 43 * Save FPU registers onto task structure.
44 * Assume called with FPU enabled (SR.FD=0).
45 */ 44 */
46void save_fpu(struct task_struct *tsk, struct pt_regs *regs) 45void save_fpu(struct task_struct *tsk)
47{ 46{
48 unsigned long dummy; 47 unsigned long dummy;
49 48
50 clear_tsk_thread_flag(tsk, TIF_USEDFPU);
51 enable_fpu(); 49 enable_fpu();
52 asm volatile ("sts.l fpul, @-%0\n\t" 50 asm volatile ("sts.l fpul, @-%0\n\t"
53 "sts.l fpscr, @-%0\n\t" 51 "sts.l fpscr, @-%0\n\t"
@@ -87,15 +85,14 @@ void save_fpu(struct task_struct *tsk, struct pt_regs *regs)
87 "fmov.s fr1, @-%0\n\t" 85 "fmov.s fr1, @-%0\n\t"
88 "fmov.s fr0, @-%0\n\t" 86 "fmov.s fr0, @-%0\n\t"
89 "lds %3, fpscr\n\t":"=r" (dummy) 87 "lds %3, fpscr\n\t":"=r" (dummy)
90 :"0"((char *)(&tsk->thread.fpu.hard.status)), 88 :"0"((char *)(&tsk->thread.xstate->hardfpu.status)),
91 "r"(FPSCR_RCHG), "r"(FPSCR_INIT) 89 "r"(FPSCR_RCHG), "r"(FPSCR_INIT)
92 :"memory"); 90 :"memory");
93 91
94 disable_fpu(); 92 disable_fpu();
95 release_fpu(regs);
96} 93}
97 94
98static void restore_fpu(struct task_struct *tsk) 95void restore_fpu(struct task_struct *tsk)
99{ 96{
100 unsigned long dummy; 97 unsigned long dummy;
101 98
@@ -138,62 +135,11 @@ static void restore_fpu(struct task_struct *tsk)
138 "lds.l @%0+, fpscr\n\t" 135 "lds.l @%0+, fpscr\n\t"
139 "lds.l @%0+, fpul\n\t" 136 "lds.l @%0+, fpul\n\t"
140 :"=r" (dummy) 137 :"=r" (dummy)
141 :"0"(&tsk->thread.fpu), "r"(FPSCR_RCHG) 138 :"0" (tsk->thread.xstate), "r" (FPSCR_RCHG)
142 :"memory"); 139 :"memory");
143 disable_fpu(); 140 disable_fpu();
144} 141}
145 142
146/*
147 * Load the FPU with signalling NANS. This bit pattern we're using
148 * has the property that no matter wether considered as single or as
149 * double precision represents signaling NANS.
150 */
151
152static void fpu_init(void)
153{
154 enable_fpu();
155 asm volatile ( "lds %0, fpul\n\t"
156 "lds %1, fpscr\n\t"
157 "fsts fpul, fr0\n\t"
158 "fsts fpul, fr1\n\t"
159 "fsts fpul, fr2\n\t"
160 "fsts fpul, fr3\n\t"
161 "fsts fpul, fr4\n\t"
162 "fsts fpul, fr5\n\t"
163 "fsts fpul, fr6\n\t"
164 "fsts fpul, fr7\n\t"
165 "fsts fpul, fr8\n\t"
166 "fsts fpul, fr9\n\t"
167 "fsts fpul, fr10\n\t"
168 "fsts fpul, fr11\n\t"
169 "fsts fpul, fr12\n\t"
170 "fsts fpul, fr13\n\t"
171 "fsts fpul, fr14\n\t"
172 "fsts fpul, fr15\n\t"
173 "frchg\n\t"
174 "fsts fpul, fr0\n\t"
175 "fsts fpul, fr1\n\t"
176 "fsts fpul, fr2\n\t"
177 "fsts fpul, fr3\n\t"
178 "fsts fpul, fr4\n\t"
179 "fsts fpul, fr5\n\t"
180 "fsts fpul, fr6\n\t"
181 "fsts fpul, fr7\n\t"
182 "fsts fpul, fr8\n\t"
183 "fsts fpul, fr9\n\t"
184 "fsts fpul, fr10\n\t"
185 "fsts fpul, fr11\n\t"
186 "fsts fpul, fr12\n\t"
187 "fsts fpul, fr13\n\t"
188 "fsts fpul, fr14\n\t"
189 "fsts fpul, fr15\n\t"
190 "frchg\n\t"
191 "lds %2, fpscr\n\t"
192 : /* no output */
193 :"r" (0), "r"(FPSCR_RCHG), "r"(FPSCR_INIT));
194 disable_fpu();
195}
196
197/** 143/**
198 * denormal_to_double - Given denormalized float number, 144 * denormal_to_double - Given denormalized float number,
199 * store double float 145 * store double float
@@ -285,10 +231,9 @@ static int ieee_fpe_handler(struct pt_regs *regs)
285 /* fcnvsd */ 231 /* fcnvsd */
286 struct task_struct *tsk = current; 232 struct task_struct *tsk = current;
287 233
288 save_fpu(tsk, regs); 234 if ((tsk->thread.xstate->hardfpu.fpscr & FPSCR_CAUSE_ERROR))
289 if ((tsk->thread.fpu.hard.fpscr & FPSCR_CAUSE_ERROR))
290 /* FPU error */ 235 /* FPU error */
291 denormal_to_double(&tsk->thread.fpu.hard, 236 denormal_to_double(&tsk->thread.xstate->hardfpu,
292 (finsn >> 8) & 0xf); 237 (finsn >> 8) & 0xf);
293 else 238 else
294 return 0; 239 return 0;
@@ -304,9 +249,9 @@ static int ieee_fpe_handler(struct pt_regs *regs)
304 249
305 n = (finsn >> 8) & 0xf; 250 n = (finsn >> 8) & 0xf;
306 m = (finsn >> 4) & 0xf; 251 m = (finsn >> 4) & 0xf;
307 hx = tsk->thread.fpu.hard.fp_regs[n]; 252 hx = tsk->thread.xstate->hardfpu.fp_regs[n];
308 hy = tsk->thread.fpu.hard.fp_regs[m]; 253 hy = tsk->thread.xstate->hardfpu.fp_regs[m];
309 fpscr = tsk->thread.fpu.hard.fpscr; 254 fpscr = tsk->thread.xstate->hardfpu.fpscr;
310 prec = fpscr & FPSCR_DBL_PRECISION; 255 prec = fpscr & FPSCR_DBL_PRECISION;
311 256
312 if ((fpscr & FPSCR_CAUSE_ERROR) 257 if ((fpscr & FPSCR_CAUSE_ERROR)
@@ -316,18 +261,18 @@ static int ieee_fpe_handler(struct pt_regs *regs)
316 261
317 /* FPU error because of denormal (doubles) */ 262 /* FPU error because of denormal (doubles) */
318 llx = ((long long)hx << 32) 263 llx = ((long long)hx << 32)
319 | tsk->thread.fpu.hard.fp_regs[n + 1]; 264 | tsk->thread.xstate->hardfpu.fp_regs[n + 1];
320 lly = ((long long)hy << 32) 265 lly = ((long long)hy << 32)
321 | tsk->thread.fpu.hard.fp_regs[m + 1]; 266 | tsk->thread.xstate->hardfpu.fp_regs[m + 1];
322 llx = float64_mul(llx, lly); 267 llx = float64_mul(llx, lly);
323 tsk->thread.fpu.hard.fp_regs[n] = llx >> 32; 268 tsk->thread.xstate->hardfpu.fp_regs[n] = llx >> 32;
324 tsk->thread.fpu.hard.fp_regs[n + 1] = llx & 0xffffffff; 269 tsk->thread.xstate->hardfpu.fp_regs[n + 1] = llx & 0xffffffff;
325 } else if ((fpscr & FPSCR_CAUSE_ERROR) 270 } else if ((fpscr & FPSCR_CAUSE_ERROR)
326 && (!prec && ((hx & 0x7fffffff) < 0x00800000 271 && (!prec && ((hx & 0x7fffffff) < 0x00800000
327 || (hy & 0x7fffffff) < 0x00800000))) { 272 || (hy & 0x7fffffff) < 0x00800000))) {
328 /* FPU error because of denormal (floats) */ 273 /* FPU error because of denormal (floats) */
329 hx = float32_mul(hx, hy); 274 hx = float32_mul(hx, hy);
330 tsk->thread.fpu.hard.fp_regs[n] = hx; 275 tsk->thread.xstate->hardfpu.fp_regs[n] = hx;
331 } else 276 } else
332 return 0; 277 return 0;
333 278
@@ -342,9 +287,9 @@ static int ieee_fpe_handler(struct pt_regs *regs)
342 287
343 n = (finsn >> 8) & 0xf; 288 n = (finsn >> 8) & 0xf;
344 m = (finsn >> 4) & 0xf; 289 m = (finsn >> 4) & 0xf;
345 hx = tsk->thread.fpu.hard.fp_regs[n]; 290 hx = tsk->thread.xstate->hardfpu.fp_regs[n];
346 hy = tsk->thread.fpu.hard.fp_regs[m]; 291 hy = tsk->thread.xstate->hardfpu.fp_regs[m];
347 fpscr = tsk->thread.fpu.hard.fpscr; 292 fpscr = tsk->thread.xstate->hardfpu.fpscr;
348 prec = fpscr & FPSCR_DBL_PRECISION; 293 prec = fpscr & FPSCR_DBL_PRECISION;
349 294
350 if ((fpscr & FPSCR_CAUSE_ERROR) 295 if ((fpscr & FPSCR_CAUSE_ERROR)
@@ -354,15 +299,15 @@ static int ieee_fpe_handler(struct pt_regs *regs)
354 299
355 /* FPU error because of denormal (doubles) */ 300 /* FPU error because of denormal (doubles) */
356 llx = ((long long)hx << 32) 301 llx = ((long long)hx << 32)
357 | tsk->thread.fpu.hard.fp_regs[n + 1]; 302 | tsk->thread.xstate->hardfpu.fp_regs[n + 1];
358 lly = ((long long)hy << 32) 303 lly = ((long long)hy << 32)
359 | tsk->thread.fpu.hard.fp_regs[m + 1]; 304 | tsk->thread.xstate->hardfpu.fp_regs[m + 1];
360 if ((finsn & 0xf00f) == 0xf000) 305 if ((finsn & 0xf00f) == 0xf000)
361 llx = float64_add(llx, lly); 306 llx = float64_add(llx, lly);
362 else 307 else
363 llx = float64_sub(llx, lly); 308 llx = float64_sub(llx, lly);
364 tsk->thread.fpu.hard.fp_regs[n] = llx >> 32; 309 tsk->thread.xstate->hardfpu.fp_regs[n] = llx >> 32;
365 tsk->thread.fpu.hard.fp_regs[n + 1] = llx & 0xffffffff; 310 tsk->thread.xstate->hardfpu.fp_regs[n + 1] = llx & 0xffffffff;
366 } else if ((fpscr & FPSCR_CAUSE_ERROR) 311 } else if ((fpscr & FPSCR_CAUSE_ERROR)
367 && (!prec && ((hx & 0x7fffffff) < 0x00800000 312 && (!prec && ((hx & 0x7fffffff) < 0x00800000
368 || (hy & 0x7fffffff) < 0x00800000))) { 313 || (hy & 0x7fffffff) < 0x00800000))) {
@@ -371,7 +316,7 @@ static int ieee_fpe_handler(struct pt_regs *regs)
371 hx = float32_add(hx, hy); 316 hx = float32_add(hx, hy);
372 else 317 else
373 hx = float32_sub(hx, hy); 318 hx = float32_sub(hx, hy);
374 tsk->thread.fpu.hard.fp_regs[n] = hx; 319 tsk->thread.xstate->hardfpu.fp_regs[n] = hx;
375 } else 320 } else
376 return 0; 321 return 0;
377 322
@@ -386,9 +331,9 @@ static int ieee_fpe_handler(struct pt_regs *regs)
386 331
387 n = (finsn >> 8) & 0xf; 332 n = (finsn >> 8) & 0xf;
388 m = (finsn >> 4) & 0xf; 333 m = (finsn >> 4) & 0xf;
389 hx = tsk->thread.fpu.hard.fp_regs[n]; 334 hx = tsk->thread.xstate->hardfpu.fp_regs[n];
390 hy = tsk->thread.fpu.hard.fp_regs[m]; 335 hy = tsk->thread.xstate->hardfpu.fp_regs[m];
391 fpscr = tsk->thread.fpu.hard.fpscr; 336 fpscr = tsk->thread.xstate->hardfpu.fpscr;
392 prec = fpscr & FPSCR_DBL_PRECISION; 337 prec = fpscr & FPSCR_DBL_PRECISION;
393 338
394 if ((fpscr & FPSCR_CAUSE_ERROR) 339 if ((fpscr & FPSCR_CAUSE_ERROR)
@@ -398,20 +343,20 @@ static int ieee_fpe_handler(struct pt_regs *regs)
398 343
399 /* FPU error because of denormal (doubles) */ 344 /* FPU error because of denormal (doubles) */
400 llx = ((long long)hx << 32) 345 llx = ((long long)hx << 32)
401 | tsk->thread.fpu.hard.fp_regs[n + 1]; 346 | tsk->thread.xstate->hardfpu.fp_regs[n + 1];
402 lly = ((long long)hy << 32) 347 lly = ((long long)hy << 32)
403 | tsk->thread.fpu.hard.fp_regs[m + 1]; 348 | tsk->thread.xstate->hardfpu.fp_regs[m + 1];
404 349
405 llx = float64_div(llx, lly); 350 llx = float64_div(llx, lly);
406 351
407 tsk->thread.fpu.hard.fp_regs[n] = llx >> 32; 352 tsk->thread.xstate->hardfpu.fp_regs[n] = llx >> 32;
408 tsk->thread.fpu.hard.fp_regs[n + 1] = llx & 0xffffffff; 353 tsk->thread.xstate->hardfpu.fp_regs[n + 1] = llx & 0xffffffff;
409 } else if ((fpscr & FPSCR_CAUSE_ERROR) 354 } else if ((fpscr & FPSCR_CAUSE_ERROR)
410 && (!prec && ((hx & 0x7fffffff) < 0x00800000 355 && (!prec && ((hx & 0x7fffffff) < 0x00800000
411 || (hy & 0x7fffffff) < 0x00800000))) { 356 || (hy & 0x7fffffff) < 0x00800000))) {
412 /* FPU error because of denormal (floats) */ 357 /* FPU error because of denormal (floats) */
413 hx = float32_div(hx, hy); 358 hx = float32_div(hx, hy);
414 tsk->thread.fpu.hard.fp_regs[n] = hx; 359 tsk->thread.xstate->hardfpu.fp_regs[n] = hx;
415 } else 360 } else
416 return 0; 361 return 0;
417 362
@@ -424,17 +369,17 @@ static int ieee_fpe_handler(struct pt_regs *regs)
424 unsigned int hx; 369 unsigned int hx;
425 370
426 m = (finsn >> 8) & 0x7; 371 m = (finsn >> 8) & 0x7;
427 hx = tsk->thread.fpu.hard.fp_regs[m]; 372 hx = tsk->thread.xstate->hardfpu.fp_regs[m];
428 373
429 if ((tsk->thread.fpu.hard.fpscr & FPSCR_CAUSE_ERROR) 374 if ((tsk->thread.xstate->hardfpu.fpscr & FPSCR_CAUSE_ERROR)
430 && ((hx & 0x7fffffff) < 0x00100000)) { 375 && ((hx & 0x7fffffff) < 0x00100000)) {
431 /* subnormal double to float conversion */ 376 /* subnormal double to float conversion */
432 long long llx; 377 long long llx;
433 378
434 llx = ((long long)tsk->thread.fpu.hard.fp_regs[m] << 32) 379 llx = ((long long)tsk->thread.xstate->hardfpu.fp_regs[m] << 32)
435 | tsk->thread.fpu.hard.fp_regs[m + 1]; 380 | tsk->thread.xstate->hardfpu.fp_regs[m + 1];
436 381
437 tsk->thread.fpu.hard.fpul = float64_to_float32(llx); 382 tsk->thread.xstate->hardfpu.fpul = float64_to_float32(llx);
438 } else 383 } else
439 return 0; 384 return 0;
440 385
@@ -453,7 +398,7 @@ void float_raise(unsigned int flags)
453int float_rounding_mode(void) 398int float_rounding_mode(void)
454{ 399{
455 struct task_struct *tsk = current; 400 struct task_struct *tsk = current;
456 int roundingMode = FPSCR_ROUNDING_MODE(tsk->thread.fpu.hard.fpscr); 401 int roundingMode = FPSCR_ROUNDING_MODE(tsk->thread.xstate->hardfpu.fpscr);
457 return roundingMode; 402 return roundingMode;
458} 403}
459 404
@@ -462,19 +407,19 @@ BUILD_TRAP_HANDLER(fpu_error)
462 struct task_struct *tsk = current; 407 struct task_struct *tsk = current;
463 TRAP_HANDLER_DECL; 408 TRAP_HANDLER_DECL;
464 409
465 save_fpu(tsk, regs); 410 __unlazy_fpu(tsk, regs);
466 fpu_exception_flags = 0; 411 fpu_exception_flags = 0;
467 if (ieee_fpe_handler(regs)) { 412 if (ieee_fpe_handler(regs)) {
468 tsk->thread.fpu.hard.fpscr &= 413 tsk->thread.xstate->hardfpu.fpscr &=
469 ~(FPSCR_CAUSE_MASK | FPSCR_FLAG_MASK); 414 ~(FPSCR_CAUSE_MASK | FPSCR_FLAG_MASK);
470 tsk->thread.fpu.hard.fpscr |= fpu_exception_flags; 415 tsk->thread.xstate->hardfpu.fpscr |= fpu_exception_flags;
471 /* Set the FPSCR flag as well as cause bits - simply 416 /* Set the FPSCR flag as well as cause bits - simply
472 * replicate the cause */ 417 * replicate the cause */
473 tsk->thread.fpu.hard.fpscr |= (fpu_exception_flags >> 10); 418 tsk->thread.xstate->hardfpu.fpscr |= (fpu_exception_flags >> 10);
474 grab_fpu(regs); 419 grab_fpu(regs);
475 restore_fpu(tsk); 420 restore_fpu(tsk);
476 set_tsk_thread_flag(tsk, TIF_USEDFPU); 421 task_thread_info(tsk)->status |= TS_USEDFPU;
477 if ((((tsk->thread.fpu.hard.fpscr & FPSCR_ENABLE_MASK) >> 7) & 422 if ((((tsk->thread.xstate->hardfpu.fpscr & FPSCR_ENABLE_MASK) >> 7) &
478 (fpu_exception_flags >> 2)) == 0) { 423 (fpu_exception_flags >> 2)) == 0) {
479 return; 424 return;
480 } 425 }
@@ -482,25 +427,3 @@ BUILD_TRAP_HANDLER(fpu_error)
482 427
483 force_sig(SIGFPE, tsk); 428 force_sig(SIGFPE, tsk);
484} 429}
485
486BUILD_TRAP_HANDLER(fpu_state_restore)
487{
488 struct task_struct *tsk = current;
489 TRAP_HANDLER_DECL;
490
491 grab_fpu(regs);
492 if (!user_mode(regs)) {
493 printk(KERN_ERR "BUG: FPU is used in kernel mode.\n");
494 return;
495 }
496
497 if (used_math()) {
498 /* Using the FPU again. */
499 restore_fpu(tsk);
500 } else {
501 /* First time FPU user. */
502 fpu_init();
503 set_used_math();
504 }
505 set_tsk_thread_flag(tsk, TIF_USEDFPU);
506}
diff --git a/arch/sh/kernel/cpu/sh4/perf_event.c b/arch/sh/kernel/cpu/sh4/perf_event.c
new file mode 100644
index 000000000000..7f9ecc9c2d02
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4/perf_event.c
@@ -0,0 +1,253 @@
1/*
2 * Performance events support for SH7750-style performance counters
3 *
4 * Copyright (C) 2009 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/kernel.h>
11#include <linux/init.h>
12#include <linux/io.h>
13#include <linux/irq.h>
14#include <linux/perf_event.h>
15#include <asm/processor.h>
16
17#define PM_CR_BASE 0xff000084 /* 16-bit */
18#define PM_CTR_BASE 0xff100004 /* 32-bit */
19
20#define PMCR(n) (PM_CR_BASE + ((n) * 0x04))
21#define PMCTRH(n) (PM_CTR_BASE + 0x00 + ((n) * 0x08))
22#define PMCTRL(n) (PM_CTR_BASE + 0x04 + ((n) * 0x08))
23
24#define PMCR_PMM_MASK 0x0000003f
25
26#define PMCR_CLKF 0x00000100
27#define PMCR_PMCLR 0x00002000
28#define PMCR_PMST 0x00004000
29#define PMCR_PMEN 0x00008000
30
31static struct sh_pmu sh7750_pmu;
32
33/*
34 * There are a number of events supported by each counter (33 in total).
35 * Since we have 2 counters, each counter will take the event code as it
36 * corresponds to the PMCR PMM setting. Each counter can be configured
37 * independently.
38 *
39 * Event Code Description
40 * ---------- -----------
41 *
42 * 0x01 Operand read access
43 * 0x02 Operand write access
44 * 0x03 UTLB miss
45 * 0x04 Operand cache read miss
46 * 0x05 Operand cache write miss
47 * 0x06 Instruction fetch (w/ cache)
48 * 0x07 Instruction TLB miss
49 * 0x08 Instruction cache miss
50 * 0x09 All operand accesses
51 * 0x0a All instruction accesses
52 * 0x0b OC RAM operand access
53 * 0x0d On-chip I/O space access
54 * 0x0e Operand access (r/w)
55 * 0x0f Operand cache miss (r/w)
56 * 0x10 Branch instruction
57 * 0x11 Branch taken
58 * 0x12 BSR/BSRF/JSR
59 * 0x13 Instruction execution
60 * 0x14 Instruction execution in parallel
61 * 0x15 FPU Instruction execution
62 * 0x16 Interrupt
63 * 0x17 NMI
64 * 0x18 trapa instruction execution
65 * 0x19 UBCA match
66 * 0x1a UBCB match
67 * 0x21 Instruction cache fill
68 * 0x22 Operand cache fill
69 * 0x23 Elapsed time
70 * 0x24 Pipeline freeze by I-cache miss
71 * 0x25 Pipeline freeze by D-cache miss
72 * 0x27 Pipeline freeze by branch instruction
73 * 0x28 Pipeline freeze by CPU register
74 * 0x29 Pipeline freeze by FPU
75 */
76
77static const int sh7750_general_events[] = {
78 [PERF_COUNT_HW_CPU_CYCLES] = 0x0023,
79 [PERF_COUNT_HW_INSTRUCTIONS] = 0x000a,
80 [PERF_COUNT_HW_CACHE_REFERENCES] = 0x0006, /* I-cache */
81 [PERF_COUNT_HW_CACHE_MISSES] = 0x0008, /* I-cache */
82 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 0x0010,
83 [PERF_COUNT_HW_BRANCH_MISSES] = -1,
84 [PERF_COUNT_HW_BUS_CYCLES] = -1,
85};
86
87#define C(x) PERF_COUNT_HW_CACHE_##x
88
89static const int sh7750_cache_events
90 [PERF_COUNT_HW_CACHE_MAX]
91 [PERF_COUNT_HW_CACHE_OP_MAX]
92 [PERF_COUNT_HW_CACHE_RESULT_MAX] =
93{
94 [ C(L1D) ] = {
95 [ C(OP_READ) ] = {
96 [ C(RESULT_ACCESS) ] = 0x0001,
97 [ C(RESULT_MISS) ] = 0x0004,
98 },
99 [ C(OP_WRITE) ] = {
100 [ C(RESULT_ACCESS) ] = 0x0002,
101 [ C(RESULT_MISS) ] = 0x0005,
102 },
103 [ C(OP_PREFETCH) ] = {
104 [ C(RESULT_ACCESS) ] = 0,
105 [ C(RESULT_MISS) ] = 0,
106 },
107 },
108
109 [ C(L1I) ] = {
110 [ C(OP_READ) ] = {
111 [ C(RESULT_ACCESS) ] = 0x0006,
112 [ C(RESULT_MISS) ] = 0x0008,
113 },
114 [ C(OP_WRITE) ] = {
115 [ C(RESULT_ACCESS) ] = -1,
116 [ C(RESULT_MISS) ] = -1,
117 },
118 [ C(OP_PREFETCH) ] = {
119 [ C(RESULT_ACCESS) ] = 0,
120 [ C(RESULT_MISS) ] = 0,
121 },
122 },
123
124 [ C(LL) ] = {
125 [ C(OP_READ) ] = {
126 [ C(RESULT_ACCESS) ] = 0,
127 [ C(RESULT_MISS) ] = 0,
128 },
129 [ C(OP_WRITE) ] = {
130 [ C(RESULT_ACCESS) ] = 0,
131 [ C(RESULT_MISS) ] = 0,
132 },
133 [ C(OP_PREFETCH) ] = {
134 [ C(RESULT_ACCESS) ] = 0,
135 [ C(RESULT_MISS) ] = 0,
136 },
137 },
138
139 [ C(DTLB) ] = {
140 [ C(OP_READ) ] = {
141 [ C(RESULT_ACCESS) ] = 0,
142 [ C(RESULT_MISS) ] = 0x0003,
143 },
144 [ C(OP_WRITE) ] = {
145 [ C(RESULT_ACCESS) ] = 0,
146 [ C(RESULT_MISS) ] = 0,
147 },
148 [ C(OP_PREFETCH) ] = {
149 [ C(RESULT_ACCESS) ] = 0,
150 [ C(RESULT_MISS) ] = 0,
151 },
152 },
153
154 [ C(ITLB) ] = {
155 [ C(OP_READ) ] = {
156 [ C(RESULT_ACCESS) ] = 0,
157 [ C(RESULT_MISS) ] = 0x0007,
158 },
159 [ C(OP_WRITE) ] = {
160 [ C(RESULT_ACCESS) ] = -1,
161 [ C(RESULT_MISS) ] = -1,
162 },
163 [ C(OP_PREFETCH) ] = {
164 [ C(RESULT_ACCESS) ] = -1,
165 [ C(RESULT_MISS) ] = -1,
166 },
167 },
168
169 [ C(BPU) ] = {
170 [ C(OP_READ) ] = {
171 [ C(RESULT_ACCESS) ] = -1,
172 [ C(RESULT_MISS) ] = -1,
173 },
174 [ C(OP_WRITE) ] = {
175 [ C(RESULT_ACCESS) ] = -1,
176 [ C(RESULT_MISS) ] = -1,
177 },
178 [ C(OP_PREFETCH) ] = {
179 [ C(RESULT_ACCESS) ] = -1,
180 [ C(RESULT_MISS) ] = -1,
181 },
182 },
183};
184
185static int sh7750_event_map(int event)
186{
187 return sh7750_general_events[event];
188}
189
190static u64 sh7750_pmu_read(int idx)
191{
192 return (u64)((u64)(__raw_readl(PMCTRH(idx)) & 0xffff) << 32) |
193 __raw_readl(PMCTRL(idx));
194}
195
196static void sh7750_pmu_disable(struct hw_perf_event *hwc, int idx)
197{
198 unsigned int tmp;
199
200 tmp = __raw_readw(PMCR(idx));
201 tmp &= ~(PMCR_PMM_MASK | PMCR_PMEN);
202 __raw_writew(tmp, PMCR(idx));
203}
204
205static void sh7750_pmu_enable(struct hw_perf_event *hwc, int idx)
206{
207 __raw_writew(__raw_readw(PMCR(idx)) | PMCR_PMCLR, PMCR(idx));
208 __raw_writew(hwc->config | PMCR_PMEN | PMCR_PMST, PMCR(idx));
209}
210
211static void sh7750_pmu_disable_all(void)
212{
213 int i;
214
215 for (i = 0; i < sh7750_pmu.num_events; i++)
216 __raw_writew(__raw_readw(PMCR(i)) & ~PMCR_PMEN, PMCR(i));
217}
218
219static void sh7750_pmu_enable_all(void)
220{
221 int i;
222
223 for (i = 0; i < sh7750_pmu.num_events; i++)
224 __raw_writew(__raw_readw(PMCR(i)) | PMCR_PMEN, PMCR(i));
225}
226
227static struct sh_pmu sh7750_pmu = {
228 .name = "SH7750",
229 .num_events = 2,
230 .event_map = sh7750_event_map,
231 .max_events = ARRAY_SIZE(sh7750_general_events),
232 .raw_event_mask = PMCR_PMM_MASK,
233 .cache_events = &sh7750_cache_events,
234 .read = sh7750_pmu_read,
235 .disable = sh7750_pmu_disable,
236 .enable = sh7750_pmu_enable,
237 .disable_all = sh7750_pmu_disable_all,
238 .enable_all = sh7750_pmu_enable_all,
239};
240
241static int __init sh7750_pmu_init(void)
242{
243 /*
244 * Make sure this CPU actually has perf counters.
245 */
246 if (!(boot_cpu_data.flags & CPU_HAS_PERF_COUNTER)) {
247 pr_notice("HW perf events unsupported, software events only.\n");
248 return -ENODEV;
249 }
250
251 return register_sh_pmu(&sh7750_pmu);
252}
253arch_initcall(sh7750_pmu_init);
diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c
index d36f0c45f55f..822977a06d84 100644
--- a/arch/sh/kernel/cpu/sh4/probe.c
+++ b/arch/sh/kernel/cpu/sh4/probe.c
@@ -28,9 +28,9 @@ int __init detect_cpu_and_cache_system(void)
28 [9] = (1 << 16) 28 [9] = (1 << 16)
29 }; 29 };
30 30
31 pvr = (ctrl_inl(CCN_PVR) >> 8) & 0xffffff; 31 pvr = (__raw_readl(CCN_PVR) >> 8) & 0xffffff;
32 prr = (ctrl_inl(CCN_PRR) >> 4) & 0xff; 32 prr = (__raw_readl(CCN_PRR) >> 4) & 0xff;
33 cvr = (ctrl_inl(CCN_CVR)); 33 cvr = (__raw_readl(CCN_CVR));
34 34
35 /* 35 /*
36 * Setup some sane SH-4 defaults for the icache 36 * Setup some sane SH-4 defaults for the icache
@@ -71,11 +71,11 @@ int __init detect_cpu_and_cache_system(void)
71 boot_cpu_data.dcache.ways = 4; 71 boot_cpu_data.dcache.ways = 4;
72 } else { 72 } else {
73 /* And some SH-4 defaults.. */ 73 /* And some SH-4 defaults.. */
74 boot_cpu_data.flags |= CPU_HAS_PTEA; 74 boot_cpu_data.flags |= CPU_HAS_PTEA | CPU_HAS_FPU;
75 boot_cpu_data.family = CPU_FAMILY_SH4; 75 boot_cpu_data.family = CPU_FAMILY_SH4;
76 } 76 }
77 77
78 /* FPU detection works for everyone */ 78 /* FPU detection works for almost everyone */
79 if ((cvr & 0x20000000)) 79 if ((cvr & 0x20000000))
80 boot_cpu_data.flags |= CPU_HAS_FPU; 80 boot_cpu_data.flags |= CPU_HAS_FPU;
81 81
@@ -124,6 +124,7 @@ int __init detect_cpu_and_cache_system(void)
124 boot_cpu_data.type = CPU_SH7785; 124 boot_cpu_data.type = CPU_SH7785;
125 break; 125 break;
126 case 0x4004: 126 case 0x4004:
127 case 0x4005:
127 boot_cpu_data.type = CPU_SH7786; 128 boot_cpu_data.type = CPU_SH7786;
128 boot_cpu_data.flags |= CPU_HAS_PTEAEX | CPU_HAS_L2_CACHE; 129 boot_cpu_data.flags |= CPU_HAS_PTEAEX | CPU_HAS_L2_CACHE;
129 break; 130 break;
@@ -160,6 +161,7 @@ int __init detect_cpu_and_cache_system(void)
160 break; 161 break;
161 case 0x700: 162 case 0x700:
162 boot_cpu_data.type = CPU_SH4_501; 163 boot_cpu_data.type = CPU_SH4_501;
164 boot_cpu_data.flags &= ~CPU_HAS_FPU;
163 boot_cpu_data.icache.ways = 2; 165 boot_cpu_data.icache.ways = 2;
164 boot_cpu_data.dcache.ways = 2; 166 boot_cpu_data.dcache.ways = 2;
165 break; 167 break;
@@ -227,7 +229,7 @@ int __init detect_cpu_and_cache_system(void)
227 * Size calculation is much more sensible 229 * Size calculation is much more sensible
228 * than it is for the L1. 230 * than it is for the L1.
229 * 231 *
230 * Sizes are 128KB, 258KB, 512KB, and 1MB. 232 * Sizes are 128KB, 256KB, 512KB, and 1MB.
231 */ 233 */
232 size = (cvr & 0xf) << 17; 234 size = (cvr & 0xf) << 17;
233 235
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
index de4827df19aa..b9b7e10ad68f 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
@@ -15,22 +15,18 @@
15#include <linux/sh_timer.h> 15#include <linux/sh_timer.h>
16#include <linux/io.h> 16#include <linux/io.h>
17 17
18static struct plat_sci_port sci_platform_data[] = { 18static struct plat_sci_port scif0_platform_data = {
19 { 19 .mapbase = 0xffe80000,
20 .mapbase = 0xffe80000, 20 .flags = UPF_BOOT_AUTOCONF,
21 .flags = UPF_BOOT_AUTOCONF, 21 .type = PORT_SCIF,
22 .type = PORT_SCIF, 22 .irqs = { 40, 41, 43, 42 },
23 .irqs = { 40, 41, 43, 42 },
24 }, {
25 .flags = 0,
26 }
27}; 23};
28 24
29static struct platform_device sci_device = { 25static struct platform_device scif0_device = {
30 .name = "sh-sci", 26 .name = "sh-sci",
31 .id = -1, 27 .id = 0,
32 .dev = { 28 .dev = {
33 .platform_data = sci_platform_data, 29 .platform_data = &scif0_platform_data,
34 }, 30 },
35}; 31};
36 32
@@ -127,7 +123,7 @@ static struct platform_device tmu2_device = {
127}; 123};
128 124
129static struct platform_device *sh4202_devices[] __initdata = { 125static struct platform_device *sh4202_devices[] __initdata = {
130 &sci_device, 126 &scif0_device,
131 &tmu0_device, 127 &tmu0_device,
132 &tmu1_device, 128 &tmu1_device,
133 &tmu2_device, 129 &tmu2_device,
@@ -141,6 +137,7 @@ static int __init sh4202_devices_setup(void)
141arch_initcall(sh4202_devices_setup); 137arch_initcall(sh4202_devices_setup);
142 138
143static struct platform_device *sh4202_early_devices[] __initdata = { 139static struct platform_device *sh4202_early_devices[] __initdata = {
140 &scif0_device,
144 &tmu0_device, 141 &tmu0_device,
145 &tmu1_device, 142 &tmu1_device,
146 &tmu2_device, 143 &tmu2_device,
@@ -201,7 +198,7 @@ void __init plat_irq_setup_pins(int mode)
201{ 198{
202 switch (mode) { 199 switch (mode) {
203 case IRQ_MODE_IRQ: /* individual interrupt mode for IRL3-0 */ 200 case IRQ_MODE_IRQ: /* individual interrupt mode for IRL3-0 */
204 ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR); 201 __raw_writew(__raw_readw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
205 register_intc_controller(&intc_desc_irlm); 202 register_intc_controller(&intc_desc_irlm);
206 break; 203 break;
207 default: 204 default:
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
index 1b8b122e8f3d..ffd79e57254f 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7750.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
@@ -35,29 +35,33 @@ static struct platform_device rtc_device = {
35 .resource = rtc_resources, 35 .resource = rtc_resources,
36}; 36};
37 37
38static struct plat_sci_port sci_platform_data[] = { 38static struct plat_sci_port scif0_platform_data = {
39 { 39 .mapbase = 0xffe00000,
40#ifndef CONFIG_SH_RTS7751R2D 40 .flags = UPF_BOOT_AUTOCONF,
41 .mapbase = 0xffe00000, 41 .type = PORT_SCI,
42 .flags = UPF_BOOT_AUTOCONF, 42 .irqs = { 23, 23, 23, 0 },
43 .type = PORT_SCI,
44 .irqs = { 23, 23, 23, 0 },
45 }, {
46#endif
47 .mapbase = 0xffe80000,
48 .flags = UPF_BOOT_AUTOCONF,
49 .type = PORT_SCIF,
50 .irqs = { 40, 40, 40, 40 },
51 }, {
52 .flags = 0,
53 }
54}; 43};
55 44
56static struct platform_device sci_device = { 45static struct platform_device scif0_device = {
57 .name = "sh-sci", 46 .name = "sh-sci",
58 .id = -1, 47 .id = 0,
48 .dev = {
49 .platform_data = &scif0_platform_data,
50 },
51};
52
53static struct plat_sci_port scif1_platform_data = {
54 .mapbase = 0xffe80000,
55 .flags = UPF_BOOT_AUTOCONF,
56 .type = PORT_SCIF,
57 .irqs = { 40, 40, 40, 40 },
58};
59
60static struct platform_device scif1_device = {
61 .name = "sh-sci",
62 .id = 1,
59 .dev = { 63 .dev = {
60 .platform_data = sci_platform_data, 64 .platform_data = &scif1_platform_data,
61 }, 65 },
62}; 66};
63 67
@@ -221,8 +225,9 @@ static struct platform_device tmu4_device = {
221#endif 225#endif
222 226
223static struct platform_device *sh7750_devices[] __initdata = { 227static struct platform_device *sh7750_devices[] __initdata = {
228 &scif0_device,
229 &scif1_device,
224 &rtc_device, 230 &rtc_device,
225 &sci_device,
226 &tmu0_device, 231 &tmu0_device,
227 &tmu1_device, 232 &tmu1_device,
228 &tmu2_device, 233 &tmu2_device,
@@ -242,6 +247,8 @@ static int __init sh7750_devices_setup(void)
242arch_initcall(sh7750_devices_setup); 247arch_initcall(sh7750_devices_setup);
243 248
244static struct platform_device *sh7750_early_devices[] __initdata = { 249static struct platform_device *sh7750_early_devices[] __initdata = {
250 &scif0_device,
251 &scif1_device,
245 &tmu0_device, 252 &tmu0_device,
246 &tmu1_device, 253 &tmu1_device,
247 &tmu2_device, 254 &tmu2_device,
@@ -435,7 +442,7 @@ void __init plat_irq_setup_pins(int mode)
435 442
436 switch (mode) { 443 switch (mode) {
437 case IRQ_MODE_IRQ: /* individual interrupt mode for IRL3-0 */ 444 case IRQ_MODE_IRQ: /* individual interrupt mode for IRL3-0 */
438 ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR); 445 __raw_writew(__raw_readw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
439 register_intc_controller(&intc_desc_irlm); 446 register_intc_controller(&intc_desc_irlm);
440 break; 447 break;
441 default: 448 default:
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7760.c b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
index 7fbb7be9284c..a16eb3656f4b 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7760.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
@@ -126,37 +126,63 @@ static struct intc_vect vectors_irq[] __initdata = {
126static DECLARE_INTC_DESC(intc_desc_irq, "sh7760-irq", vectors_irq, groups, 126static DECLARE_INTC_DESC(intc_desc_irq, "sh7760-irq", vectors_irq, groups,
127 mask_registers, prio_registers, NULL); 127 mask_registers, prio_registers, NULL);
128 128
129static struct plat_sci_port sci_platform_data[] = { 129static struct plat_sci_port scif0_platform_data = {
130 { 130 .mapbase = 0xfe600000,
131 .mapbase = 0xfe600000, 131 .flags = UPF_BOOT_AUTOCONF,
132 .flags = UPF_BOOT_AUTOCONF, 132 .type = PORT_SCIF,
133 .type = PORT_SCIF, 133 .irqs = { 52, 53, 55, 54 },
134 .irqs = { 52, 53, 55, 54 }, 134};
135 }, { 135
136 .mapbase = 0xfe610000, 136static struct platform_device scif0_device = {
137 .flags = UPF_BOOT_AUTOCONF, 137 .name = "sh-sci",
138 .type = PORT_SCIF, 138 .id = 0,
139 .irqs = { 72, 73, 75, 74 }, 139 .dev = {
140 }, { 140 .platform_data = &scif0_platform_data,
141 .mapbase = 0xfe620000, 141 },
142 .flags = UPF_BOOT_AUTOCONF, 142};
143 .type = PORT_SCIF, 143
144 .irqs = { 76, 77, 79, 78 }, 144static struct plat_sci_port scif1_platform_data = {
145 }, { 145 .mapbase = 0xfe610000,
146 .mapbase = 0xfe480000, 146 .flags = UPF_BOOT_AUTOCONF,
147 .flags = UPF_BOOT_AUTOCONF, 147 .type = PORT_SCIF,
148 .type = PORT_SCI, 148 .irqs = { 72, 73, 75, 74 },
149 .irqs = { 80, 81, 82, 0 }, 149};
150 }, { 150
151 .flags = 0, 151static struct platform_device scif1_device = {
152 } 152 .name = "sh-sci",
153 .id = 1,
154 .dev = {
155 .platform_data = &scif1_platform_data,
156 },
157};
158
159static struct plat_sci_port scif2_platform_data = {
160 .mapbase = 0xfe620000,
161 .flags = UPF_BOOT_AUTOCONF,
162 .type = PORT_SCIF,
163 .irqs = { 76, 77, 79, 78 },
164};
165
166static struct platform_device scif2_device = {
167 .name = "sh-sci",
168 .id = 2,
169 .dev = {
170 .platform_data = &scif2_platform_data,
171 },
172};
173
174static struct plat_sci_port scif3_platform_data = {
175 .mapbase = 0xfe480000,
176 .flags = UPF_BOOT_AUTOCONF,
177 .type = PORT_SCI,
178 .irqs = { 80, 81, 82, 0 },
153}; 179};
154 180
155static struct platform_device sci_device = { 181static struct platform_device scif3_device = {
156 .name = "sh-sci", 182 .name = "sh-sci",
157 .id = -1, 183 .id = 3,
158 .dev = { 184 .dev = {
159 .platform_data = sci_platform_data, 185 .platform_data = &scif3_platform_data,
160 }, 186 },
161}; 187};
162 188
@@ -254,7 +280,10 @@ static struct platform_device tmu2_device = {
254 280
255 281
256static struct platform_device *sh7760_devices[] __initdata = { 282static struct platform_device *sh7760_devices[] __initdata = {
257 &sci_device, 283 &scif0_device,
284 &scif1_device,
285 &scif2_device,
286 &scif3_device,
258 &tmu0_device, 287 &tmu0_device,
259 &tmu1_device, 288 &tmu1_device,
260 &tmu2_device, 289 &tmu2_device,
@@ -268,6 +297,10 @@ static int __init sh7760_devices_setup(void)
268arch_initcall(sh7760_devices_setup); 297arch_initcall(sh7760_devices_setup);
269 298
270static struct platform_device *sh7760_early_devices[] __initdata = { 299static struct platform_device *sh7760_early_devices[] __initdata = {
300 &scif0_device,
301 &scif1_device,
302 &scif2_device,
303 &scif3_device,
271 &tmu0_device, 304 &tmu0_device,
272 &tmu1_device, 305 &tmu1_device,
273 &tmu2_device, 306 &tmu2_device,
@@ -286,7 +319,7 @@ void __init plat_irq_setup_pins(int mode)
286{ 319{
287 switch (mode) { 320 switch (mode) {
288 case IRQ_MODE_IRQ: 321 case IRQ_MODE_IRQ:
289 ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR); 322 __raw_writew(__raw_readw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
290 register_intc_controller(&intc_desc_irq); 323 register_intc_controller(&intc_desc_irq);
291 break; 324 break;
292 default: 325 default:
diff --git a/arch/sh/kernel/cpu/sh4/sq.c b/arch/sh/kernel/cpu/sh4/sq.c
index 8a8a993f55ea..14726eef1ce0 100644
--- a/arch/sh/kernel/cpu/sh4/sq.c
+++ b/arch/sh/kernel/cpu/sh4/sq.c
@@ -43,9 +43,9 @@ static unsigned long *sq_bitmap;
43 43
44#define store_queue_barrier() \ 44#define store_queue_barrier() \
45do { \ 45do { \
46 (void)ctrl_inl(P4SEG_STORE_QUE); \ 46 (void)__raw_readl(P4SEG_STORE_QUE); \
47 ctrl_outl(0, P4SEG_STORE_QUE + 0); \ 47 __raw_writel(0, P4SEG_STORE_QUE + 0); \
48 ctrl_outl(0, P4SEG_STORE_QUE + 8); \ 48 __raw_writel(0, P4SEG_STORE_QUE + 8); \
49} while (0); 49} while (0);
50 50
51/** 51/**
@@ -100,7 +100,7 @@ static inline void sq_mapping_list_del(struct sq_mapping *map)
100 spin_unlock_irq(&sq_mapping_lock); 100 spin_unlock_irq(&sq_mapping_lock);
101} 101}
102 102
103static int __sq_remap(struct sq_mapping *map, unsigned long flags) 103static int __sq_remap(struct sq_mapping *map, pgprot_t prot)
104{ 104{
105#if defined(CONFIG_MMU) 105#if defined(CONFIG_MMU)
106 struct vm_struct *vma; 106 struct vm_struct *vma;
@@ -113,7 +113,7 @@ static int __sq_remap(struct sq_mapping *map, unsigned long flags)
113 113
114 if (ioremap_page_range((unsigned long)vma->addr, 114 if (ioremap_page_range((unsigned long)vma->addr,
115 (unsigned long)vma->addr + map->size, 115 (unsigned long)vma->addr + map->size,
116 vma->phys_addr, __pgprot(flags))) { 116 vma->phys_addr, prot)) {
117 vunmap(vma->addr); 117 vunmap(vma->addr);
118 return -EAGAIN; 118 return -EAGAIN;
119 } 119 }
@@ -123,8 +123,8 @@ static int __sq_remap(struct sq_mapping *map, unsigned long flags)
123 * straightforward, as we can just load up each queue's QACR with 123 * straightforward, as we can just load up each queue's QACR with
124 * the physical address appropriately masked. 124 * the physical address appropriately masked.
125 */ 125 */
126 ctrl_outl(((map->addr >> 26) << 2) & 0x1c, SQ_QACR0); 126 __raw_writel(((map->addr >> 26) << 2) & 0x1c, SQ_QACR0);
127 ctrl_outl(((map->addr >> 26) << 2) & 0x1c, SQ_QACR1); 127 __raw_writel(((map->addr >> 26) << 2) & 0x1c, SQ_QACR1);
128#endif 128#endif
129 129
130 return 0; 130 return 0;
@@ -135,14 +135,14 @@ static int __sq_remap(struct sq_mapping *map, unsigned long flags)
135 * @phys: Physical address of mapping. 135 * @phys: Physical address of mapping.
136 * @size: Length of mapping. 136 * @size: Length of mapping.
137 * @name: User invoking mapping. 137 * @name: User invoking mapping.
138 * @flags: Protection flags. 138 * @prot: Protection bits.
139 * 139 *
140 * Remaps the physical address @phys through the next available store queue 140 * Remaps the physical address @phys through the next available store queue
141 * address of @size length. @name is logged at boot time as well as through 141 * address of @size length. @name is logged at boot time as well as through
142 * the sysfs interface. 142 * the sysfs interface.
143 */ 143 */
144unsigned long sq_remap(unsigned long phys, unsigned int size, 144unsigned long sq_remap(unsigned long phys, unsigned int size,
145 const char *name, unsigned long flags) 145 const char *name, pgprot_t prot)
146{ 146{
147 struct sq_mapping *map; 147 struct sq_mapping *map;
148 unsigned long end; 148 unsigned long end;
@@ -177,7 +177,7 @@ unsigned long sq_remap(unsigned long phys, unsigned int size,
177 177
178 map->sq_addr = P4SEG_STORE_QUE + (page << PAGE_SHIFT); 178 map->sq_addr = P4SEG_STORE_QUE + (page << PAGE_SHIFT);
179 179
180 ret = __sq_remap(map, pgprot_val(PAGE_KERNEL_NOCACHE) | flags); 180 ret = __sq_remap(map, prot);
181 if (unlikely(ret != 0)) 181 if (unlikely(ret != 0))
182 goto out; 182 goto out;
183 183
@@ -309,8 +309,7 @@ static ssize_t mapping_store(const char *buf, size_t count)
309 return -EIO; 309 return -EIO;
310 310
311 if (likely(len)) { 311 if (likely(len)) {
312 int ret = sq_remap(base, len, "Userspace", 312 int ret = sq_remap(base, len, "Userspace", PAGE_SHARED);
313 pgprot_val(PAGE_SHARED));
314 if (ret < 0) 313 if (ret < 0)
315 return ret; 314 return ret;
316 } else 315 } else
@@ -327,7 +326,7 @@ static struct attribute *sq_sysfs_attrs[] = {
327 NULL, 326 NULL,
328}; 327};
329 328
330static struct sysfs_ops sq_sysfs_ops = { 329static const struct sysfs_ops sq_sysfs_ops = {
331 .show = sq_sysfs_show, 330 .show = sq_sysfs_show,
332 .store = sq_sysfs_store, 331 .store = sq_sysfs_store,
333}; 332};
diff --git a/arch/sh/kernel/cpu/sh4a/Makefile b/arch/sh/kernel/cpu/sh4a/Makefile
index 490d5dc9e372..b144e8af89dc 100644
--- a/arch/sh/kernel/cpu/sh4a/Makefile
+++ b/arch/sh/kernel/cpu/sh4a/Makefile
@@ -41,6 +41,8 @@ pinmux-$(CONFIG_CPU_SUBTYPE_SH7757) := pinmux-sh7757.o
41pinmux-$(CONFIG_CPU_SUBTYPE_SH7785) := pinmux-sh7785.o 41pinmux-$(CONFIG_CPU_SUBTYPE_SH7785) := pinmux-sh7785.o
42pinmux-$(CONFIG_CPU_SUBTYPE_SH7786) := pinmux-sh7786.o 42pinmux-$(CONFIG_CPU_SUBTYPE_SH7786) := pinmux-sh7786.o
43 43
44obj-y += $(clock-y) 44obj-y += $(clock-y)
45obj-$(CONFIG_SMP) += $(smp-y) 45obj-$(CONFIG_SMP) += $(smp-y)
46obj-$(CONFIG_GENERIC_GPIO) += $(pinmux-y) 46obj-$(CONFIG_GENERIC_GPIO) += $(pinmux-y)
47obj-$(CONFIG_PERF_EVENTS) += perf_event.o
48obj-$(CONFIG_HAVE_HW_BREAKPOINT) += ubc.o
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7343.c b/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
index 0ee3ee861252..2c16df37eda6 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
@@ -107,13 +107,17 @@ struct clk *main_clks[] = {
107static int multipliers[] = { 1, 2, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1 }; 107static int multipliers[] = { 1, 2, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1 };
108static int divisors[] = { 1, 3, 2, 5, 3, 4, 5, 6, 8, 10, 12, 16, 20 }; 108static int divisors[] = { 1, 3, 2, 5, 3, 4, 5, 6, 8, 10, 12, 16, 20 };
109 109
110static struct clk_div_mult_table div4_table = { 110static struct clk_div_mult_table div4_div_mult_table = {
111 .divisors = divisors, 111 .divisors = divisors,
112 .nr_divisors = ARRAY_SIZE(divisors), 112 .nr_divisors = ARRAY_SIZE(divisors),
113 .multipliers = multipliers, 113 .multipliers = multipliers,
114 .nr_multipliers = ARRAY_SIZE(multipliers), 114 .nr_multipliers = ARRAY_SIZE(multipliers),
115}; 115};
116 116
117static struct clk_div4_table div4_table = {
118 .div_mult_table = &div4_div_mult_table,
119};
120
117enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P, 121enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P,
118 DIV4_SIUA, DIV4_SIUB, DIV4_NR }; 122 DIV4_SIUA, DIV4_SIUB, DIV4_NR };
119 123
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7366.c b/arch/sh/kernel/cpu/sh4a/clock-sh7366.c
index a95ebaba095c..91588d280cd8 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7366.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7366.c
@@ -110,13 +110,17 @@ struct clk *main_clks[] = {
110static int multipliers[] = { 1, 2, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1 }; 110static int multipliers[] = { 1, 2, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1 };
111static int divisors[] = { 1, 3, 2, 5, 3, 4, 5, 6, 8, 10, 12, 16, 20 }; 111static int divisors[] = { 1, 3, 2, 5, 3, 4, 5, 6, 8, 10, 12, 16, 20 };
112 112
113static struct clk_div_mult_table div4_table = { 113static struct clk_div_mult_table div4_div_mult_table = {
114 .divisors = divisors, 114 .divisors = divisors,
115 .nr_divisors = ARRAY_SIZE(divisors), 115 .nr_divisors = ARRAY_SIZE(divisors),
116 .multipliers = multipliers, 116 .multipliers = multipliers,
117 .nr_multipliers = ARRAY_SIZE(multipliers), 117 .nr_multipliers = ARRAY_SIZE(multipliers),
118}; 118};
119 119
120static struct clk_div4_table div4_table = {
121 .div_mult_table = &div4_div_mult_table,
122};
123
120enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P, 124enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P,
121 DIV4_SIUA, DIV4_SIUB, DIV4_NR }; 125 DIV4_SIUA, DIV4_SIUB, DIV4_NR };
122 126
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
index ea38b554dc05..15db6d521c5c 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
@@ -110,19 +110,22 @@ struct clk *main_clks[] = {
110static int multipliers[] = { 1, 2, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1 }; 110static int multipliers[] = { 1, 2, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1 };
111static int divisors[] = { 1, 3, 2, 5, 3, 4, 5, 6, 8, 10, 12, 16, 20 }; 111static int divisors[] = { 1, 3, 2, 5, 3, 4, 5, 6, 8, 10, 12, 16, 20 };
112 112
113static struct clk_div_mult_table div4_table = { 113static struct clk_div_mult_table div4_div_mult_table = {
114 .divisors = divisors, 114 .divisors = divisors,
115 .nr_divisors = ARRAY_SIZE(divisors), 115 .nr_divisors = ARRAY_SIZE(divisors),
116 .multipliers = multipliers, 116 .multipliers = multipliers,
117 .nr_multipliers = ARRAY_SIZE(multipliers), 117 .nr_multipliers = ARRAY_SIZE(multipliers),
118}; 118};
119 119
120enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P, 120static struct clk_div4_table div4_table = {
121 DIV4_SIUA, DIV4_SIUB, DIV4_IRDA, DIV4_NR }; 121 .div_mult_table = &div4_div_mult_table,
122};
122 123
123#define DIV4(_str, _reg, _bit, _mask, _flags) \ 124#define DIV4(_str, _reg, _bit, _mask, _flags) \
124 SH_CLK_DIV4(_str, &pll_clk, _reg, _bit, _mask, _flags) 125 SH_CLK_DIV4(_str, &pll_clk, _reg, _bit, _mask, _flags)
125 126
127enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P, DIV4_NR };
128
126struct clk div4_clks[DIV4_NR] = { 129struct clk div4_clks[DIV4_NR] = {
127 [DIV4_I] = DIV4("cpu_clk", FRQCR, 20, 0x1fef, CLK_ENABLE_ON_INIT), 130 [DIV4_I] = DIV4("cpu_clk", FRQCR, 20, 0x1fef, CLK_ENABLE_ON_INIT),
128 [DIV4_U] = DIV4("umem_clk", FRQCR, 16, 0x1fff, CLK_ENABLE_ON_INIT), 131 [DIV4_U] = DIV4("umem_clk", FRQCR, 16, 0x1fff, CLK_ENABLE_ON_INIT),
@@ -130,9 +133,19 @@ struct clk div4_clks[DIV4_NR] = {
130 [DIV4_B] = DIV4("bus_clk", FRQCR, 8, 0x1fff, CLK_ENABLE_ON_INIT), 133 [DIV4_B] = DIV4("bus_clk", FRQCR, 8, 0x1fff, CLK_ENABLE_ON_INIT),
131 [DIV4_B3] = DIV4("b3_clk", FRQCR, 4, 0x1fff, CLK_ENABLE_ON_INIT), 134 [DIV4_B3] = DIV4("b3_clk", FRQCR, 4, 0x1fff, CLK_ENABLE_ON_INIT),
132 [DIV4_P] = DIV4("peripheral_clk", FRQCR, 0, 0x1fff, 0), 135 [DIV4_P] = DIV4("peripheral_clk", FRQCR, 0, 0x1fff, 0),
136};
137
138enum { DIV4_IRDA, DIV4_ENABLE_NR };
139
140struct clk div4_enable_clks[DIV4_ENABLE_NR] = {
141 [DIV4_IRDA] = DIV4("irda_clk", IRDACLKCR, 0, 0x1fff, 0),
142};
143
144enum { DIV4_SIUA, DIV4_SIUB, DIV4_REPARENT_NR };
145
146struct clk div4_reparent_clks[DIV4_REPARENT_NR] = {
133 [DIV4_SIUA] = DIV4("siua_clk", SCLKACR, 0, 0x1fff, 0), 147 [DIV4_SIUA] = DIV4("siua_clk", SCLKACR, 0, 0x1fff, 0),
134 [DIV4_SIUB] = DIV4("siub_clk", SCLKBCR, 0, 0x1fff, 0), 148 [DIV4_SIUB] = DIV4("siub_clk", SCLKBCR, 0, 0x1fff, 0),
135 [DIV4_IRDA] = DIV4("irda_clk", IRDACLKCR, 0, 0x1fff, 0),
136}; 149};
137 150
138struct clk div6_clks[] = { 151struct clk div6_clks[] = {
@@ -189,6 +202,14 @@ int __init arch_clk_init(void)
189 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); 202 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
190 203
191 if (!ret) 204 if (!ret)
205 ret = sh_clk_div4_enable_register(div4_enable_clks,
206 DIV4_ENABLE_NR, &div4_table);
207
208 if (!ret)
209 ret = sh_clk_div4_reparent_register(div4_reparent_clks,
210 DIV4_REPARENT_NR, &div4_table);
211
212 if (!ret)
192 ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks)); 213 ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks));
193 214
194 if (!ret) 215 if (!ret)
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
index 20a31c2255a8..50babe01fe44 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
@@ -110,15 +110,18 @@ struct clk *main_clks[] = {
110static int multipliers[] = { 1, 2, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1 }; 110static int multipliers[] = { 1, 2, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1 };
111static int divisors[] = { 1, 3, 2, 5, 3, 4, 5, 6, 8, 10, 12, 16, 20 }; 111static int divisors[] = { 1, 3, 2, 5, 3, 4, 5, 6, 8, 10, 12, 16, 20 };
112 112
113static struct clk_div_mult_table div4_table = { 113static struct clk_div_mult_table div4_div_mult_table = {
114 .divisors = divisors, 114 .divisors = divisors,
115 .nr_divisors = ARRAY_SIZE(divisors), 115 .nr_divisors = ARRAY_SIZE(divisors),
116 .multipliers = multipliers, 116 .multipliers = multipliers,
117 .nr_multipliers = ARRAY_SIZE(multipliers), 117 .nr_multipliers = ARRAY_SIZE(multipliers),
118}; 118};
119 119
120enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P, 120static struct clk_div4_table div4_table = {
121 DIV4_SIUA, DIV4_SIUB, DIV4_IRDA, DIV4_NR }; 121 .div_mult_table = &div4_div_mult_table,
122};
123
124enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P, DIV4_NR };
122 125
123#define DIV4(_str, _reg, _bit, _mask, _flags) \ 126#define DIV4(_str, _reg, _bit, _mask, _flags) \
124 SH_CLK_DIV4(_str, &pll_clk, _reg, _bit, _mask, _flags) 127 SH_CLK_DIV4(_str, &pll_clk, _reg, _bit, _mask, _flags)
@@ -130,11 +133,20 @@ struct clk div4_clks[DIV4_NR] = {
130 [DIV4_B] = DIV4("bus_clk", FRQCR, 8, 0x0dbf, CLK_ENABLE_ON_INIT), 133 [DIV4_B] = DIV4("bus_clk", FRQCR, 8, 0x0dbf, CLK_ENABLE_ON_INIT),
131 [DIV4_B3] = DIV4("b3_clk", FRQCR, 4, 0x0db4, CLK_ENABLE_ON_INIT), 134 [DIV4_B3] = DIV4("b3_clk", FRQCR, 4, 0x0db4, CLK_ENABLE_ON_INIT),
132 [DIV4_P] = DIV4("peripheral_clk", FRQCR, 0, 0x0dbf, 0), 135 [DIV4_P] = DIV4("peripheral_clk", FRQCR, 0, 0x0dbf, 0),
133 [DIV4_SIUA] = DIV4("siua_clk", SCLKACR, 0, 0x0dbf, 0), 136};
134 [DIV4_SIUB] = DIV4("siub_clk", SCLKBCR, 0, 0x0dbf, 0), 137
138enum { DIV4_IRDA, DIV4_ENABLE_NR };
139
140struct clk div4_enable_clks[DIV4_ENABLE_NR] = {
135 [DIV4_IRDA] = DIV4("irda_clk", IRDACLKCR, 0, 0x0dbf, 0), 141 [DIV4_IRDA] = DIV4("irda_clk", IRDACLKCR, 0, 0x0dbf, 0),
136}; 142};
137 143
144enum { DIV4_SIUA, DIV4_SIUB, DIV4_REPARENT_NR };
145
146struct clk div4_reparent_clks[DIV4_REPARENT_NR] = {
147 [DIV4_SIUA] = DIV4("siua_clk", SCLKACR, 0, 0x0dbf, 0),
148 [DIV4_SIUB] = DIV4("siub_clk", SCLKBCR, 0, 0x0dbf, 0),
149};
138struct clk div6_clks[] = { 150struct clk div6_clks[] = {
139 SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0), 151 SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0),
140}; 152};
@@ -216,6 +228,14 @@ int __init arch_clk_init(void)
216 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); 228 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
217 229
218 if (!ret) 230 if (!ret)
231 ret = sh_clk_div4_enable_register(div4_enable_clks,
232 DIV4_ENABLE_NR, &div4_table);
233
234 if (!ret)
235 ret = sh_clk_div4_reparent_register(div4_reparent_clks,
236 DIV4_REPARENT_NR, &div4_table);
237
238 if (!ret)
219 ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks)); 239 ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks));
220 240
221 if (!ret) 241 if (!ret)
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
index dfe9192be63e..6707061fbf54 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
@@ -127,13 +127,28 @@ struct clk *main_clks[] = {
127 &div3_clk, 127 &div3_clk,
128}; 128};
129 129
130static void div4_kick(struct clk *clk)
131{
132 unsigned long value;
133
134 /* set KICK bit in FRQCRA to update hardware setting */
135 value = __raw_readl(FRQCRA);
136 value |= (1 << 31);
137 __raw_writel(value, FRQCRA);
138}
139
130static int divisors[] = { 2, 3, 4, 6, 8, 12, 16, 0, 24, 32, 36, 48, 0, 72 }; 140static int divisors[] = { 2, 3, 4, 6, 8, 12, 16, 0, 24, 32, 36, 48, 0, 72 };
131 141
132static struct clk_div_mult_table div4_table = { 142static struct clk_div_mult_table div4_div_mult_table = {
133 .divisors = divisors, 143 .divisors = divisors,
134 .nr_divisors = ARRAY_SIZE(divisors), 144 .nr_divisors = ARRAY_SIZE(divisors),
135}; 145};
136 146
147static struct clk_div4_table div4_table = {
148 .div_mult_table = &div4_div_mult_table,
149 .kick = div4_kick,
150};
151
137enum { DIV4_I, DIV4_SH, DIV4_B, DIV4_P, DIV4_M1, DIV4_NR }; 152enum { DIV4_I, DIV4_SH, DIV4_B, DIV4_P, DIV4_M1, DIV4_NR };
138 153
139#define DIV4(_str, _reg, _bit, _mask, _flags) \ 154#define DIV4(_str, _reg, _bit, _mask, _flags) \
@@ -144,7 +159,7 @@ struct clk div4_clks[DIV4_NR] = {
144 [DIV4_SH] = DIV4("shyway_clk", FRQCRA, 12, 0x2f7c, CLK_ENABLE_ON_INIT), 159 [DIV4_SH] = DIV4("shyway_clk", FRQCRA, 12, 0x2f7c, CLK_ENABLE_ON_INIT),
145 [DIV4_B] = DIV4("bus_clk", FRQCRA, 8, 0x2f7c, CLK_ENABLE_ON_INIT), 160 [DIV4_B] = DIV4("bus_clk", FRQCRA, 8, 0x2f7c, CLK_ENABLE_ON_INIT),
146 [DIV4_P] = DIV4("peripheral_clk", FRQCRA, 0, 0x2f7c, 0), 161 [DIV4_P] = DIV4("peripheral_clk", FRQCRA, 0, 0x2f7c, 0),
147 [DIV4_M1] = DIV4("vpu_clk", FRQCRB, 4, 0x2f7c, 0), 162 [DIV4_M1] = DIV4("vpu_clk", FRQCRB, 4, 0x2f7c, CLK_ENABLE_ON_INIT),
148}; 163};
149 164
150struct clk div6_clks[] = { 165struct clk div6_clks[] = {
@@ -152,7 +167,7 @@ struct clk div6_clks[] = {
152 SH_CLK_DIV6("fsia_clk", &div3_clk, FCLKACR, 0), 167 SH_CLK_DIV6("fsia_clk", &div3_clk, FCLKACR, 0),
153 SH_CLK_DIV6("fsib_clk", &div3_clk, FCLKBCR, 0), 168 SH_CLK_DIV6("fsib_clk", &div3_clk, FCLKBCR, 0),
154 SH_CLK_DIV6("irda_clk", &div3_clk, IRDACLKCR, 0), 169 SH_CLK_DIV6("irda_clk", &div3_clk, IRDACLKCR, 0),
155 SH_CLK_DIV6("spu_clk", &div3_clk, SPUCLKCR, 0), 170 SH_CLK_DIV6("spu_clk", &div3_clk, SPUCLKCR, CLK_ENABLE_ON_INIT),
156}; 171};
157 172
158#define R_CLK (&r_clk) 173#define R_CLK (&r_clk)
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7757.c b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
index ddc235ca9664..86aae60677dc 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
@@ -35,7 +35,7 @@ static struct clk_ops sh7757_master_clk_ops = {
35 35
36static void module_clk_recalc(struct clk *clk) 36static void module_clk_recalc(struct clk *clk)
37{ 37{
38 int idx = ctrl_inl(FRQCR) & 0x0000000f; 38 int idx = __raw_readl(FRQCR) & 0x0000000f;
39 clk->rate = clk->parent->rate / p1fc_divisors[idx]; 39 clk->rate = clk->parent->rate / p1fc_divisors[idx];
40} 40}
41 41
@@ -45,7 +45,7 @@ static struct clk_ops sh7757_module_clk_ops = {
45 45
46static void bus_clk_recalc(struct clk *clk) 46static void bus_clk_recalc(struct clk *clk)
47{ 47{
48 int idx = (ctrl_inl(FRQCR) >> 8) & 0x0000000f; 48 int idx = (__raw_readl(FRQCR) >> 8) & 0x0000000f;
49 clk->rate = clk->parent->rate / bfc_divisors[idx]; 49 clk->rate = clk->parent->rate / bfc_divisors[idx];
50} 50}
51 51
@@ -55,7 +55,7 @@ static struct clk_ops sh7757_bus_clk_ops = {
55 55
56static void cpu_clk_recalc(struct clk *clk) 56static void cpu_clk_recalc(struct clk *clk)
57{ 57{
58 int idx = (ctrl_inl(FRQCR) >> 20) & 0x0000000f; 58 int idx = (__raw_readl(FRQCR) >> 20) & 0x0000000f;
59 clk->rate = clk->parent->rate / ifc_divisors[idx]; 59 clk->rate = clk->parent->rate / ifc_divisors[idx];
60} 60}
61 61
@@ -78,7 +78,7 @@ void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
78 78
79static void shyway_clk_recalc(struct clk *clk) 79static void shyway_clk_recalc(struct clk *clk)
80{ 80{
81 int idx = (ctrl_inl(FRQCR) >> 12) & 0x0000000f; 81 int idx = (__raw_readl(FRQCR) >> 12) & 0x0000000f;
82 clk->rate = clk->parent->rate / sfc_divisors[idx]; 82 clk->rate = clk->parent->rate / sfc_divisors[idx];
83} 83}
84 84
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7763.c b/arch/sh/kernel/cpu/sh4a/clock-sh7763.c
index 370cd47642ef..9f401163e71e 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7763.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7763.c
@@ -22,7 +22,7 @@ static int cfc_divisors[] = { 1, 1, 4, 1, 1, 1, 1, 1 };
22 22
23static void master_clk_init(struct clk *clk) 23static void master_clk_init(struct clk *clk)
24{ 24{
25 clk->rate *= p0fc_divisors[(ctrl_inl(FRQCR) >> 4) & 0x07]; 25 clk->rate *= p0fc_divisors[(__raw_readl(FRQCR) >> 4) & 0x07];
26} 26}
27 27
28static struct clk_ops sh7763_master_clk_ops = { 28static struct clk_ops sh7763_master_clk_ops = {
@@ -31,7 +31,7 @@ static struct clk_ops sh7763_master_clk_ops = {
31 31
32static unsigned long module_clk_recalc(struct clk *clk) 32static unsigned long module_clk_recalc(struct clk *clk)
33{ 33{
34 int idx = ((ctrl_inl(FRQCR) >> 4) & 0x07); 34 int idx = ((__raw_readl(FRQCR) >> 4) & 0x07);
35 return clk->parent->rate / p0fc_divisors[idx]; 35 return clk->parent->rate / p0fc_divisors[idx];
36} 36}
37 37
@@ -41,7 +41,7 @@ static struct clk_ops sh7763_module_clk_ops = {
41 41
42static unsigned long bus_clk_recalc(struct clk *clk) 42static unsigned long bus_clk_recalc(struct clk *clk)
43{ 43{
44 int idx = ((ctrl_inl(FRQCR) >> 16) & 0x07); 44 int idx = ((__raw_readl(FRQCR) >> 16) & 0x07);
45 return clk->parent->rate / bfc_divisors[idx]; 45 return clk->parent->rate / bfc_divisors[idx];
46} 46}
47 47
@@ -68,7 +68,7 @@ void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
68 68
69static unsigned long shyway_clk_recalc(struct clk *clk) 69static unsigned long shyway_clk_recalc(struct clk *clk)
70{ 70{
71 int idx = ((ctrl_inl(FRQCR) >> 20) & 0x07); 71 int idx = ((__raw_readl(FRQCR) >> 20) & 0x07);
72 return clk->parent->rate / cfc_divisors[idx]; 72 return clk->parent->rate / cfc_divisors[idx];
73} 73}
74 74
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7770.c b/arch/sh/kernel/cpu/sh4a/clock-sh7770.c
index e0b896769205..9e3354365d40 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7770.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7770.c
@@ -21,7 +21,7 @@ static int pfc_divisors[] = { 1, 8, 1,10,12,16, 1, 1 };
21 21
22static void master_clk_init(struct clk *clk) 22static void master_clk_init(struct clk *clk)
23{ 23{
24 clk->rate *= pfc_divisors[(ctrl_inl(FRQCR) >> 28) & 0x000f]; 24 clk->rate *= pfc_divisors[(__raw_readl(FRQCR) >> 28) & 0x000f];
25} 25}
26 26
27static struct clk_ops sh7770_master_clk_ops = { 27static struct clk_ops sh7770_master_clk_ops = {
@@ -30,7 +30,7 @@ static struct clk_ops sh7770_master_clk_ops = {
30 30
31static unsigned long module_clk_recalc(struct clk *clk) 31static unsigned long module_clk_recalc(struct clk *clk)
32{ 32{
33 int idx = ((ctrl_inl(FRQCR) >> 28) & 0x000f); 33 int idx = ((__raw_readl(FRQCR) >> 28) & 0x000f);
34 return clk->parent->rate / pfc_divisors[idx]; 34 return clk->parent->rate / pfc_divisors[idx];
35} 35}
36 36
@@ -40,7 +40,7 @@ static struct clk_ops sh7770_module_clk_ops = {
40 40
41static unsigned long bus_clk_recalc(struct clk *clk) 41static unsigned long bus_clk_recalc(struct clk *clk)
42{ 42{
43 int idx = (ctrl_inl(FRQCR) & 0x000f); 43 int idx = (__raw_readl(FRQCR) & 0x000f);
44 return clk->parent->rate / bfc_divisors[idx]; 44 return clk->parent->rate / bfc_divisors[idx];
45} 45}
46 46
@@ -50,7 +50,7 @@ static struct clk_ops sh7770_bus_clk_ops = {
50 50
51static unsigned long cpu_clk_recalc(struct clk *clk) 51static unsigned long cpu_clk_recalc(struct clk *clk)
52{ 52{
53 int idx = ((ctrl_inl(FRQCR) >> 24) & 0x000f); 53 int idx = ((__raw_readl(FRQCR) >> 24) & 0x000f);
54 return clk->parent->rate / ifc_divisors[idx]; 54 return clk->parent->rate / ifc_divisors[idx];
55} 55}
56 56
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7780.c b/arch/sh/kernel/cpu/sh4a/clock-sh7780.c
index a249d823578e..150963a6001e 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7780.c
@@ -22,7 +22,7 @@ static int cfc_divisors[] = { 1, 1, 4, 1, 6, 1, 1, 1 };
22 22
23static void master_clk_init(struct clk *clk) 23static void master_clk_init(struct clk *clk)
24{ 24{
25 clk->rate *= pfc_divisors[ctrl_inl(FRQCR) & 0x0003]; 25 clk->rate *= pfc_divisors[__raw_readl(FRQCR) & 0x0003];
26} 26}
27 27
28static struct clk_ops sh7780_master_clk_ops = { 28static struct clk_ops sh7780_master_clk_ops = {
@@ -31,7 +31,7 @@ static struct clk_ops sh7780_master_clk_ops = {
31 31
32static unsigned long module_clk_recalc(struct clk *clk) 32static unsigned long module_clk_recalc(struct clk *clk)
33{ 33{
34 int idx = (ctrl_inl(FRQCR) & 0x0003); 34 int idx = (__raw_readl(FRQCR) & 0x0003);
35 return clk->parent->rate / pfc_divisors[idx]; 35 return clk->parent->rate / pfc_divisors[idx];
36} 36}
37 37
@@ -41,7 +41,7 @@ static struct clk_ops sh7780_module_clk_ops = {
41 41
42static unsigned long bus_clk_recalc(struct clk *clk) 42static unsigned long bus_clk_recalc(struct clk *clk)
43{ 43{
44 int idx = ((ctrl_inl(FRQCR) >> 16) & 0x0007); 44 int idx = ((__raw_readl(FRQCR) >> 16) & 0x0007);
45 return clk->parent->rate / bfc_divisors[idx]; 45 return clk->parent->rate / bfc_divisors[idx];
46} 46}
47 47
@@ -51,7 +51,7 @@ static struct clk_ops sh7780_bus_clk_ops = {
51 51
52static unsigned long cpu_clk_recalc(struct clk *clk) 52static unsigned long cpu_clk_recalc(struct clk *clk)
53{ 53{
54 int idx = ((ctrl_inl(FRQCR) >> 24) & 0x0001); 54 int idx = ((__raw_readl(FRQCR) >> 24) & 0x0001);
55 return clk->parent->rate / ifc_divisors[idx]; 55 return clk->parent->rate / ifc_divisors[idx];
56} 56}
57 57
@@ -74,7 +74,7 @@ void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
74 74
75static unsigned long shyway_clk_recalc(struct clk *clk) 75static unsigned long shyway_clk_recalc(struct clk *clk)
76{ 76{
77 int idx = ((ctrl_inl(FRQCR) >> 20) & 0x0007); 77 int idx = ((__raw_readl(FRQCR) >> 20) & 0x0007);
78 return clk->parent->rate / cfc_divisors[idx]; 78 return clk->parent->rate / cfc_divisors[idx];
79} 79}
80 80
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7785.c b/arch/sh/kernel/cpu/sh4a/clock-sh7785.c
index 73abfbf2f16d..d997f0a25b10 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7785.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7785.c
@@ -57,11 +57,15 @@ static struct clk *clks[] = {
57static unsigned int div2[] = { 1, 2, 4, 6, 8, 12, 16, 18, 57static unsigned int div2[] = { 1, 2, 4, 6, 8, 12, 16, 18,
58 24, 32, 36, 48 }; 58 24, 32, 36, 48 };
59 59
60static struct clk_div_mult_table div4_table = { 60static struct clk_div_mult_table div4_div_mult_table = {
61 .divisors = div2, 61 .divisors = div2,
62 .nr_divisors = ARRAY_SIZE(div2), 62 .nr_divisors = ARRAY_SIZE(div2),
63}; 63};
64 64
65static struct clk_div4_table div4_table = {
66 .div_mult_table = &div4_div_mult_table,
67};
68
65enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_DDR, DIV4_GA, 69enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_DDR, DIV4_GA,
66 DIV4_DU, DIV4_P, DIV4_NR }; 70 DIV4_DU, DIV4_P, DIV4_NR };
67 71
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7786.c b/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
index a0e8869071ac..af69fd468703 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
@@ -3,11 +3,7 @@
3 * 3 *
4 * SH7786 support for the clock framework 4 * SH7786 support for the clock framework
5 * 5 *
6 * Copyright (C) 2008, 2009 Renesas Solutions Corp. 6 * Copyright (C) 2010 Paul Mundt
7 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
8 *
9 * Based on SH7785
10 * Copyright (C) 2007 Paul Mundt
11 * 7 *
12 * This file is subject to the terms and conditions of the GNU General Public 8 * This file is subject to the terms and conditions of the GNU General Public
13 * License. See the file "COPYING" in the main directory of this archive 9 * License. See the file "COPYING" in the main directory of this archive
@@ -15,127 +11,127 @@
15 */ 11 */
16#include <linux/init.h> 12#include <linux/init.h>
17#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/clk.h>
15#include <linux/io.h>
18#include <asm/clock.h> 16#include <asm/clock.h>
19#include <asm/freq.h> 17#include <asm/freq.h>
20#include <asm/io.h>
21
22static int ifc_divisors[] = { 1, 2, 4, 1 };
23static int sfc_divisors[] = { 1, 1, 4, 1 };
24static int bfc_divisors[] = { 1, 1, 1, 1, 1, 12, 16, 1,
25 24, 32, 1, 1, 1, 1, 1, 1 };
26static int mfc_divisors[] = { 1, 1, 4, 1 };
27static int pfc_divisors[] = { 1, 1, 1, 1, 1, 1, 16, 1,
28 24, 32, 1, 48, 1, 1, 1, 1 };
29 18
30static void master_clk_init(struct clk *clk) 19/*
31{ 20 * Default rate for the root input clock, reset this with clk_set_rate()
32 clk->rate *= pfc_divisors[ctrl_inl(FRQMR1) & 0x000f]; 21 * from the platform code.
33} 22 */
34 23static struct clk extal_clk = {
35static struct clk_ops sh7786_master_clk_ops = { 24 .name = "extal",
36 .init = master_clk_init, 25 .id = -1,
26 .rate = 33333333,
37}; 27};
38 28
39static unsigned long module_clk_recalc(struct clk *clk) 29static unsigned long pll_recalc(struct clk *clk)
40{ 30{
41 int idx = (ctrl_inl(FRQMR1) & 0x000f); 31 int multiplier;
42 return clk->parent->rate / pfc_divisors[idx];
43}
44 32
45static struct clk_ops sh7786_module_clk_ops = { 33 /*
46 .recalc = module_clk_recalc, 34 * Clock modes 0, 1, and 2 use an x64 multiplier against PLL1,
47}; 35 * while modes 3, 4, and 5 use an x32.
36 */
37 multiplier = (sh_mv.mv_mode_pins() & 0xf) < 3 ? 64 : 32;
48 38
49static unsigned long bus_clk_recalc(struct clk *clk) 39 return clk->parent->rate * multiplier;
50{
51 int idx = ((ctrl_inl(FRQMR1) >> 16) & 0x000f);
52 return clk->parent->rate / bfc_divisors[idx];
53} 40}
54 41
55static struct clk_ops sh7786_bus_clk_ops = { 42static struct clk_ops pll_clk_ops = {
56 .recalc = bus_clk_recalc, 43 .recalc = pll_recalc,
57}; 44};
58 45
59static unsigned long cpu_clk_recalc(struct clk *clk) 46static struct clk pll_clk = {
60{ 47 .name = "pll_clk",
61 int idx = ((ctrl_inl(FRQMR1) >> 28) & 0x0003); 48 .id = -1,
62 return clk->parent->rate / ifc_divisors[idx]; 49 .ops = &pll_clk_ops,
63} 50 .parent = &extal_clk,
64 51 .flags = CLK_ENABLE_ON_INIT,
65static struct clk_ops sh7786_cpu_clk_ops = {
66 .recalc = cpu_clk_recalc,
67}; 52};
68 53
69static struct clk_ops *sh7786_clk_ops[] = { 54static struct clk *clks[] = {
70 &sh7786_master_clk_ops, 55 &extal_clk,
71 &sh7786_module_clk_ops, 56 &pll_clk,
72 &sh7786_bus_clk_ops,
73 &sh7786_cpu_clk_ops,
74}; 57};
75 58
76void __init arch_init_clk_ops(struct clk_ops **ops, int idx) 59static unsigned int div2[] = { 1, 2, 4, 6, 8, 12, 16, 18,
77{ 60 24, 32, 36, 48 };
78 if (idx < ARRAY_SIZE(sh7786_clk_ops))
79 *ops = sh7786_clk_ops[idx];
80}
81 61
82static unsigned long shyway_clk_recalc(struct clk *clk) 62static struct clk_div_mult_table div4_div_mult_table = {
83{ 63 .divisors = div2,
84 int idx = ((ctrl_inl(FRQMR1) >> 20) & 0x0003); 64 .nr_divisors = ARRAY_SIZE(div2),
85 return clk->parent->rate / sfc_divisors[idx];
86}
87
88static struct clk_ops sh7786_shyway_clk_ops = {
89 .recalc = shyway_clk_recalc,
90}; 65};
91 66
92static struct clk sh7786_shyway_clk = { 67static struct clk_div4_table div4_table = {
93 .name = "shyway_clk", 68 .div_mult_table = &div4_div_mult_table,
94 .flags = CLK_ENABLE_ON_INIT,
95 .ops = &sh7786_shyway_clk_ops,
96}; 69};
97 70
98static unsigned long ddr_clk_recalc(struct clk *clk) 71enum { DIV4_I, DIV4_SH, DIV4_B, DIV4_DDR, DIV4_DU, DIV4_P, DIV4_NR };
99{
100 int idx = ((ctrl_inl(FRQMR1) >> 12) & 0x0003);
101 return clk->parent->rate / mfc_divisors[idx];
102}
103 72
104static struct clk_ops sh7786_ddr_clk_ops = { 73#define DIV4(_str, _bit, _mask, _flags) \
105 .recalc = ddr_clk_recalc, 74 SH_CLK_DIV4(_str, &pll_clk, FRQMR1, _bit, _mask, _flags)
106};
107 75
108static struct clk sh7786_ddr_clk = { 76struct clk div4_clks[DIV4_NR] = {
109 .name = "ddr_clk", 77 [DIV4_P] = DIV4("peripheral_clk", 0, 0x0b40, 0),
110 .flags = CLK_ENABLE_ON_INIT, 78 [DIV4_DU] = DIV4("du_clk", 4, 0x0010, 0),
111 .ops = &sh7786_ddr_clk_ops, 79 [DIV4_DDR] = DIV4("ddr_clk", 12, 0x0002, CLK_ENABLE_ON_INIT),
80 [DIV4_B] = DIV4("bus_clk", 16, 0x0360, CLK_ENABLE_ON_INIT),
81 [DIV4_SH] = DIV4("shyway_clk", 20, 0x0002, CLK_ENABLE_ON_INIT),
82 [DIV4_I] = DIV4("cpu_clk", 28, 0x0006, CLK_ENABLE_ON_INIT),
112}; 83};
113 84
114/* 85#define MSTPCR0 0xffc40030
115 * Additional SH7786-specific on-chip clocks that aren't already part of the 86#define MSTPCR1 0xffc40034
116 * clock framework 87
117 */ 88static struct clk mstp_clks[] = {
118static struct clk *sh7786_onchip_clocks[] = { 89 /* MSTPCR0 */
119 &sh7786_shyway_clk, 90 SH_CLK_MSTP32("scif_fck", 5, &div4_clks[DIV4_P], MSTPCR0, 29, 0),
120 &sh7786_ddr_clk, 91 SH_CLK_MSTP32("scif_fck", 4, &div4_clks[DIV4_P], MSTPCR0, 28, 0),
92 SH_CLK_MSTP32("scif_fck", 3, &div4_clks[DIV4_P], MSTPCR0, 27, 0),
93 SH_CLK_MSTP32("scif_fck", 2, &div4_clks[DIV4_P], MSTPCR0, 26, 0),
94 SH_CLK_MSTP32("scif_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 25, 0),
95 SH_CLK_MSTP32("scif_fck", 0, &div4_clks[DIV4_P], MSTPCR0, 24, 0),
96 SH_CLK_MSTP32("ssi_fck", 3, &div4_clks[DIV4_P], MSTPCR0, 23, 0),
97 SH_CLK_MSTP32("ssi_fck", 2, &div4_clks[DIV4_P], MSTPCR0, 22, 0),
98 SH_CLK_MSTP32("ssi_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 21, 0),
99 SH_CLK_MSTP32("ssi_fck", 0, &div4_clks[DIV4_P], MSTPCR0, 20, 0),
100 SH_CLK_MSTP32("hac_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 17, 0),
101 SH_CLK_MSTP32("hac_fck", 0, &div4_clks[DIV4_P], MSTPCR0, 16, 0),
102 SH_CLK_MSTP32("i2c_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 15, 0),
103 SH_CLK_MSTP32("i2c_fck", 0, &div4_clks[DIV4_P], MSTPCR0, 14, 0),
104 SH_CLK_MSTP32("tmu9_11_fck", -1, &div4_clks[DIV4_P], MSTPCR0, 11, 0),
105 SH_CLK_MSTP32("tmu678_fck", -1, &div4_clks[DIV4_P], MSTPCR0, 10, 0),
106 SH_CLK_MSTP32("tmu345_fck", -1, &div4_clks[DIV4_P], MSTPCR0, 9, 0),
107 SH_CLK_MSTP32("tmu012_fck", -1, &div4_clks[DIV4_P], MSTPCR0, 8, 0),
108 SH_CLK_MSTP32("sdif_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 5, 0),
109 SH_CLK_MSTP32("sdif_fck", 0, &div4_clks[DIV4_P], MSTPCR0, 4, 0),
110 SH_CLK_MSTP32("hspi_fck", -1, &div4_clks[DIV4_P], MSTPCR0, 2, 0),
111
112 /* MSTPCR1 */
113 SH_CLK_MSTP32("usb_fck", -1, NULL, MSTPCR1, 12, 0),
114 SH_CLK_MSTP32("pcie_fck", 2, NULL, MSTPCR1, 10, 0),
115 SH_CLK_MSTP32("pcie_fck", 1, NULL, MSTPCR1, 9, 0),
116 SH_CLK_MSTP32("pcie_fck", 0, NULL, MSTPCR1, 8, 0),
117 SH_CLK_MSTP32("dmac_11_6_fck", -1, NULL, MSTPCR1, 5, 0),
118 SH_CLK_MSTP32("dmac_5_0_fck", -1, NULL, MSTPCR1, 4, 0),
119 SH_CLK_MSTP32("du_fck", -1, NULL, MSTPCR1, 3, 0),
120 SH_CLK_MSTP32("ether_fck", -1, NULL, MSTPCR1, 2, 0),
121}; 121};
122 122
123int __init arch_clk_init(void) 123int __init arch_clk_init(void)
124{ 124{
125 struct clk *clk;
126 int i, ret = 0; 125 int i, ret = 0;
127 126
128 cpg_clk_init(); 127 for (i = 0; i < ARRAY_SIZE(clks); i++)
129 128 ret |= clk_register(clks[i]);
130 clk = clk_get(NULL, "master_clk");
131 for (i = 0; i < ARRAY_SIZE(sh7786_onchip_clocks); i++) {
132 struct clk *clkp = sh7786_onchip_clocks[i];
133
134 clkp->parent = clk;
135 ret |= clk_register(clkp);
136 }
137 129
138 clk_put(clk); 130 if (!ret)
131 ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks),
132 &div4_table);
133 if (!ret)
134 ret = sh_clk_mstp32_register(mstp_clks, ARRAY_SIZE(mstp_clks));
139 135
140 return ret; 136 return ret;
141} 137}
diff --git a/arch/sh/kernel/cpu/sh4a/clock-shx3.c b/arch/sh/kernel/cpu/sh4a/clock-shx3.c
index 23c27d32d982..e75c57bdfa5e 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-shx3.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-shx3.c
@@ -33,7 +33,7 @@ static int cfc_divisors[] = { 1, 1, 4, 6 };
33 33
34static void master_clk_init(struct clk *clk) 34static void master_clk_init(struct clk *clk)
35{ 35{
36 clk->rate *= pfc_divisors[(ctrl_inl(FRQCR) >> PFC_POS) & PFC_MSK]; 36 clk->rate *= pfc_divisors[(__raw_readl(FRQCR) >> PFC_POS) & PFC_MSK];
37} 37}
38 38
39static struct clk_ops shx3_master_clk_ops = { 39static struct clk_ops shx3_master_clk_ops = {
@@ -42,7 +42,7 @@ static struct clk_ops shx3_master_clk_ops = {
42 42
43static unsigned long module_clk_recalc(struct clk *clk) 43static unsigned long module_clk_recalc(struct clk *clk)
44{ 44{
45 int idx = ((ctrl_inl(FRQCR) >> PFC_POS) & PFC_MSK); 45 int idx = ((__raw_readl(FRQCR) >> PFC_POS) & PFC_MSK);
46 return clk->parent->rate / pfc_divisors[idx]; 46 return clk->parent->rate / pfc_divisors[idx];
47} 47}
48 48
@@ -52,7 +52,7 @@ static struct clk_ops shx3_module_clk_ops = {
52 52
53static unsigned long bus_clk_recalc(struct clk *clk) 53static unsigned long bus_clk_recalc(struct clk *clk)
54{ 54{
55 int idx = ((ctrl_inl(FRQCR) >> BFC_POS) & BFC_MSK); 55 int idx = ((__raw_readl(FRQCR) >> BFC_POS) & BFC_MSK);
56 return clk->parent->rate / bfc_divisors[idx]; 56 return clk->parent->rate / bfc_divisors[idx];
57} 57}
58 58
@@ -62,7 +62,7 @@ static struct clk_ops shx3_bus_clk_ops = {
62 62
63static unsigned long cpu_clk_recalc(struct clk *clk) 63static unsigned long cpu_clk_recalc(struct clk *clk)
64{ 64{
65 int idx = ((ctrl_inl(FRQCR) >> IFC_POS) & IFC_MSK); 65 int idx = ((__raw_readl(FRQCR) >> IFC_POS) & IFC_MSK);
66 return clk->parent->rate / ifc_divisors[idx]; 66 return clk->parent->rate / ifc_divisors[idx];
67} 67}
68 68
@@ -85,7 +85,7 @@ void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
85 85
86static unsigned long shyway_clk_recalc(struct clk *clk) 86static unsigned long shyway_clk_recalc(struct clk *clk)
87{ 87{
88 int idx = ((ctrl_inl(FRQCR) >> CFC_POS) & CFC_MSK); 88 int idx = ((__raw_readl(FRQCR) >> CFC_POS) & CFC_MSK);
89 return clk->parent->rate / cfc_divisors[idx]; 89 return clk->parent->rate / cfc_divisors[idx];
90} 90}
91 91
diff --git a/arch/sh/kernel/cpu/sh4a/perf_event.c b/arch/sh/kernel/cpu/sh4a/perf_event.c
new file mode 100644
index 000000000000..eddc21973fa1
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4a/perf_event.c
@@ -0,0 +1,269 @@
1/*
2 * Performance events support for SH-4A performance counters
3 *
4 * Copyright (C) 2009 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/kernel.h>
11#include <linux/init.h>
12#include <linux/io.h>
13#include <linux/irq.h>
14#include <linux/perf_event.h>
15#include <asm/processor.h>
16
17#define PPC_CCBR(idx) (0xff200800 + (sizeof(u32) * idx))
18#define PPC_PMCTR(idx) (0xfc100000 + (sizeof(u32) * idx))
19
20#define CCBR_CIT_MASK (0x7ff << 6)
21#define CCBR_DUC (1 << 3)
22#define CCBR_CMDS (1 << 1)
23#define CCBR_PPCE (1 << 0)
24
25#define PPC_PMCAT 0xfc100080
26
27#define PMCAT_OVF3 (1 << 27)
28#define PMCAT_CNN3 (1 << 26)
29#define PMCAT_CLR3 (1 << 25)
30#define PMCAT_OVF2 (1 << 19)
31#define PMCAT_CLR2 (1 << 17)
32#define PMCAT_OVF1 (1 << 11)
33#define PMCAT_CNN1 (1 << 10)
34#define PMCAT_CLR1 (1 << 9)
35#define PMCAT_OVF0 (1 << 3)
36#define PMCAT_CLR0 (1 << 1)
37
38static struct sh_pmu sh4a_pmu;
39
40/*
41 * Supported raw event codes:
42 *
43 * Event Code Description
44 * ---------- -----------
45 *
46 * 0x0000 number of elapsed cycles
47 * 0x0200 number of elapsed cycles in privileged mode
48 * 0x0280 number of elapsed cycles while SR.BL is asserted
49 * 0x0202 instruction execution
50 * 0x0203 instruction execution in parallel
51 * 0x0204 number of unconditional branches
52 * 0x0208 number of exceptions
53 * 0x0209 number of interrupts
54 * 0x0220 UTLB miss caused by instruction fetch
55 * 0x0222 UTLB miss caused by operand access
56 * 0x02a0 number of ITLB misses
57 * 0x0028 number of accesses to instruction memories
58 * 0x0029 number of accesses to instruction cache
59 * 0x002a instruction cache miss
60 * 0x022e number of access to instruction X/Y memory
61 * 0x0030 number of reads to operand memories
62 * 0x0038 number of writes to operand memories
63 * 0x0031 number of operand cache read accesses
64 * 0x0039 number of operand cache write accesses
65 * 0x0032 operand cache read miss
66 * 0x003a operand cache write miss
67 * 0x0236 number of reads to operand X/Y memory
68 * 0x023e number of writes to operand X/Y memory
69 * 0x0237 number of reads to operand U memory
70 * 0x023f number of writes to operand U memory
71 * 0x0337 number of U memory read buffer misses
72 * 0x02b4 number of wait cycles due to operand read access
73 * 0x02bc number of wait cycles due to operand write access
74 * 0x0033 number of wait cycles due to operand cache read miss
75 * 0x003b number of wait cycles due to operand cache write miss
76 */
77
78/*
79 * Special reserved bits used by hardware emulators, read values will
80 * vary, but writes must always be 0.
81 */
82#define PMCAT_EMU_CLR_MASK ((1 << 24) | (1 << 16) | (1 << 8) | (1 << 0))
83
84static const int sh4a_general_events[] = {
85 [PERF_COUNT_HW_CPU_CYCLES] = 0x0000,
86 [PERF_COUNT_HW_INSTRUCTIONS] = 0x0202,
87 [PERF_COUNT_HW_CACHE_REFERENCES] = 0x0029, /* I-cache */
88 [PERF_COUNT_HW_CACHE_MISSES] = 0x002a, /* I-cache */
89 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 0x0204,
90 [PERF_COUNT_HW_BRANCH_MISSES] = -1,
91 [PERF_COUNT_HW_BUS_CYCLES] = -1,
92};
93
94#define C(x) PERF_COUNT_HW_CACHE_##x
95
96static const int sh4a_cache_events
97 [PERF_COUNT_HW_CACHE_MAX]
98 [PERF_COUNT_HW_CACHE_OP_MAX]
99 [PERF_COUNT_HW_CACHE_RESULT_MAX] =
100{
101 [ C(L1D) ] = {
102 [ C(OP_READ) ] = {
103 [ C(RESULT_ACCESS) ] = 0x0031,
104 [ C(RESULT_MISS) ] = 0x0032,
105 },
106 [ C(OP_WRITE) ] = {
107 [ C(RESULT_ACCESS) ] = 0x0039,
108 [ C(RESULT_MISS) ] = 0x003a,
109 },
110 [ C(OP_PREFETCH) ] = {
111 [ C(RESULT_ACCESS) ] = 0,
112 [ C(RESULT_MISS) ] = 0,
113 },
114 },
115
116 [ C(L1I) ] = {
117 [ C(OP_READ) ] = {
118 [ C(RESULT_ACCESS) ] = 0x0029,
119 [ C(RESULT_MISS) ] = 0x002a,
120 },
121 [ C(OP_WRITE) ] = {
122 [ C(RESULT_ACCESS) ] = -1,
123 [ C(RESULT_MISS) ] = -1,
124 },
125 [ C(OP_PREFETCH) ] = {
126 [ C(RESULT_ACCESS) ] = 0,
127 [ C(RESULT_MISS) ] = 0,
128 },
129 },
130
131 [ C(LL) ] = {
132 [ C(OP_READ) ] = {
133 [ C(RESULT_ACCESS) ] = 0x0030,
134 [ C(RESULT_MISS) ] = 0,
135 },
136 [ C(OP_WRITE) ] = {
137 [ C(RESULT_ACCESS) ] = 0x0038,
138 [ C(RESULT_MISS) ] = 0,
139 },
140 [ C(OP_PREFETCH) ] = {
141 [ C(RESULT_ACCESS) ] = 0,
142 [ C(RESULT_MISS) ] = 0,
143 },
144 },
145
146 [ C(DTLB) ] = {
147 [ C(OP_READ) ] = {
148 [ C(RESULT_ACCESS) ] = 0x0222,
149 [ C(RESULT_MISS) ] = 0x0220,
150 },
151 [ C(OP_WRITE) ] = {
152 [ C(RESULT_ACCESS) ] = 0,
153 [ C(RESULT_MISS) ] = 0,
154 },
155 [ C(OP_PREFETCH) ] = {
156 [ C(RESULT_ACCESS) ] = 0,
157 [ C(RESULT_MISS) ] = 0,
158 },
159 },
160
161 [ C(ITLB) ] = {
162 [ C(OP_READ) ] = {
163 [ C(RESULT_ACCESS) ] = 0,
164 [ C(RESULT_MISS) ] = 0x02a0,
165 },
166 [ C(OP_WRITE) ] = {
167 [ C(RESULT_ACCESS) ] = -1,
168 [ C(RESULT_MISS) ] = -1,
169 },
170 [ C(OP_PREFETCH) ] = {
171 [ C(RESULT_ACCESS) ] = -1,
172 [ C(RESULT_MISS) ] = -1,
173 },
174 },
175
176 [ C(BPU) ] = {
177 [ C(OP_READ) ] = {
178 [ C(RESULT_ACCESS) ] = -1,
179 [ C(RESULT_MISS) ] = -1,
180 },
181 [ C(OP_WRITE) ] = {
182 [ C(RESULT_ACCESS) ] = -1,
183 [ C(RESULT_MISS) ] = -1,
184 },
185 [ C(OP_PREFETCH) ] = {
186 [ C(RESULT_ACCESS) ] = -1,
187 [ C(RESULT_MISS) ] = -1,
188 },
189 },
190};
191
192static int sh4a_event_map(int event)
193{
194 return sh4a_general_events[event];
195}
196
197static u64 sh4a_pmu_read(int idx)
198{
199 return __raw_readl(PPC_PMCTR(idx));
200}
201
202static void sh4a_pmu_disable(struct hw_perf_event *hwc, int idx)
203{
204 unsigned int tmp;
205
206 tmp = __raw_readl(PPC_CCBR(idx));
207 tmp &= ~(CCBR_CIT_MASK | CCBR_DUC);
208 __raw_writel(tmp, PPC_CCBR(idx));
209}
210
211static void sh4a_pmu_enable(struct hw_perf_event *hwc, int idx)
212{
213 unsigned int tmp;
214
215 tmp = __raw_readl(PPC_PMCAT);
216 tmp &= ~PMCAT_EMU_CLR_MASK;
217 tmp |= idx ? PMCAT_CLR1 : PMCAT_CLR0;
218 __raw_writel(tmp, PPC_PMCAT);
219
220 tmp = __raw_readl(PPC_CCBR(idx));
221 tmp |= (hwc->config << 6) | CCBR_CMDS | CCBR_PPCE;
222 __raw_writel(tmp, PPC_CCBR(idx));
223
224 __raw_writel(__raw_readl(PPC_CCBR(idx)) | CCBR_DUC, PPC_CCBR(idx));
225}
226
227static void sh4a_pmu_disable_all(void)
228{
229 int i;
230
231 for (i = 0; i < sh4a_pmu.num_events; i++)
232 __raw_writel(__raw_readl(PPC_CCBR(i)) & ~CCBR_DUC, PPC_CCBR(i));
233}
234
235static void sh4a_pmu_enable_all(void)
236{
237 int i;
238
239 for (i = 0; i < sh4a_pmu.num_events; i++)
240 __raw_writel(__raw_readl(PPC_CCBR(i)) | CCBR_DUC, PPC_CCBR(i));
241}
242
243static struct sh_pmu sh4a_pmu = {
244 .name = "SH-4A",
245 .num_events = 2,
246 .event_map = sh4a_event_map,
247 .max_events = ARRAY_SIZE(sh4a_general_events),
248 .raw_event_mask = 0x3ff,
249 .cache_events = &sh4a_cache_events,
250 .read = sh4a_pmu_read,
251 .disable = sh4a_pmu_disable,
252 .enable = sh4a_pmu_enable,
253 .disable_all = sh4a_pmu_disable_all,
254 .enable_all = sh4a_pmu_enable_all,
255};
256
257static int __init sh4a_pmu_init(void)
258{
259 /*
260 * Make sure this CPU actually has perf counters.
261 */
262 if (!(boot_cpu_data.flags & CPU_HAS_PERF_COUNTER)) {
263 pr_notice("HW perf events unsupported, software events only.\n");
264 return -ENODEV;
265 }
266
267 return register_sh_pmu(&sh4a_pmu);
268}
269arch_initcall(sh4a_pmu_init);
diff --git a/arch/sh/kernel/cpu/sh4a/pinmux-sh7722.c b/arch/sh/kernel/cpu/sh4a/pinmux-sh7722.c
index cb9d07bd59f8..0688a7502f86 100644
--- a/arch/sh/kernel/cpu/sh4a/pinmux-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/pinmux-sh7722.c
@@ -278,6 +278,7 @@ enum {
278 HIZA8_LCDC, HIZA8_HIZ, 278 HIZA8_LCDC, HIZA8_HIZ,
279 HIZA7_LCDC, HIZA7_HIZ, 279 HIZA7_LCDC, HIZA7_HIZ,
280 HIZA6_LCDC, HIZA6_HIZ, 280 HIZA6_LCDC, HIZA6_HIZ,
281 HIZB4_SIUA, HIZB4_HIZ,
281 HIZB1_VIO, HIZB1_HIZ, 282 HIZB1_VIO, HIZB1_HIZ,
282 HIZB0_VIO, HIZB0_HIZ, 283 HIZB0_VIO, HIZB0_HIZ,
283 HIZC15_IRQ7, HIZC15_HIZ, 284 HIZC15_IRQ7, HIZC15_HIZ,
@@ -546,7 +547,7 @@ static pinmux_enum_t pinmux_data[] = {
546 PINMUX_DATA(VIO_VD2_MARK, PSE3_VIO, MSELB9_VIO2, 547 PINMUX_DATA(VIO_VD2_MARK, PSE3_VIO, MSELB9_VIO2,
547 HIZB0_VIO, FOE_VIO_VD2), 548 HIZB0_VIO, FOE_VIO_VD2),
548 PINMUX_DATA(VIO_HD2_MARK, PSE3_VIO, MSELB9_VIO2, 549 PINMUX_DATA(VIO_HD2_MARK, PSE3_VIO, MSELB9_VIO2,
549 HIZB1_VIO, HIZB1_VIO, FCE_VIO_HD2), 550 HIZB1_VIO, FCE_VIO_HD2),
550 PINMUX_DATA(VIO_CLK2_MARK, PSE3_VIO, MSELB9_VIO2, 551 PINMUX_DATA(VIO_CLK2_MARK, PSE3_VIO, MSELB9_VIO2,
551 HIZB1_VIO, FRB_VIO_CLK2), 552 HIZB1_VIO, FRB_VIO_CLK2),
552 553
@@ -658,14 +659,14 @@ static pinmux_enum_t pinmux_data[] = {
658 PINMUX_DATA(SDHICLK_MARK, SDHICLK), 659 PINMUX_DATA(SDHICLK_MARK, SDHICLK),
659 660
660 /* SIU - Port A */ 661 /* SIU - Port A */
661 PINMUX_DATA(SIUAOLR_MARK, PSC13_SIUAOLR, SIUAOLR_SIOF1_SYNC), 662 PINMUX_DATA(SIUAOLR_MARK, PSC13_SIUAOLR, HIZB4_SIUA, SIUAOLR_SIOF1_SYNC),
662 PINMUX_DATA(SIUAOBT_MARK, PSC14_SIUAOBT, SIUAOBT_SIOF1_SCK), 663 PINMUX_DATA(SIUAOBT_MARK, PSC14_SIUAOBT, HIZB4_SIUA, SIUAOBT_SIOF1_SCK),
663 PINMUX_DATA(SIUAISLD_MARK, PSC15_SIUAISLD, SIUAISLD_SIOF1_RXD), 664 PINMUX_DATA(SIUAISLD_MARK, PSC15_SIUAISLD, HIZB4_SIUA, SIUAISLD_SIOF1_RXD),
664 PINMUX_DATA(SIUAILR_MARK, PSC11_SIUAILR, SIUAILR_SIOF1_SS2), 665 PINMUX_DATA(SIUAILR_MARK, PSC11_SIUAILR, HIZB4_SIUA, SIUAILR_SIOF1_SS2),
665 PINMUX_DATA(SIUAIBT_MARK, PSC12_SIUAIBT, SIUAIBT_SIOF1_SS1), 666 PINMUX_DATA(SIUAIBT_MARK, PSC12_SIUAIBT, HIZB4_SIUA, SIUAIBT_SIOF1_SS1),
666 PINMUX_DATA(SIUAOSLD_MARK, PSB0_SIUAOSLD, SIUAOSLD_SIOF1_TXD), 667 PINMUX_DATA(SIUAOSLD_MARK, PSB0_SIUAOSLD, HIZB4_SIUA, SIUAOSLD_SIOF1_TXD),
667 PINMUX_DATA(SIUMCKA_MARK, PSE11_SIUMCKA_SIOF1_MCK, PSB1_SIUMCKA, PTK0), 668 PINMUX_DATA(SIUMCKA_MARK, PSE11_SIUMCKA_SIOF1_MCK, HIZB4_SIUA, PSB1_SIUMCKA, PTK0),
668 PINMUX_DATA(SIUFCKA_MARK, PSE11_SIUFCKA, PTK0), 669 PINMUX_DATA(SIUFCKA_MARK, PSE11_SIUFCKA, HIZB4_SIUA, PTK0),
669 670
670 /* SIU - Port B */ 671 /* SIU - Port B */
671 PINMUX_DATA(SIUBOLR_MARK, PSB11_SIUBOLR, SIOSTRB1_SIUBOLR), 672 PINMUX_DATA(SIUBOLR_MARK, PSB11_SIUBOLR, SIOSTRB1_SIUBOLR),
@@ -1612,7 +1613,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
1612 0, 0, 1613 0, 0,
1613 0, 0, 1614 0, 0,
1614 0, 0, 1615 0, 0,
1615 0, 0, 1616 HIZB4_SIUA, HIZB4_HIZ,
1616 0, 0, 1617 0, 0,
1617 0, 0, 1618 0, 0,
1618 HIZB1_VIO, HIZB1_HIZ, 1619 HIZB1_VIO, HIZB1_HIZ,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
index ac4d5672ec1a..45eb1bfd42c9 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
@@ -15,6 +15,71 @@
15#include <linux/sh_timer.h> 15#include <linux/sh_timer.h>
16#include <asm/clock.h> 16#include <asm/clock.h>
17 17
18/* Serial */
19static struct plat_sci_port scif0_platform_data = {
20 .mapbase = 0xffe00000,
21 .flags = UPF_BOOT_AUTOCONF,
22 .type = PORT_SCIF,
23 .irqs = { 80, 80, 80, 80 },
24 .clk = "scif0",
25};
26
27static struct platform_device scif0_device = {
28 .name = "sh-sci",
29 .id = 0,
30 .dev = {
31 .platform_data = &scif0_platform_data,
32 },
33};
34
35static struct plat_sci_port scif1_platform_data = {
36 .mapbase = 0xffe10000,
37 .flags = UPF_BOOT_AUTOCONF,
38 .type = PORT_SCIF,
39 .irqs = { 81, 81, 81, 81 },
40 .clk = "scif1",
41};
42
43static struct platform_device scif1_device = {
44 .name = "sh-sci",
45 .id = 1,
46 .dev = {
47 .platform_data = &scif1_platform_data,
48 },
49};
50
51static struct plat_sci_port scif2_platform_data = {
52 .mapbase = 0xffe20000,
53 .flags = UPF_BOOT_AUTOCONF,
54 .type = PORT_SCIF,
55 .irqs = { 82, 82, 82, 82 },
56 .clk = "scif2",
57};
58
59static struct platform_device scif2_device = {
60 .name = "sh-sci",
61 .id = 2,
62 .dev = {
63 .platform_data = &scif2_platform_data,
64 },
65};
66
67static struct plat_sci_port scif3_platform_data = {
68 .mapbase = 0xffe30000,
69 .flags = UPF_BOOT_AUTOCONF,
70 .type = PORT_SCIF,
71 .irqs = { 83, 83, 83, 83 },
72 .clk = "scif3",
73};
74
75static struct platform_device scif3_device = {
76 .name = "sh-sci",
77 .id = 3,
78 .dev = {
79 .platform_data = &scif3_platform_data,
80 },
81};
82
18static struct resource iic0_resources[] = { 83static struct resource iic0_resources[] = {
19 [0] = { 84 [0] = {
20 .name = "IIC0", 85 .name = "IIC0",
@@ -265,52 +330,17 @@ static struct platform_device tmu2_device = {
265 .num_resources = ARRAY_SIZE(tmu2_resources), 330 .num_resources = ARRAY_SIZE(tmu2_resources),
266}; 331};
267 332
268static struct plat_sci_port sci_platform_data[] = {
269 {
270 .mapbase = 0xffe00000,
271 .flags = UPF_BOOT_AUTOCONF,
272 .type = PORT_SCIF,
273 .irqs = { 80, 80, 80, 80 },
274 .clk = "scif0",
275 }, {
276 .mapbase = 0xffe10000,
277 .flags = UPF_BOOT_AUTOCONF,
278 .type = PORT_SCIF,
279 .irqs = { 81, 81, 81, 81 },
280 .clk = "scif1",
281 }, {
282 .mapbase = 0xffe20000,
283 .flags = UPF_BOOT_AUTOCONF,
284 .type = PORT_SCIF,
285 .irqs = { 82, 82, 82, 82 },
286 .clk = "scif2",
287 }, {
288 .mapbase = 0xffe30000,
289 .flags = UPF_BOOT_AUTOCONF,
290 .type = PORT_SCIF,
291 .irqs = { 83, 83, 83, 83 },
292 .clk = "scif3",
293 }, {
294 .flags = 0,
295 }
296};
297
298static struct platform_device sci_device = {
299 .name = "sh-sci",
300 .id = -1,
301 .dev = {
302 .platform_data = sci_platform_data,
303 },
304};
305
306static struct platform_device *sh7343_devices[] __initdata = { 333static struct platform_device *sh7343_devices[] __initdata = {
334 &scif0_device,
335 &scif1_device,
336 &scif2_device,
337 &scif3_device,
307 &cmt_device, 338 &cmt_device,
308 &tmu0_device, 339 &tmu0_device,
309 &tmu1_device, 340 &tmu1_device,
310 &tmu2_device, 341 &tmu2_device,
311 &iic0_device, 342 &iic0_device,
312 &iic1_device, 343 &iic1_device,
313 &sci_device,
314 &vpu_device, 344 &vpu_device,
315 &veu_device, 345 &veu_device,
316 &jpu_device, 346 &jpu_device,
@@ -328,6 +358,10 @@ static int __init sh7343_devices_setup(void)
328arch_initcall(sh7343_devices_setup); 358arch_initcall(sh7343_devices_setup);
329 359
330static struct platform_device *sh7343_early_devices[] __initdata = { 360static struct platform_device *sh7343_early_devices[] __initdata = {
361 &scif0_device,
362 &scif1_device,
363 &scif2_device,
364 &scif3_device,
331 &cmt_device, 365 &cmt_device,
332 &tmu0_device, 366 &tmu0_device,
333 &tmu1_device, 367 &tmu1_device,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
index 4a9010bf4fd3..c494c193e3b6 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
@@ -18,6 +18,22 @@
18#include <linux/usb/r8a66597.h> 18#include <linux/usb/r8a66597.h>
19#include <asm/clock.h> 19#include <asm/clock.h>
20 20
21static struct plat_sci_port scif0_platform_data = {
22 .mapbase = 0xffe00000,
23 .flags = UPF_BOOT_AUTOCONF,
24 .type = PORT_SCIF,
25 .irqs = { 80, 80, 80, 80 },
26 .clk = "scif0",
27};
28
29static struct platform_device scif0_device = {
30 .name = "sh-sci",
31 .id = 0,
32 .dev = {
33 .platform_data = &scif0_platform_data,
34 },
35};
36
21static struct resource iic_resources[] = { 37static struct resource iic_resources[] = {
22 [0] = { 38 [0] = {
23 .name = "IIC", 39 .name = "IIC",
@@ -276,33 +292,13 @@ static struct platform_device tmu2_device = {
276 .num_resources = ARRAY_SIZE(tmu2_resources), 292 .num_resources = ARRAY_SIZE(tmu2_resources),
277}; 293};
278 294
279static struct plat_sci_port sci_platform_data[] = {
280 {
281 .mapbase = 0xffe00000,
282 .flags = UPF_BOOT_AUTOCONF,
283 .type = PORT_SCIF,
284 .irqs = { 80, 80, 80, 80 },
285 .clk = "scif0",
286 }, {
287 .flags = 0,
288 }
289};
290
291static struct platform_device sci_device = {
292 .name = "sh-sci",
293 .id = -1,
294 .dev = {
295 .platform_data = sci_platform_data,
296 },
297};
298
299static struct platform_device *sh7366_devices[] __initdata = { 295static struct platform_device *sh7366_devices[] __initdata = {
296 &scif0_device,
300 &cmt_device, 297 &cmt_device,
301 &tmu0_device, 298 &tmu0_device,
302 &tmu1_device, 299 &tmu1_device,
303 &tmu2_device, 300 &tmu2_device,
304 &iic_device, 301 &iic_device,
305 &sci_device,
306 &usb_host_device, 302 &usb_host_device,
307 &vpu_device, 303 &vpu_device,
308 &veu0_device, 304 &veu0_device,
@@ -321,6 +317,7 @@ static int __init sh7366_devices_setup(void)
321arch_initcall(sh7366_devices_setup); 317arch_initcall(sh7366_devices_setup);
322 318
323static struct platform_device *sh7366_early_devices[] __initdata = { 319static struct platform_device *sh7366_early_devices[] __initdata = {
320 &scif0_device,
324 &cmt_device, 321 &cmt_device,
325 &tmu0_device, 322 &tmu0_device,
326 &tmu1_device, 323 &tmu1_device,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
index 5491b094cf05..fd7e3639e845 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
@@ -7,19 +7,216 @@
7 * License. See the file "COPYING" in the main directory of this archive 7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details. 8 * for more details.
9 */ 9 */
10#include <linux/platform_device.h>
11#include <linux/init.h> 10#include <linux/init.h>
11#include <linux/mm.h>
12#include <linux/platform_device.h>
12#include <linux/serial.h> 13#include <linux/serial.h>
13#include <linux/serial_sci.h> 14#include <linux/serial_sci.h>
14#include <linux/mm.h> 15#include <linux/sh_timer.h>
15#include <linux/uio_driver.h> 16#include <linux/uio_driver.h>
16#include <linux/usb/m66592.h> 17#include <linux/usb/m66592.h>
17#include <linux/sh_timer.h> 18
18#include <asm/clock.h> 19#include <asm/clock.h>
20#include <asm/dmaengine.h>
19#include <asm/mmzone.h> 21#include <asm/mmzone.h>
20#include <asm/dma-sh.h> 22#include <asm/siu.h>
23
24#include <cpu/dma-register.h>
21#include <cpu/sh7722.h> 25#include <cpu/sh7722.h>
22 26
27static struct sh_dmae_slave_config sh7722_dmae_slaves[] = {
28 {
29 .slave_id = SHDMA_SLAVE_SCIF0_TX,
30 .addr = 0xffe0000c,
31 .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
32 .mid_rid = 0x21,
33 }, {
34 .slave_id = SHDMA_SLAVE_SCIF0_RX,
35 .addr = 0xffe00014,
36 .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
37 .mid_rid = 0x22,
38 }, {
39 .slave_id = SHDMA_SLAVE_SCIF1_TX,
40 .addr = 0xffe1000c,
41 .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
42 .mid_rid = 0x25,
43 }, {
44 .slave_id = SHDMA_SLAVE_SCIF1_RX,
45 .addr = 0xffe10014,
46 .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
47 .mid_rid = 0x26,
48 }, {
49 .slave_id = SHDMA_SLAVE_SCIF2_TX,
50 .addr = 0xffe2000c,
51 .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
52 .mid_rid = 0x29,
53 }, {
54 .slave_id = SHDMA_SLAVE_SCIF2_RX,
55 .addr = 0xffe20014,
56 .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
57 .mid_rid = 0x2a,
58 }, {
59 .slave_id = SHDMA_SLAVE_SIUA_TX,
60 .addr = 0xa454c098,
61 .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT),
62 .mid_rid = 0xb1,
63 }, {
64 .slave_id = SHDMA_SLAVE_SIUA_RX,
65 .addr = 0xa454c090,
66 .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT),
67 .mid_rid = 0xb2,
68 }, {
69 .slave_id = SHDMA_SLAVE_SIUB_TX,
70 .addr = 0xa454c09c,
71 .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT),
72 .mid_rid = 0xb5,
73 }, {
74 .slave_id = SHDMA_SLAVE_SIUB_RX,
75 .addr = 0xa454c094,
76 .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT),
77 .mid_rid = 0xb6,
78 },
79};
80
81static struct sh_dmae_channel sh7722_dmae_channels[] = {
82 {
83 .offset = 0,
84 .dmars = 0,
85 .dmars_bit = 0,
86 }, {
87 .offset = 0x10,
88 .dmars = 0,
89 .dmars_bit = 8,
90 }, {
91 .offset = 0x20,
92 .dmars = 4,
93 .dmars_bit = 0,
94 }, {
95 .offset = 0x30,
96 .dmars = 4,
97 .dmars_bit = 8,
98 }, {
99 .offset = 0x50,
100 .dmars = 8,
101 .dmars_bit = 0,
102 }, {
103 .offset = 0x60,
104 .dmars = 8,
105 .dmars_bit = 8,
106 }
107};
108
109static unsigned int ts_shift[] = TS_SHIFT;
110
111static struct sh_dmae_pdata dma_platform_data = {
112 .slave = sh7722_dmae_slaves,
113 .slave_num = ARRAY_SIZE(sh7722_dmae_slaves),
114 .channel = sh7722_dmae_channels,
115 .channel_num = ARRAY_SIZE(sh7722_dmae_channels),
116 .ts_low_shift = CHCR_TS_LOW_SHIFT,
117 .ts_low_mask = CHCR_TS_LOW_MASK,
118 .ts_high_shift = CHCR_TS_HIGH_SHIFT,
119 .ts_high_mask = CHCR_TS_HIGH_MASK,
120 .ts_shift = ts_shift,
121 .ts_shift_num = ARRAY_SIZE(ts_shift),
122 .dmaor_init = DMAOR_INIT,
123};
124
125static struct resource sh7722_dmae_resources[] = {
126 [0] = {
127 /* Channel registers and DMAOR */
128 .start = 0xfe008020,
129 .end = 0xfe00808f,
130 .flags = IORESOURCE_MEM,
131 },
132 [1] = {
133 /* DMARSx */
134 .start = 0xfe009000,
135 .end = 0xfe00900b,
136 .flags = IORESOURCE_MEM,
137 },
138 {
139 /* DMA error IRQ */
140 .start = 78,
141 .end = 78,
142 .flags = IORESOURCE_IRQ,
143 },
144 {
145 /* IRQ for channels 0-3 */
146 .start = 48,
147 .end = 51,
148 .flags = IORESOURCE_IRQ,
149 },
150 {
151 /* IRQ for channels 4-5 */
152 .start = 76,
153 .end = 77,
154 .flags = IORESOURCE_IRQ,
155 },
156};
157
158struct platform_device dma_device = {
159 .name = "sh-dma-engine",
160 .id = -1,
161 .resource = sh7722_dmae_resources,
162 .num_resources = ARRAY_SIZE(sh7722_dmae_resources),
163 .dev = {
164 .platform_data = &dma_platform_data,
165 },
166 .archdata = {
167 .hwblk_id = HWBLK_DMAC,
168 },
169};
170
171/* Serial */
172static struct plat_sci_port scif0_platform_data = {
173 .mapbase = 0xffe00000,
174 .flags = UPF_BOOT_AUTOCONF,
175 .type = PORT_SCIF,
176 .irqs = { 80, 80, 80, 80 },
177 .clk = "scif0",
178};
179
180static struct platform_device scif0_device = {
181 .name = "sh-sci",
182 .id = 0,
183 .dev = {
184 .platform_data = &scif0_platform_data,
185 },
186};
187
188static struct plat_sci_port scif1_platform_data = {
189 .mapbase = 0xffe10000,
190 .flags = UPF_BOOT_AUTOCONF,
191 .type = PORT_SCIF,
192 .irqs = { 81, 81, 81, 81 },
193 .clk = "scif1",
194};
195
196static struct platform_device scif1_device = {
197 .name = "sh-sci",
198 .id = 1,
199 .dev = {
200 .platform_data = &scif1_platform_data,
201 },
202};
203
204static struct plat_sci_port scif2_platform_data = {
205 .mapbase = 0xffe20000,
206 .flags = UPF_BOOT_AUTOCONF,
207 .type = PORT_SCIF,
208 .irqs = { 82, 82, 82, 82 },
209 .clk = "scif2",
210};
211
212static struct platform_device scif2_device = {
213 .name = "sh-sci",
214 .id = 2,
215 .dev = {
216 .platform_data = &scif2_platform_data,
217 },
218};
219
23static struct resource rtc_resources[] = { 220static struct resource rtc_resources[] = {
24 [0] = { 221 [0] = {
25 .start = 0xa465fec0, 222 .start = 0xa465fec0,
@@ -339,54 +536,43 @@ static struct platform_device tmu2_device = {
339 }, 536 },
340}; 537};
341 538
342static struct plat_sci_port sci_platform_data[] = { 539static struct siu_platform siu_platform_data = {
343 { 540 .dma_dev = &dma_device.dev,
344 .mapbase = 0xffe00000, 541 .dma_slave_tx_a = SHDMA_SLAVE_SIUA_TX,
345 .flags = UPF_BOOT_AUTOCONF, 542 .dma_slave_rx_a = SHDMA_SLAVE_SIUA_RX,
346 .type = PORT_SCIF, 543 .dma_slave_tx_b = SHDMA_SLAVE_SIUB_TX,
347 .irqs = { 80, 80, 80, 80 }, 544 .dma_slave_rx_b = SHDMA_SLAVE_SIUB_RX,
348 .clk = "scif0",
349 },
350 {
351 .mapbase = 0xffe10000,
352 .flags = UPF_BOOT_AUTOCONF,
353 .type = PORT_SCIF,
354 .irqs = { 81, 81, 81, 81 },
355 .clk = "scif1",
356 },
357 {
358 .mapbase = 0xffe20000,
359 .flags = UPF_BOOT_AUTOCONF,
360 .type = PORT_SCIF,
361 .irqs = { 82, 82, 82, 82 },
362 .clk = "scif2",
363 },
364 {
365 .flags = 0,
366 }
367}; 545};
368 546
369static struct platform_device sci_device = { 547static struct resource siu_resources[] = {
370 .name = "sh-sci", 548 [0] = {
371 .id = -1, 549 .start = 0xa4540000,
372 .dev = { 550 .end = 0xa454c10f,
373 .platform_data = sci_platform_data, 551 .flags = IORESOURCE_MEM,
552 },
553 [1] = {
554 .start = 108,
555 .flags = IORESOURCE_IRQ,
374 }, 556 },
375}; 557};
376 558
377static struct sh_dmae_pdata dma_platform_data = { 559static struct platform_device siu_device = {
378 .mode = 0, 560 .name = "sh_siu",
379};
380
381static struct platform_device dma_device = {
382 .name = "sh-dma-engine",
383 .id = -1, 561 .id = -1,
384 .dev = { 562 .dev = {
385 .platform_data = &dma_platform_data, 563 .platform_data = &siu_platform_data,
564 },
565 .resource = siu_resources,
566 .num_resources = ARRAY_SIZE(siu_resources),
567 .archdata = {
568 .hwblk_id = HWBLK_SIU,
386 }, 569 },
387}; 570};
388 571
389static struct platform_device *sh7722_devices[] __initdata = { 572static struct platform_device *sh7722_devices[] __initdata = {
573 &scif0_device,
574 &scif1_device,
575 &scif2_device,
390 &cmt_device, 576 &cmt_device,
391 &tmu0_device, 577 &tmu0_device,
392 &tmu1_device, 578 &tmu1_device,
@@ -394,10 +580,10 @@ static struct platform_device *sh7722_devices[] __initdata = {
394 &rtc_device, 580 &rtc_device,
395 &usbf_device, 581 &usbf_device,
396 &iic_device, 582 &iic_device,
397 &sci_device,
398 &vpu_device, 583 &vpu_device,
399 &veu_device, 584 &veu_device,
400 &jpu_device, 585 &jpu_device,
586 &siu_device,
401 &dma_device, 587 &dma_device,
402}; 588};
403 589
@@ -413,6 +599,9 @@ static int __init sh7722_devices_setup(void)
413arch_initcall(sh7722_devices_setup); 599arch_initcall(sh7722_devices_setup);
414 600
415static struct platform_device *sh7722_early_devices[] __initdata = { 601static struct platform_device *sh7722_early_devices[] __initdata = {
602 &scif0_device,
603 &scif1_device,
604 &scif2_device,
416 &cmt_device, 605 &cmt_device,
417 &tmu0_device, 606 &tmu0_device,
418 &tmu1_device, 607 &tmu1_device,
@@ -427,6 +616,8 @@ void __init plat_early_device_setup(void)
427 616
428enum { 617enum {
429 UNUSED=0, 618 UNUSED=0,
619 ENABLED,
620 DISABLED,
430 621
431 /* interrupt sources */ 622 /* interrupt sources */
432 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, 623 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
@@ -442,7 +633,6 @@ enum {
442 SCIF0, SCIF1, SCIF2, SIOF0, SIOF1, SIO, 633 SCIF0, SCIF1, SCIF2, SIOF0, SIOF1, SIO,
443 FLCTL_FLSTEI, FLCTL_FLENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I, 634 FLCTL_FLSTEI, FLCTL_FLENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I,
444 I2C_ALI, I2C_TACKI, I2C_WAITI, I2C_DTEI, 635 I2C_ALI, I2C_TACKI, I2C_WAITI, I2C_DTEI,
445 SDHI0, SDHI1, SDHI2, SDHI3,
446 CMT, TSIF, SIU, TWODG, 636 CMT, TSIF, SIU, TWODG,
447 TMU0, TMU1, TMU2, 637 TMU0, TMU1, TMU2,
448 IRDA, JPU, LCDC, 638 IRDA, JPU, LCDC,
@@ -475,8 +665,8 @@ static struct intc_vect vectors[] __initdata = {
475 INTC_VECT(FLCTL_FLTREQ0I, 0xdc0), INTC_VECT(FLCTL_FLTREQ1I, 0xde0), 665 INTC_VECT(FLCTL_FLTREQ0I, 0xdc0), INTC_VECT(FLCTL_FLTREQ1I, 0xde0),
476 INTC_VECT(I2C_ALI, 0xe00), INTC_VECT(I2C_TACKI, 0xe20), 666 INTC_VECT(I2C_ALI, 0xe00), INTC_VECT(I2C_TACKI, 0xe20),
477 INTC_VECT(I2C_WAITI, 0xe40), INTC_VECT(I2C_DTEI, 0xe60), 667 INTC_VECT(I2C_WAITI, 0xe40), INTC_VECT(I2C_DTEI, 0xe60),
478 INTC_VECT(SDHI0, 0xe80), INTC_VECT(SDHI1, 0xea0), 668 INTC_VECT(SDHI, 0xe80), INTC_VECT(SDHI, 0xea0),
479 INTC_VECT(SDHI2, 0xec0), INTC_VECT(SDHI3, 0xee0), 669 INTC_VECT(SDHI, 0xec0), INTC_VECT(SDHI, 0xee0),
480 INTC_VECT(CMT, 0xf00), INTC_VECT(TSIF, 0xf20), 670 INTC_VECT(CMT, 0xf00), INTC_VECT(TSIF, 0xf20),
481 INTC_VECT(SIU, 0xf80), INTC_VECT(TWODG, 0xfa0), 671 INTC_VECT(SIU, 0xf80), INTC_VECT(TWODG, 0xfa0),
482 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420), 672 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
@@ -494,7 +684,6 @@ static struct intc_group groups[] __initdata = {
494 INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLENDI, 684 INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLENDI,
495 FLCTL_FLTREQ0I, FLCTL_FLTREQ1I), 685 FLCTL_FLTREQ0I, FLCTL_FLTREQ1I),
496 INTC_GROUP(I2C, I2C_ALI, I2C_TACKI, I2C_WAITI, I2C_DTEI), 686 INTC_GROUP(I2C, I2C_ALI, I2C_TACKI, I2C_WAITI, I2C_DTEI),
497 INTC_GROUP(SDHI, SDHI0, SDHI1, SDHI2, SDHI3),
498}; 687};
499 688
500static struct intc_mask_reg mask_registers[] __initdata = { 689static struct intc_mask_reg mask_registers[] __initdata = {
@@ -516,7 +705,7 @@ static struct intc_mask_reg mask_registers[] __initdata = {
516 { I2C_DTEI, I2C_WAITI, I2C_TACKI, I2C_ALI, 705 { I2C_DTEI, I2C_WAITI, I2C_TACKI, I2C_ALI,
517 FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLENDI, FLCTL_FLSTEI } }, 706 FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLENDI, FLCTL_FLSTEI } },
518 { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */ 707 { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */
519 { SDHI3, SDHI2, SDHI1, SDHI0, 0, 0, TWODG, SIU } }, 708 { DISABLED, DISABLED, ENABLED, ENABLED, 0, 0, TWODG, SIU } },
520 { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */ 709 { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */
521 { 0, 0, 0, CMT, 0, USB_USBI1, USB_USBI0, } }, 710 { 0, 0, 0, CMT, 0, USB_USBI1, USB_USBI0, } },
522 { 0xa40800a8, 0xa40800e8, 8, /* IMR10 / IMCR10 */ 711 { 0xa40800a8, 0xa40800e8, 8, /* IMR10 / IMCR10 */
@@ -554,9 +743,13 @@ static struct intc_mask_reg ack_registers[] __initdata = {
554 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, 743 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
555}; 744};
556 745
557static DECLARE_INTC_DESC_ACK(intc_desc, "sh7722", vectors, groups, 746static struct intc_desc intc_desc __initdata = {
558 mask_registers, prio_registers, sense_registers, 747 .name = "sh7722",
559 ack_registers); 748 .force_enable = ENABLED,
749 .force_disable = DISABLED,
750 .hw = INTC_HW_DESC(vectors, groups, mask_registers,
751 prio_registers, sense_registers, ack_registers),
752};
560 753
561void __init plat_irq_setup(void) 754void __init plat_irq_setup(void)
562{ 755{
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
index 4caa5a7ca86e..85c61f624702 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
@@ -20,6 +20,103 @@
20#include <asm/mmzone.h> 20#include <asm/mmzone.h>
21#include <cpu/sh7723.h> 21#include <cpu/sh7723.h>
22 22
23/* Serial */
24static struct plat_sci_port scif0_platform_data = {
25 .mapbase = 0xffe00000,
26 .flags = UPF_BOOT_AUTOCONF,
27 .type = PORT_SCIF,
28 .irqs = { 80, 80, 80, 80 },
29 .clk = "scif0",
30};
31
32static struct platform_device scif0_device = {
33 .name = "sh-sci",
34 .id = 0,
35 .dev = {
36 .platform_data = &scif0_platform_data,
37 },
38};
39
40static struct plat_sci_port scif1_platform_data = {
41 .mapbase = 0xffe10000,
42 .flags = UPF_BOOT_AUTOCONF,
43 .type = PORT_SCIF,
44 .irqs = { 81, 81, 81, 81 },
45 .clk = "scif1",
46};
47
48static struct platform_device scif1_device = {
49 .name = "sh-sci",
50 .id = 1,
51 .dev = {
52 .platform_data = &scif1_platform_data,
53 },
54};
55
56static struct plat_sci_port scif2_platform_data = {
57 .mapbase = 0xffe20000,
58 .flags = UPF_BOOT_AUTOCONF,
59 .type = PORT_SCIF,
60 .irqs = { 82, 82, 82, 82 },
61 .clk = "scif2",
62};
63
64static struct platform_device scif2_device = {
65 .name = "sh-sci",
66 .id = 2,
67 .dev = {
68 .platform_data = &scif2_platform_data,
69 },
70};
71
72static struct plat_sci_port scif3_platform_data = {
73 .mapbase = 0xa4e30000,
74 .flags = UPF_BOOT_AUTOCONF,
75 .type = PORT_SCIFA,
76 .irqs = { 56, 56, 56, 56 },
77 .clk = "scif3",
78};
79
80static struct platform_device scif3_device = {
81 .name = "sh-sci",
82 .id = 3,
83 .dev = {
84 .platform_data = &scif3_platform_data,
85 },
86};
87
88static struct plat_sci_port scif4_platform_data = {
89 .mapbase = 0xa4e40000,
90 .flags = UPF_BOOT_AUTOCONF,
91 .type = PORT_SCIFA,
92 .irqs = { 88, 88, 88, 88 },
93 .clk = "scif4",
94};
95
96static struct platform_device scif4_device = {
97 .name = "sh-sci",
98 .id = 4,
99 .dev = {
100 .platform_data = &scif4_platform_data,
101 },
102};
103
104static struct plat_sci_port scif5_platform_data = {
105 .mapbase = 0xa4e50000,
106 .flags = UPF_BOOT_AUTOCONF,
107 .type = PORT_SCIFA,
108 .irqs = { 109, 109, 109, 109 },
109 .clk = "scif5",
110};
111
112static struct platform_device scif5_device = {
113 .name = "sh-sci",
114 .id = 5,
115 .dev = {
116 .platform_data = &scif5_platform_data,
117 },
118};
119
23static struct uio_info vpu_platform_data = { 120static struct uio_info vpu_platform_data = {
24 .name = "VPU5", 121 .name = "VPU5",
25 .version = "0", 122 .version = "0",
@@ -348,56 +445,6 @@ static struct platform_device tmu5_device = {
348 }, 445 },
349}; 446};
350 447
351static struct plat_sci_port sci_platform_data[] = {
352 {
353 .mapbase = 0xffe00000,
354 .flags = UPF_BOOT_AUTOCONF,
355 .type = PORT_SCIF,
356 .irqs = { 80, 80, 80, 80 },
357 .clk = "scif0",
358 },{
359 .mapbase = 0xffe10000,
360 .flags = UPF_BOOT_AUTOCONF,
361 .type = PORT_SCIF,
362 .irqs = { 81, 81, 81, 81 },
363 .clk = "scif1",
364 },{
365 .mapbase = 0xffe20000,
366 .flags = UPF_BOOT_AUTOCONF,
367 .type = PORT_SCIF,
368 .irqs = { 82, 82, 82, 82 },
369 .clk = "scif2",
370 },{
371 .mapbase = 0xa4e30000,
372 .flags = UPF_BOOT_AUTOCONF,
373 .type = PORT_SCIFA,
374 .irqs = { 56, 56, 56, 56 },
375 .clk = "scif3",
376 },{
377 .mapbase = 0xa4e40000,
378 .flags = UPF_BOOT_AUTOCONF,
379 .type = PORT_SCIFA,
380 .irqs = { 88, 88, 88, 88 },
381 .clk = "scif4",
382 },{
383 .mapbase = 0xa4e50000,
384 .flags = UPF_BOOT_AUTOCONF,
385 .type = PORT_SCIFA,
386 .irqs = { 109, 109, 109, 109 },
387 .clk = "scif5",
388 }, {
389 .flags = 0,
390 }
391};
392
393static struct platform_device sci_device = {
394 .name = "sh-sci",
395 .id = -1,
396 .dev = {
397 .platform_data = sci_platform_data,
398 },
399};
400
401static struct resource rtc_resources[] = { 448static struct resource rtc_resources[] = {
402 [0] = { 449 [0] = {
403 .start = 0xa465fec0, 450 .start = 0xa465fec0,
@@ -488,6 +535,12 @@ static struct platform_device iic_device = {
488}; 535};
489 536
490static struct platform_device *sh7723_devices[] __initdata = { 537static struct platform_device *sh7723_devices[] __initdata = {
538 &scif0_device,
539 &scif1_device,
540 &scif2_device,
541 &scif3_device,
542 &scif4_device,
543 &scif5_device,
491 &cmt_device, 544 &cmt_device,
492 &tmu0_device, 545 &tmu0_device,
493 &tmu1_device, 546 &tmu1_device,
@@ -495,7 +548,6 @@ static struct platform_device *sh7723_devices[] __initdata = {
495 &tmu3_device, 548 &tmu3_device,
496 &tmu4_device, 549 &tmu4_device,
497 &tmu5_device, 550 &tmu5_device,
498 &sci_device,
499 &rtc_device, 551 &rtc_device,
500 &iic_device, 552 &iic_device,
501 &sh7723_usb_host_device, 553 &sh7723_usb_host_device,
@@ -516,6 +568,12 @@ static int __init sh7723_devices_setup(void)
516arch_initcall(sh7723_devices_setup); 568arch_initcall(sh7723_devices_setup);
517 569
518static struct platform_device *sh7723_early_devices[] __initdata = { 570static struct platform_device *sh7723_early_devices[] __initdata = {
571 &scif0_device,
572 &scif1_device,
573 &scif2_device,
574 &scif3_device,
575 &scif4_device,
576 &scif5_device,
519 &cmt_device, 577 &cmt_device,
520 &tmu0_device, 578 &tmu0_device,
521 &tmu1_device, 579 &tmu1_device,
@@ -534,14 +592,17 @@ void __init plat_early_device_setup(void)
534#define RAMCR_CACHE_L2FC 0x0002 592#define RAMCR_CACHE_L2FC 0x0002
535#define RAMCR_CACHE_L2E 0x0001 593#define RAMCR_CACHE_L2E 0x0001
536#define L2_CACHE_ENABLE (RAMCR_CACHE_L2E|RAMCR_CACHE_L2FC) 594#define L2_CACHE_ENABLE (RAMCR_CACHE_L2E|RAMCR_CACHE_L2FC)
537void __uses_jump_to_uncached l2_cache_init(void) 595
596void l2_cache_init(void)
538{ 597{
539 /* Enable L2 cache */ 598 /* Enable L2 cache */
540 ctrl_outl(L2_CACHE_ENABLE, RAMCR); 599 __raw_writel(L2_CACHE_ENABLE, RAMCR);
541} 600}
542 601
543enum { 602enum {
544 UNUSED=0, 603 UNUSED=0,
604 ENABLED,
605 DISABLED,
545 606
546 /* interrupt sources */ 607 /* interrupt sources */
547 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, 608 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
@@ -564,7 +625,6 @@ enum {
564 SCIFA_SCIFA1, 625 SCIFA_SCIFA1,
565 FLCTL_FLSTEI,FLCTL_FLTENDI,FLCTL_FLTREQ0I,FLCTL_FLTREQ1I, 626 FLCTL_FLSTEI,FLCTL_FLTENDI,FLCTL_FLTREQ0I,FLCTL_FLTREQ1I,
566 I2C_ALI,I2C_TACKI,I2C_WAITI,I2C_DTEI, 627 I2C_ALI,I2C_TACKI,I2C_WAITI,I2C_DTEI,
567 SDHI0_SDHII0,SDHI0_SDHII1,SDHI0_SDHII2,
568 CMT_CMTI, 628 CMT_CMTI,
569 TSIF_TSIFI, 629 TSIF_TSIFI,
570 SIU_SIUI, 630 SIU_SIUI,
@@ -572,7 +632,6 @@ enum {
572 TMU0_TUNI0, TMU0_TUNI1, TMU0_TUNI2, 632 TMU0_TUNI0, TMU0_TUNI1, TMU0_TUNI2,
573 IRDA_IRDAI, 633 IRDA_IRDAI,
574 ATAPI_ATAPII, 634 ATAPI_ATAPII,
575 SDHI1_SDHII0,SDHI1_SDHII1,SDHI1_SDHII2,
576 VEU2H1_VEU2HI, 635 VEU2H1_VEU2HI,
577 LCDC_LCDCI, 636 LCDC_LCDCI,
578 TMU1_TUNI0,TMU1_TUNI1,TMU1_TUNI2, 637 TMU1_TUNI0,TMU1_TUNI1,TMU1_TUNI2,
@@ -643,9 +702,9 @@ static struct intc_vect vectors[] __initdata = {
643 INTC_VECT(I2C_WAITI,0xE40), 702 INTC_VECT(I2C_WAITI,0xE40),
644 INTC_VECT(I2C_DTEI,0xE60), 703 INTC_VECT(I2C_DTEI,0xE60),
645 704
646 INTC_VECT(SDHI0_SDHII0,0xE80), 705 INTC_VECT(SDHI0, 0xE80),
647 INTC_VECT(SDHI0_SDHII1,0xEA0), 706 INTC_VECT(SDHI0, 0xEA0),
648 INTC_VECT(SDHI0_SDHII2,0xEC0), 707 INTC_VECT(SDHI0, 0xEC0),
649 708
650 INTC_VECT(CMT_CMTI,0xF00), 709 INTC_VECT(CMT_CMTI,0xF00),
651 INTC_VECT(TSIF_TSIFI,0xF20), 710 INTC_VECT(TSIF_TSIFI,0xF20),
@@ -659,9 +718,9 @@ static struct intc_vect vectors[] __initdata = {
659 INTC_VECT(IRDA_IRDAI,0x480), 718 INTC_VECT(IRDA_IRDAI,0x480),
660 INTC_VECT(ATAPI_ATAPII,0x4A0), 719 INTC_VECT(ATAPI_ATAPII,0x4A0),
661 720
662 INTC_VECT(SDHI1_SDHII0,0x4E0), 721 INTC_VECT(SDHI1, 0x4E0),
663 INTC_VECT(SDHI1_SDHII1,0x500), 722 INTC_VECT(SDHI1, 0x500),
664 INTC_VECT(SDHI1_SDHII2,0x520), 723 INTC_VECT(SDHI1, 0x520),
665 724
666 INTC_VECT(VEU2H1_VEU2HI,0x560), 725 INTC_VECT(VEU2H1_VEU2HI,0x560),
667 INTC_VECT(LCDC_LCDCI,0x580), 726 INTC_VECT(LCDC_LCDCI,0x580),
@@ -680,15 +739,14 @@ static struct intc_group groups[] __initdata = {
680 INTC_GROUP(FLCTL,FLCTL_FLSTEI,FLCTL_FLTENDI,FLCTL_FLTREQ0I,FLCTL_FLTREQ1I), 739 INTC_GROUP(FLCTL,FLCTL_FLSTEI,FLCTL_FLTENDI,FLCTL_FLTREQ0I,FLCTL_FLTREQ1I),
681 INTC_GROUP(I2C,I2C_ALI,I2C_TACKI,I2C_WAITI,I2C_DTEI), 740 INTC_GROUP(I2C,I2C_ALI,I2C_TACKI,I2C_WAITI,I2C_DTEI),
682 INTC_GROUP(_2DG, _2DG_TRI,_2DG_INI,_2DG_CEI), 741 INTC_GROUP(_2DG, _2DG_TRI,_2DG_INI,_2DG_CEI),
683 INTC_GROUP(SDHI1, SDHI1_SDHII0,SDHI1_SDHII1,SDHI1_SDHII2),
684 INTC_GROUP(RTC, RTC_ATI,RTC_PRI,RTC_CUI), 742 INTC_GROUP(RTC, RTC_ATI,RTC_PRI,RTC_CUI),
685 INTC_GROUP(DMAC1B, DMAC1B_DEI4,DMAC1B_DEI5,DMAC1B_DADERR), 743 INTC_GROUP(DMAC1B, DMAC1B_DEI4,DMAC1B_DEI5,DMAC1B_DADERR),
686 INTC_GROUP(SDHI0,SDHI0_SDHII0,SDHI0_SDHII1,SDHI0_SDHII2),
687}; 744};
688 745
689static struct intc_mask_reg mask_registers[] __initdata = { 746static struct intc_mask_reg mask_registers[] __initdata = {
690 { 0xa4080080, 0xa40800c0, 8, /* IMR0 / IMCR0 */ 747 { 0xa4080080, 0xa40800c0, 8, /* IMR0 / IMCR0 */
691 { 0, TMU1_TUNI2,TMU1_TUNI1,TMU1_TUNI0,0,SDHI1_SDHII2,SDHI1_SDHII1,SDHI1_SDHII0} }, 748 { 0, TMU1_TUNI2, TMU1_TUNI1, TMU1_TUNI0,
749 0, DISABLED, ENABLED, ENABLED } },
692 { 0xa4080084, 0xa40800c4, 8, /* IMR1 / IMCR1 */ 750 { 0xa4080084, 0xa40800c4, 8, /* IMR1 / IMCR1 */
693 { VIO_VOUI, VIO_VEU2HI,VIO_BEUI,VIO_CEUI,DMAC0A_DEI3,DMAC0A_DEI2,DMAC0A_DEI1,DMAC0A_DEI0 } }, 751 { VIO_VOUI, VIO_VEU2HI,VIO_BEUI,VIO_CEUI,DMAC0A_DEI3,DMAC0A_DEI2,DMAC0A_DEI1,DMAC0A_DEI0 } },
694 { 0xa4080088, 0xa40800c8, 8, /* IMR2 / IMCR2 */ 752 { 0xa4080088, 0xa40800c8, 8, /* IMR2 / IMCR2 */
@@ -705,7 +763,8 @@ static struct intc_mask_reg mask_registers[] __initdata = {
705 { I2C_DTEI, I2C_WAITI, I2C_TACKI, I2C_ALI, 763 { I2C_DTEI, I2C_WAITI, I2C_TACKI, I2C_ALI,
706 FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } }, 764 FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } },
707 { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */ 765 { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */
708 { 0,SDHI0_SDHII2,SDHI0_SDHII1,SDHI0_SDHII0,0,0,SCIFA_SCIFA2,SIU_SIUI } }, 766 { 0, DISABLED, ENABLED, ENABLED,
767 0, 0, SCIFA_SCIFA2, SIU_SIUI } },
709 { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */ 768 { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */
710 { 0, 0, 0, CMT_CMTI, 0, 0, USB_USI0,0 } }, 769 { 0, 0, 0, CMT_CMTI, 0, 0, USB_USI0,0 } },
711 { 0xa40800a8, 0xa40800e8, 8, /* IMR10 / IMCR10 */ 770 { 0xa40800a8, 0xa40800e8, 8, /* IMR10 / IMCR10 */
@@ -745,9 +804,13 @@ static struct intc_mask_reg ack_registers[] __initdata = {
745 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, 804 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
746}; 805};
747 806
748static DECLARE_INTC_DESC_ACK(intc_desc, "sh7723", vectors, groups, 807static struct intc_desc intc_desc __initdata = {
749 mask_registers, prio_registers, sense_registers, 808 .name = "sh7723",
750 ack_registers); 809 .force_enable = ENABLED,
810 .force_disable = DISABLED,
811 .hw = INTC_HW_DESC(vectors, groups, mask_registers,
812 prio_registers, sense_registers, ack_registers),
813};
751 814
752void __init plat_irq_setup(void) 815void __init plat_irq_setup(void)
753{ 816{
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
index f3851fd757ec..e7fa2a92fc1f 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
@@ -20,58 +20,287 @@
20#include <linux/uio_driver.h> 20#include <linux/uio_driver.h>
21#include <linux/sh_timer.h> 21#include <linux/sh_timer.h>
22#include <linux/io.h> 22#include <linux/io.h>
23#include <linux/notifier.h>
24
25#include <asm/suspend.h>
23#include <asm/clock.h> 26#include <asm/clock.h>
27#include <asm/dmaengine.h>
24#include <asm/mmzone.h> 28#include <asm/mmzone.h>
29
30#include <cpu/dma-register.h>
25#include <cpu/sh7724.h> 31#include <cpu/sh7724.h>
26 32
27/* Serial */ 33/* DMA */
28static struct plat_sci_port sci_platform_data[] = { 34static struct sh_dmae_channel sh7724_dmae0_channels[] = {
29 { 35 {
30 .mapbase = 0xffe00000, 36 .offset = 0,
31 .flags = UPF_BOOT_AUTOCONF, 37 .dmars = 0,
32 .type = PORT_SCIF, 38 .dmars_bit = 0,
33 .irqs = { 80, 80, 80, 80 }, 39 }, {
34 .clk = "scif0", 40 .offset = 0x10,
41 .dmars = 0,
42 .dmars_bit = 8,
43 }, {
44 .offset = 0x20,
45 .dmars = 4,
46 .dmars_bit = 0,
47 }, {
48 .offset = 0x30,
49 .dmars = 4,
50 .dmars_bit = 8,
35 }, { 51 }, {
36 .mapbase = 0xffe10000, 52 .offset = 0x50,
37 .flags = UPF_BOOT_AUTOCONF, 53 .dmars = 8,
38 .type = PORT_SCIF, 54 .dmars_bit = 0,
39 .irqs = { 81, 81, 81, 81 }, 55 }, {
40 .clk = "scif1", 56 .offset = 0x60,
57 .dmars = 8,
58 .dmars_bit = 8,
59 }
60};
61
62static struct sh_dmae_channel sh7724_dmae1_channels[] = {
63 {
64 .offset = 0,
65 .dmars = 0,
66 .dmars_bit = 0,
41 }, { 67 }, {
42 .mapbase = 0xffe20000, 68 .offset = 0x10,
43 .flags = UPF_BOOT_AUTOCONF, 69 .dmars = 0,
44 .type = PORT_SCIF, 70 .dmars_bit = 8,
45 .irqs = { 82, 82, 82, 82 },
46 .clk = "scif2",
47 }, { 71 }, {
48 .mapbase = 0xa4e30000, 72 .offset = 0x20,
49 .flags = UPF_BOOT_AUTOCONF, 73 .dmars = 4,
50 .type = PORT_SCIFA, 74 .dmars_bit = 0,
51 .irqs = { 56, 56, 56, 56 },
52 .clk = "scif3",
53 }, { 75 }, {
54 .mapbase = 0xa4e40000, 76 .offset = 0x30,
55 .flags = UPF_BOOT_AUTOCONF, 77 .dmars = 4,
56 .type = PORT_SCIFA, 78 .dmars_bit = 8,
57 .irqs = { 88, 88, 88, 88 },
58 .clk = "scif4",
59 }, { 79 }, {
60 .mapbase = 0xa4e50000, 80 .offset = 0x50,
61 .flags = UPF_BOOT_AUTOCONF, 81 .dmars = 8,
62 .type = PORT_SCIFA, 82 .dmars_bit = 0,
63 .irqs = { 109, 109, 109, 109 },
64 .clk = "scif5",
65 }, { 83 }, {
66 .flags = 0, 84 .offset = 0x60,
85 .dmars = 8,
86 .dmars_bit = 8,
67 } 87 }
68}; 88};
69 89
70static struct platform_device sci_device = { 90static unsigned int ts_shift[] = TS_SHIFT;
91
92static struct sh_dmae_pdata dma0_platform_data = {
93 .channel = sh7724_dmae0_channels,
94 .channel_num = ARRAY_SIZE(sh7724_dmae0_channels),
95 .ts_low_shift = CHCR_TS_LOW_SHIFT,
96 .ts_low_mask = CHCR_TS_LOW_MASK,
97 .ts_high_shift = CHCR_TS_HIGH_SHIFT,
98 .ts_high_mask = CHCR_TS_HIGH_MASK,
99 .ts_shift = ts_shift,
100 .ts_shift_num = ARRAY_SIZE(ts_shift),
101 .dmaor_init = DMAOR_INIT,
102};
103
104static struct sh_dmae_pdata dma1_platform_data = {
105 .channel = sh7724_dmae1_channels,
106 .channel_num = ARRAY_SIZE(sh7724_dmae1_channels),
107 .ts_low_shift = CHCR_TS_LOW_SHIFT,
108 .ts_low_mask = CHCR_TS_LOW_MASK,
109 .ts_high_shift = CHCR_TS_HIGH_SHIFT,
110 .ts_high_mask = CHCR_TS_HIGH_MASK,
111 .ts_shift = ts_shift,
112 .ts_shift_num = ARRAY_SIZE(ts_shift),
113 .dmaor_init = DMAOR_INIT,
114};
115
116/* Resource order important! */
117static struct resource sh7724_dmae0_resources[] = {
118 {
119 /* Channel registers and DMAOR */
120 .start = 0xfe008020,
121 .end = 0xfe00808f,
122 .flags = IORESOURCE_MEM,
123 },
124 {
125 /* DMARSx */
126 .start = 0xfe009000,
127 .end = 0xfe00900b,
128 .flags = IORESOURCE_MEM,
129 },
130 {
131 /* DMA error IRQ */
132 .start = 78,
133 .end = 78,
134 .flags = IORESOURCE_IRQ,
135 },
136 {
137 /* IRQ for channels 0-3 */
138 .start = 48,
139 .end = 51,
140 .flags = IORESOURCE_IRQ,
141 },
142 {
143 /* IRQ for channels 4-5 */
144 .start = 76,
145 .end = 77,
146 .flags = IORESOURCE_IRQ,
147 },
148};
149
150/* Resource order important! */
151static struct resource sh7724_dmae1_resources[] = {
152 {
153 /* Channel registers and DMAOR */
154 .start = 0xfdc08020,
155 .end = 0xfdc0808f,
156 .flags = IORESOURCE_MEM,
157 },
158 {
159 /* DMARSx */
160 .start = 0xfdc09000,
161 .end = 0xfdc0900b,
162 .flags = IORESOURCE_MEM,
163 },
164 {
165 /* DMA error IRQ */
166 .start = 74,
167 .end = 74,
168 .flags = IORESOURCE_IRQ,
169 },
170 {
171 /* IRQ for channels 0-3 */
172 .start = 40,
173 .end = 43,
174 .flags = IORESOURCE_IRQ,
175 },
176 {
177 /* IRQ for channels 4-5 */
178 .start = 72,
179 .end = 73,
180 .flags = IORESOURCE_IRQ,
181 },
182};
183
184static struct platform_device dma0_device = {
185 .name = "sh-dma-engine",
186 .id = 0,
187 .resource = sh7724_dmae0_resources,
188 .num_resources = ARRAY_SIZE(sh7724_dmae0_resources),
189 .dev = {
190 .platform_data = &dma0_platform_data,
191 },
192 .archdata = {
193 .hwblk_id = HWBLK_DMAC0,
194 },
195};
196
197static struct platform_device dma1_device = {
198 .name = "sh-dma-engine",
199 .id = 1,
200 .resource = sh7724_dmae1_resources,
201 .num_resources = ARRAY_SIZE(sh7724_dmae1_resources),
202 .dev = {
203 .platform_data = &dma1_platform_data,
204 },
205 .archdata = {
206 .hwblk_id = HWBLK_DMAC1,
207 },
208};
209
210/* Serial */
211static struct plat_sci_port scif0_platform_data = {
212 .mapbase = 0xffe00000,
213 .flags = UPF_BOOT_AUTOCONF,
214 .type = PORT_SCIF,
215 .irqs = { 80, 80, 80, 80 },
216 .clk = "scif0",
217};
218
219static struct platform_device scif0_device = {
71 .name = "sh-sci", 220 .name = "sh-sci",
72 .id = -1, 221 .id = 0,
222 .dev = {
223 .platform_data = &scif0_platform_data,
224 },
225};
226
227static struct plat_sci_port scif1_platform_data = {
228 .mapbase = 0xffe10000,
229 .flags = UPF_BOOT_AUTOCONF,
230 .type = PORT_SCIF,
231 .irqs = { 81, 81, 81, 81 },
232 .clk = "scif1",
233};
234
235static struct platform_device scif1_device = {
236 .name = "sh-sci",
237 .id = 1,
73 .dev = { 238 .dev = {
74 .platform_data = sci_platform_data, 239 .platform_data = &scif1_platform_data,
240 },
241};
242
243static struct plat_sci_port scif2_platform_data = {
244 .mapbase = 0xffe20000,
245 .flags = UPF_BOOT_AUTOCONF,
246 .type = PORT_SCIF,
247 .irqs = { 82, 82, 82, 82 },
248 .clk = "scif2",
249};
250
251static struct platform_device scif2_device = {
252 .name = "sh-sci",
253 .id = 2,
254 .dev = {
255 .platform_data = &scif2_platform_data,
256 },
257};
258
259static struct plat_sci_port scif3_platform_data = {
260 .mapbase = 0xa4e30000,
261 .flags = UPF_BOOT_AUTOCONF,
262 .type = PORT_SCIFA,
263 .irqs = { 56, 56, 56, 56 },
264 .clk = "scif3",
265};
266
267static struct platform_device scif3_device = {
268 .name = "sh-sci",
269 .id = 3,
270 .dev = {
271 .platform_data = &scif3_platform_data,
272 },
273};
274
275static struct plat_sci_port scif4_platform_data = {
276 .mapbase = 0xa4e40000,
277 .flags = UPF_BOOT_AUTOCONF,
278 .type = PORT_SCIFA,
279 .irqs = { 88, 88, 88, 88 },
280 .clk = "scif4",
281};
282
283static struct platform_device scif4_device = {
284 .name = "sh-sci",
285 .id = 4,
286 .dev = {
287 .platform_data = &scif4_platform_data,
288 },
289};
290
291static struct plat_sci_port scif5_platform_data = {
292 .mapbase = 0xa4e50000,
293 .flags = UPF_BOOT_AUTOCONF,
294 .type = PORT_SCIFA,
295 .irqs = { 109, 109, 109, 109 },
296 .clk = "scif5",
297};
298
299static struct platform_device scif5_device = {
300 .name = "sh-sci",
301 .id = 5,
302 .dev = {
303 .platform_data = &scif5_platform_data,
75 }, 304 },
76}; 305};
77 306
@@ -202,7 +431,7 @@ static struct resource veu0_resources[] = {
202 [0] = { 431 [0] = {
203 .name = "VEU3F0", 432 .name = "VEU3F0",
204 .start = 0xfe920000, 433 .start = 0xfe920000,
205 .end = 0xfe9200cb - 1, 434 .end = 0xfe9200cb,
206 .flags = IORESOURCE_MEM, 435 .flags = IORESOURCE_MEM,
207 }, 436 },
208 [1] = { 437 [1] = {
@@ -234,7 +463,7 @@ static struct resource veu1_resources[] = {
234 [0] = { 463 [0] = {
235 .name = "VEU3F1", 464 .name = "VEU3F1",
236 .start = 0xfe924000, 465 .start = 0xfe924000,
237 .end = 0xfe9240cb - 1, 466 .end = 0xfe9240cb,
238 .flags = IORESOURCE_MEM, 467 .flags = IORESOURCE_MEM,
239 }, 468 },
240 [1] = { 469 [1] = {
@@ -523,7 +752,77 @@ static struct platform_device jpu_device = {
523 }, 752 },
524}; 753};
525 754
755/* SPU2DSP0 */
756static struct uio_info spu0_platform_data = {
757 .name = "SPU2DSP0",
758 .version = "0",
759 .irq = 86,
760};
761
762static struct resource spu0_resources[] = {
763 [0] = {
764 .name = "SPU2DSP0",
765 .start = 0xFE200000,
766 .end = 0xFE2FFFFF,
767 .flags = IORESOURCE_MEM,
768 },
769 [1] = {
770 /* place holder for contiguous memory */
771 },
772};
773
774static struct platform_device spu0_device = {
775 .name = "uio_pdrv_genirq",
776 .id = 4,
777 .dev = {
778 .platform_data = &spu0_platform_data,
779 },
780 .resource = spu0_resources,
781 .num_resources = ARRAY_SIZE(spu0_resources),
782 .archdata = {
783 .hwblk_id = HWBLK_SPU,
784 },
785};
786
787/* SPU2DSP1 */
788static struct uio_info spu1_platform_data = {
789 .name = "SPU2DSP1",
790 .version = "0",
791 .irq = 87,
792};
793
794static struct resource spu1_resources[] = {
795 [0] = {
796 .name = "SPU2DSP1",
797 .start = 0xFE300000,
798 .end = 0xFE3FFFFF,
799 .flags = IORESOURCE_MEM,
800 },
801 [1] = {
802 /* place holder for contiguous memory */
803 },
804};
805
806static struct platform_device spu1_device = {
807 .name = "uio_pdrv_genirq",
808 .id = 5,
809 .dev = {
810 .platform_data = &spu1_platform_data,
811 },
812 .resource = spu1_resources,
813 .num_resources = ARRAY_SIZE(spu1_resources),
814 .archdata = {
815 .hwblk_id = HWBLK_SPU,
816 },
817};
818
526static struct platform_device *sh7724_devices[] __initdata = { 819static struct platform_device *sh7724_devices[] __initdata = {
820 &scif0_device,
821 &scif1_device,
822 &scif2_device,
823 &scif3_device,
824 &scif4_device,
825 &scif5_device,
527 &cmt_device, 826 &cmt_device,
528 &tmu0_device, 827 &tmu0_device,
529 &tmu1_device, 828 &tmu1_device,
@@ -531,7 +830,8 @@ static struct platform_device *sh7724_devices[] __initdata = {
531 &tmu3_device, 830 &tmu3_device,
532 &tmu4_device, 831 &tmu4_device,
533 &tmu5_device, 832 &tmu5_device,
534 &sci_device, 833 &dma0_device,
834 &dma1_device,
535 &rtc_device, 835 &rtc_device,
536 &iic0_device, 836 &iic0_device,
537 &iic1_device, 837 &iic1_device,
@@ -539,6 +839,8 @@ static struct platform_device *sh7724_devices[] __initdata = {
539 &veu0_device, 839 &veu0_device,
540 &veu1_device, 840 &veu1_device,
541 &jpu_device, 841 &jpu_device,
842 &spu0_device,
843 &spu1_device,
542}; 844};
543 845
544static int __init sh7724_devices_setup(void) 846static int __init sh7724_devices_setup(void)
@@ -547,6 +849,8 @@ static int __init sh7724_devices_setup(void)
547 platform_resource_setup_memory(&veu0_device, "veu0", 2 << 20); 849 platform_resource_setup_memory(&veu0_device, "veu0", 2 << 20);
548 platform_resource_setup_memory(&veu1_device, "veu1", 2 << 20); 850 platform_resource_setup_memory(&veu1_device, "veu1", 2 << 20);
549 platform_resource_setup_memory(&jpu_device, "jpu", 2 << 20); 851 platform_resource_setup_memory(&jpu_device, "jpu", 2 << 20);
852 platform_resource_setup_memory(&spu0_device, "spu0", 2 << 20);
853 platform_resource_setup_memory(&spu1_device, "spu1", 2 << 20);
550 854
551 return platform_add_devices(sh7724_devices, 855 return platform_add_devices(sh7724_devices,
552 ARRAY_SIZE(sh7724_devices)); 856 ARRAY_SIZE(sh7724_devices));
@@ -554,6 +858,12 @@ static int __init sh7724_devices_setup(void)
554arch_initcall(sh7724_devices_setup); 858arch_initcall(sh7724_devices_setup);
555 859
556static struct platform_device *sh7724_early_devices[] __initdata = { 860static struct platform_device *sh7724_early_devices[] __initdata = {
861 &scif0_device,
862 &scif1_device,
863 &scif2_device,
864 &scif3_device,
865 &scif4_device,
866 &scif5_device,
557 &cmt_device, 867 &cmt_device,
558 &tmu0_device, 868 &tmu0_device,
559 &tmu1_device, 869 &tmu1_device,
@@ -572,14 +882,17 @@ void __init plat_early_device_setup(void)
572#define RAMCR_CACHE_L2FC 0x0002 882#define RAMCR_CACHE_L2FC 0x0002
573#define RAMCR_CACHE_L2E 0x0001 883#define RAMCR_CACHE_L2E 0x0001
574#define L2_CACHE_ENABLE (RAMCR_CACHE_L2E|RAMCR_CACHE_L2FC) 884#define L2_CACHE_ENABLE (RAMCR_CACHE_L2E|RAMCR_CACHE_L2FC)
575void __uses_jump_to_uncached l2_cache_init(void) 885
886void l2_cache_init(void)
576{ 887{
577 /* Enable L2 cache */ 888 /* Enable L2 cache */
578 ctrl_outl(L2_CACHE_ENABLE, RAMCR); 889 __raw_writel(L2_CACHE_ENABLE, RAMCR);
579} 890}
580 891
581enum { 892enum {
582 UNUSED = 0, 893 UNUSED = 0,
894 ENABLED,
895 DISABLED,
583 896
584 /* interrupt sources */ 897 /* interrupt sources */
585 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, 898 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
@@ -608,14 +921,12 @@ enum {
608 ETHI, 921 ETHI,
609 I2C1_ALI, I2C1_TACKI, I2C1_WAITI, I2C1_DTEI, 922 I2C1_ALI, I2C1_TACKI, I2C1_WAITI, I2C1_DTEI,
610 I2C0_ALI, I2C0_TACKI, I2C0_WAITI, I2C0_DTEI, 923 I2C0_ALI, I2C0_TACKI, I2C0_WAITI, I2C0_DTEI,
611 SDHI0_SDHII0, SDHI0_SDHII1, SDHI0_SDHII2, SDHI0_SDHII3,
612 CMT, 924 CMT,
613 TSIF, 925 TSIF,
614 FSI, 926 FSI,
615 SCIFA5, 927 SCIFA5,
616 TMU0_TUNI0, TMU0_TUNI1, TMU0_TUNI2, 928 TMU0_TUNI0, TMU0_TUNI1, TMU0_TUNI2,
617 IRDA, 929 IRDA,
618 SDHI1_SDHII0, SDHI1_SDHII1, SDHI1_SDHII2,
619 JPU, 930 JPU,
620 _2DDMAC, 931 _2DDMAC,
621 MMC_MMC2I, MMC_MMC3I, 932 MMC_MMC2I, MMC_MMC3I,
@@ -697,10 +1008,10 @@ static struct intc_vect vectors[] __initdata = {
697 INTC_VECT(I2C0_WAITI, 0xE40), 1008 INTC_VECT(I2C0_WAITI, 0xE40),
698 INTC_VECT(I2C0_DTEI, 0xE60), 1009 INTC_VECT(I2C0_DTEI, 0xE60),
699 1010
700 INTC_VECT(SDHI0_SDHII0, 0xE80), 1011 INTC_VECT(SDHI0, 0xE80),
701 INTC_VECT(SDHI0_SDHII1, 0xEA0), 1012 INTC_VECT(SDHI0, 0xEA0),
702 INTC_VECT(SDHI0_SDHII2, 0xEC0), 1013 INTC_VECT(SDHI0, 0xEC0),
703 INTC_VECT(SDHI0_SDHII3, 0xEE0), 1014 INTC_VECT(SDHI0, 0xEE0),
704 1015
705 INTC_VECT(CMT, 0xF00), 1016 INTC_VECT(CMT, 0xF00),
706 INTC_VECT(TSIF, 0xF20), 1017 INTC_VECT(TSIF, 0xF20),
@@ -713,9 +1024,9 @@ static struct intc_vect vectors[] __initdata = {
713 1024
714 INTC_VECT(IRDA, 0x480), 1025 INTC_VECT(IRDA, 0x480),
715 1026
716 INTC_VECT(SDHI1_SDHII0, 0x4E0), 1027 INTC_VECT(SDHI1, 0x4E0),
717 INTC_VECT(SDHI1_SDHII1, 0x500), 1028 INTC_VECT(SDHI1, 0x500),
718 INTC_VECT(SDHI1_SDHII2, 0x520), 1029 INTC_VECT(SDHI1, 0x520),
719 1030
720 INTC_VECT(JPU, 0x560), 1031 INTC_VECT(JPU, 0x560),
721 INTC_VECT(_2DDMAC, 0x4A0), 1032 INTC_VECT(_2DDMAC, 0x4A0),
@@ -741,8 +1052,6 @@ static struct intc_group groups[] __initdata = {
741 INTC_GROUP(DMAC0B, DMAC0B_DEI4, DMAC0B_DEI5, DMAC0B_DADERR), 1052 INTC_GROUP(DMAC0B, DMAC0B_DEI4, DMAC0B_DEI5, DMAC0B_DADERR),
742 INTC_GROUP(I2C0, I2C0_ALI, I2C0_TACKI, I2C0_WAITI, I2C0_DTEI), 1053 INTC_GROUP(I2C0, I2C0_ALI, I2C0_TACKI, I2C0_WAITI, I2C0_DTEI),
743 INTC_GROUP(I2C1, I2C1_ALI, I2C1_TACKI, I2C1_WAITI, I2C1_DTEI), 1054 INTC_GROUP(I2C1, I2C1_ALI, I2C1_TACKI, I2C1_WAITI, I2C1_DTEI),
744 INTC_GROUP(SDHI0, SDHI0_SDHII0, SDHI0_SDHII1, SDHI0_SDHII2, SDHI0_SDHII3),
745 INTC_GROUP(SDHI1, SDHI1_SDHII0, SDHI1_SDHII1, SDHI1_SDHII2),
746 INTC_GROUP(SPU, SPU_SPUI0, SPU_SPUI1), 1055 INTC_GROUP(SPU, SPU_SPUI0, SPU_SPUI1),
747 INTC_GROUP(MMCIF, MMC_MMC2I, MMC_MMC3I), 1056 INTC_GROUP(MMCIF, MMC_MMC2I, MMC_MMC3I),
748}; 1057};
@@ -750,7 +1059,7 @@ static struct intc_group groups[] __initdata = {
750static struct intc_mask_reg mask_registers[] __initdata = { 1059static struct intc_mask_reg mask_registers[] __initdata = {
751 { 0xa4080080, 0xa40800c0, 8, /* IMR0 / IMCR0 */ 1060 { 0xa4080080, 0xa40800c0, 8, /* IMR0 / IMCR0 */
752 { 0, TMU1_TUNI2, TMU1_TUNI1, TMU1_TUNI0, 1061 { 0, TMU1_TUNI2, TMU1_TUNI1, TMU1_TUNI0,
753 0, SDHI1_SDHII2, SDHI1_SDHII1, SDHI1_SDHII0 } }, 1062 0, DISABLED, ENABLED, ENABLED } },
754 { 0xa4080084, 0xa40800c4, 8, /* IMR1 / IMCR1 */ 1063 { 0xa4080084, 0xa40800c4, 8, /* IMR1 / IMCR1 */
755 { VIO_VOU, VIO_VEU1, VIO_BEU0, VIO_CEU0, 1064 { VIO_VOU, VIO_VEU1, VIO_BEU0, VIO_CEU0,
756 DMAC0A_DEI3, DMAC0A_DEI2, DMAC0A_DEI1, DMAC0A_DEI0 } }, 1065 DMAC0A_DEI3, DMAC0A_DEI2, DMAC0A_DEI1, DMAC0A_DEI0 } },
@@ -772,7 +1081,7 @@ static struct intc_mask_reg mask_registers[] __initdata = {
772 { I2C0_DTEI, I2C0_WAITI, I2C0_TACKI, I2C0_ALI, 1081 { I2C0_DTEI, I2C0_WAITI, I2C0_TACKI, I2C0_ALI,
773 I2C1_DTEI, I2C1_WAITI, I2C1_TACKI, I2C1_ALI } }, 1082 I2C1_DTEI, I2C1_WAITI, I2C1_TACKI, I2C1_ALI } },
774 { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */ 1083 { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */
775 { SDHI0_SDHII3, SDHI0_SDHII2, SDHI0_SDHII1, SDHI0_SDHII0, 1084 { DISABLED, DISABLED, ENABLED, ENABLED,
776 0, 0, SCIFA5, FSI } }, 1085 0, 0, SCIFA5, FSI } },
777 { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */ 1086 { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */
778 { 0, 0, 0, CMT, 0, USB1, USB0, 0 } }, 1087 { 0, 0, 0, CMT, 0, USB1, USB0, 0 } },
@@ -819,11 +1128,205 @@ static struct intc_mask_reg ack_registers[] __initdata = {
819 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, 1128 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
820}; 1129};
821 1130
822static DECLARE_INTC_DESC_ACK(intc_desc, "sh7724", vectors, groups, 1131static struct intc_desc intc_desc __initdata = {
823 mask_registers, prio_registers, sense_registers, 1132 .name = "sh7724",
824 ack_registers); 1133 .force_enable = ENABLED,
1134 .force_disable = DISABLED,
1135 .hw = INTC_HW_DESC(vectors, groups, mask_registers,
1136 prio_registers, sense_registers, ack_registers),
1137};
825 1138
826void __init plat_irq_setup(void) 1139void __init plat_irq_setup(void)
827{ 1140{
828 register_intc_controller(&intc_desc); 1141 register_intc_controller(&intc_desc);
829} 1142}
1143
1144static struct {
1145 /* BSC */
1146 unsigned long mmselr;
1147 unsigned long cs0bcr;
1148 unsigned long cs4bcr;
1149 unsigned long cs5abcr;
1150 unsigned long cs5bbcr;
1151 unsigned long cs6abcr;
1152 unsigned long cs6bbcr;
1153 unsigned long cs4wcr;
1154 unsigned long cs5awcr;
1155 unsigned long cs5bwcr;
1156 unsigned long cs6awcr;
1157 unsigned long cs6bwcr;
1158 /* INTC */
1159 unsigned short ipra;
1160 unsigned short iprb;
1161 unsigned short iprc;
1162 unsigned short iprd;
1163 unsigned short ipre;
1164 unsigned short iprf;
1165 unsigned short iprg;
1166 unsigned short iprh;
1167 unsigned short ipri;
1168 unsigned short iprj;
1169 unsigned short iprk;
1170 unsigned short iprl;
1171 unsigned char imr0;
1172 unsigned char imr1;
1173 unsigned char imr2;
1174 unsigned char imr3;
1175 unsigned char imr4;
1176 unsigned char imr5;
1177 unsigned char imr6;
1178 unsigned char imr7;
1179 unsigned char imr8;
1180 unsigned char imr9;
1181 unsigned char imr10;
1182 unsigned char imr11;
1183 unsigned char imr12;
1184 /* RWDT */
1185 unsigned short rwtcnt;
1186 unsigned short rwtcsr;
1187 /* CPG */
1188 unsigned long irdaclk;
1189 unsigned long spuclk;
1190} sh7724_rstandby_state;
1191
1192static int sh7724_pre_sleep_notifier_call(struct notifier_block *nb,
1193 unsigned long flags, void *unused)
1194{
1195 if (!(flags & SUSP_SH_RSTANDBY))
1196 return NOTIFY_DONE;
1197
1198 /* BCR */
1199 sh7724_rstandby_state.mmselr = __raw_readl(0xff800020); /* MMSELR */
1200 sh7724_rstandby_state.mmselr |= 0xa5a50000;
1201 sh7724_rstandby_state.cs0bcr = __raw_readl(0xfec10004); /* CS0BCR */
1202 sh7724_rstandby_state.cs4bcr = __raw_readl(0xfec10010); /* CS4BCR */
1203 sh7724_rstandby_state.cs5abcr = __raw_readl(0xfec10014); /* CS5ABCR */
1204 sh7724_rstandby_state.cs5bbcr = __raw_readl(0xfec10018); /* CS5BBCR */
1205 sh7724_rstandby_state.cs6abcr = __raw_readl(0xfec1001c); /* CS6ABCR */
1206 sh7724_rstandby_state.cs6bbcr = __raw_readl(0xfec10020); /* CS6BBCR */
1207 sh7724_rstandby_state.cs4wcr = __raw_readl(0xfec10030); /* CS4WCR */
1208 sh7724_rstandby_state.cs5awcr = __raw_readl(0xfec10034); /* CS5AWCR */
1209 sh7724_rstandby_state.cs5bwcr = __raw_readl(0xfec10038); /* CS5BWCR */
1210 sh7724_rstandby_state.cs6awcr = __raw_readl(0xfec1003c); /* CS6AWCR */
1211 sh7724_rstandby_state.cs6bwcr = __raw_readl(0xfec10040); /* CS6BWCR */
1212
1213 /* INTC */
1214 sh7724_rstandby_state.ipra = __raw_readw(0xa4080000); /* IPRA */
1215 sh7724_rstandby_state.iprb = __raw_readw(0xa4080004); /* IPRB */
1216 sh7724_rstandby_state.iprc = __raw_readw(0xa4080008); /* IPRC */
1217 sh7724_rstandby_state.iprd = __raw_readw(0xa408000c); /* IPRD */
1218 sh7724_rstandby_state.ipre = __raw_readw(0xa4080010); /* IPRE */
1219 sh7724_rstandby_state.iprf = __raw_readw(0xa4080014); /* IPRF */
1220 sh7724_rstandby_state.iprg = __raw_readw(0xa4080018); /* IPRG */
1221 sh7724_rstandby_state.iprh = __raw_readw(0xa408001c); /* IPRH */
1222 sh7724_rstandby_state.ipri = __raw_readw(0xa4080020); /* IPRI */
1223 sh7724_rstandby_state.iprj = __raw_readw(0xa4080024); /* IPRJ */
1224 sh7724_rstandby_state.iprk = __raw_readw(0xa4080028); /* IPRK */
1225 sh7724_rstandby_state.iprl = __raw_readw(0xa408002c); /* IPRL */
1226 sh7724_rstandby_state.imr0 = __raw_readb(0xa4080080); /* IMR0 */
1227 sh7724_rstandby_state.imr1 = __raw_readb(0xa4080084); /* IMR1 */
1228 sh7724_rstandby_state.imr2 = __raw_readb(0xa4080088); /* IMR2 */
1229 sh7724_rstandby_state.imr3 = __raw_readb(0xa408008c); /* IMR3 */
1230 sh7724_rstandby_state.imr4 = __raw_readb(0xa4080090); /* IMR4 */
1231 sh7724_rstandby_state.imr5 = __raw_readb(0xa4080094); /* IMR5 */
1232 sh7724_rstandby_state.imr6 = __raw_readb(0xa4080098); /* IMR6 */
1233 sh7724_rstandby_state.imr7 = __raw_readb(0xa408009c); /* IMR7 */
1234 sh7724_rstandby_state.imr8 = __raw_readb(0xa40800a0); /* IMR8 */
1235 sh7724_rstandby_state.imr9 = __raw_readb(0xa40800a4); /* IMR9 */
1236 sh7724_rstandby_state.imr10 = __raw_readb(0xa40800a8); /* IMR10 */
1237 sh7724_rstandby_state.imr11 = __raw_readb(0xa40800ac); /* IMR11 */
1238 sh7724_rstandby_state.imr12 = __raw_readb(0xa40800b0); /* IMR12 */
1239
1240 /* RWDT */
1241 sh7724_rstandby_state.rwtcnt = __raw_readb(0xa4520000); /* RWTCNT */
1242 sh7724_rstandby_state.rwtcnt |= 0x5a00;
1243 sh7724_rstandby_state.rwtcsr = __raw_readb(0xa4520004); /* RWTCSR */
1244 sh7724_rstandby_state.rwtcsr |= 0xa500;
1245 __raw_writew(sh7724_rstandby_state.rwtcsr & 0x07, 0xa4520004);
1246
1247 /* CPG */
1248 sh7724_rstandby_state.irdaclk = __raw_readl(0xa4150018); /* IRDACLKCR */
1249 sh7724_rstandby_state.spuclk = __raw_readl(0xa415003c); /* SPUCLKCR */
1250
1251 return NOTIFY_DONE;
1252}
1253
1254static int sh7724_post_sleep_notifier_call(struct notifier_block *nb,
1255 unsigned long flags, void *unused)
1256{
1257 if (!(flags & SUSP_SH_RSTANDBY))
1258 return NOTIFY_DONE;
1259
1260 /* BCR */
1261 __raw_writel(sh7724_rstandby_state.mmselr, 0xff800020); /* MMSELR */
1262 __raw_writel(sh7724_rstandby_state.cs0bcr, 0xfec10004); /* CS0BCR */
1263 __raw_writel(sh7724_rstandby_state.cs4bcr, 0xfec10010); /* CS4BCR */
1264 __raw_writel(sh7724_rstandby_state.cs5abcr, 0xfec10014); /* CS5ABCR */
1265 __raw_writel(sh7724_rstandby_state.cs5bbcr, 0xfec10018); /* CS5BBCR */
1266 __raw_writel(sh7724_rstandby_state.cs6abcr, 0xfec1001c); /* CS6ABCR */
1267 __raw_writel(sh7724_rstandby_state.cs6bbcr, 0xfec10020); /* CS6BBCR */
1268 __raw_writel(sh7724_rstandby_state.cs4wcr, 0xfec10030); /* CS4WCR */
1269 __raw_writel(sh7724_rstandby_state.cs5awcr, 0xfec10034); /* CS5AWCR */
1270 __raw_writel(sh7724_rstandby_state.cs5bwcr, 0xfec10038); /* CS5BWCR */
1271 __raw_writel(sh7724_rstandby_state.cs6awcr, 0xfec1003c); /* CS6AWCR */
1272 __raw_writel(sh7724_rstandby_state.cs6bwcr, 0xfec10040); /* CS6BWCR */
1273
1274 /* INTC */
1275 __raw_writew(sh7724_rstandby_state.ipra, 0xa4080000); /* IPRA */
1276 __raw_writew(sh7724_rstandby_state.iprb, 0xa4080004); /* IPRB */
1277 __raw_writew(sh7724_rstandby_state.iprc, 0xa4080008); /* IPRC */
1278 __raw_writew(sh7724_rstandby_state.iprd, 0xa408000c); /* IPRD */
1279 __raw_writew(sh7724_rstandby_state.ipre, 0xa4080010); /* IPRE */
1280 __raw_writew(sh7724_rstandby_state.iprf, 0xa4080014); /* IPRF */
1281 __raw_writew(sh7724_rstandby_state.iprg, 0xa4080018); /* IPRG */
1282 __raw_writew(sh7724_rstandby_state.iprh, 0xa408001c); /* IPRH */
1283 __raw_writew(sh7724_rstandby_state.ipri, 0xa4080020); /* IPRI */
1284 __raw_writew(sh7724_rstandby_state.iprj, 0xa4080024); /* IPRJ */
1285 __raw_writew(sh7724_rstandby_state.iprk, 0xa4080028); /* IPRK */
1286 __raw_writew(sh7724_rstandby_state.iprl, 0xa408002c); /* IPRL */
1287 __raw_writeb(sh7724_rstandby_state.imr0, 0xa4080080); /* IMR0 */
1288 __raw_writeb(sh7724_rstandby_state.imr1, 0xa4080084); /* IMR1 */
1289 __raw_writeb(sh7724_rstandby_state.imr2, 0xa4080088); /* IMR2 */
1290 __raw_writeb(sh7724_rstandby_state.imr3, 0xa408008c); /* IMR3 */
1291 __raw_writeb(sh7724_rstandby_state.imr4, 0xa4080090); /* IMR4 */
1292 __raw_writeb(sh7724_rstandby_state.imr5, 0xa4080094); /* IMR5 */
1293 __raw_writeb(sh7724_rstandby_state.imr6, 0xa4080098); /* IMR6 */
1294 __raw_writeb(sh7724_rstandby_state.imr7, 0xa408009c); /* IMR7 */
1295 __raw_writeb(sh7724_rstandby_state.imr8, 0xa40800a0); /* IMR8 */
1296 __raw_writeb(sh7724_rstandby_state.imr9, 0xa40800a4); /* IMR9 */
1297 __raw_writeb(sh7724_rstandby_state.imr10, 0xa40800a8); /* IMR10 */
1298 __raw_writeb(sh7724_rstandby_state.imr11, 0xa40800ac); /* IMR11 */
1299 __raw_writeb(sh7724_rstandby_state.imr12, 0xa40800b0); /* IMR12 */
1300
1301 /* RWDT */
1302 __raw_writew(sh7724_rstandby_state.rwtcnt, 0xa4520000); /* RWTCNT */
1303 __raw_writew(sh7724_rstandby_state.rwtcsr, 0xa4520004); /* RWTCSR */
1304
1305 /* CPG */
1306 __raw_writel(sh7724_rstandby_state.irdaclk, 0xa4150018); /* IRDACLKCR */
1307 __raw_writel(sh7724_rstandby_state.spuclk, 0xa415003c); /* SPUCLKCR */
1308
1309 return NOTIFY_DONE;
1310}
1311
1312static struct notifier_block sh7724_pre_sleep_notifier = {
1313 .notifier_call = sh7724_pre_sleep_notifier_call,
1314 .priority = SH_MOBILE_PRE(SH_MOBILE_SLEEP_CPU),
1315};
1316
1317static struct notifier_block sh7724_post_sleep_notifier = {
1318 .notifier_call = sh7724_post_sleep_notifier_call,
1319 .priority = SH_MOBILE_POST(SH_MOBILE_SLEEP_CPU),
1320};
1321
1322static int __init sh7724_sleep_setup(void)
1323{
1324 atomic_notifier_chain_register(&sh_mobile_pre_sleep_notifier_list,
1325 &sh7724_pre_sleep_notifier);
1326
1327 atomic_notifier_chain_register(&sh_mobile_post_sleep_notifier_list,
1328 &sh7724_post_sleep_notifier);
1329 return 0;
1330}
1331arch_initcall(sh7724_sleep_setup);
1332
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
index c470e15f2e03..e75edf58796a 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
@@ -17,6 +17,51 @@
17#include <linux/mm.h> 17#include <linux/mm.h>
18#include <linux/sh_timer.h> 18#include <linux/sh_timer.h>
19 19
20static struct plat_sci_port scif2_platform_data = {
21 .mapbase = 0xfe4b0000, /* SCIF2 */
22 .flags = UPF_BOOT_AUTOCONF,
23 .type = PORT_SCIF,
24 .irqs = { 40, 40, 40, 40 },
25};
26
27static struct platform_device scif2_device = {
28 .name = "sh-sci",
29 .id = 2,
30 .dev = {
31 .platform_data = &scif2_platform_data,
32 },
33};
34
35static struct plat_sci_port scif3_platform_data = {
36 .mapbase = 0xfe4c0000, /* SCIF3 */
37 .flags = UPF_BOOT_AUTOCONF,
38 .type = PORT_SCIF,
39 .irqs = { 76, 76, 76, 76 },
40};
41
42static struct platform_device scif3_device = {
43 .name = "sh-sci",
44 .id = 3,
45 .dev = {
46 .platform_data = &scif3_platform_data,
47 },
48};
49
50static struct plat_sci_port scif4_platform_data = {
51 .mapbase = 0xfe4d0000, /* SCIF4 */
52 .flags = UPF_BOOT_AUTOCONF,
53 .type = PORT_SCIF,
54 .irqs = { 104, 104, 104, 104 },
55};
56
57static struct platform_device scif4_device = {
58 .name = "sh-sci",
59 .id = 4,
60 .dev = {
61 .platform_data = &scif4_platform_data,
62 },
63};
64
20static struct sh_timer_config tmu0_platform_data = { 65static struct sh_timer_config tmu0_platform_data = {
21 .name = "TMU0", 66 .name = "TMU0",
22 .channel_offset = 0x04, 67 .channel_offset = 0x04,
@@ -79,39 +124,12 @@ static struct platform_device tmu1_device = {
79 .num_resources = ARRAY_SIZE(tmu1_resources), 124 .num_resources = ARRAY_SIZE(tmu1_resources),
80}; 125};
81 126
82static struct plat_sci_port sci_platform_data[] = {
83 {
84 .mapbase = 0xfe4b0000, /* SCIF2 */
85 .flags = UPF_BOOT_AUTOCONF,
86 .type = PORT_SCIF,
87 .irqs = { 40, 40, 40, 40 },
88 }, {
89 .mapbase = 0xfe4c0000, /* SCIF3 */
90 .flags = UPF_BOOT_AUTOCONF,
91 .type = PORT_SCIF,
92 .irqs = { 76, 76, 76, 76 },
93 }, {
94 .mapbase = 0xfe4d0000, /* SCIF4 */
95 .flags = UPF_BOOT_AUTOCONF,
96 .type = PORT_SCIF,
97 .irqs = { 104, 104, 104, 104 },
98 }, {
99 .flags = 0,
100 }
101};
102
103static struct platform_device sci_device = {
104 .name = "sh-sci",
105 .id = -1,
106 .dev = {
107 .platform_data = sci_platform_data,
108 },
109};
110
111static struct platform_device *sh7757_devices[] __initdata = { 127static struct platform_device *sh7757_devices[] __initdata = {
128 &scif2_device,
129 &scif3_device,
130 &scif4_device,
112 &tmu0_device, 131 &tmu0_device,
113 &tmu1_device, 132 &tmu1_device,
114 &sci_device,
115}; 133};
116 134
117static int __init sh7757_devices_setup(void) 135static int __init sh7757_devices_setup(void)
@@ -121,6 +139,20 @@ static int __init sh7757_devices_setup(void)
121} 139}
122arch_initcall(sh7757_devices_setup); 140arch_initcall(sh7757_devices_setup);
123 141
142static struct platform_device *sh7757_early_devices[] __initdata = {
143 &scif2_device,
144 &scif3_device,
145 &scif4_device,
146 &tmu0_device,
147 &tmu1_device,
148};
149
150void __init plat_early_device_setup(void)
151{
152 early_platform_add_devices(sh7757_early_devices,
153 ARRAY_SIZE(sh7757_early_devices));
154}
155
124enum { 156enum {
125 UNUSED = 0, 157 UNUSED = 0,
126 158
@@ -455,17 +487,17 @@ static DECLARE_INTC_DESC(intc_desc_irl4567, "sh7757-irl4567", vectors_irl4567,
455void __init plat_irq_setup(void) 487void __init plat_irq_setup(void)
456{ 488{
457 /* disable IRQ3-0 + IRQ7-4 */ 489 /* disable IRQ3-0 + IRQ7-4 */
458 ctrl_outl(0xff000000, INTC_INTMSK0); 490 __raw_writel(0xff000000, INTC_INTMSK0);
459 491
460 /* disable IRL3-0 + IRL7-4 */ 492 /* disable IRL3-0 + IRL7-4 */
461 ctrl_outl(0xc0000000, INTC_INTMSK1); 493 __raw_writel(0xc0000000, INTC_INTMSK1);
462 ctrl_outl(0xfffefffe, INTC_INTMSK2); 494 __raw_writel(0xfffefffe, INTC_INTMSK2);
463 495
464 /* select IRL mode for IRL3-0 + IRL7-4 */ 496 /* select IRL mode for IRL3-0 + IRL7-4 */
465 ctrl_outl(ctrl_inl(INTC_ICR0) & ~0x00c00000, INTC_ICR0); 497 __raw_writel(__raw_readl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
466 498
467 /* disable holding function, ie enable "SH-4 Mode" */ 499 /* disable holding function, ie enable "SH-4 Mode" */
468 ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00200000, INTC_ICR0); 500 __raw_writel(__raw_readl(INTC_ICR0) | 0x00200000, INTC_ICR0);
469 501
470 register_intc_controller(&intc_desc); 502 register_intc_controller(&intc_desc);
471} 503}
@@ -475,32 +507,32 @@ void __init plat_irq_setup_pins(int mode)
475 switch (mode) { 507 switch (mode) {
476 case IRQ_MODE_IRQ7654: 508 case IRQ_MODE_IRQ7654:
477 /* select IRQ mode for IRL7-4 */ 509 /* select IRQ mode for IRL7-4 */
478 ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00400000, INTC_ICR0); 510 __raw_writel(__raw_readl(INTC_ICR0) | 0x00400000, INTC_ICR0);
479 register_intc_controller(&intc_desc_irq4567); 511 register_intc_controller(&intc_desc_irq4567);
480 break; 512 break;
481 case IRQ_MODE_IRQ3210: 513 case IRQ_MODE_IRQ3210:
482 /* select IRQ mode for IRL3-0 */ 514 /* select IRQ mode for IRL3-0 */
483 ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00800000, INTC_ICR0); 515 __raw_writel(__raw_readl(INTC_ICR0) | 0x00800000, INTC_ICR0);
484 register_intc_controller(&intc_desc_irq0123); 516 register_intc_controller(&intc_desc_irq0123);
485 break; 517 break;
486 case IRQ_MODE_IRL7654: 518 case IRQ_MODE_IRL7654:
487 /* enable IRL7-4 but don't provide any masking */ 519 /* enable IRL7-4 but don't provide any masking */
488 ctrl_outl(0x40000000, INTC_INTMSKCLR1); 520 __raw_writel(0x40000000, INTC_INTMSKCLR1);
489 ctrl_outl(0x0000fffe, INTC_INTMSKCLR2); 521 __raw_writel(0x0000fffe, INTC_INTMSKCLR2);
490 break; 522 break;
491 case IRQ_MODE_IRL3210: 523 case IRQ_MODE_IRL3210:
492 /* enable IRL0-3 but don't provide any masking */ 524 /* enable IRL0-3 but don't provide any masking */
493 ctrl_outl(0x80000000, INTC_INTMSKCLR1); 525 __raw_writel(0x80000000, INTC_INTMSKCLR1);
494 ctrl_outl(0xfffe0000, INTC_INTMSKCLR2); 526 __raw_writel(0xfffe0000, INTC_INTMSKCLR2);
495 break; 527 break;
496 case IRQ_MODE_IRL7654_MASK: 528 case IRQ_MODE_IRL7654_MASK:
497 /* enable IRL7-4 and mask using cpu intc controller */ 529 /* enable IRL7-4 and mask using cpu intc controller */
498 ctrl_outl(0x40000000, INTC_INTMSKCLR1); 530 __raw_writel(0x40000000, INTC_INTMSKCLR1);
499 register_intc_controller(&intc_desc_irl4567); 531 register_intc_controller(&intc_desc_irl4567);
500 break; 532 break;
501 case IRQ_MODE_IRL3210_MASK: 533 case IRQ_MODE_IRL3210_MASK:
502 /* enable IRL0-3 and mask using cpu intc controller */ 534 /* enable IRL0-3 and mask using cpu intc controller */
503 ctrl_outl(0x80000000, INTC_INTMSKCLR1); 535 __raw_writel(0x80000000, INTC_INTMSKCLR1);
504 register_intc_controller(&intc_desc_irl0123); 536 register_intc_controller(&intc_desc_irl0123);
505 break; 537 break;
506 default: 538 default:
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
index 4659fff6b842..7f6b0a5f7f82 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
@@ -16,6 +16,51 @@
16#include <linux/io.h> 16#include <linux/io.h>
17#include <linux/serial_sci.h> 17#include <linux/serial_sci.h>
18 18
19static struct plat_sci_port scif0_platform_data = {
20 .mapbase = 0xffe00000,
21 .flags = UPF_BOOT_AUTOCONF,
22 .type = PORT_SCIF,
23 .irqs = { 40, 40, 40, 40 },
24};
25
26static struct platform_device scif0_device = {
27 .name = "sh-sci",
28 .id = 0,
29 .dev = {
30 .platform_data = &scif0_platform_data,
31 },
32};
33
34static struct plat_sci_port scif1_platform_data = {
35 .mapbase = 0xffe08000,
36 .flags = UPF_BOOT_AUTOCONF,
37 .type = PORT_SCIF,
38 .irqs = { 76, 76, 76, 76 },
39};
40
41static struct platform_device scif1_device = {
42 .name = "sh-sci",
43 .id = 1,
44 .dev = {
45 .platform_data = &scif1_platform_data,
46 },
47};
48
49static struct plat_sci_port scif2_platform_data = {
50 .mapbase = 0xffe10000,
51 .flags = UPF_BOOT_AUTOCONF,
52 .type = PORT_SCIF,
53 .irqs = { 104, 104, 104, 104 },
54};
55
56static struct platform_device scif2_device = {
57 .name = "sh-sci",
58 .id = 2,
59 .dev = {
60 .platform_data = &scif2_platform_data,
61 },
62};
63
19static struct resource rtc_resources[] = { 64static struct resource rtc_resources[] = {
20 [0] = { 65 [0] = {
21 .start = 0xffe80000, 66 .start = 0xffe80000,
@@ -36,35 +81,6 @@ static struct platform_device rtc_device = {
36 .resource = rtc_resources, 81 .resource = rtc_resources,
37}; 82};
38 83
39static struct plat_sci_port sci_platform_data[] = {
40 {
41 .mapbase = 0xffe00000,
42 .flags = UPF_BOOT_AUTOCONF,
43 .type = PORT_SCIF,
44 .irqs = { 40, 40, 40, 40 },
45 }, {
46 .mapbase = 0xffe08000,
47 .flags = UPF_BOOT_AUTOCONF,
48 .type = PORT_SCIF,
49 .irqs = { 76, 76, 76, 76 },
50 }, {
51 .mapbase = 0xffe10000,
52 .flags = UPF_BOOT_AUTOCONF,
53 .type = PORT_SCIF,
54 .irqs = { 104, 104, 104, 104 },
55 }, {
56 .flags = 0,
57 }
58};
59
60static struct platform_device sci_device = {
61 .name = "sh-sci",
62 .id = -1,
63 .dev = {
64 .platform_data = sci_platform_data,
65 },
66};
67
68static struct resource usb_ohci_resources[] = { 84static struct resource usb_ohci_resources[] = {
69 [0] = { 85 [0] = {
70 .start = 0xffec8000, 86 .start = 0xffec8000,
@@ -297,6 +313,9 @@ static struct platform_device tmu5_device = {
297}; 313};
298 314
299static struct platform_device *sh7763_devices[] __initdata = { 315static struct platform_device *sh7763_devices[] __initdata = {
316 &scif0_device,
317 &scif1_device,
318 &scif2_device,
300 &tmu0_device, 319 &tmu0_device,
301 &tmu1_device, 320 &tmu1_device,
302 &tmu2_device, 321 &tmu2_device,
@@ -304,7 +323,6 @@ static struct platform_device *sh7763_devices[] __initdata = {
304 &tmu4_device, 323 &tmu4_device,
305 &tmu5_device, 324 &tmu5_device,
306 &rtc_device, 325 &rtc_device,
307 &sci_device,
308 &usb_ohci_device, 326 &usb_ohci_device,
309 &usbf_device, 327 &usbf_device,
310}; 328};
@@ -317,6 +335,9 @@ static int __init sh7763_devices_setup(void)
317arch_initcall(sh7763_devices_setup); 335arch_initcall(sh7763_devices_setup);
318 336
319static struct platform_device *sh7763_early_devices[] __initdata = { 337static struct platform_device *sh7763_early_devices[] __initdata = {
338 &scif0_device,
339 &scif1_device,
340 &scif2_device,
320 &tmu0_device, 341 &tmu0_device,
321 &tmu1_device, 342 &tmu1_device,
322 &tmu2_device, 343 &tmu2_device,
@@ -517,11 +538,11 @@ static DECLARE_INTC_DESC(intc_irl3210_desc, "sh7763-irl3210", irl_vectors,
517void __init plat_irq_setup(void) 538void __init plat_irq_setup(void)
518{ 539{
519 /* disable IRQ7-0 */ 540 /* disable IRQ7-0 */
520 ctrl_outl(0xff000000, INTC_INTMSK0); 541 __raw_writel(0xff000000, INTC_INTMSK0);
521 542
522 /* disable IRL3-0 + IRL7-4 */ 543 /* disable IRL3-0 + IRL7-4 */
523 ctrl_outl(0xc0000000, INTC_INTMSK1); 544 __raw_writel(0xc0000000, INTC_INTMSK1);
524 ctrl_outl(0xfffefffe, INTC_INTMSK2); 545 __raw_writel(0xfffefffe, INTC_INTMSK2);
525 546
526 register_intc_controller(&intc_desc); 547 register_intc_controller(&intc_desc);
527} 548}
@@ -531,27 +552,27 @@ void __init plat_irq_setup_pins(int mode)
531 switch (mode) { 552 switch (mode) {
532 case IRQ_MODE_IRQ: 553 case IRQ_MODE_IRQ:
533 /* select IRQ mode for IRL3-0 + IRL7-4 */ 554 /* select IRQ mode for IRL3-0 + IRL7-4 */
534 ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00c00000, INTC_ICR0); 555 __raw_writel(__raw_readl(INTC_ICR0) | 0x00c00000, INTC_ICR0);
535 register_intc_controller(&intc_irq_desc); 556 register_intc_controller(&intc_irq_desc);
536 break; 557 break;
537 case IRQ_MODE_IRL7654: 558 case IRQ_MODE_IRL7654:
538 /* enable IRL7-4 but don't provide any masking */ 559 /* enable IRL7-4 but don't provide any masking */
539 ctrl_outl(0x40000000, INTC_INTMSKCLR1); 560 __raw_writel(0x40000000, INTC_INTMSKCLR1);
540 ctrl_outl(0x0000fffe, INTC_INTMSKCLR2); 561 __raw_writel(0x0000fffe, INTC_INTMSKCLR2);
541 break; 562 break;
542 case IRQ_MODE_IRL3210: 563 case IRQ_MODE_IRL3210:
543 /* enable IRL0-3 but don't provide any masking */ 564 /* enable IRL0-3 but don't provide any masking */
544 ctrl_outl(0x80000000, INTC_INTMSKCLR1); 565 __raw_writel(0x80000000, INTC_INTMSKCLR1);
545 ctrl_outl(0xfffe0000, INTC_INTMSKCLR2); 566 __raw_writel(0xfffe0000, INTC_INTMSKCLR2);
546 break; 567 break;
547 case IRQ_MODE_IRL7654_MASK: 568 case IRQ_MODE_IRL7654_MASK:
548 /* enable IRL7-4 and mask using cpu intc controller */ 569 /* enable IRL7-4 and mask using cpu intc controller */
549 ctrl_outl(0x40000000, INTC_INTMSKCLR1); 570 __raw_writel(0x40000000, INTC_INTMSKCLR1);
550 register_intc_controller(&intc_irl7654_desc); 571 register_intc_controller(&intc_irl7654_desc);
551 break; 572 break;
552 case IRQ_MODE_IRL3210_MASK: 573 case IRQ_MODE_IRL3210_MASK:
553 /* enable IRL0-3 and mask using cpu intc controller */ 574 /* enable IRL0-3 and mask using cpu intc controller */
554 ctrl_outl(0x80000000, INTC_INTMSKCLR1); 575 __raw_writel(0x80000000, INTC_INTMSKCLR1);
555 register_intc_controller(&intc_irl3210_desc); 576 register_intc_controller(&intc_irl3210_desc);
556 break; 577 break;
557 default: 578 default:
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
index eead08d89d32..86d681ecf90e 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
@@ -14,67 +14,153 @@
14#include <linux/sh_timer.h> 14#include <linux/sh_timer.h>
15#include <linux/io.h> 15#include <linux/io.h>
16 16
17static struct plat_sci_port sci_platform_data[] = { 17static struct plat_sci_port scif0_platform_data = {
18 { 18 .mapbase = 0xff923000,
19 .mapbase = 0xff923000, 19 .flags = UPF_BOOT_AUTOCONF,
20 .flags = UPF_BOOT_AUTOCONF, 20 .type = PORT_SCIF,
21 .type = PORT_SCIF, 21 .irqs = { 61, 61, 61, 61 },
22 .irqs = { 61, 61, 61, 61 }, 22};
23 }, { 23
24 .mapbase = 0xff924000, 24static struct platform_device scif0_device = {
25 .flags = UPF_BOOT_AUTOCONF, 25 .name = "sh-sci",
26 .type = PORT_SCIF, 26 .id = 0,
27 .irqs = { 62, 62, 62, 62 }, 27 .dev = {
28 }, { 28 .platform_data = &scif0_platform_data,
29 .mapbase = 0xff925000, 29 },
30 .flags = UPF_BOOT_AUTOCONF, 30};
31 .type = PORT_SCIF, 31
32 .irqs = { 63, 63, 63, 63 }, 32static struct plat_sci_port scif1_platform_data = {
33 }, { 33 .mapbase = 0xff924000,
34 .mapbase = 0xff926000, 34 .flags = UPF_BOOT_AUTOCONF,
35 .flags = UPF_BOOT_AUTOCONF, 35 .type = PORT_SCIF,
36 .type = PORT_SCIF, 36 .irqs = { 62, 62, 62, 62 },
37 .irqs = { 64, 64, 64, 64 }, 37};
38 }, { 38
39 .mapbase = 0xff927000, 39static struct platform_device scif1_device = {
40 .flags = UPF_BOOT_AUTOCONF, 40 .name = "sh-sci",
41 .type = PORT_SCIF, 41 .id = 1,
42 .irqs = { 65, 65, 65, 65 }, 42 .dev = {
43 }, { 43 .platform_data = &scif1_platform_data,
44 .mapbase = 0xff928000, 44 },
45 .flags = UPF_BOOT_AUTOCONF, 45};
46 .type = PORT_SCIF, 46
47 .irqs = { 66, 66, 66, 66 }, 47static struct plat_sci_port scif2_platform_data = {
48 }, { 48 .mapbase = 0xff925000,
49 .mapbase = 0xff929000, 49 .flags = UPF_BOOT_AUTOCONF,
50 .flags = UPF_BOOT_AUTOCONF, 50 .type = PORT_SCIF,
51 .type = PORT_SCIF, 51 .irqs = { 63, 63, 63, 63 },
52 .irqs = { 67, 67, 67, 67 }, 52};
53 }, { 53
54 .mapbase = 0xff92a000, 54static struct platform_device scif2_device = {
55 .flags = UPF_BOOT_AUTOCONF, 55 .name = "sh-sci",
56 .type = PORT_SCIF, 56 .id = 2,
57 .irqs = { 68, 68, 68, 68 }, 57 .dev = {
58 }, { 58 .platform_data = &scif2_platform_data,
59 .mapbase = 0xff92b000, 59 },
60 .flags = UPF_BOOT_AUTOCONF, 60};
61 .type = PORT_SCIF, 61
62 .irqs = { 69, 69, 69, 69 }, 62static struct plat_sci_port scif3_platform_data = {
63 }, { 63 .mapbase = 0xff926000,
64 .mapbase = 0xff92c000, 64 .flags = UPF_BOOT_AUTOCONF,
65 .flags = UPF_BOOT_AUTOCONF, 65 .type = PORT_SCIF,
66 .type = PORT_SCIF, 66 .irqs = { 64, 64, 64, 64 },
67 .irqs = { 70, 70, 70, 70 }, 67};
68 }, { 68
69 .flags = 0, 69static struct platform_device scif3_device = {
70 } 70 .name = "sh-sci",
71 .id = 3,
72 .dev = {
73 .platform_data = &scif3_platform_data,
74 },
75};
76
77static struct plat_sci_port scif4_platform_data = {
78 .mapbase = 0xff927000,
79 .flags = UPF_BOOT_AUTOCONF,
80 .type = PORT_SCIF,
81 .irqs = { 65, 65, 65, 65 },
82};
83
84static struct platform_device scif4_device = {
85 .name = "sh-sci",
86 .id = 4,
87 .dev = {
88 .platform_data = &scif4_platform_data,
89 },
90};
91
92static struct plat_sci_port scif5_platform_data = {
93 .mapbase = 0xff928000,
94 .flags = UPF_BOOT_AUTOCONF,
95 .type = PORT_SCIF,
96 .irqs = { 66, 66, 66, 66 },
97};
98
99static struct platform_device scif5_device = {
100 .name = "sh-sci",
101 .id = 5,
102 .dev = {
103 .platform_data = &scif5_platform_data,
104 },
105};
106
107static struct plat_sci_port scif6_platform_data = {
108 .mapbase = 0xff929000,
109 .flags = UPF_BOOT_AUTOCONF,
110 .type = PORT_SCIF,
111 .irqs = { 67, 67, 67, 67 },
112};
113
114static struct platform_device scif6_device = {
115 .name = "sh-sci",
116 .id = 6,
117 .dev = {
118 .platform_data = &scif6_platform_data,
119 },
120};
121
122static struct plat_sci_port scif7_platform_data = {
123 .mapbase = 0xff92a000,
124 .flags = UPF_BOOT_AUTOCONF,
125 .type = PORT_SCIF,
126 .irqs = { 68, 68, 68, 68 },
127};
128
129static struct platform_device scif7_device = {
130 .name = "sh-sci",
131 .id = 7,
132 .dev = {
133 .platform_data = &scif7_platform_data,
134 },
135};
136
137static struct plat_sci_port scif8_platform_data = {
138 .mapbase = 0xff92b000,
139 .flags = UPF_BOOT_AUTOCONF,
140 .type = PORT_SCIF,
141 .irqs = { 69, 69, 69, 69 },
142};
143
144static struct platform_device scif8_device = {
145 .name = "sh-sci",
146 .id = 8,
147 .dev = {
148 .platform_data = &scif8_platform_data,
149 },
150};
151
152static struct plat_sci_port scif9_platform_data = {
153 .mapbase = 0xff92c000,
154 .flags = UPF_BOOT_AUTOCONF,
155 .type = PORT_SCIF,
156 .irqs = { 70, 70, 70, 70 },
71}; 157};
72 158
73static struct platform_device sci_device = { 159static struct platform_device scif9_device = {
74 .name = "sh-sci", 160 .name = "sh-sci",
75 .id = -1, 161 .id = 9,
76 .dev = { 162 .dev = {
77 .platform_data = sci_platform_data, 163 .platform_data = &scif9_platform_data,
78 }, 164 },
79}; 165};
80 166
@@ -351,6 +437,16 @@ static struct platform_device tmu8_device = {
351}; 437};
352 438
353static struct platform_device *sh7770_devices[] __initdata = { 439static struct platform_device *sh7770_devices[] __initdata = {
440 &scif0_device,
441 &scif1_device,
442 &scif2_device,
443 &scif3_device,
444 &scif4_device,
445 &scif5_device,
446 &scif6_device,
447 &scif7_device,
448 &scif8_device,
449 &scif9_device,
354 &tmu0_device, 450 &tmu0_device,
355 &tmu1_device, 451 &tmu1_device,
356 &tmu2_device, 452 &tmu2_device,
@@ -360,7 +456,6 @@ static struct platform_device *sh7770_devices[] __initdata = {
360 &tmu6_device, 456 &tmu6_device,
361 &tmu7_device, 457 &tmu7_device,
362 &tmu8_device, 458 &tmu8_device,
363 &sci_device,
364}; 459};
365 460
366static int __init sh7770_devices_setup(void) 461static int __init sh7770_devices_setup(void)
@@ -371,6 +466,16 @@ static int __init sh7770_devices_setup(void)
371arch_initcall(sh7770_devices_setup); 466arch_initcall(sh7770_devices_setup);
372 467
373static struct platform_device *sh7770_early_devices[] __initdata = { 468static struct platform_device *sh7770_early_devices[] __initdata = {
469 &scif0_device,
470 &scif1_device,
471 &scif2_device,
472 &scif3_device,
473 &scif4_device,
474 &scif5_device,
475 &scif6_device,
476 &scif7_device,
477 &scif8_device,
478 &scif9_device,
374 &tmu0_device, 479 &tmu0_device,
375 &tmu1_device, 480 &tmu1_device,
376 &tmu2_device, 481 &tmu2_device,
@@ -589,17 +694,17 @@ static DECLARE_INTC_DESC(intc_irl3210_desc, "sh7780-irl3210", irl_vectors,
589void __init plat_irq_setup(void) 694void __init plat_irq_setup(void)
590{ 695{
591 /* disable IRQ7-0 */ 696 /* disable IRQ7-0 */
592 ctrl_outl(0xff000000, INTC_INTMSK0); 697 __raw_writel(0xff000000, INTC_INTMSK0);
593 698
594 /* disable IRL3-0 + IRL7-4 */ 699 /* disable IRL3-0 + IRL7-4 */
595 ctrl_outl(0xc0000000, INTC_INTMSK1); 700 __raw_writel(0xc0000000, INTC_INTMSK1);
596 ctrl_outl(0xfffefffe, INTC_INTMSK2); 701 __raw_writel(0xfffefffe, INTC_INTMSK2);
597 702
598 /* select IRL mode for IRL3-0 + IRL7-4 */ 703 /* select IRL mode for IRL3-0 + IRL7-4 */
599 ctrl_outl(ctrl_inl(INTC_ICR0) & ~0x00c00000, INTC_ICR0); 704 __raw_writel(__raw_readl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
600 705
601 /* disable holding function, ie enable "SH-4 Mode" */ 706 /* disable holding function, ie enable "SH-4 Mode" */
602 ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00200000, INTC_ICR0); 707 __raw_writel(__raw_readl(INTC_ICR0) | 0x00200000, INTC_ICR0);
603 708
604 register_intc_controller(&intc_desc); 709 register_intc_controller(&intc_desc);
605} 710}
@@ -609,27 +714,27 @@ void __init plat_irq_setup_pins(int mode)
609 switch (mode) { 714 switch (mode) {
610 case IRQ_MODE_IRQ: 715 case IRQ_MODE_IRQ:
611 /* select IRQ mode for IRL3-0 + IRL7-4 */ 716 /* select IRQ mode for IRL3-0 + IRL7-4 */
612 ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00c00000, INTC_ICR0); 717 __raw_writel(__raw_readl(INTC_ICR0) | 0x00c00000, INTC_ICR0);
613 register_intc_controller(&intc_irq_desc); 718 register_intc_controller(&intc_irq_desc);
614 break; 719 break;
615 case IRQ_MODE_IRL7654: 720 case IRQ_MODE_IRL7654:
616 /* enable IRL7-4 but don't provide any masking */ 721 /* enable IRL7-4 but don't provide any masking */
617 ctrl_outl(0x40000000, INTC_INTMSKCLR1); 722 __raw_writel(0x40000000, INTC_INTMSKCLR1);
618 ctrl_outl(0x0000fffe, INTC_INTMSKCLR2); 723 __raw_writel(0x0000fffe, INTC_INTMSKCLR2);
619 break; 724 break;
620 case IRQ_MODE_IRL3210: 725 case IRQ_MODE_IRL3210:
621 /* enable IRL0-3 but don't provide any masking */ 726 /* enable IRL0-3 but don't provide any masking */
622 ctrl_outl(0x80000000, INTC_INTMSKCLR1); 727 __raw_writel(0x80000000, INTC_INTMSKCLR1);
623 ctrl_outl(0xfffe0000, INTC_INTMSKCLR2); 728 __raw_writel(0xfffe0000, INTC_INTMSKCLR2);
624 break; 729 break;
625 case IRQ_MODE_IRL7654_MASK: 730 case IRQ_MODE_IRL7654_MASK:
626 /* enable IRL7-4 and mask using cpu intc controller */ 731 /* enable IRL7-4 and mask using cpu intc controller */
627 ctrl_outl(0x40000000, INTC_INTMSKCLR1); 732 __raw_writel(0x40000000, INTC_INTMSKCLR1);
628 register_intc_controller(&intc_irl7654_desc); 733 register_intc_controller(&intc_irl7654_desc);
629 break; 734 break;
630 case IRQ_MODE_IRL3210_MASK: 735 case IRQ_MODE_IRL3210_MASK:
631 /* enable IRL0-3 and mask using cpu intc controller */ 736 /* enable IRL0-3 and mask using cpu intc controller */
632 ctrl_outl(0x80000000, INTC_INTMSKCLR1); 737 __raw_writel(0x80000000, INTC_INTMSKCLR1);
633 register_intc_controller(&intc_irl3210_desc); 738 register_intc_controller(&intc_irl3210_desc);
634 break; 739 break;
635 default: 740 default:
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
index 12ff56f19c5c..02e792c90de6 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
@@ -13,7 +13,40 @@
13#include <linux/io.h> 13#include <linux/io.h>
14#include <linux/serial_sci.h> 14#include <linux/serial_sci.h>
15#include <linux/sh_timer.h> 15#include <linux/sh_timer.h>
16#include <asm/dma-sh.h> 16
17#include <asm/dmaengine.h>
18
19#include <cpu/dma-register.h>
20
21static struct plat_sci_port scif0_platform_data = {
22 .mapbase = 0xffe00000,
23 .flags = UPF_BOOT_AUTOCONF,
24 .type = PORT_SCIF,
25 .irqs = { 40, 40, 40, 40 },
26};
27
28static struct platform_device scif0_device = {
29 .name = "sh-sci",
30 .id = 0,
31 .dev = {
32 .platform_data = &scif0_platform_data,
33 },
34};
35
36static struct plat_sci_port scif1_platform_data = {
37 .mapbase = 0xffe10000,
38 .flags = UPF_BOOT_AUTOCONF,
39 .type = PORT_SCIF,
40 .irqs = { 76, 76, 76, 76 },
41};
42
43static struct platform_device scif1_device = {
44 .name = "sh-sci",
45 .id = 1,
46 .dev = {
47 .platform_data = &scif1_platform_data,
48 },
49};
17 50
18static struct sh_timer_config tmu0_platform_data = { 51static struct sh_timer_config tmu0_platform_data = {
19 .name = "TMU0", 52 .name = "TMU0",
@@ -217,43 +250,137 @@ static struct platform_device rtc_device = {
217 .resource = rtc_resources, 250 .resource = rtc_resources,
218}; 251};
219 252
220static struct plat_sci_port sci_platform_data[] = { 253/* DMA */
254static struct sh_dmae_channel sh7780_dmae0_channels[] = {
221 { 255 {
222 .mapbase = 0xffe00000, 256 .offset = 0,
223 .flags = UPF_BOOT_AUTOCONF, 257 .dmars = 0,
224 .type = PORT_SCIF, 258 .dmars_bit = 0,
225 .irqs = { 40, 40, 40, 40 }, 259 }, {
260 .offset = 0x10,
261 .dmars = 0,
262 .dmars_bit = 8,
263 }, {
264 .offset = 0x20,
265 .dmars = 4,
266 .dmars_bit = 0,
267 }, {
268 .offset = 0x30,
269 .dmars = 4,
270 .dmars_bit = 8,
226 }, { 271 }, {
227 .mapbase = 0xffe10000, 272 .offset = 0x50,
228 .flags = UPF_BOOT_AUTOCONF, 273 .dmars = 8,
229 .type = PORT_SCIF, 274 .dmars_bit = 0,
230 .irqs = { 76, 76, 76, 76 },
231 }, { 275 }, {
232 .flags = 0, 276 .offset = 0x60,
277 .dmars = 8,
278 .dmars_bit = 8,
233 } 279 }
234}; 280};
235 281
236static struct platform_device sci_device = { 282static struct sh_dmae_channel sh7780_dmae1_channels[] = {
237 .name = "sh-sci", 283 {
238 .id = -1, 284 .offset = 0,
239 .dev = { 285 }, {
240 .platform_data = sci_platform_data, 286 .offset = 0x10,
287 }, {
288 .offset = 0x20,
289 }, {
290 .offset = 0x30,
291 }, {
292 .offset = 0x50,
293 }, {
294 .offset = 0x60,
295 }
296};
297
298static unsigned int ts_shift[] = TS_SHIFT;
299
300static struct sh_dmae_pdata dma0_platform_data = {
301 .channel = sh7780_dmae0_channels,
302 .channel_num = ARRAY_SIZE(sh7780_dmae0_channels),
303 .ts_low_shift = CHCR_TS_LOW_SHIFT,
304 .ts_low_mask = CHCR_TS_LOW_MASK,
305 .ts_high_shift = CHCR_TS_HIGH_SHIFT,
306 .ts_high_mask = CHCR_TS_HIGH_MASK,
307 .ts_shift = ts_shift,
308 .ts_shift_num = ARRAY_SIZE(ts_shift),
309 .dmaor_init = DMAOR_INIT,
310};
311
312static struct sh_dmae_pdata dma1_platform_data = {
313 .channel = sh7780_dmae1_channels,
314 .channel_num = ARRAY_SIZE(sh7780_dmae1_channels),
315 .ts_low_shift = CHCR_TS_LOW_SHIFT,
316 .ts_low_mask = CHCR_TS_LOW_MASK,
317 .ts_high_shift = CHCR_TS_HIGH_SHIFT,
318 .ts_high_mask = CHCR_TS_HIGH_MASK,
319 .ts_shift = ts_shift,
320 .ts_shift_num = ARRAY_SIZE(ts_shift),
321 .dmaor_init = DMAOR_INIT,
322};
323
324static struct resource sh7780_dmae0_resources[] = {
325 [0] = {
326 /* Channel registers and DMAOR */
327 .start = 0xfc808020,
328 .end = 0xfc80808f,
329 .flags = IORESOURCE_MEM,
330 },
331 [1] = {
332 /* DMARSx */
333 .start = 0xfc809000,
334 .end = 0xfc80900b,
335 .flags = IORESOURCE_MEM,
336 },
337 {
338 /* Real DMA error IRQ is 38, and channel IRQs are 34-37, 44-45 */
339 .start = 34,
340 .end = 34,
341 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
241 }, 342 },
242}; 343};
243 344
244static struct sh_dmae_pdata dma_platform_data = { 345static struct resource sh7780_dmae1_resources[] = {
245 .mode = (SHDMA_MIX_IRQ | SHDMA_DMAOR1), 346 [0] = {
347 /* Channel registers and DMAOR */
348 .start = 0xfc818020,
349 .end = 0xfc81808f,
350 .flags = IORESOURCE_MEM,
351 },
352 /* DMAC1 has no DMARS */
353 {
354 /* Real DMA error IRQ is 38, and channel IRQs are 46-47, 92-95 */
355 .start = 46,
356 .end = 46,
357 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
358 },
246}; 359};
247 360
248static struct platform_device dma_device = { 361static struct platform_device dma0_device = {
249 .name = "sh-dma-engine", 362 .name = "sh-dma-engine",
250 .id = -1, 363 .id = 0,
364 .resource = sh7780_dmae0_resources,
365 .num_resources = ARRAY_SIZE(sh7780_dmae0_resources),
251 .dev = { 366 .dev = {
252 .platform_data = &dma_platform_data, 367 .platform_data = &dma0_platform_data,
368 },
369};
370
371static struct platform_device dma1_device = {
372 .name = "sh-dma-engine",
373 .id = 1,
374 .resource = sh7780_dmae1_resources,
375 .num_resources = ARRAY_SIZE(sh7780_dmae1_resources),
376 .dev = {
377 .platform_data = &dma1_platform_data,
253 }, 378 },
254}; 379};
255 380
256static struct platform_device *sh7780_devices[] __initdata = { 381static struct platform_device *sh7780_devices[] __initdata = {
382 &scif0_device,
383 &scif1_device,
257 &tmu0_device, 384 &tmu0_device,
258 &tmu1_device, 385 &tmu1_device,
259 &tmu2_device, 386 &tmu2_device,
@@ -261,8 +388,8 @@ static struct platform_device *sh7780_devices[] __initdata = {
261 &tmu4_device, 388 &tmu4_device,
262 &tmu5_device, 389 &tmu5_device,
263 &rtc_device, 390 &rtc_device,
264 &sci_device, 391 &dma0_device,
265 &dma_device, 392 &dma1_device,
266}; 393};
267 394
268static int __init sh7780_devices_setup(void) 395static int __init sh7780_devices_setup(void)
@@ -271,8 +398,9 @@ static int __init sh7780_devices_setup(void)
271 ARRAY_SIZE(sh7780_devices)); 398 ARRAY_SIZE(sh7780_devices));
272} 399}
273arch_initcall(sh7780_devices_setup); 400arch_initcall(sh7780_devices_setup);
274
275static struct platform_device *sh7780_early_devices[] __initdata = { 401static struct platform_device *sh7780_early_devices[] __initdata = {
402 &scif0_device,
403 &scif1_device,
276 &tmu0_device, 404 &tmu0_device,
277 &tmu1_device, 405 &tmu1_device,
278 &tmu2_device, 406 &tmu2_device,
@@ -453,17 +581,17 @@ static DECLARE_INTC_DESC(intc_irl3210_desc, "sh7780-irl3210", irl_vectors,
453void __init plat_irq_setup(void) 581void __init plat_irq_setup(void)
454{ 582{
455 /* disable IRQ7-0 */ 583 /* disable IRQ7-0 */
456 ctrl_outl(0xff000000, INTC_INTMSK0); 584 __raw_writel(0xff000000, INTC_INTMSK0);
457 585
458 /* disable IRL3-0 + IRL7-4 */ 586 /* disable IRL3-0 + IRL7-4 */
459 ctrl_outl(0xc0000000, INTC_INTMSK1); 587 __raw_writel(0xc0000000, INTC_INTMSK1);
460 ctrl_outl(0xfffefffe, INTC_INTMSK2); 588 __raw_writel(0xfffefffe, INTC_INTMSK2);
461 589
462 /* select IRL mode for IRL3-0 + IRL7-4 */ 590 /* select IRL mode for IRL3-0 + IRL7-4 */
463 ctrl_outl(ctrl_inl(INTC_ICR0) & ~0x00c00000, INTC_ICR0); 591 __raw_writel(__raw_readl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
464 592
465 /* disable holding function, ie enable "SH-4 Mode" */ 593 /* disable holding function, ie enable "SH-4 Mode" */
466 ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00200000, INTC_ICR0); 594 __raw_writel(__raw_readl(INTC_ICR0) | 0x00200000, INTC_ICR0);
467 595
468 register_intc_controller(&intc_desc); 596 register_intc_controller(&intc_desc);
469} 597}
@@ -473,27 +601,27 @@ void __init plat_irq_setup_pins(int mode)
473 switch (mode) { 601 switch (mode) {
474 case IRQ_MODE_IRQ: 602 case IRQ_MODE_IRQ:
475 /* select IRQ mode for IRL3-0 + IRL7-4 */ 603 /* select IRQ mode for IRL3-0 + IRL7-4 */
476 ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00c00000, INTC_ICR0); 604 __raw_writel(__raw_readl(INTC_ICR0) | 0x00c00000, INTC_ICR0);
477 register_intc_controller(&intc_irq_desc); 605 register_intc_controller(&intc_irq_desc);
478 break; 606 break;
479 case IRQ_MODE_IRL7654: 607 case IRQ_MODE_IRL7654:
480 /* enable IRL7-4 but don't provide any masking */ 608 /* enable IRL7-4 but don't provide any masking */
481 ctrl_outl(0x40000000, INTC_INTMSKCLR1); 609 __raw_writel(0x40000000, INTC_INTMSKCLR1);
482 ctrl_outl(0x0000fffe, INTC_INTMSKCLR2); 610 __raw_writel(0x0000fffe, INTC_INTMSKCLR2);
483 break; 611 break;
484 case IRQ_MODE_IRL3210: 612 case IRQ_MODE_IRL3210:
485 /* enable IRL0-3 but don't provide any masking */ 613 /* enable IRL0-3 but don't provide any masking */
486 ctrl_outl(0x80000000, INTC_INTMSKCLR1); 614 __raw_writel(0x80000000, INTC_INTMSKCLR1);
487 ctrl_outl(0xfffe0000, INTC_INTMSKCLR2); 615 __raw_writel(0xfffe0000, INTC_INTMSKCLR2);
488 break; 616 break;
489 case IRQ_MODE_IRL7654_MASK: 617 case IRQ_MODE_IRL7654_MASK:
490 /* enable IRL7-4 and mask using cpu intc controller */ 618 /* enable IRL7-4 and mask using cpu intc controller */
491 ctrl_outl(0x40000000, INTC_INTMSKCLR1); 619 __raw_writel(0x40000000, INTC_INTMSKCLR1);
492 register_intc_controller(&intc_irl7654_desc); 620 register_intc_controller(&intc_irl7654_desc);
493 break; 621 break;
494 case IRQ_MODE_IRL3210_MASK: 622 case IRQ_MODE_IRL3210_MASK:
495 /* enable IRL0-3 and mask using cpu intc controller */ 623 /* enable IRL0-3 and mask using cpu intc controller */
496 ctrl_outl(0x80000000, INTC_INTMSKCLR1); 624 __raw_writel(0x80000000, INTC_INTMSKCLR1);
497 register_intc_controller(&intc_irl3210_desc); 625 register_intc_controller(&intc_irl3210_desc);
498 break; 626 break;
499 default: 627 default:
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
index 7f6c718b6c36..1fcd88b1671e 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
@@ -14,8 +14,108 @@
14#include <linux/io.h> 14#include <linux/io.h>
15#include <linux/mm.h> 15#include <linux/mm.h>
16#include <linux/sh_timer.h> 16#include <linux/sh_timer.h>
17
18#include <asm/dmaengine.h>
17#include <asm/mmzone.h> 19#include <asm/mmzone.h>
18 20
21#include <cpu/dma-register.h>
22
23static struct plat_sci_port scif0_platform_data = {
24 .mapbase = 0xffea0000,
25 .flags = UPF_BOOT_AUTOCONF,
26 .type = PORT_SCIF,
27 .irqs = { 40, 40, 40, 40 },
28 .clk = "scif_fck",
29};
30
31static struct platform_device scif0_device = {
32 .name = "sh-sci",
33 .id = 0,
34 .dev = {
35 .platform_data = &scif0_platform_data,
36 },
37};
38
39static struct plat_sci_port scif1_platform_data = {
40 .mapbase = 0xffeb0000,
41 .flags = UPF_BOOT_AUTOCONF,
42 .type = PORT_SCIF,
43 .irqs = { 44, 44, 44, 44 },
44 .clk = "scif_fck",
45};
46
47static struct platform_device scif1_device = {
48 .name = "sh-sci",
49 .id = 1,
50 .dev = {
51 .platform_data = &scif1_platform_data,
52 },
53};
54
55static struct plat_sci_port scif2_platform_data = {
56 .mapbase = 0xffec0000,
57 .flags = UPF_BOOT_AUTOCONF,
58 .type = PORT_SCIF,
59 .irqs = { 60, 60, 60, 60 },
60 .clk = "scif_fck",
61};
62
63static struct platform_device scif2_device = {
64 .name = "sh-sci",
65 .id = 2,
66 .dev = {
67 .platform_data = &scif2_platform_data,
68 },
69};
70
71static struct plat_sci_port scif3_platform_data = {
72 .mapbase = 0xffed0000,
73 .flags = UPF_BOOT_AUTOCONF,
74 .type = PORT_SCIF,
75 .irqs = { 61, 61, 61, 61 },
76 .clk = "scif_fck",
77};
78
79static struct platform_device scif3_device = {
80 .name = "sh-sci",
81 .id = 3,
82 .dev = {
83 .platform_data = &scif3_platform_data,
84 },
85};
86
87static struct plat_sci_port scif4_platform_data = {
88 .mapbase = 0xffee0000,
89 .flags = UPF_BOOT_AUTOCONF,
90 .type = PORT_SCIF,
91 .irqs = { 62, 62, 62, 62 },
92 .clk = "scif_fck",
93};
94
95static struct platform_device scif4_device = {
96 .name = "sh-sci",
97 .id = 4,
98 .dev = {
99 .platform_data = &scif4_platform_data,
100 },
101};
102
103static struct plat_sci_port scif5_platform_data = {
104 .mapbase = 0xffef0000,
105 .flags = UPF_BOOT_AUTOCONF,
106 .type = PORT_SCIF,
107 .irqs = { 63, 63, 63, 63 },
108 .clk = "scif_fck",
109};
110
111static struct platform_device scif5_device = {
112 .name = "sh-sci",
113 .id = 5,
114 .dev = {
115 .platform_data = &scif5_platform_data,
116 },
117};
118
19static struct sh_timer_config tmu0_platform_data = { 119static struct sh_timer_config tmu0_platform_data = {
20 .name = "TMU0", 120 .name = "TMU0",
21 .channel_offset = 0x04, 121 .channel_offset = 0x04,
@@ -198,64 +298,149 @@ static struct platform_device tmu5_device = {
198 .num_resources = ARRAY_SIZE(tmu5_resources), 298 .num_resources = ARRAY_SIZE(tmu5_resources),
199}; 299};
200 300
201static struct plat_sci_port sci_platform_data[] = { 301/* DMA */
302static struct sh_dmae_channel sh7785_dmae0_channels[] = {
202 { 303 {
203 .mapbase = 0xffea0000, 304 .offset = 0,
204 .flags = UPF_BOOT_AUTOCONF, 305 .dmars = 0,
205 .type = PORT_SCIF, 306 .dmars_bit = 0,
206 .irqs = { 40, 40, 40, 40 },
207 .clk = "scif_fck",
208 }, { 307 }, {
209 .mapbase = 0xffeb0000, 308 .offset = 0x10,
210 .flags = UPF_BOOT_AUTOCONF, 309 .dmars = 0,
211 .type = PORT_SCIF, 310 .dmars_bit = 8,
212 .irqs = { 44, 44, 44, 44 },
213 .clk = "scif_fck",
214 }, { 311 }, {
215 .mapbase = 0xffec0000, 312 .offset = 0x20,
216 .flags = UPF_BOOT_AUTOCONF, 313 .dmars = 4,
217 .type = PORT_SCIF, 314 .dmars_bit = 0,
218 .irqs = { 60, 60, 60, 60 },
219 .clk = "scif_fck",
220 }, { 315 }, {
221 .mapbase = 0xffed0000, 316 .offset = 0x30,
222 .flags = UPF_BOOT_AUTOCONF, 317 .dmars = 4,
223 .type = PORT_SCIF, 318 .dmars_bit = 8,
224 .irqs = { 61, 61, 61, 61 },
225 .clk = "scif_fck",
226 }, { 319 }, {
227 .mapbase = 0xffee0000, 320 .offset = 0x50,
228 .flags = UPF_BOOT_AUTOCONF, 321 .dmars = 8,
229 .type = PORT_SCIF, 322 .dmars_bit = 0,
230 .irqs = { 62, 62, 62, 62 },
231 .clk = "scif_fck",
232 }, { 323 }, {
233 .mapbase = 0xffef0000, 324 .offset = 0x60,
234 .flags = UPF_BOOT_AUTOCONF, 325 .dmars = 8,
235 .type = PORT_SCIF, 326 .dmars_bit = 8,
236 .irqs = { 63, 63, 63, 63 }, 327 }
237 .clk = "scif_fck", 328};
329
330static struct sh_dmae_channel sh7785_dmae1_channels[] = {
331 {
332 .offset = 0,
238 }, { 333 }, {
239 .flags = 0, 334 .offset = 0x10,
335 }, {
336 .offset = 0x20,
337 }, {
338 .offset = 0x30,
339 }, {
340 .offset = 0x50,
341 }, {
342 .offset = 0x60,
240 } 343 }
241}; 344};
242 345
243static struct platform_device sci_device = { 346static unsigned int ts_shift[] = TS_SHIFT;
244 .name = "sh-sci", 347
245 .id = -1, 348static struct sh_dmae_pdata dma0_platform_data = {
349 .channel = sh7785_dmae0_channels,
350 .channel_num = ARRAY_SIZE(sh7785_dmae0_channels),
351 .ts_low_shift = CHCR_TS_LOW_SHIFT,
352 .ts_low_mask = CHCR_TS_LOW_MASK,
353 .ts_high_shift = CHCR_TS_HIGH_SHIFT,
354 .ts_high_mask = CHCR_TS_HIGH_MASK,
355 .ts_shift = ts_shift,
356 .ts_shift_num = ARRAY_SIZE(ts_shift),
357 .dmaor_init = DMAOR_INIT,
358};
359
360static struct sh_dmae_pdata dma1_platform_data = {
361 .channel = sh7785_dmae1_channels,
362 .channel_num = ARRAY_SIZE(sh7785_dmae1_channels),
363 .ts_low_shift = CHCR_TS_LOW_SHIFT,
364 .ts_low_mask = CHCR_TS_LOW_MASK,
365 .ts_high_shift = CHCR_TS_HIGH_SHIFT,
366 .ts_high_mask = CHCR_TS_HIGH_MASK,
367 .ts_shift = ts_shift,
368 .ts_shift_num = ARRAY_SIZE(ts_shift),
369 .dmaor_init = DMAOR_INIT,
370};
371
372static struct resource sh7785_dmae0_resources[] = {
373 [0] = {
374 /* Channel registers and DMAOR */
375 .start = 0xfc808020,
376 .end = 0xfc80808f,
377 .flags = IORESOURCE_MEM,
378 },
379 [1] = {
380 /* DMARSx */
381 .start = 0xfc809000,
382 .end = 0xfc80900b,
383 .flags = IORESOURCE_MEM,
384 },
385 {
386 /* Real DMA error IRQ is 39, and channel IRQs are 33-38 */
387 .start = 33,
388 .end = 33,
389 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
390 },
391};
392
393static struct resource sh7785_dmae1_resources[] = {
394 [0] = {
395 /* Channel registers and DMAOR */
396 .start = 0xfcc08020,
397 .end = 0xfcc0808f,
398 .flags = IORESOURCE_MEM,
399 },
400 /* DMAC1 has no DMARS */
401 {
402 /* Real DMA error IRQ is 58, and channel IRQs are 52-57 */
403 .start = 52,
404 .end = 52,
405 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
406 },
407};
408
409static struct platform_device dma0_device = {
410 .name = "sh-dma-engine",
411 .id = 0,
412 .resource = sh7785_dmae0_resources,
413 .num_resources = ARRAY_SIZE(sh7785_dmae0_resources),
414 .dev = {
415 .platform_data = &dma0_platform_data,
416 },
417};
418
419static struct platform_device dma1_device = {
420 .name = "sh-dma-engine",
421 .id = 1,
422 .resource = sh7785_dmae1_resources,
423 .num_resources = ARRAY_SIZE(sh7785_dmae1_resources),
246 .dev = { 424 .dev = {
247 .platform_data = sci_platform_data, 425 .platform_data = &dma1_platform_data,
248 }, 426 },
249}; 427};
250 428
251static struct platform_device *sh7785_devices[] __initdata = { 429static struct platform_device *sh7785_devices[] __initdata = {
430 &scif0_device,
431 &scif1_device,
432 &scif2_device,
433 &scif3_device,
434 &scif4_device,
435 &scif5_device,
252 &tmu0_device, 436 &tmu0_device,
253 &tmu1_device, 437 &tmu1_device,
254 &tmu2_device, 438 &tmu2_device,
255 &tmu3_device, 439 &tmu3_device,
256 &tmu4_device, 440 &tmu4_device,
257 &tmu5_device, 441 &tmu5_device,
258 &sci_device, 442 &dma0_device,
443 &dma1_device,
259}; 444};
260 445
261static int __init sh7785_devices_setup(void) 446static int __init sh7785_devices_setup(void)
@@ -266,6 +451,12 @@ static int __init sh7785_devices_setup(void)
266arch_initcall(sh7785_devices_setup); 451arch_initcall(sh7785_devices_setup);
267 452
268static struct platform_device *sh7785_early_devices[] __initdata = { 453static struct platform_device *sh7785_early_devices[] __initdata = {
454 &scif0_device,
455 &scif1_device,
456 &scif2_device,
457 &scif3_device,
458 &scif4_device,
459 &scif5_device,
269 &tmu0_device, 460 &tmu0_device,
270 &tmu1_device, 461 &tmu1_device,
271 &tmu2_device, 462 &tmu2_device,
@@ -470,17 +661,17 @@ static DECLARE_INTC_DESC(intc_desc_irl4567, "sh7785-irl4567", vectors_irl4567,
470void __init plat_irq_setup(void) 661void __init plat_irq_setup(void)
471{ 662{
472 /* disable IRQ3-0 + IRQ7-4 */ 663 /* disable IRQ3-0 + IRQ7-4 */
473 ctrl_outl(0xff000000, INTC_INTMSK0); 664 __raw_writel(0xff000000, INTC_INTMSK0);
474 665
475 /* disable IRL3-0 + IRL7-4 */ 666 /* disable IRL3-0 + IRL7-4 */
476 ctrl_outl(0xc0000000, INTC_INTMSK1); 667 __raw_writel(0xc0000000, INTC_INTMSK1);
477 ctrl_outl(0xfffefffe, INTC_INTMSK2); 668 __raw_writel(0xfffefffe, INTC_INTMSK2);
478 669
479 /* select IRL mode for IRL3-0 + IRL7-4 */ 670 /* select IRL mode for IRL3-0 + IRL7-4 */
480 ctrl_outl(ctrl_inl(INTC_ICR0) & ~0x00c00000, INTC_ICR0); 671 __raw_writel(__raw_readl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
481 672
482 /* disable holding function, ie enable "SH-4 Mode" */ 673 /* disable holding function, ie enable "SH-4 Mode" */
483 ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00200000, INTC_ICR0); 674 __raw_writel(__raw_readl(INTC_ICR0) | 0x00200000, INTC_ICR0);
484 675
485 register_intc_controller(&intc_desc); 676 register_intc_controller(&intc_desc);
486} 677}
@@ -490,32 +681,32 @@ void __init plat_irq_setup_pins(int mode)
490 switch (mode) { 681 switch (mode) {
491 case IRQ_MODE_IRQ7654: 682 case IRQ_MODE_IRQ7654:
492 /* select IRQ mode for IRL7-4 */ 683 /* select IRQ mode for IRL7-4 */
493 ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00400000, INTC_ICR0); 684 __raw_writel(__raw_readl(INTC_ICR0) | 0x00400000, INTC_ICR0);
494 register_intc_controller(&intc_desc_irq4567); 685 register_intc_controller(&intc_desc_irq4567);
495 break; 686 break;
496 case IRQ_MODE_IRQ3210: 687 case IRQ_MODE_IRQ3210:
497 /* select IRQ mode for IRL3-0 */ 688 /* select IRQ mode for IRL3-0 */
498 ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00800000, INTC_ICR0); 689 __raw_writel(__raw_readl(INTC_ICR0) | 0x00800000, INTC_ICR0);
499 register_intc_controller(&intc_desc_irq0123); 690 register_intc_controller(&intc_desc_irq0123);
500 break; 691 break;
501 case IRQ_MODE_IRL7654: 692 case IRQ_MODE_IRL7654:
502 /* enable IRL7-4 but don't provide any masking */ 693 /* enable IRL7-4 but don't provide any masking */
503 ctrl_outl(0x40000000, INTC_INTMSKCLR1); 694 __raw_writel(0x40000000, INTC_INTMSKCLR1);
504 ctrl_outl(0x0000fffe, INTC_INTMSKCLR2); 695 __raw_writel(0x0000fffe, INTC_INTMSKCLR2);
505 break; 696 break;
506 case IRQ_MODE_IRL3210: 697 case IRQ_MODE_IRL3210:
507 /* enable IRL0-3 but don't provide any masking */ 698 /* enable IRL0-3 but don't provide any masking */
508 ctrl_outl(0x80000000, INTC_INTMSKCLR1); 699 __raw_writel(0x80000000, INTC_INTMSKCLR1);
509 ctrl_outl(0xfffe0000, INTC_INTMSKCLR2); 700 __raw_writel(0xfffe0000, INTC_INTMSKCLR2);
510 break; 701 break;
511 case IRQ_MODE_IRL7654_MASK: 702 case IRQ_MODE_IRL7654_MASK:
512 /* enable IRL7-4 and mask using cpu intc controller */ 703 /* enable IRL7-4 and mask using cpu intc controller */
513 ctrl_outl(0x40000000, INTC_INTMSKCLR1); 704 __raw_writel(0x40000000, INTC_INTMSKCLR1);
514 register_intc_controller(&intc_desc_irl4567); 705 register_intc_controller(&intc_desc_irl4567);
515 break; 706 break;
516 case IRQ_MODE_IRL3210_MASK: 707 case IRQ_MODE_IRL3210_MASK:
517 /* enable IRL0-3 and mask using cpu intc controller */ 708 /* enable IRL0-3 and mask using cpu intc controller */
518 ctrl_outl(0x80000000, INTC_INTMSKCLR1); 709 __raw_writel(0x80000000, INTC_INTMSKCLR1);
519 register_intc_controller(&intc_desc_irl0123); 710 register_intc_controller(&intc_desc_irl0123);
520 break; 711 break;
521 default: 712 default:
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
index 0104a8ec5369..7e585320710a 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
@@ -23,51 +23,96 @@
23#include <linux/sh_timer.h> 23#include <linux/sh_timer.h>
24#include <asm/mmzone.h> 24#include <asm/mmzone.h>
25 25
26static struct plat_sci_port sci_platform_data[] = { 26static struct plat_sci_port scif0_platform_data = {
27 { 27 .mapbase = 0xffea0000,
28 .mapbase = 0xffea0000, 28 .flags = UPF_BOOT_AUTOCONF,
29 .flags = UPF_BOOT_AUTOCONF, 29 .type = PORT_SCIF,
30 .type = PORT_SCIF, 30 .irqs = { 40, 41, 43, 42 },
31 .irqs = { 40, 41, 43, 42 }, 31};
32
33static struct platform_device scif0_device = {
34 .name = "sh-sci",
35 .id = 0,
36 .dev = {
37 .platform_data = &scif0_platform_data,
32 }, 38 },
33 /*
34 * The rest of these all have multiplexed IRQs
35 */
36 {
37 .mapbase = 0xffeb0000,
38 .flags = UPF_BOOT_AUTOCONF,
39 .type = PORT_SCIF,
40 .irqs = { 44, 44, 44, 44 },
41 }, {
42 .mapbase = 0xffec0000,
43 .flags = UPF_BOOT_AUTOCONF,
44 .type = PORT_SCIF,
45 .irqs = { 50, 50, 50, 50 },
46 }, {
47 .mapbase = 0xffed0000,
48 .flags = UPF_BOOT_AUTOCONF,
49 .type = PORT_SCIF,
50 .irqs = { 51, 51, 51, 51 },
51 }, {
52 .mapbase = 0xffee0000,
53 .flags = UPF_BOOT_AUTOCONF,
54 .type = PORT_SCIF,
55 .irqs = { 52, 52, 52, 52 },
56 }, {
57 .mapbase = 0xffef0000,
58 .flags = UPF_BOOT_AUTOCONF,
59 .type = PORT_SCIF,
60 .irqs = { 53, 53, 53, 53 },
61 }, {
62 .flags = 0,
63 }
64}; 39};
65 40
66static struct platform_device sci_device = { 41/*
42 * The rest of these all have multiplexed IRQs
43 */
44static struct plat_sci_port scif1_platform_data = {
45 .mapbase = 0xffeb0000,
46 .flags = UPF_BOOT_AUTOCONF,
47 .type = PORT_SCIF,
48 .irqs = { 44, 44, 44, 44 },
49};
50
51static struct platform_device scif1_device = {
67 .name = "sh-sci", 52 .name = "sh-sci",
68 .id = -1, 53 .id = 1,
54 .dev = {
55 .platform_data = &scif1_platform_data,
56 },
57};
58
59static struct plat_sci_port scif2_platform_data = {
60 .mapbase = 0xffec0000,
61 .flags = UPF_BOOT_AUTOCONF,
62 .type = PORT_SCIF,
63 .irqs = { 50, 50, 50, 50 },
64};
65
66static struct platform_device scif2_device = {
67 .name = "sh-sci",
68 .id = 2,
69 .dev = {
70 .platform_data = &scif2_platform_data,
71 },
72};
73
74static struct plat_sci_port scif3_platform_data = {
75 .mapbase = 0xffed0000,
76 .flags = UPF_BOOT_AUTOCONF,
77 .type = PORT_SCIF,
78 .irqs = { 51, 51, 51, 51 },
79};
80
81static struct platform_device scif3_device = {
82 .name = "sh-sci",
83 .id = 3,
84 .dev = {
85 .platform_data = &scif3_platform_data,
86 },
87};
88
89static struct plat_sci_port scif4_platform_data = {
90 .mapbase = 0xffee0000,
91 .flags = UPF_BOOT_AUTOCONF,
92 .type = PORT_SCIF,
93 .irqs = { 52, 52, 52, 52 },
94};
95
96static struct platform_device scif4_device = {
97 .name = "sh-sci",
98 .id = 4,
99 .dev = {
100 .platform_data = &scif4_platform_data,
101 },
102};
103
104static struct plat_sci_port scif5_platform_data = {
105 .mapbase = 0xffef0000,
106 .flags = UPF_BOOT_AUTOCONF,
107 .type = PORT_SCIF,
108 .irqs = { 53, 53, 53, 53 },
109};
110
111static struct platform_device scif5_device = {
112 .name = "sh-sci",
113 .id = 5,
69 .dev = { 114 .dev = {
70 .platform_data = sci_platform_data, 115 .platform_data = &scif5_platform_data,
71 }, 116 },
72}; 117};
73 118
@@ -459,6 +504,12 @@ static struct platform_device usb_ohci_device = {
459}; 504};
460 505
461static struct platform_device *sh7786_early_devices[] __initdata = { 506static struct platform_device *sh7786_early_devices[] __initdata = {
507 &scif0_device,
508 &scif1_device,
509 &scif2_device,
510 &scif3_device,
511 &scif4_device,
512 &scif5_device,
462 &tmu0_device, 513 &tmu0_device,
463 &tmu1_device, 514 &tmu1_device,
464 &tmu2_device, 515 &tmu2_device,
@@ -474,7 +525,6 @@ static struct platform_device *sh7786_early_devices[] __initdata = {
474}; 525};
475 526
476static struct platform_device *sh7786_devices[] __initdata = { 527static struct platform_device *sh7786_devices[] __initdata = {
477 &sci_device,
478 &usb_ohci_device, 528 &usb_ohci_device,
479}; 529};
480 530
@@ -817,14 +867,14 @@ static DECLARE_INTC_DESC(intc_desc_irl4567, "sh7786-irl4567", vectors_irl4567,
817void __init plat_irq_setup(void) 867void __init plat_irq_setup(void)
818{ 868{
819 /* disable IRQ3-0 + IRQ7-4 */ 869 /* disable IRQ3-0 + IRQ7-4 */
820 ctrl_outl(0xff000000, INTC_INTMSK0); 870 __raw_writel(0xff000000, INTC_INTMSK0);
821 871
822 /* disable IRL3-0 + IRL7-4 */ 872 /* disable IRL3-0 + IRL7-4 */
823 ctrl_outl(0xc0000000, INTC_INTMSK1); 873 __raw_writel(0xc0000000, INTC_INTMSK1);
824 ctrl_outl(0xfffefffe, INTC_INTMSK2); 874 __raw_writel(0xfffefffe, INTC_INTMSK2);
825 875
826 /* select IRL mode for IRL3-0 + IRL7-4 */ 876 /* select IRL mode for IRL3-0 + IRL7-4 */
827 ctrl_outl(ctrl_inl(INTC_ICR0) & ~0x00c00000, INTC_ICR0); 877 __raw_writel(__raw_readl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
828 878
829 register_intc_controller(&intc_desc); 879 register_intc_controller(&intc_desc);
830} 880}
@@ -834,32 +884,32 @@ void __init plat_irq_setup_pins(int mode)
834 switch (mode) { 884 switch (mode) {
835 case IRQ_MODE_IRQ7654: 885 case IRQ_MODE_IRQ7654:
836 /* select IRQ mode for IRL7-4 */ 886 /* select IRQ mode for IRL7-4 */
837 ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00400000, INTC_ICR0); 887 __raw_writel(__raw_readl(INTC_ICR0) | 0x00400000, INTC_ICR0);
838 register_intc_controller(&intc_desc_irq4567); 888 register_intc_controller(&intc_desc_irq4567);
839 break; 889 break;
840 case IRQ_MODE_IRQ3210: 890 case IRQ_MODE_IRQ3210:
841 /* select IRQ mode for IRL3-0 */ 891 /* select IRQ mode for IRL3-0 */
842 ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00800000, INTC_ICR0); 892 __raw_writel(__raw_readl(INTC_ICR0) | 0x00800000, INTC_ICR0);
843 register_intc_controller(&intc_desc_irq0123); 893 register_intc_controller(&intc_desc_irq0123);
844 break; 894 break;
845 case IRQ_MODE_IRL7654: 895 case IRQ_MODE_IRL7654:
846 /* enable IRL7-4 but don't provide any masking */ 896 /* enable IRL7-4 but don't provide any masking */
847 ctrl_outl(0x40000000, INTC_INTMSKCLR1); 897 __raw_writel(0x40000000, INTC_INTMSKCLR1);
848 ctrl_outl(0x0000fffe, INTC_INTMSKCLR2); 898 __raw_writel(0x0000fffe, INTC_INTMSKCLR2);
849 break; 899 break;
850 case IRQ_MODE_IRL3210: 900 case IRQ_MODE_IRL3210:
851 /* enable IRL0-3 but don't provide any masking */ 901 /* enable IRL0-3 but don't provide any masking */
852 ctrl_outl(0x80000000, INTC_INTMSKCLR1); 902 __raw_writel(0x80000000, INTC_INTMSKCLR1);
853 ctrl_outl(0xfffe0000, INTC_INTMSKCLR2); 903 __raw_writel(0xfffe0000, INTC_INTMSKCLR2);
854 break; 904 break;
855 case IRQ_MODE_IRL7654_MASK: 905 case IRQ_MODE_IRL7654_MASK:
856 /* enable IRL7-4 and mask using cpu intc controller */ 906 /* enable IRL7-4 and mask using cpu intc controller */
857 ctrl_outl(0x40000000, INTC_INTMSKCLR1); 907 __raw_writel(0x40000000, INTC_INTMSKCLR1);
858 register_intc_controller(&intc_desc_irl4567); 908 register_intc_controller(&intc_desc_irl4567);
859 break; 909 break;
860 case IRQ_MODE_IRL3210_MASK: 910 case IRQ_MODE_IRL3210_MASK:
861 /* enable IRL0-3 and mask using cpu intc controller */ 911 /* enable IRL0-3 and mask using cpu intc controller */
862 ctrl_outl(0x80000000, INTC_INTMSKCLR1); 912 __raw_writel(0x80000000, INTC_INTMSKCLR1);
863 register_intc_controller(&intc_desc_irl0123); 913 register_intc_controller(&intc_desc_irl0123);
864 break; 914 break;
865 default: 915 default:
diff --git a/arch/sh/kernel/cpu/sh4a/setup-shx3.c b/arch/sh/kernel/cpu/sh4a/setup-shx3.c
index e848443deeb9..780ba17a5599 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-shx3.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-shx3.c
@@ -15,37 +15,57 @@
15#include <linux/sh_timer.h> 15#include <linux/sh_timer.h>
16#include <asm/mmzone.h> 16#include <asm/mmzone.h>
17 17
18static struct plat_sci_port sci_platform_data[] = { 18/*
19 { 19 * This intentionally only registers SCIF ports 0, 1, and 3. SCIF 2
20 .mapbase = 0xffc30000, 20 * INTEVT values overlap with the FPU EXPEVT ones, requiring special
21 .flags = UPF_BOOT_AUTOCONF, 21 * demuxing in the exception dispatch path.
22 .type = PORT_SCIF, 22 *
23 .irqs = { 40, 41, 43, 42 }, 23 * As this overlap is something that never should have made it in to
24 }, { 24 * silicon in the first place, we just refuse to deal with the port at
25 .mapbase = 0xffc40000, 25 * all rather than adding infrastructure to hack around it.
26 .flags = UPF_BOOT_AUTOCONF, 26 */
27 .type = PORT_SCIF, 27static struct plat_sci_port scif0_platform_data = {
28 .irqs = { 44, 45, 47, 46 }, 28 .mapbase = 0xffc30000,
29 }, { 29 .flags = UPF_BOOT_AUTOCONF,
30 .mapbase = 0xffc50000, 30 .type = PORT_SCIF,
31 .flags = UPF_BOOT_AUTOCONF, 31 .irqs = { 40, 41, 43, 42 },
32 .type = PORT_SCIF,
33 .irqs = { 48, 49, 51, 50 },
34 }, {
35 .mapbase = 0xffc60000,
36 .flags = UPF_BOOT_AUTOCONF,
37 .type = PORT_SCIF,
38 .irqs = { 52, 53, 55, 54 },
39 }, {
40 .flags = 0,
41 }
42}; 32};
43 33
44static struct platform_device sci_device = { 34static struct platform_device scif0_device = {
45 .name = "sh-sci", 35 .name = "sh-sci",
46 .id = -1, 36 .id = 0,
37 .dev = {
38 .platform_data = &scif0_platform_data,
39 },
40};
41
42static struct plat_sci_port scif1_platform_data = {
43 .mapbase = 0xffc40000,
44 .flags = UPF_BOOT_AUTOCONF,
45 .type = PORT_SCIF,
46 .irqs = { 44, 45, 47, 46 },
47};
48
49static struct platform_device scif1_device = {
50 .name = "sh-sci",
51 .id = 1,
47 .dev = { 52 .dev = {
48 .platform_data = sci_platform_data, 53 .platform_data = &scif1_platform_data,
54 },
55};
56
57static struct plat_sci_port scif2_platform_data = {
58 .mapbase = 0xffc60000,
59 .flags = UPF_BOOT_AUTOCONF,
60 .type = PORT_SCIF,
61 .irqs = { 52, 53, 55, 54 },
62};
63
64static struct platform_device scif2_device = {
65 .name = "sh-sci",
66 .id = 2,
67 .dev = {
68 .platform_data = &scif2_platform_data,
49 }, 69 },
50}; 70};
51 71
@@ -232,6 +252,9 @@ static struct platform_device tmu5_device = {
232}; 252};
233 253
234static struct platform_device *shx3_early_devices[] __initdata = { 254static struct platform_device *shx3_early_devices[] __initdata = {
255 &scif0_device,
256 &scif1_device,
257 &scif2_device,
235 &tmu0_device, 258 &tmu0_device,
236 &tmu1_device, 259 &tmu1_device,
237 &tmu2_device, 260 &tmu2_device,
@@ -240,21 +263,10 @@ static struct platform_device *shx3_early_devices[] __initdata = {
240 &tmu5_device, 263 &tmu5_device,
241}; 264};
242 265
243static struct platform_device *shx3_devices[] __initdata = {
244 &sci_device,
245};
246
247static int __init shx3_devices_setup(void) 266static int __init shx3_devices_setup(void)
248{ 267{
249 int ret; 268 return platform_add_devices(shx3_early_devices,
250
251 ret = platform_add_devices(shx3_early_devices,
252 ARRAY_SIZE(shx3_early_devices)); 269 ARRAY_SIZE(shx3_early_devices));
253 if (unlikely(ret != 0))
254 return ret;
255
256 return platform_add_devices(shx3_devices,
257 ARRAY_SIZE(shx3_devices));
258} 270}
259arch_initcall(shx3_devices_setup); 271arch_initcall(shx3_devices_setup);
260 272
@@ -268,7 +280,11 @@ enum {
268 UNUSED = 0, 280 UNUSED = 0,
269 281
270 /* interrupt sources */ 282 /* interrupt sources */
271 IRL, IRQ0, IRQ1, IRQ2, IRQ3, 283 IRL_LLLL, IRL_LLLH, IRL_LLHL, IRL_LLHH,
284 IRL_LHLL, IRL_LHLH, IRL_LHHL, IRL_LHHH,
285 IRL_HLLL, IRL_HLLH, IRL_HLHL, IRL_HLHH,
286 IRL_HHLL, IRL_HHLH, IRL_HHHL,
287 IRQ0, IRQ1, IRQ2, IRQ3,
272 HUDII, 288 HUDII,
273 TMU0, TMU1, TMU2, TMU3, TMU4, TMU5, 289 TMU0, TMU1, TMU2, TMU3, TMU4, TMU5,
274 PCII0, PCII1, PCII2, PCII3, PCII4, 290 PCII0, PCII1, PCII2, PCII3, PCII4,
@@ -291,7 +307,7 @@ enum {
291 INTICI4, INTICI5, INTICI6, INTICI7, 307 INTICI4, INTICI5, INTICI6, INTICI7,
292 308
293 /* interrupt groups */ 309 /* interrupt groups */
294 PCII56789, SCIF0, SCIF1, SCIF2, SCIF3, 310 IRL, PCII56789, SCIF0, SCIF1, SCIF2, SCIF3,
295 DMAC0, DMAC1, 311 DMAC0, DMAC1,
296}; 312};
297 313
@@ -309,8 +325,6 @@ static struct intc_vect vectors[] __initdata = {
309 INTC_VECT(SCIF0_BRI, 0x740), INTC_VECT(SCIF0_TXI, 0x760), 325 INTC_VECT(SCIF0_BRI, 0x740), INTC_VECT(SCIF0_TXI, 0x760),
310 INTC_VECT(SCIF1_ERI, 0x780), INTC_VECT(SCIF1_RXI, 0x7a0), 326 INTC_VECT(SCIF1_ERI, 0x780), INTC_VECT(SCIF1_RXI, 0x7a0),
311 INTC_VECT(SCIF1_BRI, 0x7c0), INTC_VECT(SCIF1_TXI, 0x7e0), 327 INTC_VECT(SCIF1_BRI, 0x7c0), INTC_VECT(SCIF1_TXI, 0x7e0),
312 INTC_VECT(SCIF2_ERI, 0x800), INTC_VECT(SCIF2_RXI, 0x820),
313 INTC_VECT(SCIF2_BRI, 0x840), INTC_VECT(SCIF2_TXI, 0x860),
314 INTC_VECT(SCIF3_ERI, 0x880), INTC_VECT(SCIF3_RXI, 0x8a0), 328 INTC_VECT(SCIF3_ERI, 0x880), INTC_VECT(SCIF3_RXI, 0x8a0),
315 INTC_VECT(SCIF3_BRI, 0x8c0), INTC_VECT(SCIF3_TXI, 0x8e0), 329 INTC_VECT(SCIF3_BRI, 0x8c0), INTC_VECT(SCIF3_TXI, 0x8e0),
316 INTC_VECT(DMAC0_DMINT0, 0x900), INTC_VECT(DMAC0_DMINT1, 0x920), 330 INTC_VECT(DMAC0_DMINT0, 0x900), INTC_VECT(DMAC0_DMINT1, 0x920),
@@ -344,10 +358,13 @@ static struct intc_vect vectors[] __initdata = {
344}; 358};
345 359
346static struct intc_group groups[] __initdata = { 360static struct intc_group groups[] __initdata = {
361 INTC_GROUP(IRL, IRL_LLLL, IRL_LLLH, IRL_LLHL, IRL_LLHH,
362 IRL_LHLL, IRL_LHLH, IRL_LHHL, IRL_LHHH,
363 IRL_HLLL, IRL_HLLH, IRL_HLHL, IRL_HLHH,
364 IRL_HHLL, IRL_HHLH, IRL_HHHL),
347 INTC_GROUP(PCII56789, PCII5, PCII6, PCII7, PCII8, PCII9), 365 INTC_GROUP(PCII56789, PCII5, PCII6, PCII7, PCII8, PCII9),
348 INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI), 366 INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI),
349 INTC_GROUP(SCIF1, SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI), 367 INTC_GROUP(SCIF1, SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI),
350 INTC_GROUP(SCIF2, SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI),
351 INTC_GROUP(SCIF3, SCIF3_ERI, SCIF3_RXI, SCIF3_BRI, SCIF3_TXI), 368 INTC_GROUP(SCIF3, SCIF3_ERI, SCIF3_RXI, SCIF3_BRI, SCIF3_TXI),
352 INTC_GROUP(DMAC0, DMAC0_DMINT0, DMAC0_DMINT1, DMAC0_DMINT2, 369 INTC_GROUP(DMAC0, DMAC0_DMINT0, DMAC0_DMINT1, DMAC0_DMINT2,
353 DMAC0_DMINT3, DMAC0_DMINT4, DMAC0_DMINT5, DMAC0_DMAE), 370 DMAC0_DMINT3, DMAC0_DMINT4, DMAC0_DMINT5, DMAC0_DMAE),
@@ -419,14 +436,14 @@ static DECLARE_INTC_DESC(intc_desc_irq, "shx3-irq", vectors_irq, groups,
419 436
420/* External interrupt pins in IRL mode */ 437/* External interrupt pins in IRL mode */
421static struct intc_vect vectors_irl[] __initdata = { 438static struct intc_vect vectors_irl[] __initdata = {
422 INTC_VECT(IRL, 0x200), INTC_VECT(IRL, 0x220), 439 INTC_VECT(IRL_LLLL, 0x200), INTC_VECT(IRL_LLLH, 0x220),
423 INTC_VECT(IRL, 0x240), INTC_VECT(IRL, 0x260), 440 INTC_VECT(IRL_LLHL, 0x240), INTC_VECT(IRL_LLHH, 0x260),
424 INTC_VECT(IRL, 0x280), INTC_VECT(IRL, 0x2a0), 441 INTC_VECT(IRL_LHLL, 0x280), INTC_VECT(IRL_LHLH, 0x2a0),
425 INTC_VECT(IRL, 0x2c0), INTC_VECT(IRL, 0x2e0), 442 INTC_VECT(IRL_LHHL, 0x2c0), INTC_VECT(IRL_LHHH, 0x2e0),
426 INTC_VECT(IRL, 0x300), INTC_VECT(IRL, 0x320), 443 INTC_VECT(IRL_HLLL, 0x300), INTC_VECT(IRL_HLLH, 0x320),
427 INTC_VECT(IRL, 0x340), INTC_VECT(IRL, 0x360), 444 INTC_VECT(IRL_HLHL, 0x340), INTC_VECT(IRL_HLHH, 0x360),
428 INTC_VECT(IRL, 0x380), INTC_VECT(IRL, 0x3a0), 445 INTC_VECT(IRL_HHLL, 0x380), INTC_VECT(IRL_HHLH, 0x3a0),
429 INTC_VECT(IRL, 0x3c0), 446 INTC_VECT(IRL_HHHL, 0x3c0),
430}; 447};
431 448
432static DECLARE_INTC_DESC(intc_desc_irl, "shx3-irl", vectors_irl, groups, 449static DECLARE_INTC_DESC(intc_desc_irl, "shx3-irl", vectors_irl, groups,
diff --git a/arch/sh/kernel/cpu/sh4a/smp-shx3.c b/arch/sh/kernel/cpu/sh4a/smp-shx3.c
index 185ec3976a25..11bf4c1e25c0 100644
--- a/arch/sh/kernel/cpu/sh4a/smp-shx3.c
+++ b/arch/sh/kernel/cpu/sh4a/smp-shx3.c
@@ -14,6 +14,13 @@
14#include <linux/interrupt.h> 14#include <linux/interrupt.h>
15#include <linux/io.h> 15#include <linux/io.h>
16 16
17#define STBCR_REG(phys_id) (0xfe400004 | (phys_id << 12))
18#define RESET_REG(phys_id) (0xfe400008 | (phys_id << 12))
19
20#define STBCR_MSTP 0x00000001
21#define STBCR_RESET 0x00000002
22#define STBCR_LTSLP 0x80000000
23
17static irqreturn_t ipi_interrupt_handler(int irq, void *arg) 24static irqreturn_t ipi_interrupt_handler(int irq, void *arg)
18{ 25{
19 unsigned int message = (unsigned int)(long)arg; 26 unsigned int message = (unsigned int)(long)arg;
@@ -21,9 +28,9 @@ static irqreturn_t ipi_interrupt_handler(int irq, void *arg)
21 unsigned int offs = 4 * cpu; 28 unsigned int offs = 4 * cpu;
22 unsigned int x; 29 unsigned int x;
23 30
24 x = ctrl_inl(0xfe410070 + offs); /* C0INITICI..CnINTICI */ 31 x = __raw_readl(0xfe410070 + offs); /* C0INITICI..CnINTICI */
25 x &= (1 << (message << 2)); 32 x &= (1 << (message << 2));
26 ctrl_outl(x, 0xfe410080 + offs); /* C0INTICICLR..CnINTICICLR */ 33 __raw_writel(x, 0xfe410080 + offs); /* C0INTICICLR..CnINTICICLR */
27 34
28 smp_message_recv(message); 35 smp_message_recv(message);
29 36
@@ -37,6 +44,9 @@ void __init plat_smp_setup(void)
37 44
38 init_cpu_possible(cpumask_of(cpu)); 45 init_cpu_possible(cpumask_of(cpu));
39 46
47 /* Enable light sleep for the boot CPU */
48 __raw_writel(__raw_readl(STBCR_REG(cpu)) | STBCR_LTSLP, STBCR_REG(cpu));
49
40 __cpu_number_map[0] = 0; 50 __cpu_number_map[0] = 0;
41 __cpu_logical_map[0] = 0; 51 __cpu_logical_map[0] = 0;
42 52
@@ -66,32 +76,26 @@ void __init plat_prepare_cpus(unsigned int max_cpus)
66 "IPI", (void *)(long)i); 76 "IPI", (void *)(long)i);
67} 77}
68 78
69#define STBCR_REG(phys_id) (0xfe400004 | (phys_id << 12))
70#define RESET_REG(phys_id) (0xfe400008 | (phys_id << 12))
71
72#define STBCR_MSTP 0x00000001
73#define STBCR_RESET 0x00000002
74#define STBCR_LTSLP 0x80000000
75
76#define STBCR_AP_VAL (STBCR_RESET | STBCR_LTSLP)
77
78void plat_start_cpu(unsigned int cpu, unsigned long entry_point) 79void plat_start_cpu(unsigned int cpu, unsigned long entry_point)
79{ 80{
80 ctrl_outl(entry_point, RESET_REG(cpu)); 81 if (__in_29bit_mode())
82 __raw_writel(entry_point, RESET_REG(cpu));
83 else
84 __raw_writel(virt_to_phys(entry_point), RESET_REG(cpu));
81 85
82 if (!(ctrl_inl(STBCR_REG(cpu)) & STBCR_MSTP)) 86 if (!(__raw_readl(STBCR_REG(cpu)) & STBCR_MSTP))
83 ctrl_outl(STBCR_MSTP, STBCR_REG(cpu)); 87 __raw_writel(STBCR_MSTP, STBCR_REG(cpu));
84 88
85 while (!(ctrl_inl(STBCR_REG(cpu)) & STBCR_MSTP)) 89 while (!(__raw_readl(STBCR_REG(cpu)) & STBCR_MSTP))
86 cpu_relax(); 90 cpu_relax();
87 91
88 /* Start up secondary processor by sending a reset */ 92 /* Start up secondary processor by sending a reset */
89 ctrl_outl(STBCR_AP_VAL, STBCR_REG(cpu)); 93 __raw_writel(STBCR_RESET | STBCR_LTSLP, STBCR_REG(cpu));
90} 94}
91 95
92int plat_smp_processor_id(void) 96int plat_smp_processor_id(void)
93{ 97{
94 return ctrl_inl(0xff000048); /* CPIDR */ 98 return __raw_readl(0xff000048); /* CPIDR */
95} 99}
96 100
97void plat_send_ipi(unsigned int cpu, unsigned int message) 101void plat_send_ipi(unsigned int cpu, unsigned int message)
@@ -100,5 +104,5 @@ void plat_send_ipi(unsigned int cpu, unsigned int message)
100 104
101 BUG_ON(cpu >= 4); 105 BUG_ON(cpu >= 4);
102 106
103 ctrl_outl(1 << (message << 2), addr); /* C0INTICI..CnINTICI */ 107 __raw_writel(1 << (message << 2), addr); /* C0INTICI..CnINTICI */
104} 108}
diff --git a/arch/sh/kernel/cpu/sh4a/ubc.c b/arch/sh/kernel/cpu/sh4a/ubc.c
new file mode 100644
index 000000000000..efb2745bcb36
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4a/ubc.c
@@ -0,0 +1,133 @@
1/*
2 * arch/sh/kernel/cpu/sh4a/ubc.c
3 *
4 * On-chip UBC support for SH-4A CPUs.
5 *
6 * Copyright (C) 2009 - 2010 Paul Mundt
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#include <linux/init.h>
13#include <linux/err.h>
14#include <linux/clk.h>
15#include <linux/io.h>
16#include <asm/hw_breakpoint.h>
17
18#define UBC_CBR(idx) (0xff200000 + (0x20 * idx))
19#define UBC_CRR(idx) (0xff200004 + (0x20 * idx))
20#define UBC_CAR(idx) (0xff200008 + (0x20 * idx))
21#define UBC_CAMR(idx) (0xff20000c + (0x20 * idx))
22
23#define UBC_CCMFR 0xff200600
24#define UBC_CBCR 0xff200620
25
26/* CRR */
27#define UBC_CRR_PCB (1 << 1)
28#define UBC_CRR_BIE (1 << 0)
29
30/* CBR */
31#define UBC_CBR_CE (1 << 0)
32
33static struct sh_ubc sh4a_ubc;
34
35static void sh4a_ubc_enable(struct arch_hw_breakpoint *info, int idx)
36{
37 __raw_writel(UBC_CBR_CE | info->len | info->type, UBC_CBR(idx));
38 __raw_writel(info->address, UBC_CAR(idx));
39}
40
41static void sh4a_ubc_disable(struct arch_hw_breakpoint *info, int idx)
42{
43 __raw_writel(0, UBC_CBR(idx));
44 __raw_writel(0, UBC_CAR(idx));
45}
46
47static void sh4a_ubc_enable_all(unsigned long mask)
48{
49 int i;
50
51 for (i = 0; i < sh4a_ubc.num_events; i++)
52 if (mask & (1 << i))
53 __raw_writel(__raw_readl(UBC_CBR(i)) | UBC_CBR_CE,
54 UBC_CBR(i));
55}
56
57static void sh4a_ubc_disable_all(void)
58{
59 int i;
60
61 for (i = 0; i < sh4a_ubc.num_events; i++)
62 __raw_writel(__raw_readl(UBC_CBR(i)) & ~UBC_CBR_CE,
63 UBC_CBR(i));
64}
65
66static unsigned long sh4a_ubc_active_mask(void)
67{
68 unsigned long active = 0;
69 int i;
70
71 for (i = 0; i < sh4a_ubc.num_events; i++)
72 if (__raw_readl(UBC_CBR(i)) & UBC_CBR_CE)
73 active |= (1 << i);
74
75 return active;
76}
77
78static unsigned long sh4a_ubc_triggered_mask(void)
79{
80 return __raw_readl(UBC_CCMFR);
81}
82
83static void sh4a_ubc_clear_triggered_mask(unsigned long mask)
84{
85 __raw_writel(__raw_readl(UBC_CCMFR) & ~mask, UBC_CCMFR);
86}
87
88static struct sh_ubc sh4a_ubc = {
89 .name = "SH-4A",
90 .num_events = 2,
91 .trap_nr = 0x1e0,
92 .enable = sh4a_ubc_enable,
93 .disable = sh4a_ubc_disable,
94 .enable_all = sh4a_ubc_enable_all,
95 .disable_all = sh4a_ubc_disable_all,
96 .active_mask = sh4a_ubc_active_mask,
97 .triggered_mask = sh4a_ubc_triggered_mask,
98 .clear_triggered_mask = sh4a_ubc_clear_triggered_mask,
99};
100
101static int __init sh4a_ubc_init(void)
102{
103 struct clk *ubc_iclk = clk_get(NULL, "ubc0");
104 int i;
105
106 /*
107 * The UBC MSTP bit is optional, as not all platforms will have
108 * it. Just ignore it if we can't find it.
109 */
110 if (IS_ERR(ubc_iclk))
111 ubc_iclk = NULL;
112
113 clk_enable(ubc_iclk);
114
115 __raw_writel(0, UBC_CBCR);
116
117 for (i = 0; i < sh4a_ubc.num_events; i++) {
118 __raw_writel(0, UBC_CAMR(i));
119 __raw_writel(0, UBC_CBR(i));
120
121 __raw_writel(UBC_CRR_BIE | UBC_CRR_PCB, UBC_CRR(i));
122
123 /* dummy read for write posting */
124 (void)__raw_readl(UBC_CRR(i));
125 }
126
127 clk_disable(ubc_iclk);
128
129 sh4a_ubc.clk = ubc_iclk;
130
131 return register_sh_ubc(&sh4a_ubc);
132}
133arch_initcall(sh4a_ubc_init);
diff --git a/arch/sh/kernel/cpu/sh5/clock-sh5.c b/arch/sh/kernel/cpu/sh5/clock-sh5.c
index 7f864ebc51d3..9cfc19b8dbe4 100644
--- a/arch/sh/kernel/cpu/sh5/clock-sh5.c
+++ b/arch/sh/kernel/cpu/sh5/clock-sh5.c
@@ -24,7 +24,7 @@ static unsigned long cprc_base;
24 24
25static void master_clk_init(struct clk *clk) 25static void master_clk_init(struct clk *clk)
26{ 26{
27 int idx = (ctrl_inl(cprc_base + 0x00) >> 6) & 0x0007; 27 int idx = (__raw_readl(cprc_base + 0x00) >> 6) & 0x0007;
28 clk->rate *= ifc_table[idx]; 28 clk->rate *= ifc_table[idx];
29} 29}
30 30
@@ -34,7 +34,7 @@ static struct clk_ops sh5_master_clk_ops = {
34 34
35static unsigned long module_clk_recalc(struct clk *clk) 35static unsigned long module_clk_recalc(struct clk *clk)
36{ 36{
37 int idx = (ctrl_inw(cprc_base) >> 12) & 0x0007; 37 int idx = (__raw_readw(cprc_base) >> 12) & 0x0007;
38 return clk->parent->rate / ifc_table[idx]; 38 return clk->parent->rate / ifc_table[idx];
39} 39}
40 40
@@ -44,7 +44,7 @@ static struct clk_ops sh5_module_clk_ops = {
44 44
45static unsigned long bus_clk_recalc(struct clk *clk) 45static unsigned long bus_clk_recalc(struct clk *clk)
46{ 46{
47 int idx = (ctrl_inw(cprc_base) >> 3) & 0x0007; 47 int idx = (__raw_readw(cprc_base) >> 3) & 0x0007;
48 return clk->parent->rate / ifc_table[idx]; 48 return clk->parent->rate / ifc_table[idx];
49} 49}
50 50
@@ -54,7 +54,7 @@ static struct clk_ops sh5_bus_clk_ops = {
54 54
55static unsigned long cpu_clk_recalc(struct clk *clk) 55static unsigned long cpu_clk_recalc(struct clk *clk)
56{ 56{
57 int idx = (ctrl_inw(cprc_base) & 0x0007); 57 int idx = (__raw_readw(cprc_base) & 0x0007);
58 return clk->parent->rate / ifc_table[idx]; 58 return clk->parent->rate / ifc_table[idx];
59} 59}
60 60
diff --git a/arch/sh/kernel/cpu/sh5/entry.S b/arch/sh/kernel/cpu/sh5/entry.S
index b0aacf675258..6b80295dd7a4 100644
--- a/arch/sh/kernel/cpu/sh5/entry.S
+++ b/arch/sh/kernel/cpu/sh5/entry.S
@@ -187,7 +187,7 @@ trap_jtable:
187 .rept 6 187 .rept 6
188 .long do_exception_error /* 0x880 - 0x920 */ 188 .long do_exception_error /* 0x880 - 0x920 */
189 .endr 189 .endr
190 .long do_software_break_point /* 0x940 */ 190 .long breakpoint_trap_handler /* 0x940 */
191 .long do_exception_error /* 0x960 */ 191 .long do_exception_error /* 0x960 */
192 .long do_single_step /* 0x980 */ 192 .long do_single_step /* 0x980 */
193 193
@@ -933,7 +933,7 @@ ret_with_reschedule:
933 933
934 pta restore_all, tr1 934 pta restore_all, tr1
935 935
936 movi (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK), r8 936 movi _TIF_SIGPENDING, r8
937 and r8, r7, r8 937 and r8, r7, r8
938 pta work_notifysig, tr0 938 pta work_notifysig, tr0
939 bne r8, ZERO, tr0 939 bne r8, ZERO, tr0
@@ -1124,7 +1124,7 @@ fpu_error_or_IRQA:
1124 pta its_IRQ, tr0 1124 pta its_IRQ, tr0
1125 beqi/l r4, EVENT_INTERRUPT, tr0 1125 beqi/l r4, EVENT_INTERRUPT, tr0
1126#ifdef CONFIG_SH_FPU 1126#ifdef CONFIG_SH_FPU
1127 movi do_fpu_state_restore, r6 1127 movi fpu_state_restore_trap_handler, r6
1128#else 1128#else
1129 movi do_exception_error, r6 1129 movi do_exception_error, r6
1130#endif 1130#endif
@@ -1135,7 +1135,7 @@ fpu_error_or_IRQB:
1135 pta its_IRQ, tr0 1135 pta its_IRQ, tr0
1136 beqi/l r4, EVENT_INTERRUPT, tr0 1136 beqi/l r4, EVENT_INTERRUPT, tr0
1137#ifdef CONFIG_SH_FPU 1137#ifdef CONFIG_SH_FPU
1138 movi do_fpu_state_restore, r6 1138 movi fpu_state_restore_trap_handler, r6
1139#else 1139#else
1140 movi do_exception_error, r6 1140 movi do_exception_error, r6
1141#endif 1141#endif
diff --git a/arch/sh/kernel/cpu/sh5/fpu.c b/arch/sh/kernel/cpu/sh5/fpu.c
index dd4f51ffb50e..4b3bb35e99f3 100644
--- a/arch/sh/kernel/cpu/sh5/fpu.c
+++ b/arch/sh/kernel/cpu/sh5/fpu.c
@@ -15,26 +15,8 @@
15#include <linux/sched.h> 15#include <linux/sched.h>
16#include <linux/signal.h> 16#include <linux/signal.h>
17#include <asm/processor.h> 17#include <asm/processor.h>
18#include <asm/user.h>
19#include <asm/io.h>
20#include <asm/fpu.h>
21 18
22/* 19void save_fpu(struct task_struct *tsk)
23 * Initially load the FPU with signalling NANS. This bit pattern
24 * has the property that no matter whether considered as single or as
25 * double precision, it still represents a signalling NAN.
26 */
27#define sNAN64 0xFFFFFFFFFFFFFFFFULL
28#define sNAN32 0xFFFFFFFFUL
29
30static union sh_fpu_union init_fpuregs = {
31 .hard = {
32 .fp_regs = { [0 ... 63] = sNAN32 },
33 .fpscr = FPSCR_INIT
34 }
35};
36
37void save_fpu(struct task_struct *tsk, struct pt_regs *regs)
38{ 20{
39 asm volatile("fst.p %0, (0*8), fp0\n\t" 21 asm volatile("fst.p %0, (0*8), fp0\n\t"
40 "fst.p %0, (1*8), fp2\n\t" 22 "fst.p %0, (1*8), fp2\n\t"
@@ -72,12 +54,11 @@ void save_fpu(struct task_struct *tsk, struct pt_regs *regs)
72 "fgetscr fr63\n\t" 54 "fgetscr fr63\n\t"
73 "fst.s %0, (32*8), fr63\n\t" 55 "fst.s %0, (32*8), fr63\n\t"
74 : /* no output */ 56 : /* no output */
75 : "r" (&tsk->thread.fpu.hard) 57 : "r" (&tsk->thread.xstate->hardfpu)
76 : "memory"); 58 : "memory");
77} 59}
78 60
79static inline void 61void restore_fpu(struct task_struct *tsk)
80fpload(struct sh_fpu_hard_struct *fpregs)
81{ 62{
82 asm volatile("fld.p %0, (0*8), fp0\n\t" 63 asm volatile("fld.p %0, (0*8), fp0\n\t"
83 "fld.p %0, (1*8), fp2\n\t" 64 "fld.p %0, (1*8), fp2\n\t"
@@ -116,16 +97,11 @@ fpload(struct sh_fpu_hard_struct *fpregs)
116 97
117 "fld.p %0, (31*8), fp62\n\t" 98 "fld.p %0, (31*8), fp62\n\t"
118 : /* no output */ 99 : /* no output */
119 : "r" (fpregs) ); 100 : "r" (&tsk->thread.xstate->hardfpu)
120} 101 : "memory");
121
122void fpinit(struct sh_fpu_hard_struct *fpregs)
123{
124 *fpregs = init_fpuregs.hard;
125} 102}
126 103
127asmlinkage void 104asmlinkage void do_fpu_error(unsigned long ex, struct pt_regs *regs)
128do_fpu_error(unsigned long ex, struct pt_regs *regs)
129{ 105{
130 struct task_struct *tsk = current; 106 struct task_struct *tsk = current;
131 107
@@ -133,35 +109,6 @@ do_fpu_error(unsigned long ex, struct pt_regs *regs)
133 109
134 tsk->thread.trap_no = 11; 110 tsk->thread.trap_no = 11;
135 tsk->thread.error_code = 0; 111 tsk->thread.error_code = 0;
136 force_sig(SIGFPE, tsk);
137}
138
139
140asmlinkage void
141do_fpu_state_restore(unsigned long ex, struct pt_regs *regs)
142{
143 void die(const char *str, struct pt_regs *regs, long err);
144
145 if (! user_mode(regs))
146 die("FPU used in kernel", regs, ex);
147 112
148 regs->sr &= ~SR_FD; 113 force_sig(SIGFPE, tsk);
149
150 if (last_task_used_math == current)
151 return;
152
153 enable_fpu();
154 if (last_task_used_math != NULL)
155 /* Other processes fpu state, save away */
156 save_fpu(last_task_used_math, regs);
157
158 last_task_used_math = current;
159 if (used_math()) {
160 fpload(&current->thread.fpu.hard);
161 } else {
162 /* First time FPU user. */
163 fpload(&init_fpuregs.hard);
164 set_used_math();
165 }
166 disable_fpu();
167} 114}
diff --git a/arch/sh/kernel/cpu/sh5/setup-sh5.c b/arch/sh/kernel/cpu/sh5/setup-sh5.c
index 6a0f82f70032..e7a3c1e4b604 100644
--- a/arch/sh/kernel/cpu/sh5/setup-sh5.c
+++ b/arch/sh/kernel/cpu/sh5/setup-sh5.c
@@ -16,22 +16,18 @@
16#include <linux/sh_timer.h> 16#include <linux/sh_timer.h>
17#include <asm/addrspace.h> 17#include <asm/addrspace.h>
18 18
19static struct plat_sci_port sci_platform_data[] = { 19static struct plat_sci_port scif0_platform_data = {
20 { 20 .mapbase = PHYS_PERIPHERAL_BLOCK + 0x01030000,
21 .mapbase = PHYS_PERIPHERAL_BLOCK + 0x01030000, 21 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
22 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, 22 .type = PORT_SCIF,
23 .type = PORT_SCIF, 23 .irqs = { 39, 40, 42, 0 },
24 .irqs = { 39, 40, 42, 0 },
25 }, {
26 .flags = 0,
27 }
28}; 24};
29 25
30static struct platform_device sci_device = { 26static struct platform_device scif0_device = {
31 .name = "sh-sci", 27 .name = "sh-sci",
32 .id = -1, 28 .id = 0,
33 .dev = { 29 .dev = {
34 .platform_data = sci_platform_data, 30 .platform_data = &scif0_platform_data,
35 }, 31 },
36}; 32};
37 33
@@ -164,13 +160,13 @@ static struct platform_device tmu2_device = {
164}; 160};
165 161
166static struct platform_device *sh5_early_devices[] __initdata = { 162static struct platform_device *sh5_early_devices[] __initdata = {
163 &scif0_device,
167 &tmu0_device, 164 &tmu0_device,
168 &tmu1_device, 165 &tmu1_device,
169 &tmu2_device, 166 &tmu2_device,
170}; 167};
171 168
172static struct platform_device *sh5_devices[] __initdata = { 169static struct platform_device *sh5_devices[] __initdata = {
173 &sci_device,
174 &rtc_device, 170 &rtc_device,
175}; 171};
176 172
diff --git a/arch/sh/kernel/cpu/shmobile/cpuidle.c b/arch/sh/kernel/cpu/shmobile/cpuidle.c
index 1c504bd972c3..83972aa319c2 100644
--- a/arch/sh/kernel/cpu/shmobile/cpuidle.c
+++ b/arch/sh/kernel/cpu/shmobile/cpuidle.c
@@ -87,25 +87,31 @@ void sh_mobile_setup_cpuidle(void)
87 87
88 dev->safe_state = state; 88 dev->safe_state = state;
89 89
90 state = &dev->states[i++]; 90 if (sh_mobile_sleep_supported & SUSP_SH_SF) {
91 snprintf(state->name, CPUIDLE_NAME_LEN, "C1"); 91 state = &dev->states[i++];
92 strncpy(state->desc, "SuperH Sleep Mode [SF]", CPUIDLE_DESC_LEN); 92 snprintf(state->name, CPUIDLE_NAME_LEN, "C1");
93 state->exit_latency = 100; 93 strncpy(state->desc, "SuperH Sleep Mode [SF]",
94 state->target_residency = 1 * 2; 94 CPUIDLE_DESC_LEN);
95 state->power_usage = 1; 95 state->exit_latency = 100;
96 state->flags = 0; 96 state->target_residency = 1 * 2;
97 state->flags |= CPUIDLE_FLAG_TIME_VALID; 97 state->power_usage = 1;
98 state->enter = cpuidle_sleep_enter; 98 state->flags = 0;
99 state->flags |= CPUIDLE_FLAG_TIME_VALID;
100 state->enter = cpuidle_sleep_enter;
101 }
99 102
100 state = &dev->states[i++]; 103 if (sh_mobile_sleep_supported & SUSP_SH_STANDBY) {
101 snprintf(state->name, CPUIDLE_NAME_LEN, "C2"); 104 state = &dev->states[i++];
102 strncpy(state->desc, "SuperH Mobile Standby Mode [SF]", CPUIDLE_DESC_LEN); 105 snprintf(state->name, CPUIDLE_NAME_LEN, "C2");
103 state->exit_latency = 2300; 106 strncpy(state->desc, "SuperH Mobile Standby Mode [SF]",
104 state->target_residency = 1 * 2; 107 CPUIDLE_DESC_LEN);
105 state->power_usage = 1; 108 state->exit_latency = 2300;
106 state->flags = 0; 109 state->target_residency = 1 * 2;
107 state->flags |= CPUIDLE_FLAG_TIME_VALID; 110 state->power_usage = 1;
108 state->enter = cpuidle_sleep_enter; 111 state->flags = 0;
112 state->flags |= CPUIDLE_FLAG_TIME_VALID;
113 state->enter = cpuidle_sleep_enter;
114 }
109 115
110 dev->state_count = i; 116 dev->state_count = i;
111 117
diff --git a/arch/sh/kernel/cpu/shmobile/pm.c b/arch/sh/kernel/cpu/shmobile/pm.c
index ee3c2aaf66fb..e55968712706 100644
--- a/arch/sh/kernel/cpu/shmobile/pm.c
+++ b/arch/sh/kernel/cpu/shmobile/pm.c
@@ -15,6 +15,13 @@
15#include <linux/suspend.h> 15#include <linux/suspend.h>
16#include <asm/suspend.h> 16#include <asm/suspend.h>
17#include <asm/uaccess.h> 17#include <asm/uaccess.h>
18#include <asm/cacheflush.h>
19
20/*
21 * Notifier lists for pre/post sleep notification
22 */
23ATOMIC_NOTIFIER_HEAD(sh_mobile_pre_sleep_notifier_list);
24ATOMIC_NOTIFIER_HEAD(sh_mobile_post_sleep_notifier_list);
18 25
19/* 26/*
20 * Sleep modes available on SuperH Mobile: 27 * Sleep modes available on SuperH Mobile:
@@ -26,30 +33,106 @@
26#define SUSP_MODE_SLEEP (SUSP_SH_SLEEP) 33#define SUSP_MODE_SLEEP (SUSP_SH_SLEEP)
27#define SUSP_MODE_SLEEP_SF (SUSP_SH_SLEEP | SUSP_SH_SF) 34#define SUSP_MODE_SLEEP_SF (SUSP_SH_SLEEP | SUSP_SH_SF)
28#define SUSP_MODE_STANDBY_SF (SUSP_SH_STANDBY | SUSP_SH_SF) 35#define SUSP_MODE_STANDBY_SF (SUSP_SH_STANDBY | SUSP_SH_SF)
36#define SUSP_MODE_RSTANDBY_SF \
37 (SUSP_SH_RSTANDBY | SUSP_SH_MMU | SUSP_SH_REGS | SUSP_SH_SF)
38 /*
39 * U-standby mode is unsupported since it needs bootloader hacks
40 */
29 41
30/* 42#ifdef CONFIG_CPU_SUBTYPE_SH7724
31 * The following modes are not there yet: 43#define RAM_BASE 0xfd800000 /* RSMEM */
32 * 44#else
33 * R-standby mode is unsupported, but will be added in the future 45#define RAM_BASE 0xe5200000 /* ILRAM */
34 * U-standby mode is low priority since it needs bootloader hacks 46#endif
35 */
36
37#define ILRAM_BASE 0xe5200000
38
39extern const unsigned char sh_mobile_standby[];
40extern const unsigned int sh_mobile_standby_size;
41 47
42void sh_mobile_call_standby(unsigned long mode) 48void sh_mobile_call_standby(unsigned long mode)
43{ 49{
44 void *onchip_mem = (void *)ILRAM_BASE; 50 void *onchip_mem = (void *)RAM_BASE;
45 void (*standby_onchip_mem)(unsigned long, unsigned long) = onchip_mem; 51 struct sh_sleep_data *sdp = onchip_mem;
52 void (*standby_onchip_mem)(unsigned long, unsigned long);
53
54 /* code located directly after data structure */
55 standby_onchip_mem = (void *)(sdp + 1);
56
57 atomic_notifier_call_chain(&sh_mobile_pre_sleep_notifier_list,
58 mode, NULL);
59
60 /* flush the caches if MMU flag is set */
61 if (mode & SUSP_SH_MMU)
62 flush_cache_all();
46 63
47 /* Let assembly snippet in on-chip memory handle the rest */ 64 /* Let assembly snippet in on-chip memory handle the rest */
48 standby_onchip_mem(mode, ILRAM_BASE); 65 standby_onchip_mem(mode, RAM_BASE);
66
67 atomic_notifier_call_chain(&sh_mobile_post_sleep_notifier_list,
68 mode, NULL);
69}
70
71extern char sh_mobile_sleep_enter_start;
72extern char sh_mobile_sleep_enter_end;
73
74extern char sh_mobile_sleep_resume_start;
75extern char sh_mobile_sleep_resume_end;
76
77unsigned long sh_mobile_sleep_supported = SUSP_SH_SLEEP;
78
79void sh_mobile_register_self_refresh(unsigned long flags,
80 void *pre_start, void *pre_end,
81 void *post_start, void *post_end)
82{
83 void *onchip_mem = (void *)RAM_BASE;
84 void *vp;
85 struct sh_sleep_data *sdp;
86 int n;
87
88 /* part 0: data area */
89 sdp = onchip_mem;
90 sdp->addr.stbcr = 0xa4150020; /* STBCR */
91 sdp->addr.bar = 0xa4150040; /* BAR */
92 sdp->addr.pteh = 0xff000000; /* PTEH */
93 sdp->addr.ptel = 0xff000004; /* PTEL */
94 sdp->addr.ttb = 0xff000008; /* TTB */
95 sdp->addr.tea = 0xff00000c; /* TEA */
96 sdp->addr.mmucr = 0xff000010; /* MMUCR */
97 sdp->addr.ptea = 0xff000034; /* PTEA */
98 sdp->addr.pascr = 0xff000070; /* PASCR */
99 sdp->addr.irmcr = 0xff000078; /* IRMCR */
100 sdp->addr.ccr = 0xff00001c; /* CCR */
101 sdp->addr.ramcr = 0xff000074; /* RAMCR */
102 vp = sdp + 1;
103
104 /* part 1: common code to enter sleep mode */
105 n = &sh_mobile_sleep_enter_end - &sh_mobile_sleep_enter_start;
106 memcpy(vp, &sh_mobile_sleep_enter_start, n);
107 vp += roundup(n, 4);
108
109 /* part 2: board specific code to enter self-refresh mode */
110 n = pre_end - pre_start;
111 memcpy(vp, pre_start, n);
112 sdp->sf_pre = (unsigned long)vp;
113 vp += roundup(n, 4);
114
115 /* part 3: board specific code to resume from self-refresh mode */
116 n = post_end - post_start;
117 memcpy(vp, post_start, n);
118 sdp->sf_post = (unsigned long)vp;
119 vp += roundup(n, 4);
120
121 /* part 4: common code to resume from sleep mode */
122 WARN_ON(vp > (onchip_mem + 0x600));
123 vp = onchip_mem + 0x600; /* located at interrupt vector */
124 n = &sh_mobile_sleep_resume_end - &sh_mobile_sleep_resume_start;
125 memcpy(vp, &sh_mobile_sleep_resume_start, n);
126 sdp->resume = (unsigned long)vp;
127
128 sh_mobile_sleep_supported |= flags;
49} 129}
50 130
51static int sh_pm_enter(suspend_state_t state) 131static int sh_pm_enter(suspend_state_t state)
52{ 132{
133 if (!(sh_mobile_sleep_supported & SUSP_MODE_STANDBY_SF))
134 return -ENXIO;
135
53 local_irq_disable(); 136 local_irq_disable();
54 set_bl_bit(); 137 set_bl_bit();
55 sh_mobile_call_standby(SUSP_MODE_STANDBY_SF); 138 sh_mobile_call_standby(SUSP_MODE_STANDBY_SF);
@@ -65,13 +148,6 @@ static struct platform_suspend_ops sh_pm_ops = {
65 148
66static int __init sh_pm_init(void) 149static int __init sh_pm_init(void)
67{ 150{
68 void *onchip_mem = (void *)ILRAM_BASE;
69
70 /* Copy the assembly snippet to the otherwise ununsed ILRAM */
71 memcpy(onchip_mem, sh_mobile_standby, sh_mobile_standby_size);
72 wmb();
73 ctrl_barrier();
74
75 suspend_set_ops(&sh_pm_ops); 151 suspend_set_ops(&sh_pm_ops);
76 sh_mobile_setup_cpuidle(); 152 sh_mobile_setup_cpuidle();
77 return 0; 153 return 0;
diff --git a/arch/sh/kernel/cpu/shmobile/pm_runtime.c b/arch/sh/kernel/cpu/shmobile/pm_runtime.c
index 7c615b17e209..6dcb8166a64d 100644
--- a/arch/sh/kernel/cpu/shmobile/pm_runtime.c
+++ b/arch/sh/kernel/cpu/shmobile/pm_runtime.c
@@ -45,12 +45,14 @@ static int __platform_pm_runtime_resume(struct platform_device *pdev)
45 45
46 dev_dbg(d, "__platform_pm_runtime_resume() [%d]\n", hwblk); 46 dev_dbg(d, "__platform_pm_runtime_resume() [%d]\n", hwblk);
47 47
48 if (d->driver && d->driver->pm && d->driver->pm->runtime_resume) { 48 if (d->driver) {
49 hwblk_enable(hwblk_info, hwblk); 49 hwblk_enable(hwblk_info, hwblk);
50 ret = 0; 50 ret = 0;
51 51
52 if (test_bit(PDEV_ARCHDATA_FLAG_SUSP, &ad->flags)) { 52 if (test_bit(PDEV_ARCHDATA_FLAG_SUSP, &ad->flags)) {
53 ret = d->driver->pm->runtime_resume(d); 53 if (d->driver->pm && d->driver->pm->runtime_resume)
54 ret = d->driver->pm->runtime_resume(d);
55
54 if (!ret) 56 if (!ret)
55 clear_bit(PDEV_ARCHDATA_FLAG_SUSP, &ad->flags); 57 clear_bit(PDEV_ARCHDATA_FLAG_SUSP, &ad->flags);
56 else 58 else
@@ -73,12 +75,15 @@ static int __platform_pm_runtime_suspend(struct platform_device *pdev)
73 75
74 dev_dbg(d, "__platform_pm_runtime_suspend() [%d]\n", hwblk); 76 dev_dbg(d, "__platform_pm_runtime_suspend() [%d]\n", hwblk);
75 77
76 if (d->driver && d->driver->pm && d->driver->pm->runtime_suspend) { 78 if (d->driver) {
77 BUG_ON(!test_bit(PDEV_ARCHDATA_FLAG_IDLE, &ad->flags)); 79 BUG_ON(!test_bit(PDEV_ARCHDATA_FLAG_IDLE, &ad->flags));
80 ret = 0;
78 81
79 hwblk_enable(hwblk_info, hwblk); 82 if (d->driver->pm && d->driver->pm->runtime_suspend) {
80 ret = d->driver->pm->runtime_suspend(d); 83 hwblk_enable(hwblk_info, hwblk);
81 hwblk_disable(hwblk_info, hwblk); 84 ret = d->driver->pm->runtime_suspend(d);
85 hwblk_disable(hwblk_info, hwblk);
86 }
82 87
83 if (!ret) { 88 if (!ret) {
84 set_bit(PDEV_ARCHDATA_FLAG_SUSP, &ad->flags); 89 set_bit(PDEV_ARCHDATA_FLAG_SUSP, &ad->flags);
diff --git a/arch/sh/kernel/cpu/shmobile/sleep.S b/arch/sh/kernel/cpu/shmobile/sleep.S
index a439e6c7824f..e6aac65f5750 100644
--- a/arch/sh/kernel/cpu/shmobile/sleep.S
+++ b/arch/sh/kernel/cpu/shmobile/sleep.S
@@ -20,79 +20,143 @@
20 * Kernel mode register usage, see entry.S: 20 * Kernel mode register usage, see entry.S:
21 * k0 scratch 21 * k0 scratch
22 * k1 scratch 22 * k1 scratch
23 * k4 scratch
24 */ 23 */
25#define k0 r0 24#define k0 r0
26#define k1 r1 25#define k1 r1
27#define k4 r4
28 26
29/* manage self-refresh and enter standby mode. 27/* manage self-refresh and enter standby mode. must be self-contained.
30 * this code will be copied to on-chip memory and executed from there. 28 * this code will be copied to on-chip memory and executed from there.
31 */ 29 */
30 .balign 4
31ENTRY(sh_mobile_sleep_enter_start)
32 32
33 .balign 4096,0,4096 33 /* save mode flags */
34ENTRY(sh_mobile_standby) 34 mov.l r4, @(SH_SLEEP_MODE, r5)
35 35
36 /* save original vbr */ 36 /* save original vbr */
37 stc vbr, r1 37 stc vbr, r0
38 mova saved_vbr, r0 38 mov.l r0, @(SH_SLEEP_VBR, r5)
39 mov.l r1, @r0
40 39
41 /* point vbr to our on-chip memory page */ 40 /* point vbr to our on-chip memory page */
42 ldc r5, vbr 41 ldc r5, vbr
43 42
44 /* save return address */ 43 /* save return address */
45 mova saved_spc, r0 44 sts pr, r0
46 sts pr, r5 45 mov.l r0, @(SH_SLEEP_SPC, r5)
47 mov.l r5, @r0
48 46
49 /* save sr */ 47 /* save sr */
50 mova saved_sr, r0 48 stc sr, r0
51 stc sr, r5 49 mov.l r0, @(SH_SLEEP_SR, r5)
52 mov.l r5, @r0 50
51 /* save general purpose registers to stack if needed */
52 mov.l @(SH_SLEEP_MODE, r5), r0
53 tst #SUSP_SH_REGS, r0
54 bt skip_regs_save
55
56 sts.l pr, @-r15
57 mov.l r14, @-r15
58 mov.l r13, @-r15
59 mov.l r12, @-r15
60 mov.l r11, @-r15
61 mov.l r10, @-r15
62 mov.l r9, @-r15
63 mov.l r8, @-r15
64
65 /* make sure bank0 is selected, save low registers */
66 mov.l rb_bit, r9
67 not r9, r9
68 bsr set_sr
69 mov #0, r10
70
71 bsr save_low_regs
72 nop
53 73
54 /* save mode flags */ 74 /* switch to bank 1, save low registers */
55 mova saved_mode, r0 75 mov.l rb_bit, r10
56 mov.l r4, @r0 76 bsr set_sr
77 mov #-1, r9
78
79 bsr save_low_regs
80 nop
81
82 /* switch back to bank 0 */
83 mov.l rb_bit, r9
84 not r9, r9
85 bsr set_sr
86 mov #0, r10
87
88skip_regs_save:
89
90 /* save sp, also set to internal ram */
91 mov.l r15, @(SH_SLEEP_SP, r5)
92 mov r5, r15
93
94 /* save stbcr */
95 bsr save_register
96 mov #SH_SLEEP_REG_STBCR, r0
97
98 /* save mmu and cache context if needed */
99 mov.l @(SH_SLEEP_MODE, r5), r0
100 tst #SUSP_SH_MMU, r0
101 bt skip_mmu_save_disable
102
103 /* save mmu state */
104 bsr save_register
105 mov #SH_SLEEP_REG_PTEH, r0
106
107 bsr save_register
108 mov #SH_SLEEP_REG_PTEL, r0
109
110 bsr save_register
111 mov #SH_SLEEP_REG_TTB, r0
112
113 bsr save_register
114 mov #SH_SLEEP_REG_TEA, r0
115
116 bsr save_register
117 mov #SH_SLEEP_REG_MMUCR, r0
118
119 bsr save_register
120 mov #SH_SLEEP_REG_PTEA, r0
121
122 bsr save_register
123 mov #SH_SLEEP_REG_PASCR, r0
57 124
58 /* put mode flags in r0 */ 125 bsr save_register
59 mov r4, r0 126 mov #SH_SLEEP_REG_IRMCR, r0
60 127
128 /* invalidate TLBs and disable the MMU */
129 bsr get_register
130 mov #SH_SLEEP_REG_MMUCR, r0
131 mov #4, r1
132 mov.l r1, @r0
133 icbi @r0
134
135 /* save cache registers and disable caches */
136 bsr save_register
137 mov #SH_SLEEP_REG_CCR, r0
138
139 bsr save_register
140 mov #SH_SLEEP_REG_RAMCR, r0
141
142 bsr get_register
143 mov #SH_SLEEP_REG_CCR, r0
144 mov #0, r1
145 mov.l r1, @r0
146 icbi @r0
147
148skip_mmu_save_disable:
149 /* call self-refresh entering code if needed */
150 mov.l @(SH_SLEEP_MODE, r5), r0
61 tst #SUSP_SH_SF, r0 151 tst #SUSP_SH_SF, r0
62 bt skip_set_sf 152 bt skip_set_sf
63#ifdef CONFIG_CPU_SUBTYPE_SH7724 153
64 /* DBSC: put memory in self-refresh mode */ 154 mov.l @(SH_SLEEP_SF_PRE, r5), r0
65 mov.l dben_reg, r4 155 jsr @r0
66 mov.l dben_data0, r1 156 nop
67 mov.l r1, @r4
68
69 mov.l dbrfpdn0_reg, r4
70 mov.l dbrfpdn0_data0, r1
71 mov.l r1, @r4
72
73 mov.l dbcmdcnt_reg, r4
74 mov.l dbcmdcnt_data0, r1
75 mov.l r1, @r4
76
77 mov.l dbcmdcnt_reg, r4
78 mov.l dbcmdcnt_data1, r1
79 mov.l r1, @r4
80
81 mov.l dbrfpdn0_reg, r4
82 mov.l dbrfpdn0_data1, r1
83 mov.l r1, @r4
84#else
85 /* SBSC: disable power down and put in self-refresh mode */
86 mov.l 1f, r4
87 mov.l 2f, r1
88 mov.l @r4, r2
89 or r1, r2
90 mov.l 3f, r3
91 and r3, r2
92 mov.l r2, @r4
93#endif
94 157
95skip_set_sf: 158skip_set_sf:
159 mov.l @(SH_SLEEP_MODE, r5), r0
96 tst #SUSP_SH_STANDBY, r0 160 tst #SUSP_SH_STANDBY, r0
97 bt test_rstandby 161 bt test_rstandby
98 162
@@ -104,6 +168,12 @@ test_rstandby:
104 tst #SUSP_SH_RSTANDBY, r0 168 tst #SUSP_SH_RSTANDBY, r0
105 bt test_ustandby 169 bt test_ustandby
106 170
171 /* setup BAR register */
172 bsr get_register
173 mov #SH_SLEEP_REG_BAR, r0
174 mov.l @(SH_SLEEP_RESUME, r5), r1
175 mov.l r1, @r0
176
107 /* set mode to "r-standby mode" */ 177 /* set mode to "r-standby mode" */
108 bra do_sleep 178 bra do_sleep
109 mov #0x20, r1 179 mov #0x20, r1
@@ -123,124 +193,213 @@ force_sleep:
123 193
124do_sleep: 194do_sleep:
125 /* setup and enter selected standby mode */ 195 /* setup and enter selected standby mode */
126 mov.l 5f, r4 196 bsr get_register
127 mov.l r1, @r4 197 mov #SH_SLEEP_REG_STBCR, r0
198 mov.l r1, @r0
128again: 199again:
129 sleep 200 sleep
130 bra again 201 bra again
131 nop 202 nop
132 203
133restore_jump_vbr: 204save_register:
205 add #SH_SLEEP_BASE_ADDR, r0
206 mov.l @(r0, r5), r1
207 add #-SH_SLEEP_BASE_ADDR, r0
208 mov.l @r1, r1
209 add #SH_SLEEP_BASE_DATA, r0
210 mov.l r1, @(r0, r5)
211 add #-SH_SLEEP_BASE_DATA, r0
212 rts
213 nop
214
215get_register:
216 add #SH_SLEEP_BASE_ADDR, r0
217 mov.l @(r0, r5), r0
218 rts
219 nop
220
221set_sr:
222 stc sr, r8
223 and r9, r8
224 or r10, r8
225 ldc r8, sr
226 rts
227 nop
228
229save_low_regs:
230 mov.l r7, @-r15
231 mov.l r6, @-r15
232 mov.l r5, @-r15
233 mov.l r4, @-r15
234 mov.l r3, @-r15
235 mov.l r2, @-r15
236 mov.l r1, @-r15
237 rts
238 mov.l r0, @-r15
239
240 .balign 4
241rb_bit: .long 0x20000000 ! RB=1
242
243ENTRY(sh_mobile_sleep_enter_end)
244
245 .balign 4
246ENTRY(sh_mobile_sleep_resume_start)
247
248 /* figure out start address */
249 bsr 0f
250 nop
2510:
252 sts pr, k1
253 mov.l 1f, k0
254 and k0, k1
255
256 /* store pointer to data area in VBR */
257 ldc k1, vbr
258
259 /* setup sr with saved sr */
260 mov.l @(SH_SLEEP_SR, k1), k0
261 ldc k0, sr
262
263 /* now: user register set! */
264 stc vbr, r5
265
134 /* setup spc with return address to c code */ 266 /* setup spc with return address to c code */
135 mov.l saved_spc, k0 267 mov.l @(SH_SLEEP_SPC, r5), r0
136 ldc k0, spc 268 ldc r0, spc
137 269
138 /* restore vbr */ 270 /* restore vbr */
139 mov.l saved_vbr, k0 271 mov.l @(SH_SLEEP_VBR, r5), r0
140 ldc k0, vbr 272 ldc r0, vbr
141 273
142 /* setup ssr with saved sr */ 274 /* setup ssr with saved sr */
143 mov.l saved_sr, k0 275 mov.l @(SH_SLEEP_SR, r5), r0
144 ldc k0, ssr 276 ldc r0, ssr
145 277
146 /* get mode flags */ 278 /* restore sp */
147 mov.l saved_mode, k0 279 mov.l @(SH_SLEEP_SP, r5), r15
148 280
149done_sleep: 281 /* restore sleep mode register */
150 /* reset standby mode to sleep mode */ 282 bsr restore_register
151 mov.l 5f, k4 283 mov #SH_SLEEP_REG_STBCR, r0
152 mov #0x00, k1
153 mov.l k1, @k4
154 284
155 tst #SUSP_SH_SF, k0 285 /* call self-refresh resume code if needed */
286 mov.l @(SH_SLEEP_MODE, r5), r0
287 tst #SUSP_SH_SF, r0
156 bt skip_restore_sf 288 bt skip_restore_sf
157 289
158#ifdef CONFIG_CPU_SUBTYPE_SH7724 290 mov.l @(SH_SLEEP_SF_POST, r5), r0
159 /* DBSC: put memory in auto-refresh mode */ 291 jsr @r0
160 mov.l dbrfpdn0_reg, k4 292 nop
161 mov.l dbrfpdn0_data0, k1 293
162 mov.l k1, @k4
163
164 nop /* sleep 140 ns */
165 nop
166 nop
167 nop
168
169 mov.l dbcmdcnt_reg, k4
170 mov.l dbcmdcnt_data0, k1
171 mov.l k1, @k4
172
173 mov.l dbcmdcnt_reg, k4
174 mov.l dbcmdcnt_data1, k1
175 mov.l k1, @k4
176
177 mov.l dben_reg, k4
178 mov.l dben_data1, k1
179 mov.l k1, @k4
180
181 mov.l dbrfpdn0_reg, k4
182 mov.l dbrfpdn0_data2, k1
183 mov.l k1, @k4
184#else
185 /* SBSC: set auto-refresh mode */
186 mov.l 1f, k4
187 mov.l @k4, k0
188 mov.l 4f, k1
189 and k1, k0
190 mov.l k0, @k4
191 mov.l 6f, k4
192 mov.l 8f, k0
193 mov.l @k4, k1
194 mov #-1, k4
195 add k4, k1
196 or k1, k0
197 mov.l 7f, k1
198 mov.l k0, @k1
199#endif
200skip_restore_sf: 294skip_restore_sf:
201 /* jump to vbr vector */ 295 /* restore mmu and cache state if needed */
202 mov.l saved_vbr, k0 296 mov.l @(SH_SLEEP_MODE, r5), r0
203 mov.l offset_vbr, k4 297 tst #SUSP_SH_MMU, r0
204 add k4, k0 298 bt skip_restore_mmu
205 jmp @k0 299
300 /* restore mmu state */
301 bsr restore_register
302 mov #SH_SLEEP_REG_PTEH, r0
303
304 bsr restore_register
305 mov #SH_SLEEP_REG_PTEL, r0
306
307 bsr restore_register
308 mov #SH_SLEEP_REG_TTB, r0
309
310 bsr restore_register
311 mov #SH_SLEEP_REG_TEA, r0
312
313 bsr restore_register
314 mov #SH_SLEEP_REG_PTEA, r0
315
316 bsr restore_register
317 mov #SH_SLEEP_REG_PASCR, r0
318
319 bsr restore_register
320 mov #SH_SLEEP_REG_IRMCR, r0
321
322 bsr restore_register
323 mov #SH_SLEEP_REG_MMUCR, r0
324 icbi @r0
325
326 /* restore cache settings */
327 bsr restore_register
328 mov #SH_SLEEP_REG_RAMCR, r0
329 icbi @r0
330
331 bsr restore_register
332 mov #SH_SLEEP_REG_CCR, r0
333 icbi @r0
334
335skip_restore_mmu:
336
337 /* restore general purpose registers if needed */
338 mov.l @(SH_SLEEP_MODE, r5), r0
339 tst #SUSP_SH_REGS, r0
340 bt skip_restore_regs
341
342 /* switch to bank 1, restore low registers */
343 mov.l _rb_bit, r10
344 bsr _set_sr
345 mov #-1, r9
346
347 bsr restore_low_regs
206 nop 348 nop
207 349
208 .balign 4 350 /* switch to bank0, restore low registers */
209saved_mode: .long 0 351 mov.l _rb_bit, r9
210saved_spc: .long 0 352 not r9, r9
211saved_sr: .long 0 353 bsr _set_sr
212saved_vbr: .long 0 354 mov #0, r10
213offset_vbr: .long 0x600 355
214#ifdef CONFIG_CPU_SUBTYPE_SH7724 356 bsr restore_low_regs
215dben_reg: .long 0xfd000010 /* DBEN */
216dben_data0: .long 0
217dben_data1: .long 1
218dbrfpdn0_reg: .long 0xfd000040 /* DBRFPDN0 */
219dbrfpdn0_data0: .long 0
220dbrfpdn0_data1: .long 1
221dbrfpdn0_data2: .long 0x00010000
222dbcmdcnt_reg: .long 0xfd000014 /* DBCMDCNT */
223dbcmdcnt_data0: .long 2
224dbcmdcnt_data1: .long 4
225#else
2261: .long 0xfe400008 /* SDCR0 */
2272: .long 0x00000400
2283: .long 0xffff7fff
2294: .long 0xfffffbff
230#endif
2315: .long 0xa4150020 /* STBCR */
2326: .long 0xfe40001c /* RTCOR */
2337: .long 0xfe400018 /* RTCNT */
2348: .long 0xa55a0000
235
236
237/* interrupt vector @ 0x600 */
238 .balign 0x400,0,0x400
239 .long 0xdeadbeef
240 .balign 0x200,0,0x200
241 bra restore_jump_vbr
242 nop 357 nop
243sh_mobile_standby_end:
244 358
245ENTRY(sh_mobile_standby_size) 359 /* restore the rest of the registers */
246 .long sh_mobile_standby_end - sh_mobile_standby 360 mov.l @r15+, r8
361 mov.l @r15+, r9
362 mov.l @r15+, r10
363 mov.l @r15+, r11
364 mov.l @r15+, r12
365 mov.l @r15+, r13
366 mov.l @r15+, r14
367 lds.l @r15+, pr
368
369skip_restore_regs:
370 rte
371 nop
372
373restore_register:
374 add #SH_SLEEP_BASE_DATA, r0
375 mov.l @(r0, r5), r1
376 add #-SH_SLEEP_BASE_DATA, r0
377 add #SH_SLEEP_BASE_ADDR, r0
378 mov.l @(r0, r5), r0
379 mov.l r1, @r0
380 rts
381 nop
382
383_set_sr:
384 stc sr, r8
385 and r9, r8
386 or r10, r8
387 ldc r8, sr
388 rts
389 nop
390
391restore_low_regs:
392 mov.l @r15+, r0
393 mov.l @r15+, r1
394 mov.l @r15+, r2
395 mov.l @r15+, r3
396 mov.l @r15+, r4
397 mov.l @r15+, r5
398 mov.l @r15+, r6
399 rts
400 mov.l @r15+, r7
401
402 .balign 4
403_rb_bit: .long 0x20000000 ! RB=1
4041: .long ~0x7ff
405ENTRY(sh_mobile_sleep_resume_end)
diff --git a/arch/sh/kernel/cpu/ubc.S b/arch/sh/kernel/cpu/ubc.S
deleted file mode 100644
index 81923079fa12..000000000000
--- a/arch/sh/kernel/cpu/ubc.S
+++ /dev/null
@@ -1,59 +0,0 @@
1/*
2 * arch/sh/kernel/cpu/ubc.S
3 *
4 * Set of management routines for the User Break Controller (UBC)
5 *
6 * Copyright (C) 2002 Paul Mundt
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13#include <linux/linkage.h>
14#include <asm/ubc.h>
15
16#define STBCR2 0xffc00010
17
18ENTRY(ubc_sleep)
19 mov #0, r0
20
21 mov.l 1f, r1 ! Zero out UBC_BBRA ..
22 mov.w r0, @r1
23
24 mov.l 2f, r1 ! .. same for BBRB ..
25 mov.w r0, @r1
26
27 mov.l 3f, r1 ! .. and again for BRCR.
28 mov.w r0, @r1
29
30 mov.w @r1, r0 ! Dummy read BRCR
31
32 mov.l 4f, r1 ! Set MSTP5 in STBCR2
33 mov.b @r1, r0
34 or #0x01, r0
35 mov.b r0, @r1
36
37 mov.b @r1, r0 ! Two dummy reads ..
38 mov.b @r1, r0
39
40 rts
41 nop
42
43ENTRY(ubc_wakeup)
44 mov.l 4f, r1 ! Clear MSTP5
45 mov.b @r1, r0
46 and #0xfe, r0
47 mov.b r0, @r1
48
49 mov.b @r1, r0 ! Two more dummy reads ..
50 mov.b @r1, r0
51
52 rts
53 nop
54
551: .long UBC_BBRA
562: .long UBC_BBRB
573: .long UBC_BRCR
584: .long STBCR2
59
diff --git a/arch/sh/kernel/cpufreq.c b/arch/sh/kernel/cpufreq.c
index dce4f3ff0932..0fffacea6ed9 100644
--- a/arch/sh/kernel/cpufreq.c
+++ b/arch/sh/kernel/cpufreq.c
@@ -48,7 +48,7 @@ static int sh_cpufreq_target(struct cpufreq_policy *policy,
48 return -ENODEV; 48 return -ENODEV;
49 49
50 cpus_allowed = current->cpus_allowed; 50 cpus_allowed = current->cpus_allowed;
51 set_cpus_allowed(current, cpumask_of_cpu(cpu)); 51 set_cpus_allowed_ptr(current, cpumask_of(cpu));
52 52
53 BUG_ON(smp_processor_id() != cpu); 53 BUG_ON(smp_processor_id() != cpu);
54 54
@@ -66,7 +66,7 @@ static int sh_cpufreq_target(struct cpufreq_policy *policy,
66 freqs.flags = 0; 66 freqs.flags = 0;
67 67
68 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); 68 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
69 set_cpus_allowed(current, cpus_allowed); 69 set_cpus_allowed_ptr(current, &cpus_allowed);
70 clk_set_rate(cpuclk, freq); 70 clk_set_rate(cpuclk, freq);
71 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); 71 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
72 72
diff --git a/arch/sh/kernel/debugtraps.S b/arch/sh/kernel/debugtraps.S
index 591741383ee6..7a1b46fec0f4 100644
--- a/arch/sh/kernel/debugtraps.S
+++ b/arch/sh/kernel/debugtraps.S
@@ -13,7 +13,6 @@
13#include <linux/linkage.h> 13#include <linux/linkage.h>
14 14
15#if !defined(CONFIG_KGDB) 15#if !defined(CONFIG_KGDB)
16#define breakpoint_trap_handler debug_trap_handler
17#define singlestep_trap_handler debug_trap_handler 16#define singlestep_trap_handler debug_trap_handler
18#endif 17#endif
19 18
diff --git a/arch/sh/kernel/dma-nommu.c b/arch/sh/kernel/dma-nommu.c
new file mode 100644
index 000000000000..3c55b87f8b63
--- /dev/null
+++ b/arch/sh/kernel/dma-nommu.c
@@ -0,0 +1,82 @@
1/*
2 * DMA mapping support for platforms lacking IOMMUs.
3 *
4 * Copyright (C) 2009 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/dma-mapping.h>
11#include <linux/io.h>
12
13static dma_addr_t nommu_map_page(struct device *dev, struct page *page,
14 unsigned long offset, size_t size,
15 enum dma_data_direction dir,
16 struct dma_attrs *attrs)
17{
18 dma_addr_t addr = page_to_phys(page) + offset;
19
20 WARN_ON(size == 0);
21 dma_cache_sync(dev, page_address(page) + offset, size, dir);
22
23 return addr;
24}
25
26static int nommu_map_sg(struct device *dev, struct scatterlist *sg,
27 int nents, enum dma_data_direction dir,
28 struct dma_attrs *attrs)
29{
30 struct scatterlist *s;
31 int i;
32
33 WARN_ON(nents == 0 || sg[0].length == 0);
34
35 for_each_sg(sg, s, nents, i) {
36 BUG_ON(!sg_page(s));
37
38 dma_cache_sync(dev, sg_virt(s), s->length, dir);
39
40 s->dma_address = sg_phys(s);
41 s->dma_length = s->length;
42 }
43
44 return nents;
45}
46
47#ifdef CONFIG_DMA_NONCOHERENT
48static void nommu_sync_single(struct device *dev, dma_addr_t addr,
49 size_t size, enum dma_data_direction dir)
50{
51 dma_cache_sync(dev, phys_to_virt(addr), size, dir);
52}
53
54static void nommu_sync_sg(struct device *dev, struct scatterlist *sg,
55 int nelems, enum dma_data_direction dir)
56{
57 struct scatterlist *s;
58 int i;
59
60 for_each_sg(sg, s, nelems, i)
61 dma_cache_sync(dev, sg_virt(s), s->length, dir);
62}
63#endif
64
65struct dma_map_ops nommu_dma_ops = {
66 .alloc_coherent = dma_generic_alloc_coherent,
67 .free_coherent = dma_generic_free_coherent,
68 .map_page = nommu_map_page,
69 .map_sg = nommu_map_sg,
70#ifdef CONFIG_DMA_NONCOHERENT
71 .sync_single_for_device = nommu_sync_single,
72 .sync_sg_for_device = nommu_sync_sg,
73#endif
74 .is_phys = 1,
75};
76
77void __init no_iommu_init(void)
78{
79 if (dma_ops)
80 return;
81 dma_ops = &nommu_dma_ops;
82}
diff --git a/arch/sh/kernel/dwarf.c b/arch/sh/kernel/dwarf.c
index d76a23170dbb..a8234b2010d1 100644
--- a/arch/sh/kernel/dwarf.c
+++ b/arch/sh/kernel/dwarf.c
@@ -20,7 +20,9 @@
20#include <linux/list.h> 20#include <linux/list.h>
21#include <linux/mempool.h> 21#include <linux/mempool.h>
22#include <linux/mm.h> 22#include <linux/mm.h>
23#include <linux/elf.h>
23#include <linux/ftrace.h> 24#include <linux/ftrace.h>
25#include <linux/slab.h>
24#include <asm/dwarf.h> 26#include <asm/dwarf.h>
25#include <asm/unwinder.h> 27#include <asm/unwinder.h>
26#include <asm/sections.h> 28#include <asm/sections.h>
@@ -38,10 +40,10 @@ static mempool_t *dwarf_frame_pool;
38static struct kmem_cache *dwarf_reg_cachep; 40static struct kmem_cache *dwarf_reg_cachep;
39static mempool_t *dwarf_reg_pool; 41static mempool_t *dwarf_reg_pool;
40 42
41static LIST_HEAD(dwarf_cie_list); 43static struct rb_root cie_root;
42static DEFINE_SPINLOCK(dwarf_cie_lock); 44static DEFINE_SPINLOCK(dwarf_cie_lock);
43 45
44static LIST_HEAD(dwarf_fde_list); 46static struct rb_root fde_root;
45static DEFINE_SPINLOCK(dwarf_fde_lock); 47static DEFINE_SPINLOCK(dwarf_fde_lock);
46 48
47static struct dwarf_cie *cached_cie; 49static struct dwarf_cie *cached_cie;
@@ -300,7 +302,8 @@ static inline int dwarf_entry_len(char *addr, unsigned long *len)
300 */ 302 */
301static struct dwarf_cie *dwarf_lookup_cie(unsigned long cie_ptr) 303static struct dwarf_cie *dwarf_lookup_cie(unsigned long cie_ptr)
302{ 304{
303 struct dwarf_cie *cie; 305 struct rb_node **rb_node = &cie_root.rb_node;
306 struct dwarf_cie *cie = NULL;
304 unsigned long flags; 307 unsigned long flags;
305 308
306 spin_lock_irqsave(&dwarf_cie_lock, flags); 309 spin_lock_irqsave(&dwarf_cie_lock, flags);
@@ -314,16 +317,24 @@ static struct dwarf_cie *dwarf_lookup_cie(unsigned long cie_ptr)
314 goto out; 317 goto out;
315 } 318 }
316 319
317 list_for_each_entry(cie, &dwarf_cie_list, link) { 320 while (*rb_node) {
318 if (cie->cie_pointer == cie_ptr) { 321 struct dwarf_cie *cie_tmp;
319 cached_cie = cie; 322
320 break; 323 cie_tmp = rb_entry(*rb_node, struct dwarf_cie, node);
324 BUG_ON(!cie_tmp);
325
326 if (cie_ptr == cie_tmp->cie_pointer) {
327 cie = cie_tmp;
328 cached_cie = cie_tmp;
329 goto out;
330 } else {
331 if (cie_ptr < cie_tmp->cie_pointer)
332 rb_node = &(*rb_node)->rb_left;
333 else
334 rb_node = &(*rb_node)->rb_right;
321 } 335 }
322 } 336 }
323 337
324 /* Couldn't find the entry in the list. */
325 if (&cie->link == &dwarf_cie_list)
326 cie = NULL;
327out: 338out:
328 spin_unlock_irqrestore(&dwarf_cie_lock, flags); 339 spin_unlock_irqrestore(&dwarf_cie_lock, flags);
329 return cie; 340 return cie;
@@ -335,25 +346,34 @@ out:
335 */ 346 */
336struct dwarf_fde *dwarf_lookup_fde(unsigned long pc) 347struct dwarf_fde *dwarf_lookup_fde(unsigned long pc)
337{ 348{
338 struct dwarf_fde *fde; 349 struct rb_node **rb_node = &fde_root.rb_node;
350 struct dwarf_fde *fde = NULL;
339 unsigned long flags; 351 unsigned long flags;
340 352
341 spin_lock_irqsave(&dwarf_fde_lock, flags); 353 spin_lock_irqsave(&dwarf_fde_lock, flags);
342 354
343 list_for_each_entry(fde, &dwarf_fde_list, link) { 355 while (*rb_node) {
344 unsigned long start, end; 356 struct dwarf_fde *fde_tmp;
357 unsigned long tmp_start, tmp_end;
345 358
346 start = fde->initial_location; 359 fde_tmp = rb_entry(*rb_node, struct dwarf_fde, node);
347 end = fde->initial_location + fde->address_range; 360 BUG_ON(!fde_tmp);
348 361
349 if (pc >= start && pc < end) 362 tmp_start = fde_tmp->initial_location;
350 break; 363 tmp_end = fde_tmp->initial_location + fde_tmp->address_range;
351 }
352 364
353 /* Couldn't find the entry in the list. */ 365 if (pc < tmp_start) {
354 if (&fde->link == &dwarf_fde_list) 366 rb_node = &(*rb_node)->rb_left;
355 fde = NULL; 367 } else {
368 if (pc < tmp_end) {
369 fde = fde_tmp;
370 goto out;
371 } else
372 rb_node = &(*rb_node)->rb_right;
373 }
374 }
356 375
376out:
357 spin_unlock_irqrestore(&dwarf_fde_lock, flags); 377 spin_unlock_irqrestore(&dwarf_fde_lock, flags);
358 378
359 return fde; 379 return fde;
@@ -530,7 +550,20 @@ static int dwarf_cfa_execute_insns(unsigned char *insn_start,
530} 550}
531 551
532/** 552/**
533 * dwarf_unwind_stack - recursively unwind the stack 553 * dwarf_free_frame - free the memory allocated for @frame
554 * @frame: the frame to free
555 */
556void dwarf_free_frame(struct dwarf_frame *frame)
557{
558 dwarf_frame_free_regs(frame);
559 mempool_free(frame, dwarf_frame_pool);
560}
561
562extern void ret_from_irq(void);
563
564/**
565 * dwarf_unwind_stack - unwind the stack
566 *
534 * @pc: address of the function to unwind 567 * @pc: address of the function to unwind
535 * @prev: struct dwarf_frame of the previous stackframe on the callstack 568 * @prev: struct dwarf_frame of the previous stackframe on the callstack
536 * 569 *
@@ -538,8 +571,8 @@ static int dwarf_cfa_execute_insns(unsigned char *insn_start,
538 * on the callstack. Each of the lower (older) stack frames are 571 * on the callstack. Each of the lower (older) stack frames are
539 * linked via the "prev" member. 572 * linked via the "prev" member.
540 */ 573 */
541struct dwarf_frame * dwarf_unwind_stack(unsigned long pc, 574struct dwarf_frame *dwarf_unwind_stack(unsigned long pc,
542 struct dwarf_frame *prev) 575 struct dwarf_frame *prev)
543{ 576{
544 struct dwarf_frame *frame; 577 struct dwarf_frame *frame;
545 struct dwarf_cie *cie; 578 struct dwarf_cie *cie;
@@ -548,9 +581,9 @@ struct dwarf_frame * dwarf_unwind_stack(unsigned long pc,
548 unsigned long addr; 581 unsigned long addr;
549 582
550 /* 583 /*
551 * If this is the first invocation of this recursive function we 584 * If we're starting at the top of the stack we need get the
552 * need get the contents of a physical register to get the CFA 585 * contents of a physical register to get the CFA in order to
553 * in order to begin the virtual unwinding of the stack. 586 * begin the virtual unwinding of the stack.
554 * 587 *
555 * NOTE: the return address is guaranteed to be setup by the 588 * NOTE: the return address is guaranteed to be setup by the
556 * time this function makes its first function call. 589 * time this function makes its first function call.
@@ -593,9 +626,8 @@ struct dwarf_frame * dwarf_unwind_stack(unsigned long pc,
593 fde = dwarf_lookup_fde(pc); 626 fde = dwarf_lookup_fde(pc);
594 if (!fde) { 627 if (!fde) {
595 /* 628 /*
596 * This is our normal exit path - the one that stops the 629 * This is our normal exit path. There are two reasons
597 * recursion. There's two reasons why we might exit 630 * why we might exit here,
598 * here,
599 * 631 *
600 * a) pc has no asscociated DWARF frame info and so 632 * a) pc has no asscociated DWARF frame info and so
601 * we don't know how to unwind this frame. This is 633 * we don't know how to unwind this frame. This is
@@ -637,10 +669,10 @@ struct dwarf_frame * dwarf_unwind_stack(unsigned long pc,
637 669
638 } else { 670 } else {
639 /* 671 /*
640 * Again, this is the first invocation of this 672 * Again, we're starting from the top of the
641 * recurisve function. We need to physically 673 * stack. We need to physically read
642 * read the contents of a register in order to 674 * the contents of a register in order to get
643 * get the Canonical Frame Address for this 675 * the Canonical Frame Address for this
644 * function. 676 * function.
645 */ 677 */
646 frame->cfa = dwarf_read_arch_reg(frame->cfa_register); 678 frame->cfa = dwarf_read_arch_reg(frame->cfa_register);
@@ -667,17 +699,36 @@ struct dwarf_frame * dwarf_unwind_stack(unsigned long pc,
667 addr = frame->cfa + reg->addr; 699 addr = frame->cfa + reg->addr;
668 frame->return_addr = __raw_readl(addr); 700 frame->return_addr = __raw_readl(addr);
669 701
702 /*
703 * Ah, the joys of unwinding through interrupts.
704 *
705 * Interrupts are tricky - the DWARF info needs to be _really_
706 * accurate and unfortunately I'm seeing a lot of bogus DWARF
707 * info. For example, I've seen interrupts occur in epilogues
708 * just after the frame pointer (r14) had been restored. The
709 * problem was that the DWARF info claimed that the CFA could be
710 * reached by using the value of the frame pointer before it was
711 * restored.
712 *
713 * So until the compiler can be trusted to produce reliable
714 * DWARF info when it really matters, let's stop unwinding once
715 * we've calculated the function that was interrupted.
716 */
717 if (prev && prev->pc == (unsigned long)ret_from_irq)
718 frame->return_addr = 0;
719
670 return frame; 720 return frame;
671 721
672bail: 722bail:
673 dwarf_frame_free_regs(frame); 723 dwarf_free_frame(frame);
674 mempool_free(frame, dwarf_frame_pool);
675 return NULL; 724 return NULL;
676} 725}
677 726
678static int dwarf_parse_cie(void *entry, void *p, unsigned long len, 727static int dwarf_parse_cie(void *entry, void *p, unsigned long len,
679 unsigned char *end) 728 unsigned char *end, struct module *mod)
680{ 729{
730 struct rb_node **rb_node = &cie_root.rb_node;
731 struct rb_node *parent = *rb_node;
681 struct dwarf_cie *cie; 732 struct dwarf_cie *cie;
682 unsigned long flags; 733 unsigned long flags;
683 int count; 734 int count;
@@ -774,7 +825,28 @@ static int dwarf_parse_cie(void *entry, void *p, unsigned long len,
774 825
775 /* Add to list */ 826 /* Add to list */
776 spin_lock_irqsave(&dwarf_cie_lock, flags); 827 spin_lock_irqsave(&dwarf_cie_lock, flags);
777 list_add_tail(&cie->link, &dwarf_cie_list); 828
829 while (*rb_node) {
830 struct dwarf_cie *cie_tmp;
831
832 cie_tmp = rb_entry(*rb_node, struct dwarf_cie, node);
833
834 parent = *rb_node;
835
836 if (cie->cie_pointer < cie_tmp->cie_pointer)
837 rb_node = &parent->rb_left;
838 else if (cie->cie_pointer >= cie_tmp->cie_pointer)
839 rb_node = &parent->rb_right;
840 else
841 WARN_ON(1);
842 }
843
844 rb_link_node(&cie->node, parent, rb_node);
845 rb_insert_color(&cie->node, &cie_root);
846
847 if (mod != NULL)
848 list_add_tail(&cie->link, &mod->arch.cie_list);
849
778 spin_unlock_irqrestore(&dwarf_cie_lock, flags); 850 spin_unlock_irqrestore(&dwarf_cie_lock, flags);
779 851
780 return 0; 852 return 0;
@@ -782,8 +854,10 @@ static int dwarf_parse_cie(void *entry, void *p, unsigned long len,
782 854
783static int dwarf_parse_fde(void *entry, u32 entry_type, 855static int dwarf_parse_fde(void *entry, u32 entry_type,
784 void *start, unsigned long len, 856 void *start, unsigned long len,
785 unsigned char *end) 857 unsigned char *end, struct module *mod)
786{ 858{
859 struct rb_node **rb_node = &fde_root.rb_node;
860 struct rb_node *parent = *rb_node;
787 struct dwarf_fde *fde; 861 struct dwarf_fde *fde;
788 struct dwarf_cie *cie; 862 struct dwarf_cie *cie;
789 unsigned long flags; 863 unsigned long flags;
@@ -833,7 +907,36 @@ static int dwarf_parse_fde(void *entry, u32 entry_type,
833 907
834 /* Add to list. */ 908 /* Add to list. */
835 spin_lock_irqsave(&dwarf_fde_lock, flags); 909 spin_lock_irqsave(&dwarf_fde_lock, flags);
836 list_add_tail(&fde->link, &dwarf_fde_list); 910
911 while (*rb_node) {
912 struct dwarf_fde *fde_tmp;
913 unsigned long tmp_start, tmp_end;
914 unsigned long start, end;
915
916 fde_tmp = rb_entry(*rb_node, struct dwarf_fde, node);
917
918 start = fde->initial_location;
919 end = fde->initial_location + fde->address_range;
920
921 tmp_start = fde_tmp->initial_location;
922 tmp_end = fde_tmp->initial_location + fde_tmp->address_range;
923
924 parent = *rb_node;
925
926 if (start < tmp_start)
927 rb_node = &parent->rb_left;
928 else if (start >= tmp_end)
929 rb_node = &parent->rb_right;
930 else
931 WARN_ON(1);
932 }
933
934 rb_link_node(&fde->node, parent, rb_node);
935 rb_insert_color(&fde->node, &fde_root);
936
937 if (mod != NULL)
938 list_add_tail(&fde->link, &mod->arch.fde_list);
939
837 spin_unlock_irqrestore(&dwarf_fde_lock, flags); 940 spin_unlock_irqrestore(&dwarf_fde_lock, flags);
838 941
839 return 0; 942 return 0;
@@ -854,10 +957,8 @@ static void dwarf_unwinder_dump(struct task_struct *task,
854 while (1) { 957 while (1) {
855 frame = dwarf_unwind_stack(return_addr, _frame); 958 frame = dwarf_unwind_stack(return_addr, _frame);
856 959
857 if (_frame) { 960 if (_frame)
858 dwarf_frame_free_regs(_frame); 961 dwarf_free_frame(_frame);
859 mempool_free(_frame, dwarf_frame_pool);
860 }
861 962
862 _frame = frame; 963 _frame = frame;
863 964
@@ -867,6 +968,9 @@ static void dwarf_unwinder_dump(struct task_struct *task,
867 return_addr = frame->return_addr; 968 return_addr = frame->return_addr;
868 ops->address(data, return_addr, 1); 969 ops->address(data, return_addr, 1);
869 } 970 }
971
972 if (frame)
973 dwarf_free_frame(frame);
870} 974}
871 975
872static struct unwinder dwarf_unwinder = { 976static struct unwinder dwarf_unwinder = {
@@ -877,67 +981,57 @@ static struct unwinder dwarf_unwinder = {
877 981
878static void dwarf_unwinder_cleanup(void) 982static void dwarf_unwinder_cleanup(void)
879{ 983{
880 struct dwarf_cie *cie; 984 struct rb_node **fde_rb_node = &fde_root.rb_node;
881 struct dwarf_fde *fde; 985 struct rb_node **cie_rb_node = &cie_root.rb_node;
882 986
883 /* 987 /*
884 * Deallocate all the memory allocated for the DWARF unwinder. 988 * Deallocate all the memory allocated for the DWARF unwinder.
885 * Traverse all the FDE/CIE lists and remove and free all the 989 * Traverse all the FDE/CIE lists and remove and free all the
886 * memory associated with those data structures. 990 * memory associated with those data structures.
887 */ 991 */
888 list_for_each_entry(cie, &dwarf_cie_list, link) 992 while (*fde_rb_node) {
889 kfree(cie); 993 struct dwarf_fde *fde;
890 994
891 list_for_each_entry(fde, &dwarf_fde_list, link) 995 fde = rb_entry(*fde_rb_node, struct dwarf_fde, node);
996 rb_erase(*fde_rb_node, &fde_root);
892 kfree(fde); 997 kfree(fde);
998 }
999
1000 while (*cie_rb_node) {
1001 struct dwarf_cie *cie;
1002
1003 cie = rb_entry(*cie_rb_node, struct dwarf_cie, node);
1004 rb_erase(*cie_rb_node, &cie_root);
1005 kfree(cie);
1006 }
893 1007
894 kmem_cache_destroy(dwarf_reg_cachep); 1008 kmem_cache_destroy(dwarf_reg_cachep);
895 kmem_cache_destroy(dwarf_frame_cachep); 1009 kmem_cache_destroy(dwarf_frame_cachep);
896} 1010}
897 1011
898/** 1012/**
899 * dwarf_unwinder_init - initialise the dwarf unwinder 1013 * dwarf_parse_section - parse DWARF section
1014 * @eh_frame_start: start address of the .eh_frame section
1015 * @eh_frame_end: end address of the .eh_frame section
1016 * @mod: the kernel module containing the .eh_frame section
900 * 1017 *
901 * Build the data structures describing the .dwarf_frame section to 1018 * Parse the information in a .eh_frame section.
902 * make it easier to lookup CIE and FDE entries. Because the
903 * .eh_frame section is packed as tightly as possible it is not
904 * easy to lookup the FDE for a given PC, so we build a list of FDE
905 * and CIE entries that make it easier.
906 */ 1019 */
907static int __init dwarf_unwinder_init(void) 1020static int dwarf_parse_section(char *eh_frame_start, char *eh_frame_end,
1021 struct module *mod)
908{ 1022{
909 u32 entry_type; 1023 u32 entry_type;
910 void *p, *entry; 1024 void *p, *entry;
911 int count, err = 0; 1025 int count, err = 0;
912 unsigned long len; 1026 unsigned long len = 0;
913 unsigned int c_entries, f_entries; 1027 unsigned int c_entries, f_entries;
914 unsigned char *end; 1028 unsigned char *end;
915 INIT_LIST_HEAD(&dwarf_cie_list);
916 INIT_LIST_HEAD(&dwarf_fde_list);
917 1029
918 c_entries = 0; 1030 c_entries = 0;
919 f_entries = 0; 1031 f_entries = 0;
920 entry = &__start_eh_frame; 1032 entry = eh_frame_start;
921
922 dwarf_frame_cachep = kmem_cache_create("dwarf_frames",
923 sizeof(struct dwarf_frame), 0,
924 SLAB_PANIC | SLAB_HWCACHE_ALIGN | SLAB_NOTRACK, NULL);
925
926 dwarf_reg_cachep = kmem_cache_create("dwarf_regs",
927 sizeof(struct dwarf_reg), 0,
928 SLAB_PANIC | SLAB_HWCACHE_ALIGN | SLAB_NOTRACK, NULL);
929 1033
930 dwarf_frame_pool = mempool_create(DWARF_FRAME_MIN_REQ, 1034 while ((char *)entry < eh_frame_end) {
931 mempool_alloc_slab,
932 mempool_free_slab,
933 dwarf_frame_cachep);
934
935 dwarf_reg_pool = mempool_create(DWARF_REG_MIN_REQ,
936 mempool_alloc_slab,
937 mempool_free_slab,
938 dwarf_reg_cachep);
939
940 while ((char *)entry < __stop_eh_frame) {
941 p = entry; 1035 p = entry;
942 1036
943 count = dwarf_entry_len(p, &len); 1037 count = dwarf_entry_len(p, &len);
@@ -949,6 +1043,7 @@ static int __init dwarf_unwinder_init(void)
949 * entry and move to the next one because 'len' 1043 * entry and move to the next one because 'len'
950 * tells us where our next entry is. 1044 * tells us where our next entry is.
951 */ 1045 */
1046 err = -EINVAL;
952 goto out; 1047 goto out;
953 } else 1048 } else
954 p += count; 1049 p += count;
@@ -960,13 +1055,14 @@ static int __init dwarf_unwinder_init(void)
960 p += 4; 1055 p += 4;
961 1056
962 if (entry_type == DW_EH_FRAME_CIE) { 1057 if (entry_type == DW_EH_FRAME_CIE) {
963 err = dwarf_parse_cie(entry, p, len, end); 1058 err = dwarf_parse_cie(entry, p, len, end, mod);
964 if (err < 0) 1059 if (err < 0)
965 goto out; 1060 goto out;
966 else 1061 else
967 c_entries++; 1062 c_entries++;
968 } else { 1063 } else {
969 err = dwarf_parse_fde(entry, entry_type, p, len, end); 1064 err = dwarf_parse_fde(entry, entry_type, p, len,
1065 end, mod);
970 if (err < 0) 1066 if (err < 0)
971 goto out; 1067 goto out;
972 else 1068 else
@@ -979,6 +1075,117 @@ static int __init dwarf_unwinder_init(void)
979 printk(KERN_INFO "DWARF unwinder initialised: read %u CIEs, %u FDEs\n", 1075 printk(KERN_INFO "DWARF unwinder initialised: read %u CIEs, %u FDEs\n",
980 c_entries, f_entries); 1076 c_entries, f_entries);
981 1077
1078 return 0;
1079
1080out:
1081 return err;
1082}
1083
1084#ifdef CONFIG_MODULES
1085int module_dwarf_finalize(const Elf_Ehdr *hdr, const Elf_Shdr *sechdrs,
1086 struct module *me)
1087{
1088 unsigned int i, err;
1089 unsigned long start, end;
1090 char *secstrings = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
1091
1092 start = end = 0;
1093
1094 for (i = 1; i < hdr->e_shnum; i++) {
1095 /* Alloc bit cleared means "ignore it." */
1096 if ((sechdrs[i].sh_flags & SHF_ALLOC)
1097 && !strcmp(secstrings+sechdrs[i].sh_name, ".eh_frame")) {
1098 start = sechdrs[i].sh_addr;
1099 end = start + sechdrs[i].sh_size;
1100 break;
1101 }
1102 }
1103
1104 /* Did we find the .eh_frame section? */
1105 if (i != hdr->e_shnum) {
1106 INIT_LIST_HEAD(&me->arch.cie_list);
1107 INIT_LIST_HEAD(&me->arch.fde_list);
1108 err = dwarf_parse_section((char *)start, (char *)end, me);
1109 if (err) {
1110 printk(KERN_WARNING "%s: failed to parse DWARF info\n",
1111 me->name);
1112 return err;
1113 }
1114 }
1115
1116 return 0;
1117}
1118
1119/**
1120 * module_dwarf_cleanup - remove FDE/CIEs associated with @mod
1121 * @mod: the module that is being unloaded
1122 *
1123 * Remove any FDEs and CIEs from the global lists that came from
1124 * @mod's .eh_frame section because @mod is being unloaded.
1125 */
1126void module_dwarf_cleanup(struct module *mod)
1127{
1128 struct dwarf_fde *fde, *ftmp;
1129 struct dwarf_cie *cie, *ctmp;
1130 unsigned long flags;
1131
1132 spin_lock_irqsave(&dwarf_cie_lock, flags);
1133
1134 list_for_each_entry_safe(cie, ctmp, &mod->arch.cie_list, link) {
1135 list_del(&cie->link);
1136 rb_erase(&cie->node, &cie_root);
1137 kfree(cie);
1138 }
1139
1140 spin_unlock_irqrestore(&dwarf_cie_lock, flags);
1141
1142 spin_lock_irqsave(&dwarf_fde_lock, flags);
1143
1144 list_for_each_entry_safe(fde, ftmp, &mod->arch.fde_list, link) {
1145 list_del(&fde->link);
1146 rb_erase(&fde->node, &fde_root);
1147 kfree(fde);
1148 }
1149
1150 spin_unlock_irqrestore(&dwarf_fde_lock, flags);
1151}
1152#endif /* CONFIG_MODULES */
1153
1154/**
1155 * dwarf_unwinder_init - initialise the dwarf unwinder
1156 *
1157 * Build the data structures describing the .dwarf_frame section to
1158 * make it easier to lookup CIE and FDE entries. Because the
1159 * .eh_frame section is packed as tightly as possible it is not
1160 * easy to lookup the FDE for a given PC, so we build a list of FDE
1161 * and CIE entries that make it easier.
1162 */
1163static int __init dwarf_unwinder_init(void)
1164{
1165 int err;
1166
1167 dwarf_frame_cachep = kmem_cache_create("dwarf_frames",
1168 sizeof(struct dwarf_frame), 0,
1169 SLAB_PANIC | SLAB_HWCACHE_ALIGN | SLAB_NOTRACK, NULL);
1170
1171 dwarf_reg_cachep = kmem_cache_create("dwarf_regs",
1172 sizeof(struct dwarf_reg), 0,
1173 SLAB_PANIC | SLAB_HWCACHE_ALIGN | SLAB_NOTRACK, NULL);
1174
1175 dwarf_frame_pool = mempool_create(DWARF_FRAME_MIN_REQ,
1176 mempool_alloc_slab,
1177 mempool_free_slab,
1178 dwarf_frame_cachep);
1179
1180 dwarf_reg_pool = mempool_create(DWARF_REG_MIN_REQ,
1181 mempool_alloc_slab,
1182 mempool_free_slab,
1183 dwarf_reg_cachep);
1184
1185 err = dwarf_parse_section(__start_eh_frame, __stop_eh_frame, NULL);
1186 if (err)
1187 goto out;
1188
982 err = unwinder_register(&dwarf_unwinder); 1189 err = unwinder_register(&dwarf_unwinder);
983 if (err) 1190 if (err)
984 goto out; 1191 goto out;
diff --git a/arch/sh/kernel/early_printk.c b/arch/sh/kernel/early_printk.c
deleted file mode 100644
index 81a46145ffa5..000000000000
--- a/arch/sh/kernel/early_printk.c
+++ /dev/null
@@ -1,240 +0,0 @@
1/*
2 * arch/sh/kernel/early_printk.c
3 *
4 * Copyright (C) 1999, 2000 Niibe Yutaka
5 * Copyright (C) 2002 M. R. Brown
6 * Copyright (C) 2004 - 2007 Paul Mundt
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#include <linux/console.h>
13#include <linux/tty.h>
14#include <linux/init.h>
15#include <linux/io.h>
16#include <linux/delay.h>
17
18#ifdef CONFIG_SH_STANDARD_BIOS
19#include <asm/sh_bios.h>
20
21/*
22 * Print a string through the BIOS
23 */
24static void sh_console_write(struct console *co, const char *s,
25 unsigned count)
26{
27 sh_bios_console_write(s, count);
28}
29
30/*
31 * Setup initial baud/bits/parity. We do two things here:
32 * - construct a cflag setting for the first rs_open()
33 * - initialize the serial port
34 * Return non-zero if we didn't find a serial port.
35 */
36static int __init sh_console_setup(struct console *co, char *options)
37{
38 int cflag = CREAD | HUPCL | CLOCAL;
39
40 /*
41 * Now construct a cflag setting.
42 * TODO: this is a totally bogus cflag, as we have
43 * no idea what serial settings the BIOS is using, or
44 * even if its using the serial port at all.
45 */
46 cflag |= B115200 | CS8 | /*no parity*/0;
47
48 co->cflag = cflag;
49
50 return 0;
51}
52
53static struct console bios_console = {
54 .name = "bios",
55 .write = sh_console_write,
56 .setup = sh_console_setup,
57 .flags = CON_PRINTBUFFER,
58 .index = -1,
59};
60#endif
61
62#ifdef CONFIG_EARLY_SCIF_CONSOLE
63#include <linux/serial_core.h>
64#include "../../../drivers/serial/sh-sci.h"
65
66#if defined(CONFIG_CPU_SUBTYPE_SH7720) || \
67 defined(CONFIG_CPU_SUBTYPE_SH7721)
68#define EPK_SCSMR_VALUE 0x000
69#define EPK_SCBRR_VALUE 0x00C
70#define EPK_FIFO_SIZE 64
71#define EPK_FIFO_BITS (0x7f00 >> 8)
72#else
73#define EPK_FIFO_SIZE 16
74#define EPK_FIFO_BITS (0x1f00 >> 8)
75#endif
76
77static struct uart_port scif_port = {
78 .type = PORT_SCIF,
79 .mapbase = CONFIG_EARLY_SCIF_CONSOLE_PORT,
80 .membase = (char __iomem *)CONFIG_EARLY_SCIF_CONSOLE_PORT,
81};
82
83static void scif_sercon_putc(int c)
84{
85 while (((sci_in(&scif_port, SCFDR) & EPK_FIFO_BITS) >= EPK_FIFO_SIZE))
86 ;
87
88 sci_in(&scif_port, SCxSR);
89 sci_out(&scif_port, SCxSR, 0xf3 & ~(0x20 | 0x40));
90 sci_out(&scif_port, SCxTDR, c);
91
92 while ((sci_in(&scif_port, SCxSR) & 0x40) == 0)
93 ;
94
95 if (c == '\n')
96 scif_sercon_putc('\r');
97}
98
99static void scif_sercon_write(struct console *con, const char *s,
100 unsigned count)
101{
102 while (count-- > 0)
103 scif_sercon_putc(*s++);
104}
105
106static int __init scif_sercon_setup(struct console *con, char *options)
107{
108 con->cflag = CREAD | HUPCL | CLOCAL | B115200 | CS8;
109
110 return 0;
111}
112
113static struct console scif_console = {
114 .name = "sercon",
115 .write = scif_sercon_write,
116 .setup = scif_sercon_setup,
117 .flags = CON_PRINTBUFFER,
118 .index = -1,
119};
120
121#if !defined(CONFIG_SH_STANDARD_BIOS)
122#if defined(CONFIG_CPU_SUBTYPE_SH7720) || \
123 defined(CONFIG_CPU_SUBTYPE_SH7721)
124static void scif_sercon_init(char *s)
125{
126 sci_out(&scif_port, SCSCR, 0x0000); /* clear TE and RE */
127 sci_out(&scif_port, SCFCR, 0x4006); /* reset */
128 sci_out(&scif_port, SCSCR, 0x0000); /* select internal clock */
129 sci_out(&scif_port, SCSMR, EPK_SCSMR_VALUE);
130 sci_out(&scif_port, SCBRR, EPK_SCBRR_VALUE);
131
132 mdelay(1); /* wait 1-bit time */
133
134 sci_out(&scif_port, SCFCR, 0x0030); /* TTRG=b'11 */
135 sci_out(&scif_port, SCSCR, 0x0030); /* TE, RE */
136}
137#elif defined(CONFIG_CPU_SH4) || defined(CONFIG_CPU_SH3)
138#define DEFAULT_BAUD 115200
139/*
140 * Simple SCIF init, primarily aimed at SH7750 and other similar SH-4
141 * devices that aren't using sh-ipl+g.
142 */
143static void scif_sercon_init(char *s)
144{
145 struct uart_port *port = &scif_port;
146 unsigned baud = DEFAULT_BAUD;
147 unsigned int status;
148 char *e;
149
150 if (*s == ',')
151 ++s;
152
153 if (*s) {
154 /* ignore ioport/device name */
155 s += strcspn(s, ",");
156 if (*s == ',')
157 s++;
158 }
159
160 if (*s) {
161 baud = simple_strtoul(s, &e, 0);
162 if (baud == 0 || s == e)
163 baud = DEFAULT_BAUD;
164 }
165
166 do {
167 status = sci_in(port, SCxSR);
168 } while (!(status & SCxSR_TEND(port)));
169
170 sci_out(port, SCSCR, 0); /* TE=0, RE=0 */
171 sci_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST);
172 sci_out(port, SCSMR, 0);
173
174 /* Set baud rate */
175 sci_out(port, SCBRR, (CONFIG_SH_PCLK_FREQ + 16 * baud) /
176 (32 * baud) - 1);
177 udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */
178
179 sci_out(port, SCSPTR, 0);
180 sci_out(port, SCxSR, 0x60);
181 sci_out(port, SCLSR, 0);
182
183 sci_out(port, SCFCR, 0);
184 sci_out(port, SCSCR, 0x30); /* TE=1, RE=1 */
185}
186#endif /* defined(CONFIG_CPU_SUBTYPE_SH7720) */
187#endif /* !defined(CONFIG_SH_STANDARD_BIOS) */
188#endif /* CONFIG_EARLY_SCIF_CONSOLE */
189
190/*
191 * Setup a default console, if more than one is compiled in, rely on the
192 * earlyprintk= parsing to give priority.
193 */
194static struct console *early_console =
195#ifdef CONFIG_SH_STANDARD_BIOS
196 &bios_console
197#elif defined(CONFIG_EARLY_SCIF_CONSOLE)
198 &scif_console
199#else
200 NULL
201#endif
202 ;
203
204static int __init setup_early_printk(char *buf)
205{
206 int keep_early = 0;
207
208 if (!buf)
209 return 0;
210
211 if (strstr(buf, "keep"))
212 keep_early = 1;
213
214#ifdef CONFIG_SH_STANDARD_BIOS
215 if (!strncmp(buf, "bios", 4))
216 early_console = &bios_console;
217#endif
218#if defined(CONFIG_EARLY_SCIF_CONSOLE)
219 if (!strncmp(buf, "serial", 6)) {
220 early_console = &scif_console;
221
222#if !defined(CONFIG_SH_STANDARD_BIOS)
223#if defined(CONFIG_CPU_SH4) || defined(CONFIG_CPU_SH3)
224 scif_sercon_init(buf + 6);
225#endif
226#endif
227 }
228#endif
229
230 if (likely(early_console)) {
231 if (keep_early)
232 early_console->flags &= ~CON_BOOT;
233 else
234 early_console->flags |= CON_BOOT;
235 register_console(early_console);
236 }
237
238 return 0;
239}
240early_param("earlyprintk", setup_early_printk);
diff --git a/arch/sh/kernel/entry-common.S b/arch/sh/kernel/entry-common.S
index 3eb84931d2aa..2b15ae60c3a0 100644
--- a/arch/sh/kernel/entry-common.S
+++ b/arch/sh/kernel/entry-common.S
@@ -70,8 +70,14 @@ ret_from_exception:
70 CFI_STARTPROC simple 70 CFI_STARTPROC simple
71 CFI_DEF_CFA r14, 0 71 CFI_DEF_CFA r14, 0
72 CFI_REL_OFFSET 17, 64 72 CFI_REL_OFFSET 17, 64
73 CFI_REL_OFFSET 15, 0 73 CFI_REL_OFFSET 15, 60
74 CFI_REL_OFFSET 14, 56 74 CFI_REL_OFFSET 14, 56
75 CFI_REL_OFFSET 13, 52
76 CFI_REL_OFFSET 12, 48
77 CFI_REL_OFFSET 11, 44
78 CFI_REL_OFFSET 10, 40
79 CFI_REL_OFFSET 9, 36
80 CFI_REL_OFFSET 8, 32
75 preempt_stop() 81 preempt_stop()
76ENTRY(ret_from_irq) 82ENTRY(ret_from_irq)
77 ! 83 !
@@ -133,7 +139,7 @@ work_pending:
133 ! r8: current_thread_info 139 ! r8: current_thread_info
134 ! t: result of "tst #_TIF_NEED_RESCHED, r0" 140 ! t: result of "tst #_TIF_NEED_RESCHED, r0"
135 bf/s work_resched 141 bf/s work_resched
136 tst #(_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK), r0 142 tst #_TIF_SIGPENDING, r0
137work_notifysig: 143work_notifysig:
138 bt/s __restore_all 144 bt/s __restore_all
139 mov r15, r4 145 mov r15, r4
diff --git a/arch/sh/kernel/ftrace.c b/arch/sh/kernel/ftrace.c
index 2c48e267256e..30e13196d35b 100644
--- a/arch/sh/kernel/ftrace.c
+++ b/arch/sh/kernel/ftrace.c
@@ -62,6 +62,150 @@ static unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr)
62 return ftrace_replaced_code; 62 return ftrace_replaced_code;
63} 63}
64 64
65/*
66 * Modifying code must take extra care. On an SMP machine, if
67 * the code being modified is also being executed on another CPU
68 * that CPU will have undefined results and possibly take a GPF.
69 * We use kstop_machine to stop other CPUS from exectuing code.
70 * But this does not stop NMIs from happening. We still need
71 * to protect against that. We separate out the modification of
72 * the code to take care of this.
73 *
74 * Two buffers are added: An IP buffer and a "code" buffer.
75 *
76 * 1) Put the instruction pointer into the IP buffer
77 * and the new code into the "code" buffer.
78 * 2) Wait for any running NMIs to finish and set a flag that says
79 * we are modifying code, it is done in an atomic operation.
80 * 3) Write the code
81 * 4) clear the flag.
82 * 5) Wait for any running NMIs to finish.
83 *
84 * If an NMI is executed, the first thing it does is to call
85 * "ftrace_nmi_enter". This will check if the flag is set to write
86 * and if it is, it will write what is in the IP and "code" buffers.
87 *
88 * The trick is, it does not matter if everyone is writing the same
89 * content to the code location. Also, if a CPU is executing code
90 * it is OK to write to that code location if the contents being written
91 * are the same as what exists.
92 */
93#define MOD_CODE_WRITE_FLAG (1 << 31) /* set when NMI should do the write */
94static atomic_t nmi_running = ATOMIC_INIT(0);
95static int mod_code_status; /* holds return value of text write */
96static void *mod_code_ip; /* holds the IP to write to */
97static void *mod_code_newcode; /* holds the text to write to the IP */
98
99static unsigned nmi_wait_count;
100static atomic_t nmi_update_count = ATOMIC_INIT(0);
101
102int ftrace_arch_read_dyn_info(char *buf, int size)
103{
104 int r;
105
106 r = snprintf(buf, size, "%u %u",
107 nmi_wait_count,
108 atomic_read(&nmi_update_count));
109 return r;
110}
111
112static void clear_mod_flag(void)
113{
114 int old = atomic_read(&nmi_running);
115
116 for (;;) {
117 int new = old & ~MOD_CODE_WRITE_FLAG;
118
119 if (old == new)
120 break;
121
122 old = atomic_cmpxchg(&nmi_running, old, new);
123 }
124}
125
126static void ftrace_mod_code(void)
127{
128 /*
129 * Yes, more than one CPU process can be writing to mod_code_status.
130 * (and the code itself)
131 * But if one were to fail, then they all should, and if one were
132 * to succeed, then they all should.
133 */
134 mod_code_status = probe_kernel_write(mod_code_ip, mod_code_newcode,
135 MCOUNT_INSN_SIZE);
136
137 /* if we fail, then kill any new writers */
138 if (mod_code_status)
139 clear_mod_flag();
140}
141
142void ftrace_nmi_enter(void)
143{
144 if (atomic_inc_return(&nmi_running) & MOD_CODE_WRITE_FLAG) {
145 smp_rmb();
146 ftrace_mod_code();
147 atomic_inc(&nmi_update_count);
148 }
149 /* Must have previous changes seen before executions */
150 smp_mb();
151}
152
153void ftrace_nmi_exit(void)
154{
155 /* Finish all executions before clearing nmi_running */
156 smp_mb();
157 atomic_dec(&nmi_running);
158}
159
160static void wait_for_nmi_and_set_mod_flag(void)
161{
162 if (!atomic_cmpxchg(&nmi_running, 0, MOD_CODE_WRITE_FLAG))
163 return;
164
165 do {
166 cpu_relax();
167 } while (atomic_cmpxchg(&nmi_running, 0, MOD_CODE_WRITE_FLAG));
168
169 nmi_wait_count++;
170}
171
172static void wait_for_nmi(void)
173{
174 if (!atomic_read(&nmi_running))
175 return;
176
177 do {
178 cpu_relax();
179 } while (atomic_read(&nmi_running));
180
181 nmi_wait_count++;
182}
183
184static int
185do_ftrace_mod_code(unsigned long ip, void *new_code)
186{
187 mod_code_ip = (void *)ip;
188 mod_code_newcode = new_code;
189
190 /* The buffers need to be visible before we let NMIs write them */
191 smp_mb();
192
193 wait_for_nmi_and_set_mod_flag();
194
195 /* Make sure all running NMIs have finished before we write the code */
196 smp_mb();
197
198 ftrace_mod_code();
199
200 /* Make sure the write happens before clearing the bit */
201 smp_mb();
202
203 clear_mod_flag();
204 wait_for_nmi();
205
206 return mod_code_status;
207}
208
65static int ftrace_modify_code(unsigned long ip, unsigned char *old_code, 209static int ftrace_modify_code(unsigned long ip, unsigned char *old_code,
66 unsigned char *new_code) 210 unsigned char *new_code)
67{ 211{
@@ -86,7 +230,7 @@ static int ftrace_modify_code(unsigned long ip, unsigned char *old_code,
86 return -EINVAL; 230 return -EINVAL;
87 231
88 /* replace the text with the new text */ 232 /* replace the text with the new text */
89 if (probe_kernel_write((void *)ip, new_code, MCOUNT_INSN_SIZE)) 233 if (do_ftrace_mod_code(ip, new_code))
90 return -EPERM; 234 return -EPERM;
91 235
92 flush_icache_range(ip, ip + MCOUNT_INSN_SIZE); 236 flush_icache_range(ip, ip + MCOUNT_INSN_SIZE);
@@ -255,84 +399,3 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr)
255 } 399 }
256} 400}
257#endif /* CONFIG_FUNCTION_GRAPH_TRACER */ 401#endif /* CONFIG_FUNCTION_GRAPH_TRACER */
258
259#ifdef CONFIG_FTRACE_SYSCALLS
260
261extern unsigned long __start_syscalls_metadata[];
262extern unsigned long __stop_syscalls_metadata[];
263extern unsigned long *sys_call_table;
264
265static struct syscall_metadata **syscalls_metadata;
266
267static struct syscall_metadata *find_syscall_meta(unsigned long *syscall)
268{
269 struct syscall_metadata *start;
270 struct syscall_metadata *stop;
271 char str[KSYM_SYMBOL_LEN];
272
273
274 start = (struct syscall_metadata *)__start_syscalls_metadata;
275 stop = (struct syscall_metadata *)__stop_syscalls_metadata;
276 kallsyms_lookup((unsigned long) syscall, NULL, NULL, NULL, str);
277
278 for ( ; start < stop; start++) {
279 if (start->name && !strcmp(start->name, str))
280 return start;
281 }
282
283 return NULL;
284}
285
286struct syscall_metadata *syscall_nr_to_meta(int nr)
287{
288 if (!syscalls_metadata || nr >= FTRACE_SYSCALL_MAX || nr < 0)
289 return NULL;
290
291 return syscalls_metadata[nr];
292}
293
294int syscall_name_to_nr(char *name)
295{
296 int i;
297
298 if (!syscalls_metadata)
299 return -1;
300 for (i = 0; i < NR_syscalls; i++)
301 if (syscalls_metadata[i])
302 if (!strcmp(syscalls_metadata[i]->name, name))
303 return i;
304 return -1;
305}
306
307void set_syscall_enter_id(int num, int id)
308{
309 syscalls_metadata[num]->enter_id = id;
310}
311
312void set_syscall_exit_id(int num, int id)
313{
314 syscalls_metadata[num]->exit_id = id;
315}
316
317static int __init arch_init_ftrace_syscalls(void)
318{
319 int i;
320 struct syscall_metadata *meta;
321 unsigned long **psys_syscall_table = &sys_call_table;
322
323 syscalls_metadata = kzalloc(sizeof(*syscalls_metadata) *
324 FTRACE_SYSCALL_MAX, GFP_KERNEL);
325 if (!syscalls_metadata) {
326 WARN_ON(1);
327 return -ENOMEM;
328 }
329
330 for (i = 0; i < FTRACE_SYSCALL_MAX; i++) {
331 meta = find_syscall_meta(psys_syscall_table[i]);
332 syscalls_metadata[i] = meta;
333 }
334
335 return 0;
336}
337arch_initcall(arch_init_ftrace_syscalls);
338#endif /* CONFIG_FTRACE_SYSCALLS */
diff --git a/arch/sh/kernel/gpio.c b/arch/sh/kernel/gpio.c
deleted file mode 100644
index d22e5af699f9..000000000000
--- a/arch/sh/kernel/gpio.c
+++ /dev/null
@@ -1,584 +0,0 @@
1/*
2 * Pinmuxed GPIO support for SuperH.
3 *
4 * Copyright (C) 2008 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/errno.h>
12#include <linux/kernel.h>
13#include <linux/list.h>
14#include <linux/module.h>
15#include <linux/clk.h>
16#include <linux/err.h>
17#include <linux/io.h>
18#include <linux/irq.h>
19#include <linux/bitops.h>
20#include <linux/gpio.h>
21
22static int enum_in_range(pinmux_enum_t enum_id, struct pinmux_range *r)
23{
24 if (enum_id < r->begin)
25 return 0;
26
27 if (enum_id > r->end)
28 return 0;
29
30 return 1;
31}
32
33static unsigned long gpio_read_raw_reg(unsigned long reg,
34 unsigned long reg_width)
35{
36 switch (reg_width) {
37 case 8:
38 return ctrl_inb(reg);
39 case 16:
40 return ctrl_inw(reg);
41 case 32:
42 return ctrl_inl(reg);
43 }
44
45 BUG();
46 return 0;
47}
48
49static void gpio_write_raw_reg(unsigned long reg,
50 unsigned long reg_width,
51 unsigned long data)
52{
53 switch (reg_width) {
54 case 8:
55 ctrl_outb(data, reg);
56 return;
57 case 16:
58 ctrl_outw(data, reg);
59 return;
60 case 32:
61 ctrl_outl(data, reg);
62 return;
63 }
64
65 BUG();
66}
67
68static void gpio_write_bit(struct pinmux_data_reg *dr,
69 unsigned long in_pos, unsigned long value)
70{
71 unsigned long pos;
72
73 pos = dr->reg_width - (in_pos + 1);
74
75#ifdef DEBUG
76 pr_info("write_bit addr = %lx, value = %ld, pos = %ld, "
77 "r_width = %ld\n",
78 dr->reg, !!value, pos, dr->reg_width);
79#endif
80
81 if (value)
82 set_bit(pos, &dr->reg_shadow);
83 else
84 clear_bit(pos, &dr->reg_shadow);
85
86 gpio_write_raw_reg(dr->reg, dr->reg_width, dr->reg_shadow);
87}
88
89static int gpio_read_reg(unsigned long reg, unsigned long reg_width,
90 unsigned long field_width, unsigned long in_pos)
91{
92 unsigned long data, mask, pos;
93
94 data = 0;
95 mask = (1 << field_width) - 1;
96 pos = reg_width - ((in_pos + 1) * field_width);
97
98#ifdef DEBUG
99 pr_info("read_reg: addr = %lx, pos = %ld, "
100 "r_width = %ld, f_width = %ld\n",
101 reg, pos, reg_width, field_width);
102#endif
103
104 data = gpio_read_raw_reg(reg, reg_width);
105 return (data >> pos) & mask;
106}
107
108static void gpio_write_reg(unsigned long reg, unsigned long reg_width,
109 unsigned long field_width, unsigned long in_pos,
110 unsigned long value)
111{
112 unsigned long mask, pos;
113
114 mask = (1 << field_width) - 1;
115 pos = reg_width - ((in_pos + 1) * field_width);
116
117#ifdef DEBUG
118 pr_info("write_reg addr = %lx, value = %ld, pos = %ld, "
119 "r_width = %ld, f_width = %ld\n",
120 reg, value, pos, reg_width, field_width);
121#endif
122
123 mask = ~(mask << pos);
124 value = value << pos;
125
126 switch (reg_width) {
127 case 8:
128 ctrl_outb((ctrl_inb(reg) & mask) | value, reg);
129 break;
130 case 16:
131 ctrl_outw((ctrl_inw(reg) & mask) | value, reg);
132 break;
133 case 32:
134 ctrl_outl((ctrl_inl(reg) & mask) | value, reg);
135 break;
136 }
137}
138
139static int setup_data_reg(struct pinmux_info *gpioc, unsigned gpio)
140{
141 struct pinmux_gpio *gpiop = &gpioc->gpios[gpio];
142 struct pinmux_data_reg *data_reg;
143 int k, n;
144
145 if (!enum_in_range(gpiop->enum_id, &gpioc->data))
146 return -1;
147
148 k = 0;
149 while (1) {
150 data_reg = gpioc->data_regs + k;
151
152 if (!data_reg->reg_width)
153 break;
154
155 for (n = 0; n < data_reg->reg_width; n++) {
156 if (data_reg->enum_ids[n] == gpiop->enum_id) {
157 gpiop->flags &= ~PINMUX_FLAG_DREG;
158 gpiop->flags |= (k << PINMUX_FLAG_DREG_SHIFT);
159 gpiop->flags &= ~PINMUX_FLAG_DBIT;
160 gpiop->flags |= (n << PINMUX_FLAG_DBIT_SHIFT);
161 return 0;
162 }
163 }
164 k++;
165 }
166
167 BUG();
168
169 return -1;
170}
171
172static void setup_data_regs(struct pinmux_info *gpioc)
173{
174 struct pinmux_data_reg *drp;
175 int k;
176
177 for (k = gpioc->first_gpio; k <= gpioc->last_gpio; k++)
178 setup_data_reg(gpioc, k);
179
180 k = 0;
181 while (1) {
182 drp = gpioc->data_regs + k;
183
184 if (!drp->reg_width)
185 break;
186
187 drp->reg_shadow = gpio_read_raw_reg(drp->reg, drp->reg_width);
188 k++;
189 }
190}
191
192static int get_data_reg(struct pinmux_info *gpioc, unsigned gpio,
193 struct pinmux_data_reg **drp, int *bitp)
194{
195 struct pinmux_gpio *gpiop = &gpioc->gpios[gpio];
196 int k, n;
197
198 if (!enum_in_range(gpiop->enum_id, &gpioc->data))
199 return -1;
200
201 k = (gpiop->flags & PINMUX_FLAG_DREG) >> PINMUX_FLAG_DREG_SHIFT;
202 n = (gpiop->flags & PINMUX_FLAG_DBIT) >> PINMUX_FLAG_DBIT_SHIFT;
203 *drp = gpioc->data_regs + k;
204 *bitp = n;
205 return 0;
206}
207
208static int get_config_reg(struct pinmux_info *gpioc, pinmux_enum_t enum_id,
209 struct pinmux_cfg_reg **crp, int *indexp,
210 unsigned long **cntp)
211{
212 struct pinmux_cfg_reg *config_reg;
213 unsigned long r_width, f_width;
214 int k, n;
215
216 k = 0;
217 while (1) {
218 config_reg = gpioc->cfg_regs + k;
219
220 r_width = config_reg->reg_width;
221 f_width = config_reg->field_width;
222
223 if (!r_width)
224 break;
225 for (n = 0; n < (r_width / f_width) * 1 << f_width; n++) {
226 if (config_reg->enum_ids[n] == enum_id) {
227 *crp = config_reg;
228 *indexp = n;
229 *cntp = &config_reg->cnt[n / (1 << f_width)];
230 return 0;
231 }
232 }
233 k++;
234 }
235
236 return -1;
237}
238
239static int get_gpio_enum_id(struct pinmux_info *gpioc, unsigned gpio,
240 int pos, pinmux_enum_t *enum_idp)
241{
242 pinmux_enum_t enum_id = gpioc->gpios[gpio].enum_id;
243 pinmux_enum_t *data = gpioc->gpio_data;
244 int k;
245
246 if (!enum_in_range(enum_id, &gpioc->data)) {
247 if (!enum_in_range(enum_id, &gpioc->mark)) {
248 pr_err("non data/mark enum_id for gpio %d\n", gpio);
249 return -1;
250 }
251 }
252
253 if (pos) {
254 *enum_idp = data[pos + 1];
255 return pos + 1;
256 }
257
258 for (k = 0; k < gpioc->gpio_data_size; k++) {
259 if (data[k] == enum_id) {
260 *enum_idp = data[k + 1];
261 return k + 1;
262 }
263 }
264
265 pr_err("cannot locate data/mark enum_id for gpio %d\n", gpio);
266 return -1;
267}
268
269static void write_config_reg(struct pinmux_info *gpioc,
270 struct pinmux_cfg_reg *crp,
271 int index)
272{
273 unsigned long ncomb, pos, value;
274
275 ncomb = 1 << crp->field_width;
276 pos = index / ncomb;
277 value = index % ncomb;
278
279 gpio_write_reg(crp->reg, crp->reg_width, crp->field_width, pos, value);
280}
281
282static int check_config_reg(struct pinmux_info *gpioc,
283 struct pinmux_cfg_reg *crp,
284 int index)
285{
286 unsigned long ncomb, pos, value;
287
288 ncomb = 1 << crp->field_width;
289 pos = index / ncomb;
290 value = index % ncomb;
291
292 if (gpio_read_reg(crp->reg, crp->reg_width,
293 crp->field_width, pos) == value)
294 return 0;
295
296 return -1;
297}
298
299enum { GPIO_CFG_DRYRUN, GPIO_CFG_REQ, GPIO_CFG_FREE };
300
301static int pinmux_config_gpio(struct pinmux_info *gpioc, unsigned gpio,
302 int pinmux_type, int cfg_mode)
303{
304 struct pinmux_cfg_reg *cr = NULL;
305 pinmux_enum_t enum_id;
306 struct pinmux_range *range;
307 int in_range, pos, index;
308 unsigned long *cntp;
309
310 switch (pinmux_type) {
311
312 case PINMUX_TYPE_FUNCTION:
313 range = NULL;
314 break;
315
316 case PINMUX_TYPE_OUTPUT:
317 range = &gpioc->output;
318 break;
319
320 case PINMUX_TYPE_INPUT:
321 range = &gpioc->input;
322 break;
323
324 case PINMUX_TYPE_INPUT_PULLUP:
325 range = &gpioc->input_pu;
326 break;
327
328 case PINMUX_TYPE_INPUT_PULLDOWN:
329 range = &gpioc->input_pd;
330 break;
331
332 default:
333 goto out_err;
334 }
335
336 pos = 0;
337 enum_id = 0;
338 index = 0;
339 while (1) {
340 pos = get_gpio_enum_id(gpioc, gpio, pos, &enum_id);
341 if (pos <= 0)
342 goto out_err;
343
344 if (!enum_id)
345 break;
346
347 in_range = enum_in_range(enum_id, &gpioc->function);
348 if (!in_range && range) {
349 in_range = enum_in_range(enum_id, range);
350
351 if (in_range && enum_id == range->force)
352 continue;
353 }
354
355 if (!in_range)
356 continue;
357
358 if (get_config_reg(gpioc, enum_id, &cr, &index, &cntp) != 0)
359 goto out_err;
360
361 switch (cfg_mode) {
362 case GPIO_CFG_DRYRUN:
363 if (!*cntp || !check_config_reg(gpioc, cr, index))
364 continue;
365 break;
366
367 case GPIO_CFG_REQ:
368 write_config_reg(gpioc, cr, index);
369 *cntp = *cntp + 1;
370 break;
371
372 case GPIO_CFG_FREE:
373 *cntp = *cntp - 1;
374 break;
375 }
376 }
377
378 return 0;
379 out_err:
380 return -1;
381}
382
383static DEFINE_SPINLOCK(gpio_lock);
384
385static struct pinmux_info *chip_to_pinmux(struct gpio_chip *chip)
386{
387 return container_of(chip, struct pinmux_info, chip);
388}
389
390static int sh_gpio_request(struct gpio_chip *chip, unsigned offset)
391{
392 struct pinmux_info *gpioc = chip_to_pinmux(chip);
393 struct pinmux_data_reg *dummy;
394 unsigned long flags;
395 int i, ret, pinmux_type;
396
397 ret = -EINVAL;
398
399 if (!gpioc)
400 goto err_out;
401
402 spin_lock_irqsave(&gpio_lock, flags);
403
404 if ((gpioc->gpios[offset].flags & PINMUX_FLAG_TYPE) != PINMUX_TYPE_NONE)
405 goto err_unlock;
406
407 /* setup pin function here if no data is associated with pin */
408
409 if (get_data_reg(gpioc, offset, &dummy, &i) != 0)
410 pinmux_type = PINMUX_TYPE_FUNCTION;
411 else
412 pinmux_type = PINMUX_TYPE_GPIO;
413
414 if (pinmux_type == PINMUX_TYPE_FUNCTION) {
415 if (pinmux_config_gpio(gpioc, offset,
416 pinmux_type,
417 GPIO_CFG_DRYRUN) != 0)
418 goto err_unlock;
419
420 if (pinmux_config_gpio(gpioc, offset,
421 pinmux_type,
422 GPIO_CFG_REQ) != 0)
423 BUG();
424 }
425
426 gpioc->gpios[offset].flags &= ~PINMUX_FLAG_TYPE;
427 gpioc->gpios[offset].flags |= pinmux_type;
428
429 ret = 0;
430 err_unlock:
431 spin_unlock_irqrestore(&gpio_lock, flags);
432 err_out:
433 return ret;
434}
435
436static void sh_gpio_free(struct gpio_chip *chip, unsigned offset)
437{
438 struct pinmux_info *gpioc = chip_to_pinmux(chip);
439 unsigned long flags;
440 int pinmux_type;
441
442 if (!gpioc)
443 return;
444
445 spin_lock_irqsave(&gpio_lock, flags);
446
447 pinmux_type = gpioc->gpios[offset].flags & PINMUX_FLAG_TYPE;
448 pinmux_config_gpio(gpioc, offset, pinmux_type, GPIO_CFG_FREE);
449 gpioc->gpios[offset].flags &= ~PINMUX_FLAG_TYPE;
450 gpioc->gpios[offset].flags |= PINMUX_TYPE_NONE;
451
452 spin_unlock_irqrestore(&gpio_lock, flags);
453}
454
455static int pinmux_direction(struct pinmux_info *gpioc,
456 unsigned gpio, int new_pinmux_type)
457{
458 int pinmux_type;
459 int ret = -EINVAL;
460
461 if (!gpioc)
462 goto err_out;
463
464 pinmux_type = gpioc->gpios[gpio].flags & PINMUX_FLAG_TYPE;
465
466 switch (pinmux_type) {
467 case PINMUX_TYPE_GPIO:
468 break;
469 case PINMUX_TYPE_OUTPUT:
470 case PINMUX_TYPE_INPUT:
471 case PINMUX_TYPE_INPUT_PULLUP:
472 case PINMUX_TYPE_INPUT_PULLDOWN:
473 pinmux_config_gpio(gpioc, gpio, pinmux_type, GPIO_CFG_FREE);
474 break;
475 default:
476 goto err_out;
477 }
478
479 if (pinmux_config_gpio(gpioc, gpio,
480 new_pinmux_type,
481 GPIO_CFG_DRYRUN) != 0)
482 goto err_out;
483
484 if (pinmux_config_gpio(gpioc, gpio,
485 new_pinmux_type,
486 GPIO_CFG_REQ) != 0)
487 BUG();
488
489 gpioc->gpios[gpio].flags &= ~PINMUX_FLAG_TYPE;
490 gpioc->gpios[gpio].flags |= new_pinmux_type;
491
492 ret = 0;
493 err_out:
494 return ret;
495}
496
497static int sh_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
498{
499 struct pinmux_info *gpioc = chip_to_pinmux(chip);
500 unsigned long flags;
501 int ret;
502
503 spin_lock_irqsave(&gpio_lock, flags);
504 ret = pinmux_direction(gpioc, offset, PINMUX_TYPE_INPUT);
505 spin_unlock_irqrestore(&gpio_lock, flags);
506
507 return ret;
508}
509
510static void sh_gpio_set_value(struct pinmux_info *gpioc,
511 unsigned gpio, int value)
512{
513 struct pinmux_data_reg *dr = NULL;
514 int bit = 0;
515
516 if (!gpioc || get_data_reg(gpioc, gpio, &dr, &bit) != 0)
517 BUG();
518 else
519 gpio_write_bit(dr, bit, value);
520}
521
522static int sh_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
523 int value)
524{
525 struct pinmux_info *gpioc = chip_to_pinmux(chip);
526 unsigned long flags;
527 int ret;
528
529 sh_gpio_set_value(gpioc, offset, value);
530 spin_lock_irqsave(&gpio_lock, flags);
531 ret = pinmux_direction(gpioc, offset, PINMUX_TYPE_OUTPUT);
532 spin_unlock_irqrestore(&gpio_lock, flags);
533
534 return ret;
535}
536
537static int sh_gpio_get_value(struct pinmux_info *gpioc, unsigned gpio)
538{
539 struct pinmux_data_reg *dr = NULL;
540 int bit = 0;
541
542 if (!gpioc || get_data_reg(gpioc, gpio, &dr, &bit) != 0) {
543 BUG();
544 return 0;
545 }
546
547 return gpio_read_reg(dr->reg, dr->reg_width, 1, bit);
548}
549
550static int sh_gpio_get(struct gpio_chip *chip, unsigned offset)
551{
552 return sh_gpio_get_value(chip_to_pinmux(chip), offset);
553}
554
555static void sh_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
556{
557 sh_gpio_set_value(chip_to_pinmux(chip), offset, value);
558}
559
560int register_pinmux(struct pinmux_info *pip)
561{
562 struct gpio_chip *chip = &pip->chip;
563
564 pr_info("sh pinmux: %s handling gpio %d -> %d\n",
565 pip->name, pip->first_gpio, pip->last_gpio);
566
567 setup_data_regs(pip);
568
569 chip->request = sh_gpio_request;
570 chip->free = sh_gpio_free;
571 chip->direction_input = sh_gpio_direction_input;
572 chip->get = sh_gpio_get;
573 chip->direction_output = sh_gpio_direction_output;
574 chip->set = sh_gpio_set;
575
576 WARN_ON(pip->first_gpio != 0); /* needs testing */
577
578 chip->label = pip->name;
579 chip->owner = THIS_MODULE;
580 chip->base = pip->first_gpio;
581 chip->ngpio = (pip->last_gpio - pip->first_gpio) + 1;
582
583 return gpiochip_add(chip);
584}
diff --git a/arch/sh/kernel/head_32.S b/arch/sh/kernel/head_32.S
index a78be74b8d3e..fe0b743881b0 100644
--- a/arch/sh/kernel/head_32.S
+++ b/arch/sh/kernel/head_32.S
@@ -3,6 +3,7 @@
3 * arch/sh/kernel/head.S 3 * arch/sh/kernel/head.S
4 * 4 *
5 * Copyright (C) 1999, 2000 Niibe Yutaka & Kaz Kojima 5 * Copyright (C) 1999, 2000 Niibe Yutaka & Kaz Kojima
6 * Copyright (C) 2010 Matt Fleming
6 * 7 *
7 * This file is subject to the terms and conditions of the GNU General Public 8 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive 9 * License. See the file "COPYING" in the main directory of this archive
@@ -13,6 +14,8 @@
13#include <linux/init.h> 14#include <linux/init.h>
14#include <linux/linkage.h> 15#include <linux/linkage.h>
15#include <asm/thread_info.h> 16#include <asm/thread_info.h>
17#include <asm/mmu.h>
18#include <cpu/mmu_context.h>
16 19
17#ifdef CONFIG_CPU_SH4A 20#ifdef CONFIG_CPU_SH4A
18#define SYNCO() synco 21#define SYNCO() synco
@@ -82,6 +85,209 @@ ENTRY(_stext)
82 ldc r0, r7_bank ! ... and initial thread_info 85 ldc r0, r7_bank ! ... and initial thread_info
83#endif 86#endif
84 87
88#ifdef CONFIG_PMB
89/*
90 * Reconfigure the initial PMB mappings setup by the hardware.
91 *
92 * When we boot in 32-bit MMU mode there are 2 PMB entries already
93 * setup for us.
94 *
95 * Entry VPN PPN V SZ C UB WT
96 * ---------------------------------------------------------------
97 * 0 0x80000000 0x00000000 1 512MB 1 0 1
98 * 1 0xA0000000 0x00000000 1 512MB 0 0 0
99 *
100 * But we reprogram them here because we want complete control over
101 * our address space and the initial mappings may not map PAGE_OFFSET
102 * to __MEMORY_START (or even map all of our RAM).
103 *
104 * Once we've setup cached and uncached mappings we clear the rest of the
105 * PMB entries. This clearing also deals with the fact that PMB entries
106 * can persist across reboots. The PMB could have been left in any state
107 * when the reboot occurred, so to be safe we clear all entries and start
108 * with with a clean slate.
109 *
110 * The uncached mapping is constructed using the smallest possible
111 * mapping with a single unbufferable page. Only the kernel text needs to
112 * be covered via the uncached mapping so that certain functions can be
113 * run uncached.
114 *
115 * Drivers and the like that have previously abused the 1:1 identity
116 * mapping are unsupported in 32-bit mode and must specify their caching
117 * preference when page tables are constructed.
118 *
119 * This frees up the P2 space for more nefarious purposes.
120 *
121 * Register utilization is as follows:
122 *
123 * r0 = PMB_DATA data field
124 * r1 = PMB_DATA address field
125 * r2 = PMB_ADDR data field
126 * r3 = PMB_ADDR address field
127 * r4 = PMB_E_SHIFT
128 * r5 = remaining amount of RAM to map
129 * r6 = PMB mapping size we're trying to use
130 * r7 = cached_to_uncached
131 * r8 = scratch register
132 * r9 = scratch register
133 * r10 = number of PMB entries we've setup
134 */
135
136 mov.l .LMMUCR, r1 /* Flush the TLB */
137 mov.l @r1, r0
138 or #MMUCR_TI, r0
139 mov.l r0, @r1
140
141 mov.l .LMEMORY_SIZE, r5
142
143 mov #PMB_E_SHIFT, r0
144 mov #0x1, r4
145 shld r0, r4
146
147 mov.l .LFIRST_DATA_ENTRY, r0
148 mov.l .LPMB_DATA, r1
149 mov.l .LFIRST_ADDR_ENTRY, r2
150 mov.l .LPMB_ADDR, r3
151
152 /*
153 * First we need to walk the PMB and figure out if there are any
154 * existing mappings that match the initial mappings VPN/PPN.
155 * If these have already been established by the bootloader, we
156 * don't bother setting up new entries here, and let the late PMB
157 * initialization take care of things instead.
158 *
159 * Note that we may need to coalesce and merge entries in order
160 * to reclaim more available PMB slots, which is much more than
161 * we want to do at this early stage.
162 */
163 mov #0, r10
164 mov #NR_PMB_ENTRIES, r9
165
166 mov r1, r7 /* temporary PMB_DATA iter */
167
168.Lvalidate_existing_mappings:
169
170 mov.l @r7, r8
171 and r0, r8
172 cmp/eq r0, r8 /* Check for valid __MEMORY_START mappings */
173 bt .Lpmb_done
174
175 add #1, r10 /* Increment the loop counter */
176 cmp/eq r9, r10
177 bf/s .Lvalidate_existing_mappings
178 add r4, r7 /* Increment to the next PMB_DATA entry */
179
180 /*
181 * If we've fallen through, continue with setting up the initial
182 * mappings.
183 */
184
185 mov r5, r7 /* cached_to_uncached */
186 mov #0, r10
187
188#ifdef CONFIG_UNCACHED_MAPPING
189 /*
190 * Uncached mapping
191 */
192 mov #(PMB_SZ_16M >> 2), r9
193 shll2 r9
194
195 mov #(PMB_UB >> 8), r8
196 shll8 r8
197
198 or r0, r8
199 or r9, r8
200 mov.l r8, @r1
201 mov r2, r8
202 add r7, r8
203 mov.l r8, @r3
204
205 add r4, r1
206 add r4, r3
207 add #1, r10
208#endif
209
210/*
211 * Iterate over all of the available sizes from largest to
212 * smallest for constructing the cached mapping.
213 */
214#define __PMB_ITER_BY_SIZE(size) \
215.L##size: \
216 mov #(size >> 4), r6; \
217 shll16 r6; \
218 shll8 r6; \
219 \
220 cmp/hi r5, r6; \
221 bt 9999f; \
222 \
223 mov #(PMB_SZ_##size##M >> 2), r9; \
224 shll2 r9; \
225 \
226 /* \
227 * Cached mapping \
228 */ \
229 mov #PMB_C, r8; \
230 or r0, r8; \
231 or r9, r8; \
232 mov.l r8, @r1; \
233 mov.l r2, @r3; \
234 \
235 /* Increment to the next PMB_DATA entry */ \
236 add r4, r1; \
237 /* Increment to the next PMB_ADDR entry */ \
238 add r4, r3; \
239 /* Increment number of PMB entries */ \
240 add #1, r10; \
241 \
242 sub r6, r5; \
243 add r6, r0; \
244 add r6, r2; \
245 \
246 bra .L##size; \
2479999:
248
249 __PMB_ITER_BY_SIZE(512)
250 __PMB_ITER_BY_SIZE(128)
251 __PMB_ITER_BY_SIZE(64)
252 __PMB_ITER_BY_SIZE(16)
253
254#ifdef CONFIG_UNCACHED_MAPPING
255 /*
256 * Now that we can access it, update cached_to_uncached and
257 * uncached_size.
258 */
259 mov.l .Lcached_to_uncached, r0
260 mov.l r7, @r0
261
262 mov.l .Luncached_size, r0
263 mov #1, r7
264 shll16 r7
265 shll8 r7
266 mov.l r7, @r0
267#endif
268
269 /*
270 * Clear the remaining PMB entries.
271 *
272 * r3 = entry to begin clearing from
273 * r10 = number of entries we've setup so far
274 */
275 mov #0, r1
276 mov #NR_PMB_ENTRIES, r0
277
278.Lagain:
279 mov.l r1, @r3 /* Clear PMB_ADDR entry */
280 add #1, r10 /* Increment the loop counter */
281 cmp/eq r0, r10
282 bf/s .Lagain
283 add r4, r3 /* Increment to the next PMB_ADDR entry */
284
285 mov.l 6f, r0
286 icbi @r0
287
288.Lpmb_done:
289#endif /* CONFIG_PMB */
290
85#ifndef CONFIG_SH_NO_BSS_INIT 291#ifndef CONFIG_SH_NO_BSS_INIT
86 /* 292 /*
87 * Don't clear BSS if running on slow platforms such as an RTL simulation, 293 * Don't clear BSS if running on slow platforms such as an RTL simulation,
@@ -131,3 +337,16 @@ ENTRY(stack_start)
1315: .long start_kernel 3375: .long start_kernel
1326: .long sh_cpu_init 3386: .long sh_cpu_init
1337: .long init_thread_union 3397: .long init_thread_union
340
341#ifdef CONFIG_PMB
342.LPMB_ADDR: .long PMB_ADDR
343.LPMB_DATA: .long PMB_DATA
344.LFIRST_ADDR_ENTRY: .long PAGE_OFFSET | PMB_V
345.LFIRST_DATA_ENTRY: .long __MEMORY_START | PMB_V
346.LMMUCR: .long MMUCR
347.LMEMORY_SIZE: .long __MEMORY_SIZE
348#ifdef CONFIG_UNCACHED_MAPPING
349.Lcached_to_uncached: .long cached_to_uncached
350.Luncached_size: .long uncached_size
351#endif
352#endif
diff --git a/arch/sh/kernel/head_64.S b/arch/sh/kernel/head_64.S
index 3ea765844c74..defd851abefa 100644
--- a/arch/sh/kernel/head_64.S
+++ b/arch/sh/kernel/head_64.S
@@ -220,7 +220,6 @@ clear_DTLB:
220 add.l r22, r63, r22 /* Sign extend */ 220 add.l r22, r63, r22 /* Sign extend */
221 putcfg r21, 0, r22 /* Set MMUDR[0].PTEH */ 221 putcfg r21, 0, r22 /* Set MMUDR[0].PTEH */
222 222
223#ifdef CONFIG_EARLY_PRINTK
224 /* 223 /*
225 * Setup a DTLB translation for SCIF phys. 224 * Setup a DTLB translation for SCIF phys.
226 */ 225 */
@@ -231,7 +230,6 @@ clear_DTLB:
231 movi 0xfa03, r22 /* 0xfa030000, fixed SCIF virt */ 230 movi 0xfa03, r22 /* 0xfa030000, fixed SCIF virt */
232 shori 0x0003, r22 231 shori 0x0003, r22
233 putcfg r21, 0, r22 /* PTEH last */ 232 putcfg r21, 0, r22 /* PTEH last */
234#endif
235 233
236 /* 234 /*
237 * Set cache behaviours. 235 * Set cache behaviours.
diff --git a/arch/sh/kernel/hw_breakpoint.c b/arch/sh/kernel/hw_breakpoint.c
new file mode 100644
index 000000000000..675eea7785d9
--- /dev/null
+++ b/arch/sh/kernel/hw_breakpoint.c
@@ -0,0 +1,445 @@
1/*
2 * arch/sh/kernel/hw_breakpoint.c
3 *
4 * Unified kernel/user-space hardware breakpoint facility for the on-chip UBC.
5 *
6 * Copyright (C) 2009 - 2010 Paul Mundt
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#include <linux/init.h>
13#include <linux/perf_event.h>
14#include <linux/hw_breakpoint.h>
15#include <linux/percpu.h>
16#include <linux/kallsyms.h>
17#include <linux/notifier.h>
18#include <linux/kprobes.h>
19#include <linux/kdebug.h>
20#include <linux/io.h>
21#include <linux/clk.h>
22#include <asm/hw_breakpoint.h>
23#include <asm/mmu_context.h>
24#include <asm/ptrace.h>
25
26/*
27 * Stores the breakpoints currently in use on each breakpoint address
28 * register for each cpus
29 */
30static DEFINE_PER_CPU(struct perf_event *, bp_per_reg[HBP_NUM]);
31
32/*
33 * A dummy placeholder for early accesses until the CPUs get a chance to
34 * register their UBCs later in the boot process.
35 */
36static struct sh_ubc ubc_dummy = { .num_events = 0 };
37
38static struct sh_ubc *sh_ubc __read_mostly = &ubc_dummy;
39
40/*
41 * Install a perf counter breakpoint.
42 *
43 * We seek a free UBC channel and use it for this breakpoint.
44 *
45 * Atomic: we hold the counter->ctx->lock and we only handle variables
46 * and registers local to this cpu.
47 */
48int arch_install_hw_breakpoint(struct perf_event *bp)
49{
50 struct arch_hw_breakpoint *info = counter_arch_bp(bp);
51 int i;
52
53 for (i = 0; i < sh_ubc->num_events; i++) {
54 struct perf_event **slot = &__get_cpu_var(bp_per_reg[i]);
55
56 if (!*slot) {
57 *slot = bp;
58 break;
59 }
60 }
61
62 if (WARN_ONCE(i == sh_ubc->num_events, "Can't find any breakpoint slot"))
63 return -EBUSY;
64
65 clk_enable(sh_ubc->clk);
66 sh_ubc->enable(info, i);
67
68 return 0;
69}
70
71/*
72 * Uninstall the breakpoint contained in the given counter.
73 *
74 * First we search the debug address register it uses and then we disable
75 * it.
76 *
77 * Atomic: we hold the counter->ctx->lock and we only handle variables
78 * and registers local to this cpu.
79 */
80void arch_uninstall_hw_breakpoint(struct perf_event *bp)
81{
82 struct arch_hw_breakpoint *info = counter_arch_bp(bp);
83 int i;
84
85 for (i = 0; i < sh_ubc->num_events; i++) {
86 struct perf_event **slot = &__get_cpu_var(bp_per_reg[i]);
87
88 if (*slot == bp) {
89 *slot = NULL;
90 break;
91 }
92 }
93
94 if (WARN_ONCE(i == sh_ubc->num_events, "Can't find any breakpoint slot"))
95 return;
96
97 sh_ubc->disable(info, i);
98 clk_disable(sh_ubc->clk);
99}
100
101static int get_hbp_len(u16 hbp_len)
102{
103 unsigned int len_in_bytes = 0;
104
105 switch (hbp_len) {
106 case SH_BREAKPOINT_LEN_1:
107 len_in_bytes = 1;
108 break;
109 case SH_BREAKPOINT_LEN_2:
110 len_in_bytes = 2;
111 break;
112 case SH_BREAKPOINT_LEN_4:
113 len_in_bytes = 4;
114 break;
115 case SH_BREAKPOINT_LEN_8:
116 len_in_bytes = 8;
117 break;
118 }
119 return len_in_bytes;
120}
121
122/*
123 * Check for virtual address in user space.
124 */
125int arch_check_va_in_userspace(unsigned long va, u16 hbp_len)
126{
127 unsigned int len;
128
129 len = get_hbp_len(hbp_len);
130
131 return (va <= TASK_SIZE - len);
132}
133
134/*
135 * Check for virtual address in kernel space.
136 */
137static int arch_check_va_in_kernelspace(unsigned long va, u8 hbp_len)
138{
139 unsigned int len;
140
141 len = get_hbp_len(hbp_len);
142
143 return (va >= TASK_SIZE) && ((va + len - 1) >= TASK_SIZE);
144}
145
146int arch_bp_generic_fields(int sh_len, int sh_type,
147 int *gen_len, int *gen_type)
148{
149 /* Len */
150 switch (sh_len) {
151 case SH_BREAKPOINT_LEN_1:
152 *gen_len = HW_BREAKPOINT_LEN_1;
153 break;
154 case SH_BREAKPOINT_LEN_2:
155 *gen_len = HW_BREAKPOINT_LEN_2;
156 break;
157 case SH_BREAKPOINT_LEN_4:
158 *gen_len = HW_BREAKPOINT_LEN_4;
159 break;
160 case SH_BREAKPOINT_LEN_8:
161 *gen_len = HW_BREAKPOINT_LEN_8;
162 break;
163 default:
164 return -EINVAL;
165 }
166
167 /* Type */
168 switch (sh_type) {
169 case SH_BREAKPOINT_READ:
170 *gen_type = HW_BREAKPOINT_R;
171 case SH_BREAKPOINT_WRITE:
172 *gen_type = HW_BREAKPOINT_W;
173 break;
174 case SH_BREAKPOINT_RW:
175 *gen_type = HW_BREAKPOINT_W | HW_BREAKPOINT_R;
176 break;
177 default:
178 return -EINVAL;
179 }
180
181 return 0;
182}
183
184static int arch_build_bp_info(struct perf_event *bp)
185{
186 struct arch_hw_breakpoint *info = counter_arch_bp(bp);
187
188 info->address = bp->attr.bp_addr;
189
190 /* Len */
191 switch (bp->attr.bp_len) {
192 case HW_BREAKPOINT_LEN_1:
193 info->len = SH_BREAKPOINT_LEN_1;
194 break;
195 case HW_BREAKPOINT_LEN_2:
196 info->len = SH_BREAKPOINT_LEN_2;
197 break;
198 case HW_BREAKPOINT_LEN_4:
199 info->len = SH_BREAKPOINT_LEN_4;
200 break;
201 case HW_BREAKPOINT_LEN_8:
202 info->len = SH_BREAKPOINT_LEN_8;
203 break;
204 default:
205 return -EINVAL;
206 }
207
208 /* Type */
209 switch (bp->attr.bp_type) {
210 case HW_BREAKPOINT_R:
211 info->type = SH_BREAKPOINT_READ;
212 break;
213 case HW_BREAKPOINT_W:
214 info->type = SH_BREAKPOINT_WRITE;
215 break;
216 case HW_BREAKPOINT_W | HW_BREAKPOINT_R:
217 info->type = SH_BREAKPOINT_RW;
218 break;
219 default:
220 return -EINVAL;
221 }
222
223 return 0;
224}
225
226/*
227 * Validate the arch-specific HW Breakpoint register settings
228 */
229int arch_validate_hwbkpt_settings(struct perf_event *bp,
230 struct task_struct *tsk)
231{
232 struct arch_hw_breakpoint *info = counter_arch_bp(bp);
233 unsigned int align;
234 int ret;
235
236 ret = arch_build_bp_info(bp);
237 if (ret)
238 return ret;
239
240 ret = -EINVAL;
241
242 switch (info->len) {
243 case SH_BREAKPOINT_LEN_1:
244 align = 0;
245 break;
246 case SH_BREAKPOINT_LEN_2:
247 align = 1;
248 break;
249 case SH_BREAKPOINT_LEN_4:
250 align = 3;
251 break;
252 case SH_BREAKPOINT_LEN_8:
253 align = 7;
254 break;
255 default:
256 return ret;
257 }
258
259 /*
260 * For kernel-addresses, either the address or symbol name can be
261 * specified.
262 */
263 if (info->name)
264 info->address = (unsigned long)kallsyms_lookup_name(info->name);
265
266 /*
267 * Check that the low-order bits of the address are appropriate
268 * for the alignment implied by len.
269 */
270 if (info->address & align)
271 return -EINVAL;
272
273 /* Check that the virtual address is in the proper range */
274 if (tsk) {
275 if (!arch_check_va_in_userspace(info->address, info->len))
276 return -EFAULT;
277 } else {
278 if (!arch_check_va_in_kernelspace(info->address, info->len))
279 return -EFAULT;
280 }
281
282 return 0;
283}
284
285/*
286 * Release the user breakpoints used by ptrace
287 */
288void flush_ptrace_hw_breakpoint(struct task_struct *tsk)
289{
290 int i;
291 struct thread_struct *t = &tsk->thread;
292
293 for (i = 0; i < sh_ubc->num_events; i++) {
294 unregister_hw_breakpoint(t->ptrace_bps[i]);
295 t->ptrace_bps[i] = NULL;
296 }
297}
298
299static int __kprobes hw_breakpoint_handler(struct die_args *args)
300{
301 int cpu, i, rc = NOTIFY_STOP;
302 struct perf_event *bp;
303 unsigned int cmf, resume_mask;
304
305 /*
306 * Do an early return if none of the channels triggered.
307 */
308 cmf = sh_ubc->triggered_mask();
309 if (unlikely(!cmf))
310 return NOTIFY_DONE;
311
312 /*
313 * By default, resume all of the active channels.
314 */
315 resume_mask = sh_ubc->active_mask();
316
317 /*
318 * Disable breakpoints during exception handling.
319 */
320 sh_ubc->disable_all();
321
322 cpu = get_cpu();
323 for (i = 0; i < sh_ubc->num_events; i++) {
324 unsigned long event_mask = (1 << i);
325
326 if (likely(!(cmf & event_mask)))
327 continue;
328
329 /*
330 * The counter may be concurrently released but that can only
331 * occur from a call_rcu() path. We can then safely fetch
332 * the breakpoint, use its callback, touch its counter
333 * while we are in an rcu_read_lock() path.
334 */
335 rcu_read_lock();
336
337 bp = per_cpu(bp_per_reg[i], cpu);
338 if (bp)
339 rc = NOTIFY_DONE;
340
341 /*
342 * Reset the condition match flag to denote completion of
343 * exception handling.
344 */
345 sh_ubc->clear_triggered_mask(event_mask);
346
347 /*
348 * bp can be NULL due to concurrent perf counter
349 * removing.
350 */
351 if (!bp) {
352 rcu_read_unlock();
353 break;
354 }
355
356 /*
357 * Don't restore the channel if the breakpoint is from
358 * ptrace, as it always operates in one-shot mode.
359 */
360 if (bp->overflow_handler == ptrace_triggered)
361 resume_mask &= ~(1 << i);
362
363 perf_bp_event(bp, args->regs);
364
365 /* Deliver the signal to userspace */
366 if (arch_check_va_in_userspace(bp->attr.bp_addr,
367 bp->attr.bp_len)) {
368 siginfo_t info;
369
370 info.si_signo = args->signr;
371 info.si_errno = notifier_to_errno(rc);
372 info.si_code = TRAP_HWBKPT;
373
374 force_sig_info(args->signr, &info, current);
375 }
376
377 rcu_read_unlock();
378 }
379
380 if (cmf == 0)
381 rc = NOTIFY_DONE;
382
383 sh_ubc->enable_all(resume_mask);
384
385 put_cpu();
386
387 return rc;
388}
389
390BUILD_TRAP_HANDLER(breakpoint)
391{
392 unsigned long ex = lookup_exception_vector();
393 TRAP_HANDLER_DECL;
394
395 notify_die(DIE_BREAKPOINT, "breakpoint", regs, 0, ex, SIGTRAP);
396}
397
398/*
399 * Handle debug exception notifications.
400 */
401int __kprobes hw_breakpoint_exceptions_notify(struct notifier_block *unused,
402 unsigned long val, void *data)
403{
404 struct die_args *args = data;
405
406 if (val != DIE_BREAKPOINT)
407 return NOTIFY_DONE;
408
409 /*
410 * If the breakpoint hasn't been triggered by the UBC, it's
411 * probably from a debugger, so don't do anything more here.
412 *
413 * This also permits the UBC interface clock to remain off for
414 * non-UBC breakpoints, as we don't need to check the triggered
415 * or active channel masks.
416 */
417 if (args->trapnr != sh_ubc->trap_nr)
418 return NOTIFY_DONE;
419
420 return hw_breakpoint_handler(data);
421}
422
423void hw_breakpoint_pmu_read(struct perf_event *bp)
424{
425 /* TODO */
426}
427
428void hw_breakpoint_pmu_unthrottle(struct perf_event *bp)
429{
430 /* TODO */
431}
432
433int register_sh_ubc(struct sh_ubc *ubc)
434{
435 /* Bail if it's already assigned */
436 if (sh_ubc != &ubc_dummy)
437 return -EBUSY;
438 sh_ubc = ubc;
439
440 pr_info("HW Breakpoints: %s UBC support registered\n", ubc->name);
441
442 WARN_ON(ubc->num_events > HBP_NUM);
443
444 return 0;
445}
diff --git a/arch/sh/kernel/idle.c b/arch/sh/kernel/idle.c
index 27ff2dc093c7..273f890b17ae 100644
--- a/arch/sh/kernel/idle.c
+++ b/arch/sh/kernel/idle.c
@@ -20,10 +20,9 @@
20#include <asm/system.h> 20#include <asm/system.h>
21#include <asm/atomic.h> 21#include <asm/atomic.h>
22 22
23void (*pm_idle)(void) = NULL;
24
23static int hlt_counter; 25static int hlt_counter;
24void (*pm_idle)(void);
25void (*pm_power_off)(void);
26EXPORT_SYMBOL(pm_power_off);
27 26
28static int __init nohlt_setup(char *__unused) 27static int __init nohlt_setup(char *__unused)
29{ 28{
@@ -39,52 +38,107 @@ static int __init hlt_setup(char *__unused)
39} 38}
40__setup("hlt", hlt_setup); 39__setup("hlt", hlt_setup);
41 40
41static inline int hlt_works(void)
42{
43 return !hlt_counter;
44}
45
46/*
47 * On SMP it's slightly faster (but much more power-consuming!)
48 * to poll the ->work.need_resched flag instead of waiting for the
49 * cross-CPU IPI to arrive. Use this option with caution.
50 */
51static void poll_idle(void)
52{
53 local_irq_enable();
54 while (!need_resched())
55 cpu_relax();
56}
57
42void default_idle(void) 58void default_idle(void)
43{ 59{
44 if (!hlt_counter) { 60 if (hlt_works()) {
45 clear_thread_flag(TIF_POLLING_NRFLAG); 61 clear_thread_flag(TIF_POLLING_NRFLAG);
46 smp_mb__after_clear_bit(); 62 smp_mb__after_clear_bit();
47 set_bl_bit();
48 stop_critical_timings();
49 63
50 while (!need_resched()) 64 set_bl_bit();
65 if (!need_resched()) {
66 local_irq_enable();
51 cpu_sleep(); 67 cpu_sleep();
68 } else
69 local_irq_enable();
52 70
53 start_critical_timings();
54 clear_bl_bit();
55 set_thread_flag(TIF_POLLING_NRFLAG); 71 set_thread_flag(TIF_POLLING_NRFLAG);
72 clear_bl_bit();
56 } else 73 } else
57 while (!need_resched()) 74 poll_idle();
58 cpu_relax();
59} 75}
60 76
77/*
78 * The idle thread. There's no useful work to be done, so just try to conserve
79 * power and have a low exit latency (ie sit in a loop waiting for somebody to
80 * say that they'd like to reschedule)
81 */
61void cpu_idle(void) 82void cpu_idle(void)
62{ 83{
84 unsigned int cpu = smp_processor_id();
85
63 set_thread_flag(TIF_POLLING_NRFLAG); 86 set_thread_flag(TIF_POLLING_NRFLAG);
64 87
65 /* endless idle loop with no priority at all */ 88 /* endless idle loop with no priority at all */
66 while (1) { 89 while (1) {
67 void (*idle)(void) = pm_idle; 90 tick_nohz_stop_sched_tick(1);
68 91
69 if (!idle) 92 while (!need_resched() && cpu_online(cpu)) {
70 idle = default_idle; 93 check_pgt_cache();
94 rmb();
71 95
72 tick_nohz_stop_sched_tick(1); 96 local_irq_disable();
73 while (!need_resched()) 97 /* Don't trace irqs off for idle */
74 idle(); 98 stop_critical_timings();
75 tick_nohz_restart_sched_tick(); 99 pm_idle();
100 /*
101 * Sanity check to ensure that pm_idle() returns
102 * with IRQs enabled
103 */
104 WARN_ON(irqs_disabled());
105 start_critical_timings();
106 }
76 107
108 tick_nohz_restart_sched_tick();
77 preempt_enable_no_resched(); 109 preempt_enable_no_resched();
78 schedule(); 110 schedule();
79 preempt_disable(); 111 preempt_disable();
80 check_pgt_cache();
81 } 112 }
82} 113}
83 114
115void __init select_idle_routine(void)
116{
117 /*
118 * If a platform has set its own idle routine, leave it alone.
119 */
120 if (pm_idle)
121 return;
122
123 if (hlt_works())
124 pm_idle = default_idle;
125 else
126 pm_idle = poll_idle;
127}
128
84static void do_nothing(void *unused) 129static void do_nothing(void *unused)
85{ 130{
86} 131}
87 132
133void stop_this_cpu(void *unused)
134{
135 local_irq_disable();
136 cpu_clear(smp_processor_id(), cpu_online_map);
137
138 for (;;)
139 cpu_sleep();
140}
141
88/* 142/*
89 * cpu_idle_wait - Used to ensure that all the CPUs discard old value of 143 * cpu_idle_wait - Used to ensure that all the CPUs discard old value of
90 * pm_idle and update to new pm_idle value. Required while changing pm_idle 144 * pm_idle and update to new pm_idle value. Required while changing pm_idle
diff --git a/arch/sh/kernel/io_generic.c b/arch/sh/kernel/io_generic.c
index b8fa6524760a..e1e1dbd19557 100644
--- a/arch/sh/kernel/io_generic.c
+++ b/arch/sh/kernel/io_generic.c
@@ -24,7 +24,7 @@
24#define dummy_read() 24#define dummy_read()
25#endif 25#endif
26 26
27unsigned long generic_io_base; 27unsigned long generic_io_base = 0;
28 28
29u8 generic_inb(unsigned long port) 29u8 generic_inb(unsigned long port)
30{ 30{
@@ -147,8 +147,10 @@ void generic_outsl(unsigned long port, const void *src, unsigned long count)
147 147
148void __iomem *generic_ioport_map(unsigned long addr, unsigned int size) 148void __iomem *generic_ioport_map(unsigned long addr, unsigned int size)
149{ 149{
150#ifdef P1SEG
150 if (PXSEG(addr) >= P1SEG) 151 if (PXSEG(addr) >= P1SEG)
151 return (void __iomem *)addr; 152 return (void __iomem *)addr;
153#endif
152 154
153 return (void __iomem *)(addr + generic_io_base); 155 return (void __iomem *)(addr + generic_io_base);
154} 156}
diff --git a/arch/sh/kernel/io_trapped.c b/arch/sh/kernel/io_trapped.c
index 69be603aa2d7..4a8bb4eeb8ad 100644
--- a/arch/sh/kernel/io_trapped.c
+++ b/arch/sh/kernel/io_trapped.c
@@ -184,31 +184,31 @@ static unsigned long long copy_word(unsigned long src_addr, int src_len,
184 184
185 switch (src_len) { 185 switch (src_len) {
186 case 1: 186 case 1:
187 tmp = ctrl_inb(src_addr); 187 tmp = __raw_readb(src_addr);
188 break; 188 break;
189 case 2: 189 case 2:
190 tmp = ctrl_inw(src_addr); 190 tmp = __raw_readw(src_addr);
191 break; 191 break;
192 case 4: 192 case 4:
193 tmp = ctrl_inl(src_addr); 193 tmp = __raw_readl(src_addr);
194 break; 194 break;
195 case 8: 195 case 8:
196 tmp = ctrl_inq(src_addr); 196 tmp = __raw_readq(src_addr);
197 break; 197 break;
198 } 198 }
199 199
200 switch (dst_len) { 200 switch (dst_len) {
201 case 1: 201 case 1:
202 ctrl_outb(tmp, dst_addr); 202 __raw_writeb(tmp, dst_addr);
203 break; 203 break;
204 case 2: 204 case 2:
205 ctrl_outw(tmp, dst_addr); 205 __raw_writew(tmp, dst_addr);
206 break; 206 break;
207 case 4: 207 case 4:
208 ctrl_outl(tmp, dst_addr); 208 __raw_writel(tmp, dst_addr);
209 break; 209 break;
210 case 8: 210 case 8:
211 ctrl_outq(tmp, dst_addr); 211 __raw_writeq(tmp, dst_addr);
212 break; 212 break;
213 } 213 }
214 214
@@ -271,6 +271,8 @@ int handle_trapped_io(struct pt_regs *regs, unsigned long address)
271 insn_size_t instruction; 271 insn_size_t instruction;
272 int tmp; 272 int tmp;
273 273
274 if (trapped_io_disable)
275 return 0;
274 if (!lookup_tiop(address)) 276 if (!lookup_tiop(address))
275 return 0; 277 return 0;
276 278
diff --git a/arch/sh/kernel/irq.c b/arch/sh/kernel/irq.c
index eac7da772fc2..d2d41d046657 100644
--- a/arch/sh/kernel/irq.c
+++ b/arch/sh/kernel/irq.c
@@ -37,7 +37,15 @@ void ack_bad_irq(unsigned int irq)
37 */ 37 */
38static int show_other_interrupts(struct seq_file *p, int prec) 38static int show_other_interrupts(struct seq_file *p, int prec)
39{ 39{
40 int j;
41
42 seq_printf(p, "%*s: ", prec, "NMI");
43 for_each_online_cpu(j)
44 seq_printf(p, "%10u ", irq_stat[j].__nmi_count);
45 seq_printf(p, " Non-maskable interrupts\n");
46
40 seq_printf(p, "%*s: %10u\n", prec, "ERR", atomic_read(&irq_err_count)); 47 seq_printf(p, "%*s: %10u\n", prec, "ERR", atomic_read(&irq_err_count));
48
41 return 0; 49 return 0;
42} 50}
43 51
@@ -68,7 +76,7 @@ int show_interrupts(struct seq_file *p, void *v)
68 if (!desc) 76 if (!desc)
69 return 0; 77 return 0;
70 78
71 spin_lock_irqsave(&desc->lock, flags); 79 raw_spin_lock_irqsave(&desc->lock, flags);
72 for_each_online_cpu(j) 80 for_each_online_cpu(j)
73 any_count |= kstat_irqs_cpu(i, j); 81 any_count |= kstat_irqs_cpu(i, j);
74 action = desc->action; 82 action = desc->action;
@@ -89,7 +97,7 @@ int show_interrupts(struct seq_file *p, void *v)
89 97
90 seq_putc(p, '\n'); 98 seq_putc(p, '\n');
91out: 99out:
92 spin_unlock_irqrestore(&desc->lock, flags); 100 raw_spin_unlock_irqrestore(&desc->lock, flags);
93 return 0; 101 return 0;
94} 102}
95#endif 103#endif
@@ -255,6 +263,12 @@ void __init init_IRQ(void)
255{ 263{
256 plat_irq_setup(); 264 plat_irq_setup();
257 265
266 /*
267 * Pin any of the legacy IRQ vectors that haven't already been
268 * grabbed by the platform
269 */
270 reserve_irq_legacy();
271
258 /* Perform the machine specific initialisation */ 272 /* Perform the machine specific initialisation */
259 if (sh_mv.mv_init_irq) 273 if (sh_mv.mv_init_irq)
260 sh_mv.mv_init_irq(); 274 sh_mv.mv_init_irq();
diff --git a/arch/sh/kernel/irq_32.c b/arch/sh/kernel/irq_32.c
new file mode 100644
index 000000000000..e33ab15831f9
--- /dev/null
+++ b/arch/sh/kernel/irq_32.c
@@ -0,0 +1,57 @@
1/*
2 * SHcompact irqflags support
3 *
4 * Copyright (C) 2006 - 2009 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/irqflags.h>
11#include <linux/module.h>
12
13void notrace raw_local_irq_restore(unsigned long flags)
14{
15 unsigned long __dummy0, __dummy1;
16
17 if (flags == RAW_IRQ_DISABLED) {
18 __asm__ __volatile__ (
19 "stc sr, %0\n\t"
20 "or #0xf0, %0\n\t"
21 "ldc %0, sr\n\t"
22 : "=&z" (__dummy0)
23 : /* no inputs */
24 : "memory"
25 );
26 } else {
27 __asm__ __volatile__ (
28 "stc sr, %0\n\t"
29 "and %1, %0\n\t"
30#ifdef CONFIG_CPU_HAS_SR_RB
31 "stc r6_bank, %1\n\t"
32 "or %1, %0\n\t"
33#endif
34 "ldc %0, sr\n\t"
35 : "=&r" (__dummy0), "=r" (__dummy1)
36 : "1" (~RAW_IRQ_DISABLED)
37 : "memory"
38 );
39 }
40}
41EXPORT_SYMBOL(raw_local_irq_restore);
42
43unsigned long notrace __raw_local_save_flags(void)
44{
45 unsigned long flags;
46
47 __asm__ __volatile__ (
48 "stc sr, %0\n\t"
49 "and #0xf0, %0\n\t"
50 : "=&z" (flags)
51 : /* no inputs */
52 : "memory"
53 );
54
55 return flags;
56}
57EXPORT_SYMBOL(__raw_local_save_flags);
diff --git a/arch/sh/kernel/irq_64.c b/arch/sh/kernel/irq_64.c
new file mode 100644
index 000000000000..32365ba0e039
--- /dev/null
+++ b/arch/sh/kernel/irq_64.c
@@ -0,0 +1,51 @@
1/*
2 * SHmedia irqflags support
3 *
4 * Copyright (C) 2006 - 2009 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/irqflags.h>
11#include <linux/module.h>
12#include <cpu/registers.h>
13
14void notrace raw_local_irq_restore(unsigned long flags)
15{
16 unsigned long long __dummy;
17
18 if (flags == RAW_IRQ_DISABLED) {
19 __asm__ __volatile__ (
20 "getcon " __SR ", %0\n\t"
21 "or %0, %1, %0\n\t"
22 "putcon %0, " __SR "\n\t"
23 : "=&r" (__dummy)
24 : "r" (RAW_IRQ_DISABLED)
25 );
26 } else {
27 __asm__ __volatile__ (
28 "getcon " __SR ", %0\n\t"
29 "and %0, %1, %0\n\t"
30 "putcon %0, " __SR "\n\t"
31 : "=&r" (__dummy)
32 : "r" (~RAW_IRQ_DISABLED)
33 );
34 }
35}
36EXPORT_SYMBOL(raw_local_irq_restore);
37
38unsigned long notrace __raw_local_save_flags(void)
39{
40 unsigned long flags;
41
42 __asm__ __volatile__ (
43 "getcon " __SR ", %0\n\t"
44 "and %0, %1, %0"
45 : "=&r" (flags)
46 : "r" (RAW_IRQ_DISABLED)
47 );
48
49 return flags;
50}
51EXPORT_SYMBOL(__raw_local_save_flags);
diff --git a/arch/sh/kernel/kgdb.c b/arch/sh/kernel/kgdb.c
index 3e532d0d4a5c..70c69659b846 100644
--- a/arch/sh/kernel/kgdb.c
+++ b/arch/sh/kernel/kgdb.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * SuperH KGDB support 2 * SuperH KGDB support
3 * 3 *
4 * Copyright (C) 2008 Paul Mundt 4 * Copyright (C) 2008 - 2009 Paul Mundt
5 * 5 *
6 * Single stepping taken from the old stub by Henry Bell and Jeremy Siegel. 6 * Single stepping taken from the old stub by Henry Bell and Jeremy Siegel.
7 * 7 *
@@ -251,24 +251,60 @@ BUILD_TRAP_HANDLER(singlestep)
251 local_irq_restore(flags); 251 local_irq_restore(flags);
252} 252}
253 253
254static int __kgdb_notify(struct die_args *args, unsigned long cmd)
255{
256 int ret;
257
258 switch (cmd) {
259 case DIE_BREAKPOINT:
260 /*
261 * This means a user thread is single stepping
262 * a system call which should be ignored
263 */
264 if (test_thread_flag(TIF_SINGLESTEP))
265 return NOTIFY_DONE;
266
267 ret = kgdb_handle_exception(args->trapnr & 0xff, args->signr,
268 args->err, args->regs);
269 if (ret)
270 return NOTIFY_DONE;
271
272 break;
273 }
254 274
255BUILD_TRAP_HANDLER(breakpoint) 275 return NOTIFY_STOP;
276}
277
278static int
279kgdb_notify(struct notifier_block *self, unsigned long cmd, void *ptr)
256{ 280{
257 unsigned long flags; 281 unsigned long flags;
258 TRAP_HANDLER_DECL; 282 int ret;
259 283
260 local_irq_save(flags); 284 local_irq_save(flags);
261 kgdb_handle_exception(vec >> 2, SIGTRAP, 0, regs); 285 ret = __kgdb_notify(ptr, cmd);
262 local_irq_restore(flags); 286 local_irq_restore(flags);
287
288 return ret;
263} 289}
264 290
291static struct notifier_block kgdb_notifier = {
292 .notifier_call = kgdb_notify,
293
294 /*
295 * Lowest-prio notifier priority, we want to be notified last:
296 */
297 .priority = -INT_MAX,
298};
299
265int kgdb_arch_init(void) 300int kgdb_arch_init(void)
266{ 301{
267 return 0; 302 return register_die_notifier(&kgdb_notifier);
268} 303}
269 304
270void kgdb_arch_exit(void) 305void kgdb_arch_exit(void)
271{ 306{
307 unregister_die_notifier(&kgdb_notifier);
272} 308}
273 309
274struct kgdb_arch arch_kgdb_ops = { 310struct kgdb_arch arch_kgdb_ops = {
diff --git a/arch/sh/kernel/kprobes.c b/arch/sh/kernel/kprobes.c
index c96850b061fb..4049d99f76e1 100644
--- a/arch/sh/kernel/kprobes.c
+++ b/arch/sh/kernel/kprobes.c
@@ -13,6 +13,7 @@
13#include <linux/ptrace.h> 13#include <linux/ptrace.h>
14#include <linux/preempt.h> 14#include <linux/preempt.h>
15#include <linux/kdebug.h> 15#include <linux/kdebug.h>
16#include <linux/slab.h>
16#include <asm/cacheflush.h> 17#include <asm/cacheflush.h>
17#include <asm/uaccess.h> 18#include <asm/uaccess.h>
18 19
diff --git a/arch/sh/kernel/machine_kexec.c b/arch/sh/kernel/machine_kexec.c
index 7ea2704ea033..7672141c841b 100644
--- a/arch/sh/kernel/machine_kexec.c
+++ b/arch/sh/kernel/machine_kexec.c
@@ -21,6 +21,8 @@
21#include <asm/mmu_context.h> 21#include <asm/mmu_context.h>
22#include <asm/io.h> 22#include <asm/io.h>
23#include <asm/cacheflush.h> 23#include <asm/cacheflush.h>
24#include <asm/sh_bios.h>
25#include <asm/reboot.h>
24 26
25typedef void (*relocate_new_kernel_t)(unsigned long indirection_page, 27typedef void (*relocate_new_kernel_t)(unsigned long indirection_page,
26 unsigned long reboot_code_buffer, 28 unsigned long reboot_code_buffer,
@@ -28,15 +30,11 @@ typedef void (*relocate_new_kernel_t)(unsigned long indirection_page,
28 30
29extern const unsigned char relocate_new_kernel[]; 31extern const unsigned char relocate_new_kernel[];
30extern const unsigned int relocate_new_kernel_size; 32extern const unsigned int relocate_new_kernel_size;
31extern void *gdb_vbr_vector;
32extern void *vbr_base; 33extern void *vbr_base;
33 34
34void machine_shutdown(void) 35void native_machine_crash_shutdown(struct pt_regs *regs)
35{
36}
37
38void machine_crash_shutdown(struct pt_regs *regs)
39{ 36{
37 /* Nothing to do for UP, but definitely broken for SMP.. */
40} 38}
41 39
42/* 40/*
@@ -46,12 +44,6 @@ void machine_crash_shutdown(struct pt_regs *regs)
46 */ 44 */
47int machine_kexec_prepare(struct kimage *image) 45int machine_kexec_prepare(struct kimage *image)
48{ 46{
49 /* older versions of kexec-tools are passing
50 * the zImage entry point as a virtual address.
51 */
52 if (image->start != PHYSADDR(image->start))
53 return -EINVAL; /* upgrade your kexec-tools */
54
55 return 0; 47 return 0;
56} 48}
57 49
@@ -123,11 +115,7 @@ void machine_kexec(struct kimage *image)
123 kexec_info(image); 115 kexec_info(image);
124 flush_cache_all(); 116 flush_cache_all();
125 117
126#if defined(CONFIG_SH_STANDARD_BIOS) 118 sh_bios_vbr_reload();
127 asm volatile("ldc %0, vbr" :
128 : "r" (((unsigned long) gdb_vbr_vector) - 0x100)
129 : "memory");
130#endif
131 119
132 /* now call it */ 120 /* now call it */
133 rnk = (relocate_new_kernel_t) reboot_code_buffer; 121 rnk = (relocate_new_kernel_t) reboot_code_buffer;
diff --git a/arch/sh/kernel/machvec.c b/arch/sh/kernel/machvec.c
index cbce639b108a..1652340ba3f2 100644
--- a/arch/sh/kernel/machvec.c
+++ b/arch/sh/kernel/machvec.c
@@ -135,5 +135,9 @@ void __init sh_mv_setup(void)
135 if (!sh_mv.mv_nr_irqs) 135 if (!sh_mv.mv_nr_irqs)
136 sh_mv.mv_nr_irqs = NR_IRQS; 136 sh_mv.mv_nr_irqs = NR_IRQS;
137 137
138#ifdef P2SEG
138 __set_io_port_base(P2SEG); 139 __set_io_port_base(P2SEG);
140#else
141 __set_io_port_base(0);
142#endif
139} 143}
diff --git a/arch/sh/kernel/module.c b/arch/sh/kernel/module.c
index c2efdcde266f..43adddfe4c04 100644
--- a/arch/sh/kernel/module.c
+++ b/arch/sh/kernel/module.c
@@ -32,6 +32,7 @@
32#include <linux/string.h> 32#include <linux/string.h>
33#include <linux/kernel.h> 33#include <linux/kernel.h>
34#include <asm/unaligned.h> 34#include <asm/unaligned.h>
35#include <asm/dwarf.h>
35 36
36void *module_alloc(unsigned long size) 37void *module_alloc(unsigned long size)
37{ 38{
@@ -145,10 +146,16 @@ int module_finalize(const Elf_Ehdr *hdr,
145 const Elf_Shdr *sechdrs, 146 const Elf_Shdr *sechdrs,
146 struct module *me) 147 struct module *me)
147{ 148{
148 return module_bug_finalize(hdr, sechdrs, me); 149 int ret = 0;
150
151 ret |= module_dwarf_finalize(hdr, sechdrs, me);
152 ret |= module_bug_finalize(hdr, sechdrs, me);
153
154 return ret;
149} 155}
150 156
151void module_arch_cleanup(struct module *mod) 157void module_arch_cleanup(struct module *mod)
152{ 158{
153 module_bug_cleanup(mod); 159 module_bug_cleanup(mod);
160 module_dwarf_cleanup(mod);
154} 161}
diff --git a/arch/sh/kernel/perf_callchain.c b/arch/sh/kernel/perf_callchain.c
new file mode 100644
index 000000000000..a9dd3abde28e
--- /dev/null
+++ b/arch/sh/kernel/perf_callchain.c
@@ -0,0 +1,95 @@
1/*
2 * Performance event callchain support - SuperH architecture code
3 *
4 * Copyright (C) 2009 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/kernel.h>
11#include <linux/sched.h>
12#include <linux/perf_event.h>
13#include <linux/percpu.h>
14#include <asm/unwinder.h>
15#include <asm/ptrace.h>
16
17static inline void callchain_store(struct perf_callchain_entry *entry, u64 ip)
18{
19 if (entry->nr < PERF_MAX_STACK_DEPTH)
20 entry->ip[entry->nr++] = ip;
21}
22
23static void callchain_warning(void *data, char *msg)
24{
25}
26
27static void
28callchain_warning_symbol(void *data, char *msg, unsigned long symbol)
29{
30}
31
32static int callchain_stack(void *data, char *name)
33{
34 return 0;
35}
36
37static void callchain_address(void *data, unsigned long addr, int reliable)
38{
39 struct perf_callchain_entry *entry = data;
40
41 if (reliable)
42 callchain_store(entry, addr);
43}
44
45static const struct stacktrace_ops callchain_ops = {
46 .warning = callchain_warning,
47 .warning_symbol = callchain_warning_symbol,
48 .stack = callchain_stack,
49 .address = callchain_address,
50};
51
52static void
53perf_callchain_kernel(struct pt_regs *regs, struct perf_callchain_entry *entry)
54{
55 callchain_store(entry, PERF_CONTEXT_KERNEL);
56 callchain_store(entry, regs->pc);
57
58 unwind_stack(NULL, regs, NULL, &callchain_ops, entry);
59}
60
61static void
62perf_do_callchain(struct pt_regs *regs, struct perf_callchain_entry *entry)
63{
64 int is_user;
65
66 if (!regs)
67 return;
68
69 is_user = user_mode(regs);
70
71 if (is_user && current->state != TASK_RUNNING)
72 return;
73
74 /*
75 * Only the kernel side is implemented for now.
76 */
77 if (!is_user)
78 perf_callchain_kernel(regs, entry);
79}
80
81/*
82 * No need for separate IRQ and NMI entries.
83 */
84static DEFINE_PER_CPU(struct perf_callchain_entry, callchain);
85
86struct perf_callchain_entry *perf_callchain(struct pt_regs *regs)
87{
88 struct perf_callchain_entry *entry = &__get_cpu_var(callchain);
89
90 entry->nr = 0;
91
92 perf_do_callchain(regs, entry);
93
94 return entry;
95}
diff --git a/arch/sh/kernel/perf_event.c b/arch/sh/kernel/perf_event.c
new file mode 100644
index 000000000000..81b6de41ae5d
--- /dev/null
+++ b/arch/sh/kernel/perf_event.c
@@ -0,0 +1,330 @@
1/*
2 * Performance event support framework for SuperH hardware counters.
3 *
4 * Copyright (C) 2009 Paul Mundt
5 *
6 * Heavily based on the x86 and PowerPC implementations.
7 *
8 * x86:
9 * Copyright (C) 2008 Thomas Gleixner <tglx@linutronix.de>
10 * Copyright (C) 2008-2009 Red Hat, Inc., Ingo Molnar
11 * Copyright (C) 2009 Jaswinder Singh Rajput
12 * Copyright (C) 2009 Advanced Micro Devices, Inc., Robert Richter
13 * Copyright (C) 2008-2009 Red Hat, Inc., Peter Zijlstra <pzijlstr@redhat.com>
14 * Copyright (C) 2009 Intel Corporation, <markus.t.metzger@intel.com>
15 *
16 * ppc:
17 * Copyright 2008-2009 Paul Mackerras, IBM Corporation.
18 *
19 * This file is subject to the terms and conditions of the GNU General Public
20 * License. See the file "COPYING" in the main directory of this archive
21 * for more details.
22 */
23#include <linux/kernel.h>
24#include <linux/init.h>
25#include <linux/io.h>
26#include <linux/irq.h>
27#include <linux/perf_event.h>
28#include <asm/processor.h>
29
30struct cpu_hw_events {
31 struct perf_event *events[MAX_HWEVENTS];
32 unsigned long used_mask[BITS_TO_LONGS(MAX_HWEVENTS)];
33 unsigned long active_mask[BITS_TO_LONGS(MAX_HWEVENTS)];
34};
35
36DEFINE_PER_CPU(struct cpu_hw_events, cpu_hw_events);
37
38static struct sh_pmu *sh_pmu __read_mostly;
39
40/* Number of perf_events counting hardware events */
41static atomic_t num_events;
42/* Used to avoid races in calling reserve/release_pmc_hardware */
43static DEFINE_MUTEX(pmc_reserve_mutex);
44
45/*
46 * Stub these out for now, do something more profound later.
47 */
48int reserve_pmc_hardware(void)
49{
50 return 0;
51}
52
53void release_pmc_hardware(void)
54{
55}
56
57static inline int sh_pmu_initialized(void)
58{
59 return !!sh_pmu;
60}
61
62/*
63 * Release the PMU if this is the last perf_event.
64 */
65static void hw_perf_event_destroy(struct perf_event *event)
66{
67 if (!atomic_add_unless(&num_events, -1, 1)) {
68 mutex_lock(&pmc_reserve_mutex);
69 if (atomic_dec_return(&num_events) == 0)
70 release_pmc_hardware();
71 mutex_unlock(&pmc_reserve_mutex);
72 }
73}
74
75static int hw_perf_cache_event(int config, int *evp)
76{
77 unsigned long type, op, result;
78 int ev;
79
80 if (!sh_pmu->cache_events)
81 return -EINVAL;
82
83 /* unpack config */
84 type = config & 0xff;
85 op = (config >> 8) & 0xff;
86 result = (config >> 16) & 0xff;
87
88 if (type >= PERF_COUNT_HW_CACHE_MAX ||
89 op >= PERF_COUNT_HW_CACHE_OP_MAX ||
90 result >= PERF_COUNT_HW_CACHE_RESULT_MAX)
91 return -EINVAL;
92
93 ev = (*sh_pmu->cache_events)[type][op][result];
94 if (ev == 0)
95 return -EOPNOTSUPP;
96 if (ev == -1)
97 return -EINVAL;
98 *evp = ev;
99 return 0;
100}
101
102static int __hw_perf_event_init(struct perf_event *event)
103{
104 struct perf_event_attr *attr = &event->attr;
105 struct hw_perf_event *hwc = &event->hw;
106 int config = -1;
107 int err;
108
109 if (!sh_pmu_initialized())
110 return -ENODEV;
111
112 /*
113 * All of the on-chip counters are "limited", in that they have
114 * no interrupts, and are therefore unable to do sampling without
115 * further work and timer assistance.
116 */
117 if (hwc->sample_period)
118 return -EINVAL;
119
120 /*
121 * See if we need to reserve the counter.
122 *
123 * If no events are currently in use, then we have to take a
124 * mutex to ensure that we don't race with another task doing
125 * reserve_pmc_hardware or release_pmc_hardware.
126 */
127 err = 0;
128 if (!atomic_inc_not_zero(&num_events)) {
129 mutex_lock(&pmc_reserve_mutex);
130 if (atomic_read(&num_events) == 0 &&
131 reserve_pmc_hardware())
132 err = -EBUSY;
133 else
134 atomic_inc(&num_events);
135 mutex_unlock(&pmc_reserve_mutex);
136 }
137
138 if (err)
139 return err;
140
141 event->destroy = hw_perf_event_destroy;
142
143 switch (attr->type) {
144 case PERF_TYPE_RAW:
145 config = attr->config & sh_pmu->raw_event_mask;
146 break;
147 case PERF_TYPE_HW_CACHE:
148 err = hw_perf_cache_event(attr->config, &config);
149 if (err)
150 return err;
151 break;
152 case PERF_TYPE_HARDWARE:
153 if (attr->config >= sh_pmu->max_events)
154 return -EINVAL;
155
156 config = sh_pmu->event_map(attr->config);
157 break;
158 }
159
160 if (config == -1)
161 return -EINVAL;
162
163 hwc->config |= config;
164
165 return 0;
166}
167
168static void sh_perf_event_update(struct perf_event *event,
169 struct hw_perf_event *hwc, int idx)
170{
171 u64 prev_raw_count, new_raw_count;
172 s64 delta;
173 int shift = 0;
174
175 /*
176 * Depending on the counter configuration, they may or may not
177 * be chained, in which case the previous counter value can be
178 * updated underneath us if the lower-half overflows.
179 *
180 * Our tactic to handle this is to first atomically read and
181 * exchange a new raw count - then add that new-prev delta
182 * count to the generic counter atomically.
183 *
184 * As there is no interrupt associated with the overflow events,
185 * this is the simplest approach for maintaining consistency.
186 */
187again:
188 prev_raw_count = atomic64_read(&hwc->prev_count);
189 new_raw_count = sh_pmu->read(idx);
190
191 if (atomic64_cmpxchg(&hwc->prev_count, prev_raw_count,
192 new_raw_count) != prev_raw_count)
193 goto again;
194
195 /*
196 * Now we have the new raw value and have updated the prev
197 * timestamp already. We can now calculate the elapsed delta
198 * (counter-)time and add that to the generic counter.
199 *
200 * Careful, not all hw sign-extends above the physical width
201 * of the count.
202 */
203 delta = (new_raw_count << shift) - (prev_raw_count << shift);
204 delta >>= shift;
205
206 atomic64_add(delta, &event->count);
207}
208
209static void sh_pmu_disable(struct perf_event *event)
210{
211 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
212 struct hw_perf_event *hwc = &event->hw;
213 int idx = hwc->idx;
214
215 clear_bit(idx, cpuc->active_mask);
216 sh_pmu->disable(hwc, idx);
217
218 barrier();
219
220 sh_perf_event_update(event, &event->hw, idx);
221
222 cpuc->events[idx] = NULL;
223 clear_bit(idx, cpuc->used_mask);
224
225 perf_event_update_userpage(event);
226}
227
228static int sh_pmu_enable(struct perf_event *event)
229{
230 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
231 struct hw_perf_event *hwc = &event->hw;
232 int idx = hwc->idx;
233
234 if (test_and_set_bit(idx, cpuc->used_mask)) {
235 idx = find_first_zero_bit(cpuc->used_mask, sh_pmu->num_events);
236 if (idx == sh_pmu->num_events)
237 return -EAGAIN;
238
239 set_bit(idx, cpuc->used_mask);
240 hwc->idx = idx;
241 }
242
243 sh_pmu->disable(hwc, idx);
244
245 cpuc->events[idx] = event;
246 set_bit(idx, cpuc->active_mask);
247
248 sh_pmu->enable(hwc, idx);
249
250 perf_event_update_userpage(event);
251
252 return 0;
253}
254
255static void sh_pmu_read(struct perf_event *event)
256{
257 sh_perf_event_update(event, &event->hw, event->hw.idx);
258}
259
260static const struct pmu pmu = {
261 .enable = sh_pmu_enable,
262 .disable = sh_pmu_disable,
263 .read = sh_pmu_read,
264};
265
266const struct pmu *hw_perf_event_init(struct perf_event *event)
267{
268 int err = __hw_perf_event_init(event);
269 if (unlikely(err)) {
270 if (event->destroy)
271 event->destroy(event);
272 return ERR_PTR(err);
273 }
274
275 return &pmu;
276}
277
278static void sh_pmu_setup(int cpu)
279{
280 struct cpu_hw_events *cpuhw = &per_cpu(cpu_hw_events, cpu);
281
282 memset(cpuhw, 0, sizeof(struct cpu_hw_events));
283}
284
285static int __cpuinit
286sh_pmu_notifier(struct notifier_block *self, unsigned long action, void *hcpu)
287{
288 unsigned int cpu = (long)hcpu;
289
290 switch (action & ~CPU_TASKS_FROZEN) {
291 case CPU_UP_PREPARE:
292 sh_pmu_setup(cpu);
293 break;
294
295 default:
296 break;
297 }
298
299 return NOTIFY_OK;
300}
301
302void hw_perf_enable(void)
303{
304 if (!sh_pmu_initialized())
305 return;
306
307 sh_pmu->enable_all();
308}
309
310void hw_perf_disable(void)
311{
312 if (!sh_pmu_initialized())
313 return;
314
315 sh_pmu->disable_all();
316}
317
318int __cpuinit register_sh_pmu(struct sh_pmu *pmu)
319{
320 if (sh_pmu)
321 return -EBUSY;
322 sh_pmu = pmu;
323
324 pr_info("Performance Events: %s support registered\n", pmu->name);
325
326 WARN_ON(pmu->num_events > MAX_HWEVENTS);
327
328 perf_cpu_notifier(sh_pmu_notifier);
329 return 0;
330}
diff --git a/arch/sh/kernel/process.c b/arch/sh/kernel/process.c
new file mode 100644
index 000000000000..17f89aa4e1b3
--- /dev/null
+++ b/arch/sh/kernel/process.c
@@ -0,0 +1,101 @@
1#include <linux/mm.h>
2#include <linux/kernel.h>
3#include <linux/slab.h>
4#include <linux/sched.h>
5
6struct kmem_cache *task_xstate_cachep = NULL;
7unsigned int xstate_size;
8
9int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
10{
11 *dst = *src;
12
13 if (src->thread.xstate) {
14 dst->thread.xstate = kmem_cache_alloc(task_xstate_cachep,
15 GFP_KERNEL);
16 if (!dst->thread.xstate)
17 return -ENOMEM;
18 memcpy(dst->thread.xstate, src->thread.xstate, xstate_size);
19 }
20
21 return 0;
22}
23
24void free_thread_xstate(struct task_struct *tsk)
25{
26 if (tsk->thread.xstate) {
27 kmem_cache_free(task_xstate_cachep, tsk->thread.xstate);
28 tsk->thread.xstate = NULL;
29 }
30}
31
32#if THREAD_SHIFT < PAGE_SHIFT
33static struct kmem_cache *thread_info_cache;
34
35struct thread_info *alloc_thread_info(struct task_struct *tsk)
36{
37 struct thread_info *ti;
38
39 ti = kmem_cache_alloc(thread_info_cache, GFP_KERNEL);
40 if (unlikely(ti == NULL))
41 return NULL;
42#ifdef CONFIG_DEBUG_STACK_USAGE
43 memset(ti, 0, THREAD_SIZE);
44#endif
45 return ti;
46}
47
48void free_thread_info(struct thread_info *ti)
49{
50 free_thread_xstate(ti->task);
51 kmem_cache_free(thread_info_cache, ti);
52}
53
54void thread_info_cache_init(void)
55{
56 thread_info_cache = kmem_cache_create("thread_info", THREAD_SIZE,
57 THREAD_SIZE, SLAB_PANIC, NULL);
58}
59#else
60struct thread_info *alloc_thread_info(struct task_struct *tsk)
61{
62#ifdef CONFIG_DEBUG_STACK_USAGE
63 gfp_t mask = GFP_KERNEL | __GFP_ZERO;
64#else
65 gfp_t mask = GFP_KERNEL;
66#endif
67 return (struct thread_info *)__get_free_pages(mask, THREAD_SIZE_ORDER);
68}
69
70void free_thread_info(struct thread_info *ti)
71{
72 free_thread_xstate(ti->task);
73 free_pages((unsigned long)ti, THREAD_SIZE_ORDER);
74}
75#endif /* THREAD_SHIFT < PAGE_SHIFT */
76
77void arch_task_cache_init(void)
78{
79 if (!xstate_size)
80 return;
81
82 task_xstate_cachep = kmem_cache_create("task_xstate", xstate_size,
83 __alignof__(union thread_xstate),
84 SLAB_PANIC | SLAB_NOTRACK, NULL);
85}
86
87#ifdef CONFIG_SH_FPU_EMU
88# define HAVE_SOFTFP 1
89#else
90# define HAVE_SOFTFP 0
91#endif
92
93void init_thread_xstate(void)
94{
95 if (boot_cpu_data.flags & CPU_HAS_FPU)
96 xstate_size = sizeof(struct sh_fpu_hard_struct);
97 else if (HAVE_SOFTFP)
98 xstate_size = sizeof(struct sh_fpu_soft_struct);
99 else
100 xstate_size = 0;
101}
diff --git a/arch/sh/kernel/process_32.c b/arch/sh/kernel/process_32.c
index 0673c4746be3..052981972ae6 100644
--- a/arch/sh/kernel/process_32.c
+++ b/arch/sh/kernel/process_32.c
@@ -15,66 +15,17 @@
15 */ 15 */
16#include <linux/module.h> 16#include <linux/module.h>
17#include <linux/mm.h> 17#include <linux/mm.h>
18#include <linux/slab.h>
18#include <linux/elfcore.h> 19#include <linux/elfcore.h>
19#include <linux/pm.h>
20#include <linux/kallsyms.h> 20#include <linux/kallsyms.h>
21#include <linux/kexec.h>
22#include <linux/kdebug.h>
23#include <linux/tick.h>
24#include <linux/reboot.h>
25#include <linux/fs.h> 21#include <linux/fs.h>
26#include <linux/ftrace.h> 22#include <linux/ftrace.h>
27#include <linux/preempt.h> 23#include <linux/hw_breakpoint.h>
28#include <asm/uaccess.h> 24#include <asm/uaccess.h>
29#include <asm/mmu_context.h> 25#include <asm/mmu_context.h>
30#include <asm/pgalloc.h>
31#include <asm/system.h> 26#include <asm/system.h>
32#include <asm/ubc.h>
33#include <asm/fpu.h> 27#include <asm/fpu.h>
34#include <asm/syscalls.h> 28#include <asm/syscalls.h>
35#include <asm/watchdog.h>
36
37int ubc_usercnt = 0;
38
39#ifdef CONFIG_32BIT
40static void watchdog_trigger_immediate(void)
41{
42 sh_wdt_write_cnt(0xFF);
43 sh_wdt_write_csr(0xC2);
44}
45
46void machine_restart(char * __unused)
47{
48 local_irq_disable();
49
50 /* Use watchdog timer to trigger reset */
51 watchdog_trigger_immediate();
52
53 while (1)
54 cpu_sleep();
55}
56#else
57void machine_restart(char * __unused)
58{
59 /* SR.BL=1 and invoke address error to let CPU reset (manual reset) */
60 asm volatile("ldc %0, sr\n\t"
61 "mov.l @%1, %0" : : "r" (0x10000000), "r" (0x80000001));
62}
63#endif
64
65void machine_halt(void)
66{
67 local_irq_disable();
68
69 while (1)
70 cpu_sleep();
71}
72
73void machine_power_off(void)
74{
75 if (pm_power_off)
76 pm_power_off();
77}
78 29
79void show_regs(struct pt_regs * regs) 30void show_regs(struct pt_regs * regs)
80{ 31{
@@ -91,7 +42,7 @@ void show_regs(struct pt_regs * regs)
91 printk("PC : %08lx SP : %08lx SR : %08lx ", 42 printk("PC : %08lx SP : %08lx SR : %08lx ",
92 regs->pc, regs->regs[15], regs->sr); 43 regs->pc, regs->regs[15], regs->sr);
93#ifdef CONFIG_MMU 44#ifdef CONFIG_MMU
94 printk("TEA : %08x\n", ctrl_inl(MMU_TEA)); 45 printk("TEA : %08x\n", __raw_readl(MMU_TEA));
95#else 46#else
96 printk("\n"); 47 printk("\n");
97#endif 48#endif
@@ -134,7 +85,10 @@ int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags)
134 regs.regs[5] = (unsigned long)fn; 85 regs.regs[5] = (unsigned long)fn;
135 86
136 regs.pc = (unsigned long)kernel_thread_helper; 87 regs.pc = (unsigned long)kernel_thread_helper;
137 regs.sr = (1 << 30); 88 regs.sr = SR_MD;
89#if defined(CONFIG_SH_FPU)
90 regs.sr |= SR_FD;
91#endif
138 92
139 /* Ok, create the new process.. */ 93 /* Ok, create the new process.. */
140 pid = do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, 94 pid = do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0,
@@ -142,22 +96,36 @@ int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags)
142 96
143 return pid; 97 return pid;
144} 98}
99EXPORT_SYMBOL(kernel_thread);
100
101void start_thread(struct pt_regs *regs, unsigned long new_pc,
102 unsigned long new_sp)
103{
104 set_fs(USER_DS);
105
106 regs->pr = 0;
107 regs->sr = SR_FD;
108 regs->pc = new_pc;
109 regs->regs[15] = new_sp;
110
111 free_thread_xstate(current);
112}
113EXPORT_SYMBOL(start_thread);
145 114
146/* 115/*
147 * Free current thread data structures etc.. 116 * Free current thread data structures etc..
148 */ 117 */
149void exit_thread(void) 118void exit_thread(void)
150{ 119{
151 if (current->thread.ubc_pc) {
152 current->thread.ubc_pc = 0;
153 ubc_usercnt -= 1;
154 }
155} 120}
156 121
157void flush_thread(void) 122void flush_thread(void)
158{ 123{
159#if defined(CONFIG_SH_FPU)
160 struct task_struct *tsk = current; 124 struct task_struct *tsk = current;
125
126 flush_ptrace_hw_breakpoint(tsk);
127
128#if defined(CONFIG_SH_FPU)
161 /* Forget lazy FPU state */ 129 /* Forget lazy FPU state */
162 clear_fpu(tsk, task_pt_regs(tsk)); 130 clear_fpu(tsk, task_pt_regs(tsk));
163 clear_used_math(); 131 clear_used_math();
@@ -186,6 +154,16 @@ int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpu)
186 154
187 return fpvalid; 155 return fpvalid;
188} 156}
157EXPORT_SYMBOL(dump_fpu);
158
159/*
160 * This gets called before we allocate a new thread and copy
161 * the current task into it.
162 */
163void prepare_to_copy(struct task_struct *tsk)
164{
165 unlazy_fpu(tsk, task_pt_regs(tsk));
166}
189 167
190asmlinkage void ret_from_fork(void); 168asmlinkage void ret_from_fork(void);
191 169
@@ -195,17 +173,10 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
195{ 173{
196 struct thread_info *ti = task_thread_info(p); 174 struct thread_info *ti = task_thread_info(p);
197 struct pt_regs *childregs; 175 struct pt_regs *childregs;
198#if defined(CONFIG_SH_FPU) || defined(CONFIG_SH_DSP)
199 struct task_struct *tsk = current;
200#endif
201
202#if defined(CONFIG_SH_FPU)
203 unlazy_fpu(tsk, regs);
204 p->thread.fpu = tsk->thread.fpu;
205 copy_to_stopped_child_used_math(p);
206#endif
207 176
208#if defined(CONFIG_SH_DSP) 177#if defined(CONFIG_SH_DSP)
178 struct task_struct *tsk = current;
179
209 if (is_dsp_enabled(tsk)) { 180 if (is_dsp_enabled(tsk)) {
210 /* We can use the __save_dsp or just copy the struct: 181 /* We can use the __save_dsp or just copy the struct:
211 * __save_dsp(p); 182 * __save_dsp(p);
@@ -224,6 +195,8 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
224 } else { 195 } else {
225 childregs->regs[15] = (unsigned long)childregs; 196 childregs->regs[15] = (unsigned long)childregs;
226 ti->addr_limit = KERNEL_DS; 197 ti->addr_limit = KERNEL_DS;
198 ti->status &= ~TS_USEDFPU;
199 p->fpu_counter = 0;
227 } 200 }
228 201
229 if (clone_flags & CLONE_SETTLS) 202 if (clone_flags & CLONE_SETTLS)
@@ -234,53 +207,11 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
234 p->thread.sp = (unsigned long) childregs; 207 p->thread.sp = (unsigned long) childregs;
235 p->thread.pc = (unsigned long) ret_from_fork; 208 p->thread.pc = (unsigned long) ret_from_fork;
236 209
237 p->thread.ubc_pc = 0; 210 memset(p->thread.ptrace_bps, 0, sizeof(p->thread.ptrace_bps));
238 211
239 return 0; 212 return 0;
240} 213}
241 214
242/* Tracing by user break controller. */
243static void ubc_set_tracing(int asid, unsigned long pc)
244{
245#if defined(CONFIG_CPU_SH4A)
246 unsigned long val;
247
248 val = (UBC_CBR_ID_INST | UBC_CBR_RW_READ | UBC_CBR_CE);
249 val |= (UBC_CBR_AIE | UBC_CBR_AIV_SET(asid));
250
251 ctrl_outl(val, UBC_CBR0);
252 ctrl_outl(pc, UBC_CAR0);
253 ctrl_outl(0x0, UBC_CAMR0);
254 ctrl_outl(0x0, UBC_CBCR);
255
256 val = (UBC_CRR_RES | UBC_CRR_PCB | UBC_CRR_BIE);
257 ctrl_outl(val, UBC_CRR0);
258
259 /* Read UBC register that we wrote last, for checking update */
260 val = ctrl_inl(UBC_CRR0);
261
262#else /* CONFIG_CPU_SH4A */
263 ctrl_outl(pc, UBC_BARA);
264
265#ifdef CONFIG_MMU
266 ctrl_outb(asid, UBC_BASRA);
267#endif
268
269 ctrl_outl(0, UBC_BAMRA);
270
271 if (current_cpu_data.type == CPU_SH7729 ||
272 current_cpu_data.type == CPU_SH7710 ||
273 current_cpu_data.type == CPU_SH7712 ||
274 current_cpu_data.type == CPU_SH7203){
275 ctrl_outw(BBR_INST | BBR_READ | BBR_CPU, UBC_BBRA);
276 ctrl_outl(BRCR_PCBA | BRCR_PCTE, UBC_BRCR);
277 } else {
278 ctrl_outw(BBR_INST | BBR_READ, UBC_BBRA);
279 ctrl_outw(BRCR_PCBA, UBC_BRCR);
280 }
281#endif /* CONFIG_CPU_SH4A */
282}
283
284/* 215/*
285 * switch_to(x,y) should switch tasks from x to y. 216 * switch_to(x,y) should switch tasks from x to y.
286 * 217 *
@@ -288,9 +219,13 @@ static void ubc_set_tracing(int asid, unsigned long pc)
288__notrace_funcgraph struct task_struct * 219__notrace_funcgraph struct task_struct *
289__switch_to(struct task_struct *prev, struct task_struct *next) 220__switch_to(struct task_struct *prev, struct task_struct *next)
290{ 221{
291#if defined(CONFIG_SH_FPU) 222 struct thread_struct *next_t = &next->thread;
223
292 unlazy_fpu(prev, task_pt_regs(prev)); 224 unlazy_fpu(prev, task_pt_regs(prev));
293#endif 225
226 /* we're going to use this soon, after a few expensive things */
227 if (next->fpu_counter > 5)
228 prefetch(next_t->xstate);
294 229
295#ifdef CONFIG_MMU 230#ifdef CONFIG_MMU
296 /* 231 /*
@@ -302,24 +237,13 @@ __switch_to(struct task_struct *prev, struct task_struct *next)
302 : "r" (task_thread_info(next))); 237 : "r" (task_thread_info(next)));
303#endif 238#endif
304 239
305 /* If no tasks are using the UBC, we're done */ 240 /*
306 if (ubc_usercnt == 0) 241 * If the task has used fpu the last 5 timeslices, just do a full
307 /* If no tasks are using the UBC, we're done */; 242 * restore of the math state immediately to avoid the trap; the
308 else if (next->thread.ubc_pc && next->mm) { 243 * chances of needing FPU soon are obviously high now
309 int asid = 0; 244 */
310#ifdef CONFIG_MMU 245 if (next->fpu_counter > 5)
311 asid |= cpu_asid(smp_processor_id(), next->mm); 246 __fpu_state_restore();
312#endif
313 ubc_set_tracing(asid, next->thread.ubc_pc);
314 } else {
315#if defined(CONFIG_CPU_SH4A)
316 ctrl_outl(UBC_CBR_INIT, UBC_CBR0);
317 ctrl_outl(UBC_CRR_INIT, UBC_CRR0);
318#else
319 ctrl_outw(0, UBC_BBRA);
320 ctrl_outw(0, UBC_BBRB);
321#endif
322 }
323 247
324 return prev; 248 return prev;
325} 249}
@@ -412,20 +336,3 @@ unsigned long get_wchan(struct task_struct *p)
412 336
413 return pc; 337 return pc;
414} 338}
415
416asmlinkage void break_point_trap(void)
417{
418 /* Clear tracing. */
419#if defined(CONFIG_CPU_SH4A)
420 ctrl_outl(UBC_CBR_INIT, UBC_CBR0);
421 ctrl_outl(UBC_CRR_INIT, UBC_CRR0);
422#else
423 ctrl_outw(0, UBC_BBRA);
424 ctrl_outw(0, UBC_BBRB);
425 ctrl_outl(0, UBC_BRCR);
426#endif
427 current->thread.ubc_pc = 0;
428 ubc_usercnt -= 1;
429
430 force_sig(SIGTRAP, current);
431}
diff --git a/arch/sh/kernel/process_64.c b/arch/sh/kernel/process_64.c
index 1192398ef582..d4ca6480e355 100644
--- a/arch/sh/kernel/process_64.c
+++ b/arch/sh/kernel/process_64.c
@@ -21,6 +21,7 @@
21#include <linux/fs.h> 21#include <linux/fs.h>
22#include <linux/ptrace.h> 22#include <linux/ptrace.h>
23#include <linux/reboot.h> 23#include <linux/reboot.h>
24#include <linux/slab.h>
24#include <linux/init.h> 25#include <linux/init.h>
25#include <linux/module.h> 26#include <linux/module.h>
26#include <linux/io.h> 27#include <linux/io.h>
@@ -32,30 +33,7 @@
32 33
33struct task_struct *last_task_used_math = NULL; 34struct task_struct *last_task_used_math = NULL;
34 35
35void machine_restart(char * __unused) 36void show_regs(struct pt_regs *regs)
36{
37 extern void phys_stext(void);
38
39 phys_stext();
40}
41
42void machine_halt(void)
43{
44 for (;;);
45}
46
47void machine_power_off(void)
48{
49 __asm__ __volatile__ (
50 "sleep\n\t"
51 "synci\n\t"
52 "nop;nop;nop;nop\n\t"
53 );
54
55 panic("Unexpected wakeup!\n");
56}
57
58void show_regs(struct pt_regs * regs)
59{ 37{
60 unsigned long long ah, al, bh, bl, ch, cl; 38 unsigned long long ah, al, bh, bl, ch, cl;
61 39
@@ -335,6 +313,7 @@ int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags)
335 return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, 313 return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0,
336 &regs, 0, NULL, NULL); 314 &regs, 0, NULL, NULL);
337} 315}
316EXPORT_SYMBOL(kernel_thread);
338 317
339/* 318/*
340 * Free current thread data structures etc.. 319 * Free current thread data structures etc..
@@ -367,7 +346,7 @@ void exit_thread(void)
367void flush_thread(void) 346void flush_thread(void)
368{ 347{
369 348
370 /* Called by fs/exec.c (flush_old_exec) to remove traces of a 349 /* Called by fs/exec.c (setup_new_exec) to remove traces of a
371 * previously running executable. */ 350 * previously running executable. */
372#ifdef CONFIG_SH_FPU 351#ifdef CONFIG_SH_FPU
373 if (last_task_used_math == current) { 352 if (last_task_used_math == current) {
@@ -403,13 +382,13 @@ int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpu)
403 if (fpvalid) { 382 if (fpvalid) {
404 if (current == last_task_used_math) { 383 if (current == last_task_used_math) {
405 enable_fpu(); 384 enable_fpu();
406 save_fpu(tsk, regs); 385 save_fpu(tsk);
407 disable_fpu(); 386 disable_fpu();
408 last_task_used_math = 0; 387 last_task_used_math = 0;
409 regs->sr |= SR_FD; 388 regs->sr |= SR_FD;
410 } 389 }
411 390
412 memcpy(fpu, &tsk->thread.fpu.hard, sizeof(*fpu)); 391 memcpy(fpu, &tsk->thread.xstate->hardfpu, sizeof(*fpu));
413 } 392 }
414 393
415 return fpvalid; 394 return fpvalid;
@@ -417,6 +396,7 @@ int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpu)
417 return 0; /* Task didn't use the fpu at all. */ 396 return 0; /* Task didn't use the fpu at all. */
418#endif 397#endif
419} 398}
399EXPORT_SYMBOL(dump_fpu);
420 400
421asmlinkage void ret_from_fork(void); 401asmlinkage void ret_from_fork(void);
422 402
@@ -429,7 +409,7 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
429#ifdef CONFIG_SH_FPU 409#ifdef CONFIG_SH_FPU
430 if(last_task_used_math == current) { 410 if(last_task_used_math == current) {
431 enable_fpu(); 411 enable_fpu();
432 save_fpu(current, regs); 412 save_fpu(current);
433 disable_fpu(); 413 disable_fpu();
434 last_task_used_math = NULL; 414 last_task_used_math = NULL;
435 regs->sr |= SR_FD; 415 regs->sr |= SR_FD;
@@ -525,13 +505,6 @@ out:
525 return error; 505 return error;
526} 506}
527 507
528/*
529 * These bracket the sleeping functions..
530 */
531extern void interruptible_sleep_on(wait_queue_head_t *q);
532
533#define mid_sched ((unsigned long) interruptible_sleep_on)
534
535#ifdef CONFIG_FRAME_POINTER 508#ifdef CONFIG_FRAME_POINTER
536static int in_sh64_switch_to(unsigned long pc) 509static int in_sh64_switch_to(unsigned long pc)
537{ 510{
diff --git a/arch/sh/kernel/ptrace_32.c b/arch/sh/kernel/ptrace_32.c
index 9be35f348093..7759a9a93211 100644
--- a/arch/sh/kernel/ptrace_32.c
+++ b/arch/sh/kernel/ptrace_32.c
@@ -2,7 +2,7 @@
2 * SuperH process tracing 2 * SuperH process tracing
3 * 3 *
4 * Copyright (C) 1999, 2000 Kaz Kojima & Niibe Yutaka 4 * Copyright (C) 1999, 2000 Kaz Kojima & Niibe Yutaka
5 * Copyright (C) 2002 - 2008 Paul Mundt 5 * Copyright (C) 2002 - 2009 Paul Mundt
6 * 6 *
7 * Audit support by Yuichi Nakamura <ynakam@hitachisoft.jp> 7 * Audit support by Yuichi Nakamura <ynakam@hitachisoft.jp>
8 * 8 *
@@ -17,7 +17,6 @@
17#include <linux/errno.h> 17#include <linux/errno.h>
18#include <linux/ptrace.h> 18#include <linux/ptrace.h>
19#include <linux/user.h> 19#include <linux/user.h>
20#include <linux/slab.h>
21#include <linux/security.h> 20#include <linux/security.h>
22#include <linux/signal.h> 21#include <linux/signal.h>
23#include <linux/io.h> 22#include <linux/io.h>
@@ -26,6 +25,7 @@
26#include <linux/tracehook.h> 25#include <linux/tracehook.h>
27#include <linux/elf.h> 26#include <linux/elf.h>
28#include <linux/regset.h> 27#include <linux/regset.h>
28#include <linux/hw_breakpoint.h>
29#include <asm/uaccess.h> 29#include <asm/uaccess.h>
30#include <asm/pgtable.h> 30#include <asm/pgtable.h>
31#include <asm/system.h> 31#include <asm/system.h>
@@ -63,33 +63,64 @@ static inline int put_stack_long(struct task_struct *task, int offset,
63 return 0; 63 return 0;
64} 64}
65 65
66void user_enable_single_step(struct task_struct *child) 66void ptrace_triggered(struct perf_event *bp, int nmi,
67 struct perf_sample_data *data, struct pt_regs *regs)
67{ 68{
68 /* Next scheduling will set up UBC */ 69 struct perf_event_attr attr;
69 if (child->thread.ubc_pc == 0) 70
70 ubc_usercnt += 1; 71 /*
72 * Disable the breakpoint request here since ptrace has defined a
73 * one-shot behaviour for breakpoint exceptions.
74 */
75 attr = bp->attr;
76 attr.disabled = true;
77 modify_user_hw_breakpoint(bp, &attr);
78}
79
80static int set_single_step(struct task_struct *tsk, unsigned long addr)
81{
82 struct thread_struct *thread = &tsk->thread;
83 struct perf_event *bp;
84 struct perf_event_attr attr;
85
86 bp = thread->ptrace_bps[0];
87 if (!bp) {
88 hw_breakpoint_init(&attr);
89
90 attr.bp_addr = addr;
91 attr.bp_len = HW_BREAKPOINT_LEN_2;
92 attr.bp_type = HW_BREAKPOINT_R;
93
94 bp = register_user_hw_breakpoint(&attr, ptrace_triggered, tsk);
95 if (IS_ERR(bp))
96 return PTR_ERR(bp);
97
98 thread->ptrace_bps[0] = bp;
99 } else {
100 int err;
101
102 attr = bp->attr;
103 attr.bp_addr = addr;
104 err = modify_user_hw_breakpoint(bp, &attr);
105 if (unlikely(err))
106 return err;
107 }
108
109 return 0;
110}
71 111
72 child->thread.ubc_pc = get_stack_long(child, 112void user_enable_single_step(struct task_struct *child)
73 offsetof(struct pt_regs, pc)); 113{
114 unsigned long pc = get_stack_long(child, offsetof(struct pt_regs, pc));
74 115
75 set_tsk_thread_flag(child, TIF_SINGLESTEP); 116 set_tsk_thread_flag(child, TIF_SINGLESTEP);
117
118 set_single_step(child, pc);
76} 119}
77 120
78void user_disable_single_step(struct task_struct *child) 121void user_disable_single_step(struct task_struct *child)
79{ 122{
80 clear_tsk_thread_flag(child, TIF_SINGLESTEP); 123 clear_tsk_thread_flag(child, TIF_SINGLESTEP);
81
82 /*
83 * Ensure the UBC is not programmed at the next context switch.
84 *
85 * Normally this is not needed but there are sequences such as
86 * singlestep, signal delivery, and continue that leave the
87 * ubc_pc non-zero leading to spurious SIGTRAPs.
88 */
89 if (child->thread.ubc_pc != 0) {
90 ubc_usercnt -= 1;
91 child->thread.ubc_pc = 0;
92 }
93} 124}
94 125
95/* 126/*
@@ -163,10 +194,10 @@ int fpregs_get(struct task_struct *target,
163 194
164 if ((boot_cpu_data.flags & CPU_HAS_FPU)) 195 if ((boot_cpu_data.flags & CPU_HAS_FPU))
165 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, 196 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
166 &target->thread.fpu.hard, 0, -1); 197 &target->thread.xstate->hardfpu, 0, -1);
167 198
168 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, 199 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
169 &target->thread.fpu.soft, 0, -1); 200 &target->thread.xstate->softfpu, 0, -1);
170} 201}
171 202
172static int fpregs_set(struct task_struct *target, 203static int fpregs_set(struct task_struct *target,
@@ -184,10 +215,10 @@ static int fpregs_set(struct task_struct *target,
184 215
185 if ((boot_cpu_data.flags & CPU_HAS_FPU)) 216 if ((boot_cpu_data.flags & CPU_HAS_FPU))
186 return user_regset_copyin(&pos, &count, &kbuf, &ubuf, 217 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
187 &target->thread.fpu.hard, 0, -1); 218 &target->thread.xstate->hardfpu, 0, -1);
188 219
189 return user_regset_copyin(&pos, &count, &kbuf, &ubuf, 220 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
190 &target->thread.fpu.soft, 0, -1); 221 &target->thread.xstate->softfpu, 0, -1);
191} 222}
192 223
193static int fpregs_active(struct task_struct *target, 224static int fpregs_active(struct task_struct *target,
@@ -333,7 +364,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
333 else 364 else
334 tmp = 0; 365 tmp = 0;
335 } else 366 } else
336 tmp = ((long *)&child->thread.fpu) 367 tmp = ((long *)child->thread.xstate)
337 [(addr - (long)&dummy->fpu) >> 2]; 368 [(addr - (long)&dummy->fpu) >> 2];
338 } else if (addr == (long) &dummy->u_fpvalid) 369 } else if (addr == (long) &dummy->u_fpvalid)
339 tmp = !!tsk_used_math(child); 370 tmp = !!tsk_used_math(child);
@@ -362,7 +393,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
362 else if (addr >= (long) &dummy->fpu && 393 else if (addr >= (long) &dummy->fpu &&
363 addr < (long) &dummy->u_fpvalid) { 394 addr < (long) &dummy->u_fpvalid) {
364 set_stopped_child_used_math(child); 395 set_stopped_child_used_math(child);
365 ((long *)&child->thread.fpu) 396 ((long *)child->thread.xstate)
366 [(addr - (long)&dummy->fpu) >> 2] = data; 397 [(addr - (long)&dummy->fpu) >> 2] = data;
367 ret = 0; 398 ret = 0;
368 } else if (addr == (long) &dummy->u_fpvalid) { 399 } else if (addr == (long) &dummy->u_fpvalid) {
diff --git a/arch/sh/kernel/ptrace_64.c b/arch/sh/kernel/ptrace_64.c
index 952da83903da..5fd644da7f02 100644
--- a/arch/sh/kernel/ptrace_64.c
+++ b/arch/sh/kernel/ptrace_64.c
@@ -82,13 +82,13 @@ get_fpu_long(struct task_struct *task, unsigned long addr)
82 82
83 if (last_task_used_math == task) { 83 if (last_task_used_math == task) {
84 enable_fpu(); 84 enable_fpu();
85 save_fpu(task, regs); 85 save_fpu(task);
86 disable_fpu(); 86 disable_fpu();
87 last_task_used_math = 0; 87 last_task_used_math = 0;
88 regs->sr |= SR_FD; 88 regs->sr |= SR_FD;
89 } 89 }
90 90
91 tmp = ((long *)&task->thread.fpu)[addr / sizeof(unsigned long)]; 91 tmp = ((long *)task->thread.xstate)[addr / sizeof(unsigned long)];
92 return tmp; 92 return tmp;
93} 93}
94 94
@@ -114,17 +114,16 @@ put_fpu_long(struct task_struct *task, unsigned long addr, unsigned long data)
114 regs = (struct pt_regs*)((unsigned char *)task + THREAD_SIZE) - 1; 114 regs = (struct pt_regs*)((unsigned char *)task + THREAD_SIZE) - 1;
115 115
116 if (!tsk_used_math(task)) { 116 if (!tsk_used_math(task)) {
117 fpinit(&task->thread.fpu.hard); 117 init_fpu(task);
118 set_stopped_child_used_math(task);
119 } else if (last_task_used_math == task) { 118 } else if (last_task_used_math == task) {
120 enable_fpu(); 119 enable_fpu();
121 save_fpu(task, regs); 120 save_fpu(task);
122 disable_fpu(); 121 disable_fpu();
123 last_task_used_math = 0; 122 last_task_used_math = 0;
124 regs->sr |= SR_FD; 123 regs->sr |= SR_FD;
125 } 124 }
126 125
127 ((long *)&task->thread.fpu)[addr / sizeof(unsigned long)] = data; 126 ((long *)task->thread.xstate)[addr / sizeof(unsigned long)] = data;
128 return 0; 127 return 0;
129} 128}
130 129
@@ -133,6 +132,8 @@ void user_enable_single_step(struct task_struct *child)
133 struct pt_regs *regs = child->thread.uregs; 132 struct pt_regs *regs = child->thread.uregs;
134 133
135 regs->sr |= SR_SSTEP; /* auto-resetting upon exception */ 134 regs->sr |= SR_SSTEP; /* auto-resetting upon exception */
135
136 set_tsk_thread_flag(child, TIF_SINGLESTEP);
136} 137}
137 138
138void user_disable_single_step(struct task_struct *child) 139void user_disable_single_step(struct task_struct *child)
@@ -140,6 +141,8 @@ void user_disable_single_step(struct task_struct *child)
140 struct pt_regs *regs = child->thread.uregs; 141 struct pt_regs *regs = child->thread.uregs;
141 142
142 regs->sr &= ~SR_SSTEP; 143 regs->sr &= ~SR_SSTEP;
144
145 clear_tsk_thread_flag(child, TIF_SINGLESTEP);
143} 146}
144 147
145static int genregs_get(struct task_struct *target, 148static int genregs_get(struct task_struct *target,
@@ -222,7 +225,7 @@ int fpregs_get(struct task_struct *target,
222 return ret; 225 return ret;
223 226
224 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, 227 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
225 &target->thread.fpu.hard, 0, -1); 228 &target->thread.xstate->hardfpu, 0, -1);
226} 229}
227 230
228static int fpregs_set(struct task_struct *target, 231static int fpregs_set(struct task_struct *target,
@@ -239,7 +242,7 @@ static int fpregs_set(struct task_struct *target,
239 set_stopped_child_used_math(target); 242 set_stopped_child_used_math(target);
240 243
241 return user_regset_copyin(&pos, &count, &kbuf, &ubuf, 244 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
242 &target->thread.fpu.hard, 0, -1); 245 &target->thread.xstate->hardfpu, 0, -1);
243} 246}
244 247
245static int fpregs_active(struct task_struct *target, 248static int fpregs_active(struct task_struct *target,
@@ -454,6 +457,8 @@ asmlinkage long long do_syscall_trace_enter(struct pt_regs *regs)
454 457
455asmlinkage void do_syscall_trace_leave(struct pt_regs *regs) 458asmlinkage void do_syscall_trace_leave(struct pt_regs *regs)
456{ 459{
460 int step;
461
457 if (unlikely(current->audit_context)) 462 if (unlikely(current->audit_context))
458 audit_syscall_exit(AUDITSC_RESULT(regs->regs[9]), 463 audit_syscall_exit(AUDITSC_RESULT(regs->regs[9]),
459 regs->regs[9]); 464 regs->regs[9]);
@@ -461,8 +466,9 @@ asmlinkage void do_syscall_trace_leave(struct pt_regs *regs)
461 if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT))) 466 if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
462 trace_sys_exit(regs, regs->regs[9]); 467 trace_sys_exit(regs, regs->regs[9]);
463 468
464 if (test_thread_flag(TIF_SYSCALL_TRACE)) 469 step = test_thread_flag(TIF_SINGLESTEP);
465 tracehook_report_syscall_exit(regs, 0); 470 if (step || test_thread_flag(TIF_SYSCALL_TRACE))
471 tracehook_report_syscall_exit(regs, step);
466} 472}
467 473
468/* Called with interrupts disabled */ 474/* Called with interrupts disabled */
@@ -479,9 +485,10 @@ asmlinkage void do_single_step(unsigned long long vec, struct pt_regs *regs)
479} 485}
480 486
481/* Called with interrupts disabled */ 487/* Called with interrupts disabled */
482asmlinkage void do_software_break_point(unsigned long long vec, 488BUILD_TRAP_HANDLER(breakpoint)
483 struct pt_regs *regs)
484{ 489{
490 TRAP_HANDLER_DECL;
491
485 /* We need to forward step the PC, to counteract the backstep done 492 /* We need to forward step the PC, to counteract the backstep done
486 in signal.c. */ 493 in signal.c. */
487 local_irq_enable(); 494 local_irq_enable();
diff --git a/arch/sh/kernel/reboot.c b/arch/sh/kernel/reboot.c
new file mode 100644
index 000000000000..b1fca66bb92e
--- /dev/null
+++ b/arch/sh/kernel/reboot.c
@@ -0,0 +1,98 @@
1#include <linux/pm.h>
2#include <linux/kexec.h>
3#include <linux/kernel.h>
4#include <linux/reboot.h>
5#include <linux/module.h>
6#ifdef CONFIG_SUPERH32
7#include <asm/watchdog.h>
8#endif
9#include <asm/addrspace.h>
10#include <asm/reboot.h>
11#include <asm/system.h>
12
13void (*pm_power_off)(void);
14EXPORT_SYMBOL(pm_power_off);
15
16#ifdef CONFIG_SUPERH32
17static void watchdog_trigger_immediate(void)
18{
19 sh_wdt_write_cnt(0xFF);
20 sh_wdt_write_csr(0xC2);
21}
22#endif
23
24static void native_machine_restart(char * __unused)
25{
26 local_irq_disable();
27
28 /* Address error with SR.BL=1 first. */
29 trigger_address_error();
30
31#ifdef CONFIG_SUPERH32
32 /* If that fails or is unsupported, go for the watchdog next. */
33 watchdog_trigger_immediate();
34#endif
35
36 /*
37 * Give up and sleep.
38 */
39 while (1)
40 cpu_sleep();
41}
42
43static void native_machine_shutdown(void)
44{
45 smp_send_stop();
46}
47
48static void native_machine_power_off(void)
49{
50 if (pm_power_off)
51 pm_power_off();
52}
53
54static void native_machine_halt(void)
55{
56 /* stop other cpus */
57 machine_shutdown();
58
59 /* stop this cpu */
60 stop_this_cpu(NULL);
61}
62
63struct machine_ops machine_ops = {
64 .power_off = native_machine_power_off,
65 .shutdown = native_machine_shutdown,
66 .restart = native_machine_restart,
67 .halt = native_machine_halt,
68#ifdef CONFIG_KEXEC
69 .crash_shutdown = native_machine_crash_shutdown,
70#endif
71};
72
73void machine_power_off(void)
74{
75 machine_ops.power_off();
76}
77
78void machine_shutdown(void)
79{
80 machine_ops.shutdown();
81}
82
83void machine_restart(char *cmd)
84{
85 machine_ops.restart(cmd);
86}
87
88void machine_halt(void)
89{
90 machine_ops.halt();
91}
92
93#ifdef CONFIG_KEXEC
94void machine_crash_shutdown(struct pt_regs *regs)
95{
96 machine_ops.crash_shutdown(regs);
97}
98#endif
diff --git a/arch/sh/kernel/return_address.c b/arch/sh/kernel/return_address.c
new file mode 100644
index 000000000000..cbf1dd5372b2
--- /dev/null
+++ b/arch/sh/kernel/return_address.c
@@ -0,0 +1,57 @@
1/*
2 * arch/sh/kernel/return_address.c
3 *
4 * Copyright (C) 2009 Matt Fleming
5 * Copyright (C) 2009 Paul Mundt
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11#include <linux/kernel.h>
12#include <linux/module.h>
13#include <asm/dwarf.h>
14
15#ifdef CONFIG_DWARF_UNWINDER
16
17void *return_address(unsigned int depth)
18{
19 struct dwarf_frame *frame;
20 unsigned long ra;
21 int i;
22
23 for (i = 0, frame = NULL, ra = 0; i <= depth; i++) {
24 struct dwarf_frame *tmp;
25
26 tmp = dwarf_unwind_stack(ra, frame);
27
28 if (frame)
29 dwarf_free_frame(frame);
30
31 frame = tmp;
32
33 if (!frame || !frame->return_addr)
34 break;
35
36 ra = frame->return_addr;
37 }
38
39 /* Failed to unwind the stack to the specified depth. */
40 WARN_ON(i != depth + 1);
41
42 if (frame)
43 dwarf_free_frame(frame);
44
45 return (void *)ra;
46}
47
48#else
49
50void *return_address(unsigned int depth)
51{
52 return NULL;
53}
54
55#endif
56
57EXPORT_SYMBOL_GPL(return_address);
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index 99b4fb553bf1..8870d6ba64bf 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -421,8 +421,13 @@ void __init setup_arch(char **cmdline_p)
421 421
422 parse_early_param(); 422 parse_early_param();
423 423
424 uncached_init();
425
424 plat_early_device_setup(); 426 plat_early_device_setup();
425 427
428 /* Let earlyprintk output early console messages */
429 early_platform_driver_probe("earlyprintk", 1, 1);
430
426 sh_mv_setup(); 431 sh_mv_setup();
427 432
428 /* 433 /*
@@ -438,7 +443,7 @@ void __init setup_arch(char **cmdline_p)
438 443
439 nodes_clear(node_online_map); 444 nodes_clear(node_online_map);
440 445
441 /* Setup bootmem with available RAM */ 446 pmb_init();
442 lmb_init(); 447 lmb_init();
443 setup_memory(); 448 setup_memory();
444 sparse_init(); 449 sparse_init();
@@ -446,13 +451,14 @@ void __init setup_arch(char **cmdline_p)
446#ifdef CONFIG_DUMMY_CONSOLE 451#ifdef CONFIG_DUMMY_CONSOLE
447 conswitchp = &dummy_con; 452 conswitchp = &dummy_con;
448#endif 453#endif
454 paging_init();
455
456 ioremap_fixed_init();
449 457
450 /* Perform the machine specific initialisation */ 458 /* Perform the machine specific initialisation */
451 if (likely(sh_mv.mv_setup)) 459 if (likely(sh_mv.mv_setup))
452 sh_mv.mv_setup(cmdline_p); 460 sh_mv.mv_setup(cmdline_p);
453 461
454 paging_init();
455
456#ifdef CONFIG_SMP 462#ifdef CONFIG_SMP
457 plat_smp_setup(); 463 plat_smp_setup();
458#endif 464#endif
diff --git a/arch/sh/kernel/sh_bios.c b/arch/sh/kernel/sh_bios.c
index c852f7805728..47475cca068a 100644
--- a/arch/sh/kernel/sh_bios.c
+++ b/arch/sh/kernel/sh_bios.c
@@ -1,19 +1,30 @@
1/* 1/*
2 * linux/arch/sh/kernel/sh_bios.c
3 * C interface for trapping into the standard LinuxSH BIOS. 2 * C interface for trapping into the standard LinuxSH BIOS.
4 * 3 *
5 * Copyright (C) 2000 Greg Banks, Mitch Davis 4 * Copyright (C) 2000 Greg Banks, Mitch Davis
5 * Copyright (C) 1999, 2000 Niibe Yutaka
6 * Copyright (C) 2002 M. R. Brown
7 * Copyright (C) 2004 - 2010 Paul Mundt
6 * 8 *
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file "COPYING" in the main directory of this archive
11 * for more details.
7 */ 12 */
8#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/console.h>
15#include <linux/tty.h>
16#include <linux/init.h>
17#include <linux/io.h>
18#include <linux/delay.h>
9#include <asm/sh_bios.h> 19#include <asm/sh_bios.h>
10 20
11#define BIOS_CALL_CONSOLE_WRITE 0 21#define BIOS_CALL_CONSOLE_WRITE 0
12#define BIOS_CALL_ETH_NODE_ADDR 10 22#define BIOS_CALL_ETH_NODE_ADDR 10
13#define BIOS_CALL_SHUTDOWN 11 23#define BIOS_CALL_SHUTDOWN 11
14#define BIOS_CALL_CHAR_OUT 0x1f /* TODO: hack */
15#define BIOS_CALL_GDB_DETACH 0xff 24#define BIOS_CALL_GDB_DETACH 0xff
16 25
26void *gdb_vbr_vector = NULL;
27
17static inline long sh_bios_call(long func, long arg0, long arg1, long arg2, 28static inline long sh_bios_call(long func, long arg0, long arg1, long arg2,
18 long arg3) 29 long arg3)
19{ 30{
@@ -23,6 +34,9 @@ static inline long sh_bios_call(long func, long arg0, long arg1, long arg2,
23 register long r6 __asm__("r6") = arg2; 34 register long r6 __asm__("r6") = arg2;
24 register long r7 __asm__("r7") = arg3; 35 register long r7 __asm__("r7") = arg3;
25 36
37 if (!gdb_vbr_vector)
38 return -ENOSYS;
39
26 __asm__ __volatile__("trapa #0x3f":"=z"(r0) 40 __asm__ __volatile__("trapa #0x3f":"=z"(r0)
27 :"0"(r0), "r"(r4), "r"(r5), "r"(r6), "r"(r7) 41 :"0"(r0), "r"(r4), "r"(r5), "r"(r6), "r"(r7)
28 :"memory"); 42 :"memory");
@@ -34,11 +48,6 @@ void sh_bios_console_write(const char *buf, unsigned int len)
34 sh_bios_call(BIOS_CALL_CONSOLE_WRITE, (long)buf, (long)len, 0, 0); 48 sh_bios_call(BIOS_CALL_CONSOLE_WRITE, (long)buf, (long)len, 0, 0);
35} 49}
36 50
37void sh_bios_char_out(char ch)
38{
39 sh_bios_call(BIOS_CALL_CHAR_OUT, ch, 0, 0, 0);
40}
41
42void sh_bios_gdb_detach(void) 51void sh_bios_gdb_detach(void)
43{ 52{
44 sh_bios_call(BIOS_CALL_GDB_DETACH, 0, 0, 0, 0); 53 sh_bios_call(BIOS_CALL_GDB_DETACH, 0, 0, 0, 0);
@@ -55,3 +64,109 @@ void sh_bios_shutdown(unsigned int how)
55{ 64{
56 sh_bios_call(BIOS_CALL_SHUTDOWN, how, 0, 0, 0); 65 sh_bios_call(BIOS_CALL_SHUTDOWN, how, 0, 0, 0);
57} 66}
67
68/*
69 * Read the old value of the VBR register to initialise the vector
70 * through which debug and BIOS traps are delegated by the Linux trap
71 * handler.
72 */
73void sh_bios_vbr_init(void)
74{
75 unsigned long vbr;
76
77 if (unlikely(gdb_vbr_vector))
78 return;
79
80 __asm__ __volatile__ ("stc vbr, %0" : "=r" (vbr));
81
82 if (vbr) {
83 gdb_vbr_vector = (void *)(vbr + 0x100);
84 printk(KERN_NOTICE "Setting GDB trap vector to %p\n",
85 gdb_vbr_vector);
86 } else
87 printk(KERN_NOTICE "SH-BIOS not detected\n");
88}
89
90/**
91 * sh_bios_vbr_reload - Re-load the system VBR from the BIOS vector.
92 *
93 * This can be used by save/restore code to reinitialize the system VBR
94 * from the fixed BIOS VBR. A no-op if no BIOS VBR is known.
95 */
96void sh_bios_vbr_reload(void)
97{
98 if (gdb_vbr_vector)
99 __asm__ __volatile__ (
100 "ldc %0, vbr"
101 :
102 : "r" (((unsigned long) gdb_vbr_vector) - 0x100)
103 : "memory"
104 );
105}
106
107/*
108 * Print a string through the BIOS
109 */
110static void sh_console_write(struct console *co, const char *s,
111 unsigned count)
112{
113 sh_bios_console_write(s, count);
114}
115
116/*
117 * Setup initial baud/bits/parity. We do two things here:
118 * - construct a cflag setting for the first rs_open()
119 * - initialize the serial port
120 * Return non-zero if we didn't find a serial port.
121 */
122static int __init sh_console_setup(struct console *co, char *options)
123{
124 int cflag = CREAD | HUPCL | CLOCAL;
125
126 /*
127 * Now construct a cflag setting.
128 * TODO: this is a totally bogus cflag, as we have
129 * no idea what serial settings the BIOS is using, or
130 * even if its using the serial port at all.
131 */
132 cflag |= B115200 | CS8 | /*no parity*/0;
133
134 co->cflag = cflag;
135
136 return 0;
137}
138
139static struct console bios_console = {
140 .name = "bios",
141 .write = sh_console_write,
142 .setup = sh_console_setup,
143 .flags = CON_PRINTBUFFER,
144 .index = -1,
145};
146
147static struct console *early_console;
148
149static int __init setup_early_printk(char *buf)
150{
151 int keep_early = 0;
152
153 if (!buf)
154 return 0;
155
156 if (strstr(buf, "keep"))
157 keep_early = 1;
158
159 if (!strncmp(buf, "bios", 4))
160 early_console = &bios_console;
161
162 if (likely(early_console)) {
163 if (keep_early)
164 early_console->flags &= ~CON_BOOT;
165 else
166 early_console->flags |= CON_BOOT;
167 register_console(early_console);
168 }
169
170 return 0;
171}
172early_param("earlyprintk", setup_early_printk);
diff --git a/arch/sh/kernel/sh_ksyms_32.c b/arch/sh/kernel/sh_ksyms_32.c
index 444cce3ae921..3896f26efa4a 100644
--- a/arch/sh/kernel/sh_ksyms_32.c
+++ b/arch/sh/kernel/sh_ksyms_32.c
@@ -1,37 +1,11 @@
1#include <linux/module.h> 1#include <linux/module.h>
2#include <linux/smp.h> 2#include <linux/string.h>
3#include <linux/user.h> 3#include <linux/uaccess.h>
4#include <linux/elfcore.h> 4#include <linux/delay.h>
5#include <linux/sched.h> 5#include <linux/mm.h>
6#include <linux/in6.h>
7#include <linux/interrupt.h>
8#include <linux/vmalloc.h>
9#include <linux/pci.h>
10#include <linux/irq.h>
11#include <asm/sections.h>
12#include <asm/processor.h>
13#include <asm/uaccess.h>
14#include <asm/checksum.h> 6#include <asm/checksum.h>
15#include <asm/io.h> 7#include <asm/sections.h>
16#include <asm/delay.h>
17#include <asm/tlbflush.h>
18#include <asm/cacheflush.h>
19#include <asm/ftrace.h>
20
21extern int dump_fpu(struct pt_regs *, elf_fpregset_t *);
22
23/* platform dependent support */
24EXPORT_SYMBOL(dump_fpu);
25EXPORT_SYMBOL(kernel_thread);
26EXPORT_SYMBOL(strlen);
27
28/* PCI exports */
29#ifdef CONFIG_PCI
30EXPORT_SYMBOL(pci_alloc_consistent);
31EXPORT_SYMBOL(pci_free_consistent);
32#endif
33 8
34/* mem exports */
35EXPORT_SYMBOL(memchr); 9EXPORT_SYMBOL(memchr);
36EXPORT_SYMBOL(memcpy); 10EXPORT_SYMBOL(memcpy);
37EXPORT_SYMBOL(memset); 11EXPORT_SYMBOL(memset);
@@ -40,6 +14,13 @@ EXPORT_SYMBOL(__copy_user);
40EXPORT_SYMBOL(__udelay); 14EXPORT_SYMBOL(__udelay);
41EXPORT_SYMBOL(__ndelay); 15EXPORT_SYMBOL(__ndelay);
42EXPORT_SYMBOL(__const_udelay); 16EXPORT_SYMBOL(__const_udelay);
17EXPORT_SYMBOL(strlen);
18EXPORT_SYMBOL(csum_partial);
19EXPORT_SYMBOL(csum_partial_copy_generic);
20EXPORT_SYMBOL(copy_page);
21EXPORT_SYMBOL(__clear_user);
22EXPORT_SYMBOL(_ebss);
23EXPORT_SYMBOL(empty_zero_page);
43 24
44#define DECLARE_EXPORT(name) \ 25#define DECLARE_EXPORT(name) \
45 extern void name(void);EXPORT_SYMBOL(name) 26 extern void name(void);EXPORT_SYMBOL(name)
@@ -107,30 +88,6 @@ DECLARE_EXPORT(__sdivsi3_i4);
107DECLARE_EXPORT(__udivsi3_i4); 88DECLARE_EXPORT(__udivsi3_i4);
108DECLARE_EXPORT(__sdivsi3_i4i); 89DECLARE_EXPORT(__sdivsi3_i4i);
109DECLARE_EXPORT(__udivsi3_i4i); 90DECLARE_EXPORT(__udivsi3_i4i);
110
111#if !defined(CONFIG_CACHE_OFF) && (defined(CONFIG_CPU_SH4) || \
112 defined(CONFIG_SH7705_CACHE_32KB))
113/* needed by some modules */
114EXPORT_SYMBOL(flush_cache_all);
115EXPORT_SYMBOL(flush_cache_range);
116EXPORT_SYMBOL(flush_dcache_page);
117#endif
118
119#ifdef CONFIG_MCOUNT 91#ifdef CONFIG_MCOUNT
120DECLARE_EXPORT(mcount); 92DECLARE_EXPORT(mcount);
121#endif 93#endif
122EXPORT_SYMBOL(csum_partial);
123EXPORT_SYMBOL(csum_partial_copy_generic);
124#ifdef CONFIG_IPV6
125EXPORT_SYMBOL(csum_ipv6_magic);
126#endif
127EXPORT_SYMBOL(copy_page);
128EXPORT_SYMBOL(__clear_user);
129EXPORT_SYMBOL(_ebss);
130EXPORT_SYMBOL(empty_zero_page);
131
132#ifndef CONFIG_CACHE_OFF
133EXPORT_SYMBOL(__flush_purge_region);
134EXPORT_SYMBOL(__flush_wback_region);
135EXPORT_SYMBOL(__flush_invalidate_region);
136#endif
diff --git a/arch/sh/kernel/sh_ksyms_64.c b/arch/sh/kernel/sh_ksyms_64.c
index d008e17eb257..45afa5c51f67 100644
--- a/arch/sh/kernel/sh_ksyms_64.c
+++ b/arch/sh/kernel/sh_ksyms_64.c
@@ -24,16 +24,6 @@
24#include <asm/delay.h> 24#include <asm/delay.h>
25#include <asm/irq.h> 25#include <asm/irq.h>
26 26
27extern int dump_fpu(struct pt_regs *, elf_fpregset_t *);
28
29/* platform dependent support */
30EXPORT_SYMBOL(dump_fpu);
31EXPORT_SYMBOL(kernel_thread);
32
33#ifdef CONFIG_VT
34EXPORT_SYMBOL(screen_info);
35#endif
36
37EXPORT_SYMBOL(__put_user_asm_b); 27EXPORT_SYMBOL(__put_user_asm_b);
38EXPORT_SYMBOL(__put_user_asm_w); 28EXPORT_SYMBOL(__put_user_asm_w);
39EXPORT_SYMBOL(__put_user_asm_l); 29EXPORT_SYMBOL(__put_user_asm_l);
diff --git a/arch/sh/kernel/signal_32.c b/arch/sh/kernel/signal_32.c
index 3db37425210d..579cd2ca358d 100644
--- a/arch/sh/kernel/signal_32.c
+++ b/arch/sh/kernel/signal_32.c
@@ -67,7 +67,8 @@ sys_sigsuspend(old_sigset_t mask,
67 67
68 current->state = TASK_INTERRUPTIBLE; 68 current->state = TASK_INTERRUPTIBLE;
69 schedule(); 69 schedule();
70 set_thread_flag(TIF_RESTORE_SIGMASK); 70 set_restore_sigmask();
71
71 return -ERESTARTNOHAND; 72 return -ERESTARTNOHAND;
72} 73}
73 74
@@ -149,7 +150,7 @@ static inline int restore_sigcontext_fpu(struct sigcontext __user *sc)
149 return 0; 150 return 0;
150 151
151 set_used_math(); 152 set_used_math();
152 return __copy_from_user(&tsk->thread.fpu.hard, &sc->sc_fpregs[0], 153 return __copy_from_user(&tsk->thread.xstate->hardfpu, &sc->sc_fpregs[0],
153 sizeof(long)*(16*2+2)); 154 sizeof(long)*(16*2+2));
154} 155}
155 156
@@ -174,7 +175,7 @@ static inline int save_sigcontext_fpu(struct sigcontext __user *sc,
174 clear_used_math(); 175 clear_used_math();
175 176
176 unlazy_fpu(tsk, regs); 177 unlazy_fpu(tsk, regs);
177 return __copy_to_user(&sc->sc_fpregs[0], &tsk->thread.fpu.hard, 178 return __copy_to_user(&sc->sc_fpregs[0], &tsk->thread.xstate->hardfpu,
178 sizeof(long)*(16*2+2)); 179 sizeof(long)*(16*2+2));
179} 180}
180#endif /* CONFIG_SH_FPU */ 181#endif /* CONFIG_SH_FPU */
@@ -527,7 +528,7 @@ handle_syscall_restart(unsigned long save_r0, struct pt_regs *regs,
527 /* fallthrough */ 528 /* fallthrough */
528 case -ERESTARTNOINTR: 529 case -ERESTARTNOINTR:
529 regs->regs[0] = save_r0; 530 regs->regs[0] = save_r0;
530 regs->pc -= instruction_size(ctrl_inw(regs->pc - 4)); 531 regs->pc -= instruction_size(__raw_readw(regs->pc - 4));
531 break; 532 break;
532 } 533 }
533} 534}
@@ -590,7 +591,7 @@ static void do_signal(struct pt_regs *regs, unsigned int save_r0)
590 if (try_to_freeze()) 591 if (try_to_freeze())
591 goto no_signal; 592 goto no_signal;
592 593
593 if (test_thread_flag(TIF_RESTORE_SIGMASK)) 594 if (current_thread_info()->status & TS_RESTORE_SIGMASK)
594 oldset = &current->saved_sigmask; 595 oldset = &current->saved_sigmask;
595 else 596 else
596 oldset = &current->blocked; 597 oldset = &current->blocked;
@@ -602,12 +603,13 @@ static void do_signal(struct pt_regs *regs, unsigned int save_r0)
602 /* Whee! Actually deliver the signal. */ 603 /* Whee! Actually deliver the signal. */
603 if (handle_signal(signr, &ka, &info, oldset, 604 if (handle_signal(signr, &ka, &info, oldset,
604 regs, save_r0) == 0) { 605 regs, save_r0) == 0) {
605 /* a signal was successfully delivered; the saved 606 /*
607 * A signal was successfully delivered; the saved
606 * sigmask will have been stored in the signal frame, 608 * sigmask will have been stored in the signal frame,
607 * and will be restored by sigreturn, so we can simply 609 * and will be restored by sigreturn, so we can simply
608 * clear the TIF_RESTORE_SIGMASK flag */ 610 * clear the TS_RESTORE_SIGMASK flag
609 if (test_thread_flag(TIF_RESTORE_SIGMASK)) 611 */
610 clear_thread_flag(TIF_RESTORE_SIGMASK); 612 current_thread_info()->status &= ~TS_RESTORE_SIGMASK;
611 613
612 tracehook_signal_handler(signr, &info, &ka, regs, 614 tracehook_signal_handler(signr, &info, &ka, regs,
613 test_thread_flag(TIF_SINGLESTEP)); 615 test_thread_flag(TIF_SINGLESTEP));
@@ -624,17 +626,19 @@ no_signal:
624 regs->regs[0] == -ERESTARTSYS || 626 regs->regs[0] == -ERESTARTSYS ||
625 regs->regs[0] == -ERESTARTNOINTR) { 627 regs->regs[0] == -ERESTARTNOINTR) {
626 regs->regs[0] = save_r0; 628 regs->regs[0] = save_r0;
627 regs->pc -= instruction_size(ctrl_inw(regs->pc - 4)); 629 regs->pc -= instruction_size(__raw_readw(regs->pc - 4));
628 } else if (regs->regs[0] == -ERESTART_RESTARTBLOCK) { 630 } else if (regs->regs[0] == -ERESTART_RESTARTBLOCK) {
629 regs->pc -= instruction_size(ctrl_inw(regs->pc - 4)); 631 regs->pc -= instruction_size(__raw_readw(regs->pc - 4));
630 regs->regs[3] = __NR_restart_syscall; 632 regs->regs[3] = __NR_restart_syscall;
631 } 633 }
632 } 634 }
633 635
634 /* if there's no signal to deliver, we just put the saved sigmask 636 /*
635 * back */ 637 * If there's no signal to deliver, we just put the saved sigmask
636 if (test_thread_flag(TIF_RESTORE_SIGMASK)) { 638 * back.
637 clear_thread_flag(TIF_RESTORE_SIGMASK); 639 */
640 if (current_thread_info()->status & TS_RESTORE_SIGMASK) {
641 current_thread_info()->status &= ~TS_RESTORE_SIGMASK;
638 sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL); 642 sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL);
639 } 643 }
640} 644}
diff --git a/arch/sh/kernel/signal_64.c b/arch/sh/kernel/signal_64.c
index 74793c80a57a..5a9f1f10ebf4 100644
--- a/arch/sh/kernel/signal_64.c
+++ b/arch/sh/kernel/signal_64.c
@@ -101,7 +101,7 @@ static int do_signal(struct pt_regs *regs, sigset_t *oldset)
101 if (try_to_freeze()) 101 if (try_to_freeze())
102 goto no_signal; 102 goto no_signal;
103 103
104 if (test_thread_flag(TIF_RESTORE_SIGMASK)) 104 if (current_thread_info()->status & TS_RESTORE_SIGMASK)
105 oldset = &current->saved_sigmask; 105 oldset = &current->saved_sigmask;
106 else if (!oldset) 106 else if (!oldset)
107 oldset = &current->blocked; 107 oldset = &current->blocked;
@@ -115,12 +115,12 @@ static int do_signal(struct pt_regs *regs, sigset_t *oldset)
115 /* 115 /*
116 * If a signal was successfully delivered, the 116 * If a signal was successfully delivered, the
117 * saved sigmask is in its frame, and we can 117 * saved sigmask is in its frame, and we can
118 * clear the TIF_RESTORE_SIGMASK flag. 118 * clear the TS_RESTORE_SIGMASK flag.
119 */ 119 */
120 if (test_thread_flag(TIF_RESTORE_SIGMASK)) 120 current_thread_info()->status &= ~TS_RESTORE_SIGMASK;
121 clear_thread_flag(TIF_RESTORE_SIGMASK);
122 121
123 tracehook_signal_handler(signr, &info, &ka, regs, 0); 122 tracehook_signal_handler(signr, &info, &ka, regs,
123 test_thread_flag(TIF_SINGLESTEP));
124 return 1; 124 return 1;
125 } 125 }
126 } 126 }
@@ -146,8 +146,8 @@ no_signal:
146 } 146 }
147 147
148 /* No signal to deliver -- put the saved sigmask back */ 148 /* No signal to deliver -- put the saved sigmask back */
149 if (test_thread_flag(TIF_RESTORE_SIGMASK)) { 149 if (current_thread_info()->status & TS_RESTORE_SIGMASK) {
150 clear_thread_flag(TIF_RESTORE_SIGMASK); 150 current_thread_info()->status &= ~TS_RESTORE_SIGMASK;
151 sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL); 151 sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL);
152 } 152 }
153 153
@@ -176,6 +176,7 @@ sys_sigsuspend(old_sigset_t mask,
176 while (1) { 176 while (1) {
177 current->state = TASK_INTERRUPTIBLE; 177 current->state = TASK_INTERRUPTIBLE;
178 schedule(); 178 schedule();
179 set_restore_sigmask();
179 regs->pc += 4; /* because sys_sigreturn decrements the pc */ 180 regs->pc += 4; /* because sys_sigreturn decrements the pc */
180 if (do_signal(regs, &saveset)) { 181 if (do_signal(regs, &saveset)) {
181 /* pc now points at signal handler. Need to decrement 182 /* pc now points at signal handler. Need to decrement
@@ -296,7 +297,7 @@ restore_sigcontext_fpu(struct pt_regs *regs, struct sigcontext __user *sc)
296 regs->sr |= SR_FD; 297 regs->sr |= SR_FD;
297 } 298 }
298 299
299 err |= __copy_from_user(&current->thread.fpu.hard, &sc->sc_fpregs[0], 300 err |= __copy_from_user(&current->thread.xstate->hardfpu, &sc->sc_fpregs[0],
300 (sizeof(long long) * 32) + (sizeof(int) * 1)); 301 (sizeof(long long) * 32) + (sizeof(int) * 1));
301 302
302 return err; 303 return err;
@@ -315,13 +316,13 @@ setup_sigcontext_fpu(struct pt_regs *regs, struct sigcontext __user *sc)
315 316
316 if (current == last_task_used_math) { 317 if (current == last_task_used_math) {
317 enable_fpu(); 318 enable_fpu();
318 save_fpu(current, regs); 319 save_fpu(current);
319 disable_fpu(); 320 disable_fpu();
320 last_task_used_math = NULL; 321 last_task_used_math = NULL;
321 regs->sr |= SR_FD; 322 regs->sr |= SR_FD;
322 } 323 }
323 324
324 err |= __copy_to_user(&sc->sc_fpregs[0], &current->thread.fpu.hard, 325 err |= __copy_to_user(&sc->sc_fpregs[0], &current->thread.xstate->hardfpu,
325 (sizeof(long long) * 32) + (sizeof(int) * 1)); 326 (sizeof(long long) * 32) + (sizeof(int) * 1));
326 clear_used_math(); 327 clear_used_math();
327 328
diff --git a/arch/sh/kernel/smp.c b/arch/sh/kernel/smp.c
index 160db1003cfb..002cc612deef 100644
--- a/arch/sh/kernel/smp.c
+++ b/arch/sh/kernel/smp.c
@@ -69,6 +69,7 @@ asmlinkage void __cpuinit start_secondary(void)
69 unsigned int cpu; 69 unsigned int cpu;
70 struct mm_struct *mm = &init_mm; 70 struct mm_struct *mm = &init_mm;
71 71
72 enable_mmu();
72 atomic_inc(&mm->mm_count); 73 atomic_inc(&mm->mm_count);
73 atomic_inc(&mm->mm_users); 74 atomic_inc(&mm->mm_users);
74 current->active_mm = mm; 75 current->active_mm = mm;
@@ -122,7 +123,9 @@ int __cpuinit __cpu_up(unsigned int cpu)
122 stack_start.bss_start = 0; /* don't clear bss for secondary cpus */ 123 stack_start.bss_start = 0; /* don't clear bss for secondary cpus */
123 stack_start.start_kernel_fn = start_secondary; 124 stack_start.start_kernel_fn = start_secondary;
124 125
125 flush_cache_all(); 126 flush_icache_range((unsigned long)&stack_start,
127 (unsigned long)&stack_start + sizeof(stack_start));
128 wmb();
126 129
127 plat_start_cpu(cpu, (unsigned long)_stext); 130 plat_start_cpu(cpu, (unsigned long)_stext);
128 131
@@ -159,15 +162,6 @@ void smp_send_reschedule(int cpu)
159 plat_send_ipi(cpu, SMP_MSG_RESCHEDULE); 162 plat_send_ipi(cpu, SMP_MSG_RESCHEDULE);
160} 163}
161 164
162static void stop_this_cpu(void *unused)
163{
164 cpu_clear(smp_processor_id(), cpu_online_map);
165 local_irq_disable();
166
167 for (;;)
168 cpu_relax();
169}
170
171void smp_send_stop(void) 165void smp_send_stop(void)
172{ 166{
173 smp_call_function(stop_this_cpu, 0, 0); 167 smp_call_function(stop_this_cpu, 0, 0);
diff --git a/arch/sh/kernel/sys_sh.c b/arch/sh/kernel/sys_sh.c
index 8aa5d1ceaf14..81f58371613d 100644
--- a/arch/sh/kernel/sys_sh.c
+++ b/arch/sh/kernel/sys_sh.c
@@ -28,37 +28,13 @@
28#include <asm/cacheflush.h> 28#include <asm/cacheflush.h>
29#include <asm/cachectl.h> 29#include <asm/cachectl.h>
30 30
31static inline long
32do_mmap2(unsigned long addr, unsigned long len, unsigned long prot,
33 unsigned long flags, int fd, unsigned long pgoff)
34{
35 int error = -EBADF;
36 struct file *file = NULL;
37
38 flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
39 if (!(flags & MAP_ANONYMOUS)) {
40 file = fget(fd);
41 if (!file)
42 goto out;
43 }
44
45 down_write(&current->mm->mmap_sem);
46 error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
47 up_write(&current->mm->mmap_sem);
48
49 if (file)
50 fput(file);
51out:
52 return error;
53}
54
55asmlinkage int old_mmap(unsigned long addr, unsigned long len, 31asmlinkage int old_mmap(unsigned long addr, unsigned long len,
56 unsigned long prot, unsigned long flags, 32 unsigned long prot, unsigned long flags,
57 int fd, unsigned long off) 33 int fd, unsigned long off)
58{ 34{
59 if (off & ~PAGE_MASK) 35 if (off & ~PAGE_MASK)
60 return -EINVAL; 36 return -EINVAL;
61 return do_mmap2(addr, len, prot, flags, fd, off>>PAGE_SHIFT); 37 return sys_mmap_pgoff(addr, len, prot, flags, fd, off>>PAGE_SHIFT);
62} 38}
63 39
64asmlinkage long sys_mmap2(unsigned long addr, unsigned long len, 40asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
@@ -74,111 +50,7 @@ asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
74 50
75 pgoff >>= PAGE_SHIFT - 12; 51 pgoff >>= PAGE_SHIFT - 12;
76 52
77 return do_mmap2(addr, len, prot, flags, fd, pgoff); 53 return sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff);
78}
79
80/*
81 * sys_ipc() is the de-multiplexer for the SysV IPC calls..
82 *
83 * This is really horribly ugly.
84 */
85asmlinkage int sys_ipc(uint call, int first, int second,
86 int third, void __user *ptr, long fifth)
87{
88 int version, ret;
89
90 version = call >> 16; /* hack for backward compatibility */
91 call &= 0xffff;
92
93 if (call <= SEMTIMEDOP)
94 switch (call) {
95 case SEMOP:
96 return sys_semtimedop(first,
97 (struct sembuf __user *)ptr,
98 second, NULL);
99 case SEMTIMEDOP:
100 return sys_semtimedop(first,
101 (struct sembuf __user *)ptr, second,
102 (const struct timespec __user *)fifth);
103 case SEMGET:
104 return sys_semget (first, second, third);
105 case SEMCTL: {
106 union semun fourth;
107 if (!ptr)
108 return -EINVAL;
109 if (get_user(fourth.__pad, (void __user * __user *) ptr))
110 return -EFAULT;
111 return sys_semctl (first, second, third, fourth);
112 }
113 default:
114 return -EINVAL;
115 }
116
117 if (call <= MSGCTL)
118 switch (call) {
119 case MSGSND:
120 return sys_msgsnd (first, (struct msgbuf __user *) ptr,
121 second, third);
122 case MSGRCV:
123 switch (version) {
124 case 0:
125 {
126 struct ipc_kludge tmp;
127
128 if (!ptr)
129 return -EINVAL;
130
131 if (copy_from_user(&tmp,
132 (struct ipc_kludge __user *) ptr,
133 sizeof (tmp)))
134 return -EFAULT;
135
136 return sys_msgrcv (first, tmp.msgp, second,
137 tmp.msgtyp, third);
138 }
139 default:
140 return sys_msgrcv (first,
141 (struct msgbuf __user *) ptr,
142 second, fifth, third);
143 }
144 case MSGGET:
145 return sys_msgget ((key_t) first, second);
146 case MSGCTL:
147 return sys_msgctl (first, second,
148 (struct msqid_ds __user *) ptr);
149 default:
150 return -EINVAL;
151 }
152 if (call <= SHMCTL)
153 switch (call) {
154 case SHMAT:
155 switch (version) {
156 default: {
157 ulong raddr;
158 ret = do_shmat (first, (char __user *) ptr,
159 second, &raddr);
160 if (ret)
161 return ret;
162 return put_user (raddr, (ulong __user *) third);
163 }
164 case 1: /* iBCS2 emulator entry point */
165 if (!segment_eq(get_fs(), get_ds()))
166 return -EINVAL;
167 return do_shmat (first, (char __user *) ptr,
168 second, (ulong *) third);
169 }
170 case SHMDT:
171 return sys_shmdt ((char __user *)ptr);
172 case SHMGET:
173 return sys_shmget (first, second, third);
174 case SHMCTL:
175 return sys_shmctl (first, second,
176 (struct shmid_ds __user *) ptr);
177 default:
178 return -EINVAL;
179 }
180
181 return -EINVAL;
182} 54}
183 55
184/* sys_cacheflush -- flush (part of) the processor cache. */ 56/* sys_cacheflush -- flush (part of) the processor cache. */
@@ -221,14 +93,3 @@ asmlinkage int sys_cacheflush(unsigned long addr, unsigned long len, int op)
221 up_read(&current->mm->mmap_sem); 93 up_read(&current->mm->mmap_sem);
222 return 0; 94 return 0;
223} 95}
224
225asmlinkage int sys_uname(struct old_utsname __user *name)
226{
227 int err;
228 if (!name)
229 return -EFAULT;
230 down_read(&uts_sem);
231 err = copy_to_user(name, utsname(), sizeof(*name));
232 up_read(&uts_sem);
233 return err?-EFAULT:0;
234}
diff --git a/arch/sh/kernel/syscalls_64.S b/arch/sh/kernel/syscalls_64.S
index 5bfde6c77498..2048a20d7c80 100644
--- a/arch/sh/kernel/syscalls_64.S
+++ b/arch/sh/kernel/syscalls_64.S
@@ -391,3 +391,5 @@ sys_call_table:
391 .long sys_pwritev 391 .long sys_pwritev
392 .long sys_rt_tgsigqueueinfo 392 .long sys_rt_tgsigqueueinfo
393 .long sys_perf_event_open 393 .long sys_perf_event_open
394 .long sys_recvmmsg /* 365 */
395 .long sys_accept4
diff --git a/arch/sh/kernel/time.c b/arch/sh/kernel/time.c
index 953fa1613312..8a0072de2bcc 100644
--- a/arch/sh/kernel/time.c
+++ b/arch/sh/kernel/time.c
@@ -39,12 +39,12 @@ static int null_rtc_set_time(const time_t secs)
39void (*rtc_sh_get_time)(struct timespec *) = null_rtc_get_time; 39void (*rtc_sh_get_time)(struct timespec *) = null_rtc_get_time;
40int (*rtc_sh_set_time)(const time_t) = null_rtc_set_time; 40int (*rtc_sh_set_time)(const time_t) = null_rtc_set_time;
41 41
42#ifdef CONFIG_GENERIC_CMOS_UPDATE
43void read_persistent_clock(struct timespec *ts) 42void read_persistent_clock(struct timespec *ts)
44{ 43{
45 rtc_sh_get_time(ts); 44 rtc_sh_get_time(ts);
46} 45}
47 46
47#ifdef CONFIG_GENERIC_CMOS_UPDATE
48int update_persistent_clock(struct timespec now) 48int update_persistent_clock(struct timespec now)
49{ 49{
50 return rtc_sh_set_time(now.tv_sec); 50 return rtc_sh_set_time(now.tv_sec);
@@ -113,9 +113,5 @@ void __init time_init(void)
113 hwblk_init(); 113 hwblk_init();
114 clk_init(); 114 clk_init();
115 115
116 rtc_sh_get_time(&xtime);
117 set_normalized_timespec(&wall_to_monotonic,
118 -xtime.tv_sec, -xtime.tv_nsec);
119
120 late_time_init = sh_late_time_init; 116 late_time_init = sh_late_time_init;
121} 117}
diff --git a/arch/sh/kernel/topology.c b/arch/sh/kernel/topology.c
index 0838942b7083..9b0b633b6c92 100644
--- a/arch/sh/kernel/topology.c
+++ b/arch/sh/kernel/topology.c
@@ -16,6 +16,32 @@
16 16
17static DEFINE_PER_CPU(struct cpu, cpu_devices); 17static DEFINE_PER_CPU(struct cpu, cpu_devices);
18 18
19cpumask_t cpu_core_map[NR_CPUS];
20
21static cpumask_t cpu_coregroup_map(unsigned int cpu)
22{
23 /*
24 * Presently all SH-X3 SMP cores are multi-cores, so just keep it
25 * simple until we have a method for determining topology..
26 */
27 return cpu_possible_map;
28}
29
30const struct cpumask *cpu_coregroup_mask(unsigned int cpu)
31{
32 return &cpu_core_map[cpu];
33}
34
35int arch_update_cpu_topology(void)
36{
37 unsigned int cpu;
38
39 for_each_possible_cpu(cpu)
40 cpu_core_map[cpu] = cpu_coregroup_map(cpu);
41
42 return 0;
43}
44
19static int __init topology_init(void) 45static int __init topology_init(void)
20{ 46{
21 int i, ret; 47 int i, ret;
diff --git a/arch/sh/kernel/traps.c b/arch/sh/kernel/traps.c
index a8396f36bd14..0830c2a9f712 100644
--- a/arch/sh/kernel/traps.c
+++ b/arch/sh/kernel/traps.c
@@ -9,8 +9,8 @@
9#include <asm/unwinder.h> 9#include <asm/unwinder.h>
10#include <asm/system.h> 10#include <asm/system.h>
11 11
12#ifdef CONFIG_BUG 12#ifdef CONFIG_GENERIC_BUG
13void handle_BUG(struct pt_regs *regs) 13static void handle_BUG(struct pt_regs *regs)
14{ 14{
15 const struct bug_entry *bug; 15 const struct bug_entry *bug;
16 unsigned long bugaddr = regs->pc; 16 unsigned long bugaddr = regs->pc;
@@ -58,7 +58,7 @@ BUILD_TRAP_HANDLER(debug)
58 TRAP_HANDLER_DECL; 58 TRAP_HANDLER_DECL;
59 59
60 /* Rewind */ 60 /* Rewind */
61 regs->pc -= instruction_size(ctrl_inw(regs->pc - 4)); 61 regs->pc -= instruction_size(__raw_readw(regs->pc - 4));
62 62
63 if (notify_die(DIE_TRAP, "debug trap", regs, 0, vec & 0xff, 63 if (notify_die(DIE_TRAP, "debug trap", regs, 0, vec & 0xff,
64 SIGTRAP) == NOTIFY_STOP) 64 SIGTRAP) == NOTIFY_STOP)
@@ -75,13 +75,13 @@ BUILD_TRAP_HANDLER(bug)
75 TRAP_HANDLER_DECL; 75 TRAP_HANDLER_DECL;
76 76
77 /* Rewind */ 77 /* Rewind */
78 regs->pc -= instruction_size(ctrl_inw(regs->pc - 4)); 78 regs->pc -= instruction_size(__raw_readw(regs->pc - 4));
79 79
80 if (notify_die(DIE_TRAP, "bug trap", regs, 0, TRAPA_BUG_OPCODE & 0xff, 80 if (notify_die(DIE_TRAP, "bug trap", regs, 0, TRAPA_BUG_OPCODE & 0xff,
81 SIGTRAP) == NOTIFY_STOP) 81 SIGTRAP) == NOTIFY_STOP)
82 return; 82 return;
83 83
84#ifdef CONFIG_BUG 84#ifdef CONFIG_GENERIC_BUG
85 if (__kernel_text_address(instruction_pointer(regs))) { 85 if (__kernel_text_address(instruction_pointer(regs))) {
86 insn_size_t insn = *(insn_size_t *)instruction_pointer(regs); 86 insn_size_t insn = *(insn_size_t *)instruction_pointer(regs);
87 if (insn == TRAPA_BUG_OPCODE) 87 if (insn == TRAPA_BUG_OPCODE)
@@ -95,9 +95,11 @@ BUILD_TRAP_HANDLER(bug)
95 95
96BUILD_TRAP_HANDLER(nmi) 96BUILD_TRAP_HANDLER(nmi)
97{ 97{
98 unsigned int cpu = smp_processor_id();
98 TRAP_HANDLER_DECL; 99 TRAP_HANDLER_DECL;
99 100
100 nmi_enter(); 101 nmi_enter();
102 nmi_count(cpu)++;
101 103
102 switch (notify_die(DIE_NMI, "NMI", regs, 0, vec & 0xff, SIGINT)) { 104 switch (notify_die(DIE_NMI, "NMI", regs, 0, vec & 0xff, SIGINT)) {
103 case NOTIFY_OK: 105 case NOTIFY_OK:
diff --git a/arch/sh/kernel/traps_32.c b/arch/sh/kernel/traps_32.c
index 7a2ee3a6b8e7..c3d86fa71ddf 100644
--- a/arch/sh/kernel/traps_32.c
+++ b/arch/sh/kernel/traps_32.c
@@ -24,10 +24,10 @@
24#include <linux/kdebug.h> 24#include <linux/kdebug.h>
25#include <linux/kexec.h> 25#include <linux/kexec.h>
26#include <linux/limits.h> 26#include <linux/limits.h>
27#include <linux/proc_fs.h>
28#include <linux/sysfs.h> 27#include <linux/sysfs.h>
28#include <linux/uaccess.h>
29#include <asm/system.h> 29#include <asm/system.h>
30#include <asm/uaccess.h> 30#include <asm/alignment.h>
31#include <asm/fpu.h> 31#include <asm/fpu.h>
32#include <asm/kprobes.h> 32#include <asm/kprobes.h>
33 33
@@ -46,85 +46,6 @@
46#define TRAP_ILLEGAL_SLOT_INST 13 46#define TRAP_ILLEGAL_SLOT_INST 13
47#endif 47#endif
48 48
49static unsigned long se_user;
50static unsigned long se_sys;
51static unsigned long se_half;
52static unsigned long se_word;
53static unsigned long se_dword;
54static unsigned long se_multi;
55/* bitfield: 1: warn 2: fixup 4: signal -> combinations 2|4 && 1|2|4 are not
56 valid! */
57static int se_usermode = 3;
58/* 0: no warning 1: print a warning message, disabled by default */
59static int se_kernmode_warn;
60
61#ifdef CONFIG_PROC_FS
62static const char *se_usermode_action[] = {
63 "ignored",
64 "warn",
65 "fixup",
66 "fixup+warn",
67 "signal",
68 "signal+warn"
69};
70
71static int
72proc_alignment_read(char *page, char **start, off_t off, int count, int *eof,
73 void *data)
74{
75 char *p = page;
76 int len;
77
78 p += sprintf(p, "User:\t\t%lu\n", se_user);
79 p += sprintf(p, "System:\t\t%lu\n", se_sys);
80 p += sprintf(p, "Half:\t\t%lu\n", se_half);
81 p += sprintf(p, "Word:\t\t%lu\n", se_word);
82 p += sprintf(p, "DWord:\t\t%lu\n", se_dword);
83 p += sprintf(p, "Multi:\t\t%lu\n", se_multi);
84 p += sprintf(p, "User faults:\t%i (%s)\n", se_usermode,
85 se_usermode_action[se_usermode]);
86 p += sprintf(p, "Kernel faults:\t%i (fixup%s)\n", se_kernmode_warn,
87 se_kernmode_warn ? "+warn" : "");
88
89 len = (p - page) - off;
90 if (len < 0)
91 len = 0;
92
93 *eof = (len <= count) ? 1 : 0;
94 *start = page + off;
95
96 return len;
97}
98
99static int proc_alignment_write(struct file *file, const char __user *buffer,
100 unsigned long count, void *data)
101{
102 char mode;
103
104 if (count > 0) {
105 if (get_user(mode, buffer))
106 return -EFAULT;
107 if (mode >= '0' && mode <= '5')
108 se_usermode = mode - '0';
109 }
110 return count;
111}
112
113static int proc_alignment_kern_write(struct file *file, const char __user *buffer,
114 unsigned long count, void *data)
115{
116 char mode;
117
118 if (count > 0) {
119 if (get_user(mode, buffer))
120 return -EFAULT;
121 if (mode >= '0' && mode <= '1')
122 se_kernmode_warn = mode - '0';
123 }
124 return count;
125}
126#endif
127
128static void dump_mem(const char *str, unsigned long bottom, unsigned long top) 49static void dump_mem(const char *str, unsigned long bottom, unsigned long top)
129{ 50{
130 unsigned long p; 51 unsigned long p;
@@ -276,10 +197,10 @@ static int handle_unaligned_ins(insn_size_t instruction, struct pt_regs *regs,
276 count = 1<<(instruction&3); 197 count = 1<<(instruction&3);
277 198
278 switch (count) { 199 switch (count) {
279 case 1: se_half += 1; break; 200 case 1: inc_unaligned_byte_access(); break;
280 case 2: se_word += 1; break; 201 case 2: inc_unaligned_word_access(); break;
281 case 4: se_dword += 1; break; 202 case 4: inc_unaligned_dword_access(); break;
282 case 8: se_multi += 1; break; /* ??? */ 203 case 8: inc_unaligned_multi_access(); break;
283 } 204 }
284 205
285 ret = -EFAULT; 206 ret = -EFAULT;
@@ -463,12 +384,8 @@ int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs,
463 rm = regs->regs[index]; 384 rm = regs->regs[index];
464 385
465 /* shout about fixups */ 386 /* shout about fixups */
466 if (!expected && printk_ratelimit()) 387 if (!expected)
467 printk(KERN_NOTICE "Fixing up unaligned %s access " 388 unaligned_fixups_notify(current, instruction, regs);
468 "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n",
469 user_mode(regs) ? "userspace" : "kernel",
470 current->comm, task_pid_nr(current),
471 (void *)regs->pc, instruction);
472 389
473 ret = -EFAULT; 390 ret = -EFAULT;
474 switch (instruction&0xF000) { 391 switch (instruction&0xF000) {
@@ -621,10 +538,10 @@ asmlinkage void do_address_error(struct pt_regs *regs,
621 538
622 if (user_mode(regs)) { 539 if (user_mode(regs)) {
623 int si_code = BUS_ADRERR; 540 int si_code = BUS_ADRERR;
541 unsigned int user_action;
624 542
625 local_irq_enable(); 543 local_irq_enable();
626 544 inc_unaligned_user_access();
627 se_user += 1;
628 545
629 set_fs(USER_DS); 546 set_fs(USER_DS);
630 if (copy_from_user(&instruction, (insn_size_t *)(regs->pc & ~1), 547 if (copy_from_user(&instruction, (insn_size_t *)(regs->pc & ~1),
@@ -635,16 +552,12 @@ asmlinkage void do_address_error(struct pt_regs *regs,
635 set_fs(oldfs); 552 set_fs(oldfs);
636 553
637 /* shout about userspace fixups */ 554 /* shout about userspace fixups */
638 if (se_usermode & 1) 555 unaligned_fixups_notify(current, instruction, regs);
639 printk(KERN_NOTICE "Unaligned userspace access "
640 "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n",
641 current->comm, current->pid, (void *)regs->pc,
642 instruction);
643 556
644 if (se_usermode & 2) 557 user_action = unaligned_user_action();
558 if (user_action & UM_FIXUP)
645 goto fixup; 559 goto fixup;
646 560 if (user_action & UM_SIGNAL)
647 if (se_usermode & 4)
648 goto uspace_segv; 561 goto uspace_segv;
649 else { 562 else {
650 /* ignore */ 563 /* ignore */
@@ -664,7 +577,7 @@ fixup:
664 &user_mem_access, 0); 577 &user_mem_access, 0);
665 set_fs(oldfs); 578 set_fs(oldfs);
666 579
667 if (tmp==0) 580 if (tmp == 0)
668 return; /* sorted */ 581 return; /* sorted */
669uspace_segv: 582uspace_segv:
670 printk(KERN_NOTICE "Sending SIGBUS to \"%s\" due to unaligned " 583 printk(KERN_NOTICE "Sending SIGBUS to \"%s\" due to unaligned "
@@ -677,7 +590,7 @@ uspace_segv:
677 info.si_addr = (void __user *)address; 590 info.si_addr = (void __user *)address;
678 force_sig_info(SIGBUS, &info, current); 591 force_sig_info(SIGBUS, &info, current);
679 } else { 592 } else {
680 se_sys += 1; 593 inc_unaligned_kernel_access();
681 594
682 if (regs->pc & 1) 595 if (regs->pc & 1)
683 die("unaligned program counter", regs, error_code); 596 die("unaligned program counter", regs, error_code);
@@ -692,11 +605,7 @@ uspace_segv:
692 die("insn faulting in do_address_error", regs, 0); 605 die("insn faulting in do_address_error", regs, 0);
693 } 606 }
694 607
695 if (se_kernmode_warn) 608 unaligned_fixups_notify(current, instruction, regs);
696 printk(KERN_NOTICE "Unaligned kernel access "
697 "on behalf of \"%s\" pid=%d pc=0x%p ins=0x%04hx\n",
698 current->comm, current->pid, (void *)regs->pc,
699 instruction);
700 609
701 handle_unaligned_access(instruction, regs, 610 handle_unaligned_access(instruction, regs,
702 &user_mem_access, 0); 611 &user_mem_access, 0);
@@ -881,35 +790,10 @@ asmlinkage void do_exception_error(unsigned long r4, unsigned long r5,
881 die_if_kernel("exception", regs, ex); 790 die_if_kernel("exception", regs, ex);
882} 791}
883 792
884#if defined(CONFIG_SH_STANDARD_BIOS)
885void *gdb_vbr_vector;
886
887static inline void __init gdb_vbr_init(void)
888{
889 register unsigned long vbr;
890
891 /*
892 * Read the old value of the VBR register to initialise
893 * the vector through which debug and BIOS traps are
894 * delegated by the Linux trap handler.
895 */
896 asm volatile("stc vbr, %0" : "=r" (vbr));
897
898 gdb_vbr_vector = (void *)(vbr + 0x100);
899 printk("Setting GDB trap vector to 0x%08lx\n",
900 (unsigned long)gdb_vbr_vector);
901}
902#endif
903
904void __cpuinit per_cpu_trap_init(void) 793void __cpuinit per_cpu_trap_init(void)
905{ 794{
906 extern void *vbr_base; 795 extern void *vbr_base;
907 796
908#ifdef CONFIG_SH_STANDARD_BIOS
909 if (raw_smp_processor_id() == 0)
910 gdb_vbr_init();
911#endif
912
913 /* NOTE: The VBR value should be at P1 797 /* NOTE: The VBR value should be at P1
914 (or P2, virtural "fixed" address space). 798 (or P2, virtural "fixed" address space).
915 It's definitely should not in physical address. */ 799 It's definitely should not in physical address. */
@@ -945,14 +829,9 @@ void __init trap_init(void)
945 set_exception_table_evt(0x800, do_reserved_inst); 829 set_exception_table_evt(0x800, do_reserved_inst);
946 set_exception_table_evt(0x820, do_illegal_slot_inst); 830 set_exception_table_evt(0x820, do_illegal_slot_inst);
947#elif defined(CONFIG_SH_FPU) 831#elif defined(CONFIG_SH_FPU)
948#ifdef CONFIG_CPU_SUBTYPE_SHX3
949 set_exception_table_evt(0xd80, fpu_state_restore_trap_handler);
950 set_exception_table_evt(0xda0, fpu_state_restore_trap_handler);
951#else
952 set_exception_table_evt(0x800, fpu_state_restore_trap_handler); 832 set_exception_table_evt(0x800, fpu_state_restore_trap_handler);
953 set_exception_table_evt(0x820, fpu_state_restore_trap_handler); 833 set_exception_table_evt(0x820, fpu_state_restore_trap_handler);
954#endif 834#endif
955#endif
956 835
957#ifdef CONFIG_CPU_SH2 836#ifdef CONFIG_CPU_SH2
958 set_exception_table_vec(TRAP_ADDRESS_ERROR, address_error_trap_handler); 837 set_exception_table_vec(TRAP_ADDRESS_ERROR, address_error_trap_handler);
@@ -966,11 +845,8 @@ void __init trap_init(void)
966#endif 845#endif
967 846
968#ifdef TRAP_UBC 847#ifdef TRAP_UBC
969 set_exception_table_vec(TRAP_UBC, break_point_trap); 848 set_exception_table_vec(TRAP_UBC, breakpoint_trap_handler);
970#endif 849#endif
971
972 /* Setup VBR for boot cpu */
973 per_cpu_trap_init();
974} 850}
975 851
976void show_stack(struct task_struct *tsk, unsigned long *sp) 852void show_stack(struct task_struct *tsk, unsigned long *sp)
@@ -995,38 +871,3 @@ void dump_stack(void)
995 show_stack(NULL, NULL); 871 show_stack(NULL, NULL);
996} 872}
997EXPORT_SYMBOL(dump_stack); 873EXPORT_SYMBOL(dump_stack);
998
999#ifdef CONFIG_PROC_FS
1000/*
1001 * This needs to be done after sysctl_init, otherwise sys/ will be
1002 * overwritten. Actually, this shouldn't be in sys/ at all since
1003 * it isn't a sysctl, and it doesn't contain sysctl information.
1004 * We now locate it in /proc/cpu/alignment instead.
1005 */
1006static int __init alignment_init(void)
1007{
1008 struct proc_dir_entry *dir, *res;
1009
1010 dir = proc_mkdir("cpu", NULL);
1011 if (!dir)
1012 return -ENOMEM;
1013
1014 res = create_proc_entry("alignment", S_IWUSR | S_IRUGO, dir);
1015 if (!res)
1016 return -ENOMEM;
1017
1018 res->read_proc = proc_alignment_read;
1019 res->write_proc = proc_alignment_write;
1020
1021 res = create_proc_entry("kernel_alignment", S_IWUSR | S_IRUGO, dir);
1022 if (!res)
1023 return -ENOMEM;
1024
1025 res->read_proc = proc_alignment_read;
1026 res->write_proc = proc_alignment_kern_write;
1027
1028 return 0;
1029}
1030
1031fs_initcall(alignment_init);
1032#endif
diff --git a/arch/sh/kernel/traps_64.c b/arch/sh/kernel/traps_64.c
index 267e5ebbb475..e3f92eb05ffd 100644
--- a/arch/sh/kernel/traps_64.c
+++ b/arch/sh/kernel/traps_64.c
@@ -600,7 +600,7 @@ static int misaligned_fpu_load(struct pt_regs *regs,
600 indexed by register number. */ 600 indexed by register number. */
601 if (last_task_used_math == current) { 601 if (last_task_used_math == current) {
602 enable_fpu(); 602 enable_fpu();
603 save_fpu(current, regs); 603 save_fpu(current);
604 disable_fpu(); 604 disable_fpu();
605 last_task_used_math = NULL; 605 last_task_used_math = NULL;
606 regs->sr |= SR_FD; 606 regs->sr |= SR_FD;
@@ -611,19 +611,19 @@ static int misaligned_fpu_load(struct pt_regs *regs,
611 611
612 switch (width_shift) { 612 switch (width_shift) {
613 case 2: 613 case 2:
614 current->thread.fpu.hard.fp_regs[destreg] = buflo; 614 current->thread.xstate->hardfpu.fp_regs[destreg] = buflo;
615 break; 615 break;
616 case 3: 616 case 3:
617 if (do_paired_load) { 617 if (do_paired_load) {
618 current->thread.fpu.hard.fp_regs[destreg] = buflo; 618 current->thread.xstate->hardfpu.fp_regs[destreg] = buflo;
619 current->thread.fpu.hard.fp_regs[destreg+1] = bufhi; 619 current->thread.xstate->hardfpu.fp_regs[destreg+1] = bufhi;
620 } else { 620 } else {
621#if defined(CONFIG_CPU_LITTLE_ENDIAN) 621#if defined(CONFIG_CPU_LITTLE_ENDIAN)
622 current->thread.fpu.hard.fp_regs[destreg] = bufhi; 622 current->thread.xstate->hardfpu.fp_regs[destreg] = bufhi;
623 current->thread.fpu.hard.fp_regs[destreg+1] = buflo; 623 current->thread.xstate->hardfpu.fp_regs[destreg+1] = buflo;
624#else 624#else
625 current->thread.fpu.hard.fp_regs[destreg] = buflo; 625 current->thread.xstate->hardfpu.fp_regs[destreg] = buflo;
626 current->thread.fpu.hard.fp_regs[destreg+1] = bufhi; 626 current->thread.xstate->hardfpu.fp_regs[destreg+1] = bufhi;
627#endif 627#endif
628 } 628 }
629 break; 629 break;
@@ -673,7 +673,7 @@ static int misaligned_fpu_store(struct pt_regs *regs,
673 indexed by register number. */ 673 indexed by register number. */
674 if (last_task_used_math == current) { 674 if (last_task_used_math == current) {
675 enable_fpu(); 675 enable_fpu();
676 save_fpu(current, regs); 676 save_fpu(current);
677 disable_fpu(); 677 disable_fpu();
678 last_task_used_math = NULL; 678 last_task_used_math = NULL;
679 regs->sr |= SR_FD; 679 regs->sr |= SR_FD;
@@ -681,19 +681,19 @@ static int misaligned_fpu_store(struct pt_regs *regs,
681 681
682 switch (width_shift) { 682 switch (width_shift) {
683 case 2: 683 case 2:
684 buflo = current->thread.fpu.hard.fp_regs[srcreg]; 684 buflo = current->thread.xstate->hardfpu.fp_regs[srcreg];
685 break; 685 break;
686 case 3: 686 case 3:
687 if (do_paired_load) { 687 if (do_paired_load) {
688 buflo = current->thread.fpu.hard.fp_regs[srcreg]; 688 buflo = current->thread.xstate->hardfpu.fp_regs[srcreg];
689 bufhi = current->thread.fpu.hard.fp_regs[srcreg+1]; 689 bufhi = current->thread.xstate->hardfpu.fp_regs[srcreg+1];
690 } else { 690 } else {
691#if defined(CONFIG_CPU_LITTLE_ENDIAN) 691#if defined(CONFIG_CPU_LITTLE_ENDIAN)
692 bufhi = current->thread.fpu.hard.fp_regs[srcreg]; 692 bufhi = current->thread.xstate->hardfpu.fp_regs[srcreg];
693 buflo = current->thread.fpu.hard.fp_regs[srcreg+1]; 693 buflo = current->thread.xstate->hardfpu.fp_regs[srcreg+1];
694#else 694#else
695 buflo = current->thread.fpu.hard.fp_regs[srcreg]; 695 buflo = current->thread.xstate->hardfpu.fp_regs[srcreg];
696 bufhi = current->thread.fpu.hard.fp_regs[srcreg+1]; 696 bufhi = current->thread.xstate->hardfpu.fp_regs[srcreg+1];
697#endif 697#endif
698 } 698 }
699 break; 699 break;
@@ -877,44 +877,39 @@ static int misaligned_fixup(struct pt_regs *regs)
877 877
878static ctl_table unaligned_table[] = { 878static ctl_table unaligned_table[] = {
879 { 879 {
880 .ctl_name = CTL_UNNUMBERED,
881 .procname = "kernel_reports", 880 .procname = "kernel_reports",
882 .data = &kernel_mode_unaligned_fixup_count, 881 .data = &kernel_mode_unaligned_fixup_count,
883 .maxlen = sizeof(int), 882 .maxlen = sizeof(int),
884 .mode = 0644, 883 .mode = 0644,
885 .proc_handler = &proc_dointvec 884 .proc_handler = proc_dointvec
886 }, 885 },
887 { 886 {
888 .ctl_name = CTL_UNNUMBERED,
889 .procname = "user_reports", 887 .procname = "user_reports",
890 .data = &user_mode_unaligned_fixup_count, 888 .data = &user_mode_unaligned_fixup_count,
891 .maxlen = sizeof(int), 889 .maxlen = sizeof(int),
892 .mode = 0644, 890 .mode = 0644,
893 .proc_handler = &proc_dointvec 891 .proc_handler = proc_dointvec
894 }, 892 },
895 { 893 {
896 .ctl_name = CTL_UNNUMBERED,
897 .procname = "user_enable", 894 .procname = "user_enable",
898 .data = &user_mode_unaligned_fixup_enable, 895 .data = &user_mode_unaligned_fixup_enable,
899 .maxlen = sizeof(int), 896 .maxlen = sizeof(int),
900 .mode = 0644, 897 .mode = 0644,
901 .proc_handler = &proc_dointvec}, 898 .proc_handler = proc_dointvec},
902 {} 899 {}
903}; 900};
904 901
905static ctl_table unaligned_root[] = { 902static ctl_table unaligned_root[] = {
906 { 903 {
907 .ctl_name = CTL_UNNUMBERED,
908 .procname = "unaligned_fixup", 904 .procname = "unaligned_fixup",
909 .mode = 0555, 905 .mode = 0555,
910 unaligned_table 906 .child = unaligned_table
911 }, 907 },
912 {} 908 {}
913}; 909};
914 910
915static ctl_table sh64_root[] = { 911static ctl_table sh64_root[] = {
916 { 912 {
917 .ctl_name = CTL_UNNUMBERED,
918 .procname = "sh64", 913 .procname = "sh64",
919 .mode = 0555, 914 .mode = 0555,
920 .child = unaligned_root 915 .child = unaligned_root
diff --git a/arch/sh/kernel/vmlinux.lds.S b/arch/sh/kernel/vmlinux.lds.S
index a1e4ec24f1f5..7f8a709c3ada 100644
--- a/arch/sh/kernel/vmlinux.lds.S
+++ b/arch/sh/kernel/vmlinux.lds.S
@@ -3,7 +3,7 @@
3 * Written by Niibe Yutaka and Paul Mundt 3 * Written by Niibe Yutaka and Paul Mundt
4 */ 4 */
5#ifdef CONFIG_SUPERH64 5#ifdef CONFIG_SUPERH64
6#define LOAD_OFFSET CONFIG_PAGE_OFFSET 6#define LOAD_OFFSET PAGE_OFFSET
7OUTPUT_ARCH(sh:sh5) 7OUTPUT_ARCH(sh:sh5)
8#else 8#else
9#define LOAD_OFFSET 0 9#define LOAD_OFFSET 0
@@ -14,17 +14,16 @@ OUTPUT_ARCH(sh)
14#include <asm/cache.h> 14#include <asm/cache.h>
15#include <asm/vmlinux.lds.h> 15#include <asm/vmlinux.lds.h>
16 16
17#ifdef CONFIG_PMB
18 #define MEMORY_OFFSET 0
19#else
20 #define MEMORY_OFFSET __MEMORY_START
21#endif
22
17ENTRY(_start) 23ENTRY(_start)
18SECTIONS 24SECTIONS
19{ 25{
20#ifdef CONFIG_PMB_FIXED 26 . = PAGE_OFFSET + MEMORY_OFFSET + CONFIG_ZERO_PAGE_OFFSET;
21 . = CONFIG_PAGE_OFFSET + (CONFIG_MEMORY_START & 0x1fffffff) +
22 CONFIG_ZERO_PAGE_OFFSET;
23#elif defined(CONFIG_32BIT)
24 . = CONFIG_PAGE_OFFSET + CONFIG_ZERO_PAGE_OFFSET;
25#else
26 . = CONFIG_PAGE_OFFSET + CONFIG_MEMORY_START + CONFIG_ZERO_PAGE_OFFSET;
27#endif
28 27
29 _text = .; /* Text and read-only data */ 28 _text = .; /* Text and read-only data */
30 29
@@ -35,12 +34,7 @@ SECTIONS
35 .text : AT(ADDR(.text) - LOAD_OFFSET) { 34 .text : AT(ADDR(.text) - LOAD_OFFSET) {
36 HEAD_TEXT 35 HEAD_TEXT
37 TEXT_TEXT 36 TEXT_TEXT
38 37 EXTRA_TEXT
39#ifdef CONFIG_SUPERH64
40 *(.text64)
41 *(.text..SHmedia32)
42#endif
43
44 SCHED_TEXT 38 SCHED_TEXT
45 LOCK_TEXT 39 LOCK_TEXT
46 KPROBES_TEXT 40 KPROBES_TEXT
@@ -51,24 +45,12 @@ SECTIONS
51 } = 0x0009 45 } = 0x0009
52 46
53 EXCEPTION_TABLE(16) 47 EXCEPTION_TABLE(16)
54
55 NOTES 48 NOTES
56 RO_DATA(PAGE_SIZE)
57
58 /*
59 * Code which must be executed uncached and the associated data
60 */
61 . = ALIGN(PAGE_SIZE);
62 .uncached : AT(ADDR(.uncached) - LOAD_OFFSET) {
63 __uncached_start = .;
64 *(.uncached.text)
65 *(.uncached.data)
66 __uncached_end = .;
67 }
68 49
50 _sdata = .;
51 RO_DATA(PAGE_SIZE)
69 RW_DATA_SECTION(L1_CACHE_BYTES, PAGE_SIZE, THREAD_SIZE) 52 RW_DATA_SECTION(L1_CACHE_BYTES, PAGE_SIZE, THREAD_SIZE)
70 53 _edata = .;
71 _edata = .; /* End of data section */
72 54
73 DWARF_EH_FRAME 55 DWARF_EH_FRAME
74 56
diff --git a/arch/sh/kernel/vsyscall/vsyscall.c b/arch/sh/kernel/vsyscall/vsyscall.c
index 3f7e415be86a..242117cbad67 100644
--- a/arch/sh/kernel/vsyscall/vsyscall.c
+++ b/arch/sh/kernel/vsyscall/vsyscall.c
@@ -11,7 +11,6 @@
11 * for more details. 11 * for more details.
12 */ 12 */
13#include <linux/mm.h> 13#include <linux/mm.h>
14#include <linux/slab.h>
15#include <linux/kernel.h> 14#include <linux/kernel.h>
16#include <linux/init.h> 15#include <linux/init.h>
17#include <linux/gfp.h> 16#include <linux/gfp.h>
diff --git a/arch/sh/lib/Makefile b/arch/sh/lib/Makefile
index a969b47c5463..dab4d2129812 100644
--- a/arch/sh/lib/Makefile
+++ b/arch/sh/lib/Makefile
@@ -2,7 +2,7 @@
2# Makefile for SuperH-specific library files.. 2# Makefile for SuperH-specific library files..
3# 3#
4 4
5lib-y = delay.o memset.o memmove.o memchr.o \ 5lib-y = delay.o memmove.o memchr.o \
6 checksum.o strlen.o div64.o div64-generic.o 6 checksum.o strlen.o div64.o div64-generic.o
7 7
8# Extracted from libgcc 8# Extracted from libgcc
@@ -23,8 +23,11 @@ obj-y += io.o
23memcpy-y := memcpy.o 23memcpy-y := memcpy.o
24memcpy-$(CONFIG_CPU_SH4) := memcpy-sh4.o 24memcpy-$(CONFIG_CPU_SH4) := memcpy-sh4.o
25 25
26memset-y := memset.o
27memset-$(CONFIG_CPU_SH4) := memset-sh4.o
28
26lib-$(CONFIG_MMU) += copy_page.o __clear_user.o 29lib-$(CONFIG_MMU) += copy_page.o __clear_user.o
27lib-$(CONFIG_MCOUNT) += mcount.o 30lib-$(CONFIG_MCOUNT) += mcount.o
28lib-y += $(memcpy-y) $(udivsi3-y) 31lib-y += $(memcpy-y) $(memset-y) $(udivsi3-y)
29 32
30EXTRA_CFLAGS += -Werror 33EXTRA_CFLAGS += -Werror
diff --git a/arch/sh/lib/libgcc.h b/arch/sh/lib/libgcc.h
index 3f19d1c5d942..05909d58e2fe 100644
--- a/arch/sh/lib/libgcc.h
+++ b/arch/sh/lib/libgcc.h
@@ -17,8 +17,7 @@ struct DWstruct {
17#error I feel sick. 17#error I feel sick.
18#endif 18#endif
19 19
20typedef union 20typedef union {
21{
22 struct DWstruct s; 21 struct DWstruct s;
23 long long ll; 22 long long ll;
24} DWunion; 23} DWunion;
diff --git a/arch/sh/lib/memset-sh4.S b/arch/sh/lib/memset-sh4.S
new file mode 100644
index 000000000000..1a6e32cc4e4d
--- /dev/null
+++ b/arch/sh/lib/memset-sh4.S
@@ -0,0 +1,107 @@
1/*
2 * "memset" implementation for SH4
3 *
4 * Copyright (C) 1999 Niibe Yutaka
5 * Copyright (c) 2009 STMicroelectronics Limited
6 * Author: Stuart Menefy <stuart.menefy:st.com>
7 */
8
9/*
10 * void *memset(void *s, int c, size_t n);
11 */
12
13#include <linux/linkage.h>
14
15ENTRY(memset)
16 mov #12,r0
17 add r6,r4
18 cmp/gt r6,r0
19 bt/s 40f ! if it's too small, set a byte at once
20 mov r4,r0
21 and #3,r0
22 cmp/eq #0,r0
23 bt/s 2f ! It's aligned
24 sub r0,r6
251:
26 dt r0
27 bf/s 1b
28 mov.b r5,@-r4
292: ! make VVVV
30 extu.b r5,r5
31 swap.b r5,r0 ! V0
32 or r0,r5 ! VV
33 swap.w r5,r0 ! VV00
34 or r0,r5 ! VVVV
35
36 ! Check if enough bytes need to be copied to be worth the big loop
37 mov #0x40, r0 ! (MT)
38 cmp/gt r6,r0 ! (MT) 64 > len => slow loop
39
40 bt/s 22f
41 mov r6,r0
42
43 ! align the dst to the cache block size if necessary
44 mov r4, r3
45 mov #~(0x1f), r1
46
47 and r3, r1
48 cmp/eq r3, r1
49
50 bt/s 11f ! dst is already aligned
51 sub r1, r3 ! r3-r1 -> r3
52 shlr2 r3 ! number of loops
53
5410: mov.l r5,@-r4
55 dt r3
56 bf/s 10b
57 add #-4, r6
58
5911: ! dst is 32byte aligned
60 mov r6,r2
61 mov #-5,r0
62 shld r0,r2 ! number of loops
63
64 add #-32, r4
65 mov r5, r0
6612:
67 movca.l r0,@r4
68 mov.l r5,@(4, r4)
69 mov.l r5,@(8, r4)
70 mov.l r5,@(12,r4)
71 mov.l r5,@(16,r4)
72 mov.l r5,@(20,r4)
73 add #-0x20, r6
74 mov.l r5,@(24,r4)
75 dt r2
76 mov.l r5,@(28,r4)
77 bf/s 12b
78 add #-32, r4
79
80 add #32, r4
81 mov #8, r0
82 cmp/ge r0, r6
83 bf 40f
84
85 mov r6,r0
8622:
87 shlr2 r0
88 shlr r0 ! r0 = r6 >> 3
893:
90 dt r0
91 mov.l r5,@-r4 ! set 8-byte at once
92 bf/s 3b
93 mov.l r5,@-r4
94 !
95 mov #7,r0
96 and r0,r6
97
98 ! fill bytes (length may be zero)
9940: tst r6,r6
100 bt 5f
1014:
102 dt r6
103 bf/s 4b
104 mov.b r5,@-r4
1055:
106 rts
107 mov r4,r0
diff --git a/arch/sh/math-emu/math.c b/arch/sh/math-emu/math.c
index ac2d7abd2567..1fcdb1220975 100644
--- a/arch/sh/math-emu/math.c
+++ b/arch/sh/math-emu/math.c
@@ -471,10 +471,10 @@ static int fpu_emulate(u16 code, struct sh_fpu_soft_struct *fregs, struct pt_reg
471 * denormal_to_double - Given denormalized float number, 471 * denormal_to_double - Given denormalized float number,
472 * store double float 472 * store double float
473 * 473 *
474 * @fpu: Pointer to sh_fpu_hard structure 474 * @fpu: Pointer to sh_fpu_soft structure
475 * @n: Index to FP register 475 * @n: Index to FP register
476 */ 476 */
477static void denormal_to_double(struct sh_fpu_hard_struct *fpu, int n) 477static void denormal_to_double(struct sh_fpu_soft_struct *fpu, int n)
478{ 478{
479 unsigned long du, dl; 479 unsigned long du, dl;
480 unsigned long x = fpu->fpul; 480 unsigned long x = fpu->fpul;
@@ -552,13 +552,13 @@ static int ieee_fpe_handler(struct pt_regs *regs)
552 if ((finsn & 0xf1ff) == 0xf0ad) { /* fcnvsd */ 552 if ((finsn & 0xf1ff) == 0xf0ad) { /* fcnvsd */
553 struct task_struct *tsk = current; 553 struct task_struct *tsk = current;
554 554
555 if ((tsk->thread.fpu.hard.fpscr & (1 << 17))) { 555 if ((tsk->thread.xstate->softfpu.fpscr & (1 << 17))) {
556 /* FPU error */ 556 /* FPU error */
557 denormal_to_double (&tsk->thread.fpu.hard, 557 denormal_to_double (&tsk->thread.xstate->softfpu,
558 (finsn >> 8) & 0xf); 558 (finsn >> 8) & 0xf);
559 tsk->thread.fpu.hard.fpscr &= 559 tsk->thread.xstate->softfpu.fpscr &=
560 ~(FPSCR_CAUSE_MASK | FPSCR_FLAG_MASK); 560 ~(FPSCR_CAUSE_MASK | FPSCR_FLAG_MASK);
561 set_tsk_thread_flag(tsk, TIF_USEDFPU); 561 task_thread_info(tsk)->status |= TS_USEDFPU;
562 } else { 562 } else {
563 info.si_signo = SIGFPE; 563 info.si_signo = SIGFPE;
564 info.si_errno = 0; 564 info.si_errno = 0;
@@ -617,12 +617,12 @@ static void fpu_init(struct sh_fpu_soft_struct *fpu)
617int do_fpu_inst(unsigned short inst, struct pt_regs *regs) 617int do_fpu_inst(unsigned short inst, struct pt_regs *regs)
618{ 618{
619 struct task_struct *tsk = current; 619 struct task_struct *tsk = current;
620 struct sh_fpu_soft_struct *fpu = &(tsk->thread.fpu.soft); 620 struct sh_fpu_soft_struct *fpu = &(tsk->thread.xstate->softfpu);
621 621
622 if (!test_tsk_thread_flag(tsk, TIF_USEDFPU)) { 622 if (!(task_thread_info(tsk)->status & TS_USEDFPU)) {
623 /* initialize once. */ 623 /* initialize once. */
624 fpu_init(fpu); 624 fpu_init(fpu);
625 set_tsk_thread_flag(tsk, TIF_USEDFPU); 625 task_thread_info(tsk)->status |= TS_USEDFPU;
626 } 626 }
627 627
628 return fpu_emulate(inst, fpu, regs); 628 return fpu_emulate(inst, fpu, regs);
diff --git a/arch/sh/mm/Kconfig b/arch/sh/mm/Kconfig
index 7f7b52f9beba..1445ca6257df 100644
--- a/arch/sh/mm/Kconfig
+++ b/arch/sh/mm/Kconfig
@@ -75,57 +75,25 @@ config MEMORY_SIZE
75config 29BIT 75config 29BIT
76 def_bool !32BIT 76 def_bool !32BIT
77 depends on SUPERH32 77 depends on SUPERH32
78 select UNCACHED_MAPPING
78 79
79config 32BIT 80config 32BIT
80 bool 81 bool
81 default y if CPU_SH5 82 default y if CPU_SH5
82 83
83config PMB_ENABLE
84 bool "Support 32-bit physical addressing through PMB"
85 depends on MMU && EXPERIMENTAL && (CPU_SUBTYPE_SH7757 || CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785)
86 select 32BIT
87 default y
88 help
89 If you say Y here, physical addressing will be extended to
90 32-bits through the SH-4A PMB. If this is not set, legacy
91 29-bit physical addressing will be used.
92
93choice
94 prompt "PMB handling type"
95 depends on PMB_ENABLE
96 default PMB_FIXED
97
98config PMB 84config PMB
99 bool "PMB" 85 bool "Support 32-bit physical addressing through PMB"
100 depends on MMU && EXPERIMENTAL && (CPU_SUBTYPE_SH7757 || CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785) 86 depends on MMU && EXPERIMENTAL && CPU_SH4A && !CPU_SH4AL_DSP
101 select 32BIT 87 select 32BIT
88 select UNCACHED_MAPPING
102 help 89 help
103 If you say Y here, physical addressing will be extended to 90 If you say Y here, physical addressing will be extended to
104 32-bits through the SH-4A PMB. If this is not set, legacy 91 32-bits through the SH-4A PMB. If this is not set, legacy
105 29-bit physical addressing will be used. 92 29-bit physical addressing will be used.
106 93
107config PMB_FIXED
108 bool "fixed PMB"
109 depends on MMU && EXPERIMENTAL && (CPU_SUBTYPE_SH7757 || \
110 CPU_SUBTYPE_SH7780 || \
111 CPU_SUBTYPE_SH7785)
112 select 32BIT
113 help
114 If this option is enabled, fixed PMB mappings are inherited
115 from the boot loader, and the kernel does not attempt dynamic
116 management. This is the closest to legacy 29-bit physical mode,
117 and allows systems to support up to 512MiB of system memory.
118
119endchoice
120
121config X2TLB 94config X2TLB
122 bool "Enable extended TLB mode" 95 def_bool y
123 depends on (CPU_SHX2 || CPU_SHX3) && MMU && EXPERIMENTAL 96 depends on (CPU_SHX2 || CPU_SHX3) && MMU
124 help
125 Selecting this option will enable the extended mode of the SH-X2
126 TLB. For legacy SH-X behaviour and interoperability, say N. For
127 all of the fun new features and a willingless to submit bug reports,
128 say Y.
129 97
130config VSYSCALL 98config VSYSCALL
131 bool "Support vsyscall page" 99 bool "Support vsyscall page"
@@ -193,14 +161,19 @@ config ARCH_MEMORY_PROBE
193 def_bool y 161 def_bool y
194 depends on MEMORY_HOTPLUG 162 depends on MEMORY_HOTPLUG
195 163
164config IOREMAP_FIXED
165 def_bool y
166 depends on X2TLB || SUPERH64
167
168config UNCACHED_MAPPING
169 bool
170
196choice 171choice
197 prompt "Kernel page size" 172 prompt "Kernel page size"
198 default PAGE_SIZE_8KB if X2TLB
199 default PAGE_SIZE_4KB 173 default PAGE_SIZE_4KB
200 174
201config PAGE_SIZE_4KB 175config PAGE_SIZE_4KB
202 bool "4kB" 176 bool "4kB"
203 depends on !MMU || !X2TLB
204 help 177 help
205 This is the default page size used by all SuperH CPUs. 178 This is the default page size used by all SuperH CPUs.
206 179
@@ -258,6 +231,15 @@ endchoice
258 231
259source "mm/Kconfig" 232source "mm/Kconfig"
260 233
234config SCHED_MC
235 bool "Multi-core scheduler support"
236 depends on SMP
237 default y
238 help
239 Multi-core scheduler support improves the CPU scheduler's decision
240 making when dealing with multi-core CPU chips at a cost of slightly
241 increased overhead in some places. If unsure say N here.
242
261endmenu 243endmenu
262 244
263menu "Cache configuration" 245menu "Cache configuration"
diff --git a/arch/sh/mm/Makefile b/arch/sh/mm/Makefile
index 3759bf853293..3dc8a8a63822 100644
--- a/arch/sh/mm/Makefile
+++ b/arch/sh/mm/Makefile
@@ -2,7 +2,7 @@
2# Makefile for the Linux SuperH-specific parts of the memory manager. 2# Makefile for the Linux SuperH-specific parts of the memory manager.
3# 3#
4 4
5obj-y := cache.o init.o consistent.o mmap.o 5obj-y := alignment.o cache.o init.o consistent.o mmap.o
6 6
7cacheops-$(CONFIG_CPU_SH2) := cache-sh2.o 7cacheops-$(CONFIG_CPU_SH2) := cache-sh2.o
8cacheops-$(CONFIG_CPU_SH2A) := cache-sh2a.o 8cacheops-$(CONFIG_CPU_SH2A) := cache-sh2a.o
@@ -15,7 +15,7 @@ obj-y += $(cacheops-y)
15 15
16mmu-y := nommu.o extable_32.o 16mmu-y := nommu.o extable_32.o
17mmu-$(CONFIG_MMU) := extable_$(BITS).o fault_$(BITS).o \ 17mmu-$(CONFIG_MMU) := extable_$(BITS).o fault_$(BITS).o \
18 ioremap_$(BITS).o kmap.o tlbflush_$(BITS).o 18 ioremap.o kmap.o pgtable.o tlbflush_$(BITS).o
19 19
20obj-y += $(mmu-y) 20obj-y += $(mmu-y)
21obj-$(CONFIG_DEBUG_FS) += asids-debugfs.o 21obj-$(CONFIG_DEBUG_FS) += asids-debugfs.o
@@ -26,16 +26,17 @@ endif
26 26
27ifdef CONFIG_MMU 27ifdef CONFIG_MMU
28tlb-$(CONFIG_CPU_SH3) := tlb-sh3.o 28tlb-$(CONFIG_CPU_SH3) := tlb-sh3.o
29tlb-$(CONFIG_CPU_SH4) := tlb-sh4.o 29tlb-$(CONFIG_CPU_SH4) := tlb-sh4.o tlb-urb.o
30tlb-$(CONFIG_CPU_SH5) := tlb-sh5.o 30tlb-$(CONFIG_CPU_SH5) := tlb-sh5.o
31tlb-$(CONFIG_CPU_HAS_PTEAEX) := tlb-pteaex.o 31tlb-$(CONFIG_CPU_HAS_PTEAEX) := tlb-pteaex.o tlb-urb.o
32obj-y += $(tlb-y) 32obj-y += $(tlb-y)
33endif 33endif
34 34
35obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o 35obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o
36obj-$(CONFIG_PMB) += pmb.o 36obj-$(CONFIG_PMB) += pmb.o
37obj-$(CONFIG_PMB_FIXED) += pmb-fixed.o
38obj-$(CONFIG_NUMA) += numa.o 37obj-$(CONFIG_NUMA) += numa.o
38obj-$(CONFIG_IOREMAP_FIXED) += ioremap_fixed.o
39obj-$(CONFIG_UNCACHED_MAPPING) += uncached.o
39 40
40# Special flags for fault_64.o. This puts restrictions on the number of 41# Special flags for fault_64.o. This puts restrictions on the number of
41# caller-save registers that the compiler can target when building this file. 42# caller-save registers that the compiler can target when building this file.
diff --git a/arch/sh/mm/alignment.c b/arch/sh/mm/alignment.c
new file mode 100644
index 000000000000..b2595b8548ee
--- /dev/null
+++ b/arch/sh/mm/alignment.c
@@ -0,0 +1,189 @@
1/*
2 * Alignment access counters and corresponding user-space interfaces.
3 *
4 * Copyright (C) 2009 ST Microelectronics
5 * Copyright (C) 2009 - 2010 Paul Mundt
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11#include <linux/module.h>
12#include <linux/kernel.h>
13#include <linux/seq_file.h>
14#include <linux/proc_fs.h>
15#include <linux/uaccess.h>
16#include <asm/alignment.h>
17#include <asm/processor.h>
18
19static unsigned long se_user;
20static unsigned long se_sys;
21static unsigned long se_half;
22static unsigned long se_word;
23static unsigned long se_dword;
24static unsigned long se_multi;
25/* bitfield: 1: warn 2: fixup 4: signal -> combinations 2|4 && 1|2|4 are not
26 valid! */
27static int se_usermode = UM_WARN | UM_FIXUP;
28/* 0: no warning 1: print a warning message, disabled by default */
29static int se_kernmode_warn;
30
31core_param(alignment, se_usermode, int, 0600);
32
33void inc_unaligned_byte_access(void)
34{
35 se_half++;
36}
37
38void inc_unaligned_word_access(void)
39{
40 se_word++;
41}
42
43void inc_unaligned_dword_access(void)
44{
45 se_dword++;
46}
47
48void inc_unaligned_multi_access(void)
49{
50 se_multi++;
51}
52
53void inc_unaligned_user_access(void)
54{
55 se_user++;
56}
57
58void inc_unaligned_kernel_access(void)
59{
60 se_sys++;
61}
62
63/*
64 * This defaults to the global policy which can be set from the command
65 * line, while processes can overload their preferences via prctl().
66 */
67unsigned int unaligned_user_action(void)
68{
69 unsigned int action = se_usermode;
70
71 if (current->thread.flags & SH_THREAD_UAC_SIGBUS) {
72 action &= ~UM_FIXUP;
73 action |= UM_SIGNAL;
74 }
75
76 if (current->thread.flags & SH_THREAD_UAC_NOPRINT)
77 action &= ~UM_WARN;
78
79 return action;
80}
81
82int get_unalign_ctl(struct task_struct *tsk, unsigned long addr)
83{
84 return put_user(tsk->thread.flags & SH_THREAD_UAC_MASK,
85 (unsigned int __user *)addr);
86}
87
88int set_unalign_ctl(struct task_struct *tsk, unsigned int val)
89{
90 tsk->thread.flags = (tsk->thread.flags & ~SH_THREAD_UAC_MASK) |
91 (val & SH_THREAD_UAC_MASK);
92 return 0;
93}
94
95void unaligned_fixups_notify(struct task_struct *tsk, insn_size_t insn,
96 struct pt_regs *regs)
97{
98 if (user_mode(regs) && (se_usermode & UM_WARN) && printk_ratelimit())
99 pr_notice("Fixing up unaligned userspace access "
100 "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n",
101 tsk->comm, task_pid_nr(tsk),
102 (void *)instruction_pointer(regs), insn);
103 else if (se_kernmode_warn && printk_ratelimit())
104 pr_notice("Fixing up unaligned kernel access "
105 "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n",
106 tsk->comm, task_pid_nr(tsk),
107 (void *)instruction_pointer(regs), insn);
108}
109
110static const char *se_usermode_action[] = {
111 "ignored",
112 "warn",
113 "fixup",
114 "fixup+warn",
115 "signal",
116 "signal+warn"
117};
118
119static int alignment_proc_show(struct seq_file *m, void *v)
120{
121 seq_printf(m, "User:\t\t%lu\n", se_user);
122 seq_printf(m, "System:\t\t%lu\n", se_sys);
123 seq_printf(m, "Half:\t\t%lu\n", se_half);
124 seq_printf(m, "Word:\t\t%lu\n", se_word);
125 seq_printf(m, "DWord:\t\t%lu\n", se_dword);
126 seq_printf(m, "Multi:\t\t%lu\n", se_multi);
127 seq_printf(m, "User faults:\t%i (%s)\n", se_usermode,
128 se_usermode_action[se_usermode]);
129 seq_printf(m, "Kernel faults:\t%i (fixup%s)\n", se_kernmode_warn,
130 se_kernmode_warn ? "+warn" : "");
131 return 0;
132}
133
134static int alignment_proc_open(struct inode *inode, struct file *file)
135{
136 return single_open(file, alignment_proc_show, NULL);
137}
138
139static ssize_t alignment_proc_write(struct file *file,
140 const char __user *buffer, size_t count, loff_t *pos)
141{
142 int *data = PDE(file->f_path.dentry->d_inode)->data;
143 char mode;
144
145 if (count > 0) {
146 if (get_user(mode, buffer))
147 return -EFAULT;
148 if (mode >= '0' && mode <= '5')
149 *data = mode - '0';
150 }
151 return count;
152}
153
154static const struct file_operations alignment_proc_fops = {
155 .owner = THIS_MODULE,
156 .open = alignment_proc_open,
157 .read = seq_read,
158 .llseek = seq_lseek,
159 .release = single_release,
160 .write = alignment_proc_write,
161};
162
163/*
164 * This needs to be done after sysctl_init, otherwise sys/ will be
165 * overwritten. Actually, this shouldn't be in sys/ at all since
166 * it isn't a sysctl, and it doesn't contain sysctl information.
167 * We now locate it in /proc/cpu/alignment instead.
168 */
169static int __init alignment_init(void)
170{
171 struct proc_dir_entry *dir, *res;
172
173 dir = proc_mkdir("cpu", NULL);
174 if (!dir)
175 return -ENOMEM;
176
177 res = proc_create_data("alignment", S_IWUSR | S_IRUGO, dir,
178 &alignment_proc_fops, &se_usermode);
179 if (!res)
180 return -ENOMEM;
181
182 res = proc_create_data("kernel_alignment", S_IWUSR | S_IRUGO, dir,
183 &alignment_proc_fops, &se_kernmode_warn);
184 if (!res)
185 return -ENOMEM;
186
187 return 0;
188}
189fs_initcall(alignment_init);
diff --git a/arch/sh/mm/cache-debugfs.c b/arch/sh/mm/cache-debugfs.c
index 5ba067b26591..690ed010d002 100644
--- a/arch/sh/mm/cache-debugfs.c
+++ b/arch/sh/mm/cache-debugfs.c
@@ -22,8 +22,7 @@ enum cache_type {
22 CACHE_TYPE_UNIFIED, 22 CACHE_TYPE_UNIFIED,
23}; 23};
24 24
25static int __uses_jump_to_uncached cache_seq_show(struct seq_file *file, 25static int cache_seq_show(struct seq_file *file, void *iter)
26 void *iter)
27{ 26{
28 unsigned int cache_type = (unsigned int)file->private; 27 unsigned int cache_type = (unsigned int)file->private;
29 struct cache_info *cache; 28 struct cache_info *cache;
@@ -37,7 +36,7 @@ static int __uses_jump_to_uncached cache_seq_show(struct seq_file *file,
37 */ 36 */
38 jump_to_uncached(); 37 jump_to_uncached();
39 38
40 ccr = ctrl_inl(CCR); 39 ccr = __raw_readl(CCR);
41 if ((ccr & CCR_CACHE_ENABLE) == 0) { 40 if ((ccr & CCR_CACHE_ENABLE) == 0) {
42 back_to_cached(); 41 back_to_cached();
43 42
@@ -90,7 +89,7 @@ static int __uses_jump_to_uncached cache_seq_show(struct seq_file *file,
90 for (addr = addrstart, line = 0; 89 for (addr = addrstart, line = 0;
91 addr < addrstart + waysize; 90 addr < addrstart + waysize;
92 addr += cache->linesz, line++) { 91 addr += cache->linesz, line++) {
93 unsigned long data = ctrl_inl(addr); 92 unsigned long data = __raw_readl(addr);
94 93
95 /* Check the V bit, ignore invalid cachelines */ 94 /* Check the V bit, ignore invalid cachelines */
96 if ((data & 1) == 0) 95 if ((data & 1) == 0)
diff --git a/arch/sh/mm/cache-sh2.c b/arch/sh/mm/cache-sh2.c
index 699a71f46327..defcf719f2e8 100644
--- a/arch/sh/mm/cache-sh2.c
+++ b/arch/sh/mm/cache-sh2.c
@@ -28,10 +28,10 @@ static void sh2__flush_wback_region(void *start, int size)
28 unsigned long addr = CACHE_OC_ADDRESS_ARRAY | (v & 0x00000ff0); 28 unsigned long addr = CACHE_OC_ADDRESS_ARRAY | (v & 0x00000ff0);
29 int way; 29 int way;
30 for (way = 0; way < 4; way++) { 30 for (way = 0; way < 4; way++) {
31 unsigned long data = ctrl_inl(addr | (way << 12)); 31 unsigned long data = __raw_readl(addr | (way << 12));
32 if ((data & CACHE_PHYSADDR_MASK) == (v & CACHE_PHYSADDR_MASK)) { 32 if ((data & CACHE_PHYSADDR_MASK) == (v & CACHE_PHYSADDR_MASK)) {
33 data &= ~SH_CACHE_UPDATED; 33 data &= ~SH_CACHE_UPDATED;
34 ctrl_outl(data, addr | (way << 12)); 34 __raw_writel(data, addr | (way << 12));
35 } 35 }
36 } 36 }
37 } 37 }
@@ -47,7 +47,7 @@ static void sh2__flush_purge_region(void *start, int size)
47 & ~(L1_CACHE_BYTES-1); 47 & ~(L1_CACHE_BYTES-1);
48 48
49 for (v = begin; v < end; v+=L1_CACHE_BYTES) 49 for (v = begin; v < end; v+=L1_CACHE_BYTES)
50 ctrl_outl((v & CACHE_PHYSADDR_MASK), 50 __raw_writel((v & CACHE_PHYSADDR_MASK),
51 CACHE_OC_ADDRESS_ARRAY | (v & 0x00000ff0) | 0x00000008); 51 CACHE_OC_ADDRESS_ARRAY | (v & 0x00000ff0) | 0x00000008);
52} 52}
53 53
@@ -63,9 +63,9 @@ static void sh2__flush_invalidate_region(void *start, int size)
63 local_irq_save(flags); 63 local_irq_save(flags);
64 jump_to_uncached(); 64 jump_to_uncached();
65 65
66 ccr = ctrl_inl(CCR); 66 ccr = __raw_readl(CCR);
67 ccr |= CCR_CACHE_INVALIDATE; 67 ccr |= CCR_CACHE_INVALIDATE;
68 ctrl_outl(ccr, CCR); 68 __raw_writel(ccr, CCR);
69 69
70 back_to_cached(); 70 back_to_cached();
71 local_irq_restore(flags); 71 local_irq_restore(flags);
@@ -78,7 +78,7 @@ static void sh2__flush_invalidate_region(void *start, int size)
78 & ~(L1_CACHE_BYTES-1); 78 & ~(L1_CACHE_BYTES-1);
79 79
80 for (v = begin; v < end; v+=L1_CACHE_BYTES) 80 for (v = begin; v < end; v+=L1_CACHE_BYTES)
81 ctrl_outl((v & CACHE_PHYSADDR_MASK), 81 __raw_writel((v & CACHE_PHYSADDR_MASK),
82 CACHE_OC_ADDRESS_ARRAY | (v & 0x00000ff0) | 0x00000008); 82 CACHE_OC_ADDRESS_ARRAY | (v & 0x00000ff0) | 0x00000008);
83#endif 83#endif
84} 84}
diff --git a/arch/sh/mm/cache-sh2a.c b/arch/sh/mm/cache-sh2a.c
index 975899d83564..1f51225426a2 100644
--- a/arch/sh/mm/cache-sh2a.c
+++ b/arch/sh/mm/cache-sh2a.c
@@ -32,10 +32,10 @@ static void sh2a__flush_wback_region(void *start, int size)
32 unsigned long addr = CACHE_OC_ADDRESS_ARRAY | (v & 0x000007f0); 32 unsigned long addr = CACHE_OC_ADDRESS_ARRAY | (v & 0x000007f0);
33 int way; 33 int way;
34 for (way = 0; way < 4; way++) { 34 for (way = 0; way < 4; way++) {
35 unsigned long data = ctrl_inl(addr | (way << 11)); 35 unsigned long data = __raw_readl(addr | (way << 11));
36 if ((data & CACHE_PHYSADDR_MASK) == (v & CACHE_PHYSADDR_MASK)) { 36 if ((data & CACHE_PHYSADDR_MASK) == (v & CACHE_PHYSADDR_MASK)) {
37 data &= ~SH_CACHE_UPDATED; 37 data &= ~SH_CACHE_UPDATED;
38 ctrl_outl(data, addr | (way << 11)); 38 __raw_writel(data, addr | (way << 11));
39 } 39 }
40 } 40 }
41 } 41 }
@@ -58,7 +58,7 @@ static void sh2a__flush_purge_region(void *start, int size)
58 jump_to_uncached(); 58 jump_to_uncached();
59 59
60 for (v = begin; v < end; v+=L1_CACHE_BYTES) { 60 for (v = begin; v < end; v+=L1_CACHE_BYTES) {
61 ctrl_outl((v & CACHE_PHYSADDR_MASK), 61 __raw_writel((v & CACHE_PHYSADDR_MASK),
62 CACHE_OC_ADDRESS_ARRAY | (v & 0x000007f0) | 0x00000008); 62 CACHE_OC_ADDRESS_ARRAY | (v & 0x000007f0) | 0x00000008);
63 } 63 }
64 back_to_cached(); 64 back_to_cached();
@@ -78,17 +78,17 @@ static void sh2a__flush_invalidate_region(void *start, int size)
78 jump_to_uncached(); 78 jump_to_uncached();
79 79
80#ifdef CONFIG_CACHE_WRITEBACK 80#ifdef CONFIG_CACHE_WRITEBACK
81 ctrl_outl(ctrl_inl(CCR) | CCR_OCACHE_INVALIDATE, CCR); 81 __raw_writel(__raw_readl(CCR) | CCR_OCACHE_INVALIDATE, CCR);
82 /* I-cache invalidate */ 82 /* I-cache invalidate */
83 for (v = begin; v < end; v+=L1_CACHE_BYTES) { 83 for (v = begin; v < end; v+=L1_CACHE_BYTES) {
84 ctrl_outl((v & CACHE_PHYSADDR_MASK), 84 __raw_writel((v & CACHE_PHYSADDR_MASK),
85 CACHE_IC_ADDRESS_ARRAY | (v & 0x000007f0) | 0x00000008); 85 CACHE_IC_ADDRESS_ARRAY | (v & 0x000007f0) | 0x00000008);
86 } 86 }
87#else 87#else
88 for (v = begin; v < end; v+=L1_CACHE_BYTES) { 88 for (v = begin; v < end; v+=L1_CACHE_BYTES) {
89 ctrl_outl((v & CACHE_PHYSADDR_MASK), 89 __raw_writel((v & CACHE_PHYSADDR_MASK),
90 CACHE_IC_ADDRESS_ARRAY | (v & 0x000007f0) | 0x00000008); 90 CACHE_IC_ADDRESS_ARRAY | (v & 0x000007f0) | 0x00000008);
91 ctrl_outl((v & CACHE_PHYSADDR_MASK), 91 __raw_writel((v & CACHE_PHYSADDR_MASK),
92 CACHE_OC_ADDRESS_ARRAY | (v & 0x000007f0) | 0x00000008); 92 CACHE_OC_ADDRESS_ARRAY | (v & 0x000007f0) | 0x00000008);
93 } 93 }
94#endif 94#endif
@@ -115,14 +115,14 @@ static void sh2a_flush_icache_range(void *args)
115 int way; 115 int way;
116 /* O-Cache writeback */ 116 /* O-Cache writeback */
117 for (way = 0; way < 4; way++) { 117 for (way = 0; way < 4; way++) {
118 unsigned long data = ctrl_inl(CACHE_OC_ADDRESS_ARRAY | addr | (way << 11)); 118 unsigned long data = __raw_readl(CACHE_OC_ADDRESS_ARRAY | addr | (way << 11));
119 if ((data & CACHE_PHYSADDR_MASK) == (v & CACHE_PHYSADDR_MASK)) { 119 if ((data & CACHE_PHYSADDR_MASK) == (v & CACHE_PHYSADDR_MASK)) {
120 data &= ~SH_CACHE_UPDATED; 120 data &= ~SH_CACHE_UPDATED;
121 ctrl_outl(data, CACHE_OC_ADDRESS_ARRAY | addr | (way << 11)); 121 __raw_writel(data, CACHE_OC_ADDRESS_ARRAY | addr | (way << 11));
122 } 122 }
123 } 123 }
124 /* I-Cache invalidate */ 124 /* I-Cache invalidate */
125 ctrl_outl(addr, 125 __raw_writel(addr,
126 CACHE_IC_ADDRESS_ARRAY | addr | 0x00000008); 126 CACHE_IC_ADDRESS_ARRAY | addr | 0x00000008);
127 } 127 }
128 128
diff --git a/arch/sh/mm/cache-sh3.c b/arch/sh/mm/cache-sh3.c
index faef80c98134..e37523f65195 100644
--- a/arch/sh/mm/cache-sh3.c
+++ b/arch/sh/mm/cache-sh3.c
@@ -50,12 +50,12 @@ static void sh3__flush_wback_region(void *start, int size)
50 p = __pa(v); 50 p = __pa(v);
51 addr = addrstart | (v & current_cpu_data.dcache.entry_mask); 51 addr = addrstart | (v & current_cpu_data.dcache.entry_mask);
52 local_irq_save(flags); 52 local_irq_save(flags);
53 data = ctrl_inl(addr); 53 data = __raw_readl(addr);
54 54
55 if ((data & CACHE_PHYSADDR_MASK) == 55 if ((data & CACHE_PHYSADDR_MASK) ==
56 (p & CACHE_PHYSADDR_MASK)) { 56 (p & CACHE_PHYSADDR_MASK)) {
57 data &= ~SH_CACHE_UPDATED; 57 data &= ~SH_CACHE_UPDATED;
58 ctrl_outl(data, addr); 58 __raw_writel(data, addr);
59 local_irq_restore(flags); 59 local_irq_restore(flags);
60 break; 60 break;
61 } 61 }
@@ -86,7 +86,7 @@ static void sh3__flush_purge_region(void *start, int size)
86 data = (v & 0xfffffc00); /* _Virtual_ address, ~U, ~V */ 86 data = (v & 0xfffffc00); /* _Virtual_ address, ~U, ~V */
87 addr = CACHE_OC_ADDRESS_ARRAY | 87 addr = CACHE_OC_ADDRESS_ARRAY |
88 (v & current_cpu_data.dcache.entry_mask) | SH_CACHE_ASSOC; 88 (v & current_cpu_data.dcache.entry_mask) | SH_CACHE_ASSOC;
89 ctrl_outl(data, addr); 89 __raw_writel(data, addr);
90 } 90 }
91} 91}
92 92
diff --git a/arch/sh/mm/cache-sh4.c b/arch/sh/mm/cache-sh4.c
index b7f235c74d66..2cfae81914aa 100644
--- a/arch/sh/mm/cache-sh4.c
+++ b/arch/sh/mm/cache-sh4.c
@@ -2,7 +2,7 @@
2 * arch/sh/mm/cache-sh4.c 2 * arch/sh/mm/cache-sh4.c
3 * 3 *
4 * Copyright (C) 1999, 2000, 2002 Niibe Yutaka 4 * Copyright (C) 1999, 2000, 2002 Niibe Yutaka
5 * Copyright (C) 2001 - 2007 Paul Mundt 5 * Copyright (C) 2001 - 2009 Paul Mundt
6 * Copyright (C) 2003 Richard Curnow 6 * Copyright (C) 2003 Richard Curnow
7 * Copyright (c) 2007 STMicroelectronics (R&D) Ltd. 7 * Copyright (c) 2007 STMicroelectronics (R&D) Ltd.
8 * 8 *
@@ -15,6 +15,8 @@
15#include <linux/io.h> 15#include <linux/io.h>
16#include <linux/mutex.h> 16#include <linux/mutex.h>
17#include <linux/fs.h> 17#include <linux/fs.h>
18#include <linux/highmem.h>
19#include <asm/pgtable.h>
18#include <asm/mmu_context.h> 20#include <asm/mmu_context.h>
19#include <asm/cacheflush.h> 21#include <asm/cacheflush.h>
20 22
@@ -23,27 +25,18 @@
23 * flushing. Anything exceeding this will simply flush the dcache in its 25 * flushing. Anything exceeding this will simply flush the dcache in its
24 * entirety. 26 * entirety.
25 */ 27 */
26#define MAX_DCACHE_PAGES 64 /* XXX: Tune for ways */
27#define MAX_ICACHE_PAGES 32 28#define MAX_ICACHE_PAGES 32
28 29
29static void __flush_cache_one(unsigned long addr, unsigned long phys, 30static void __flush_cache_one(unsigned long addr, unsigned long phys,
30 unsigned long exec_offset); 31 unsigned long exec_offset);
31 32
32/* 33/*
33 * This is initialised here to ensure that it is not placed in the BSS. If
34 * that were to happen, note that cache_init gets called before the BSS is
35 * cleared, so this would get nulled out which would be hopeless.
36 */
37static void (*__flush_dcache_segment_fn)(unsigned long, unsigned long) =
38 (void (*)(unsigned long, unsigned long))0xdeadbeef;
39
40/*
41 * Write back the range of D-cache, and purge the I-cache. 34 * Write back the range of D-cache, and purge the I-cache.
42 * 35 *
43 * Called from kernel/module.c:sys_init_module and routine for a.out format, 36 * Called from kernel/module.c:sys_init_module and routine for a.out format,
44 * signal handler code and kprobes code 37 * signal handler code and kprobes code
45 */ 38 */
46static void __uses_jump_to_uncached sh4_flush_icache_range(void *args) 39static void sh4_flush_icache_range(void *args)
47{ 40{
48 struct flusher_data *data = args; 41 struct flusher_data *data = args;
49 unsigned long start, end; 42 unsigned long start, end;
@@ -97,15 +90,15 @@ static inline void flush_cache_one(unsigned long start, unsigned long phys)
97 unsigned long flags, exec_offset = 0; 90 unsigned long flags, exec_offset = 0;
98 91
99 /* 92 /*
100 * All types of SH-4 require PC to be in P2 to operate on the I-cache. 93 * All types of SH-4 require PC to be uncached to operate on the I-cache.
101 * Some types of SH-4 require PC to be in P2 to operate on the D-cache. 94 * Some types of SH-4 require PC to be uncached to operate on the D-cache.
102 */ 95 */
103 if ((boot_cpu_data.flags & CPU_HAS_P2_FLUSH_BUG) || 96 if ((boot_cpu_data.flags & CPU_HAS_P2_FLUSH_BUG) ||
104 (start < CACHE_OC_ADDRESS_ARRAY)) 97 (start < CACHE_OC_ADDRESS_ARRAY))
105 exec_offset = 0x20000000; 98 exec_offset = cached_to_uncached;
106 99
107 local_irq_save(flags); 100 local_irq_save(flags);
108 __flush_cache_one(start | SH_CACHE_ASSOC, P1SEGADDR(phys), exec_offset); 101 __flush_cache_one(start, phys, exec_offset);
109 local_irq_restore(flags); 102 local_irq_restore(flags);
110} 103}
111 104
@@ -116,6 +109,7 @@ static inline void flush_cache_one(unsigned long start, unsigned long phys)
116static void sh4_flush_dcache_page(void *arg) 109static void sh4_flush_dcache_page(void *arg)
117{ 110{
118 struct page *page = arg; 111 struct page *page = arg;
112 unsigned long addr = (unsigned long)page_address(page);
119#ifndef CONFIG_SMP 113#ifndef CONFIG_SMP
120 struct address_space *mapping = page_mapping(page); 114 struct address_space *mapping = page_mapping(page);
121 115
@@ -123,22 +117,14 @@ static void sh4_flush_dcache_page(void *arg)
123 set_bit(PG_dcache_dirty, &page->flags); 117 set_bit(PG_dcache_dirty, &page->flags);
124 else 118 else
125#endif 119#endif
126 { 120 flush_cache_one(CACHE_OC_ADDRESS_ARRAY |
127 unsigned long phys = PHYSADDR(page_address(page)); 121 (addr & shm_align_mask), page_to_phys(page));
128 unsigned long addr = CACHE_OC_ADDRESS_ARRAY;
129 int i, n;
130
131 /* Loop all the D-cache */
132 n = boot_cpu_data.dcache.n_aliases;
133 for (i = 0; i < n; i++, addr += PAGE_SIZE)
134 flush_cache_one(addr, phys);
135 }
136 122
137 wmb(); 123 wmb();
138} 124}
139 125
140/* TODO: Selective icache invalidation through IC address array.. */ 126/* TODO: Selective icache invalidation through IC address array.. */
141static void __uses_jump_to_uncached flush_icache_all(void) 127static void flush_icache_all(void)
142{ 128{
143 unsigned long flags, ccr; 129 unsigned long flags, ccr;
144 130
@@ -146,9 +132,9 @@ static void __uses_jump_to_uncached flush_icache_all(void)
146 jump_to_uncached(); 132 jump_to_uncached();
147 133
148 /* Flush I-cache */ 134 /* Flush I-cache */
149 ccr = ctrl_inl(CCR); 135 ccr = __raw_readl(CCR);
150 ccr |= CCR_CACHE_ICI; 136 ccr |= CCR_CACHE_ICI;
151 ctrl_outl(ccr, CCR); 137 __raw_writel(ccr, CCR);
152 138
153 /* 139 /*
154 * back_to_cached() will take care of the barrier for us, don't add 140 * back_to_cached() will take care of the barrier for us, don't add
@@ -159,10 +145,27 @@ static void __uses_jump_to_uncached flush_icache_all(void)
159 local_irq_restore(flags); 145 local_irq_restore(flags);
160} 146}
161 147
162static inline void flush_dcache_all(void) 148static void flush_dcache_all(void)
163{ 149{
164 (*__flush_dcache_segment_fn)(0UL, boot_cpu_data.dcache.way_size); 150 unsigned long addr, end_addr, entry_offset;
165 wmb(); 151
152 end_addr = CACHE_OC_ADDRESS_ARRAY +
153 (current_cpu_data.dcache.sets <<
154 current_cpu_data.dcache.entry_shift) *
155 current_cpu_data.dcache.ways;
156
157 entry_offset = 1 << current_cpu_data.dcache.entry_shift;
158
159 for (addr = CACHE_OC_ADDRESS_ARRAY; addr < end_addr; ) {
160 __raw_writel(0, addr); addr += entry_offset;
161 __raw_writel(0, addr); addr += entry_offset;
162 __raw_writel(0, addr); addr += entry_offset;
163 __raw_writel(0, addr); addr += entry_offset;
164 __raw_writel(0, addr); addr += entry_offset;
165 __raw_writel(0, addr); addr += entry_offset;
166 __raw_writel(0, addr); addr += entry_offset;
167 __raw_writel(0, addr); addr += entry_offset;
168 }
166} 169}
167 170
168static void sh4_flush_cache_all(void *unused) 171static void sh4_flush_cache_all(void *unused)
@@ -171,89 +174,13 @@ static void sh4_flush_cache_all(void *unused)
171 flush_icache_all(); 174 flush_icache_all();
172} 175}
173 176
174static void __flush_cache_mm(struct mm_struct *mm, unsigned long start,
175 unsigned long end)
176{
177 unsigned long d = 0, p = start & PAGE_MASK;
178 unsigned long alias_mask = boot_cpu_data.dcache.alias_mask;
179 unsigned long n_aliases = boot_cpu_data.dcache.n_aliases;
180 unsigned long select_bit;
181 unsigned long all_aliases_mask;
182 unsigned long addr_offset;
183 pgd_t *dir;
184 pmd_t *pmd;
185 pud_t *pud;
186 pte_t *pte;
187 int i;
188
189 dir = pgd_offset(mm, p);
190 pud = pud_offset(dir, p);
191 pmd = pmd_offset(pud, p);
192 end = PAGE_ALIGN(end);
193
194 all_aliases_mask = (1 << n_aliases) - 1;
195
196 do {
197 if (pmd_none(*pmd) || unlikely(pmd_bad(*pmd))) {
198 p &= PMD_MASK;
199 p += PMD_SIZE;
200 pmd++;
201
202 continue;
203 }
204
205 pte = pte_offset_kernel(pmd, p);
206
207 do {
208 unsigned long phys;
209 pte_t entry = *pte;
210
211 if (!(pte_val(entry) & _PAGE_PRESENT)) {
212 pte++;
213 p += PAGE_SIZE;
214 continue;
215 }
216
217 phys = pte_val(entry) & PTE_PHYS_MASK;
218
219 if ((p ^ phys) & alias_mask) {
220 d |= 1 << ((p & alias_mask) >> PAGE_SHIFT);
221 d |= 1 << ((phys & alias_mask) >> PAGE_SHIFT);
222
223 if (d == all_aliases_mask)
224 goto loop_exit;
225 }
226
227 pte++;
228 p += PAGE_SIZE;
229 } while (p < end && ((unsigned long)pte & ~PAGE_MASK));
230 pmd++;
231 } while (p < end);
232
233loop_exit:
234 addr_offset = 0;
235 select_bit = 1;
236
237 for (i = 0; i < n_aliases; i++) {
238 if (d & select_bit) {
239 (*__flush_dcache_segment_fn)(addr_offset, PAGE_SIZE);
240 wmb();
241 }
242
243 select_bit <<= 1;
244 addr_offset += PAGE_SIZE;
245 }
246}
247
248/* 177/*
249 * Note : (RPC) since the caches are physically tagged, the only point 178 * Note : (RPC) since the caches are physically tagged, the only point
250 * of flush_cache_mm for SH-4 is to get rid of aliases from the 179 * of flush_cache_mm for SH-4 is to get rid of aliases from the
251 * D-cache. The assumption elsewhere, e.g. flush_cache_range, is that 180 * D-cache. The assumption elsewhere, e.g. flush_cache_range, is that
252 * lines can stay resident so long as the virtual address they were 181 * lines can stay resident so long as the virtual address they were
253 * accessed with (hence cache set) is in accord with the physical 182 * accessed with (hence cache set) is in accord with the physical
254 * address (i.e. tag). It's no different here. So I reckon we don't 183 * address (i.e. tag). It's no different here.
255 * need to flush the I-cache, since aliases don't matter for that. We
256 * should try that.
257 * 184 *
258 * Caller takes mm->mmap_sem. 185 * Caller takes mm->mmap_sem.
259 */ 186 */
@@ -264,33 +191,7 @@ static void sh4_flush_cache_mm(void *arg)
264 if (cpu_context(smp_processor_id(), mm) == NO_CONTEXT) 191 if (cpu_context(smp_processor_id(), mm) == NO_CONTEXT)
265 return; 192 return;
266 193
267 /* 194 flush_dcache_all();
268 * If cache is only 4k-per-way, there are never any 'aliases'. Since
269 * the cache is physically tagged, the data can just be left in there.
270 */
271 if (boot_cpu_data.dcache.n_aliases == 0)
272 return;
273
274 /*
275 * Don't bother groveling around the dcache for the VMA ranges
276 * if there are too many PTEs to make it worthwhile.
277 */
278 if (mm->nr_ptes >= MAX_DCACHE_PAGES)
279 flush_dcache_all();
280 else {
281 struct vm_area_struct *vma;
282
283 /*
284 * In this case there are reasonably sized ranges to flush,
285 * iterate through the VMA list and take care of any aliases.
286 */
287 for (vma = mm->mmap; vma; vma = vma->vm_next)
288 __flush_cache_mm(mm, vma->vm_start, vma->vm_end);
289 }
290
291 /* Only touch the icache if one of the VMAs has VM_EXEC set. */
292 if (mm->exec_vm)
293 flush_icache_all();
294} 195}
295 196
296/* 197/*
@@ -303,44 +204,62 @@ static void sh4_flush_cache_page(void *args)
303{ 204{
304 struct flusher_data *data = args; 205 struct flusher_data *data = args;
305 struct vm_area_struct *vma; 206 struct vm_area_struct *vma;
207 struct page *page;
306 unsigned long address, pfn, phys; 208 unsigned long address, pfn, phys;
307 unsigned int alias_mask; 209 int map_coherent = 0;
210 pgd_t *pgd;
211 pud_t *pud;
212 pmd_t *pmd;
213 pte_t *pte;
214 void *vaddr;
308 215
309 vma = data->vma; 216 vma = data->vma;
310 address = data->addr1; 217 address = data->addr1 & PAGE_MASK;
311 pfn = data->addr2; 218 pfn = data->addr2;
312 phys = pfn << PAGE_SHIFT; 219 phys = pfn << PAGE_SHIFT;
220 page = pfn_to_page(pfn);
313 221
314 if (cpu_context(smp_processor_id(), vma->vm_mm) == NO_CONTEXT) 222 if (cpu_context(smp_processor_id(), vma->vm_mm) == NO_CONTEXT)
315 return; 223 return;
316 224
317 alias_mask = boot_cpu_data.dcache.alias_mask; 225 pgd = pgd_offset(vma->vm_mm, address);
318 226 pud = pud_offset(pgd, address);
319 /* We only need to flush D-cache when we have alias */ 227 pmd = pmd_offset(pud, address);
320 if ((address^phys) & alias_mask) { 228 pte = pte_offset_kernel(pmd, address);
321 /* Loop 4K of the D-cache */ 229
322 flush_cache_one( 230 /* If the page isn't present, there is nothing to do here. */
323 CACHE_OC_ADDRESS_ARRAY | (address & alias_mask), 231 if (!(pte_val(*pte) & _PAGE_PRESENT))
324 phys); 232 return;
325 /* Loop another 4K of the D-cache */
326 flush_cache_one(
327 CACHE_OC_ADDRESS_ARRAY | (phys & alias_mask),
328 phys);
329 }
330 233
331 alias_mask = boot_cpu_data.icache.alias_mask; 234 if ((vma->vm_mm == current->active_mm))
332 if (vma->vm_flags & VM_EXEC) { 235 vaddr = NULL;
236 else {
333 /* 237 /*
334 * Evict entries from the portion of the cache from which code 238 * Use kmap_coherent or kmap_atomic to do flushes for
335 * may have been executed at this address (virtual). There's 239 * another ASID than the current one.
336 * no need to evict from the portion corresponding to the
337 * physical address as for the D-cache, because we know the
338 * kernel has never executed the code through its identity
339 * translation.
340 */ 240 */
341 flush_cache_one( 241 map_coherent = (current_cpu_data.dcache.n_aliases &&
342 CACHE_IC_ADDRESS_ARRAY | (address & alias_mask), 242 !test_bit(PG_dcache_dirty, &page->flags) &&
343 phys); 243 page_mapped(page));
244 if (map_coherent)
245 vaddr = kmap_coherent(page, address);
246 else
247 vaddr = kmap_atomic(page, KM_USER0);
248
249 address = (unsigned long)vaddr;
250 }
251
252 flush_cache_one(CACHE_OC_ADDRESS_ARRAY |
253 (address & shm_align_mask), phys);
254
255 if (vma->vm_flags & VM_EXEC)
256 flush_icache_all();
257
258 if (vaddr) {
259 if (map_coherent)
260 kunmap_coherent(vaddr);
261 else
262 kunmap_atomic(vaddr, KM_USER0);
344 } 263 }
345} 264}
346 265
@@ -373,24 +292,10 @@ static void sh4_flush_cache_range(void *args)
373 if (boot_cpu_data.dcache.n_aliases == 0) 292 if (boot_cpu_data.dcache.n_aliases == 0)
374 return; 293 return;
375 294
376 /* 295 flush_dcache_all();
377 * Don't bother with the lookup and alias check if we have a
378 * wide range to cover, just blow away the dcache in its
379 * entirety instead. -- PFM.
380 */
381 if (((end - start) >> PAGE_SHIFT) >= MAX_DCACHE_PAGES)
382 flush_dcache_all();
383 else
384 __flush_cache_mm(vma->vm_mm, start, end);
385 296
386 if (vma->vm_flags & VM_EXEC) { 297 if (vma->vm_flags & VM_EXEC)
387 /*
388 * TODO: Is this required??? Need to look at how I-cache
389 * coherency is assured when new programs are loaded to see if
390 * this matters.
391 */
392 flush_icache_all(); 298 flush_icache_all();
393 }
394} 299}
395 300
396/** 301/**
@@ -464,245 +369,6 @@ static void __flush_cache_one(unsigned long addr, unsigned long phys,
464 } while (--way_count != 0); 369 } while (--way_count != 0);
465} 370}
466 371
467/*
468 * Break the 1, 2 and 4 way variants of this out into separate functions to
469 * avoid nearly all the overhead of having the conditional stuff in the function
470 * bodies (+ the 1 and 2 way cases avoid saving any registers too).
471 *
472 * We want to eliminate unnecessary bus transactions, so this code uses
473 * a non-obvious technique.
474 *
475 * Loop over a cache way sized block of, one cache line at a time. For each
476 * line, use movca.a to cause the current cache line contents to be written
477 * back, but without reading anything from main memory. However this has the
478 * side effect that the cache is now caching that memory location. So follow
479 * this with a cache invalidate to mark the cache line invalid. And do all
480 * this with interrupts disabled, to avoid the cache line being accidently
481 * evicted while it is holding garbage.
482 *
483 * This also breaks in a number of circumstances:
484 * - if there are modifications to the region of memory just above
485 * empty_zero_page (for example because a breakpoint has been placed
486 * there), then these can be lost.
487 *
488 * This is because the the memory address which the cache temporarily
489 * caches in the above description is empty_zero_page. So the
490 * movca.l hits the cache (it is assumed that it misses, or at least
491 * isn't dirty), modifies the line and then invalidates it, losing the
492 * required change.
493 *
494 * - If caches are disabled or configured in write-through mode, then
495 * the movca.l writes garbage directly into memory.
496 */
497static void __flush_dcache_segment_writethrough(unsigned long start,
498 unsigned long extent_per_way)
499{
500 unsigned long addr;
501 int i;
502
503 addr = CACHE_OC_ADDRESS_ARRAY | (start & cpu_data->dcache.entry_mask);
504
505 while (extent_per_way) {
506 for (i = 0; i < cpu_data->dcache.ways; i++)
507 __raw_writel(0, addr + cpu_data->dcache.way_incr * i);
508
509 addr += cpu_data->dcache.linesz;
510 extent_per_way -= cpu_data->dcache.linesz;
511 }
512}
513
514static void __flush_dcache_segment_1way(unsigned long start,
515 unsigned long extent_per_way)
516{
517 unsigned long orig_sr, sr_with_bl;
518 unsigned long base_addr;
519 unsigned long way_incr, linesz, way_size;
520 struct cache_info *dcache;
521 register unsigned long a0, a0e;
522
523 asm volatile("stc sr, %0" : "=r" (orig_sr));
524 sr_with_bl = orig_sr | (1<<28);
525 base_addr = ((unsigned long)&empty_zero_page[0]);
526
527 /*
528 * The previous code aligned base_addr to 16k, i.e. the way_size of all
529 * existing SH-4 D-caches. Whilst I don't see a need to have this
530 * aligned to any better than the cache line size (which it will be
531 * anyway by construction), let's align it to at least the way_size of
532 * any existing or conceivable SH-4 D-cache. -- RPC
533 */
534 base_addr = ((base_addr >> 16) << 16);
535 base_addr |= start;
536
537 dcache = &boot_cpu_data.dcache;
538 linesz = dcache->linesz;
539 way_incr = dcache->way_incr;
540 way_size = dcache->way_size;
541
542 a0 = base_addr;
543 a0e = base_addr + extent_per_way;
544 do {
545 asm volatile("ldc %0, sr" : : "r" (sr_with_bl));
546 asm volatile("movca.l r0, @%0\n\t"
547 "ocbi @%0" : : "r" (a0));
548 a0 += linesz;
549 asm volatile("movca.l r0, @%0\n\t"
550 "ocbi @%0" : : "r" (a0));
551 a0 += linesz;
552 asm volatile("movca.l r0, @%0\n\t"
553 "ocbi @%0" : : "r" (a0));
554 a0 += linesz;
555 asm volatile("movca.l r0, @%0\n\t"
556 "ocbi @%0" : : "r" (a0));
557 asm volatile("ldc %0, sr" : : "r" (orig_sr));
558 a0 += linesz;
559 } while (a0 < a0e);
560}
561
562static void __flush_dcache_segment_2way(unsigned long start,
563 unsigned long extent_per_way)
564{
565 unsigned long orig_sr, sr_with_bl;
566 unsigned long base_addr;
567 unsigned long way_incr, linesz, way_size;
568 struct cache_info *dcache;
569 register unsigned long a0, a1, a0e;
570
571 asm volatile("stc sr, %0" : "=r" (orig_sr));
572 sr_with_bl = orig_sr | (1<<28);
573 base_addr = ((unsigned long)&empty_zero_page[0]);
574
575 /* See comment under 1-way above */
576 base_addr = ((base_addr >> 16) << 16);
577 base_addr |= start;
578
579 dcache = &boot_cpu_data.dcache;
580 linesz = dcache->linesz;
581 way_incr = dcache->way_incr;
582 way_size = dcache->way_size;
583
584 a0 = base_addr;
585 a1 = a0 + way_incr;
586 a0e = base_addr + extent_per_way;
587 do {
588 asm volatile("ldc %0, sr" : : "r" (sr_with_bl));
589 asm volatile("movca.l r0, @%0\n\t"
590 "movca.l r0, @%1\n\t"
591 "ocbi @%0\n\t"
592 "ocbi @%1" : :
593 "r" (a0), "r" (a1));
594 a0 += linesz;
595 a1 += linesz;
596 asm volatile("movca.l r0, @%0\n\t"
597 "movca.l r0, @%1\n\t"
598 "ocbi @%0\n\t"
599 "ocbi @%1" : :
600 "r" (a0), "r" (a1));
601 a0 += linesz;
602 a1 += linesz;
603 asm volatile("movca.l r0, @%0\n\t"
604 "movca.l r0, @%1\n\t"
605 "ocbi @%0\n\t"
606 "ocbi @%1" : :
607 "r" (a0), "r" (a1));
608 a0 += linesz;
609 a1 += linesz;
610 asm volatile("movca.l r0, @%0\n\t"
611 "movca.l r0, @%1\n\t"
612 "ocbi @%0\n\t"
613 "ocbi @%1" : :
614 "r" (a0), "r" (a1));
615 asm volatile("ldc %0, sr" : : "r" (orig_sr));
616 a0 += linesz;
617 a1 += linesz;
618 } while (a0 < a0e);
619}
620
621static void __flush_dcache_segment_4way(unsigned long start,
622 unsigned long extent_per_way)
623{
624 unsigned long orig_sr, sr_with_bl;
625 unsigned long base_addr;
626 unsigned long way_incr, linesz, way_size;
627 struct cache_info *dcache;
628 register unsigned long a0, a1, a2, a3, a0e;
629
630 asm volatile("stc sr, %0" : "=r" (orig_sr));
631 sr_with_bl = orig_sr | (1<<28);
632 base_addr = ((unsigned long)&empty_zero_page[0]);
633
634 /* See comment under 1-way above */
635 base_addr = ((base_addr >> 16) << 16);
636 base_addr |= start;
637
638 dcache = &boot_cpu_data.dcache;
639 linesz = dcache->linesz;
640 way_incr = dcache->way_incr;
641 way_size = dcache->way_size;
642
643 a0 = base_addr;
644 a1 = a0 + way_incr;
645 a2 = a1 + way_incr;
646 a3 = a2 + way_incr;
647 a0e = base_addr + extent_per_way;
648 do {
649 asm volatile("ldc %0, sr" : : "r" (sr_with_bl));
650 asm volatile("movca.l r0, @%0\n\t"
651 "movca.l r0, @%1\n\t"
652 "movca.l r0, @%2\n\t"
653 "movca.l r0, @%3\n\t"
654 "ocbi @%0\n\t"
655 "ocbi @%1\n\t"
656 "ocbi @%2\n\t"
657 "ocbi @%3\n\t" : :
658 "r" (a0), "r" (a1), "r" (a2), "r" (a3));
659 a0 += linesz;
660 a1 += linesz;
661 a2 += linesz;
662 a3 += linesz;
663 asm volatile("movca.l r0, @%0\n\t"
664 "movca.l r0, @%1\n\t"
665 "movca.l r0, @%2\n\t"
666 "movca.l r0, @%3\n\t"
667 "ocbi @%0\n\t"
668 "ocbi @%1\n\t"
669 "ocbi @%2\n\t"
670 "ocbi @%3\n\t" : :
671 "r" (a0), "r" (a1), "r" (a2), "r" (a3));
672 a0 += linesz;
673 a1 += linesz;
674 a2 += linesz;
675 a3 += linesz;
676 asm volatile("movca.l r0, @%0\n\t"
677 "movca.l r0, @%1\n\t"
678 "movca.l r0, @%2\n\t"
679 "movca.l r0, @%3\n\t"
680 "ocbi @%0\n\t"
681 "ocbi @%1\n\t"
682 "ocbi @%2\n\t"
683 "ocbi @%3\n\t" : :
684 "r" (a0), "r" (a1), "r" (a2), "r" (a3));
685 a0 += linesz;
686 a1 += linesz;
687 a2 += linesz;
688 a3 += linesz;
689 asm volatile("movca.l r0, @%0\n\t"
690 "movca.l r0, @%1\n\t"
691 "movca.l r0, @%2\n\t"
692 "movca.l r0, @%3\n\t"
693 "ocbi @%0\n\t"
694 "ocbi @%1\n\t"
695 "ocbi @%2\n\t"
696 "ocbi @%3\n\t" : :
697 "r" (a0), "r" (a1), "r" (a2), "r" (a3));
698 asm volatile("ldc %0, sr" : : "r" (orig_sr));
699 a0 += linesz;
700 a1 += linesz;
701 a2 += linesz;
702 a3 += linesz;
703 } while (a0 < a0e);
704}
705
706extern void __weak sh4__flush_region_init(void); 372extern void __weak sh4__flush_region_init(void);
707 373
708/* 374/*
@@ -710,31 +376,10 @@ extern void __weak sh4__flush_region_init(void);
710 */ 376 */
711void __init sh4_cache_init(void) 377void __init sh4_cache_init(void)
712{ 378{
713 unsigned int wt_enabled = !!(__raw_readl(CCR) & CCR_CACHE_WT);
714
715 printk("PVR=%08x CVR=%08x PRR=%08x\n", 379 printk("PVR=%08x CVR=%08x PRR=%08x\n",
716 ctrl_inl(CCN_PVR), 380 __raw_readl(CCN_PVR),
717 ctrl_inl(CCN_CVR), 381 __raw_readl(CCN_CVR),
718 ctrl_inl(CCN_PRR)); 382 __raw_readl(CCN_PRR));
719
720 if (wt_enabled)
721 __flush_dcache_segment_fn = __flush_dcache_segment_writethrough;
722 else {
723 switch (boot_cpu_data.dcache.ways) {
724 case 1:
725 __flush_dcache_segment_fn = __flush_dcache_segment_1way;
726 break;
727 case 2:
728 __flush_dcache_segment_fn = __flush_dcache_segment_2way;
729 break;
730 case 4:
731 __flush_dcache_segment_fn = __flush_dcache_segment_4way;
732 break;
733 default:
734 panic("unknown number of cache ways\n");
735 break;
736 }
737 }
738 383
739 local_flush_icache_range = sh4_flush_icache_range; 384 local_flush_icache_range = sh4_flush_icache_range;
740 local_flush_dcache_page = sh4_flush_dcache_page; 385 local_flush_dcache_page = sh4_flush_dcache_page;
diff --git a/arch/sh/mm/cache-sh5.c b/arch/sh/mm/cache-sh5.c
index 467ff8e260f7..eb4cc4ec7952 100644
--- a/arch/sh/mm/cache-sh5.c
+++ b/arch/sh/mm/cache-sh5.c
@@ -563,7 +563,7 @@ static void sh5_flush_cache_page(void *args)
563 563
564static void sh5_flush_dcache_page(void *page) 564static void sh5_flush_dcache_page(void *page)
565{ 565{
566 sh64_dcache_purge_phy_page(page_to_phys(page)); 566 sh64_dcache_purge_phy_page(page_to_phys((struct page *)page));
567 wmb(); 567 wmb();
568} 568}
569 569
diff --git a/arch/sh/mm/cache-sh7705.c b/arch/sh/mm/cache-sh7705.c
index 2601935eb589..f498da1cce7a 100644
--- a/arch/sh/mm/cache-sh7705.c
+++ b/arch/sh/mm/cache-sh7705.c
@@ -48,10 +48,10 @@ static inline void cache_wback_all(void)
48 unsigned long data; 48 unsigned long data;
49 int v = SH_CACHE_UPDATED | SH_CACHE_VALID; 49 int v = SH_CACHE_UPDATED | SH_CACHE_VALID;
50 50
51 data = ctrl_inl(addr); 51 data = __raw_readl(addr);
52 52
53 if ((data & v) == v) 53 if ((data & v) == v)
54 ctrl_outl(data & ~v, addr); 54 __raw_writel(data & ~v, addr);
55 55
56 } 56 }
57 57
@@ -78,7 +78,7 @@ static void sh7705_flush_icache_range(void *args)
78/* 78/*
79 * Writeback&Invalidate the D-cache of the page 79 * Writeback&Invalidate the D-cache of the page
80 */ 80 */
81static void __uses_jump_to_uncached __flush_dcache_page(unsigned long phys) 81static void __flush_dcache_page(unsigned long phys)
82{ 82{
83 unsigned long ways, waysize, addrstart; 83 unsigned long ways, waysize, addrstart;
84 unsigned long flags; 84 unsigned long flags;
@@ -115,10 +115,10 @@ static void __uses_jump_to_uncached __flush_dcache_page(unsigned long phys)
115 addr += current_cpu_data.dcache.linesz) { 115 addr += current_cpu_data.dcache.linesz) {
116 unsigned long data; 116 unsigned long data;
117 117
118 data = ctrl_inl(addr) & (0x1ffffC00 | SH_CACHE_VALID); 118 data = __raw_readl(addr) & (0x1ffffC00 | SH_CACHE_VALID);
119 if (data == phys) { 119 if (data == phys) {
120 data &= ~(SH_CACHE_VALID | SH_CACHE_UPDATED); 120 data &= ~(SH_CACHE_VALID | SH_CACHE_UPDATED);
121 ctrl_outl(data, addr); 121 __raw_writel(data, addr);
122 } 122 }
123 } 123 }
124 124
@@ -141,10 +141,10 @@ static void sh7705_flush_dcache_page(void *arg)
141 if (mapping && !mapping_mapped(mapping)) 141 if (mapping && !mapping_mapped(mapping))
142 set_bit(PG_dcache_dirty, &page->flags); 142 set_bit(PG_dcache_dirty, &page->flags);
143 else 143 else
144 __flush_dcache_page(PHYSADDR(page_address(page))); 144 __flush_dcache_page(__pa(page_address(page)));
145} 145}
146 146
147static void __uses_jump_to_uncached sh7705_flush_cache_all(void *args) 147static void sh7705_flush_cache_all(void *args)
148{ 148{
149 unsigned long flags; 149 unsigned long flags;
150 150
diff --git a/arch/sh/mm/cache.c b/arch/sh/mm/cache.c
index a2dc7f9ecc51..0f4095d7ac8b 100644
--- a/arch/sh/mm/cache.c
+++ b/arch/sh/mm/cache.c
@@ -2,7 +2,7 @@
2 * arch/sh/mm/cache.c 2 * arch/sh/mm/cache.c
3 * 3 *
4 * Copyright (C) 1999, 2000, 2002 Niibe Yutaka 4 * Copyright (C) 1999, 2000, 2002 Niibe Yutaka
5 * Copyright (C) 2002 - 2009 Paul Mundt 5 * Copyright (C) 2002 - 2010 Paul Mundt
6 * 6 *
7 * Released under the terms of the GNU GPL v2.0. 7 * Released under the terms of the GNU GPL v2.0.
8 */ 8 */
@@ -27,8 +27,11 @@ void (*local_flush_icache_page)(void *args) = cache_noop;
27void (*local_flush_cache_sigtramp)(void *args) = cache_noop; 27void (*local_flush_cache_sigtramp)(void *args) = cache_noop;
28 28
29void (*__flush_wback_region)(void *start, int size); 29void (*__flush_wback_region)(void *start, int size);
30EXPORT_SYMBOL(__flush_wback_region);
30void (*__flush_purge_region)(void *start, int size); 31void (*__flush_purge_region)(void *start, int size);
32EXPORT_SYMBOL(__flush_purge_region);
31void (*__flush_invalidate_region)(void *start, int size); 33void (*__flush_invalidate_region)(void *start, int size);
34EXPORT_SYMBOL(__flush_invalidate_region);
32 35
33static inline void noop__flush_region(void *start, int size) 36static inline void noop__flush_region(void *start, int size)
34{ 37{
@@ -38,8 +41,17 @@ static inline void cacheop_on_each_cpu(void (*func) (void *info), void *info,
38 int wait) 41 int wait)
39{ 42{
40 preempt_disable(); 43 preempt_disable();
41 smp_call_function(func, info, wait); 44
45 /*
46 * It's possible that this gets called early on when IRQs are
47 * still disabled due to ioremapping by the boot CPU, so don't
48 * even attempt IPIs unless there are other CPUs online.
49 */
50 if (num_online_cpus() > 1)
51 smp_call_function(func, info, wait);
52
42 func(info); 53 func(info);
54
43 preempt_enable(); 55 preempt_enable();
44} 56}
45 57
@@ -130,12 +142,8 @@ void __update_cache(struct vm_area_struct *vma,
130 page = pfn_to_page(pfn); 142 page = pfn_to_page(pfn);
131 if (pfn_valid(pfn)) { 143 if (pfn_valid(pfn)) {
132 int dirty = test_and_clear_bit(PG_dcache_dirty, &page->flags); 144 int dirty = test_and_clear_bit(PG_dcache_dirty, &page->flags);
133 if (dirty) { 145 if (dirty)
134 unsigned long addr = (unsigned long)page_address(page); 146 __flush_purge_region(page_address(page), PAGE_SIZE);
135
136 if (pages_do_alias(addr, address & PAGE_MASK))
137 __flush_purge_region((void *)addr, PAGE_SIZE);
138 }
139 } 147 }
140} 148}
141 149
@@ -161,14 +169,21 @@ void flush_cache_all(void)
161{ 169{
162 cacheop_on_each_cpu(local_flush_cache_all, NULL, 1); 170 cacheop_on_each_cpu(local_flush_cache_all, NULL, 1);
163} 171}
172EXPORT_SYMBOL(flush_cache_all);
164 173
165void flush_cache_mm(struct mm_struct *mm) 174void flush_cache_mm(struct mm_struct *mm)
166{ 175{
176 if (boot_cpu_data.dcache.n_aliases == 0)
177 return;
178
167 cacheop_on_each_cpu(local_flush_cache_mm, mm, 1); 179 cacheop_on_each_cpu(local_flush_cache_mm, mm, 1);
168} 180}
169 181
170void flush_cache_dup_mm(struct mm_struct *mm) 182void flush_cache_dup_mm(struct mm_struct *mm)
171{ 183{
184 if (boot_cpu_data.dcache.n_aliases == 0)
185 return;
186
172 cacheop_on_each_cpu(local_flush_cache_dup_mm, mm, 1); 187 cacheop_on_each_cpu(local_flush_cache_dup_mm, mm, 1);
173} 188}
174 189
@@ -195,11 +210,13 @@ void flush_cache_range(struct vm_area_struct *vma, unsigned long start,
195 210
196 cacheop_on_each_cpu(local_flush_cache_range, (void *)&data, 1); 211 cacheop_on_each_cpu(local_flush_cache_range, (void *)&data, 1);
197} 212}
213EXPORT_SYMBOL(flush_cache_range);
198 214
199void flush_dcache_page(struct page *page) 215void flush_dcache_page(struct page *page)
200{ 216{
201 cacheop_on_each_cpu(local_flush_dcache_page, page, 1); 217 cacheop_on_each_cpu(local_flush_dcache_page, page, 1);
202} 218}
219EXPORT_SYMBOL(flush_dcache_page);
203 220
204void flush_icache_range(unsigned long start, unsigned long end) 221void flush_icache_range(unsigned long start, unsigned long end)
205{ 222{
@@ -265,7 +282,11 @@ static void __init emit_cache_params(void)
265 282
266void __init cpu_cache_init(void) 283void __init cpu_cache_init(void)
267{ 284{
268 unsigned int cache_disabled = !(__raw_readl(CCR) & CCR_CACHE_ENABLE); 285 unsigned int cache_disabled = 0;
286
287#ifdef CCR
288 cache_disabled = !(__raw_readl(CCR) & CCR_CACHE_ENABLE);
289#endif
269 290
270 compute_alias(&boot_cpu_data.icache); 291 compute_alias(&boot_cpu_data.icache);
271 compute_alias(&boot_cpu_data.dcache); 292 compute_alias(&boot_cpu_data.dcache);
diff --git a/arch/sh/mm/consistent.c b/arch/sh/mm/consistent.c
index e098ec158ddb..c86a08540258 100644
--- a/arch/sh/mm/consistent.c
+++ b/arch/sh/mm/consistent.c
@@ -15,11 +15,16 @@
15#include <linux/dma-mapping.h> 15#include <linux/dma-mapping.h>
16#include <linux/dma-debug.h> 16#include <linux/dma-debug.h>
17#include <linux/io.h> 17#include <linux/io.h>
18#include <linux/module.h>
19#include <linux/gfp.h>
18#include <asm/cacheflush.h> 20#include <asm/cacheflush.h>
19#include <asm/addrspace.h> 21#include <asm/addrspace.h>
20 22
21#define PREALLOC_DMA_DEBUG_ENTRIES 4096 23#define PREALLOC_DMA_DEBUG_ENTRIES 4096
22 24
25struct dma_map_ops *dma_ops;
26EXPORT_SYMBOL(dma_ops);
27
23static int __init dma_init(void) 28static int __init dma_init(void)
24{ 29{
25 dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES); 30 dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
@@ -27,15 +32,12 @@ static int __init dma_init(void)
27} 32}
28fs_initcall(dma_init); 33fs_initcall(dma_init);
29 34
30void *dma_alloc_coherent(struct device *dev, size_t size, 35void *dma_generic_alloc_coherent(struct device *dev, size_t size,
31 dma_addr_t *dma_handle, gfp_t gfp) 36 dma_addr_t *dma_handle, gfp_t gfp)
32{ 37{
33 void *ret, *ret_nocache; 38 void *ret, *ret_nocache;
34 int order = get_order(size); 39 int order = get_order(size);
35 40
36 if (dma_alloc_from_coherent(dev, size, dma_handle, &ret))
37 return ret;
38
39 ret = (void *)__get_free_pages(gfp, order); 41 ret = (void *)__get_free_pages(gfp, order);
40 if (!ret) 42 if (!ret)
41 return NULL; 43 return NULL;
@@ -57,35 +59,26 @@ void *dma_alloc_coherent(struct device *dev, size_t size,
57 59
58 *dma_handle = virt_to_phys(ret); 60 *dma_handle = virt_to_phys(ret);
59 61
60 debug_dma_alloc_coherent(dev, size, *dma_handle, ret_nocache);
61
62 return ret_nocache; 62 return ret_nocache;
63} 63}
64EXPORT_SYMBOL(dma_alloc_coherent);
65 64
66void dma_free_coherent(struct device *dev, size_t size, 65void dma_generic_free_coherent(struct device *dev, size_t size,
67 void *vaddr, dma_addr_t dma_handle) 66 void *vaddr, dma_addr_t dma_handle)
68{ 67{
69 int order = get_order(size); 68 int order = get_order(size);
70 unsigned long pfn = dma_handle >> PAGE_SHIFT; 69 unsigned long pfn = dma_handle >> PAGE_SHIFT;
71 int k; 70 int k;
72 71
73 WARN_ON(irqs_disabled()); /* for portability */
74
75 if (dma_release_from_coherent(dev, order, vaddr))
76 return;
77
78 debug_dma_free_coherent(dev, size, vaddr, dma_handle);
79 for (k = 0; k < (1 << order); k++) 72 for (k = 0; k < (1 << order); k++)
80 __free_pages(pfn_to_page(pfn + k), 0); 73 __free_pages(pfn_to_page(pfn + k), 0);
74
81 iounmap(vaddr); 75 iounmap(vaddr);
82} 76}
83EXPORT_SYMBOL(dma_free_coherent);
84 77
85void dma_cache_sync(struct device *dev, void *vaddr, size_t size, 78void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
86 enum dma_data_direction direction) 79 enum dma_data_direction direction)
87{ 80{
88#ifdef CONFIG_CPU_SH5 81#if defined(CONFIG_CPU_SH5) || defined(CONFIG_PMB)
89 void *p1addr = vaddr; 82 void *p1addr = vaddr;
90#else 83#else
91 void *p1addr = (void*) P1SEGADDR((unsigned long)vaddr); 84 void *p1addr = (void*) P1SEGADDR((unsigned long)vaddr);
diff --git a/arch/sh/mm/fault_32.c b/arch/sh/mm/fault_32.c
index 47530104e0ad..8bf79e3b7bdd 100644
--- a/arch/sh/mm/fault_32.c
+++ b/arch/sh/mm/fault_32.c
@@ -53,6 +53,9 @@ static inline pmd_t *vmalloc_sync_one(pgd_t *pgd, unsigned long address)
53 if (!pud_present(*pud_k)) 53 if (!pud_present(*pud_k))
54 return NULL; 54 return NULL;
55 55
56 if (!pud_present(*pud))
57 set_pud(pud, *pud_k);
58
56 pmd = pmd_offset(pud, address); 59 pmd = pmd_offset(pud, address);
57 pmd_k = pmd_offset(pud_k, address); 60 pmd_k = pmd_offset(pud_k, address);
58 if (!pmd_present(*pmd_k)) 61 if (!pmd_present(*pmd_k))
@@ -371,7 +374,7 @@ handle_tlbmiss(struct pt_regs *regs, unsigned long writeaccess,
371 local_flush_tlb_one(get_asid(), address & PAGE_MASK); 374 local_flush_tlb_one(get_asid(), address & PAGE_MASK);
372#endif 375#endif
373 376
374 update_mmu_cache(NULL, address, entry); 377 update_mmu_cache(NULL, address, pte);
375 378
376 return 0; 379 return 0;
377} 380}
diff --git a/arch/sh/mm/hugetlbpage.c b/arch/sh/mm/hugetlbpage.c
index 9304117039c4..9163db3e8d15 100644
--- a/arch/sh/mm/hugetlbpage.c
+++ b/arch/sh/mm/hugetlbpage.c
@@ -13,7 +13,6 @@
13#include <linux/mm.h> 13#include <linux/mm.h>
14#include <linux/hugetlb.h> 14#include <linux/hugetlb.h>
15#include <linux/pagemap.h> 15#include <linux/pagemap.h>
16#include <linux/slab.h>
17#include <linux/sysctl.h> 16#include <linux/sysctl.h>
18 17
19#include <asm/mman.h> 18#include <asm/mman.h>
diff --git a/arch/sh/mm/init.c b/arch/sh/mm/init.c
index 8173e38afd38..c505de61a5ca 100644
--- a/arch/sh/mm/init.c
+++ b/arch/sh/mm/init.c
@@ -10,35 +10,25 @@
10#include <linux/mm.h> 10#include <linux/mm.h>
11#include <linux/swap.h> 11#include <linux/swap.h>
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/gfp.h>
13#include <linux/bootmem.h> 14#include <linux/bootmem.h>
14#include <linux/proc_fs.h> 15#include <linux/proc_fs.h>
15#include <linux/pagemap.h> 16#include <linux/pagemap.h>
16#include <linux/percpu.h> 17#include <linux/percpu.h>
17#include <linux/io.h> 18#include <linux/io.h>
19#include <linux/dma-mapping.h>
18#include <asm/mmu_context.h> 20#include <asm/mmu_context.h>
19#include <asm/tlb.h> 21#include <asm/tlb.h>
20#include <asm/cacheflush.h> 22#include <asm/cacheflush.h>
21#include <asm/sections.h> 23#include <asm/sections.h>
22#include <asm/cache.h> 24#include <asm/cache.h>
25#include <asm/sizes.h>
23 26
24DEFINE_PER_CPU(struct mmu_gather, mmu_gathers); 27DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
25pgd_t swapper_pg_dir[PTRS_PER_PGD]; 28pgd_t swapper_pg_dir[PTRS_PER_PGD];
26 29
27#ifdef CONFIG_SUPERH32
28/*
29 * Handle trivial transitions between cached and uncached
30 * segments, making use of the 1:1 mapping relationship in
31 * 512MB lowmem.
32 *
33 * This is the offset of the uncached section from its cached alias.
34 * Default value only valid in 29 bit mode, in 32bit mode will be
35 * overridden in pmb_init.
36 */
37unsigned long cached_to_uncached = P2SEG - P1SEG;
38#endif
39
40#ifdef CONFIG_MMU 30#ifdef CONFIG_MMU
41static void set_pte_phys(unsigned long addr, unsigned long phys, pgprot_t prot) 31static pte_t *__get_pte_phys(unsigned long addr)
42{ 32{
43 pgd_t *pgd; 33 pgd_t *pgd;
44 pud_t *pud; 34 pud_t *pud;
@@ -48,22 +38,30 @@ static void set_pte_phys(unsigned long addr, unsigned long phys, pgprot_t prot)
48 pgd = pgd_offset_k(addr); 38 pgd = pgd_offset_k(addr);
49 if (pgd_none(*pgd)) { 39 if (pgd_none(*pgd)) {
50 pgd_ERROR(*pgd); 40 pgd_ERROR(*pgd);
51 return; 41 return NULL;
52 } 42 }
53 43
54 pud = pud_alloc(NULL, pgd, addr); 44 pud = pud_alloc(NULL, pgd, addr);
55 if (unlikely(!pud)) { 45 if (unlikely(!pud)) {
56 pud_ERROR(*pud); 46 pud_ERROR(*pud);
57 return; 47 return NULL;
58 } 48 }
59 49
60 pmd = pmd_alloc(NULL, pud, addr); 50 pmd = pmd_alloc(NULL, pud, addr);
61 if (unlikely(!pmd)) { 51 if (unlikely(!pmd)) {
62 pmd_ERROR(*pmd); 52 pmd_ERROR(*pmd);
63 return; 53 return NULL;
64 } 54 }
65 55
66 pte = pte_offset_kernel(pmd, addr); 56 pte = pte_offset_kernel(pmd, addr);
57 return pte;
58}
59
60static void set_pte_phys(unsigned long addr, unsigned long phys, pgprot_t prot)
61{
62 pte_t *pte;
63
64 pte = __get_pte_phys(addr);
67 if (!pte_none(*pte)) { 65 if (!pte_none(*pte)) {
68 pte_ERROR(*pte); 66 pte_ERROR(*pte);
69 return; 67 return;
@@ -71,23 +69,24 @@ static void set_pte_phys(unsigned long addr, unsigned long phys, pgprot_t prot)
71 69
72 set_pte(pte, pfn_pte(phys >> PAGE_SHIFT, prot)); 70 set_pte(pte, pfn_pte(phys >> PAGE_SHIFT, prot));
73 local_flush_tlb_one(get_asid(), addr); 71 local_flush_tlb_one(get_asid(), addr);
72
73 if (pgprot_val(prot) & _PAGE_WIRED)
74 tlb_wire_entry(NULL, addr, *pte);
75}
76
77static void clear_pte_phys(unsigned long addr, pgprot_t prot)
78{
79 pte_t *pte;
80
81 pte = __get_pte_phys(addr);
82
83 if (pgprot_val(prot) & _PAGE_WIRED)
84 tlb_unwire_entry();
85
86 set_pte(pte, pfn_pte(0, __pgprot(0)));
87 local_flush_tlb_one(get_asid(), addr);
74} 88}
75 89
76/*
77 * As a performance optimization, other platforms preserve the fixmap mapping
78 * across a context switch, we don't presently do this, but this could be done
79 * in a similar fashion as to the wired TLB interface that sh64 uses (by way
80 * of the memory mapped UTLB configuration) -- this unfortunately forces us to
81 * give up a TLB entry for each mapping we want to preserve. While this may be
82 * viable for a small number of fixmaps, it's not particularly useful for
83 * everything and needs to be carefully evaluated. (ie, we may want this for
84 * the vsyscall page).
85 *
86 * XXX: Perhaps add a _PAGE_WIRED flag or something similar that we can pass
87 * in at __set_fixmap() time to determine the appropriate behavior to follow.
88 *
89 * -- PFM.
90 */
91void __set_fixmap(enum fixed_addresses idx, unsigned long phys, pgprot_t prot) 90void __set_fixmap(enum fixed_addresses idx, unsigned long phys, pgprot_t prot)
92{ 91{
93 unsigned long address = __fix_to_virt(idx); 92 unsigned long address = __fix_to_virt(idx);
@@ -100,6 +99,18 @@ void __set_fixmap(enum fixed_addresses idx, unsigned long phys, pgprot_t prot)
100 set_pte_phys(address, phys, prot); 99 set_pte_phys(address, phys, prot);
101} 100}
102 101
102void __clear_fixmap(enum fixed_addresses idx, pgprot_t prot)
103{
104 unsigned long address = __fix_to_virt(idx);
105
106 if (idx >= __end_of_fixed_addresses) {
107 BUG();
108 return;
109 }
110
111 clear_pte_phys(address, prot);
112}
113
103void __init page_table_range_init(unsigned long start, unsigned long end, 114void __init page_table_range_init(unsigned long start, unsigned long end,
104 pgd_t *pgd_base) 115 pgd_t *pgd_base)
105{ 116{
@@ -119,7 +130,13 @@ void __init page_table_range_init(unsigned long start, unsigned long end,
119 for ( ; (i < PTRS_PER_PGD) && (vaddr != end); pgd++, i++) { 130 for ( ; (i < PTRS_PER_PGD) && (vaddr != end); pgd++, i++) {
120 pud = (pud_t *)pgd; 131 pud = (pud_t *)pgd;
121 for ( ; (j < PTRS_PER_PUD) && (vaddr != end); pud++, j++) { 132 for ( ; (j < PTRS_PER_PUD) && (vaddr != end); pud++, j++) {
133#ifdef __PAGETABLE_PMD_FOLDED
122 pmd = (pmd_t *)pud; 134 pmd = (pmd_t *)pud;
135#else
136 pmd = (pmd_t *)alloc_bootmem_low_pages(PAGE_SIZE);
137 pud_populate(&init_mm, pud, pmd);
138 pmd += k;
139#endif
123 for (; (k < PTRS_PER_PMD) && (vaddr != end); pmd++, k++) { 140 for (; (k < PTRS_PER_PMD) && (vaddr != end); pmd++, k++) {
124 if (pmd_none(*pmd)) { 141 if (pmd_none(*pmd)) {
125 pte = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE); 142 pte = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE);
@@ -181,16 +198,25 @@ void __init paging_init(void)
181 } 198 }
182 199
183 free_area_init_nodes(max_zone_pfns); 200 free_area_init_nodes(max_zone_pfns);
201}
184 202
185 /* Set up the uncached fixmap */ 203/*
186 set_fixmap_nocache(FIX_UNCACHED, __pa(&__uncached_start)); 204 * Early initialization for any I/O MMUs we might have.
205 */
206static void __init iommu_init(void)
207{
208 no_iommu_init();
187} 209}
188 210
211unsigned int mem_init_done = 0;
212
189void __init mem_init(void) 213void __init mem_init(void)
190{ 214{
191 int codesize, datasize, initsize; 215 int codesize, datasize, initsize;
192 int nid; 216 int nid;
193 217
218 iommu_init();
219
194 num_physpages = 0; 220 num_physpages = 0;
195 high_memory = NULL; 221 high_memory = NULL;
196 222
@@ -220,6 +246,8 @@ void __init mem_init(void)
220 memset(empty_zero_page, 0, PAGE_SIZE); 246 memset(empty_zero_page, 0, PAGE_SIZE);
221 __flush_wback_region(empty_zero_page, PAGE_SIZE); 247 __flush_wback_region(empty_zero_page, PAGE_SIZE);
222 248
249 vsyscall_init();
250
223 codesize = (unsigned long) &_etext - (unsigned long) &_text; 251 codesize = (unsigned long) &_etext - (unsigned long) &_text;
224 datasize = (unsigned long) &_edata - (unsigned long) &_etext; 252 datasize = (unsigned long) &_edata - (unsigned long) &_etext;
225 initsize = (unsigned long) &__init_end - (unsigned long) &__init_begin; 253 initsize = (unsigned long) &__init_end - (unsigned long) &__init_begin;
@@ -232,8 +260,48 @@ void __init mem_init(void)
232 datasize >> 10, 260 datasize >> 10,
233 initsize >> 10); 261 initsize >> 10);
234 262
235 /* Initialize the vDSO */ 263 printk(KERN_INFO "virtual kernel memory layout:\n"
236 vsyscall_init(); 264 " fixmap : 0x%08lx - 0x%08lx (%4ld kB)\n"
265#ifdef CONFIG_HIGHMEM
266 " pkmap : 0x%08lx - 0x%08lx (%4ld kB)\n"
267#endif
268 " vmalloc : 0x%08lx - 0x%08lx (%4ld MB)\n"
269 " lowmem : 0x%08lx - 0x%08lx (%4ld MB) (cached)\n"
270#ifdef CONFIG_UNCACHED_MAPPING
271 " : 0x%08lx - 0x%08lx (%4ld MB) (uncached)\n"
272#endif
273 " .init : 0x%08lx - 0x%08lx (%4ld kB)\n"
274 " .data : 0x%08lx - 0x%08lx (%4ld kB)\n"
275 " .text : 0x%08lx - 0x%08lx (%4ld kB)\n",
276 FIXADDR_START, FIXADDR_TOP,
277 (FIXADDR_TOP - FIXADDR_START) >> 10,
278
279#ifdef CONFIG_HIGHMEM
280 PKMAP_BASE, PKMAP_BASE+LAST_PKMAP*PAGE_SIZE,
281 (LAST_PKMAP*PAGE_SIZE) >> 10,
282#endif
283
284 (unsigned long)VMALLOC_START, VMALLOC_END,
285 (VMALLOC_END - VMALLOC_START) >> 20,
286
287 (unsigned long)memory_start, (unsigned long)high_memory,
288 ((unsigned long)high_memory - (unsigned long)memory_start) >> 20,
289
290#ifdef CONFIG_UNCACHED_MAPPING
291 uncached_start, uncached_end, uncached_size >> 20,
292#endif
293
294 (unsigned long)&__init_begin, (unsigned long)&__init_end,
295 ((unsigned long)&__init_end -
296 (unsigned long)&__init_begin) >> 10,
297
298 (unsigned long)&_etext, (unsigned long)&_edata,
299 ((unsigned long)&_edata - (unsigned long)&_etext) >> 10,
300
301 (unsigned long)&_text, (unsigned long)&_etext,
302 ((unsigned long)&_etext - (unsigned long)&_text) >> 10);
303
304 mem_init_done = 1;
237} 305}
238 306
239void free_initmem(void) 307void free_initmem(void)
@@ -266,35 +334,6 @@ void free_initrd_mem(unsigned long start, unsigned long end)
266} 334}
267#endif 335#endif
268 336
269#if THREAD_SHIFT < PAGE_SHIFT
270static struct kmem_cache *thread_info_cache;
271
272struct thread_info *alloc_thread_info(struct task_struct *tsk)
273{
274 struct thread_info *ti;
275
276 ti = kmem_cache_alloc(thread_info_cache, GFP_KERNEL);
277 if (unlikely(ti == NULL))
278 return NULL;
279#ifdef CONFIG_DEBUG_STACK_USAGE
280 memset(ti, 0, THREAD_SIZE);
281#endif
282 return ti;
283}
284
285void free_thread_info(struct thread_info *ti)
286{
287 kmem_cache_free(thread_info_cache, ti);
288}
289
290void thread_info_cache_init(void)
291{
292 thread_info_cache = kmem_cache_create("thread_info", THREAD_SIZE,
293 THREAD_SIZE, 0, NULL);
294 BUG_ON(thread_info_cache == NULL);
295}
296#endif /* THREAD_SHIFT < PAGE_SHIFT */
297
298#ifdef CONFIG_MEMORY_HOTPLUG 337#ifdef CONFIG_MEMORY_HOTPLUG
299int arch_add_memory(int nid, u64 start, u64 size) 338int arch_add_memory(int nid, u64 start, u64 size)
300{ 339{
@@ -323,4 +362,5 @@ int memory_add_physaddr_to_nid(u64 addr)
323} 362}
324EXPORT_SYMBOL_GPL(memory_add_physaddr_to_nid); 363EXPORT_SYMBOL_GPL(memory_add_physaddr_to_nid);
325#endif 364#endif
365
326#endif /* CONFIG_MEMORY_HOTPLUG */ 366#endif /* CONFIG_MEMORY_HOTPLUG */
diff --git a/arch/sh/mm/ioremap.c b/arch/sh/mm/ioremap.c
new file mode 100644
index 000000000000..0c99ec2e7ed8
--- /dev/null
+++ b/arch/sh/mm/ioremap.c
@@ -0,0 +1,137 @@
1/*
2 * arch/sh/mm/ioremap.c
3 *
4 * (C) Copyright 1995 1996 Linus Torvalds
5 * (C) Copyright 2005 - 2010 Paul Mundt
6 *
7 * Re-map IO memory to kernel address space so that we can access it.
8 * This is needed for high PCI addresses that aren't mapped in the
9 * 640k-1MB IO memory area on PC's
10 *
11 * This file is subject to the terms and conditions of the GNU General
12 * Public License. See the file "COPYING" in the main directory of this
13 * archive for more details.
14 */
15#include <linux/vmalloc.h>
16#include <linux/module.h>
17#include <linux/slab.h>
18#include <linux/mm.h>
19#include <linux/pci.h>
20#include <linux/io.h>
21#include <asm/page.h>
22#include <asm/pgalloc.h>
23#include <asm/addrspace.h>
24#include <asm/cacheflush.h>
25#include <asm/tlbflush.h>
26#include <asm/mmu.h>
27
28/*
29 * Remap an arbitrary physical address space into the kernel virtual
30 * address space. Needed when the kernel wants to access high addresses
31 * directly.
32 *
33 * NOTE! We need to allow non-page-aligned mappings too: we will obviously
34 * have to convert them into an offset in a page-aligned mapping, but the
35 * caller shouldn't need to know that small detail.
36 */
37void __iomem * __init_refok
38__ioremap_caller(phys_addr_t phys_addr, unsigned long size,
39 pgprot_t pgprot, void *caller)
40{
41 struct vm_struct *area;
42 unsigned long offset, last_addr, addr, orig_addr;
43 void __iomem *mapped;
44
45 /* Don't allow wraparound or zero size */
46 last_addr = phys_addr + size - 1;
47 if (!size || last_addr < phys_addr)
48 return NULL;
49
50 /*
51 * If we can't yet use the regular approach, go the fixmap route.
52 */
53 if (!mem_init_done)
54 return ioremap_fixed(phys_addr, size, pgprot);
55
56 /*
57 * First try to remap through the PMB.
58 * PMB entries are all pre-faulted.
59 */
60 mapped = pmb_remap_caller(phys_addr, size, pgprot, caller);
61 if (mapped && !IS_ERR(mapped))
62 return mapped;
63
64 /*
65 * Mappings have to be page-aligned
66 */
67 offset = phys_addr & ~PAGE_MASK;
68 phys_addr &= PAGE_MASK;
69 size = PAGE_ALIGN(last_addr+1) - phys_addr;
70
71 /*
72 * Ok, go for it..
73 */
74 area = get_vm_area_caller(size, VM_IOREMAP, caller);
75 if (!area)
76 return NULL;
77 area->phys_addr = phys_addr;
78 orig_addr = addr = (unsigned long)area->addr;
79
80 if (ioremap_page_range(addr, addr + size, phys_addr, pgprot)) {
81 vunmap((void *)orig_addr);
82 return NULL;
83 }
84
85 return (void __iomem *)(offset + (char *)orig_addr);
86}
87EXPORT_SYMBOL(__ioremap_caller);
88
89/*
90 * Simple checks for non-translatable mappings.
91 */
92static inline int iomapping_nontranslatable(unsigned long offset)
93{
94#ifdef CONFIG_29BIT
95 /*
96 * In 29-bit mode this includes the fixed P1/P2 areas, as well as
97 * parts of P3.
98 */
99 if (PXSEG(offset) < P3SEG || offset >= P3_ADDR_MAX)
100 return 1;
101#endif
102
103 return 0;
104}
105
106void __iounmap(void __iomem *addr)
107{
108 unsigned long vaddr = (unsigned long __force)addr;
109 struct vm_struct *p;
110
111 /*
112 * Nothing to do if there is no translatable mapping.
113 */
114 if (iomapping_nontranslatable(vaddr))
115 return;
116
117 /*
118 * There's no VMA if it's from an early fixed mapping.
119 */
120 if (iounmap_fixed(addr) == 0)
121 return;
122
123 /*
124 * If the PMB handled it, there's nothing else to do.
125 */
126 if (pmb_unmap(addr) == 0)
127 return;
128
129 p = remove_vm_area((void *)(vaddr & PAGE_MASK));
130 if (!p) {
131 printk(KERN_ERR "%s: bad address %p\n", __func__, addr);
132 return;
133 }
134
135 kfree(p);
136}
137EXPORT_SYMBOL(__iounmap);
diff --git a/arch/sh/mm/ioremap_32.c b/arch/sh/mm/ioremap_32.c
deleted file mode 100644
index a86eaa9d75a5..000000000000
--- a/arch/sh/mm/ioremap_32.c
+++ /dev/null
@@ -1,145 +0,0 @@
1/*
2 * arch/sh/mm/ioremap.c
3 *
4 * Re-map IO memory to kernel address space so that we can access it.
5 * This is needed for high PCI addresses that aren't mapped in the
6 * 640k-1MB IO memory area on PC's
7 *
8 * (C) Copyright 1995 1996 Linus Torvalds
9 * (C) Copyright 2005, 2006 Paul Mundt
10 *
11 * This file is subject to the terms and conditions of the GNU General
12 * Public License. See the file "COPYING" in the main directory of this
13 * archive for more details.
14 */
15#include <linux/vmalloc.h>
16#include <linux/module.h>
17#include <linux/mm.h>
18#include <linux/pci.h>
19#include <linux/io.h>
20#include <asm/page.h>
21#include <asm/pgalloc.h>
22#include <asm/addrspace.h>
23#include <asm/cacheflush.h>
24#include <asm/tlbflush.h>
25#include <asm/mmu.h>
26
27/*
28 * Remap an arbitrary physical address space into the kernel virtual
29 * address space. Needed when the kernel wants to access high addresses
30 * directly.
31 *
32 * NOTE! We need to allow non-page-aligned mappings too: we will obviously
33 * have to convert them into an offset in a page-aligned mapping, but the
34 * caller shouldn't need to know that small detail.
35 */
36void __iomem *__ioremap(unsigned long phys_addr, unsigned long size,
37 unsigned long flags)
38{
39 struct vm_struct * area;
40 unsigned long offset, last_addr, addr, orig_addr;
41 pgprot_t pgprot;
42
43 /* Don't allow wraparound or zero size */
44 last_addr = phys_addr + size - 1;
45 if (!size || last_addr < phys_addr)
46 return NULL;
47
48 /*
49 * If we're in the fixed PCI memory range, mapping through page
50 * tables is not only pointless, but also fundamentally broken.
51 * Just return the physical address instead.
52 *
53 * For boards that map a small PCI memory aperture somewhere in
54 * P1/P2 space, ioremap() will already do the right thing,
55 * and we'll never get this far.
56 */
57 if (is_pci_memory_fixed_range(phys_addr, size))
58 return (void __iomem *)phys_addr;
59
60 /*
61 * Mappings have to be page-aligned
62 */
63 offset = phys_addr & ~PAGE_MASK;
64 phys_addr &= PAGE_MASK;
65 size = PAGE_ALIGN(last_addr+1) - phys_addr;
66
67 /*
68 * Ok, go for it..
69 */
70 area = get_vm_area(size, VM_IOREMAP);
71 if (!area)
72 return NULL;
73 area->phys_addr = phys_addr;
74 orig_addr = addr = (unsigned long)area->addr;
75
76#ifdef CONFIG_PMB
77 /*
78 * First try to remap through the PMB once a valid VMA has been
79 * established. Smaller allocations (or the rest of the size
80 * remaining after a PMB mapping due to the size not being
81 * perfectly aligned on a PMB size boundary) are then mapped
82 * through the UTLB using conventional page tables.
83 *
84 * PMB entries are all pre-faulted.
85 */
86 if (unlikely(phys_addr >= P1SEG)) {
87 unsigned long mapped = pmb_remap(addr, phys_addr, size, flags);
88
89 if (likely(mapped)) {
90 addr += mapped;
91 phys_addr += mapped;
92 size -= mapped;
93 }
94 }
95#endif
96
97 pgprot = __pgprot(pgprot_val(PAGE_KERNEL_NOCACHE) | flags);
98 if (likely(size))
99 if (ioremap_page_range(addr, addr + size, phys_addr, pgprot)) {
100 vunmap((void *)orig_addr);
101 return NULL;
102 }
103
104 return (void __iomem *)(offset + (char *)orig_addr);
105}
106EXPORT_SYMBOL(__ioremap);
107
108void __iounmap(void __iomem *addr)
109{
110 unsigned long vaddr = (unsigned long __force)addr;
111 unsigned long seg = PXSEG(vaddr);
112 struct vm_struct *p;
113
114 if (seg < P3SEG || vaddr >= P3_ADDR_MAX)
115 return;
116 if (is_pci_memory_fixed_range(vaddr, 0))
117 return;
118
119#ifdef CONFIG_PMB
120 /*
121 * Purge any PMB entries that may have been established for this
122 * mapping, then proceed with conventional VMA teardown.
123 *
124 * XXX: Note that due to the way that remove_vm_area() does
125 * matching of the resultant VMA, we aren't able to fast-forward
126 * the address past the PMB space until the end of the VMA where
127 * the page tables reside. As such, unmap_vm_area() will be
128 * forced to linearly scan over the area until it finds the page
129 * tables where PTEs that need to be unmapped actually reside,
130 * which is far from optimal. Perhaps we need to use a separate
131 * VMA for the PMB mappings?
132 * -- PFM.
133 */
134 pmb_unmap(vaddr);
135#endif
136
137 p = remove_vm_area((void *)(vaddr & PAGE_MASK));
138 if (!p) {
139 printk(KERN_ERR "%s: bad address %p\n", __func__, addr);
140 return;
141 }
142
143 kfree(p);
144}
145EXPORT_SYMBOL(__iounmap);
diff --git a/arch/sh/mm/ioremap_64.c b/arch/sh/mm/ioremap_64.c
deleted file mode 100644
index b16843d02b76..000000000000
--- a/arch/sh/mm/ioremap_64.c
+++ /dev/null
@@ -1,326 +0,0 @@
1/*
2 * arch/sh/mm/ioremap_64.c
3 *
4 * Copyright (C) 2000, 2001 Paolo Alberelli
5 * Copyright (C) 2003 - 2007 Paul Mundt
6 *
7 * Mostly derived from arch/sh/mm/ioremap.c which, in turn is mostly
8 * derived from arch/i386/mm/ioremap.c .
9 *
10 * (C) Copyright 1995 1996 Linus Torvalds
11 *
12 * This file is subject to the terms and conditions of the GNU General Public
13 * License. See the file "COPYING" in the main directory of this archive
14 * for more details.
15 */
16#include <linux/vmalloc.h>
17#include <linux/ioport.h>
18#include <linux/module.h>
19#include <linux/mm.h>
20#include <linux/io.h>
21#include <linux/bootmem.h>
22#include <linux/proc_fs.h>
23#include <linux/slab.h>
24#include <asm/page.h>
25#include <asm/pgalloc.h>
26#include <asm/addrspace.h>
27#include <asm/cacheflush.h>
28#include <asm/tlbflush.h>
29#include <asm/mmu.h>
30
31static struct resource shmedia_iomap = {
32 .name = "shmedia_iomap",
33 .start = IOBASE_VADDR + PAGE_SIZE,
34 .end = IOBASE_END - 1,
35};
36
37static void shmedia_mapioaddr(unsigned long pa, unsigned long va,
38 unsigned long flags);
39static void shmedia_unmapioaddr(unsigned long vaddr);
40static void __iomem *shmedia_ioremap(struct resource *res, u32 pa,
41 int sz, unsigned long flags);
42
43/*
44 * We have the same problem as the SPARC, so lets have the same comment:
45 * Our mini-allocator...
46 * Boy this is gross! We need it because we must map I/O for
47 * timers and interrupt controller before the kmalloc is available.
48 */
49
50#define XNMLN 15
51#define XNRES 10
52
53struct xresource {
54 struct resource xres; /* Must be first */
55 int xflag; /* 1 == used */
56 char xname[XNMLN+1];
57};
58
59static struct xresource xresv[XNRES];
60
61static struct xresource *xres_alloc(void)
62{
63 struct xresource *xrp;
64 int n;
65
66 xrp = xresv;
67 for (n = 0; n < XNRES; n++) {
68 if (xrp->xflag == 0) {
69 xrp->xflag = 1;
70 return xrp;
71 }
72 xrp++;
73 }
74 return NULL;
75}
76
77static void xres_free(struct xresource *xrp)
78{
79 xrp->xflag = 0;
80}
81
82static struct resource *shmedia_find_resource(struct resource *root,
83 unsigned long vaddr)
84{
85 struct resource *res;
86
87 for (res = root->child; res; res = res->sibling)
88 if (res->start <= vaddr && res->end >= vaddr)
89 return res;
90
91 return NULL;
92}
93
94static void __iomem *shmedia_alloc_io(unsigned long phys, unsigned long size,
95 const char *name, unsigned long flags)
96{
97 struct xresource *xres;
98 struct resource *res;
99 char *tack;
100 int tlen;
101
102 if (name == NULL)
103 name = "???";
104
105 xres = xres_alloc();
106 if (xres != 0) {
107 tack = xres->xname;
108 res = &xres->xres;
109 } else {
110 printk_once(KERN_NOTICE "%s: done with statics, "
111 "switching to kmalloc\n", __func__);
112 tlen = strlen(name);
113 tack = kmalloc(sizeof(struct resource) + tlen + 1, GFP_KERNEL);
114 if (!tack)
115 return NULL;
116 memset(tack, 0, sizeof(struct resource));
117 res = (struct resource *) tack;
118 tack += sizeof(struct resource);
119 }
120
121 strncpy(tack, name, XNMLN);
122 tack[XNMLN] = 0;
123 res->name = tack;
124
125 return shmedia_ioremap(res, phys, size, flags);
126}
127
128static void __iomem *shmedia_ioremap(struct resource *res, u32 pa, int sz,
129 unsigned long flags)
130{
131 unsigned long offset = ((unsigned long) pa) & (~PAGE_MASK);
132 unsigned long round_sz = (offset + sz + PAGE_SIZE-1) & PAGE_MASK;
133 unsigned long va;
134 unsigned int psz;
135
136 if (allocate_resource(&shmedia_iomap, res, round_sz,
137 shmedia_iomap.start, shmedia_iomap.end,
138 PAGE_SIZE, NULL, NULL) != 0) {
139 panic("alloc_io_res(%s): cannot occupy\n",
140 (res->name != NULL) ? res->name : "???");
141 }
142
143 va = res->start;
144 pa &= PAGE_MASK;
145
146 psz = (res->end - res->start + (PAGE_SIZE - 1)) / PAGE_SIZE;
147
148 for (psz = res->end - res->start + 1; psz != 0; psz -= PAGE_SIZE) {
149 shmedia_mapioaddr(pa, va, flags);
150 va += PAGE_SIZE;
151 pa += PAGE_SIZE;
152 }
153
154 return (void __iomem *)(unsigned long)(res->start + offset);
155}
156
157static void shmedia_free_io(struct resource *res)
158{
159 unsigned long len = res->end - res->start + 1;
160
161 BUG_ON((len & (PAGE_SIZE - 1)) != 0);
162
163 while (len) {
164 len -= PAGE_SIZE;
165 shmedia_unmapioaddr(res->start + len);
166 }
167
168 release_resource(res);
169}
170
171static __init_refok void *sh64_get_page(void)
172{
173 void *page;
174
175 if (slab_is_available())
176 page = (void *)get_zeroed_page(GFP_KERNEL);
177 else
178 page = alloc_bootmem_pages(PAGE_SIZE);
179
180 if (!page || ((unsigned long)page & ~PAGE_MASK))
181 panic("sh64_get_page: Out of memory already?\n");
182
183 return page;
184}
185
186static void shmedia_mapioaddr(unsigned long pa, unsigned long va,
187 unsigned long flags)
188{
189 pgd_t *pgdp;
190 pud_t *pudp;
191 pmd_t *pmdp;
192 pte_t *ptep, pte;
193 pgprot_t prot;
194
195 pr_debug("shmedia_mapiopage pa %08lx va %08lx\n", pa, va);
196
197 if (!flags)
198 flags = 1; /* 1 = CB0-1 device */
199
200 pgdp = pgd_offset_k(va);
201 if (pgd_none(*pgdp) || !pgd_present(*pgdp)) {
202 pudp = (pud_t *)sh64_get_page();
203 set_pgd(pgdp, __pgd((unsigned long)pudp | _KERNPG_TABLE));
204 }
205
206 pudp = pud_offset(pgdp, va);
207 if (pud_none(*pudp) || !pud_present(*pudp)) {
208 pmdp = (pmd_t *)sh64_get_page();
209 set_pud(pudp, __pud((unsigned long)pmdp | _KERNPG_TABLE));
210 }
211
212 pmdp = pmd_offset(pudp, va);
213 if (pmd_none(*pmdp) || !pmd_present(*pmdp)) {
214 ptep = (pte_t *)sh64_get_page();
215 set_pmd(pmdp, __pmd((unsigned long)ptep + _PAGE_TABLE));
216 }
217
218 prot = __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE |
219 _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_SHARED | flags);
220
221 pte = pfn_pte(pa >> PAGE_SHIFT, prot);
222 ptep = pte_offset_kernel(pmdp, va);
223
224 if (!pte_none(*ptep) &&
225 pte_val(*ptep) != pte_val(pte))
226 pte_ERROR(*ptep);
227
228 set_pte(ptep, pte);
229
230 flush_tlb_kernel_range(va, PAGE_SIZE);
231}
232
233static void shmedia_unmapioaddr(unsigned long vaddr)
234{
235 pgd_t *pgdp;
236 pud_t *pudp;
237 pmd_t *pmdp;
238 pte_t *ptep;
239
240 pgdp = pgd_offset_k(vaddr);
241 if (pgd_none(*pgdp) || pgd_bad(*pgdp))
242 return;
243
244 pudp = pud_offset(pgdp, vaddr);
245 if (pud_none(*pudp) || pud_bad(*pudp))
246 return;
247
248 pmdp = pmd_offset(pudp, vaddr);
249 if (pmd_none(*pmdp) || pmd_bad(*pmdp))
250 return;
251
252 ptep = pte_offset_kernel(pmdp, vaddr);
253
254 if (pte_none(*ptep) || !pte_present(*ptep))
255 return;
256
257 clear_page((void *)ptep);
258 pte_clear(&init_mm, vaddr, ptep);
259}
260
261void __iomem *__ioremap(unsigned long offset, unsigned long size,
262 unsigned long flags)
263{
264 char name[14];
265
266 sprintf(name, "phys_%08x", (u32)offset);
267 return shmedia_alloc_io(offset, size, name, flags);
268}
269EXPORT_SYMBOL(__ioremap);
270
271void __iounmap(void __iomem *virtual)
272{
273 unsigned long vaddr = (unsigned long)virtual & PAGE_MASK;
274 struct resource *res;
275 unsigned int psz;
276
277 res = shmedia_find_resource(&shmedia_iomap, vaddr);
278 if (!res) {
279 printk(KERN_ERR "%s: Failed to free 0x%08lx\n",
280 __func__, vaddr);
281 return;
282 }
283
284 psz = (res->end - res->start + (PAGE_SIZE - 1)) / PAGE_SIZE;
285
286 shmedia_free_io(res);
287
288 if ((char *)res >= (char *)xresv &&
289 (char *)res < (char *)&xresv[XNRES]) {
290 xres_free((struct xresource *)res);
291 } else {
292 kfree(res);
293 }
294}
295EXPORT_SYMBOL(__iounmap);
296
297static int
298ioremap_proc_info(char *buf, char **start, off_t fpos, int length, int *eof,
299 void *data)
300{
301 char *p = buf, *e = buf + length;
302 struct resource *r;
303 const char *nm;
304
305 for (r = ((struct resource *)data)->child; r != NULL; r = r->sibling) {
306 if (p + 32 >= e) /* Better than nothing */
307 break;
308 nm = r->name;
309 if (nm == NULL)
310 nm = "???";
311
312 p += sprintf(p, "%08lx-%08lx: %s\n",
313 (unsigned long)r->start,
314 (unsigned long)r->end, nm);
315 }
316
317 return p-buf;
318}
319
320static int __init register_proc_onchip(void)
321{
322 create_proc_read_entry("io_map", 0, 0, ioremap_proc_info,
323 &shmedia_iomap);
324 return 0;
325}
326late_initcall(register_proc_onchip);
diff --git a/arch/sh/mm/ioremap_fixed.c b/arch/sh/mm/ioremap_fixed.c
new file mode 100644
index 000000000000..efbe84af9983
--- /dev/null
+++ b/arch/sh/mm/ioremap_fixed.c
@@ -0,0 +1,134 @@
1/*
2 * Re-map IO memory to kernel address space so that we can access it.
3 *
4 * These functions should only be used when it is necessary to map a
5 * physical address space into the kernel address space before ioremap()
6 * can be used, e.g. early in boot before paging_init().
7 *
8 * Copyright (C) 2009 Matt Fleming
9 */
10
11#include <linux/vmalloc.h>
12#include <linux/ioport.h>
13#include <linux/module.h>
14#include <linux/mm.h>
15#include <linux/io.h>
16#include <linux/bootmem.h>
17#include <linux/proc_fs.h>
18#include <asm/fixmap.h>
19#include <asm/page.h>
20#include <asm/pgalloc.h>
21#include <asm/addrspace.h>
22#include <asm/cacheflush.h>
23#include <asm/tlbflush.h>
24#include <asm/mmu.h>
25#include <asm/mmu_context.h>
26
27struct ioremap_map {
28 void __iomem *addr;
29 unsigned long size;
30 unsigned long fixmap_addr;
31};
32
33static struct ioremap_map ioremap_maps[FIX_N_IOREMAPS];
34
35void __init ioremap_fixed_init(void)
36{
37 struct ioremap_map *map;
38 int i;
39
40 for (i = 0; i < FIX_N_IOREMAPS; i++) {
41 map = &ioremap_maps[i];
42 map->fixmap_addr = __fix_to_virt(FIX_IOREMAP_BEGIN + i);
43 }
44}
45
46void __init __iomem *
47ioremap_fixed(phys_addr_t phys_addr, unsigned long size, pgprot_t prot)
48{
49 enum fixed_addresses idx0, idx;
50 struct ioremap_map *map;
51 unsigned int nrpages;
52 unsigned long offset;
53 int i, slot;
54
55 /*
56 * Mappings have to be page-aligned
57 */
58 offset = phys_addr & ~PAGE_MASK;
59 phys_addr &= PAGE_MASK;
60 size = PAGE_ALIGN(phys_addr + size) - phys_addr;
61
62 slot = -1;
63 for (i = 0; i < FIX_N_IOREMAPS; i++) {
64 map = &ioremap_maps[i];
65 if (!map->addr) {
66 map->size = size;
67 slot = i;
68 break;
69 }
70 }
71
72 if (slot < 0)
73 return NULL;
74
75 /*
76 * Mappings have to fit in the FIX_IOREMAP area.
77 */
78 nrpages = size >> PAGE_SHIFT;
79 if (nrpages > FIX_N_IOREMAPS)
80 return NULL;
81
82 /*
83 * Ok, go for it..
84 */
85 idx0 = FIX_IOREMAP_BEGIN + slot;
86 idx = idx0;
87 while (nrpages > 0) {
88 pgprot_val(prot) |= _PAGE_WIRED;
89 __set_fixmap(idx, phys_addr, prot);
90 phys_addr += PAGE_SIZE;
91 idx++;
92 --nrpages;
93 }
94
95 map->addr = (void __iomem *)(offset + map->fixmap_addr);
96 return map->addr;
97}
98
99int iounmap_fixed(void __iomem *addr)
100{
101 enum fixed_addresses idx;
102 struct ioremap_map *map;
103 unsigned int nrpages;
104 int i, slot;
105
106 slot = -1;
107 for (i = 0; i < FIX_N_IOREMAPS; i++) {
108 map = &ioremap_maps[i];
109 if (map->addr == addr) {
110 slot = i;
111 break;
112 }
113 }
114
115 /*
116 * If we don't match, it's not for us.
117 */
118 if (slot < 0)
119 return -EINVAL;
120
121 nrpages = map->size >> PAGE_SHIFT;
122
123 idx = FIX_IOREMAP_BEGIN + slot + nrpages - 1;
124 while (nrpages > 0) {
125 __clear_fixmap(idx, __pgprot(_PAGE_WIRED));
126 --idx;
127 --nrpages;
128 }
129
130 map->size = 0;
131 map->addr = NULL;
132
133 return 0;
134}
diff --git a/arch/sh/mm/kmap.c b/arch/sh/mm/kmap.c
index 16e01b5fed04..15d74ea42094 100644
--- a/arch/sh/mm/kmap.c
+++ b/arch/sh/mm/kmap.c
@@ -39,7 +39,9 @@ void *kmap_coherent(struct page *page, unsigned long addr)
39 pagefault_disable(); 39 pagefault_disable();
40 40
41 idx = FIX_CMAP_END - 41 idx = FIX_CMAP_END -
42 ((addr & current_cpu_data.dcache.alias_mask) >> PAGE_SHIFT); 42 (((addr >> PAGE_SHIFT) & (FIX_N_COLOURS - 1)) +
43 (FIX_N_COLOURS * smp_processor_id()));
44
43 vaddr = __fix_to_virt(idx); 45 vaddr = __fix_to_virt(idx);
44 46
45 BUG_ON(!pte_none(*(kmap_coherent_pte - idx))); 47 BUG_ON(!pte_none(*(kmap_coherent_pte - idx)));
diff --git a/arch/sh/mm/mmap.c b/arch/sh/mm/mmap.c
index d2984fa42d3d..afeb710ec5c3 100644
--- a/arch/sh/mm/mmap.c
+++ b/arch/sh/mm/mmap.c
@@ -54,7 +54,8 @@ unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr,
54 /* We do not accept a shared mapping if it would violate 54 /* We do not accept a shared mapping if it would violate
55 * cache aliasing constraints. 55 * cache aliasing constraints.
56 */ 56 */
57 if ((flags & MAP_SHARED) && (addr & shm_align_mask)) 57 if ((flags & MAP_SHARED) &&
58 ((addr - (pgoff << PAGE_SHIFT)) & shm_align_mask))
58 return -EINVAL; 59 return -EINVAL;
59 return addr; 60 return addr;
60 } 61 }
diff --git a/arch/sh/mm/nommu.c b/arch/sh/mm/nommu.c
index ac16c05917ef..7694f50c9034 100644
--- a/arch/sh/mm/nommu.c
+++ b/arch/sh/mm/nommu.c
@@ -94,3 +94,7 @@ void __init page_table_range_init(unsigned long start, unsigned long end,
94void __set_fixmap(enum fixed_addresses idx, unsigned long phys, pgprot_t prot) 94void __set_fixmap(enum fixed_addresses idx, unsigned long phys, pgprot_t prot)
95{ 95{
96} 96}
97
98void pgtable_cache_init(void)
99{
100}
diff --git a/arch/sh/mm/numa.c b/arch/sh/mm/numa.c
index 9b784fdb947c..961b34085e3b 100644
--- a/arch/sh/mm/numa.c
+++ b/arch/sh/mm/numa.c
@@ -28,7 +28,7 @@ void __init setup_memory(void)
28{ 28{
29 unsigned long free_pfn = PFN_UP(__pa(_end)); 29 unsigned long free_pfn = PFN_UP(__pa(_end));
30 u64 base = min_low_pfn << PAGE_SHIFT; 30 u64 base = min_low_pfn << PAGE_SHIFT;
31 u64 size = (max_low_pfn << PAGE_SHIFT) - min_low_pfn; 31 u64 size = (max_low_pfn << PAGE_SHIFT) - base;
32 32
33 lmb_add(base, size); 33 lmb_add(base, size);
34 34
@@ -38,6 +38,15 @@ void __init setup_memory(void)
38 (__MEMORY_START + CONFIG_ZERO_PAGE_OFFSET)); 38 (__MEMORY_START + CONFIG_ZERO_PAGE_OFFSET));
39 39
40 /* 40 /*
41 * Reserve physical pages below CONFIG_ZERO_PAGE_OFFSET.
42 */
43 if (CONFIG_ZERO_PAGE_OFFSET != 0)
44 lmb_reserve(__MEMORY_START, CONFIG_ZERO_PAGE_OFFSET);
45
46 lmb_analyze();
47 lmb_dump_all();
48
49 /*
41 * Node 0 sets up its pgdat at the first available pfn, 50 * Node 0 sets up its pgdat at the first available pfn,
42 * and bumps it up before setting up the bootmem allocator. 51 * and bumps it up before setting up the bootmem allocator.
43 */ 52 */
@@ -60,18 +69,21 @@ void __init setup_bootmem_node(int nid, unsigned long start, unsigned long end)
60 unsigned long bootmem_paddr; 69 unsigned long bootmem_paddr;
61 70
62 /* Don't allow bogus node assignment */ 71 /* Don't allow bogus node assignment */
63 BUG_ON(nid > MAX_NUMNODES || nid == 0); 72 BUG_ON(nid > MAX_NUMNODES || nid <= 0);
64 73
65 start_pfn = start >> PAGE_SHIFT; 74 start_pfn = start >> PAGE_SHIFT;
66 end_pfn = end >> PAGE_SHIFT; 75 end_pfn = end >> PAGE_SHIFT;
67 76
77 pmb_bolt_mapping((unsigned long)__va(start), start, end - start,
78 PAGE_KERNEL);
79
68 lmb_add(start, end - start); 80 lmb_add(start, end - start);
69 81
70 __add_active_range(nid, start_pfn, end_pfn); 82 __add_active_range(nid, start_pfn, end_pfn);
71 83
72 /* Node-local pgdat */ 84 /* Node-local pgdat */
73 NODE_DATA(nid) = __va(lmb_alloc_base(sizeof(struct pglist_data), 85 NODE_DATA(nid) = __va(lmb_alloc_base(sizeof(struct pglist_data),
74 SMP_CACHE_BYTES, end_pfn)); 86 SMP_CACHE_BYTES, end));
75 memset(NODE_DATA(nid), 0, sizeof(struct pglist_data)); 87 memset(NODE_DATA(nid), 0, sizeof(struct pglist_data));
76 88
77 NODE_DATA(nid)->bdata = &bootmem_node_data[nid]; 89 NODE_DATA(nid)->bdata = &bootmem_node_data[nid];
@@ -81,7 +93,7 @@ void __init setup_bootmem_node(int nid, unsigned long start, unsigned long end)
81 /* Node-local bootmap */ 93 /* Node-local bootmap */
82 bootmap_pages = bootmem_bootmap_pages(end_pfn - start_pfn); 94 bootmap_pages = bootmem_bootmap_pages(end_pfn - start_pfn);
83 bootmem_paddr = lmb_alloc_base(bootmap_pages << PAGE_SHIFT, 95 bootmem_paddr = lmb_alloc_base(bootmap_pages << PAGE_SHIFT,
84 PAGE_SIZE, end_pfn); 96 PAGE_SIZE, end);
85 init_bootmem_node(NODE_DATA(nid), bootmem_paddr >> PAGE_SHIFT, 97 init_bootmem_node(NODE_DATA(nid), bootmem_paddr >> PAGE_SHIFT,
86 start_pfn, end_pfn); 98 start_pfn, end_pfn);
87 99
diff --git a/arch/sh/mm/pgtable.c b/arch/sh/mm/pgtable.c
new file mode 100644
index 000000000000..26e03a1f7ca4
--- /dev/null
+++ b/arch/sh/mm/pgtable.c
@@ -0,0 +1,57 @@
1#include <linux/mm.h>
2#include <linux/slab.h>
3
4#define PGALLOC_GFP GFP_KERNEL | __GFP_REPEAT | __GFP_ZERO
5
6static struct kmem_cache *pgd_cachep;
7#if PAGETABLE_LEVELS > 2
8static struct kmem_cache *pmd_cachep;
9#endif
10
11void pgd_ctor(void *x)
12{
13 pgd_t *pgd = x;
14
15 memcpy(pgd + USER_PTRS_PER_PGD,
16 swapper_pg_dir + USER_PTRS_PER_PGD,
17 (PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t));
18}
19
20void pgtable_cache_init(void)
21{
22 pgd_cachep = kmem_cache_create("pgd_cache",
23 PTRS_PER_PGD * (1<<PTE_MAGNITUDE),
24 PAGE_SIZE, SLAB_PANIC, pgd_ctor);
25#if PAGETABLE_LEVELS > 2
26 pmd_cachep = kmem_cache_create("pmd_cache",
27 PTRS_PER_PMD * (1<<PTE_MAGNITUDE),
28 PAGE_SIZE, SLAB_PANIC, NULL);
29#endif
30}
31
32pgd_t *pgd_alloc(struct mm_struct *mm)
33{
34 return kmem_cache_alloc(pgd_cachep, PGALLOC_GFP);
35}
36
37void pgd_free(struct mm_struct *mm, pgd_t *pgd)
38{
39 kmem_cache_free(pgd_cachep, pgd);
40}
41
42#if PAGETABLE_LEVELS > 2
43void pud_populate(struct mm_struct *mm, pud_t *pud, pmd_t *pmd)
44{
45 set_pud(pud, __pud((unsigned long)pmd));
46}
47
48pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address)
49{
50 return kmem_cache_alloc(pmd_cachep, PGALLOC_GFP);
51}
52
53void pmd_free(struct mm_struct *mm, pmd_t *pmd)
54{
55 kmem_cache_free(pmd_cachep, pmd);
56}
57#endif /* PAGETABLE_LEVELS > 2 */
diff --git a/arch/sh/mm/pmb-fixed.c b/arch/sh/mm/pmb-fixed.c
deleted file mode 100644
index 43c8eac4d8a1..000000000000
--- a/arch/sh/mm/pmb-fixed.c
+++ /dev/null
@@ -1,45 +0,0 @@
1/*
2 * arch/sh/mm/fixed_pmb.c
3 *
4 * Copyright (C) 2009 Renesas Solutions Corp.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/init.h>
11#include <linux/mm.h>
12#include <linux/io.h>
13#include <asm/mmu.h>
14#include <asm/mmu_context.h>
15
16static int __uses_jump_to_uncached fixed_pmb_init(void)
17{
18 int i;
19 unsigned long addr, data;
20
21 jump_to_uncached();
22
23 for (i = 0; i < PMB_ENTRY_MAX; i++) {
24 addr = PMB_DATA + (i << PMB_E_SHIFT);
25 data = ctrl_inl(addr);
26 if (!(data & PMB_V))
27 continue;
28
29 if (data & PMB_C) {
30#if defined(CONFIG_CACHE_WRITETHROUGH)
31 data |= PMB_WT;
32#elif defined(CONFIG_CACHE_WRITEBACK)
33 data &= ~PMB_WT;
34#else
35 data &= ~(PMB_C | PMB_WT);
36#endif
37 }
38 ctrl_outl(data, addr);
39 }
40
41 back_to_cached();
42
43 return 0;
44}
45arch_initcall(fixed_pmb_init);
diff --git a/arch/sh/mm/pmb.c b/arch/sh/mm/pmb.c
index aade31102112..e43ec600afcf 100644
--- a/arch/sh/mm/pmb.c
+++ b/arch/sh/mm/pmb.c
@@ -3,11 +3,8 @@
3 * 3 *
4 * Privileged Space Mapping Buffer (PMB) Support. 4 * Privileged Space Mapping Buffer (PMB) Support.
5 * 5 *
6 * Copyright (C) 2005, 2006, 2007 Paul Mundt 6 * Copyright (C) 2005 - 2010 Paul Mundt
7 * 7 * Copyright (C) 2010 Matt Fleming
8 * P1/P2 Section mapping definitions from map32.h, which was:
9 *
10 * Copyright 2003 (c) Lineo Solutions,Inc.
11 * 8 *
12 * This file is subject to the terms and conditions of the GNU General Public 9 * This file is subject to the terms and conditions of the GNU General Public
13 * License. See the file "COPYING" in the main directory of this archive 10 * License. See the file "COPYING" in the main directory of this archive
@@ -18,355 +15,802 @@
18#include <linux/sysdev.h> 15#include <linux/sysdev.h>
19#include <linux/cpu.h> 16#include <linux/cpu.h>
20#include <linux/module.h> 17#include <linux/module.h>
21#include <linux/slab.h>
22#include <linux/bitops.h> 18#include <linux/bitops.h>
23#include <linux/debugfs.h> 19#include <linux/debugfs.h>
24#include <linux/fs.h> 20#include <linux/fs.h>
25#include <linux/seq_file.h> 21#include <linux/seq_file.h>
26#include <linux/err.h> 22#include <linux/err.h>
23#include <linux/io.h>
24#include <linux/spinlock.h>
25#include <linux/vmalloc.h>
26#include <asm/cacheflush.h>
27#include <asm/sizes.h>
27#include <asm/system.h> 28#include <asm/system.h>
28#include <asm/uaccess.h> 29#include <asm/uaccess.h>
29#include <asm/pgtable.h> 30#include <asm/pgtable.h>
31#include <asm/page.h>
30#include <asm/mmu.h> 32#include <asm/mmu.h>
31#include <asm/io.h>
32#include <asm/mmu_context.h> 33#include <asm/mmu_context.h>
33 34
34#define NR_PMB_ENTRIES 16 35struct pmb_entry;
35 36
36static void __pmb_unmap(struct pmb_entry *); 37struct pmb_entry {
38 unsigned long vpn;
39 unsigned long ppn;
40 unsigned long flags;
41 unsigned long size;
37 42
38static struct kmem_cache *pmb_cache; 43 spinlock_t lock;
39static unsigned long pmb_map;
40 44
41static struct pmb_entry pmb_init_map[] = { 45 /*
42 /* vpn ppn flags (ub/sz/c/wt) */ 46 * 0 .. NR_PMB_ENTRIES for specific entry selection, or
47 * PMB_NO_ENTRY to search for a free one
48 */
49 int entry;
43 50
44 /* P1 Section Mappings */ 51 /* Adjacent entry link for contiguous multi-entry mappings */
45 { 0x80000000, 0x00000000, PMB_SZ_64M | PMB_C, }, 52 struct pmb_entry *link;
46 { 0x84000000, 0x04000000, PMB_SZ_64M | PMB_C, }, 53};
47 { 0x88000000, 0x08000000, PMB_SZ_128M | PMB_C, },
48 { 0x90000000, 0x10000000, PMB_SZ_64M | PMB_C, },
49 { 0x94000000, 0x14000000, PMB_SZ_64M | PMB_C, },
50 { 0x98000000, 0x18000000, PMB_SZ_64M | PMB_C, },
51 54
52 /* P2 Section Mappings */ 55static struct {
53 { 0xa0000000, 0x00000000, PMB_UB | PMB_SZ_64M | PMB_WT, }, 56 unsigned long size;
54 { 0xa4000000, 0x04000000, PMB_UB | PMB_SZ_64M | PMB_WT, }, 57 int flag;
55 { 0xa8000000, 0x08000000, PMB_UB | PMB_SZ_128M | PMB_WT, }, 58} pmb_sizes[] = {
56 { 0xb0000000, 0x10000000, PMB_UB | PMB_SZ_64M | PMB_WT, }, 59 { .size = SZ_512M, .flag = PMB_SZ_512M, },
57 { 0xb4000000, 0x14000000, PMB_UB | PMB_SZ_64M | PMB_WT, }, 60 { .size = SZ_128M, .flag = PMB_SZ_128M, },
58 { 0xb8000000, 0x18000000, PMB_UB | PMB_SZ_64M | PMB_WT, }, 61 { .size = SZ_64M, .flag = PMB_SZ_64M, },
62 { .size = SZ_16M, .flag = PMB_SZ_16M, },
59}; 63};
60 64
61static inline unsigned long mk_pmb_entry(unsigned int entry) 65static void pmb_unmap_entry(struct pmb_entry *, int depth);
66
67static DEFINE_RWLOCK(pmb_rwlock);
68static struct pmb_entry pmb_entry_list[NR_PMB_ENTRIES];
69static DECLARE_BITMAP(pmb_map, NR_PMB_ENTRIES);
70
71static unsigned int pmb_iomapping_enabled;
72
73static __always_inline unsigned long mk_pmb_entry(unsigned int entry)
62{ 74{
63 return (entry & PMB_E_MASK) << PMB_E_SHIFT; 75 return (entry & PMB_E_MASK) << PMB_E_SHIFT;
64} 76}
65 77
66static inline unsigned long mk_pmb_addr(unsigned int entry) 78static __always_inline unsigned long mk_pmb_addr(unsigned int entry)
67{ 79{
68 return mk_pmb_entry(entry) | PMB_ADDR; 80 return mk_pmb_entry(entry) | PMB_ADDR;
69} 81}
70 82
71static inline unsigned long mk_pmb_data(unsigned int entry) 83static __always_inline unsigned long mk_pmb_data(unsigned int entry)
72{ 84{
73 return mk_pmb_entry(entry) | PMB_DATA; 85 return mk_pmb_entry(entry) | PMB_DATA;
74} 86}
75 87
76static DEFINE_SPINLOCK(pmb_list_lock); 88static __always_inline unsigned int pmb_ppn_in_range(unsigned long ppn)
77static struct pmb_entry *pmb_list; 89{
90 return ppn >= __pa(memory_start) && ppn < __pa(memory_end);
91}
78 92
79static inline void pmb_list_add(struct pmb_entry *pmbe) 93/*
94 * Ensure that the PMB entries match our cache configuration.
95 *
96 * When we are in 32-bit address extended mode, CCR.CB becomes
97 * invalid, so care must be taken to manually adjust cacheable
98 * translations.
99 */
100static __always_inline unsigned long pmb_cache_flags(void)
80{ 101{
81 struct pmb_entry **p, *tmp; 102 unsigned long flags = 0;
103
104#if defined(CONFIG_CACHE_OFF)
105 flags |= PMB_WT | PMB_UB;
106#elif defined(CONFIG_CACHE_WRITETHROUGH)
107 flags |= PMB_C | PMB_WT | PMB_UB;
108#elif defined(CONFIG_CACHE_WRITEBACK)
109 flags |= PMB_C;
110#endif
82 111
83 p = &pmb_list; 112 return flags;
84 while ((tmp = *p) != NULL) 113}
85 p = &tmp->next;
86 114
87 pmbe->next = tmp; 115/*
88 *p = pmbe; 116 * Convert typical pgprot value to the PMB equivalent
117 */
118static inline unsigned long pgprot_to_pmb_flags(pgprot_t prot)
119{
120 unsigned long pmb_flags = 0;
121 u64 flags = pgprot_val(prot);
122
123 if (flags & _PAGE_CACHABLE)
124 pmb_flags |= PMB_C;
125 if (flags & _PAGE_WT)
126 pmb_flags |= PMB_WT | PMB_UB;
127
128 return pmb_flags;
89} 129}
90 130
91static inline void pmb_list_del(struct pmb_entry *pmbe) 131static inline bool pmb_can_merge(struct pmb_entry *a, struct pmb_entry *b)
92{ 132{
93 struct pmb_entry **p, *tmp; 133 return (b->vpn == (a->vpn + a->size)) &&
134 (b->ppn == (a->ppn + a->size)) &&
135 (b->flags == a->flags);
136}
137
138static bool pmb_mapping_exists(unsigned long vaddr, phys_addr_t phys,
139 unsigned long size)
140{
141 int i;
142
143 read_lock(&pmb_rwlock);
144
145 for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) {
146 struct pmb_entry *pmbe, *iter;
147 unsigned long span;
148
149 if (!test_bit(i, pmb_map))
150 continue;
151
152 pmbe = &pmb_entry_list[i];
153
154 /*
155 * See if VPN and PPN are bounded by an existing mapping.
156 */
157 if ((vaddr < pmbe->vpn) || (vaddr >= (pmbe->vpn + pmbe->size)))
158 continue;
159 if ((phys < pmbe->ppn) || (phys >= (pmbe->ppn + pmbe->size)))
160 continue;
161
162 /*
163 * Now see if we're in range of a simple mapping.
164 */
165 if (size <= pmbe->size) {
166 read_unlock(&pmb_rwlock);
167 return true;
168 }
169
170 span = pmbe->size;
94 171
95 for (p = &pmb_list; (tmp = *p); p = &tmp->next) 172 /*
96 if (tmp == pmbe) { 173 * Finally for sizes that involve compound mappings, walk
97 *p = tmp->next; 174 * the chain.
98 return; 175 */
176 for (iter = pmbe->link; iter; iter = iter->link)
177 span += iter->size;
178
179 /*
180 * Nothing else to do if the range requirements are met.
181 */
182 if (size <= span) {
183 read_unlock(&pmb_rwlock);
184 return true;
99 } 185 }
186 }
187
188 read_unlock(&pmb_rwlock);
189 return false;
190}
191
192static bool pmb_size_valid(unsigned long size)
193{
194 int i;
195
196 for (i = 0; i < ARRAY_SIZE(pmb_sizes); i++)
197 if (pmb_sizes[i].size == size)
198 return true;
199
200 return false;
201}
202
203static inline bool pmb_addr_valid(unsigned long addr, unsigned long size)
204{
205 return (addr >= P1SEG && (addr + size - 1) < P3SEG);
206}
207
208static inline bool pmb_prot_valid(pgprot_t prot)
209{
210 return (pgprot_val(prot) & _PAGE_USER) == 0;
211}
212
213static int pmb_size_to_flags(unsigned long size)
214{
215 int i;
216
217 for (i = 0; i < ARRAY_SIZE(pmb_sizes); i++)
218 if (pmb_sizes[i].size == size)
219 return pmb_sizes[i].flag;
220
221 return 0;
100} 222}
101 223
102struct pmb_entry *pmb_alloc(unsigned long vpn, unsigned long ppn, 224static int pmb_alloc_entry(void)
103 unsigned long flags) 225{
226 int pos;
227
228 pos = find_first_zero_bit(pmb_map, NR_PMB_ENTRIES);
229 if (pos >= 0 && pos < NR_PMB_ENTRIES)
230 __set_bit(pos, pmb_map);
231 else
232 pos = -ENOSPC;
233
234 return pos;
235}
236
237static struct pmb_entry *pmb_alloc(unsigned long vpn, unsigned long ppn,
238 unsigned long flags, int entry)
104{ 239{
105 struct pmb_entry *pmbe; 240 struct pmb_entry *pmbe;
241 unsigned long irqflags;
242 void *ret = NULL;
243 int pos;
244
245 write_lock_irqsave(&pmb_rwlock, irqflags);
246
247 if (entry == PMB_NO_ENTRY) {
248 pos = pmb_alloc_entry();
249 if (unlikely(pos < 0)) {
250 ret = ERR_PTR(pos);
251 goto out;
252 }
253 } else {
254 if (__test_and_set_bit(entry, pmb_map)) {
255 ret = ERR_PTR(-ENOSPC);
256 goto out;
257 }
258
259 pos = entry;
260 }
261
262 write_unlock_irqrestore(&pmb_rwlock, irqflags);
106 263
107 pmbe = kmem_cache_alloc(pmb_cache, GFP_KERNEL); 264 pmbe = &pmb_entry_list[pos];
108 if (!pmbe) 265
109 return ERR_PTR(-ENOMEM); 266 memset(pmbe, 0, sizeof(struct pmb_entry));
267
268 spin_lock_init(&pmbe->lock);
110 269
111 pmbe->vpn = vpn; 270 pmbe->vpn = vpn;
112 pmbe->ppn = ppn; 271 pmbe->ppn = ppn;
113 pmbe->flags = flags; 272 pmbe->flags = flags;
114 273 pmbe->entry = pos;
115 spin_lock_irq(&pmb_list_lock);
116 pmb_list_add(pmbe);
117 spin_unlock_irq(&pmb_list_lock);
118 274
119 return pmbe; 275 return pmbe;
276
277out:
278 write_unlock_irqrestore(&pmb_rwlock, irqflags);
279 return ret;
120} 280}
121 281
122void pmb_free(struct pmb_entry *pmbe) 282static void pmb_free(struct pmb_entry *pmbe)
123{ 283{
124 spin_lock_irq(&pmb_list_lock); 284 __clear_bit(pmbe->entry, pmb_map);
125 pmb_list_del(pmbe);
126 spin_unlock_irq(&pmb_list_lock);
127 285
128 kmem_cache_free(pmb_cache, pmbe); 286 pmbe->entry = PMB_NO_ENTRY;
287 pmbe->link = NULL;
129} 288}
130 289
131/* 290/*
132 * Must be in P2 for __set_pmb_entry() 291 * Must be run uncached.
133 */ 292 */
134int __set_pmb_entry(unsigned long vpn, unsigned long ppn, 293static void __set_pmb_entry(struct pmb_entry *pmbe)
135 unsigned long flags, int *entry)
136{ 294{
137 unsigned int pos = *entry; 295 unsigned long addr, data;
138 296
139 if (unlikely(pos == PMB_NO_ENTRY)) 297 addr = mk_pmb_addr(pmbe->entry);
140 pos = find_first_zero_bit(&pmb_map, NR_PMB_ENTRIES); 298 data = mk_pmb_data(pmbe->entry);
141 299
142repeat: 300 jump_to_uncached();
143 if (unlikely(pos > NR_PMB_ENTRIES))
144 return -ENOSPC;
145 301
146 if (test_and_set_bit(pos, &pmb_map)) { 302 /* Set V-bit */
147 pos = find_first_zero_bit(&pmb_map, NR_PMB_ENTRIES); 303 __raw_writel(pmbe->vpn | PMB_V, addr);
148 goto repeat; 304 __raw_writel(pmbe->ppn | pmbe->flags | PMB_V, data);
149 }
150 305
151 ctrl_outl(vpn | PMB_V, mk_pmb_addr(pos)); 306 back_to_cached();
307}
152 308
153#ifdef CONFIG_CACHE_WRITETHROUGH 309static void __clear_pmb_entry(struct pmb_entry *pmbe)
154 /* 310{
155 * When we are in 32-bit address extended mode, CCR.CB becomes 311 unsigned long addr, data;
156 * invalid, so care must be taken to manually adjust cacheable 312 unsigned long addr_val, data_val;
157 * translations.
158 */
159 if (likely(flags & PMB_C))
160 flags |= PMB_WT;
161#endif
162 313
163 ctrl_outl(ppn | flags | PMB_V, mk_pmb_data(pos)); 314 addr = mk_pmb_addr(pmbe->entry);
315 data = mk_pmb_data(pmbe->entry);
164 316
165 *entry = pos; 317 addr_val = __raw_readl(addr);
318 data_val = __raw_readl(data);
166 319
167 return 0; 320 /* Clear V-bit */
321 writel_uncached(addr_val & ~PMB_V, addr);
322 writel_uncached(data_val & ~PMB_V, data);
168} 323}
169 324
170int __uses_jump_to_uncached set_pmb_entry(struct pmb_entry *pmbe) 325#ifdef CONFIG_PM
326static void set_pmb_entry(struct pmb_entry *pmbe)
171{ 327{
172 int ret; 328 unsigned long flags;
173 329
174 jump_to_uncached(); 330 spin_lock_irqsave(&pmbe->lock, flags);
175 ret = __set_pmb_entry(pmbe->vpn, pmbe->ppn, pmbe->flags, &pmbe->entry); 331 __set_pmb_entry(pmbe);
176 back_to_cached(); 332 spin_unlock_irqrestore(&pmbe->lock, flags);
333}
334#endif /* CONFIG_PM */
177 335
178 return ret; 336int pmb_bolt_mapping(unsigned long vaddr, phys_addr_t phys,
337 unsigned long size, pgprot_t prot)
338{
339 struct pmb_entry *pmbp, *pmbe;
340 unsigned long orig_addr, orig_size;
341 unsigned long flags, pmb_flags;
342 int i, mapped;
343
344 if (!pmb_addr_valid(vaddr, size))
345 return -EFAULT;
346 if (pmb_mapping_exists(vaddr, phys, size))
347 return 0;
348
349 orig_addr = vaddr;
350 orig_size = size;
351
352 flush_tlb_kernel_range(vaddr, vaddr + size);
353
354 pmb_flags = pgprot_to_pmb_flags(prot);
355 pmbp = NULL;
356
357 do {
358 for (i = mapped = 0; i < ARRAY_SIZE(pmb_sizes); i++) {
359 if (size < pmb_sizes[i].size)
360 continue;
361
362 pmbe = pmb_alloc(vaddr, phys, pmb_flags |
363 pmb_sizes[i].flag, PMB_NO_ENTRY);
364 if (IS_ERR(pmbe)) {
365 pmb_unmap_entry(pmbp, mapped);
366 return PTR_ERR(pmbe);
367 }
368
369 spin_lock_irqsave(&pmbe->lock, flags);
370
371 pmbe->size = pmb_sizes[i].size;
372
373 __set_pmb_entry(pmbe);
374
375 phys += pmbe->size;
376 vaddr += pmbe->size;
377 size -= pmbe->size;
378
379 /*
380 * Link adjacent entries that span multiple PMB
381 * entries for easier tear-down.
382 */
383 if (likely(pmbp)) {
384 spin_lock(&pmbp->lock);
385 pmbp->link = pmbe;
386 spin_unlock(&pmbp->lock);
387 }
388
389 pmbp = pmbe;
390
391 /*
392 * Instead of trying smaller sizes on every
393 * iteration (even if we succeed in allocating
394 * space), try using pmb_sizes[i].size again.
395 */
396 i--;
397 mapped++;
398
399 spin_unlock_irqrestore(&pmbe->lock, flags);
400 }
401 } while (size >= SZ_16M);
402
403 flush_cache_vmap(orig_addr, orig_addr + orig_size);
404
405 return 0;
179} 406}
180 407
181void __uses_jump_to_uncached clear_pmb_entry(struct pmb_entry *pmbe) 408void __iomem *pmb_remap_caller(phys_addr_t phys, unsigned long size,
409 pgprot_t prot, void *caller)
182{ 410{
183 unsigned int entry = pmbe->entry; 411 unsigned long vaddr;
184 unsigned long addr; 412 phys_addr_t offset, last_addr;
413 phys_addr_t align_mask;
414 unsigned long aligned;
415 struct vm_struct *area;
416 int i, ret;
417
418 if (!pmb_iomapping_enabled)
419 return NULL;
185 420
186 /* 421 /*
187 * Don't allow clearing of wired init entries, P1 or P2 access 422 * Small mappings need to go through the TLB.
188 * without a corresponding mapping in the PMB will lead to reset
189 * by the TLB.
190 */ 423 */
191 if (unlikely(entry < ARRAY_SIZE(pmb_init_map) || 424 if (size < SZ_16M)
192 entry >= NR_PMB_ENTRIES)) 425 return ERR_PTR(-EINVAL);
193 return; 426 if (!pmb_prot_valid(prot))
427 return ERR_PTR(-EINVAL);
194 428
195 jump_to_uncached(); 429 for (i = 0; i < ARRAY_SIZE(pmb_sizes); i++)
430 if (size >= pmb_sizes[i].size)
431 break;
196 432
197 /* Clear V-bit */ 433 last_addr = phys + size;
198 addr = mk_pmb_addr(entry); 434 align_mask = ~(pmb_sizes[i].size - 1);
199 ctrl_outl(ctrl_inl(addr) & ~PMB_V, addr); 435 offset = phys & ~align_mask;
436 phys &= align_mask;
437 aligned = ALIGN(last_addr, pmb_sizes[i].size) - phys;
200 438
201 addr = mk_pmb_data(entry); 439 /*
202 ctrl_outl(ctrl_inl(addr) & ~PMB_V, addr); 440 * XXX: This should really start from uncached_end, but this
441 * causes the MMU to reset, so for now we restrict it to the
442 * 0xb000...0xc000 range.
443 */
444 area = __get_vm_area_caller(aligned, VM_IOREMAP, 0xb0000000,
445 P3SEG, caller);
446 if (!area)
447 return NULL;
203 448
204 back_to_cached(); 449 area->phys_addr = phys;
450 vaddr = (unsigned long)area->addr;
451
452 ret = pmb_bolt_mapping(vaddr, phys, size, prot);
453 if (unlikely(ret != 0))
454 return ERR_PTR(ret);
205 455
206 clear_bit(entry, &pmb_map); 456 return (void __iomem *)(offset + (char *)vaddr);
207} 457}
208 458
459int pmb_unmap(void __iomem *addr)
460{
461 struct pmb_entry *pmbe = NULL;
462 unsigned long vaddr = (unsigned long __force)addr;
463 int i, found = 0;
464
465 read_lock(&pmb_rwlock);
466
467 for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) {
468 if (test_bit(i, pmb_map)) {
469 pmbe = &pmb_entry_list[i];
470 if (pmbe->vpn == vaddr) {
471 found = 1;
472 break;
473 }
474 }
475 }
209 476
210static struct { 477 read_unlock(&pmb_rwlock);
211 unsigned long size; 478
212 int flag; 479 if (found) {
213} pmb_sizes[] = { 480 pmb_unmap_entry(pmbe, NR_PMB_ENTRIES);
214 { .size = 0x20000000, .flag = PMB_SZ_512M, }, 481 return 0;
215 { .size = 0x08000000, .flag = PMB_SZ_128M, }, 482 }
216 { .size = 0x04000000, .flag = PMB_SZ_64M, }, 483
217 { .size = 0x01000000, .flag = PMB_SZ_16M, }, 484 return -EINVAL;
218}; 485}
219 486
220long pmb_remap(unsigned long vaddr, unsigned long phys, 487static void __pmb_unmap_entry(struct pmb_entry *pmbe, int depth)
221 unsigned long size, unsigned long flags)
222{ 488{
223 struct pmb_entry *pmbp, *pmbe; 489 do {
224 unsigned long wanted; 490 struct pmb_entry *pmblink = pmbe;
225 int pmb_flags, i;
226 long err;
227
228 /* Convert typical pgprot value to the PMB equivalent */
229 if (flags & _PAGE_CACHABLE) {
230 if (flags & _PAGE_WT)
231 pmb_flags = PMB_WT;
232 else
233 pmb_flags = PMB_C;
234 } else
235 pmb_flags = PMB_WT | PMB_UB;
236 491
237 pmbp = NULL; 492 /*
238 wanted = size; 493 * We may be called before this pmb_entry has been
494 * entered into the PMB table via set_pmb_entry(), but
495 * that's OK because we've allocated a unique slot for
496 * this entry in pmb_alloc() (even if we haven't filled
497 * it yet).
498 *
499 * Therefore, calling __clear_pmb_entry() is safe as no
500 * other mapping can be using that slot.
501 */
502 __clear_pmb_entry(pmbe);
503
504 flush_cache_vunmap(pmbe->vpn, pmbe->vpn + pmbe->size);
505
506 pmbe = pmblink->link;
239 507
240again: 508 pmb_free(pmblink);
241 for (i = 0; i < ARRAY_SIZE(pmb_sizes); i++) { 509 } while (pmbe && --depth);
242 int ret; 510}
511
512static void pmb_unmap_entry(struct pmb_entry *pmbe, int depth)
513{
514 unsigned long flags;
515
516 if (unlikely(!pmbe))
517 return;
518
519 write_lock_irqsave(&pmb_rwlock, flags);
520 __pmb_unmap_entry(pmbe, depth);
521 write_unlock_irqrestore(&pmb_rwlock, flags);
522}
243 523
244 if (size < pmb_sizes[i].size) 524static void __init pmb_notify(void)
525{
526 int i;
527
528 pr_info("PMB: boot mappings:\n");
529
530 read_lock(&pmb_rwlock);
531
532 for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) {
533 struct pmb_entry *pmbe;
534
535 if (!test_bit(i, pmb_map))
245 continue; 536 continue;
246 537
247 pmbe = pmb_alloc(vaddr, phys, pmb_flags | pmb_sizes[i].flag); 538 pmbe = &pmb_entry_list[i];
248 if (IS_ERR(pmbe)) {
249 err = PTR_ERR(pmbe);
250 goto out;
251 }
252 539
253 ret = set_pmb_entry(pmbe); 540 pr_info(" 0x%08lx -> 0x%08lx [ %4ldMB %2scached ]\n",
254 if (ret != 0) { 541 pmbe->vpn >> PAGE_SHIFT, pmbe->ppn >> PAGE_SHIFT,
255 pmb_free(pmbe); 542 pmbe->size >> 20, (pmbe->flags & PMB_C) ? "" : "un");
256 err = -EBUSY; 543 }
257 goto out;
258 }
259 544
260 phys += pmb_sizes[i].size; 545 read_unlock(&pmb_rwlock);
261 vaddr += pmb_sizes[i].size; 546}
262 size -= pmb_sizes[i].size; 547
548/*
549 * Sync our software copy of the PMB mappings with those in hardware. The
550 * mappings in the hardware PMB were either set up by the bootloader or
551 * very early on by the kernel.
552 */
553static void __init pmb_synchronize(void)
554{
555 struct pmb_entry *pmbp = NULL;
556 int i, j;
557
558 /*
559 * Run through the initial boot mappings, log the established
560 * ones, and blow away anything that falls outside of the valid
561 * PPN range. Specifically, we only care about existing mappings
562 * that impact the cached/uncached sections.
563 *
564 * Note that touching these can be a bit of a minefield; the boot
565 * loader can establish multi-page mappings with the same caching
566 * attributes, so we need to ensure that we aren't modifying a
567 * mapping that we're presently executing from, or may execute
568 * from in the case of straddling page boundaries.
569 *
570 * In the future we will have to tidy up after the boot loader by
571 * jumping between the cached and uncached mappings and tearing
572 * down alternating mappings while executing from the other.
573 */
574 for (i = 0; i < NR_PMB_ENTRIES; i++) {
575 unsigned long addr, data;
576 unsigned long addr_val, data_val;
577 unsigned long ppn, vpn, flags;
578 unsigned long irqflags;
579 unsigned int size;
580 struct pmb_entry *pmbe;
581
582 addr = mk_pmb_addr(i);
583 data = mk_pmb_data(i);
584
585 addr_val = __raw_readl(addr);
586 data_val = __raw_readl(data);
263 587
264 /* 588 /*
265 * Link adjacent entries that span multiple PMB entries 589 * Skip over any bogus entries
266 * for easier tear-down.
267 */ 590 */
268 if (likely(pmbp)) 591 if (!(data_val & PMB_V) || !(addr_val & PMB_V))
269 pmbp->link = pmbe; 592 continue;
270 593
271 pmbp = pmbe; 594 ppn = data_val & PMB_PFN_MASK;
595 vpn = addr_val & PMB_PFN_MASK;
272 596
273 /* 597 /*
274 * Instead of trying smaller sizes on every iteration 598 * Only preserve in-range mappings.
275 * (even if we succeed in allocating space), try using
276 * pmb_sizes[i].size again.
277 */ 599 */
278 i--; 600 if (!pmb_ppn_in_range(ppn)) {
279 } 601 /*
602 * Invalidate anything out of bounds.
603 */
604 writel_uncached(addr_val & ~PMB_V, addr);
605 writel_uncached(data_val & ~PMB_V, data);
606 continue;
607 }
608
609 /*
610 * Update the caching attributes if necessary
611 */
612 if (data_val & PMB_C) {
613 data_val &= ~PMB_CACHE_MASK;
614 data_val |= pmb_cache_flags();
280 615
281 if (size >= 0x1000000) 616 writel_uncached(data_val, data);
282 goto again; 617 }
283 618
284 return wanted - size; 619 size = data_val & PMB_SZ_MASK;
620 flags = size | (data_val & PMB_CACHE_MASK);
285 621
286out: 622 pmbe = pmb_alloc(vpn, ppn, flags, i);
287 if (pmbp) 623 if (IS_ERR(pmbe)) {
288 __pmb_unmap(pmbp); 624 WARN_ON_ONCE(1);
625 continue;
626 }
627
628 spin_lock_irqsave(&pmbe->lock, irqflags);
629
630 for (j = 0; j < ARRAY_SIZE(pmb_sizes); j++)
631 if (pmb_sizes[j].flag == size)
632 pmbe->size = pmb_sizes[j].size;
633
634 if (pmbp) {
635 spin_lock(&pmbp->lock);
289 636
290 return err; 637 /*
638 * Compare the previous entry against the current one to
639 * see if the entries span a contiguous mapping. If so,
640 * setup the entry links accordingly. Compound mappings
641 * are later coalesced.
642 */
643 if (pmb_can_merge(pmbp, pmbe))
644 pmbp->link = pmbe;
645
646 spin_unlock(&pmbp->lock);
647 }
648
649 pmbp = pmbe;
650
651 spin_unlock_irqrestore(&pmbe->lock, irqflags);
652 }
291} 653}
292 654
293void pmb_unmap(unsigned long addr) 655static void __init pmb_merge(struct pmb_entry *head)
294{ 656{
295 struct pmb_entry **p, *pmbe; 657 unsigned long span, newsize;
658 struct pmb_entry *tail;
659 int i = 1, depth = 0;
660
661 span = newsize = head->size;
662
663 tail = head->link;
664 while (tail) {
665 span += tail->size;
296 666
297 for (p = &pmb_list; (pmbe = *p); p = &pmbe->next) 667 if (pmb_size_valid(span)) {
298 if (pmbe->vpn == addr) 668 newsize = span;
669 depth = i;
670 }
671
672 /* This is the end of the line.. */
673 if (!tail->link)
299 break; 674 break;
300 675
301 if (unlikely(!pmbe)) 676 tail = tail->link;
677 i++;
678 }
679
680 /*
681 * The merged page size must be valid.
682 */
683 if (!pmb_size_valid(newsize))
302 return; 684 return;
303 685
304 __pmb_unmap(pmbe); 686 head->flags &= ~PMB_SZ_MASK;
687 head->flags |= pmb_size_to_flags(newsize);
688
689 head->size = newsize;
690
691 __pmb_unmap_entry(head->link, depth);
692 __set_pmb_entry(head);
305} 693}
306 694
307static void __pmb_unmap(struct pmb_entry *pmbe) 695static void __init pmb_coalesce(void)
308{ 696{
309 WARN_ON(!test_bit(pmbe->entry, &pmb_map)); 697 unsigned long flags;
698 int i;
310 699
311 do { 700 write_lock_irqsave(&pmb_rwlock, flags);
312 struct pmb_entry *pmblink = pmbe;
313 701
314 if (pmbe->entry != PMB_NO_ENTRY) 702 for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) {
315 clear_pmb_entry(pmbe); 703 struct pmb_entry *pmbe;
316 704
317 pmbe = pmblink->link; 705 if (!test_bit(i, pmb_map))
706 continue;
318 707
319 pmb_free(pmblink); 708 pmbe = &pmb_entry_list[i];
320 } while (pmbe); 709
710 /*
711 * We're only interested in compound mappings
712 */
713 if (!pmbe->link)
714 continue;
715
716 /*
717 * Nothing to do if it already uses the largest possible
718 * page size.
719 */
720 if (pmbe->size == SZ_512M)
721 continue;
722
723 pmb_merge(pmbe);
724 }
725
726 write_unlock_irqrestore(&pmb_rwlock, flags);
321} 727}
322 728
323static void pmb_cache_ctor(void *pmb) 729#ifdef CONFIG_UNCACHED_MAPPING
730static void __init pmb_resize(void)
324{ 731{
325 struct pmb_entry *pmbe = pmb; 732 int i;
733
734 /*
735 * If the uncached mapping was constructed by the kernel, it will
736 * already be a reasonable size.
737 */
738 if (uncached_size == SZ_16M)
739 return;
740
741 read_lock(&pmb_rwlock);
326 742
327 memset(pmb, 0, sizeof(struct pmb_entry)); 743 for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) {
744 struct pmb_entry *pmbe;
745 unsigned long flags;
328 746
329 pmbe->entry = PMB_NO_ENTRY; 747 if (!test_bit(i, pmb_map))
748 continue;
749
750 pmbe = &pmb_entry_list[i];
751
752 if (pmbe->vpn != uncached_start)
753 continue;
754
755 /*
756 * Found it, now resize it.
757 */
758 spin_lock_irqsave(&pmbe->lock, flags);
759
760 pmbe->size = SZ_16M;
761 pmbe->flags &= ~PMB_SZ_MASK;
762 pmbe->flags |= pmb_size_to_flags(pmbe->size);
763
764 uncached_resize(pmbe->size);
765
766 __set_pmb_entry(pmbe);
767
768 spin_unlock_irqrestore(&pmbe->lock, flags);
769 }
770
771 read_lock(&pmb_rwlock);
330} 772}
773#endif
331 774
332static int __uses_jump_to_uncached pmb_init(void) 775static int __init early_pmb(char *p)
333{ 776{
334 unsigned int nr_entries = ARRAY_SIZE(pmb_init_map); 777 if (!p)
335 unsigned int entry, i; 778 return 0;
336 779
337 BUG_ON(unlikely(nr_entries >= NR_PMB_ENTRIES)); 780 if (strstr(p, "iomap"))
781 pmb_iomapping_enabled = 1;
338 782
339 pmb_cache = kmem_cache_create("pmb", sizeof(struct pmb_entry), 0, 783 return 0;
340 SLAB_PANIC, pmb_cache_ctor); 784}
785early_param("pmb", early_pmb);
341 786
342 jump_to_uncached(); 787void __init pmb_init(void)
788{
789 /* Synchronize software state */
790 pmb_synchronize();
343 791
344 /* 792 /* Attempt to combine compound mappings */
345 * Ordering is important, P2 must be mapped in the PMB before we 793 pmb_coalesce();
346 * can set PMB.SE, and P1 must be mapped before we jump back to
347 * P1 space.
348 */
349 for (entry = 0; entry < nr_entries; entry++) {
350 struct pmb_entry *pmbe = pmb_init_map + entry;
351 794
352 __set_pmb_entry(pmbe->vpn, pmbe->ppn, pmbe->flags, &entry); 795#ifdef CONFIG_UNCACHED_MAPPING
353 } 796 /* Resize initial mappings, if necessary */
797 pmb_resize();
798#endif
354 799
355 ctrl_outl(0, PMB_IRMCR); 800 /* Log them */
801 pmb_notify();
356 802
357 /* PMB.SE and UB[7] */ 803 writel_uncached(0, PMB_IRMCR);
358 ctrl_outl((1 << 31) | (1 << 7), PMB_PASCR);
359 804
360 /* Flush out the TLB */ 805 /* Flush out the TLB */
361 i = ctrl_inl(MMUCR); 806 local_flush_tlb_all();
362 i |= MMUCR_TI; 807 ctrl_barrier();
363 ctrl_outl(i, MMUCR); 808}
364
365 back_to_cached();
366 809
367 return 0; 810bool __in_29bit_mode(void)
811{
812 return (__raw_readl(PMB_PASCR) & PASCR_SE) == 0;
368} 813}
369arch_initcall(pmb_init);
370 814
371static int pmb_seq_show(struct seq_file *file, void *iter) 815static int pmb_seq_show(struct seq_file *file, void *iter)
372{ 816{
@@ -381,8 +825,8 @@ static int pmb_seq_show(struct seq_file *file, void *iter)
381 unsigned int size; 825 unsigned int size;
382 char *sz_str = NULL; 826 char *sz_str = NULL;
383 827
384 addr = ctrl_inl(mk_pmb_addr(i)); 828 addr = __raw_readl(mk_pmb_addr(i));
385 data = ctrl_inl(mk_pmb_data(i)); 829 data = __raw_readl(mk_pmb_data(i));
386 830
387 size = data & PMB_SZ_MASK; 831 size = data & PMB_SZ_MASK;
388 sz_str = (size == PMB_SZ_16M) ? " 16MB": 832 sz_str = (size == PMB_SZ_16M) ? " 16MB":
@@ -428,23 +872,33 @@ static int __init pmb_debugfs_init(void)
428 872
429 return 0; 873 return 0;
430} 874}
431postcore_initcall(pmb_debugfs_init); 875subsys_initcall(pmb_debugfs_init);
432 876
433#ifdef CONFIG_PM 877#ifdef CONFIG_PM
434static int pmb_sysdev_suspend(struct sys_device *dev, pm_message_t state) 878static int pmb_sysdev_suspend(struct sys_device *dev, pm_message_t state)
435{ 879{
436 static pm_message_t prev_state; 880 static pm_message_t prev_state;
881 int i;
437 882
438 /* Restore the PMB after a resume from hibernation */ 883 /* Restore the PMB after a resume from hibernation */
439 if (state.event == PM_EVENT_ON && 884 if (state.event == PM_EVENT_ON &&
440 prev_state.event == PM_EVENT_FREEZE) { 885 prev_state.event == PM_EVENT_FREEZE) {
441 struct pmb_entry *pmbe; 886 struct pmb_entry *pmbe;
442 spin_lock_irq(&pmb_list_lock); 887
443 for (pmbe = pmb_list; pmbe; pmbe = pmbe->next) 888 read_lock(&pmb_rwlock);
444 set_pmb_entry(pmbe); 889
445 spin_unlock_irq(&pmb_list_lock); 890 for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) {
891 if (test_bit(i, pmb_map)) {
892 pmbe = &pmb_entry_list[i];
893 set_pmb_entry(pmbe);
894 }
895 }
896
897 read_unlock(&pmb_rwlock);
446 } 898 }
899
447 prev_state = state; 900 prev_state = state;
901
448 return 0; 902 return 0;
449} 903}
450 904
@@ -462,6 +916,5 @@ static int __init pmb_sysdev_init(void)
462{ 916{
463 return sysdev_driver_register(&cpu_sysdev_class, &pmb_sysdev_driver); 917 return sysdev_driver_register(&cpu_sysdev_class, &pmb_sysdev_driver);
464} 918}
465
466subsys_initcall(pmb_sysdev_init); 919subsys_initcall(pmb_sysdev_init);
467#endif 920#endif
diff --git a/arch/sh/mm/tlb-pteaex.c b/arch/sh/mm/tlb-pteaex.c
index 409b7c2b4b9d..b71db6af8060 100644
--- a/arch/sh/mm/tlb-pteaex.c
+++ b/arch/sh/mm/tlb-pteaex.c
@@ -68,11 +68,40 @@ void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte)
68 * in extended mode, the legacy 8-bit ASID field in address array 1 has 68 * in extended mode, the legacy 8-bit ASID field in address array 1 has
69 * undefined behaviour. 69 * undefined behaviour.
70 */ 70 */
71void __uses_jump_to_uncached local_flush_tlb_one(unsigned long asid, 71void local_flush_tlb_one(unsigned long asid, unsigned long page)
72 unsigned long page)
73{ 72{
74 jump_to_uncached(); 73 jump_to_uncached();
75 __raw_writel(page, MMU_UTLB_ADDRESS_ARRAY | MMU_PAGE_ASSOC_BIT); 74 __raw_writel(page, MMU_UTLB_ADDRESS_ARRAY | MMU_PAGE_ASSOC_BIT);
76 __raw_writel(asid, MMU_UTLB_ADDRESS_ARRAY2 | MMU_PAGE_ASSOC_BIT); 75 __raw_writel(asid, MMU_UTLB_ADDRESS_ARRAY2 | MMU_PAGE_ASSOC_BIT);
76 __raw_writel(page, MMU_ITLB_ADDRESS_ARRAY | MMU_PAGE_ASSOC_BIT);
77 __raw_writel(asid, MMU_ITLB_ADDRESS_ARRAY2 | MMU_PAGE_ASSOC_BIT);
77 back_to_cached(); 78 back_to_cached();
78} 79}
80
81void local_flush_tlb_all(void)
82{
83 unsigned long flags, status;
84 int i;
85
86 /*
87 * Flush all the TLB.
88 */
89 local_irq_save(flags);
90 jump_to_uncached();
91
92 status = __raw_readl(MMUCR);
93 status = ((status & MMUCR_URB) >> MMUCR_URB_SHIFT);
94
95 if (status == 0)
96 status = MMUCR_URB_NENTRIES;
97
98 for (i = 0; i < status; i++)
99 __raw_writel(0x0, MMU_UTLB_ADDRESS_ARRAY | (i << 8));
100
101 for (i = 0; i < 4; i++)
102 __raw_writel(0x0, MMU_ITLB_ADDRESS_ARRAY | (i << 8));
103
104 back_to_cached();
105 ctrl_barrier();
106 local_irq_restore(flags);
107}
diff --git a/arch/sh/mm/tlb-sh3.c b/arch/sh/mm/tlb-sh3.c
index ace8e6d2f59d..7a940dbfc2e9 100644
--- a/arch/sh/mm/tlb-sh3.c
+++ b/arch/sh/mm/tlb-sh3.c
@@ -41,14 +41,14 @@ void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte)
41 41
42 /* Set PTEH register */ 42 /* Set PTEH register */
43 vpn = (address & MMU_VPN_MASK) | get_asid(); 43 vpn = (address & MMU_VPN_MASK) | get_asid();
44 ctrl_outl(vpn, MMU_PTEH); 44 __raw_writel(vpn, MMU_PTEH);
45 45
46 pteval = pte_val(pte); 46 pteval = pte_val(pte);
47 47
48 /* Set PTEL register */ 48 /* Set PTEL register */
49 pteval &= _PAGE_FLAGS_HARDWARE_MASK; /* drop software flags */ 49 pteval &= _PAGE_FLAGS_HARDWARE_MASK; /* drop software flags */
50 /* conveniently, we want all the software flags to be 0 anyway */ 50 /* conveniently, we want all the software flags to be 0 anyway */
51 ctrl_outl(pteval, MMU_PTEL); 51 __raw_writel(pteval, MMU_PTEL);
52 52
53 /* Load the TLB */ 53 /* Load the TLB */
54 asm volatile("ldtlb": /* no output */ : /* no input */ : "memory"); 54 asm volatile("ldtlb": /* no output */ : /* no input */ : "memory");
@@ -75,5 +75,24 @@ void local_flush_tlb_one(unsigned long asid, unsigned long page)
75 } 75 }
76 76
77 for (i = 0; i < ways; i++) 77 for (i = 0; i < ways; i++)
78 ctrl_outl(data, addr + (i << 8)); 78 __raw_writel(data, addr + (i << 8));
79}
80
81void local_flush_tlb_all(void)
82{
83 unsigned long flags, status;
84
85 /*
86 * Flush all the TLB.
87 *
88 * Write to the MMU control register's bit:
89 * TF-bit for SH-3, TI-bit for SH-4.
90 * It's same position, bit #2.
91 */
92 local_irq_save(flags);
93 status = __raw_readl(MMUCR);
94 status |= 0x04;
95 __raw_writel(status, MMUCR);
96 ctrl_barrier();
97 local_irq_restore(flags);
79} 98}
diff --git a/arch/sh/mm/tlb-sh4.c b/arch/sh/mm/tlb-sh4.c
index 8cf550e2570f..cfdf7930d294 100644
--- a/arch/sh/mm/tlb-sh4.c
+++ b/arch/sh/mm/tlb-sh4.c
@@ -29,7 +29,7 @@ void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte)
29 29
30 /* Set PTEH register */ 30 /* Set PTEH register */
31 vpn = (address & MMU_VPN_MASK) | get_asid(); 31 vpn = (address & MMU_VPN_MASK) | get_asid();
32 ctrl_outl(vpn, MMU_PTEH); 32 __raw_writel(vpn, MMU_PTEH);
33 33
34 pteval = pte.pte_low; 34 pteval = pte.pte_low;
35 35
@@ -41,13 +41,13 @@ void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte)
41 * the protection bits (with the exception of the compat-mode SZ 41 * the protection bits (with the exception of the compat-mode SZ
42 * and PR bits, which are cleared) being written out in PTEL. 42 * and PR bits, which are cleared) being written out in PTEL.
43 */ 43 */
44 ctrl_outl(pte.pte_high, MMU_PTEA); 44 __raw_writel(pte.pte_high, MMU_PTEA);
45#else 45#else
46 if (cpu_data->flags & CPU_HAS_PTEA) { 46 if (cpu_data->flags & CPU_HAS_PTEA) {
47 /* The last 3 bits and the first one of pteval contains 47 /* The last 3 bits and the first one of pteval contains
48 * the PTEA timing control and space attribute bits 48 * the PTEA timing control and space attribute bits
49 */ 49 */
50 ctrl_outl(copy_ptea_attributes(pteval), MMU_PTEA); 50 __raw_writel(copy_ptea_attributes(pteval), MMU_PTEA);
51 } 51 }
52#endif 52#endif
53 53
@@ -57,15 +57,14 @@ void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte)
57 pteval |= _PAGE_WT; 57 pteval |= _PAGE_WT;
58#endif 58#endif
59 /* conveniently, we want all the software flags to be 0 anyway */ 59 /* conveniently, we want all the software flags to be 0 anyway */
60 ctrl_outl(pteval, MMU_PTEL); 60 __raw_writel(pteval, MMU_PTEL);
61 61
62 /* Load the TLB */ 62 /* Load the TLB */
63 asm volatile("ldtlb": /* no output */ : /* no input */ : "memory"); 63 asm volatile("ldtlb": /* no output */ : /* no input */ : "memory");
64 local_irq_restore(flags); 64 local_irq_restore(flags);
65} 65}
66 66
67void __uses_jump_to_uncached local_flush_tlb_one(unsigned long asid, 67void local_flush_tlb_one(unsigned long asid, unsigned long page)
68 unsigned long page)
69{ 68{
70 unsigned long addr, data; 69 unsigned long addr, data;
71 70
@@ -78,6 +77,34 @@ void __uses_jump_to_uncached local_flush_tlb_one(unsigned long asid,
78 addr = MMU_UTLB_ADDRESS_ARRAY | MMU_PAGE_ASSOC_BIT; 77 addr = MMU_UTLB_ADDRESS_ARRAY | MMU_PAGE_ASSOC_BIT;
79 data = page | asid; /* VALID bit is off */ 78 data = page | asid; /* VALID bit is off */
80 jump_to_uncached(); 79 jump_to_uncached();
81 ctrl_outl(data, addr); 80 __raw_writel(data, addr);
82 back_to_cached(); 81 back_to_cached();
83} 82}
83
84void local_flush_tlb_all(void)
85{
86 unsigned long flags, status;
87 int i;
88
89 /*
90 * Flush all the TLB.
91 */
92 local_irq_save(flags);
93 jump_to_uncached();
94
95 status = __raw_readl(MMUCR);
96 status = ((status & MMUCR_URB) >> MMUCR_URB_SHIFT);
97
98 if (status == 0)
99 status = MMUCR_URB_NENTRIES;
100
101 for (i = 0; i < status; i++)
102 __raw_writel(0x0, MMU_UTLB_ADDRESS_ARRAY | (i << 8));
103
104 for (i = 0; i < 4; i++)
105 __raw_writel(0x0, MMU_ITLB_ADDRESS_ARRAY | (i << 8));
106
107 back_to_cached();
108 ctrl_barrier();
109 local_irq_restore(flags);
110}
diff --git a/arch/sh/mm/tlb-sh5.c b/arch/sh/mm/tlb-sh5.c
index fdb64e41ec50..f27dbe1c1599 100644
--- a/arch/sh/mm/tlb-sh5.c
+++ b/arch/sh/mm/tlb-sh5.c
@@ -143,3 +143,42 @@ void sh64_setup_tlb_slot(unsigned long long config_addr, unsigned long eaddr,
143 */ 143 */
144void sh64_teardown_tlb_slot(unsigned long long config_addr) 144void sh64_teardown_tlb_slot(unsigned long long config_addr)
145 __attribute__ ((alias("__flush_tlb_slot"))); 145 __attribute__ ((alias("__flush_tlb_slot")));
146
147static int dtlb_entry;
148static unsigned long long dtlb_entries[64];
149
150void tlb_wire_entry(struct vm_area_struct *vma, unsigned long addr, pte_t pte)
151{
152 unsigned long long entry;
153 unsigned long paddr, flags;
154
155 BUG_ON(dtlb_entry == ARRAY_SIZE(dtlb_entries));
156
157 local_irq_save(flags);
158
159 entry = sh64_get_wired_dtlb_entry();
160 dtlb_entries[dtlb_entry++] = entry;
161
162 paddr = pte_val(pte) & _PAGE_FLAGS_HARDWARE_MASK;
163 paddr &= ~PAGE_MASK;
164
165 sh64_setup_tlb_slot(entry, addr, get_asid(), paddr);
166
167 local_irq_restore(flags);
168}
169
170void tlb_unwire_entry(void)
171{
172 unsigned long long entry;
173 unsigned long flags;
174
175 BUG_ON(!dtlb_entry);
176
177 local_irq_save(flags);
178 entry = dtlb_entries[dtlb_entry--];
179
180 sh64_teardown_tlb_slot(entry);
181 sh64_put_wired_dtlb_entry(entry);
182
183 local_irq_restore(flags);
184}
diff --git a/arch/sh/mm/tlb-urb.c b/arch/sh/mm/tlb-urb.c
new file mode 100644
index 000000000000..c92ce20db39b
--- /dev/null
+++ b/arch/sh/mm/tlb-urb.c
@@ -0,0 +1,93 @@
1/*
2 * arch/sh/mm/tlb-urb.c
3 *
4 * TLB entry wiring helpers for URB-equipped parts.
5 *
6 * Copyright (C) 2010 Matt Fleming
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#include <linux/mm.h>
13#include <linux/io.h>
14#include <asm/tlb.h>
15#include <asm/mmu_context.h>
16
17/*
18 * Load the entry for 'addr' into the TLB and wire the entry.
19 */
20void tlb_wire_entry(struct vm_area_struct *vma, unsigned long addr, pte_t pte)
21{
22 unsigned long status, flags;
23 int urb;
24
25 local_irq_save(flags);
26
27 status = __raw_readl(MMUCR);
28 urb = (status & MMUCR_URB) >> MMUCR_URB_SHIFT;
29 status &= ~MMUCR_URC;
30
31 /*
32 * Make sure we're not trying to wire the last TLB entry slot.
33 */
34 BUG_ON(!--urb);
35
36 urb = urb % MMUCR_URB_NENTRIES;
37
38 /*
39 * Insert this entry into the highest non-wired TLB slot (via
40 * the URC field).
41 */
42 status |= (urb << MMUCR_URC_SHIFT);
43 __raw_writel(status, MMUCR);
44 ctrl_barrier();
45
46 /* Load the entry into the TLB */
47 __update_tlb(vma, addr, pte);
48
49 /* ... and wire it up. */
50 status = __raw_readl(MMUCR);
51
52 status &= ~MMUCR_URB;
53 status |= (urb << MMUCR_URB_SHIFT);
54
55 __raw_writel(status, MMUCR);
56 ctrl_barrier();
57
58 local_irq_restore(flags);
59}
60
61/*
62 * Unwire the last wired TLB entry.
63 *
64 * It should also be noted that it is not possible to wire and unwire
65 * TLB entries in an arbitrary order. If you wire TLB entry N, followed
66 * by entry N+1, you must unwire entry N+1 first, then entry N. In this
67 * respect, it works like a stack or LIFO queue.
68 */
69void tlb_unwire_entry(void)
70{
71 unsigned long status, flags;
72 int urb;
73
74 local_irq_save(flags);
75
76 status = __raw_readl(MMUCR);
77 urb = (status & MMUCR_URB) >> MMUCR_URB_SHIFT;
78 status &= ~MMUCR_URB;
79
80 /*
81 * Make sure we're not trying to unwire a TLB entry when none
82 * have been wired.
83 */
84 BUG_ON(urb++ == MMUCR_URB_NENTRIES);
85
86 urb = urb % MMUCR_URB_NENTRIES;
87
88 status |= (urb << MMUCR_URB_SHIFT);
89 __raw_writel(status, MMUCR);
90 ctrl_barrier();
91
92 local_irq_restore(flags);
93}
diff --git a/arch/sh/mm/tlbflush_32.c b/arch/sh/mm/tlbflush_32.c
index 6f45c1f8a7fe..3fbe03ce8fe3 100644
--- a/arch/sh/mm/tlbflush_32.c
+++ b/arch/sh/mm/tlbflush_32.c
@@ -119,22 +119,3 @@ void local_flush_tlb_mm(struct mm_struct *mm)
119 local_irq_restore(flags); 119 local_irq_restore(flags);
120 } 120 }
121} 121}
122
123void local_flush_tlb_all(void)
124{
125 unsigned long flags, status;
126
127 /*
128 * Flush all the TLB.
129 *
130 * Write to the MMU control register's bit:
131 * TF-bit for SH-3, TI-bit for SH-4.
132 * It's same position, bit #2.
133 */
134 local_irq_save(flags);
135 status = ctrl_inl(MMUCR);
136 status |= 0x04;
137 ctrl_outl(status, MMUCR);
138 ctrl_barrier();
139 local_irq_restore(flags);
140}
diff --git a/arch/sh/mm/tlbflush_64.c b/arch/sh/mm/tlbflush_64.c
index de0b0e881823..706da1d3a67a 100644
--- a/arch/sh/mm/tlbflush_64.c
+++ b/arch/sh/mm/tlbflush_64.c
@@ -36,7 +36,7 @@ extern void die(const char *,struct pt_regs *,long);
36 36
37static inline void print_prots(pgprot_t prot) 37static inline void print_prots(pgprot_t prot)
38{ 38{
39 printk("prot is 0x%08lx\n",pgprot_val(prot)); 39 printk("prot is 0x%016llx\n",pgprot_val(prot));
40 40
41 printk("%s %s %s %s %s\n",PPROT(_PAGE_SHARED),PPROT(_PAGE_READ), 41 printk("%s %s %s %s %s\n",PPROT(_PAGE_SHARED),PPROT(_PAGE_READ),
42 PPROT(_PAGE_EXECUTE),PPROT(_PAGE_WRITE),PPROT(_PAGE_USER)); 42 PPROT(_PAGE_EXECUTE),PPROT(_PAGE_WRITE),PPROT(_PAGE_USER));
diff --git a/arch/sh/mm/uncached.c b/arch/sh/mm/uncached.c
new file mode 100644
index 000000000000..8a4eca551fc0
--- /dev/null
+++ b/arch/sh/mm/uncached.c
@@ -0,0 +1,43 @@
1#include <linux/init.h>
2#include <linux/module.h>
3#include <asm/sizes.h>
4#include <asm/page.h>
5#include <asm/addrspace.h>
6
7/*
8 * This is the offset of the uncached section from its cached alias.
9 *
10 * Legacy platforms handle trivial transitions between cached and
11 * uncached segments by making use of the 1:1 mapping relationship in
12 * 512MB lowmem, others via a special uncached mapping.
13 *
14 * Default value only valid in 29 bit mode, in 32bit mode this will be
15 * updated by the early PMB initialization code.
16 */
17unsigned long cached_to_uncached = SZ_512M;
18unsigned long uncached_size = SZ_512M;
19unsigned long uncached_start, uncached_end;
20EXPORT_SYMBOL(uncached_start);
21EXPORT_SYMBOL(uncached_end);
22
23int virt_addr_uncached(unsigned long kaddr)
24{
25 return (kaddr >= uncached_start) && (kaddr < uncached_end);
26}
27EXPORT_SYMBOL(virt_addr_uncached);
28
29void __init uncached_init(void)
30{
31#ifdef CONFIG_29BIT
32 uncached_start = P2SEG;
33#else
34 uncached_start = memory_end;
35#endif
36 uncached_end = uncached_start + uncached_size;
37}
38
39void __init uncached_resize(unsigned long size)
40{
41 uncached_size = size;
42 uncached_end = uncached_start + uncached_size;
43}
diff --git a/arch/sh/oprofile/Makefile b/arch/sh/oprofile/Makefile
index 8e6eec91c14c..4886c5c1786c 100644
--- a/arch/sh/oprofile/Makefile
+++ b/arch/sh/oprofile/Makefile
@@ -7,7 +7,3 @@ DRIVER_OBJS = $(addprefix ../../../drivers/oprofile/, \
7 timer_int.o ) 7 timer_int.o )
8 8
9oprofile-y := $(DRIVER_OBJS) common.o backtrace.o 9oprofile-y := $(DRIVER_OBJS) common.o backtrace.o
10
11oprofile-$(CONFIG_CPU_SUBTYPE_SH7750S) += op_model_sh7750.o
12oprofile-$(CONFIG_CPU_SUBTYPE_SH7750) += op_model_sh7750.o
13oprofile-$(CONFIG_CPU_SUBTYPE_SH7091) += op_model_sh7750.o
diff --git a/arch/sh/oprofile/common.c b/arch/sh/oprofile/common.c
index 44f4e31c6d63..ac604937f3ee 100644
--- a/arch/sh/oprofile/common.c
+++ b/arch/sh/oprofile/common.c
@@ -20,9 +20,6 @@
20#include <asm/processor.h> 20#include <asm/processor.h>
21#include "op_impl.h" 21#include "op_impl.h"
22 22
23extern struct op_sh_model op_model_sh7750_ops __weak;
24extern struct op_sh_model op_model_sh4a_ops __weak;
25
26static struct op_sh_model *model; 23static struct op_sh_model *model;
27 24
28static struct op_counter_config ctr[20]; 25static struct op_counter_config ctr[20];
@@ -94,33 +91,14 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
94 */ 91 */
95 ops->backtrace = sh_backtrace; 92 ops->backtrace = sh_backtrace;
96 93
97 switch (current_cpu_data.type) { 94 /*
98 /* SH-4 types */ 95 * XXX
99 case CPU_SH7750: 96 *
100 case CPU_SH7750S: 97 * All of the SH7750/SH-4A counters have been converted to perf,
101 lmodel = &op_model_sh7750_ops; 98 * this infrastructure hook is left for other users until they've
102 break; 99 * had a chance to convert over, at which point all of this
103 100 * will be deleted.
104 /* SH-4A types */ 101 */
105 case CPU_SH7763:
106 case CPU_SH7770:
107 case CPU_SH7780:
108 case CPU_SH7781:
109 case CPU_SH7785:
110 case CPU_SH7786:
111 case CPU_SH7723:
112 case CPU_SH7724:
113 case CPU_SHX3:
114 lmodel = &op_model_sh4a_ops;
115 break;
116
117 /* SH4AL-DSP types */
118 case CPU_SH7343:
119 case CPU_SH7722:
120 case CPU_SH7366:
121 lmodel = &op_model_sh4a_ops;
122 break;
123 }
124 102
125 if (!lmodel) 103 if (!lmodel)
126 return -ENODEV; 104 return -ENODEV;
diff --git a/arch/sh/oprofile/op_impl.h b/arch/sh/oprofile/op_impl.h
index 4d509975eba6..1244479ceb29 100644
--- a/arch/sh/oprofile/op_impl.h
+++ b/arch/sh/oprofile/op_impl.h
@@ -6,7 +6,7 @@ struct op_counter_config {
6 unsigned long enabled; 6 unsigned long enabled;
7 unsigned long event; 7 unsigned long event;
8 8
9 unsigned long long count; 9 unsigned long count;
10 10
11 /* Dummy values for userspace tool compliance */ 11 /* Dummy values for userspace tool compliance */
12 unsigned long kernel; 12 unsigned long kernel;
diff --git a/arch/sh/oprofile/op_model_sh7750.c b/arch/sh/oprofile/op_model_sh7750.c
deleted file mode 100644
index c892c7c30c2f..000000000000
--- a/arch/sh/oprofile/op_model_sh7750.c
+++ /dev/null
@@ -1,255 +0,0 @@
1/*
2 * arch/sh/oprofile/op_model_sh7750.c
3 *
4 * OProfile support for SH7750/SH7750S Performance Counters
5 *
6 * Copyright (C) 2003 - 2008 Paul Mundt
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#include <linux/kernel.h>
13#include <linux/oprofile.h>
14#include <linux/profile.h>
15#include <linux/init.h>
16#include <linux/errno.h>
17#include <linux/interrupt.h>
18#include <linux/io.h>
19#include <linux/fs.h>
20#include "op_impl.h"
21
22#define PM_CR_BASE 0xff000084 /* 16-bit */
23#define PM_CTR_BASE 0xff100004 /* 32-bit */
24
25#define PMCR(n) (PM_CR_BASE + ((n) * 0x04))
26#define PMCTRH(n) (PM_CTR_BASE + 0x00 + ((n) * 0x08))
27#define PMCTRL(n) (PM_CTR_BASE + 0x04 + ((n) * 0x08))
28
29#define PMCR_PMM_MASK 0x0000003f
30
31#define PMCR_CLKF 0x00000100
32#define PMCR_PMCLR 0x00002000
33#define PMCR_PMST 0x00004000
34#define PMCR_PMEN 0x00008000
35
36struct op_sh_model op_model_sh7750_ops;
37
38#define NR_CNTRS 2
39
40static struct sh7750_ppc_register_config {
41 unsigned int ctrl;
42 unsigned long cnt_hi;
43 unsigned long cnt_lo;
44} regcache[NR_CNTRS];
45
46/*
47 * There are a number of events supported by each counter (33 in total).
48 * Since we have 2 counters, each counter will take the event code as it
49 * corresponds to the PMCR PMM setting. Each counter can be configured
50 * independently.
51 *
52 * Event Code Description
53 * ---------- -----------
54 *
55 * 0x01 Operand read access
56 * 0x02 Operand write access
57 * 0x03 UTLB miss
58 * 0x04 Operand cache read miss
59 * 0x05 Operand cache write miss
60 * 0x06 Instruction fetch (w/ cache)
61 * 0x07 Instruction TLB miss
62 * 0x08 Instruction cache miss
63 * 0x09 All operand accesses
64 * 0x0a All instruction accesses
65 * 0x0b OC RAM operand access
66 * 0x0d On-chip I/O space access
67 * 0x0e Operand access (r/w)
68 * 0x0f Operand cache miss (r/w)
69 * 0x10 Branch instruction
70 * 0x11 Branch taken
71 * 0x12 BSR/BSRF/JSR
72 * 0x13 Instruction execution
73 * 0x14 Instruction execution in parallel
74 * 0x15 FPU Instruction execution
75 * 0x16 Interrupt
76 * 0x17 NMI
77 * 0x18 trapa instruction execution
78 * 0x19 UBCA match
79 * 0x1a UBCB match
80 * 0x21 Instruction cache fill
81 * 0x22 Operand cache fill
82 * 0x23 Elapsed time
83 * 0x24 Pipeline freeze by I-cache miss
84 * 0x25 Pipeline freeze by D-cache miss
85 * 0x27 Pipeline freeze by branch instruction
86 * 0x28 Pipeline freeze by CPU register
87 * 0x29 Pipeline freeze by FPU
88 *
89 * Unfortunately we don't have a native exception or interrupt for counter
90 * overflow (although since these counters can run for 16.3 days without
91 * overflowing, it's not really necessary).
92 *
93 * OProfile on the other hand likes to have samples taken periodically, so
94 * for now we just piggyback the timer interrupt to get the expected
95 * behavior.
96 */
97
98static int sh7750_timer_notify(struct pt_regs *regs)
99{
100 oprofile_add_sample(regs, 0);
101 return 0;
102}
103
104static u64 sh7750_read_counter(int counter)
105{
106 return (u64)((u64)(__raw_readl(PMCTRH(counter)) & 0xffff) << 32) |
107 __raw_readl(PMCTRL(counter));
108}
109
110/*
111 * Files will be in a path like:
112 *
113 * /<oprofilefs mount point>/<counter number>/<file>
114 *
115 * So when dealing with <file>, we look to the parent dentry for the counter
116 * number.
117 */
118static inline int to_counter(struct file *file)
119{
120 const unsigned char *name = file->f_path.dentry->d_parent->d_name.name;
121
122 return (int)simple_strtol(name, NULL, 10);
123}
124
125/*
126 * XXX: We have 48-bit counters, so we're probably going to want something
127 * more along the lines of oprofilefs_ullong_to_user().. Truncating to
128 * unsigned long works fine for now though, as long as we don't attempt to
129 * profile for too horribly long.
130 */
131static ssize_t sh7750_read_count(struct file *file, char __user *buf,
132 size_t count, loff_t *ppos)
133{
134 int counter = to_counter(file);
135 u64 val = sh7750_read_counter(counter);
136
137 return oprofilefs_ulong_to_user((unsigned long)val, buf, count, ppos);
138}
139
140static ssize_t sh7750_write_count(struct file *file, const char __user *buf,
141 size_t count, loff_t *ppos)
142{
143 int counter = to_counter(file);
144 unsigned long val;
145
146 if (oprofilefs_ulong_from_user(&val, buf, count))
147 return -EFAULT;
148
149 /*
150 * Any write will clear the counter, although only 0 should be
151 * written for this purpose, as we do not support setting the
152 * counter to an arbitrary value.
153 */
154 WARN_ON(val != 0);
155
156 __raw_writew(__raw_readw(PMCR(counter)) | PMCR_PMCLR, PMCR(counter));
157
158 return count;
159}
160
161static const struct file_operations count_fops = {
162 .read = sh7750_read_count,
163 .write = sh7750_write_count,
164};
165
166static int sh7750_ppc_create_files(struct super_block *sb, struct dentry *dir)
167{
168 return oprofilefs_create_file(sb, dir, "count", &count_fops);
169}
170
171static void sh7750_ppc_reg_setup(struct op_counter_config *ctr)
172{
173 unsigned int counters = op_model_sh7750_ops.num_counters;
174 int i;
175
176 for (i = 0; i < counters; i++) {
177 regcache[i].ctrl = 0;
178 regcache[i].cnt_hi = 0;
179 regcache[i].cnt_lo = 0;
180
181 if (!ctr[i].enabled)
182 continue;
183
184 regcache[i].ctrl |= ctr[i].event | PMCR_PMEN | PMCR_PMST;
185 regcache[i].cnt_hi = (unsigned long)((ctr->count >> 32) & 0xffff);
186 regcache[i].cnt_lo = (unsigned long)(ctr->count & 0xffffffff);
187 }
188}
189
190static void sh7750_ppc_cpu_setup(void *args)
191{
192 unsigned int counters = op_model_sh7750_ops.num_counters;
193 int i;
194
195 for (i = 0; i < counters; i++) {
196 __raw_writew(0, PMCR(i));
197 __raw_writel(regcache[i].cnt_hi, PMCTRH(i));
198 __raw_writel(regcache[i].cnt_lo, PMCTRL(i));
199 }
200}
201
202static void sh7750_ppc_cpu_start(void *args)
203{
204 unsigned int counters = op_model_sh7750_ops.num_counters;
205 int i;
206
207 for (i = 0; i < counters; i++)
208 __raw_writew(regcache[i].ctrl, PMCR(i));
209}
210
211static void sh7750_ppc_cpu_stop(void *args)
212{
213 unsigned int counters = op_model_sh7750_ops.num_counters;
214 int i;
215
216 /* Disable the counters */
217 for (i = 0; i < counters; i++)
218 __raw_writew(__raw_readw(PMCR(i)) & ~PMCR_PMEN, PMCR(i));
219}
220
221static inline void sh7750_ppc_reset(void)
222{
223 unsigned int counters = op_model_sh7750_ops.num_counters;
224 int i;
225
226 /* Clear the counters */
227 for (i = 0; i < counters; i++)
228 __raw_writew(__raw_readw(PMCR(i)) | PMCR_PMCLR, PMCR(i));
229}
230
231static int sh7750_ppc_init(void)
232{
233 sh7750_ppc_reset();
234
235 return register_timer_hook(sh7750_timer_notify);
236}
237
238static void sh7750_ppc_exit(void)
239{
240 unregister_timer_hook(sh7750_timer_notify);
241
242 sh7750_ppc_reset();
243}
244
245struct op_sh_model op_model_sh7750_ops = {
246 .cpu_type = "sh/sh7750",
247 .num_counters = NR_CNTRS,
248 .reg_setup = sh7750_ppc_reg_setup,
249 .cpu_setup = sh7750_ppc_cpu_setup,
250 .cpu_start = sh7750_ppc_cpu_start,
251 .cpu_stop = sh7750_ppc_cpu_stop,
252 .init = sh7750_ppc_init,
253 .exit = sh7750_ppc_exit,
254 .create_files = sh7750_ppc_create_files,
255};
diff --git a/arch/sh/tools/Makefile b/arch/sh/tools/Makefile
index 567516b58acc..2082af1f3fef 100644
--- a/arch/sh/tools/Makefile
+++ b/arch/sh/tools/Makefile
@@ -10,7 +10,7 @@
10# Shamelessly cloned from ARM. 10# Shamelessly cloned from ARM.
11# 11#
12 12
13include/asm-sh/machtypes.h: $(src)/gen-mach-types $(src)/mach-types 13include/generated/machtypes.h: $(src)/gen-mach-types $(src)/mach-types
14 @echo ' Generating $@' 14 @echo ' Generating $@'
15 $(Q)if [ ! -d include/asm-sh ]; then mkdir -p include/asm-sh; fi 15 $(Q)mkdir -p $(dir $@)
16 $(Q)$(AWK) -f $^ > $@ || { rm -f $@; /bin/false; } 16 $(Q)LC_ALL=C $(AWK) -f $^ > $@ || { rm -f $@; /bin/false; }
diff --git a/arch/sh/tools/gen-mach-types b/arch/sh/tools/gen-mach-types
index 65161e368353..f5ff7c5d8913 100644
--- a/arch/sh/tools/gen-mach-types
+++ b/arch/sh/tools/gen-mach-types
@@ -1,6 +1,6 @@
1#!/bin/awk 1#!/bin/awk
2# 2#
3# Awk script to generate include/asm-sh/machtypes.h 3# Awk script to generate include/generated/machtypes.h
4# Heavily based on arch/arm/tools/gen-mach-types 4# Heavily based on arch/arm/tools/gen-mach-types
5# 5#
6BEGIN { nr = 0 } 6BEGIN { nr = 0 }
diff --git a/arch/sh/tools/mach-types b/arch/sh/tools/mach-types
index 6639b25d8d57..b25aa554ee5e 100644
--- a/arch/sh/tools/mach-types
+++ b/arch/sh/tools/mach-types
@@ -32,6 +32,7 @@ DREAMCAST SH_DREAMCAST
32SNAPGEAR SH_SECUREEDGE5410 32SNAPGEAR SH_SECUREEDGE5410
33EDOSK7705 SH_EDOSK7705 33EDOSK7705 SH_EDOSK7705
34EDOSK7760 SH_EDOSK7760 34EDOSK7760 SH_EDOSK7760
35SDK7786 SH_SDK7786
35SH4202_MICRODEV SH_SH4202_MICRODEV 36SH4202_MICRODEV SH_SH4202_MICRODEV
36SH03 SH_SH03 37SH03 SH_SH03
37LANDISK SH_LANDISK 38LANDISK SH_LANDISK