2 files changed, 48 insertions, 18 deletions

diff --git a/arch/powerpc/platforms/512x/clock.c b/arch/powerpc/platforms/512x/clock.c
index 9f771e05457c..52d57d281724 100644
--- a/arch/powerpc/platforms/512x/clock.c
+++ b/arch/powerpc/platforms/512x/clock.c
@@ -26,6 +26,7 @@
 
 #include <linux/of_platform.h>
 #include <asm/mpc5xxx.h>
+#include <asm/mpc5121.h>
 #include <asm/clk_interface.h>
 
 #undef CLK_DEBUG
@@ -122,7 +123,7 @@ struct mpc512x_clockctl {
         u32 dccr;               /* DIU Clk Cnfg Reg */
 };
 
-struct mpc512x_clockctl __iomem *clockctl;
+static struct mpc512x_clockctl __iomem *clockctl;
 
 static int mpc5121_clk_enable(struct clk *clk)
 {
@@ -184,7 +185,7 @@ static unsigned long spmf_mult(void)
                 36, 40, 44, 48,
                 52, 56, 60, 64
         };
-        int spmf = (clockctl->spmr >> 24) & 0xf;
+        int spmf = (in_be32(&clockctl->spmr) >> 24) & 0xf;
         return spmf_to_mult[spmf];
 }
 
@@ -206,7 +207,7 @@ static unsigned long sysdiv_div_x_2(void)
                 52, 56, 58, 62,
                 60, 64, 66,
         };
-        int sysdiv = (clockctl->scfr2 >> 26) & 0x3f;
+        int sysdiv = (in_be32(&clockctl->scfr2) >> 26) & 0x3f;
         return sysdiv_to_div_x_2[sysdiv];
 }
 
@@ -230,7 +231,7 @@ static unsigned long sys_to_ref(unsigned long rate)
 
 static long ips_to_ref(unsigned long rate)
 {
-        int ips_div = (clockctl->scfr1 >> 23) & 0x7;
+        int ips_div = (in_be32(&clockctl->scfr1) >> 23) & 0x7;
 
         rate *= ips_div;        /* csb_clk = ips_clk * ips_div */
         rate *= 2;              /* sys_clk = csb_clk * 2 */
@@ -284,7 +285,7 @@ static struct clk sys_clk = {
 
 static void diu_clk_calc(struct clk *clk)
 {
-        int diudiv_x_2 = clockctl->scfr1 & 0xff;
+        int diudiv_x_2 = in_be32(&clockctl->scfr1) & 0xff;
         unsigned long rate;
 
         rate = sys_clk.rate;
@@ -311,7 +312,7 @@ static void half_clk_calc(struct clk *clk)
 
 static void generic_div_clk_calc(struct clk *clk)
 {
-        int div = (clockctl->scfr1 >> clk->div_shift) & 0x7;
+        int div = (in_be32(&clockctl->scfr1) >> clk->div_shift) & 0x7;
 
         clk->rate = clk->parent->rate / div;
 }
@@ -329,7 +330,7 @@ static struct clk csb_clk = {
 
 static void e300_clk_calc(struct clk *clk)
 {
-        int spmf = (clockctl->spmr >> 16) & 0xf;
+        int spmf = (in_be32(&clockctl->spmr) >> 16) & 0xf;
         int ratex2 = clk->parent->rate * spmf;
 
         clk->rate = ratex2 / 2;
@@ -551,7 +552,7 @@ static struct clk ac97_clk = {
         .calc = ac97_clk_calc,
 };
 
-struct clk *rate_clks[] = {
+static struct clk *rate_clks[] = {
         &ref_clk,
         &sys_clk,
         &diu_clk,
@@ -607,7 +608,7 @@ static void rate_clks_init(void)
  * There are two clk enable registers with 32 enable bits each
  * psc clocks and device clocks are all stored in dev_clks
  */
-struct clk dev_clks[2][32];
+static struct clk dev_clks[2][32];
 
 /*
  * Given a psc number return the dev_clk
@@ -648,12 +649,12 @@ static void psc_calc_rate(struct clk *clk, int pscnum, struct device_node *np)
         out_be32(&clockctl->pccr[pscnum], 0x00020000);
         out_be32(&clockctl->pccr[pscnum], 0x00030000);
 
-        if (clockctl->pccr[pscnum] & 0x80) {
+        if (in_be32(&clockctl->pccr[pscnum]) & 0x80) {
                 clk->rate = spdif_rxclk.rate;
                 return;
         }
 
-        switch ((clockctl->pccr[pscnum] >> 14) & 0x3) {
+        switch ((in_be32(&clockctl->pccr[pscnum]) >> 14) & 0x3) {
         case 0:
                 mclk_src = sys_clk.rate;
                 break;
@@ -668,7 +669,7 @@ static void psc_calc_rate(struct clk *clk, int pscnum, struct device_node *np)
                 break;
         }
 
-        mclk_div = ((clockctl->pccr[pscnum] >> 17) & 0x7fff) + 1;
+        mclk_div = ((in_be32(&clockctl->pccr[pscnum]) >> 17) & 0x7fff) + 1;
         clk->rate = mclk_src / mclk_div;
 }
 
@@ -680,13 +681,12 @@ static void psc_calc_rate(struct clk *clk, int pscnum, struct device_node *np)
 static void psc_clks_init(void)
 {
         struct device_node *np;
-        const u32 *cell_index;
         struct platform_device *ofdev;
+        u32 reg;
 
         for_each_compatible_node(np, NULL, "fsl,mpc5121-psc") {
-                cell_index = of_get_property(np, "cell-index", NULL);
-                if (cell_index) {
-                        int pscnum = *cell_index;
+                if (!of_property_read_u32(np, "reg", &reg)) {
+                        int pscnum = (reg & 0xf00) >> 8;
                         struct clk *clk = psc_dev_clk(pscnum);
 
                         clk->flags = CLK_HAS_RATE | CLK_HAS_CTRL;
@@ -696,7 +696,7 @@ static void psc_clks_init(void)
                          * AC97 is special rate clock does
                          * not go through normal path
                          */
-                        if (strcmp("ac97", np->name) == 0)
+                        if (of_device_is_compatible(np, "fsl,mpc5121-psc-ac97"))
                                 clk->rate = ac97_clk.rate;
                         else
                                 psc_calc_rate(clk, pscnum, np);
diff --git a/arch/powerpc/platforms/512x/mpc512x_shared.c b/arch/powerpc/platforms/512x/mpc512x_shared.c
index c7f47cfa9c29..d30235b7e3f7 100644
--- a/arch/powerpc/platforms/512x/mpc512x_shared.c
+++ b/arch/powerpc/platforms/512x/mpc512x_shared.c
@@ -426,8 +426,38 @@ void __init mpc512x_psc_fifo_init(void)
 
 void __init mpc512x_init(void)
 {
-        mpc512x_declare_of_platform_devices();
         mpc5121_clk_init();
+        mpc512x_declare_of_platform_devices();
         mpc512x_restart_init();
         mpc512x_psc_fifo_init();
 }
+
+/**
+ * mpc512x_cs_config - Setup chip select configuration
+ * @cs: chip select number
+ * @val: chip select configuration value
+ *
+ * Perform chip select configuration for devices on LocalPlus Bus.
+ * Intended to dynamically reconfigure the chip select parameters
+ * for configurable devices on the bus.
+ */
+int mpc512x_cs_config(unsigned int cs, u32 val)
+{
+        static struct mpc512x_lpc __iomem *lpc;
+        struct device_node *np;
+
+        if (cs > 7)
+                return -EINVAL;
+
+        if (!lpc) {
+                np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-lpc");
+                lpc = of_iomap(np, 0);
+                of_node_put(np);
+                if (!lpc)
+                        return -ENOMEM;
+        }
+
+        out_be32(&lpc->cs_cfg[cs], val);
+        return 0;
+}
+EXPORT_SYMBOL(mpc512x_cs_config);