1 files changed, 1 insertions, 10 deletions

diff --git a/arch/powerpc/kernel/fpu.S b/arch/powerpc/kernel/fpu.S
index fc8f5b14019c..de369558bf0a 100644
--- a/arch/powerpc/kernel/fpu.S
+++ b/arch/powerpc/kernel/fpu.S
@@ -23,6 +23,7 @@
 #include <asm/thread_info.h>
 #include <asm/ppc_asm.h>
 #include <asm/asm-offsets.h>
+#include <asm/ptrace.h>
 
 #ifdef CONFIG_VSX
 #define REST_32FPVSRS(n,c,base)                                         \
@@ -163,24 +164,14 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX)
 /*
  * These are used in the alignment trap handler when emulating
  * single-precision loads and stores.
- * We restore and save the fpscr so the task gets the same result
- * and exceptions as if the cpu had performed the load or store.
  */
 
 _GLOBAL(cvt_fd)
-        lfd     0,THREAD_FPSCR(r5)      /* load up fpscr value */
-        MTFSF_L(0)
         lfs     0,0(r3)
         stfd    0,0(r4)
-        mffs    0
-        stfd    0,THREAD_FPSCR(r5)      /* save new fpscr value */
         blr
 
 _GLOBAL(cvt_df)
-        lfd     0,THREAD_FPSCR(r5)      /* load up fpscr value */
-        MTFSF_L(0)
         lfd     0,0(r3)
         stfs    0,0(r4)
-        mffs    0
-        stfd    0,THREAD_FPSCR(r5)      /* save new fpscr value */
         blr