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| author | Glenn Elliott <gelliott@cs.unc.edu> | 2012-03-04 19:47:13 -0500 |
|---|---|---|
| committer | Glenn Elliott <gelliott@cs.unc.edu> | 2012-03-04 19:47:13 -0500 |
| commit | c71c03bda1e86c9d5198c5d83f712e695c4f2a1e (patch) | |
| tree | ecb166cb3e2b7e2adb3b5e292245fefd23381ac8 /arch/powerpc/kernel/fpu.S | |
| parent | ea53c912f8a86a8567697115b6a0d8152beee5c8 (diff) | |
| parent | 6a00f206debf8a5c8899055726ad127dbeeed098 (diff) | |
Merge branch 'mpi-master' into wip-k-fmlpwip-k-fmlp
Conflicts:
litmus/sched_cedf.c
Diffstat (limited to 'arch/powerpc/kernel/fpu.S')
| -rw-r--r-- | arch/powerpc/kernel/fpu.S | 11 |
1 files changed, 1 insertions, 10 deletions
diff --git a/arch/powerpc/kernel/fpu.S b/arch/powerpc/kernel/fpu.S index fc8f5b14019c..de369558bf0a 100644 --- a/arch/powerpc/kernel/fpu.S +++ b/arch/powerpc/kernel/fpu.S | |||
| @@ -23,6 +23,7 @@ | |||
| 23 | #include <asm/thread_info.h> | 23 | #include <asm/thread_info.h> |
| 24 | #include <asm/ppc_asm.h> | 24 | #include <asm/ppc_asm.h> |
| 25 | #include <asm/asm-offsets.h> | 25 | #include <asm/asm-offsets.h> |
| 26 | #include <asm/ptrace.h> | ||
| 26 | 27 | ||
| 27 | #ifdef CONFIG_VSX | 28 | #ifdef CONFIG_VSX |
| 28 | #define REST_32FPVSRS(n,c,base) \ | 29 | #define REST_32FPVSRS(n,c,base) \ |
| @@ -163,24 +164,14 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX) | |||
| 163 | /* | 164 | /* |
| 164 | * These are used in the alignment trap handler when emulating | 165 | * These are used in the alignment trap handler when emulating |
| 165 | * single-precision loads and stores. | 166 | * single-precision loads and stores. |
| 166 | * We restore and save the fpscr so the task gets the same result | ||
| 167 | * and exceptions as if the cpu had performed the load or store. | ||
| 168 | */ | 167 | */ |
| 169 | 168 | ||
| 170 | _GLOBAL(cvt_fd) | 169 | _GLOBAL(cvt_fd) |
| 171 | lfd 0,THREAD_FPSCR(r5) /* load up fpscr value */ | ||
| 172 | MTFSF_L(0) | ||
| 173 | lfs 0,0(r3) | 170 | lfs 0,0(r3) |
| 174 | stfd 0,0(r4) | 171 | stfd 0,0(r4) |
| 175 | mffs 0 | ||
| 176 | stfd 0,THREAD_FPSCR(r5) /* save new fpscr value */ | ||
| 177 | blr | 172 | blr |
| 178 | 173 | ||
| 179 | _GLOBAL(cvt_df) | 174 | _GLOBAL(cvt_df) |
| 180 | lfd 0,THREAD_FPSCR(r5) /* load up fpscr value */ | ||
| 181 | MTFSF_L(0) | ||
| 182 | lfd 0,0(r3) | 175 | lfd 0,0(r3) |
| 183 | stfs 0,0(r4) | 176 | stfs 0,0(r4) |
| 184 | mffs 0 | ||
| 185 | stfd 0,THREAD_FPSCR(r5) /* save new fpscr value */ | ||
| 186 | blr | 177 | blr |